最新美国发明专利第2016-12-06期 - 专利汇|PatentHub专利检索|专利查询网|发明专利查询分析

Document	Document Title
US09515415B1	Strain relief cable insert A connector assembly includes a connector housing, a cable, and a strain relief insert. The connector housing includes a clamp within an interior chamber. The cable extends into the interior chamber of the connector housing and is compressed by the clamp at a clamping region of the cable to secure the cable to the connector housing. The cable includes plural conductors and an outer jacket surrounding the conductors. Exposed segments of the conductors extend from an end of the outer jacket. The strain relief insert includes a stalk that extends between the conductors into the outer jacket through the end of the outer jacket. The stalk aligns with the clamping region of the cable such that the clamp compresses the conductors into engagement with the stalk.
US09515414B1	Waterproof adapter An accessory connector configured to provide a liquid-tight seal when inserted into a connector aperture of a waterproof housing for a mobile electronic device. The accessory connector includes a connector extending from a body of the accessory connector, the body configured to allow a user to grasp the accessory connector during insertion or removal of the connector into or from a corresponding connector of the mobile electronic device. The accessory connector further includes a waterproof adapter configured to provide the liquid-tight seal between the connector aperture of the waterproof housing and the accessory connector of the accessory device. The waterproof adapter including two or more tension tabs and an exterior gasket on the exterior surface of the waterproof adapter.
US09515407B2	Electrical connector with press-fitted rectangular wire terminal When a front end part of an upper surface of a first upper press-fit portion is brought into contact with a boundary part between a first terminal press-fit guiding groove and a second terminal press-fit guiding groove, the position of a rectangular wire terminal is thereafter accurately corrected along the first terminal press-fit guiding groove. That is, a distance from a lower surface of a terminal main body to the upper surface of the first upper press-fit portion coincides with a height from a lower surface of a cavity main part to the upper end of the first terminal press-fit guiding groove. As a result, the first press-fit portion reaches the first terminal press-fit guiding groove and thereafter, the rectangular wire terminal is further press-fitted, and forcibly pressed against the lower surface of the cavity main part.
US09515397B2	Contact protection system for power busbars Contact protection system for power busbars having planar contact protection modules which each comprise holding feet for engaging behind the power busbars and latching elements for mutually latching with adjacent contact protection module, wherein the contact protection modules comprise for each power busbar a terminal-receiving region for receiving connecting terminals which are provided for electrically contacting the respective power busbar.
US09515396B2	Female terminal fitting A female terminal fitting (10) includes a tubular main body (20) and a resilient contact piece (28) deflectably arranged in the main body portion (20). When being inserted into the main body portion (20), a mating male tab (90) comes into contact with the resilient contact piece (28) to deflect and deform the resilient contact piece (28) toward a base wall (21) of the main body portion (20). Excessive deflection regulating portions (37) arranged at positions facing the resilient contact piece (28) in a deflecting direction of the resilient contact piece (28) and configured to regulate excessive deflection of the resilient contact piece (29) are provided on the base wall (21) of the main body portion (20). The excessive deflection regulating portions (37) are bottom-raised toward the resilient contact piece (28) with respect to reference surfaces of the base wall (21).
US09515395B1	Clamp having a saddle with a projection received in a hole in a terminal sandwiched between the saddle and a conductive post A clamp for clamping an electrical terminal terminating an electrical wire to an electrically conductive post includes a saddle and a fastener. The saddle has an inner surface and at least partially circumferentially surrounds the post. A projection on the inner surface of the saddle is received in a hole of the electrical terminal. The fastener fastens the saddle to the post with the projection received in the electrical terminal so as to sandwich the electrical terminal between the post and the saddle.
US09515393B2	Systems and methods for assembling conformal arrays Systems and methods according to the present disclosure for assembling conformal arrays utilize an outer tool for insertion into an open cell of a conformal array, an inner tool for insertion into the outer tool, and an adhesive source for delivering adhesive to the edges of the open cell via the inner tool and the outer tool. An assembled conformal array includes adhesive extending along the edges of the open cell.
US09515391B2	Extended range RFID tag assemblies and methods of operation A method of operation and system for a radio frequency identification (RFID) tag assembly having an RFID semiconductor chip with an antenna interface, a mounting surface substrate, the RFID semiconductor having a predetermined operating frequency, a conductor electrically coupling the RFID chip antenna interface to an antenna, the antenna including a first radiating element lying in a first plane and a second radiating element lying in a second plane, the second plane being at an angle relative to the first plane, and a reflector having a substantially planar reflecting plane spaced apart from and substantially parallel to the first plane, the reflector being composed of reflecting material adapted for reflecting the predetermined operating frequency, wherein the reflector is positioned apart from the first radiating element with the reflective plane being a distance of about ¼ of a wavelength of the predetermined operating frequency.
US09515385B2	Coplanar waveguide implementing launcher and waveguide channel section in IC package substrate A coplanar waveguide (CPW) apparatus comprises a substrate having a first surface and an opposing second surface. The substrate comprises a metal layer proximate to the first surface. The metal layer comprises a conductive trace comprising a signal line coupled to a launcher element at a first end of the signal line, and a ground plane co-planar with the conductive trace. The ground plane defines a substantially rectangular first region surrounding the launcher element and defining a second region surrounding the signal line, the first and second regions substantially devoid of conductive material. The launcher element has a substantially rectangular shape with a width greater than a width of the signal line at the first end.
US09515380B2	Phase shift/antenna circuit having a signal line with first and third regions for engaging dielectric members and a second region that does not engage the dielectric members An antenna device includes a plurality of phase shift circuits to which distributed signals are respectively input and a plurality of antenna elements to which signals output from the respective phase shift circuits are input. At least one of the plurality of phase shift circuits has a signal line in which a first region in which paired dielectric members are disposed, a second region in which no paired dielectric members is disposed and a third region in which paired dielectric members are disposed are provided in this order along a propagation direction of a signal. Moreover, a characteristic impedance of the first region in a state where the paired dielectric members are not disposed and a characteristic impedance of the third region in a state where the paired dielectric members are not disposed are higher than a characteristic impedance of the second region.
US09515375B2	Antenna for a submarine An antenna for submarines comprises a base member extending along a main direction of extension between its bottom end, which is fixable to a structure of a submarine, and its top end, at least one movable stem, juxtaposed with the base member and extending along the main direction of extension between its bottom end and its top end, electrical connection means between the stem and the base member and movement means by which the stem is moved relative to the base member along the main direction of extension between a lowered position and a raised position. The connection means comprise a wire-shaped element extending between two end portions connected to the stem and to the base member, respectively, where at least the end portion connected to the stem is equipped with an underwater connector.
US09515373B2	Integrated antenna transceiver for sensor and data transmission on rotating shafts A method and system for communication with assemblies comprising shafts (e.g., drive shafts, or other rotating objects) comprising use of helical antenna based components. In this regard, a helical antenna based component may comprise one or more helical antennas surrounding or wound around a shaft, with the one or more helical antennas being electrically decoupled from the shaft, and with the helical antenna based component being configurable to communicate the signals when the shaft is stationary or rotating.
US09515372B2	Apparatus and method for beam locking in a wireless communication system According to one embodiment, an apparatus for beamforming includes a detector for measuring at least one change of movement and rotation of an apparatus; and a calculator for determining a beamforming parameter for aligning a beam direction with another apparatus by compensating for the change of the beam direction according to at least one of the movement and the rotation.
US09515369B2	Use of electrical power multiplication for power smoothing in power distribution A system for power smoothing in power distribution and methods are provided. In one embodiment, a power multiplying network is provided that comprises a multiply-connected, velocity inhibiting circuit constructed from a number of lumped-elements. The power multiplying network is coupled to a power distribution network. The power multiplying network is configured to store power from and supply power to the power distribution network.
US09515364B1	Three-dimensional microstructure having a first dielectric element and a second multi-layer metal element configured to define a non-solid volume Provided are three-dimensional microstructures and their methods of formation. The microstructures are formed by a sequential build process and include microstructural elements which are affixed to one another. The microstructures find use, for example, in coaxial transmission lines for electromagnetic energy.
US09515360B2	Battery pack air cooling structure provided with thermoelectric element and control method thereof A battery pack air cooling structure and method having a thermoelectric element are provided. The structure includes a housing having a cooling passageway through which a refrigerant passes and a plurality of cell module assemblies that are disposed inside the housing and each include a pair of unit cells stacked parallel to each other. A heat transfer plate is interposed between the pair of unit cells. A heat pipe has a first portion disposed in the heat transfer plate and protrudes second portion that protrudes out of the heat transfer plate. A heat-exchanging member formed at the second portion of the heat pipe and is configured to perform heat-exchange with air that passes through the cooling passageway; and a thermoelectric element is formed at an upstream side into which air of the cooling passageway is injected.
US09515353B2	Non-aqueous electrolyte battery A non-aqueous electrolyte, lithium-ion secondary battery includes an electrode group in which positive and negative electrode plates are wound via a separator accommodated into a battery container into which a non-aqueous electrolyte is injected. In the positive electrode plate, a positive electrode mixture layer including a lithium transition metal complex oxide is formed at both surfaces of an aluminum foil. A flame retardant layer containing a phosphazene compound as a flame retardant and a polyethylene oxide of a binder having ionic conductivity is formed at a surface of the positive electrode mixture layer. In the negative electrode plate, a negative electrode mixture layer including a carbon material of a negative electrode active material is formed at both surfaces of rolled copper foil. Ionic conductivity is secured by the polyethylene oxide, and the phosphazene compound decomposes when a battery temperature rises due to battery abnormality.
US09515351B2	Non-aqueous electrolyte and secondary battery comprising the same Disclosed is a secondary battery including an electrolyte and/or an electrode, the electrolyte including an electrolyte salt and an electrolyte solvent, i) a cyclic carbonate compound substituted with at least one halogen element; and ii) a compound containing a vinyl group in a molecule thereof, and the electrode including a solid electrolyte interface (SEI) layer partially or totally formed on the surface thereof by electrical reduction of the two compounds.
US09515350B2	Electrolytic solution, non-aqueous secondary battery, battery pack, electric vehicle, electric power storage system, electric power tool, and electronic apparatus A non-aqueous secondary battery includes a cathode, an anode, and an electrolytic solution. The electrolytic solution includes a non-aqueous solvent, an electrolyte salt, and one or both of a disulfonyl compound represented by a following Formula (1) and a disulfinyl compound represented by a following Formula (2), where R1 is one of a hydrocarbon group, a halogenated hydrocarbon group, an oxygen-containing hydrocarbon group, a halogenated oxygen-containing hydrocarbon group, and a group obtained by bonding two or more thereof to one another; and X1 is a halogen group, where R2 is one of a hydrocarbon group, a halogenated hydrocarbon group, an oxygen-containing hydrocarbon group, a halogenated oxygen-containing hydrocarbon group, and a group obtained by bonding two or more thereof to one another; and X2 is a halogen group.
US09515347B2	Lithium secondary battery cathode An object of the present invention is to provide a lithium secondary battery cathode which can more improve characteristics of the battery. The cathode of the present invention includes an electroconductive cathode current collector, a plurality of plate-like particle formed of a cathode active material, and a binder containing microparticles formed of the cathode active material and being smaller than the plate-like particles. The plate-like particles are formed so as to have an aspect ratio of 4 to 50. The plate-like particles are arranged such that the particles cover the surface of the cathode current collector surface at a percent area of 85 to 98%. The binder is disposed so as to intervene between two adjacent plate-like particles.
US09515346B2	Power plant fuse arrangement An exemplary power plant assembly includes a plurality of cell stack assemblies each having a plurality of fuel cells and a manifold. A fuse includes an indicator that provides an output when the fuse interrupts an electrically conductive connection between the manifold of a first one of the cell stack assemblies and a second one of the cell stack assemblies. The electrically conductive connection includes at least a portion of the voltage of the second one of the cell stack assemblies.
US09515339B2	Fuel cell system ion exchanger An ion exchanger includes an apparatus body having a lower filter and an upper filter. Ion exchange resin fills a space between the lower filter and the upper filter. A water supply port is provided at a lower position of the apparatus body, and a water discharge port is provided at an upper position of the apparatus body. An air container is provided at an upper position of the apparatus body, and an electric conductivity meter is provided in the air container at a position above the water discharge port.
US09515338B2	Fuel cell system and desulfurization system One embodiment of the present invention is a unique fuel cell system. Another embodiment is a unique desulfurization system. Yet another embodiment is a method of operating a fuel cell system. Other embodiments include apparatuses, systems, devices, hardware, methods, and combinations for fuel cell systems and desulfurization systems. Further embodiments, forms, features, aspects, benefits, and advantages of the present application will become apparent from the description and figures provided herewith.
US09515335B2	Solid oxide fuel cell system The invention is to provide a solid oxide fuel cell system including: a fuel cell module, a fuel flow regulator unit, a first power demand detection device, a control section for controlling a fuel supply amount and setting the current value extractable from the fuel cell module, an inverter for extracting current in a range not exceeding the extractable current value, and a power state detecting sensor for detecting actual extracted current value; whereby if actual extracted current value declines, then under circumstances where power demand begins to rise in a state of extra margin in the fuel supply amount after the controller suddenly decreases the extractable current value and suddenly reduces the electrical collector, the controller increases the extractable current value at a high current rise rate of change.
US09515319B2	Battery active material, nonaqueous electrolyte battery and battery pack According to one embodiment, a battery active material is provided. The battery active material includes monoclinic complex oxide represented by the formula LixTi1-yM1yNb2-zM2zO7+δ (0≦x≦5, 0≦y≦1, 0≦z≦2, −0.3≦δ≦0.3). In the above formula, M1 is at least one element selected from the group consisting of Zr, Si and Sn, and M2 is at least one element selected from the group consisting of V, Ta and Bi.
US09515312B2	Positive electrode active material for non-aqueous secondary battery and non-aqueous lithium secondary battery A lithium secondary battery (10) includes a positive electrode active material of lithium transition metal oxide which contains at least a nickel element and a manganese element as transition metals and for which, with respect to a diffraction peak A located at a diffraction angle 20 of 17° to 20° and a diffraction peak B located at a diffraction angle 2Θ of 43° to 46° from X-ray diffraction measurements, when the integrated intensity ratio is R1=IA/IB, the peak intensity ratio is RH=HA/HB, and the ratio between the integrated intensity ratio R1 and the peak intensity ratio RH is SF=RH/R1>> the SF satisfies 1.1≦SF≦2.2.
US09515310B2	V2O5 electrodes with high power and energy densities Methods are provided for forming films of orthorhombic V2O5. Additionally provided are the orthorhombic V2O5 films themselves, as well as batteries incorporating the films as cathode materials. The methods use electrodeposition from a precursor solution to form a V2O5 sol gel on a substrate. The V2O5 gel can be annealed to provide an orthorhombic V2O5 film on the substrate. The V2O5 film can be freestanding such that it can be removed from the substrate and integrated without binders or conductive filler into a battery as a cathode element. Due to the improved intercalation properties of the orthorhombic V2O5 films, batteries formed using the V2O5 films have extraordinarily high energy density, power density, and capacity.
US09515308B2	Battery pack A battery pack includes one or more bare cells, a protective circuit module, and one or more terminals. The protective circuit module is electrically coupled to the bare cell. The one or more terminals are on a first surface of the protective circuit module. The one or more terminals are configured to be electrically coupled to an external device. In the battery pack, one of the terminals includes a support portion coupled to the protective circuit module, a pair of body portions extended in a direction away from the first surface of the protective circuit module at the support portion, and a plurality of extending portions extended in different directions from opposite sides of the pair of body portions. The extending portions extend parallel to the first surface of the protective circuit module.
US09515304B2	Battery tray for a battery housing of a motor vehicle battery A battery tray (1) has a base for receiving a base (16) of a battery housing (2), opposed side walls (17, 18), an end wall (19) that connects the side walls (17, 18) and a clamp (22) that is connectable to the base (16). The end wall (19) and a first side wall (17) have grooves (24, 23) running parallel to the base (16) for receiving projections (10, 12) of the battery housing (2). The clamp (22) connects to the base (16) on the side of the battery tray (1) that faces away from the end wall (19). The clamp (22) has a block-forming element (29) for positioning the battery housing (2) on the side facing the second side wall (18), and the second side wall (18) has a block-forming element (30) in the region of the end wall (19), for positioning the battery tray (2) on the side facing the second side wall (18).
US09515295B2	Light extraction substrate for organic light emitting device, fabrication method therefor and organic light emitting device including same The present invention relates to a light extraction substrate for an organic light emitting device, a fabrication method therefor and an organic light emitting device including the same and, more specifically, to a light extraction substrate for an organic light emitting device, a fabrication method therefor and an organic light emitting device including the same, wherein the light extraction substrate has aperiodic photonic crystal patterns formed on the front side thereof, through which light emitted from an organic light emitting element is emitted to the outside, thereby avoiding the dependency of light extraction on a specific wavelength band which occurs in existing periodic photonic crystal patterns, and inducing light extraction from a wider wavelength band. To this end, the present invention provides the light extraction substrate for the organic light emitting device, the fabrication method therefor and the organic light emitting device including the same, wherein the light extraction substrate, which is arranged on one surface through which the light emitted from the organic light emitting element is emitted to the outside, comprises: a base substrate; a matrix layer formed between the organic light emitting element and the base substrate; and the photonic crystal patterns formed on the base substrate, arranged inside the matrix layer and formed to have an aperiodic structure, wherein the matrix layer and the photonic crystal patterns form an internal light extraction layer of the organic light emitting device.
US09515286B2	Laser welding transparent glass sheets using low melting glass or thin absorbing films A method of sealing a workpiece comprising forming an inorganic film over a surface of a first substrate, arranging a workpiece to be protected between the first substrate and a second substrate wherein the inorganic film is in contact with the second substrate; and sealing the workpiece between the first and second substrates as a function of the composition of impurities in the first or second substrates and as a function of the composition of the inorganic film by locally heating the inorganic film with a predetermined laser radiation wavelength. The inorganic film, the first substrate, or the second substrate can be transmissive at approximately 420 nm to approximately 750 nm.
US09515280B2	Organic light emitting device with enhanced lifespan An organic light emitting device, and a manufacturing method of the same, in which in a light emitting layer, an electron trap material is introduced so as to improve a light emitting property and an operating characteristic and to prolong a life span.
US09515270B2	Indolophenoxazine compound and organic light emitting device using the same Provided is an organic light emitting device having high emission efficiency and excellent driving durability. The organic light emitting device includes an anode, a cathode, and an organic compound layer disposed between the anode and the cathode, in which the organic compound layer includes an indolophenoxazine compound represented by the following general formula [1]: (in the formula [1], R1 to R4 each represents one of a hydrogen atom and an alkyl group having 1 to 4 carbon atoms, and n represents an integer of 0 to 3).
US09515266B2	Materials for organic electroluminescent devices Triphenylene derivatives, in particular for use as triplet matrix materials in organic electroluminescent devices, one of example of which is represented by formula I. The invention furthermore relates to a process for the preparation of the triphenylene derivatives and to electronic devices comprising the triphenylene derivatives.
US09515261B2	Memory cells and methods of making memory cells Some embodiments include a memory cell having a data storage region between a pair of conductive structures. The data storage region is configured to support a transitory structure which alters resistance through the memory cell. The data storage region includes two or more portions, with one of the portions supporting a higher resistance segment of the transitory structure than another of the portions. Some embodiments include a method of forming a memory cell. First oxide and second oxide regions are formed between a pair of conductive structures. The oxide regions are configured to support a transitory structure which alters resistance through the memory cell. The oxide regions are different from one another so that one of the oxide regions supports a higher resistance segment of the transitory structure than the other.
US09515257B2	Gate-tunable atomically-thin memristors and methods for preparing same and applications of same In one aspect of the invention, the memristor includes a monolayer film formed of an atomically thin material, where the monolayer film has at least one grain boundary (GB), a first electrode and a second electrode electrically coupled with the monolayer film to define a memristor channel therebetween, such that the at least one GB is located in the memristor channel, and a gate electrode capacitively coupled with the memristor channel.
US09515255B2	Methods of manufacturing semiconductor devices using cavities to distribute conductive patterning residue Methods of manufacturing a semiconductor device include forming a conductive layer on a substrate, forming an air gap or other cavity between the conductive layer and the substrate, and patterning the conductive layer to expose the air gap. The methods may further include forming conductive pillars between the substrate and the conductive layer. The air gap may be positioned between the conductive pillars.
US09515252B1	Low degradation MRAM encapsulation process using silicon-rich silicon nitride film A method of making a magnetic random access memory (MRAM) device comprising forming a magnetic tunnel junction on an electrode, the magnetic tunnel junction comprising a first reference layer, a free layer, and a first tunnel barrier layer; and depositing an encapsulating silicon nitride film on and along sidewalls of the magnetic tunnel junction; wherein the silicon nitride film has a N:Si ratio from 0.1 to 1. An MRAM device made by the above method is also disclosed.
US09515250B2	Electronic device and method for fabricating the same An electronic device comprising a semiconductor memory unit includes: variable resistance patterns formed over a substrate; a protective layer formed over the substrate including the variable resistance patterns and including a leakage current blocking layer that is spaced apart from the variable resistance patterns; and contact plugs formed adjacent to the variable resistance patterns over the substrate and penetrating through the protective layer to be coupled with the substrate.
US09515248B2	Vibration generating apparatus There is provided a vibration generating apparatus including: an elastic member having both end portions thereof fixedly installed on a support part of a lower case; a piezoelectric element installed on one surface of the elastic member; and a mass body part connected to the elastic member to increase an amount of vibrations, wherein the mass body part is provided with protrusion portions for first contacting the lower case at the time of an external impact.
US09515246B2	Systems and methods for forming thermoelectric devices A vapor phase method for forming a thermoelectric element comprises providing a substrate in a reaction space, the substrate including a pattern of a metallic material adjacent to the substrate, which metallic material is configured to catalyze the oxidation of the substrate. The metallic material is then exposed to a gas having an oxidizing agent and a chemical etchant to form holes in or wires from the substrate.
US09515245B2	Apparatus, system, and method for on-chip thermoelectricity generation An apparatus, system, and method for a thermoelectric generator. In some embodiments, the thermoelectric generator comprises a first thermoelectric region and a second thermoelectric region, where the second thermoelectric region may be coupled to the first thermoelectric region by a first conductor. In some embodiments, a second conductor may be coupled to the first thermoelectric region and a third conductor may be coupled to the second thermoelectric region. In some embodiments, the first conductor may be in a first plane, the first thermoelectric region and the second thermoelectric region may be in a second plane, and the second conductor and the third conductor may be in a third plane.
US09515240B2	Optical designs for high-efficacy white-light emitting diodes A method for increasing the luminous efficacy of a white light emitting diode (WLED), comprising introducing optically functional interfaces between an LED die and a phosphor, and between the phosphor and an outer medium, wherein at least one of the interfaces between the phosphor and the LED die provides a reflectance for light emitted by the phosphor away from the outer medium and a transmittance for light emitted by the LED die. Thus, a WLED may comprise a first material which surrounds an LED die, a phosphor layer, and at least one additional layer or material which is transparent for direct LED emission and reflective for the phosphor emission, placed between the phosphor layer and the first material which surrounds the LED die.
US09515230B2	Fluorophore, method for producing same, light-emitting device, and image display device Provided is chemically and thermally stable phosphor having light-emitting characteristics different from the conventional phosphor and high emission intensity when combined with LED of not exceeding 470 nm. The phosphor comprises inorganic compound having crystal represented by A2(D,E)5X9; crystal represented by Ca2Si5O3N6; or inorganic crystal having the same crystal structure as crystal represented by Ca2Si5O3N6, which includes A, D, E, and X elements (A is one or more kinds selected from Mg, Ca, Sr, and Ba; D is one or more kinds selected from Si, Ge, Sn, Ti, Zr, and Hf; E is one or more kinds selected from B, Al, Ga, In, Sc, Y, and La; and X is one or more kinds selected from O, N, and F), in which M element (M is one or more kinds of elements selected from Mn, Ce, Pr, Nd, Sm, Eu, Tb, Dy, and Yb) is solid-solved.
US09515229B2	Semiconductor light emitting devices with optical coatings and methods of making same A method of making a semiconductor light emitting device having one or more light emitting surfaces includes positioning a stencil on a substrate such that a chip disposed on the substrate is positioned within an opening in the stencil. Phosphor-containing material is deposited in the opening to form a coating on one or more light emitting surfaces of the chip. The opening may or may not substantially conform to a shape of the chip. The phosphor-containing material is cured with the stencil still in place. After curing, the stencil is removed from the substrate and the coated chip is separated from the substrate. The chip may then be subjected to further processing.
US09515228B2	Group III nitride semiconductor light-emitting device A face-up-type Group III nitride semiconductor light-emitting device includes a growth substrate, an n-type layer, a light-emitting layer, a p-type layer, an n-electrode including a bonding portion and a wiring portion, a p-electrode including a bonding portion and a wiring portion, and a first insulating film. The n-type layer, the light-emitting layer, and the p-type layer are sequentially stacked on the growth substrate, and the n-electrode and the p-electrode are formed on the first insulating film. A groove having a depth extending from a top surface of the p-type layer to the n-type layer is formed in at least one region selected from a region directly below the wiring portion of the n-electrode and a region directly below the wiring portion of the p-electrode. The wiring portion, which is formed in the groove, is located at a level lower than that of the light-emitting layer.
US09515227B2	Near infrared light source in bulk silicon A light emitting device (10) comprises a body (12) of a semiconductor material having a first face (14) and at least one other face (16). At least one pn-junction (18) in the body is located towards the first face and is configured to be driven via contacts on the body into a light emitting mode. The other face (16) of the body is configured to transmit from the body light emitted by the at least one pn-junction (18) in the near infrared part of the spectrum and having wavelengths longer than 1 μm.
US09515223B2	Semiconductor light emitting device substrate including an uneven structure having convex portions, and a flat surface therebetween A semiconductor light emitting device substrate including an uneven structure on one surface, the uneven structure including numerous convex portions and a flat surface between the convex portions, and multiple areas in which the central portions of seven adjacent convex portions are continuously and positionally aligned to become six vertices and intersection points of diagonal lines of a regular hexagon, and the area, shape and lattice orientation of the plurality of areas are random. A semiconductor light emitting device including the semiconductor light emitting device substrate; and a semiconductor functional layer laminated on the semiconductor light emitting device substrate.
US09515221B2	Epitaxial structure and method for making the same An epitaxial structure and a method for making the same are provided. The epitaxial structure includes a substrate, an epitaxial layer and a carbon nanotube layer. The epitaxial layer is located on the substrate. The carbon nanotube layer is located in the epitaxial layer. The method includes following steps. A substrate having an epitaxial growth surface is provided. A carbon nanotube layer is suspended above the epitaxial growth surface. An epitaxial layer is epitaxially grown from the epitaxial growth surface to enclose the carbon nanotube layer therein.
US09515219B2	Nitride semiconductor device and method for producing the same A method for producing a nitride semiconductor device. The method comprises providing a substrate made of a material other than a nitride semiconductor. The material has a hexagonal crystal structure. An upper face of the substrate has at least one flat section. The method further comprises growing a first nitride semiconductor layer on the upper face of the substrate. The first nitride semiconductor layer is made of monocrystalline AlN. The first nitride semiconductor layer has an upper face that is a +c plane. The first nitride semiconductor layer has a thickness in a range of 10 nm to 100 nm. The method further comprises growing a second nitride semiconductor layer on the upper face of the first nitride semiconductor layer. The second nitride semiconductor layer is made of InXAlYGa1-X-YN (0≦X, 0≦Y, X+Y<1). In an initial stage of growing the second nitride semiconductor layer, micronuclei are formed in multiple locations on the upper face of the first nitride semiconductor layer such that a plurality of upside-down hexagonal pyramid-shaped or upside-down hexagonal frustum-shaped recesses separate the micronuclei above the at least one flat section of the upper face of the substrate. After the initial stage of growing, further growth is performed to reduce a size of the recesses until the recesses are substantially eliminated. The further growth is performed such that the recesses are substantially eliminated before a thickness of the second nitride semiconductor layer grows to 800 nm. The second nitride semiconductor layer is grown to have an upper face with at least one flat section.
US09515218B2	Vertical pillar structured photovoltaic devices with mirrors and optical claddings A photovoltaic device operable to convert light to electricity, comprising a substrate, a plurality of structures essentially perpendicular to the substrate, one or more recesses between the structures, each recess having a planar mirror on a bottom wall thereof. The structures have p-n or p-i-n junctions for converting light into electricity. The planar mirrors function as an electrode and can reflect light incident thereon back to the structures to be converted into electricity.
US09515214B2	Solar battery module and manufacturing method thereof A solar battery module includes: a plurality of solar battery cells, a plain shape of each being a substantial rectangle, and a ratio of a short side length and a long side length of the substantial rectangle being 1/n:1 (n is an integer equal to or larger than 2), includes a plurality of light-receiving-surface bus electrodes parallel to the short side of the substantial rectangle on a light receiving surface, and includes rear-surface bus electrodes each at a position on a non-light-receiving surface corresponding to each of the light-receiving-surface bus electrodes; and a light-receiving-surface lead (an interconnector) that electrically connects the light-receiving-surface bus electrodes of one of the solar battery cells to the rear-surface bus electrodes of adjacent one of the solar battery cells.
US09515206B2	Electron-deficient fluorous porphyrins and methods of making and their use in organic solar cells Electron-deficient fluorous porphyrin molecules may have dual functions of light harvesting and electron accepting or donating and may be ideally suited for use in organic solar cells. Methods of making electron-deficient fluorous porphyrin molecules are described.
US09515204B2	Synchronous wired-or ACK status for memory with variable write latency A memory controller comprises a command interface to transmit a memory command to a plurality of memory devices associated with the memory controller. The memory controller also comprises an acknowledgement interface to receive an acknowledgment status packet from the plurality of memory devices over a shared acknowledgement link coupled between the memory controller and the plurality of memory devices, the acknowledgement status packet indicating whether the command was received by the plurality of memory devices. In addition, the memory controller comprises a memory controller core to decode the acknowledgment status packet to identify a portion of the acknowledgement status packet corresponding to each of the plurality of memory devices.
US09515201B2	Solar cell module including transparent conductive film with uniform thickness Provided is a solar cell module comprising a crystalline silicon wafer, at least one amorphous silicon layer provided on at least one of a top and bottom of the crystalline silicon wafer, a transparent conductive film provided on a surface of the at least one amorphous silicon layer, electrodes provided on a surface of the transparent conductive film and a division unit to divide the transparent conductive film into a current-carrying region and a non-current-carrying region, wherein the current-carrying region is electrically connected to the electrodes and the non-current-carrying region is electrically disconnected from the electrodes.
US09515200B2	Photovoltaic module A photovoltaic module capable of suppressing separation of a tab electrode can be obtained. The photovoltaic module includes a plurality of semiconductor layers including a photoelectric conversion layer, a plurality of photovoltaic elements including a finger electrode for collecting generated currents, formed on the semiconductor layers on a side of a light receiving surface, and a tab electrode for electrically connecting the plurality of photovoltaic elements, in which the tab electrode is electrically connected to the finger electrode in a region corresponding to a power generation region of the photovoltaic element and bonded on the light receiving surface through an insulating bonding material.
US09515197B2	Silicon carbide semiconductor device having layer covering corner portion of depressed portion In a silicon carbide semiconductor device, a trench penetrates a source region and a first gate region and reaches a drift layer. On an inner wall of the trench, a channel layer of a first conductivity-type is formed by epitaxial growth. On the channel layer, a second gate region of a second conductivity-type is formed. A first depressed portion is formed at an end portion of the trench to a position deeper than a thickness of the source region so as to remove the source region at the end portion of the trench. A corner portion of the first depressed portion is covered by a second conductivity-type layer.
US09515196B2	Relaxed silicon germanium platform for high speed CMOS electronics and high speed analog circuits Structures and methods for fabricating high speed digital, analog, and combined digital/analog systems using planarized relaxed SiGe as the materials platform. The relaxed SiGe allows for a plethora of strained Si layers that possess enhanced electronic properties. By allowing the MOSFET channel to be either at the surface or buried, one can create high-speed digital and/or analog circuits. The planarization before the device epitaxial layers are deposited ensures a flat surface for state-of-the-art lithography.
US09515193B2	Metal oxide film, method for manufacturing same, thin film transistor, display apparatus, image sensor, and X-ray sensor Provided is a metal oxide film, including a component having a peak position, in an XPS spectrum thereof, within a range corresponding to a binding energy of from 402 eV to 405 eV, the metal oxide film satisfying a relationship represented by Equation (1): A/(A+B)≧0.39, when an intensity of peak energy attributed to nitrogen 1s electron is obtained by peak separation, and a manufacturing method of the same, an oxide semiconductor film, a thin-film transistor, a display apparatus, an image sensor, and an X-ray sensor. In Equation (1), A represents a peak area of the component having a peak position within a range corresponding to a binding energy of from 402 eV to 405 eV, and B represents a peak area of a component having a peak position within a range corresponding to a binding energy of from 406 eV to 408 eV.
US09515192B2	Semiconductor device An object is to provide a semiconductor device having a structure in which parasitic capacitance between wirings can be efficiently reduced. In a bottom gate thin film transistor using an oxide semiconductor layer, an oxide insulating layer used as a channel protection layer is formed above and in contact with part of the oxide semiconductor layer overlapping with a gate electrode layer, and at the same time an oxide insulating layer covering a peripheral portion (including a side surface) of the stacked oxide semiconductor layer is formed. Further, a source electrode layer and a drain electrode layer are formed in a manner such that they do not overlap with the channel protection layer. Thus, a structure in which an insulating layer over the source electrode layer and the drain electrode layer is in contact with the oxide semiconductor layer is provided.
US09515190B2	Method for manufacturing polysilicon thin film transistor A method for manufacturing polysilicon thin film transistor is disclosed, and the method comprises the following steps: forming a semiconductor material layer on a prefabricated substrate; forming an intermediate layer on the semiconductor material layer; forming a photoresist layer on the intermediate layer, and exposing the photoresist layer with a photomask for a first time; moving the prefabricated substrate in a predetermined direction relative to the photomask, and exposing the photoresist layer with the photomask for a second time; forming a photoresist region which comprises a central part and a wing part and a hollowed-out region which contains no photoresist material in the photoresist layer; and forming an ion lightly doped region corresponding to the wing part and an ion heavily doped region corresponding to the hollowed-out region in the semiconductor material layer.
US09515189B2	Semiconductor device and manufacturing method of semiconductor device using metal oxide A method of manufacturing a semiconductor device using a metal oxide includes forming a metal oxide layer on a substrate, forming an amorphous semiconductor layer on the metal oxide layer, and forming a polycrystalline semiconductor layer by crystallizing the amorphous semiconductor layer using the metal oxide layer.
US09515186B2	Semiconductor device and method of fabricating the same A semiconductor device includes a semiconductor substrate including a group III element and a group V element, and a gate structure on the semiconductor substrate. The semiconductor substrate includes a first region which contacts a bottom surface of the gate 5 structure and a second region which is disposed under the first region. The concentration of the group III element in the first region is lower than that of the group V element in the first region, and the concentration of the group III element in the second region is substantially equal to that of the group V element in the second region.
US09515185B2	Silicon germanium-on-insulator FinFET A structurally stable SiGe-on-insulator FinFET employs a silicon nitride liner to prevent de-stabilizing oxidation at the base of a SiGe fin. The silicon nitride liner blocks access of oxygen to the lower corners of the fin to facilitate fabrication of a high-concentration SiGe fin. The silicon nitride liner is effective as an oxide barrier even if its thickness is less than about 5 nm. Use of the SiN liner provides structural stability for fins that have higher germanium content, in the range of 25-55% germanium concentration.
US09515181B2	Semiconductor device with self-aligned back side features Various methods and devices that involve self-aligned features on a semiconductor on insulator process are provided. An exemplary method comprises forming a gate on a semiconductor on insulator wafer. The semiconductor on insulator wafer comprises a device region, a buried insulator, and a substrate. The exemplary method further comprises applying a treatment to the semiconductor on insulator wafer using the gate as a mask. The treatment creates a treated insulator region in the buried insulator. The exemplary method also comprises removing at least a portion of the substrate. The exemplary method also comprises, selectively removing the treated insulator region from the buried insulator to form a remaining insulator region after removing that portion of the substrate.
US09515180B2	Vertical slit transistor with optimized AC performance A vertical slit transistor includes raised source, drain, and channel regions in a semiconductor substrate. Two gate electrodes are positioned adjacent respective sidewalls of the semiconductor substrate. A dielectric material separates the gate electrodes from the source and drain regions.
US09515179B2	Electronic devices including a III-V transistor having a homostructure and a process of forming the same An electronic device can include a vertical III-V transistor having a gate electrode and a channel region within a homostructure. The channel region can be disposed between a first portion and a second portion of the gate electrode. In an embodiment, the III-V transistor can be an enhancement-mode GaN transistor, and in a particular embodiment, the drain, source, and channel regions can include the same conductivity type.
US09515178B1	Shielded trench semiconductor devices and related fabrication methods Semiconductor device structures and related fabrication methods are provided. An exemplary semiconductor device includes gate structures within a semiconductor substrate, a shielding structure within the semiconductor substrate that includes a first portion underlying a first gate structure and a second portion proximate an end of the gate structures, and a conductive structure overlying the second portion of the shielding structure and an end region of the semiconductor substrate. The conductive structure provides an electrical connection between the second portion of the shielding structure and the end region of the semiconductor substrate residing between the gate structures proximate the end of the gate structures.
US09515172B2	Semiconductor devices having isolation insulating layers and methods of manufacturing the same The inventive concepts provide semiconductor devices and methods of manufacturing the same. Semiconductor devices of the inventive concepts may include a fin region comprising a first fin subregion and a second fin subregion separated and isolated from each other by an isolation insulating layer disposed therebetween, a first gate intersecting the first fin subregion, a second gate intersecting the second fin subregion, and a third gate intersecting the isolation insulating layer.
US09515169B2	FinFET and method of manufacturing same There is provided a FinFET fabricating method, comprising: a. providing a substrate ; b. forming a fin on the substrate; c. forming a channel protective layer on the fin; d. forming a shallow trench isolation on both sides of the fin; e. forming a sacrificial gate stack and a spacer on the top surface and sidewalls of the channel region which is in the middle of the fin; f. forming source/drain regions in both ends of the fin; g. depositing an interlayer dielectric layer on the sacrificial gate stack and the source/drain regions, planarizing later to expose the sacrificial gate stack; h. removing the sacrificial gate stack stack to form a sacrificial gate vacancy and expose the channel region and the channel protective layer; i. covering a portion of the semiconductor structure in one end of the fin with a photoresist layer; j. removing a portion of the spacer not covered; k. removing the photoresist layer and filling a gate stack in the sacrificial gate vacancy; l. planarizing the semiconductor structure formed by the foregoing steps to expose the channel protective layer and forming a first separated gate stack and a second separated gate stack. Comparing with the prior art, control ability of independent-gate-voltage FinFET can be effectively improved and it is good for device performance.
US09515167B2	Raised epitaxial LDD in MuGFETs and methods for forming the same Embodiments include Multiple Gate Field-Effect Transistors (MuGFETs) and methods of forming them. In an embodiment, a structure includes a substrate, a fin, masking dielectric layer portions, and a raised epitaxial lightly doped source/drain (LDD) region. The substrate includes the fin. The masking dielectric layer portions are along sidewalls of the fin. An upper portion of the fin protrudes from the masking dielectric layer portions. A first spacer is along a sidewall of a gate structure over a channel region of the fin. A second spacer is along the first spacer. The raised epitaxial LDD region is on the upper portion of the fin, and the raised epitaxial LDD region adjoins a sidewall of the first spacer and is disposed under the second spacer. The raised epitaxial LDD region extends from the upper portion of the fin in at least two laterally opposed directions and a vertical direction.
US09515165B1	III-V field effect transistor (FET) with reduced short channel leakage, integrated circuit (IC) chip and method of manufacture Field Effect Transistors (FETs), Integrated Circuit (IC) chips including the FETs, and a method of forming the FETs and IC. FET locations are defined on a layered semiconductor wafer. The layered semiconductor wafer preferably includes a III-V semiconductor surface layer and a buried layer. A gate stack is formed on each FET location. Source/drain regions are sub-etched at each said gate stack. The sub-etched source/drain regions define a channel under each said gate stack. A layered source/drain is formed in each sub-etched source/drain region.
US09515164B2	Methods and structure to form high K metal gate stack with single work-function metal A method for forming a replacement metal gate structure sharing a single work function metal for both the N-FET and the P-FET gates. The method oppositely dopes a high-k material of the N-FET and P-FET gate, respectively, using a single lithography step. The doping allows use of a single work function metal which in turn provides more space in the metal gate opening so that a bulk fill material may occupy more volume of the opening resulting in a lower resistance gate.
US09515163B2	Methods of forming FinFET semiconductor devices with self-aligned contact elements using a replacement gate process and the resulting devices One method disclosed herein includes removing a sacrificial gate structure and forming a replacement gate structure in its place, after forming the replacement gate structure, forming a metal silicide layer on an entire upper surface area of each of a plurality of source/drain regions and, with the replacement gate structure in position, forming at least one source/drain contact structure for each of the plurality of source/drain regions, wherein the at least one source/drain contact structure is conductively coupled to a portion of the metal silicide layer and a dimension of the at least one source/drain contact structure in a gate width direction of the transistor is less than a dimension of the source/drain region in the gate width direction.
US09515162B2	Surface treatment of semiconductor substrate using free radical state fluorine particles A substrate having a buffer layer and a barrier layer is formed. The buffer and barrier layers have different bandgaps such that an electrically conductive channel comprising a two-dimensional charge carrier gas arises at an interface between the buffer and barrier layers due to piezoelectric effects. The substrate is placed in a fluorine containing gas mixture that includes free radical state fluorine particles and is substantially devoid of ionic state fluorine particles. A first lateral surface section of the substrate is exposed to the gas mixture such that the free radical state fluorine particles contact the first lateral surface section without penetrating the substrate. A semiconductor device that incorporates first lateral surface section in the structure of the device is formed in the substrate.
US09515153B2	Semiconductor device and method for manufacturing the same A semiconductor device with enhanced reliability in which a gate electrode for a trench-gate field effect transistor is formed through a gate insulating film in a trench made in a semiconductor substrate. The upper surface of the gate electrode is in a lower position than the upper surface of the semiconductor substrate in an area adjacent to the trench. A sidewall insulating film is formed over the gate electrode and over the sidewall of the trench. The gate electrode and the sidewall insulating film are covered by an insulating film as an interlayer insulating film.
US09515150B2	Semiconductor devices and methods of manufacturing the same Provided are semiconductor devices and methods of manufacturing the same. The methods include providing a substrate including a first region and a second region, forming first mask patterns in the first region, and forming second mask patterns having an etch selectivity with respect to the first mask patterns in the second region. The first mask patterns and the second mask patterns are formed at the same time.
US09515149B2	Power semiconductor device A semiconductor device includes an active region and a semiconductor substrate layer having a lower part semiconductor layer of a second conductivity type. The active region includes a drift region formed by at least a part of the substrate layer, a body region of the second conductivity type formed on at least a part of the drift region, a source region of a first conductivity type disposed in the body region, and a first doped region of the first conductivity type at least partially disposed under the body region. A groove extends downward from a top of the substrate layer and contains a shielding electrode. A depth of the groove is greater than that of the first doped region. A gate at least partially formed above at least a part of the source region and the body region is electrically insulated from the shielding electrode.
US09515148B2	Bridging local semiconductor interconnects A semiconductor device includes a plurality of gates formed upon a semiconductor substrate that includes a plurality of outer active areas (e.g. CMOS/PMOS areas, source/drain regions, etc.) and one or more inner active areas. An isolator is formed upon one or more inner gates associated with the one or more inner active areas. A contact bar electrically connects the outer active areas and/or outer gates and is formed upon the isolator. The isolator electrically insulates the contact bar from the one or more inner active areas and/or the one or more inner gates.
US09515147B2	Semiconductor device including nanowire transistor A semiconductor device includes at least one nanowire that is disposed over a substrate, extends to be spaced apart from the substrate, and includes a channel region, a gate that surrounds at least a part of the channel region, and a gate dielectric film that is disposed between the channel region and the gate. A source/drain region that contacts one end of the at least one nanowire is formed in a semiconductor layer that extends from the substrate to the one end of the at least one nanowire. Insulating spacers are formed between the substrate and the at least one nanowire. The insulating spacers are disposed between the gate and the source/drain region and are formed of a material that is different from a material of the gate dielectric film.
US09515145B2	Vertical MOSFET device with steady on-resistance A semiconductor device capable of reducing ON-resistance changes with temperature, including a semiconductor substrate of a first conductivity type, a drift layer of the first conductivity type formed on the semiconductor substrate, a first well region of a second conductivity type formed in the front surface of the drift layer, a second well region of the second conductivity type formed in the front surface of the drift layer, and a gate structure that is formed on the front surface of the drift layer and forms a channel in the first well region and a channel in the second well region. A channel resistance of the channel formed in the first well region has a temperature characteristic that the channel resistance decreases with increasing temperature and a channel resistance of the channel formed in the second well region has a temperature characteristic that the channel resistance increases with increasing temperature.
US09515135B2	Edge termination structures for silicon carbide devices An edge termination structure for a silicon carbide semiconductor device includes a plurality of spaced apart concentric floating guard rings in a silicon carbide layer that at least partially surround a silicon carbide-based junction, an insulating layer on the floating guard rings, and a silicon carbide surface charge compensation region between the floating guard rings and adjacent the surface of the silicon carbide layer. A silicon nitride layer is on the silicon carbide layer, and an organic protective layer is on the silicon nitride layer. An oxide layer may be between the silicon nitride layer and the surface of the silicon carbide layer. Methods of forming edge termination structures are also disclosed.
US09515133B2	Inductor device and fabrication method A semiconductor device and a method of manufacturing the semiconductor device are disclosed. The semiconductor device includes an inductor disposed on a surface of an intermetallic dielectric layer at a location below which no virtual interconnect members are present. Thus, parasitic capacitance is reduced or eliminated and the Q value of the inductor is high.
US09515131B2	Narrow border organic light-emitting diode display An electronic device may be provided having an organic light-emitting diode display and control circuitry for operating the display. The display may include one or more display layers interposed between the control circuitry and a display layer having thin-film transistors. The electronic device may include a coupling structure interposed between the layer of thin-film transistors and the control circuitry that electrically couples the layer of thin-film transistors to the control circuitry. The coupling structure may include a dielectric member having a conductive via, a flexible printed circuit having a bent portion, or a conductive via formed in an encapsulation layer of the display. The display may include a layer of opaque masking material. The layer of opaque masking material may be formed on an encapsulation layer, an organic emissive layer, a thin-film transistor layer, or a glass layer of the organic light-emitting diode display.
US09515128B2	Display device and manufacturing method of the same A display device includes: a supporting member including a body, and a supporter rotatably coupled to a side surface of the body; a display substrate on the supporting member, the display substrate including a first region, and a second region at an outer periphery of the first region; an emission layer on the first region and the second region of the display substrate; a polarizer on the emission layer and on the first region of the display substrate; a touch panel on the polarizer; and a window on the touch panel. The supporter is configured to support the second region of the display substrate such that the second region of the substrate is in a bent-state in a non-display region of the device.
US09515123B2	Magnetic memory device and magnetic memory A magnetic memory device according to an embodiment includes a first magnetic section, a read section, and a write section. The first magnetic section includes an extending portion. The extending portion extends in a first direction. The extending portion has a first interface and a second interface. The extending portion includes magnetic domains arranged along the first direction. Magnetization easy axis of the extending portion is directed along a second direction. The extending portion includes a first region and a second region. The first region contains at least one first element selected from a first group consisting of gadolinium, terbium, dysprosium, neodymium, and holmium. The second region contains at least one second element selected from a second group consisting of iron, cobalt, nickel, boron, silicon, and phosphorus. Concentration of the first element in the second region is lower than concentration of the first element in the first region.
US09515122B2	Electronic device and method for fabricating the same Provided is an electronic device including a semiconductor memory. The semiconductor memory may include: an interlayer dielectric layer formed over a substrate including first and second areas; a first contact plug contacted with the substrate through the interlayer dielectric layer of the second area; an anti-peeling layer formed over the interlayer dielectric layer including the first contact plug; a second contact plug contacted with the substrate through the anti-peeling layer and the interlayer dielectric layer in the first area; and a variable resistance pattern contacted with the second contact plug.
US09515120B2	Image sensor An image sensor includes a substrate with a unit pixel defined by a first separation pattern, a photoelectric conversion part in the substrate, a photocharge storage in the substrate, the photocharge storage being adjacent to the photoelectric conversion part, a second separation pattern between the photoelectric conversion part and the photocharge storage, a shielding part on a bottom surface of the substrate to cover the photocharge storage, the shielding part including a first protrusion extending into the substrate and toward the first separation pattern, and an extension extending from the first protrusion to cover the bottom surface of the substrate; and an anti-reflection layer between the shielding part and the substrate, the anti-reflection layer having an overhang structure between the first protrusion and the extension.
US09515115B2	Solid-state image sensor, method of producing the same, and electronic apparatus A solid-state image sensor includes a pixel formed, upon forming a structure where a photoelectric conversion layer is laminated on a wiring layer constituting a pixel circuit, by forming at least the photoelectric conversion layer and a wiring layer bonding layer on a different substrate from a semiconductor substrate in which the wiring layer is formed, and by bonding the wiring layer bonding film of the different substrate and the wiring layer of the semiconductor substrate together.
US09515112B2	Devices and methods for providing selectable field of view functionality by providing an optical element into and out of an optical receiving path Within examples, devices and methods for providing optical element field of view functionality by providing an optical element into and out of an optical receiving path are described. In one example, a device is provided that comprises an imager die having an optical receiving path, and an actuator coupled to an optical element and configured to cause a change in a position of the optical element into and out of the optical receiving path of the imager die. The actuator is configured to cause the change in the position of the optical element to change a given field of view setting of the device. In some examples, a device may be configured to include dual-setting field of view functionality.
US09515111B2	Circuitry for biasing light shielding structures and deep trench isolation structures An imaging system may include an image sensor die stacked on top of a digital signal processor (DSP) die. Through-oxide vias (TOVs) may be formed in the image sensor die and may extend at least partially into in the DSP die to facilitate communications between the image sensor die and the DSP die. The image sensor die may include light shielding structures for preventing reference photodiodes in the image sensor die from receiving light and in-pixel grid structures for preventing cross-talk between adjacent pixels. The light shielding structure may receive a desired biasing voltage through a corresponding TOV, an integral plug structure, and/or a connection that makes contact directly with a polysilicon gate. The in-pixel grid may have a peripheral contact that receives the desired biasing voltage through a light shield, a conductive strap, a TOV, and/or an aluminum pad.
US09515110B2	Solid-state imaging device, method of manufacturing solid-state imaging device, and electronic apparatus There is provided a solid-state imaging device including: a semiconductor substrate that is formed with a photodiode for each pixel; a light shielding film that is laminated on the semiconductor substrate on a side of a light irradiated surface which is irradiated with light, and is formed to include an opening corresponding to a spot in which at least the photodiode is arranged; and a photoelectric conversion film that is laminated to cover the light irradiated surface of the semiconductor substrate and the light shielding film, and is configured to generate an electrical charge by absorbing light. The photoelectric conversion film is formed of a material which has higher light absorptivity than light absorptivity of the semiconductor substrate.
US09515107B2	Semiconductor device and manufacturing method thereof In a CMOS image sensor in which a plurality of pixels is arranged in a matrix, a transistor in which a channel formation region includes an oxide semiconductor is used for each of a charge accumulation control transistor and a reset transistor which are in a pixel portion. After a reset operation of the signal charge accumulation portion is performed in all the pixels arranged in the matrix, a charge accumulation operation by the photodiode is performed in all the pixels, and a read operation of a signal from the pixel is performed per row. Accordingly, an image can be taken without a distortion.
US09515106B2	Radiation imaging device with metal-insulator-semiconductor photodetector and thin film transistor A photosensor pixel includes a thin film transistor (TFT) and a metal-insulator-semiconductor (MIS) photodetector. The TFT includes a gate, a gate insulator layer, a semiconductor layer forming a channel region, a drain, and a source. The MIS photodetector includes a transparent conductor layer, a semiconductor layer including a photosensitive semiconductor, and an insulator layer between the transparent conductor layer and the semiconductor layer. The semiconductor layer of the MIS photodetector is connected to the source or the drain of the TFT, and the thickness of the insulator layer of the MIS photodetector is less than the thickness of the gate insulator layer of the TFT.
US09515103B2	LTPS TFT substrate structure and method of forming the same A method of forming an LTPS TFT substrate includes: Step 1: providing a substrate (1) and depositing a buffer layer (2); Step 2: depositing an a-Si layer (3); Step 3: depositing and patterning a silicon oxide layer (4); Step 4: taking the silicon oxide layer (4) as a photomask and annealing the a-Si layer (3) with excimer laser, so that the a-Si layer crystallizes and turns into a poly-Si layer; Step 5: forming a first poly-Si region (31) and a second poly-Si region (32); Step 6: defining a heavily N-doped area and a lightly N-doped area on the first and second poly-Si regions (31) and (32), and forming an LDD area; Step 7: depositing and patterning a gate insulating layer (5); Step 8: forming a first gate (61) and a second gate (62); Step 9: forming via holes (70); and Step 10: forming a first source/drain (81) and a second source/drain (82).
US09515102B2	Array substrate and method for producing the same, display substrate and display apparatus The present disclosure provides an array substrate, a method for producing the same, a display panel and a display apparatus. The array substrate comprises: a glass substrate; a flexible substrate comprising a first region and a second region, the glass substrate being supported on a lower surface of the first region of the flexible substrate and the second region projecting from the first region towards the external of the glass substrate; a display array formed on the first region of the flexible substrate; and a peripheral circuit formed on the second region of the flexible substrate. The array substrate can achieve a display apparatus with super narrow frame, even without frame.
US09515100B2	Array substrate, manufacturing method thereof and display device Embodiments of the present invention provide an array substrate, a manufacturing method thereof and a display device. The method for manufacturing the array substrate comprises: forming a pattern of an active layer of a switching thin-film transistor (TFT) and a pattern of a corresponding pixel electrode on a base substrate, in which the active layer of the switching TFT and the pixel electrode are on the same layer.
US09515099B2	Flexible display device with wire having reinforced portion and manufacturing method for the same There is provided a flexible display having a plurality of innovations configured to allow bending of a portion or portions to reduce apparent border size and/or utilize the side surface of an assembled flexible display.
US09515098B2	Light-emitting device A light-emitting device having the quality of an image high in homogeneity is provided. A printed wiring board (second substrate) (107) is provided facing a substrate (first substrate) (101) that has a luminous element (102) formed thereon. A PWB side wiring (second group of wirings) (110) on the printed wiring board (107) is electrically connected to element side wirings (first group of wirings) (103, 104) by anisotropic conductive films (105a, 105b). At this point, because a low resistant copper foil is used to form the PWB side wiring (110), a voltage drop of the element side wirings (103, 104) and a delay of a signal can be reduced. Accordingly, the homogeneity of the quality of an image is improved, and the operating speed of a driver circuit portion is enhanced.
US09515097B2	Flexible display device and manufacturing method thereof A flexible display device includes: a flexible substrate having a lower substrate including a prominence pattern, a barrier layer pattern on the prominence pattern, and a planarization film; a gate line on the flexible substrate; a data line crossing the gate line with having a gate insulation film therebetween to define a pixel region; a thin film transistor formed at an intersection of the gate line and the data line; and a passivation layer on the flexible substrate including the thin film transistor. With this configuration, the flexible substrate and the flexible display device can be enhanced by preventing property deterioration of the elements due to bending stresses.
US09515091B2	Thin film transistor array panel including angled drain regions A thin film transistor array panel includes a gate line elongated in an extension direction and including a gate and dummy gate electrode extended therefrom; and a source electrode, and a single drain member including a drain electrode at a first end thereof and a dummy drain electrode at an opposing second end thereof. The drain electrode faces the source electrode with respect to the gate electrode, and the dummy drain electrode overlaps the dummy gate electrode. The drain and dummy drain electrode respectively include a plurality of first and second regions each having a predetermined width in the extension direction. A second region includes an edge which forms an angle from about 0 degrees to about 90 degrees with the extension direction, and a planar area of at least one of the plurality of second regions is different from that of remaining second regions.
US09515090B2	Method to form dual channel group III-V and Si/Ge FINFET CMOS and integrated circuit fabricated using the method A method includes providing a structure having a substrate, a first insulating layer on the substrate, a first semiconductor material layer on the first insulating layer, a second insulating layer on the first semiconductor layer in a first portion of the structure and a second semiconductor layer of a second, different semiconductor material on the second insulating layer in the first portion. The method further includes growing additional first semiconductor material on the first semiconductor layer in a second portion of the structure forming a regrown semiconductor layer; forming first fins in the regrown semiconductor layer and second fins in the second semiconductor layer; and forming gate structures upon the first and second fins. A height difference, relative to a surface of the first insulating layer, of the gate structures formed upon the first fins and the gate structures formed upon the second fins is less than a predetermined value.
US09515083B2	Nonvolatile memory device A nonvolatile memory device includes a memory cell array including a plurality of memory cells, a first metal layer, a peripheral circuit configured to control the memory cell array, a second metal layer, and a pad. The first metal layer is disposed on the memory cell array and includes a plurality of cell region interconnections connected to the memory cell array. The second metal layer is disposed on the peripheral circuit and includes a plurality of peripheral region interconnections connecting the peripheral circuit and the plurality of cell region interconnections. The pad is disposed on the second metal layer and exchanges data, an address, or a command with the peripheral circuit during operation of the device. The second metal layer is lower than the first metal layer relative to a substrate of the device.
US09515082B2	Semiconductor device and method of manufacturing the same A memory gate is formed of a first memory gate including a second gate insulating film made of a second insulating film and a first memory gate electrode, and a second memory gate including a third gate insulating film made of a third insulating film and a second memory gate electrode. In addition, the lower surface of the second memory gate electrode is located lower in level than the lower surface of the first memory gate electrode. As a result, during an erase operation, an electric field is concentrated on the corner portion of the first memory gate electrode which is located closer to a selection gate and a semiconductor substrate and on the corner portion of the second memory gate electrode which is located closer to the first memory gate and the semiconductor substrate. This allows easy injection of holes into each of the second and third insulating films.
US09515076B2	Semiconductor integrated circuit device In an image information chip or the like, a multi-port SRAM is embedded with a logic circuit. When the 3 port is used, the 1 port may serve as a differential write and readout port, and the 2 port may serve as a single ended readout dedicated port. While the occupied area of an embedded SRAM can be reduced, the number of write and readout ports is limited to only one, and readout characteristics as fast as differential readout cannot be expected in single ended readout. A new arrangement is therefore provided in which three differential write and readout ports are included in a memory cell structure of the embedded SRAM, an N-well region, for example, is arranged at the center of a cell, and a P-well region is arranged on both sides thereof.
US09515074B2	3-D non-volatile memory device and method of manufacturing the same A three-dimensional (3-D) non-volatile memory device includes a plurality of word line structures extended in parallel and including a plurality of interlayer dielectric layers and a plurality of word lines that are alternately stacked over a substrate, a plurality of channels protruding from the substrate configured to penetrate the plurality of interlayer dielectric layers and the plurality of word lines, and an air gap formed between the plurality of word line structures.
US09515071B2	Asymmetric source/drain depths A semiconductor device includes a substrate having a first region and a second region, an n-type transistor in the first region, the n-type transistor comprising a first set of source/drain features, and a p-type transistor in the second region, the p-type transistor comprising a second set of source/drain features. The second set of source/drain features extend deeper than the first set of source/drain features.
US09515070B2	Replacement metal gate A semiconductor structure which includes: a fin on a semiconductor substrate; and a gate structure wrapped around the fin. The gate structure includes: spaced apart spacers to form an opening, the spacers being perpendicular to the fin, the spacers having a height with respect to the fin; a high-k dielectric material in the opening and over the fin, the high-k dielectric material in contact with the spacers and a bottom of the opening; a work function metal in contact with the high-k dielectric material that is over the fin, the spacers and the bottom of the opening, the work function metal that is in contact with the high-k dielectric material having a height in the opening that is less than the height of the spacers, the high-k dielectric material and the work function metal only partially filling the opening; and a metal completely filling the opening.
US09515067B2	Semiconductor device having switching element and free wheel diode and method for controlling the same A semiconductor device includes a switching element having: a drift layer; a base region; an element-side first impurity region in the base region; an element-side gate electrode sandwiched between the first impurity region and the drift layer; a second impurity region contacting the drift layer; an element-side first electrode coupled with the element-side first impurity region and the base region; and an element-side second electrode coupled with the second impurity region, and a FWD having: a first conductive layer; a second conductive layer; a diode-side first electrode coupled to the second conductive layer; a diode-side second electrode coupled to the first conductive layer; a diode-side first impurity region in the second conductive layer; and a diode-side gate electrode in the second conductive layer sandwiched between first impurity region and the first conductive layer and having a first gate electrode as an excess carrier injection suppression gate.
US09515066B2	Semiconductor device having an insulated gate bipolar transistor arrangement and a method for forming such a semiconductor device A semiconductor device includes an insulated gate bipolar transistor (IGBT) arrangement. The IGBT arrangement includes a carrier confinement reduction region laterally arranged between a cell region and a sensitive region. The IGBT arrangement is configured or formed so that the cell region has a first average density of free charge carriers in an on-state of the IGBT arrangement, the carrier confinement reduction region has a second average density of free charge carriers in the on-state of the IGBT arrangement and the sensitive region has a third average density of free charge carriers in the on-state of the IGBT arrangement. The first average density of free charge carriers is larger than the second average density of free charge carriers and the second average density of free charge carriers is larger than the third average density of free charge carriers.
US09515060B2	Multi-chip semiconductor power device A semiconductor device includes a first semiconductor power chip mounted over a first carrier and a second semiconductor power chip mounted over a second carrier. The semiconductor device further includes a contact clip mounted over the first semiconductor power chip and on the second semiconductor power chip. A semiconductor logic chip is mounted over the contact clip.
US09515059B2	Proximity sensor having light-blocking structure in leadframe and method of making same A method for fabricating a semiconductor proximity sensor includes providing a flat leadframe with a first and a second surface. The second surface is solderable. The leadframe includes a first and a second pad, a plurality of leads, and fingers framing the first pad. The fingers are spaced from the first pad by a gap which is filled with a clear molding compound. A light-emitting diode (LED) chip is assembled on the first pad and encapsulated by a first volume of the clear compound. The first volume outlined as a first lens. A sensor chip is assembled on the second pad and encapsulated by a second volume of the clear compound. The second volume outlined as a second lens. Opaque molding compound fills the space between the first and second volumes of clear compound and forms walls rising from the frame of fingers to create an enclosed cavity for the LED. The pads, leads, and fingers connected to a board using a layer of solder for attaching the proximity sensor.
US09515057B2	Semiconductor package and method of manufacturing the semiconductor package A semiconductor package includes: a package base substrate; at least one first semiconductor chip disposed on the package base substrate; a first molding member disposed at a same level as the at least one first semiconductor chip and that does not cover an upper surface of the at least one first semiconductor chip; at least one second semiconductor chip stacked on the at least one first semiconductor chip so as to extend over the at least one first semiconductor chip and the first molding member, wherein the at least one first semiconductor chip and at least part of the first molding member are disposed between the package base substrate and the at least one second semiconductor chip; and a second molding member disposed at a same level as the at least one second semiconductor chip.
US09515052B1	Semiconductor package including a step type substrate Disclosed herein are semiconductor packages. A semiconductor package may include a substrate configured to include a first face and a second face opposite the first face and to have a recess formed in the first face. The semiconductor package may include a first semiconductor chip disposed on the bottom of the recess. The semiconductor package may include a second semiconductor chip disposed on the second face of the substrate. The semiconductor package may include a third semiconductor chip disposed over the first face of the substrate and the first semiconductor chip. The semiconductor package may include a fourth semiconductor chip disposed over the third semiconductor chip.
US09515050B2	Electronic apparatus having a resin filled through electrode configured to go through first and second semiconductor components A first semiconductor component and a second semiconductor component are attached together via an adhesion layer so that the first semiconductor component and the second semiconductor component are electrically connected with each other via a through electrode. The through electrode is formed to fill a through hole formed in the second semiconductor component and a through hole formed in a portion the adhesion layer. The through hole formed in the portion the adhesion layer is positioned between the through hole formed in the second semiconductor component and a second connection surface of a first semiconductor component through electrode.
US09515048B2	Method for fabricating an interposer A method for fabricating an interposer is provided, which includes the steps of: providing a substrate body having a chip mounting side and an opposite external connection side and a plurality of conductive through holes communicating the chip mounting side and the external connection side, wherein the chip mounting side of the substrate body is covered with a protection layer; performing a singulation process on the external connection side of the substrate body; bonding the substrate body to a carrier via the external connection side thereof; removing the protection layer; and removing the carrier to form a plurality of interposers, thereby simplifying the fabrication process and improving the product yield.
US09515046B2	Stacked microfeature devices and associated methods Stacked microfeature devices and associated methods of manufacture are disclosed. A package in accordance with one embodiment includes first and second microfeature devices having corresponding first and second bond pad surfaces that face toward each other. First bond pads can be positioned at least proximate to the first bond pad surface and second bond pads can be positioned at least proximate to the second bond pad surface. A package connection site can provide electrical communication between the first microfeature device and components external to the package. A wirebond can be coupled between at least one of the first bond pads and the package connection site, and an electrically conductive link can be coupled between the first microfeature device and at least one of the second bond pads of the second microfeature device. Accordingly, the first microfeature device can form a portion of an electrical link to the second microfeature device.
US09515041B2	Method for bonding a chip to a substrate A method is provided for bonding a chip to a substrate, the method comprising the steps of providing a chip, providing a substrate, providing a recess in one of the chip and the substrate, arranging the chip and the substrate in contact with each other thereby forming a predetermined contact area and at least partly covering the recess by the other one of the chip and the substrate, and providing an amount of liquid adhesive in the recess for providing a bonding layer.
US09515040B2	Package structure and fabrication method thereof A method for fabricating a package structure is provided, including the steps of: sequentially forming a metal layer and a dielectric layer on a first carrier, wherein the dielectric layer has a plurality of openings exposing portions of the metal layer; disposing an electronic element on the dielectric layer via an active surface thereof and mounting a plurality of conductive elements of metal balls on the exposed portions of the metal layer; forming an encapsulant on the dielectric layer for encapsulating the electronic element and the conductive elements; removing the first carrier; and patterning the metal layer into first circuits and forming second circuits on the dielectric layer, wherein the second circuits are electrically connected to the electronic element and the first circuits. The invention dispenses with the conventional laser ablation process so as to simplify the fabrication process, save the fabrication cost and increase the product reliability.
US09515039B2	Substrate structure with first and second conductive bumps having different widths A substrate structure is provided, which includes a substrate body having a plurality of conductive pads, and a plurality of first conductive bumps and a plurality of second conductive bumps disposed on the conductive pads. Each of the second conductive bumps is less in width than each of the first conductive bumps, and is of a height with respect to the substrate body greater than a height of each of the first conductive bumps with respect to the substrate body. Therefore, the height difference between the first pre-solder layer and the second pre-solder layer after a reflow process can be compensated, and the first conductive bumps and the second conductive bumps thus have a uniform height.
US09515038B2	Electrical connection for chip scale packaging A system and method for providing a post-passivation and underbump metallization is provided. An embodiment comprises a post-passivation layer that is larger than an overlying underbump metallization. The post-passivation layer extending beyond the underbump metallization shields the underlying layers from stresses generated from mismatches of the materials' coefficient of thermal expansion.
US09515036B2	Methods and apparatus for solder connections Methods and apparatus for solder connections. An apparatus includes a substrate having a conductive terminal on a surface; a passivation layer overlying the surface of the substrate and the conductive terminal; an opening in the passivation layer exposing a portion of the conductive terminal; at least one stud bump bonded to the conductive terminal in the opening and extending in a direction normal to the surface of the substrate; and a solder connection formed on the conductive terminal in the opening and enclosing the at least one stud bump. Methods for forming the solder connections are disclosed.
US09515032B1	High-frequency package A high-frequency package comprises a ground lead, connected to a die, occupying a side of the high-frequency package, wherein a slot is formed within the ground lead; and a signal lead, connected to the die, disposed within the slot; wherein the ground lead surrounds the signal lead, and the ground lead and the signal lead form as a ground-signal-ground structure.
US09515029B2	Radio frequency module including segmented conductive top layer A radio frequency (RF) module comprises a conductive top layer configured to improve RF interference-shielding functionality with respect to one or more RF devices disposed on the module. The conductive top layer may be segmented as to form one or more segments of the top layer that are at least partially electrically isolated from surrounding segments or devices. A module may have a plurality of devices disposed thereon, wherein separate, at least partially isolated, top conductive layers correspond to different devices of the module. The top layer may be etched or cut to achieve such segmentation.
US09515028B2	Array substrate, method of manufacturing the same and display device An array substrate and manufacturing method thereof, and a display device are provided. The array substrate comprises a TFT, an isolating layer (M), a pixel electrode (12) and a via (Q) formed through the isolating layer (14). A drain (6) of the TFT is electrically connected with the pixel electrode (12) through the via (Q). A first light blocking layer (14a) is formed on the pixel electrode (12) inside the via (Q). In the array substrate of the present invention, display effect deterioration due to the light reflection on pixel electrode inside the via is avoided by forming the light blocking layer on the pixel electrode inside the via. At the same time, prior to manufacturing the light blocking layer, a barrier layer is formed first to guarantee no residual of light blocking layer will be left on the substrate, thereby improving display performance of the display device.
US09515025B2	Stretchable form of single crystal silicon for high performance electronics on rubber substrates The present invention provides stretchable, and optionally printable, semiconductors and electronic circuits capable of providing good performance when stretched, compressed, flexed or otherwise deformed. Stretchable semiconductors and electronic circuits of the present invention preferred for some applications are flexible, in addition to being stretchable, and thus are capable of significant elongation, flexing, bending or other deformation along one or more axes. Further, stretchable semiconductors and electronic circuits of the present invention may be adapted to a wide range of device configurations to provide fully flexible electronic and optoelectronic devices.
US09515020B2	Semiconductor device and method of manufacturing the same A semiconductor device includes a plurality of transistors formed over a substrate, a support body including a horizontal portion and protrusions, wherein the horizontal portion covers at least one of the transistors, and the protrusions are formed over the horizontal portion and located between the transistors, and conductive layers and insulating layers alternately stacked over the support body and protruding upwardly along the sidewalls of the protrusions.
US09515015B2	Housing for an electronic component, an electronic assembly, method of producing a housing for an electronic component and method of producing an electronic assembly A housing includes a lead frame formed from electrically conductive material having first and second sides, a contact section contacting an electronic component at the first side, and at least one receiving section arranging the electronic component at the first side, wherein the contact and receiving sections are separated and the contact section is formed thinner than the receiving section in a direction perpendicular, a molding material having an opening, the receiving and contact regions exposed in the opening, and into which the leadframe is embedded such that part of the molding material is formed between the contact and receiving sections and the second side is covered by the molding material in the contact section, and the second side is free of molding material in the receiving section, wherein the molding material at the second side has at least one opening filled with the electrically insulating material.
US09515010B2	Semiconductor packaging structure and forming method therefor The present invention provides a semiconductor package structure, including: a chip, wherein bonding pads and a passivation layer are arranged on the surface of the chip, the passivation layer is provided with first openings for exposing the bonding pads, and a seed layer connected with the bonding pads and columnar salient points stacked on the seed layer are arranged on the bonding pads; lead frames, wherein each lead frame is provided with a plurality of discrete pins, and internal pins and external pins are respectively arranged on two opposite surfaces of the pins; the chip being flipped on the lead frames, and the columnar salient points being connected with the internal pins; a plastic package layer, wherein the plastic package layer is used for sealing the chip, the columnar salient points and the lead frames and exposing the external pins. By adopting the present invention, a transverse area occupied by the package structure is decreased, the volume of the entire package structure is correspondingly decreased, and the integration level of the package structure is improved. The present invention further provides a forming method of the semiconductor package structure.
US09515007B2	Substrate structure A substrate structure includes: a substrate body defined with a layout area, a sealing member and a cutting area, the sealing member being adjacent to the layout area, and the cutting area being adjacent to the sealing member; a wiring layer formed on the layout area; an insulating layer formed on the layout area and the wiring layer; and a metal layer formed on the insulating layer and the layout area. The insulating layer is prevented from being delaminated due to the formation of the metal layer.
US09515003B1	Embedded air core inductors for integrated circuit package substrates with thermal conductor Embedded air core inductors are described for integrated circuit package substrates. The substrates have a thermal conductor for the inductors. One example includes a package substrate to carry an integrated circuit die, the package substrate having a plurality of top side pads to connect to the die on a top side and a plurality of bottom side pads to connect to an external component on a bottom side. An inductor is embedded within the package substrate, A thermal conductor is embedded within the package substrate adjacent to the inductor to conduct heat away from the inductor, and a heat sink is thermally coupled to the thermal conductor to receive the heat from the conductor.
US09515002B2	Bonding pads with thermal pathways Apparatuses and methods for providing thermal pathways from a substrate to a thermal bonding pad. The thermal pathways may be metal extensions of the thermal bonding pad that are disposed in channels formed in a backside passivation layer underneath the thermal bonding pad, and may be in direct contact with an underlying substrate. The thermal pathways may provide improved thermal dissipation from the substrate.
US09515001B2	Semiconductor device having potential monitoring terminal to monitor potential of power-supply line Disclosed herein is a device that includes an internal circuit, a first terminal supplied with a first voltage, a first power-supply line coupled between the first terminal and the internal circuit, a potential monitoring terminal, and a first switch coupled between the internal power-supply line and the potential monitoring terminal.
US09514999B2	Systems and methods for semiconductor line scribe line centering Methods and systems for semiconductor line scribe centering are provided. A method includes placing and measuring substantially identical test macros within a chip and in a scribe line. The method also includes establishing an estimate correlation between scribe line measurements taken during a manufacturing process and product measurements taken on a final product. The method also includes determining empirical scribe line specification limits consistent with established product screen limits. The method also includes adjusting the manufacturing process in order to optimize performance to the empirical scribe line specification limits.
US09514996B2	Process for fabricating SOI transistors for an increased integration density A process for fabricating field-effect transistors, including providing a first semiconductor band surmounted with a first semiconductor layer; providing a second semiconductor band surmounted with a second semiconductor layer; providing a buried insulating layer; providing a deep trench isolation passing through the buried insulating layer and isolating the first semiconductor band from the second semiconductor band; etching the first semiconductor band so as to form a first row of semiconductor islands; etching the second semiconductor band so as to form a second row of semiconductor islands; and forming sacrificial gates on the first semiconductor layer and on the second semiconductor layer.
US09514995B1	Implant-free punch through doping layer formation for bulk FinFET structures A punch through stop layer is formed in a bulk FinFET structure using doped oxides. Dopants are driven into the substrate and base portions of the fins by annealing. The punch through stop layer includes a p-type region and an n-type region, both of which may extend substantially equal distances into the semiconductor fins.
US09514990B2	Methods for manufacturing semiconductor devices having different threshold voltages Methods for manufacturing a semiconductor device including a field effect transistor include forming first fins protruding from a substrate including a first region and a second region, the first fins including silicon-germanium (SiGe), forming a first mask pattern to expose the first fins disposed in the second region, the first mask pattern covering the first fins disposed in the first region, oxidizing the first fins in the second region to form second fins in the second region, and forming germanium (Ge)-rich layers each disposed on a surface of a respective one of the second fins.
US09514989B2	Guard rings including semiconductor fins and regrown region A method includes forming a semiconductor fin, which forms a ring, forming a plurality of gate stacks on sidewalls and a top surface of each of sides of the ring, epitaxially growing a plurality of epitaxy regions between the plurality of gate stacks, and forming a plurality of metal contact plugs. Each of the plurality of metal contact plugs is over, and is electrically coupling to, one of the plurality of epitaxy regions.
US09514988B1	Semiconductor devices and packaging methods thereof Packaged semiconductor devices and methods of packaging thereof are disclosed. In some embodiments, a method of packaging semiconductor devices comprises attaching a first substrate to a film. A first portion of the film is attached to a first region of the first substrate and a second portion of the film is attached to a second region of the first substrate. The method further comprises separating the first portion of the film from the second portion of the film.
US09514987B1	Backside contact to final substrate Device structures and fabrication methods for a backside contact to a final substrate An electrically-conducting connection is formed that extends through a device layer of a silicon-on-insulator substrate and partially through a buried insulator layer of the silicon-on-insulator substrate. After the electrically-conducting connection is formed, a handle wafer of the silicon-on-insulator substrate is removed. After the handle wafer is removed, the buried insulator layer is partially removed to expose the electrically-conducting connection. After the buried insulator layer is partially removed, a final substrate is coupled to the buried insulator layer such that the electrically-conducting connection is coupled with the final substrate.
US09514980B2	Semiconductor device with air gap and method for fabricating the same A method for fabricating a semiconductor device includes forming an insulation layer over a substrate; forming an open portion in the insulation layer; forming a sacrificial spacer over sidewalls of the open portion; forming, over the sacrificial spacer, a first conductive pattern in a lower section of the open portion; forming an ohmic contact layer over the first conductive pattern; forming an air gap by removing the sacrificial spacer; capping the air gap by forming a barrier layer over the ohmic contact layer; and forming a second conductive pattern over the barrier layer to fill an upper section of the open portion.
US09514979B2	Trench formation using horn shaped spacer A method includes forming a mandrel layer over a target layer, and etching the mandrel layer to form mandrels. The mandrels have top widths greater than respective bottom widths, and the mandrels define a first opening in the mandrel layer. The first opening has an I-shape and includes two parallel portions and a connecting portion interconnecting the two parallel portions. Spacers are formed on sidewalls of the first opening. The spacers fill the connecting portion, wherein a center portion of each of the two parallel portions is unfilled by the spacers. Portions of the first opening that are unfilled by the spacers are extended into the target layer.
US09514978B2	Method of forming semiconductor device having a conductive via structure A method for fabricating a semiconductor device includes forming a first photo-sensitive layer over a contact pad, wherein the contact pad is on a substrate. The method further includes patterning the first photo-sensitive layer to form a first opening over a portion of the contact pad. The method further includes plating a conductive via in the first opening; and removing the first photo-sensitive layer. The method further includes forming a passivation layer over the substrate, contact pad, and conductive via, and exposing the conductive via by grinding the passivation layer. The method further includes forming a second photo-sensitive layer over the conductive via and passivation layer. The method further includes patterning the second photo-sensitive layer to form a second opening larger than and completely exposing the conductive via. The method further includes plating a conductive pillar in the second opening; and removing the second photo-sensitive layer.
US09514976B2	Trench isolation implantation Embodiments of the disclosure include a shallow trench isolation structure having a dielectric material with energetic species implanted to a predetermined depth of the dielectric material. Embodiments further include methods of fabricating the trench structures with the implant of energetic species to the predetermined depth. In various embodiments the implant of energetic species is used to densify the dielectric material to provide a uniform wet etch rate across the surface of the dielectric material. Embodiments also include memory devices, integrated circuits, and electronic systems that include shallow trench isolation structures having the dielectric material with the high flux of energetic species implanted to the predetermined depth of the dielectric material.
US09514975B2	Semiconductor with through-substrate interconnect Semiconductor devices are described that have a metal interconnect extending vertically through a portion of the device to the back side of a semiconductor substrate. A top region of the metal interconnect is located vertically below a horizontal plane containing a metal routing layer. Method of fabricating the semiconductor device can include etching a via into a semiconductor substrate, filling the via with a metal material, forming a metal routing layer subsequent to filling the via, and removing a portion of a bottom of the semiconductor substrate to expose a bottom region of the metal filled via.
US09514974B2	Process apparatus with on-the-fly substrate centering A substrate processing apparatus including a frame defining a chamber with a substrate transport opening and a substrate transfer plane defined therein, a valve mounted to the frame and being configured to seal an atmosphere of the chamber when closed, the valve having a door movably disposed to open and close the substrate transport opening, and at least one substrate sensor element disposed on a side of the door and oriented to sense substrates located on the substrate transfer plane.
US09514970B2	Methods of attaching a module on wafer substrate Aspects of the present disclosure describe an attachment device for mounting a module to a substrate comprises a module leg with two ends and a module foot. One end of the module leg is configured to be attached to a bottom surface of the module and the other end of the module leg is configured to be attached to the module foot. At least a portion of the module foot is configured to be attached to the substrate. Also a portion of a surface area of the module foot is configured to be exposed outside of an area covered by the module. It is emphasized that this abstract is provided to comply with the rules requiring an abstract that will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims.
US09514969B2	Apparatus for reducing the effect of contamination on a rapid thermal process Embodiments of the present disclosure provide a cover assembly that includes a cover disposed between a device side surface of a substrate and a reflector plate, which are disposed within a thermal processing chamber. The presence of the cover between the device side surface of a substrate and a reflector plate has many advantages over conventional thermal processing chamber designs, which include an improved temperature uniformity during processing, a reduced chamber down time and an improved cost-of-ownership of the processes performed in the thermal processing chamber. In some configurations, the cover includes two or more ports that are formed therein and are positioned to deliver a gas, from a space formed between the reflector plate and the cover, to desired regions of the substrate during processing to reduce the temperature variation across the substrate.
US09514968B2	Methods and apparatus for selective oxidation of a substrate Methods and apparatus for improving selective oxidation against metals in a process chamber are provided herein. In some embodiments, a method of oxidizing a first surface of a substrate disposed in a process chamber having a processing volume defined by one or more chamber walls may include exposing the substrate to an oxidizing gas to oxidize the first surface; and actively heating at least one of the one or more chamber walls to increase a temperature of the one or more chamber walls to a first temperature of at least the dew point of water while exposing the substrate to the oxidizing gas.
US09514964B2	Stack frame for electrical connections and the method to fabricate thereof A method for forming a conductive structure is disclosed, the method comprising the steps of: forming a metallic frame having a plurality of metal parts separated from each other; forming an insulating layer on the top surface of the plurality of metal parts; and forming a conductive pattern layer on the insulating layer for making electrical connections with at least one portion of the plurality of metal parts.
US09514960B2	Method for dissolving a silicon dioxide layer This disclosure relates to a method for dissolving a silicon dioxide layer in a structure, including, from the back surface thereof to the front surface thereof, a supporting substrate, the silicon dioxide layer and a semiconductor layer, the dissolution method being implemented in a furnace in which structures are supported on a support, the dissolution method resulting in the diffusion of oxygen atoms included in the silicon dioxide layer through the semiconductor layer and generating volatile products, and the furnace including traps suitable for reacting with the volatile products, so as to reduce the concentration gradient of the volatile products parallel to the front surface of at least one structure.
US09514955B2	Patterning of a hard mask material A method for processing a substrate includes providing the substrate including a photoresist/bottom anti-reflection coating (PR/BARC) layer, a hard mask layer, a stop layer, a carbon layer and a stack including a plurality of layers. The method includes defining a hole pattern including a plurality of holes in the PR/BARC layer using photolithography; transferring the hole pattern into the carbon layer; filling the plurality of holes in the hole pattern with oxide to create oxide pillars; using a planarization technique to remove the hard mask layer, a remaining portion of the PR/BARC layer and the stop layer; stripping the carbon layer to expose the oxide pillars; filling space between the oxide pillars with hard a mask material including metal; planarizing at least part of the hard mask material; and stripping the oxide pillars to expose the hole pattern in the hard mask material.
US09514949B2	Composition for forming organic hard mask layer for use in lithography containing polymer having acrylamide structure Whereas, conventionally, ashing had been used at the time of removal, the present invention provides a material for forming an organic hard mask that can be removed by an alkaline aqueous solution, and thus can be expected to reduce damage to the substrate at the time of the removal. A composition for forming an organic hard mask layer comprising: a polymer (A) including a structural unit of Formula (1) and a structural unit of Formula (2); a crosslinkable compound (B) including at least two of blocked isocyanate groups, methylol groups, or C1-5 alkoxymethyl groups; and a solvent (C), wherein an organic hard mask layer obtained from the composition for forming an organic hard mask layer is used at the lowest layer in a lithography process using a multi-layer film, wherein R1 to R4 have the same definition as ones in the specification.
US09514948B2	Stratified gate dielectric stack for gate dielectric leakage reduction A stratified gate dielectric stack includes a first high dielectric constant (high-k) gate dielectric comprising a first high-k dielectric material, a band-gap-disrupting dielectric comprising a dielectric material having a different band gap than the first high-k dielectric material, and a second high-k gate dielectric comprising a second high-k dielectric material. The band-gap-disrupting dielectric includes at least one contiguous atomic layer of the dielectric material. Thus, the stratified gate dielectric stack includes a first atomic interface between the first high-k gate dielectric and the band-gap-disrupting dielectric, and a second atomic interface between the second high-k gate dielectric and the band-gap-disrupting dielectric that is spaced from the first atomic interface by at least one continuous atomic layer of the dielectric material of the band-gap-disrupting dielectric. The insertion of the band-gap disrupting dielectric results in lower gate leakage without resulting in any substantial changes in the threshold voltage characteristics and effective oxide thickness.
US09514946B2	Semiconductor memory incorporating insulating layers of progressively decreasing band gaps and method of manufacturing the same An improvement is achieved in the performance of a semiconductor device including a memory element. Over a semiconductor substrate, a gate electrode for the memory element is formed via an insulating film as a gate insulating film for the memory element. The insulating film includes first, second, third, fourth, and fifth insulating films in order of being apart from the substrate. The second insulating film has a charge storing function. The band gap of each of the first and third insulating films is larger than a band gap of the second insulating film. The band gap of the fourth insulating film is smaller than the band gap of the third insulating film. The band gap of the fifth insulating film is smaller than the band gap of the fourth insulating film.
US09514939B2	Dual coating and lift-off method for protecting patterned dielectric-metal coatings A dual coating and lift-off method for protecting patterned dielectric-metal coatings using a 2-layer lithography process that is exposed and developed to create an undercut and then, after the wafer is coated with a metal/dielectric filter ending with an incomplete final layer, the top lithography layer is lifted off exposing metal layer edges and leaving the bottom lithography layer intact on the wafer such that the final filter layer(s) can be deposited to complete the coating and passivate the exposed metal layer edges is disclosed.
US09514937B2	Tapered nanowire structure with reduced off current Non-planar semiconductor devices including at least one semiconductor nanowire having a tapered profile which widens from the source side of the device towards the drain side of the device are provided which have reduced gate to drain coupling and therefore reduced gate induced drain tunneling currents.
US09514930B2	Method for manufacturing semiconductor HEMT device with stoichiometric silicon nitride layer A semiconductor device includes: a compound semiconductor stack structure including a plurality of compound semiconductor layers stacked over a semiconductor substrate; and a first insulating film covering the surface of the compound semiconductor stack structure, the first insulating film being a silicon nitride film including, on the top side, a first region containing nitrogen element in excess of the stoichiometric ratio.
US09514923B2	Apparatus and method for thermal assisted desorption ionization systems The present invention is directed to a method and device to desorb an analyte using heat to allow desorption of the analyte molecules, where the desorbed analyte molecules are ionized with ambient temperature ionizing species. In various embodiments of the invention a current is passed through a mesh upon which the analyte molecules are present. The current heats the mesh and results in desorption of the analyte molecules which then interact with gas phase metastable neutral molecules or atoms to form analyte ions characteristic of the analyte molecules.
US09514921B2	Intensity correction for TOF data acquisition Systems and methods are provided for correcting uniform detector saturation. In one method, a mass analyzer analyzes N extractions of an ion beam. A nonzero amplitude from an ADC detector subsystem is counted as one ion, producing a count of one for each ion of each sub-spectrum. The ADC amplitudes and counts of the N sub-spectra are summed, producing a spectrum that includes a summed ADC amplitude and a total count for each ion of the spectrum. A probability that the total count arises from single ions hitting the detector is calculated. For each ion of the spectrum where the probability exceeds a threshold value, an amplitude response is calculated, producing amplitude responses for ions found to be single ions hitting the detector. Amplitude responses are combined, producing a combined amplitude response. The total count is dynamically corrected using the combined amplitude response and the summed ADC amplitude.
US09514920B2	Electron multiplier body, photomultiplier tube, and photomultiplier An electron multiplier body including a main body portion, an electron incidence portion, and a channel, in which the channel includes a first inner surface and a second inner surface facing each other, the first inner surface includes a convex first bent portion and a concave second bent portion, and a plurality of first inclined surfaces, the second inner surface includes a convex third bent portion and a concave fourth bent portion, and a plurality of second inclined surfaces, and an interval between a tip of the first bent portion and a tip of the third bent portion, a distance between the first inclined surface and the second inclined surfaces facing each other, an angle between a pair of first inclined surfaces defining the first bent portion, and a length of the channel satisfy predetermined expressions.
US09514918B2	Guard aperture to control ion angular distribution in plasma processing A guard aperture is described to control the ion angular distribution in plasma processing in one example a workpiece processing system has a plasma chamber, a plasma source to generate a plasma containing gas ions in the plasma chamber, the plasma forming a sheath above the workpiece, the sheath having an electric field, a workpiece holder in the chamber to apply a bias voltage to the workpiece to attract ions across the plasma sheath to be incident on the workpiece, a control aperture between the sheath and the workpiece, the aperture being positioned to modify an angular distribution of the ions that are incident on the workpiece, and a guard aperture between the sheath and the control aperture to isolate an electrical field of the control aperture from the plasma sheath.
US09514916B2	Wafer platen thermosyphon cooling system Disclosed is a thermosyphon system for cooling a platen in an ion implantation system. The thermosyphon system may include a vacuum chamber housing at least one wafer platen and a phase separator tank operative to contain both a liquid and gas phases of an element. A re-condensing cold head is exposed within the phase separator tank and is operative to condense the element from its gas phase to its liquid phase. This creates a convection driven closed loop pipe configuration. The closed loop pipe configuration includes a liquid phase pipe to carry the lower temperature liquid phase from the phase separator tank to the platen in the vacuum chamber. A reaction with the warmer platen converts the liquid phase to the gas phase. A gas phase pipe carries the higher temperature gas phase from the platen in the vacuum chamber back to the phase separator tank.
US09514914B2	Shot data generation method and multi charged particle beam writing method A shot data generation method includes inputting writing data for writing a pattern on a target object with multi charged particle beams, and generating shot data for each beam of the multi charged particle beams by converting the writing data and using one of a first code indicating a first irradiation time period having been set beforehand, a second code indicating an irradiation time period being zero, and a third code indicating neither the first irradiation time period nor the irradiation time period being zero.
US09514913B2	TEM sample mounting geometry A system and method for transmission electron microscopy is provided. The sample can be examined from multiple directions using an electron beam in a transmission electron microscope. The sample has at least three observation faces that are not parallel to each other with the thickness of the sample orthogonal to each of the observation faces being less than 200 nm. The sample is mounted on a needle that is needle rotatable about more than one axis so the needle can orient at least three of the observation faces to be normal to the electron beam of the electron microscope for observation.
US09514911B2	X-ray tube aperture body with shielded vacuum wall X-ray tube aperture body with shielded vacuum wall. In one example embodiment, an aperture body for use in an x-ray tube having an anode and a cathode includes an electron shield and a vacuum wall. The electron shield is configured to intercept backscattered electrons from the anode. The vacuum wall is separated by a gap from the electron shield and is shielded from the backscattered electrons by the electron shield. The aperture body also includes an electron shield aperture defined in the electron shield and a vacuum wall aperture defined in the vacuum wall through which electrons may pass between the cathode and the anode.
US09514910B2	Radiation tube, radiation generating apparatus, and radiation imaging system In a radiation tube, a conductive member having an opening formed therein is disposed, and a dielectric is disposed in the conductive member. Thus, foreign matter that has entered the conductive member through the opening is trapped by the dielectric. As a result, discharge due to foreign matter can be reduced.
US09514909B2	Ion generation apparatus and electric equipment using the same In this ion generation apparatus, tip end portions of needle electrodes are aligned in an X direction with being oriented in a Z direction, and protrude from a casing. A protective cover covers the tip end portions of the needle electrodes. The protective cover is provided with holes opened to allow tip ends of the needle electrodes to be seen from the Z direction, and an opening opened to allow the needle electrodes to be seen from a Y direction. Therefore, ions generated at the tip end portions of the needle electrodes can be emitted efficiently out of the casing. Further, a user can be prevented from touching the tip end portion of the needle electrode and injuring his or her finger or the like.
US09514902B2	Controller-less quick tactile feedback keyboard In some examples, techniques are provided for quick haptic feedback, without the use of a controller, which is local to individual, non-actuating keys, such as keys of a thin keyboard or keypad. The haptic feedback may be in the form of a simulated “key-click” feedback for an individual key that is pressed by a user such that the finger used to press the key feels the tactile sensation. The haptic feedback mimics the tactile sensation of a mechanical key (e.g., buckling spring, pop-dome key switch) to give a user the perception that they have actuated a mechanically movable key.
US09514901B2	Push switch using a heart shaped cam A heart cam mechanism of a switch includes a cam groove, which includes a heart cam and surrounding cams, and a lock pin. The heart cam has a concave part, a first vertex opposite the concave part, and second and third vertices on a concave-part side. While the switch is in a locked state, an upper end part of the lock pin is engaged with the concave part of the heart cam, and is positioned at a locking position. While the switch is pressed, the upper end part slides while pushing against a bottom surface of the cam groove located outside the heart cam, and moves along a heart-shaped path, which is depressed at the locking position. This configuration prevents an end part of the lock pin from moving in a reverse direction even when a step-like part of the bottom surface of the cam groove is worn out.
US09514900B2	Input button assembly An electronic device is provided including: a housing having a button hole formed therein: a button disposed in the button hole; a switch having a touch part; and a pressing element interposed between the button and the switch, the pressing element including a first end part contacting a first wall of the housing, a second end part contacting the button, and a pressing projection disposed adjacently to the switch; wherein when the button is actuated, the pressing element pivots upon the second end part in a first direction, while the pressing projection actuates the switch.
US09514899B2	Control switch with integrated RFID tag A control system for controlling operation of a field device includes a switch having a switch contact movable between an off position and an activated position, a radio frequency identification (RFID) tag integrated with the switch and in selective communication with the switch based on the position thereof, an RFID reader configured to receive switch messages from the RFID tag that indicate an operational state of the switch, and a control circuit configured to receive switch messages from the RFID reader, the control circuit receiving the switch messages for purposes of controlling the field device.
US09514896B2	Electromagnetic contactor The electromagnetic contactor has a pair of fixed contacts disposed to maintain a predetermined interval and a movable contact disposed so as to be attachable to and detachable from the pair of fixed contacts, and an electromagnet unit that drives the movable contact. The electromagnet unit has a magnetic yoke enclosing a plunger drive portion, a movable plunger having a leading end protruding through an aperture formed in the magnetic yoke and biased by a return spring, an annular permanent magnet fixedly disposed so as to enclose a peripheral flange portion formed on a protruding end side of the movable plunger and magnetized in a direction in which the movable plunger can move, and an auxiliary yoke disposed on the annular permanent magnet at a side opposite to that of the magnetic yoke and regulating a movement of the peripheral flange portion of the movable plunger.
US09514893B2	Electrical storage device and method for manufacturing the same An electrical storage unit that includes a positive electrode, which includes a positive-electrode collector electrode and a positive-electrode active material layer on the positive-electrode collector electrode, a negative electrode, which includes a negative-electrode collector electrode and a negative-electrode active material layer on the negative-electrode collector electrode, the negative-electrode active material layer facing the positive-electrode active material layer, and a first insulating layer bonded to the positive electrode and the negative electrode and separating the positive electrode from the negative electrode. The first insulating layer is bonded to part of a surface of the positive electrode and part of a surface of the negative electrode and includes a communication path for connecting the outside of the electrical storage unit to the inside of the electrical storage unit.
US09514889B2	Addition of polymers to thiophene monomers in the in situ polymerization Described is a process for the production of a capacitor, where an electrode body (1) of an electrode material (2) is provided, wherein a dielectric (3) covers one surface (4) of this electrode material (2) at least partly to form an anode body (5), where the in situ polymerization of at least one thiophene monomer in at least a part of the anode body (5) in the presence of at least one oxidizing agent and at least one polymer with the structural formula (I). R1O—R2nO—R1 (I)
US09514888B2	Process for the production of electrolyte capacitors of high nominal voltage The invention relates to a process for the production of electrolyte capacitors having a low equivalent series resistance and low residual current for high nominal voltages, electrolyte capacitors produced by this process and the use of such electrolyte capacitors.
US09514876B2	Inductor device, method for manufacturing the same and printed wiring board A printed wiring board includes an insulation layer having a first penetrating hole penetrating through the insulation layer, a magnetic core structure including a magnetic material filled in the first penetrating hole through the insulation layer such that the magnetic core structure including a first magnetic body layer formed in the first penetrating hole is formed through the insulation layer, and a conductor layer formed on the insulation layer and having an inductor pattern such that the inductor pattern is surrounding a circumference of the magnetic core structure. The magnetic core structure and the inductor pattern of the conductor layer form an inductor device.
US09514874B2	Transformer chamber for a wind turbine A transformer chamber for a wind turbine is described. The transformer chamber includes a liquid-tight tank for receiving a liquid-filled, in particular oil-filled, transformer, a wind turbine structure component includes a component bedframe adapted for receiving such a transformer chamber and a wind turbine includes such a transformer chamber and such a wind turbine structure component. Furthermore, a method for assembling a wind turbine is described.
US09514872B2	Electromagnetic actuator and method of use An electromagnetic actuator includes a plunger, an armature, and a coil. The plunger is moveable between a first position and a second position. The armature includes a first armature portion proximally disposed about the first position, and a second armature portion proximally disposed about the second position. The coil is proximally disposed with the first armature portion and, when energized, is configured to generate a magnetic field. The magnetic field causes the plunger to move toward the first position by a magnetic flux through a magnetic circuit. The magnetic circuit includes the first armature portion, the plunger, a main air gap, and a variable air gap. The main air gap and variable air gap are between the first armature portion and the plunger. The main air gap diminishes as the plunger moves toward the first position. The variable air gap enlarges as the plunger moves toward the first position.
US09514870B2	Rare earth magnet and method for producing the same A rare earth magnet production method of the present invention includes a placing step of placing a magnet material including a compact or a sintered body of powder particles having a rare earth magnet alloy, and a diffusing material containing a diffusing element to improve coercivity, in a vicinity of each other; and a diffusing step of diffusing the diffusing element into an inside of the magnet material by exposing the magnet material heated to vapor of the diffusing element evaporated from the diffusing material heated; and wherein the diffusing step is a step of heating the diffusing material independently of the magnet material to diffusing material temperature which is different from heating temperature of the magnet material called magnet material temperature.
US09514857B2	Zinc oxide precursor and method of depositing zinc oxide-based thin film using the same A zinc oxide (ZnO) precursor and a method of depositing a ZnO-based thin film using the same, with which a high-quality and high-purity ZnO-based thin film can be deposited. The ZnO precursor includes a mixture solvent containing at least two organic solvents which are mixed and a source material comprising diethyl zinc or dimethyl zinc which is diluted in the mixture solvent.
US09514855B2	Proton conductor An exemplary proton conductor according to the present disclosure has a perovskite-type crystal structure expressed by the compositional formula AaB1-xB′xO3-δ, where A is at least one selected from among group 2 elements; B is a group 4 element or Ce; B′ is a group 3 element, a group 13 element, or a lanthanoid element; 0.5
US09514854B2	X-ray radiation passage window for a radiation detector An X-ray radiation passage window can be used for a radiation detector. The X-ray radiation passage window for a radiation detector includes a radiation-transmissive window element. The radiation-transmissive window element contains graphene. Furthermore, a radiation detector including an X-ray radiation passage window, a method for producing an X-ray radiation passage window and a use of graphene are disclosed.
US09514852B2	Method to reduce the volume of boiling water reactor fuel channels for storage A method of reducing the volume of a boiling water reactor fuel channel for storage in which the fuel channel is sealed with an outer sleeve that is closed at its upper and lower ends. The sleeve, which is made of a malleable metal is then laterally compacted and sheared into segments suitable for transport and/or storage.
US09514851B2	Rib-type roughness design for improved heat transfer in PWR rod bundles The invention pertains to a nuclear fuel rod for a nuclear reactor. The fuel rod has a cladding. The cladding's external surface has a surface texture that includes a rib. The rib coils around the circumference of the cladding. The rib length forms a sequence of continuous rib loops uniformly spaced along an axial length of the cladding. The ratio of rib height to cladding diameter is greater than or equal to 0.0134 and less than or equal to 0.0268. The ratio of rib height to rib width is greater than or equal to 0.8 and less than or equal to 1.2. A pitch measured between adjacent rib loops is greater than or equal to 9× rib height and less than or equal to 12× rib height. The rib enhances fuel rod heat transfer in a region downstream of grid mixing vanes, where turbulence is dissipated.
US09514849B2	Semiconductor memory device including controller and fuse circuits for performing repair operation A semiconductor memory device includes a first fuse set block including a fuse array for storing first repair information, and a control block configured to store second repair information in a first mode, and generate an output control signal when input addresses applied from an external source and the second repair information are the same, in a second mode, wherein the first fuse set block enables a first match signal for accessing a first redundancy memory cell when the stored first repair information and the input addresses are the same, and disables the first match signal in response to the output control signal.
US09514845B1	Check after write for assessing wear related degradation in solid state storage A group of one or more solid state storage cells is programmed. A predetermined amount of time after the group of solid state storage cells is programmed, the group of solid state storage cells is read to obtain read data. Error correction decoding is performed on the read data and the group of solid state storage cells is assessed for wear related degradation based at least in part on the error correction decoding.
US09514843B2	Methods for accessing a storage unit of a flash memory and apparatuses using the same An embodiment of a method for accessing a storage unit of a flash memory, performed by a control unit, is disclosed to include at least the following steps. A transaction is appended to a bad-column table each time a bad column of a block within the storage unit is inspected. It is determined whether a total number of the transactions within the bad-column table is odd when the control unit determines that the last column of the block is a regular column. A transaction is appended to the bad-column table to indicate that the last column of the block is a bad column when the control unit determines that the total number of the transactions within the bad-column table is odd.
US09514837B2	Selective online burn-in with adaptive and delayed verification methods for memory A memory is released for use without pre-verification of its memory blocks as being defect free. Some memory blocks are subjected to a verification process when the computer memory is in use in order to verify a minimum number of memory blocks required for high performance program operation as being defect free. The verification process continues as the computer memory is in use in order to maintain the minimum number of memory blocks required for high performance operation in the verified defect free state. A verification mode of either no verification, delayed verification, or immediate verification is applied to memory blocks used for regular performance program operation. Delayed verification is maintained until an ability to recover the stored data is going to be lost. Immediate verification can be performed using bit error rate analysis. Some verification processes are performed using aggressive programming trim and/or multiple word line sensing for faster programming.
US09514836B2	Nonvolatile semiconductor memory and verify read operation A memory includes first and second select gate transistors, memory cells, a source line, a bit line, a selected word line which is connected to a selected memory cell as a target of a verify reading, a non-selected word line which is connected to a non-selected memory cell except the selected memory cell, a potential generating circuit for generating a selected read potential which is supplied to the selected word line, and generating a non-selected read potential larger than the selected read potential, which is supplied to the non-selected word line, and a control circuit which classifies a threshold voltage of the selected memory cell to one of three groups by verifying which area among three area which are isolated by two values does a cell current of the selected memory cell belong, when the selected read potential is a first value.
US09514834B2	Retention logic for non-volatile memory An integrated circuit memory device includes an array of non-volatile, charge trapping memory cells, configured to store data values in memory cells in the array using threshold states, including a higher threshold state. Retention check logic executes to identify memory cells in the higher threshold state which fail a threshold retention check. Also, logic is provided to reprogram the identified memory cells.
US09514833B2	Supply power dependent controllable write throughput for memory applications Techniques that allow dynamic management of throughput in a memory device based on a power supply voltage are provided. In an example embodiment, a method of operating a memory device comprises monitoring on the power supply level applied to the device and determining a corresponding number of bitlines that the device can activate at the same time, generating a control signal based on the number of bitlines, and using the control signal to activate a portion of the memory device corresponding to the determined number of bitlines.
US09514830B2	Non-volatile memory device, memory system including the same, and method of operating the same A method of operating a non-volatile memory device includes setting a search region defined by a start read voltage and an end read voltage, determining whether the search region belongs to a reference region, changing the search region when it is determined that the search region does not belong to the reference region, and searching for a new read voltage based on the search region, when it is determined that the search region belongs to the reference region.
US09514829B2	Access line management in a memory device Memory devices and methods are disclosed, such as devices configured to store a number of access line biasing patterns to be applied during a memory device operation performed on a particular row of memory cells in the memory device. Memory devices are further configured to support modification of the stored bias patterns, providing flexibility in biasing access lines through changes to the bias patterns stored in the memory device. Methods and devices further facilitate performing memory device operations under multiple biasing conditions to evaluate and characterize the memory device by adjustment of the stored bias patterns without requiring an associated hardware change to the memory device.
US09514826B2	Programming method for NAND-type flash memory The invention provides a programming method for a NAND-type flash memory capable of reducing the drop in reliability due to data-rewriting. The programming method includes: when a block program mode is executed to perform programming for a plurality of pages in a block, while the data to be programmed is being loaded into a cache memory; and erasing the selected block; and programming the data to be programmed which is loaded into the cache memory to the erased block.
US09514825B2	Semiconductor storage device and controller A semiconductor storage device includes memory cells, select transistors, memory strings, a block, word lines, and select gate lines. In the memory string, the current paths of plural memory cells are connected in series. When data are written in the block, after a word line connected to the control gates of memory cells of different memory strings in the second block is selected, the data are sequentially written in the memory cells of the different memory strings in the block which have their control gates connected to the selected word line.
US09514822B2	Flash memory device A flash memory device is disclosed. The flash memory device includes: a cell array region; an X-decoder region arranged adjacent to the cell array region in a first direction; a discharge transistor region disposed between the cell array region and the X-decoder region; a first metal line formed to pass through the X-decoder region, the discharge transistor region, and the cell array region, and arranged to extend in the first direction; and a second metal line including a first line patterns arranged parallel to the first metal line between the first metal lines, and a second line pattern interconnecting both ends of the first line patterns and extending in a second direction crossing the first direction.
US09514821B2	Discharge circuit A discharge circuit includes a first circuit connected between a high-voltage terminal and a connection node, wherein first circuit includes a depletion high voltage NMOS transistor of which a drain connected to the high-voltage terminal, a source connected to the connection node, and a gate receiving a reference voltage, and a second circuit connected between a power supply voltage terminal and the connection node and suitable for discharging the connection node through the power supply voltage terminal when a power-off of a power supply voltage occurs. The discharge circuit may stably perform a discharge operation in the case of sudden power-off.
US09514818B1	Memristor using parallel asymmetrical transistors having shared floating gate and diode A two-terminal, single-poly floating gate memristor includes parallel-connected, asymmetrical readout and injection transistors having a shared floating gate structure, and a diode connected to drain terminals of the asymmetrical transistors. The injection transistor is configured with relatively high source/drain-to-gate capacitances to facilitate EEPROM-type (floating gate) program/erase operations (e.g., hot carrier injection and band-to-band tunneling of holes), and the readout transistor is configured (e.g., using a threshold voltage implant) to facilitate low-voltage readout operations. The diode is configured to function both as a limiting resistor that prevents over-erase during high-voltage erase operations, and also to prevent sneak (leakage) currents during low-voltage readout operations. The diode is implemented using either p-n junction or Schottky diode configurations formed on bulk silicon, or a lateral diode configurations disclosed for SOI substrates. A memory circuit including multiple two-terminal memristors disposed in a cross-point array is disclosed, which can be utilized, e.g., in a neuromorphic circuit.
US09514816B1	Non-volatile static RAM and method of operation thereof A memory device and array which includes a static random access memory (SRAM) circuit coupled to a non-volatile circuit, such as a ferroelectric-RAM (F-RAM) circuit, in which the F-RAM circuit stores a bit of data from the SRAM circuit during power-out periods, the F-RAM circuit is further coupled to bit-line(s) to output the bit of data stored in the F-RAM circuit when operation power is restored.
US09514815B1	Verify scheme for ReRAM Circuitry coupled to a programmable element comprising metal oxide is configured to execute a program-verify operation including: an initial cycle of a program operation and a verify operation, and subsequent cycles. The initial cycle includes an initial instance of the program operation to establish a cell resistance of the programmable element, and an initial instance of the verify operation to determine whether the cell resistance of the memory cell is within the target resistance range. At least one of the subsequent cycles includes an additional pulse having a second polarity to the programmable element, and a subsequent instance of the verify operation. The first polarity of the initial program pulse and the second polarity of the additional pulse have opposite polarities. A subsequent instance of the program operation includes applying a subsequent program pulse having the first polarity to the programmable element.
US09514814B1	Memory write driver, method and system Disclosed are methods, systems and devices for operation of non-volatile memory devices. In one aspect, a non-volatile memory device may be placed in any one of multiple memory states in a write operation by controlling a current and a voltage applied to terminals of the non-volatile memory device. For example, a write operation may apply a programming signal across terminals of non-volatile memory device having a particular current and a particular voltage for placing the non-volatile memory device in a particular memory state.
US09514812B2	Apparatus and method for reading a storage device with a ring oscillator and a time-to-digital circuit According to an example, a method for storage device reading may include receiving an input signal indicative of a period of oscillation of a ring oscillator coupled to a storage device of a plurality of storage devices, and measuring the period of oscillation of the ring oscillator by a time-to-digital circuit. The method for storage device reading may further include determining a value of data stored in the storage device based on the measurement.
US09514809B2	Memory array plane select Memory arrays and methods of forming the same are provided. An example memory array can include at least one plane having a plurality of memory cells arranged in a matrix and a plurality of plane selection devices. Groups of the plurality of memory cells are communicatively coupled to a respective one of a plurality of plane selection devices. A decode logic having elements is formed in a substrate material and communicatively coupled to the plurality of plane selection devices. The plurality of memory cells and the plurality of plane selection devices are not formed in the substrate material.
US09514805B1	Intelligent bit line precharge for improved dynamic power A method and apparatus for writing data to a memory device are provided that do not change the precharge states for a bit line pair in a current write cycle if the current data bit is unchanged from the preceding write cycle.
US09514799B2	Memory scheduling method and memory controller In a memory scheduling method, a memory controller writes a first group of first row strobe commands (ACTs) into a first memory. The first group of first ACTs includes multiple first ACTs and a periodic interval exists between two adjacent first ACTs written by the memory controller into the first memory. The memory controller writes operation commands that correspond to the first group of first ACTs into the first memory after writing the first group of first ACTs into the first memory. The memory controller writes second ACTs into a second memory in periodic intervals for writing the first group of first ACTs into the first memory and/or in periodic intervals for writing the operation commands that correspond to the first group of first ACTs. The memory controller writes operation commands that correspond to the second ACTs into the second memory.
US09514795B1	Reverse complement magnetic tunnel junction (MTJ) bit cells employing shared source lines, and related methods Reverse complement MTJ bit cells employing shared source lines are disclosed. In one aspect, a 2T2MTJ reverse complement bit cell employing shared source line is provided. Bit cell includes first MTJ and second MTJ. Value of first MTJ is complement of value of second MTJ. First bit line is coupled to top layer of first MTJ, and first electrode of first access transistor is coupled to bottom layer of first MTJ. Second bit line is coupled to bottom layer of second MTJ, and first electrode of second access transistor is coupled to top layer of second MTJ. Word line is coupled to second electrode of first access transistor and second access transistor. Shared source line is coupled to third electrode of first access transistor and second access transistor. Employing shared source line allows the bit cell to be designed with reduced parasitic resistance.
US09514788B1	Differential amplifier circuit, voltage regulator, and semiconductor memory device including the same The present invention relates to a differential amplifier circuit. A differential amplifier circuit has an advantage in that it can improve a voltage drop characteristic attributable to a load current by enhancing response speed. Furthermore, the differential amplifier circuit can improve a bandwidth characteristic by reducing the quiescent current of a class AB amplifier and also improve a slew rate characteristic by adaptively changing a tail current because a signal path is diversified. Accordingly, response speed can be enhanced by an improved bandwidth characteristic, and the current driving ability can be also enhanced by an improved slew rate characteristic.
US09514782B2	Method and system for activation of an optical article A method for activating an optical article includes providing an optical article, wherein at least one mark is disposed on the optical article, wherein the mark comprises an optical-state change material in an initial state, the initial state preventing the optical article from being read by a player; deriving an unlock code by cryptographic operations on an optical article operatively coupled with a POS equipment and a data input from a medium encrypted with a cryptographic algorithm; deriving a toggling signal from an unlock code, and applying the toggling signal to the at least one mark resulting in changing the optical-state change material to a final state, the final state allowing the optical article to be read by the player; wherein the toggling signal comprises a set of values corresponding to the respective states of each of a plurality of marks on the surface of the optical article, and wherein applying the toggling signal results in setting each of the marks to either one of an initial state or a final state, corresponding to the value for the mark in the toggling signal.
US09514779B2	Method for manufacturing multilayer structure sheet, and optical information recording medium A method for manufacturing a multilayer structure sheet for manufacturing an optical information recording medium having a multilayer structure with a plurality of recording layers comprises: an adhesive layer forming step of forming an adhesive layer on a first release sheet to obtain a first sheet; a recording layer forming step of forming a recording layer containing a polymer on a second release sheet or a release assisting layer formed on the second release sheet to obtain a second sheet; a laminating step of laminating the recording layer of the second sheet on the adhesive layer of the first sheet to obtain a third sheet in which the second sheet is laid on the first sheet; and a heating step of heating the second sheet.
US09514771B2	Magneto-resistive effect element with recessed antiferromagnetic layer A magneto-resistive effect element has a first shield layer, a second layer, and a multilayer film that is positioned between the first shield layer and the second shield layer. The multilayer film has a free layer, a first pinned layer, a nonmagnetic spacer layer, a second pinned layer that fixes a magnetization direction of the first pinned layer, and an antiferromagnetic layer that is exchange-coupled with the second pinned layer. The antiferromagnetic layer is positioned away from an air bearing surface (ABS). The second pinned layer has a first part that is positioned away from the ABS, and a second part that makes contact with the first part, and that extends to the ABS parallel to the first pinned layer; and the first part has a first layer that makes contact with the antiferromagnetic layer, a second layer that makes contact with the second part, and a layer that is positioned between the first layer and the second layer, and that exchange-couples the first layer and the second layer in an anti-parallel orientation.
US09514770B2	Methods of using products with tape formats having one or more spare areas A tape drive-implemented method according to one embodiment includes determining, by a tape drive, a format of a magnetic recording tape, and reading from and/or writing to the magnetic recording tape, by the tape drive, according to the format. The format specifies a number of active channels and a contiguous spare area on the magnetic recording tape. The format also specifies compatibility with a second format. The second format specifies a different number of active channels than the number of active channels specified by the format.
US09514768B2	Audio reproducing method, audio reproducing apparatus therefor, and information storage medium An audio reproducing method for quickly and correctly extracting extra data, including: receiving a data stream including the extra data including an end marker disposed immediately before main data and data length information, which is length information of the extra data, disposed immediately before the end marker; checking the presence/absence of the end marker; and if the end marker exists, extracting the extra data by using the data length information.
US09514759B2	Method and apparatus for performing an adaptive down- and up-mixing of a multi-channel audio signal A method and apparatus for performing an adaptive down-mixing of a multichannel audio signal comprising a number of input channels, wherein a signal adaptive transformation of said input channels is performed by multiplying the input channels with a downmix block matrix comprising a fixed block for providing a set of backward compatible primary channels and a signal adaptive block for providing a set of secondary channels.
US09514756B2	Frame error concealment A frame error concealment method based on frames including transform coefficient vectors including the following steps: It tracks (S11) sign changes between corresponding transform coefficients of predetermined sub-vectors of consecutive good stationary frames. It accumulates (S12) the number of sign changes in corresponding sub-vectors of a predetermined number of consecutive good stationary frames. It reconstructs (S13) an erroneous frame with the latest good stationary frame, but with reversed signs of transform coefficients in sub-vectors having an accumulated number of sign changes that exceeds a predetermined threshold.
US09514754B2	Command and control of devices and applications by voice using a communication base system A first communication path for receiving a communication is established. The communication includes speech, which is processed. A speech pattern is identified as including a voice-command. A portion of the speech pattern is determined as including the voice-command. That portion of the speech pattern is separated from the speech pattern and compared with a second speech pattern. If the two speech patterns match or resemble each other, the portion of the speech pattern is accepted as the voice-command. An operation corresponding to the voice-command is determined and performed. The operation may perform an operation on a remote device, forward the voice-command to a remote device, or notify a user. The operation may create a second communication path that may allow a headset to join in a communication between another headset and a communication device, several headsets to communicate with each other, or a headset to communicate with several communication devices.
US09514752B2	Hotword detection on multiple devices Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for hotword detection on multiple devices are disclosed. In one aspect, a method includes the actions of receiving, by a first computing device, audio data that corresponds to an utterance. The actions further include determining a first value corresponding to a likelihood that the utterance includes a hotword. The actions further include receiving a second value corresponding to a likelihood that the utterance includes the hotword, the second value being determined by a second computing device. The actions further include comparing the first value and the second value. The actions further include based on comparing the first value to the second value, initiating speech recognition processing on the audio data.
US09514748B2	Digital personal assistant interaction with impersonations and rich multimedia in responses Systems, methods, apparatuses, and computer program products are described for implementing a digital personal assistant. The digital personal assistant is capable of determining that a user has asked a question or made a statement that is intended to engage with a persona of the digital personal assistant. In response to determining that the user has asked such a question or made such a statement, the digital personal assistant provides a response thereto by displaying or playing back a multimedia object associated with a popular culture reference within or by a user interface of the digital personal assistant. Additionally or alternatively, in response to determining that the user has asked such a question or made such a statement, the digital personal assistant provides the response thereto by generating or playing back speech that comprises an impersonation of a voice of a person associated with the popular culture reference.
US09514746B2	System and method for hazard mitigation in voice-driven control applications A speech recognition and control system including a receiver for receiving an audio input, an event detector for analyzing the audio input and identifying at least one event of the audio input, a recognizer for interpreting at least a portion of the audio input, a database including a plurality of rules, and a controller for generating a control command based on the at least one event and at least one rule.
US09514743B2	Query rewrite corrections Methods, systems, and apparatus, including computer programs encoded on computer storage media, for natural language processing. One of the methods includes receiving a first voice query; generating a first recognition output; receiving a second voice query; determining from a recognition of the second voice query that the second voice query triggers a correction request; using the first recognition output and the second recognition to determine a plurality of candidate corrections; scoring each candidate correction; and generating a corrected recognition output for a particular candidate correction having a score that satisfies a threshold value.
US09514738B2	Method and device for recognizing speech A speech is recognized using ACF factors extracted from running autocorrelation functions calculated from the speech. The extracted ACF factors are a Wφ(0) (width of ACF amplitude around zero-delay origin), a Wφ(0)max (maximum value of the Wφ(0)), a τ1 (pitch period), a φ1 (pitch strength), and a Δφ1/Δt (rate of the pitch strength change). Syllables in the speech are identified by comparing the ACF factors with templates stored in a database.
US09514737B2	Navigation apparatus A navigation apparatus capable of providing a user not only with guidance, but also with all of the guidance, operational procedure, operation screen and recognition vocabulary, that is, with an operational transition that is defined by the guidance, operational procedure, operation screen and recognition vocabulary, while altering the operational transition in accordance with the recognition vocabulary comprehension level of the user. Thus, it can increase the possibility for a user with a low recognition vocabulary comprehension level to achieve a task, or for a user with a high recognition vocabulary comprehension level to improve the comfortableness of the operation, thereby being able to provide all the users with the optimum operational transition.
US09514732B2	Sound-absorbing material A sound-absorbing material has a membrane having multiple piezoelectric fibers, the fiber density of the membrane is below 50 g/m2, the thickness of the membrane is below 1 mm, sound-absorbing coefficient of the membrane is larger than 0.1 at absorbing frequency at 100 Hz+/−10%, and the sound-absorbing coefficient of the membrane is over 0.05 at absorbing frequency at 800 Hz to 1000 Hz. PVDF electrospinning nanofiber membranes of the present invention are thinner and more flexible compared to conventional sound-absorbing material, the membranes in the present invention performs excellent low frequency sound absorption with very thin membrane.
US09514730B2	Whistle device that can be integrated into a wristwatch Device (1) that can be integrated into a wristwatch case comprising a whistle (7) and a piston (11) for injecting air into the whistle (7) in order to imitate the singing of a bird.
US09514726B2	Electromagnetic transducers and methods of making Electromagnetic transducers suitable for a variety of uses, including but not limited to musical instrument pickups. Such a transducer has a primary loop formed by an electrically conductive strip having oppositely-disposed ends and a slot extending therebetween that defines electrically conductive runners. The strip is bent to define a first section of the primary loop that overlies a second section of the primary loop and a gap therebetween. The transducer further comprises sensing or driving elements that are at least partially received in the slot in the first section of the primary loop and a transformer electrically connected to the strip at one of the ends thereof opposite the first section of the primary loop.
US09514722B1	Automatic detection of dense ornamentation in music Techniques are disclosed for automatic detection of dense ornamentation in music. Input data representing a piece of digitally encoded music in a time domain is converted into a spectrogram representing time-frequency coefficients in a frequency domain. The spectrogram includes column vectors of the time-frequency coefficients that correspond to time periods spanning different portions of the piece of music. A one-dimensional onset detection array is calculated based on a subset of the column vectors. Using the spectrogram and the onset detection array, a two-dimensional self-similarity matrix (SSM) is calculated based on pair-wise comparisons of elements in the onset detection array. As a result, an irregular pattern score representing the presence of dense ornamentation in the piece of music can be calculated based on a magnitude difference between a beat pattern in the music and each column of the slim SSM.
US09514718B2	Information processing system, information processing apparatus, and information processing method An information processing system includes: a terminal device; and an information processing apparatus. The information processing apparatus includes: a holding unit that holds a plurality of pieces of workflow information each including information that specifies a process constituting a service; a receiving unit that receives service identification information, device identification information, and an image transmitted from a terminal device; a selecting unit that selects a piece of the workflow information corresponding to the service identification information and the device identification information from the pieces of the workflow information; and an executing unit that executes a service in which the image is processed into an image including a movie in accordance with the workflow information selected by the selecting unit.
US09514714B2	Kinetic mapping One or more techniques and/or systems are provided for kinetic mapping. A spatial interface, such as a map, may represent information according to an overview scale. If the spatial interface comprises a substantial amount of uninteresting content, such as a 100 mile stretch of highway, compared to interesting content, such as a 1 mile complex detour after the highway, then the interesting content may not be displayed at an adequate level of detail due to being displayed at the same overview scale as the 100 mile stretch of highway. Accordingly, points of interest within the spatial interface may be identified and encapsulated to create portals representing such information at relatively higher levels of detail. A kinetic geospatial interface comprising the portals (e.g., the detour) at a focused scale and non-portal information (e.g., the highway) at a collapsed scale (e.g., a lower level of detail than the focused scale) is generated.
US09514713B2	Timing controller, source driver, and display driver integrated circuit having improved test efficiency and method of operating display driving circuit A timing controller, a source driver, and a display driver integrated circuit (DDI) having improved test efficiency and a method of operating the DDI are provided. The timing controller includes a code generation unit for generating a first code from display data, a protocol encoder for generating a data sequence including the display data and the first code, and a transmission unit for providing the data sequence to a source driver through a link.
US09514712B2	Display device and driving method thereof using timing controllers that control image data being applied to adjacent blocks of pixels A display device includes a display panel, a first timing controller, and a second timing controller. The display panel includes a first block and a second block adjacent to the first block, with a data line positioned between the first block and the second block. The first block includes a first column of pixels, and the second block includes a second column of pixels. The first and second columns of pixels are alternately connected to the data line. The first timing controller is configured to receive first image data corresponding to the first block. A second timing controller is configured to receive second image data corresponding to the second block. The first timing controller is configured to transfer at least part of the first mage data to the second timing controller.
US09514706B1	Transparent display apparatus and image adjustment method thereof A transparent display apparatus and an image adjustment method thereof are provided. The image adjustment method includes following steps. A background image information is obtained according to a background scenery at a first side of the transparent display panel. At least one of a plurality of color attributes of a display image is adjusted according to the background image information. The adjusted display image is output at a second side of the transparent display panel.
US09514705B2	Data processing apparatus with adaptive compression algorithm selection based on visibility of compression artifacts for data communication over display interface and related data processing method A data processing apparatus has a compressor and an output interface. The compressor receives an input display data, and generates an output display data according to the input display data. The output interface packs the output display data into an output bitstream, and outputs the output bitstream via a display interface. The compressor adaptively adjusts a compression algorithm applied to the input display data according to visibility of compression artifacts. By way of example, the display interface may be a display serial interface (DSI) standardized by a Mobile Industry Processor Interface (MIPI) or an embedded display port (eDP) standardized by a Video Electronics Standards Association (VESA).
US09514704B2	Display panel A display device includes a display area including a gate line and a data line and a gate driver connected to an end of the gate line, the gate driver including at least one stages integrated on a substrate configured to output a gate voltage, in which the stage includes an inverter unit and an output unit, in which the output unit includes a first transistor and a first capacitor. The first transistor includes an input terminal applied with a clock signal, a control terminal connected to the node Q, and an output terminal connected to a gate voltage output terminal through which the gate voltage is output. An inverter voltage output from the inverter is lower than the low voltage of the gate voltage output by the output unit.
US09514701B2	Method of outputting common voltages to a display panel, display panel driving apparatus for performing the method and display apparatus including the display panel driving apparatus A method of driving a display panel includes: selectively providing a resistance using resistor parts in response to address signals, where the resistor parts have resistances, respectively; and outputting common voltages to the display panel based on the selectively provided resistance.
US09514697B2	Display device and display method When there are a plurality of rows with the same display content, a scanning order calculating portion (23) provided in a display control circuit (200) determines addresses sequentially such that scanning signal lines corresponding to the rows are selected at the same time. A scanning order setting portion (24) controls an address output portion (26) such that the scanning signal lines are selected in such an order, and also controls digital image signals DV outputted by output frame memory (22). In this case, the number of changes in potential for video signal lines can be reduced by the number of rows selected at the same time, resulting in reduced power consumption for driving the video signal lines.
US09514691B2	Electronic display The invention relates to an electronic device comprising a limited color display and a method of driving the display. The display has an array of pixels, a driver for driving each of said pixels in said array and a color filter which is aligned with said display whereby each of said pixels is sub-divided into a plurality of sub-pixels of different colors. The method comprises receiving a target image; generating a brightness image for said target image by determining a brightness value for each sub-pixel within said display; generating an output signal from said brightness image by determining an output value for each of said plurality of sub-pixels of different colors within the brightness image; and outputting said output signal to said driver to drive the display.
US09514690B2	Liquid crystal display A liquid crystal display includes a liquid crystal display panel that is divided into a first display surface and a second display surface including data lines and gate lines, a first data driving circuit configured to drive data lines of the first display surface, a second data driving circuit configured to drive data lines of the second display surface, a gate driving circuit configured to sequentially supply a gate pulse for scanning the first display surface to gate lines of the first display surface and sequentially supply a gate pulse for scanning the second display surface to gate lines of the second display surface, a timing controller configured to divide a unit frame period into a first sub-frame period and a second sub-frame period, a backlight unit configured to provide light to the liquid crystal display panel wherein the backlight unit includes a plurality of light sources, and a light source driving circuit configured to turn off all the plurality of light sources during the first sub-frame period and turn on all the plurality of light sources at a turn-on time within the second sub-frame period.
US09514688B2	Liquid crystal display A liquid crystal display includes: a light source unit that includes a light-guiding plate with a light-exit plane partitioned into emission subsections, and one or plural sides, and light sources; a liquid-crystal-display panel that includes pixels, and modulates light emitted from the light source unit, thereby performing image display; and a display control unit that includes a partitioning-drive processing section generating each of a light-emission pattern signal and a partitioning-drive image signal, performs light-emission driving for each light source, and performs display driving for each pixel. The partitioning-drive processing section performs a gain correction of multiplying each pixel signal in the input image signal by a predetermined gain factor that is set so that a value increases as a pixel position of the pixel signal goes away from the light source, and generates the light-emission pattern signal and the partitioning-drive image signal, by using gain-corrected pixel signal.
US09514686B2	Organic light emitting display device Disclosed is an organic light emitting display device which is capable of rapidly sensing a characteristic variation in a pixel including an organic light emitting diode and a driving transistor. The organic light emitting display device may include a display panel including a pixel formed adjacent to each crossing area of gate and data lines, and a sensing line provided in parallel to the data line and connected with the pixel. The device includes a data driver provided with a sensing data generator for sensing a characteristic variation of the pixel through the sensing line and generating sensing data based on the characteristic variation of the pixel for a sensing mode. The sensing data generator generates the sensing data for the pixel by converting current flowing from the pixel to the sensing line into voltage, and converting the voltage to a digital representation using an analog-to-digital conversion method.
US09514684B2	Display driver A gradation voltage corresponding to a display data is input to a signal electrode driving circuit. The signal electrode driving circuit includes a voltage output circuit which outputs a drive voltage corresponding to the input gradation voltage, and a slew rate assist circuit which accelerates a transition of an output voltage of the voltage output circuit. The slew rate assist circuit accelerates the transition of the output voltage after a predetermined time from a start of transition of the gradation voltage.
US09514680B2	OLED pixel driving circuit with compensation circuitry for uniform brightness A pixel driving circuit includes a light emitting diode (LED), a data writing unit, two transistors and two compensation units. The gate of the first transistor is coupled to the data writing unit for determining the current flow of the LED. The first compensation unit is coupled to the first transistor for providing a current path from the gate of the first transistor to a first voltage source and a current path from the gate of the first transistor to a second voltage source. The second compensation unit includes a first capacitor coupled to the gate of the first transistor for voltage coupling and providing a differential voltage that equals to the OLED to the gate of the first transistor. The second transistor is coupled between the first voltage source and a second voltage source for enabling or disabling the current flow between the first and second voltage sources.
US09514679B2	Display device and driving method for the same A display device includes a display unit including luminescence pixels each including a luminescence element and a driving transistor configured to supply a current to the luminescence element to cause the element to emit light, a signal line driving circuit configured to supply a voltage applied between a gate and a source of the driving transistor, and a control circuit configured to apply a certain voltage between the gate and the source of the driving transistor by controlling the signal line driving circuit and the display unit when a power supply to the signal line driving circuit is stopped. The control circuit applies the certain voltage between the gate and the source of the driving transistor so that a recovery of a shift amount of a threshold voltage of the driving transistor is suppressed, the recovery being made when the power supply to the signal line driving circuit is stopped.
US09514675B2	Method and device for controlling power of active matrix organic light-emitting diode A method and device for controlling power of an active matrix organic light-emitting diode are provided. The method for controlling power of an active matrix organic light-emitting diode includes: calculating a frame data rate, which is a ratio of a light emitting pixel quantity representing a specific color in an image data to be displayed; determining a luminance reducing amount mapped to the frame data rate; and controlling and displaying an entire luminance of an image according to the luminance reducing amount.
US09514674B2	Display apparatus with initialization control and driving method of display apparatus A display device includes a driving transistor in a pixel circuit. A signal line is connected to a source or drain of the driving transistor. The source or drain of the driving transistor receives a power source voltage, an initialization voltage, and a data voltage through the signal line during different periods of operation. The periods of operation include an emission and non-emission periods.
US09514673B2	Organic light emitting display device Discussed is an organic light emitting display device. The organic light emitting display device includes a first substrate configured to include an active area including a plurality of pixels and upper, lower, left, and right inactive areas defined near the active area, and a second substrate facing-coupled to the first substrate. The first substrate includes a plurality of data lines and a plurality of gate lines formed in the active area, a plurality of driving power lines formed in parallel with the plurality of data lines to supply a driving voltage to the pixels, a cathode electrode layer connected to the pixels in common to supply a cathode voltage to the pixels, a plurality of driving power pads provided in each of the upper and lower inactive areas, and a plurality of cathode connection parts provided in each of the left and right inactive areas.
US09514672B2	Pixel circuit, organic light emitting display device, and method of driving the pixel circuit A pixel circuit including a first through fifth PMOS transistors, a storage capacitor and an organic light emitting diode is disclosed. The first and second PMOS transistors are connected in serial between a first voltage and a first node. The third and fourth PMOS transistors are connected in serial between a second voltage and the first node. Gate electrodes of the first and third PMOS transistors are connected to a scan line. A gate electrode of the second PMOS transistor is connected to a first data line. A gate electrode of the fourth PMOS transistor is connected to a second data line. The fifth PMOS transistor is connected between a first power supply voltage and the organic light emitting diode and has a gate electrode connected to the first node. The storage capacitor is connected between the first node and a first electrode of the fifth PMOS transistor.
US09514670B2	Display device There is provided an active matrix EL display device that can display a clear multi gray-scale color display to reduce the shift in the potential caused by the potential drop due to the wiring resistance of a power source supply line, in order to decrease the unevenness in a display region. A plurality of drawing out ports of the power source supply line are arranged. Further, in the wiring resistance between the external input terminal and the pixel portion power source supply line, potential compensation is performed by supplying potential to the power source supply line by a feedback amplifier. Further, in addition to above structure, the power source supply line may be arranged in a matrix.
US09514669B2	Display method and electronic device The disclosure provides a display method and an electronic device. The display method is applicable to an electronic device, the electronic device including at least one display unit, the at least one display unit including a first display region and a second display region, and the first display region and the second display region being in different planes. The display method includes: acquiring display region selection information, and determining a target display region from the first display region and the second display region according to the display region selection information; and acquiring content to be displayed in a target display region, and displaying, according to the determined target display region and a preset display strategy, the content to be displayed on the target display region. The display method and the electronic device provided by the disclosure can determine a target display region from multiple display regions, thereby improving user experience.
US09514665B2	Testing device, and testing method for the line and one sheet using the testing device A test device for a display device including a plurality of demultiplexing switches connected to a plurality of data lines in accordance with the present invention includes: a one-sheet test device configured to include a plurality of control switches connected to the demultiplexing switches through a plurality of wires; and a wire test device configured to transmit wire test signals for detecting defects in the wires to a pad connected to the control switches. The wire test device transmits the wire test signals to the pad to detect defects in first wires of the wires and then detect defects in remaining second wires thereof, and the first wires and the second wires are alternatively disposed below the demultiplexing switches to constitute paths for signals transmitted to the demultiplexing switches.
US09514664B2	Measuring latency in a test system using captured images A latency measurement system includes an event generation device that generates an initial event used to measure system latency. A component test system receives the event and in response outputs a test component output signal and a zero-latency indicator. An electronics system including a multifunction display unit receives the test component output signal and displays a visible element on the multifunction display unit. A camera generates a series of recorded images, where each recorded image contains an image of the zero-latency indicator and an image of the visible element. A processor then determines the system latency by determining a time difference in the series of recorded images between a representation of an occurrence of the event in the image of the zero-latency indicator and a representation of the occurrence of the event in the image of the visible element.
US09514662B2	System for selectively revealing indicia A system for selectively revealing indicia to an observer comprises a transitioning window having a receiving surface and a viewing surface. The receiving surface is positioned in optical communication with an indicia holder that is configured to removably retain indicia, such as information content. During operation, the transitioning window transitions from a substantially opaque state to a substantially transparent state so as to reveal or otherwise display the indicia to an observer via the viewing surface.
US09514656B2	Using structured communications to quantify social skills Embodiments for using an observation platform to measure and assess social skills are disclosed. Communications between at least two devices are intercepted and/or relayed by a computer system wherein a portion of the communications correspond to an audible source and wherein the forwarding or processing of communications is based on a combination of historical, contextual and/or commanded information derived from current and past communications by the computer system. Primary statistics are measured based on the communications and contextual information. Secondary statistics are derived related to a user wherein the secondary statistics quantify social skills and behavioral factors of the user in one or more dimensions against one or more profiles or roles.
US09514655B1	Mobile computing weight, diet, nutrition, and exercise management system with enhanced feedback and goal achieving functionality An illustrative mobile computing device executing weight, nutrition, health, behavior and exercise application software serves as a simulated combination personal trainer and dietician/nutritionist for the user using comprehensive databases storing personalized health, nutrition and exercise information. A mobile computing device, such as a smartphone, executing such software monitors, tracks and/or adjusts caloric intake, energy expenditure taking into account nutritional information and behavioral factors. The mobile computing device receives food consumption, exercise-related, behavior and other input using speech input and the device's GPS subsystem to ease data entry burden on users and to promote continued long-term usage. The system rewards user goal achievement in an automatic, seamless manner, through, for example, downloading music, books, or other media. In illustrative implementations, the system assists users to make healthy food and exercise choices by using a comprehensive color code system to identify good choices, bad choices and those in between.
US09514654B2	Method and system for presenting interactive, three-dimensional learning tools A system includes an education module (171) that is operable with, includes, or is operable to control three-dimensional figure generation software (170). The education module (171) is configured to present an educational three-dimensional object (181) on a display (132) upon detecting an educational flash card (150) being disposed before a camera (130) that is operable with the education module (171). The educational three-dimensional object (181) can correspond to a visible graphic (151) disposed on the educational flash card (150) to provide an educational experience to a student.
US09514651B2	Optimal warning distance Systems, methods, and apparatuses are provided for determining an optimal warning distance for a vehicle. For example, the geographic location of the vehicle is received along with a reaction profile of the operator of the vehicle. Based on the geographic location, a roadway condition is determined. An optimal warning distance is then determined based on a braking distance of the vehicle and the reaction profile of the operator of the vehicle. The operator of the vehicle, or a navigation system of the vehicle itself, is alerted to the roadway condition when the vehicle is located at the optimal warning distance.
US09514645B2	Driver assistance device having a plurality of ultrasound sensors and vehicle having such a driver assistance device and method for operating a driver assistance device The invention relates to a driver assistance device (2) having a plurality of ultrasound sensors, wherein at least one first ultrasound sensor (8 to 11, 17, 18, 21 to 24) has a normal mode as an operating mode in which transmitted ultrasound signals are unencoded and/or in which the first ultrasound sensor (8 to 11, 17, 18, 21 to 24) is designed for receiving unencoded ultrasound signals, and at least one second ultrasound sensor (6, 7, 13 to 16, 19, 20) can be operated in two different operating modes and has the normal mode as a first operating mode and has a special mode as a second operating mode, in which transmitted ultrasound signals are encoded and/or in which the second ultrasound sensor (6, 7, 13 to 16, 19, 20) is designed for receiving encoded ultrasound signals. The invention also relates to a vehicle (1) having a driver assistance device (2) and a method for operating a driver assistance device (2).
US09514642B2	Method for detecting traffic jams using a wireless vehicle to vehicle communication system A method for queue recognition by wireless vehicle to vehicle communication includes: checking a relevance for surrounding vehicles from which an ego vehicle receives messages by a comparison with relevance criteria and establishing a relevance if the relevance criteria are satisfied; selecting the speed and position values that are associated with relevant surrounding vehicles and have the speed values indicating a same direction of travel as the ego vehicle; defining a first virtual vehicle to which mean values of selected speed and position values are allocated as values for the at least one first virtual vehicle; recording a time profile of the speed and position values of the at least one first virtual vehicle; recording, as a change value, the time profile of changes in the speed and position values of the first virtual vehicle; and comparing the change value with a queue criterion.
US09514632B2	Dangerous condition detection with user feedback A method for disseminating emergency notification content from an emergency originating source. The method comprising: delivering the emergency notification content from the emergency originating source to at least one transmitting party; selecting a subset of users from among a set of users for dissemination of the emergency notification content based on the subject matter of the emergency notification content; and delivering the emergency notification content from the at least one transmitting party to a device corresponding to each user from the selected subset of users.
US09514621B2	Tactile sensory underwater communication device A tactile sensory underwater communication device includes a waterproof housing defining an interior area. A circuit and a battery electrically coupled thereto are situated in the interior area of the housing. An electrically conductive probe is electrically connected to the circuit and extends away from a bottom wall of the housing, the probe being configured to deliver an electric shock when electrically energized. The communication device includes a receiver configured to receive a signal indicative of an intention to energize the probe, the circuit being configured to enable current from the battery to energize the probe when the signal is received. A timekeeping device is positioned in the interior area of the housing, the timekeeping device having a timekeeping circuit and a digital display electrically connected to the battery and the timekeeping circuit. A receiver is situated in said interior area and electrically connected to said circuit, said receiver.
US09514620B2	Spatialized haptic feedback based on dynamically scaled values A system provides haptic feedback based on media content. The system processes the media content into components including a first component and a second component. The system further determines a first priority value related to the first component and a second priority value related to the second component. The system further compares the first priority value with the second priority value. The system further generates a first control signal and a second control signal based on the comparison, where the first control signal is configured to cause a first haptic feedback to be output and the second control signal is configured to cause a second haptic feedback to be output that is the same or different than the first haptic feedback.
US09514619B1	Apparatus, systems, and methods for signal localization and differentiation Apparatus, systems, and methods for providing transmission and localized reception of audio, visual, and tactile signaling are taught for a myriad of useful purposes, including embodiments that permit differentiation between selected groups of intended recipients to permit simultaneous use of multiple instances of this technology in close proximity, if desired.
US09514614B2	Real time playing card valuation Technologies and implementations for determining advantages in a card game via a video capture device are generally disclosed.
US09514611B2	Gaming system and method for providing a game with unlockable features In various embodiments, the present disclosure relates generally to gaming systems and methods for providing unlockable features and/or unlockable content. In such embodiments, the gaming system includes a plurality of initially unlocked features or content and a plurality of initially locked features or content, wherein as the player advances or progresses during the play of one or more games, zero, one or more previously locked features or content become unlocked.
US09514608B2	Method, apparatus, and program product providing a player selection wagering game with escalating prizes Methods and gaming systems provide a player selection game in which the prizes available in the game increase in response to certain player selections from the various player selectable elements. Prizes are increased in a manner that makes it clear to the player that they have obtained an enhanced prize. In particular, prizes are increased in the course of the player selection game so that the lowest prize available after a prize increase is greater than the highest prize available prior to the prize increase.
US09514607B2	Electronic gaming device with selectable paylines Examples disclosed herein relate to systems and methods, which may receive primary wagers on a first payline and a second payline. The systems and methods may receive one or more secondary wagers on one or more selected paylines. The selected paylines may be based on data received from a player. The systems and methods may determine a selected paylines payout based on the one or more selected paylines.
US09514605B2	Gaming system, gaming device and method for providing a multiple player, multiple game bonusing environment with a multiple player coin drop game A gaming system and method for exchanging one or more triggered individual bonus games for one or more current plays of a community game or one or more future plays of a community game. If an individual bonus game is triggered in association with an individual gaming device, the gaming system enables the player to: (i) play the triggered individual bonus game, (ii) skip the individual bonus game and play or participate in a community or group game, or (iii) skip the individual bonus game and save an entry to play or participate in a future community or group game. In these embodiments, the gaming system determines one or more features or attributes of the available community game (which the player may play or defer play of) based, at least in part, on which of a plurality of different individual bonus games are triggered.
US09514604B1	System and method for randomized virtual golf game with wagering A system and method for playing a multiple iteration, goal-oriented game with wagering involved at each iteration, such as in a golf wagering application. The system and method comprises providing a computer application to connect multiple users in a network to play through bet sequences and play sequences during multiple iterations of play such as each golf hole, wherein in each play sequence each user moves closer to the goal such as taking the lowest number of virtual strokes on a virtual golf hole. Players may win by reaching the goal before other players, or by causing opponents to drop out of a game during betting sequences.
US09514601B2	Gaming system and method for providing a streaming symbols game In various embodiments, the gaming system disclosed herein provides streaming symbols game which utilizes a single continuous series or chain of symbols and a plurality of symbol display positions which form a path. Specifically, in various embodiments, the gaming system displays the chain of symbols continuously moving through the path of symbol display positions wherein which symbols are evaluated for any awards corresponds to when the chain of symbols stops moving along the path.
US09514592B2	Cash box with dual-roll storage system The invention relates to a cash box (100, 500) that comprises a housing (106) in which two roll storage systems (102, 104) for storing bank notes are held.
US09514591B2	Paper-sheet recognition apparatus, paper-sheet processing apparatus, and paper-sheet recognition method A paper-sheet recognition apparatus that acquires information from a paper sheet and recognizes the paper sheet based on the information. The apparatus includes one or more light emitting units that output first to n-th lights (n≧2) of different wavelengths; an emission controller that performs emission control of the light emitting units; a light receiving unit that receive a component of a light, which has been emitted from the light emitting unit and then reflected from and/or transmitted through the paper sheet; and a paper-sheet recognition processor that recognizes the paper sheet by using an optical signal received by the light receiving unit. The emission controller performs the emission control of the light emitting units such that the number of light emissions per one emission cycle with respect each of to the first to n-th lights differs depending on information desired to be used in recognizing the paper sheet.
US09514589B2	Secure short-distance-based communication and access control system A secure short-distance-based communication and access control system controls access to a restricted area. A run-time mobile device identifier and keys that may be location-specific, device-specific and time-specific are generated and utilized for secure communication between mobile devices and zone computers. The zone computers can validate users via their mobile devices to allow or deny access to the restricted area.
US09514586B2	System and method for controlling locks A system and method for opening locks, primarily door locks like the locks on hotel room doors using a handheld mobile device and a QR code. A mobile user can be provided with a QR code either via email or from a mobile phone application (App.). The QRC will be their room key. The handheld mobile device will display the QRC on its display. A QRC scanner is connected to the door lock through a processor that can decode the QRC. The processor sends a command to the door lock to open when the proper QRC is decoded.
US09514576B2	Method and device for detecting wear on an electric bicycle A method for detecting wear on at least one component of an electric bicycle includes: monitoring the operating condition of the at least one component with the aid of at least one sensor; detecting the stress on the component over the duration of operation; and displaying the need for service on a display unit as soon as a long-term load threshold defined for this component is reached, to inform the cyclist promptly of the need for service.
US09514575B2	Image and annotation display A system (100) for displaying a multi-dimensional image and an annotation located therein, the system comprising receiving means (110) for receiving: the multi-dimensional image, the annotation, and representation data associated with the annotation, the representation data being indicative of a preferred representation of the multi-dimensional image and the annotation located therein; display means (130) for displaying an initial representation (300) of the multi-dimensional image and the annotation located therein; input means (120) for enabling a user to provide a visualization request when the initial representation shows at least a first part (310) of the annotation; and the display means (130) being arranged for, after receiving the visualization request, displaying the preferred representation (400) of the multi-dimensional image and the annotation located therein in accordance with the representation data, the preferred representation showing at least a second part (410) of the annotation, the second part being different from the first part.
US09514573B2	Diminished reality A computer tool generates user-defined diminished reality images of a subject environment from source images. The diminished reality images display less real-world objects in the subject environment than that displayed in the source images. A 3D model of the subject environment in diminished reality is formed from the diminished reality images. The 3D model supports augmented reality user interaction with views of the subject environment diminished in reality and tidied/decluttered of user-selected objects.
US09514572B2	Mixed reality space image providing apparatus A mixed reality space image providing apparatus configured to provide a user with a mixed reality space image in which a virtual object image is superimposed on a real space image is provided includes a selection unit configured to select simulation processing from among a plurality of types of simulation processing based on an instruction from the user, a simulation processing unit configured to perform the simulation processing selected by the selection unit with respect to the virtual object image, and a providing unit configured to generate a mixed reality space image by superimposing the simulation-processed virtual object image on the real space image and to provide the generated mixed reality space image to the user.
US09514571B2	Late stage reprojection Methods for generating and displaying images associated with one or more virtual objects within an augmented reality environment at a frame rate that is greater than a rendering frame rate are described. The rendering frame rate may correspond with the minimum time to render images associated with a pose of a head-mounted display device (HMD). In some embodiments, the HMD may determine a predicted pose associated with a future position and orientation of the HMD, generate a pre-rendered image based on the predicted pose, determine an updated pose associated with the HMD subsequent to generating the pre-rendered image, generate an updated image based on the updated pose and the pre-rendered image, and display the updated image on the HMD. The updated image may be generated via a homographic transformation and/or a pixel offset adjustment of the pre-rendered image.
US09514570B2	Augmentation of tangible objects as user interface controller Method, computer program product, and apparatus for providing interactions of tangible and augmented reality objects are disclosed. In one embodiment, a method of controlling a real object using a device having a camera comprises receiving a selection of at least one object, tracking the at least one object in a plurality of images captured by the camera, and causing control signals to be transmitted from the device to the real object via a machine interface based at least in part on the tracking.
US09514562B2	Procedural partitioning of a scene Systems and methods for partitioning a set of animation objects using a node in a render setup graph are provided. The render setup graph may be used to configure and manage lighting configuration data as well as external processes used to render the computer-generated image. The render setup graph may include a dependency graph having nodes interconnected by edges along which objects and object configuration data may be passed between nodes. The nodes may be used to provide a source of objects and object configuration data, configure visual effects of an object, partition a set of objects, call external processes, perform data routing functions within the graph, and the like. The objects can be partitioned based on attributes of the objects and associated configuration data. In this way, the render setup graph may advantageously be used to organize configuration data and execution of processes for rendering an image.
US09514561B2	Method and device for displaying changed shape of page Exemplary embodiments disclose a method and device for displaying a changed shape of a page. The method includes: receiving a user touch input on the page; calculating a virtual touch force which acts on a first node on the page based on the user touch input; calculating a virtual spring force which acts on the first node by at least one virtual spring which is connected to the first node based on the calculated virtual touch force; calculating a virtual rod force which acts on the first node by at least one virtual rod which is connected to the first node based on the calculated virtual touch force; and moving the first node based on the virtual touch force, the virtual spring force and the virtual rod force.
US09514559B2	Memory sharing via a unified memory architecture A method and system for sharing memory between a central processing unit (CPU) and a graphics processing unit (GPU) of a computing device are disclosed herein. The method includes allocating a surface within a physical memory and mapping the surface to a plurality of virtual memory addresses within a CPU page table. The method also includes mapping the surface to a plurality of graphics virtual memory addresses within an I/O device page table.
US09514556B2	System and method for displaying motility events in an in vivo image stream A system and method may analyse and display intestinal motility events, based on an image stream captured by an in vivo imaging device. According to some embodiments, the system includes a storage unit to store image frames from the image stream, a processor to select a strip of pixels from a plurality of image frames of the image stream and to align the selected strips adjacently to form a motility events bar, and a visual display unit for displaying the motility events bar to a user.
US09514555B2	Method of rendering an overlapping region Disclosed is a method of modifying a graphics command. The method receives a graphics command comprising a drawing operation and a pattern (ROP3) of the region and obtains spatial frequencies of the pattern. The method determines if the obtained spatial frequencies of the pattern in the graphics command define a transparency attribute of the region to be rendered and replaces at least the pattern in the graphics command with a transparency coefficient based on the obtained spatial frequencies.
US09514554B2	Computer readable recording medium recorded with graphics editing program, and graphics editing apparatus When a new element is interactively arranged in cooperative with an input device and a display device, an element arranged just before is specified based on the time relation of the new element to already arranged elements, the association is made to provide a relation between the specified element and the newly arranged element, and the relation between them is displayed on the display device. Therefore, an actual condition in that a series of relational elements is arranged successively in time is utilized, to thereby associate the elements according to the time relation thereof to provide a relation therebetween. Hence, the relation between the elements is easily provided while reflecting the intention of user as much as possible.
US09514553B2	Personalized content layout A method for creating a personalized content layout for a user interface is provided. The method may comprise providing a content layout framework, monitoring and storing usage data over time of a content fragment, displayed in the content layout framework, promoting or demoting the content fragment in respect to its presentation within the content layout framework based on a first value of a first parameter of the parameter model, wherein the promotion or demotion uses an abrasion factor, such that a content fragment appearance degrades or increases from session to session of usage of the content layout framework depending on a predefined function deployed to the first value of the first parameter of the parameter model.
US09514552B2	Information processing apparatus, information processing method, and storage medium Disclosed are an information processing apparatus etc., which can display an operation object while switching according to an operation unit that is operated by a function that is in operation, includes a conversion unit that, when a switch from an operation performed by a first function which detects an operation performed by a first operation unit to an operation performed by a second function which detects an operation performed by a second operation unit, converts a description regarding an operation object related to the first operation unit in at least one description to display on a display unit that operates by the first function into a description regarding the operation object related to the second operation unit, and a drawing unit that displays the description obtained by conversion performed by the conversion unit on a display unit that operates by the second function.
US09514551B2	Efficient fetching of a map data during animation A first digital map is displayed in a viewport at an initial position. When a user gesture that communicates motion to the viewport is detected, a trajectory of the viewport from the initial position to a target position is determined based on kinematic quantities of the communicated motion. Map data for displaying a second digital map in the viewport at the target position is retrieved from a first memory, prior to the viewport reaching the target position. The retrieved map data is stored in a second memory having a higher speed of access than the first memory. The second memory is retrieved for display via the user interface when the viewport is at the target position.
US09514544B2	Storage medium, method, and device for evaluating importance of in-image region Provided is a device for evaluating the importance of an in-image region and that can appropriately evaluate the importance in terms of meaning of an in-image region. A processing unit performs a process including color reduction with respect to an evaluation subject region of an image. An importance determination unit determines the importance of the evaluation subject region on the basis of the degree of magnitude of the error between the pre-processing signal value of the evaluation subject region and the post-processing signal value of the evaluation subject region.
US09514542B2	Moving object tracking device, moving object tracking system and moving object tracking method A moving object tracking device for allowing a display device to display a movement line of a moving object superimposed on a real-time image of a monitored area includes: a detection unit that detects a moving object from images of the monitored area and outputs detection position information; a first movement line generation unit that removes erroneous detection information included in the detection position information and generates a determined movement line using the detection position information having the erroneous detection information removed; a second movement line generation unit that generates a provisional movement line interpolating an undetermined section between a substantially latest detection position indicated by the detection position information and an end point of the determined movement line; and a movement line information obtaining unit that obtains movement line information relating to an integrated movement line formed of the determined movement line and the provisional movement line integrated together.
US09514538B2	Pupil detection method, corneal reflex detection method, facial posture detection method, and pupil tracking method A pupil detection method includes a step of acquiring images by taking a facial image of a subject using each of a left camera and a right camera, a step of extracting one or more image candidate points serving as candidates for pupils from the images, a step of extracting points corresponding to a combination of image candidate points corresponding to the same point in a three-dimensional space as space candidate points, a step of selecting a pair of two space candidate points from the extracted space candidate points and calculating a distance between the selected pair, a step of excluding a pair of space candidate points where the calculated distance is not within a specified range, and a step of determining one or more pairs of space candidate points from the pairs not excluded and determining that a pair of pupils of the subject exist at the positions.
US09514536B2	Intelligent video thumbnail selection and generation In accordance with one embodiment, an intelligent video thumbnail selection and generation tool may select a relevant and visually stimulating image from a video file and generate a thumbnail including the image. The image may be selected by computing a relevancy metric for an image in the file based on one or more selected relevant features, and comparing that relevancy metric with the metric of at least one other image in the file. In another embodiment, a series of images in a video file may be divided into shots. One of the shots may be selected based on a shot relevancy metric and a key image from the shot may be selected as a thumbnail based on a key image relevancy metric, where the shot relevancy metric and the key image relevancy metrics may be computed based on one or more relevant content features.
US09514534B2	Dynamic movement assessment system and method A system and method implements video capture technology, in combination with computer program engines and proprietary algorithms to capture, analyze and objectively score human movement, and to identify, differentially diagnose and assess the root causes of observed pathokinematic (pathological movement) patterns. The system calculates demographic risk of injury and compares with identified movement issues to determine potential performance issues and associated relative risks for the subject. Specific, individualized corrective measures or interventions are selected and targeted to the individual and his or her movement patterns, to improve those pathokinematics. The result is decreased likelihood of certain types of lower extremity injuries, faster and more effective rehabilitation, the reduction of movement related pain, and significant improvement on specific performance based metrics used in activities and professions requiring athleticism, and quality measurement of the quality of normal “activities of daily living”.
US09514532B2	Image processing apparatus ophthalmologic imaging system and image processing method An image processing apparatus includes an identifying unit configured to identify a region relating to the movement of blood cells on a fundus image captured by an ophthalmologic imaging apparatus that includes an adaptive optics system, and an acquisition unit configured to acquire information relating to a tissue that is positioned on a back side of a position where the movement of blood cells is recognized, when it is seen from an anterior eye part side, in the identified region.
US09514523B2	Method and apparatus for filling images captured by array cameras Image filling utilizing image data captured by an array of cameras having different camera viewpoints. Image data, such as a pixel value or gradient value associated with a spatial point in a source region of an image is transferred to the same or another image to fill a target region. Visual artifacts may be reduced by filling portions of the target region visible from other viewpoints with expanded source patches to reduce the size of the target region to be inpainted. In embodiments, a shifted mask corresponding to the target region is determined for each supplementary image based on an estimate of foreground disparity. In further embodiments, partially occluded regions are detected based on an estimate of background disparity. Source patches may be expanded based on a baseline between camera viewpoints into large coherent regions that agree well with the target region boundary may be filled without hallucinating image data from similar patches.
US09514515B2	Image processing device, image processing method, image processing program, and image display device Provided is an image processing device capable of performing appropriate noise removal or reduction on input images of various resolution. The image processing device includes a contour direction estimating unit (21) that estimates a contour direction in which a signal value is a constant value for each pixel, a low pass filter unit (20a) that smoothes the signal value of the pixel based on the signal value of each reference pixel serving as a pixel of a reference region according to the pixel and arranged in the contour direction of the pixel estimated by the contour direction estimating unit for each pixel, and a parameter deciding unit (20b) that decides intensity of smoothing by the low pass filter unit according to an enlargement factor obtained based on a ratio of resolution of an input image signal and resolution of an output image signal.
US09514511B2	Timing controller to perform panel self-refresh using compressed data, method of operating the same, and data processing system including the same A method of operating a timing controller, which communicates with a host through a mobile industry processor interface (MIPI) and communicates with a display panel module through a display interface, is provided. The method includes storing image data compressed by one of the host and the timing controller in a frame memory, decompressing the image data stored in the frame memory, and performing panel self-refresh on the display panel module using the decompressed image data.
US09514502B2	Methods and systems for detecting shot boundaries for fingerprint generation of a video The present invention relates to computation of digital fingerprint of a video sequence. The invention presents systems and methods for quick identification of shot boundaries and extraction of fingerprints by processing one or more specific frames. The systems and methods are applied on uncompressed video or compressed video having inter-frame or intra-frame compression. The methods comprises of comparing two frames of the video having a gap in between and identifying a specific frame present in between the two frames such that the specific frame may have a shot boundary. Shot boundaries are calculated for the entire video and then a fingerprint is generated using all the shot boundaries present in the video.
US09514500B2	Watermark generator, watermark decoder, method for providing a watermarked signal based on discrete valued data and method for providing discrete valued data in dependence on a watermarked signal A watermark generator for providing a watermark signal as a sequence of subsequent watermark coefficients based on a stream of subsequent stream values representing discrete valued data includes a differential encoder. The differential encoder is configured to apply a phase rotation to a current stream value of the stream values representing the discrete valued data or to a current watermark symbol, the current watermark symbol corresponding to a current stream value of the stream values representing the discrete valued data, to obtain a current watermark coefficient of the watermark signal. The differential encoder is configured to derive a phase of a previous spectral coefficient of a watermarked signal which is a combination of the host signal and the watermark signal, and to provide the watermark signal such that a phase angle of the phase rotation applied to the current stream value or the current watermark symbol is dependent on the phase of the previous spectral coefficient of the watermarked signal.
US09514498B2	Method and system for centralized reservation context management on multi-server reservation system The method and system according to a preferred embodiment of the present invention allows ensuring consistency of the PNR record when it is handled within the subsystem controlled by the reservation interceptor module and including a plurality of OBEs. According to a preferred embodiment of the present invention the PNR context on open systems is centralized to avoid its fragmentation in the distributed environment, as gathering of all the context parts implies performance issues. In addition, instead of implementing a transaction session protocol to handle a start of transaction, intermediate updates and a final commit or rollback on the PNR context, the principle of the service interceptor architecture is to delegate the functional queries with the current user PNR context which will be modified in the central repository of PNR context only at response time when the whole functional use-case is finished.
US09514496B2	System for management of sentiments and methods thereof Systems and methods for improved management of sentiments over conventional approaches are disclosed. Supervised approach is used to augment the rule-based approach for classification. Initially, sentiment evaluation is performed by the system using a rule based approach and an interface is provided to the user to give feedback on the correctness of evaluated sentiment. This feedback is used by the sentiment evaluation system to update the set of rule-based and also apply the supervised approach to train the classifier for evaluating complex posts.
US09514494B2	Prevention of coalition attacks in social network communities A report handler may receive abuse reports from reporters alleging policy violations of network use policies by at least one potential victim, and a source analyzer may determine at least one subset of the reporters. A content analyzer may determine a reference to the at least one potential victim in network activities of the at least one subset, and a review requester may generate a notification of a potential coalition attack against the at least one potential victim, based on the reference in the context of the at least one subset.
US09514493B2	System of systems for monitoring greenhouse gas fluxes A system of systems to monitor data for carbon flux, for example, at scales capable of managing regional net carbon flux and pricing carbon financial instruments is disclosed. The system of systems can monitor carbon flux in forests, soils, agricultural areas, body of waters, flue gases, and the like. The system includes a means to identify and quantify sources of carbon based on simultaneous measurement of isotopologues of carbon dioxide, for example, industrial, agricultural or natural sources, offering integration of same in time and space. Carbon standards are employed at multiple scales to ensure harmonization of data and carbon financial instruments.
US09514492B2	Systems and methods for providing financial service extensions Systems and methods are provided for providing financial service extensions. In one implementation, a financial cloud system including a memory storing instructions and a processor configured to execute the instructions is provided. The instructions may be executed to perform a process associated with providing the financial service extensions. The process may include providing a platform application to a client device. The process may also include receiving data associated with a financial service extension to be used in connection with the platform application. The process may further include receiving configuration data associated with the financial service extension. The process may additionally include configuring, by the processor, the financial service extension for use with the platform application. The process may also include providing, by the processor, the financial service extension to the client device.
US09514488B2	Context-influenced application recommendations Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for recommending content based on context such as location. In one aspect, a method includes receiving data that references a location of a mobile device, selecting, from among multiple, different applications that are available in an online application marketplace, one or more of the applications that are relevant to the location, and providing, by a recommendation server, a recommendation to the mobile device, where the recommendation identifies the one or more applications as applications that the user is likely to be interested in purchasing or downloading.
US09514487B2	Internal measurement collection system and method of using same A system for measuring dimensions and/or other internal properties of a shoe, garment or other object of interest is described. The system includes a fixture having a measurement tip. When the tip is placed inside of the object of interest, a processor collects positional data from the fixture to develop a three-dimensional model of the interior of the object. If the measurement tip includes one or more pressure sensors, the processor may collect pressure data and use the pressure data to include stretch properties in the three-dimensional model.
US09514484B2	Marketing campaign application for multiple electronic distribution channels A system is disclosed for allowing a merchant to create offers for distribution via multiple distribution channels. The distribution channels may include social media networks and location based services. The method may include receiving offer parameters for generating the offer, generating offer data based on the offer parameters and merchant transaction data, and determining data subsets of the offer data for distribution through multiple electronic distribution channels. The systems and methods may include associating a transaction account of the account holder with the offer, monitoring a transaction of the transaction account, comparing with a criterion governing the offer, and generating a report for the merchant. The report may include various metrics of the offer, such as return on investment, tracking information on the number of repeat customers and new customers during an offer period, and may occur approximately real-time with the transaction.
US09514481B2	Selection and/or modification of an ad based on an emotional state of a user Techniques are described herein for, among other things, selecting and/or modifying an ad based on an emotional state of a user. The user's emotional state is determined based on the user's online activity. Advertisement(s) are selected and/or modified for provision to the user based on the user's emotional state. An advertisement may be modified in any of a variety of ways. For example, a color that is included in an advertisement may be replaced with a different color. In another example, a color filter may be applied to the advertisement. In yet another example, visual attribute(s) of the advertisement may be modified. Examples of a visual attribute include, but are not limited to, hue, brightness, contrast, and saturation.
US09514475B2	Systems and methods for use with codes that may be redeemed for value Some embodiments of the invention enable users to manage codes which may be redeemed for value. For example, some embodiments provide systems and methods for automatically identifying a code communicated to a user which is redeemable for value, and adding the code to an inventory maintained for the user. When the user later shops at a site which allows a code to be redeemed for value, some embodiments of the invention may automatically detect when the user has navigated to a page on the site which allows redemption of the code, and may make the user aware that the code may be redeemed on the page. If the user opts to redeem the code, the field on the page into which the code is to be input may be automatically identified, and the code may be automatically input into that field.
US09514474B2	Offers based on life events Embodiments of the invention are directed to systems, methods and computer program products for determining offers based on life events. An exemplary apparatus is configured to determine a life event based on at least one of user information or account information associated with a user of a financial institution account; project a timeline of future events based on the life event; determine an offer associated with a future event, wherein the offer enables the user to receive at least one of a discount or a rebate on a purchase transaction; and transmit the offer to the user near in time to the future event's projected occurrence.
US09514471B2	System and method for tracking product interaction The present disclosure relates to a system and method for tracking an individual's interaction with objects in a physical environment by pairing the movement of an RFID tagged object to a mobile device based on time and proximity.
US09514468B2	Systems and methods for delivering tailored content based upon a consumer profile The present disclosure includes a system, method, and article of manufacture for aggregating a consumer profile, identifying tailored content (e.g., in response to a trigger event and/or based upon a consumer profile), and/or tailoring a digital destination. For example, the systems may receive direct data indicating an interest in receiving specific content, aggregate that data into a consumer profile, compare the consumer profile to content, and/or identify tailored content based upon the comparison. Further, the systems may communicate the tailored content to a web client associated with a consumer, receive a transaction request from a web client, and/or receive bids associated with tailored content. In addition, these systems may prioritize tailored content comprising a plurality of tailored offers and/or forecast a budget for an upcoming experience.
US09514467B2	Dynamic post-delivery customization of telecommunication messages Systems, methods, and products for described herein. One aspect provides for transmitting a message template comprising at least one template element to at least one receiver device, the at least one template element comprising (i) at least one rule and (ii) content having at least one customized element; receiving at least one instantiation request responsive to the message template being opened by at least one receiver device; instantiating the message template as at least one customized message based on the at least one rule and at least one attribute associated with the receiver device, wherein the at least one customized message comprises a specified value for the at least one customized element; and transmitting the at least one customized message to the at least one receiver device. Other embodiments and aspects are also described herein.
US09514464B2	Pipeline arrangement for utilizing a gas comprising biomethane Embodiments of the invention provide a process in which a gas comprising biomethane having a heating value of about 350-950 BTU/cubic foot is introduced to a pipeline system at a combination point that is downstream of natural gas in the pipeline system having a heating value of at least about 950 BTU/cubic foot. This produces a mixed gas downstream of the combination point. At least a portion of the mixed gas downstream of the combination point is withdrawn for use by a user that combusts the mixed gas to generate heat and/or electricity. A corresponding amount of natural gas is withdrawn at an upstream location for use as a transportation fuel, a fuel intermediate or as a feedstock for producing a fuel. The process can enable fuel credit generation.
US09514462B2	Obtaining and managing access to content In one implementation, a computer-implemented method includes receiving, at a computing device and from a computer server system, digital content that is for sale and that is received without having yet been purchased by a user of the computing device; storing the digital content locally on the computing device in a manner that prohibits user access to the digital content; after storing the digital content: receiving user input that indicates the user is purchasing at least a portion of the stored digital content; and in response to the received user input, storing information that indicates the user purchased the portion of the digital content and providing the user with access to the purchased portion of the digital content; and in response to detecting that the computing device is communicatively connected to the computer server system over a network, providing the stored information to the computer server system.
US09514461B2	Systems and methods for analysis of content items A content analyzer retrieves content items from one or more content sources. The content items have a corresponding date and time assigned representing when the content item was published. The content analyzer is further configured to determine a frequency count for each of a plurality of terms within the plurality of content items for a specified time period. In some embodiments, the content analyzer identifies a change in the frequency count for each of the plurality of terms relative to a respective baseline frequency count for the respective one of the plurality of terms. In some embodiments, a report representing the change in the frequency count for each of the plurality of terms is generated.
US09514458B2	Customer authentication in E-commerce transactions A Chip Authentication Program based on 3-D Secure protocols is provided for authenticating customers' on-line transactions. An issuer, who may be a payment card issuer, operates Access Control and Authentication Request Servers for authenticating transactions by individual customers who are identified by their personal EMV-complaint smart cards. An authentication token is generated at the point of interaction (POI) for each transaction based on information from the customer's smart card and transaction specific information sent directly by the issuer to populate a web page at the POI. Authentication tokens generated at the POI are evaluated by the Authentication Request Server to authenticate individual customer and/or card presence at the transaction POI. Authentication values are transported on-line in designated Universal Cardholder Authentication Fields consistent with 3-D Secure protocols.
US09514456B2	Single payment card for flexible payment vehicle options for a transaction Embodiments of the invention are directed to a system, method, or computer program product for providing a customer with a single transaction card that is tied to the customer's available payment vehicles. As such, the single transaction card may be utilized by the customer to complete a transaction with a merchant. Subsequently, based on customer rules or customer selection, the invention may direct the transaction to the selected payment vehicle. Rules include any preferences that a customer may input that allows the invention to automatically apply a single transaction card transaction to a payment vehicle. As such, rules may be trigged for a specific merchant, a specific transaction amount, a specific location, and/or the like. If a rule is triggered by a transaction made with the single transaction card, the triggered transaction will be automatically applied to the payment vehicle tied to that rule.
US09514455B2	Mobile device payment A method including receiving, from a mobile device, a payment method and a payment amount. The method also can include validating the payment amount. The method additionally can include generating a gift card for the payment amount. The gift card can include a gift card identifier. The method further can include sending the gift card identifier to the mobile device. The method additionally can include facilitating displaying the gift card identifier on the mobile device. The gift card can be devoid of being generated as part of a gift-card purchase transaction. Other embodiments are provided.
US09514450B2	System for accessing a POS terminal, method for downloading and updating applications and method for performing electronic operation using such a system The present invention refers to system for accessing POS terminals (10), with or without pin pad, using a client system (15) to connect such POS terminal (10) to a network comprised by at least one server (30), the system enabling any POS terminal (10) to execute applications (25) located in such servers, through a plurality of specific protocols (20) in a process similar to the Internet, as well to download and update applications from application servers (30) and to perform electronic operations in transaction serves (35).
US09514449B2	Advertisement website connecting program, memory medium, information processing device, and server device When an electronic money card is set to a reader/writer, an introducing site connection unit is activated to connect a user terminal to an introducing site. The introducing site connection unit stores manufacturer information and transmits an electronic money function unit ID and the manufacturer information read from the electronic money card to the introducing site. An introducing server connects the user terminal to an affiliated store server through the introducing site, and the affiliated store server transmits purchase information to the introducing server when a user purchases. The introducing server calculates a commission amount from the purchase information and transmits the calculated amount together with the electronic money function unit ID and the manufacturer information to a distributing server. The distributing server distributes the commission amount to the electronic money function unit ID and the manufacturer information based on a predetermined distribution ratio.
US09514445B2	Automated electronic message filing system A sender selection is detected at a sender computer system within a user interface of at least one suggested folder name for a composed electronic message for a recipient receiving the electronic message to select as a folder name for filing the electronic message. The at least one suggested folder name is attached to the electronic message at the sender computer system for distribution to the recipient. The electronic message is sent with the suggested filing folder name from the sender computer system to a recipient, wherein a recipient receiving the electronic message receives the at least one suggested folder name specified by the sender in the electronic message for selecting a folder for filing the electronic message in a messaging filing directory for the recipient.
US09514444B2	Encapsulating virtual area based communicant assemblies Realtime communications between communicants in a virtual area are administered. Assemblies of copresent communicants in the virtual area are detected. For each of respective ones of the detected assemblies, a respective meeting object linked to information relating to communicant interactions in the assembly is generated. Respective meeting summary data is determined based on the information linked to selected ones of the meeting objects. The determined meeting summary data is transmitted to a network node for display. A visualization of summaries of respective assemblies of copresent communicants in the virtual area is presented on a display.
US09514442B2	Interlacing responses within an instant messaging system A computer-implemented method of interlacing responses within an instant messaging (IM) system can include, responsive to a request from a user in an IM session, storing an IM message fragment input by the user and associating the IM message fragment with a message selected from an IM session transcript. The method can include recalling the IM message fragment and outputting, at least in part, the IM message fragment in response to the message.
US09514439B2	Method and system for determining audience response to a sensory stimulus The present invention is directed to a method and system for measuring the biologically based responses of an audience to a presentation that provides sensory stimulating experience and determining a measure of the level and pattern of engagement of that audience to the presentation. In particular, the invention is directed to a method and system for measuring one or more biologically based responses of one or more persons being exposed to the presentation in order to determine the moment-to-moment pattern and overall level of engagement. Further, the invention can be used to determine whether the presentation or the content in the presentation is more effective in a population relative to other presentations (or content) and other populations and to help identify elements of the presentation that contribute to the high level of engagement and the effectiveness and success of the presentation for that population.
US09514438B2	Method and system for providing a report of experiences of members of a group of users A method of providing a report of experiences of members of a group of users includes: making available a content data compilation compiled from at least items of content data obtained in association with different members of the group; —obtaining data associated with at least one member of the group; and using the data associated with at least one member to cause at least one message to be output on at least one device (8-11) associated with at least one member of the group. At least part of the content data compilation is based on information provided in response to the at least one message by the at least one member with whom the device (8-11) is associated. In one embodiment, a “family news reporter” scenario is proposed.
US09514432B2	Apparatus and method for monitoring a package during transit According to one aspect, a monitoring device for detecting when an object may be subjected to a condition includes a processor, a sensor, and a configuration circuit. The sensor is adapted to detect if the object is subjected to at least a first magnitude of the particular condition. The configuration circuit may be used to specify a second magnitude of the particular condition, wherein the second magnitude is greater than the first magnitude. The processor remains in an inactive state if the object is subjected to a magnitude of the particular condition less than the second magnitude, and the sensor generates a signal in response to detection of object being subjected to at least the second magnitude of the particular condition. In response to the signal, the processor enters an active state to develop an indication of at least the second magnitude of the particular condition.
US09514429B2	Global enterprise printing and mailing Systems, devices, and methods for global enterprise workflow management are disclosed. The system may include a communications module, memory, and processor for executing a method of managing job information. The system receives job information and uses a model to identify a desirable resource to execute the job. Then the system sends the job information to the identified resource for execution. The resource may send back information associated with the running and/or completion of the job. Various models may be used in identifying a desirable approach, including a cost model, a staffing model, and other models.
US09514428B2	Managing energy assets associated with transport operations Apparatus, systems, and methods are described that can be used to generate an operating schedule for a controller of an energy storage asset that is in communication with a transport vehicle, based on an optimization process. The operating schedule is generated based on an operation characteristic of the energy storage asset, an energy-generating capacity of the transport vehicle in communication with the energy storage asset based on a motion of the transport vehicle, and a price associated with a market (including a regulation market and/or an energy market). Operation of the energy storage asset according to the generated operating schedule facilitates derivation of energy-related revenue, over a time period T. The energy-related revenue available to the energy customer over the time period T is based at least in part on the regulation market and/or the energy market.
US09514424B2	System and method for online communications management A system and method are disclosed. One or more processors prioritize at least some tasks and actions associated with a user. A to-do list is provided that includes the prioritized task. First electronic data event information representing a sending or receiving of data associated with at least one of the tasks is received and at least one of the tasks and at least some of the actions are reprioritized. The to-do list is modified based at least on the reprioritizing, and is provided to the user.
US09514423B2	Test planning tool for software updates A test planning tool for defining a test plan for testing updates to a software product aggregates information from a variety of diverse sources to generate an application model. The application includes a detailed model of the components of the application and their dependencies, a logical structure of the components, requirements associated with changes to the components, organizational entities responsible for the changes, and various other information, such as test coverage and defect information. The application model is presented to the user in a manner that allows the user to select components of interest, drill down and view change details and requirements, and to use that information to develop a test plan.
US09514411B2	Computer-based extraction of complex building operation rules for products and services A method for generating an operational rule associated with a building management system includes identifying, with a processing device, a first pattern associated with a series of operational observations corresponding to a property of the building management system, correlating a first contextual attribute with the first pattern, and deriving the operational rule at least in part based on the first pattern and the first contextual attribute.
US09514410B2	System and method for identifying and condensing similar and/or analogous information requests and/or responses A system and method for identifying and condensing similar and/or analogous information requests and/or responses comprising a computer apparatus having an intelligent global rules engine to facilitate interaction with information requests and/or responses. The computer apparatus comprises machine-readable medium, wherein data is stored, wherein the data comprises a comparison of similar and/or analogous information requests and/or responses, wherein redundancies and/or analogies in information requests and/or responses have been identified and condensed to remove the redundancies and/or analogies thereby creating at least one global rule, rule group and/or single rule. The computer apparatus further comprises both a data processing module, wherein the data processing module comprises a lexical analyzer with contextual awareness, and an intelligent global rules engine, wherein the intelligent global rules engine comprises the at least one global rule, rule group and/or single rules.
US09514408B2	Constructing and maintaining a computerized knowledge representation system using fact templates Methods for constructing and maintaining knowledge representation systems are disclosed herein. The knowledge representation system is initially organized and populated using knowledge engineers. After the initial organization, scientific domain experts digest and structure source texts for direct entry into the knowledge representation system using templates created by the knowledge engineers. These templates constrain both the form and content of the digested information, allowing it to be entered directly into the knowledge representation system. Although knowledge engineers are available to evaluate and dispose of those instances when the digested information cannot be entered in the form required by the templates, their role is much reduced from conventional knowledge representation system construction methods. The methods disclosed herein permit the construction and maintenance of a much larger knowledge representation system than could be constructed and maintained using known methods.
US09514406B2	Device for analyzing and classifying a mobile terminal application for a docking station of a motor vehicle A device for analyzing and classifying (4) a mobile terminal (2) application (3), for a docking station (1) of a motor vehicle capable of interfacing a mobile terminal (2) and of supporting at least one application (3) of the mobile terminal (2) and offering at least one remote interface element (8) replacing the interface element of the mobile terminal (2) for the application (3), includes an analysis element capable of analyzing a data flow (7) exchanged between the application (3) and the docking station (1) and a classifying element capable of determining an application type (13) according to this analysis, in order that the docking station (1) can determine, according to the driving conditions (9) of the motor vehicle, whether the application (3) is or is not authorized to access the at least one interface element (8).
US09514405B2	Scoring concept terms using a deep network Methods, systems, and apparatus, including computer programs encoded on computer storage media, for scoring concept terms using a deep network. One of the methods includes receiving an input comprising a plurality of features of a resource, wherein each feature is a value of a respective attribute of the resource; processing each of the features using a respective embedding function to generate one or more numeric values; processing the numeric values to generate an alternative representation of the features of the resource, wherein processing the floating point values comprises applying one or more non-linear transformations to the floating point values; and processing the alternative representation of the input to generate a respective relevance score for each concept term in a pre-determined set of concept terms, wherein each of the respective relevance scores measures a predicted relevance of the corresponding concept term to the resource.
US09514399B2	Method and system for manufacturing a card with edge indicators Embodiments of the invention are directed to methods and systems used to manufacture cards that comprise indicators on the edge of the card stock to help identify the cards. The dies comprise projections formed as ridges, grooves, dimples, burrs, protrusions, or other like projections. The projections on the dies are used to stamp out card stock having the desired indicators. The indicators on the card stock may be projections on the edge of the card stock in the form of ridges, grooves, dimples, burrs, protrusions, or other like projections that provide at least a portion of the edge of the card stock with a textured surface.
US09514394B2	Image forming apparatus capable of changing image data into document data, an image forming system, and an image forming method An image forming apparatus that changes image data into document data includes a character recognition unit, a font matching unit, and a character attribute data setting unit. The character recognition unit recognizes a character from the image data. The font matching unit performs matching so as to determine which of a plurality of fonts and a plurality of character sizes a recognized character corresponds to, with respect to an area of the image data, recognized as the character by the character recognition unit. The character attribute data setting unit sets, in the document data, a font and a character size whose matching is established by the font matching unit and sets an origin of drawing, a character width, and a side bearing as a drawing position of a character so that the origin of drawing, the character width, and the side bearing correspond to the image data.
US09514392B2	Method of creating compound file and data storage device having the compound file A method for creating a compound file where additional data is inserted into an image file and a data storage device having the compound file recorded therein is provided. The method includes receiving, by a compound file creating apparatus, the image file and the additional data, and creating, by the compound file creating apparatus, the compound file by using the received image file and the additional data, wherein the compound file comprises an image file header corresponding to the image file, image data corresponding to the image file, and a marker recorded in a tail of the compound file and indicating that the compound file is an image file having the additional data inserted therein.
US09514372B2	Lane-tracking assistance system for a motor vehicle The present invention relates to a lane-tracking assistance system for a motor vehicle including a surroundings detection device for determining at least one roadway marking and at least one vehicle headlight which, depending on the detected roadway marking and a position of the motor vehicle that is able to be detected from the roadway marking, is designed to generate light of a differing spectral composition.
US09514371B1	Systems and methods for automated cloud-based analytics and 3-dimensional (3D) display for surveillance systems Systems and methods for cloud-computing network with distributed input devices and a cloud-based analytics platform for automatically analyzing received 2-Dimensional (2D) video and/or image inputs for generating 3-Dimensional (3D) surveillance data and providing 3D display for a target surveillance area.
US09514369B2	Program, method, and system for displaying image recognition processing suitability A resolution evaluation section calculates a resolution evaluation value for each location within a monitoring target region excluding the presence area of an obstacle. A gazing point angle evaluation section calculates a gazing point angle evaluation value for each location within the monitoring target region excluding the presence area of the obstacle. The suitability calculation section calculates the suitability for each location within the monitoring target region excluding the presence area of the obstacle, on the basis of at least the resolution evaluation values and the gazing point angle evaluation values, the suitability indicating the degree to which the image of the monitoring target object placed at each location is suitable for the image recognition process. A display control section causes a display device to show regions within the monitoring target region which correspond to the suitabilities, in a mode commensurate with these suitabilities.
US09514367B2	Method and apparatus for playing contents A method and apparatus for playing contents are disclosed. The method may include: receiving an encoded content, where the content contains position information for each scene; decoding the encoded content; extracting a scene in which position information is changed, from among the scenes of the decoded content; creating a thumbnail for the extracted scene; and outputting at least one of the thumbnail and the content.
US09514362B2	Control method for vehicle A control method for a vehicle includes: predicting a position of an eye point of an occupant after a state of a vehicle seat is changed based on amount of adjustment of an adjusting mechanism due to change in state of the vehicle seat; determining whether or not the predicted position of the eye point is located within a measurement range of a camera member installed to a steering member; and if it is determined that the predicted position of the eye point is not located within the measurement range of the camera member, moving the measurement range of the camera member toward the predicted position of the eye point synchronously with the steering member.
US09514361B2	Classification of range profiles A method and apparatus are provided for classifying range profiles, generated for example by a radar, lidar or sonar. In the method, each in a set of objects of interest is modeled with a probabilistic model. The probabilistic model represents the probabilities of occurrence of different possible sequences of distances between selected features of the object, in different orientations, that are likely to result in peaks of backscatter in a range profile of the object. The probabilistic model is derived from a first probabilistic representation of each selected feature, generated to represent the uncertainty in locating the feature and the uncertainty in observing the feature in a range profile. Classification is achieved by calculating, for each probabilistic model, the probability that the model would generate a given sequence of distances between observed backscatter events in a given range profile. The model generating the given sequence with the greatest probability identifies the object likely to have produced the given range profile. Preferably, the probabilistic models comprise Hidden Markov Models (HMMs).
US09514360B2	Management of reference spectral information and searching A processing application receives peak information associated with multiple known references samples. The processing application partitions a spectrum into multiple different sized range bins such that a substantially equal number of the peaks associated with the known reference samples reside into each of the multiple different sized range bins. To identify a set of candidate reference samples in a library of reference samples that potentially are a good match an unknown sample under test, the processing application compares peaks associated with the unknown sample to the multiple different sized range bins. The greater the number of range bin matches based on peaks in the unknown sample and peaks in a corresponding reference sample, the greater the likelihood that the unknown sample matches the corresponding reference sample.
US09514357B2	Systems and methods for mobile image capture and processing In various embodiments, methods, systems, and computer program products for processing digital images captured by a mobile device are disclosed. Myriad features enable and/or facilitate processing of such digital images using a mobile device that would otherwise be technically impossible or impractical, and furthermore address unique challenges presented by images captured using a camera rather than a traditional flat-bed scanner, paper-feed scanner or multifunction peripheral.
US09514352B2	Fingerprint enrollment using touch sensor data The present invention relates to a method of enrolling a fingerprint of a user's finger, by means of an electronic device comprising a touch sensor having an active area corresponding to a first surface portion of the electronic device; and a fingerprint sensor having an active area corresponding to a second surface portion of the electronic device. The comprises the steps of acquiring a touch sensor signal indicative of a sub-area of the touch sensor being touched by the finger; acquiring a partial fingerprint image of a portion of the fingerprint; a positional relationship between the portion of the fingerprint and the finger based on the sub-area and a positional relationship between the first and second surface portions of the electronic device; and forming a fingerprint template based on acquired partial fingerprint images and the determined positional relationships.
US09514351B2	Processing a fingerprint for fingerprint matching Processing a fingerprint can include determining one or more optimal weights based on ridge flow angles or ridge flow angle differences. Determination of the optimal weight(s) can be based on predicting a ridge flow angle for each cell in a ridge flow map using one or more neighboring cells. The optimal weights may be estimated so as to minimize error between the predicted and actual ridge flow angles. Alternatively, the optimal weight(s) may be determined using a predicted ridge flow angle difference for each cell in a difference map that is based on an actual ridge flow angle difference for one or more neighboring cells. The optimal weights can be estimated to minimize the error between predicted and actual angle differences. Additionally, a correlation penalty may be determined based on an extent of spatial correlation in the ridge flow angle differences in the difference map.
US09514349B2	Method of guiding a user of a portable electronic device The present invention relates to a method of guiding a user of a portable electronic device when operating a fingerprint sensor comprised with the portable electronic device. The invention allows for an improved enrollment process as well as for general improvements when using the fingerprint sensor. The invention also relates to a corresponding electronic device and to a computer program product.
US09514348B2	Image processing apparatus, image processing method, and computer readable medium An image processing apparatus includes an acquisition unit, a determination unit, and a conversion unit. The acquisition unit acquires from a read image including a machine-readable code at least one of a position of the machine-readable code and character information included in the machine-readable code. The determination unit determines, based on the information acquired by the acquisition unit, a conversion method for a character code included in the machine-readable code. The conversion unit performs conversion of the character code in accordance with the conversion method determined by the determination unit.
US09514346B2	Multi-layer optical barcode with security features A multi-layer optical barcode with security features is described herein. An example method includes illuminating a first phosphor layer on a substrate with light having a first wavelength, wherein the first phosphor layer has luminescent properties such that when it is illuminated by light having the first wavelength, it emits light having a second wavelength, the first phosphor layer is divided into a first two-dimensional grid of cells arranged in a first spatial pattern, wherein each cell of the first phosphor layer corresponds to one bit of an identification code, a first portion of the first phosphor layer is removed from a first number of cells of the first two-dimensional grid of cells to expose the substrate for the first number of cells, capturing a first image of the light emitted by the first phosphor layer having the second wavelength, determining whether the first phosphor layer is authentic based on the first image, and determining the identification code based on the first image.
US09514342B1	Wearable radio frequency identification enabled devices Systems (100) and methods (900) for reading Radio Frequency Identification (“RFID”) tags. The methods comprise: coupling a wearable RFID tag reader directly to a person's hand or forearm; transmitting a first interrogation signal from a first antenna of the wearable RFID tag reader being worn on a person's hand or forearm; receiving, by the wearable RFID reader, a first response signal generated by and transmitted from a first RFID tag in response to the first interrogation signal; and processing the first response signal to identify, locate or track a first object of interest.
US09514339B2	Control method, controlled device, user interaction device and computer program product A method for controlling a controlled device is disclosed, wherein the controlled device has a host connection to an RFID tag, the method comprising the following steps: (s1) the controlled device writes operational parameters to the RFID tag through the host connection; (s2) a user interaction device reads the operational parameters from the RFID tag through an RFID connection; (s3) a user changes the operational parameters via a user interface comprised in the user interaction device; (s4) the user interaction device writes the operational parameters to the RFID tag through the RFID connection; (s5) the controlled device reads the operational parameters from the RFID tag through the host connection and adapts its behavior based on the operational parameters. Furthermore, a corresponding controlled device, a user interaction device and a computer program product are disclosed.
US09514338B1	Implantable identification apparatus and related methods of use The apparatus includes information linked to a person by data encoded in a texture. The texture has a pattern, and the texture is formed upon a chip implantable within the person. The pattern may be resolvable by an ultrasound scanner into a pattern image that is computer readable to extract the data from the image when the chip is implanted within the person. The related methods include the step of encoding data upon a chip by forming a pattern with a texture, the data being linked to an identity of the person, and the step of implanting the chip. The methods may include the steps of scanning the implanted chip to obtain a pattern image using an ultrasound scanner, extracting data from the pattern image, and displaying information linked to the person by the data encoded in the pattern, the information residing in a remote database.
US09514333B1	Secure remote application shares A customer support application provides screen sharing of the user's computing device with a remote customer support agent, thereby enabling the customer support agent to view the content displayed on the user's device. At least a portion of the content displayed on the user's device may contain sensitive information. Coordinates corresponding to the content displayed on the user's device may be obtained and the portion of the display corresponding to the coordinates may be obscured from the remote customer support agent.
US09514329B2	Computer-implemented system and method for individual message encryption using a unique key A computer-implemented system and method for individual record encryption is provided. A plurality of records associated with incoming calls to a call center are maintained. A unique encryption key is randomly generated for each record. The records are each encrypted using the encryption key generated for that record. The keys are stored in a location separate from the encrypted records.
US09514328B2	Row-level security in a relational database management system Access control methods provide multilevel and mandatory access control for a database management system. The access control techniques provide access control at the row level in a relational database table. The database table contains a security label column within which is recorded a security label that is defined within a hierarchical security scheme. A user's security label is encoded with security information concerning the user. When a user requests access to a row, a security mechanism compares the user's security information with the security information in the row. If the user's security dominates the row's security, the user is given access to the row.
US09514327B2	Litigation support in cloud-hosted file sharing and collaboration In embodiments, the disclosure provides a method for managing content, including providing an electronic discovery facility of a secure data exchange environment, wherein at least one of a plurality of users of a first entity utilizes a network-based content storage service of a second entity to store content, and wherein the storage and access of the content with the network-based content storage service is tracked by the electronic discovery facility. The method includes receiving, at the electronic discovery facility, a discovery request, the discovery request comprising a request for a legal counsel of a third entity to access content stored on the network-based content storage service, the discovery request being, for example, in association with a litigation discovery action in relation to the first entity. Further, the method includes identifying and securing, by the electronic discovery facility and as a result of the discovery request, at least one item of content on the network-based content storage service; and providing, by the electronic discovery facility of the secure data exchange environment, access to the identified and secured item of content stored on network-based content storage service to the legal counsel of the third entity.
US09514326B1	Serial interpolation for secure membership testing and matching in a secret-split archive The various technologies presented herein relate to analyzing a plurality of shares stored at a plurality of repositories to determine whether a secret from which the shares were formed matches a term in a query. A threshold number of shares are formed with a generating polynomial operating on the secret. A process of serially interpolating the threshold number of shares can be conducted whereby a contribution of a first share is determined, a contribution of a second share is determined while seeded with the contribution of the first share, etc. A value of a final share in the threshold number of shares can be determined and compared with the search term. In the event of the value of the final share and the search term matching, the search term matches the secret in the file from which the shares are formed.
US09514325B2	Secured file system management Systems and methods for establishing a secure file system are disclosed, in which system endpoints such as files and directories in a file system are protected using a security appliance. The security appliance protects each endpoint in the file system from unauthorized access by making those endpoints invisible to unauthorized users. The security appliance organizes users and endpoints into various communities of interest (COI). A user COI groups users such that all users associated with that particular COI have authorization to view the same one or more endpoints located in file storage.
US09514319B2	Database and method for controlling access to a database A method for controlling access to a database is disclosed, as well as a corresponding database system. The method comprises: receiving, from a user, a request for a data post in said database; determining that said user should be allowed access to said requested data post based on a security context associated with said data post and said user; providing said user with access to said data post; and validating, by an external security system, at least one of the user and the data post, said validation being based on a validation field, controlled by the external security system and being associated with said user and/or data post. Hereby, the database can be operated with its native operational procedures, thereby enabling a very fast and efficient performance. At the same time, the validation by the external security system provides a high degree of security.
US09514315B2	Information processing system and control method of information processing system A first information processing device holds data and a key for encryption. A second information processing device does not have rights to share data not encrypted with the first information processing device and a client. The first information processing device transmits data and key to the client when receiving a request to use the data. The first information processing device generates first encrypted data encrypted with the key, and transmits it to the second information processing device. The client transmits information obtained by encrypting the result of processing on the data with the key to the second information processing device until the use of the data ends. The first information processing device acquires second encrypted data received by the second information processing device from the second information processing device, and decrypts and stores it when notified that the use of the data has ended.
US09514314B2	Method and apparatus for efficient computation of one-way chains in cryptographic applications Techniques are disclosed for efficient computation of consecutive values of one-way chains and other one-way graphs in cryptographic applications. The one-way chain or graph may be a chain of length s having positions i=1, 2, . . . s each having a corresponding value vi associated therewith, wherein the value vi is given by vi=h (vi+1), for a given hash function or other one-way function h. An initial distribution of helper values may be stored for the one-way chain of length s, e.g., at positions given by i=2j for 0≦j≦log2 s. A given one of the output values vi at a current position in the one-way chain may be computed utilizing a first helper value previously stored for another position in the one-way chain between the current position and an endpoint of the chain. After computation of the given output value, the positions of the helper values are adjusted so as to facilitate computation of subsequent output values. Advantageously, a storage-computation product associated with generation of the output values of the one-way chain has a complexity O(log s)2).
US09514312B1	Low-memory footprint fingerprinting and indexing for efficiently measuring document similarity and containment A method and system for low-memory footprint fingerprinting and indexing for efficiently measuring document similarity and containment are described. A method may include extracting, by a processor, content from a set of one or more data files. The method may also determine a size of the content and apply a hash function to the content to generate multiple hashes. The method selects a constrained set of the hashes to generate a fixed-size fingerprint representative of the content when the size of the content is greater than a threshold size. The method stores the fixed-size fingerprint representative of the content in an endpoint index for at least partial file content matching by an endpoint device. The method may employ a statistical-based optimization to speed-up query time.
US09514310B2	Gap services router (GSR) A gap services router (GSR) that is a drop-in replacement of an end of life Cisco™ 2811 integrated services router (ISR). The GSR is a routing, switching, and computing platform that provides a technology refresh in the same form factor as the legacy 2811 router. The GSR is one rack unit in size and comprises the latest routing and switching technology from Cisco™, preferably a Cisco™ 5915 embedded services router (ESR) and a Cisco™ embedded services 2020 switch. The GSR contains two WAN ports and twenty-five LAN ports, with power over ethernet capability on all ports. The GSR also optionally includes an embedded server module capable of running the latest virtualization technology. An embedded server module in the GSR includes a removable solid state drive (SSD) that is zeroed upon removal. The GSR is preferably used to replace 2811 ISRs integrated in deployed military equipment.
US09514307B2	Method for producing a secured data object and system A method is provided for producing a secured data object by means of a data processing device. The method includes: generating a data representation value in each case at the end of an interval having a first interval length which is assigned to the data sets of the respective interval of first length, receiving a first time stamp assigned to the respective data representation value, storing the respective data representation value together with the assigned first time stamp, generating an interval representation value in each case at the end of an interval having a second interval length which is greater than the first interval length which is assigned to the data representation values of the respective interval of second length, receiving a second time stamp assigned to the respective interval representation value and storing the respective interval representation value together with the associated second time stamp.
US09514299B2	Information processing device, method for controlling information processing device, program, and information storage medium Authentication data indicates a plurality of types of operation which a user should perform in a predetermined order via a touch panel and a number of fingers, as to each one of the plurality of types of operation, with which the user should touch the touch panel when performing an operation corresponding to the one of the plurality of types of operation. An authentication processing execution unit executes authentication processing by determining, based on a result of detection by the touch panel, whether or not an operation corresponding to each of the plurality of types of operation has been performed in the predetermined order by touching the touch panel with a number of fingers set for each of the plurality of types of operation.
US09514295B2	Quantified identity Determination of a quantified identity using a multi-dimensional, probabilistic identity profiles is contemplated. The quantified identity may be used to authenticate a user entity provided to a point-of-sale device or other interface associated with identity requester in order to verify the corresponding users as who they say they are. The user identity may be determined initially as a function of user inputs made to the identity requester and/or as a function of wireless signaling exchange with devices associated with the user.
US09514290B2	Authorization cache Example embodiments disclosed herein relate to implementing an authorization cache. An authorization fact is determined based on a grant. The authorization fact is cached. The grant is revoked. The authorization fact is revoked based on a grant index.
US09514284B2	Group coaching system and method Group coaching system includes at least a first and a second coaching device, the first device being configured to provide respective first user coaching information to a respective user of the first device, and the second device being configured to provide respective second user coaching information to a respective user of the second device, wherein the system is configured to provide a group coaching of the users of the devices utilizing the respective user coaching information provided by the coaching devices.
US09514281B2	Method and system of longitudinal detection of dementia through lexical and syntactic changes in writing The present invention is a method and system for detecting linguistic markers as signs and indicators of mental illness, even prior to onset of symptoms of the mental illness. The linguistic markers may be detected in diachronic analysis of writing or speech samples. In particular, the present invention may identify lexical and syntactic changes in language due to mental illness. To recognize such changes the present invention may utilize complete, fully parsed texts or speech representing a number of measures. The identification of markers may provide a means of detecting mental illness early on based on a person's use of language. The language may be presented as spontaneous speech or writing, and may include samples of speech and/or writing occurring over time.
US09514278B2	Diagnostics method based on input from multiple users A body function analysis and communication system includes a plurality of wireless communication devices each worn or carried by a respective user and in signal communication with an analysis system. Each wireless communication device is in signal communication with at least one sensor worn by the respective user. The analysis system is configured to determine anomalous response of measurements of the at least one sensor worn by at least one user based on measurements from the plurality of sensors.
US09514272B2	Identification of DNA fragments and structural variations Various short reads can be grouped and identified as coming from a same long DNA fragment (e.g., by using wells with a relatively low-concentration of DNA). A histogram of the genomic coverage of a group of short reads can provide the edges of the corresponding long fragment (pulse). The knowledge of these pulses can provide an ability to determine the haploid genome and to identify structural variations.
US09514271B2	Digital holographic method of measuring cellular activity and measuring apparatus with improved stability Motility contrast imaging (MCI) is a depth-resolved holographic technique to extract cellular and subcellular motion inside tissue. The holographic basis of the measurement technique makes it highly susceptible to mechanical motion. The motility contrast application, in particular, preferably includes increased mechanical stability because the signal is based on time-varying changes caused by cellular motion, which should not be confused with mechanical motion of the system. Apparatus for motility contrast imaging that provides increased mechanical stability is disclosed. It is based on common-path configurations, in which the signal and reference beams share optical elements in their paths to the detector. The two beams share mechanical motions in common, and hence these motions do not contribute to the signal.
US09514270B2	Gaming system, gaming device, and method for providing benefit in a future play of a wagering game On embodiment of the gaming system: receives a base wager from a player for a play of a wagering game; enables the player to select to cause a modifier to be applied to the play of the wagering game or the modifier to not be applied to the play of the wagering game; displays an outcome of the play of the wagering game; if the outcome is a losing outcome and if the player caused the modifier to be applied to the play of the wagering game, reset the modifier; if the outcome is the losing outcome and if the player caused the modifier to not be applied to the play of the wagering game, increase the modifier; if the outcome is a winning outcome and the player caused the modifier to not be applied to the play of the wagering game, provide a first award to player based on the winning outcome and the base wager, and reset the modifier; and if the outcome is a winning outcome and the player caused the modifier to be applied to the play of the wagering game provide a second different award to the player based on the winning outcome, the base wager, and the modifier, and reset the modifier.
US09514269B1	Determining expected failure modes of balloons within a balloon network Example methods and systems for determining failure modes of balloons within a balloon network are described. One example method includes: (a) determining at least one cohort balloon of a first balloon, where the first balloon is operating as part of a balloon network and where each cohort balloon shares at least one property with the first balloon, (b) determining at least one expected failure mode based at least in part on at least one failure of at least one cohort balloon, (c) determining a predicted failure mode of the first balloon based at least in part on the at least one expected failure mode, and (d) causing the first balloon to operate within the balloon network based at least in part on the predicted failure mode of the first balloon.
US09514268B2	Interposer defect coverage metric and method to maximize the same A method includes receiving a design of an interposer having nets, probe pads, and micro-bumps. The nets connect the micro-bumps. The probe pads are initially unconnected to the nets. The method further includes initializing a first set to logically include the nets; processing the first set such that every net interconnecting more than two micro-bumps is divided into a plurality of nets and every two micro-bumps are interconnected by one net; calculating an untested length for each net in the first set; selecting a net N from the first set wherein the net N has the maximum untested length in the first set, the net N representing at least a portion of a net P of the nets; selecting a pair of probe pads that are unconnected to the nets; and connecting the pair of probe pads to the net P by two dummy nets.
US09514267B2	System on chip I/O connectivity verification in presence of low power design considerations Formal verification of connectivity of a circuit, for example, a circuit representing a system on chip I/O ring is performed with low power considerations. The formal verification determines whether the connectivity of a circuit remains valid when low power design specification is introduced. The system receives assertions representing connectivity of the circuit. The system receives low power design specification for a circuit that describes power states of power domains of the circuit. The system generates combinational constraints representing valid power states of power domains of the circuit. The system performs formal verification based on the assertions representing the connectivity of the circuit and the combinational constraints representing the power states of power domains of the circuit. The result of the formal verification is used to determine whether the connectivity of the circuit is valid in view of the low power design specification.
US09514266B2	Method and system of determining colorability of a layout A method of determining colorability of a layout includes generating a conflict diagram based on circuit information. The conflict diagram includes a plurality of nodes, each node of the plurality of nodes is connected to at least another node of the plurality of nodes by a link, and each node of the plurality of nodes has a degree equal to a number of links connected to the node. The method includes setting a degree of each anchor node within the conflict diagram to a value of n, where n is equal to a number of mask usable to manufacture the layout. The method further includes excluding, using a processor, nodes having a degree less than n from the conflict diagram. The method further includes performing a color status check on the conflict diagram after the excluding; and determining whether the layout is colorable based on the performed color status check.
US09514261B2	Partitioning method and system for 3D IC A method comprises: receiving a circuit design comprising networks of first devices fabricated by a first fabrication process; selecting second devices to be fabricated by a second process; substituting the second devices for the first devices in the networks of the circuit design; sorting the second devices within a selected one of the networks by device area from a largest device area to a smallest device area; and assigning each second device in the selected network to be fabricated in a respective tier of a plurality of tiers of a three dimensional integrated circuit (3D IC) for which a total area of second devices previously assigned to said respective tier is the smallest, the second devices being assigned sequentially according to the sorting.
US09514253B2	Molecular design apparatus and method A molecular design apparatus is disclosed. Expansion coefficients applied to basis functions are calculated by expanding molecular orbital functions used to draw molecular orbitals based on the molecular structure design data. First molecular orbital data in which the expansion coefficients are corresponded to the basis functions is stored to the storage part. A coefficient threshold is determined for the expansion coefficients of the basis functions by using a drawing threshold which indicates a constant function value, to draw the molecular orbital functions as an isosurface of the constant function value on a screen of a display device. Second molecular orbital data pertinent to the expansion coefficients is stored based on the coefficient threshold to the storage part.
US09514249B2	Re-arrangeable, and customizable access controllable data tree hierarchies, and methods of use thereof Improved, re-arrangeable, and/or customizable data tree hierarchies, and methods of use thereof, are provided. In one embodiment, a method for customizing a data tree hierarchy includes providing, to a plurality of communication devices that are each associated with one or more respective users, access to a data tree hierarchy. The data tree hierarchy is adapted to include a plurality of data items, and each of the plurality of data items is positionable at one of a plurality of hierarchal levels. The method also includes receiving input from one or more of the communication devices to change a position of one or more of the plurality of data items in the data tree hierarchy, and changing the position of the one or more of the plurality of data items in the data tree hierarchy in response to receiving the input from the one or more of the communication devices.
US09514248B1	System to group internet devices based upon device usage A system comprising: an index structure that associates devices with device feature information; a pairing engine to determine device pairs based upon device feature information; a feature vector generation engine to produce feature vectors corresponding to determined device pairs based upon feature values associated within the index structure with devices of the determined device pairs; a scoring engine to determine scores to associate with determined device pairs based upon produced feature vectors; a graph structure, wherein nodes within the graph structure represent devices of determined device pairs, and wherein edges between pairs of nodes within the graph structure indicate determined device pairs; a clustering engine to identify respective clusters of three or more nodes within the graph structure that represent respective groups of devices.
US09514242B2	Presenting dynamically changing images in a limited rendering environment Methods, systems, and techniques for presenting dynamically changing images in a limited rendering environment are described. Example embodiments provide a client display manager that is configured to receive image blocks representing modifications or updates to a dynamically changing image. The client display manager may then layer the received image blocks upon one another, and then cause the layered image blocks to be presented on a display device as a single, composited image. In some embodiments, multiple image blocks may be coalesced or otherwise combined into a single image transmitted to the client display manager, where regions of the single image that are not occupied by the multiple image blocks are transparent.
US09514239B2	System and method for managing content on a network interface The disclosed invention is a system and method (collectively the “system”) for the automated management of content on a network interface. The network interface can be a web site on the World Wide Web, an Internet location, an intranet location, an extranet location, or some other form of network interface (collectively “web site”). The system can automatically create applications and links to those applications without human intervention. Examples of automated applications include newsroom applications, calendar of events, employment opportunities, project portfolio, biographies, frequently asked questions, document library, category management, product catalogs, e-mail broadcasts, surveys, and newsletters. Fully normalized hierarchies of business rules and user profiles can be supported by the system to facilitate automation and configurability. Multiple content providers can manage a single web site in a simultaneous or substantially simultaneous manner. In ASP embodiments, multiple organizations can use the system to manage multiple web sites in a substantially simultaneous manner.
US09514228B2	Banning tags An embodiment relates generally to a method of editorial control. The method includes providing for at least one piece of content and determining a set of banned tags. Each banned tag is prevented from being applied to the at least one piece of content. The method also includes associating the set of banned tags to the at least one piece of content as a policy and receiving a tag term for the at least one piece of content at the first website. The method further includes comparing the tag term with the policy.
US09514226B2	Methods and systems useful for identifying the most influent social media users in query-based social data streams The present invention relates to novel methods and implementing systems that afford a user the ability to analyze a certain stream of data, e.g., independent of size, and identify the people that influence the conversation.
US09514219B2	System and method for classifying documents via propagation A system and method for classifying documents via propagation are provided. Text highlighted by a user within at least one document is identified. The document is associated with a classification code based on the highlighted text. At least a portion of the highlighted text is compared with one or more unclassified documents. Those unclassified documents with text that is the same as the compared portion of the highlighted text in the document are identified. The classification code of the document is automatically assigned to the identified unclassified documents with text that is the same. Further, those unclassified documents with text that is similar to the compared portion of the highlighted text in the document are identified. The unclassified documents with similar text are provided to the user for review and classification.
US09514218B2	Ambiguous structured search queries on online social networks In one embodiment, a method includes accessing a social graph that includes a plurality of nodes and edges, receiving an unstructured text query comprising an ambiguous n-gram, identifying nodes and edges that correspond to the ambiguous n-gram, generating a first set of structured queries corresponding to the identified second nodes and edges, receiving from the first user a selection of a first structured query form the first set, and generating a second set of structured queries based on the selected first structured query.
US09514217B2	Message index subdivided based on time intervals During a storage technique, multiple messages (such as emails) associated with a user of a communication application are received. Then, the multiple messages are stored in a message table associated with the user and the multiple messages are indexed in an index associated with the user. This index may be divided into multiple divisions if a total number of messages stored in the message table exceeds a threshold value, where each division corresponds to messages received during a different time interval.
US09514216B2	Automatic classification of segmented portions of web pages Exemplary methods and apparatuses are provided which may be used for classifying and indexing segmented portions of web pages and providing related information for use in information extraction and/or information retrieval systems. In an embodiment, an index of segmented portions may be used by a search engine to respond to a search query. In an embodiment, one or more machine learned models may be used to identify one or more feature properties of a plurality of segmented portions within one or more files, or otherwise inferable from the one or more files. In an embodiment, one or more machine learned models may be used to classify one or more of a plurality of segmented portions as being at least one of a plurality of segment types.
US09514213B2	Per-attribute data clustering using tri-point data arbitration Systems, methods, and other embodiments associated with clustering using tri-point arbitration are described. In one embodiment, a method includes selecting a data point pair and a set of arbiter points. A tri-point arbitration similarity is calculated for data point pairs based, at least in part, on a distance between the first and second data points and the arbiter points. In one embodiment, similar data points are clustered.
US09514208B2	Method and system of stateless data replication in a distributed database system In one exemplary embodiment, a method includes the step of executing, with at least one processor, a main database node server in a source-database node of a source-database cluster. The main database node server manages database server operations. The main database node server communicates a source-database cluster state and a specified server operation metadata to a data-shipping daemon. The specified server operation metadata, includes an information about server operation occurring on the source-database node. Another step includes executing a data-shipping daemon in the source-database node. The data-shipping daemon receives the specified server operation metadata and stores the specified server operation metadata in a digest log. The data log includes a file of the specified server operation metadata. The data-shipping daemon reads the digest log and communicate data referred to in the specified server operation metadata in the digest log to a destination database node in a destination database cluster.
US09514207B1	Navigating a website using visual analytics and a dynamic data source Embodiments of the present invention disclose a method for identifying relevant content in a social media website. A data set is identified using a computer. A plurality of electronic records of the data set are received, wherein the electronic records are a result of the data mining. A plurality of ontologies is generated based on the electronic records and a subset of the plurality of ontologies is displayed on a user device. A user input is recorded as a user record and the set of ontologies that is displayed is modified. A second subset of ontologies for display on the user's device is generated, based on the modified popularity value. A modified display value based on the modified popularity value is determined and the second subset of ontologies is displayed based on the modified display value.
US09514203B2	Data discovery and analysis tools Resources for data lineage discovery, data lineage analysis, role-based security, notification. The resources may include or involve machine readable memory that is configured to store a technical data element (“TDE”); a receiver that is configured to receive a query for data lineage information corresponding to a business element identifier; and a processor configured to: register a logical association between the business element identifier and the TDE; and formulate the data lineage information of the TDE associated with the business element identifier. The receiver may be configured to receive a criterion that is required to access one or more technical data elements (“TDEs”) associated with the business element identifier. The receiver may be configured to receive an election to receive a notification of a change of data lineage. The processor may be configured to toggle between a first data lineage graph and a second data lineage graph.
US09514202B2	Information processing apparatus, information processing method, program for information processing apparatus and recording medium The present invention includes: acquiring plural web pages of an identical category into which targets stated in the web pages are classified (S1); acquiring an attribute-related term related to an attribute of the targets stated in the web pages or an attribute description pattern used to describe the attribute of the targets as initial data (S2); extracting the attribute-related term of the attribute matching the attribute description pattern from the plural web pages (S3); and extracting an attribute description pattern matching the attribute-related term from plural web pages (S4).
US09514201B2	Method and system for non-intrusive event sequencing A system has a repository that stores a plurality of events. Each event requests to utilize one or more functions in a component. An event sequencing module analyzes an event sequencing key of the event if the event requests a function having a component definition that includes an event sequence qualifier. The event sequencing module grants a lock to the event for the function if no other event having the same value for the event sequencing key has the lock for the function. The event sequencing module prevents the event from being processed if another event having the same value for the event sequencing key has the lock for the function. The event sequencing key is composed of one or more object attributes. The system has a worker server that receives the event, if the event obtains the lock, and processes the function requested by the event.
US09514198B1	Suggesting a tag to promote a discussion topic Example techniques for suggesting a tag to promote a discussion topic may include the following operations: receiving text into a display field; performing a search to identify a topic relating to the text, where the topic is among plural topics being discussed on a social networking service; identifying a title of a discussion on the social network service that relates to the identified topic; ranking the title among other titles of discussion topics based, at least in part, on a number of members of the social networking service that are participating in the discussion; and suggesting, based on the ranking, a text entry for the display field that promotes posting to the discussion identified by the title.
US09514194B1	Website duration performance based on category durations Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for determining duration performance of websites. In one aspect, a method includes, for each website of a plurality of websites: obtaining duration measurements of user device visits to resources of the website for a plurality of different users, obtaining data describing a plurality of categories to which the website belongs; determining, for each category of the plurality of categories to which the website belongs, a category duration score for the category based on the website duration score for the website; and determining, from one or more of the category duration scores, a duration performance score for the website.
US09514187B2	Techniques for using zone map information for post index access pruning Techniques for using zone map information for post index access pruning. In one embodiment, for example, a method for using zone map information for post index access pruning comprises: receiving a query statement comprising a first filter predicate on an indexed column of a database table and a second filter predicate on a zoned column of a database table; identifying zero or more pruneable zones of a zone map based on a value for the zoned column in the second filter predicate; obtaining a set of data record addresses from an index on the indexed column based on a value for the indexed column in the first filter predicate; and pruning, from access paths for processing the query statement, any data records, corresponding to data record addresses in the set of data record addresses, that are physically located in one of the pruneable zones.
US09514182B2	Techniques for managing data relationships Techniques for managing data relationships are presented. A database element from a first database table is linked with a database element of a second database table via a Graphical User Interface as directed by a user. The link establishes a data relationship having attributes and properties. The relationship along with the attributes and properties are graphically presented to the user for inspection and analysis.
US09514180B1	Workload discovery using real-time analysis of input streams Provided are techniques for workload discovery using real-time analysis of input streams. For a meta workload, changes to data objects made by change operations that are in a replication change stream are stored into a recovery log. Using an analytics engine, one of the recovery log and the replication change stream are analyzed to identify associations between the data objects based on usage and access patterns. The associations are used to identify sub-workloads of the meta workload that form consistency groups for replication.
US09514179B2	Table boundary detection in data blocks for compression Data is converted into a minimized data representation using a suffix tree by sorting data streams according to symbolic representations for building table boundary formation patterns. The converted data is fully reversible for reconstruction while retaining minimal header information. A scanning operation is performed by searching a suffix of each of the sorted data streams for identifying a data sequence that includes a first symbol representing textual data, and a second symbol representing numerical data. The suffix tree for the converted data is then built.
US09514178B2	Table boundary detection in data blocks for compression Data is converted into a minimized data representation using a suffix tree by sorting data streams according to symbolic representations for building table boundary formation patterns. The converted data is fully reversible for reconstruction while retaining minimal header information. A scanning operation is performed by searching a suffix of each of the sorted data streams for identifying a data sequence that includes a first symbol representing textual data, and a second symbol representing numerical data. The suffix tree for the converted data is then built.
US09514177B2	Method, apparatus and computer program for detecting deviations in data repositories Techniques for detecting deviations in data repositories comprising a plurality of data posts, each data post comprising a number of data attribute values. A method comprises identifying comparable data post pairs, each pair comprising first and second data posts in first and second data repositories, respectively, wherein the first data post in a pair is comparable with the second data post of the same pair. Data attribute values of the first data post are compared with data attribute values of the second data post within a plurality of comparable data post pairs to determine quantified similarities between the data attribute values of the first and second data posts of each comparable data post pair. Statistical values of the quantified similarities are calculated by comparing comparable determined quantified similarities for each data post pair, and the calculated statistical values are used for detecting deviations for a first comparable data post pair.
US09514174B2	Classification of data in main memory database systems Various technologies described herein pertain to classifying data in a main memory database system. A record access log can include a sequence of record access observations logged over a time period from a beginning time to an end time. Each of the record access observations can include a respective record ID and read timestamp. The record access log can be scanned in reverse from the end time towards the beginning time. Further, access frequency estimate data for records corresponding to record IDs read from the record access log can be calculated. The access frequency estimate data can include respective upper bounds and respective lower bounds of access frequency estimates for each of the records. Moreover, the records can be classified based on the respective upper bounds and the respective lower bounds of the access frequency estimates, such that K records can be classified as being frequently accessed records.
US09514172B2	Incremental maintenance of inverted indexes for approximate string matching In embodiments of the disclosed technology, indexes, such as inverted indexes, are updated only as necessary to guarantee answer precision within predefined thresholds which are determined with little cost in comparison to the updates of the indexes themselves. With the present technology, a batch of daily updates can be processed in a matter of minutes, rather than a few hours for rebuilding an index, and a query may be answered with assurances that the results are accurate or within a threshold of accuracy.
US09514170B1	Priority queue using two differently-indexed single-index tables Methods and apparatus for efficient priority queues using single-index tables are disclosed. In response to a request to generate an instance of a priority queue using a database that permits no more than one index per table, an identifier-indexed table and a priority-indexed table are set up. In response to a request to insert a queue entry with a given identifier and a given priority, one tuple is inserted into each table. In response to a request to remove an entry with a specified identifier, a tuple with the specified identifier is removed from the identifier-indexed table, while the removal of the corresponding tuple from the priority-indexed table may be deferred.
US09514169B2	Columnar table data protection Shuffling data stored in columnar tables improves data storage security, particularly when used in conjunction with other security operations, such as tokenization and cryptography. A data table is accessed, and pointer values of at least one column of the accessed table are shuffled, generating a protected table. An index table mapping index values to the shuffled pointer values is generated, allowing a user with access to both the protected table and the index table to generate the original table. Without both tables, users are only able to see either the shuffled data or the index values. Example shuffling methods include, but are not limited to, random shuffling, grouped shuffling, sorting by column value, and sorting by index value.
US09514167B2	Behavior based record linkage A computer implemented method for matching data records from multiple entities comprising providing respective transaction logs for the entities representing actions performed by or in respect of the entities, determining a matching score using the transaction logs for respective pairs of the entities and for predetermined combinations of merged entities by generating a measure representing a gain in behavior recognition for the entities before and after merging, and using the gain as a matching score.
US09514164B1	Selectively migrating data between databases based on dependencies of database entities A device may receive information that identifies a source database and a destination database, and may receive information that identifies an entity instance included in the source database. The device may determine a base data structure, included in the source database, that is associated with the entity instance, and may generate a dependency graph that identifies a dependency between the base data structure and another data structure. The device may receive an instruction to perform an operation associated with the destination database, and may determine an evaluation order for traversing the dependency graph to generate code for performing the operation. The device may traverse the dependency graph in the evaluation order, and may generate code corresponding to respective data structures identified by the dependency graph. The device may cause execution of the code, based on the evaluation order, which may cause the operation to be performed.
US09514162B2	Smart polling frequency For smart polling frequency in datastores by a processor device in a computing environment, individual polling operations are performed for refreshing each one of the datastores according to polling frequencies. Each one of the polling frequencies depends on recent system activity and each one of the datastores. Each of the polling frequencies are dynamically adjusted for each one of the datastores.
US09514161B2	Guaranteeing anonymity of linked data graphs A method, system and computer program product for transforming a Linked Data graph into a corresponding anonymous Linked Data graph, in which semantics is preserved and links can be followed to expand the anonymous graph up to r times without breaching anonymity (i.e., anonymity under r-dereferenceability). Anonymizing a Linked Data graph under r-dereferenceability provides privacy guarantees of k-anonymity or l-diversity variants, while taking into account and preserving the rich semantics of the graph.
US09514159B2	Database insertions in a stream database environment Methods and systems for storing stream data in a stream application are disclosed. The stream application is composed from a plurality of processing elements executing on one or more compute nodes. The plurality of processing elements is communicatively coupled to a management system. The management system is configured to monitor and control operations of the plurality of processing elements. A trigger rule, which includes a trigger condition, is loaded on a selected processing element in the plurality of process elements. The stream data is then monitored at the first processing element to determine if the trigger condition relative to the stream data has occurred. The stream data is stored in a database when the trigger condition occurs. The stream data is stored in the database according to the trigger rule.
US09514152B2	Method and apparatus for storage of data records Method and data access unit for storage of data records for creating a serialized charging record formatted for insertion into a charging database. The method includes traversing the hierarchical charging record and for each part node of said hierarchical charging record identifying an attribute of the part node and determining if said attribute is a key attribute or a search attribute and if affirmative storing an attribute value of said attribute in a field of the serialized charging record based on a charging database configuration definition. A part segment comprising the attribute value and a data value token is stored in a payload body field of the serialized charging record with a part node indicator representing the location of the part node in the hierarchical charging record based on a hierarchical charging record configuration definition. A method and data access unit for creating a hierarchical charging record is also disclosed. An advantage is that a serialized charging record may be stored in one storage entity such as a table row.
US09514149B2	Hierarchical data compression and computation According to embodiments of the present invention, machines, systems, methods and computer program products for hierarchical compression of data are presented comprising creating a compression hierarchy of compression nodes, wherein each compression node is associated with a compression operation to produce compressed data. An output of any of the compression nodes may be compressed by another compression node or the same compression node. A path of one or more compression nodes is determined through said compression hierarchy based upon compression statistics to compress data, and the data is compressed by the compression nodes of the path. Various computational techniques are presented herein for manipulating the compression hierarchy to defer or reduce computation during query evaluation.
US09514139B2	Space efficient cascading point in time copying Embodiments for space-efficient cascading point-in-time copying of source data by creating a plurality of cascading point-in-time target copies, the target copies being created at different points in time, are provided. Data is physically copied form the source to a repository to create a physical copy, and a data mapping is created that associates the physical copy with a most recent target copy.
US09514131B1	Medication container encoding, verification, and identification A medication container encoding, verification and identification method is provided that includes receiving data characterizing a medication, generating an identifier encapsulating the data and applying an identifier to a medication container such that it is automatically readable by a medication device. Related apparatus, systems, methods and articles are also described.
US09514125B1	Linguistic based determination of text location origin A method includes receiving a text and identifying a set of linguistic characteristics contained in the text, where linguistic characteristics include grammatical, syntactic, and idiomatic features of the text. The method also includes determining a plurality of locations of origin in which the text was potentially written based on the set of linguistic characteristics. The method also includes retrieving a set of reference documents for each location of origin in the plurality of locations of origin and producing a set of proximity scores by performing a set of proximity checks using the set of linguistic characteristics, the set of reference documents, and the text, wherein the proximity checks analyze how often and how close linguistic characteristics are to one another. The method also includes ranking the plurality of locations of origin based on the set of proximity scores and returning a set of one or more ranked locations of origin.
US09514119B2	Contributor identification tool An electronic document is parsed against a plurality of phrases. Each of the plurality of phrases indicates a text effect. It is determined that the electronic document includes a phrase at least similar to a first phrase of the plurality of phrases. A first contributor of the electronic document that is associated with the phrase is determined. A first text effect indicated by the phrase is determined. A mapping is created between the first contributor and the first text effect indicated by the phrase. The mapping is supplied for presenting of the electronic document.
US09514113B1	Methods for automatic footnote generation A method includes accessing a document and generating a ranking score for each of a plurality of passages from external documents. The ranking score is based at least on a degree of semantic similarity of each passage with respect to a portion of the document. The method also includes modifying the document to include a footnote link for the portion of the document, the footnote link including a link to the external document having the highest ranked passage therein, if the ranking score of the highest ranked passage with respect to the portion of the document exceeds a threshold value. The document is not modified to include the footnote link for the portion of the document if the ranking score of the highest ranked passage with respect to the portion of the document does not exceed a threshold value.
US09514111B1	Providing autocomplete suggestions Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for providing autocomplete suggestions. A computing device can receive an n-gram of characters. Cached autocomplete suggestions can be identified in a local cache of the computing device. Additional autocomplete suggestions can be requested at a first time. The computing device can prevent presentation of the cached autocomplete suggestions until a presentation event occurs. The presentation event can include (i) receiving the requested additional autocomplete suggestions by the computing device or (ii) the end of a predetermined period after the first time. The computing device can determine that that the presentation event has occurred, and in response, can display one or more autocomplete suggestions.
US09514108B1	Automatic reference note generator Apparatuses, methods, and systems for automatic reference note generation are disclosed herein. The method includes identifying an information element that has been copied to a transfer buffer, collecting source reference information associated with the information element, wherein the source reference information includes at least one source identifier indicative of an origin of the information element, generating a reference note based on the source reference information and a reference note format specification, inserting the information element into a destination document, inserting the reference note into the destination document, wherein the reference note is associated with the information element.
US09514105B2	Reordering nodes in a hierarchical structure This disclosure describes a user interface and methods for quickly and easily modifying graphical content. Specifically, content having a hierarchical format may be received in a content pane. The hierarchical format may include one or more hierarchical levels and a plurality of content portions occupying one or more hierarchical positions within each of the one or more hierarchical levels. Further, a graphical definition may be applied to the content creating graphical content. As will be appreciated, the graphical content may comprise a hierarchical structure corresponding to the hierarchical format of the content. The hierarchical structure may include a plurality of nodes occupying one or more node positions within each of one or more node levels. A content portion occupying a hierarchical position may be reordered within a hierarchical level and may automatically cause a corresponding node in a corresponding node position to be reordered within a corresponding node level.
US09514104B2	Opening network-enabled electronic documents System(s), method(s), and/or technique(s) (“tools”) are described that enable a user to open a network-enabled electronic document in either a specific software application associated with the electronic document or a network browser. In some cases the tools do so using a single link. On selection of the link, if the user's computing device has access to the specific software application, the tools may load the electronic document using that application. Or, if the user's computing device does not have access to the specific software application, the tools may render the electronic document with a network browser. In so doing, the tools may make the document available to a larger set of potential users through their browsers, allow users the convenience of accessing the document within a browser, optimize users' experience in working with the document through a specific software application, or provide a simpler opening procedure.
US09514101B2	Using content structure to socially connect users The structure of a digital content item is used to socially connect users consuming the digital content item. The structured representation of the digital content item is determined. This structured representation is analyzed to identify key events within the digital content item. A user's current location within the digital content item is identified. Social communications of the user are filtered responsive to the user's current location and the identified key events within the digital content item. In this way, the user may peruse social media without inadvertently reading communications that give away (e.g., spoil) key events such as important plot points.
US09514099B1	Documentation system Disclosed are various embodiments for a documentation system. Documentation topics for publishing in a node are received from a client. Embodiments of the disclosure determine whether the documentation topic has been assigned a topic identifier. Topic identifiers are assigned if the documentation topic has not been assigned a topic identifier and the documentation topic is assigned to at least one node in the documentation system. The documentation topics are stored in a data store and the topic identifiers are transmitted to the client. The topics are then published in at least one node of the documentation system.
US09514098B1	Iteratively learning coreference embeddings of noun phrases using feature representations that include distributed word representations of the noun phrases Methods and apparatus related to determining coreference resolution using distributed word representations. Distributed word representations, indicative of syntactic and semantic features, may be identified for one or more noun phrases. For each of the one or more noun phrases, a referring feature representation and an antecedent feature representation may be determined, where the referring feature representation includes the distributed word representation, and the antecedent feature representation includes the distributed word representation augmented by one or more antecedent features. In some implementations the referring feature representation may be augmented by one or more referring features. Coreference embeddings of the referring and antecedent feature representations of the one or more noun phrases may be learned. Distance measures between two noun phrases may be determined based on the coreference embeddings.
US09514094B2	Processing data sets using dedicated logic units to prevent data collision in a pipelined stream processor There is provided a method for processing multiple sets of data concurrently in a statically scheduled pipelined stream processor by allowing a data set to enter the pipeline while another data set is being processed. Dedicated logic units enable independent control of each of the data sets being processed.
US09514093B2	Method and apparatus for stacking core and uncore dies having landing slots An apparatus and method are described for stacking a plurality of cores. For example, one embodiment of an apparatus comprises: a package; an uncore die mounted on the package, the uncore die comprising a plurality of exposed landing slots, each landing slot including an inter-die interface usable to connect vertically to a cores die, the uncore die including a plurality of uncore components usable by cores within the cores die including a memory controller component, a level 3 (L3) cache, a system memory or system memory interface, and a core interconnect fabric or bus; and a first cores die comprising a first plurality of cores, the cores spaced on the first cores die to correspond to all or a first subset of the landing slots on the uncore die, each of the cores having an inter-die interface positioned to be communicatively coupled to a corresponding inter-die interface within a landing slot on the uncore die when the first cores die is vertically coupled on top of the uncore die, wherein the communicative coupling between the inter-die interface of a core and the inter-die interface of its corresponding landing slot communicatively couples the core to the uncore components of the uncore die.
US09514086B2	Configuration switch for a broadcast bus A bidirectional bus system is provided. The bidirectional bus system includes a plurality of bus slaves configured to couple to a bidirectional bus. Each bus slave of the plurality of bus slaves has a switch operated by a switch control to selectably couple and decouple an upstream portion and a downstream portion of the bidirectional bus relative to the bus slave, with the switch control being powered by activity on the bidirectional bus. A method of operating a bus is also provided.
US09514081B2	Asynchronous circuit with sequential write operations The asynchronous circuit includes an input channel, a divergence operator connecting the input channel to a plurality of intermediate channels, a convergence operator gathering the intermediate channels into a single output channel, a main sequencer including a plurality of sequentially-activated control channels, each intermediate channel being associated to a control channel, and a switch arranged in a request path of one of the intermediate channels and connected to the last active control channel. The circuit further includes a memory circuit, arranged in each of the other intermediate channels, connected to the associated control channel and configured to transmit the request signal of the associated intermediate channel to the output channel and to modify an output state of the associated intermediate channel, by means of the main sequencer, without requiring any state change of the input channel.
US09514077B2	Routing of messages A method to provide transfer of data without the use of a network from an application program to an embedded device. A routing service establishes a communication channel without the use of a local area network. The routing service then manages the control of this communication channel for the transfer of data and closes the channel in an appropriate period.
US09514076B2	Optimized two-socket/four-socket server architecture An information handling system is set forth which includes a fully connected 4S topology that can also be populated with two processors and two link modules (e.g., two passive “slugs”) to implement a fully connected 2S topology. More specifically, the link module is a printed circuit board that implements a loopback connection between certain links of the architecture. In certain embodiment, the link module includes no electrical components. The link module merely includes a set of electrical connections (e.g., copper traces) connecting pads (e.g., gold plated pads) on a thick printed circuit board (PCB) dielectric material that is shaped to fit the processor socket. The link module is used to carry user data when the information handling system is configured in a 2S topology. The link module includes proper lane assignment that allows the module to be passive without performance reduction.
US09514073B2	Device and method for global time information in event-controlled bus communication In a method for exchanging data in messages between users of a CAN bus system, the users have their own time bases; a first user functioning as timer transmits a reference message having a specifiable identifier via the bus, which includes a first time information with regard to the time base of the first user; the at least second user, using its time base forms its own second time information as a function of the first time information of the first user in such a way that, from the deviation of the first and the second time information a correction value is ascertained, so that from the first time information of the first user as the timer, the global time for the bus system is yielded.
US09514066B1	Reconfigurable interface and method of configuring a reconfigurable interface A real-time reconfigurable input/output interface of a controller and a method of reconfiguring the same. The reconfigurable interface enables the controller to communicate with a plurality of peripheral digital subsystem blocks, and includes an input/output interface, a profile memory, and a state machine. The input/output interface includes a plurality of data lines including a shared portion that are shared among the plurality of peripheral digital subsystem blocks. The profile memory stores a plurality of interface profiles, each interface profile defining a configuration of the input/output interface to communicate with an associated one of the peripheral blocks. The state machine is coupled to the profile memory to receive interface profiles and to the input/output interface. In response to each request to communicate with a particular peripheral block, the state machine configures the input/output interface according to the interface profile associated with the particular peripheral block.
US09514064B2	Protection scheme for embedded code A code protection scheme for controlling access to a memory region in an integrated circuit includes a processor with an instruction pipeline that includes multiple processing stages. A first processing stage receives one or more instructions. A second processing stage receives address information identifying a protected memory region of the memory from the first processing stage and protection information for an identified protected memory region. The protection information indicates a protection state assigned to each protected memory region. Based on the instruction type of the received instruction and the protection information associated with a particular protected memory region, the second processing stage determines whether to enable or disable access to the particular protected memory region by the processor or other external host.
US09514062B2	Storage method for a gaming machine In a first aspect the invention provides a storage method for a gaming machine, including allocating program code to one of at least two program categories including a first category of program code that is expected to be modified more frequently than a second category of program code and storing program code from the first and second categories in logically separate storage areas.
US09514061B1	Method and apparatus for cache tag compression A memory structure compresses a portion of a memory tag using an indexed tag compression structure. A set of higher order bits of the memory tag may be stored in the indexed tag compression structure, where the set of higher order bits are identified by an index value. A tag array stores a set of lower order bits of the memory tag and the index value identifying the entry in the tag compression structure storing the set of higher order bits of the memory tag. The memory tag may comprise at least a portion of a memory address of a data element stored in a data array.
US09514060B2	Device, system and method of accessing data stored in a memory Device, system and method of accessing data stored in a memory. For example, a device may include a memory to store a plurality of data items to be accessed by a processor; a cache manager to manage, a cache within the memory, the cache including a plurality of pointer entries, wherein each pointer entry includes an identifier of a respective data item and a pointer to an address of the data item; and a search module to receive from the cache manager an identifier of a requested data item, search the plurality of pointer entries for the identifier of the requested data item and, if a pointer entry is detected to include an identifier of a respective data item that matches the identifier of the requested data item then, provide the cache manager with the pointer from the detected entry. Other embodiments are described and claimed.
US09514055B2	Distributed media cache for data storage systems This disclosure is related to distributed media cache for data storage systems, such as disc drives, flash devices, or hybrid devices. In one example, a data storage device comprises a data storage medium and a controller adapted to selectively divide a media cache into a plurality of physically separate media cache portions on the data storage medium based on a physical attribute of the data storage medium and to store data received from a host system into the media cache portions.
US09514054B2	Method to persistent invalidation to ensure cache durability A method and system of persistent cache invalidation ensures cache durability. A storage filter driver of a storage input/output (I/O) stack of a server may be used to capture (i.e., track) write requests made to storage devices prior to the persistent cache becoming operational. Entries in the cache having overlapping address ranges with the tracked write requests may be invalidated before the cache is deemed operational. In this manner, the cache remains consistent with the backing store across the administrative actions or failure event (albeit with less valid entries). Notably, the filter driver tracks (i.e., captures) metadata of the write request (i.e., address range and size of the request) to support invalidation of matching cache entries. As such, the filter driver need not store (record) data associated with the write request.
US09514053B2	Providing memory system programming interfacing A memory system implements a plurality of cache eviction policies, a plurality of virtual address modification policies, or both. One or more application programming interfaces provide access to memory allocation and parameters thereof relating to zero or more cache eviction policies and/or zero or more virtual address modification policies associated with memory received via a memory allocation request. The provided application programming interfaces are usable by various software elements, such as any one or more of basic input/output system, driver, operating system, hypervisor, and application software elements. Memory allocated via the application programming interfaces is optionally managed via one or more heaps, such as one heap per unique combination of values for each of any one or more parameters including eviction policy, virtual address modification policy, structure-size, and element-size parameters.
US09514050B1	Caching in multicore and multiprocessor architectures A multicore processor comprises a plurality of cache memories, and a plurality of processor cores, each associated with one of the cache memories. Each of at least some of the cache memories is configured to maintain at least a portion of the cache memory in which each cache line is dynamically managed as either local to the associated processor core or shared among multiple processor cores.
US09514048B1	Inducing transactional aborts in other processing threads In a transactional memory environment, a computer-implemented method includes a first processor initiating a first transaction and encountering an abort condition. Responsive to the abort condition, an abort other request is communicated between the first processor and one or more additional processors. The one or more additional processors receive the abort other request, and, responsive to the abort other request, the one or more additional processors selectively abort a current second transaction based on the abort other request and an abort other condition. Optionally, the transactional memory environment supports a transaction category scheme, whereby each transaction has associated therewith a category identifier. In such embodiments, the abort other request includes an abort category identifier, and the abort other condition includes aborting the current second transaction if the abort category identifier matches the category identifier for the current second transaction. A corresponding computer program product and computer system are also disclosed.
US09514047B2	Apparatus and method to dynamically expand associativity of a cache memory In an embodiment, a processor includes at least one core, a cache memory, and a cache controller. Responsive to a request to store an address of a data entry into the cache memory, the cache controller is to determine whether an initial cache set of the cache memory and corresponding to the address has available capacity to store the address. Responsive to unavailability of capacity in the initial cache set, the cache controller is to generate a first alternate address associated with the data entry and to determine whether a first cache set corresponding to the first alternate address has available capacity to store the alternate address and if so to store the first alternate address in the first cache set. Other embodiments are described and claimed.
US09514046B1	Dynamic detection and software correction of incorrect lock and atomic update hint bits A hint bit detection and correction method uses two additional bits as part of every cache directory. These bits represent the lwarx and stwcx instructions (larx disp, stcx disp). When a hint bit event occurs, depending the on combination of these two bits, there can be an indication of a hint bit error. Once a hint bit error is detected a software interrupt is issued and the hint bit correction method identifies and corrects the incorrect hint bit.
US09514045B2	Techniques for implementing barriers to efficiently support cumulativity in a weakly-ordered memory system A technique for operating a cache memory of a data processing system includes creating respective pollution vectors to track which of multiple concurrent threads executed by an associated processor core are currently polluted by a store operation resident in the cache memory. Dependencies in a dependency data structure of a store queue of the cache memory are set based on the pollution vectors to reduce unnecessary ordering effects. Store operations are dispatched from the store queue in accordance with the dependencies indicated by the dependency data structure.
US09514043B1	Systems and methods for utilizing wear leveling windows with non-volatile memory systems Systems and methods for utilizing wear leveling windows with non-volatile memory systems are disclosed. In one implementation, a memory management module of a non-volatile memory system compares a metric reflecting wear of a memory block to a wear leveling window and determines whether a wear leveling indicator associated with the memory block restricts performing a wear leveling operation on the memory block. The memory management module performs a wear leveling operation on the memory block in response to determining that the metric reflecting wear of the memory block falls outside the wear leveling window and determining that the wear leveling indicator does not restrict performing a wear leveling operation on the memory block. After performing the wear leveling operation, the memory management module places the memory block on a free block list.
US09514038B2	Managing memory systems containing components with asymmetric characteristics A memory controller (MC) is associated with a remapping table to enable access to content in a memory system that includes asymmetric memory. The MC receives a request for a memory read or an Input/Output (I/O) write from a central processing unit (CPU) for a physical address specified by the system's memory management unit (MMU). The CPU uses the MMU to manage memory operations for the CPU, by translating the virtual addresses associated with CPU instructions into physical addresses representing system memory or I/O locations. The MC for asymmetric memories is configured to process the MMU-specified physical addresses as an additional type of virtual addresses, creating a layer of abstraction between the physical address specified by the MMU and the physical memory address with which that address is associated by the MC. The MC shields the CPU from the computational complexities required to implement a memory system with asymmetric components.
US09514037B1	Test program scheduling based on analysis of test data sets A computer program product includes a tangible storage medium storing instructions for execution by a processing circuit for performing a method. The method includes receiving a test program configured to including a plurality of test data sets, and analyzing the plurality of test data sets to identify one or more predictable test data sets and one or more dynamic test data sets, the one or more predictable test data sets expected to produce a predictable test result, the one or more dynamic test data sets not expected to produce a predictable test result. The method also includes determining a cost structure associated with executing the test program using a computing resource, setting a test schedule based on identification of the one or more predictable test data sets and the one or more dynamic test data sets, and executing the test program based on the test schedule.
US09514034B1	Ordered test execution to enable faster feedback Methods, systems, and computer-readable media for ordered test execution to enable faster feedback are disclosed. A likelihood of failure is estimated for individual tests in a set of tests. Based at least in part on the likelihood of failure, an ordered sequence is determined for the set of tests, such that the tests are ordered in estimated likelihood of failure. The set of tests is initiated in the ordered sequence, such that one or more computer-executable programs are subjected to individual ones of the tests. A failure of one or more of the tests is determined prior to performing one or more remaining tests in the ordered sequence.
US09514033B2	Systems and methods for processing software application metadata associated with a software application Systems and methods for processing software application metadata associated with a software application are provided. A representative method includes the step of collecting software application metadata associated with a software application. The software application metadata includes a first set of information related at least one of the following: screens, paths, and layers associated with the software application. The method further includes the step of storing the software application metadata in a data repository.
US09514031B2	Auto-deployment and testing of system application test cases in remote server environments A method for executing a system application test case of a runtime system in a server integrated environment is provided. The method includes establishing a transmission control protocol connection between a client development environment and a server integrated environment, to initiate execution of the system application test case in the server integrated environment. The method further includes issuing a data transfer protocol transmission request to the server integrated environment for a description script of the system application test case. The method further includes transmitting an extensible markup language of the requested description script. The method further includes issuing a data transfer protocol transmission request to execute a test of the system application test case. The method further includes executing the system application test case in the server integrated environment. The method further includes transmitting the extensible markup language document of the compiled test results to the client development environment.
US09514025B2	Modeling memory use of applications A method includes receiving a program code at a processor. The method also includes generating, via the processor, a heap model corresponding to the program code. The method further includes detecting, via the processor, a linearizable data structure in the program code. The method also further includes modifying, via the processor, the heap model based on the detected linearizable data structure. The method also further includes analyzing, via the processor, the program code using the modified heap model.
US09514022B1	Modeling storage system performance A system and method for creating an accurate black-box model of a live storage system and for predicting performance of the storage system under a given workload is disclosed. An analytics engine determines a subset of counters that are relevant to performance of the storage system with respect to a particular output (e.g., throughput or latency) from performance data in counters of the storage system. Using the subset of counters, the analytics engine creates a workload signature for the storage system by using a recursive partitioning technique, such as a classification and regression tree. The analytics engine then creates the black-box model of the storage system performance by applying uncertainty measurement techniques, such as a Gaussian process, to the workload signature.
US09514018B2	Scaling framework for querying Certain example embodiments described herein relate to techniques for scaling processing systems. For instance, in certain example embodiments, a scaling master receives a user-specified scaling and/or alerting query. The scaling and/or alerting query is transmitted to scaling agents at respective ones of the processing elements, the transmission using the connection layer. Each of the scaling agents executes the at least one scaling and/or alerting query. Each of the scaling agents reports a result of the executing to the scaling master using the connection layer. The scaling master forms a scaling decision based on the result reported by each of the scaling agents.
US09514015B2	Efficient data reads from distributed storage systems A method of distributing data in a distributed storage system includes receiving a file into non-transitory memory and dividing the received file into chunks. The chunks are data-chunks and non-data chunks. The method also includes grouping one or more of the data chunks and one or more of the non-data chunks in a group. One or more chunks of the group is capable of being reconstructed from other chunks of the group. The method also includes distributing the chunks of the group to storage devices of the distributed storage system based on a hierarchy of the distributed storage system. The hierarchy includes maintenance domains having active and inactive states, each storage device associated with a maintenance domain, the chunks of a group are distributed across multiple maintenance domains to maintain the ability to reconstruct chunks of the group when a maintenance domain is in an inactive state.
US09514014B2	Methods and systems of managing a distributed replica based storage A method of managing a distributed storage space. The method comprises mapping a plurality of replica sets to a plurality of storage managing modules installed in a plurality of computing units, each of the plurality of storage managing modules manages access of at least one storage consumer application to replica data of at least one replica of a replica set from the plurality of replica sets, the replica data is stored in at least one drive of a respective the computing unit, allocating at least one time based credit to at least one of each storage managing module and the replica data, iteratively renewing the time based credit as long a failure of at least one of the storage managing module, and the at least one drive and the replica data is not detected plurality of storage managing.
US09514012B2	Tertiary storage unit management in bidirectional data copying In one embodiment of the present description, mirroring is provided for a pair of storage units in bidirectional synchronous mirror relationships, and a tertiary storage unit. The mirroring includes multi-target mirroring to write updates written to the first storage unit to both the second storage unit and to a third storage unit. Similarly, for updates written to the second storage unit, multi-target mirroring is employed to write those to both the first storage unit and to the third storage unit. Other aspects are described.
US09514009B2	Reducing server power consumption to compensate for a power supply failure in a multiple power supply configuration A method includes supplying power to a physical server from a plurality of power supplies, wherein operation of all hardware components of the server requires more power than any one of the power supplies can provide. A plurality of jobs are run on the server while the plurality of power supplies are supplying power to the physical server. The method further comprises identifying an amount of power required by each of the components, and identifying one or more components that are not required by one or more of the jobs that are running on the server. The method detects a loss of power from one of the power supplies and then selectively removes power from hardware components identified as not required so that at least a central processing unit and a memory device can continue running at least one job using power available from the operational power supplies.
US09514007B2	Database system with database engine and separate distributed storage service A database system may include a database service and a separate distributed storage service. The database service (or a database engine head node thereof) may be responsible for query parsing, optimization, and execution, transactionality, and consistency, while the storage service may be responsible for generating data pages from redo log records and for durability of those data pages. For example, in response to a write request directed to a particular data page, the database engine head node may generate a redo log record and send it, but not the data page, to a storage service node. The storage service node may store the redo log record and return a write acknowledgement to the database service prior to applying the redo log record. The server node may apply the redo log record and other redo log records to a previously stored version of the data page to create a current version.
US09514002B2	Incremental backups using retired snapshots Systems and methods for performing backups to a storage device are provided. For virtual disks of a virtual machine, snapshots are used to backup data periodically to a storage device. A disk virtualization layer “retires” data blocks associated with a snapshot, while retaining a list of block addresses, for comparison in future backup operations. The retired snapshot can be compared against future snapshots to generate incremental backups without occupying storage space with data blocks that have already been copied to another storage device.
US09513997B2	Test data management A method for managing test data includes receiving a request indicative of a testing application from a requesting user and identifying a plurality of test data in a source database matching the request. Further, the method includes determining a reserved status of the plurality of test data, and, when the reserved status indicates that the plurality of test data is not reserved by the user other than the requesting user, reserving the plurality of test data for the requesting user. Still further, the method includes transferring a copy of the plurality of test data to a test database, wherein a testing application executes based on the copy of the plurality of test data stored in the test database.
US09513996B2	Information processing apparatus, computer-readable recording medium having stored program for controlling information processing apparatus, and method for controlling information processing apparatus A control device controls the switch device and the plurality of processing apparatuses such that, when one of replicated data pieces stored in two or more different storage devices among the plurality of storage devices is lost, the replicated data piece stored in a second storage device other than a first storage device storing lost replicated data piece among the two or more different storage devices is copied through the switch device to reconstruct the lost replicated data piece. Thus, a redundancy of replicated data is restored without affecting a bandwidth of a network.
US09513995B2	Methods for accessing a storage unit of a flash memory and apparatuses using the same An embodiment of a method for accessing a storage unit of a flash memory, performed by a processing unit, includes at least the following steps. After a notification indicating that errors presented in a message of a sector within a RAID (Redundant Array of Independent Disk) group cannot be fixed by an error correction algorithm with a horizontal ECC (Error Correction Code) of the sector is received, addresses of the other sectors within the RAID group are determined. Information is provided to a sector-decoding unit and a RAID-decoding unit, which indicates that a vertical correction procedure has been activated. Storage-unit access interfaces are directed to read content from the determined addresses of the storage unit, thereby enabling the RAID-decoding unit to recover the message of the sector by using the read content.
US09513994B2	Method and system for multi-dimensional raid A method for storing data including calculating: a first set of parity values using the data, a second set of parity values using the first set of parity values, and a third set of parity values using the data, and the first set and second set of parity values. The method further includes storing a portion of the data in a grid, where the grid includes grids locations that are each associated with a physical location, where each physical location is determined using a unique combination of at least a first value determined using a first independent fault domain and a second value determined using a second independent fault domain. The method further includes storing parity values from the first set of parity values and parity values from the second set of parity values in the grid, and storing the third set of parity values in an associated parity grid.
US09513989B2	Priori information based post-processing in low-density parity-check code decoders A low-density parity-check decoder utilizes information about hard errors in a storage medium to identify bit locations to flip log-likelihood ratios while attempting to decode codewords. The decoder iteratively flips and saturates log-likelihood ratios for bits at hard error locations and re-decodes until a valid codeword is produced. The decoder also identifies variable nodes associated with trapping sets for iterative log-likelihood ratio bit flipping.
US09513988B2	Method and device for increasing the data transmission capacity in a serial bus system In a bus system that includes at least two subscribed data processing units that exchange messages via a bus in a serial data transmission, the transmitted messages are of a logical structure that includes a start-of-frame bit, an arbitration field, a control field, a data field, a CRC field, an acknowledge field and an end-of-frame sequence, the control field including a data length code, which contains information regarding the length of the data field. The messages are constructed such that the data field of the messages can include more than eight bytes, and, in a method of such serial data transmission, the values of the data length code are interpreted at least partially in a manner that deviates from the CAN standard ISO 11898-1 for determining the size of the data field.
US09513986B2	Signal auto-tuning system and method of using the same A signal auto-tuning system is provided, which comprises a host, a controller, an expander, and a storage unit. The expander comprises a first error counting unit, a second error counting unit, an error-count temporary table, an error-count evaluating unit, and an adjusting unit. The expander receives/transmits a first signal with relation to the controller, and the expander receives/transmits a second signal with relation to the storage unit. The adjusting unit determines whether to adjust either of the first signal and the second signal, based on a result determined by the error-count evaluating unit.
US09513984B2	Hardware signal logging in embedded block random access memory A example method is described in which a programmable logic device: samples a first instance of a log data word comprising at least one hardware signal; compares the first instance of the log data word to a previous instance of the log data word; detects a change in the log data word when the first instance of the log data word is different from the previous instance of the log data word; and stores the first instance of the log data word in a storage location in an embedded block random access memory of the programmable logic device when the change in the log data word is detected.
US09513978B2	Integrated support for application porting transparency and streamlined system migration in heterogeneous platform environments Converting data for an application ported from an operating system (OS) platform of a first computer to an OS platform of a second computer. Configuration information associated with ported application including the first computer's OS platform is stored on the second computer. The ported application executing on the second computer receives first data encoded in a first code set. The OS of the second computer receives a request to convert the first data to a second data encoded in a second code set, locates a first-code-set-to-second-code-set mapping based on at least maintained code set mappings of the OS of the first computer, and converts the first data to the second data using the located first-code-set-to-second-code-set mapping. The second data is compatible for processing on the second computer and output from converting the data on the second computer is equivalent to an output from converting the data on the first computer.
US09513976B2	Providing extended memory semantics with atomic memory operations A computer-implemented method and a corresponding computer system for emulation of Extended Memory Semantics (EMS) operations. The method and system include obtaining a set of computer instructions that include an EMS operation, converting the EMS operation into a corresponding atomic memory operation (AMO), and executing the AMO on at least one processor of a computer.
US09513966B2	Parallel processing in human-machine interface applications A human-machine interface (HMI) application (26) uses parallel processing. The HMI engineering system (24) allows explicit specification (44) of different cores of a multi-core processor (16) for different elements and/or actions. The programmer may design the HMI application for concurrent operation. The HMI engineering system (24) or runtime system (28) may test (56) for data dependency amongst the elements or actions and automatically assigns different cores where data is independent. During runtime, different threads for the HMI application (e.g., different elements and/or actions) are scheduled for different cores.
US09513960B1	Inducing transactional aborts in other processing threads In a transactional memory environment, a computer-implemented method includes a first processor initiating a first transaction and encountering an abort condition. Responsive to the abort condition, an abort other request is communicated between the first processor and one or more additional processors. The one or more additional processors receive the abort other request, and, responsive to the abort other request, the one or more additional processors selectively abort a current second transaction based on the abort other request and an abort other condition. Optionally, the transactional memory environment supports a transaction category scheme, whereby each transaction has associated therewith a category identifier. In such embodiments, the abort other request includes an abort category identifier, and the abort other condition includes aborting the current second transaction if the abort category identifier matches the category identifier for the current second transaction. A corresponding computer program product and computer system are also disclosed.
US09513955B2	Application management method and terminal An application management method and a terminal are disclosed. The method includes: acquiring a list of applications needing to retain background data in a terminal and suspending a first timer corresponding to a first application running in the terminal when it is determined that the first application running in the terminal is not in the list of the applications needing to retain the background data. In embodiments of the present invention, timers of applications that do not need to retain background data in the terminal can be suspended. Because the timers stop to be run temporarily, the timers do not wake up the terminal from a dormant state, and correspondingly, the applications do not need to interact with a server end to update the background data, thereby reducing the number of times of waking up the terminal from a dormant state, saving electricity consumption and data traffic of the terminal.
US09513954B2	Adaptive dynamic selection and application of multiple virtualization techniques Autonomous selection between multiple virtualization techniques implemented in a virtualization layer of a virtualized computer system. The virtual machine monitor implements multiple virtualization support processors that each provide for the comprehensive handling of potential virtualization exceptions. A virtual machine monitor resident virtualization selection control is operable to select between use of first and second virtualization support processors dependent on identifying a predetermined pattern of temporally local privilege dependent instructions within a portion of an instruction stream as encountered in the execution of a guest operating system.
US09513953B2	Reducing virtual machine suspension time in checkpoint system Performing a checkpoint includes determining a checkpoint boundary of the checkpoint for a virtual machine, wherein the virtual machine has a first virtual processor, determining a scheduled hypervisor interrupt for the first virtual processor, and adjusting, by operation of one or more computer processors, the scheduled hypervisor interrupt to before or substantially at the checkpoint boundary.
US09513951B2	Maintaining hardware resource bandwidth quality-of-service via hardware counter Each time a currently scheduled virtual machine (VM) accesses a hardware resource over a bus for the hardware resource via the currently scheduled VM running on a processor, a hardware component adjusts a bandwidth counter associated with usage of the bus for the hardware resource, without involvement of the currently scheduled VM or a hypervisor managing the currently scheduled VM. Responsive to the bandwidth counter reaching a threshold value, the hardware component issues an interrupt for handling by the hypervisor to maintain bandwidth quality-of-service (QoS) of bus bandwidth related to the hardware resource. Upon expiration of a regular time interval prior to the bandwidth counter reaching the threshold value, the hardware component resets the bandwidth counter to a predetermined value associated with the currently scheduled VM, without involvement of the currently scheduled VM or the hypervisor; the hardware component does not issue an interrupt. The hardware resource can be memory.
US09513945B2	Method for controlling virtual machine A first computer starts to copy data of a virtual machine running on the first computer from the first computer to a second computer. The first computer monitors an index value related to conditions of running the virtual machine on the second computer. The first computer causes, based on the index value, the second computer to start operation of the virtual machine based on the data copied from the first computer to the second computer and terminating operation of the virtual machine running on the first computer.
US09513940B1	Scaling past the java virtual machine thread limit Embodiments of the present invention provide efficient systems and methods for scaling past the Java Virtual Machine (JVM) thread limit in a Java Virtual Machine. Embodiments of the present invention can be used to ensure that a received workload is executed, even if the workload is greater than a JVM thread limit of the system, by spawning a reduced number of threads from a main process, in order to provide enough resources for the effective execution of a received workload.
US09513931B2	System for context based user requests for functionality Embodiments of the present invention may provide a method, machine readable storage medium, and system for context based user request for functionality. In one embodiment, software instructions may be executed by a computer processor to: provide a UI element for a software application to receive user request for functionality, initiate a context based functionality request responding to a user action on the UI element, provide UI input element(s) to receive user input for the context based functionality request, capture contextual information from the software application based on initiation of the context based functionality request, and receive submission of the context based functionality request and the captured contextual information.
US09513924B2	Predictor data structure for use in pipelined processing A predictor data structure is used for pipelined processing by a pipelined processor. The predictor data structure includes a predicted address to be used in return from execution of a selected instruction, and a predicted operating state associated with the predicted address. Based on determining a selected return instruction is to be executed, the predicted address to which processing is to be returned is obtained from the predictor data structure. Further, based on determining the selected return instruction is to be executed, a transitional operating state to be entered based on the predicted operating state stored in the predictor data structure is predicted, wherein at least one of the predicted address and the predicted transitional operating state are to be used to validate execution of the selected return instruction.
US09513909B2	Variable updates of branch prediction states Embodiments relate to variable branch prediction. An aspect includes determining a branch selection of an execution unit of a processor and determining whether a present prediction state of the state machine correctly predicted the branch selection by the execution unit. The aspect includes determining whether a predetermined condition is met for performing an alternative state transition and, based on determining that the predetermined condition is met, changing the present prediction state of the branch prediction state machine from the one state to another state according to an alternative state transition process based on the branch selection of the execution unit and the determination whether the present prediction state of the state machine correctly predicted the branch selection by the execution unit.
US09513901B2	Deploying incremental scripts A method and system of implementing continuous deployment of scripts in languages that only support single deployment. The method and system may develop incremental scripts based on differences between a pending script and an implemented script.
US09513895B2	Method and system for patch automation for management servers A method for automatically patching a management server in a distributed network. The method includes receiving an instruction to patch an unpatched management server. Retrieving, from a software repository, a patch file comprising a patch for the unpatched management server, where the unpatched management server is configured to manage a distributed application in the distributed network, and where the unpatched management server is located on a node of the distributed network. Establishing a connection with a management agent located on the node, where the management agent is configured to communicate with the unpatched management server over the network and manage a part of the distributed application that is located on the node. Sending, over the connection, the patch file to the management agent. Receiving, by the management agent, the patch file. Applying, by the management agent, the patch to the unpatched management server to obtain a patched management server.
US09513891B2	Method and device for publishing and implementing wireless application Embodiments of the present application relate to a method of publishing a wireless application, a method of implementing a wireless application, a device for publishing a wireless application, a device for implementing a wireless application, and a computer program product for publishing a wireless application. A method of publishing a wireless application is provided. The method includes integrating a permanent interface layer of a software development kit (SDK) into a wireless application, publishing the integrated wireless application, and installing the dynamic implementation layer of the SDK onto a server. The SDK includes the permanent interface layer and a dynamic implementation layer, the permanent interface layer including an interface protocol to be invoked by the wireless application and the dynamic implementation layer including an interface implementation corresponding to the interface protocol.
US09513888B1	Virtual preloads A method of installing an application on a mobile communication device which comprises receiving, on a mobile communication device, a selection of a virtually preloaded application, identifying the repository from a plurality of repositories, communicating with the repository to obtain the full application, identifying a first location of an icon associated with the virtually preloaded application on the mobile communication device, relocating the icon associated with the virtually preloaded application to a second location, and installing the full application on the mobile communication device. The virtually preloaded application corresponds to a full application available in a repository.
US09513884B2	Thermal-aware source code compilation Thermal-aware source code compilation including: receiving, by a compiler, an identification of a target computing system, the identification of the target computing system specifying temperature sensors that measure temperature of a memory module; compiling the source code into an executable application including inserting in the executable application computer program instructions for thermal-aware execution, the computer program instructions, when executed on the target computing system, carry out the steps of: retrieving temperature measurements of one or more of the target computing system's temperature sensors; determining, in real-time in dependence upon the temperature measurements, whether a memory module is overheated; if a memory module is overheated, entering a thermal-aware execution state including, for each memory allocation in the executable application, allocating memory on a different memory module than the overheated memory module; and upon the temperature sensors indicating the memory module is no longer overheated, exiting the thermal-aware execution state.
US09513882B2	Platform independent presentation composition Architecture that includes a platform independent, configuration driven, presentation composition engine. The composition engine that allows dynamic generation of multiplatform user experience (UX) based on a data contract. By composition, the user can select the parts, interactions, and constraints between the interaction and parts, as well as the placement with respect to each other. The UX is dynamically composed from components that are targeted to particular data classes. At runtime, platform dependent component implementations are automatically selected by the engine based on the execution platform of the composition host. A user can create or customize the UX without writing code by composing from a wide variety of presentation widgets that access a wide variety of data sources that can work on many platforms. Compositions are targeted to both a data class and presentation type and can be either predefined or generated.
US09513880B2	Graphical function specialization A device receives a state chart generated via a technical computing environment. The state chart includes a function block that includes a function that includes function input(s)/output(s). The state chart includes a state block that includes a function call to the function of the function block. The function call includes call input(s)/output(s). The device initiates execution of the state chart, parses the function into the function input(s)/output(s), and parses the function call into the call input(s)/output(s). The device processes, during the execution of the state chart, the function input(s)/output(s) with a graphical engine of the technical computing environment to generate function-related code. The device processes, during the execution of the state chart, the call input(s)/output(s) with a textual engine of the technical computing environment to generate function call-related code, and provides the function-related code and the function call-related code in generated code.
US09513878B2	Component integration by distribution of schema definition on heterogenous platforms According to some embodiments, a method and system including a first technology stack to receive a model description describing defining aspects of an application model; to generate, according to the model description, a model entity representation of the application model; and to transfer the model description to a second technology stack; and a second technology stack to generate, according to the model description, a model entity representation of the application model.
US09513877B1	Generating comprehensive symbol tables for source code files A computer program product includes instructions to identify a primary symbol table associated with a primary source code file and identify a secondary symbol table associated with a secondary source code file. The computer program product includes instructions to receive a source code association indication. The source code association indication includes at least one association relationship between the primary source code file and the secondary source code file. The computer program product includes instructions to create a comprehensive symbol table. The comprehensive symbol table comprises contents of the primary symbol table and contents of the secondary symbol table. A corresponding computer-implemented method and computer system are also disclosed.
US09513874B2	Enterprise computing platform with support for editing documents via logical views Various technologies related to an enterprise computing platform are presented. Documents in a framework can be edited via logical views as described. An enterprise computing platform having a variety of frameworks can be configured to operate in a variety of business domains. Features such as parallel computing, distributed computing, logical documents, document transformation, space visualization, data security, and others can be accomplished via configuration rather than coding.
US09513873B2	Computer-assisted release planning A compute-implemented method and apparatus for assisting release planning, including steps of: obtaining remaining requirements that are expected to be included in a current release plan; obtaining the release plan, which comprises a set of planned requirements that are already included in the release plan and a set of release constraints; determining that there is a conflict between the release constraints and the planned requirements; rendering, in response to this determination, a proposal to create a modified release plan that is a function of the remaining requirements and of the current release plan; and forecasting, as a function of the remaining requirements and of the modified release plan, whether the addition of another requirement to the release plan would create a conflict with the release constraints.
US09513869B2	Doorbell-less endpoint-initiated protocol for storage devices The present disclosure relates to methods and systems for performing operations in a communications protocol. An example method can include submitting, from a device, a request for a queue entry representing a command from a host comprising a request for data stored at a device memory location; receiving the command from the host; and executing the command. An example method can also include selecting a bit string representing whether a requested data stream has been received, and storing the bit string into a memory buffer portion to mark the buffer portion. The method can include receiving, into the memory buffer, the stream. The method can include retrieving contents of the buffer portion, and determining whether the contents contain the bit string. If so, the method can include determining that portions of the stream have not been received. Otherwise, the method can include determining that the stream has been received.
US09513868B2	Software application and zones Embodiments described herein relate to a software application that is configured to operate as an add-on software component to audio-playback software on a playback device of a media playback system. One embodiment may involve transmitting, to a computing device, data indicating that a first add-on component installed on a playback device is active; receiving, from the computing device, a command to activate a second add-on component installed on a playback device; in response to receiving the command, activating the second add-on component on the playback device; and causing playback of audio using at least the second add-on component.
US09513867B1	System and method for managing communications on a mobile communication device based upon a user's behavior A device for managing communications on a mobile communication device based upon behavior of a user has a controller, The controller reviews data stored within applications of the mobile communication device, identifies one or more key terms within applications stored on the mobile communication device, determines if the one or more key terms belongs to at least one of the plurality of pre-defined mood categories, generates one or more reminder task items associated with the data and the one or more key terms identified, identifies a genre of music being played on an audio source, and determines whether the genre of music belongs to at least one of a plurality of pre-defined mood categories. The controller generates a notification message associated with one of the reminder task items when the genre of music being played and the associated one or more reminder task items belong to the same pre-defined mood category.
US09513863B2	Modular display panel Embodiments of the present invention relate to integrated modular display panels. In one embodiment, modular display panel includes a casing having a recess. The casing includes locking points for use in attachment to an adjacent casing of another modular display panel. A printed circuit board is disposed in the recess and a plurality of LEDs attached to the printed circuit board. A driver circuit is attached to the printed circuit board. A heat sink is disposed between a back side of the casing and the printed circuit board. The heat sink thermally contacts the back side of the casing and the printed circuit board. A framework of louvers is disposed over the printed circuit board. The framework of louvers is disposed between rows of the LEDs. The framework of louvers is attached to the printed circuit board using an adhesive.
US09513858B2	Printing device, control system, and control method of a control system A printer 11 can connect to a tablet device 10 that generates and transmits data using a browser function; has a communication unit 20b that receives data from the tablet device 10 on either a first logical communication channel K1 or a second logical communication channel K2 and processes the received data as required according to the communication channel; and has a print unit control unit 20a that prints based on data received by the communication unit 20b.

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