Document Document Title
US09515800B2 Method for transmitting and receiving feedback information on D2D transmission data in wireless communication system for supporting D2D communication and apparatus therefor
A method for transmitting feedback information on device to device (D2D) transmission data in a wireless communication system for supporting D2D communication according to the present invention comprises the steps of: informing a D2D link with another D2D terminal through a D2D terminal search; enabling a first D2D terminal to receive, in the formed D2D link, D2D information including resource allocation information for transmitting D2D data from a base station; enabling the first D2D terminal to receive data from a linked second D2D terminal through a resource according to the resource allocation information; and transmitting, to the base station, feedback information including acknowledgement/non-acknowledgement (ACK/NACK) signals for the received data, wherein the feedback information can comprise a D2D indicator for indicating the information related to the D2D communication and the identification information of the first D2D terminal and/or the identification information of the second D2D terminal.
US09515797B2 Methods and arrangements in a mobile telecommunications network
The present invention relates to method and arrangements for using an identifier of a predefined type, e.g. an RNTI identifying one configuration on an out-band control channel for activating the configuration identifiable by that identifier. The identifier is sent from the network to the UE, when a configuration corresponding to that identifier is to be activated. This implies that both the UE and the radio base station comprise a mapping between each configuration and the corresponding identity of each configuration.
US09515788B2 Originator and recipient based transmissions in wireless communications
Methods and systems are described for determining a plurality of transmission levels for, e.g., a plurality of time-frequency channels and/or a plurality of tones. The transmission levels may be determined by a first node based on, for example, a received transmission from a second node. The first node may generate a signal, which may be based on, for example, an originator-based pseudorandom sequence, a recipient-based pseudorandom sequence, and/or a complex sinusoid. The first node may transmit the signal as an orthogonal frequency division multiplexing (OFDM) transmission.
US09515782B2 HARQ feedback implementation method and device
Disclosed are an HARQ feedback implementation method and device. The method comprises: according to a TDD uplink/downlink reference configuration, dividing all downlink subframes contained in an FDD downlink carrier into two types, wherein the downlink subframes of the first type correspond to downlink subframes or/and special subframes in the TDD uplink/downlink reference configuration, and the downlink subframes of the second type correspond to the uplink subframes in the TDD uplink/downlink reference configuration; feeding back ACK/NACK information corresponding to the downlink subframes of the first type according to the timing sequence relationship in the TDD uplink/downlink reference configuration; and feeding back the ACK/NACK information corresponding to a downlink subframe m of the downlink subframes of the second type on an uplink subframe first meeting a preset condition after a subframe m+3 in the TDD uplink/downlink reference configuration. Thus, ACK/NACK information corresponding to downlink data can be accurately fed back in time, thereby performing accurate data retransmission, and then effectively guaranteeing the system performance.
US09515781B2 Method and apparatus for transmitting acknowledgement
Provided is a method for transmitting hybrid automatic repeat request (HARQ) positive acknowledgement (ACK)/negative acknowledgement (NACK) in a wireless communication system, and a wireless device using the same. The wireless device receives information on the number of repetitions m (where m is an integer greater than 1) from a base station. The wireless device transmits a designated signal p times (where p is an integer greater than 0), and repeatedly transmits ACK/NACK on a downlink transmission block m−p times.
US09515778B2 Communication control apparatus, communication control method, and computer-readable non-transitory recording medium
A communication control apparatus includes a first obtaining section, a second obtaining section, and a control section. The first obtaining section is configured to obtain a first communication status indicating a frequency of occurrence of data loss during first data communication from a first communication device to a second communication device. The second obtaining section is configured to obtain a second communication status indicating a frequency of occurrence of data loss during second data communication from the second communication device to the first communication device. The control section is configured to control transmission processing relating to transmission from the second communication device to the first communication device in accordance with the first communication status and the second communication status. The transmission processing includes transmission processing of transmitting a retransmission request message that requests retransmission of data identical to lost data during the first data communication.
US09515774B2 Energy-efficient wireless communications via feedback
Methods and apparatus, including computer program products, are provided for energy efficient communication based on feedback. A method may include sending a first message carried by a first wireless radio channel at a first predetermined energy level; receiving, in response to the first message, a second message carried by a second wireless radio channel; comparing the first message to the second message; sending a termination message, when the comparing indicates the first message and the second message match; and sending a portion of the first message at a second predetermined energy level, when the comparing indicates the second message contains at least one error when compared to the first message.
US09515771B2 Methods and systems for the allocation of measurement gaps in a carrier aggregation environment
A method, network element and user equipment, where in one embodiment at a network element, allocating a measurement gap configuration for a user equipment (UE) capable of operating in a carrier aggregation environment using at least first and second component carriers; and sending the measurement gap allocation to the UE, the allocation indicating a first measurement gap configuration for the first component carrier, the first measurement gap configuration being different than a second measurement gap configuration allocated for the second component carrier. In another embodiment at a UE capable of operating in a carrier aggregation environment using at least first and second component carriers, sending a measurement gap preference to a network, the preference including preference information indicating a preference for a first measurement gap configuration for the first component carrier, the first measurement gap configuration being different than a second measurement gap configuration for the second component carrier.
US09515770B2 System, method, and device to control wireless communications
Methods and systems for controlling wireless communications are provided. A method includes sending, from a mobile base station mimicking system, signals that mimic a first base station of a wireless communication system. The method also includes selectively routing, at the mobile base station mimicking system, communications associated with at least one communication device, wherein selectively routing the communications comprises forwarding a first communication associated with the at least one communication device and blocking a second communication associated with the at least one communication device.
US09515764B2 Integrated control module for communication system on a chip for silicon photonics
In an example, an integrated system-on-chip device is configured on a single silicon substrate member. The device has a data input/output interface provided on the substrate member. The device has an input/output block provided on the substrate member and coupled to the data input/output interface. The device has a signal processing block provided on the substrate member and coupled to the input/output block. The device has a driver module provided on the substrate member and coupled to the signal processing block. In an example, the device has a driver interface provided on the substrate member and coupled to the driver module and configured to be coupled to a silicon photonics device. A control block is configured to receive and send instruction(s) in a digital format to the communication block and is configured to receive and send signals in an analog format to communicate with the silicon photonics device.
US09515763B2 Digital coherent receiver and receiving method of optical signal
A digital coherent receiver that receives a first optical signal in a WDM optical signal includes: a front-end circuit configured to generate a digital signal indicating the first optical signal; a waveform distortion corrector configured to generate a correction result signal indicating a first optical signal whose waveform distortion has been corrected by performing a digital arithmetic operation on the digital signal using at least one dispersion compensators and at least one nonlinear compensators; and a controller configured to adjust operation states of specified dispersion compensators among the plurality of dispersion compensators and specified nonlinear compensators among the plurality of nonlinear compensators. The number of the specified dispersion compensators and the number of the specified nonlinear compensators are determined based on the number of spans of an optical transmission line through which the first optical signal is transmitted.
US09515761B2 Communication method in consideration of carrier types and apparatus for same
The present invention relates to a wireless communication system. In particular, the present invention relates to a method for a terminal to receive a downlink signal in a wireless communication system and to an apparatus for same, the method comprising the steps of: receiving, from a base station, a first piece of information indicating the start point of a multicast broadcast single frequency network (MBSFN) signal, receiving an MBSFN subframe having a plurality of orthogonal frequency division multiplexing (OFDM) symbols, and receiving the MBSFN signal from an OFDM symbol indicated by the first piece of information in the MBSFN subframe.
US09515752B2 Method for mapping wi-fi fingerprints by means of blind collection of RSS measurements
This invention relates to a method for mapping Wi-Fi fingerprints in a given geographical area. A user, provided with a receiver, sequentially collects Wi-Fi signal strength measurements by moving along the path thereof, with each measurement being constituted by a vector of RSS levels received from the various Wi-Fi access points. A graph that is representative of the path is determined from the sequence of measurements. Thanks to a geometric model of the area, a topographical characterization of the path is carried out on the basis of the previously obtained graph. The positions of the various measurements of the sequence are provided by the topographical characterization and stored with said measurements in a database.
US09515748B2 Encoding apparatus and method for encoding sound code, decoding apparatus and method for decoding the sound code
A decoding apparatus includes a sound code input unit that receives a sound code output from an encoding apparatus through a sound wave reception device; a frame division unit that divides the sound code depending on a predetermined time interval to generate a plurality of frames; a frequency identification unit that identifies a frequency corresponding to each of the plurality of the frames through frequency analysis for each of the plurality of the frames; and an information generation unit that determines a frequency band, to which each of the identified frequencies corresponds, from an audible sound wave frequency band and a non-audible sound wave frequency band, and a plurality of partial information based on the frequency band and each of the identified frequencies, and generates information corresponding to the sound code based on the plurality of the partial information.
US09515747B2 System and method for a subscriber-powered network element
A system for powering a network element of a fiber optic wide area network is disclosed. When communication data is transferred between a central office (CO) and a subscriber terminal using a network element to convert optical to electrical (O-E) and electrical to optical (E-O) signals between a fiber from the central office and twisted wire pair, coaxial cable or Ethernet cable transmission lines from the subscriber terminal, techniques related to local powering of a network element or drop site by the subscriber terminal or subscriber premise remote powering device are provided. Certain advantages and/or benefits are achieved using the present invention, such as freedom from any requirement for additional meter installations or meter connection charges and does not require a separate power network.
US09515745B2 Adaptive equalization in coherent receivers using a Stokes space update algorithm
A coherent optical receiver including an optical transducer, an adaptive filter, and a processor updates the adaptive filter according to a metric derived in Stokes space. The optical transducer receives an optical signal corresponding to a modulated signal of symbols. The optical transducer also determines a first signal corresponding to a first polarization of the optical signal and a second signal corresponding to a second polarization of the optical signal. The adaptive filter recovers a first equalized signal and a second equalized signal from the first signal and the second signal. The first equalized signal and the second equalized signal form an equalized modulated signal of symbols. The processor calculates a set of Stokes parameters from the equalized modulated signal and updates the adaptive filter based on a metric derived from the set of Stokes parameters.
US09515744B2 Optical signal processing method and device
Disclosed are a method and device for increasing the adaptability of light intensity, which relate to the field of photoelectric communications. The method comprises: providing several stages of load resistors in the device, the device collecting voltage values, calculating the average value of all the collected voltage values when a preset number of voltage values which meet the requirements are collected, setting a voltage according to the average value and judging whether the set voltage meets preset requirements; and if yes, collecting data according to the set voltage; otherwise switching a load resistor according to a preset rule, wherein the load voltage may affect the voltage collection. The present invention has the beneficial effects of: improving the adaptability of a screen to light intensity during optical signal collection, and at the same time being able to reduce the error rate.
US09515740B2 2×40 Gbps BiDi optical transceiver
An apparatus, system and method for facilitating higher bandwidth communication in a data center using existing multi-mode fibers. A first transceiver within a first device transmits Ethernet traffic to a second device over first and second optical fibers and receives return optical signals over the same first and second optical devices. By varying the wavelengths between the transmitted and received optical signals, the same optical fibers can be used to both transmit and receive optical signals. A second transceiver within the same housing as the first transceiver performs the same function. In this fashion, one device can be coupled to four bidirectional optical fibers, each transmitting and receiving optical signals at 20 Gbps.
US09515737B2 Method and device for data compression, transmission, and decompression
Disclosed are a method and device for data compression, transmission, and decompression. In the present method, data-to-be-transmitted is grouped by a transmitting terminal, and for each group: a shift factor is determined based on the most significant bit of sample data of the greatest value in the group when a sign bit is removed, data bits of the sample data in the group are left shifted by the shift factor; the left shifted sample data respectively are quantified, thus making the bit number of the quantified sample data to be equal to a predefined bit number; the shift factor and the quantified sample data are transmitted to a receiving terminal. Employment of the present application optimizes data compression performance.
US09515734B2 System and method for cross-phase modulation noise reduced transmission in hybrid networks
In one embodiment, a method for receiving optical signals includes receiving a first set of one or more signals and a second set of one or more signals, determining a block length used to process the first set of signals, and processing the first set of signals using the block length. The first set of signals and the second set of signals are separated by a guard band. The block length is based upon the width of the guard band.
US09515732B2 Optical transmission
A spacecraft or satellite optical transmission apparatus (10) including an optical fiber (11) and at least one optical pump source (14) operatively coupled to provide pump energy to the optical fiber (11), the optical fiber (11) comprising an active trivalent dopant such as erbium and at least one passive trivalent dopant such as lanthanum. A method for transmitting electromagnetic radiation in a high radiation environment is also disclosed.
US09515731B2 Information communication method
An information communication method of transmitting a signal is provided that uses a change in luminance. The method includes determining a pattern of the change in luminance by modulating the signal to be transmitted, and transmitting the signal by a light emitter changing in luminance according to the determined pattern. The pattern of the change in luminance is a pattern in which one of two different luminance values occurs in each arbitrary position in a predetermined duration. The determining a pattern of change in luminance includes dividing the predetermined duration into four duration units, so that one of two different luminance value occurs in one duration unit of the four duration units and the other luminance value of the two different luminance value occurs in three duration units of the four duration units, the three duration units are other than the one duration unit.
US09515729B2 Omnidirectional free space optical communications receiver
A free space optical receiver comprising a photodetector and a fiber bundle. The fiber bundle comprises a plurality of optical fibers splayed apart at one of their ends to receive free space optical energy from multiple directions. The splayed apart ends of the plurality of optical fibers may create a hemispherical shape. Each of the plurality of optical fibers has an acceptance cone for which it couples optical energy into the splayed end of the optical fiber. The acceptance cones of the splayed ends of the plurality of optical fibers may overlap to form an omnidirectional acceptance zone. The other, non-splayed ends of the plurality of optical fibers are communicatively coupled to the photodetector, which is positioned to receive the free space optical energy from the non-splayed ends of the plurality of optical fibers. An optical communication system including the free space optical receiver is also described.
US09515727B2 In-band optical signal-to-noise ratio monitor
Methods and systems for in-band OSNR monitoring include a tunable optical filter to scan a passband of a desired optical channel. The optical power over the passband is measured and digitized to power waveform data. The power waveform data is processed with a digital signal processor to calculate OSNR. Additionally, various implementations accommodate dual polarization modulation formats using a parallel architecture and an alternating sequential architecture.
US09515720B2 Radio communication system
In a radio communication system a first radio station performs communication by the use of a first radio signal. A second radio station receives a second radio signal which is indistinguishable from the first radio signal. A third radio station is in a radio communication area of the first radio station and a radio communication area of the second radio station. A communication format conversion unit generates a third radio signal by converting a communication format of the second radio signal to a communication format which is distinguishable from the first radio signal, and communicates with the third radio station by the use of the third radio signal.
US09515715B2 CSI feedback method, UE scheduling method, UE, and base station
The present invention discloses a channel state information (CSI) feedback method. The CSI feedback method includes: receiving, by user equipment (UE), a reference signal broadcast by a base station; performing channel estimation on a radio channel between the base station and the UE by using the reference signal, to obtain CSI and a channel quality parameter; adjusting the channel quality parameter according to a channel quality weight parameter, to obtain a channel statistic quality parameter; and when the channel statistic quality parameter exceeds a channel quality threshold, feeding back the CSI to the base station. In the present invention, because a channel quality parameter is dynamically adjusted by using a channel quality weight parameter, and it is selected, according to a result of comparing an adjusted channel statistic quality parameter with a channel quality threshold, whether to report CSI. UEs in a system can be evenly scheduled.
US09515713B2 Including feedback information regarding an individual subband of a wireless channel
To report feedback information regarding a wireless channel, a mobile station determines whether a predefined condition is satisfied. In response to determining that the predefined condition is satisfied, feedback information regarding an individual one of plural subbands of the wireless channel is included in a first report to be sent to a base station. In response to determining that the predefined condition is not satisfied, aggregate feedback information regarding the plural subbands is included in a second report to be sent to the base station.
US09515702B2 Demodulators for near field communication, near field communication devices, and electronic devices having the same
A demodulator for near field communication may include: a scale down circuit configured to receive first and second modulated signals from first and second power electrodes, and configured to provide a scale down signal to a first node by scaling down magnitudes of the first and second modulated signals; a current source coupled between the first node and a ground voltage, and configured to generate a constant current flowing from the first node to the ground voltage; a charge store circuit coupled between the first node and ground voltage, and configured to perform charge and discharge operations alternately, based on the scale down signal and constant current, to output an envelope signal, which corresponds to an envelope of the scale down signal; and/or an edge detector configured to generate input data, which correspond to the first and second modulated signals, based on a transition of the envelope signal.
US09515701B2 Method and device for managing information exchange between a main element, for example a NFC controller, and a set of at least two auxiliary elements
Device, comprising a main element (ME) and a set of at least two auxiliary elements (SEi), said main element including a master SWP interface (MINT), each auxiliary element including a slave SWP interface (SLINTi) connected to said master SWP interface of said NFC element through a controllably switchable SWP link (LK) and management means (PRM, CTLM, AMGi) configured to control said SWP link switching for selectively activating at once only one slave SWP interface on said SWP link.
US09515700B2 Methods and systems for exchanging information between aircraft
Methods and systems for use in exchanging information between aircraft at an airport are provided. The system includes a power system capable of providing power to each of the plurality of vehicles via an electric cable, at least one off-board broadband over power lines (BPL) module coupled to the power system. The at least one off-board BPL module is capable of communicating via the electric cable with an onboard BPL module on each of the plurality of vehicles. The system also includes a network coupled to each of the at least one off-board BPL modules for communicatively coupling each of the at least one off-board BPL modules such that the plurality of vehicles can exchange information via the network.
US09515699B2 Dual mode serial transmission apparatus and method for switching mode thereof
A dual mode serial transmission apparatus and method for switching a mode thereof are provided. The dual mode serial transmission apparatus includes a first and second current sources, a first and second inverting circuits, a differential pair and a resistor string. The first inverting circuit receives a mode selecting signal or a first data transmission signal, the second inverting circuit receives the mode selecting signal or a second data transmission signal. First and second load terminals of the differential pair are respectively coupled to the first and second inverting circuits. A common terminal of the differential pair is coupled to the second current source. First and second differential input terminals receive the mode selecting signal or respectively receive the first and second data transmission signals. The resistor string is coupled in series between output terminals of the first and second inverting circuits.
US09515695B2 Bypassing duplex filter
The disclosed invention relates to a transceiver system having a bypass signal path that enables low power consumption. The transceiver system has transmission path and a reception path. The transmission path provides a signal from a transmission chain to an antenna for wireless transmission. The reception path provides a signal from the antenna to a reception chain. A duplex filter that provides isolation between the transmission and reception paths is connected between the antenna and the transmission and reception paths. A bypass signal path selectively exchanges signals between the transmission chain and the antenna along a conductive path that bypasses the duplex filter. By using the bypass signal path to selectively exchange signals between the transmission chain and the antenna the insertion loss of the duplex filter can be mitigated, allowing for the transceiver system to operate at a lower power.
US09515693B2 Casing, portable electronic assembly having the same and display method thereof
A casing applicable to a portable electronic device includes a supporter and a casing body having a back surface and side surfaces connecting to the back surface. The back surface has a camera opening for exposing a camera shutter of the portable electronic device and a supporter opening having a bevel side not parallel to the side surfaces. The supporter connected to the bevel side includes first and second sides which define a vertex angle. The supporter is adapted to rotate between a covering position and a supporting position. When at the covering position, the supporter covers the supporter opening, and the vertex angle and the camera opening are arranged diagonally. When the supporter is at the supporting position, the casing is supported by the vertex angle and one of the side surfaces away from the camera opening for the portable electronic device to perform landscape or portrait display.
US09515691B2 System and method for transmitting pollution information over an integrated wireless network
A pollution information message system provides a system and method for generating and transmitting pollution information messages. In one embodiment, the pollution information message system employs a transceiver network with a plurality transceivers coupled to monitoring devices. Control room operators receive a pollution information message from an identifiable transceiver. The transceiver, identified by an identification code, indicates a location and the nature of the detected pollution. Other aspects, embodiments, and features are also claimed and described.
US09515690B1 Receiver with multi-spectrum parallel amplification
A radio receiver has a front end having a shared amplification path for both radio frequency signals and intermediate frequency signals. In one example, the shared amplification path can include a low noise amplifier and an attenuator. By amplifying both radio frequency (RF) signals and intermediate frequency (IF) signals with the same shared amplification path, gains in power efficiency, and reductions in cost and circuit size can be achieved.
US09515688B2 Reception apparatus having dual reception structure, and method of receiving signal using dual reception structure
A reception apparatus having a dual reception structure includes a first receiver having a first quality (Q) factor and configured to receive a signal in a predetermined band in response to the first receiver being selected by a reception controller; a second receiver having a second Q factor greater than the first Q factor and configured to receive the signal in the predetermined band in response to the second receiver being selected by the reception controller; and a reception controller configured to select one of the first receiver and the second receiver based on interference information associated with an adjacent band adjacent to the predetermined band.
US09515686B2 Signal transmitting circuit using common clock, and storage device therewith
A transmitting circuit includes a plurality of transmitters, an operation clock generator, and a clock divider. Each of the transmitters outputs data serially. The operation clock generator generates an operation clock signal. The clock divider divides the operation clock signal to generate a symbol clock signal. The plurality of transmitters receives the operation clock signal and the symbol clock signal in common. A clock signal provided to one transmitter is equally synchronized with a clock signal provided to other transmitter(s).
US09515685B2 Apparatus and method for signal predistortion
Apparatus and a method for predistortion of a radio-frequency signal are described. At least one predistortion unit is described that is arranged to receive an analog baseband signal before amplification and to generate an analog predistortion signal based on said analog baseband signal. At least one mixer unit is also described and may be electrically coupled to the at least one predistortion unit. In this case, the at least one mixer unit is arranged to receive the analog baseband signal before amplification and the analog predistortion signal and to generate a weighted combination of said signals.
US09515683B2 Forward error correction architecture and implementation for power/space efficient transmission systems
A concatenated Forward Error Correction (FEC) code method, at an intermediate point, includes receiving, from an ingress point, a signal that is fully encoded with a concatenated FEC code, wherein the concatenated FEC code includes at least an inner code and an outer code; partially decoding the signal by decoding the inner code at the intermediate point; and transmitting the partially decoded signal towards an egress point where the partially decoded signal is fully decoded.
US09515680B2 Fast mapping method for layered min-sum decoding of LDPC codes,
A method is disclosed for performing LDPC decoding, specifically layered min-sum decoding using a Tanner graph including check nodes (CN) and variable nodes (VN). Messages passed between nodes are quantized in a non-uniform manner. Values below a threshold are uniformly quantized whereas values above the threshold are non-uniformly quantized. A corresponding inverse-quantization is also defined.
US09515679B1 Adaptive data compression
Methods, computing systems and computer program products implement embodiments of the present invention that include accessing, from a sequence of multiple data segments including a first data segment at a first location in the sequence followed by additional data segments having respective additional locations in the sequence, a current given data segment in the sequence. In some embodiments, data to be compressed is received and partitioned into the multiple data segments. The current data segment is compressed the current data segment using a first minimal match length, and a compression ratio is calculated for the compressed current data segment. Based on the compression ratio and the respective location of the current data segment, a second minimal match length is selected, a subsequent data segment that immediately follows the current data segment in the sequence is accessed, and the subsequent data segment is compressed using the second minimal match length.
US09515676B2 Methods and computer program products for compression of sequencing data
A compression method includes measuring a waveform associated with a chemical event occurring on a sensor array, wherein the waveform comprises at least one region associated with expected measured values and at least one region associated with unpredictable measured values; applying a first compression process to the waveform, the first compression process including an averaging of one or more frames in one or more portions of the waveform; and applying a second compression process to the waveform, the second compression process including a truncating of data corresponding to a portion of the waveform that is not related to a nucleotide incorporation component of the waveform.
US09515672B2 Analog-to-digital converter
A system includes an analog-to-digital converter receiving a plurality of input signals. One particular input signal has a particular analog value and the analog-to-digital converter uses a fixed reference to convert the particular analog value to a particular digital value. The analog-to-digital converter uses the particular analog value as a reference for converting the analog values of the remaining input signals.
US09515671B1 Apparatus for gain selection with compensation for parasitic elements and associated methods
Apparatus and associated methods are disclosed for gain programming or selection with parasitic element compensation. In one exemplary embodiment, an apparatus includes a first circuit that has a first programmable gain, and includes a first set of components having parasitic elements. The apparatus also includes a second circuit that has a second programmable gain, and includes a second set of components having parasitic elements. The apparatus has a gain that is a product of the first and second programmable gains. A gain error because of the parasitic elements of the first and second sets of components is canceled by setting the first programmable gain as a reciprocal of the second programmable gain.
US09515670B2 Atomic cell, atomic cell manufacturing method, quantum interference device, atomic oscillator, electronic device, and moving object
An atomic cell includes: alkaline metallic atoms, a body portion and window portions forming an inner space in which alkaline metallic atoms are sealed, and a getter material disposed in the inner space. The getter material is an alloy including at least one of titanium, barium, tantalum, zirconium, aluminum, vanadium, indium, and calcium, or an Al—Zr—V—Fe based alloy.
US09515662B2 Level shifter
A level shifter includes a first and a second transistor coupled to a first power supply voltage terminal supplied with a second power supply voltage in parallel, a third and a fourth transistor coupled to a reference voltage terminal in parallel, a first and a second depression transistor, the first depression transistor being coupled between the first and the third transistor, and a timing control unit placed between a second power supply voltage terminal supplied with a second power supply voltage lower than the first power supply voltage and the reference voltage terminal, that generates the first control signal and the third control signal different from the first control signal corresponding to an inverted signal of an input signal, and generates the second control signal and the fourth control signal different from the second control signal corresponding to a non-inverted signal of the input signal.
US09515661B2 Circuit, semiconductor device, and clock tree
A circuit with a reduced leakage current is provided. A first transistor, a third transistor, and a second transistor are electrically connected in this order in series, a drain of the second transistor and a source of the third transistor are electrically connected to each other and are electrically connected to an output node. The first transistor is a p-channel transistor. The second and third transistors are n-channel transistors each including a semiconductor region including an oxide semiconductor. The third transistor functions as a switch that controls electrical connection between a drain of the first transistor and an output node of the circuit. In the standby mode, the third transistor is in an off state.
US09515657B2 Systems and methods for data receipt from devices of disparate types
Systems and methods are provided for a receiver device for receiving data signals from devices of disparate types. An amplifier is configured to receive a voltage reference signal and a data signal, the data signal being received from a device, the amplifier being configured to output an output signal based on a comparison of the data signal to the voltage reference signal. A voltage reference level shifter is configured to selectively level shift the voltage reference signal supplied to the amplifier based on a type of device with which the receiver is communicating. A data signal level shifter is configured to selectively level shift the data signal supplied to the amplifier based on the type of device with which the receiver is communicating.
US09515653B1 Signal generating circuit
In a signal generating circuit, a power supply terminal is connected with first terminals of a first switching element, a second switching element, and a third switching element; second terminals of the second switching element and the third switching element are connected to each other at a first node; the first node is connected with a ground and a first input terminal; a conduction control terminal of the third switching element is connected with the power supply terminal and the first terminal of the first switching element; a second terminal of the first switching element is connected with the first node; the second input terminal is connected with conduction control terminals of the first switching element and the second switching element; a first output terminal is connected with a second node; a second output terminal is connected with a third node; a first high-frequency cutoff element is connected with the power supply terminal and the second node; and a second high-frequency cutoff element is connected with the power supply terminal and the third node.
US09515648B2 Apparatus and method for host power-on reset control
A host power-on reset control circuit includes a comparator connected to receive both a divided version of a supply voltage and a reference voltage. The comparator generates and outputs a high digital state signal when the divided version of the supply voltage is at least as large as the reference voltage. The control circuit includes an output node connected to transmit a power-on reset control signal. The control circuit includes pulldown circuitry connected between the comparator output and the output node. The pulldown circuitry maintains the output node at a reset voltage level as the supply voltage rises to a host operational level, based on a signal present at the comparator output. The control circuit includes pullup circuitry connected between the supply voltage and the output node. The pullup circuitry maintains the output node at a non-reset voltage level after the supply voltage has risen to the host operational level.
US09515647B2 Gate circuit and display device using the same
A gate driver includes a stage including an input unit including a first transistor diode-connected to a first input terminal of the stage through a first node and biased by a first input signal of the first input terminal, an output unit including a second transistor including a gate electrode coupled to the first node, a first electrode coupled to a clock input terminal, and a second electrode coupled to a first output terminal of the stage, a capacitor coupled between the gate electrode and the second electrode of the second transistor, and a noise remover including a third transistor including a gate electrode coupled to a second node, a first electrode coupled to the first node, and a second electrode coupled to a first voltage input terminal of the stage which receives a first voltage.
US09515646B2 Grounding switch method and apparatus
A grounding switch is described which operates properly even in the presence of negative voltages on a signal line. The grounding switch uses isolated field effect transistors that have their substrates tied to different voltages. The isolated field effect transistor has a gate voltage and substrate voltage which can be pulled down to a negative voltage when the signal line has a negative voltage allowing the switch to remain open even with a negative voltage.
US09515644B2 Semiconductor device and circuit with dynamic control of electric field
A circuit, comprising a semiconductor device with one or more field gate terminals for controlling the electric field in a drift region of the semiconductor device; and a feedback circuit configured to dynamically control a bias voltage or voltages applied to the field gate terminal or terminals, with different control voltages used for different semiconductor device characteristics in real-time in response to a time-varying signal at a further node in the circuit.
US09515642B2 Pulse modulation control in a DC-DC converter circuit
In a device, a pulse modulation switching logic is provided to generate switching signals of a pulse modulator so as to generate a pulse modulated signal with a first pulse modulation control parameter and a second pulse modulation control parameter. The first pulse modulation control parameter is controlled on the basis of a first control signal, and the second pulse modulation control parameter is controlled on the basis of a second control signal. A first control loop is provided to generate the first control signal from an output signal derived from the pulse modulated signal. A second control loop is provided to generate the second control signal on the basis of the output signal. The first and second control signals are applied to concurrently control the first and second pulse modulation control parameters.
US09515639B2 Method for generating a pulse and circuit configuration for an electronic device to generate a pulse
A method for generating a pulse, wherein a predetermined first limit curve and a predetermined second limit curve are defined for a pulse shape of the pulse, wherein the limit curves describe the change over time of a current variable, and wherein the second limit curve runs entirely within the first limit curve. As a pulse shape for the pulse, a curve plotted between the limit curves is generated, which, in comparison with a rectangular pulse plotted between the limit curves, in a first area of the current variable facing away from an extremum, is deformed toward the first limit curve and which, in a second area of the current variable facing toward the extremum, is deformed toward the second limit curve.
US09515633B1 Transformer coupled capacitive tuning circuit with fast impedance switching for plasma etch chambers
A transformer coupled capacitive tuning (TCCT) circuit for an inductively coupled plasma (ICP) chamber includes a matching circuit including a first switched capacitor circuit and a first inductor. The first switched capacitor circuit includes a first terminal, a second terminal, a first capacitor connected to at least one of the first terminal and the second terminal, a second capacitor connected to at least one of the first terminal and the second terminal, and a first switch in communication with at least one of the first capacitor and the second capacitor to vary a capacitance value between the first terminal and the second terminal. A power splitter communicates with the matching circuit and an inductive coil of the ICP chamber.
US09515631B2 Apparatus and methods for high voltage variable capacitor arrays with body-to-gate diodes
Apparatus and methods for high voltage variable capacitors are provided herein. In certain configurations, an integrated circuit (IC) includes a variable capacitor array and a bias voltage generation circuit that biases the variable capacitor array to control the array's capacitance. The variable capacitor array includes a plurality of variable capacitor cells electrically connected in parallel between a radio frequency (RF) input and an RF output of the IC. Additionally, each of the variable capacitor cells can include a cascade of two or more pairs of anti-series metal oxide semiconductor (MOS) capacitors between the RF input and the RF output. The pairs of anti-series MOS capacitors include a first MOS capacitor and a second MOS capacitor electrically connected in anti-series. The bias voltage generation circuit generates bias voltages for biasing the MOS capacitors of the variable capacitor cells.
US09515626B2 Digital/analogue conversion
The application relates to digital to analogue conversion circuits having dynamic gain control. A digital variable gain element (102) may apply gain to an input digital signal (DIN) upstream of a DAC (101) to make better use of the input range of the DAC and an analogue variable gain element (103) applies a compensating analogue gain. Again controller (201) has a gain allocation module (204) for controlling the allocation of gain between said digital and analogue variable gain elements in response to changes in a signal level of the input digital audio signal. In the present invention the gain allocation module is operable in first and second modes of operation where the response to reductions in signal level is slower in the first mode than in the second mode of operation. A low-level detector (202) monitors the input digital audio signal so as to detect a low-level part of the signal and the gain controller changes from the first mode to the second mode following detection of a low-level part of the input digital audio signal. The response of the gain allocation module in the second mode is preferably fast enough such that the digital gain can be changed to a target setting suitable for the low-level part of the signal before it is received at the digital gain element.
US09515620B2 Amplifier arrangement comprising a master amplifier and at least one slave amplifier
An amplifier arrangement for amplifying at least one first and one second audio input signal. In one embodiment, the arrangement includes a master amplifier designed as a class D amplifier. The first audio input signal is applied to the master audio input and a master audio output signal is applied to the master audio output. The arrangement also includes a master feedback loop; thus enabling the master amplifier to be designed as a self-oscillating class D amplifier having a master oscillation frequency, at least one slave amplifier, a slave feedback loop, wherein a slave audio output signal or signal portions thereof are fed back into a slave audio input, and a master-slave coupling loop, wherein the master audio output signal or signal portions thereof is coupled into the slave audio input, so that the slave amplifier has the master oscillation frequency as its oscillation frequency.
US09515615B2 World band radio frequency front end module, system and method thereof
The present disclosure relates to a World Band Radio Frequency Power Amplifier and a World Band Radio Frequency Front End Module. The World Band Power Amplifier can contain at least one broadband power amplifier connected to a switch which can direct an RF input signal to a plurality of transmission paths, each transmission path configured for a different frequency. The World Band RFFE Module is more integrated version of the World Band Power Amplifier that can contain broadband RF PA(s), switches, logic controls, filters, duplexers and other active and passive components.
US09515613B2 Dual-band doherty amplifier and method therefor
A dual-band Doherty amplifier and method therefor are provided. The dual-band Doherty amplifier includes a first amplifier gain element, a first transmission line coupled to a first output of the first amplifier gain element, a second amplifier gain element, a second transmission line coupled to a second output of the second amplifier gain element, and a controller configured, when a signal to be amplified is in a first band, to provide a first bias signal to a first bias input of the first amplifier gain element and a second bias signal to a second bias input of the second amplifier gain element and, when the signal is in a second band, to provide the second bias signal to the first bias input of the first amplifier gain element and the first bias signal to the second bias input of the second amplifier gain element.
US09515609B1 Passive mixer with duty cycle improvement through harmonics level reduction
A signal generation circuit includes a voltage controlled oscillator configured to generate a differential oscillator signal having an amplitude. A passive mixer has first differential inputs coupled to the voltage controlled oscillator to receive the oscillator signal. The passive mixer also includes second differential inputs. A filter circuit is coupled between the voltage controlled oscillator and the second differential inputs of the passive mixer. The filter circuit is configured to filter the differential oscillator signal as a function of the amplitude of the differential oscillator signal to thereby generate a filtered differential oscillator signal and to provide the filtered differential oscillator signal to the second differential inputs of the passive mixer.
US09515604B2 Driving crystal oscillator startup at above, below and operating frequency
A circuit includes a crystal oscillator to generate an output frequency for a circuit. A driving oscillator generates a startup signal having a driving frequency that is provided to activate the crystal oscillator. The driving frequency of the startup signal is varied over a range of frequencies that encompass the operating frequency of the crystal oscillator to facilitate startup of the crystal oscillator.
US09515602B2 Solar array condition monitoring through controlled inverter voltage sweeping
A PV system includes an irradiance meter to measure solar irradiance received by a PV array in the system. A PV inverter is electrically connected to the PV array via a DC link to regulate the voltage of the PV array. A controller receives an input from the irradiance meter regarding the solar irradiance received by the PV array, causes the PV inverter to alter the operating voltage of the PV array to each of a plurality of voltage values, detects current values in the PV array responsive to the altering of the voltage to each of the voltage values, and generates a power performance curve for the PV array based on the voltage values at which the PV array is operated and the detected current values, with the power performance curve being generated at a known level of solar irradiance based on the input from the irradiance meter.
US09515598B2 System and method for controlling regenerating energy in an adjustable speed drive
A system and method for controlling an adjustable speed drive (ASD) to decelerate an AC load during a generating mode of operation is disclosed. The ASD includes a capacitor and an inverter coupled to a DC link. A current sensor system is coupled to an output of the inverter. The ASD further includes a control system programmed to calculate an energy of the capacitor, generate a reference power using the calculated capacitor energy, and calculate a feedback power from realtime current signals received from the current sensor system. The control system compares the feedback power to the reference power, defines a frequency offset based on the comparison, generates a speed command using the frequency offset, and outputs the speed command to the inverter to maintain a smooth DC link voltage during deceleration.
US09515587B2 Phase detector, motor drive controller, motor device, and method of detecting phase of rotor
A phase detector includes a crossing-point phase detection circuit to compare signals levels of pairs of sensor signals and output crossing-point phase detection signals indicating phases of crossing points between the pairs of the sensor signals, each having a signal level corresponding to a rotational position of a rotor of a motor having coils, a crossing-point level detection circuit to output crossing-point level signals indicating crossing-point levels detected, a signal selection circuit to select one of the sensor signals as a selection signal, a phase detection circuit to detect that a signal level of the selection signal has reached a threshold level, and output a phase data signal indicating a phase of the rotor corresponding to the threshold level, and an in-phase level adjustment circuit to adjust and output in-phase levels of the sensor signals to approach each of the crossing-point levels to a predetermined signal level.
US09515586B2 Power output stage, method for operation
The invention relates to a power output stage (1), in particular for a controller of an electrical machine (2) for a motor vehicle, comprising at least one control unit (8) and comprising at least four semiconductor switches (HS1, HS2, LS1, LS2) which can be individually actuated by the control unit (8) and which are connected to at least two half-bridges (4, 5) for operating the electrical machine (2) in order to form a bridge circuit (3), and are connected to a supply line (6) and an earth line (7) of the power output stage (1). Provision is made for the control unit (8) to have a controllable first pull-up apparatus (PU1) and a controllable first pull-down apparatus (PD1) for a first of the half-bridges (4) and a controllable second pull-up apparatus (PU2) and a controllable second pull-down apparatus (PD2) for a second of the half-bridges (5), the control unit (8) actuating the semiconductor switches (HS1, HS2, LS1, LS2) the pull-up apparatuses (PU1, PU2) and the pull-down apparatuses (PD1, PD2) in a short-circuit test mode in order to detect a short-circuit current.
US09515584B2 Converter for an electric motor
A converter for an electric motor includes a semiconductor element connected at at least one contacting for converting a voltage, a voltage measuring device for measuring a voltage drop over the semiconductor component, and a control device for controlling the semiconductor component, the control device being configured to determine a state of the contacting based on the measured voltage drop.
US09515583B2 Rotary electric machine control system and rotary electric machine control method
A rotary electric machine control system includes a rotary electric machine (second motor generator), a number-of-revolutions sensor that measures the number of revolutions per predetermined time period of the rotary electric machine, and a controller. The controller has a threshold changing unit for changing a control switching phase that is a control switching threshold to be used for switching the control mode of the rotary electric machine, according to a measurement result of the number of revolutions.
US09515582B2 Driving apparatus for analyzing apparatus
Disclosed is an analyzing apparatus including a first drive part (71) for rotating a turntable (101) on which an analyzing device is set, a second drive part (72) selectively engaged with the first drive part (71) to reciprocate the analyzing device, and a third drive part (73) for relatively moving the first drive part (71) and the second drive part (72) a position where the first and second drive parts are engaged with each other and a position where the first and second drive parts are not engaged with each other. Thus in the mixing and agitation of a small amount of fluid, necessary acceleration can be obtained even in a short time.
US09515581B2 Motor control device
Provided is a motor control device that includes an inverter circuit that includes a plurality of P-side switching elements and a plurality of N-side switching elements and drives a motor via a plurality of motor terminals; a first dynamic brake that brakes the motor by turning on all the phases of the plurality of P-side switching elements or turning on all the phases of the plurality of N-side switching elements; a second dynamic brake that brakes the motor by connecting dynamic brake resistors between the motor terminals; and a control unit that switches, according to the motor speed, between the first dynamic brake and the second dynamic brake, which are the dynamic brakes that brake the motor.
US09515578B2 Control method and system for correcting the voltages to be applied to an electrical load
A control method to be implemented in a power converter, the power converter including an inverter module controlled by a control rule that makes it possible to determine a control voltage to be applied to an electrical load on the basis of a reference control voltage. The control method includes determining a correction value to be applied to the reference control voltage, the correction value being determined from a first filtered voltage obtained by filtering a voltage that is representative of the real measured voltage, and a second filtered voltage obtained by filtering a voltage that is representative of the reference control voltage.
US09515576B2 Short circuit detection in a capacitor of a DC-bridge and DC-bridge protection
A bridge circuit and a short-circuit protection method thereof. The bridge circuit includes an input power unit, a converter unit, a first capacitor, a second capacitor, a detection unit and a bridge inverter unit. The input power unit includes a first electrode and a second electrode. The converter unit is coupled to the input power unit. The first capacitor includes a first terminal and a second terminal. The second capacitor includes a first terminal and a second terminal. The bridge inverter unit includes a plurality of switches and is coupled to the converter unit, the first capacitor, the second capacitor, the detection unit and the second electrode. The detection unit issues a short-circuit signal to a control unit when the detection unit detects a current variation on the second capacitor.
US09515569B2 AC/DC electrical conversion device permitting energy recovery and management of DC-side short-circuits
An AC/DC electrical converter device having a source mode and a recovery mode, and for connection, on the AC side, to an AC voltage source and, on the DC side, to a DC power distribution network. It includes an AC/DC converter, a switching cell with two switches (K1, K2) that are bidirectional for current, the switches sharing a common point (A) and each having a respective end terminal (B1, B2), a filter stage, and a control unit for the cell; the converter is for connection on the AC side to the voltage source and is connected on the DC side to the cell; in use, the first switch (K1) is connected between the converter and the DC power distribution network via the filter stage, the second switch (K2) forming a combination in parallel with the filter stage and the DC power distribution network. The control means are able to manage a short-circuit current in source mode by operating on the first and second switches.
US09515564B2 Power conversion apparatus and power conversion method based on a control constant and a feedback value based on current flow
A power conversion apparatus includes a primary side circuit having a primary side port; a secondary side circuit having a secondary side port; and a control unit that derives a control constant suitable for a feedback value according to a relationship rule between the feedback value and the control constant, and adjusts a phase difference between the primary side circuit and the secondary side circuit using the control constant that is derived from the relationship rule, so as to control transmitted power that is transmitted between the primary side circuit and the secondary side circuit, wherein the feedback value is obtained based on current flowing to the primary side port or the secondary side port.
US09515558B2 Switch-mode power supply with temperature and current sharing
A switched-mode power supply in a set of parallel-connected switched-mode power supplies is operated to (1) monitor both output current and operating temperature, and (2) auto-tune an output voltage using two-dimensional control that employs a two-dimensional function of the output current and the operating temperature. The two-dimensional function is a sharing function whose use in each of the supplies effects a coordinated sharing of both load current and operating temperature across the set of supplies. Temperature sharing includes monitoring and controlling distribution of operating temperatures across the set of supplies to reduce undesirable temperature imbalance that can cause excessive thermal stress and reduce reliability.
US09515556B2 Current pulse count control in a voltage regulator
A method of regulating voltage with a switching regulator is disclosed. The method includes sensing an output voltage provided by the regulator. If the output voltage drops below a low voltage threshold, a burst of one or more current pulses is provided. If the output voltage raises above a high voltage threshold during the burst, discontinuing the burst of current pulses. The method includes counting a number of the one or more current pulses in the burst, and comparing the number of the one or more current pulses with at least one pulse threshold. The upper current threshold is adjusted based on the number of the one or more current pulses.
US09515554B2 Power supply that charges an electric storage by regenerative power generated by a generator and supplies power to a load
A power supply includes: a first connection terminal connectable with a DC power supply to which a first load and a generator are connected in parallel; a second connection terminal connectable with an electric storage which stores regenerative power generated by the generator; a third connection terminal connectable with a second load; a DC-DC converter; and a controller which controls the DC-DC converter. The power supply further includes: a first power path including one end connected to the first connection terminal and the other end connected to a first input/output terminal of the DC-DC converter; a second power path including one end connected to the second connection terminal and the other end connected to a second input/output terminal of the DC-DC converter; and a third power path including one end connected to the third connection terminal and the other end connected to the second power path.
US09515553B2 Transient power control
Automatic transient control circuitry may be used to alleviate issues relating to large changes in power demands by a load in an integrated circuit. The transient control circuitry may inject current to or retract current from a load, for example charging or discharging a bypass capacitor associated with the load, when circuitry of the load is commanded to an operational state from a standby state or vice-versa, respectively.
US09515551B2 Switch relay device
The present invention relates to a switch relay device, and more particularly, to a switch relay device which is used as an electronic relay that drives electronic components mounted on an automobile. The switch relay device includes: a switching control unit for determining a duty value depending on the kind of a control input signal inputted thereto and generating a first switching control signal and a second switching control signal whose phases are opposite to each other; a switching drive signal generation unit for generating a switching drive signal through R-C charge and discharge in response to the first switching control signal and the second switching control signal applied thereto from the switching control unit; a load output signal generation unit for receiving the switching drive signal from the switching drive signal generation unit and outputting a load output signal; and a constant voltage unit connected to a battery disposed in a vehicle to supply power to the switching drive signal generation unit and the load output signal generation unit and configured to provide a constant voltage to the switching control unit.
US09515550B2 Inductor current zero-crossing detection method and circuit and switching power supply thereof
In one embodiment, a method of detecting an inductor current zero-crossing in a switching power supply, can include: (i) determining a present output voltage of the switching power supply; (ii) generating a zero-crossing detection threshold voltage according to the output voltage; and (iii) generating a zero-crossing detection signal according to the zero-crossing detection threshold voltage, where the zero-crossing detection signal is used to turn off a synchronous rectifier switch in the switching power supply.
US09515547B2 DC power supply circuit
In a DC power supply circuit (1), when an instantaneous value (Vin) of a voltage from a rectifier circuit (2) is higher than or equal to a voltage (VC2) across terminals of a capacitor (C2), in an ON period of a switching element (Q1), current flows along a first current path, from a high-potential output terminal of the rectifier, through a load (11), an inductor (L2), and the switching element in the stated order, and into a low-potential output terminal of the rectifier, and in an OFF period of the switching element, current flows along a second current path, from the high-potential output terminal of the rectifier, through the load, the inductor, a diode (D1), and the capacitor in the stated order, and into the low-potential output terminal of the rectifier.
US09515534B2 Electromagnetic coupling device having electromagnetic coil with ends formed by terminal lines of different metal material
The present invention relates to an electromagnetic coupling device. In the electromagnetic coupling device according to the present invention, ends (5a and 5b) of a winding of an electromagnetic coil (5) are fitted to grooves of a terminal casing, and terminal members (19a and 19b) are press-fitted to a groove crossing the abovementioned groove, so that lead wires (18a and 18b) held by the terminal members (19a and 19b) are electrically connected to the ends (5a and 5b) of the winding. Terminal lines (51a and 51b) made of enameled copper wires are connected to the opposite ends of the winding of the electromagnetic coil (5) made of an aluminum wire, and the terminal lines (51a and 51b) handled as the ends (5a and 5b) of the winding are connected to brass-made connection pieces (29a and 29b) of the terminal members (19a and 19b).
US09515533B2 Rotary body driving apparatus
The rotary body driving apparatus comprises: a rotary body having reflective surfaces; a motor having a rotor shaft; a rotor being attached to one end part of the rotor shaft together with the rotary body; a stator housing having a bearing section, which rotatably holds the rotor shaft; a motor substrate for detecting a rotational position of the rotor, the motor substrate being provided to the stator housing; a magnetized section for frequency generation, the magnetized section being formed into a ring shape and provided to an end surface of the rotary body facing the motor substrate; and a circular frequency generation pattern, which faces the magnetized section, being provided to the motor substrate and disposed close to the magnetized section.
US09515532B2 Mold motor and air conditioner
A mold motor includes a mold stator, a rotor, and a bracket. The mold stator includes a first bearing housing section formed of thermosetting resin, one bearing of the rotor fitting in one end in an axial direction of the first bearing housing section, an opening section formed at an end on the opposite side of the bearing housing section, and a bracket press-fitting section formed near the opening section and having a diameter larger than a stator inner diameter. The bracket includes a bracket resin section configuring a second bearing housing section in which the other bearing of the rotor fits and a bracket sheet metal section press-fit into the bracket press-fitting section of the mold stator. In the bracket, the bracket resin section and the bracket sheet metal section are integrally molded.
US09515530B2 Stator module and magnetic field generating structure thereof
The disclosure provides a stator module and a magnetic field generating structure which includes a magnetizer and an electrically conducting pipe. The electrically conducting pipe is wound around the magnetizer and has a passage inside. The passage has an outlet and an inlet opposite to each other. The electrically conducting pipe has a current input portion and a current output portion.
US09515528B2 Permanent magnet rotary electric machine
A permanent magnet rotary electric machine includes: a stator in which a plurality of teeth and a plurality of slots are formed on an inner periphery of a cylindrical stator core, and a winding wire is wound around the teeth so as to be disposed in the slots; and a rotor disposed in a hollow portion of the stator with an air gap between the rotor and the stator. In the rotor, 2n or more (n is a natural number equal to or larger than 1) radial projections are provided on an outer periphery of a rotor core, and a ferrite magnet is disposed between adjacent projections. A radial height of the projection is less than a thickness of middle of the ferrite magnet.
US09515526B2 Motor and rotor thereof
A motor and a rotor thereof are provided. Taking the distance between the two endpoints of a permanent magnet of a motor rotor that are on the side away from the center of an iron core as the length L of the permanent magnet, and the distance between a line connecting the two endpoints of the permanent magnet that are on the side away from the center of the iron core and the center point on the side of the permanent magnet that is close to the centerline of the iron core as the width H of the permanent magnet, then H/L ≧ 1/10. By adjusting the relationship between the length L and width H of the permanent magnet, the air gap magnetic density of the permanent magnet can be effectively increased.
US09515524B2 Electric motor
An electric motor has a supplementary field magnet including a supplementary magnet, a yoke serving as a magnetic path for magnetic flux produced by the supplementary magnet. The supplementary field magnet is arranged on one axial end side of the rotor with a gap. A rotor core is provided with first projections projecting toward one axial end side of the electric motor from first magnetic pole portions having a first polarity, and second projections projecting toward the one axial end side from second magnetic pole portions having a second polarity, and arranged radially inward of the first projections. The yoke includes a magnetic pole portion axially opposed to the first projections and having the first polarity, and another magnetic pole portion axially opposed to the second projections and having the second polarity such that a gap is formed between the magnetic pole portions.
US09515521B2 Detector arrangement in an electric arrangement with stand by shut down
A detector arrangement included in an electric circuit arrangement which includes a stand by shut down and which comprises a first power supply (1) which is connected to mains voltage and which converts the mains voltage to a first voltage adapted for an electric motor (5) included in the electric circuit, the first power supply being, by means of a supply conductor (3) across a switch (4) by which the electric circuit may be closed or opened, is connected with its positive pole (2) to said motor, and the motor is, by means of a return conductor (6), connected to the negative pole (7) of said first power supply, as well as a control circuit (15) which, on the one hand, is connected via a first signal conductor (16), to the first power supply and, on the other hand, to an included second power supply (1 1) which feeds the control circuit with a second voltage which is substantially lower than the first voltage and which, with its negative pole, is connected to the return conductor, and detector means for registering the state of the switch, said means being connected to the control circuit for control thereof by the first power supply between the energised state in which the switch is in the on position and in which the power supply emits voltage, and a shut down state in which the switch is in the off position and in which the power supply emits no voltage where the detector arrangement includes a resistor (17) and a first diode (18) which are connected in series and are included in a crosswire.
US09515517B2 System for the electronic management of photovoltaic cells with adapted thresholds
The invention relates to a system for the electronic management of a photovoltaic generator, said system comprising a plurality of n static converters (11, 12, 13) connected in parallel, each converter (11, 12, 13) being electrically connected to at least one photovoltaic cell (10) of the generator. The number of converters connected is determined by comparing the generated power to thresholds P1, P2, . . . , Pn-1 which are defined as the power values substantially at the point of intersection of the performance curves for an increasing number of converters. The invention also relates to a generator comprising said system and to the associated control method.
US09515513B2 Mobile device and combo coil module
An apparatus may include a near field communication (NFC) antenna coil and a wireless power receiving coil. The NFC antenna coil and the receiving coil may be arranged on a magnetic sheet. The wireless power receiving coil may be concentrically disposed on the magnetic sheet within an inner periphery of the NFC antenna coil. An inner diameter of the wireless power receiving coil may be greater than or equal to an inner diameter of reference listener antenna coil RL-6, of the reference listener coils specified by the NFC forum.
US09515512B2 Wireless data reader at checkstand
A checkstand system including a counter surface within which a plurality of induction charge transmission coils are embedded in or disposed below the counter at selected charge positions about the countertop whereby a cordless peripheral, such as a data reader, is positionable and movable between multiple positions about the counter surface, the peripheral including an induction charge receiving coil operative to receive a charge current from one of the induction charge transmission coils when the peripheral is placed in proximity of a selected one of the charge positions on the checkstand. In one configuration, the system includes a temperature sensing component disposed proximal to an induction charge transmission coil and a controller operative for receiving a temperature signal from the temperature sensing component and adjusting the charge current delivered to the induction charge transmission coil in response to the signal.
US09515510B2 Apparatuses and methods for over-temperature protection of energy storage devices
A charging system includes a temperature sensor to generate a temperature signal responsive to a temperature of an energy storage device. A circuit temperature sensor generates a circuit temperature signal responsive to a temperature of a semiconductor device. A charge adjuster generates a desired current signal responsive to the temperature signal and the circuit temperature signal. A comparator compares a charge-current level signal to the desired current signal to generate a charge adjustment signal. A charge controller on the semiconductor device generates and adjusts a current of a charging signal for charging the energy storage device responsive to the charge adjustment signal. The charge adjuster may generate a reduction signal when the temperature signal is above a throttle threshold, reduce a digital desired current signal responsive to the reduction signal, and convert the digital desired current signal to the desired current signal as an analog signal.
US09515508B2 Battery management system
A battery management system includes detecting circuitry and control circuitry coupled to the detecting circuitry. The detecting circuitry detects cell voltages of battery cells of a battery pack. The control circuitry alternates between a normal state and a charging prohibition state. In the normal state, charging of the battery cells is enabled and the cell voltages increase, and if a voltage of a battery cell of the battery cells exceeds a predetermined overcharge threshold, then the control circuitry transitions to the charging prohibition state. In the charging prohibition state, charging of the battery cells is disabled, and the voltage of the battery cell decreases if at least one cell of the battery cells has a voltage less than a balance threshold. If the voltage of the battery cell falls to a predetermined overcharge-released threshold, then the control circuitry transitions to the normal state and enables charging of the battery cells.
US09515507B2 Energy-saving circuit for a network-powered device, network arrangement and energy-saving method
An energy-saving circuit for a network-powered device (PD) having a converter circuit that produces an operating voltage (VOUT) for the device (PD) from a supply voltage (VPSE) which can be provided via a includes at least one switching element that breaks at least one electrical connection between the network and the converter circuit, at least one control circuit that actuates the at least one switching element on the basis of control signals that switch on and/or off and are received from the device, and at least one energy buffer that stores energy from voltage pulses, provided via the network, to supply the control circuit with operating power.
US09515502B2 Apparatus and method for managing power for mobile device
An apparatus and method of managing power for a mobile device is disclosed, which can prevent an inflow of overcurrent to the device when the device is charged. The apparatus includes a state judgment unit to judge whether a battery of the mobile device is being charged, a voltage level detection unit to detect a voltage level of the battery if the battery is judged as being charged, and a control unit to control a driving of the mobile device in accordance with the detected voltage level.
US09515499B2 Production logging instrument
A logging system and method for operating a logging system are typically used in a wellbore. The logging system may include a logging instrument including a rechargeable energy storage and logging electronics, and a cable configured to trickle charge the rechargeable energy storage. The rechargeable energy storage may include an ultracapacitor. The rechargeable energy storage may be trickle charged through the cable from a remote power source.
US09515496B1 Battery management system for human-machine interaction vehicles
A battery management system for human-machine interaction vehicles includes a battery pack, and an information sampling module. The management module determines whether the cell is abnormal according to the information signal. When the cell is abnormal, the discharge switch is turned off during the cell being discharged and the charge switch is turned off during the cell being charged.
US09515495B2 Wireless energy transfer in lossy environments
Described herein are improved configurations for a wireless power transfer for electronic devices that include at least one source magnetic resonator including a capacitively-loaded conducting loop coupled to a power source and configured to generate an oscillating magnetic field and at least one device magnetic resonator, distal from said source resonators, comprising a capacitively-loaded conducting loop configured to convert said oscillating magnetic fields into electrical energy, wherein at least one said resonator has a keep-out zone around the resonator that surrounds the resonator with a layer of non-lossy material.
US09515492B2 Wireless power transfer using air gap and metamaterial
Examples of the invention include methods and apparatus for wirelessly transmitting power to a vehicle using electromagnetic radiation. An example apparatus includes a transmitter coil associated with a first metamaterial lens, and a receiver coil associated with a second metamaterial lens, the receiver coil being located within the vehicle. The metamaterial lenses each have a negative magnetic permeability, and are separated by a lens spacing including an air gap. The first and second metamaterial lenses (and the lens spacing) act cooperatively to focus the electromagnetic radiation from the transmitter coil on the receiver coil.
US09515490B2 Power management method and power management system utilizing a measure of a driving current to control an electronic module
A power management method utilizes the steps of reading the driving current; determining if a driving current of an electronic device is less than or equal to a first steady current value for a first period of time; turning off a first electronic module to decrease the driving current when the driving current is less than or equal to the first steady current value for the first period of time; determining if the driving current is within a first judging range for a second period of time; updating the first steady current value with a second steady current value when the driving current is within the first judging range for the second period of time; and determining if the second steady current value is less than or equal to an energy saving set value.
US09515489B2 Feed system to be used in residence such as multi-unit apartment complex
A photovoltaic array (11) for generating DC power by receiving sunlight is installed in a balcony (1) of the individual unit, the DC power is converted by an inverter (13) into AC power, and the AC power output from the inverter (13) is supplied to the plurality of electrical loads in a distributed manner by a distribution board (38) of the individual unit. On the other hand, a magnitude of DC power generated by the photovoltaic array or a lithium-ion battery and a magnitude of electrical power consumed by the electrical loads are compared by an electrical power comparator. Depending on the comparison result, an electrical power switch may supply the DC power via the inverter to the electrical loads or a low-voltage system, or may supply electrical power from the low-voltage system to the electrical loads or the lithium-ion battery.
US09515486B2 Output control device and output control method for wind farm
An output control device for a wind farm which includes n number of wind turbines includes a WTG output obtaining unit for obtaining a current output Pi of each of the wind turbines; an extractable output calculation unit for calculating an extractable output Pmaxi for each of the wind turbines; a potential output calculation unit for calculating a potential output Ppoti of each of the wind turbines based on a difference between the extractable output Pmaxi and the current output Pi of each of the wind turbines; and a WTG output determination unit for determining an output command value of each of the wind turbines so that a total output PWF of the wind farm becomes closer to an output target value PWF*. The WTG output determination unit assigns an output increase amount to each of the wind turbines and to determine the output command value.
US09515485B1 Power control system with power drop out immunity and uncompromised startup time
A power control system provides immunity from power supply dropout for a controller without compromising a startup time of the controller. In at least one embodiment, the power control system includes separate startup and dropout immunity capacitors. In at least one embodiment, selection of the capacitance of the startup capacitor is independent of selection of the capacitance of the dropout immunity capacitance. In at least one embodiment, the startup capacitance can be minimized to provide sufficient energy for the controller to normally operate during one missed cycle of an input voltage and, thus, provide a minimum startup time for the controller. The capacitance of the dropout immunity capacitor can be maximized to provide sufficient energy for the controller to operate normally during a time period longer than one cycle of the input voltage.
US09515482B2 Power generator, portable device, power generation scheme identifying system, and power generation scheme identifying method
Consciousness of environmental conservation is increasing nowadays, and there are power generators for a portable device and employing power generation schemes without a co2 discharge, such as solar power generation and hand-crank power generation. When, however, power is supplied, information indicating that the power is obtained from clean energy without a CO2 discharge is unknown at the portable-device side. When power is supplied from the power generator to the portable device, a power generation scheme identifier for identifying a power generation scheme is transmitted. The portable device identifies the power generation scheme identifier, and can recognize the power generation scheme of the connected power generator. A supplied power level is recognized based on a power level of the storage battery of the portable device at a time point of starting the power supply, and a power level of the storage battery at a time point of terminating the power supply. Since the power level in the storage battery is managed in this manner using the power generation scheme identifier, it becomes possible to determine whether or not the power generation scheme of the power in the storage battery is a clean scheme.
US09515481B2 Printed circuit board for compressor housing
This printed circuit board (12) comprising: a first portion (20) having first electronic components (22) of which the earth electrode is on a first voltage source (14); a second portion (24) having second electronic components (26) of which the earth electrode is on a second voltage source (16); a third portion (28) inserted between the first portion (20) and the second portion (24); a switched-mode power supply circuit (32) connecting the first portion (20) and the second portion (24); the said second portion (24) also comprising an electronic component (30) powered by the said first voltage source (14), is characterized in that it also comprises detection means (34) for detecting a drop in electrical consumption of the component (30) and switching means for switching the switched-mode power supply circuit (32) when a predetermined drop in electrical consumption of the said component (30) is detected.
US09515480B2 Power device for preventing malfunction
The protecting relay may include: an input conversion unit configured to receive the analog signal and sample the analog signal according to a pre-set sampling period; a multiplexer configured to selectively output any one of a plurality of signals output from the input conversion unit; a programmable gain amplifier (PGA) configured to set different gain values according to signals output from the multiplexer, and amplify a signal output from the multiplexer with a pre-set gain value; an analog-to-digital converter (ADC) configured to convert an analog signal output from the PGA into a digital signal; and a controller configured to determine whether the analog signal received through the input conversion unit includes a surge signal based on the plurality of sampled data which have been converted into the digital signal, and determine whether to perform a relay function based on the determination results.
US09515479B2 Inrush current suppression apparatus
According to one embodiment, there is provided an inrush current suppression apparatus that suppresses an inrush current generated when shunt capacitors are connected to a power system, the apparatus including a voltage measurement unit measuring power source voltages, a current measurement unit measuring circuit breaker currents, a polarity determination unit determining the polarities of residual voltages, a phase section detector detecting a phase section in which the polarities of the residual voltages match the polarities of the power source voltages, and a circuit breaker closing unit closing the circuit breaker within the phase section.
US09515478B2 System for protecting of a plurality of DC voltage sources
A protection system configured to protect plural DC voltage sources configured to be connected in parallel between first and second input terminals of a voltage inverter. The voltage inverter can convert a DC input voltage into an AC output voltage. Each DC voltage source is connected by a first electrical conductor to the first input terminal and by a second electrical conductor to the second input terminal. The protection system includes: for each DC voltage source, a first cut-off member and first detector of a defect of isolation of the first conductor with respect to an electrical ground, the first detector and associated first cut-off member connected in series between the corresponding DC voltage source and the first input terminal of the inverter; and a mechanism triggering, in event of detection of the isolation defect, the associated first cut-off member to open the electrical link corresponding to the first conductor.
US09515476B2 Protective device for protection of an electrical circuit against reversal of polarity, method, circuit arrangement and vehicle system
The present invention relates to a protective device for protection of an electrical circuit equipped with a smoothing capacitor against reversal of polarity of the input voltage, with an input via which the protective device can be connected to a voltage supply for coupling in an input voltage, with an output via which the protective device an be connected to the electrical circuit to be protected, with a controllable switch which is arranged between an input terminal of the input and an output terminal of the output having the same polarity and which is designed to interrupt a current flow between the input terminal and the output terminal which are connected to one another, and with a control unit which is designed to control the controllable switch, when an applied input voltage with reverse polarity is detected, in such a way that the interruption of the current flow takes place with a time lag relative to a time of the application of the input voltage with reverse polarity. The present invention further relates to a corresponding method, a circuit arrangement with a protective device according to the invention and a vehicle system.
US09515475B2 Electro-optical radiation collector for arc flash detection
An electro-optical (EO) radiation collector for collecting and/or transmitting EO radiation (which may include EO radiation in the visible wavelengths) for transmission to an EO sensor. The EO radiation collector may be used with an arc flash detection device or other protective system, such as an intelligent electronic device (IED). The arc flash detection device may detect an arc flash event based upon EO radiation collected by and/or transmitted from the EO radiation collector. The EO radiation collector may receive an EO conductor cable, an end of which may be configured to receive EO radiation. A portion of the EO radiation received by the EO radiation collector may be transmitted into the EO conductor cable and transmitted to the arc flash detection device. The EO radiation collector may be adapted to receive a second EO conductor cable, which may be used to provide redundant EO transmission and/or self-test capabilities.
US09515472B2 Single wire seal for sealing an electric cable in an aperture of a terminal
A single wire seal for sealing an electric cable in an aperture of a terminal or a connector housing is provided. The single wire seal is provided with an essentially cylindrical shape and a through hole for the electric cable. The single wire seal further comprises a crimping portion for crimping the crimping section of a terminal on both the single wire seal and the electric cable. The single wire seal is molded out of a first, preferably relatively soft elastic material having a Young's modulus. For reducing deformations of the single wire seal due to the crimping, the single wire seal is further provided with a reinforcement element arranged at the crimping portion. The reinforcement element is preferably provided with at least one ring shaped portion. The reinforcement element is molded out of a second material, which has a higher Young's modulus than the first material.
US09515467B2 Grommet
To achieve high waterproofness, a grommet that is attached so as to cover a shield pipe and a corrugated tube so as to bridge therebetween includes a pipe-side end portion that is formed in a tubular shape capable of being sealingly connected to an outer circumferential side of the pipe, and a corrugated-side end portion that is formed in a tubular shape capable of being sealingly connected to an outer circumferential side of the corrugated tube. A plurality of sealing lips that closely contact to an outer surface of the shield pipe are formed on an inner surface of the pipe-side end portion. The sealing lips are disposed inside and outside a width region W that is fastened by a fastening band disposed on an outer surface of the pipe-side end portion.
US09515463B2 Systems and methods for a fused motor load ground
A motor control center system is provided. The system includes an electrical enclosure having buses for routing electrical power to component units. The system also includes a component unit disposed in a compartment of the electrical enclosure. The component unit contains a component for managing a power supply to a load disposed outside of the enclosure. In addition, the system includes a ground element disposed along a support wall of the compartment, wherein the ground element provides a fused ground connection with a load terminal of the electrical enclosure when the component unit is withdrawn from the electrical enclosure.
US09515462B2 Shutter device for an electrical switchgear panel, and related switchgear panel
A shutter device is disclosed for an electric switchgear panel, including a base configured to be placed on a bearing surface inside the switchgear panel, the base being adapted to support, positioned thereon, a current switching device movable between a connected position wherein the switching device is electrically connected to an associated electrical circuit and a disconnected position wherein the switching device is electrically separated from the corresponding electrical circuit, a frame having at least a portion which rises up transversally from the base and delimits a through aperture, a movable shutter operatively associated with the base and the frame and an actuating mechanism adapted to move the shutter between a first position where the shutter closes at least partially the through aperture and a second position wherein the shutter is retracted and leaves the through aperture at least partially opened.
US09515461B2 Electric power distribution unit
A modular electric power distribution system transmits power between a power source and control modules for power consumers. The system includes a power distribution unit mounted on each module and bridge assemblies which connect adjacent distribution units.
US09515459B2 Power supply module for modular telecontrol equipment and equipment comprising same
A power supply module for intelligent electronic apparatuses and capable of transforming the energy of the LV network and of a battery into energy that can be used by said apparatuses is produced to serve as support for said apparatuses. In particular, for a use in a telecontrol equipment item, the casing of the power supply module is flat, can be installed on wall-mounted DIN rails, and includes, on its front face, a DIN rail for fixing the apparatuses that it powers, that is to say other functional modules of the equipment. The casing also includes an apron for the connections. Preferably, the power supply is produced by series connection, and the power supply module includes a port dedicated to external communication via a module of the equipment.
US09515458B2 Mounting system for arranging electric devices, for example, especially in switchgear cabinets
A mounting system (1) arranges electric devices (2), in switchgear cabinets. The mounting system (1) includes horizontal mounting strip (3) to which a device (2) can be secured. At one of its longitudinal edges, the mounting strip (3) includes a receiving device (20) extending along the longitudinal axis of the mounting strip and receiving components (7, 8, 9, 10, 11). The receiving device (20) has locks (22, 23) to be interlocked with an associated lock (26) of the component (7, 8, 9, 10, 11) inserted into the receiving device (20). Depending on the design of the associated lock (26) of the component (7, 8, 9, 10, 11), the interlocking action can be cancelled exclusively by a pulling force acting on the additional component (7, 8, 9, 10, 11) or cannot be so cancelled but is self-locking.
US09515457B2 Angled facet broad-ridge quantum cascade laser
A particular quantum cascade laser includes a ridge-guide. The ridge-guide includes an angled facet that extends across a width of the ridge-guide and a flat facet that extends across the width of the ridge-guide. A first distance between the flat facet and the angled facet along a first side of the ridge-guide is different than a second distance between the flat facet and the angled facet along a second side of the ridge-guide.
US09515456B2 Hybrid laser including anti-resonant waveguides
Described are embodiments of apparatuses and systems including a hybrid laser including anti-resonant waveguides, and methods for making such apparatuses and systems. A hybrid laser apparatus may include a first semiconductor region including an active region of one or more layers of semiconductor materials from group III, group IV, or group V semiconductor, and a second semiconductor region coupled with the first semiconductor region and having an optical waveguide, a first trench disposed on a first side of the optical waveguide, and a second trench disposed on a second side, opposite the first side, of the optical waveguide. Other embodiments may be described and/or claimed.
US09515455B2 Method of manufacturing light emitting element
A method of manufacturing a light emitting element includes, sequentially, (a) forming a mask layer for selective growth; (b) forming a layered structure body by layering a first compound semiconductor layer, an active layer, and a second compound semiconductor layer; (c) forming, on the second surface of the second compound semiconductor layer, a second electrode and a second light reflecting layer formed from a multilayer film; (d) fixing the second light reflecting layer to a support substrate; (e) removing the substrate for manufacturing a light emitting element, and exposing the first surface of the first compound semiconductor layer and the mask layer; and (f) forming a first light reflecting layer formed from a multilayer film and a first electrode on the first surface of the first compound semiconductor layer.
US09515454B2 Narrow bandwidth laser device with wavelength stabilizer
A TO type laser device that can perform long-distance transmission due to a reduced line breadth of laser light. A semiconductor laser device which comprises a laser diode chip (100) that emits laser light; a wavelength-selective filter; a collimating lens (200) disposed in a light path between the laser diode chip (100) and the wavelength-selective filter and to collimate light emitted from the laser diode chip (100); a 45°-partial reflective mirror (300) disposed in a light path between the laser diode chip (100) and the wavelength-selective filter for changing laser light traveling parallel to the bottom of a package into laser light traveling perpendicularly to the bottom of the package; and an optical wavelength supervisory photodiode (500) disposed in a light path along which laser light reflecting from the wavelength-selective filter, after being emitted from the laser diode chip (100), passes through the 45°-partial reflective mirror (300).
US09515452B2 Coherent dynamically controllable narrow band light source
Disclosed herein is a coherent dynamically controllable narrow band light source (10), comprising a first sub-light source (12), said first sub-light source being electrically controllable such as to generate controllable time-dependent intensity patterns of light having a first wavelength, a Raman active medium (30) suitable to cause Raman scattering of light having said first wavelength, a second sub-light source (20) capable of emitting light with a second wavelength, said second wavelength being longer than said first wavelength, and an optical fiber or wave guide, wherein said light emitted by said first and second sub-light sources traverses a length of said optical fiber (30) or wave guide in a feed-forward configuration to facilitate a non-linear wavelength conversion step involving said Raman-active medium. At least one of said first and second sub-light sources (12, 20) has a coherence length longer than 0.05 mm, preferably longer than 0.5 mm and most preferably longer than 2 mm.
US09515451B2 Systems and methods for light amplification
A system for optical amplification includes an optical fiber with a core containing a gain medium surrounded by a cladding, a seed light source, a control light source, and a pump source. The seed light source transmits seed light, at a first wavelength and having a first linewidth greater than 100 MHz, into the core of the fiber. The control light source transmits control light, at a second wavelength shorter than the first wavelength, into the core where it interacts with the pumped gain medium so as to reduce the peak rate of heat deposition per unit length along the fiber. The control light has a second linewidth greater than 100 MHz. The pump source transmits pump light at a pump wavelength, shorter than the second wavelength, into the fiber so as to pump the gain medium and amplify the seed light.
US09515448B2 Microchip laser with single solid etalon and interfacial coating
A microchip laser includes a microchip laser base comprising a gain region and a passive Q-switch region. The microchip laser also includes a solid etalon coupled to the microchip laser base, and an interfacial coating disposed between the microchip laser base and the solid etalon. In some embodiments, the microchip laser further includes a dichroic coating disposed on a surface of the microchip laser base opposite the interfacial coating.
US09515446B2 Gas laser device
A gas laser device which can perform optical amplification, laser light passing through a laser gas excited by electrical discharge, including: a first and second pair of discharge electrodes arranged longitudinally along an optical axis of the laser light; at least two mirrors reflecting the laser light amplified by the gas laser, the mirrors arranged opposite to each other to interpose a first discharge region defined by the first pair of discharge electrodes and a second discharge region defined by the second pair of discharge electrodes therebetween; and a shielding member located between the first pair of discharge electrodes and the second pair of discharge electrodes, the shielding member protruding from electrode surfaces of the discharge electrodes toward the optical axis of the laser light. The configuration can efficiently suppress parasitic oscillation with a simple structure.
US09515443B2 Brush holder for an electrical swivel
Brush holder for an electrical swivel, wherein the brush holder is provided with an electrically conductive body, provided with means for connecting the body to a feed line for electrical energy and provided with at least one recess for receiving a brush adapted to transfer electrical energy towards a connector, wherein the brush is connected to the body by means of an electric wire for the transfer of electrical energy from the body towards the brush and by means of a spring for allowing the brush to be pushed out of the recess and to protrude from the surface of the body adapted to face the connector and for urging the brush against the connector.
US09515442B2 Interchangeable cable connection system
An electrical connection device for electrically connecting an electronic component of the type having a plurality of electrical connection points. The electrical connection device includes an electrical cable extending between first and second ends with at least one of the ends including an interface plug with a first set of internal contacts in electrical communication with the electrical cable. The device also includes at least one connector adapter including a first end configured for connection to the interface plug and a second end defining an electrical connector. The at least one connector adapter includes a second set of internal contacts configured to conductively engage the first set of internal contacts such that the electrical connector is in electrical communication with the electrical cable.
US09515440B2 Multiport terminal with current bars
The invention relates to a multiport chamber (1) with current bar (5) for receiving a plurality of cables to be connected to an electrical unit, wherein a plurality of electrically conductive connection chambers (4) are provided for a plurality of cables and the connection chambers (4) are connected to the current bar (5) in order to establish a further electrical connection in the electrical unit. In accordance with the invention the current bar (5) is configured in such a way that it forms a plurality of walls (6) of the connection chambers (4) and also a partition wall (7) between the connection chambers (4). A multiport chamber (1) that can be easily produced is thus provided.
US09515439B2 Connector insert assembly
Connector inserts having retention features with good reliability and holding force. These connector inserts may include ground contacts that provide an insertion portion having a reduced length. These connector inserts may be reliable, have an attractive appearance, and be readily manufactured.
US09515434B2 Connector plug with two rows of pins and connector socket with two rows of holes
A connector plug is provided. The connector plug includes: a first pin set positioned in a first row of the connector plug, which is configured to transmit and receive a data signal; and a second pin set positioned in a second row of the connector, which is configured to transmit and receive a data signal. Pins of the first pin set that belong to same type of pins of the second pin set, are positioned symmetrically with respect to the pins of the second pin set.
US09515432B2 Coaxial cable connector having electrical continuity member
A coaxial cable connector includes, in one embodiment, a body, a post, a coupler and a continuity member. The continuity member has a post contact portion and a coupler contact portion. The post contact portion has an anchored portion. The coupler contact portion has an arcuate portion.
US09515430B2 Angular high-voltage plug
An angular high-voltage plug that connects to a cable is described for use in high-voltage electrical systems of motor vehicles. The angular high-voltage plug includes an electrically insulating monolithic housing. The plug also includes an outer conductor and an inner conductor. The outer conductor includes a first outer conductor part at the cable that includes a connecting area and a linking area and a second outer conductor part at the plug. The first outer conductor part and the second outer conductor part are interconnected using an interference fit.
US09515428B2 Tuner having a frame with a through-hole and a stopper to control a rotation of a connection portion mounted therein
A tuner comprises a frame that is provided with a through-hole and a connection portion to which a connector is connected. The connection portion includes a flange portion that is able to select to pass through the through-hole or not to pass through the through-hole by the connection portion being rotated, and the frame includes a pressurization portion that pressurizes the flange portion which passes through the through-hole.
US09515427B2 Cable connector assembly having improved LED structure for indication
A cable connector assembly includes a cable and an electrical connector electrically connected with the cable, the electrical connector including a mating member, a printed circuit board (PCB) electrically connected with the mating member, a light emitting element mounted on the PCB, a light pipe to pass the light emitted by the light emitting element therethrough, a metal shell enclosing the PCB, and an outer case covering the metal shell, the light pipe mounted to the PCB, wherein the light pipe defines a first step portion and a second step portion on the bottom side of the first step portion, the first step portion defines a first surface exposing to a light-transmissive region of the outer case, the second step portion defines a second surface, and the metal shell bears against the second surface to press the light pipe against the PCB.
US09515425B2 Electrical socket
An audio interface (1) comprising a socket (3) arranged to receive a plug (30), the socket arranged to transfer an audio signal to the plug when connected to the socket, the interface comprising a detector (10) to determine whether an audio signal is received at the socket, the detector arranged to cause generation of a test signal to indicate that an audio signal is received at the socket, at least when the plug is not connected to the socket.
US09515424B2 Portable charger
Provided is a portable charger connected to a wall electric power source and configured to supply an electric power from the wall electric power source to a load. The portable charger includes a plug, an electric wire, a switch, a first detection unit, a second detection unit, and a control unit. The control unit is configured to supply an electric power through the electric wire to the load when the plug is plugged in the socket and to cut off the supply of the electric power flowing through the electric wire by controlling the switch on the basis of the user's approach that is detected by the first detection unit, and the tensile force that is detected by the second detection unit while the electric power is being supplied.
US09515420B2 Quick connect interface
A quick connect adaptor for conveying data or data and power from a first electronic unit to a second electronic unit. The adaptor includes a connectable interface between a first body part and a second body part, wherein the parts may be coupled with rotationally symmetry such that a 180 degree rotation of an adaptor body part, either clockwise or counterclockwise, results in an identical connection, eliminating the need for checking alignment when making a connection. A magnetic coupling secures the first and second body parts in either of two rotational orientations. In another embodiment, at least one end of the interface includes a “smart sensor” for detecting the magnetic polarity during the docking process and a processor or logic gates that configure communications so as to be correctly wired when coupled in either rotational orientation, even before an electrical connection is made.
US09515417B2 Sensor interconnect for medical monitoring devices
According to various embodiments, a medical monitoring system includes an extension cable for connecting a medical monitoring device to a sensor cable of a sensor. The extension cable includes a head for accepting a plug of the sensor club, wherein the head includes a lid for restraining the plug within an port of the head of the extension cable. Further, the head includes a hinge configured to allow the lid to rotate about the hinge, wherein the hinge is located within the head such that the head includes substantially flat outer surfaces.
US09515412B1 Card connector
A card connector includes a first housing, terminals and a second housing. The first housing has a base portion, a front surface of the base portion forms a protruded portion, a rear surface of the base portion forms an extending portion. A front surface of the protruded portion forms an inserting chamber extended to the extending portion. The rear surface of the base portion defines a fixing cavity located below the extending portion. Terminal grooves are defined in a top wall of the fixing cavity and a bottom surface of the extending portion and communicates with the inserting chamber and the fixing cavity. The terminals include first terminals and second terminals integratedly molded in the second housing. The second housing with the first terminals and the second terminals are fixed in the fixing cavity. The first terminals and the second terminals pass through the terminal grooves and extending into the inserting chamber.
US09515409B2 Cover and connection structure of housing and cover
A cover includes a body attached to a housing containing a terminal connected to an electric wire, and that includes an electric wire leading portion, and a lid to be fitted to the body. The cover includes a guide receiving portion on an outer surface of a distal end of one of the lid and the body, and a guide portion on a distal end of the other. The guide receiving portion has an inclined surface inclined toward an inner surface of the guide receiving portion along a fitting direction. The guide portion guides a distal end of the guide receiving portion. The guide portion protrudes outward perpendicularly to the fitting direction. The guide portion has an inclined surface on an inner surface of the distal end of the other of the lid and the body.
US09515404B2 Electrical contact plug and plug housing
An electrical contact plug has a cable with a plurality of conductor cores connected thereto. A plug housing extends in the longitudinal direction and extends from a front contact region up to a rear insertion region. The cable is introduced into the plug housing in the rear insertion region and is surrounded by an injection-molded encapsulation. In order to avoid reliably the ingress of injection-molding compound into the front contact region during the injection-molding operation, the plug housing has a conical receptacle in the rear insertion region, with a cone element being formed as insert part in said conical receptacle, through which cone element the conductor cores are passed individually. Reliable and safe sealing of the conductor cores with respect to the contact region is performed via the cone element.
US09515403B2 Female terminal assembly
A female terminal assembly includes: a female terminal body in which a male terminal receiving space is formed internally; and a cylindrical spring contact which is received in the male terminal receiving space from a male terminal insertion side of the female terminal body. A lock portion formed at a male terminal insertion-side end portion of the spring contact is fixed to a male terminal insertion-side end portion of the female terminal body.
US09515400B2 Micro SIM card connector
An electronic card connector comprises a terminal seat and a metal shell. The terminal seat comprises an insulative body having a plurality of receiving recessed portions and a plurality of terminals. The terminals can have a fixed unit, a pair of resilient arms, a contact portion and a soldering portion. The pair of resilient arms extend into the corresponding receiving recessed portion and are spaced apart from each other and are jointed with each other at distal ends, the contact portion is formed at the joint portion of the pair of resilient arms and the soldering portion is positioned between the pair of resilient arms. The metal shell comprises a top plate and resilient press unit. The resilient press unit comprises a resilient piece that includes two protruding portions that each obliquely intersect a card insertion direction.
US09515399B2 Connector alignment system
A stacked connector alignment system includes a board with processor and a board connector coupled to the processor. An alignment element is mounted to the board adjacent the board connector. The alignment element includes first alignment members and second alignment members that are spaced apart from the first alignment members. A first component includes a primary first component connector and a secondary first component connector that is located on an opposite surface of the first component from the primary first component connector, and the first alignment members are configured to engage the first component to align the primary first component connector with the board connector. A second component includes a second component connector, and the second alignment members are configured to engage the second component to align the second component connector with the secondary first component connector when the primary first component connector is connected to the board connector.
US09515392B2 High gain variable beam WI-FI antenna
This invention discloses a design and application of a variable beam antenna optimized for WI-HI application in data, video and voice transmission between various systems with an emphasis on medical monitoring. The subject antenna consists of a unique group of dipole radiators that are excited by zigzag feed lines and perform together as an array. This antenna is unique because it can provide various high gain beams by simply applying electrical shorts at the cross points in the feed lines. The shorts can be created mechanically or electronically. The antenna beam coverage can range from 15° to 110°- wide in H plane and maintains a constant beam width of 60° in E plane. The shorts are applied to reduce the antenna effective aperture, thereby increasing the beam width of the antenna. The current that flows to the outer dipoles are cut-off due to the shorts.
US09515388B2 Controlled lens antenna apparatus and system
Present configuration concerns microelectronics; for instance, compact antenna devices applied in mobile communications and other equipment operating in millimeter range. The controlled lens antenna apparatus may include antenna elements in an integrated circuit configured to transmit beams. The apparatus may also include a dielectric lens antenna configured to generate a plane wave based in the beams transmitted. The apparatus may include a plate configured to deflect the generated plane wave at a random angle.
US09515386B2 Antenna arrangement
An antenna arrangement comprising at least a first and a second elongated structure, e.g., a coaxial cable, for guiding an electromagnetic wave is provided. Each of said structures comprises a plurality of radiation elements. The structures are positioned alongside each other in their longitudinal direction of extension forming a bundle. The elongated structures are arranged within the bundle such that the radial positions of said structures are alternated in the longitudinal direction of extension.
US09515384B2 Apparatus and method for setting antenna resonant mode of multi-port antenna structure
An antenna tuning circuit for setting an antenna resonant mode of an antenna structure includes a switch arranged to selectively couple a first interconnection node to a second interconnection node, wherein the first interconnection node is coupled to a first port of the antenna structure, and the second interconnection node is coupled to a second port of the antenna structure. An antenna tuning method for setting an antenna resonant mode of an antenna structure includes generating a first control signal and selectively coupling a first interconnection node to a second interconnection node in response to the first control signal, wherein the first interconnection node is coupled to a first port of the antenna structure, and the second interconnection node is coupled to a second port of the antenna structure.
US09515382B2 Antenna device and wireless communication apparatus
An antenna device includes a feeding coil antenna and a booster coil antenna electromagnetically coupled to the feeding coil antenna. The feeding coil antenna includes a plurality of coil portions including at least one magnetic body and each including a coil conductor wound around the at least one magnetic body. The plurality of coil portions are connected to one another in an in-phase mode, and are arranged near one another such that winding axes of the coil conductors are oriented approximately in the same direction and at least portions of respective openings of the coil conductors face one another.
US09515379B2 Poly spiral antenna and applications thereof
A poly spiral antenna includes spiral antenna sections and interconnecting traces. A first spiral antenna section has a first interwoven spiral pattern and a first excitation configuration to provide a first radiation pattern component. A second spiral antenna section has a second interwoven spiral pattern and a second excitation configuration to provide a second radiation pattern component. A third spiral antenna section has a third interwoven spiral pattern and a third excitation configuration to provide a third radiation pattern component. The interconnecting traces couple the first, second, and third spiral antenna sections together such that the first, second, and third radiation pattern components form a radiation pattern of the poly spiral antenna.
US09515378B2 Environment property based antenna radiation pattern optimizing system
Mobile devices are handled in different environments which influence an antenna's performance due to electromagnetic interaction. Environment Property based Antenna Radiation Pattern Optimizing System (EPARPOS) is a system that actively varies, controls, directs, shapes and optimizes the antenna radiation pattern of mobile device in a closed loop manner controlled by precisely sensing the environment's property comprising dielectric nature, permittivity-∈, permeability-μ, conductivity-σ, susceptibility, direction, dimension, range, orientation, position, location, utilizing visual sensing, infrared sensing and signal quality parameters are all to determine the effect of the environment and effect on environment in order to enhance signal quality, protect the users by controlling radiation exposure in a user facing direction while maintaining radiations in other directions to sustain communication and to save battery power by controlling radiation in less effective directions. The system is utilized for guiding the user to locate and position the mobile device in a living space to achieve optimized performance.
US09515374B2 Collapsible portable antenna
A mechanism is disclosed to dismantle/erect a portable antenna that includes a linkage between radial driven elements and radial ground plane elements of the antenna which acts to cause them to move together between a collapsed and an erect arrangement.
US09515370B2 Antenna assembly and methods of assembling same
An antenna assembly is provided. The antenna assembly includes at least one foam member that is fabricated from a homogenous material, wherein the foam member includes a first surface and a second surface. At least one conductive plate including a first conductive plate is coupled to the foam member first surface. The foam member second surface is configured to couple to a second conductive plate or receive a conductive coating thereon to facilitate at least one electromagnetic wave to be channeled through the antenna assembly in a substantially single direction.
US09515368B2 Transmission line interconnect
One example discloses a transmission line interconnect, comprising: an antenna coupling surface; a transmission line coupling surface; and a dielectric molding compound electromagnetically coupling the antenna coupling surface to the transmission line coupling surface. Another example discloses a method of manufacture, for a transmission line interconnect, comprising: forming a dielectric molding compound; defining an antenna coupling surface on the dielectric molding compound; and defining a transmission line coupling surface on the dielectric molding compound whereby millimeter wave frequencies received at the antenna coupling surface are electromagnetically coupled to the transmission line coupling surface.
US09515367B2 Radiating sub-terahertz signal from tapered metallic waveguide into dielectric waveguide
A metallic waveguide is mounted on a multilayer substrate. The metallic waveguide has an open end formed by a top, bottom and sides configured to receive a core member of a dielectric waveguide, and an opposite tapered end formed by declining the top of the metallic waveguide past the bottom of the metallic waveguide and down to contact the multilayer substrate. A pinnacle of the tapered end is coupled to the ground plane element, and the bottom side of the metallic waveguide is in contact with the multiplayer substrate and coupled to the microstrip line.
US09515366B2 Printed circuit board dielectric waveguide core and metallic waveguide end
A dielectric waveguide may be manufactured by forming a set of parallel channels in a planar sheet that has a lower dielectric constant value. The set of channels is then filled with a material having a higher dielectric constant value. The planar sheet is sliced into a plurality of strips that each contain one or more of the channels.
US09515365B2 Dielectric coupling systems for EHF communications
Dielectric coupler devices and dielectric coupling systems for communicating EHF electromagnetic signals, and their methods of use. The coupler devices include an electrically conductive body having a major surface, the electrically conductive body defining an elongate recess, and the elongate recess having a floor, where a dielectric body is disposed in the elongate recess and configured to conduct an EHF electromagnetic signal.
US09515362B2 Tunable bandpass filter
A bandpass filter has a combline structure having a plurality of cascaded nodes. A plurality of nodes in the filter are connected both to resonant elements (a.k.a. resonators) and non-resonant elements (including elements having inductances and/or capacitances that do not resonate in a predetermined frequency band of interest). The resonant frequencies of the resonant elements may be adjusted, in order to adjust the location of the center frequency and/or the width of the passband of the filter. The characteristics of the resonant and non-resonant elements are selected such that the poles of the filter, when plotted on the complex plane, move substantially along the imaginary axis when the resonant frequencies are adjusted, without substantial movement along the real axis. The resulting bandpass filter has substantially constant losses and substantially constant absolute selectivity over a relatively wide range of bandwidths.
US09515359B2 Air-conditioning controlling apparatus for a battery pack
A heat removal unit that removes heat from air in a battery pack in which a battery cell is accommodated to cool or dehumidify the air is provided.Further, a circulation route that connects the battery pack and the heat removal unit to each other to recirculate the air is provided.Furthermore, a direction controller that controls a flow direction of the air in the circulation route in opposite direction upon cooling and upon dehumidification is provided.
US09515358B2 Condensing device and method for condensing moisture in a vehicle battery
A condensing system for a battery in a vehicle and a method for condensing moisture in a battery are provided. In one embodiment, the condensing system includes a battery housing, which surrounds a battery interior. At least one battery cell is arranged in the interior. An inlet opening is arranged in the battery housing, for a cooling fluid entering the battery interior. A first outlet opening and a second outlet opening are both arranged in the battery housing. The first outlet opening is in fluid communication with the cooling fluid emerging from the battery interior. A condensing device is arranged in the battery interior and is in fluid communication with the cooling fluid and causes moisture present in the battery interior to condense. The condensed moisture emerges into the environment through the second outlet opening.
US09515355B2 Method for sorting used secondary battery, rebuilt battery pack, vehicle and battery operated device incorporating same, and method for manufacturing rebuilt battery pack
Disclosed are a method for adequately sorting used secondary batteries; a rebuilt battery pack that incorporates the used batteries sorted by the sorting method and have identical characteristics; a vehicle and a battery operated device which use the rebuilt battery pack; and a method for manufacturing a rebuilt battery pack which employs used batteries having identical characteristics. The method for sorting used secondary batteries includes a resistance measurement step for measuring the battery resistance of a battery the characteristics of which show a bathtub curve with respect to the period of use. The method further includes a resistance distinguishing step for distinguishing whether the battery resistance of the battery is greater or less than a period threshold value for identifying to which one of the following periods the battery belongs: an initial-stage high-resistance period, and end-stage high-resistance period, and a middle-stage low-resistance period.
US09515349B2 Process for producing electrolyte for electrochemical battery cell
Disclosed is a process for producing an electrolyte for an electrochemical battery cell. In this process, a Lewis acid, a Lewis base and aluminum are mixed. The mixture is heated for a minimum period of six hours to a temperature above a minimum temperature of at least 200° C. and above the melting point of the mixture. An adduct of the Lewis acid and the Lewis base is thereby formed.
US09515345B2 Electricity-storage battery
An electricity storage battery is described, including a cathode electrolyte solution that contains a manganese redox material and an amine represented by a general formula (1) below: In the general formula (1), n is one of the integers 0 to 4, and each of R1, R2, R3 and R4 independently represents hydrogen, methyl or ethyl, with the proviso that at least one of R1, R2, R3 and R4 is methyl when n is 0.
US09515341B2 Porous membrane, electrolyte membrane including same, methods of manufacturing both, and fuel cell including at least one of the membranes
A porous membrane with pores that includes a polymerization product of a polyazole-based material, an electrolyte membrane including the porous membrane with a proton-conductive polymer provided in pores of the porous membrane, methods of manufacturing the porous membrane and the electrolyte membrane, and a fuel cell employing at least one of the porous membrane and the electrolyte membrane.
US09515340B1 Conductive polymer layers to limit transfer of fuel reactants to catalysts of fuel cells to reduce reactant crossover
An apparatus of an aspect includes a fuel cell catalyst layer. The fuel cell catalyst layer is operable to catalyze a reaction involving a fuel reactant. A fuel cell gas diffusion layer is coupled with the fuel cell catalyst layer. The fuel cell gas diffusion layer includes a porous electrically conductive material. The porous electrically conductive material is operable to allow the fuel reactant to transfer through the fuel cell gas diffusion layer to reach the fuel cell catalyst layer. The porous electrically conductive material is also operable to conduct electrons associated with the reaction through the fuel cell gas diffusion layer. An electrically conductive polymer material is coupled with the fuel cell gas diffusion layer. The electrically conductive polymer material is operable to limit transfer of the fuel reactant to the fuel cell catalyst layer.
US09515337B2 Fuel cell module
A fuel cell (FC) module includes a fuel cell stack and FC peripheral equipment. The fuel cell module includes a first area where an exhaust gas combustor and a start-up combustor are provided, an annular second area around the first area and where a reformer and a heat exchanger are provided, and an annular third area around the second area and where an evaporator is provided.
US09515336B2 Diaphragm pump for a fuel cell system
A method of supplying fuel to a fuel cell system wherein a flexible diaphragm controls ingress and egress of liquid reactant. The method utilizes a pump assembly including a first subassembly and a second subassembly. The first subassembly includes a fluid conduit; an inlet fluidly coupled to the liquid reactant dispenser and the fluid conduit; an outlet fluidly coupled to a reaction chamber and the fluid conduit; and a diaphragm, defining a portion of the fluid conduit, that flexes to pump the liquid reactant from the inlet to the outlet. The diaphragm preferably includes an actuation point coupled to the diaphragm, wherein the liquid reactant is substantially contained within the first subassembly during pumping. The second subassembly is couplable to the first subassembly, and is fluidly isolated from the liquid reactant wherein operation of the actuator causes diaphragm flexion.
US09515333B1 Flow management in fuel cell configurations
A fluid resistance section outside a fuel cell can regulate the reactant flow against the pressure changes in the reaction zones of the electrodes, reducing the fluctuations in reactant flows to the fuel cell electrodes due to dynamic fluctuations in fluid pressure at the fuel cell electrode because of the release of gaseous products. The outside fluidic resistor can have resistance much higher than the resistance of the flow through the electrodes, thus effectively determining the amount of the reactant flow to the electrodes, independent of the electrode areas.
US09515332B2 Fuel cell stack including ejector and blower for anode recirculation and method for controlling the same
The present invention relates to a fuel cell system for vehicles and a method for controlling the same which stably maintains an output of a fuel cell by precisely estimating a recirculated hydrogen amount to a stack. A fuel cell system according to the present invention may include: a stack comprising a plurality of unit cells for generating electrical energy by electrochemical reaction of a fuel and an oxidizing agent; a blower for recirculating a gas exhausted from the stack so as to supply the gas back to the stack; an ejector for recirculating the gas exhausted from the stack, receiving hydrogen so as to mix the hydrogen to the recirculated gas, and supplying the mixture to the stack; a sensor module for detecting a driving condition of the vehicle; and a control portion for controlling operations of the blower and the ejector by using the driving condition of the vehicle and performance maps of the blower and the ejector.
US09515328B2 Diffusion media, fuel cells, and fuel cell powered systems
In at least certain embodiments, the present invention provides a diffusion media and fuel cells and systems employing the diffusion media. In at least one embodiment, the diffusion media comprises a porous matrix having an outer surface and a hydrophilic polymeric coating on at least a portion of the porous matrix with the hydrophilic coating comprising the cured product of a formulation comprising a hydrophilic monomer.
US09515326B2 Bipolar plate for fuel cell and fuel cell
A bipolar plate and a fuel cell are provided. The bipolar plate for the fuel cell has a plurality of flow channels, and a rib is defined between neighboring two flow channels. A top surface of the rib may be a roughened surface or have a porous structure in order to improve performance of the fuel cell.
US09515325B2 Method for modifying surface of metal bipolar plate and bipolar plate for fuel cell
A method for modifying the surface of a metal bipolar plate is provided. The method includes the steps of providing a metal substrate having a conducting adhesion layer on a surface thereof, the metal substrate having a flow field structure at the surface thereof; applying expanded graphite powder onto the conducting adhesion layer; and press-fitting the expanded graphite powder and the metal substrate with a mold structurally corresponding to the flow field structure, to form a graphite layer covering the surface the metal substrate from the expanded graphite powder. A bipolar plate for a fuel cell is further provided.
US09515324B2 Method for manufacturing fuel cell separator
A separator is provided that has a metal substrate and a conductive resin layer on the surface of the metal substrate. The conductive resin layer contains a resin and a conductive substance dispersed in the resin. The separator is configured such that the proportion of the conductive substance to the resin increases continuously from the metal substrate toward the surface of the separator.
US09515321B2 Binder solution for anode, active material slurry for anode comprising the binder solution, anode using the slurry and electrochemical device comprising the anode
The present disclosure relates to a binder solution for an anode, comprising a thermally cross-linkable polymer binder that is cross-linked by heat, and a solvent for dissolving the thermally cross-linkable polymer binder, and exhibiting a concentration of hydrogen ions corresponding to pH 2.5 to pH 4.5; an active material slurry for an anode, comprising the binder solution; an anode using the slurry; and an electrochemical device comprising the anode. The binder solution for an anode according to one aspect of the present disclosure can relieve the volume expansion of an anode active material by the intercalation and disintercalation of lithium during cycles of electrochemical devices to improve the durability of an anode active material layer, thereby enhancing the life characteristics of the electrochemical devices, and also can provide good dispersibility to the active material slurry for an anode, thereby improving the coating stability of an anode active material layer.
US09515318B2 Mesoporous metal oxide microsphere electrode compositions and their methods of making
Compositions and methods of making are provided for mesoporous metal oxide microspheres electrodes. The mesoporous metal oxide microsphere compositions comprise (a) microspheres with an average diameter between 200 nanometers (nm) and 10 micrometers (μm); (b) mesopores on the surface and interior of the microspheres, wherein the mesopores have an average diameter between 1 nm and 50 nm and the microspheres have a surface area between 50 m2/g and 500 m2/g. The methods of making comprise forming composite powders. The methods may also comprise refluxing the composite powders in a basic solution to form an etched powder, washing the etched powder with an acid to form a hydrated metal oxide, and heat-treating the hydrated metal oxide to form mesoporous metal oxide microspheres.
US09515317B2 Surface treating method of negative electrode for magnesium secondary battery, negative electrode for magnesium secondary battery, and magnesium secondary battery
A surface treating method of a negative electrode for a magnesium secondary battery is provided, wherein the magnesium secondary battery includes: a negative electrode capable of releasing magnesium ions during discharging and capable of precipitating elemental magnesium during charging; a positive electrode capable of precipitating a magnesium oxide during the discharging and capable of releasing magnesium ions during the charging; and a non-aqueous ion conductor for conducting magnesium ions as conduction species. The surface treating method comprises initializing the negative electrode by performing the discharging to form a bare surface at a surface of the negative electrode.
US09515315B2 Positive electrode active substance particles for non-aqueous electrolyte secondary batteries and process for producing the same, and non-aqueous electrolyte secondary battery
The present invention relates to positive electrode active substance particles for non-aqueous electrolyte secondary batteries, comprising an oxide having a spinel structure and comprising at least Li and Mn as main components and an oxide comprising at least Li and Zr, in which the oxide comprising at least Li and Zr forms a mixed phase comprising two or more phases, and a content of the oxide comprising at least Li and Zr in the positive electrode active substance particles is 0.1 to 4% by weight. The present invention provides positive electrode active substance particles for non-aqueous electrolyte secondary batteries which are excellent in high-temperature characteristics and a process for producing the positive electrode active substance particles, and a non-aqueous electrolyte secondary battery.
US09515313B2 Nonaqueous electrolyte secondary battery and method of producing same
A nonaqueous electrolyte secondary battery includes: a positive electrode collector core material; and a sheet body including a plurality of granulation bodies. The sheet body is disposed on the positive electrode collector core material. The granulation bodies each contain a first positive electrode active material particle, a second positive electrode active material particle, and expanded graphite, the first positive electrode active material particle including lithium-nickel composite oxide, the second positive electrode active material particle including lithium iron phosphate.
US09515309B2 Cylindrical secondary battery pack
Disclosed herein is a secondary battery pack including a cylindrical battery cell having an electrode assembly of a cathode/separator/anode structure mounted in a battery case together with an electrolyte in a sealed state, an insulative mounting member having an opening, through which a cathode terminal of the battery cell is exposed upward, the insulative mounting member being configured to have a structure in which a protection circuit module (PCM) assembly is disposed at the top of the insulative mounting member, the insulative mounting member being mounted to the top of the battery cell, a PCM assembly including a PCM having an external input and output terminal formed at the top thereof and connecting members coupled to the bottom of the PCM, the connecting members being connected to a protection circuit of the PCM, and an insulative cap coupled to the top of the battery cell so that the insulative cap surrounds the PCM assembly in a state in which the external input and output terminal is exposed, wherein the cathode terminal and an anode terminal of the battery cell are electrically connected to external input and output terminals via the connecting members through the PCM in a state in which the insulative mounting member and the PCM assembly are disposed on the battery cell.
US09515302B2 Rechargeable battery pack
A rechargeable battery pack includes a frame accommodating a unit cell including a rechargeable battery; a protection circuit module electrically connected to the unit cell and in the frame; and a pair of cases coupled to opposite sides of the frame and accommodating the unit cell and the protection circuit module, and wherein the frame has coupling grooves in the sides and wherein each of the pair of cases comprises coupling protrusions, the coupling protrusions of each case being alternately coupled to the coupling grooves.
US09515301B2 Coin battery having a sealing plate which suppresses deformation
Disclosed is a coin battery including: positive and negative electrodes, a separator interposed therebetween, and an electrolyte; and a housing accommodating these elements. The housing includes: a cylindrical battery case having a bottom, and a first side wall rising from the periphery thereof; a sealing plate having a top, and a second side wall extending from the periphery of the top and along inside the first side wall; and a gasket between the first and second side walls. The sealing plate has: a first curved portion at the boundary between the top and the second side wall, a second curved portion continued from the first curved portion, a third curved portion continued from the second curved portion, and a descending portion continued from the third curved portion. The ratio: R1/R2 where R1 and R2 are outer radii of curvatures of the first and second curved portions is 0.22 to 1.88.
US09515299B2 Molding packaging material and battery case
Provided is a molding packaging material that can have an increased use life, can suppress a decrease over time in inter-layer lamination strength, and can have superior molding properties in extrusion molding, draw forming, and the like. The laminate molding packaging material contains: an outside substrate layer (2) comprising a heat resistant resin; an inside sealant layer (3) comprising a thermoplastic resin; and a metal foil provided between the two layers as a barrier layer (4). A matte coat layer (6) comprising a heat resistant resin coating film containing a dispersion of inorganic or organic solid microparticles is formed on the outer surface of the outside substrate layer (2), and the gloss value of the surface thereof is suppressed to no greater than 30%.
US09515296B2 Deposition device including laser mask and deposition method using the same
A deposition device including a chamber configured to accommodate a substrate supported on a stage, a deposition source configured to discharge material toward the substrate, and a laser mask system configured to form a laser mask between the substrate and the stage.
US09515294B2 Laser beam irradiation apparatus and manufacturing method of organic light emitting display apparatus using the same
A laser beam irradiation apparatus includes a laser light source, a controller for controlling energy of light generated by the laser source, a first optical system for adjusting a shape of light that has passed through the controller, a scanner for adjusting the direction of light that has passed through the first optical system, and an F-theta lens for reducing a beam that has passed through the scanner.
US09515293B2 OLED encapsulated in a full-wafer adhesive having a perforated cover
The invention relates to an organic light-emitting diode (OLED) comprising a stack comprising, in sequence and in the following order, a substrate (2), a first electrode (3), an organic layer (4), and a second electrode (5), characterized in that it comprises a layer of adhesive (6) and a cover (7) fixed onto said stack using said layer of adhesive (6), and the cover (7) comprises at least one through-opening (8), wherein electrical access to an electrode (3, 5) is possible through said opening (8).The present invention can be more specifically used in electronic devices having screens and lighting.
US09515291B2 Light emitting apparatus
Provided is a light emitting apparatus including a substrate including a plurality of light emitting devices, wherein the substrate further includes a plurality of first members configured to diffuse light emitted from at least one of the light emitting devices, and a second member that is positioned between the first members, wherein the second member includes a light absorbing layer.
US09515290B2 Organic light emitting display device and method of manufacturing the same
An organic light emitting display device includes a substrate, a thin film transistor on the substrate, an organic light emitting element including a first electrode connected to the thin film transistor, an organic light emitting layer on the first electrode, and a second electrode on the organic light emitting layer, and a pixel definition film disposed on the substrate to expose a part of the first electrode. The pixel definition film includes nanoparticles that change a path of light emitted from the organic light emitting layer.
US09515289B2 Organic electroluminescence display device and method of manufacturing organic electroluminescence display device
The organic electroluminescence display device of an embodiment of the present invention includes a substrate, a plurality of pixels formed on the substrate, and a sealing film that covers the plurality of pixels. The sealing film includes a first barrier layer, a base layer covering the top surface of the first barrier layer, an inter layer locally formed on the top surface of the base layer, and a second barrier layer covering the top surface of the base layer and the top surface of the inter layer. The inter layer is formed so as to cover a step on the top surface of the base layer.
US09515288B2 Organic electroluminescent device
The invention relates to the field of organic electronic devices (1) with diffusion barriers and to a method to manufacture such organic electronic devices (1) to provide an organic electronic device (1) with excellent performance, which is as stable as possible over time. The organic electronic device (1) with a substrate (2), a first electrode (3) arranged on top of the substrate (2) and a functional layer stack (FLS) arranged on top of the first electrode (3) comprising one or more organic layers (41, 42, 43) and a second electrode (5), wherein the organic electronic device (1) further comprises at least one essentially transparent and electrically conductive graphene layer (6) arranged in contact to at least one of the organic layers (41, 42, 43) acting as a diffusion barrier against diffusion of atoms, ions or molecules into this organic layer (41, 42, 43).
US09515287B2 Organic light-emitting display apparatus having encapsulation layer of low temperature viscosity transition and method of manufacturing the same
An organic light-emitting display apparatus includes a substrate, a display unit, an encapsulation layer, and a protection layer. The display unit is formed on the substrate. The encapsulation layer covers the display unit. The protection layer is formed on the encapsulation layer. The encapsulation layer is formed of a low temperature viscosity transition (LVT) inorganic material. The protection layer is formed of an elastic, adhesive material to protect the encapsulation layer from an external force.
US09515285B2 Display device including a light emitting layer containing quantum dots
A display device includes a first insulating layer provided on a first surface of a first substrate; a second insulating layer including a plurality of openings exposing a part of the first insulating layer; and a plurality of light emitting elements including a first electrode located in each of the plurality of openings, the first electrode being located on a part of the first insulating layer in the opening and continuously on the second insulating layer and including an inclining surface on a side surface of the second insulating layer; a light emitting layer containing quantum dots, the light emitting layer being located on a part of the first electrode in the opening and including a side surface facing the inclining surface of the first electrode; and a second electrode located on the light emitting layer.
US09515277B2 Organic electroluminescent element, organic EL display device and organic EL illumination
To provide an organic electroluminescent element having a low driving voltage, high current efficiency and high voltage efficiency.An organic electroluminescent element comprising an anode, a cathode and an organic layer disposed between the anode and the cathode, wherein the organic layer comprises a mixed layer containing a light-emitting low molecular compound and/or a charge-transporting low molecular compound in a film containing an insolubilized polymer obtained by insolubilizing an insolubilizing polymer, and, adjacent to the mixed layer, a layer containing a light-emitting low molecular compound and a charge-transporting low molecular compound and not containing an insolubilized polymer.
US09515274B2 Photovoltaic cells
This disclosure features an article that includes first and second electrodes, a photoactive layer between the first and second electrodes, and a hole carrier layer between the first electrode and the photoactive layer. The hole carrier layer includes a Cu(I)-containing material. The article is configured as a photovoltaic cell.
US09515272B2 Display device manufacture using a sacrificial layer interposed between a carrier and a display device substrate
A method of manufacturing a display device is provided which uses a sacrificial layer interposed between a carrier and a display device substrate.
US09515271B2 Organic light-emitting device
An organic light-emitting device including a first electrode; a second electrode; and an organic layer between the first electrode and the second electrode, wherein the organic layer includes an emission layer and an electron transport region, the electron transport region being between the emission layer and the second electrode; the emission layer includes a first compound represented by any one of the following Formulae 1-1 and 1-2, and the electron transport region includes a second compound represented by any one of the following Formulae 2-1 and 2-2:
US09515268B2 Aromatic amine derivatives and preparation method, uses and organic electroluminescent devices thereof
The present invention relates to the field of organic electroluminescent technology, particularly relates to an aromatic amine derivative, its preparation method, uses and organic electroluminescent devices. The technical aim of the present invention is to improve the film forming ability and the redox repeatability. The aromatic amine derivative has the structure of formula I, wherein, R1, R2, R3 and R4 each independently represent a hydrogen, a substituted or unsubstituted C1-C40 alkyl, a substituted or unsubstituted C1-C40 alkoxy, a substituted or unsubstituted C3-C40 cycloalkyl, a substituted or unsubstituted C6-C50 aryl group, a substituted or unsubstituted C3-C50 heteroaryl containing one or two heteroatoms selected from N, O and S, or a substituted or unsubstituted C10-C40 fused aryl group formed together with the phenyl group linked therewith; wherein, m, n, p and q each independently represent 0, 1, 2, 3, 4 or 5; the substituents are one or more groups selected from the group consisting of a halogen, a C1-C10 alkyl, a C1-C10 alkoxy, a C3-C20 cycloalkyl, a C6-C20 aryl group or a C4-C20 heteroaryl group. The present invention may be applied in organic electroluminescent devices.
US09515267B2 Electroactive materials
There is disclosed a compound having Formula I or Formula I′: In Formula I and Formula I′: Ar1 and Ar2 are the same or different and are aryl groups; R1 through R5 are independently the same or different at each occurrence and are D, F, alkyl groups, aryl groups, alkoxy groups, silyl groups, or crosslinkable groups; R6 is H, D, or halogen; a through e are independently an integer from 0 to 4; f is 1 or 2; g is 0, 1 or 2; h is 1 or 2; and n is an integer greater than 0.
US09515262B2 Resistive random-access memory with implanted and radiated channels
Resistive RAM (RRAM) devices having increased uniformity and related manufacturing methods are described. Greater uniformity of performance across an entire chip that includes larger numbers of RRAM cells can be achieved by uniformly creating enhanced channels in the switching layers through the use of radiation damage. The radiation, according to various described embodiments, can be in the form of ions, electromagnetic photons, neutral particles, electrons, and ultrasound.
US09515259B2 Phase change memory
A phase change memory includes a substrate, a number of row electrode leads located on the substrate, and a number of column electrode leads located on the substrate and intersected with the number of row electrode leads to define a number of sections. A number of phase change memory units is received in the number of sections and includes a first circuit and a second circuit. The first circuit includes a carbon nanotube wire electrically connected between the first row electrode lead and first column electrode lead, the carbon nanotube wire includes a bending portion. The second circuit includes the first row electrode lead, the carbon nanotube wire, a phase change layer, and the second row electrode lead electrically connected in series, wherein the phase change layer is electrically connected between the bending portion of the carbon nanotube wire and the second row electrode.
US09515258B2 Memory structure and manufacturing method of the same
A memory structure including an insulating layer, a first electrode layer and a first barrier is provided. The insulating layer has a recess. The first electrode layer is formed in the recess and has a first top surface. The first barrier is formed between the insulating layer and the first electrode layer, and has a second top surface lower than the first top surface. The first top surface and the second top surface are lower than an opening of the recess.
US09515256B2 Phase transition devices and smart capacitive devices
Phase transition devices may include a functional layer made of functional material that can undergo a change in conductance in response to an external stimulus such as an electric or magnetic or optical field, or heat. The functional material transitions between a conducting state and a non-conducting state, upon application of the external stimulus. A capacitive device may include a functional layer between a top electrode and a bottom electrode, and a dielectric layer between the functional layer and the top electrode. A three terminal phase transition switch may include a functional layer, for example a conductive oxide channel, deposited between a source and a drain, and a gate dielectric layer and a gate electrode deposited on the functional layer. An array of phase transition switches and/or capacitive devices may be formed on a substrate, which may be made of inexpensive flexible material.
US09515254B2 Storage element, memory and electronic apparatus
A storage element is provided. The storage element includes a memory layer having a first magnetization state of a first material; a fixed magnetization layer having a second magnetization state of a second material; an intermediate layer including a nonmagnetic material and provided between the memory layer and the fixed magnetization layer; wherein the first material includes Co—Fe—B alloy, and at least one of a non-magnetic metal and an oxide.
US09515249B2 Piezoelectric material
A lead-free piezoelectric material that has stable, excellent piezoelectric constant and mechanical quality factor in a wide operating temperature range is provided. A piezoelectric material include a perovskite-type metal oxide represented by (Ba1-xCax)a(Ti1-yZry)O3 (where 1.00≦a≦1.01, 0.155≦x≦0.300, 0.041≦y≦0.069) as a main component, and manganese incorporated in the perovskite-type metal oxide. The manganese content relative to 100 parts by weight of the perovskite-type metal oxide is 0.12 parts by weight or more and 0.40 parts by weight or less on a metal basis.
US09515244B2 Seebeck/Peltier thermoelectric conversion element with parallel nanowires of conductor or semiconductor material organized in rows and columns through an insulating body and process
A novel and effective structure of a stackable element (A1, A2) or more generally adapted to be associated modularly to other similar elements to form a septum of relatively large dimensions for a Seebeck/Peltier thermoelectric conversion device, may be fabricated with common planar processing techniques. The structure basically consists of a stack (A1, A2) of alternated layers of a first dielectric material (2), adapted to be deposited in films of thickness lesser than or equal to about 50 nm, of low heat conductivity and which is etchable by a solution of a specific chemical compound, and of a second dielectric material (3) of low heat conductivity that is not etched by the solution. For the whole width, the stack is interrupted by parallel trenches (T1, T2, T3) the width (w) of which may correspond to the minimum linewidth of definition allowed by the resolution of the lithographic process used for defining the parallel trenches, but which may eventually be limited by other parameters, in primis the height of the stack (h) to be subjected to the vertical etch to cut the stack in order to form the parallel trenches.
US09515242B2 Optoelectronic component and method for producing an optoelectronic component
An optoelectronic component may include a carrier element having a heat sink, at least one semiconductor chip for emitting electromagnetic radiation which is mounted and electrically contact-connected on the carrier element, a radiation-transmissive cover disposed downstream of the at least one semiconductor chip, a converter layer applied on the radiation-transmissive cover and spaced apart from the at least one semiconductor chip, a frame composed of thermally conductive material, which frame extends around the at least one semiconductor chip and is in direct contact with the converter layer, and at least one connecting element for thermally connecting the frame to the heat sink.
US09515241B2 LED structure, metallic frame of LED structure, and carrier module
A metallic frame of an LED structure includes two conductive frames spaced apart from each other with a gap and a plurality of extending arms respectively and integrally extended from the conductive frames. Each conductive frame includes a top surface, a bottom surface, and a lateral surface connecting the top and bottom surfaces. Each top surface comprises a sealed region and a mounting region surrounded by the sealed region, and the sealed and mounting regions of each conductive frame are defined by an insulating body. Each conductive frame has at least one slot concavely formed on the sealed region, and the lateral surface is formed with two openings and the slot is communicated with the two openings, such that the slot of each of the conductive frames is configured to separate at least one of the extending arms from the mounting region of the conductive frames.
US09515238B2 Micro-LED array with filters
An integrated LED device is provided. The LED device includes a substrate. The LED device includes a semiconductor material including a light generating layer and positioned on the substrate. The semiconductor material and/or the substrate are configured to control light internally to output quasi-collimated light from a light emitting surface of the LED device. The LED device includes an optical component positioned at the light emitting surface and configured to receive quasi-collimated light exiting the light emitting surface and to alter one or more optical properties of at least some beams of the quasi-collimated light.
US09515237B2 Method for producing a light emitting device
A method for producing a light emitting device includes a first bonding step including disposing a first bonding member a mounting substrate, placing a light emitting element on the mounting substrate such that the first bonding member is located between a mounting face of the light emitting element and the mounting substrate, and hardening the first bonding member thereby bonding the light emitting element and the mounting substrate such that, in a plan view, an entirety of the first bonding member is contained within an area of the mounting face of the light emitting element; and a second bonding step including disposing a second bonding member on the upper face of the mounting substrate such that, in a plan view, the second bonding member is located at at least a portion of an outer edge of the mounting face of the light emitting element, and hardening the second bonding member.
US09515233B2 Wavelength-converting element, optoelectronic component and printing stencil
A wavelength-converting element having the shape of a small flat plate having a basic shape with an outer contour, wherein the wavelength-converting element includes a cut-out compared to the basic shape which is defined by a boundary edge, and at a conjunction of the boundary edge and the outer contour, an angle of less than 90° is enclosed.
US09515231B2 Phosphor and light emitting device using the same
A phosphor for absorbing light in a region from ultraviolet to visible light and emitting light whose emission peak wavelength being in a range of 600 nm to 650 nm, represented by general formula shown below, and having a difference between the emission peak wavelength and a half width being larger than 543 nm. SrtCavEuwAlxSiyNz (in which, 0.5≦t<1, 0
US09515226B2 Light emitting device and method for making the same
A light emitting device comprises a substrate, a semiconductor body, and a transition layer. The semiconductor body is configured to generate light and comprises an n-type layer disposed on the substrate, a p-type layer disposed on the n-type layer, and an active layer disposed between the n-type layer and the p-type layer. The transition layer is disposed on the substrate and located between the n-type layer and the substrate, and comprises a plurality of sub-layers. The plurality of the sub-layers comprise compositions different from each other, and each sub-layer comprise the composition including IIIA metal, transition metal, and nitrogen. The light emitting device further comprises a p-contact layer disposed on the p-type layer of the semiconductor body. A substrate structure and a method for making the light emitting device are also presented.
US09515225B2 Light-emitting device
A light-emitting device of an embodiment of the present disclosure comprises a substrate; a semiconductor stack comprising a first type semiconductor layer, a second type semiconductor layer and an active layer formed between the first type semiconductor layer and the second type semiconductor layer, wherein the first type semiconductor layer comprises a non-planar roughened surface; a bonding layer formed between the substrate and the semiconductor stack; and multiple recesses each comprising a bottom surface lower than the non-planar roughened surface; and multiple buried electrodes physically buried in the first type semiconductor layer, wherein the multiple buried electrodes are formed in the multiple recesses respectively, and one of the multiple buried electrodes comprises an upper surface higher than the non-planar roughened surface of the first type semiconductor layer.
US09515222B2 Gallium nitride on 3C—SiC composite wafer
We disclose a semiconductor structure comprising a monocrystalline silicon wafer; spaced apart monocrystalline silicon carbide layers disposed directly on the silicon wafer; amorphous and/or polycrystalline silicon carbide layers disposed directly on the silicon wafer between the monocrystalline silicon carbide layers; first gallium nitride layers disposed on the monocrystalline silicon carbide layers; and second gallium nitride layers disposed on the amorphous and/or polycrystalline silicon carbide layers.
US09515217B2 Monolithically isled back contact back junction solar cells
According to one aspect of the disclosed subject matter, a method for forming a monolithically isled back contact back junction solar cell is provided. Emitter and base contact regions are formed on a backside of a semiconductor wafer having a light receiving frontside and a backside opposite said frontside. A first level contact metallization is formed on the wafer backside and an electrically insulating backplane is attached to the semiconductor wafer backside. Isolation trenches are formed in the semiconductor wafer patterning the semiconductor wafer into a plurality of electrically isolated isles and the semiconductor wafer is thinned. A metallization structure is formed on the electrically insulating backplane electrically connecting the plurality of isles.
US09515213B2 Back protective sheet for solar cell module and solar cell module
A back protective sheet for a solar cell module containing a polyester support that is biaxially stretched and then subjected to a thermal fixation treatment; and a polymer layer arranged to be in contact with at least one surface of the polyester support, wherein the polymer layer contains a binder having at least one functional group selected from a carboxyl group, a hydroxyl group, an amino group, a sulfonic acid group, and a carbonyl group; a pigment; and a crosslinking agent-derived structure, and the polyester support contains a polyester, a pigment, and an terminal blocking agent, has excellent adhesion between the support and the functional layer after wet heat aging.
US09515212B2 Solar cell and method for manufacturing with pre-amorphization implant to form emitter
A method for manufacturing a solar cell includes preparing a semiconductor substrate having a first conductivity type dopant; ion-implanting a pre-amorphization elements into a front surface of the semiconductor substrate to form an amorphous layer; and forming an emitter layer by ion-implanting second conductivity type dopant into the front surface of the semiconductor substrate. The method then further includes heat-treating the layers to activate the second conductivity type dopant. The method further includes forming a back surface field layer at a back surface of the semiconductor substrate by ion-implanting a first conductivity type dopant.
US09515210B2 Diode barrier infrared detector devices and superlattice barrier structures
Diode barrier infrared detector devices and superlattice barrier structures are disclosed. In one embodiment, a diode barrier infrared detector device includes a first contact layer, an absorber layer adjacent to the first contact layer, and a barrier layer adjacent to the absorber layer, and a second contact layer adjacent to the barrier layer. The barrier layer includes a diode structure formed by a p-n junction formed within the barrier layer. The barrier layer may be such that there is substantially no barrier to minority carrier holes. In another embodiment, a diode barrier infrared detector device includes a first contact layer, an absorber layer adjacent to the first contact layer, a barrier layer adjacent to the absorber layer, and a diode structure adjacent to the barrier layer. The diode structure includes a second contact layer.
US09515209B2 Bare quantum dots superlattice photonic devices
Manipulation of the passivation ligands of colloidal quantum dots and use in QD electronics. A multi-step electrostatic process is described which creates bare QDs, followed by the formation of QD superlattice via electric and thermal stimulus. Colloidal QDs with original long ligands (i.e. oleic acid) are atomized, and loaded into a special designed tank to be washed, followed by another atomization step before entering the doping station. The final step is the deposition of bare QDs onto substrate and growth of QD superlattice. The method permits the formation of various photonic devices, such as single junction and tandem solar cells based on bare QD superlattice, photodetectors, and LEDs. The devices include a piezoelectric substrate with an electrode, and at least one layer of bare quantum dots comprising group IV-VI elements on the electrode, where the bare quantum dots have been stripped of outer-layer ligands.
US09515208B2 Solid-state image pickup device and electronic apparatus
Solid-state imaging devices (1) including: a substrate (12); a photoelectric conversion section (50) comprising a chalcopyrite material formed over the substrate in a light incident side; a transparent electrode (57) in the light incident side of the photoelectric conversion section; and an electron barrier layer (58) formed between the photoelectric conversion section and the transparent electrode; and methods of manufacturing the solid-state imaging devices and electronic apparatuses including the solid-state imaging devices.
US09515202B2 Composition for forming solar cell electrode, and electrode produced from composition
A composition for solar cell electrodes includes a conductive powder, a glass frit, an organic vehicle, and a thixotropic agent, the composition satisfying each of Formulae 1 to 7 described herein. A solar cell electrode is produced from the composition. A method of manufacturing a solar cell includes printing the composition in a predetermined pattern over a front surface of a wafer, and firing the printed composition pattern to form at least electrode.
US09515199B2 Power semiconductor devices having superjunction structures with implanted sidewalls
A semiconductor device has a drift region having an upper surface and a lower surface. A first contact is on the upper surface of the drift region and a second contact is on the lower surface of the drift region. The drift region includes a first semiconductor pillar that has a tapered sidewall and that is doped with first conductivity type impurities and a second semiconductor pillar on the tapered sidewall of the first semiconductor pillar, the second semiconductor pillar doped with second conductivity type impurities that have an opposite conductivity from the first conductivity type impurities.
US09515184B2 Semiconductor arrangement with multiple-height fins and substrate trenches
Among other things, one or semiconductor arrangements, and techniques for forming such semiconductor arrangements are provided. An etch sequence is performed to form a first etched region over a planar region of a semiconductor arrangement. The first etched region exposes a planar structure, such as an alignment mark used for alignment during semiconductor fabrication. The etch sequence forms a second etched region over a semiconductor fin region of the semiconductor arrangement. In an embodiment, the etch sequence forms a first trench, a first fin nub and a first pillar in the semiconductor fin region, where the first trench is formed in a semiconductor substrate of the semiconductor fin region. A multi-depth STI structure is formed over at least one of the first trench, the first fin nub, or the first pillar.
US09515177B2 Vertically integrated semiconductor device and manufacturing method
A vertically integrated semiconductor device in accordance with various embodiments may include: a first semiconducting layer; a second semiconducting layer disposed over the first semiconducting layer; a third semiconducting layer disposed over the second semiconducting layer; and an electrical bypass coupled between the first semiconducting layer and the second semiconducting layer.
US09515174B2 Method of manufacturing a semiconductor storage device
A method for manufacturing a semiconductor storage device includes forming a first insulating film on a semiconductor substrate; forming a first conductive layer; forming a trench in the semiconductor substrate and the first conductive layer by etching; forming a deposition layer by depositing an insulating material in the trench; removing by etching a side portion of the deposition layer to form a side surface that has a flat surface and a curved surface with a lower edge that is in contact with a side surface of the first conductive layer and to form a gap between the curved and the side surfaces; forming a second conductive layer; removing the deposition layer until at least the curved surface of the side surface is exposed to form an embedded insulator in the trench; forming a second insulating film; and forming a control gate on the embedded insulator and the second insulating film.
US09515173B2 Method of fabricating electrostatically enhanced fins and stacked nanowire field effect transistors
Non-planar semiconductor devices including semiconductor fins or stacked semiconductor nanowires that are electrostatically enhanced are provided. The electrostatic enhancement is achieved in the present application by epitaxially growing a semiconductor material protruding portion on exposed sidewalls of alternating semiconductor material portions of at least one hard mask capped semiconductor-containing fin structure that is formed on a substrate.
US09515170B2 Semiconductor device and method for manufacturing the same
An object of the present invention is to provide a semiconductor device having a fin-type transistor that is excellent in characteristics by forming a fin-shaped semiconductor portion and a gate electrode with high precision or by making improvement regarding variations in characteristics among elements. The present invention is a semiconductor device including a fin-shaped semiconductor portion having a source region formed on one side thereof and a drain region formed on the other side thereof, and a gate electrode formed between the source region and the drain region to surround the fin-shaped semiconductor portion with a gate insulating film interposed therebetween. One solution for solving the problem according to the invention is that the gate electrode uses a metal material or a silicide material that is wet etchable.
US09515166B2 Selective atomic layer deposition process utilizing patterned self assembled monolayers for 3D structure semiconductor applications
Methods for forming fin structure with desired materials formed on different locations of the fin structure using a selective deposition process for three dimensional (3D) stacking of fin field effect transistor (FinFET) for semiconductor chips are provided. In one embodiment, a method of forming a structure with desired materials on a substrate includes forming a patterned self-assembled monolayer on a circumference of a structure formed on a substrate, wherein the patterned self-assembled monolayer includes a treated layer formed among a self-assembled monolayer, and performing an atomic layer deposition process to form a material layer predominantly on the self-assembled monolayer from the patterned self-assembled monolayer.
US09515161B1 Monolithically integrated self-aligned GaN-HEMTs and schottky diodes and method of fabricating the same
Monolithic integration of high-frequency GaN-HEMTs and GaN-Schottky diodes. The integrated HEMTs/Schottky diodes are realized using an epitaxial structure and a fabrication process which reduces fabrication cost. Since the disclosed process preferably uses self-aligned technology, both devices show extremely high-frequency performance by minimizing device parasitic resistances and capacitances. Furthermore, since the Schottky contact of diodes is formed by making a direct contact of an anode metal to the 2DEG channel the resulting structure minimizes an intrinsic junction capacitance due to the very thin contact area size. The low resistance of high-mobility 2DEG channel and a low contact resistance realized by a n+GaN ohmic regrowth layer reduce a series resistance of diodes as well as access resistance of the HEMT.
US09515159B2 Electronic sensor apparatus for detecting chemical or biological species, microfluidic apparatus comprising such a sensor apparatus, and method for producing the sensor apparatus and method for producing the microfluidic apparatus
An electronic sensor apparatus for detecting chemical or biological species includes a semiconductor chip, a sensor device, and a substrate. The chip is produced from a semiconductor substrate and is configured for one or more functions such as: amplifying and/or evaluating an electrical voltage, amplifying and/or evaluating an electric current, amplifying and/or evaluating an electrical charge, and amplifying and/or reading out capacitance changes. The sensor device has an active surface configured to detect chemical or biological species and generate an electrical signal based on a species-characteristic interaction with the active surface. The electrical signal can be an electrical voltage, an electric current, an electrical charge and/or a capacitance change. The substrate is produced from a melt-moldable material and has a surface including first and second regions. The chip is at least partly embedded in the first region, and the sensor device is at least partly embedded in the second region.
US09515158B1 Semiconductor structure with insertion layer and method for manufacturing the same
A semiconductor structure and a method for forming the same are provided. The semiconductor structure includes a substrate, an interfacial layer formed over the substrate, and an insertion layer formed over the interfacial layer. The semiconductor structure further includes a gate dielectric layer formed over the insertion layer and a gate structure formed over the gate dielectric layer. In addition, the insertion layer is made of M1Ox, and M1 is a metal, O is oxygen, and x is a value greater than 4.
US09515157B2 Sensor arrangement comprising a carrier substrate and a ferroelectric layer and method for producing and using the sensor arrangement
A sensor arrangement comprises a carrier substrate and a ferroelectric layer disposed on the carrier substrate, wherein the sensor arrangement comprises means for reading the permittivity of the ferroelectric layer. The sensor arrangement is such that the ferroelectric layer is disposed in a crystalline manner on the carrier substrate. A method for producing the sensor arrangement and to use of the same is also disclosed.
US09515156B2 Air gap spacer integration for improved fin device performance
A method for providing a FinFET device with an air gap spacer includes providing a substrate a plurality of fins and a dummy gate arranged transverse to the plurality of fins; depositing a sacrificial spacer around the dummy gate; depositing a first interlayer dielectric (ILD) layer around the sacrificial spacer; selectively etching the dummy polysilicon gate relative to the first ILD layer and the sacrificial spacer; depositing a replacement metal gate (RMG); etching a portion of the RMG to create a recess surrounded by the sacrificial spacer; and depositing a gate capping layer in the recess. The gate capping layer is at least partially surrounded by the sacrificial spacer and is made of silicon oxycarbide (SiOC).
US09515143B2 Heterogeneous layered structure, method of preparing the heterogeneous layered structure, and electronic device including the heterogeneous layered structure
A method of manufacturing a heterogeneous layered structure includes growing a hexagonal boron nitride sheet directly on a metal substrate in a chamber, increasing a temperature of the chamber to about 300° C. to about 1500° C., and forming a graphene sheet on the hexagonal boron nitride sheet by supplying a carbon source into the chamber while thermally treating the hexagonal boron nitride sheet at the increased temperature.
US09515138B1 Structure and method to minimize junction capacitance in nano sheets
A method of making a semiconductor device includes forming a nanosheet stack including a first layer and a second layer; patterning a gate stack on the nanosheet stack; forming a first spacer along a sidewall of the gate stack; removing an endwall portion of the nanosheet stack that extends beyond the first spacer such that a portion of the second layer is exposed from a sidewall of the first spacer; depositing a second spacer along a sidewall of the first spacer; recessing the substrate beneath the second spacer to form an isolation region; depositing an oxide on the gate stack and within the isolation region and partially recessing the oxide; removing a portion of the second spacer such that the portion of the second layer is exposed; and growing an epitaxial layer on the portion of the second layer that is exposed to form a source/drain over the isolation region.
US09515136B2 Edge termination structure for a power integrated device and corresponding manufacturing process
An integrated device has: a structural layer of semiconductor material doped with a first conductivity type and having a top surface defining a plane; a functional region, doped with a second conductivity type, arranged in an active area of the structural layer at the top surface, in the proximity of an edge area of the integrated device, which externally surrounds the active area; and an edge termination region, doped with the second conductivity type, joined to the functional region and arranged in the edge area. The edge termination region has a doping profile and a junction depth that vary in a first direction parallel to the plane.
US09515126B2 Photoelectric conversion device having improved external quantum efficiency and image sensor having the same
A photoelectric conversion device of an image sensor includes a first transparent electrode layer, an active layer, and a second transparent electrode layer, which are sequentially stacked. A light having a wavelength of about 440 nm-480 nm is absorbed within a depth of about ⅕ of an entire thickness of the active layer from both the top and bottom surfaces of the active layer.
US09515125B2 Socket structure for three-dimensional memory
Socket structures that are configured to use area efficiently, and methods for providing socket regions that use area efficiently, are provided. The staircase type contact area or socket region includes dielectric layers between adjacent planar electrodes that partially cover a portion of a planar electrode that does directly underlie an adjacent planar electrode. The portion of a dielectric layer between adjacent planar electrodes can be sloped, such that it extends from an edge of an overlying planar electrode to a point between the edge of an underlying planar electrode and a point corresponding to an edge of the overlying planar electrode.
US09515124B2 Magnetic memory, magnetic memory device, and method for manufacturing magnetic memory
According to one embodiment, a magnetic memory including a first magnetic unit, a first nonmagnetic unit, a first fixed magnetic unit, a second fixed magnetic unit, a first electrode, a second electrode, and a third electrode. The first magnetic unit extends in a first direction. The first magnetic unit includes a plurality of magnetic domains arranged in the first direction. The first nonmagnetic unit contacts one end of the first magnetic unit. The first fixed magnetic unit is separated from the first magnetic unit. The first fixed magnetic unit contacts the first nonmagnetic unit. The second fixed magnetic unit is separated from the first magnetic unit and the first fixed magnetic unit. The second fixed magnetic unit is in contact with the first nonmagnetic unit. The second fixed magnetic unit is magnetized in a direction different from a magnetization direction of the first fixed magnetic unit.
US09515114B2 Solid-state imaging device, method of forming microlens in solid-state imaging device, and electronic apparatus
A solid-state imaging device comprises an imaging pixel located in a light receiving region, the imaging pixel being a component of a unit pixel that is one of a plurality of unit pixels arranged in an array direction. A phase difference detection pixel is located in the light receiving region and is a component of the unit pixel, and has a corresponding photodiode with an upper surface. A first microlens corresponds to the imaging pixel, and a second microlens corresponding to the phase difference detection pixel. The second microlens has a first bottom surface in the array direction and a second bottom surface in a direction diagonal to the array direction, the second bottom surface being closer to the upper surface of the photodiode than the first bottom surface.
US09515109B2 Photodetection device, sensor package and electronic equipment including an optical filter
A photodetection device of the present invention includes a semiconductor substrate which is defined such that a first light-receiving portion and a second light-receiving portion are spaced from one another, and an optical filter which is formed on the semiconductor substrate, and includes a first filter which is disposed so as to cover the first light-receiving portion, to selectively allow an optic element in a first wavelength band to transmit through, and a second filter which is disposed so as to cover the second light-receiving portion, to selectively allow an optic element in a second wavelength band different from the first wavelength band, to transmit through, and the optical filter has a filter laminated structure which is defined such that edge portions of the first filter and the second filter overlap one another on a boundary region between the first light-receiving portion and the second light-receiving portion.
US09515108B2 Image sensors with contamination barrier structures
An image sensor package including a barrier structure to prevent image sensor die contamination is described. A barrier structure may surround an image sensor die that is attached on an image sensor carrier. The barrier structure may be attached to a transparent window structure as well as a package substrate. The barrier structure may extend through a hole in the package substrate. The image sensor carrier may be mounted to the package substrate using a thermal compression head that is able to apply independently varying compressive forces to corresponding regions of a surface at a given time. The thermal compression head may be used to cure the barrier structure and/or adhesives used in the image sensor package. Underfill adhesive may be deposited between discrete mounting structures used to mount the package substrate to the image sensor carrier, after the barrier structure has been applied.
US09515104B2 Semiconductor device
A semiconductor device includes a semiconductor substrate, a light receiving element region, a peripheral region, a boundary region, a plurality of signal lines, and a conductive layer. In light receiving element region, light receiving elements for performing photoelectric conversion are formed. Peripheral region is formed outside light receiving element region for performing input/output of an electric signal from/to the outside of the semiconductor substrate. Boundary region is formed between light receiving element region and peripheral region. The plurality of signal lines are arranged in boundary region for performing input/output of electric signals between light receiving element region and peripheral region. Conductive layer is arranged in a layer different from each of the plurality of signal lines. A relative position of conductive layer as seen from each of the plurality of signal lines is all identical, and conductive layer is all arranged in an identical layer.
US09515101B2 Array substrate and method for manufacturing the same, and display device
The present invention provides an array substrate and a method for manufacturing the same, and a display device. Wherein, after forming a pattern corresponding to a source/drain electrode layer, a transparent conducting layer is formed, and then a passivation layer is formed on the transparent conducting layer. Because the transparent conducting layer has a characteristic of anti-etching, it is hard to be damaged, so that the problem of damage of copper in the source/drain electrode layer is solved without increasing the process steps for forming the array substrate.
US09515095B2 Array substrate and method for manufacturing the same, and display device
The invention belongs to the field of display technology, and particularly provides an array substrate and a method for manufacturing the same, and a display device. The array substrate includes a base substrate, and a thin film transistor and at least one driving electrode provided on the base substrate, and the thin film transistor includes a gate, and a source and a drain provided in the same layer, wherein the gate, the source or the drain is formed with the same material as the at least one driving electrode, and thickness thereof is larger than that of the at least one driving electrode. Regarding the array substrate, the manufacturing procedure of the array substrate is effectively simplified, cost for mask plate and material is reduced, equipment investment is reduced, production cost is saved, productivity is improved, and competitiveness of the display device is increased, while the transmittance requirement is met.
US09515094B2 Storage device and semiconductor device
A storage device with long data retention time is configured to include a first transistor, a second transistor, and a third transistor. The first transistor controls electrical connection between a first wiring and a gate of the second transistor. The second transistor controls electrical connection between a second wiring and a gate of the third transistor. The off-state current of the first transistor is lower than that of the third transistor. The leakage current of the second transistor is lower than that of the third transistor.
US09515093B2 Thin film transistor array panel and method for manufacturing the same
A thin film transistor array panel is provided as follows. A gate electrode is disposed on a substrate. A semiconductor layer is disposed on the gate electrode. A gate insulating layer is disposed between the gate electrode and the semiconductor layer. A source electrode is disposed on a first side of the semiconductor layer, having a first lateral surface. A drain electrode is disposed on a second side of the semiconductor layer, having a second lateral surface. The first and second lateral surfaces define a spacing which overlaps the gate electrode. A metal silicide layer is disposed on the first and second lateral surfaces. A passivation layer is disposed on the metal silicide layer, the source electrode and the drain electrode. The passivation layer is not in contact with the first and second lateral surfaces.
US09515092B2 Display device and method of manufacturing the same
A display device and a method of manufacturing the same are disclosed. In one aspect, the display device includes a display area formed over a substrate and configured to display an image, and a pad area formed over the substrate surrounding the display area and configured to provide an electrical signal to the display area. The pad area includes a first electrode layer formed over the substrate and electrically connected to the display area and a second electrode layer formed over the first electrode layer and electrically connected to the first electrode layer. The pad area also includes a first organic layer bonded to a portion of the second electrode layer at a first adhesion strength, a third electrode layer bonded to the first organic layer at a second adhesion strength and electrically connected to the second electrode layer, and a flexible PCB electrically connected to the third electrode layer.
US09515088B1 High density and modular CMOS logic based on 3D stacked, independent-gate, junctionless FinFETs
A semiconductor structure is provided with fins on a substrate, including: a first active layer with a first source, first channel, and first drain, each doped with the same concentration of dopant as each other; a dielectric layer on the first active layer; a second active layer with a second source, second channel, and second drain, each doped with the same concentration of dopant as each other; and a first and second gate disposed on an opposing first and second sidewall of the channels, respectively. A method for making such a semiconductor structure is also provided.
US09515086B2 Semiconductor device, electronic device, and method of fabricating the same
Provided are a three dimensional semiconductor memory device and a method of fabricating the same. In the three dimensional semiconductor memory device, a stack of gate electrodes and insulating layers may be formed on a substrate, a channel structure may extend through the stack and connect to the substrate. A blocking insulating layer, a charge storing layer and a tunnel insulating layer may be formed between each gate electrode and the channel structure. The tunnel insulating layer may include a high-k dielectric layer with a low charge trap site density. The tunnel insulating layer may also include a first and a second tunnel insulating layers, and the high-k dielectric layer is provided between the first and second tunnel insulating layers.
US09515084B2 3D nonvolatile memory device having common word line
A 3D nonvolatile memory device including memory cells vertically stacked is disclosed. Word lines are integrally formed to be elongated over adjacent cell regions spaced apart from each other, and portions of the word lines between the cell regions are partially etched in a stepped shape to form word line contact regions.
US09515080B2 Vertical NAND and method of making thereof using sequential stack etching and landing pad
A vertical NAND string device includes a semiconductor channel, where at least one end portion of the semiconductor channel extends substantially perpendicular to a major surface of a substrate, at least one semiconductor or electrically conductive landing pad embedded in the semiconductor channel, a tunnel dielectric located adjacent to the semiconductor channel, a charge storage region located adjacent to the tunnel dielectric, a blocking dielectric located adjacent to the charge storage region and a plurality of control gate electrodes extending substantially parallel to the major surface of the substrate.
US09515077B1 Layout of static random access memory cell
A static random access memory (SRAM) cell is defined by first and second boundaries disposed opposite to each other and third and fourth boundaries disposed opposite to each other and intersected by the first and second boundaries. The SRAM cell includes a first invertor including a first P-type pull-up transistor and a first N-type pull-down transistor, a second invertor including a second P-type pull-up transistor and a second N-type pull-down transistor and cross-coupled to the first invertor, and first and second pass-gate transistors connected to the cross-coupled first and second invertors. Source regions of the first and second P-type pull-up transistors are formed by a main source active region extending continuously between the first and second boundaries. Source regions of the first and second pass-gate transistors and the first and second N-type pull-down transistors are formed by different source active regions spaced apart from each other.
US09515069B2 Semiconductor die
A semiconductor die includes a substrate and an insulation layer over the substrate. The semiconductor die also includes a plurality of P-metal gate areas within the insulation layer and over a first device region. The semiconductor device further includes a plurality of N-metal gate areas within the insulation layer and over the first device region. The semiconductor device additionally includes a plurality of dummy P-metal gate areas within the insulation layer and over a second device region. The semiconductor device also includes a plurality of dummy N-metal gate areas within the insulation layer and over the second device region. At least one N-metal gate area individually differs in size compared to at least one P-metal gate area. At least one dummy P-metal gate area individually differs in size compared to at least one dummy N-metal gate area.
US09515065B2 Driver circuit, method of manufacturing the driver circuit, and display device including the driver circuit
Provided are a driver circuit which suppresses damage of a semiconductor element due to ESD in a manufacturing process, a method of manufacturing the driver circuit. Further provided are a driver circuit provided with a protection circuit with low leakage current, and a method of manufacturing the driver circuit. By providing a protection circuit in a driver circuit to be electrically connected to a semiconductor element in the driver circuit, and by forming, at the same time, a transistor which serves as the semiconductor element in the driver circuit and a transistor included in the protection circuit in the driver circuit, damage of the semiconductor element due to ESD is suppressed in the process of manufacturing the driver circuit. Further, by using an oxide semiconductor film for the transistor included in the protection circuit in the driver circuit, leakage current in the protection circuit is reduced.
US09515063B2 Compound semiconductor device and manufacturing method of the same
An electrode (109) insulated from a compound semiconductor layer (102) and being in contact with an electrode (101) and a compound semiconductor layer (103) is provided. A lattice constant of the compound semiconductor layer (103) is smaller than both of a lattice constant of the compound semiconductor layer (102) and a lattice constant of a compound semiconductor layer (104), and a lattice constant of a compound semiconductor layer (107) is smaller than both of the lattice constants of the compound semiconductor layer (102) and the lattice constants of the compound semiconductor layer (104). A conduction band energy of the compound semiconductor layer (103) is higher than a conduction band energy of the compound semiconductor layer (104).
US09515061B2 Semiconductor module and semiconductor device
A semiconductor module includes first and second semiconductor elements connected in series, an insulating substrate, first and second metal patterns formed on a first main surface and a second main surface of the insulating substrate, and first, second, and third electrode plates. A lower surface electrode and an upper surface electrode of the first semiconductor element are bonded to the first metal pattern and the first electrode plate, respectively. The first metal pattern and the third electrode plate are bonded together. An upper surface electrode of the second semiconductor element is bonded to the third electrode plate. A lower surface electrode of the second semiconductor element is electrically connected to the second metal pattern. The second metal pattern and the second electrode plate are bonded together. One end of the first electrode plate and one end of the second electrode plate are led out on the same side.
US09515054B2 Semiconductor device and stacked semiconductor package having the same
A semiconductor device includes a plurality of semiconductor chips connected through a scribe lane; a plurality of through electrodes formed in each of the plurality of semiconductor chips; a heat dissipation member formed in the scribe lane; and heat transfer members connecting the through electrodes with the heat dissipation member.
US09515053B2 Microelectronic packaging without wirebonds to package substrate having terminals with signal assignments that mirror each other with respect to a central axis
A microelectronic assembly can include a circuit panel having first and second panel contacts at respective first and second surfaces thereof, and first and second microelectronic packages each having terminals mounted to the respective panel contacts. Each package can include a microelectronic element having a face and contacts thereon, a substrate having first and second surfaces, and terminals on the second surface configured for connecting the package with an external component. The terminals can include first terminals at positions within first and second parallel grids. The first terminals can be configured to carry address information usable by circuitry within the package to determine an addressable memory location from among all the available addressable memory locations of a memory storage array within the microelectronic element. Signal assignments of the first terminals in the first grid can be a mirror image of signal assignments of the first terminals in the second grid.
US09515049B2 Flexibly-wrapped integrated circuit die
Embodiments of a flexibly-wrapped integrated circuit die device and a method for mounting a flexibly-wrapped integrated circuit die to a substrate are disclosed. In some embodiments, the flexibly-wrapped integrated circuit die device includes a substrate and a flexible integrated circuit die coupled to the substrate in a substantially vertical orientation with reference to a surface of the substrate.
US09515047B2 High performance package and process for making
A method for manufacturing circuit component package is disclosed. The method first forms copper circuits on a single-sided printed circuit board, and prints an electrically conductive paste on a plurality of predetermined locations on the copper circuits before positioning circuit dice of the circuit components on the locations printed with the electrically conductive paste. The method then forms a plurality of surface copper bumps on a copper plate, and prints the electrically conductive paste on each of the copper bumps. Then position and fit the printed circuit board on which the circuit dice are positioned relative to the copper plate on which the electrically conductive paste is printed such that each of the circuit dice aligns with the corresponding copper bump printed with the electrically conductive paste. Then inject a hermetic sealant into the space between the fitted printed circuit board and copper plate before forming at least two terminal electrodes of each package on a side opposite the copper plate and copper bumps by etching process. Then form plated through-holes in one of the terminal electrodes of each package so that the terminal electrode is electrically connected to the circuit dice via the copper circuit of the single-sided printed circuit board. Finally cut to separate the individual circuit components to form the package.
US09515044B1 Electronic device, method of manufacturing the same, metal particle, and electroconductive paste
Provided is an electronic device which includes a conductor allowing an electric signal to transmit therethrough, the conductor containing a plurality of species of metal components having different melting points, and internally having a constituent concentration gradient produced as a result of diffusion of the metal components.
US09515043B2 Semiconductor device including a buffer layer structure for reducing stress
A semiconductor device includes a semiconductor chip, wiring that is included in the semiconductor chip and has a coupling part between parts with different widths, a pad being formed above the wiring and in a position overlapping the coupling part, a bump being formed on the pad, a buffer layer being formed in a position between the coupling part and the pad so as to cover the entire couple part, and inorganic insulating layers being formed between the wiring and the buffer layer and between the buffer layer and the pad, respectively. The buffer layer is made of a material other than resin and softer than the inorganic insulating layer.
US09515027B2 Printed circuit board
A printed circuit board includes a printed circuit board, a semiconductor device mounted on the printed circuit board, a capacitor element mounted on the printed circuit board 2, a ground conductor plane to which a ground terminal of the semiconductor device is connected, and first and second power source conductor planes which are arranged so as not to contact with each other. The second power source conductor plane and the ground conductor plane are arranged so as to oppose to each other to form a planar capacitor. The printed circuit board has a first connecting conductor which connects a power source terminal of the semiconductor device with the second power source conductor plane, and a second connecting conductor which connects the first power source conductor plane with the second power source conductor plane through a first terminal of the capacitor element. Thereby, an electromagnetic radiation noise is reduced.
US09515023B2 Multilevel contact to a 3D memory array and method of making thereof
A multi-level device includes at least one device region and at least one contact region. The contact region has a stack of alternating plurality of electrically conductive layers and plurality of electrically insulating layers located over a substrate. The plurality of electrically conductive layers form a stepped pattern in the contact region, where each respective electrically insulating layer includes a sidewall and a respective underlying electrically conductive layer in the stack extends laterally beyond the sidewall. Optionally, a plurality of electrically conductive via connections can be formed, which have top surfaces within a same horizontal plane, have bottom surfaces contacting a respective electrically conductive layer located at different levels, and are isolated from one another by at least one trench isolation structure.
US09515022B2 Semiconductor device with air gap and method for fabricating the same
A method for fabricating a semiconductor device includes preparing a substrate which includes a memory cell region and a peripheral circuit region; forming a buried word line in the substrate in the memory cell region; forming a planar gate structure over the substrate in the peripheral circuit region; forming a bit line structure over the substrate in the memory cell region; forming a first air spacers over a sidewalls of the planar gate structure; and forming a second air spacers over a sidewalls of the bit line structure.
US09515021B1 Semiconductor structure and method of forming the same
A semiconductor device with metal-doped etch stop layer therein and a method of manufacturing the same is disclosed. The method includes forming an semiconductor device with a interconnect structure that has a dielectric layer and a conductor therein, and an etch stop layer over the dielectric layer; applying a photo resist layer and patterning the photo resist layer to expose a portion of the etch stop layer on a top surface of the conductor over of the dielectric layer; and doping the exposed portion of the etch stop layer with an element to form a metal-doped etch stop layer. The formed metal-doped etch stop layer has a recess structure and functions as a conductive pad over the conductor.
US09515019B2 Semiconductor device
The present invention has for its purpose to provide a technique capable of reducing planar dimension of the semiconductor device. An input/output circuit is formed over the semiconductor substrate, a grounding wiring and a power supply wiring pass over the input/output circuit, and a conductive layer for a bonding pad is formed thereover. The input/output circuit is formed of MISFET elements in the nMISFET forming region and the pMISFET forming region, resistance elements in the resistance element forming regions and diode elements in the diode element forming regions functioning as protective elements. A wiring connected to the protective elements and positioned under the grounding wiring and the power supply wiring is pulled out in a pulling-out region between the nMISFET forming region and the pMISFET forming region and between the grounding wiring and the power supply wiring to be connected to the conductive layer.
US09515018B2 Wiring substrate and method for manufacturing wiring substrate
A wiring substrate includes an insulating layer, a wiring layer, a via wiring, and a solder resist layer. The wiring layer includes a pad body that constitutes a part of a pad and a wiring pattern including an upper surface. The pad includes the pad body, a first metal layer formed on an upper surface of the pad body and including an embedded part embedded in the insulating layer and a projecting part including upper and side surfaces and projecting from the upper surface of the insulating layer, and a second metal layer including an upper surface and covering the upper and side surfaces of the projecting part. The upper surface of the pad body and the upper surface of the wiring pattern are on the same plane. The upper surface of the second metal layer is positioned lower than the upper surface of the solder resist layer.
US09515017B2 Ground via clustering for crosstalk mitigation
Embodiments of the present disclosure are directed towards techniques and configurations for ground via clustering for crosstalk mitigation in integrated circuit (IC) assemblies. In some embodiments, an IC package assembly may include a first package substrate configured to route input/output (I/O) signals and ground between a die and a second package substrate. The first package substrate may include a plurality of contacts disposed on one side of the first package substrate and at least two ground vias of a same layer of vias, and the at least two ground vias may form a cluster of ground vias electrically coupled with an individual contact. Other embodiments may be described and/or claimed.
US09515016B2 Semiconductor package and method of forming z-direction conductive posts embedded in structurally protective encapsulant
A semiconductor package is made using a prefabricated post carrier including a base plate and plurality of conductive posts. A film encapsulant is disposed over the base plate of the post carrier and around the conductive posts. A semiconductor die is mounted to a temporary carrier. The post carrier and temporary carrier are pressed together to embed the semiconductor die in the film encapsulant. The semiconductor die is disposed between the conductive posts in the film encapsulant. The temporary carrier and base plate of the post carrier are removed. A first circuit build-up layer is formed over a first side of the film encapsulant. The first circuit build-up layer is electrically connected to the conductive posts. A second circuit build-up layer is formed over a second side of the film encapsulant opposite the first side. The second circuit build-up layer is electrically connected to the conductive posts.
US09515000B2 Method for manufacturing semiconductor device
The reliability of multipoint contact by a contact pin with an external terminal is improved while achieving an improvement in easiness of manufacture of the contact pin. The contact pin includes first and second contact pins. Further, the first contact pin has a support portion extending in a y direction and a tip portion connected to the support portion. The second contact pin also has a support portion extending in the y direction and a tip portion connected to the support portion. Here, the support portion of the first contact pin and the support portion of the second contact pin are arranged side by side along an x direction in a horizontal plane (xy plane). Further, the tip portion of the second contact pin is shifted from the tip portion of the first contact pin along the y direction in the horizontal plane, crossing (perpendicular to) the x direction.
US09514986B2 Device with capped through-substrate via structure
A device including a first dielectric layer on a semiconductor substrate, a gate electrode formed in the first dielectric layer, and a through-substrate via (TSV) structure penetrating the first dielectric layer and extending into the semiconductor substrate. The TSV structure includes a conductive layer, a diffusion barrier layer surrounding the conductive layer and an isolation layer surrounding the diffusion barrier layer. A capping layer including cobalt is formed on the top surface of the conductive layer of the TSV structure.
US09514984B1 Semiconductor device and method for manufacturing same
A method for manufacturing a semiconductor device includes forming an insulating layer on a semiconductor layer; forming a metal layer on the insulating layer; and forming a first interconnect by selectively etching the metal layer. The first interconnect is electrically connected to the semiconductor layer and has a loop configuration. The method includes forming a first mask layer covering the first interconnect and the insulating layer; and forming a second mask layer on the first mask layer. The second mask layer has a first opening over a portion of the first interconnect. The method further includes exposing the portion of the first interconnect by selectively removing the first mask layer using the second mask layer; and forming a second interconnect by selectively removing the portion of the first interconnect using the first mask layer. The second interconnect has two ends and is electrically connected to the semiconductor layer.
US09514983B2 Cobalt based interconnects and methods of fabrication thereof
A metal interconnect comprising cobalt and method of forming a metal interconnect comprising cobalt are described. In an embodiment, a metal interconnect comprising cobalt includes a dielectric layer disposed on a substrate, an opening formed in the dielectric layer such that the substrate is exposed. The embodiment further includes a seed layer disposed over the substrate and a fill material comprising cobalt formed within the opening and on a surface of the seed layer.
US09514981B1 Interconnect structure
An interconnect structure includes a dielectric layer with one or more trenches extending therein, one or more interconnect lines, and one or more first liner layers. Each interconnect line is positioned within a trench. At least one first liner layer is affixed between the trench bottom surface and the interconnect bottom surface. The interconnect structure further includes one or more second liner layers. At least one of the second liner layers is affixed directly to the interconnect top surface and at least one interconnect side surface. The interconnect structure further includes at least one air gap. Each air gap is positioned between the trench side surface and the interconnect side surface. A corresponding method of manufacture and product of a method of manufacture are also disclosed.
US09514977B2 Semiconductor device and manufacturing method thereof
A semiconductor device according to the present embodiment includes a first wiring part located above a substrate and made of a first metal material. A second wiring part is provided as being superimposed on the first wiring part and having a width substantially equal to that of the first wiring part. A first resistivity of the first wiring part is lower than a second resistivity of the second wiring part when the first and second wiring parts have a first width. The second resistivity is lower than the first resistivity when the first and second wiring parts have a second width larger than the first width. The semiconductor device includes both of an area in which the first and second wiring parts have the first width and an area in which the first and second wiring parts have the second width.
US09514973B2 Lid-opening/closing device
A lid-opening/closing device includes a device body, a lock-opening/closing mechanism, and a container-securing unit. A pod including a container body, a lid portion defining a bottom portion that is openable and closable with respect to the container body, and a locking mechanism performing unlocking and locking of the lid portion with respect to the container body is placed on the device body. The lock-opening/closing mechanism performs unlocking operation to cause the locking mechanism to perform the unlocking, and performs locking operation to cause the locking mechanism to perform the locking by moving an engaging portion configured to engage with the locking mechanism when the pod is placed on the device body. The container-securing unit secures the container body to the device body in conjunction with the lock-opening/closing mechanism when the locking mechanism is caused to perform the unlocking.
US09514972B2 Fixture drying apparatus and method
Wafer carrier washing and drying apparatus and method, especially useful for the semiconducting industry.
US09514967B2 Plasma processing apparatus
A plasma processing apparatus includes a processing chamber for processing a sample with a plasma, an RF power supply for generating the plasma within the processing chamber, an RF bias power supply for supplying RF bias power to a sample stage on which the sample is mounted, a pulse generation unit for creating first pulses for modulating the output from the RF power supply for generating the plasma and second pulses for modulating the output from the RF bias power supply, and a controller for providing control of the processing of the sample with the sample. The pulse generation unit creates the first pulses and the second pulses synchronized based on a pulse delay time transmitted from the controller. The pulse delay time is established to delay the second pulses relative to the first pulses.
US09514966B2 Apparatus and methods for shielding differential signal pin pairs
The disclosure is related to pin layouts in a semiconductor package. One embodiment of the disclosure provides a rhombus shaped shared reference pin layout that isolates a set of differential pin pairs. The differential signal pin pairs are configured such that an axis formed by a vertical signal pin pair is orthogonal to and mutually bisecting an axis formed by a lateral signal pin pair.
US09514965B2 Substrate surface metallization method and substrate having metallized surface manufactured by the same
A substrate having metallized surface is provided. The substrate having metallized surface includes a silicon substrate, an adhesive layer and a metallic layer. The silicon substrate has a silanated surface and the adhesive layer is disposed on the silanated surface. The metallic layer bonds to the silanated surface through the adhesive layer. The adhesive layer is formed with a plurality of colloidal nanoparticle groups, the colloidal nanoparticle groups each include at least one metallic nanoparticle capped with at least one polymer, and the metallic layer and the adhesive layer have chemical bonds formed there between.
US09514962B2 Method for performing activation of dopants in a GaN-base semiconductor layer
The method for performing activation of p-type dopants in a GaN-based semiconductor includes a first step of providing a substrate including (i) a GaN-based semiconductor material layer including p-type electric dopant impurities, (ii) a cap block devoid of any silicon-based compound, in contact with the semiconductor material layer, and (iii) a silicon-based covering layer covering the cap block. The method includes a second heat treatment step at a temperature of more than 900° C. so as to activate the p-type electric dopant impurities in the semiconductor material layer.
US09514961B2 Method for chemically passivating a surface of a product made of a III-V semiconductor material and the product obtained by such a method
A method for chemically passivating a surface of a product made of a III-V semiconductor material in which a) a P(N) polymer film is formed by deposition in a solvent comprising liquid ammonia. The film is formed by deposition, without electrochemical assistance, in the solvent, in the presence of an oxidizing chemical additive comprising phosphorous and generating electrical charge carriers in said surface.
US09514957B2 Integrated circuit package
A method that may include of at least partially surrounding with an insulating encapsulation lead frames, an integrated circuit attachment and wire bonding while preventing the insulating encapsulation from contacting at least one area of a base element; and at least partially surrounding an exterior of the insulating encapsulation with a conductive coating that contacts at least one area of the base element.
US09514952B2 Method of manufacturing semiconductor device and semiconductor manufacturing apparatus
A method of manufacturing a semiconductor device includes processing a plurality of substrates each provided with an etch target by using a chemical liquid, the chemical liquid used repeatedly and being mixed with water for adjustment of an etch rate.
US09514945B2 Nanocrystal memory and methods for forming same
A charge-storing device includes a charge-storing layer including nanocrystals. The nanocrystals are formed by a deposition technique incorporating deuterated hydrides. The deuterated hydride can be used to form an amorphous semiconductor material that is annealed to form nanoparticles to be incorporated into the charge-storing layer.
US09514944B2 Method for producing an SGT-including semiconductor device
A method for producing an SGT-including semiconductor device includes forming a gate insulating layer on an outer periphery of a Si pillar, forming a gate conductor layer on the gate insulating layer, and forming an oxide layer on the gate conductor layer. Then a hydrogen fluoride ion diffusion layer containing moisture is formed so as to make contact with the oxide layer and lie at an intermediate position of the Si pillar. A part of the oxide film in contact with the hydrogen fluoride ion diffusion layer is etched with hydrogen fluoride ions generated from hydrogen fluoride gas supplied to the hydrogen fluoride ion diffusion layer and an opening is thereby formed on the outer periphery of the Si pillar.
US09514943B1 Method for etching high-k metal gate stack
A method for etching a gate includes forming a high-k material layer over a substrate; forming an overlying layer over the high-k material layer; performing a first etching process for etching the overlying layer to form an overlying layer pattern; forming a spacer on a sidewall of the overlying layer pattern; and performing a second etching process using plasma including a etch gas and an additive gas, to etch the high-k material layer, wherein an amount of the additive gas is substantially the same as the main etch gas to increase an etch selectivity with respect to the substrate.
US09514942B1 Method of forming a gate mask for fabricating a structure of gate lines
A method of forming a gate structure over a hybrid substrate structure with topography having a bulk region and an SOI region is disclosed including forming a gate material layer above the SOI and bulk regions, forming a mask layer above the gate material layer, forming a first planarization layer above the mask layer, forming a first gate structure masking pattern above the first planarization layer, patterning the first planarization layer in alignment with the first gate structure masking pattern, and patterning the mask layer in accordance with the patterned first planarization layer, resulting in a gate mask disposed above the gate material layer.
US09514941B2 Liquid crystal display device, manufacturing method therefor, and defective pixel correction method therefor
In a TFT substrate, a common signal line is arranged on top of a common electrode and below a pixel electrode through intermediation of an insulating film. The metal piece in a pixel having a bright spot is irradiated with laser from the rear surface side of the TFT substrate. The common electrode and the pixel electrode are short-circuited by the melted metal piece.
US09514936B2 Particle and method for manufacturing same
Manufacturing a particle may include inserting a supporting body into a receiving groove on a first substrate to accommodate a first surface of the supporting body into the receiving groove and to expose a second surface of the supporting body to outside; forming a first coating layer on the second surface; attaching a second substrate to the supporting body on which the first coating layer is formed; exposing the first surface of the supporting body on which the first coating layer is formed to outside, by separating the supporting body on which the first coating layer is formed and which is attached to the second substrate from the first substrate; forming a second coating layer on the first surface of the supporting body; and separating the supporting body, on which the first coating layer and the second coating layer are formed, from the second substrate.
US09514934B2 Atomic layer deposition of antimony oxide films
Antimony oxide thin films are deposited by atomic layer deposition using an antimony reactant and an oxygen source. Antimony reactants may include antimony halides, such as SbCl3, antimony alkylamines, and antimony alkoxides, such as Sb(OEt)3. The oxygen source may be, for example, ozone. In some embodiments the antimony oxide thin films are deposited in a batch reactor. The antimony oxide thin films may serve, for example, as etch stop layers or sacrificial layers.
US09514932B2 Flowable carbon for semiconductor processing
Methods are described for forming flowable carbon layers on a semiconductor substrate. A local excitation (such as a hot filament in hot wire CVD, a plasma in PECVD or UV light) may be applied as described herein to a silicon-free carbon-containing precursor containing a hydrocarbon to form a flowable carbon-containing film on a substrate. A remote excitation method has also been found to produce flowable carbon-containing films by exciting a stable precursor to produce a radical precursor which is then combined with unexcited silicon-free carbon-containing precursors in the substrate processing region.
US09514928B2 Selective repairing process for barrier layer
A selectively repairing process for a barrier layer is provided. A repair layer is formed by chemical vapor deposition using an organosilicon compound as a precursor gas. The precursor gas adsorbed on a low-k dielectric layer exposed by defects in a barrier layer is transformed to a porous silicon oxide layer has a density more than the density of the low-k dielectric layer.
US09514926B2 Substrate recycling method
Embodiments of the disclosure relate to a substrate recycling method and a recycled substrate. The method includes separating a first surface of a substrate from an epitaxial layer; forming a protective layer on an opposing second surface of the substrate; electrochemically etching the first surface of the substrate; and chemically etching the electrochemically etched first surface of the substrate.
US09514925B1 Protective coating for silicon substrate
Various approaches discussed herein enable techniques for protecting die units made of silicon substrate. A substrate, or wafer, is provided that has multiple die units built onto it, as well as saw streets between the die units. The substrate is cut into along the saw streets at a first width, after which a coating is applied to a side of the wafer so that the side of the wafer is covered with the coating as well as the channels created by the cutting being substantially filled with the coating. After curing the coating, a second cut is made along the saw streets and through the cured coating, so that the individual die units, once separated, have a protective layer of the coating attached to one side and the periphery of the die unit.
US09514924B2 Droplet manipulation using gas-phase standing-wave ultrasound fields in MS sources
An ion source for a mass spectrometer is disclosed comprising an ionization device which emits a stream of droplets and one or more ultrasonic transmitters which create one or more acoustic standing waves. The acoustic standing waves may be used to further nebulize the stream of droplets and induce internal mixing of the droplets.
US09514908B2 Method and device for generating a focused strong-current charged-particle beam
The invention relates to a method for generating a focused charged-particle beam, comprising at least the steps of: a) generating a charged-particle beam (10); b) emitting a laser pulse (40); c) generating a focusing magnetic field structure in a target (50) by means of an interaction between the laser pulse and the target; and d) making the charged-particle beam penetrate the focusing magnetic field structure at least partially.
US09514904B2 Electric excitation permanent magnet switch, electric excitation permanent magnet switched reluctance motor and electric excitation method
Two magnetic poles of a permanent magnet of a permanent magnet switch and the two ends of an iron core wound with an excitation coil are connected to each other with the soft magnet having a salient pole. A motor uses the switch as the basic component of the stator and rotor, with two magnetic salient poles of each component being arranged axially, wherein the salient pole of the stator component and that of the rotor component are arranged in an opposite manner with an air gap, the excitation coil of the stator component and the rotor component at the symmetric axis position is taken as a phase line to access an excitation control power supply after serial connection or parallel connection. Electric excitation is carried out on the combined motor formed by shaft connection and rotation dislocation among single motors and the stator component in a bi-phase way simultaneously.
US09514903B2 Gas-insulated circuit breaker
A gas-insulated circuit breaker may include: a fixed contact having a hollow formed therein; a fixed arc contact disposed in the hollow of the fixed contact; a fixed-side conductor provided to surround the fixed contact and configuring a gap between the fixed-side conductor and the fixed contact as a discharge path for an insulation gas; a movable contact having a hollow formed therein; a movable arc contact disposed in the hollow of the movable contact; a movable-side conductor provided to surround the movable contact and configuring a gap between the movable-side conductor and the movable contact as a discharge path for an insulation gas; a first extension part formed on the fixed-side conductor and extending the discharge path for the insulation gas of the fixed-side conductor; and a second extension part formed on the movable-side conductor and extending the discharge path for the insulation gas of the movable-side conductor.
US09514898B2 Switch device for sunroof
A switch device for a sunroof includes: a glass switch piece, which is switchable between glass opening positions and a glass closing position, which are for selecting whether to open or close the opening of a sunroof with a roof glass; and a shade switch piece, which is switchable between a shade opening position and a shade closing shade positions, which are for selecting whether to open or close the opening with of a roof shade. The shade closing positions include a first closing position and a second closing position. The switch device is provided with an interlocking portion, which links the glass switch piece to the shade switch piece so that the glass switch piece is moved into the glass closing position when the shade switch piece is moved to the second closed position.
US09514897B2 Magnetic contactor
Disclosed is a magnetic contactor. The magnetic contactor includes a frame, a bobbin provided in the frame, and configured to include a hollow part, a movable core movably inserted into the hollow part in an axial direction, a yoke disposed at the outer surface of the bobbin to be separated from the coil and to face each other, and configured to act as a fixed core, and a manipulating circuit part disposed at the outer surface of the bobbin in parallel with a moving direction of the movable core to intersect the yoke. The coil is wound around an outer surface of the bobbin. Accordingly, a coil having a broad rated voltage range is used. Also, a structure of a product is simplified, and a space is broadly used.
US09514895B2 Electric storage device having current collector and vehicle having the electric storage device
Provided are an electric storage device in which a current collector is not easily broken even when vibration is applied, and a vehicle having this electric storage device. This electric storage device includes a case having a first inner surface and a second inner surface adjacent to the first inner surface, an electrode assembly housed in the case and including a positive electrode plate and a negative electrode plate insulated from each other, an electrode terminal disposed outside the case, and a current collector housed in the case and electrically connecting the electrode assembly and the electrode terminal to each other. A distal end edge of a distal end portion of the current collector is supported on the first inner surface of the case.
US09514894B2 Electrode active material for capacitor, and capacitor using said electrode active material
An electrode active material for capacitors contains a porous carbon material. The porous carbon material has a BET specific surface area of 800 m2/g or more. An X-ray diffraction image of the porous carbon material with CuKα rays has a peak Pk at 2θ=40° to 50°, and the peak Pk includes a component of a peak Pd111 attributed to a (111) plane of diamond crystals. When the X-ray diffraction image has a peak PG002 attributed to a (002) plane of graphite, a ratio of an intensity IG002 of PG002 to an intensity Ik of Pk (IG002/Ik) is 3.0 or less.
US09514892B2 Yarn-type micro-supercapacitor method for fabricating same
The present invention relates to a yarn-type micro-supercapacitor fabricated by twisting a hybrid nanomembrane coated with a conducting polymer on a carbon nanotube sheet. Thus, the yarn-type micro-supercapacitor has superior performance. Particularly, since a 2-ply electrode manufactured by being twisted together with a metal wire has very high power and energy density in liquid or solid electrolyte and also has superior mechanical strength and flexibility, the yarn-type micro-supercapacitor may be variously deformed—for example, bent, twisted, or woven—to maintain superior electrochemical performance.
US09514891B2 Thin wire/thick wire lead assembly for electrolytic capacitor
A capacitor containing a solid electrolytic capacitor element including a sintered porous anode body, a first anode lead, and a second anode lead is provided. The first anode lead has a thickness that is larger than a thickness of the second anode lead. A portion of the first anode lead is embedded in the porous anode body, and a second portion of the first anode lead extends from a surface thereof in a longitudinal direction. Meanwhile, the second anode lead is electrically connected to the anode body for connection to an anode termination. In one embodiment, the second anode lead can be directly connected to a surface of the anode body. In another embodiment, the second anode lead can be indirectly connected to the anode body such as via attachment at an end of the second portion of the first anode lead.
US09514890B2 Low energy milling to produce flake powders
A method for increasing surface area of a valve metal particle is provided as is an improved valve metal particle provided thereby. The method includes charging a mill apparatus with a valve metal powder and a media wherein the media has an average diameter of at least 0.01 cm to no more than 0.3175 cm. The valve metal powder is then milled at an average kinetic energy of no more than 3,000 ergs per media particle to obtain a milled powder.
US09514887B2 Aluminum foil with carbonaceous particles dispersed and supported therein
An object of the present invention is to provide an aluminum foil that can make a positive electrode current collector thinner for size reduction and higher energy density of electrical storage devices, be produced easily and has a low surface resistance. An aluminum foil of the present invention as a means for achieving the object is characterized in that carbonaceous particles are dispersed and supported therein. The aluminum foil with carbonaceous particles dispersed and supported therein of the present invention can be produced by electrolysis.
US09514886B1 Cryogenic grinding of tantalum for use in capacitor manufacture
An electrolytic capacitor comprising an anode comprised of cryogenically milled anode material is described. The cryogenic milling process prepares the active anode material for anode fabrication. The capacitor further comprises a casing of first and second casing members secured to each other to provide an enclosure. A feedthrough electrically insulated from the casing and from the casing and extending there from through a glass-to-metal seal, at least one anode electrically connected within the casing, a cathode, and an electrolyte. The cathode is of a cathode active material deposited on planar faces of the first and second casing members.
US09514885B2 Composite electronic component and board having the same mounted thereon
There is provided a composite electronic component including a composite body having a capacitor and an inductor coupled to each other, the capacitor including a ceramic body in which a plurality of dielectric layers and first and second internal electrodes facing each other with the dielectric layers interposed therebetween are stacked, and the inductor including a magnetic body including a coil part; a first input terminal; an output terminal; and a ground terminal.
US09514883B2 Ceramic powder and multi-layer ceramic capacitor
A multi-layer ceramic capacitor is made by alternately layering a dielectric layer constituted by a sintered body of a ceramic powder, and an internal electrode layer. The ceramic powder contains barium titanate powder having a perovskite structure with a median size of 200 nm or smaller as measured by SEM observation, wherein the barium titanate powder is such that the percentage of barium titanate particles having twin defects in the barium titanate powder is 13% or more as measured by TEM observation and that its crystal lattice c/a is 1.0080 or more. The ceramic powder has a wide range of optimum sintering temperatures and thus offers excellent productivity and is particularly useful in the formation of thin dielectric layers of 1 μm or less.
US09514881B2 Semiconductor structure and fabrication method thereof
A semiconductor structure is provided. The semiconductor structure includes a substrate; and a plurality of parallel first conductive layers formed on the substrate. The semiconductor structure also includes a composite magnetic structure having a plurality of magnetic layers and a plurality of insulation layers with a sandwich arrangement formed on a portion of the substrate and portions of surfaces of the plurality of first conductive layers. Further, the semiconductor structure includes a plurality of first conductive vias and a plurality of second conductive vias formed on the first conductive layers at both sides of the composite magnetic structure. Further, the semiconductor structure also includes a plurality of second conductive layers formed on a top surface of the composite magnetic structure, top surfaces of the first conductive vias, and top surfaces of the second conductive vias to form at least one coil structure wrapping around the composite magnetic structure.
US09514880B2 Coil unit for thin film inductor, manufacturing method of coil unit for thin film inductor, thin film inductor and manufacturing method of thin film inductor
Embodiments of the invention provide a coil unit for a thin film inductor, a manufacturing method of a coil unit for a thin film inductor, a thin film inductor, and a manufacturing method of a thin film inductor. According to an embodiment, there is provided a coil unit for a thin film inductor. The coil unit includes an insulator having a dual insulating layer of different materials, and coil patterns respectively embedded in upper and lower surfaces of the insulator. The coil patterns include a coil pattern formed of a plurality of plating layers.
US09514879B2 Signal transmission through LC resonant circuits
An embodiment of an electronic system includes a first electronic circuit and a second electronic circuit. The electronic system further includes a resonant LC circuit having a resonance frequency for coupling the first electronic circuit and the second electronic circuit; each electronic circuit includes functional means for providing a signal at the resonance frequency to be transmitted to the other electronic circuit through the LC circuit and/or for receiving the signal from the other electronic circuit. The LC circuit also include capacitor means having at least one first capacitor plate included in the first electronic circuit and at least one second capacitor plate included in the second electronic circuit. The LC circuit further includes first inductor means included in the first electronic circuit and/or second inductor means included in the second electronic circuit. The at least one capacitor plate of each electronic circuit is coupled with the corresponding functional means through the possible corresponding inductor means.
US09514878B2 Coil and manufacturing method for same, and reactor
A coil includes a coil unit provided with a wire and a self-melting layer formed on surfaces of the wire, and a resin member affixed to the wire. The wire is adhered and affixed to the resin member by the self-melting layer.
US09514877B2 Amorphous core transformer
During the assembly process of an amorphous core transformer, when an offset has arisen between a coil and the amorphous core, and when an offset has arisen between the coil and the core due to a shock resulting from unloading or vibrations during transport, there has been the risk of breakage of an insulating member between an amorphous core and a coil, causing amorphous fragments to be scattered. The object of the present invention is to prevent scattering of amorphous fragments. The amorphous core transformer, which results from assembling a coil and an amorphous core having a joint section, is characterized by folding an insulating member having a rectangular cylinder and flanges, inserting the folded insulating member into the hole of the coil, expanding the cylinder and the flanges of the insulating member, disconnecting the joint section of the amorphous core, inserting the open-ended amorphous core into the cylinder of the insulating member placed within the coil, lapping the disconnected joint section of the amorphous core, and covering/wrapping yokes of the amorphous core with the flanges of the insulating member.
US09514875B2 Integrated inductor and a method for reduction of losses in an integrated inductor
An integrated inductor comprising a multi-winding inductor having a transformer winding (L1) and a resonant inductor (L2). Sections (I), (2) of the magnetic circuit of the transformer winding (L1) are incorporated into magnetic circuits of at least two parts (L2A), (L2B) of a resonant inductor (L2) so as to form common parts of magnetic circuit of the multi-winding inductor (L1) and at least two-part (L2A), (L2B) resonant inductor (L2), wherein the transformer winding (L1) of the multi-winding inductor is wound around a column (II), which has at least one air gap (G) having a width adapted so that the magnetic induction produced by the at least two-part (L2A), (L2B) resonant inductor (L2) does not exceed 25% of the magnetic induction produced by the transformer winding (L1) of the multi winding inductor.
US09514873B2 Choke coil
Disclosed herein is a choke coil including: a core composed of first and second legs, a first flat plate connecting an upper end portion of the first leg and that of the second leg, and a second flat plate connecting a lower end portion of the first leg and that of the second leg; a primary coil wound around the first leg; and a secondary coil wound around the second leg, wherein a width of at least any one of the first flat plate and the second flat plate is greater than widths of the first leg and the second leg.
US09514867B2 Chip resistor and method for making the same
A chip resistor includes an insulating substrate, a resistor element arranged on the obverse surface of the substrate, a bonding layer provided between the resistor element and the substrate, a first electrode connected to the resistor element, and a second electrode connected to the resistor element. The second electrode is deviated from the first electrode in a direction perpendicular to the thickness direction of the substrate. The substrate includes a side surface between the obverse surface and the reverse surface. The first electrode covers the resistor element, and also the side surface and the reverse surface of the substrate.
US09514866B2 Touch-type variable resistor structure
A touch-type variable resistor structure includes a resistor-base plate, a conductive base plate and a separator member. The resistor-base plate further includes a main plate body and a resistance layer. The resistance layer extended along an extension direction is located on the main plate body. The conductive base plate located on the resistor-base plate includes an electricity-conductive layer facing the resistor-base plate. The separator member located between the resistor-base plate and the conductive base plate further has a central opening. One of the main plate body and the main conductive plate body is formed as a flexible-touch base plate. While the flexible-touch base plate is depressed, part of the electricity-conductive layer would pass through the central opening to electrically couple the resistance layer.
US09514865B2 Multi-contact element for a varistor
The object of the invention is a multi-contact element for a varistor wherein the multi-contact element has a sandwich structure, wherein the sandwich structure has two or more contact elements in a lowermost layer, and wherein the sandwich structure has at least one common connection electrode in an uppermost layer, wherein a first intermediate layer made of an electrically insulating layer of material is provided at least in segments between the lowermost layer (US) and the uppermost layer, wherein fuses are located in the first intermediate layer that are configured such that they are capable of sustaining a specified surge current, the specified surge current per fuse being less than the specified surge current of the varistor, wherein the fuses are embodied as vias within the first intermediate layer, wherein the fuses in the first intermediate layer are in direct electrical contact with the common connection electrode, wherein each of the fuses is in direct or indirect electrical contact with a subset of the contact elements (KE1, KE2), wherein the fuses provide blow-out channels in the first intermediate layer so that in the event of a thermal overloading of a fuse of the first intermediate layer, the affected fuse can vaporize through the blow-out channel.
US09514860B2 Power transmission cable using non-halogen flame-retardant resin composition
A power transmission cable includes a conductor, an inner semiconductive layer around the conductor, an electrically insulating layer around the inner semiconductive layer, an outer semiconductive layer around the electrically insulating layer, a shielding layer around the outer semiconductive layer, a binder tape layer around the shielding layer, and a sheath layer around the binder tape layer. The power transmission cable having an outer diameter of not smaller than 30 mm and not greater than 60 mm. The sheath layer having a thickness of not smaller than 2 mm and not greater than 4 mm, and is made of a non-halogen flame-retardant resin composition including a total of not lower than 100 parts and not higher than 180 parts of metal hydrate and silica per 100 parts of a base polymer, by mass, including an ethylene-vinyl acetate copolymer with a vinyl acetate content of not lower than 50 wt. %.
US09514858B2 Oxidation-resistant elongate electrically conductive element
An elongate electrically conductive element has a core made of copper or copper alloy and at least one white-bronze layer encircling the core made of copper or copper alloy, wherein the white-bronze layer is the outermost layer of the elongate electrically conductive element.
US09514856B2 Copper alloy
Disclosed is a copper alloy containing 1.0% to 3.6% of Ni, 0.2% to 1.0% of Si, 0.05% to 3.0% of Sn, 0.05% to 3.0% of Zn, with the remainder including copper and inevitable impurities. The copper alloy has an average grain size of 25 μm or less and has a texture having an average area percentage of cube orientation of 20% to 60% and an average total area percentage of brass orientation, S orientation and copper orientation of 20% to 50%. The copper alloy has a KAM value of 0.8 to 3.0 and does not suffer from cracking even when subjected to U-bending. The copper alloy has excellent balance between strengths (particularly yield strength in a direction perpendicular to the rolling direction) and bending workability.
US09514853B2 System for storing high level radioactive waste
A system for storing high level radioactive waste. In one embodiment, the invention can be a system including an overpack body extending along a vertical axis and having a cavity for storing high level radioactive waste, the cavity having an open top end and a floor; an overpack lid positioned atop the overpack body to enclose the open top end of the cavity; an air inlet vent for introducing cool air into the cavity, the air inlet vent extending from an opening in an outer surface of the overpack body to an opening in the floor, the opening in the outer surface of the overpack body extending about an entirety of a circumference of the outer surface of the overpack body; and an air outlet vent in the overpack lid for removing warmed air from the cavity.
US09514848B2 Solid state drive and associated error check and correction method
A solid state drive includes: a processing circuit for receiving a read command from the host; a flash memory connected to the processing circuit; and a buffer connected to the processing circuit. An error check and correction method includes following steps. Firstly, a read data retrieved from the flash memory is verified according to a predetermined algorithm when receiving the read command. Then, the read data is outputted by the processing circuit when the read data has no uncorrectable error. Furthermore, a retry action is performed according to a retry table when an error of the read data is uncorrectable. A usage order of a plurality of algorithms is defined in the retry table.
US09514846B2 Memory module status indication
Embodiments of the inventive subject matter include receiving, from an interface module, status data for a memory module, wherein the memory module includes a plurality of status indicators. Embodiments further include determining, based on the status data, a set of the plurality of status indicators to illuminate. Embodiments further includes generating, in accordance with the determining the set of the plurality of status indicators based on the status data, a plurality of commands for controlling illumination of the set of the plurality of status indicators. Embodiments further include transmitting the plurality of commands to circuitry of the memory module that controls the plurality of status indicators.
US09514842B2 Memory testing system
Techniques are disclosed relating to memory testing. In one embodiment, an integrated circuit is disclosed that includes a memory and an interface circuit. The interface circuit is configured to receive one or more testing signals from a built in self-test (BIST) unit. The interface circuit is further configured to receive, independently from the one or more testing signals, one or more configuration signals from automated test equipment (ATE). The interface circuit is further configured to issue one or more instruction signals to the memory based on the one or more testing signals and based on the one or more configuration signals. In some embodiments, the interface circuit is configured to enable the BIST unit to detect errors in functions the BIST unit is not designed to test.
US09514841B1 Implementing eFuse visual security of stored data using EDRAM
A method and circuit for implementing Electronic Fuse (eFuse) visual security of stored data using embedded dynamic random access memory (EDRAM), and a design structure on which the subject circuit resides are provided. The circuit includes EDRAM and eFuse circuity having an initial state of a logical 0. The outputs of the eFuse and an EDRAM are connected through an exclusive OR (XOR) gate, enabling EDRAM random data to be known at wafer test and programming of the eFuse to provide any desired logical value out of the XORed data combination.
US09514840B2 Semiconductor memory device and method for operating the same
A semiconductor memory device includes a fuse portion including a first fuse set having a plurality of first fuses assigned for a first mode and a second fuse set having a plurality of second fuses assigned for a second mode, and a program portion suitable for programming an available fuse among the first fuses included in the first fuse set or programming the second fuses included in the second fuse set in response to a repair control signal in the second mode.
US09514838B2 Apparatus including memory system controllers and related methods for memory management using block tables
Memory controllers can include a switch and non-volatile memory control circuitry including channel control circuits coupled to the switch. The channel control circuits can coupled to logical units including blocks. Volatile memory and memory management circuitry including local memory can be coupled to the switch. The memory management circuitry can be configured to store health and status information for each of the blocks in a block table in the volatile memory, store a candidate block table that identifies a candidate block for a particular operation based on criteria in the local memory, update the health and status information for a particular block in the block table, compare the updated health and status information for the particular block with the candidate block according to the criteria, and update the candidate block table to identify the particular block in response to the comparison indicating that the particular block better satisfies the criteria.
US09514835B2 Determination of word line to word line shorts between adjacent blocks
A number of techniques for determining defects in non-volatile memory arrays are presented, which are particularly applicable to 3D NAND memory, such as that of the BiCS type. Word line to word shorts within a memory block are determined by application of an AC stress mode, followed by a defect detection operation. An inter-block stress and detection operation can be used determine word line to word line leaks between different blocks. Select gate leak line leakage, both the word lines and other select lines, is consider, as are shorts from word lines and select lines to local source lines. In addition to word line and select line defects, techniques for determining shorts between bit lines and low voltage circuitry, as in the sense amplifiers, are presented.
US09514831B2 Multi-clock generation through phase locked loop (PLL) reference
A circuit for providing a plurality of clock signals of differing frequencies includes: a phase locked loop section including a first voltage controller oscillator, connected to receive a reference clock value and generate therefrom a first voltage level, wherein the first voltage controller oscillator receives the first voltage level and generates therefrom a first clock signal; and one or more second voltage controller oscillators, each connected to receive the first voltage level, a corresponding trim value and a corresponding control voltage and derive therefrom a corresponding second clock signal.
US09514828B2 Nonvolatile memory device, erase method thereof and memory system including the same
An erase method of a nonvolatile memory device including a plurality of cell strings on a substrate is provided. Each string includes a plurality of memory cells stacked in a direction perpendicular to the substrate, a ground select transistor between the memory cells and the substrate, and string select transistors between the memory cells and a bit line. The erase method includes applying a precharge voltage during a first time to a first string select line, floating the first string select line during a second time after the first time, and applying an erase voltage to the substrate after the first time. The first string select line is connected to the string select transistors at a first height in the cell strings of a same row.
US09514827B1 Memory device, memory system and method of operating memory device
A memory device is provided as follows. A memory cell region includes a plurality of blocks, each block including a plurality of NAND strings. A control logic divides the plurality of blocks into a plurality of block regions based on a smaller distance of a first distance with respect to a first edge of the memory cell region and a second distance with respect to a second edge of the memory cell region and controls an operation performed on the memory cell region using a plurality of bias sets of operation parameters for the operation. Each bias set is associated with one of the block regions.
US09514824B2 Partial local self boosting for NAND
A memory system is programmed with minimal program disturb and reduced junction and channel leakage during self-boosting. Pre-charging bias signals are applied to word lines adjacent to a selected word line before a program signal is applied to the selected word line and a pass signal is applied to the remaining word lines. The pre-charging bias signals apply a pre-charge to the memory cells. The pre-charging bias signals are chosen to improve the isolation of the memory cells on word lines adjacent to the selected word line, improve self boost efficiency and reduce current leakage to prevent or reduce program disturb and/or programming errors especially in the inhibited memory cells on the selected word line.
US09514823B2 Programming algorithm for improved flash memory endurance and retention
A method applies a first set of consecutive pulses to flash memory cells in one or more flash memory devices to program the flash memory cells using a first pulse increment, a voltage of each consecutive pulse of the first set being incremented by the first pulse increment. On receiving an indication that the flash memory cells are partially programmed after the first set of consecutive pulses is applied, the first pulse increment is adjusted to an adjusted pulse increment based on a number of program/erase cycles associated with the flash memory cells. A second set of consecutive pulses to the flash memory cells is then applied using the adjusted pulse increment, a voltage of each consecutive pulse of the second set being incremented by the adjusted pulse increment.
US09514819B2 Programming method, memory storage device and memory controlling circuit unit
A programming method, a memory storage device and a memory controlling circuit unit are provided. The method includes: receiving a first write command; and selecting a first physical erasing unit and sending a first skipping write command sequence according to the first write command. The first skipping write command sequence instructs to execute a first skipping programming process. The first skipping programming process includes: programming first data into a first word line of the first physical erasing unit; and after the first word line is programmed, skipping a second word line adjacent to the first word line, and programming the first data into a third word line not adjacent to the first word line.
US09514817B1 Non-volatile memory device with memristor
A non-volatile memory device includes plural non-memory cells. Each non-volatile memory cell includes a first switch, a first memristor, a second switch, a second memristor and a third switch. The control terminal of the first switch is coupled to a word line. The first memristor is provided with a first impedance. The control terminal of the second switch is coupled to the word line. The second memristor is provided with a second impedance. The first switch, the first memristor, the second switch and the second memristor are serially connected between a bit line and an inverted bit line in an alternate manner. The third switch is used for configuring the first impedance and the second impedance. The non-volatile memory device provided by the disclosure has a characteristic of quick access and the data stored therein does not require a dynamic update.
US09514813B2 Resistive memory device, resistive memory system, and operating method thereof
A method for operating a memory device includes sensing a temperature of the resistive memory device, setting a level of a set voltage or current for writing to a memory cell based on the temperature, setting a level of a reset voltage for reset writing to the memory cell based on the temperature, and performing a write operation on the memory cell based on the level of the set voltage or current and the level of the reset voltage. The memory device may be a resistive memory device.
US09514811B2 Access signal adjustment circuits and methods for memory cells in a cross-point array
Systems, integrated circuits, and methods to generate access signals to facilitate memory operations in scaled arrays of memory elements, are described. In at least some embodiments, a non-volatile memory device can include a cross-point array having resistive memory elements and an access signal generator. The access signal generator can be configured to access a resistive memory element in the cross-point array.
US09514810B1 Resistive non-volatile memory cell and method for programming same
A memory has a word line, a bit line, a plurality of resistive non-volatile memory (RNVM) cells coupled to the word line, and a first source line and a second source line. A first RNVM cell of the plurality of RNVM cells includes a first RNVM element having a first terminal coupled to a common node and a second terminal coupled to the first source line. A second RNVM element has a first terminal coupled to the first RNVM element at the common node and a second terminal coupled to the second source line. The coupling transistor is coupled to the word line, the bit line, and the common node that couples the common node to the bit line during sensing. A sense amplifier is capacitively coupled to the bit line to read a logic state of the first RNVM cell during sensing.
US09514803B2 Semiconductor memory having electrically floating body transistor
Methods of maintaining a state of a memory cell without interrupting access to the memory cell are provided, including applying a back bias to the cell to offset charge leakage out of a floating body of the cell, wherein a charge level of the floating body indicates a state of the memory cell; and accessing the cell.
US09514802B2 Volatile memory self-defresh
Embodiments of the inventive concept include a volatile memory device including a memory cell array, the memory cell array including multiple rows and/or banks to store data. The memory device can include an address decoder coupled to the memory cell array. The memory device can include a control logic section coupled to the address decoder. The control logic section can include a defresh logic section configured to intentionally violate, by an activate command, a row precharge time (TRP) and/or a row active time (TRAS) for each of the plurality of rows to clean the data from the memory cell array. Memory data can be cleaned from the memory cell array responsive to the violations.
US09514801B1 Semiconductor device generating a refresh signal
A semiconductor device includes a temperature code latch circuit and a period selection circuit. The temperature code latch circuit latches a count code having a logic level combination corresponding to an internal temperature to output the latched count code as a temperature code. The period selection circuit selects a period of a refresh signal in response to the temperature code. A period variation rate of the refresh signal according to variation of the internal temperature is controlled by a first gradient selection signal in a first temperature section and is controlled by a second gradient selection signal in a second temperature section.
US09514797B1 Hybrid reference generation for ferroelectric random access memory
An apparatus that includes a reference generating circuit configured to generate a reference signal for a non-volatile memory (NVM) device, the reference generating circuit including a first circuit comprising at least one metal-oxide-semiconductor capacitor, the first circuit generating a first signal component of the reference signal, and a second circuit comprising at least one ferroelectric capacitor, the second circuit generating a second signal component of the reference signal, in which the second signal component is temperature dependent.
US09514796B1 Magnetic storage cell memory with back hop-prevention
An apparatus is described that includes a semiconductor chip memory array having resistive storage cells. The apparatus also includes a comparator to compare a first word to be written into the array against a second word stored in the array at the location targeted by a write operation that will write the first word into the array. The apparatus also includes circuitry to iteratively write to one or more bit locations where a difference exists between the first word and the second word with increasing write current intensity with each successive iteration.
US09514794B2 Information processing apparatus, information processing system and phase adjusting method
An information processing apparatus configured to adjust a phase relation between a data signal and a strobe signal includes a processor and memory. The memory stores instructions for causing the processor to execute identifying, for each of a plurality of candidates for reference values used to perform a determination regarding a value of the data signal, at least one phase difference between the data signal and the strobe signal for successfully acquiring the data signal according to the strobe signal, determining a reference value of the plurality of candidates for which a period for successfully acquiring the data signal is longer than periods for any other candidates based on the identified phase difference for each candidate, and adjusting the phase relation between the data signal and the strobe signal based on the period for the determined reference value.
US09514792B2 Semiconductor device having stacked layers
A semiconductor device is disclosed in which there are provided a first substrate including memory cells and at least one bit line electrically coupled to the memory cells, and a second substrate including a sense amplifier. Each of the memory cells includes a first transistor, and the sense amplifier includes a second transistor. The second substrate is stacked with the first substrate such that the sense amplifier amplifies data transferred through the bit line from a selected one of the memory cells. The first transistor is lower in carrier mobility than the second transistor.
US09514790B2 Data transmission circuit
A data transmission circuit may include data line groups and pass sections arranged among the data line groups to allow the data line groups to form one line. The data transmission circuit may include an input/output unit configured to be coupled to the data line groups and to process write data to be transmitted to the data line groups or read data transmitted from the data line groups. The data transmission circuit may include a pass control unit configured to selectively enable the pass sections in response to an address for specifying a target data line group of the data line groups.
US09514789B2 Systems and methods for safely moving short term memory devices while preserving, protecting and examining their digital data
The present invention provides a method for safely recovering, protecting, and reading short term memory devices, such as DRAM modules, following their immediate removal from a system after it powers down. By providing power and appropriate control signals, the present invention stabilizes the memory and allows it to be safely read.
US09514786B2 Electronic device and music visualization method thereof
An electronic device and a music visualization method thereof are provided. The electronic device is configured to display music visualization in response to music and change the music visualization in response to music lyrics of the music. The music visualization method is applied to the electronic device to implement the operations.
US09514784B2 Terminal and operating method thereof
A method of controlling a mobile terminal, and which includes obtaining, via a camera of the mobile terminal, an image of a user; playing a video on a display unit of the mobile terminal; determining, via a controller of the mobile terminal, if the user is viewing the video being played based on the obtained image; storing, in a memory associated with the mobile terminal, video viewing information indicating when the user is viewing the video being played and when the user is not viewing the video being played for a specific playback section in an entire playback section of the video being played; receiving an input requesting the video viewing information be displayed; and displaying the video viewing information as a progressive bar on the display unit.
US09514783B2 Video editing with connected high-resolution video camera and video cloud server
An apparatus having a server is disclosed. The server may be configured to (i) receive via a network a first clip of video generated by a camera, (ii) receive via the network first information to edit the first clip, (iii) receive via the network one or more segments of a second clip of video generated by the camera as identified by the first information and (iv) create a third clip of video by editing the segments according to the first information. The second clip is generally a higher resolution version of the first clip. The third clip may have the higher resolution.
US09514780B2 Free fall detection system for protecting hard drives in mobile devices
In a method for detecting free fall, a first acceleration parallel to a first axis, a second acceleration parallel to a second axis perpendicular to the first axis, and a third acceleration parallel to a third axis perpendicular to the first axis and to the second axis are measured. A sum of a first absolute value of the first acceleration, a second absolute value of the second acceleration, and a third absolute value of the third acceleration is calculated, and the free fall is detected as a function of the sum.
US09514778B2 Optical disc device and spherical aberration error signal detection method
There is provided an optical disc device that performs recording on a land and a groove, including an optical path splitter configured to split a luminous flux returning from an optical disc into first and second optical paths, a first detector configured to receive a whole of the luminous flux that has passed through the first optical path, a second detector configured to receive a luminous flux of an inside part of the luminous flux that has passed through the second optical path, a spherical aberration error signal generation unit configured to generate a spherical aberration error signal on the basis of a difference between a first focus error signal obtained on the basis of a detection signal of the first detector and a second focus error signal obtained on the basis of a detection signal of the second detector, a spherical aberration correction unit, and an adjustment unit.
US09514777B2 Servo processor receiving photodetector signals
An optical disk drive and a digital servo method for the optical disk drive includes controlling functions of the optical disk drive with a microprocessor. Low-pass filtered and gain-adjusted versions of photodetector output signals resulting from an illumination of an optical disk are received. Versions of the photodetector signals are digitized to produce digital signals. A focus control signal is determined through at least one servo algorithm executed by a digital signal processor based on a focus error determined from the digital signals. Alternatively, a tracking control signal is determined through at least one servo algorithm executed by the digital signal processor based on a tracking error determined from the digital signals. The digital signal processor has a specialized structure and arrangement for processing digital signals at a higher speed than the microprocessor.
US09514776B2 Method of manufacturing hexagonal ferrite magnetic particles, method of manufacturing magnetic coating material, and method of manufacturing magnetic recording medium
The method of manufacturing hexagonal ferrite magnetic particles includes providing hexagonal ferrite magnetic particles by conducting calcination of particles comprising an iron salt and an alkaline earth metal salt to cause fertilization; and further includes preparing the particles comprising an iron salt and an alkaline earth metal salt by adhering a glass component, followed by the alkaline earth metal salt, to the iron salt; and conducting calcination of the particles prepared to form a calcined product in which hexagonal ferrite is detected as a principal component in X-ray diffraction analysis.
US09514774B1 Spiral pitch correction based on micro-jog variation
During a self-servo write process, servo sectors that have uniform radial spacing are written on a disk surface. As part of the in-drive writing of the servo sectors, a radial offset between a reader element and a writer element of a magnetic head is measured. The measured radial offset, or micro-jog, is compared to a known nominal micro-jog value for the current radial position of the magnetic head. When the measured micro-jog value does not match the nominal micro-jog value, an appropriate correction to the self-servo write step size is applied to the radial spacing between the servo sectors being written. Variations from ideal servo spiral slope that are inherent in some servo spirals can be compensated for, thereby improving the uniformity of radial spacing of data tracks associated with the servo sectors.
US09514769B2 Method for writing a servo pattern to a magnetic tape medium with magnetically encoded servo band bursts
A method for writing a servo pattern to a magnetic tape medium by a write head is described. The write head includes a coil configured to generate a magnetic flux when applying an electric current thereto, and a pole piece structure configured to guide the generated magnetic flux. The method includes moving the magnetic tape medium with its servo band above the two gaps in a direction along the longitudinal extension of the magnetic tape medium, applying a current pulse to the coil, continuing to move the magnetic tape medium, and applying another current pulse to the coil. The magnetic tape medium includes at least one servo band along the longitudinal extension of the tape medium having servo patterns organized in servo frames for supporting to determine positional information.
US09514766B1 Computationally efficient data rate mismatch compensation for telephony clocks
Differing first and second audio signal sample rates from first and second audio signals are matched to each other. If signal sample rates are different, a frame of samples of the first audio signal is duplicated. The duplicate copies are multiplied by a window function and its inverse to produce “windowed frames” first and last samples of which can be deleted or added to increase or decrease a frame rate.
US09514761B2 Audio encoder and decoder for interleaved waveform coding
There is provided methods and apparatuses for decoding and encoding of audio signals. In particular, a method for decoding includes receiving a waveform-coded signal having a spectral content corresponding to a subset of the frequency range above a cross-over frequency. The waveform-coded signal is interleaved with a parametric high frequency reconstruction of the audio signal above the cross-over frequency. In this way an improved reconstruction of the high frequency bands of the audio signal is achieved.
US09514758B2 Method and an apparatus for processing an audio signal
A method of processing an audio signal, the method including receiving a downmix signal including at least one object signal, and object information extracted when the downmix signal is generated, the at least one object signal including a background object and at least one independent object; receiving mix information including mode selection information, the mix information for controlling the at least object signal; receiving enhanced object information corresponding to a residual signal generated when the at least one object signal is downmixed to the downmix signal; generating downmix processing information by using the object information and the mix information; generating an output signal by applying the downmix processed information to the downmix signal; and extracting the background object and the at least one independent object from the downmix signal, by using the enhanced object information.
US09514755B2 Position-dependent hybrid domain packet loss concealment
The present document relates to audio signal processing in general, and to the concealment of artifacts that result from loss of audio packets during audio transmission over a packet-switched network, in particular. A method (200) for concealing one or more consecutive lost packets is described. A lost packet is a packet which is deemed to be lost transform-based audio decoder. Each of the one or more lost packets comprises a set of transform coefficients. A set of transform coefficients is used by the transform-based audio decoder to generate a corresponding frame of a time domain audio signal. The method (200) comprises determining (205) for a current lost packet of the one or more lost packets a number of preceding lost packets from the one or more lost packets; wherein the determined number is referred to as a loss position. Furthermore, the method comprises determining a packet loss concealment, referred to as PLC, scheme based on the loss position of the current packet; and determining (204, 207, 208) an estimate of a current frame of the audio signal using the determined PLC scheme (204, 207, 208); wherein the current frame corresponds to the current lost packet.
US09514750B1 Voice call content supression
A method and system manage voice communications provided over a network and include establishing a conversation between an originating station and a terminal station where audible communications are permitted between stations. At least a portion of the conversation is allowed to proceed. The audio data content of the conversation is processed to recognize verbal content and the recognized verbal content is matched with phrases to detect content containing a particular phrase or topic that is disallowed for the conversation. In response to detecting the particular phrase or topic that is disallowed for the conversation, the audio data content is filtered to remove the particular phrase or topic from the audio data content.
US09514741B2 Data shredding for speech recognition acoustic model training under data retention restrictions
Training speech recognizers, e.g., their language or acoustic models, using actual user data is useful, but retaining personally identifiable information may be restricted in certain environments due to regulations. Accordingly, a method or system is provided for enabling training of an acoustic model which includes dynamically shredding a speech corpus to produce text segments and depersonalized audio features corresponding to the text segments. The method further includes enabling a system to train an acoustic model using the text segments and the depersonalized audio features. Because the data is depersonalized, actual data may be used, enabling speech recognizers to keep up-to-date with user trends in speech and usage, among other benefits.
US09514739B2 Phoneme score accelerator
Embodiments of the present invention include an acoustic processing device and a method for traversing a Hidden Markov Model (HMM). The acoustic processing device can include a senone scoring unit (SSU), a memory device, a HMM module, and an interface module. The SSU is configured to receive feature vectors from an external computing device and to calculate senones. The memory device is configured to store the senone scores and HMM information, where the HMM information includes HMM IDs and HMM state scores. The HMM module is configured to traverse the HMM based on the senone scores and the HMM information. Further, the interface module is configured to transfer one or more HMM scoring requests from the external computing device to the HMM module and to transfer the HMM state scores to the external computing device.
US09514736B2 Mobile terminal and control method thereof
A mobile terminal and a control method of the mobile terminal are provided. The mobile terminal includes: a memory configured to store event information; and a controller configured to retrieve at least one event information entered for the time between specified points from the memory, create a frame screen for displaying the retrieved at least one event information and a notepad for storing at least one keyword extracted from each of the retrieved at least one event information contained in the frame screen, and create a diary by interfacing the frame screen with the notepad.
US09514734B1 Acoustic liners for turbine engines
An improved acoustic liner for turbine engines is disclosed. The acoustic liner may include a straight cell section including a plurality of cells with straight chambers. The acoustic liner may also include a bent cell section including one or more cells that are bent to extend chamber length without increasing the overall height of the acoustic liner by the entire chamber length. In some cases, holes are placed between cell chambers in addition to bending the cells, or instead of bending the cells.
US09514731B2 Detachable whistle
Disclosed technology allows a whistle to be magnetically detachable from a base portion, such as a finger grip. Some embodiments comprise a whistle component comprising a first magnetic member and a base component comprising a second magnetic member, such that the first and second magnetic members are magnetically attracted to each other. The whistle component can be detachable from the base component by breaking a magnetic bond between the first and second magnetic members. At least one of the first and second magnetic members can be at least partially covered by a non-magnetic material such that the non-magnetic material separates the first and second magnetic members when the whistle component is magnetically coupled to the base component. The first magnetic member can be contained within a cavity of an adaptor that is attached to the whistle, or within the whistle itself.
US09514729B2 Musical instrument, method and recording medium capable of modifying virtual instrument layout information
A musical instrument includes memory that stores layout information defining regions arranged on a predetermined virtual plane, and a position sensor that detects the position coordinates on the virtual plane of a music playing member that can be held by a player. First, it is determined whether the position coordinates of the music playing member belong to a region arranged on the virtual plane based on the layout information, at a timing at which a specific music playing operations is made. Herein, in a case of having determined as belonging to a region, the generation of sound of a musical note corresponding to this region is instructed, in a case of having determined as not belonging to a region, the layout information stored in the memory is modified in order to modify this region so as to include the position coordinates of the music playing member.
US09514728B2 Musical performance apparatus that emits musical performance tones and control tones for controlling an apparatus
A musical performance apparatus is provided with a tone generation circuit 15 and a sound system 16 for emitting musical tones of musical instruments and control tones corresponding to musical score data SD which controls a musical score display apparatus 20. The tone generation circuit 15 has a tone volume adjustment circuit 15a3 which changes tone volume of only the musical tones in accordance with player's instruction and maintains tone volume of the control tones at a certain tone volume. The tone generation circuit 15 also has a pan adjustment circuit 15a4 which localizes the control tones so that the control tones will be emitted only from a certain speaker. Furthermore, the musical performance apparatus is designed such that the control tones are formed only of frequency components included in a certain high frequency band. Furthermore, the tone volume of frequency components which are included in frequency components representative of the musical tones and are further included in the certain high frequency band is controlled to be lower than the tone volume of the control tones.
US09514721B1 Ergonomic guitar support for acoustic guitar
A guitar support device permits ergonomic use of a guitar by a seated user, without attachment of any damaging hardware to the instrument. The guitar rest receives the lower and upper bouts of a guitar body with a complementary shaped frame. Stabilizer mounts abutting the guitar face and at least one stop abutting the guitar's back secure the device. The ergonomic support securely cradles the guitar so that the user may move around to better play or to relieve pressure points. The weight of the guitar is distributed over the user's leg and supported by a toe that descends vertically between the user's legs and abuts the surface upon which the user sits. The device is hinged to allow it to fold and skeletally framed to reduce weight and create a carrying handle, both of which make it easily transportable and storable.
US09514720B1 Hi-hat musical device
A leg-mountable hi-hat musical device.
US09514719B1 Pivot hinge for a collapsible stringed musical instrument
This is an improved pivot hinge for a collapsible stringed musical instrument providing for easy collapse and assembly of the instrument, such as the neck to the body of the instrument, collapsing into a sturdy, compact, and portable package, without altering the basic industry standard shapes and acoustics, and without twisting, or crimping the instrument's strings.
US09514716B2 Projection apparatus, projection control apparatus, projection system, and projection state adjustment method
Considered is a case where an adjustment chart is projected larger than a screen that is a projection target and an outer frame is not projected on the screen. The position of a top side of the outer frame can be easily identified from an interval between intersections of a top side of the screen and sides of a rhombus. Similarly, the position of a right side of the outer frame can be easily identified from another interval, and a bottom side of the outer frame from still another interval.
US09514709B2 Methods of correcting gamma and display device employing the same
Methods of correcting gamma and a display device employing the same are disclosed. In one aspect, the method includes periodically measuring, at a plurality of predetermined times, a single color measurement luminance related to a single color component that is displayed on the display panel. The method further includes calculating a luminance difference between the single color measurement luminance and a single color target luminance. The single color target luminance is a target luminance of the single color component at each of the predetermined times. The method also includes changing a gamma setting for a plurality of data signals provided to the display panel based on the luminance difference.
US09514707B2 Proportional pointer transition between multiple display devices
An approach is provided for automatically calculating and delivering proportional pointer locations during transition between multiple visual display devices (e.g., in regard to their characteristics, which may be heterogeneous, homogenous, or a mixture thereof). Specifically, the approaches described herein provide a solution for finding proportional locations of a pointer's on-screen graphic as the pointer is being transitioned/moved between multiple display devices (e.g., controlled by a single computer or controller).
US09514703B2 Timing control unit and apparatus and method for displaying using the same
Provided are a timing control unit and method for adjusting a speed of a system and a display apparatus and method using the same. The display apparatus includes: a panel unit including a plurality of cells and a plurality of electrodes for driving the plurality of cells; and a driving controller which, when a three-dimensional (3D) image signal is input, sends a common signal to an electrode group combining a certain number of electrodes of the plurality of electrodes.
US09514702B2 Source driver circuit, method for driving display panel and display device
The present disclosure provides a source driver IC. A first sub-driver circuit is provided to, within a time period, control polarities of driving voltages for a first subpixel and a third subpixel in pixel units at odd-numbered positions in a pixel row to be reverse to polarities of driving voltages for a second subpixel and a fourth subpixel in the pixel units at the odd-numbered positions in the pixel row, and a second sub-driver circuit is provided to, within the time period, control polarities of driving voltages for a first subpixel and a third subpixel in the pixel units at even-numbered positions to be identical to polarities of driving voltages for the second subpixel and the fourth subpixel in the pixel units at the odd-numbered positions but reverse to polarities of driving voltages for the second subpixel and the fourth subpixel in the pixel units at the even-numbered positions.
US09514699B2 Device and method for adjusting gamma voltage
The present invention provides a device and a method for adjusting Gamma voltage. The device for adjusting Gamma voltage comprises a Gamma voltage generating unit used for generating a plurality of Gamma voltages, the Gamma voltage generating unit comprising a plurality of output terminals for outputting the plurality of Gamma voltages; and a plurality of output units, output terminals of each of which are connected to output terminals of a corresponding Gamma voltage generating circuit among a plurality of Gamma voltage generating circuits of the display panel to be adjusted in one-to-one correspondence, the plurality of output units being used for outputting the plurality of Gamma voltages to output terminals of the Gamma voltage generating circuits.
US09514696B2 Semiconductor device, driver circuit, and display device
To provide a semiconductor device including a narrowed bezel obtained by designing a gate driver circuit. A gate driver of a display device includes a shift register unit, a demultiplexer circuit, and n signal lines. By connecting the n signal lines for transmitting clock signals to one stage of the shift register unit, (n−3) output signals can be output. The larger n becomes, the smaller the rate of signal lines for transmitting clock signals which do not contribute to output becomes; accordingly, the area of the shift register unit part is small compared to a conventional structure in which one stage of a shift register unit outputs one output signal. Therefore, the gate driver circuit can have a narrow bezel.
US09514695B2 Gate driver on array circuit and liquid crystal display device
A gate driver on array circuit and a liquid crystal display device are disclosed. The Nth-level GOA unit comprises: a pull-down unit; the pull-down unit comprises a first thin film transistor (TFT) which is connected to the input end of the (n+2)th-level high-frequency clock signal and a pull-down control unit respectively; the first TFT, a pull-up unit and a pull-up control unit are commonly connected to the pull-down point so as to pull-down the electrical potential of the pull-down point, wherein N is a positive integer greater than 3; n is positive integer.
US09514694B2 Array substrate, method for driving the same, flexible display device and electronic equipment
The present disclosure provides an array substrate, which includes a flexible substrate and an array layer formed on the flexible substrate. The array layer includes: data lines, gate lines, thin film transistors and a driving unit. The driving unit is configured to output data driving signals to connected data lines. The data lines includes a first data line connected to thin film transistors of a first number and a second data line connected to thin film transistors of a second number. The number of sub-signals in a data driving signal outputted to the first data line by the driving unit within a time period of one frame is the first number. The number of sub-signals in a data driving signal outputted to the second data line by the driving unit within a time period of one frame is the second number.
US09514692B2 Display device and switching method of its display modes
A display device and a switching method of its display modes are provided. The display device comprises: a display panel (1), configured to display an image; a slit grating (2), on a light exiting side of the display panel (1); and a liquid crystal lens (3), on a light exiting side of the slit grating (2) to realize three effects of a concave lens effect, a convex lens effect and a flat light-transmitting glass effect.
US09514687B2 Image displaying method and display device driving thereof
A method of displaying an image on a display panel including pixels arranged in an m-by-n matrix (m and n being natural numbers), including measuring a complexity of image data based on an entropy or a most significant bit, the image data including a plurality of unit data corresponding to the pixels; and adjusting the amount of light supplied by a backlight unit according to the measured complexity of the image data.
US09514683B2 Gate driving circuit, gate driving method, gate on array (GOA) circuit and display device
The gate driving circuit according to the present disclosure may be connected to a row pixel unit which includes a row pixel driving module and a light emitting element connected to each other, the row pixel driving module including a driving transistor, a driving module and a compensation module, the compensation module being connected with a gate scanning signal and the driving module being connected with a driving level. The gate driving circuit may further include a row pixel control unit, which is configured to provide the gate scanning signal to the compensation module and provide the driving level to the driving module, so as to control the compensation module to compensate for a threshold voltage of the driving transistor and control the driving module to drive the light emitting element.
US09514682B2 Organic light-emitting display device and driving method of the same
An organic light-emitting display device displays a grayscale level by time-dividing each frame into N sub-frames, the organic light-emitting display device including: a plurality of pixels arranged in a matrix; a plurality of scan lines to be provided with a plurality of scan signals to turn on the plurality of pixels; and a plurality of data lines to be selectively provided with a plurality of data voltages or a plurality of sensing voltages to be applied to a number of the pixels that are turned on by each of the plurality of scan signals, wherein the scan signals are provided to N scan lines (where N is a natural number greater than 1) that are randomly selected from among the plurality of scan lines at intervals of a sub-horizontal period.
US09514678B2 Pixel and organic light emitting display device using the same
A pixel includes a plurality of organic light emitting diodes, each of which including a cathode electrode coupled to a second power source, a pixel circuit coupled to a scan line and to a data line, the pixel circuit configured to control current supplied from a first power source to the organic light emitting diodes corresponding to a data signal supplied to the data line, and first transistors between the pixel circuit and respective ones of the organic light emitting diodes, the first transistors configured to be turned on or to be turned off when a low emission control signal is supplied to a first emission control line, wherein a scan signal supplied to the scan line is a first voltage, and wherein the low emission control signal is a second voltage that is different than the first voltage.
US09514676B2 Pixel circuit and driving method thereof and display apparatus
Provided are a pixel circuit and driving method thereof and a display apparatus. The pixel circuit comprises a first transistor (T1), a second transistor (T2), a third transistor (T3), a storage capacitor (C1), a parasitic capacitor (C2) and a light emitting device (L). A first electrode of the first transistor (T1) is connected to a first power source signal terminal, and its second electrode is connected to a first electrode of the third transistor (T3); the gate of the second transistor (T2) is connected to a first control signal terminal (S1), its first electrode is connected to a data signal terminal (DATA), and its second electrode is connected to the gate of the first transistor (T1); the gate of the third transistor (T3) is connected to a second control signal terminal (S2), and its second electrode is connected to one terminal of the light emitting device (L); one terminal of the storage capacitor (C1) is connected to the gate of the first transistor (T1), and the other terminal of the storage capacitor is connected to one terminal of the light emitting device (L); one terminal of the parasitic capacitor (C2) is connected to one terminal of the light emitting device (L), and the other terminal of the parasitic capacitor (C2) is connected to the other terminal of the light emitting device (L); and the other terminal of the light emitting device (L) is also connected to a second power source signal terminal (ELVSS). The pixel circuit can effectively compensate for the threshold voltage shift of the TFTs and improve the display effect.
US09514668B2 Display apparatus and controlling method thereof
A display apparatus is provided. The display apparatus includes: an image input configured to receive an image; a display panel configured to include a plurality of pixels and respectively emit light in the plurality of pixels in order to display the image; a panel driver configured to drive the display panel; and a controller configured to analyze a motion of the image and control the panel driver to drive the display panel by using different driving methods according to a size of the analyzed motion.
US09514667B2 Driving system for electrophoretic displays
This application relates to a driving system for an electrophoretic display. The driving system can reduce the memory space required for driving an electrophoretic display. This application is directed to a driving method for updating a pixel in a display from a current image to a new image.
US09514661B2 Translucent digital display system
A digital display system includes a transparent outer protective panel, a transparent inner protective panel, and a translucent digital video display located between the outer and inner protective panels. An integrated media player is operably connected to the translucent digital video display so that full-motion videos displayed on the translucent digital video display are viewed through the outer protective panel and items can be viewed through the translucent digital video display. The digital display system can be incorporated into any environment where a product is located behind a glass enclosure such as freezers, coolers, security glass, jewelry cases, liquor cases, cosmetic cases, and the like. In retail environments, the digital display systems can also be incorporated into entry doors, windows, drive-thru windows, teller windows, and any other location where there is traditionally glass and you want to focus consumer attention obstructing the customer's line of site.
US09514659B2 Upper arm assembly for crash test dummy
A shoulder and upper arm assembly for a crash test dummy includes a shoulder assembly having a spring housing and a shoulder pivot member pivotally connected to the spring housing. The shoulder assembly includes a spring element disposed in the spring housing and an adjustable member to adjust the friction of the spring element. An upper arm assembly includes a bone assembly having one end connected to the shoulder assembly and another end for connection to a lower arm assembly. The bone assembly includes a bone member made of metal and a load cell connected to the bone member to measure a load on the bone member.
US09514650B2 System and method for warning a driver of pedestrians and other obstacles when turning
A system for warning of potential hazards when a vehicle is turning has a sensor coupled to the vehicle and configured to capture data of objects located around the vehicle. A control unit is coupled to the sensor for processing the data captured by the sensor to generate graphical representations of objects captured by the sensor, graphical representations of projected paths of moving objects captured; and a graphical representation of a projected turning path of the vehicle.
US09514643B2 Above ground loop system proximity detection
A loop detection apparatus and corresponding methods are provided that includes an inductive loop and a processing device. The processing device includes circuitry to connect to the inductive loop and control and sense from the inductive loop a change in a characteristic thereof. The inductive loop is disposed at least partially above a surface on which a vehicle travels. The processing device detects a change in a characteristic of the inductive loop beyond a first threshold value, and in response, transmits a first signal configured to effect a first action. The processing device further detects a change in the characteristic of the inductive loop beyond a second threshold value, and in response, transmits a second signal configured to effect a second action different than the first action.
US09514640B2 Information processing method and user equipment
An information processing method and a user equipment, wherein the method includes receiving an information processing request message, if the information processing request message is not processed within a predetermined time, collecting at least one type of environment state information, generating prompt information according to the at least one type of the collected environment state information. Therefore, a user can perceive in time the information processing request message that has been received but not processed by the user equipment in time, and thus effectively increasing the usability of the user equipment.
US09514636B2 Premises management system with prevention measures
A system is provided including a plurality of inter-connected premises management devices, each including one or more sensors that generate data about an environment, and a control device to control one or more operations of the premises management system, the control device including a movement detector. The premises management system detects an attempt by an intruder to damage the control device based on data from the movement detector indicating an abnormal movement applied to the control device, historical data obtained from the sensors, and current data obtained from the sensors.
US09514635B2 Interface circuit for distributed fire alarm in loop configuration
An interface circuit of a sub-system of a distributed fire detection system having a plurality of sub-systems, wherein the plurality of sub-systems are in communication with each other in a loop configuration to allow data signals to be routed between said sub-systems. The interface circuit connects the internal components of a sub-system to the external bus line connecting all components via at least three input/output ports. It comprises hardware logic components, namely switches and switch controllers listening for incoming data and opening or closing said switches to cause disconnection and connection between said input/output ports accordingly, thereby allowing the routing of data signals to one or more of the other input/output ports. The simpler configurations replaces a routing processor.
US09514634B2 System and methods for providing notification in the event of a security crisis
The present invention provides a system and methods for notifying first responders of a security crisis or threat. The alarm system can be scaled to allow the alarm system to be used effectively in facilities of differing sizes and layouts. The system is also flexible, enabling the system to integrate with currently existing systems or to operate with new devices.
US09514633B2 Apparatus, system and methods for providing security crisis locations and notifications
The present invention provides a system and methods for notifying first responders of the general or specific location of a security crisis or threat in a building or public location, and the type of threat or crisis that has occurred, while notifying building occupants or others in the public location of the crisis and how to respond. The crisis notification system alarm system can provide critical information to the first responders, including location of crisis and whether the crisis location is changing, audio and video of the crisis arena, communications with designated occupants in the crisis arena, and other information. The crisis notification system can be scaled to allow the effective use in facilities of differing sizes and layouts. The system is also flexible, enabling the system to integrate with currently existing systems or to operate with new devices.
US09514630B1 System and method for tracking physical location of vehicle keys
A vehicle key monitoring system using a keychain device is provided. The system comprises a location database and a vehicle key monitor (VKM) device, which comprises a processor and memory and is connected to the location database. The VKM receives, from a location transmitter, a keychain location identifier and stores it in the location database. The VKM compares the location identifier to a plurality of location identifiers comprising an authorized zone for the keychain. The VKM transmits the current location to a client operated by a vehicle owner. The VKM determines that the keychain device location does not match the plurality of location identifiers for the authorized zone. The VKM generates an alert indicating that the keychain device is outside its authorized location zone. The VKM transmits the alert to the client, causing the client to display the alert and the current location of the keychain.
US09514627B2 Reducing processing resources incurred by a user interface
This document describes techniques and apparatuses for limiting processing resources incurred due to refreshing a user interface. In various embodiments, an event is received, and it is determined whether a delay time period has elapsed. A length of the delay time period is based on a timing of receipt of one or more previous events. If the delay time period has not elapsed, refreshing of the user interface is postponed. When the delay time period elapses, the user interface is refreshed to display an indication of the event.
US09514626B2 Drowsy driver detection system
A method of detecting impairment of a driver of a vehicle. The method includes sensing, using a sensor, a position of the driver's head at a plurality of time points; determining, using a microprocessor, changes in the position of the driver's head between the plurality of time points; evaluating, using a microprocessor, whether the changes in the position of the driver's head between the plurality of time points exhibit at least one of a periodic and a quasi-periodic pattern; determining whether the driver is impaired based on the pattern of the changes in the position of the driver's head; and if the driver is impaired, alerting the driver using an alarm.
US09514623B1 Smoke detector chamber architecture and related methods using two different wavelengths of light
Various arrangements for using multiple wavelengths of electromagnetic radiation to detect smoke by a smoke detector are present. Multiple modes of the smoke detector may be used in which a first wavelength of electromagnetic radiation is emitted into a smoke chamber while a second electromagnetic radiation emitter is disabled, a period of time is waited, and a second wavelength of electromagnetic radiation is emitted into the smoke chamber while the first emitter is disabled. Depending on the mode of the smoke detector, the period of wait time may be varied.
US09514618B2 Signaling system, signaling method, and server
A signaling system according to one embodiment of the present invention includes: a first device configured to transmit signaling order information indicating a signaling order, to a second device different from the first device; and a second device configured to signal a message based on the signaling order information.
US09514617B2 Medium separating and stacking apparatus, medium storage box, and financial device
A medium separating and stacking device is provided. In one embodiment, a medium separating and stacking device comprises a frame, a first shaft rotatably coupled to the frame, a second shaft rotatably coupled to the frame and spaced apart from the first shaft, and a rotation prevention part allowing the second shaft to stop at a set position by using a magnetic force.
US09514613B2 Gaming device having a graduated multiplier payout in a secondary game
An apparatus and method for a secondary game of a wagering gaming system, and particularly the increase of an award in the secondary game by the value of different multipliers associated with different amounts wagered in a primary game. A secondary game provides a total award to a player based on the multiplier associated with the wagered amount in the primary game by applying the multiplier to the amount of the award earned by the player in the secondary game. A particular wagerable amount may be associated with a multiplier that is predetermined, or randomly selected from a group of predefined multipliers, or selected from a group based on a probability. The range of possible combinations of wagerable amounts and multipliers are displayed to the player in the base game to provide an incentive to maximize the wager.
US09514610B2 Resonant gaming chip identification system and method
A system and method for a gaming chip identification system are disclosed. Briefly described, one embodiment comprises a plurality of gaming chips, each gaming chip operable to emit a respective unique electromagnetic signature in response to incident non-optical electromagnetic radiation, a computer-readable medium that stores information indicative of the electromagnetic signatures of at least a number of the plurality of gaming chips, and a processor-based system configured to verify that the electromagnetic signature from an interrogated gaming chip in an interrogation zone is a member of the plurality of gaming chips.
US09514606B2 Wagering game with mystery bonus triggers
Methods, apparatus and systems for triggering a bonus game with a wagering game machine are described. A bonus triggering module is used for adjusting a payout frequency to trigger one or more bonus games. In some embodiments, the bonus triggering module uses a player selection to trigger a bonus game. In various embodiments, occurrences of hidden events are generated to mystery trigger a bonus game. Wagering game machines according to the various embodiments of the invention are also disclosed.
US09514600B2 Slot machine games with groups of symbols rotated together
A slot machine game provides a bonus feature wherein, after the base-game reels have stopped to populate the symbol array, a rectangular region or group of symbols within in the symbol array is selected, and this region is rotated to produce a modified symbol array which is then evaluated for wins. This is preferably done after spins that do not win a prize, in order to improve the payout and excitement of the game. The group rotation can be made available in base or bonus games, and can be used with game logic that searches for a suitable group to rotate by evaluating the prize that will result and choosing a group above a designated threshold.
US09514599B2 Modular gaming terminal configurations
Gaming machines, gaming systems, module systems for providing gaming machines, and methods for assembling modular gaming machines are disclosed. A module system is disclosed for providing gaming machines for conducting wagering games. The module system includes first and second display modules each with distinct dimensions and a respective display device operable to display randomly selected outcomes of a wagering game. The module system also includes first and second sets of outer fascia elements, and a core module with a housing that attaches to and supports the display modules, one at a time. Mounting the first display module and first set of fascia elements onto the core housing provides one distinct gaming machine configuration with a distinct appearance and footprint, whereas mounting the second display module and second set of fascia elements onto the core housing provides another distinct gaming machine configuration with a distinct appearance and/or footprint.
US09514598B2 Method and system for time gaming with skill wagering opportunities
A gaming machine includes a primary game that includes a plurality of primary wagering opportunities and a plurality of additional wagering opportunities that are unrelated to the primary wagering opportunities. The primary game may be active for a predetermined period of time determined by a credit of playing time purchased by the player. One or more of the plurality of additional wagering opportunities may be contextually triggered and made available to the player following occurrence of respective predetermined events occurring within the primary game during the game session or following events external to the gaming machine.
US09514597B2 Gaming chip and system for use therewith
A computer-implemented interactive system and methods allowing for the tracking, management, and reporting of casino smart chips are provided. In an illustrative implementation a casino smart chip environment comprises a casino smart chip management engine, and instruction set comprising at least one instruction to instruct the casino smart chip engine to process data representative of the activation, tracking, monitoring, and/or reporting of one or more casino smart chips. In the illustrative implementation, the one or more casino smart chips can comprise one or more operative components comprising any of a communications component (e.g., radio frequency identification (RFID) component), a display component, a monetary value store, and a unique identifier store. Operatively, the exemplary casino smart chip engine can track, store, and report data representative of the authentication, commissioning, draw down, decommissioning, and use of the smart casino chip in casino and non-casino activities.
US09514596B2 Method and system for time gaming with skill wagering opportunities
A regulated skill-based game includes a plurality of reward generating assets configured such that successful player interactions therewith increase the player's score and give rise to wagers whose outcomes are randomly determined. The amount of the wager may be a function of a time elapsed since the last wager was placed. The regulated game may be configured such that a predetermined duration of game play time thereon is purchased for a predetermined amount of money. A first portion of the predetermined amount of money funds the wagers and a second portion thereof funds a progressive jackpot to be awarded to a player having earned the highest score that is not been exceeded after a predetermined point in time. The regulated game is further configured to award credits when the randomly determined outcome is a reward generating outcome. Both the score of the skill-based game and awarded credits may be shown onscreen.
US09514594B1 Metallic stored value token and method of manufacture
A method is described for producing a stored value token which may take a coin shape. A first portion of a die is mechanically roughened, prior to striking each of a plurality of metallic substrates into a substantially planar three-dimensional form having a first side and a second side. The mechanically roughened portion of the die strikes at least the second side of the substrates, wherein a corresponding first surface portion of the second side of the stamped substrates has a less reflective matte finish. A substantially transparent coat layer such as a lacquer is applied to at least the first surface portion, and an ink layer is applied atop the first layer in the first surface portion, thereby bonding the ink layer and the first coat and generating machine readable indicia unique to each respective one of the plurality of stamped substrates.
US09514593B2 Method and apparatus for processing value documents
The present invention relates to the automatic removal of value document stacks from a container with the aid of a gripper. For separating different value document stacks, the container is subdivided into several storage regions by separator elements. Since the separator element positions of different value document containers may be different, for the container to be respectively processed it is ascertained at which positions along the container the separator elements are arranged. Ascertaining the separator element positions is effected independently of the gripper at a time before the gripper is moved toward the container. The ascertained information items about the separator element positions belonging to the container are then transferred to a gripper control device of the gripper, which is configured for controlling the motion of the gripper in order to remove value documents from the container.
US09514587B2 Vehicle lock controller
There is provided a vehicle lock controller capable of enhancing the security performance of a vehicle by automatically locking at least one door of the vehicle in an appropriate time. A human detection sensor is disposed on a vehicle, and a vehicle door lock controller is configured to detect the presence of a person around the vehicle based on an output signal of the human detection sensor. The vehicle door lock controller is provided with a short-range wireless communicator for wirelessly communicating with a wireless communication device within a short range and a long-range wireless communicator for wirelessly communicating with the wireless communication device within a long range. The vehicle door lock controller sets a timeout period before the at least one door of the vehicle is automatically locked after being unlocked, depending on whether or not communication exists between these wireless communicators and the wireless communication device.
US09514584B1 Access management and reporting technology
An access management and reporting system includes a keysafe that is located outside of a building and a communication system that is located within the building. The communication system is configured to perform, over a short-range wireless communication protocol, two-way communication with a communication module of the keysafe. The system also includes a server that is located remote from the building and the keysafe. The server is configured to perform, over a long-range communication protocol, two-way communication with the communication system located within the building, is configured to manage access to the keysafe, and is configured to handle reporting related to access of the keysafe.
US09514581B2 Diagnostic system for a vehicle
A vehicle that includes a chassis, wheels, a drivetrain including an engine and a transmission, and a brake system. The vehicle also has a vehicle control system that includes controllers for the engine, the transmission controller, and the brake system, a vehicle network connected to the controllers to permit communication to and from these components, and a primary vehicle controller connected to the network and configured to communicate with the controllers. The vehicle further includes a vehicle diagnostic system that is connected to the network and configured to communicate with the various controllers. The diagnostic system is configured to operate in a diagnostic mode, in which the diagnostic system is configured to display diagnostic information from one or more of the controllers. The diagnostic system may further be configured to operate in a display mode, where the vehicle diagnostic system is configured to display operating information regarding the vehicle.
US09514578B1 Systems and methods for updating a driving tip model using telematics data
Methods and systems for improving vehicular safety by utilizing a driving tip model are provided. According to embodiments, an analysis server can analyze telematics data associated with operation of one or more vehicles to identify driving tips that may be aimed to mitigate certain risks or warn of various conditions. The analysis server can provide the driving tips to the vehicles and, in response, receive updated telematics data from the vehicles that reflects operation data for the vehicles subsequent to receiving the driving tips. The analysis server can analyze the updated telematics data to associate certain driving tips with certain telematics data and identify effective driving tips and delivery techniques. The analysis server can update the driving tip model accordingly.
US09514577B2 Integrating economic considerations to develop a component replacement policy based on a cumulative wear-based indicator for a vehicular component
Methods, systems, and computer program products for generating a vehicular component replacement policy are provided herein. A method includes, for each of multiple lifetime wear indicator functions associated with a vehicular component, wherein each lifetime wear indicator function comprises a transformed time scale plotting wear indicator values over a period of time, determining multiple corresponding candidate threshold values on the transformed time scale; calculating: a survival probability function for the vehicular component based on each transformed time scale, an average runtime of the vehicular component prior to failure, and an average runtime of the vehicular component prior to a scheduled replacement; calculating an economic criterion value for each given threshold value based on the above calculations and one or more economic parameters; generating the replacement policy to include (i) the lifetime wear indicator function that optimizes the economic criterion value and (ii) the corresponding threshold value.
US09514574B2 System and method for determining the extent of a plane in an augmented reality environment
Methods, systems, computer-readable media, and apparatuses for constructing a representation of a planar object are presented. In some embodiments, techniques for constructing a representation of a planar object are disclosed. According to some embodiments, a method for constructing a representation of a planar object may include obtaining a depth image of a physical scene as captured from a viewing position. The depth image may comprise a plurality of depth values and corresponding to a plurality of points in the physical scene. The method may further include identifying a planar surface along which the planar object is estimated to be positioned. Furthermore, the method may include constructing a support map. Moreover, the method may include constructing an occlusion map, the occlusion map indicating portions of the planar surface where the planar object is missing. Subsequently, the method may include constructing a representation of at least one boundary of the planar object, using the occlusion map.
US09514569B2 Method and apparatus for converting two-dimensional image into three-dimensional image
The present disclosure provides a method for converting a Two-Dimensional image into a Three-Dimensional image, comprising: obtaining high-frequency components and low-frequency component of the current frame, and high-frequency components of the reference frame; establishing triangular geometric models in the three directions of horizontal, vertical and diagonal, respectively; performing a motion search on the high-frequency components of the reference frame in the three directions of horizontal, vertical and diagonal, respectively, so as to obtain motion vectors in the corresponding directions, and calculating depth variations of the corresponding directions according to the motion vectors in the corresponding directions; performing an interpolating operation on the triangular geometric models in the three directions of horizontal, vertical and diagonal, respectively, according to the depth variations in the corresponding directions, so as to obtain high-frequency depth graphs in the corresponding directions; and completing a filtering reconstruction by performing an inversion wavelet transform on the high-frequency depth graphs in the three directions of horizontal, vertical and diagonal and the low-frequency component of the current frame, respectively, so as to construct a three-dimensional video image. With the present disclosure, a conversion to the 3D image from the 2D image may be realized.
US09514563B2 Graphics processing systems
When processing a set of tiles to generate an output in a tile based graphics processing pipeline, the pipeline, for one or more tiles of the set of tiles, renders one or more render targets containing data to be used in a processing operation (602), and stores the render targets in the tile buffer (604). It also stores some but not all of the sampling position values for a render target or targets for use when processing an adjacent tile of the set of tiles (606). It then performs a processing operation for the tile using the stored render target or targets (608) and one or more stored sampling position values from another, adjacent tile of the set of tiles (610), to generate an output for the tile (612).
US09514560B2 Arbitrary hierarchical tagging of computer-generated animation assets
Systems and methods for using hierarchical tags to create a computer-generated animation are provided. The hierarchical tags may be used to organize, identify, and select animation assets in order to configure animation parameters used to render a computer-generated image. The hierarchical tags may be used to display representations of animation assets for selection. A hierarchy based on the hierarchical tags may be represented by a tree structure. The hierarchical tags may be used as part of a rule to partition animation assets. In this way, the hierarchical tags may advantageously be used to identify, organize, and select animation assets and perform animation processes.
US09514557B2 Representation of operations for making changes to a graph
An embodiment provides a system to generate visualization layouts. A timeline upon which a playhead indicator is moved or positioned. Changes to a displayed visualization (such as a node-edge graph) that are within a predetermined interval of the playhead indicator's time position are shown graphically on or near the graph. Actor icons are positioned on or near the displayed graph. The actor icons correspond to different entities (e.g., a person, group, organization, software agent, etc.) that has made a change to the graph. Change indicators both on the timeline and in association with the actor icons can be color-coded to indicate addition, deletion, modification or other operations to graph items or to other objects being displayed.
US09514550B2 Methods for motion compensated image reconstruction and system related thereto
Featured are methods for reconstruction of images acquired from any of a number of scanning devices or apparatuses known to those skilled in the art which methods are established so as to provide a mechanism for compensating for motion of an object being imaged. Such methods of the present invention are such as to allow the clinician to select one or more specific methodologies that is appropriate for the expected motion, severity or complexity of the motion and efficient processing of projection data. Also feature are systems, apparatuses, software code and computer readable media which embody such methodologies.
US09514547B2 Driving support apparatus for improving awareness of unrecognized object
When a driving support apparatus is under automatic driving of a vehicle or an automatic driving button is pressed under manual driving, vicinity image data is acquired from an in-vehicle camera. When a predetermined target object is recognized in the vicinity image data, a visibility reduction process is applied to image data of the recognized target object. The visibility reduction process applies at least one of defocusing; decreasing color information; and decreasing edge intensity, to the image data of the recognized target object. In contrast, any visibility reduction process is not applied to any other image data other than the image data of the recognized target object. An image display apparatus displays the vicinity image by a combination of the image data of the recognized target object of which the visibility is reduced and the other image data of which the visibility is not reduced.
US09514543B2 Color name generation from images and color palettes
Systems and methods are provided for generating color names for colors corresponding to images and/or palettes. A color image is obtained, and one or more color palettes corresponding to the color image are identified. The color palette may be generated based on palette generation criteria, which may facilitate or control a palette generation process. Illustratively, the palette generation process may include image pre-processing, color distribution generation, representative color identification, palette candidate generation, and palette determination. A color name for each color identified in the color palette and/or the color image can be identified based at least in part on color name popularity information. Color name popularity information may be identified from color name-related voting results provided by a social network site. Aspects of the disclosure are further directed to processing the identified color name(s), such as updating color name metadata associated with the original color image and/or the color palette.
US09514540B2 Method and apparatus for processing a video frame in a video file
The present invention provides a method and apparatus for processing a video frame in a video file, the method comprising: for each predetermined numerical value of one or more predetermined numerical values, comparing the video frame with a video frame spaced prior to the video frame by the predetermined numerical value of frames to obtain a first inter-frame difference; comparing the video frame with a video frame spaced after the video frame by the predetermined numerical value of frames to obtain a second inter-frame difference; and for each pixel of the video frame, obtaining a confidence map associating the video frame by the predetermined numerical value based on a smaller value of the first inter-frame difference and the second inter-frame difference; and determining, at least based on a value of each pixel in one or more of the confidence maps associated with a corresponding predetermined numerical value, whether the pixel belongs to a foreground.
US09514539B2 Segmentation of magnetic resonance imaging data
There is described herein an image segmentation technique using an iterative process. A contour, which begins with a single point that expands into a hollow shape, is iteratively deformed into a defined structure. As the contour is deformed, various constraints are applied to points along the contour to dictate its rate of change and direction of change are modified dynamically. The constraints may be modified after one or more iterations, at each point along the contour, in accordance with newly measured or determined data.
US09514531B2 Medical image diagnostic device and method for setting region of interest therefor
The present invention comprises: capturing a medical image of a subject by an image-capturing unit; generating compressed image data by compressing on the basis of a plurality of pixels of uncompressed image data, where the uncompressed image data is image data of the captured medical image of the subject, by an image data compression unit; setting a search range of the compressed image data and also setting a search range of the uncompressed image data, by a search range setting unit; and setting a region of interest for the medical image on the basis of the search range of the uncompressed image data and the search range of the compressed image data, by a region-of-interest setting unit.
US09514529B2 Diagnostic reading request system, diagnostic reading request intermediary device, control program, and diagnostic reading result evaluation method
A diagnostic reading request system includes: a request information creation unit which creates diagnostic reading request information by adding identification information to clinical image data collected by a medical image diagnostic device; a request information update unit which updates the diagnostic reading request information by adding determination image data having already acquired a diagnostic reading result thereof; a diagnostic reading result evaluation unit which performs, based on a new diagnostic reading result of the determination image data supplied from a diagnostic reading request destination facility, an evaluation of the diagnostic reading result in the diagnostic reading request destination facility; a diagnostic reading report creation unit which creates a diagnostic reading report based on the evaluation of the diagnostic reading result and the diagnostic reading result supplied from the diagnostic reading request destination facility; and a display unit which displays the diagnostic reading report.
US09514528B2 Image processing apparatus, distortion-corrected map creation apparatus, and semiconductor measurement apparatus
Image processing apparatus includes: interpolation process image acquisition means for acquiring an interpolation process image of prescribed size which includes an interpolation point of an inputted image; Fourier transform means for subjecting the interpolation process image which is acquired with the interpolation process image acquisition means to Fourier transform; phase change means for changing, a phase of each value of the transformed interpolation process image which has been subjected to Fourier transform by the Fourier transform means, such that the interpolation point migrates to a desired nearby integer coordinate position; inverse Fourier transform means for subjecting the interpolation process image whose phase has been changed by the phase change means, to inverse Fourier transform; interpolation value determination means for adopting an interpolation point, a value of a pixel at the integer coordinate position, from the transformed interpolation process image subjected to inverse Fourier transform by the inverse Fourier transform means.
US09514525B2 Temporal filtering for image data using spatial filtering and noise history
A temporal filter in an image processing pipeline may perform filtering using spatial filtering and noise history. A given pixel of a current image frame may be received for filtering at a temporal filter. A filtering weight may be determined for blending the given pixel with a corresponding pixel of a reference image frame that was previously filtered at the temporal filter. The filtering weight may be determined based on neighboring pixels of the given pixel in the current image frame and corresponding pixels in the reference image frame. The filtering weight may be adjusted according to a quality score indicating noise history for the corresponding pixel in the reference image frame. Based on the filtering weight, a filtered version of the given pixel may be generated, blending the given pixel and the corresponding pixel to store as part of a filtered version of the current image frame.
US09514520B2 Method and apparatus for image filtering
A system that incorporates the subject disclosure may include, for example, partitioning the image into a group of blocks, calculating principle bilateral filtered image components for a first subset of the group of blocks where the principle bilateral filtered image components are not calculated for a second subset of the group of blocks, and applying an infinite impulse response filter to the image using the principle bilateral filtered image components. Other embodiments are disclosed.
US09514518B2 Infusion pump including syringe plunger position sensor
An infusion pump includes a housing having a compartment structured to receive a syringe and a drive mechanism supported by the housing. The drive mechanism is structured and arranged to contact a syringe plunger of the syringe and move the syringe plunger within a syringe barrel of the syringe. The infusion pump further includes a syringe plunger position sensor and a syringe barrel size sensor. The sensors each include a magnet positioned on the drive mechanism and a magnetic sensor array supported by the housing.
US09514516B2 Method and apparatus for providing panorama image data
A method and an apparatus for providing panoramic image data by reconstructing frame images captured by a panoramic imaging apparatus, are disclosed. In reconstruction of images with multiple image layers, sizes of images reconstructed with an image layer or images to be used for a reconstruction are scaled. An image is selected by analyzing sharpness. A panoramic image is provided by combining selected image. According to the present invention, parts having unclear focal planes may be completely removed in a panoramic image and it is possible to provide an image including only with focused regions.
US09514514B2 Bayer-consistent raw scaling
A system and method for scaling an image includes receiving raw image data comprising input pixel values which correspond to pixels of an image sensor; and filtering pixels according to a Bayer-consistent ruleset by a first scaling factor in a first direction and a second scaling factor in a second direction perpendicular to the first direction, wherein the first scaling factor is different from the second scaling factor. The system and method may also include outputting scaled image data as output pixel values, which correspond to subgroups of the input pixel values. The Bayer-consistent ruleset includes a set of filter weights and a series of scaling rules. The Bayer-consistent ruleset results in a scaled image having a high degree of Bayer-consistency.
US09514513B2 Establishing compatibility between two- and three-dimensional optical coherence tomography scans
Advances in optical coherence tomography (OCT) have prompted a transition from time domain OCT, providing 2D OCT images, to spectral domain OCT, which has a 3D imaging capability. Yet conventional technology offers little toward the goal of inter-device compatibility between extant 2D OCT images and newer 3D OCT images for the same or comparable subjects, as in the context of ongoing monitoring the quantitative status of a patient's eyes. The inventive methodology is particularly useful to identify the scan location of tissue in a 2D OCT image within the 3D OCT volumetric data, thereby allowing clinicians to image a patient via 3D OCT, based on available 2D OCT images, with minimal inter-device variation.
US09514512B2 Method and apparatus for laying out image using image recognition
A method of laying out an image using image recognition is provided. The method includes operations of recognizing, from an original image, a subject part of an original image corresponding to at least a partial area of the original image, cropping the subject part, and displaying the subject part in a predetermined area.
US09514508B2 Mapping for display emulation based on image characteristics
An emulator yields modified image data that predicts the appearance of image content on a target display. The emulator generates modified image data based in part on the image content. The emulator may perform a transformation in which one or more parameters representative of features such as black level and/or white level of the target display are functions of image statistics for the image content.
US09514507B2 Methods and systems for maintaining state in a virtual machine when disconnected from graphics hardware
The present disclosure is directed towards methods and systems for maintaining state in a virtual machine when disconnected from graphics hardware. The virtual machine is one of a plurality of virtual machines hosted by a hypervisor executing on a computing device. A control virtual machine may be hosted by a hypervisor executing on a computing device. The control virtual machine may store state information of a graphics processing unit (GPU) of the computing device. The GPU may render an image from a first virtual machine. The control virtual machine may remove, from the first virtual machine, access to the GPU. The control virtual machine may redirect the first virtual machine to a GPU emulation program. The GPU emulation program may render the image from the first virtual machine using at least a portion of the stored state information.
US09514506B2 Method and apparatus for tile based rendering using tile-to-tile locality
Disclosed is a method and apparatus for performing tile-based rendering. A sequence of tiles to be processed may be determined based on a locality among the tiles. A tile dispatch unit selects a subsequent tile to be dispatched, based on the determined sequence. The tile dispatch unit may check whether an idle fragment processor exists among the plurality of fragment processors, and may dynamically dispatch the selected tile to an idle fragment processor
US09514505B2 Watermark detection with payload
A method for detecting a payload embedded using watermarking in a content stream, the payload being different in a first and a second segment of the content stream, a payload in the second segment having a predetermined relationship with a payload in the first segment, is described. The method selects a point in the content stream where the first segment is likely to end and the second segment to being, samples the stream to obtain a first set of samples that is before the chosen point and a second set of samples that is after the chosen point, and detects the payload on a combination of the first set and a transformation of the second set, where the transformation is based on the assumption that the second set is from the second segment and exploits the relationship that exists between the payloads in the first and second segments.
US09514504B2 Encoding/decoding message by selectively adjusting characteristics of sub-units in image data
A message can be encoded in an image file by mapping at least one bit of the message onto each sub-unit of the image file, and adjusting a distinguishable characteristic of each sub-unit according to the corresponding bit to produce a modified image file. The message can be decoded from the message file by comparing each sub-unit of the modified image file with a corresponding sub-unit of the original image file, and identifying at least one bit of the message based on each comparison.
US09514503B2 Methods and apparatus to generate and use content-aware watermarks
Methods and apparatus to generate and use content-aware watermarks are disclosed herein. An example disclosed method includes detecting a watermark in a first media composition, the watermark encoded with a word present in an audio track of the first media composition, the word audible during playback of the audio track. The example method also includes retrieving the word from the watermark. The example method also includes determining whether the word retrieved from the watermark matches a keyword, and presenting a second media composition when the word matches the keyword.
US09514499B1 Predictive approach to contract management
Embodiments of the present invention provide methods, computer program products, and systems for a predictive approach to contract management. In one embodiment, acceptable contract parameters are predicted based, at least in part on historic data and specified thresholds of identified contract parameters. Predicting acceptable contract parameters can help reduce negotiation cycles.
US09514490B2 Method for propagating combination of signals for operating a closed circuit e-commerce
A method and apparatus for communicating information and e-shopping signals between servers within a closed circuit e-commerce, and between servers and shopping terminals via main router and interface of a building, propagating the information and e-shopping signals via at least one twisted pair including ASK and FSK modulated data and commands including high speed updating signals for updating the content and programs of said e-commerce stored in the shopping terminals. A delivery station for picking up and deliver the ordered merchandise located within the building or outside the building using delivery devices, and storage devices for verifying the pickup and deliver with no error.
US09514486B2 Automatic shopping cart checkout
An apparatus and method for purchasing contents of a virtual shopping cart are disclosed herein. Automatic checkout settings are received from a user, the automatic checkout settings including an automatic checkout time and specifying item substitution behavior. The user adds a first item to the virtual shopping cart associated with the user. In response to the item substitution behavior authorizing substitution of items in the virtual shopping cart, determining availability of a substitute item that qualifies as a substitute for the first item. Removing the first item from the virtual shopping cart and adding the substitute item to the virtual shopping cart based on the availability of the substitute item. Automatically purchasing the contents of the virtual shopping cart at the automatic checkout time and in accordance with the remaining automatic checkout settings.
US09514483B2 Marketing campaign application for multiple electronic distribution channels
A system is disclosed for allowing a merchant to create offers for distribution via multiple distribution channels. The distribution channels may include social media networks and location based services. The method may include receiving offer parameters for generating the offer, generating offer data based on the offer parameters and merchant transaction data, and determining data subsets of the offer data for distribution through multiple electronic distribution channels. The systems and methods may include associating a transaction account of the account holder with the offer, monitoring a transaction of the transaction account, comparing with a criterion governing the offer, and generating a report for the merchant. The report may include various metrics of the offer, such as return on investment, tracking information on the number of repeat customers and new customers during an offer period, and may occur approximately real-time with the transaction.
US09514479B2 System and method for estimating prevalence of digital content on the world-wide-web
The present invention is a system, method and computer program product for tracking and measuring digital content that is distributed on a computer network such as the Internet. The system collects online advertisement data, analyzes the data, and uses the data to calculate measurements of the prevalence of those advertisements. The system processes raw traffic data by cleansing and summarizing the traffic data prior to storing the processed data in a database. An advertisement sampling system uses site selection and definition criteria and a probe map to retrieve Web pages from the Internet, extract advertisements from those Web pages, classify each advertisement, and store the data in a database. A statistical summarization system accesses the processed raw traffic data and the advertisement data in the database to calculate advertising prevalence statistics including the advertising frequency, impressions, and spending.
US09514478B2 Conversion tracking for installation of applications on mobile devices
An application executing on a mobile device, such as an application associated with a social networking system provides a link to install a third-party application. The link may be presented in an advertisement, and the link is used to retrieve data comprising a client application for execution by the mobile device. To track installations, the client application stores an indication that the client application was installed in a shared memory location on the mobile device, as native applications do not have access to cookies. A social networking application executing on the mobile device retrieves the indication the client application was installed from the shared memory location and communicates it to a social networking system for storing in a user profile.
US09514477B2 Systems and methods for providing user-specific content on an electronic device
Systems and methods for providing user-specific content on an electronic device are disclosed. The user-specific data can be generated in isolated applications that are prohibited from communicating directly with one another. Sharing of user data that enables these isolated applications to generate such user-specific data can be facilitated by the use of a master program that can be loaded along with each of the isolated applications on the electronic device.
US09514476B2 Systems and methods for discovering artists
A musician discovery system is provided. The musician discovery system includes a first interface for displaying a plurality of musicians organized according to a musical characteristic. The system includes a second interface for presenting multimedia information about a first musician from the plurality of musicians displayed on the first interface. The system includes means for comparing a second plurality of musicians with the first musician using the multimedia information presented on the second interface about the first musician. Furthermore, the system includes a third interface for recommending a second musician from the second plurality of musicians based on the comparing means.
US09514469B2 Identification of consumers based on a unique device ID
Machines, systems and methods for identification of a consumer are provided. The method comprises capturing a unique identifier (ID) associated with a computing device, wherein the computing device is configured to access content stored on one or more content servers; and associating the unique ID with tracking data associated with the computing device, wherein when the computing device submits a request to a content server to access content, wherein in response to retrieving at least one of the unique ID or the tracking data of the computing device, the computing device is identified and content pages accessed by the computing device are tracked by a machine that is aware of the association between the unique ID and the tracking data for the computing device.
US09514466B2 Collecting and presenting data including links from communications sent to or from a user
Information is presented to a user of a user device by a method including: collecting data relating to communications sent to or from the user, including to or from a first person, each communication including a link of a plurality of links; generating personal profiles from the collected data, the profiles comprising a first personal profile of the first person and including a first link of the plurality of links; and presenting the first personal profile to the user, comprising displaying the first link in a user interface on the user device.
US09514465B2 Techniques for process tracking and monitoring
Techniques are presented for process tracking and monitoring. A tracking service monitors a good or service through a processing plan and takes selective measurements. A dashboard service presents the processing plan, locations for the good or service, and other metadata. The dashboard service also identifies cause and effect relationships derived from the metadata. A case management tool permits exceptions to the processing to be handled in a user-defined manner.
US09514463B2 Determination of customer presence based on communication of a mobile communication device digital signature
Systems, apparatus, and computer program products provide for monitoring an area within or proximate to a place of business for digital signatures of mobile communication devices, such as cellular devices or wearable communication devices. The captured digital signatures are then matched to digital signatures associated with existing customers of the business to determine the presence of the existing customer within or proximate to the place of business. Once the presence of the existing customer within or proximate to the business is known, the business can access other relevant information, such as customer profile information, prior transaction/interaction information or the like to enhance the customer's current interaction with the business. Moreover, once the presence of the existing customer is known, location determining mechanisms may implemented to track the location of the known customer within or proximate to the place of business for the purpose of positively identifying the known customer.
US09514457B2 Tokenization in mobile environments
Data can be protected in mobile and payment environments through various tokenization operations. A mobile device can tokenize communication data based on device information and session information associated with the mobile device. A payment terminal can tokenize payment information received at the payment terminal during a transaction based on transaction information associated with the transaction. Payment data tokenized first a first set of token tables and according to a first set of tokenization parameters by a first payment entity can be detokenized or re-tokenized with a second set of token tables and according to a second set of tokenization parameters. Payment information can be tokenized and sent to a mobile device as a token card based on one or more selected use rules, and a user can request a transaction based on the token card. The transaction can be authorized if the transaction satisfies the selected use rules.
US09514453B2 Dynamically reacting policies and protections for securing mobile financial transaction data in transit
A secure mobile financial transaction is provided by receiving, over a communication network, a list of protection mechanisms available for implementation by an external terminal. Security-related data is received from one or more sensors and an attack signature is computed based on the security-related data. An appropriate security policy is selected from multiple security policies stored in a database based on the list of protection mechanisms and the attack signature. A secure communication session is established between the external terminal and an internal network component according to the selected security policy. A data message associated with a mobile financial transaction is communicated over the communication network during the communication session.
US09514452B2 System and method for simplified checkout with payment float
In various embodiments, a system and method for providing simplified checkout with payment float are provided. In example embodiments, an identifier that corresponds to a payment account of a user is received at a payment provider system. A determination is made that the identifier corresponds to a payment account of the user at the payment provider system. A determination is made to provide a float option to float payment for the user in a payment transaction involving a merchant system. A user interface providing the float option is presented to the user. If the user selects the float option, payment is floated to the user and the user agrees to pay back the floated payment within a predetermined time period.
US09514448B2 Comprehensive task management
Technologies for generating tasks from communication messages includes a mobile computing device for monitoring communication messages, parsing the communication messages to detect content indicative of upcoming tasks, generating a task for each of the upcoming tasks detected, generating a task list from the generated tasks, and generating an alarm for each task. Additionally, the mobile computing device receives tasks generated by a cloud server.
US09514447B2 Multi-horizon time wheel
A computer-implemented method includes storing a plurality of scheduled elements in a memory area, displaying a time horizon via a display device, and displaying a first portion of the plurality of scheduled elements within the time horizon. In response to a user input, the time horizon is adjusted and a second portion of the plurality of scheduled elements is displayed within the adjusted time horizon.
US09514443B2 Locating previously communicated electronic messages
Embodiments of the present invention provide an approach for locating previously communicated electronic messages (e.g., emails, etc.). Specifically, the system will receive a request to locate/retrieve a previously communicated electronic message (“message”). The request can be issued by a sender or a recipient of the message. In any event, the request will include a set (one or more) of characteristics pertaining to the message such as a set of recipients thereof. One or more electronic messaging databases will then be searched based on the set of recipients and the message located. Once located, an alert will be sent to the requester and/or other message parties. The alert will indicate the message that was located. If the alert is validated (e.g., the message was the correct message), the message will be displayed.
US09514441B2 Method and apparatus for switching between concurrent messaging sessions
A method and apparatus for conducting at least two concurrent conversation sessions is provided whereby a user may quickly switch between sessions. A graphical user interface may be provided comprising a first portion for conducting a first communication session and a second portion for immediately invoking a switch to a second communication session. In operation, the first portion of the graphical user interface is switched to immediately conduct said second communication session in response to a user input to invoke the switch. The second component can display notifications for concurrent session activities and a particular notification selected by a user to invoke the switch.
US09514440B2 Methods and apparatus for providing data warehousing with respect to, inter alia, interactive hierarchical entitlements
A method for providing data warehousing for a list of authorized signatories is provided. The method may include displaying a hierarchal list of signatories with at least one entitlement authorization level. The method may use a GUI to display the list of entitlements in an array of at least three rows of entitlement authorization levels. The method may further include receiving, from the client, a modification to the at least one entitlement authorization. The method may extract, from client documents a signature of a signatory with entitlement authorization. The method may receive a command to hover, on a Graphical User Interface (GUI), over the signatory. In response to the hovering, the may display, preferably on a hierarchical display, a copy of the signature of the signatory, a hierarchical list of signatories with current entitlement authorization, and a listing of documents signed by each of the signatories.
US09514437B2 Apparatus and methods for creation, collection, and dissemination of instructional content modules using mobile devices
In one aspect, a mobile device comprises a local content store, one or more media playback components, one or more content capture components, and an instructional module agent comprising an authoring application and a playback application. The authoring application is configured to allow an author to create and edit instructional modules each comprising one or more media playback steps, each step comprising media that can be displayed or played, and to use the content capture components to capture content, store the captured content in the local content store, and configure at least one of the steps to display or play the captured content using the media playback components. The playback application is configured to play the instructional modules using the media playback components. The instructional module agent can be configured to respond to the creation and/or editing of an instructional module using the authoring application by automatically uploading at least a portion of the instructional module to a content repository stored on one or more computer servers.
US09514436B2 Method and system for predicting audience viewing behavior
The present invention is directed to a method and system for predicting the behavior of an audience based on the biologically based responses of the audience to a presentation that provides a sensory stimulating experience and determining a measure of the level and pattern of engagement of that audience to the presentation. In particular, the invention is directed to a method and system for predicting whether an audience is likely to view a presentation in its entirety. In addition, the present invention may be used to determine the point at which an audience is likely to change their attention to an alternative sensory stimulating experience including fast forwarding through recorded content, changing the channel or leaving the room when viewing live content, or otherwise redirecting their engagement from the sensory stimulating experience.
US09514433B2 System and method for managing and monitoring the dispensing of fuels utilizing fraud indication of unconvertible non-stock issue
Standard practices and procedures by operators of temporary and/or permanent inventories of vehicles such as vehicle dealerships often result in situations in which vehicles requiring fuel have not yet been entered as stock items into the dealership's computerized management system. Non-stock issues that are not converted to stock issues within a pre-established time period are considered “unconvertible non-stock issues.” These exceptions may be provided with additional scrutiny to ensure the legitimacy of the fuel issuance and to assist in the proper enforcement of the dealership's policy. The unconvertible non-stock issues fraud indicator provides detailed information on unconvertible non-stock issues to the dealership. Active alerting methods periodically notify management when non-stock issues become unconvertible. Additionally, a report is available on demand that shows all of the unconvertible non-stock issues occurring within a given time period.
US09514431B2 Compact mobile-reader system for two-way wireless communication, tracking and status monitoring for transport safety and security
A system for monitoring a plurality radio frequency identification tags is described. The system uses at least one set of radio frequency identification tags. Each tag is attached to a container and includes several sensors for detecting physical conditions of said container. The system includes at least one autonomous intermediate reader in wireless communication with the frequency identification tags. The intermediate reader includes external wireless communication system, intermediate reader logic controller, and a self-contained rechargeable power supply. The system uses a central status reporting system in communication the intermediate reader.
US09514418B2 Method for refining cognitive insights using cognitive graph vectors
A method, system and computer-usable medium for using cognitive graph vectors to refine cognitive insights.
US09514416B2 Apparatus and method of diagnosing a lesion using image data and diagnostic models
An apparatus and a method for diagnosis are provided. The apparatus for diagnosis lesion include: a model generation unit configured to categorize learning data into one or more categories and to generate one or more categorized diagnostic models based on the categorized learning data, a model selection unit configured to select one or more diagnostic model for diagnosing a lesion from the categorized diagnostic models, and a diagnosis unit configured to diagnose the lesion based on image data of the lesion and the selected one or more diagnostic model.
US09514409B2 Implementing meta rules on an executable rule engine
An apparatus includes an execution module, a determination module, and a generation module. In one embodiment, the execution module parses a business rule as input into a meta rule on a rule engine. The meta rule includes a first expression defining one or more style conditions for business rules. The business rule includes a second expression defining logic for an entity. The determination module, in one embodiment, determines that a business rule violates a style condition defined by the meta rule. The business rule and the meta rule conform to a common business rule syntax. The generation module, in one embodiment, generates a notification in response to determining that the business rule violates the style condition of the meta rule.
US09514404B1 Using embedding functions with a deep network
Methods, systems, and apparatus, including computer programs encoded on computer storage media, for using embedded function with a deep network. One of the methods includes receiving an input comprising a plurality of features, wherein each of the features is of a different feature type; processing each of the features using a respective embedding function to generate one or more numeric values, wherein each of the embedding functions operates independently of each other embedding function, and wherein each of the embedding functions is used for features of a respective feature type; processing the numeric values using a deep network to generate a first alternative representation of the input, wherein the deep network is a machine learning model composed of a plurality of levels of non-linear operations; and processing the first alternative representation of the input using a logistic regression classifier to predict a label for the input.
US09514402B1 Radio frequency identification (RFID) tag having multiple antennas
Provided is a Radio Frequency Identification (RFID) tag having a plurality of antennas. The RFID tag includes: a plurality of antennas each configured to backscatter received Radio Frequency (RF) signals; a digital and memory circuitry, which once the RF signals are received through the plurality of antennas, is configured to generate a series of programmed encoding signals based on identification information to be transmitted, and to output the generated signals; and a modulator configured to vary power of an uplink signal backscattered through the plurality of antennas based on the encoding signals input from the digital and memory circuitry, in which the modulator operates such that the power of the uplink signal backscattered through each of the plurality of antennas is equal regardless of types of the encoding signals.
US09514397B2 Printer monitoring
Techniques for monitoring a three-dimensional (3D) printer during the performance of a print job are described herein. An example of a system in accordance with the present techniques includes a camera to generate an image of a 3D print job in progress. The system also includes a baseline image generator to generate a baseline image based on a 3D model of the object to be printed. The system also includes a monitoring engine to compare the image with the baseline image to determine a status of the 3D print job and trigger an alarm if the 3D print job fails.
US09514391B2 Fisher vectors meet neural networks: a hybrid visual classification architecture
In an image classification method, a feature vector representing an input image is generated by unsupervised operations including extracting local descriptors from patches distributed over the input image, and a classification value for the input image is generated by applying a neural network (NN) to the feature vector. Extracting the feature vector may include encoding the local descriptors extracted from each patch using a generative model, such as Fisher vector encoding, aggregating the encoded local descriptors to form a vector, projecting the vector into a space of lower dimensionality, for example using Principal Component Analysis (PCA), and normalizing the feature vector of lower dimensionality to produce the feature vector representing the input image. A set of mid-level features representing the input image may be generated as the output of an intermediate layer of the NN.
US09514390B2 Systems and methods for identifying users in media content based on poselets and neural networks
Systems, methods, and non-transitory computer-readable media can receive a first image including a representation of a first user. A second image including a representation of a second user can be received. A first set of poselets associated with the first user can be detected in the first image. A second set of poselets associated with the second user can be detected in the second image. The first image including the first set of poselets can be inputted into a first instance of a neural network to generate a first multi-dimensional vector. The second image including the second set of poselets can be inputted into a second instance of the neural network to generate a second multi-dimensional vector. A first distance metric between the first multi-dimensional vector and the second multi-dimensional vector can be determined.
US09514389B1 Training a neural network to detect objects in images
Methods, systems, and apparatus, including computer programs encoded on computer storage media, for training a neural network to detect object in images. One of the methods includes receiving a training image and object location data for the training image; providing the training image to a neural network and obtaining bounding box data for the training image from the neural network, wherein the bounding box data comprises data defining a plurality of candidate bounding boxes in the training image and a respective confidence score for each candidate bounding box in the training image; determining an optimal set of assignments using the object location data for the training image and the bounding box data for the training image, wherein the optimal set of assignments assigns a respective candidate bounding box to each of the object locations; and training the neural network on the training image using the optimal set of assignments.
US09514388B2 Systems and methods employing cooperative optimization-based dimensionality reduction
Dimensionality reduction systems and methods facilitate visualization, understanding, and interpretation of high-dimensionality data sets, so long as the essential information of the data set is preserved during the dimensionality reduction process. In some of the disclosed embodiments, dimensionality reduction is accomplished using clustering, evolutionary computation of low-dimensionality coordinates for cluster kernels, particle swarm optimization of kernel positions, and training of neural networks based on the kernel mapping. The fitness function chosen for the evolutionary computation and particle swarm optimization is designed to preserve kernel distances and any other information deemed useful to the current application of the disclosed techniques, such as linear correlation with a variable that is to be predicted from future measurements. Various error measures are suitable and can be used.
US09514387B2 System and method of monitoring and measuring cluster performance hosted by an IAAS provider by means of outlier detection
The present disclosure is directed to a system for monitoring and analyzing operation of a widely distributed service operated by an Infrastructure-as-a-Service (IaaS) tenant but deployed on a set of virtual resources controlled by an independent IaaS provider. The set of virtual resources can be organized into clusters in which resources are expected to behave similarly to each other. Virtual resources that do not behave similar to peer resources in the same cluster, i.e., outliers, may be indicative of problems that need to be addressed. The monitoring system can collect performance metric data from virtual resources, and compare the performance of each virtual resource in a cluster with the performance of every other virtual resource in the cluster to detect outliers. This comparison can involve correlation analysis, ANOVA analysis, or regression analysis.
US09514385B2 Key blank identification system with groove scanning
A key identification system is provided. The key identification system comprises an imaging system to capture an image of a master key, and a logic to analyze the captured image. The imaging system may be capture an image of a groove in the master key from an angle between perpendicular and parallel to the blade of said master key. The logic analyzes the captured image to compare characteristics of the groove with groove characteristics of known key blanks to determine the likelihood of a match between the master key and a known key blank. The key identification system may further compensate for displacement or orientation of the master key with respect to the imaging system when analyzing characteristics of the groove.
US09514383B2 Image processing method, image processing device, and recording medium
An image processing method separates an input image into a skeleton component, and residual component. In the method a local variation amount, which is a variation amount between a target pixel and a pixel adjacent to the target pixel, is calculated; a skeleton component extraction filter weight is calculated based on the local variation amount; an image feature amount of a gradient direction of a pixel value around the target pixel, and an image feature amount of a gradient strength of the pixel value around the target pixel, are calculated; the skeleton component extraction filter weight is corrected based on these image feature amount; a skeleton component extraction filter coefficient is calculated based on the corrected skeleton component extraction filter weight; and the skeleton component is extracted by applying skeleton component extraction filtering to the target pixel using the calculated skeleton component extraction filter coefficient.
US09514380B2 Method for image processing and an apparatus
The disclosure relates to a method in which one or more local descriptors relating to an interest point of an image are received. A global descriptor is determined for the image on the basis of the one or more local descriptors; and the global descriptor is compressed. The disclosure also relates to an apparatus comprising a processor and a memory including computer program code, and storage medium having stored thereon a computer executable program code for use by an apparatus.
US09514377B2 Techniques for distributed optical character recognition and distributed machine language translation
A technique for selectively distributing OCR and/or machine language translation tasks between a mobile computing device and server(s) includes receiving, at the mobile computing device, an image of an object comprising a text. The mobile computing device can determine a degree of optical character recognition (OCR) complexity for obtaining the text from the image. Based on this degree of OCR complexity, the mobile computing device and/or the server(s) can perform OCR to obtain an OCR text. The mobile computing device can then determine a degree of translation complexity for translating the OCR text from its source language to a target language. Based on this degree of translation complexity, the mobile computing device and/or the server(s) can perform machine language translation of the OCR text from the source language to a target language to obtain a translated OCR text. The mobile computing device can then output the translated OCR text.
US09514376B2 Techniques for distributed optical character recognition and distributed machine language translation
A technique for selectively distributing OCR and/or machine language translation tasks between a mobile computing device and server(s) includes receiving, at the mobile computing device, an image of an object comprising a text. The mobile computing device can determine a degree of optical character recognition (OCR) complexity for obtaining the text from the image. Based on this degree of OCR complexity, the mobile computing device and/or the server(s) can perform OCR to obtain an OCR text. The mobile computing device can then determine a degree of translation complexity for translating the OCR text from its source language to a target language. Based on this degree of translation complexity, the mobile computing device and/or the server(s) can perform machine language translation of the OCR text from the source language to a target language to obtain a translated OCR text. The mobile computing device can then output the translated OCR text.
US09514375B2 Multi-biometric authentication apparatus, and multi-biometric authentication system
An authentication apparatus for authenticating using biometric information of a plurality of kinds including first information related to a first body part input into a first information inputting area and second information related to a second body part input into a second information inputting area includes an information existence detecting unit that detects a lack of the second information, a determination information acquiring unit that acquires information for lack determination based on third information related to the second body part input into the first information inputting area, and a pseudo lack determining unit that determines whether the lack is an actual lack or a pseudo lack based on the information for lack determination.
US09514373B2 Imaging system and method for fog detection
An imaging system and method for fog detection are disclosed herein. An imager is configured to image a scene external and forward of a controlled vehicle and to generate image data corresponding to the acquired images. A controller is configured to receive and analyze the image data. When exterior lights of the controlled vehicle are operated in a low beam state, the controller is able to detect light sources of interest in the image data, determine if each light source of interest is a foggy light or a clear light, and generate a first signal if a fog entry condition is satisfied.
US09514364B2 Efficient forest sensing based eye tracking
Methods, systems, computer-readable media, and apparatuses for novel eye tracking methodologies are presented. Specifically, after an initial determination of a person's eyes within a field of view (FOV), methods of the present disclosures may track the person's eyes even with part of the face occluded, and may quickly re-acquire the eyes even if the person's eyes exit the FOV. Each eye may be tracked individually, at a faster rate of eye tracking due to the novel methodology, and successful eye tracking even at low image resolution and/or quality is possible. In some embodiments, the eye tracking methodology of the present disclosures includes a series of sub-tracker techniques, each performing different eye-tracking functions that, when combined, generate a highest-confidence location of where the eye has moved to in the next image frame.
US09514356B2 Method and apparatus for generating facial feature verification model
A method and an apparatus for generating a facial feature verification model. The method includes acquiring N input facial images, performing feature extraction on the N input facial images, to obtain an original feature representation of each facial image, and forming a face sample library, for samples of each person with an independent identity, obtaining an intrinsic representation of each group of face samples in at least two groups of face samples, training a training sample set of the intrinsic representation, to obtain a Bayesian model of the intrinsic representation, and obtaining a facial feature verification model according to a preset model mapping relationship and the Bayesian model of the intrinsic representation. In the method and apparatus for generating a facial feature verification model in the embodiments of the present disclosure, complexity is low and a calculation amount is small.
US09514355B2 Organizing images by correlating faces
Methods and systems are presented for organizing images. In one aspect, a method can include generating a correlation value indicating a likelihood that a face included in a test image corresponds to a face associated with a base image, determining that a correlation threshold exceeds the correlation value and that the correlation value exceeds a non-correlation threshold, generating a similarity score based on one or more exposure values and one or more color distribution values corresponding to the test image and the base image, combining the similarity score with the correlation value to generate a weighted correlation value, and determining that the test image and the base image are correlated when the weighted correlation value exceeds the correlation threshold.
US09514354B2 Facial analysis by synthesis and biometric matching
One or more processors generate a set of facial appearance parameters that are derived from a first facial image. One or more processors generate a graphics control vector based, at least in part, on the set of facial appearance parameters. One or more processors render a second facial image based on the graphics control vector. One or more processors compare the second facial image to the first image. One or more processors generate an adjusted vector by adjusting one or more parameters of the graphics control vector such that a degree of similarity between the second facial image and the first facial image is increased. The adjusted vector includes a biometric portion. One or more processors generate a first face representation based, at least in part, on the biometric portion of the adjusted vector.
US09514353B2 Person-based video summarization by tracking and clustering temporal face sequences
A method for finding a temporal face sequence (412) includes, with a physical computing system (100), analyzing frames within a shot within a video, applying a face detection function to the frames, and in response to detecting a face within one of the frames, tracing a person associated with the face both backwards and forwards through frames within the shot. A temporal face sequence (412) is then defined as a sequence of frames that include frames within the shot spanning when the person is shown.
US09514350B2 Fingerprint recognition element, a display screen and a display device
The present invention discloses a fingerprint recognition element comprising: a plurality of parallel fingerprint detecting electrodes, the distance between two adjacent fingerprint detecting electrodes being not larger than the distance between adjacent ridge and valley in the fingerprint, a fingerprint recognition signal being loaded to one end of each fingerprint detecting electrode, and the fingerprint recognition signal being acquired in real time at the other end of each fingerprint detecting electrode. The present invention further discloses a display screen comprising the fingerprint recognition element and a display device comprising the display screen.
US09514347B2 Secure code generation for customer tracking
An authentication server receives a request for a user-identification code from a computing device. The authentication server generates the user-identification code. The authentication server also generates an expiration date associated with the user-identification code. The authentication server transmits the user-identification code and the expiration date to the computing device. The authentication server also validates the user-identification code received from a code scanning system.
US09514345B1 Wearable scanners
Wearable scanners or readers may be mounted to and operated from at least one extension of the human body, such as a portion of a hand or wrist of a user. The wearable scanners or readers may include one or more manual or automatic actuators for initiating a scanning or reading of a marking on an object. Such actuators may be worn about the portion of the hand or wrist of the user, including within a palm of the hand, or in a ring-like device surrounding at least one finger of the hand. Additionally, the wearable scanners or readers may include optical elements configured to capture images in one or more directions or along one or more axes, and may further include any type of display elements (e.g., touchscreens, LED or LCD displays, or electrophoretic displays) formed in substantially flat or curved shapes.