最新美国发明专利第2016-12-06期 - 专利汇|PatentHub专利检索|专利查询网|发明专利查询分析

Document	Document Title
US09515306B2	Electric storage apparatus An electric storage apparatus includes a plurality of electric storage devices, each electric storage device including a cell case in which an electrode assembly is accommodated, the cell case having a substantially hexahedral shape, the cell case being formed with an external terminal on one surface thereof, a first external housing for housing the electric storage devices, the first external housing comprising a pair of first main wall portions that are opposed to each other and a pair of first side wall portions that are opposed to each other, the pair of first main wall portions and the pair of first side wall portions defining a first opening at at least one end in a first direction thereof, and a second external housing for housing the first external housing.
US09515305B2	Connector and battery pack including the same A battery pack having a connector that is designed to work outdoors or in a moist environment. The battery pack includes a case including a first case attached to a second case to enclose an inner space within, a plurality of rechargeable batteries arranged within the inner space and a connector arranged within the inner space of the case, being exposed to an outside of the battery pack to enable a device external to the battery pack to be electrically connected via the connector to the rechargeable batteries, wherein the connector is arranged to form a waterproof barrier between an outside of the battery pack and a remainder of the inner space of the case not occupied by the connector.
US09515303B2	Battery pack A battery pack includes a plurality of unit cells; a protective circuit module on the plurality of unit cells and coupled to the unit cells, and an upper cover on the protective circuit module and including openings defined in its sides. Each of the unit cells includes a can, an electrode assembly accommodated in the can, a cap plate coupled to the can, and a holder between the unit cell and the protective circuit module and including protrusions coupled to the openings of the upper cover. The unit cells are oriented side by side along a first direction such that the cap plates are exposed along the same direction, and the protective circuit module includes grooves defined in its sides and corresponding to the protrusions of the holder.
US09515300B2	Electric storage device, covering sheet, and container covering method There is provided an electric storage device including a power generating element, a housing container for housing the power generating element and including an upper face, a bottom face, and four side faces and a covering member formed by winding an insulating sheet around the housing container. The housing container includes round portions or chamfered portions formed between the adjacent side faces and round or chamfered boundary portions formed between the bottom face and the side faces. The covering member covers parts of the boundary portions, the side faces, and the round portions or the chamfered portions.
US09515298B2	Nonaqueous electrolyte battery and battery pack According to one embodiment, a nonaqueous electrolyte battery includes a container, a positive electrode, and a negative electrode. The container satisfies Formula (1) of 0.15≦(Tmin/Tmax)≦1. The positive electrode includes a positive electrode active material represented by the composition formula Li1-aNixCoyMnzO2. The negative electrode includes a spinel type lithium titanium oxide. A nominal capacity of the nonaqueous electrolyte battery is in a range of from 5 Ah to 200 Ah. When a state of charge based on the nominal capacity is 50%, an open circuit voltage is in a range of from 2.12 V to 2.24 V.
US09515297B2	Rechargeable battery A rechargeable battery unit includes an electrode assembly having a first electrode, a second electrode, and a separator between the first electrode and the second electrode. The rechargeable battery unit also includes a case accommodating the electrode assembly. The case includes an opening in a first end of the case and at least one groove in the first end of the case. The rechargeable battery unit also includes a cap plate coupled to the first end of the case. The cap plate includes at least one protrusion received in the at least one groove in the case.
US09515292B2	Manufacturing method of organic EL element A method of manufacturing an organic EL element having a pair of electrodes and an organic functional layer disposed therebetween, the pair of electrodes consisting of an upper electrode and a lower electrode, comprising: forming the upper electrode on the organic functional layer by a magnetron sputtering method with a film-forming power density no less than 4.5 W/cm2 and no greater than 9.0 W/cm2.
US09515284B2	Organic electroluminescence element and production method therefor The organic electroluminescence element of the present invention includes: a first substrate; a second substrate facing the first substrate; an element member between the first and second substrates; first and second extension electrodes on first and second inner surfaces of the first and second substrates facing the element member; and an insulating member having an electrically insulating property. The element member includes: a functional layer including a light-emitting layer and having first and second surfaces in a thickness direction; and first and second electrode layers on the respective first and second surfaces of the functional layer. The element member is between the first and second extension electrodes such that parts of the first and second electrode layers are in contact with the first and second extension electrodes respectively. The insulating member is between the first and second inner surfaces of the respective first and second substrates.
US09515283B2	OLED devices with internal outcoupling Optoelectronic devices with enhanced internal outcoupling include a substrate, an anode, a cathode, an electroluminescent layer, and an electron transporting layer comprising inorganic nanoparticles dispersed in an organic matrix.
US09515282B2	Method for manufacturing a light-emitting electrochemical cell A method for manufacturing a light-emitting electrochemical cell (LEC) is disclosed. The LEC comprises a first electrode, a second electrode, and a first light-emitting active material in electrical contact with and separating the first and second electrodes. The first active material comprises mobile ions in an amount sufficient for doping the active material. The method comprises a step of depositing the first active material by spray-coating at an ambient gas pressure of at least about 1 kPa.
US09515279B2	Light-emitting element, display module, lighting module, light-emitting device, display device, electronic appliance, and lighting device A multicolor light-emitting element that utilizes fluorescence and phosphorescence and is advantageous for practical application is provided. The light-emitting element has a stacked-layer structure of a first light-emitting layer containing a host material and a fluorescent substance and a second light-emitting layer containing two kinds of organic compounds and a substance that can convert triplet excitation energy into luminescence. Note that light emitted from the first light-emitting layer has an emission peak on the shorter wavelength side than light emitted from the second light-emitting layer.
US09515278B2	Light-emitting element, display module, lighting module, light-emitting device, display device, electronic device, and lighting device A tandem light-emitting element in which generation of crosstalk can be suppressed even when the element is applied to a high-definition display is provided. In the tandem light-emitting element, a layer in contact the anode side of an intermediate layer contains 2,9-bis(naphthalen-2-yl)-4,7-diphenyl-1,10-phenanthroline (abbreviation: NBPhen).
US09515276B2	Organic X-ray detector and X-ray systems An organic x-ray detector is presented. The organic x-ray detector includes a layered structure. The layered structure includes a thin-film transistor (TFT) array disposed on a substrate, an organic photodiode disposed on the TFT array, and a scintillator layer disposed on the organic photodiode. The organic x-ray detector further includes an encapsulation cover at least partially encapsulating the layered structure; and an oxygen getter layer disposed between the organic photodiode and the encapsulation cover, wherein the oxygen getter layer includes an ether-containing material. X-ray system including the organic x-ray detector is also presented.
US09515275B2	Inverted organic photosensitive devices The present disclosure relates to organic photosensitive optoelectronic devices grown in an inverted manner. An inverted organic photosensitive optoelectronic device of the present disclosure comprises a reflective electrode, an organic donor-acceptor heterojunction over the reflective electrode, and a transparent electrode on top of the donor-acceptor heterojunction.
US09515273B2	Thin film transistor with a current-induced channel A thin film transistor (TFT) includes a hole transport layer having a first side and a second side and an electron transport layer having a first side and a second side. The first side of the electron transport layer is directly interfaced to the second side of the hole transport layer. The electron transport layer includes a material having greater ionization potential and greater electron affinity than the hole transport layer, thereby forming a hole barrier and an electron barrier at the junction between the electron transport layer and the hole transport layer. A channel in the TFT is created by current injected into the electron transport layer from a gate electrode rather than by an electrostatic field generated by voltage applied to the gate electrode. The accumulated charge density in the channel of the TFT can be significantly larger than what can be generated through field effect principle, therefore a much lower gate voltage is needed than in a conventional TFT.
US09515269B2	Compound for organic electric element, organic electric element comprising the same and electronic device thereof The present invention provides a novel compound capable of improving light emitting efficiency, stability, and lifespan of the element, an organic element using the same, and an electric device for the same.
US09515265B2	Organic light-emitting device Provided is an organic light-emitting device, including a first electrode; a second electrode facing the first electrode; an emission layer disposed between the first electrode and the second electrode; a first hole transport layer that is disposed between the emission layer and the first electrode and includes a first compound and a first charge-generation material; a second hole transport layer that is disposed between the emission layer and the first hole transport layer and includes a second compound; a third hole transport layer that is disposed between the emission layer and the second hole transport layer and includes a third compound and a second charge-generation material; and a fourth hole transport layer that is disposed between the emission layer and the third hole transport layer and includes a fourth compound. The first, second, third, and fourth compounds are each represented by Formula 1 or 2:
US09515264B2	Method for manufacturing display device and method for manufacturing electronic device A method for manufacturing a display device is provided. The method includes: forming, between a first substrate and a second substrate, a light-emitting element including an electroluminescence layer and a wiring over which a peeling layer formed by using the material of the electroluminescence layer is provided; and peeling whole of the second substrate from the first substrate so that the peeling layer over the wiring is simultaneously exposed.
US09515263B2	Device and method for depositing organic material A device for depositing an organic material includes a substrate; a mask having an opening portion and a shield portion; a fixing member for fixing the substrate and the mask to each other; a deposition source comprising a plurality of nozzles arranged in a first direction and configured to spray the organic material; and a plurality of shield plates near the plurality of nozzles on the deposition source. An angle θ between the substrate and a line extended from a distal end of one of the nozzles to a center of a distal end of a corresponding one of the shield plates is greater than or equal to a taper angle Φ of the shield portion of the mask.
US09515260B2	Method for fabricating electronic device with variable resistance material layer A method for fabricating an electronic device including a semiconductor memory may include: forming a first interlayer dielectric layer over a substrate to have an opening exposing the substrate; forming a bottom electrode in a portion of the opening to have an exposed top surface; forming a variable resistance material layer along sidewalls of the remaining portion of the opening and the exposed top surface of the bottom electrode; forming a top electrode over the variable resistance material layer so as to fill the opening; etching the first interlayer dielectric layer to a predetermined depth to expose a part of the variable resistance material layer surrounding sidewalls of the top electrode; and removing the part of the variable resistance material layer to form a unit cell.
US09515253B2	Magnetic read head with MR enhancements A TMR stack or a GMR stack, ultimately formed into a sensor or MRAM element, include insertion layers of Fe or iron rich layers of FeX in its ferromagnetic free layer and/or the AP1 layer of its SyAP pinned layer. X is a non-magnetic, metallic element (or elements) chosen from Ta, Hf, V, Co, Mo, Zr, Nb or Ti whose total atom percent is less than 50%. The insertion layers are between 1 and 10 angstroms in thickness, with between 2 and 5 angstroms being preferred and, in the TMR stack, they are inserted adjacent to the interfaces between a tunneling barrier layer and the ferromagnetic free layer or the tunneling barrier layer and the AP1 layer of the SyAP pinned layer in the TMR stack. The insertion layers constrain interdiffusion of B and Ni from CoFeB and NiFe layers and block NiFe crystalline growth.
US09515251B2	Structure for thermally assisted MRAM A mechanism is provided for fabricating a thermally assisted magnetoresistive random access memory device. A bottom thermal barrier is formed on a bottom contact. A magnetic tunnel junction is formed on the bottom thermal barrier. The magnetic tunnel junction includes a top ferromagnetic layer formed on a tunnel barrier. The tunnel barrier is formed on a bottom ferromagnetic layer. A top thermal barrier is formed on the top ferromagnetic layer. A top contact is formed on the top thermal barrier. The top contact is reduced to a first diameter. The tunnel barrier and the bottom ferromagnetic layer each have a second diameter. The first diameter of the top contact is smaller than the second diameter.
US09515247B1	Sacrificial shorting straps for superconducting qubits A technique relates to protecting a tunnel junction. A first electrode paddle and a second electrode paddle are on a substrate. The first and second electrode paddles oppose one another. A sacrificial shorting strap is formed on the substrate. The sacrificial shorting strap connects the first electrode paddle and the second electrode paddle; The tunnel junction is formed connecting the first electrode paddle and the second electrode paddle, after forming the sacrificial shorting strap. The substrate is mounted on a portion of a quantum cavity. The portion of the quantum cavity is placed in a vacuum chamber. The sacrificial shorting strap is etched away in the vacuum chamber while the substrate is mounted to the portion of the quantum cavity, such that the sacrificial shorting strap no longer connects the first and second electrode paddles. The tunnel junction has been protected from electrostatic discharge by the sacrificial shorting strap.
US09515243B2	Temperature sensor Temperature sensor devices and corresponding methods are provided. A temperature sensor may include a first layer being essentially non-conductive in a temperature range and a second layer having a varying resistance in the temperature range.
US09515239B2	Light-emitting device and light-emitting apparatus A light-emitting device includes a photoluminescent layer that emits light containing first light, and a light-transmissive layer located on or near the photoluminescent layer. A submicron structure is defined on at least one of the photoluminescent layer and the light-transmissive layer. The submicron structure includes at least projections or recesses. The submicron structure has spatial frequency components distributed at least from more than 0 to 2/Dint(min) as determined by two-dimensional Fourier transform of a pattern of the projections or recesses and satisfies the following relationship: 0.8Dint(min)<λa/nwav-a where Dint(min) is the minimum center-to-center distance between adjacent projections or recesses, λa is the wavelength of the first light in air, and nwav-a is the refractive index of the photoluminescent layer for the first light.
US09515236B2	Optoelectronic component comprising a transparent coupling-out element What is specified is an optoelectronic component comprising a layer sequence having an active layer, which emits primary electromagnetic radiation, and at least one transparent coupling-out element arranged in the beam path of the primary electromagnetic radiation. The at least one transparent coupling-out element comprises a hybrid material or is produced from a hybrid material.
US09515235B2	Silicone-grafted core-shell particles, polymer matrix, and LED containing same A silicone-grafted core-shell particle is described wherein the silicone-grafted core-shell particle comprises a core of an inorganic particle and a shell of a grafted poly(dimethylsiloxane) polymer formed from a bi-terminated poly(dimethylsiloxane) having reactive groups at each terminal end. The silicone-grafted core-shell particles may be dispersed in a polysiloxane polymer matrix and employed as an LED encapsulant.
US09515234B2	LED package and manufacturing method thereof A light emitting diode package includes a substrate, several light emitting diodes mounted on the substrate, and a package member enveloping the light emitting diodes. The light emitting diodes are electrically coupled to the substrate. The package member includes at least two layers, the first layer and the second layer. The first layer is spread on the substrate and completely covers the light emitting diodes and the wires. The second layer is formed on the first layer. Fluidity of colloid forming the second layer is worse than that of the first layer. A method is also provided to manufacture the present light emitting diode package.
US09515232B2	Method of producing a multicolor LED display A method produces a multicolor LED display, the display including an LED luminous unit having a multiplicity of pixels. First subpixels, second subpixel and third subpixels contain an LED chip that emits radiation of a first color, wherein a first conversion layer that converts the radiation into a second color is arranged at least above the second subpixels and a second conversion layer that converts the radiation into a third color is arranged above the third subpixels. At least one process step is carried out in which the first or second conversion layer is applied or removed in at least one defined region above the pixels, wherein a portion of the LED chips is electrically operated, and wherein the region is defined by the radiation generated by the operated LED chips, generated heat or a generated electric field.
US09515224B2	Semiconductor light-emitting device A semiconductor light-emitting device includes a substrate, a first reflective layer disposed on the substrate and including first openings, a first conductivity-type semiconductor layer grown in and extending from the first openings and connected on the first reflective layer, a second reflective layer disposed on the first conductivity-type semiconductor layer and including second openings having lower surfaces disposed to be spaced apart from upper surfaces of the first openings, and a plurality of light-emitting nanostructures including nanocores extending from the second openings and formed of a first conductivity-type semiconductor material, and active layers and second conductivity-type semiconductor layers sequentially disposed on the nanocores.
US09515220B2	Light emitting diode with doped quantum wells and associated manufacturing method A light emitting diode based on GaN including an active zone located between an n-doped layer and a p-doped layer that together form a p-n junction, wherein the active zone includes at least one n-doped emissive layer.
US09515216B2	Light sensitive switch for semiconductor package tamper detection Embodiments relate to the detection of semiconductor tampering with a light-sensitive circuit. A tamper detection device for an integrated circuit includes a light-sensitive circuit disposed within a package of an integrated circuit. The light-sensitive circuit closes in response to an exposure to a light source, indicating a tamper condition.
US09515215B2	Efficiency restoration in a photovoltaic cell The electrical output efficiency of a photovoltaic thermal system can be restored from degradation due to light exposure by annealing a photovoltaic thermal cell at an elevated temperature. The elevated temperature at the photovoltaic thermal cell can be provided by redirecting the flow of a heat exchange fluid to bypass a heat exchanger unit. A boiler unit may be employed to provide additional heating of the heat exchange fluid during the anneal. Further, a variable configuration lid can be provided over a front surface of the photovoltaic thermal cell to control ventilation over the front surface. During the anneal, the position of the variable configuration lid can be set so as to trap heat above the front surface and to elevate the anneal temperature further.
US09515211B2	Schottky barrier detection devices having a 4H-SiC n-type epitaxial layer A detection device, along with methods of its manufacture and use, is provided. The detection device can include: a SiC substrate defining a substrate surface cut from planar to about 12°; a buffer epitaxial layer on the substrate surface; a n-type epitaxial layer on the buffer epitaxial layer; and a top contact on the n-type epitaxial layer. The buffer epitaxial layer can include a n-type 4H—SiC epitaxial layer doped at a concentration of about 1×1015 cm−3 to about 5×1018 cm−3 with nitrogen, boron, aluminum, or a mixture thereof. The n-type epitaxial layer can include a n-type 4H—SiC epitaxial layer doped at a concentration of about 1×1013 cm−3 to about 5×1015 cm−3 with nitrogen. The top contact can have a thickness of about 8 nm to about 15 nm.
US09515207B2	Organic compound, photovoltaic layer and organic photovoltaic device The present invention relates generally to the field of photovoltaic devices and particularly to the organic photovoltaic layer. More specifically, the organic photovoltaic layer comprises at least one organic compound of the general structural formula where Het1 and Het2 are predominantly planar polycyclic molecular systems; A is a bridging group providing a lateral bond of the molecular systems; and X is a counterion from a list comprising H+, Li+, Na+, K+, NH4+, Ba++, Zn++, Sr++, Ca++, Mg++, and any combination thereof. The photovoltaic layer is formed of column-like or planar supramolecules, it has absorption of electromagnetic radiation in at least one predetermined spectral subrange within a wavelength range from 400 to 3000 nm, and the molecular system Het1, the bridging group A, and the molecular system Het2 form a donor-bridge-acceptor system providing dissociation of excited electron-hole pairs.
US09515205B2	Method for metallizing textured surfaces A method for creating electrically conducting or semiconducting patterns on a textured surface including plural reliefs of amplitude greater than or equal to 100 nanometers, including: preparing a substrate during which at least the textured surface of the substrate is made electrically conducting; coating during which at least one layer of an imprintable material is laid on the textured surface, made electrically conducting, of the substrate; pressing a mold including valleys or protrusions to transfer the valleys or the protrusions of the mold into the imprintable material to form patterns therein; removing the mold while leaving the imprint of the patterns in the imprintable material; exposing the textured surface, made electrically conducting, of the substrate, at a bottom of the patterns; and electrically depositing an electrically conducting or semiconducting material into the patterns to form conducting or semiconducting patterns.
US09515203B2	Solar cell and method for manufacturing the same A method of manufacturing a solar cell includes: forming a dopant layer by doping a dopant to a semiconductor substrate; and forming an electrode electrically connected to the dopant layer. The forming of the electrode includes forming a metal layer on the dopant layer; and heat-treating the metal layer to form a first layer and a second layer. In the heat-treating of the metal layer, a portion of the metal layer adjacent to the semiconductor substrate forms the first layer including a compound formed by a reaction of the metal layer and the semiconductor substrate, and a remaining portion of the metal layer forms the second layer that covers the first layer.
US09515198B1	Magnetic-field and magnetic-field gradient sensors based on lateral SOI bipolar transistors A lateral bipolar junction transistor (BJT) magnetic field sensor that includes a layout of two or more adjacent lateral BJT devices. Each BJT includes a semiconductor base region of a first conductivity type doping, a semiconductor emitter region of a second conductivity type doping and laterally contacting the base region; and a first semiconductor collector region of a second conductivity type doping contacting said base region on an opposite side thereof. A second collector region of the second conductivity type doping is also formed contacting the base region on the opposite side thereof in spaced apart relation with the first collector region. The first adjacent lateral BJT device includes the emitter, base and first collector region and the second adjacent lateral BJT device includes the emitter, base and second collector region. The sensor induces a detectable difference in collector current amounts in the presence of an external magnetic field transverse to a plane defined by the layout.
US09515195B2	Organic molecular memory An organic molecular memory of an embodiment includes a first conductive layer, a second conductive layer, and an organic molecular layer interposed between the first conductive layer and the second conductive layer, the organic molecular layer including variable-resistance molecular chains or charge-storage molecular chains, the variable-resistance molecular chains or the charge-storage molecular chains having electron-withdrawing substituents.
US09515194B2	Nano-ribbon channel transistor with back-bias control Embodiments of the invention include a method for fabricating a nano-ribbon transistor device and the resulting structure. A nano-ribbon transistor device including a substrate, a nano-ribbon channel, a core region in the center of the nano-ribbon channel, a gate formed around the nano-ribbon channel, a spacer formed on each sidewall of the gate, and a source and drain region epitaxially formed adjacent to each spacer is provided. The core region in the center of the nano-ribbon channel is selectively etched. A dielectric material is deposited on the exposed portions of the nano-ribbon channel. A back-bias control region is formed on the dielectric material within the core of the nano-ribbon channel and on the substrate adjacent to the nano-ribbon transistor device. A metal contact is formed in the back-bias control region.
US09515191B2	Thin-film field effect transistor, driving method thereof, array substrate, display device, and electronic product The disclosure provides a thin film field effect transistor, a driving method thereof, an array substrate, a display device and an electronic product. The thin film field effect transistor comprises a gate metal layer and a semiconductor layer, and further comprises a guide layer, wherein when an electric field is formed between the gate metal layer and the semiconductor layer, an electric field is also formed between the guide layer and the gate metal layer, the semiconductor layer accumulates electrons or holes to reinforce the electric field between the gate metal layer and the semiconductor layer by utilizing the electric field between the guide layer and the gate metal layer. Through the guide layer, it is able to affect the current characteristics of the thin film field effect transistor by improving its structure, thereby to reduce a threshold voltage and a leakage current.
US09515188B2	Fin field effect transistors having conformal oxide layers and methods of forming same An embodiment fin field-effect-transistor (finFET) includes a semiconductor fin comprising a channel region and a gate oxide on a sidewall and a top surface of the channel region. The gate oxide includes a thinnest portion having a first thickness and a thickest portion having a second thickness different than the first thickness. A difference between the first thickness and the second thickness is less than a maximum thickness variation, and the maximum thickness variation is in accordance with an operating voltage of the finFET.
US09515187B2	Controlling the shape of source/drain regions in FinFETs An integrated circuit structure includes a fin field-effect transistor (FinFET) including a semiconductor fin over and adjacent to insulation regions; and a source/drain region over the insulation regions. The source/drain region includes a first and a second semiconductor region. The first semiconductor region includes silicon and an element selected from the group consisting of germanium and carbon, wherein the element has a first atomic percentage in the first semiconductor region. The first semiconductor region has an up-slant facet and a down-slant facet. The second semiconductor region includes silicon and the element. The element has a second atomic percentage lower than the first atomic percentage. The second semiconductor region has a first portion on the up-slant facet and has a first thickness. A second portion of the second semiconductor region, if any, on the down-slant facet has a second thickness smaller than the first thickness.
US09515183B2	Semiconductor device including buried-gate MOS transistor with appropriate stress applied thereto According to one embodiment, a semiconductor device includes a semiconductor substrate having a trench and including an active area including a channel area formed along an inner surface of the trench and source/drain areas formed at both ends of the channel area and sandwiching the trench, a gate insulating film formed on the inner surface of the trench, and a gate electrode formed in the trench in which the gate insulating film is provided. A main surface of the semiconductor substrate has {100} plane orientation, a portion of the channel area parallel to a side surface of the trench has {110} channel plane orientation and has <100> channel orientation in a channel length direction, and tensile stress in the channel length direction and compressive stress in a channel width direction are applied to the portion of the channel area parallel to the side surface of the trench.
US09515182B2	High-integration semiconductor device and method for fabricating the same A semiconductor device includes a substrate including a first active region, a second active region and a field region between the first and second active regions, and a gate structure formed on the substrate to cross the first active region, the second active region and the field region. The gate structure includes a p type metal gate electrode and an n-type metal gate electrode directly contacting each other, the p-type metal gate electrode extends from the first active region less than half way toward the second active region.
US09515176B2	Silicon carbide bipolar junction transistor including shielding regions A silicon carbide (SiC) bipolar junction transistor (BJT) and a method of manufacturing such a SiC BJT is provided. The SiC BJT can include a collector region having a first conductivity type, a base region having a second conductivity type opposite the first conductivity type, and an emitter region having the first conductivity type, the collector region, the base region and the emitter region being arranged as a stack. The emitter region defining an elevated structure defined at least in part by an outer sidewall on top of the stack. The base region having a portion capped by the emitter region and defining an intrinsic base region where the intrinsic base region includes a portion extending from the emitter region to the collector region. The SiC BJT can include a first shielding region and a second shield region each having the second conductivity type.
US09515175B2	Semiconductor device and method for manufacturing the same A highly reliable semiconductor device and a method for manufacturing the semiconductor device are provided. In a semiconductor device including a bottom-gate transistor in which an insulating layer functioning as a channel protective film is provided over an oxide semiconductor film, elements contained in an etching gas can be prevented from remaining as impurities on a surface of the oxide semiconductor film by performing impurity-removing process after formation of an insulating layer provided over and in contact with the oxide semiconductor film and/or formation of source and drain electrode layers. The impurity concentration in the surface of the oxide semiconductor film is lower than or equal to 5×1018 atoms/cm3, preferably lower than or equal to 1×1018 atoms/cm3.
US09515171B1	Radiation tolerant device structure Techniques for producing radiation tolerant device structures are provided. In one aspect, a method for forming a radiation-hardened device includes the steps of: forming fin masks on a SOI layer of an SOI wafer, wherein the SOI wafer includes the SOI layer separated from a substrate by a buried insulator; patterning fins in the SOI layer using the fin masks; and implanting at least one dopant into exposed portions of the buried insulator between the fins to increase a radiation hardness of the device structure by providing a path in the buried insulator for charge to dissipate, wherein the fin masks are left in place during the implanting step to prevent damage to the fins. Implementations with a bulk substrate, as well as the resulting devices, are also provided.
US09515168B2	Fin end spacer for preventing merger of raised active regions After formation of gate structures over semiconductor fins and prior to formation of raised active regions, a directional ion beam is employed to form a dielectric material portion on end walls of semiconductor fins that are perpendicular to the lengthwise direction of the semiconductor fins. The angle of the directional ion beam is selected to be with a vertical plane including the lengthwise direction of the semiconductor fins, thereby avoiding formation of the dielectric material portion on lengthwise sidewalls of the semiconductor fins. Selective epitaxy of semiconductor material is performed to grow raised active regions from sidewall surfaces of the semiconductor fins. Optionally, horizontal portions of the dielectric material portion may be removed prior to the selective epitaxy process. Further, the dielectric material portion may optionally be removed after the selective epitaxy process.
US09515160B2	Silicon carbide semiconductor device and method for producing the same In a method for producing an SiC semiconductor device, a p type layer is formed in a trench by epitaxially growing, and is then left only on a bottom portion and ends of the trench by hydrogen etching, thereby to form a p type SiC layer. Thus, the p type SiC layer can be formed without depending on diagonal ion implantation. Since it is not necessary to separately perform the diagonal ion implantation, it is less likely that a production process will be complicated due to transferring into an ion implantation apparatus, and thus manufacturing costs reduce. Since there is no damage due to a defect caused by the ion implantation, it is possible to reduce a drain leakage and to reliably restrict the p type SiC layer from remaining on the side surface of the trench.
US09515155B2	E-fuse design for high-K metal-gate technology E-fuses are used in integrated circuits in order to permit real-time dynamic reprogramming of the circuit after manufacturing. An e-fuse is hereby proposed wherein the metal element adapted to be blown upon passage of a current is not comprised of a silicide layer but is rather a metal layer above which a semiconductor layer is formed. A dielectric layer is then formed on the semiconductor layer, in order to prevent metal silicide from forming over the metal layer. The process of manufacturing the e-fuse can be easily integrated in an HKMG manufacturing flow. In particular, fully silicided metal gates may be manufactured in conjunction with the e-fuse, without jeopardizing the correct functioning of the e-fuse.
US09515154B2	Thin film transistor, display apparatus comprising the same, method of manufacturing thin film transistor, and method of manufacturing display apparatus A thin film transistor includes a polysilicon layer on a substrate, which includes a first area between second and third areas. A polysilicon layer is formed on the substrate, and a source electrode and a drain electrode are formed on the polysilicon layer in the first and third areas. Each of the source electrode and the drain electrode includes a metal silicide layer adjacent the polysilicon layer.
US09515152B2	Simple and cost-free MTP structure Embodiments of a simple and cost-free multi-time programmable (MTP) structure for non-volatile memory cells are presented. The memory cell includes a substrate. A floating gate is disposed over a transistor well. A control gate disposed over a control well is coupled to the floating gate. The control gate includes a control capacitor. A non-self-aligned source/drain (S/D) region is disposed within the transistor well and serves as an erase terminal.
US09515151B2	Gettering agents in memory charge storage structures Methods of forming memory cells including a charge storage structure having a gettering agent therein can be useful for non-volatile memory devices. Providing for gettering of oxygen from a charge-storage material of the charge storage structure can facilitate a mitigation of detrimental oxidation of the charge-storage material.
US09515146B2	Nitride semiconductor layer, nitride semiconductor device, and method for manufacturing nitride semiconductor layer According to one embodiment, a nitride semiconductor layer spreading along a first surface is provided. The nitride semiconductor layer includes a first region and a second region. A length of the first region in a first direction parallel to the first surface is longer than a length of the first region in a second direction parallel to the first surface and perpendicular to the first direction. The second region is arranged with the first region in the second direction. A length of the second region in the first direction is longer than a length of the second region in the second direction. A c-axis being is tilted with respect to the second direction for the first region and the second region. The c-axis intersects a third direction perpendicular to the first surface.
US09515144B2	Fin-type graphene device Example embodiments relate to a fin-type graphene device. The fin-type graphene device includes a substrate, a graphene channel layer substantially vertical to the substrate, a gate insulating layer that covers one side surface of the graphene channel layer, a gate electrode on the gate insulating layer, and a source electrode and a drain electrode that are formed separately from each other on other side surface of the graphene channel layer.
US09515142B2	Active regions with compatible dielectric layers A method to form a semiconductor structure with an active region and a compatible dielectric layer is described. In one embodiment, a semiconductor structure has a dielectric layer comprised of an oxide of a first semiconductor material, wherein a second (and compositionally different) semiconductor material is formed between the dielectric layer and the first semiconductor material. In another embodiment, a portion of the second semiconductor material is replaced with a third semiconductor material in order to impart uniaxial strain to the lattice structure of the second semiconductor material.
US09515141B1	FinFET device with channel strain A method for fabricating a semiconductor device, the method comprises forming a fin on a substrate, forming a dummy gate stack on the fin and the substrate, removing a portion of an exposed portion of the fin, forming a source/drain region on an exposed portion of the fin, forming a conductive contact on the source/drain region, removing the dummy gate stack to expose a channel region of the fin, implanting ions in the channel region of the fin, performing an annealing process, and forming a gate stack on the channel region of the fin.
US09515140B2	Patterned strained semiconductor substrate and device A method that includes forming a pattern of strained material and relaxed material on a substrate; forming a strained device in the strained material; and forming a non-strained device in the relaxed material is disclosed. In one embodiment, the strained material is silicon (Si) in either a tensile or compressive state, and the relaxed material is Si in a normal state. A buffer layer of silicon germanium (SiGe), silicon carbon (SiC), or similar material is formed on the substrate and has a lattice constant/structure mis-match with the substrate. A relaxed layer of SiGe, SiC, or similar material is formed on the buffer layer and places the strained material in the tensile or compressive state. In another embodiment, carbon-doped silicon or germanium-doped silicon is used to form the strained material. The structure includes a multi-layered substrate having strained and non-strained materials patterned thereon.
US09515139B2	Trap rich layer formation techniques for semiconductor devices A trap rich layer for an integrated circuit chip is formed by chemical etching and/or laser texturing of a surface of a semiconductor layer. In some embodiments, a trap rich layer is formed by a technique selected from the group of techniques consisting of laser texturing, chemical etch, irradiation, nanocavity formation, porous Si-etch, semi-insulating polysilicon, thermal stress relief and mechanical texturing. Additionally, combinations of two or more of these techniques may be used to form a trap rich layer.
US09515137B2	Super junction semiconductor device with a nominal breakdown voltage in a cell area A super junction semiconductor device includes a super junction structure that is formed in a semiconductor body having a first and a second, parallel surface. The super junction structure includes first areas of the first conductivity type and second areas of a second conductivity type which is the opposite of the first conductivity type. In a cell area surrounded by an edge area, the super junction structure has a first nominal breakdown voltage in a first portion and a second nominal breakdown voltage, which differs from the first nominal breakdown voltage, in a second portion to provide improved avalanche ruggedness.
US09515132B2	Organic electroluminescent display device and method of manufacturing the same A substrate on which a plurality of pixel electrodes are disposed is prepared. An organic electroluminescent film 22 is formed with the inclusion of a common layer that continuously covers the plural pixel electrodes. A common electrode is formed on the organic electroluminescent film. The common layer is irradiated with an energy ray above areas between the respective adjacent pixel electrodes with the avoidance of irradiation above the plural pixel electrodes. An electric conductivity of the common layer is reduced above the areas between the respective adjacent pixel electrodes, by irradiation of the energy ray. With this configuration, a current leakage can be prevented between the adjacent pixels.
US09515130B2	Covering method and organic EL element manufacturing method A covering method including: preparing a mixture containing insulative material and a solvent; applying the mixture over a defective portion; and covering the defective portion with the insulative material by causing the solvent to evaporate from the mixture. In the covering method, the solvent has a boiling point no lower than 178 degrees Celsius, and in the mixture, a weight ratio percentage of the insulative material to the solvent is no lower than 10%. Thus, the defective portion, which may result in a dark spot, can be efficiently covered with insulative material while ensuring that a non-light-emission area that is formed accordingly has the smallest-necessary size and that sufficient insulation is achieved.
US09515129B2	Organic light emitting display apparatus and manufacturing method thereof An organic light emitting display apparatus includes pixel areas, each pixel area having emission and non-emission areas; a first electrode corresponding to the emission area of each pixel area; a bus electrode corresponding to at least a portion of the non-emission areas; an adherent pattern on a portion of the bus electrode; a separation pattern covering a top portion of the bus electrode and having an inverted tapered shape cross section defining a crevice under the separation pattern and above the bus electrode; an organic layer on the first electrode and the separation pattern, and further formed on a remaining portion of the bus electrode except a portion corresponding to the crevice under the separation pattern, the organic layer having an emission layer; and a second electrode on the organic layer and disposed in the crevice, the second electrode electrically contacting the bus electrode via the crevice.
US09515127B2	Organic electroluminescent display apparatus An organic electroluminescent display apparatus includes: a base substrate; a first electrode; a hole transport region; a light-emitting unit; a common layer; a first resonance auxiliary layer; a second resonance auxiliary layer; an electron transport region; and a second electrode. The light-emitting unit includes a first light-emitting layer disposed on the first pixel region and a second light-emitting layer disposed on the second pixel region. The first resonance auxiliary layer and the second resonance auxiliary layer may be separated from the common layer.
US09515121B2	Light emitting diode and method of fabricating the same An exemplary light emitting diode includes a substrate; a first light emitting cell and a second light emitting cell disposed over the substrate and separated from each other; and an interconnection electrically connecting the first light emitting cell to the second light emitting cell. Each of the first and second light emitting cells includes a first conductive-type semiconductor layer, a second conductive-type semiconductor layer disposed over the first conductive-type semiconductor layer, and an active layer disposed between the first conductive-type semiconductor layer and the second conductive-type semiconductor layer. At least one of the first light emitting cell and the second light emitting cell includes a side surface inclined with respect to the substrate. The side surface includes a first inclined portion forming an acute angle with respect to the substrate, a second inclined portion forming an obtuse angle with respect to the substrate, and an inclination discontinuity section.
US09515119B2	Variable optical filter and a wavelength-selective sensor based thereon A variable optical filter is disclosed including a bandpass filter and a blocking filter. The bandpass filter includes a stack of alternating first and second layers, and the blocking filter includes a stack of alternating third and fourth layers. The first, second and fourth materials each comprise different materials, so that a refractive index of the first material is smaller than a refractive index of the second material, which is smaller than a refractive index of the fourth material; while an absorption coefficient of the second material is smaller than an absorption coefficient of the fourth material. The materials can be selected to ensure high index contrast in the blocking filter and low optical losses in the bandpass filter. The first to fourth layers can be deposited directly on a photodetector array.
US09515118B2	Radiation detecting panel A radiation detecting panel is provided. This panel includes a substrate including a pixel region and a pad region, a scintillating layer configured to convert radiation into visible rays, a photoelectric device configured to convert the visible rays into currents in each pixel, a switching device configured to control output of the currents in each pixel; a plurality of bias lines configured to apply a bias voltage to the scintillating layer and the photoelectric device, a data line configured to be coupled to the switching device to transfer the currents, and a common bias line configured to transfer the bias voltage to the bias lines, wherein the common bias line and the bias lines are located on different layers. The data line and the bias lines are located on the same layer.
US09515117B2	Method of manufacturing an image sensor using multiple exposures The performance of a solid state image sensor which is formed by performing divided exposure that exposes the entire chip by a plurality of times of exposure and in which each of a plurality of pixels arranged in a pixel array portion has a plurality of photodiodes is improved.In the divided exposure performed when the solid state image sensor is manufactured, a dividing line that divides an exposure region is defined to be located between a first photodiode and a second photodiode aligned in a first direction in an active region in a pixel and is defined to be along a second direction perpendicular to the first direction.
US09515116B1	Vertical transfer gate structure for a back-side illumination (BSI) complementary metal-oxide-semiconductor (CMOS) image sensor using global shutter capture A back-side illumination (BSI) complementary metal-oxide-semiconductor (CMOS) image sensor using a vertical transfer gate structure for improved quantum efficiency (QE) and global shutter efficiency (GSE) is provided. A semiconductor column extends vertically from a photodetector, towards a back-end-of-line (BEOL) stack. A floating diffusion region (FDR) is vertically spaced from the photodetector by the semiconductor column. The FDR comprises a sidewall surface laterally offset from a neighboring sidewall surface of the semiconductor column to define a lateral recess between the FDR and the photodetector. A gate dielectric layer lines the sidewall surface of the semiconductor column and is arranged in the lateral recess. A gate is arranged laterally adjacent to the gate dielectric layer and filling the lateral recess. Further, a method for manufacturing the vertical transfer gate structure is provided.
US09515113B2	Optical sensing of nearby scenes with tessellated phase anti-symmetric gratings An array of diffraction-pattern generators employ phase anti-symmetric gratings to projects near-field spatial modulations onto a closely spaced array of photoelements. Each generator in the array of generators produces point-spread functions with spatial frequencies and orientations of interest. The generators are arranged in an irregular mosaic with little or no short-range repetition. Diverse generators are shaped and placed with some irregularity to reduce or eliminate spatially periodic replication of ambiguities to facilitate imaging of nearby scenes.
US09515105B2	Dual photodiode image pixels with preferential blooming path An image sensor with an array of image sensor pixels is provided. Each image sensor pixel may include a set of photodiodes formed in a semiconductor substrate, a color filter structure formed over the set of photodiodes, a microlens formed over the color filter structure, and associated pixel circuitry coupled to the set of photodiodes. The set of photodiodes may include at least two photodiodes linked together via a preferential blooming channel that provides a reduced potential barrier between the two photodiodes. This allows excess charge to spill over from one photodiode to another when more charge is concentrated in a particular photodiode. Configured in this way, the pixel can provide depth sensing capabilities without suffering from reduced pixel capacity.
US09515096B2	Thin film transistor array panel The present disclosure provides a thin film transistor array. In an exemplary embodiment, the thin film transistor array includes: a substrate; a gate line including a gate pad and disposed on the substrate; a gate insulating layer disposed on the gate line and the gate pad; a data line including a data pad and disposed on the gate insulating layer; a first passivation layer disposed on the data line; a first electrode disposed on the first passivation layer; a second passivation layer disposed on the first electrode; and a second electrode disposed on the second passivation layer. The gate pad is exposed through a first contact hole, and the gate insulating layer, the first passivation layer, and the second passivation layer include at least a portion of the first contact hole.
US09515089B1	Bulk fin formation with vertical fin sidewall profile Fabricating a semiconductor device includes providing a substrate, wherein the substrate is comprised of a base layer, a doped silicon layer on top of the base layer, and an undoped silicon layer on top of the doped silicon layer; forming a hard mask layer on top of the substrate; forming at least one mandrel on top of the hard mask layer; forming a spacer layer on top of exposed portions of the hard mask layer and the at least one mandrel; etching portions of the spacer layer; removing the at least one mandrel; etching regions of the hard mask layer and the undoped silicon layer not protected by remaining portions of the spacer layer to form at least one fin; and removing the remaining portions of the spacer layer.
US09515087B2	Three-dimensional semiconductor memory device A three-dimensional (3D) semiconductor memory device that includes a peripheral logic structure including peripheral logic circuits disposed on a semiconductor substrate and a first insulation layer overlapping the peripheral logic circuits, and a plurality of memory blocks spaced apart from each other on the peripheral logic structure. At least one of the memory blocks includes a well plate electrode, a semiconductor layer in contact with a first surface of the well plate electrode, a stack structure including a plurality of electrodes vertically stacked on the semiconductor layer, and a plurality of vertical structures penetrating the stack structure and connected to the semiconductor layer.
US09515085B2	Vertical memory device with bit line air gap A structure includes a three-dimensional semiconductor device including a plurality of unit device structures located over a substrate. Each of the unit device structures includes a semiconductor channel including at least a portion extending vertically along a direction perpendicular to a top surface of the substrate, and a drain region contacting a top end of the semiconductor channel. The structure also includes a combination of a plurality of contact pillars and a contiguous volume that laterally surrounds the plurality of contact pillars. The plurality of contact pillars is in contact with the drain regions, and the contiguous volume has a dielectric constant less than 3.9.
US09515081B2	Semiconductor device and method for manufacturing thereof A semiconductor device includes bit lines provided in a semiconductor substrate; an ONO film that is provided along the surface of the semiconductor substrate and is made of a tunnel oxide film, a trap layer, and a top oxide film; and an oxide film that is provided on the surface of the semiconductor substrate in the middle between the bit lines and contacts the side face of the ONO film, in which the film thickness of the oxide film is larger than the sum of the thicknesses of the tunnel oxide film and the top oxide film, and smaller than the thickness of the ONO film.
US09515079B2	Three dimensional memory device with blocking dielectric having enhanced protection against fluorine attack Blocking dielectric structures and/or thicker barrier metal films for preventing or reducing fluorine diffusion are provided. A blocking dielectric layer can be formed as an outer layer of a memory film in a memory stack structure extending through electrically insulating layers and sacrificial material layers. After formation of backside recesses by removal of the sacrificial material layers, dopants can be introduced into physically exposed portions of the blocking dielectric layer, for example, by plasma treatment or thermal treatment, to form silicon oxynitride regions which can reduce or prevent fluorine diffusion. Alternatively or additionally, a set of metal oxide blocking dielectric material portions can be formed in the backside recesses to retard or prevent fluorine diffusion. To minimize adverse impact on the electrically conductive layers formed in the backside recesses, the blocking dielectric material portions can be laterally recessed from a trench employed to form the backside recesses.
US09515078B2	Semiconductor structure and method for forming the same Various embodiments provide semiconductor structures and methods for forming the same. In an exemplary method, a semiconductor substrate is provided. A first stop layer, a first sacrificial layer, a second stop layer, and a second sacrificial layer are formed sequentially on the semiconductor substrate. The second sacrificial layer, the second stop layer, the first sacrificial layer, the first stop layer, and the semiconductor substrate are etched to form a groove, the groove then being filled to form an isolation structure. The second sacrificial layer is removed to expose sidewalls and a top of an exposed portion of the isolation structure. The second stop layer is removed, and the exposed portion of the isolation structure is etched to reduce a width of the top of the exposed portion of the isolation structure. The first sacrificial layer is removed. A floating gate is formed on the first stop layer.
US09515075B1	Method for fabricating ferroelectric random-access memory on pre-patterned bottom electrode and oxidation barrier Structure and method of fabrication of F-RAM cells are described. The F-RAM cell include ferroelectric capacitors forming over and with a pre-patterned barrier structure which has a planarized/chemically and/or mechanically polished top surface. The pre-patterned barrier structure includes multiple oxygen barriers having a structure of a bottom electrode layer over an oxygen barrier layer. The bottom electrode layer forms at least a part of the bottom electrode of the ferroelectric capacitor formed thereon.
US09515073B1	III-V semiconductor CMOS FinFET device A method for forming a semiconductor device comprises forming an insulator layer on a semiconductor substrate, removing portions of the insulator layer to form a first cavity and a second cavity, the first cavity exposing a first portion of the semiconductor substrate an the second cavity exposing a second portion of the semiconductor substrate, growing a first semiconductor material in the first cavity and the second cavity. Growing a second semiconductor material on the first semiconductor material in the first cavity and the second cavity, growing a third semiconductor material on the second semiconductor material in the first cavity and the second cavity. Forming a mask over the third semiconductor material in the first cavity, removing the third semiconductor material from the second cavity to expose the second semiconductor material in the second cavity, and growing a fourth semiconductor material on the second semiconductor material in the second cavity.
US09515072B2	FinFET structure and method for manufacturing thereof Present disclosure provides a FinFET structure, including a plurality of fins, a gate, and a first dopant layer. The gate is disposed substantially orthogonal over the plurality of fins, covering a portion of a top surface and a portion of sidewalls of the plurality of fins. The first dopant layer covers the top surface and the sidewalls of a junction portion of a first fin, configured to provide dopants of a first conductive type to the junction portion of the first fin. The junction portion is adjacent to the gate.
US09515068B1	Monolithic integration of GaN and InP components A compound semiconductor integrated circuit comprising a first substrate; a first electronic component formed on top of said first substrate; a layer of a first dielectric material formed on top of said first substrate and including said first electronic component, said layer of a first dielectric material comprising a recess exposing a first region of said first substrate; and a layer of a second dielectric material attached to said first substrate on top of said first region of said first substrate after manufacturing of said layer of a second dielectric material, said layer of a second material comprising a second electronic component.
US09515064B2	Static electricity protection circuit, electro-optic device and electronic device In a static electricity protection circuit according to the invention, a first wiring is electrically connected to a drain of a first p-type transistor and a gate and a source of a first n-type transistor; a second wiring is electrically connected to a gate and a source of the first p-type transistor, a drain of the first n-type transistor, a drain of a second p-type transistor and a gate and a source of a second n-type transistor; and a third wiring is electrically connected to a gate and a source of the second p-type transistor and a drain of the second n-type transistor.
US09515062B2	Electronic devices and methods having a compact multi-way transformer combiner Apparatus having structures implementing compact and symmetric multi-way transformer combiners are described herein. In an embodiment, each unit device cell of a plurality unit device cells may include two metal layers on top of the unit device cell coupled to a multi-way transformer combiner by one of the two metal layers such that the configuration of the unit device cells with the multi-way transformer combiner is symmetric. Additional apparatus, systems, and methods are disclosed.
US09515058B2	Light emitting device package and light unit including the same Disclosed are a light emitting device package. The light emitting device package includes a body having recess; a first lead frame including a first and second portions on a first region of the body; a second lead frame including a third and fourth portions on a second region of the body; a third lead frame between the first and second lead frame. The body has a length of the first direction greater than a width of the second direction, wherein the second portion of the first lead frame extends toward the second lead frame and has a small width, and wherein the fourth portion of the second lead frame extends toward the first lead frame. A first light emitting device is disposed on the first portion of the first lead frame and a second light emitting device is disposed on the third portion of the second lead frame.
US09515056B2	Solid state lighting device including narrow spectrum emitter A multi-emitter solid state lighting device includes at least one narrow spectral output solid state light emitter, such as may be in the green range, having a full width-half maximum emission value of no greater than 30 nm. First, second, and third electrically solid state emitters may include dominant wavelengths in the ranges of 485-505 nm (or 491-505 nm), 526-545 nm, and 615-625 nm. Aggregate emissions of a solid state lighting device may comprise a scotopic/photopic (S/P) ratio value that exceeds threshold values for conventional white light-emitting devices including at least one phosphor-converted LED by at least 10%, 20%, 30%, or 40%, in combination with reasonably high gamut and brightness, over a range of desired CCT values.
US09515055B2	Light emitting devices including multiple anodes and cathodes Solid state (e.g., LED) lighting devices include multiple emitters mounted on or over a substrate comprising insulating material with conductive traces thereon, with various emitters being independently controllable with multiple pairs of anodes and cathodes that may be arranged on an opposite surface of the substrate than the emitters. Electrically conductive vias may be defined through the insulating substrate, and a molded lens may be provided over the substrate and emitters mounted thereon. Various combinations of independently controllable emitters or emitter groups may be provided, for example, a red emitter in combination with multiple blue shifted yellow (BSY) emitters, or separately controllable red, green, blue, and white (e.g., BSY) emitters.
US09515051B2	Metal to metal bonding for stacked (3D) integrated circuits The present invention provides a stabilized fine textured metal microstructure that constitutes a durable activated surface usable for bonding a 3D stacked chip. A fine-grain layer that resists self anneal enables metal to metal bonding at moderate time and temperature and wider process flexibility.
US09515045B2	Method and apparatus for inspecting a semiconductor chip prior to bonding A chip handling apparatus, unit and method is presented. The chip handling apparatus comprises a chip supply station; a chip mounting station; and one or more chip handling units configured to pick a chip from the supply station, transport the chip to the mounting station, and place the chip at a mounting location; wherein each chip handling unit is configured to temporarily retain the chip in a defined position relative to the chip handling unit. The chip handling apparatus further comprises means for inducing sonic vibrations in the chip when retained by one of the chip handling units; and means for measuring the vibrations induced in the chip.
US09515042B2	Anisotropic conductive film, connection structure and method of producing the same An anisotropic conductive film is obtained by dispersing conductive particles in an insulating adhesive composition including a (meth)acrylate-based monomer composition, a radical polymerization initiator, and a film-forming resin. The (meth)acrylate-based monomer composition includes a (meth)acrylate-based monomer which has a cyclic ester residue or a cyclic amide residue represented by the formula (1): R1 is a hydrogen atom or a methyl group; R2 is an alkylene group or an alkyloxy group; R3 is an alkyl group, an alkylene group, an aryl group, or a halogen atom; n is an integer of 0 to 3; R4 is absent or an alkylene, dotted lines on both sides of R4 jointly represent a single bond; X1 is absent, or an oxygen atom or a carbon atom; and X2 is an oxygen atom, a nitrogen atom, or a sulfur atom.
US09515037B2	Semiconductor device having through silicon vias and manufacturing method thereof In The semiconductor device, a semiconductor substrate has first and second surfaces. A circuitry layer is formed over the first surface and a first insulating layer is further formed over the circuitry layer. A second insulating layer including a first insulating element is formed over the second surface. A third insulating layer including a second insulating element different from the first insulating element of the second insulating layer is formed over the second surface with an intervention of the second insulating layer therebetween. A penetration electrode penetrates through the semiconductor substrate, the circuitry layer, the first insulating layer, the second insulating layer and the third insulating layer.
US09515035B2	Three-dimensional integrated circuit integration Wiring structures, methods for providing a wiring structure, and methods for distributing currents with a wiring structure from one or more through-substrate vias to multiple bumps. A first current is directed from a first through-substrate via of a first electrical resistance through a first connection line to a first bump and directing a second current from the first through-substrate via through a second connection line of a second electrical resistance to a second bump. The first connection line has a first length relative to a first position of the first bump and a first cross-sectional area, the second connection line has a second length relative to a first position of the second bump and a second cross-sectional area, the second length is different from the first length, and the second cross-sectional area is different from the first cross-sectional area.
US09515034B2	Bond pad having a trench and method for forming A conductive structure is formed in a last metal layer of an integrated circuit. Passivation material is patterned over a portion of the conductive structure. A first trench is patterned around a selected portion of the passivation material. The selected portion represents a bond region of a wire bond to be formed above the passivation material. A portion of the passivation material completely covers a bottom of the trench. A layer of conductive material is conformally deposited over the passivation material. The conformal depositing resulting in a second trench forming in the conductive material over the first trench in the passivation material. The second trench is positioned to contain at least a portion of a splash of the conductive material when the wire bond is subsequently formed.
US09515033B2	Monolithic microwave integrated circuit A monolithic microwave integrated circuit included a substrate, a first pad, a first line, a second line, a second pad, a third pad, a first active element, a second active element. The first line includes an input end connected to the first pad. The second line includes an input end connected to the first pad. The second and third pads are connected to the ground. The first active element includes a first gate electrode connected to the output end of the first line. The second active element includes a second gate electrode connected to the output end of the second line. The first pad is provided between the second pad and a third pad. Electrical length of the first line is equal to electrical length of the second line.
US09515031B2	Mitigation of far-end crosstalk induced by routing and out-of-plane interconnects In accordance with one aspect of the present description, a transmission line such as a microstrip or stripline transmission line, has stub-shaped projections adapted to compensate simultaneously for both far-end crosstalk (FEXT) induced by inductive coupling between the transmission line and an adjacent transmission line, and also far-end crosstalk induced by inductive coupling between the vertical electrical interconnect at the far end of the transmission line and an adjacent vertical electrical interconnect electrically connected to the adjacent transmission line. In another aspect of the present description, a microstrip transmission line may have multiple stubby line sections having different resistances and impedances to more gradually transition from to the typically low impedance characteristics of vertical interconnects such as the PTH vias and socket connectors. Other aspects are described.
US09515030B2	X-ray obscuration film and related techniques An X-ray obscuration (XRO) film comprising one or more metallic wire mesh layers and an adjacent layer of indium foil having portions which extend into openings of the wire mesh and in contact with metallic portions thereof. The XRO film can be capable of absorbing at least a portion of X-ray energy thereby creating an interference pattern when the XRO film is coupled with an electronic circuit and placed between an X-ray source and an X-ray detector and subjected to radiographic inspection. The interference pattern can create sufficient visual static to effectively obscure circuit lines in the electronic circuit when subjected to radiographic inspection techniques. The XRO film can be substantially thinner than existing solutions for preventing X-ray inspection with an exemplary embodiment being no more than 5 mils thick. The metallic XRO film can also provide electromagnetic shielding and/or heat dissipation for electronic circuits.
US09515026B2	Methods of forming alignment marks and overlay marks on integrated circuit products employing FinFET devices and the resulting alignment/overlay mark A device disclosed herein includes a plurality of spaced-apart fin structures formed in a semiconductor substrate so as to define an alignment/overlay mark trench. An alignment/overlay mark includes at least one insulating material positioned within the alignment/overlay mark trench. The alignment/overlay mark is devoid of any of the fin structures.
US09515024B2	Structures with through vias passing through a substrate comprising a planar insulating layer between semiconductor A through via contains a conductor (244, 262) passing through a substrate (140). The substrate can be SOI or some other substrate containing two semiconductor layers (140.1, 140.2) on opposite sides of an insulating layer (140B). The through via includes two constituent vias (144.1, 144.2) formed from respective different sides of the substrate by processes stopping on the insulating layer (140B). Due to the insulating layer acting as a stop layer, high control over the constituent vias' depths is achieved. Each constituent via is shorter than the through via, so via formation is facilitated. The conductor is formed by separate depositions of conductive material into the constituent vias from each side of the substrate. From each side, the conductor is deposited to a shallower depth than the through-via depth, so the deposition is facilitated. Other embodiments are also provided.
US09515014B2	Power converter package with integrated output inductor In one implementation, a semiconductor package includes a first patterned conductive carrier including partially etched segments. The semiconductor package also includes a control FET having a control drain attached to a first partially etched segment of the first patterned conductive carrier. In addition, the semiconductor package includes a sync FET having a sync source and a sync gate attached to respective second and third partially etched segments of the first patterned conductive carrier. The semiconductor package further includes a second patterned conductive carrier having a switch node segment situated over a control source of the control FET and over a sync drain of the sync FET, as well as an inductor coupled between the switch node segment and an output segment of the second patterned conductive carrier.
US09515013B2	Semiconductor device A semiconductor device includes a package part having a semiconductor element sealed in resin, a plurality of first leads each having an outer portion extending from a first side of the package part, and a plurality of second leads each having an outer portion extending from a second side of the package part. A combined bottom surface area of the outer portions of the plurality of first leads is greater than a combined bottom surface area of the outer portions of the plurality of second leads. The semiconductor device also includes a heat dissipation plate provided on the bottom surface of the package part and connected to at least one of the plurality of second leads.
US09515012B2	Package of power dies and three-phase power converter The present invention concerns a package of power dies composed of a first part and a second part, the first part including a plaque having cavities on which dies are placed, the plaque is placed on a first, a second, and a third metallic plates placed on an electric insulation substrate placed on a fourth metallic plate, the second part including a fifth and a sixth metallic plates placed on another electric insulation substrate placed on a seventh metallic plate, the dies are divided into a first group of dies and a second group of dies and wherein the first and second plate are a positive and negative DC voltage connections, the third plate is a gate connection of the second group of dies, the fourth plate is an AC voltage connection and the fifth plate is a gate connection of the first group of dies.
US09515011B2	Over-mold plastic packaged wide band-gap power transistors and MMICS A transistor package includes a lead frame, a wide band-gap transistor attached to the lead frame, and an over-mold surrounding the lead frame and the wide band-gap transistor. The wide band-gap transistor has a peak output power greater than 150 W when operated at a frequency up to 3.8 GHz. Using an over-mold along with a wide band-gap transistor in the transistor package allows the transistor package to achieve an exceptionally high efficiency, gain, and bandwidth, while keeping the manufacturing cost of the transistor package low.
US09515009B2	Packaged semiconductor device having leadframe features preventing delamination A semiconductor device has a leadframe with a first (401a) and a parallel second surface, and an assembly pad (410) bordered by two opposing sides, which include a plurality of through-holes (420) from the first to the second pad surface. Another pad side includes one or more elongated windows (421) between the pad surfaces. The second pad surface includes a plurality of grooves. The leadframe further has a plurality of leads (430) with opposite elongated sides castellated by indents (431). Layers (440) of bondable metals are restricted to localized areas surrounding bond spots. A semiconductor chip (450) is attached to the pad and wire-bonded (460) to the bond spots. A package (470) encapsulates the chip, wires, pad, and lead portions, and secures the leadframe into the package by filling the through-holes, windows, grooves, and indents.
US09515008B2	Techniques for interconnecting stacked dies using connection sites An integrated circuit die includes conductive connection sites located at least on a surface of the integrated circuit die within a contiguous region thereof. The integrated circuit also includes a core circuit located outside the contiguous region. The core circuit is coupled to at least one of the connection sites.
US09515006B2	3D device packaging using through-substrate posts A method for 3D device packaging utilizes through-hole metal post techniques to mechanically and electrically bond two or more dice. The first die includes a set of through-holes extending from a first surface of the first die to a second surface of the first die. The second die includes a third surface and a set of metal posts. The first die and the second die are stacked such that the third surface of the second die faces the second surface of the first die, and each metal post extends through a corresponding through-hole to a point beyond the first surface of the first die, electrically coupling the first die and the second die.
US09515005B2	Package mounting structure A package mounting structure includes: a first substrate having wiring; a second substrate having wiring; at least one cooling unit having a first face and a second face different from the first face; at least one power supply unit that is mounted on the first substrate and is joined to the first face of the cooling unit; and at least one electronic component that is mounted on the second substrate and is joined to the second face of the cooling unit, wherein the power supply unit supplies power to the electronic component through the wiring of the first substrate, the cooling unit, and the wiring of the second substrate.
US09515004B2	Thermal interface materials A thermal interface material is configured for use with an electronic device for transferring heat between heat generating components and heat removing components of the electronic device. The thermal interface material generally includes a first material (e.g., a gap filler, etc.) incorporating a contact resistance reducing material. The contact resistance reducing material operates to fill interstitial voids of surfaces of components in which the first material is installed to thereby reduce surface contact resistance between the first material and the component surfaces. The contact resistance reducing material may be applied to one or more side surfaces of the first material. Or, alternatively, the contact resistance reducing material may be blended in the first material.
US09514998B1	Polysilicon resistor formation in silicon-on-insulator replacement metal gate finFET processes A method of forming a polysilicon resistor in replacement metal gate (RMG) processing of finFET devices includes forming a plurality of semiconductor fins over a buried oxide layer of a silicon-on-insulator substrate; forming a trench in the buried oxide layer; forming a polysilicon layer over the semiconductor fins and in the trench, the polysilicon layer having a depression corresponding to a location of the trench; forming an insulating layer over the polysilicon layer, and performing a planarizing operation to remove the insulating layer except for a portion of the insulating layer formed in the depression, thereby defining a protective island; patterning the polysilicon layer to define both a dummy gate structure over the fins and the polysilicon resistor; and etching the polysilicon layer to remove the dummy gate structure, wherein the protective island prevents the polysilicon resistor from being removed.
US09514997B2	Silicon-germanium FinFET device with controlled junction Embodiments of the invention include a method for forming a FinFET device and the resulting structure. A semiconductor device including a substrate, a silicon-germanium fin formed on the substrate, a dummy gate formed on the fin, and a first set of spacers formed on the exposed sidewalls of the dummy gate is provided. Xenon is implanted into the exposed portions of the fin. A second set of spacers are formed on the exposed sidewalls of the first set of spacer. A dopant is implanted into the exposed portions of the fin. The semiconductor device is thermally annealed, such that the dopants diffuse into the adjacent portions of the fin. The dummy gate is replaced with a gate structure.
US09514994B2	FinFET device and fabrication method thereof A method for forming a FinFET device is provided. The method includes providing a substrate having a first region and a second region; and forming a plurality of fins on the substrate. The method also includes forming a plurality of doping regions with different doping concentrations in the fins in the first region; and forming a plurality of dummy gate structures over the plurality of fins. Further, the method includes forming source and drain regions in the plurality of fins at both sides of the dummy gate structures; and removing the dummy gate structures to form a plurality of openings to expose the plurality of fins. Further, the method also includes forming a plurality of work function layers with different work functions on the exposed fins in the openings in the second region; and forming gate structures in the openings.
US09514993B2	Method for manufacturing semiconductor devices comprising epitaxial layers A method for manufacturing semiconductor devices includes following steps. A substrate including a first gate structure and a second gate structure formed thereon is provided. The first gate structure and the second gate structure are complementary to each other. Next, a first mask layer covering the second gate structure is formed and followed by forming first recesses in the substrate at two respective sides of the first transistor. Then, forming the first recesses, a first epitaxial layer is formed in each first recess. After forming the first epitaxial layers, a local protecting cap is formed on the first epitaxial layers and followed by removing the first mask layer.
US09514992B2	Unidirectional spacer in trench silicide A semiconductor device includes a trench region in an interconnect level dielectric layer. A silicide layer is on the bottom of the trench region. Opposing minor sides of the trench region include a spacer layer, but the central portion of the trench region is substantially free from the spacer layer. The spacer layer is formed using an angled gas cluster ion beam.
US09514991B2	Method of manufacturing a FinFET device having a stepped profile A FinFET device and a method for fabricating a FinFET device are disclosed. An exemplary method of fabricating a FINFET device includes providing a substrate including a fin structure including a plurality of fins and shallow trench isolation (STI) features between each fin of the fin structure. A first gate structure is formed over the fin structure. First gate spacers are formed on sidewalls of the first gate structure. The first gate spacers are removed while leaving portions of the first gate spacers within corners where the fin structure and the first gate structure meet. Second gate spacers are formed on sidewalls of the first gate structure. A dielectric layer is formed over the fin structure, the first gate structure, and the second gate spacers. The first gate structure and the portions of the first gate spacers are removed, thereby exposing sidewalls of the second gate spacers. A second gate structure is formed over the fin structure in a region where the first gate structure and the portions of the first gate spacers have been removed.
US09514985B2	Electroless metal through silicon via A method of making a substrate-through metal via having a high aspect ratio, in a semiconductor substrate, and a metal pattern on the substrate surface, includes providing a semiconductor substrate (wafer) and depositing poly-silicon on the substrate. The poly-silicon on the substrate surface is patterned by etching away unwanted portions. Then, Ni is selectively deposited on the poly-silicon by an electroless process. A via hole is made through the substrate, wherein the walls in the hole is subjected to the same processing as above. Cu is deposited on the Ni by a plating process. Line widths and spacings <10 μm are provided on both sides of the wafer.
US09514982B2	Semiconductor structure and manufacturing method of the same A semiconductor structure and a manufacturing method thereof are provided. The semiconductor structure includes a substrate having a trench, a stacked strip structure formed in the trench, and at least a conductive structure. The stacked strip structure includes a plurality of interlaced conductive strips and insulating strips. Each of the conductive strips has a horizontal conductive segment and two vertical conductive segments connected to the corresponding horizontal conductive segment. Each of the insulating strips has a horizontal insulating segment and two vertical insulating segments. The conductive structure is electrically connected to at least one of the conductive strips. The stacked strip structure has a horizontal stacked portion corresponding to the horizontal conductive segments and two vertical stacked portions corresponding to the vertical conductive segments, wherein a width of the vertical stacked portions is larger than a thickness of the horizontal stacked portion.
US09514971B2	Door for thin plate container A door which closes an opening in a container body of a thin plate container. A door body has latch passage holes in the circumference thereof, which correspond to latch recesses in an inner circumferential surface of the opening, and a component installation space. A rotary cam is received in the component installation space and is rotated by manipulation. Latch arms, each having one end connected to the rotary cam in the component installation space, reciprocate depending on a direction of rotation of the rotary cam so that free end areas thereof enter or exit the latch recesses through the latch passage holes. When the rotary cam rotates in a locking direction, the latch arms move along straight lines until at least portions of the free end areas are inserted into the latch recesses and then pivot so that the free end areas are pressed toward the container body.
US09514959B2	Fluorocarbon molecules for high aspect ratio oxide etch Etching gases are disclosed for plasma etching channel holes, gate trenches, staircase contacts, capacitor holes, contact holes, etc., in Si-containing layers on a substrate and plasma etching methods of using the same. The etching gases are trans-1,1,1,4,4,4-hexafluoro-2-butene; cis-1,1,1,4,4,4-hexafluoro-2-butene; hexafluoroisobutene; hexafluorocyclobutane (trans-1,1,2,2,3,4); pentafluorocyclobutane (1,1,2,2,3-); tetrafluorocyclobutane (1,1,2,2-); or hexafluorocyclobutane (cis-1,1,2,2,3,4). The etching gases may provide improved selectivity between the Si-containing layers and mask material, less damage to channel region, a straight vertical profile, and reduced bowing in pattern high aspect ratio structures.
US09514958B2	Etching method of semiconductor substrate, and method of producing semiconductor device An etching method containing the step of processing a substrate having a first layer containing titanium nitride (TiN) and a second layer containing a transition metal by bringing an etching liquid into contact with the substrate and thereby removing the first layer, wherein the first layer has a surface oxygen content from 0.1 to 10% by mole, and wherein the etching liquid comprises an ammonia compound and an oxidizing agent, and has a pH of from 7 to 14.
US09514956B2	Method of growing oxide thin films Process for producing silicon oxide containing thin films on a growth substrate by the ALCVD method. In the process, a vaporisable silicon compound is bonded to the growth substrate, and the bonded silicon compound is converted to silicon dioxide. The invention comprises using a silicon compound which contains at least one organic ligand and the bonded silicon compound is converted to silicon dioxide by contacting it with a vaporised, reactive oxygen source, in particular with ozone. The present invention provides a controlled process for growing controlling thin films containing SiO2, with sufficiently short reaction times.
US09514954B2	Peroxide-vapor treatment for enhancing photoresist-strip performance and modifying organic films Methods and apparatus for treating an organic film such as photoresist with a hydroxyl-generating compound prior to removing the organic film from a substrate are provided. Treatments include exposure to one or more of hydrogen peroxide vapor and water vapor in a non-plasma environment. In some implementations, conditions are such that condensation on the surface is suppressed. Methods include treating high-dose ion-implantation photoresists and post-plasma doping photoresists with little or no material loss and permit mild plasma removal of the photoresist after treatment.
US09514953B2	Methods for barrier layer removal Implementations described herein generally relate to semiconductor manufacturing and more particularly to methods for etching a low-k dielectric barrier layer disposed on a substrate using a non-carbon based approach. In one implementation, a method for etching a barrier low-k layer is provided. The method comprises (a) exposing a surface of the low-k barrier layer to a treatment gas mixture to modify at least a portion of the low-k barrier layer and (b) chemically etching the modified portion of the low-k barrier layer by exposing the modified portion to a chemical etching gas mixture, wherein the chemical etching gas mixture includes at least an ammonium gas and a nitrogen trifluoride gas or at least a hydrogen gas and a nitrogen trifluoride gas.
US09514951B2	Substrate processing method, substrate processing apparatus, substrate processing system and recording medium A substrate processing method can remove a part of a processing target film formed on a surface of a substrate W under a normal pressure atmosphere while suppressing an influence upon the substrate. A source material of the processing target film, which is decomposed by irradiating an ultraviolet ray thereto under an oxygen-containing atmosphere, is coated on the substrate W, and the processing target film is formed by heating the source material coated on the substrate W. Then, the substrate W having thereon the processing target film is placed within a processing chamber under the oxygen-containing atmosphere where a gas flow velocity is equal to or smaller than 10 cm/sec, and the part of the processing target film is removed by irradiating the ultraviolet ray to the substrate W.
US09514950B2	Methods for uniform imprint pattern transfer of sub-20 nm features Methods of increasing etch selectivity in imprint lithography are described which employ material deposition techniques that impart a unique morphology to the multi-layer material stacks, thereby enhancing etch process window and improving etch selectivity. For example, etch selectivity of 50:1 or more between patterned resist layer and deposited metals, metalloids, or non-organic oxides can be achieved, which greatly preserves the pattern feature height prior to the etch process that transfers the pattern into the substrate, allowing for sub-20 nm pattern transfer at high fidelity.
US09514947B2	Chromium/titanium/aluminum-based semiconductor device contact fabrication A contact to a semiconductor including sequential layers of Cr, Ti, and Al is provided, which can result in a contact with one or more advantages over Ti/Al-based and Cr/Al-based contacts. For example, the contact can: reduce a contact resistance; provide an improved surface morphology; provide a better contact linearity; and/or require a lower annealing temperature, as compared to the prior art Ti/Al-based contacts.
US09514940B2	Reducing or eliminating pre-amorphization in transistor manufacture A method for fabricating field effect transistors using carbon doped silicon layers to substantially reduce the diffusion of a doped screen layer formed below a substantially undoped channel layer includes forming an in-situ epitaxial carbon doped silicon substrate that is doped to form the screen layer in the carbon doped silicon substrate and forming the substantially undoped silicon layer above the carbon doped silicon substrate. The method may include implanting carbon below the screen layer and forming a thin layer of in-situ epitaxial carbon doped silicon above the screen layer. The screen layer may be formed either in a silicon substrate layer or the carbon doped silicon substrate.
US09514938B2	Method of forming pattern According to one embodiment, a method of forming a pattern includes applying a polymer material having a first segment and a second segment in openings formed in a guide, heating the polymer material to achieve microphase separation of the polymer material to form a self-assembled pattern which includes a first polymer portion having a cylindrical shape which includes the first segment, and a second polymer portion including the second segment and surrounding a lateral portion of the first polymer portion, and selectively removing the first polymer portion. A molecular weight ratio of the first segment to the second segment in the polymer material is approximately 4:6.
US09514935B2	Method of manufacturing semiconductor device, method of processing substrate, substrate processing apparatus, and program A method of manufacturing a semiconductor device is provided, which enables the film quality to be improved when the film is formed on a substrate at a low temperature, thus forming fine patterns. The method of manufacturing a semiconductor device includes: forming the film on a substrate by alternately supplying at least a source gas and a reactive gas to the substrate while maintaining the substrate at a first temperature by heating; and modifying the film by supplying a modification gas excited by plasma to the substrate with the film formed thereon while naturally cooling the substrate with the film formed thereon to a second temperature without heating the substrate, the second temperature being lower than the first temperature.
US09514933B2	Film deposition using spatial atomic layer deposition or pulsed chemical vapor deposition Provided are atomic layer deposition methods to deposit a film using a circular batch processing chamber with a plurality of sections separated by gas curtains so that each section independently has a process condition.
US09514931B2	Low thermal conductivity matrices with embedded nanostructures and methods thereof A matrix with at least one embedded array of nanowires and method thereof. The matrix includes nanowires and one or more fill materials located between the nanowires. Each of the nanowires including a first end and a second end. The nanowires are substantially parallel to each other and are fixed in position relative to each other by the one or more fill materials. Each of the one or more fill materials is associated with a thermal conductivity less than 50 Watts per meter per degree Kelvin. And, the matrix is associated with at least a sublimation temperature and a melting temperature, the sublimation temperature and the melting temperature each being above 350° C.
US09514929B2	Dielectric filling materials with ionic compounds A method includes applying a filling material to a surface of a first layer overlying a substrate. The first layer includes a dielectric material with a plurality of pores. The filling material includes a polymer and an ionic compound. The method includes heating the structure to enable the filling material to at least partially fill the plurality of pores throughout the first layer, and removing the residual filling material from the surface of the first layer, while leaving substantially all of the polymer in the pores of the first layer.
US09514927B2	Plasma pre-clean module and process A method for integrated circuit fabrication can include removing silicon oxide by a pre-clean process. The pre-clean process can include depositing a halogen-containing material on the surface of a substrate in a first reaction chamber, and transferring the substrate having the halogen-containing material to a second reaction chamber. Silicon oxide material can be removed from a surface of the substrate by sublimating the halogen-containing material in the second reaction chamber. A target material, such as a conductive material, may subsequently be deposited on the substrate surface in the second reaction chamber.
US09514922B2	Mass analysis data processing apparatus In the case where a peak on a mass spectrum is saturated due to, for example, signal saturation in a detector or an amplifier provided downstream thereof, a data processor performs fitting with a Gaussian function using data included in the rising part and the falling part (range A) of the peak which are not affected by the saturation, to thereby obtain a desired approximate peak shape B. Then, a mass spectrum in which the saturated peak is replaced with the approximate peak thus obtained is created, the mass-to-charge ratio of the peak top is calculated for this mass spectrum, and this mass spectrum is then displayed on a display screen. Moreover, an extracted ion chromatogram is created on the basis of information on mass-to-charge ratio to intensity of this modified mass spectrum and displayed.
US09514919B2	Baffle and substrate treating apparatuses including the same Provided is a substrate treating apparatus, which includes a plasma generating part configured to generate plasma, a housing disposed under the plasma generating part, and having a space therein, a susceptor disposed within the housing and supporting a substrate, and a baffle including injection holes injecting the plasma supplied from the plasma generating part, to the substrate. The baffle includes a base in which the injection holes are formed, and a central portion of the base is thicker than an edge thereof.
US09514917B1	Controlled-energy electrical arc systems, methods, and apparatuses Systems, methods, and apparatuses for triggering electrical arcs are disclosed. Such arcs are useful for testing combustible fluids and equipment operating near ignition hazards. Arcs may be produced with a defined energy at a defined time with little variation in arc energy. Consistent production of arcs is facilitated by one or more of conditioned electrodes, control and/or reduction of parasitic capacitance, avoidance of corona sources, and non-interfering arc triggers. Electrodes may be conditioned by repeated application of conditioning arcs. Conditioned electrodes have relatively physically consistent and chemically consistent tips. Arc triggers may be charged particle sources such as light sources operating in cooperation with a target to produce free electrons proximate the electrodes.
US09514915B2	Method for evaluating charged particle beam drawing apparatus In one embodiment, a charged particle beam drawing apparatus performs drawing by deflecting a charged particle beam with a deflector. A method for evaluating the apparatus includes making a shot of a first pattern, controlling a deflection amount by the deflector to move an applied position of the beam from the first pattern along a first direction to make a shot of a second pattern, controlling the deflection amount to move the applied position from the second pattern along the first direction to make a shot of a third pattern, controlling the deflection amount to move the applied position from the third pattern along a second direction opposite to the first direction to make a shot of a fourth pattern between the second pattern and the third pattern, calculating an interval between the second pattern and the fourth pattern, and comparing the calculated interval to a reference interval.
US09514912B2	Control of ion angular distribution of ion beams with hidden deflection electrode A processing apparatus may include: an extraction plate disposed along a side of a plasma chamber, the extraction plate having a first and second aperture, and middle portion between the first and second aperture, the first and second aperture being configured to define a first and second ion beam when the plasma is present in the plasma chamber and an extraction voltage is applied between the extraction plate and a substrate; a hidden deflection electrode disposed adjacent the middle portion outside of the plasma chamber, and electrically isolated from the extraction plate; and a hidden deflection electrode power supply to apply a bias voltage to the hidden deflection electrode, wherein the bias voltage is configured to modify a mean angle of incidence of ions and/or a range of angles of incidence centered around the mean angle of incidence in the first and second ion beam.
US09514907B2	Member-to-member fuse connection A member-to-member connection bracket comprising a first connection member for coupling the connection bracket to a first structural member, a second connection member for coupling the connection bracket to a second structural member; and a fuse member disposed between the first connection member and the second connection member, the fuse member comprising at least one of hinge locations. The at least one hinge location provides inelastic deformation at a pre-determined load and the pre-determined load is less than the elastic yield load of a first structural member and a second structural member. The hinge locations may have a reduced thickness. The fuse member may have a tubular cross-section. A connection utilizing the member-to-member connection bracket is also included.
US09514906B2	Temperature switch and fluid heating device A temperature switch performs switching according to temperature of a heater. The temperature switch includes a bimetal that is deformed when the temperature of the heater reaches set temperature, a switch mechanism that is opened and closed by deformation of the bimetal, and a housing member that houses the bimetal and the switch mechanism, and that is able to conduct heat to the bimetal. The heater includes a pair of heat generation units that is adjacent to each other. The housing member includes a contact portion that is formed to project and that is inserted between the pair of heat generation units.
US09514905B2	Fuses, and methods of forming and using fuses Some embodiments include a fuse having a tungsten-containing structure directly contacting an electrically conductive structure. The electrically conductive structure may be a titanium-containing structure. An interface between the tungsten-containing structure and the electrically conductive structure is configured to rupture when current through the interface exceeds a predetermined level. Some embodiments include a method of forming and using a fuse. The fuse is formed to have a tungsten-containing structure directly contacting an electrically conductive structure. An interface between the tungsten-containing structure and the electrically conductive structure is configured to rupture when current through the interface exceeds a predetermined level. Current exceeding the predetermined level is passed through the interface to rupture the interface.
US09514884B2	Multilayer ceramic electronic component and board having the same mounted thereon A multilayer ceramic electronic component is provided including a ceramic body having dielectric layers and a plurality of internal electrodes disposed in the ceramic body. The internal electrodes have exposed portions exposed to the exterior of the ceramic body. An electrode layer is disposed on an outer surface of the ceramic body electrically connected to the exposed portions of the internal electrodes A conductive resin layer is disposed on the electrode layer. The electrode layer has an uneven surface.
US09514882B2	Multilayer ceramic electronic component There is provided a multilayer ceramic electronic component, including: a ceramic body having internal electrodes formed therein; external electrodes formed on external surfaces of the ceramic body and connected to the internal electrodes; and buffer layers formed on contact surfaces between the internal electrodes and the external electrodes, among external surfaces of the ceramic body, in an interior direction of the ceramic body, wherein when a thickness of the internal electrode is denoted by Te, a number of laminated internal electrodes is denoted by N, a thickness of the buffer layer is denoted by t, and a width of a margin of the ceramic body in a length direction of the ceramic body is denoted by L, Te≦0.6 μm, N>200, and 3 μm≦t
US09514871B2	Sintered ferrite magnet and motor provided therewith Provided is a sintered ferrite magnet 10 that comprises Sr ferrite having a hexagonal crystal structure, wherein the total amount of Na and K is 0.004 to 0.31% by mass in terms of Na2O and K2O, an amount of Si is 0.3 to 0.94% by mass in terms of SiO2, and the following Expression (1) is satisfied. 1.3≦(SrF+Ba+Ca+2Na+2K)/Si≦5.7 (1) [In Expression (1), SrF represents an amount of Sr, on a molar basis, other than Sr which constitutes the Sr ferrite, and Ba, Ca, Na, and K represent amounts of respective elements on a molar basis.]
US09514869B2	R-T-B based sintered magnet The present invention provides an R-T-B based sintered magnet including R2T14B crystal grains wherein; a grain boundary is formed by two or more adjacent R2T14B crystal grains, an R—O—C concentrated part, in which concentrations of R, O and C are higher than those in the R2T14B crystal grains respectively, is in the grain boundary, and an area of the R—O—C concentrated part occupying in that of the grain boundary on a cut surface of the R-T-B based sintered magnet is within a range of 10% or more to 75% or less.
US09514868B2	Grain oriented electrical steel sheet and method for manufacturing the same A grain oriented electrical steel sheet is subjected to magnetic domain refinement by laser irradiation or electron irradiation and exhibits excellent low noise properties and low iron-loss properties when assembled into a real transformer device, by setting: the total tension (A) in rolling direction imparted to the steel sheet by the forsterite coating and the tension coating to be equal to or higher than 10.0 MPa; setting the total tension (B) in a direction orthogonal to the rolling direction imparted to the steel sheet by the forsterite coating and the tension coating to be equal to or higher than 5.0 MPa; and setting the total tension (A) and the total tension (B) to satisfy a formula shown below. 1.0≦A/B≦5.0
US09514864B2	Solid-state resistor for pulsed power machines A flexible solid-state resistor comprises a string of ceramic resistors that can be used to charge the capacitors of a linear transformer driver (LTD) used in a pulsed power machine. The solid-state resistor is able to absorb the energy of a switch prefire, thereby limiting LTD cavity damage, yet has a sufficiently low RC charge time to allow the capacitor to be recharged without disrupting the operation of the pulsed power machine.
US09514863B2	Inverter surge-resistant insulated wire and method of producing the same An inverter surge-resistant insulated wire has a baked enamel layer(s) around the outer periphery of a conductor having a rectangular cross-section, an extrusion-coated resin layer(s) around the outer side thereof, and an adhesive layer having a thickness of 2-20 μm between the baked enamel layer and the extrusion-coated resin layer. A cross-sectional shape of the baked enamel layer and the extrusion-coated resin layer in the cross-section of the wire is rectangular. In the cross-sectional shape formed by the baked enamel layer and the extrusion-coated resin layer surrounding the conductor in a cross-sectional view, at least a pair of two sides of two pairs of two sides opposing at the upper side and the downside or at the right side and the left side with respect to the conductor meet the conditions that a total thickness of the baked enamel layer and the extrusion-coated resin layer is 80 μm or more.
US09514862B2	Low loss and low packaged volume coaxial RF cable A low loss and low packaged volume coaxial RF cable according to embodiments is configured to conduct electrical signals, such as RF energy signals. The coaxial RF cable includes a three-layer structure that includes a non-conductive composite braid disposed between a first conductive composite braid and a second conductive composite braid. The coaxial cable is a ultra-flexible, compressible conductor configured to be folded multiple times within a low volume area without damage.
US09514861B2	Self-supporting cable and combination comprising a suspension arrangement and such self-supporting cable A self-supporting cable including an outer portion and an inner portion is provided, as well as a combination of a self-supporting cable and a suspension arrangement. The inner portion includes at least one insulated conductor and the outer portion includes a first inner surface and an external surface. The external surface is arranged to engage with a suspension arrangement. The inner portion includes a first outer surface, the first outer surface abutting against the first inner surface. The outer portion includes an outer layer and a metal tape adhered to the outer layer. The outer layer includes the external surface, and the metal tape includes the first inner surface. The first inner surface being of metal and adapted for, during local load, frictional engagement with the material of the first outer surface increases the effectiveness of a functional grip between first outer surface and first inner surface.
US09514859B1	Heat resistant communications cable and cord Heat resistant cables and cords that are used with portable communications equipment wherein the user thereof must be able to operate in extremely hostile environments including being present in a fire are requisite in order to provide continual communications. These fire and heat resistant cables and cords ensure that emergency responders, such as fire and rescue responders, using such a communications system is in constant contact with others on the team and also with the outside so as to be able to call in for help or additional resources and thus ensure the safety of that first responder.
US09514850B2	Memory device with improved refresh scheme for redundancy word line A memory device includes a plurality of redundancy word lines each of which is coupled with a plurality of redundancy memory cells, and a redundancy refresh circuit suitable for sequentially refreshing first redundancy word lines that are selected as target word lines for an additional refresh operation among the plurality of the redundancy word lines.
US09514847B2	Semiconductor device and operation method thereof A semiconductor device includes a latch circuit suitable for storing a test result; a non-volatile memory circuit suitable for storing information used for an operation of the semiconductor device; a decoding unit suitable for generating one or more internal program commands by using one or more control signals; and a control unit suitable for programming information in the non-volatile memory circuit in response to the test result stored in the latch circuit when the internal program commands are activated.
US09514844B2	Fast auto shift of failing memory diagnostics data using pattern detection Logic and methods for diagnostic testing of memory and, more particularly, auto shift of failing memory diagnostics data using pattern detection are disclosed. The method includes detecting fails in the memory during a built in self test (BIST) pattern. The method further includes passing the fail information to a tester through a diagnostic pin. The method further includes pausing shift operations when it is determined that the shifting of the fail information is complete for the detected fail.
US09514839B2	Nonvolatile memory, nonvolatile programmable logic switch including nonvolatile memory, and nonvolatile programmable logic circuit A nonvolatile memory according to an embodiment includes a memory cell, the memory cell including: a memory transistor including a source, a drain, a gate electrode disposed above a channel between the source and the drain, and a gate insulating film disposed between the channel and the gate electrode; and a fuse element disposed between the gate electrode and a wiring line to which the gate electrode of the memory transistor is connected.
US09514832B2	Access apparatus of memory card and control method thereof An access apparatus for memory card and a control method thereof are provided. The access apparatus is adapted for receiving a memory card with a side having a supply voltage pin and includes a slot module. The slot module includes a slot having a first side and a second side corresponding to each other. The first side and the second side are respectively configured with a first supply voltage pin and a second supply voltage pin, and the first supply voltage pin and the second supply voltage pin are spaced apart and opposite to each other. The access apparatus selectively determines whether to forbid performing a write operation to the memory card according to a conduction status of the first supply voltage pin and the second supply voltage pin with the supply voltage pin caused by a facing direction of the memory card inserted in the slot.
US09514820B2	EEPROM architecture wherein each bit is formed by two serially connected cells An integrated circuit memory includes memory cells arranged in an array with rows and columns, each column including a first bit line and a second bit line. Each memory cell is formed by: a first select transistor with a first source-drain path; a second select transistor with a second source-drain path; a first floating gate transistor with a third source-drain path; and a second floating gate transistor with a fourth source-drain path. The first, second, third and fourth source-drain paths are coupled in series between the first bit line and the second bit line. The word line for each row of the memory is coupled to the gate terminals of the first and second select transistors. The control gate line for each row in coupled to the gate terminals of the first and second floating gate transistors.
US09514807B2	Variable resistance memory device A variable resistance memory device includes upper interconnections on a substrate, first and second word lines provided between the substrate and the upper interconnections and vertically spaced apart from each other, a first bit line disposed between the first and second word lines and intersecting the first and second word lines, memory cells provided in an intersecting region of the first word line and the first bit line and an intersecting region of the second word line and the first bit line, a first word line contact directly connecting the first word line to a corresponding one of the upper interconnections, and a second word line contact directly connecting the second word line to a corresponding one of the upper interconnections.
US09514806B2	Auto low current programming method without verify A flash memory device employs a low current auto-verification programming scheme using multi-step programming voltage and cell current detection. The low current auto-verification programming scheme performs programming of memory cells by the application of programming voltages in step increments. For each programming pulse, the cell current of the memory cell is sensed to determine when the memory cell is programmed. The programming pulse is terminated when the cell current decreases below a reference current level.
US09514804B2	Multi-state configuration RAM cell A multi-state static RAM cell includes N NOR gates. Each NOR gate has N−1 inputs and one output. The output of each NOR gate is coupled to a different bit line. Each NOR gate has its inputs connected to the outputs of each of the other NOR gates.
US09514800B1	DRAM and self-refresh method A dynamic random access memory (DRAM) with code bit and self-refresh operation is disclosed. In one particular exemplary embodiment, at least one code bit is appended to N bits of user data to form a new code data. The user data are stored in a plurality of user data sub-arrays and code bit is stored in code bit sub-array respectively. Each sub-array stores at least one bit per user-specified row and column address. Each sub-array is independently controlled in either refresh operation or user operation.Refresh operation works on at least one sub-array at a time out of a plurality of sub-arrays. User operations work on other sub-arrays out of a plurality of sub-arrays. User read operation and internal refresh operation can work concurrently.
US09514798B2	Address storage circuit and memory and memory system including the same A memory including a plurality of word lines to which one or more memory cells are coupled, an address storage unit suitable for storing an input address corresponding to a first external signal that is inputted at a random time, and a control unit suitable for activating a word line corresponding to the input address of the plurality of word lines in response to an active command and refreshing one or more target word lines selected using an address stored in the address storage unit when performing a refresh operation.
US09514793B2	Semiconductor memory device and operating method thereof A semiconductor memory device includes a plurality of data buffering units corresponding to a data line, wherein the data buffering units include a first data buffering unit suitable for latching data stored in a memory cell in a data read operation, and second data buffering units, an output unit suitable for outputting the data latched in the first data buffering unit, and a control block suitable for controlling a current path to be formed between the second data buffering units and the output unit in the data read operation.
US09514791B2	Facilitating communication between memory devices of different technologies According to one embodiment, an apparatus comprises one or more memory devices and one or more processors coupled to a circuit board. The memory devices are configured according to a second memory technology. The processors are configured to receive messages conforming to a first memory technology, translate the messages from the first memory technology to the second memory technology, and send the translated messages to the memory devices.
US09514787B2	Magnetic disk apparatus, read/write control method, and controller According to at least one embodiment, a magnetic disk apparatus includes a magnetic disk, a nonvolatile memory, a determination module, a write module, and a read module. The determination module determines whether the off-track write occurs on a first data sector during a write mode. The write module writes first data in the nonvolatile memory if the determination module determines that the off-track write occurs on the first data sector. The read module reads the first data from one of the magnetic disk and the nonvolatile memory based on a determination result of the determination module.
US09514785B2	Providing content item manipulation actions on an upload web page of the content item A system and method to provide content item manipulation actions for a content item on an upload web page is presented. The method can include initializing an upload process for a content item to be uploaded to a server. The method can also include prior to completion of an upload data transfer of the upload process, providing, on a user interface (UI) comprising an upload progress indicator of the upload process, an option to add the content item to at least one playlist. Furthermore, the method can include subsequent to completion of the upload data transfer and completion of a processing operation of the content item, providing, on the UI comprising the upload progress indicator, an option to edit the content item and/or an option to share the content item.
US09514781B2	Data storage component test deck system A system may utilize at least an enclosed test deck that has an access port door covering an access port. The system can test a data storage component by presenting the enclosed test deck to an exchange assembly before exposing an interior test region of the test deck by engaging the access port door with a tool of the exchange assembly. At least one data storage component may be installed into the interior test region and subsequently the access port is closed by installing the access port door into the access port.
US09514775B2	Reducing effect of frequency acquisition error in a position error signal responsive to split servo burst patterns In a servo control loop, servo burst signals that are read from a plurality of servo burst patterns that include a split servo burst pattern contain frequency acquisition error. The frequency acquisition error is at least partially removed to generate a frequency acquisition error compensated position error signal (PES).
US09514773B2	Head stack assembly with a flexible printed circuit having a mouth centered between arms A head stack assembly (HSA) includes a flexible printed circuit (FPC) having a mouth with an upper mouth edge and a lower mouth edge. The FPC includes a first plurality of conductive terminals immediately adjacent the upper mouth edge and a second plurality of conductive terminals immediately adjacent the lower mouth edge. The mouth is bisected by a mouth centerline that is substantially parallel to and substantially equidistant from first and second actuator arms of the HSA. A head gimbal assembly (HGA) is attached to each of the first and second actuator arms. Each HGA includes a flexure tail laminate having a dielectric layer disposed between a plurality of conductive traces and a structural layer. The plurality of conductive traces is electrically connected to either the first or second plurality of conductive terminals via a plurality of openings in the structural layer and in the dielectric layer.
US09514772B2	Magnetic head device having suspension and spacer A magnetic head device which has strong joint strength in an arm and a suspension and high accuracy of a size and a shape is provided. The magnetic head device comprises an arm, a suspension overlapping with a leading end part of the arm, a slider located at a leading end part of the suspension, and a first joint part that is placed between the leading end part of the arm and the suspension and that joins the arm and the suspension, the first joint part including Sn or a resin adhesive.
US09514767B2	Device, method and computer program for freely selectable frequency shifts in the subband domain A device for producing a frequency-shifted audio signal based on an audio input signal is provided. The device has an interface and a frequency-shifting unit. The interface is configured for receiving the audio input signal. The frequency-shifting unit is configured for producing the frequency-shifted audio signal. The frequency-shifting unit is additionally configured to produce one of the second subband values based on one of the first subband values such that the second phase angle of this second subband value differs from the first phase angle of this first subband value by a phase angle difference, the phase angle difference being dependent on frequency information indicating by which frequency difference the audio input signal is to be shifted in order to obtain the frequency-shifted audio signal, and the phase angle difference being dependent on a frequency bandwidth of one of the first subbands.
US09514765B2	Method for reducing noise and computer program thereof and electronic device A method for reducing noise is used to divide a received voice into plural voice segments and set a predetermined energy value. The energy of voice segment which is higher than the predetermined energy value is determined as normal voice and outputs directly, and the energy of voice segment which is lower than the predetermined energy value is determined as noise and will be processed.
US09514763B2	Noise reduction via tuned acoustic echo cancellation An embodiment provides a method, including: accessing a tuned corrective mask stored in a memory device; forming, using a processor, a tuned acoustic echo cancellation mask utilizing the tuned-corrective mask; applying, using a processor, the tuned acoustic echo cancellation mask to a digital audio signal; and outputting an echo-cancelled audio signal. Other aspects are described and claimed.
US09514762B2	Audio signal coding method and apparatus The present invention relates to an audio signal coding method and apparatus. The method includes: categorizing audio signals into high-frequency audio signals and low-frequency audio signals; coding the low-frequency audio signals by using a corresponding low-frequency coding manner according to characteristics of low-frequency audio signals; and selecting a bandwidth extension mode to code the high-frequency audio signals according to the low-frequency coding manner and/or characteristics of the audio signals.
US09514760B2	Down-mixing compensation for audio watermarking Example methods, apparatus, systems and articles of manufacture to implement down-mixing compensation for audio watermarking are disclosed. Example watermark embedding methods disclosed herein include determining respective attenuation factors for a plurality of audio bands based on energy values associated with down-mixed audio samples corresponding to a first audio channel of a multi-channel audio signal and a second audio channel of the multi-channel audio signal. Disclosed example watermark embedding methods also include embedding a watermark in audio samples of the first audio channel based on the attenuation factors.
US09514757B2	Stereo signal encoding device, stereo signal decoding device, stereo signal encoding method, and stereo signal decoding method A stereo signal encoding device is provided that enables a lower bitrate without decreasing quality when applying an intermittent transmission technique to a stereo signal. A stereo encoding unit generates first stereo encoded data by encoding the stereo signal when the stereo signal of the current frame is an audio section. A stereo DTX encoding unit is a means for encoding the stereo signal when the stereo signal of the current frame is a non-audio section. The stereo DTX encoding unit generates second stereo encoded data by encoding each of a monaural signal spectral parameter that is a spectral parameter of a monaural signal generated using the first channel signal and the second channel signal, first channel signal information relating to the first channel signal, and second channel signal information relating to the second channel signal.
US09514753B2	Speaker identification using hash-based indexing Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for performing speaker identification. In some implementations, an utterance vector that is derived from an utterance is obtained. Hash values are determined for the utterance vector according to multiple different hash functions. A set of speaker vectors from a plurality of hash tables is determined using the hash values, where each speaker vector was derived from one or more utterances of a respective speaker. The speaker vectors in the set are compared with the utterance vector. A speaker vector is selected based on comparing the speaker vectors in the set with the utterance vector.
US09514751B2	Speech recognition device and the operation method thereof Described herein is a speech recognition device comprising: a communication module receiving speech data corresponding to speech input from a speech recognition terminal and multi-sensor data corresponding to input environment of the speech; a model selection module selecting a language and acoustic model corresponding to the multi-sensor data among a plurality of language and acoustic models classified according to the speech input environment on the basis of previous multi-sensor data; and a speech recognition module controlling the communication module to apply a feature vector extracted from the speech data to the language and acoustic model and transmit speech recognition result for the speech data to the speech recognition terminal.
US09514749B2	Method and electronic device for easy search during voice record An electronic device for allowing the user not to terminate audio recording while at the same time checking the content corresponding to a recorded portion in real time during the audio recording, and a method of reproducing the audio signal. An electronic device according to an embodiment disclosed in the present disclosure may include a memory configured to store an audio signal being input; a display unit configured to display at least one of an item indicating a progressive state in which the audio signal is stored therein and an STT-based text for the audio signal; a user interface unit configured to receive the selection of a predetermined portion of the item indicating the progressive state or the selection of a partial character string of the text from the user; and a controller configured to reproduce an audio signal corresponding to the selected portion or the selected character string.
US09514747B1	Reducing speech recognition latency In an automatic speech recognition (ASR) processing system, ASR processing may be configured to reduce a latency of returning speech results to a user. The latency may be determined by comparing a time stamp of an utterance in process to a current time. Latency may also be estimated based on an endpoint of the utterance or other considerations such as how difficult the utterance may be to process. To improve latency the ASR system may be configured to adjust various processing parameters, such as graph pruning factors, path weights, ASR models, etc. Latency checks and corrections may occur dynamically for a particular utterance while it is being processed, thus allowing the ASR system to adjust to rapidly changing latency conditions.
US09514745B2	Voice focus enabled by predetermined triggers Provided are techniques for voice focus enabled by predetermined triggers. Voice recognition is used to identify one or more pre-determined triggers from a voice of a speaker. In response to identifying the one or more pre-determined triggers, a voice recognition template is dynamically created for the voice of the speaker, and the voice recognition template and voice isolation are used to focus on the voice from the speaker.
US09514744B2	Conversion of non-back-off language models for efficient speech decoding Techniques for conversion of non-back-off language models for use in speech decoders. For example, an apparatus for conversion of non-back-off language models for use in speech decoders. For example, an apparatus is configured convert a non-back-off language model to a back-off language model. The converted back-off language model is pruned. The converted back-off language model is usable for decoding speech.
US09514742B2	System and method for managing conversation A conversation management system includes: a training unit that generates an articulation speech act and an entity name of a training corpus, that generates a lexical syntactic pattern, and that estimates a speech act and an entity name of a training corpus; a database that stores the articulation speech act, the entity name, and the lexical syntactic pattern of the training corpus; an execution unit that generates an articulation speech act and an entity name of a user, that generates a user lexical syntactic pattern, that estimates a speech act and an entity name of a user, that searches for an articulation pair corresponding to a user articulation at the database using a search condition including the estimated user speech act and the generated user lexical syntactic pattern, and that generates a final response by selecting an articulation template using a restriction condition including an estimated entity name among the found articulation pair; and an output unit that outputs a final response that is generated by the execution unit.
US09514740B2	Data shredding for speech recognition language model training under data retention restrictions Training speech recognizers, e.g., their language or acoustic models, using actual user data is useful, but retaining personally identifiable information may be restricted in certain environments due to regulations. Accordingly, a method or system is provided for enabling training of a language model which includes producing segments of text in a text corpus and counts corresponding to the segments of text, the text corpus being in a depersonalized state. The method further includes enabling a system to train a language model using the segments of text in the depersonalized state and the counts. Because the data is depersonalized, actual data may be used, enabling speech recognizers to keep up-to-date with user trends in speech and usage, among other benefits.
US09514735B2	Waterproof sound transmitting sheet, and method for producing same Disclosed herein is a waterproof sound-transmitting sheet, the thickness of which can easily be adjusted and which has a high sound transmitting efficiency and excellent waterproofness, and a method for producing same. The waterproof sound-transmitting sheet, which is attached to a sound hole of a case, includes: a support layer made of a film-shaped porous material and formed in the case; and a waterproofing layer formed on one side of the support layer in the shape of a porous nanoweb in which fine fiber strands are crosswisely layered and exposed to the outside of the case.
US09514727B2	Pickup with one or more integrated controls A musical instrument pickup, having a pickup body, a tone shaping circuit, and at least one integrated control in and/or on the pickup body. Embodiments of the present disclosure may utilize one or more techniques, alone or in combination, to adjust, e.g., the tone of a musical instrument by changing the frequency response of a pickup with the one or more integrated controls. One exemplary technique utilizes a plurality of knobs to selectively control the gain, resonant frequency, and/or circuit Q of the pickup.
US09514725B1	Musical instrument Disclosed in certain arrangements is a musical instrument that can include a plurality of tine tone generators. The musical instrument can include a keyboard including a plurality of keys. The plurality of tine tone generators can be configured to correspond with one of each of the plurality of tine tone generators. The musical instrument can also include a plurality of hammers, wherein each of the plurality of hammers is configured to strike one of the plurality of tine tone generators when one of the plurality of keys is depressed. The tine tone generator can be configured to form a single unitary piece and can include a tone bar and a tine. The tine can further include a tuning spring and can include a ferro magnetic tip.
US09514724B2	Sampling device, electronic instrument, method, and program The present invention receives sound wave data from a sound inputted into a microphone and samples the sound wave data received using a CPU to obtain sampled data as a digitized tone data, which is then stored in a sampling memory. The CPU performs auto-play of a sound using the digitized tone data sampled by the sampling and stored in the sampling memory. Thus, a result of the sampling is automatically provided to the user after the sampling takes place and the user can intuitively understand what can be done through sampling.
US09514723B2	Distributed, self-scaling, network-based architecture for sound reinforcement, mixing, and monitoring A distributed self-scaling network audio processing system includes end nodes interconnected by packet-switched network and operating as peers on the network. Each of the end nodes supports local input processing, mixing, and output processing. The input processing includes the option of dual input channels for supporting separate front-of-house and monitor workflows. End nodes are added to the system to support specific audio processing applications, based on the number of audio sources, the number of output mixes required, and the number of locations from which users choose to interact with the system.
US09514717B2	Method and apparatus for rendering items in a user interface An approach is provided for rendering items in a user interface. The approach may, for instance, include: a pre-fetching and a caching of item information associated with one or more items for one or more determined categories based on location information associated with the device; a processing of a detected attitude change associated with the device and of an attitude change threshold to determine an intended orientation mode for the device; a modification of one or more representations, of one or more items, that are within a region, of a user interface, associated with a user interface object; a grouping, a de-overlapping, or a combination thereof of the one or more representations based on an overlapping of one or more rendering locations, of the one or more representations, in a three-dimensional model space.
US09514715B2	Graphics voltage reduction for load line optimization Technologies are presented that optimize graphics power-performance efficiency. A method of graphics processing may include beginning a graphics workload with a first voltage and a first clamping threshold; monitoring amounts of time that bursts of dynamic capacitance remain above the first clamping threshold; and, if the dynamic capacitance remains above the first clamping threshold for more than a predetermined time threshold, setting the voltage to a second voltage and setting the clamping threshold to a second clamping threshold until the end of the frame. If, at the end of an initial frame, a number of clock cycles from a start of the frame to when the predetermined time threshold is exceeded is less than a predetermined minimum number of clock cycles, the second clamping threshold and the second voltage may be maintained for processing of a predetermined number of subsequent frames.
US09514711B2	Resolution enhancer for electronic visual displays A method of enhancing a visual image of a display is described. The visual image is displayed on a first display of a display device having a first display pixel density and a first display dimension. The display device detects an enhancer device oriented in an operable position to the display device. The enhancer display device has a second display having a second display pixel density higher than the first display pixel density and a second display dimension less than the first display dimension. A spatial orientation is determined between the first display of the display device with the second display of the enhancer display device. The display device sends the visual image and the spatial orientation to the enhancer display device to display a portion of the visual image that is defined by the spatial orientation on the second display in the second display pixel density.
US09514710B2	Resolution enhancer for electronic visual displays A method of enhancing a visual image of a display is described. The visual image is displayed on a first display of a display device having a first display pixel density and a first display dimension. The display device detects an enhancer device oriented in an operable position to the display device. The enhancer display device has a second display having a second display pixel density higher than the first display pixel density and a second display dimension less than the first display dimension. A spatial orientation is determined between the first display of the display device with the second display of the enhancer display device. The display device sends the visual image and the spatial orientation to the enhancer display device to display a portion of the visual image that is defined by the spatial orientation on the second display in the second display pixel density.
US09514708B2	Image processing apparatus, projector and image processing method A driving device of a display apparatus includes a calculation unit which calculates a correction value to correct a gradation value of a pixel that is a correction target on the basis of n gradation values that corresponds to n pixels and a correction unit which corrects the gradation value of a pixel that is a correction target on the basis of the correction value and the calculation unit performs a first calculation in a case in which a gradation value among the n gradation values is included in a first range, performs a second calculation in a case in which a gradation value among the n gradation values is included in a second range, respectively performs the first calculation or the second calculation on the n gradation values, and calculates the correction value on the basis of the calculation results performed on the n gradation values.
US09514700B2	Signal processing device, liquid crystal apparatus, electronic equipment, and signal processing method A signal processing device of a liquid crystal apparatus detects a boundary between a first pixel to which a first voltage lower than a first reference voltage is applied and a second pixel to which a second voltage higher than a second reference voltage is applied on the basis of a signal for controlling a voltage applied to pixels, corrects a signal correlated with M pixels including the first pixel to a third voltage which is higher than the first voltage and lower than the second voltage, outputs the third voltage as an applied voltage to the M pixels in a first period, outputs the first voltage as an applied voltage to the M pixels in a second period, and outputs the third voltage as an applied voltage to the M pixels in a third period.
US09514698B2	Liquid crystal display having high and low luminances alternatively represented A liquid crystal display includes: a liquid crystal capacitor; a first switching element which transmits a data voltage to the liquid crystal capacitor; a second switching element connected to the liquid crystal capacitor; and a transformation capacitor connected to the second switching element. A difference between a first time when the first switching element is turned on and a second time when the second switching element starts is turned on is greater than 1 horizontal period and less than 1 frame period.
US09514693B2	Liquid crystal display device When a first source bus line (SA) or a second source bus line (SB) which is associated with a pixel of one column is electrically connected with a spare wire (AL1), a control circuit (15B) of a liquid crystal display device (100B) according to an embodiment of the present invention is capable of controlling the amplitudes of the oscillation of a first display signal voltage and a second display signal voltage output to the first source bus line (SA) and the second source bus line (SB) so as to be smaller than that achieved when the first source bus line (SA) or the second source bus line (SB) is not electrically connected with the spare wire (AL1).
US09514689B2	Display device A display device includes at least one light source array configured to provide a display panel with light, a dimming signal generating unit configured to receive an image data signal and generate a dimming signal, a first comparator configured to receive the dimming signal output from the dimming signal generating unit and a preset critical value and generate a comparison signal, a dimming modulating unit configured to receive the comparison signal output from the first comparator and the dimming signal output from the dimming signal generating unit and modulate the dimming signal, a constant current controller configured to receive the dimming signal output from the dimming modulating unit and a voltage from a sensor node, and to control a light driving current driving the light source array, and a resistor controller configured to change resistors connected to the sensor node by the comparison signal output from the first comparator.
US09514685B2	Display device A display device that may minimize voltage drop of a power source supplied to a pixel is disclosed. The display device comprises a power generator generating a driving power source; a display panel including a plurality of pixels, the display panel displaying images using the driving power source; and a printed circuit board having a power transfer line for transferring the driving power source output from the power generator to the display panel, wherein the power transfer line is provided in a closed-loop type.
US09514681B2	Pixel circuit for increasing accuracy of current sensing A pixel circuit for increasing accuracy of current sensing of an organic light-emitting diode (OLED) display is disclosed. In one aspect, the pixel circuit includes an OLED, a driving circuit, and first to third transistors. The driving circuit is configured to adjust a magnitude of a current flowing through the OLED based at least in part on a data signal received from a data line. The first transistor is configured to electrically connect the data line and a holding capacitor based at least in part on a scan signal. The second transistor is configured to electrically connect the holding capacitor and the driving circuit based at least in part on a write control signal. The third transistor is configured to electrically connect the data line and an anode electrode of the OLED based at least in part on a sensing control signal.
US09514677B2	Display device and driving method thereof A method of driving an OLED display includes: during a scanning period of a first frame, turning off a relay transistor and turning on a switching transistor to enable a second data voltage applied to a data line to be stored in a first capacitor; and during a light emitting period of the first frame, performing an operation to turn on a light emitting transistor and a compensation transistor to enable a voltage into which a first data voltage and a threshold voltage of a driving transistor are reflected to be applied to a second node for enabling the OLED to emit light by a driving current which flows into a driving transistor. The scanning period and the light emitting period temporally overlap each other.
US09514671B2	Power supply unit and organic light emitting display including the same Disclosed is a power supply unit including a DC-DC converter including an output terminal and resistor coupling terminal and an external resistor coupled to the resistor coupling terminal, where the DC-DC converter includes a first power generation unit which outputs a predetermined current to the output terminal, and a sensing circuit unit that includes a sensing resistor located between the first power generation unit and the output terminal and stops an operation of the first power generation unit depending on a current value flowing in the sensing resistor. A power supply unit and an organic light emitting display including the power supply unit include a sensing circuit unit that stops operation of the power supply unit to prevent an additional damage when an abnormal current occurs.
US09514666B2	Image display system and display driving module A display driving module including a driving circuit portion and a non-driving circuit portion is provided. The driving circuit portion is controlled by a system circuit block. The driving circuit portion includes driving channels for driving a display panel. First ESD protection devices are disposed in the driving circuit portion corresponding to the driving channels for providing at least one discharge path. The non-driving circuit portion electrically connects the system circuit block, the driving circuit portion and the display panel. At least one of second ESD protection devices is disposed in at least one of the driving circuit portion, the non-driving circuit portion, the system circuit block and the display panel corresponding to the first ESD protection devices. The second ESD protection devices cooperate with the first ESD protection devices to provide the discharge path. An image display system including the foregoing display driving module is also provided.
US09514663B2	Method of uniformly illuminating a billboard Visual media content on a billboard display surface can be illuminated using a lighting assembly that includes a lighting unit that includes a circuit board, LEDs arranged on the circuit board, and optical elements overlying the LEDs. The method includes directing light from the lighting unit toward a portion of the billboard display surface such that the light from the lighting unit illuminates the visual media content on the portion of the billboard display surface with an illumination level and a uniformity. The optical elements are configured so that failure of one or more LEDs of the lighting assembly will cause the illumination level of light impinging the portion of the billboard display surface to decrease while the uniformity of light impinging the portion of the billboard display surface remains substantially the same.
US09514660B2	Method and architecture for distributed multi-echelon exercise and training system and method of using the same A training apparatus includes a server and a controller. The server is configured to send and receive messages on at least one network, to receive messages at a plurality of publisher ports, and to send messages to a plurality of subscriber ports. The controller operates the server sends a first message to a training system destination that is initially configured to receive messages on a first port. Receipt and processing of the first message causes the training system destination to subsequently receive messages on a second port. The server is configured to receive subsequent messages on the first port intended for the training system destination and to pass modified or unmodified messages to the second port. The controller determines at least one of the flow, format, content, and routing of messages received on the first port and passed to the second port based on a training scenario.
US09514658B1	Synthetic skin and tissue model A synthetic tissue model using one or more semi-flexible polymers or resin with at least one embedded mesh material is provided herein. The model provides suitable simulation of animal tissue designed to mimic tissue stiffness through varying the polymerization to simulate tissue stiffness level. Multiple polymers or multiple layers of polymer possessing different polymerization levels can be used to simulate tissues with different layers, such as skin. A mesh incorporated in the model provides durability, and can simulate layers of tissue through selection of the mesh material. A skin model using silicone-like material with a nylon tulle mesh was used to simulate skin for surgical procedures. The nylon tulle mesh increased resistance to tearing over time, due to insertion of surgical tools, thereby increasing usable life of the model and enhancing training as the model simulated skin for longer periods of time.
US09514653B2	Systems, methods, and devices for providing assistance to an unmanned aerial vehicle A service unmanned aerial vehicle (UAV) includes a flight system, a status component, a navigation system, and a surveillance component. The flight system is for flying the service UAV. The status component is configured to determine that a first UAV is disabled. The navigation system is configured to fly the service UAV to a landing location of the first UAV in response to the status component determining that the first UAV is disabled. The surveillance component is configured to observe the first UAV and an area surrounding the first UAV.
US09514649B2	Vehicle driving support device There is provided a vehicle driving support device. The vehicle driving support device according to the present invention calculates a time-to-collision to an obstacle ahead. When the time-to-collision is shorter than a predetermined threshold value, which means the possibility of the collision between the obstacle and a vehicle is determined to be high, and in at least either one of cases in which an engine automatic stop controller automatically stops an engine and in which a brake negative pressure is higher than a set pressure, so that the negative pressure of a brake booster is insufficient, the device outputs a signal to a brake controller so as to start a pump of a brake driver for realizing a prefill function in which a brake pad of each wheel is pressed against a braking surface of a disc rotor.
US09514648B2	Alerting apparatus An alerting apparatus issues an alert regarding a moving obstacle to a driver of a host vehicle when the host vehicle enters an intersection of a crossroad that is connected to a traveling road on which the host vehicle is traveling, and the traveling road, in a left-hand traffic jurisdiction. This alerting apparatus includes an ECU. The ECU is configured to issue the alert regarding the moving obstacle when it is determined that a path of the moving obstacle intersects with an intersect determination range, and set the intersect determination range to be shorter in length in a front-rear direction of the host vehicle when the traveling direction of the host vehicle is a left turn than when the traveling direction of the host vehicle is a right turn.
US09514647B2	Optimal acceleration profile for enhanced collision avoidance A system and method for providing an optimal collision avoidance path for a host vehicle that may potentially collide with a target vehicle. The method includes providing off-line an optimization look-up table for storing on the host vehicle that includes an optimal vehicle braking or longitudinal deceleration and an optimal distance along the optimal path based on a range of speeds of the host vehicle and coefficients of friction of the roadway surface. The method determines the current speed of the host vehicle and the coefficient of friction of the roadway surface during the potential collision, and uses the look-up table to determine the optimal longitudinal deceleration or braking of the host vehicle for the optimal vehicle path. The method also determines an optimal lateral acceleration or steering of the host vehicle for the optimal vehicle path based on a friction ellipse and the optimal braking.
US09514646B2	Method for assisting vehicle parking using sensors on both a parking vehicle and a parked vehicle A method of operating a parking assistance system involves operating a first sensor onboard a parking vehicle to obtain a first distance measurement to a parked vehicle, and transmitting a first wireless signal which activates a second sensor onboard the parked vehicle. The second sensor obtains a second distance measurement to the parking vehicle and transmits the result via a second wireless signal. The second wireless signal is received by the parking vehicle which then determines an inter-vehicle distance based on the first and second distance measurements, and uses the inter-vehicle distance to perform a parking maneuver. The transmission of the second distance measurement by the parked vehicle may be contingent upon existence of a condition (such as a sufficient state-or-charge of a vehicle battery or prior consent of an operator) of the parked vehicle when the parked vehicle receives the first wireless signal.
US09514644B2	Implementing location based actions A system (8) for implementing at least one action based on a location of a mobile communication device (10). The system (8) comprises a controller (16), storage (18) storing electronic program instructions for controlling the controller (16), and input means (24). The controller (16) is operable, under control of the electronic program instructions, to receive input via the input means (24), the input comprising an indication of a location of the mobile communication device (10), process the indication to determine whether the location of the mobile communication device (10) corresponds to a location of a predefined area, and implement the at least one action based on the determination.
US09514641B2	Smart remote control A remote control method, a smart terminal, and a smart remote control system. The smart remote control system includes a terminal device and at least one primary device, the terminal device is configured to provide a primary device list for a user; obtain and display a remote control panel of the controlled primary device according to the controlled primary device selected by the user; and sends control information to the controlled primary device according to an operation performed by the user on the remote control panel; and the primary device is configured to perform a corresponding control operation according to the control information. A terminal device is used to provide a remote control function for a user, so that the user may remotely control multiple controlled devices on one terminal device by using the remote control panel.
US09514639B2	Universal remote control user interface for discrete control of multiple devices A universal remote control device and methods for controlling multiple devices with a universal remote control device are provided. The method includes receiving a boot completed notification from a control unit of the universal remote control device and displaying a troubleshooting icon on a display of the universal remote control device. Upon receiving a user input selecting the troubleshooting icon, the method includes generating a power user interface menu enabling discrete control of power for each device controlled by the universal remote control device. The power user interface menu is displayed on a least a portion of the display of the universal remote control device.
US09514638B2	Pull cord with integrated charging port An apparatus in accordance with the invention includes a gearbox assembly configured to electromechanically operate a window covering actuation mechanism. A pull cord is provided to at least one of power the gearbox assembly and charge a battery to power the gearbox assembly. In certain embodiments, manual operation of the pull cord is used to control the gearbox assembly. An electrical conductor and associated electrical connector may be incorporated into the pull cord. A corresponding method is also disclosed herein.
US09514637B2	Wireless two-way communication protocol for automated furniture accessory integration A system and method for integrating furniture accessories and generic devices with automated furniture items is provided. In embodiments, a communication protocol enables a remote device to wirelessly control a generic device wirelessly coupled to a control component of an automated furniture item. The remote device may control features of the generic device based on wireless communication with the control component. In some embodiments, the remote device receives a user environment selection, which is communicated to the control component of the automated furniture item. The automated furniture item then communicates at least a portion of the received command to a corresponding generic device, according to the settings of the selected user environment. In further embodiments, an occupancy detection indication for the automated furniture item may result in a change in one or more settings corresponding to the user environment, as communicated to the generic device(s) by the control component.
US09514631B2	Multiple procesor hazard detection system Systems and methods for using multi-criteria state machines to manage alarming states and pre-alarming states of a hazard detection system are described herein. The multi-criteria state machines can include one or more sensor state machines that can control the alarming states and one or more system state machines that can control the pre-alarming states. Each state machine can transition among any one of its states based on sensor data values, hush events, and transition conditions. The transition conditions can define how a state machine transitions from one state to another. The hazard detection system can use a dual processor arrangement to execute the multi-criteria state machines according to various embodiments. The dual processor arrangement can enable the hazard detection system to manage the alarming and pre-alarming states in a manner that promotes minimal power usage while simultaneously promoting reliability in hazard detection and alarming functionality.
US09514629B2	Vehicle door opening warning system and vehicle door opening warning method A vehicle door opening warning system including a control unit, a projection unit and a detection unit is provided. The control unit is disposed at a door of a vehicle. The projection unit is disposed at the door and is electrically coupled to the control unit. The detection unit is disposed outside of the vehicle and is electrically coupled to the control unit. When the detection unit detects a moving object existing within 5 to 30 meters of the vehicle, the detection unit produces a signal. The control unit receives the signal and controls the projection unit to project a warning message according to the signal. A vehicle door opening warning method is also provided.
US09514628B2	Electrical load monitoring system A computer implemented method performed by a composite electrical load monitoring system includes determining, at a first time instant during a duration, a first margin between a first reading of a first electrical parameter and a first electrical parameter limit for a first power source, and determining, at the first time instant during the duration, a second margin between a second reading of a second electrical parameter and a second electrical parameter limit for a second power source. The method further includes determining, after the first time instant, that the first margin is less than the second margin in response to determining the first margin and the second margin, and displaying, in a display device and within the duration, an identifier for the first power source in response to determining that the first margin is less than the second margin.
US09514625B2	System and method of biomechanical posture detection and feedback A system and method are described herein for a sensor device which biomechanically detects in real-time a user's movement state and posture and then provides real-time feedback to the user based on the user's real-time posture. The feedback is provided through immediate sensory feedback through the sensor device (e.g., a sound or vibration) as well as through an avatar within an associated application with which the sensor device communicates.
US09514624B2	Apparatus for detecting ferromagnetic objects and a protected doorway assembly Apparatus for detecting a ferromagnetic object to protect, for example, a doorway to an MRI room comprises a passive primary sensor apparatus comprising at least one first magnetic sensor, a secondary non-magnetic sensor apparatus comprising at least two sensors, a detection zone for one of the secondary sensors being distinct from the zone of the other one of the secondary sensors, a signal processing circuit arranged in communication with the primary and secondary sensor apparatus, and a warning device. The signal processing circuit identifies temporal variations in the signal from the primary sensor and correlate them with instances in which both sensors of the secondary, non-magnetic, sensor apparatus detect the presence of an object in their respective zones.
US09514622B1	Tamper-proof building alarm system A tamper-proof building alarm system comprising a number of sensing devices for sensing when a building entry point has been opened and an alarm unit comprising a tamper-proof housing and an alarm assembly. The tamper-proof housing includes a mounting base and a cover. The cover at least partially encloses the housing and prevents lateral access to the alarm assembly. The tamper-proof housing may include a locking system such that only authorized users have access to the alarm assembly.
US09514616B2	Gaming machine capable of improving amusingness The present invention provides a gaming machine capable of improving amusingness of a game by varying the continuity of the main game. According to the present invention, a normal mode game in the normal mode is started based on an input of the bet information from the bet input device; the mode is entered from the normal mode to the chance mode when an enter condition is satisfied as a result of referring to the predetermined symbol determination table in the normal mode; a free game is started as a chance mode game in the chance mode; and the mode is returned from the chance mode to the normal mode when an end condition is satisfied as a result of referring to the specific symbol determination table in the chance mode.
US09514615B2	Sliding jackpot probabilities A game controller operable to control play of a game. The game controller includes a configuration module, a wager determination module and a trigger module. The configuration module configures a secondary event trigger having a hit rate which is fixed over a plurality of games. The wager determination module determines an amount wagered for play of one of the games. The trigger module triggers a secondary game event in which a higher value prize and lower value prize are each eligible to be awarded upon determining the trigger in the game, such that a probability of awarding the higher value prize increases with the amount wagered in the game, while the probability of awarding the lower value prize decreases.
US09514612B2	Gaming controller, a gaming system, and a method of gaming A method of gaming comprising: a) displaying a plurality of display positions to a player, at least one of the display positions corresponding to a hidden object to be sought by the player; b) determining a selection of a display position; c) revealing whether or not the selected display position corresponds to the hidden object; e) determining whether to allow a selection by conducting at least one trial, each trial comprising seeking to complete a symbol combination; and f) repeating steps b) to e) until either the symbol combination is completed or a designated number of hidden objects is located.
US09514609B2	Team gaming system and method therefor A system and method for allowing multiple players to place independent wagers on a single game is disclosed. The game may be played on either a gaming machine or at a gaming event. A main player is physically located at a system operator, such as a casino. Additional players may join the main player and place wagers on the games that the main player is playing. The wagers that the additional players place are treated and paid out independently from the wagers placed by the main player. Furthermore, the players and the main player may communicate with each other throughout the betting process.
US09514603B2	Method and apparatus for electronic gaming A system and method for controlling a player's rate of play is provided. In an embodiment, a rate of play is defined that influences when a player is transferred to a new hand, such as upon folding or when play in a current hand is completed. Rate of play may be expressed, for example, as a percentage of hands to transfer upon which the player is to be moved upon folding. In another embodiment, a player may select, for example, a “Fold and Transfer” option or a “Fold and Observe” option, thereby allowing the player to better control the rate of play. In yet another embodiment, a player may designate a rate of play and be presented with a “Fold and Transfer” option and/or a “Fold and Observe” option, wherein the “Fold and Transfer” option and/or the “Fold and Observe” option may override the designated rate of play.
US09514602B2	System data triggering for facilitation of gaming event re-creation For facilitating re-experience of an event of a gaming device with a player, at least one of an available plurality of data sampled by the gaming device by a gaming system having supervisory hierarchical control over the gaming device, is monitored. The data is compared against a predetermined threshold to determine whether the predetermined threshold is exceeded. If the threshold is exceeded, at least a portion of the sampled data is provided to a data processing device to be processed in re-creating the event at a subsequent time.
US09514595B2	Beverage preparation machine with ambience emulation functionality The present invention relates to a beverage preparation machine with ambience emulation functionality. A providing arrangement (11, 21, 17) provides data with visible 5 content for generating a predefined ambience when reproduced, wherein the provided data are linked to context information, said context information being indicative of a situation. An acquisition arrangement (11, 37, 60, 62, 63) acquires at least one actual context 10 information indicating an actual situation, and a display (10) reproduces data being associated to the acquired actual context information for generating an ambience related to the actual situation.
US09514590B2	Coin separation device A coin separation device has a conveying device for conveying coins from an inlet container in a conveying direction along a conveying line and a checking device arranged on the conveying line for recognizing a coin that is conveyed along the conveying line. An acceleration device also is provided. The acceleration device is formed to accelerate a coin conveyed along the conveying line and recognized by the checking device in the conveying direction so that the coin is conveyed from the conveying line into a coin collection device. In this way, the coin separation device reliably conveys only coins, and not other objects from the conveying line into a coin collection device.
US09514588B2	Modular vehicle system, electric vehicle and module for connecting to an electric vehicle The invention relates to a modular vehicle system, having an electric vehicle (2, 2′), in particular a lightweight electric vehicle, and at least one module (3, 120) which can be connected to the electric vehicle (2, 2′). The electric vehicle (2, 2′) has at least one on-board power supply system (13, 101) for supplying energy to an electrical drive unit (114), one or more interfaces (4, 114) which are connected to the on-board power supply system (13, 101) and are intended for connecting at least one module (3, 120), and a first locking means (9) which is arranged on the interface (4, 4′, 114). The at least one module (3, 120) has at least one electrical arrangement, a connecting element (6, 6′, 121) which can be connected disconnectably to the interface (4, 4′, 114) and has the purpose of connecting the electrical arrangement to the on-board power supply system (13, 101), and a second locking means (11) which is arranged on the connecting element (6, 6′, 121) and which is designed to engage with the first locking means (9). In order to provide a modular vehicle system (1) which has increased operational reliability and in which the connection to a module (3, 120) can be made in a particularly easy and secure fashion such that it is protected against intervention by unauthorized persons, at least one of the locking means (9, 11) can be moved between a free position and a locking position, wherein in the free position the connecting element (6, 6′, 121) can be disconnected from the interface (4, 4′, 114), and in the locked position the connecting element (6, 6′, 121) is mechanically locked to the interface (4, 4′, 114).
US09514585B2	Wireless electronic lock system and method A electronic lock system and method including an electronic lock, a mobile device and/or a wireless device. The electronic lock is capable of sending a message to the mobile device via wireless communication and/or to the wireless device based on a triggering event. The mobile device and/or the wireless device may in turn perform an action based on the received message. In one embodiment, the electronic lock, the mobile device the wireless device communicate with one another wirelessly via Bluetooth communication.
US09514583B2	Controller for a door operator A door operator comprises a door driver for opening and closing a door, a controller including a microprocessor connected to and controlling the door driver, a graphical user interface comprising a display screen with touch select input coupled to the microprocessor to display information stored in the controller and to receive instructions selected from the display screen by a user, and a memory module coupled to the microprocessor and storing code executed by the microprocessor. The microprocessor under control of the code displays to the user various menu items on the graphical user interface display and enables the user to select among the menu items using the display screen with touch select input such that the microprocessor derives a control signal. Circuitry is configured to receive the control signal from the microprocessor and to carry the control signal to the door driver.
US09514582B2	Recording and reporting of driving characteristics A system for recording, transmitting and compiling information indicative of actual vehicle operation and usage includes a device installed within a vehicle. Sensors communicate with the device to provide information relating to operation of the vehicle. A location module utilizes satellite signals to determine the current location of a vehicle. A data extraction module sends data to a central process server. The central processor compiles and summarizes the information from the device for determination of vehicle usage for use in determining an insurance premium.
US09514580B2	Fault code hierarchy system A fault code analyzer for a vehicle includes a fault code memory device configured to store a plurality of active and inactive fault codes for the vehicle and a priority processor coupled to the memory device. The priority processor is configured to: prioritize each fault code within the plurality of active and inactive fault codes; determine a first root cause fault code, the first root cause fault code corresponding to the highest prioritized fault code; determine a first set of interaction fault codes, the first set of interaction fault codes relating to the first root cause fault code; and provide the first root cause fault code and the first set of interaction fault codes to an interface device of a user.
US09514579B2	Method and apparatus for checking vehicle specification A method for checking a vehicle specification includes operating terminal devices included in a vehicle. Control data is generated depending on an operation of the terminal devices. The control data is transferred to a gateway included in the vehicle. The control data is compared with vehicle specification matters stored in the gateway using the gateway. An error message is transmitted when the vehicle specification matters stored in the gateway do not match the control data.
US09514568B2	Aerial roof estimation systems and methods Methods and systems for roof estimation are described. Example embodiments include a roof estimation system, which generates and provides roof estimate reports annotated with indications of the size, geometry, pitch and/or orientation of the roof sections of a building. Generating a roof estimate report may be based on one or more aerial images of a building. In some embodiments, generating a roof estimate report of a specified building roof may include generating a three-dimensional model of the roof, and generating a report that includes one or more views of the three-dimensional model, the views annotated with indications of the dimensions, area, and/or slope of sections of the roof. This abstract is provided to comply with rules requiring an abstract, and it is submitted with the intention that it will not be used to interpret or limit the scope or meaning of the claims.
US09514567B2	Screen display device, system, and screen generation method displaying the state of a network A screen display device (200) displays a three-dimensional display screen on which network (NW) devices, links, paths, obstruction points (alarms) are displayed on a map representation. The screen display device (200) defines rungs on the basis of attributes of the devices so that a device of a lower rung (a terminal device in the NW) is placed at a lower position while a device of a higher rung is placed at a higher position on the three-dimensional display screen. Further, for an area where devices are on multiple rungs, the screen display device (200) displays a mark at the area to make the rung height of each device more recognizable. Also, the screen display device (200) provides an indication enclosing devices that form an active system/backup system pair to make it easy to understand whether there is a system that remains normal so that service can be offered.
US09514566B2	Image-generated system using beta distribution to provide accurate shadow mapping A computer-based system forms a more accurate intensity value for virtual light reflected from computer-generated images. The reflected light intensity from the images is computed pixel by pixel using the mean and variance of the depth values of a filter region associated with the pixel, as well as the maximum and minimum values of the depth values in the filter region. The computations use the normalized, incomplete beta function algorithm.
US09514565B2	Image processing apparatus and method An image processing apparatus. The image processing apparatus may perform filtering to emphasize a surface lighting of a low frequency band from an input lighting environment image, and may also perform at least one virtual point light (VPL) sampling from the input lighting environment image. The image processing apparatus may perform precomputed radiance transfer (PRT) based rendering using the filtered lighting environment image and VPL based rendering using the sampled VPL.
US09514564B2	Ultrasonic diagnostic apparatus and ultrasonic image display method For generating ultrasonic projection images in which various kind of ultrasonic projection images have been appropriately combined, the invention is provided with: a storage unit that stores tomographic image volume data and elastic image volume data; a volume rendering unit that generates tomographic projection images by volume rendering on the basis of the tomographic image volume data; a display device that displays the ultrasonic projection images generated by the volume rendering unit; and an operation unit for inputting commands to control the volume rendering unit. For one of the rendering spaces partitioned by a cutting plane set in the rendering space by a command input from the operation unit, the volume rendering unit renders voxels of tomographic image volume data corresponding to the voxels of elastic image volume data that have elasticity values satisfying a set threshold value, and generates and displays the tomographic projection image on the display device.
US09514558B2	Method for preventing selected pixels in a background image from showing through corresponding pixels in a transparency layer The present invention converts an image into a transparency, or “foreground image layer”, on which the readability of text and other detail is preserved after compositing with a background, while maintaining color information of broad areas of the image. In an embodiment, a matte is determined for the background image to reduce transparencies in the foreground layer, so as to prevent irrelevant parts of the background image from showing through. This is in distinction to only using the original foreground image data (prior to its transformation to a layer) to compute a matte (or mask, or alpha channel) to form a foreground layer.
US09514549B2	Method for reducing metal artifact in computed tomography A method for reducing metal artifacts in computed tomography (CT) is disclosed. The method for reducing metal artifacts in CT includes: obtaining a sinogram reduced in size from an original sinogram; setting up a linear algebraic equation according to remaining data excluding data damaged by a metal based on the obtained sinogram; restoring a low-resolution image based on the set up linear algebraic equation; calculating a sinogram from the restored low-resolution image; restoring a sinogram by disposing the calculated sinogram data in the original sinogram and by utilizing the calculated sinogram data as pre-information; and restoring a final CT image from the restored sinogram. Through introduction of a novel metal artifact reduction (MAR) technique referred to as an algebraic correction technique (ACT) using an intermediate image of an attenuation coefficient of an outside of a metal area, an image closest to an original image can be obtained by minimizing metal artifacts in CT.
US09514548B2	Method and system for presenting and using four dimensional data from a medical imaging system A method of presenting higher dimensional data provided from a photon counting CT system includes receiving data from a photon counting CT system corresponding to materials exposed to N number of ranges of photon energy, where N is a number equal to or greater than four and generating N number of images, each image comprising pixel values corresponding to the materials exposed to the N number of ranges of photon energy. The method also includes presenting the pixel values in each of the N number of images within a two dimensional (2D) space by providing N number of axes, each axis linearly representing the pixel values in a corresponding image of the N number of images and representing each pixel value for pixels corresponding to a same location in each of the N number of images via a continuous line comprising a plurality of line segments.
US09514546B2	Image composition based on remote object data When a scene is generated, a content item may identify graphics object service requests associated with the scene. Each scene may have any number of associated graphics object service requests that may be sent to any number of different graphics object services. The graphics object services may be accessible over a network such as the Internet. By requesting object data from graphics object services, a content item may, for example, reduce at least part of the computational burden on a graphics processing unit of a client device.
US09514545B2	Object detection apparatus and storage medium Important information about an object is detected using less arithmetic processing. An object detection unit generates an edge image from a color image. The object detection unit evaluates symmetry of an image included in the edge image by performing processing in accordance with the position of a target pixel. The object detection unit identifies a symmetry center pixel forming an object having symmetry. The object detection unit detects an object width for each symmetry center pixel. The object detection unit identifies the width of the object in the vertical direction based on the width of the symmetry center pixels in the vertical direction, and identifies the width of the object in the horizontal direction based on the object width identified for each symmetry center pixel.
US09514541B2	Image processing apparatus and image processing method An image processing apparatus includes a detection unit that detects that a center position of an area corresponding to at least a portion of an object moving within a display screen has moved across an object detection line segment set in the display screen. A setting unit sets an inhibition region, where the detection is inhibited, along a frame of the display screen to provide both (i) a non-inhibition region where the detection is not inhibited and (ii) the inhibition region, together with each other in the display screen, after setting the inhibition region. The non-inhibition region is a remaining region in the display screen, other than the inhibition region. The detection unit detects that the center position has moved across the object detection line segment set in the non-inhibition region.
US09514537B2	System and method for adaptive depth map reconstruction What is disclosed is a system and method for adaptively reconstructing a depth map of a scene. In one embodiment, upon receiving a mask identifying a region of interest (ROI), a processor changes either a spatial attribute of a pattern of source light projected on the scene by a light modulator which projects an undistorted pattern of light with known spatio-temporal attributes on the scene, or changes an operative resolution of a depth map reconstruction module. A sensing device detects the reflected pattern of light. A depth map of the scene is generated by the depth map reconstruction module by establishing correspondences between spatial attributes in the detected pattern and spatial attributes of the projected undistorted pattern and triangulating the correspondences to characterize differences therebetween. The depth map is such that a spatial resolution in the ROI is higher relative to a spatial resolution of locations not within the ROI.
US09514535B1	Color calibration method of camera module According to the present invention, firstly multiple reference parameter values of each color sample in a color chart are set, or a photograph and a measurement are performed on a standard color chart or a user-defined color chart in a certain standard lighting environment, multiple reference parameter values, SPD (λ)×R (λ) and brightness of each color sample are obtained. Then the SPD (λ)×R (λ) and the brightness of each color sample are reproduced by using a spectral tunable lighting source. Then each reproduced color sample is photographed by using the camera under the same settings to obtain multiple reproduced parameter values of each color sample. The two groups of parameter values are compared and a color calibration model is established. Finally color calibration of each batch of camera modules is implemented without the helping of a color chart and standard lighting environment. The present invention has the characteristics of high automation degree, high flexibility and adaptability, and high convenience in color changing and color sample calibrating, and thus has an extremely high practical value.
US09514533B2	Method for determining bone resection on a deformed bone surface from few parameters The invention relates to a method for non-invasive reproducible determination of a corrected surface on a 3D bone surface model constructed from 3D medical image of a bone having a deformation consisting in a bump overgrowth at the head-neck junction; wherein said corrected surface comprises: i) a 3D spherical corrected surface patch on the head portion of said 3D bone surface model, and ii) a 3D smooth transition corrected surface patch on the neck portion of said 3D bone surface model, contiguous to said 3D spherical corrected surface patch; Said corrected surface patches are defined by a set of parameters comprising: iii) at least one first parameter (a*) representing a spherical extent value of said 3D spherical corrected surface patch, iv) and a set of at least one second parameter, said set determining the 3D correction boundary of said corrected surface patches, such that said corrected surface patches are continuous with said 3D bone surface model along said boundary.
US09514530B2	Systems and methods for image-based object modeling using multiple image acquisitions or reconstructions Systems and methods that involve integrating imaging data from multiple sources to create a single, accurate model of a patient's anatomy. One method includes receiving a representation of a target object for modeling; determining one or more first anatomical parameters of the target anatomical object from at least one of one or more first images of the target anatomical object; determining one or more second anatomical parameters of the target anatomical object from at least one of one or more second images of the target anatomical object; updating the one or more first anatomical parameters based at least on the one or more second anatomical parameters; and generating a model of the target anatomical object based on the updated first anatomical parameters.
US09514527B2	Method and device for acquiring several images of the same package with the aid of a single linear camera A method of inspecting packages with the help of a linear image sensor comprises the steps of: for each movement increment, cyclically acquiring a sequence of n successive image lines (l1, l2, . . . , ln), the n image lines of each sequence being obtained with exposure times (Ti) and/or lighting conditions (Ek) that are different; grouping together the image lines (l1, l2, . . . , ln) obtained in the sequences while using both the same exposure times (Ti) and the same lighting conditions (Ek) so as to obtain n′ superposable images (I1, I2, . . . , In) of at least j image lines; and analyzing the n′ superposable images (I1, I2, . . . , In) separately or in combination in order to determine at least one characteristic of the packages. A device for package inspection includes a process and control unit that employs the steps of the method.
US09514526B2	Device and method for detecting angle of rotation from normal position of image An evaluation value indicative of the extent of lines in each direction is calculated for a pre-processed image in which 0s are filled in and extended in the lateral direction of the inputted image and which has been reduced ⅛th in the longitudinal direction. To obtain the angle of rotation of an image from the change in the evaluation value obtained while the angle relative to the lateral direction of the pre-processed image is modified in small steps, a parallel line is drawn for each direction, a projection is taken, and the sum of squares serves as the evaluation value of the direction. The direction having the highest evaluation value serves as the obtained direction of rotation from the normal position. The projection of each direction references the point of intersection between the parallel line drawn for each direction and the coordinate line of the horizontal axis.
US09514524B2	Optical distortion compensation Embodiments include systems and methods for an electronic device, which includes circuitry configured to detect a size of a face from a captured image. The circuitry is also configured to identify a distortion correction parameter which varies according to a size of the detected face. The circuitry is also configured to correct a distortion of the face within the captured image by utilizing the distortion correction parameter identified based on the size of the detected face from the captured image.
US09514522B2	Depth data processing and compression Techniques for setting depth values for invalid measurement regions of depth images are described herein. A computing device may set the depth values based on evaluations of depth values of neighboring pixels and of corresponding pixels from time-adjacent depth images. Alternately or additionally, the computing device may utilize a texture image corresponding to the depth image to identify objects and may set depth values for pixels based on depth values of other pixels belonging to the same object. After setting the depth values, the computing device may normalize the depth values of the pixels. Further, the computing device may generate reduced representations of the depth images based on a depth reference model or a depth error model and may provide the reduced representations to an encoder.
US09514521B2	Diagnostic ultrasound apparatus In ultrasound images, there are many stationary echoes in the region superficial to the deep region comprising the heart. In the present invention, a HPF processing unit (20) filters frame data by applying a high pass filter, the characteristics of which have been set according to the depth in the frame, on the frame data at said depth. The high pass filter can be achieved, for example, with a digital filter and the characteristics of the high pass filter are adjusted by the filter-setting unit (22) setting the filter coefficient of said digital filter. That is to say, the filter coefficient in the HPF processing unit (20) is controlled by the filter-setting unit (22) so that the deeper the region, the higher the offset level is set.
US09514519B2	Image filter An image filter (100) for calculating a pixel value of target pixel in an output image from a pixel value of each of a pixel or pixels belonging to a filter area in an input image by using a filter coefficient vector V, is configured to include a filter coefficient vector changing section (120) for changing the filter coefficient vector V according to at least either where the target area is in the input image, or where the target pixel is in the output image.
US09514517B2	Image phase retrieval A method of processing a pixellated image to retrieve a phase distribution representative of the image. The phase distribution representative of the image is in the Fourier domain. The method includes padding the image pixels with padding, or non-image, pixels to increase the total number of pixels in the pixellated image. The method further includes processing the padding or non-image pixels differently to the image pixels in each iteration of the iterative method.
US09514510B2	Method and apparatus for arranging pixels of picture in storage units each having storage size not divisible by pixel size An exemplary data arrangement method for a picture includes at least the following steps: obtaining pixel data of a plurality of first N-bit pixels of the picture; and storing the obtained pixel data of the first N-bit pixels in a plurality of M-bit storage units of a first buffer based on a raster-scan order of the picture, wherein M and N are positive integers, and M is not divisible by N. Besides, at least one of the M-bit storage units is filled with part of the obtained pixel data of the first N-bit pixels, and the first N-bit pixels include at least one pixel divided into a first part stored in one of the M-bit storage units in the first buffer and a second part stored in another of the M-bit storage units in the first buffer.
US09514509B2	Electronic device and controlling method A method for controlling operating time of an electronic device includes acquiring a facial image of a user, and a distance from the user to the electronic device. A facial zone from the facial image is recognized from the facial image, and a ratio is calculated between a size of the facial zone and a preset screen size of a display of the electronic device, and the distance between the user and the electronic device is acquired. When the user is determined not to be an adult based on analyses of the facial image and the acquired distance, the electronic device is turned off after a first determined duration.
US09514501B2	Systems and methods for multimedia-processing Systems and methods are provided for multimedia processing. For example, upon receipt of a multimedia-information-release request, multimedia information to be released is acquired; whether the multimedia information contains watermark information is detected; in response to the multimedia information containing the watermark information, a first topic matching with the watermark information is searched for within one or more predetermined second topics, and the multimedia information and the first topic matching with the watermark information are released.
US09514497B2	Consumer-provider video interaction Methods, systems, and computer-readable media are provided for interactions between a consumer and a service provider. In some embodiments, an interaction application may provide a collection of service providers to a consumer, receive a selection of a service provider from the consumer, and establish a two-way video communication between the consumer and the service provider. In some embodiments, the interaction application may charge a fee to the consumer, the service provider, or both, for the providing the interaction.
US09514495B2	Creation and use of closely-matched groups to aid in initiating and sustaining behavioral change A method and system for sharing data between a plurality of users in an online group on a communications system includes receiving data from a plurality of users. The data includes personal characteristics about the users. The personal characteristics are analyzed to determine groups of personal characteristics. The users are clustered into closely matched groups based on the groups of personal characteristics. A plurality of activity information is generated about the users in each of the closely matched groups. The activity information may include a physical activity, a location, and a time of day. User may be allowed access to the activity information about other users in each of the closely matched groups, respectively.
US09514491B2	Associating analytics data with an image A device and method of capturing one or more images and determining associated interest information are provided. After receiving a data input, an item is identified based on the data input. Subsequently, an instruction to capture an image of the item is received and the image of the item is captured in response thereto. An interest level of the item is measured based on a quantity of times that the image of the item is captured and the interest information is then provided to a server device. The interest information may be used to identify an interest level trend of the item, and/or create or update a user profile that stores information regarding the item.
US09514489B2	Dynamic transformation of display media based upon a proximity-based communication protocol A process detects, at a first proximity-based device within a first object, presence of a second proximity-based device within a second object. The presence is within a proximity. Further, the process modifies a first display associated with the first object based upon a second display associated with the second object.
US09514485B1	Launching virtual machine instances in a programmable execution service A component executing within a programmable execution system (PES) receives a request to launch a virtual machine instance, such as from a customer of the PES. In response to receiving such a request, the component computes an expected cost of executing the virtual machine instance over its lifetime based upon one or more cost factors. The component also computes an expected value of executing the virtual machine instance over its lifetime based upon one or more value factors. Based upon the computed expected cost and the computed expected value associated with executing the virtual machine instance, the component determines whether or not to launch the virtual machine instance. The component might utilize a similar mechanism to determine whether to instantiate other types of computing resources.
US09514482B2	System for managing vehicle information displayed on a plurality of vehicles A system for managing vehicle information displayed on a plurality of vehicles, said system including a central computer system and plurality of electronic display devices (EDD), each being associated with one of said vehicles and each being in electronic communication with the central computer system (CCS). The CCS includes one or more computer processors; computer readable data storage; and a CCS computer program stored on said data storage, the CCS program being executable by the processors to perform the steps of selecting a vehicle from said plurality of vehicles; generating vehicle data representing information about said vehicle; and sending said vehicle data to an associated one of said EDDs. Each one of said EDDs includes one or more computer processors; computer readable data storage; an EDD computer program stored on said data storage; and a visual display unit, the EDD program being executable by the processors to perform the steps of receiving vehicle data from the CCS representing information about an associated vehicle; and displaying said vehicle data representing information about the associated vehicle on the visual display unit.
US09514480B2	Advertisement delivery management apparatus and advertisement delivery management method An advertisement delivery management apparatus according to an embodiment includes a predicted information storage unit, an allocating unit, and a reallocating unit. The predicted information storage unit stores information including user attributes of a plurality of delivery target users predicted as future advertisement delivery destinations. The allocating unit allocates the delivery target user to an advertisement delivery order request based on the information stored in the predicted information storage unit. The reallocating unit performs a reallocating process of exchanging the delivery target user allocated to the order request with a non-allocated user who is the delivery target user that has not been allocated to the order request.
US09514473B2	Location-based cognitive and predictive communication system A location-based cognitive and predictive communication system includes an interface connected to sensors to receive transactional data for an individual measured by the sensors. A memory stores the transactional data. The transactional data may be associated with a current travel path for the individual and includes a time and geographic location for the individual on the travel path. A prediction module may determine a current activity for the individual based on a prediction determined from the transactional data and may determine a choice set for the individual based on the current activity and based on predictions for a group for which the individual is a member. The choice set may include choices associated with transportation for the current travel path of the individual.
US09514472B2	Method and apparatus for classifying content An approach is provided for receiving, in association with first content to be rendered on user equipment, a vector of one or more values for a corresponding one or more sliding scales. A determination is made of a relationship of the first content to second content based, at least in part, on the vector received. Each value of the vector represents a relative position along a corresponding sliding scale between a minimum label and a maximum label for the sliding scale.
US09514470B2	Enhanced search suggestion for personal information services Systems, methods, and software are disclosed herein for implementing enhanced search suggestion technology. In at least one implementation, a personal information application includes a search suggestion element in which both search suggestions and contacts suggestions may be presented. The personal information application includes a search element in a user interface to a personal information service in which a search query may be entered. Search suggestions and contact suggestions can be identified based at least in part on the search query and presented via a suggestion element in the user interface. An indication of interest made with respect to a contact suggestion results in the presentation of contact details for an associated contact. The presentation of at least the search suggestions persists while the contact details of the associated contact are presented.
US09514460B2	Method and system for facilitating payments on a payment card network A computer implemented method of processing a payment request is provided, the method comprising operating a processor of a network node to: (i) determine that a current time is within a predefined period of a payment time associated with a payment profile; (ii) determine an account number, a payment amount and a payment provider associated with the payment profile; (iii) transmit to the payment provider a request for pre-authorization of payment of the payment amount from an account associated with the determined account number; and (iv) responsive to receiving a pre-authorization from the payment provider, associating an authorization indication with the payment profile.
US09514459B1	Identity broker tools and techniques for use with forward proxy computers A forward proxy can perform identity substitutions and related services. The user provides the forward proxy with identity information, and the forward proxy presents itself to remote Internet sites on behalf of the user in the guize of the specified identity. From the remote site's point of view, the forward proxy is the machine being used by the user; the identity of the actual user machine can be hidden. Cookies are thus stored and updated at the forward proxy instead of being stored and updated at the user computer as they would be if a conventional forward proxy had been used. This helps preserve user privacy. The use of group identities, which are shared by multiple users, are also facilitated.
US09514454B2	Wireless transaction medium having combined magnetic stripe and radio frequency communications A wireless financial transaction instrument, such as a card, has a magnetic stripe, a display, and an on-board power supply, such as a battery, and is usable with a dual capture point of sale terminal. Information is received by such a terminal from the card wirelessly, and also from the magnetic stripe, and the data received contactlessly is preferably used to verify that read from the stripe. The display can display the account number on command, or to display a current balance, or amount of credit remaining, or any combination of these items of information.
US09514451B2	Method, apparatus and system for information identification Methods, apparatus, and systems for information identification are provided. A card image of a pre-set collection area is photographed and obtained, when a request event for information identification is detected. Edge-size information of the card image obtained by photographing is determined. A target area of the card image is marked according to the edge-size information. An image of the target area is extracted. Character shapes to be identified in the image of the target area is determined based on a pre-set character pattern library. A character corresponding to each character shape to be identified is identified according to each character shape to be identified that is determined and according to the character pattern library.
US09514446B1	Remarketing content to a user associated with multiple devices Methods, systems, and apparatus, including computer programs encoded on a computer-readable storage medium, and including a method for selecting content. The method comprises anonymously linking plural identifiers, each associated with a user and specific requesting source. Anonymously linking includes linking at least two different identifiers associated with two different requesting sources used to access content, and linking the two different identifiers using an identifier not including any personally identifiable information. The method further comprises identifying a user list associated with a topic and including plurality of entries, each entry satisfying the topic and having an identifier associated with a requesting source and further including information about a type of requesting source. The method further comprises linking an entry in the user list to other identifiers using the anonymous linking, and selecting content for delivery to a user device associated with an entry in the user list based on the linking.
US09514435B2	System for targeting specific users to discussion threads The present invention is directed to provide a method and system for targeting individuals and providing a reference to a discussion in a discussion forum. A method is described herein that allows a user of an integrated discussion forum interface to initiate the generation of a direct, navigable reference to a thread or message in the discussion forum to one or more targeted individuals. By generating a direct, navigable reference to the thread or message, the system may advantageously facilitate the directed solicitation of targeted individuals while leveraging the accessibility, reusability, and available knowledge base of a traditional public forum.
US09514434B2	Apparatus and method for automatic work instruction generation An automated method for creating work instructions to manufacture a product. Monitoring for a user input modifying a model for the product is performed. Responsive to detecting the user input modifying the model for the product, a number of work instructions for a modification to the model of the product is identified. The model of the product is displayed with the modification on a display device. The number of work instructions is displayed on the display device in association with the modification of the model of the product.
US09514430B2	Method of handling parcels, and a logistics center for handling parcels A method of handling parcels (2) and a logistics center (1) for handling parcels, use is made of superposable racks (5) and motor-driven shuttle carts (6) that are remotely controlled by a central processing unit (7) to travel in freely guided manner and that are suitable for docking with each rack (5), each parcel (2) is unloaded onto a rack (5) and the destination of the parcel is identified (103), a specific location is assigned (104) to said rack (5) using an outward shipping plan, and said corresponding shuttle cart (6) is caused to move (105) so as to store said parcels (2) side-by-side and in superposed manner, and then, using an inward delivery plan, each rack (5) is docked (110), and each parcel (2) is transferred (111) from said stowage zone (11) to a loading point (3) so that parcels (2) are presented in their order of delivery.
US09514427B2	Graphical interface and input method for allocating an invoice amongst a plurality of accounts A novel graphical interface and input method is provided. In certain implementations, a touch screen interface is provided with a plurality of icons that each represent seats around a table in a restaurant. Each icon is associated with a unique account. Accounts can be easily merged and split by using touch and swipe interfaces with the icons.
US09514426B2	System and method for providing enterprise information technology lifecycle tools synchronization platform The present invention relates to a system and method for integrating and assembling plurality of service delivery tools created on disparate technologies on a product assembly platform. Further, the invention provides a reference architecture and method for orchestrating the assembled plurality of service delivery tools and monitoring the lifecycle activities of the plurality of service delivery tools.
US09514425B2	Method and system for providing user-customized contents A method for providing user-customized contents, includes: receiving contents order information from a user and constructing a contents order information DB; opening the contents order information DB; receiving contents corresponding to the contents order information from a contents provider; and providing the received contents in a user-customized form.
US09514422B2	Virtual queue for a line at a retail store A computer-implemented process can be operated for entering and holding a place for a first customer in a queue while the first customer is waiting to be served at a retail store. The process includes, within a computerized processor, establishing a place in the queue for the first customer, wherein the queue operates to establish among a plurality of customers a customer currently being served by a store employee and an order in which other customers of the plurality will be served. The process further includes displaying upon a portable computerized device of the first customer an indication of a status of the first customer within the queue.
US09514421B2	System and method for decommissioning a motor A motor controller for a motor is described. The motor controller includes a communication device coupled to a memory device. The motor controller is configured to receive, using the communication device, a status query from a client computing device. The motor controller is additionally configured to transmit diagnostic data from the memory device to the client computing device, transmit identification data associated with the motor controller to the client computing device, receive, from the client computing device, a decommission password generated from the identification data, and disable the motor using the decommission password.
US09514420B2	Strobe gating adaption and training in a memory controller A memory controller includes a differential receiver circuitry to receive a differential data strobe signal pair and to generate a first data strobe signal based on the differential data strobe signal pair. The differential data strobe signal pair comprises a first signal and a second signal. The memory controller also includes a single ended receiver circuitry to receive the first signal of the differential data strobe signal pair and to generate a second data strobe signal based on the first signal of the differential data strobe signal pair. The memory controller further includes circuitry to generate a gating signal for gating the first data strobe signal, the circuitry generating the gating signal based on the second data strobe signal.
US09514419B2	Estimating affective response to a token instance of interest utilizing a model for predicting interest in token instances A user may be exposed to multiple token instances representing stimuli that may influence the affective state of the user. Described herein are embodiments of systems, method, and computer programs for estimating affective response to a token instance of interest, selected from among the token instances. The token instance of interest is selected based on attention levels computed utilizing a model for predicting interest in token instances. In one example embodiment, the token instance of interest is a token instance for which attention level of the user is higher than at least one other token instance.
US09514417B2	Cloud-based plagiarism detection system performing predicting based on classified feature vectors Plagiarism may be detected, as disclosed herein, utilizing a database that stores documents for one or more courses. The database may restrict sharing of content between documents. A feature extraction module may receive edits and timestamp the edits to the document. A writing pattern for a particular user or group of users may be discerned from the temporal data and the documents for the particular user or group of users. A feature vector may be generated that represents the writing pattern. A machine learning technique may be applied to the feature vector to determine whether or not a document is plagiarized.
US09514415B2	Method and system for decomposing single-qubit quantum circuits into a discrete basis A target quantum circuit expressed in a first quantum gate basis may be transformed into a corresponding quantum circuit expressed in a second quantum gate basis, which may be a universal set of gates such as a V gate basis set. The target quantum circuit may be expressed as a linear combination of quantum gates. The linear combination of quantum gates may be mapped to a quaternion. The quaternion may be factorized, based at least in part on an amount of precision between the target quantum circuit and the corresponding quantum circuit expressed in the second quantum gate basis, into a sequence of quaternion factors. The sequence of quaternion factors may be mapped into a sequence of quantum gates of the second quantum gate basis, where the sequence of sequence of quantum gates is the corresponding quantum circuit.
US09514414B1	Systems and methods for identifying and categorizing electronic documents through machine learning Computer implemented systems and methods are disclosed for identifying and categorizing electronic documents through machine learning. In accordance with some embodiments, a seed set of categorized electronic documents may be used to train a document categorizer based on a machine learning algorithm. The trained document categorizer may categorize electronic documents in a large corpus of electronic documents. Performance metrics associated with performance of the trained document categorizer may be tracked, and additional seed sets of categorized electronic documents may be used to improve the performance of document categorizer by retraining the document categorizer on subsequent seed sets. Additional seed sets may and categorizations may be iterated through until a desired document categorization performance is reached.
US09514413B1	Framework for finding one or more solutions to a problem In an embodiment, information for use in identifying a plurality of sub-solvers may be acquired. The plurality of sub-solvers may be used in a first attempt to find at least one solution to a problem that may be defined in the acquired information. At least two of the sub-solvers in the plurality of sub-solvers may be of different sub-solver types. The sub-solvers may be identified based on the acquired information. One or more starting points for the identified sub-solvers may be identified and transferred to the identified sub-solvers. One or more outputs, that indicate one or more results associated with the first attempt to find at least one solution to the problem, may be acquired from the identified sub-solvers. One or more sub-solvers may be identified, based on the acquired one or more outputs, for use in a second attempt to find at least one solution to the problem.
US09514412B2	Techniques for detecting deceptive answers to user questions based on user preference relationships A computer-implemented method can include receiving, at a computing device having one or more processors, questions and answers, each question having one or more answers, and each question and each answer being associated with a particular user. The method can include receiving, at the computing device, evaluations of the answers from users. The method can include identifying, at the computing device, at least one of textual and contextual features for each answer to obtain sets of features. The method can include generating, at the computing device, a user preference graph indicating relationships between users associated with at least one of the questions, the answers, and the evaluations. The method can also include detecting, at the computing device, whether each specific answer is a deceptive answer based on its set of features and the user preference graph.
US09514407B1	Question generation in knowledge-based authentication from activity logs An improved technique involves generating KBA questions based on facts from fact sources pointed to by an activity log. A KBA system obtains an activity log from a computer of a user in an organization. For example, the computer records the user's web browsing history. The KBA system then considers each entry in the activity log as a source of facts for deriving KBA questions. In the case of a web browsing history, the KBA system generates facts from web pages that the user visited. The KBA system then derives new KBA questions from the facts so derived.
US09514403B2	Smart card with a security element divided between card body and module The invention concerns a smart card comprising a card body provided with a cavity in which an electronic module incorporating a microelectronic chip is inserted, and at least one security marking designed to authenticate a component of the smart card. A first security marking is disposed on the microelectronic module, and a second security marking is disposed on the card body. The two security markings are linked by a visual identity or matching relationship indicating that the microelectronic module and the card body are original components assembled when the smart card was manufactured.
US09514401B2	Card device and memory card According to one embodiment, a memory card includes a ground layer, a memory, a controller, a first communication unit and a second communication unit. The ground layer is provided with a first region, a second region and an opening between the first region and the second region. The memory is overlapped with the first region. The controller is overlapped with the second region. The second communication unit including a part configured to transmit/receive an electromagnetic wave.
US09514400B2	Information exchange using color space encoded image Embodiments of the present invention include systems, methods, and non-transitory computer program products for information exchange using color space encoded images. A color space encoded image can be displayed, for example on media such as posters, billboards, or paper, or on a display of a first device such as smartphone displays, palmtop displays, camera displays, tablet displays, or e-reader displays. A second device can acquire the displayed encoded image, for example by photographing the image. The second device can decode the color space encoded image or transfer the color space encoded image to a device that decodes the image.
US09514398B2	Securely printing a document Securely printing a document. Receiving, by a server computer, a request from a client computer to allocate a printer satisfying a set of security requirements. Allocating, by the server computer, a printer that will print document data according to the received set of security requirements and that is accessible by the client computer. Transmitting to the client computer, by the server computer, an identification of the allocated printer. Transmitting to the allocated printer, by the server computer, the received set of security requirements. Receiving from the client computer, by the server computer, a printing instruction including document data for printing to the allocated printer. Transmitting to the allocated printer, by the server computer, the received document data to print.
US09514396B2	Printing apparatus, method of controlling the same and storage medium A printing apparatus, when a sheet is fed from a sheet feeding unit in a state where size information indicating the size of sheets stacked in the sheet feeding unit is not stored in a storage unit, detects and stores the size of the sheet during conveyance. The printing apparatus controls the execution of the print processing, without using size information in a case where a print instruction is received in a state where the size information is not stored, and using the size information in a case where the print instruction is received in a state where the size information is stored. Furthermore, the printing apparatus clears the size information stored in the storage unit when a particular key is operated in a state where the size information is stored while print processing is not being executed.
US09514395B2	Method and apparatus for generating or using interaction activity information A method of generating interaction activity information, performed by a device, is provided. The method includes establishing communication with at least one external apparatus; receiving first information about a user selectable function of the external apparatus; and generating second information, based on the first information, about a user selectable function of the device, wherein the user selectable function of the device corresponds to the user selectable function of the external device and can be performed in collaboration with the external device.
US09514393B2	Print method and print device for making a bank card A print method for making a bank card is provided, which includes the following steps: S10, determining print times and print designs each time according to the convex words and/or designs to be printed; S20, fixing the bank card to be printed to a print position; S30: printing the bank card to be printed several times according to the print times and print designs each time in order to form the convex words and/or designs on it. A print device is also provided for making a bank card. The print method and print device for making the bank card can print convex words and/or designs on the surface of the bank card cheaply and efficiently.
US09514386B2	Identifying geographic areas based on change patterns detected from high-resolution, remotely sensed imagery A method, system, and medium are provided for identifying terrestrial objects that have changed in a certain manner. One embodiment of the method includes receiving a query that includes one or more inputs, which are related to 1) a first terrestrial object (“first object”) and 2) source change-detection information that describes change associated with the first object; applying the query to a dataset that includes indexed information that describes the imagery; based on the one or more inputs, receiving a query result by identifying a set of regions in the dataset that are respectively associated with change information that is similar to that of the source change-detection information; and presenting on a presentation device indications of at least a portion of the identified set of regions.
US09514384B2	Image display apparatus, image display method and storage medium storing image display program An image display apparatus includes a display device and a computer configured to execute a program to cause the computer to serve as a display controlling part. The display part displays a first CT image and a second CT image simultaneously. The first CT image and the second CT image represent the same object but taken in different time periods. The display controlling part performs: displaying the first and second CT images simultaneously on the display device according to a first display mode; determining a target portion designated in the first CT image; and changing a display mode of a corresponding portion of the second CT image from the first display mode into a second display mode, the corresponding portion corresponding to the target portion designated in the first CT image.
US09514382B2	Image processing apparatus and image processing method A binarization processing unit generates a binary image by comparing the visual feature of each pixel of an input image with a predetermined binarization threshold and binarizing the value of each pixel of the input image based on the comparison result. The binarization processing unit performs this process while changing the binarization threshold, thereby generating a plurality of binary images. A contour detecting unit calculates the area of a closed region having an overlap between the plurality of binary images, and determines the binarization threshold to be used for detecting a boundary of the corresponding closed region as a contour of an object, based on the area change rate of the corresponding closed region caused by changing the binarization threshold.
US09514381B1	Method of identifying and replacing an object or area in a digital image with another object or area A system and method for object and area detection and replacement in an image includes identifying an object or area in one or more sequential images that form a moving image sequence and replacing some or all of the identified object or areas with another image such that the image looks to be part of the original composition of the original image including lighting, shadows, placement, occlusion, orientation, position, and deformation.
US09514379B2	Sensing device and method used for virtual golf simulation apparatus Disclosed are a sensing device and method used for a virtual golf simulation apparatus in which an image acquired by an inexpensive camera having a relatively low resolution and velocity is analyzed to relatively accurately extract information on physical properties, such as velocity, direction and altitude angle, of a moving ball, and, particularly, in which the moving trajectory of a golf club is relatively accurately calculated from the acquired image to relatively accurately estimate spin of the ball and to reflect the estimated spin of the ball in golf simulation, thereby constituting a virtual golf simulation apparatus having high accuracy and reliability at low costs and further improving reality of virtual golf.
US09514378B2	Space-time modulated active 3D imager Three-dimensional imagers have conventionally been constrained by size, weight, and power (“SWaP”) limitations, readout circuitry bottlenecks, and the inability to image in sunlit environments. As described herein, an imager can illuminate a scene with spatially and temporally modulated light comprising a viewpoint-invariant pattern. The imager can detect diffuse reflections from the illuminated scene to produce a first image. The first image is background-corrected and compared with respect to a known reference image to produce a depth image. The imager can perform in sunlit environments and has improved SWaP and signal-to-noise (SNR) characteristics over existing technologies.
US09514374B2	Smart face redaction in near infrared vehicle windshield images A system and method for redaction of faces in a windshield within an image that includes detecting a windshield within the captured image via a selected detection process, extracting a windshield region from the detected windshield within the image, and selectively applying an obscuration process to at least a portion of the extracted windshield region. A redacted image is then generated obscuring the face or faces in the windshield using the selectively applied obscuration process.
US09514370B1	Systems and methods for automated 3-dimensional (3D) cloud-based analytics for security surveillance in operation areas Systems and methods for cloud-based surveillance for an operation area are disclosed. At least two input capture devices, at least one safety control device and at least one user device are communicatively connected to a cloud-based analytics platform. The cloud-based analytics platform automatically generates 3-Dimensional (3D) surveillance data based on received 2-Dimensional (2D) video and/or image inputs and perform advanced analytics and activates the at least one safety control device based on analytics data from advanced analytics.
US09514368B2	Contextual information of visual media An analysis master control can be configured to derive contextual information of visual media that includes extracted information and extrapolated information. The analysis master control can receive the extracted information characterizing visual media from a recognizer. An information finder can be configured to query a plurality of information sources for information based on the extracted information. The analysis master control can also be configured to match information received from the information sources with the extracted information to form the extrapolated information that characterizes the visual media.
US09514366B2	Vehicle detection method and system including irrelevant window elimination and/or window score degradation This disclosure provides vehicle detection methods and systems including irrelevant search window elimination and/or window score degradation. According to one exemplary embodiment, provided is a method of detecting one or more parked vehicles in a video frame, wherein candidate search windows are limited to one or more predefined window shapes. According to another exemplary embodiment, the method includes degrading a classification score of a candidate search window based on aspect ratio, window overlap area and/or a global maximal classification.
US09514365B2	Image sensor with integrated region of interest calculation for iris capture, autofocus, and gain control An integrated circuit has an image sensor to receive at least one image comprising a plurality of pixels from a camera comprising a lens, a buffer communicatively connected to the image sensor for storing values associated with the plurality of pixels, and a comparator communicately connected to the buffer to locate and identify the iris of a subject, in which locating and identifying the iris of the subject is based on a location of each pixel in a brightest pixel set. A method for locating and identifying an iris in an image includes capturing at least one image of an illuminated subject, determining a brightness value for each of the plurality of pixels, determining a location corresponding to each pixel in a brightest pixel set, and identifying the iris in the at least one image based on the location of each pixel in the brightest pixel set.
US09514363B2	Eye gaze driven spatio-temporal action localization The disclosure provides an approach for detecting and localizing action in video. In one embodiment, an action detection application receives training video sequences and associated eye gaze fixation data collected from a sample of human viewers. Using the training video sequences and eye gaze data, the action detection application learns a model which includes a latent regions potential term that measures the compatibility of latent spatio-temporal regions with the model, as well as a context potential term that accounts for contextual information that is not directly produced by the appearance and motion of the actor. The action detection application may train this model in, e.g., the latent structural SVM framework by minimizing a cost function which encodes the cost of an incorrect action label prediction and a mislocalization of the eye gaze. During training and thereafter, inferences using the model may be made using an efficient dynamic programming algorithm.
US09514359B2	Card art display Providing improved card art for display comprises receiving, by one or more computing devices, an image of a card and performing an image recognition algorithm on the image. The computing device identifies images represented on the card image and comparing the identified images to an image database. The computing device determines a standard card art image associated with the identified image based at least in part on the comparison and associates the standard card art image with an account of a user, the account being associated with the card in the image. The computing device displays the standard card art as a representation of the account.
US09514358B2	Systems and methods for matching and imaging tissue characteristics Systems and methods for matching a characteristic of multiple sectors of a moving tissue to verify an overlap thereof are disclosed herein. In an exemplary method, tissue data for at least a first sector and a second sector of a moving tissue is acquired. A characteristic of at least a portion of the first and second sectors is estimated from the acquired tissue data, and the estimated characteristics are matched to verify whether a portion of the first sector overlaps with a portion of the second sector. Estimating can include estimating a displacement such as an axial displacement and/or lateral displacements. Estimating can further include estimating a strain, a velocity, a strain rate and/or a stiffness or equivalent.
US09514343B1	Barcode inventory and payment management system A barcode and chip inventory and payment management system is disclosed. A product information label with a bar code and an embedded barcode chip incorporating an antitheft device is fixed to each product shipped with the embedded chip containing an individual product code and bank account routing data. The chip may be programmed to further contain pricing and markup information so that when the product is purchased (or returned) and scanned, the money involved is automatically transferred from the customer to the correct accounts and the item is added to or subtracted from the appropriate inventory.
US09514337B2	Card reader and detection mechanism A card reader which is attached and used in a host device may include a detection switch disposed on the card reader side attaching face and structured to detect whether the card reader has been detached from the host device; and a first sealing member disposed so as to be sandwiched between the host device side attaching face and the detection switch, the first sealing member covering the detection switch and being structured to prevent penetration of water to the detection switch. The detection switch may include a pressed part and is structured to turn to “ON” or “OFF” when the pressed part is pressed. The first sealing member may be formed with a pressing protruded part structured to press the pressed part.
US09514335B2	Anti-tamper device An anti-tamper device for preventing data from being tampered with by an unauthorized person includes a top cover, a bottom cover, a printed circuit board (PCB), and a signal connector. The bottom cover is assembled to the top cover. The PCB is provided with a plurality of pads. The signal connector is fixed to the top cover, and the signal connector defines a plurality of terminal grooves. At least one of the terminal grooves receives a terminal. When the terminal is electrically connected with the pads for the first time, a first relation signal is generated for initializing the anti-tamper device. When the terminal is electrically disconnected from the pads and the terminal is electrically connected with the pads for the second relation signal. If the second relation signal is different from the first relation signal, the anti-tamper device is prevented from being initialized.
US09514332B2	Notification and privacy management of online photos and videos Systems and methods for notification and privacy management of online photos and videos are herein disclosed. According to one embodiment, a computer-implemented method includes detecting a first feature from a first image belonging to an image source. The first image includes a tag. The computer-implemented method further includes determining a first feature location of the first feature, determining a first tag location of the tag, extracting a first feature signature from the first feature based on a relationship between the first feature location and the first tag location, detecting a second feature from a second image belonging to the image source, extracting a second feature signature from the second feature, performing a first comparison between the first feature signature and the second feature signature, and deriving a first similarity score based on a result of the first comparison.
US09514331B2	Privacy model for shared collections of content on a social networking system A social networking system user creates an album including a shared collection of content (a “shared album”) and associates a privacy model with the shared album. The privacy model specifies additional users of the social networking system authorized to access content items in the shared album and specifies types of actions users authorized to access content items in the shared album are permitted to perform to content items in the shared album. Notifications describing actions associated with content items in a shared album may be presented to users authorized to access the shared album. The social networking system may prompt a user to create a shared album containing based on actions performed by the user or performed by connected to the user.
US09514324B1	Approaches for restricting access to data A computer-implemented method includes restricting access to customer data to certain geographic regions authorized by the customer. The restriction can be managed by associating policy information with the customer data that identifies the geographic regions authorized by the customer. Resources attempting to access the customer data can evaluate the policy information associated with the customer data with respect to the geographic location in which the resource is located to determine whether the resource is permitted to access the customer data. The restriction can also be managed by encrypting the customer data with a cryptographic key that corresponds to the customer and/or the authorized geographic regions.
US09514323B2	RFID system with segmented RFID data ownership A method according to one embodiment includes receiving data from a radio frequency identification (RFID) tag; receiving waypoint information relating to the RFID tag; setting ownerships of discrete portions of the data based at least in part on the waypoint information; allowing an owner of one of the discrete portions of the data to view the discrete portion of the data owned by the owner, or derivative thereof; and not allowing the owner to view discrete portions of the data that are not owned by the owner.
US09514317B2	Policy-based trusted inspection of rights managed content An embodiment includes a method executed by at least one processor comprising: initializing first and second secure enclaves each comprising a trusted software execution environment that prevents software executing outside the first and second secure enclaves from having access to software and data inside the first and second secure enclaves; the first secure enclave (a)(i) inspecting a policy, (a)(ii) authenticating the second secure enclave in response to inspecting the policy; and (a)(iii) communicating encrypted content to the second secure enclave in response to authenticating the second secure enclave; and the second secure enclave (b)(i) decrypting the encrypted content to produce decrypted content, and (b)(ii) inspecting the decrypted content. Other embodiments are described herein.
US09514313B2	Techniques for secure data extraction in a virtual or cloud environment Techniques for secure data extraction in a virtual or cloud environment are presented. Desired data from a Virtual Machine (VM) or an entire VM is extracted and encrypted with a key. This key is sealed to a machine or a group of machines. The encrypted data is then migrated and successfully used on startup for instances of the VM by having the ability to access the sealed key (and unsealing it) to decrypt the encrypted data.
US09514311B2	System and method for unlocking screen Disclosed are a method for unlocking a screen and a system for installing a screen. It is determined whether to unlock the screen by calculating an angle between a starting position and a current position of a touch point on the screen with the unlocking reference point as a vertex of the angle. With a technical solution of the disclosure, no path or destination position for screen unlocking is defined, with more casual operation, enhanced user experience, and simpler setting, thereby facilitating usage. Moreover, unlocking by mistake can also be prevented by the setting.
US09514309B1	Systems and methods for protecting files from malicious encryption attempts A computer-implemented method for protecting files from malicious encryption attempts may include (1) detecting an attempt to alter a file, (2) identifying at least one characteristic of the attempt to alter the file, (3) determining, based on the characteristic of the attempt to alter the file, that the attempt to alter the file represents a malicious attempt by a third party to encrypt the file, and (4) performing a security action in response to determining that the attempt to alter the file represents a malicious attempt by the third party to encrypt the file. Various other methods, systems, and computer-readable media are also disclosed.
US09514305B2	Code pointer authentication for hardware flow control Techniques for enforcing flow control of a software program in a processor are provided. An example method according to these techniques includes analyzing program code of the software program to identify a code pointer in the program code, generating an authentication tag based on the code pointer, and modifying the code pointer in the program code with the authentication tag to generate a tagged code pointer.
US09514304B2	Methods and apparatus to facilitate secure screen input Methods, apparatus, systems and articles of manufacture are disclosed to facilitate secure screen input. An example disclosed system includes a user interface (UI) manager to generate a UI comprising a quantity of ordinal entry points, each one of the quantity of ordinal entry points comprising a repeating selectable pattern, an ordinal sequence generator to generate an initial randomized combination of the quantity of ordinal entry points, the randomized combination stored in a trusted execution environment, and an offset calculator to calculate a password entry value by comparing an offset value and direction value retrieved from the UI with the initial randomized combination of the quantity of ordinal entry points.
US09514298B2	Passcode determination or verification A mechanism is provided for determining and verifying a passcode is disclosed. The mechanism defines a passcode by a set of rules, each representing the position of a target key relative to a reference key on a given keyboard. The mechanism receives user selection of a passcode subset of the set of passcode pattern rules for representing a passcode comprising a pattern of keys on the keyboard. The mechanism stores the passcode subset of rules for subsequent verification against a user input passcode for controlling access to a resource.
US09514293B1	Behavioral profiling method and system to authenticate a user Methods and systems for behavioral profiling, and in particular, utilizing crowd-managed data architectures to store and manage that profile, are described. In some embodiments, a method includes observing behavioral characteristics of user interactions during a current session with the user through one of a plurality of channels. Variations between the behavioral characteristics of the user interactions observed during the current session and a behavioral profile previously developed based on prior usage patterns of the user through the plurality of channels are identified, in real-time or near real-time.
US09514292B2	Multi-factor authentication using a combined secure pattern A method and system for multi-factor authentication. The method involves combining a plurality of authentication patterns into a combined secure pattern by inserting one or more spacing states into the one authentication pattern at locations based on the values of the another authentication pattern.
US09514288B2	Information processing device, information processing method, program and storage medium The present invention is to ensure information safety of a user of service using API. An information processing device issues a service code in response to an API use request. The API use request relates to service using an application program that uses API and is transmitted from an application provider device. The information processing device makes service identification information and use API information correspond to the service code and registers the service identification information, the use API information, and the service code. According to user-specific information from the application provider, unapproved license information is issued for each application user. Approval of this license information by the application user side registers the license approval information. At service execution, authentication is performed based on the service code and the license information. When the authentication is passed, API use is permitted.
US09514287B2	Automated device authorizaton and deauthorization A process verifies, with a processor, a user account for content delivery with a rolling slot configuration. The rolling slot configuration has a maximum quantity of available slots for devices authorized to receive content. The rolling slot configuration has a plurality of ordered slots that are ordered based upon priority. The process receives a request for content from the user account at a device. The process automatically registers the device in an available slot of the rolling slot configuration based upon a determination of slot availability. The process authorizes the device to play content associated with a user entitlement. The process automatically deauthorizes the device to play the content based upon a deauthorization parameter being met. The process removes a registration of the device from the available slot. The process moves a registration of an additional device with a higher priority than the device to the available slot.
US09514285B2	Creating stack position dependent cryptographic return address to mitigate return oriented programming attacks A computing device includes technologies for securing return addresses that are used by a processor to control the flow of execution of a program. The computing device uses a cryptographic algorithm to provide security for a return address in a manner that binds the return address to a location in a stack.
US09514283B2	Dialysis system having inventory management including online dextrose mixing A peritoneal dialysis system includes: a plurality of automated peritoneal dialysis (“APD”) machines; and a server computer in communication with the APD machines, the APD machines programmed to inform the server computer of how much dialysate is consumed over a first delivery period, the server computer configured to use the amounts consumed to determine dialysate delivery amounts for the plurality of APD machines for a second delivery period.
US09514275B2	Diagnostic imaging simplified user interface methods and apparatus Apparatus includes an imaging system with a user interface, and a hospital radiological information system (RIS) coupled to the imaging system such that the user interface allows for bi-directional data transfer between the imaging system and the RIS.
US09514265B2	Congestion aware layer promotion Embodiments relate to managing layer promotion of interconnects in the routing phase of integrated circuit design. An aspect includes a system to manage layer promotion in a routing phase of integrated circuit design. The system includes a memory device to store instructions, and a processor to execute the instructions to identify a set of candidate interconnects for layer promotion, score and sort the set of candidate interconnects according to a respective score to thereby establish a respective rank, assess routing demand and resource availability based on layer promotion of the set of candidate interconnects, and manage the set of candidate interconnects based on the respective rank and the resource availability, the processor assessing the routing demand and resource availability and managing the set of candidate interconnects iteratively, wherein the processor, in at least one iteration, generates a second set of candidate interconnects by reducing the set of candidate interconnects.
US09514264B1	Layouts of transmission gates and related systems and techniques Layouts of transmission gates and related techniques and systems are described. An integrated circuit may include first and second transmission gates disposed in a column, and metal wires. The first transmission gate includes first and second control terminals, and the second transmission gate includes first and second control terminals. The metal wires extend between the first and second transmission gates in a direction substantially orthogonal to the column, and include a first control wire coupled to the first control terminals of the first and second transmission gates.
US09514259B2	Logic configuration method for reconfigurable semiconductor device Provided is a logic configuration method for a semiconductor device having a plurality of memory units provided with a plurality of memory cells; each memory unit is configured to store truth table data in the memory cells thereof, the truth table data being for outputting a logic value in response to an address input, and to operate as a logic circuit; the memory units have n (where n is 2 or a higher integer) times two pairs of an input line and an output line; the n times two output lines from one memory unit among the memory units are connected to the n input lines of two other memory units; and the logic configuration method generates, on the basis of the circuit description describing the circuit configuration, a netlist having circuit connection information, extracts a logic cone from the netlist, and generates truth table data for the plurality of memory units, which constitute the logic cone, in the memory unit stage number corresponding to the number obtained by dividing the number of input lines to the logic cone by n/2.
US09514258B2	Generation of memory structural model based on memory layout A memory structural model is generated directly from memory configuration information and memory layout information in an efficient manner. Information on strap distribution is generated by analyzing configuration information of the memory and the corresponding memory layout. Information on scrambling of addresses in the memory layout is generated by programming the memory layout with physical bit patterns, extracting corresponding logical bit patterns and then analyzing the discrepancy between the physical bit patterns and the logical bit patterns. The strap distribution information and the address scrambling information are combined into the memory structural model used for designing an efficient test and repair engine.
US09514255B2	Discrete element method A discrete element method for modelling granular or particulate material, the method including a multiple grid search method wherein the multiple grid search method is a hierarchical grid search method, and wherein entities, such as particles and boundary elements, are allocated to cells of respective grids based on size. The search method further includes: (a) performing a search of cells in a first of the grid levels to determine pairs of entities which satisfy predetermined criteria to be included in a neighbor list for which both entities belong to the first grid level; (b) mapping each nonempty cell in the first grid level to each of the other grid levels, determining neighboring cells in each of the other grid levels and determining all pairs of entities belonging to a pair of levels that satisfy the predetermined criteria for inclusion in the neighbor list; and (c) repeating (a) and (b) for all grid levels.
US09514246B2	Anchored patterns A method and apparatus relate to recognizing anchored patterns from an input stream. Patterns from a plurality of given patterns are marked as anchored patterns. An anchored state tree for the anchored patterns of the plurality of given patterns is built, including nodes representing a state of the anchored state tree. For each node of the anchored state tree, a failure value equivalent to a node representing a state in an unanchored state tree representing unanchored patterns of the plurality of given patterns is determined.
US09514244B2	Dynamic assignment of business logic based on schema mapping metadata Provided are techniques for dynamic assignment of business logic based on schema mapping metadata. A first transformation is performed using a simplified map and a structural transformation map that maps attributes between a source system and a target system to generate simplified map data that includes source attribute and target attribute pairs. A document that includes combined data is generated using the simplified map data and source system metadata containing contextual values of the source system. A second transformation is performed to generate transformed contextual metadata containing contextual values for the target system using a contextual metadata transformation map and the combined data.
US09514243B2	Intelligent caching for requests with query strings An intelligent caching system is described herein that intelligently consolidates the name-value pairs in content requests containing query strings so that only substantially non-redundant responses are cached, thereby saving cache proxy resources. The intelligent caching system determines which name-value pairs in the query string can affect the redundancy of the content response and which name-value pairs can be ignored. The intelligent caching system organically builds the list of relevant name-value pairs by relying on a custom response header or other indication from the content server. Thus, the intelligent caching system results in fewer requests to the content server as well as fewer objects in the cache.
US09514240B2	System to modify a website for search optimization A system to optimize a website for a search of a topic includes a processor, a memory, and instructions to cause the processor to receive at least one term related to the topic, and to receive web objects pertaining to the website to be optimized. The system is to calculate at least one metric pertaining to the at least one term and the web objects.
US09514235B2	Web page authoring tool for structured documents A web page is composed using a browser that displays an authoring web page containing an authoring tool embedded in the authoring web page. The authoring web page, as displayed in a browser window, includes a web page editing region that displays a web page under construction. The web page editing region further includes one or more user-specified instances of structured fields, each instance responsible for hosting content entered directly by the web page author through the browser window or identified by the web page authoring using the authoring tool. A composed web page is published, for example on the Internet. Thereafter, the composed web page can be rendered in a browser window of any client computer or device in a style consistent with the user-entered content in the web page editing region.
US09514229B2	System and method for quality of experience aware media search and recommendation with unified portal A network element comprising a processor configured to receive a plurality of search responses from a plurality of media content service providers associated with a search request triggered by the search request, and rank the search responses based on maximizing an end user's quality of experience (QoE). Included is a network element comprising a processor configured to receive a plurality of media content from a plurality of media content service providers, store the plurality of media content for a plurality of end users, receive a media content search request from a user terminal, rank the media content based upon maximizing the user terminal's QoE. Also included is a method comprising requesting media content from a plurality of media content service providers on behalf of a user terminal, receiving data associated with the media content from the plurality of media content service providers and aggregating the media content data.
US09514225B2	Video recording apparatus supporting smart search and smart search method performed using video recording apparatus A video recording apparatus includes: an object classifier configured to classify an object which is included in an input video and related to a detected event, according to a type of the object; an object color extractor configured to extract a representative color of the object; and a search color storage configured to transform the representative color into a search color and store the search color as color information to be used for searching the object or the detected event from the input video.
US09514224B2	Systems and methods for sharing audio feeds Systems and methods are disclosed for enabling sharing of audio feeds. One method includes receiving, from a user over a network, a request to add an audio feed to a collection managed by the user; storing, in a database, a URL of the audio feed in relation to the collection; receiving, from the user over the network, a request to share the collection; and generating an RSS URL of the collection by searching the database for URLs of audio feeds stored in relation to the collection.
US09514223B1	Synonym identification based on categorical contexts Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for training recognition canonical representations corresponding to named-entity phrases in a second natural language based on translating a set of allowable expressions with canonical representations from a first natural language, which may be generated by expanding a context-free grammar for the allowable expressions for the first natural language.
US09514222B2	Accessing stored electronic resources A method for configuring a computer system to provide access to stored electronic resources may be described. The method can include determining a topic framework between stored electronic resources and topic names by determining topic names for topic framework by generating topic names based on names assigned to storage sets and generating topic names based on attributes of resources. Further forming associations between resources and topic names by associating resources with topic names generated based a storage set and associating resources having attributes with topic names generated based on attributes of the resources. Also, storing the framework to provide structure so resources can be accessed using the topic names and using the topic framework to present a group of stored resources associated with topic names so that the group of resources can be selected for access.
US09514220B1	Generating content placement criteria based on a search query Systems and methods of providing information via a computer network are provided. A data processing system can receive a search query via the computer network. Search results can be identified responsive to the search query and provided for display at a computing device. The search results can include content items. The data processing system can receive a request to generate placement criteria responsive to display of the search query at the computing device. Based at least in part on the request, the data processing system can determine a first criterion based on the search query, and a second criterion based on at least one of the search results and the content items. Based at least in part on this data, the data processing system can generate the placement criteria, which can include at least one of the first criterion and the second criterion.
US09514214B2	Deterministic progressive big data analytics A plurality of data items that are annotated with progress markers may be obtained. The progress markers may indicate progress points associated with atemporal processing progress of the respective data items. Deterministic, massively parallel, progressive processing may be initiated on the plurality of data items on a plurality of devices, the progress markers indicating which of the plurality of data items are to be incorporated into results of the progressive processing, the progress markers further indicating an ordering for incorporation of the respective data items into the results.
US09514212B2	Reallocating jobs for checking data quality The invention provides for checking data quality of data of an application program by a data quality management system. At least one of a plurality of jobs are executed for evaluating the data for compliance with one or more quality criteria. The runtime behavior of the at least one executed job is monitored to determine a current runtime behavior of the executed job. The monitored job is reclassified by reallocating the job to a job set representing the determined current runtime behavior.
US09514210B2	Methods and systems for a copy-offload operation Methods and systems for a copy-offload operation are provided. A soft range lock is placed for a data container for generating a token for a copy-offload operation for copying the data container from a source location to a destination location, where presence of the soft range lock indicates that content of the data container has not changed during the copy-offload operation. A token for the copy-offload operation represents the content of data container and includes information regarding the soft range lock. The token with the soft range lock information is provided to the client that requests the copy-offload operation. If the soft range lock exists, then the data container is copied without using a point in time copy of the data container.
US09514209B2	Data processing method and data processing device Embodiments of the present invention provide a data processing method and a data processing device. If to-be-compressed data includes a data fragment that is the same as a first half of a variable block in a duplicate database and is different from a second half of the variable block, a new variable block with granularity smaller than that of the matching variable block can be generated, and the new variable block is added to the duplicate database. The granularity of the new variable block is smaller, which increases the probability of subsequent to-be-compressed data matching the updated duplicate database, thereby improving compression efficiency.
US09514206B2	System and method for providing content list through social network service Provided are a system and method for providing a content list through a social network service (SNS). A server for providing a content list to a device using an SNS, the server includes: a content receiver that receives content from a first device; a content list generator that generates a content list according to categories by using metadata included in the received content; and a content list provider that provides a content list of a category selected by a second device to the second device.
US09514205B1	Systems and methods for importing data from electronic data files Computer implemented systems and methods are disclosed for importing data from electronic data files. In accordance with some embodiments, source electronic data files are received at a data importation system and managed by the data importation system. The data importation system may apply detector/transformer plugins to the received source electronic data files to transform the files for importation into one or more data analysis systems and/or databases. The data importation system may also receive user inputs for mapping source electronic data files to transformation templates. The inputs may include, for example, an assignment of a file format to the source electronic data file, identification of a file type identifier associated with the source electronic data file, and a mapping of a the source electronic data file to a transformation template. The data importation system may store the received inputs as a file type profile in a database.
US09514204B2	Mobile digital property portfolio management system A mobile property portfolio management system provides the capability of generating, maintaining, searching and displaying property portfolio data from a mobile device such as a smartphone (e.g., iPhone), tablet (e.g., iPad) or any other mobile computing device. The property portfolio management system comprises a mobile or client portion, a central or server portion and optional satellite offices. The system comprises software that runs on one or more server computers as well as client or user side software that can be realized as a standalone software application or “app” that runs on the client device (e.g., desktop, mobile device, tablet, etc.) or entirely in a standard web browser. The property portfolio management system in effect provides a digital version of a property portfolio with easy access to portfolio data for both internal users and public users and is particularly useful when realized on a tablet or mobile device.
US09514199B1	Sorting and pagination of content item streams A system and machine-implemented method including receiving a request for a set of content items within a session, identifying, in response to the request, one or more content items, determining if the session is associated with a continuation token, wherein the continuation token provides information regarding the content items provided for display during the session, generating a continuation token for the session when the session is not associated with a continuation token, providing at least one of the one or more content items for display and updating the continuation token with information regarding the at least one of the one or more content items provided for display and a time stamp.
US09514197B2	System and method of selecting events or locations based on content Systems and methods of returning location and/or event results using information social media content are provided. One or more social networking servers are accessed to retrieve social media content. One or more items within the social media content are then identified. These items may then be categorized. Information about the categories of the one or more items are stored in a database storing information about locations or events. A search query for a location or event may be received, and results for the search query may be selected by accessing the database and utilizing the information about locations or events as well as the information about the categories of the one or more items. The results may then be returned to a user device for display.
US09514190B2	Question answer system using physical distance data A question relating to an individual is received and context from the question is extracted. Subject matter criteria can be identified from the context of the question. A database containing history data that includes recorded positional data for physical objects relative to the location of the individual at the time of recording can be accessed and relevant physical objects from the history data can be identified based upon the subject matter criteria. A set of answers can be generated for the question from a corpus of data and ranked based upon the identified physical objects and physical distance between the individual and the relevant physical objects.
US09514188B2	Integrating map-reduce into a distributed relational database A computer readable storage medium includes executable instructions to define a map-reduce document that coordinates processing of data in a distributed database. The map-reduce document complies with a map-reduce specification that integrates map-reduce functions with queries in a query language. The operations specified by the map-reduce document are executed in the distributed database.
US09514186B1	User-list management The subject matter of the disclosure is embodied in a method that includes identifying a user-list which is based on owned or permissioned data, wherein the user-list is associated with a corresponding owner database. The method also includes providing an application programming interface (API) configured to communicate with the owner database, and receiving, from the owner database through the API, metadata related to the user-list. The metadata at least includes data describing a category for the user-list. The method further includes storing in a searchable database a user-list identifier corresponding to the user-list and the associated metadata, and providing a user-interface that includes the user-list identifier and the corresponding associated metadata. The user-interface is configured to receive one or more management instructions related to the user-list from a user-list subscriber.
US09514185B2	Answering time-sensitive questions A method providing an answer to an input question containing at least one time-sensitive word or at least one time-sensitive phrase using natural language processing (NLP) is provided. The method may include receiving the input question. The method may also include performing natural language processing (NLP) analysis on the input question to extract a required value phrase. The method may further include forming at least one mathematical equation based on the extracted required value phrase. Additionally, the method may include forming at least one interim question based on the extracted required value phrase. The method may further include solving the at least one formed mathematical equation and the at least one formed interim question. The method may also include narrating the answer to the input question in natural language based on the solved at least one interim question or the solved at least one mathematical equation.
US09514181B2	Calculation expression management The invention relates to calculation expression management. In general terms, a calculation expression is a union of variables, constants, operators functions, delimiter characters and other possible elements, which can be used to product a result. A sample calculation expression is as follows: “23+A(2+B+C)”. The uses of calculation expressions include the creation of formulae, the formation of strings and the implementation of searches for databases. The invention facilitates the implementation of sophisticated calculation expressions. For said purpose, the invention consists in constructing and evaluating calculation expressions from graphical structures representing trees. The graphical structure scan be of various different types.
US09514176B2	Database update notification method An information processing device includes an access requesting unit, an access type determination unit, a notified party information acquisition unit, and a notifying unit. The information processing device is able to access a notified party information storage unit that stores information of a notified party in association with location information of particular data stored in a database server. The access type determination unit determines whether or not an access request issued by the access requesting unit is an access request relating to updating. If the issued access request is an access request relating to updating, the notified party information acquisition unit acquires information of a notified party corresponding to location information of data to be updated by the access request, from the notified party information storage unit. The notifying unit gives notice to a notified party specified in the acquired information of the notified party.
US09514173B2	Real-time index consistency check A real-time index system is provided for maintaining the consistency of an index of a database. The real-time index system can receive data associated with an inconsistency detected in the index, compute an index key value from the received data, and obtain the index record and data record associated with the computed index key value. The real-time index system can further compare the data in the data record with the corresponding data in the index record to identify a mismatch in data between the data in the index record and the data in the data record. The real-time index system can maintain the consistency of the index by modifying a portion of data in the index record to be consistent with a corresponding portion of data in the data record.
US09514168B2	Method and system of implementing a database index in shared memory In one exemplary embodiment, a method includes allocating an arena block of a shared memory of a database node server. The arena block is divided into one or more slots. The one or more slots include a discreet and constant area of memory within the arena block. Each slot is assigned a constant-memory address relative to an arena-block's shared memory address. The index is implemented as a red-black tree data structure. Each red-black tree node is mapped to a slot. Each red-black-tree node is provided a pointer to one or more neighbor nodes. The index stored in shared memory can be used during a ‘warm’ rebooting process.
US09514166B2	Flexibly performing allocations in databases Allocation within a database environment is performed by processing a sequence of steps, each of which is described by an allocation processing block. The allocation processing block receives three inputs (input tables or input view) and computes a result. Related apparatus, systems, techniques and articles are also described.
US09514160B2	Automatic recovery of a failed standby database in a cluster A method, system, and computer program product. The method for non-intrusive redeployment of a standby database facility comprises configuring a database system having a shared lock manager process to synchronize two or more concurrent access instances, then granting lock requests for access to a cache of database blocks. At some moment in time, the shared lock manager process may fail, and a monitor process detects the failure or other stoppage of the shared lock manager process. A new shared lock manager process and other processes are started, at least one of which serves for identifying the database blocks in the cache that have not yet been written to the database. The identified blocks are formed into a recovery set of redo operations. During this time, incoming requests for access to the cache of database blocks are briefly blocked, at least until the recovery set of redo operations has been formed.
US09514154B2	Virtual file system interface for communicating changes of metadata in a data storage system Embodiments of the invention relate to a virtual file system for communicating changes in metadata associated with data archived in a data storage system to applications. An aspect of the invention concerns a system that comprises a virtual file system for storing metadata files wherein each metadata file is associated with an archived data file, and a virtual file system interface coupled to the virtual file system for exposing changes in the metadata files to the applications.
US09514153B2	Virtual attribute federation system The present invention may comprise a system and method for a Virtual Attribute Federation System (VAFS) and may be composed of a Virtual Attribute Federation Manager (VAFM) and a system of Virtual Attribute Enabled Directories (VAED) modified to accept federation of virtual attributes. The VAFM produces signed and trusted calculation methods and coordinates a synchronized dispersal of these methods to the VAEDs. The VAEDs may have local mappings which allow for federation-time configuration of the calculation methods.
US09514150B2	Automatic WORM-retention state transitions Example embodiments relate to automatic WORM-retention state transitions. In example embodiments, a storage computing device may detect a request to access, via a file system, a file that is associated with a first retention state. The first retention state may indicate either a first type of WORM-retention protection for the file or no WORM-retention protection for the file. The storage computing device may determine, in response to the request, that the file should be designated with a second retention state. The second retention state may indicate a second type of WORM-retention protection for the file. The determination may be based on a retention policy file that is tightly integrated with the file system and metadata of the file. The storage computing device may transition the file (e.g., by communicating with the file system) to be associated with the second retention state instead of the first retention state.
US09514146B1	System and method for improving data compression of a storage system in an online manner Techniques for improving data compression of a storage system in an online manner are described herein. According to one embodiment, in response to a sequence of data to be stored, the sequence of data is partitioned into a plurality of data chunks according to a predetermined chunking algorithm. A sketch for each of the data chunks is generated based on one or more features extracted from the data chunk. Each of the data chunks of the sequence of data is associated with one of a plurality of groups based on the sketch, wherein each group is represented by a sketch. The data chunks of each group are compressed and stored in a compression region of the storage systems, such that similar data chunks are compressed and stored in the same compression region.
US09514144B2	Method and apparatus for scalable events handling in a multi-platform system A method for event handling in a multi-platform system, comprising acquiring an event of a file access from the multi-platform system, processing the event taking account of an auxiliary data to decide an action and activating the action, and an apparatus for performing the same.
US09514143B2	Data management system with console module A data management system that is enabled such that the user can select a data source node, a repository and a data path, choose policies for each and distribute the policies to be managed by the management system.
US09514142B2	Memory device and method for content virtualization A memory device and method for content virtualization are disclosed. In one embodiment, a plurality of directories are created in the memory of the memory device, wherein each of the plurality of directories points to a same storage location of the digital content. In another embodiment, a first header for the digital content is stored in each of the different directories, wherein the first header comprises information about where to find the digital content in the memory. In yet another embodiment, the memory device comprises circuitry that receives an identification of a host device in communication with the memory device and reorganizes a directory structure of the memory in accordance with the identification of the host device, wherein the reorganization results in the digital content appearing to be located in a directory expected by the host device.
US09514141B2	Memory device and method for content virtualization A memory device and method for content virtualization are disclosed. In one embodiment, a plurality of directories are created in the memory of the memory device, wherein each of the plurality of directories points to a same storage location of the digital content. In another embodiment, a first header for the digital content is stored in each of the different directories, wherein the first header comprises information about where to find the digital content in the memory. In yet another embodiment, the memory device comprises circuitry that receives an identification of a host device in communication with the memory device and reorganizes a directory structure of the memory in accordance with the identification of the host device, wherein the reorganization results in the digital content appearing to be located in a directory expected by the host device.
US09514137B2	Hybrid garbage collection Disclosed is a method for hybrid garbage collection of objects in a file system. An example method includes associating, with each object in the file system, a reference counter, an expiration time, and a version identifier. The object is can be kept in the file system while the reference counter of the object is non-zero. After determining that the reference counter of the object is zero, the object can be kept in the file system up to the expiration time associated with the object. When a reference referring to the object is deleted, the expiration time of the object is updated to the latest of the expiration times of the object and the reference. Furthermore, the object can be kept in the file system while the version identifier of the object is larger than a predetermined version number.
US09514133B1	System and method for customized sentiment signal generation through machine learning based streaming text analytics Systems and methods may provide customized integrated indexes and visualization. Sentiment analytics may be based on natural language processing techniques. Users may select from among a range of indexes that reflect a variety of sources. Text scoring metrics or indices may incorporate frequency of mention, link to broker action, sentence location of first mention, etc. Depending on the temporal and sentiment characteristics of interest, the user may select from a range of news sources, research reports, analysts, social media sources, and may assign a customized weight value to each source. The scores may then be merged. After scoring, the user may be presented with news links directly from sentiment indexes (e.g., from top ranking in terms of sentiment scores, etc.). Advanced visualization capabilities may provide output for users to assist in decision making processes.
US09514132B2	Secure data migration in a dispersed storage network A method begins by a dispersed storage (DS) processing module identifying a candidate dispersed storage (DS) unit of a dispersed storage network (DSN). In response to a data migration request, the method continues with the DS processing module receiving a migration receptiveness message from the candidate DS unit. In response to a data migration reference message, the method continues with the DS processing module receiving, from another DS unit of a set of DS units, a migration reference response that includes an indication of storage utilized by the other DS unit. The method continues with the DS processing module determining a storage utilization of the candidate DS unit based on the migration reference response and when the determined storage utilization compares favorably to the reported storage utilization, enabling transfer of data from a DS unit of another set of DS units to the candidate DS unit.
US09514128B2	System and method to facilitate translation of communications between entities over a network A system and method to facilitate translation of communications between entities over a network are described. Multiple predetermined language constructs are communicated to a first entity as a first transmission over the network. Responsive to selection by the first entity of a language construct from the predetermined language constructs, a translated language construct corresponding to the selected language construct is identified. Finally, the translated language construct is communicated to a second entity as a second transmission over the network.
US09514127B2	Computer implemented method, program, and system for identifying non-text element suitable for communication in multi-language environment A computer implemented method, a program, and a system for effectively providing versatile non-text information suitable for use in a multi-language environment. The method includes the steps of: receiving search results of a database using a search criterion in a certain language and a search criterion in another language corresponding to the search criterion in which specific language attributes are associated with non-text elements that are included in the search results; scoring the non-text elements included in the search results depending on a similarity to another element with which a different language attribute is associated; and identifying at least one of the non-text elements included in the search results on the basis of the scores.
US09514126B2	Method and system for automatically detecting morphemes in a task classification system using lattices The invention concerns a method and corresponding system for building a phonotactic model for domain independent speech recognition. The method may include recognizing phones from a user's input communication using a current phonotactic model, detecting morphemes (acoustic and/or non-acoustic) from the recognized phones, and outputting the detected morphemes for processing. The method also updates the phonotactic model with the detected morphemes and stores the new model in a database for use by the system during the next user interaction. The method may also include making task-type classification decisions based on the detected morphemes from the user's input communication.
US09514124B2	Extracting and recommending business processes from evidence in natural language systems A natural language question and answer system analyzes a question to determine key characteristics (such as focus and lexical answer type), and matches those characteristics to business processes from business process repositories. The matching business processes are ranked and at least one is presented as a recommended answer to the user. The system can offer the user a trigger to invoke the particular business process. The analysis includes examining a user profile to determine an attribute relevant to the question, and further includes named entity searching and fuzzy string matching against the business process repositories. Each business process in a repository is designated as either idempotent, non-binding or retrieve-only. The matching can include performing a factorial LDA algorithm on both extracted named entities and latent factors of the business processes in the repositories.
US09514123B2	Multi-user search system with methodology for instant indexing A multi-user search system with methodology for instant indexing. In one embodiment, for example, a system for instant indexing includes a token store storing sets of tokens for current versions of documents. The system further includes a tokenizer server configured to tokenize new versions of the documents and to generate sets of tokens for the new versions of the documents, an instant indexer configured to determine tokens to use to index the documents based on identified differences between the sets of tokens for the new versions of the documents and the sets of tokens for the current versions of the documents, and to generate index mutations including the tokens to use to index the documents, an index mutation journal configured to store the generated index mutations in association with timestamps, and an index mutation server configured to provide, to index servers, from the index mutation journal, generated index mutations for the index servers that are associated with timestamps that are newer than specified timestamps.
US09514121B2	Custom dictionaries for E-books A custom dictionary is generated for an e-book. A dictionary management system receives a custom dictionary request from a user client operated by a user, the custom dictionary request identifying the e-book and including dictionary management information describing the user. The dictionary management system chooses a group reader profile that has an associated group reading score for the user based on the dictionary management information and candidate words are identified in the identified e-book for inclusion in the custom dictionary. The dictionary management system selects words for inclusion in the custom dictionary from among the candidate words responsive to the associated group reading score for the chosen group reading profile. The dictionary management system generates the custom dictionary using the selected words, and provides the generated custom dictionary to the user client.
US09514118B2	Method, system and computer program for generating electronic checklists The invention comprises a method, system and computer program for database implementation of electronic checklists. The invention implements using at least one processor, the steps of (i) displaying at a user interface, a first electronic checklist template within a template editor (ii) defining a modified electronic checklist template, wherein defining the modified electronic checklist template comprises modifying the first electronic checklist template based on inputs received at the template editor; and (iii) generating a database implemented electronic checklist template. The database implemented electronic checklist template may comprise a markup language encoding of the modified electronic checklist template and at least one system controlled column. Data input within data fields of the at least one system controlled column may be determined by one or more system information parameters, and one or more predefined rules of system behaviour associated with the at least one system controlled column.
US09514117B2	System and method for document tagging templates The present invention provides a system and method for tagging digital documents. A method for creating digitally tagged documents includes creating a data template for a digital document, assigning signature locations and data fields in the data template, and linking the template instructions with the digital document. A system for creating digitally tagged documents includes a processor; a display; and a memory containing stored programming instructions operable by the processor to create a data template for a digital document, assign signature locations and data fields in the data template, and link template instructions with the digital document.
US09514116B2	Interaction between web gadgets and spreadsheets Gadgets integrate with spreadsheets and the spreadsheet calculation engine. A gadget is bound to a range of cells (one or more) within a sheet. When one or more of the cells of the bound range is accessed (e.g. selected, hovered over, edited, deleted, added), the gadget is notified. The gadget may use this information for updating a display rendered by the gadget and/or performing some other action. The gadget uses an Application Programming Interface (API) to create the binding, communicate with the spreadsheet, and perform actions in the spreadsheet. The gadget is a Named Item object within the spreadsheet such that the gadget may be viewed/displayed differently from other objects. Out of date requests from the gadget are attempted to be detected and prevented from being processed such that the gadget is not acting on the latest data.
US09514115B2	Method for creating form validation program and corresponding form interface according to result set metadata The settings related to form fields now are unable to be set dynamically according to attributes of a table. The settings related to form fields include length of form fields, validation rule of form filed (such as length of input character or whether the input character is a not null parameter, etc.), and presentation of form fields (such as check box or calendar time selection interface). The present invention uses result set metadata of a relational database to get the attributes. Thus a form interface includes form fields corresponding to the attributes. And the presentation of the form fields can be determined by the corresponding attribute parameters. Moreover, whether data format is correct is checked by a form validation program according to data user input into the form field. Thereby development workflow can be simplified and development time can be shortened for web developers and program designers.
US09514107B1	Webpage creation tool for accelerated webpage development for at least one mobile computing device A webpage creation tool for developing mobile device specific webpages for at least one mobile computing device having a hypertext generator and a domain free interface traverser to simultaneously collect predefined data from different third party servers, store the collected data and maintain consistency throughout. The webpage creation tool can have a replication feature, a plurality of common stylistic rules and a document processor to merge predefined data into a mobile device specific webpage document template creating the mobile device specific webpage and storing the mobile device specific webpage. A plurality of self-generating data entry screens can develop the mobile device specific webpage and a plurality of computer instructions can convert the mobile device specific webpage to a mobile version, transmit the mobile version for display and maintain the mobile version of the mobile device specific webpage for use on the mobile computing device.
US09514106B2	Embedded device, control method therefor, program for implementing the control method, and storage medium storing the program An embedded device incorporating a Web browser, which enables a server to provide a dynamic content adapted and linked to a function specific to the embedded device and a status of the same, as an easily and flexibly expandable service in response to access from the embedded browser, and enables securing privacy and security of information on a client. In an image processing apparatus (110) implementing the embedded device, a Web browser module (211) loads Web content data containing at least document data which is described in a markup language and has a script or information for reference to a script embedded therein, and performs presentation based on the loaded Web content data. A controller unit (111) controls information and operation of the image processing apparatus. A script interpreter (805) incorporated in the Web browser module interprets the document data contained in the loaded Web content data and processes the script or the information for reference to a script embedded in the document data. A control API module (218) provides an interface via which the script interpreter gains access, based on the processing of the script, to a DOM managed in the Web browser module. Further, the control API module provides an interface via which the script interpreter gains access, based on the processing of the script, to the information and operation of the embedded device, controlled by the controller unit.
US09514103B2	Effective system and method for visual document comparison using localized two-dimensional visual fingerprints A method and system detects and highlights changes in documents and displays those documents in a side-by-side aligned view. Aspects of a source document and a revised document are detected and compared. Similarities and/or differences between the source document and the revised document are identified and visual identifiers are introduced to maintain consistent and accurate alignment between content in the source document and content in the revised document. A merged single file is output containing the aligned side-by-side view of the source document and the revised document, with all differences between the source document and the revised document visually identified.
US09514102B2	User interface for presentation of a document A system identifies a document and provides an excerpt page corresponding to the document. The excerpt page includes a page of the document and a set of links to sections of the document. One of the links corresponds to a section containing the page and includes text associated with the link, a next page element to permit a next page in the document to be presented, and a previous page element to permit a previous page in the document to be presented. The next page element and the previous page element are visually associated with the text associated with the link.
US09514096B2	Method of developing a sedimentary basin from a stratigraphic simulation of multilithologic filling taking account of fine sediment transport The invention is a method of developing a sedimentary basin from a stratigraphic simulation of multilithologic filling accounting for fine sediment transport. The sedimentary basin is divided into geologic layers with each geologic layer being subdivided into a series of climatic layers. Each climatic layer is associated with at least one constant climatic parameter. A stratigraphic simulation is performed within each climatic layer using a stratigraphic model. The sediment transport in the continental domain and sediment bottom layer transport in the marine and lacustrine domains are modelled using nonlinear diffusion equations under maximum erosion rate constraint. Suspended sediment transport in the marine and lacustrine domain is modeled using an advection-diffusion equation accounting for a particle fall rate and of a marine and lacustrine current velocity. The climatic layers belonging to a single geologic layer are then homogenized and the basin is developed according to the stratigraphic simulation results.
US09514091B2	Link aggregation using digests Methods, systems and computer readable media for link aggregation using digests are described. In some implementations, the method can include obtaining information about each port in a group of one or more ports. The method can also include computing a digest corresponding to each port in the group of one or more ports, the digest being based on the information about the corresponding port. The method can further include determining whether each port in the group of one or more ports is suitable for aggregation in a link aggregation group by comparing the digest corresponding to each port with a digest of a port in the link aggregation group.
US09514089B1	Mobile device network data synchronization A method, article of manufacture, and apparatus for synchronizing mobile device data in a mobile device network is disclosed. In some embodiments, this includes using a processor to identify server data, first comparing the server data with a first mobile device data, and updating the server data based on the first comparison. In some embodiments, the updated server data may be compared (second comparison) to a second mobile device. The second mobile device may be updated based on the second comparison.
US09514088B2	Method and device for processing serial binary input by comparing binary digits at even and odd locations of the input A method for command processing in a memory controller includes receiving a serial input signal including a series of binary digits, capturing the binary digits at ones of odd locations or even locations of the serial input signal to form a first sub-series, capturing the binary digits at other ones of the odd locations or the even locations of the serial input signal to form a second sub-series, comparing the first and second sub-series, and performing a command represented by the first sub-series, if the first and second sub-series are complementary to each other.
US09514087B2	Dynamic data collection communication between adapter functions An approach is provided that collects data from a multi-function adapter that is used by multiple functions. In the approach, a master function is dynamically selected from the group of functions. The approach further allows the master function to perform a disruptive adapter data collection while inhibiting performance of disruptive adapter data collection processes by the other (non-master) functions.
US09514085B2	Method and apparatus for high bandwidth dictionary compression technique using set update dictionary update policy Method, apparatus, and systems employing novel dictionary entry replacement schemes for dictionary-based high-bandwidth lossless compression. A pair of dictionaries having entries that are synchronized and encoded to support compression and decompression operations are implemented via logic at a compressor and decompressor. The compressor/decompressor logic operatives in a cooperative manner, including implementing the same dictionary update schemes, resulting in the data in the respective dictionaries being synchronized. The dictionaries are also configured with replaceable entries, and replacement policies are implemented based on matching bytes of data within sets of data being transferred over the link. Various schemes are disclosed for entry replacement, as well as a delayed dictionary update technique. The techniques support line-speed compression and decompression using parallel operations resulting in substantially no latency overhead.
US09514080B1	Method and apparatus for providing an interface between a host device and a plurality of storage devices An emulation circuit configured to emulate each of a master mode and a slave mode to provide an interface between a host device and a plurality of storage devices. The emulation circuit includes a first bus and a second bus. The emulation circuit includes a plurality of bridge circuits each configured to communicate with the host device over the first bus, communicate with a respective storage device of a plurality of storage devices over the second bus, and receive a mode select signal configured to set the bridge circuit to one of a host mode and a device mode. The bridge circuit is further configured to, if the mode select signal sets the bridge circuit to the host mode, select, based on an emulation select signal, between the master mode and the slave mode.
US09514078B2	Peripheral device management A method, system, apparatus, and computer program product are provided for providing peripheral device management. For example, a method is provided that includes receiving, from a user device, a request to access at least one peripheral device, the request comprising information regarding the user device. The method may further include determining, based at least in part on at least one compliance rule and the information regarding the user device, whether to grant the request, and, in an instance in which it is determined to grant the request, causing access to the at least one peripheral device by the user device to be facilitated.
US09514075B2	Electronic systems, host electronic devices, electronic devices and communication methods An electronic system is provided, including a host electronic device and a first electronic device. The host electronic device is coupled to a mini display port (mDP) bus composed of a first lane and a second lane, in which the host electronic device turns off the second lane according to a disable signal in a first communication protocol mode. The first electronic device is coupled to the mDP bus and outputs a detection signal to the host electronic device, in which, when the first electronic device is coupled to the host electronic device, the host electronic device communicates with the first electronic device through the first lane in the first communication protocol mode and communicates with the first electronic device through the second lane in a second communication protocol mode, according to an enable signal.
US09514072B1	Management of allocation for alias devices An input/output (I/O) request is received that indicates a priority for performing the received I/O request by a storage controller. If a base device is not available to handle the received I/O request, whether the received I/O request is eligible for performance throttling is determined. The received I/O request is transmitted to the storage controller indicating whether the received I/O request is eligible for performance throttling. An alias device is allocated to the base device based on the priority for performing the received I/O request. If the throttling information received from the storage controller for the previous I/O request indicates that a request type of the received I/O request is not being throttled, and it is determined that the received I/O request is a new request, then a control block is representing the base device is flagged, indicating that the received I/O request is eligible for performance throttling.
US09514070B2	Debug control circuit A method and apparatus store a command in a command register and set, with a control circuit, a first operation mode associated with a split transaction for freeing a bus in a time period between a command transfer request and a command transfer operation. The method and apparatus set, with the control circuit, a second operation mode in which a split transaction is not issued and transfer, with the control circuit, the command to a processing unit via the bus in response to the command transfer request when in the second operation mode where after the processing unit executes the command and issues a subsequent command transfer request to the control circuit, the control circuit performs the split transaction when in the first and second operation modes.
US09514065B2	Host device coupled to a USB peripheral and method of operating the same Embodiments of the present invention relate to methods and apparatus for operating a host device (e.g. a ‘plug-and-play’ host device) coupled to a peripheral device (e.g. a mobile phone). In some embodiments, the host device may analyzed peripheral device-descriptive data (e.g. including but not limited to USB endpoint data) and determine information about the peripheral device in accordance with the results of the analysis. Operations that may be carried out by the host device in accordance with results of the analysis include but are not limited to protocol selection, retrieval of cell phone data, and determining software or hardware resource(s) of the peripheral device. In some embodiments, it is possible to actively suppress natural OS behavior whereby a device driver(s) specified by the peripheral device (e.g. in a hardware identifier) is loaded by the host device. For example, it is possible to load a surrogate driver instead. In one example, the hardware identifier is intercepted and not forwarded to a plug-and-play manager executing on the host device.
US09514063B2	Secure compact flash Methods and apparatus are provided, such as a memory card with a processor and nonvolatile memory coupled thereto. The nonvolatile memory has a secure area configured to store a user password and a serial number in encrypted form. The card is configured to grant access to the secure area when the card receives a password that matches the stored user password and the card is coupled to a system having the serial number.
US09514059B2	Hiding page translation miss latency in program memory controller by selective page miss translation prefetch This invention hides the page miss translation latency for program fetches. In this invention whenever an access is requested by CPU, the L1I cache controller does a-priori lookup of whether the virtual address plus the fetch packet count of expected program fetches crosses a page boundary. If the access crosses a page boundary, the L1I cache controller will request a second page translation along with the first page. This pipelines requests to the μTLB without waiting for L1I cache controller to begin processing the second page requests. This becomes a deterministic prefetch of the second page translation request. The translation information for the second page is stored locally in L1I cache controller and used when the access crosses the page boundary.
US09514057B2	Storage module and method for managing logical-to-physical address mapping A storage module and method for managing logical-to-physical address mapping are disclosed. In one embodiment, a storage module is provided comprising a memory having a plurality of wordlines and a controller. The controller is configured to use a logical-to-physical address map to convert a logical address to a physical address of a wordline. A plurality of logical addresses in the map point to a single wordline, and the single wordline contains both data associated with the plurality of logical addresses and information about where to find each of the plurality of logical addresses in the single wordline . Storing the information about where to find each of the plurality of logical addresses in the wordline itself avoids the delay and complexity of using a larger logical-to-physical address map or multiple maps.
US09514056B2	Virtual memory system, virtual memory controlling method, and program Disclosed herein is a virtual memory system including a nonvolatile memory allowing random access, having an upper limit to a number of times of rewriting, and including a physical address space accessed via a virtual address; and a virtual memory control section configured to manage the physical address space of the nonvolatile memory in page units, map the physical address space and a virtual address space, and convert an accessed virtual address into a physical address; wherein the virtual memory control section is configured to expand a physical memory capacity allocated to a virtual page in which rewriting occurs.
US09514052B2	Write-through-and-back-cache Embodiments are provided for cache memory systems. In one general embodiment, a method that includes receiving a host write request from a host computer, creating a sequential log file in a storage device, and copying data received during the host write request to a storage buffer. The method further includes determining if a selected quantity of data has been accumulated in the storage buffer and executing a write through of data to sequentially write the data accumulated in the storage buffer to the sequential log file and to a storage class memory device if the selected quantity of data has been accumulated in the storage buffer.
US09514051B2	Cache memory with unified tag and sliced data A cache memory is shared by N cores of a processor. The cache memory includes a unified tag part and a sliced data part partitioned into N data slices. Each data slice of the N data slices is physically local to a respective one of the N cores and physically remote from the other N-1 cores. For each core, the cache memory biases allocations caused by the core towards a physically local slice of the core. The cache memory may be arranged as a set-associative cache memory, and allocations may be based on a miss rate of a data slice and a number of M ways allocated to a core. A dispatch queue dispatches requests in a schedule fashion so that only one of the N data slices at a time returns data to each core.
US09514041B2	Memory controller and memory system A memory controller according to the embodiment includes a front-end unit that issues an invalidation command in response to a command from outside of the memory controller, the command including a logical address, an address translation unit that stores a correspondence relationship between the logical and a physical address, an invalidation command processing unit that, when the invalidation command is received, registers the logical address associated with the invalidation command as an invalidation registration region in an invalidation registration unit and issues a notification to the front-end unit, and an internal processing unit that dissolves a correspondence relationship between the logical address registered in the invalidation registration unit and the physical address in the address translation unit in a predetermined order by referencing the logical address registered in the invalidation registration unit. The front-end unit transmits completion command which indicates the completion of the command in response to the notification.
US09514032B2	Real-time usage checking of dynamically generated program output Receive output dynamically generated by a running program and check that output for spelling, grammar, and/or other usage errors, providing notice to a user of any errors found. The dynamically generated output includes an assembly of component parts not statically assigned in a predetermined configuration or with predetermined content, but rather generated and/or configured by the executing program as it runs.
US09514029B2	Partial recording of a computer program execution for replay A method, system and program product for recording a program execution comprising recording processor context for each thread of the program, results of system calls by the program, and memory pages accessed by the program during an execution interval in a checkpoint file. Processor context includes register contents and descriptor entries in a segment descriptor table of the operating system. System calls are recorded for each program thread, tracked by an extension to the operating system kernel and include returned call parameter data. Accessed memory pages are recorded for each program process and include data, libraries and code pages. The program address space, processor context, and program threads are reconstructed from checkpoint data for replaying the program execution in a different operating system environment.
US09514028B2	System and method for determining correct execution of software based on baseline and real time trace events An embodiment provides a level of assurance regarding correct operation of software. An embodiment creates baseline and real-time measurements of software and compares the measurements to determine whether the software is operating correctly. An application provider may include “tracing elements” in target software application. While producing the application the trace elements are detected and provide trace events, which collectively provide a “baseline trace” indicating proper application execution. The provider supplies the application and the baseline trace to a user. The user operates the application in real-time to produce a “real-time trace” based on the application still having trace elements that produce trace events (which collectively form the “real-time” trace). A comparator compares the baseline and real-time traces. If the traces are within a pre-determined range of each other the user has a level of assurance the software is operating correctly. Other embodiments are included herein.
US09514027B2	Context-aware model-driven hierarchical monitoring metadata Metrics are defined and collected for an application. The metrics are organized in hierarchical trees with metrics aggregated at each node in the trees. Each tree represents a different permutation of the metrics. A particular metric may occur in more than one tree. A user interface provides a default drill-down that allows users to jump from one metric to another so that only the most useful information is presented to the user. The default drill-down is defined to provide the user with a best practices method to identify and correct problems or errors in the application. Users may modify the default drill-down path.
US09514026B2	Debugging analysis in running multi-user systems Various arrangements for debugging logic being executed by a webserver is presented. A virtual machine of the webserver may execute runtime threads for a plurality of remote users. The web server may compile business logic code received from a developer computer system via a web-based interface into an logic insight injected code. The logic insight injected code may be compiled from the business logic code to include debugging functionality. The virtual machine of the webserver may execute the logic insight injected code concurrently with the runtime threads being executed for the plurality of remote users. The debugging functionality of the logic insight injected code being executed may not affect execution of the runtime threads for the plurality of users.
US09514020B2	Power profile diagnostic system A power profile diagnostic system includes a power rail. At least one subsystem is coupled to the power rail. A controller is coupled to the power rail and to a power profile database. The controller is configured to monitor the power rail and determine a power consumption profile of the at least one subsystem during a predefined operation of the at least one subsystem. The controller then compares the power consumption profile to a predetermined power profile that is stored in the power profile database in association with the predefined operation, and determines whether a difference between the predetermined power profile and the power consumption profile is indicative of a malfunction of the at least one subsystem. If the difference between the predetermined power profile and the power consumption profile is indicative of the malfunction of the at least one subsystem, the controller provide a malfunction report for display.
US09514019B2	Method in a serial communication There is disclosed a method in which a status of a first contact and a status of a second contact are detected. At least one of the detected statuses are used to determine whether the first contact is free for transferring data. If the determining indicates that the data connection is free for transferring data, a first arbitration delay is waited before the status of the first contact and the status of the second contact are again detected. A transmission of a start bit is then started if the detected status of the first contact and the detected status of the second contact indicate that the first contact is still free for transferring data. There is also disclosed an apparatus and a storage medium having stored thereon a computer executable program code for use by an apparatus to implement the method.
US09514017B2	Compare point detection in multi-threaded computing environments Compare points are detected in a multi-threaded computing environment. One thread of the multi-threaded computing environment has reached a compare point for the one thread. The compare point for the one thread being a point at which results of executing a test case on the one thread is ready to be compared against expected results for that test case. A determination is made as to whether another thread of the multi-threaded computing environment has reached a compare point for the another thread. Execution of the another thread is continued, based on determining the another thread has not reached the compare point for the another thread. The test case of the one thread is, however, not re-executed.
US09514016B2	Apparatus systems and methods for facilitating testing of a plurality of electronic devices Systems and methods are operable to test a plurality of devices under test (DUTs) communicatively coupled to one of a plurality of switching elements of a DUT controller. An exemplary embodiment identifies a first DUT and a second DUT from among the plurality of DUTs as members of a test group, wherein the first DUT and the second DUT are identified based upon a test schedule defining a plurality of test groupings of members of the plurality of DUTs for concurrent testing; and communicates control instructions to a first switching element coupled to the first DUT and to a second switching element communicatively coupled to the second DUT, wherein the control instructions are configured to actuate the first switching element and the second switching element to communicatively couple the first DUT and the second DUT.
US09514011B2	Method and apparatus for redundancy in an ATM using hot swap hardware underlying a virtual machine A method and apparatus for providing redundancy in an Automatic Teller Machine (ATM) is provided. Application software may be run on top of a virtual environment such as a virtual machine and/or a virtual disk environment. Should a software component fail, the virtual environment will “crash” but the ATM hardware and operating system will remain intact. If the software is fatally flawed—e.g., due to a faulty “upgrade” the older version may be “rolled back” from a previously stored virtual environment.
US09514008B2	System and method for distributed processing of file volume A file processing system includes a system targeting unit to target a distributed file system, a chunk generator to generate a chunk including file blocks and to generate copies of the chunk to be stored in the distributed file system, a data storage medium to store the chunk, and a chunk operation requesting unit to request storage of the generated chunk copies in the distributed file system. A distributed file system includes a first data server and a second data server. Each data server includes a chunk storage unit to store a chunk copy received from a file processing system, and a chunk operation performing unit to generate an identical copy of the stored chunk copy that is undamaged to replace a damaged chunk copy.
US09514006B1	Transaction tracking within a microprocessor Embodiments of the present disclosure include a method, a system, and a computer program product for processing multiple transactions within a transaction execution environment. The transaction execution environment includes a first transaction that is assigned a first transaction identification number, and a second transaction that is assigned a second transaction identification number which process on a processor. The processor processes the first transaction and the second transaction on one or more threads of the processor. A first rollback save state is created for the first transaction and a second rollback save state is created for the second transaction. An interference is detected prior to ending a transaction, between the processing of the first transaction and the processing of the second transaction. In response to the interference, the second transaction is rolled back to the second rollback save state.
US09514001B2	Information processing device, data management method, and storage device According to an aspect of the present invention, provided is an information processing device including a first storage unit and a processor. The processor sets, in an external device, device identification information of the information processing device. The processor stores a duplicate copy of data stored in the first storage unit in a second storage unit included in the external device. The processor invalidates, in response to an instruction for invalidating data, the data stored in the first storage unit. The processor restores the duplicate copy stored in the second storage unit on the first storage unit at a time of start-up of the information processing device after the invalidation when the external device is connected to the information processing device and the device identification information is set in the external device.
US09513999B2	Method and system for tracking information transferred between storage systems Methods and systems for tracking information that is transferred from a source to a destination storage system are provided. The source storage system maintains a first data structure for indicating that a storage block has been transferred. The destination storage system receives the storage block and updates a second data structure to indicate that the storage block has been received. The first data structure and the second data structure are compared to determine that the storage block was successfully transferred from the source storage system and received by the destination storage system.
US09513998B2	Management of microcode errors in a storage operation Embodiments of the present disclosure relate to a system and computer program product for managing a microcode error in a storage operation. Embodiments include receiving an error code that corresponds to the microcode error and receiving a received error path signature for the error code. Embodiments also include identifying a metadata error path signature for the error code within a metadata table and determining whether the received error path signature for the error code substantially matches the metadata error path signature for the error code. Embodiments also include initiating a mitigation action in response to the received error path signature for the error code substantially matching the metadata error path signature for the error code.
US09513993B2	Stale data detection in marked channel for scrub Embodiments relate to stale data detection in a marked channel for a scrub. An aspect includes bringing the marked channel online, wherein the computer comprises a plurality of memory channels comprising the marked channel and a remaining plurality of unmarked channels. Another aspect includes performing a scrub read of an address in the plurality of memory channels. Another aspect includes determining whether data returned by the scrub read from the marked channel is valid or stale based on data returned from the unmarked channels by the scrub read. Another aspect includes based on determining that the data returned by the scrub read from the marked channel is valid, not performing a scrub writeback to the marked channel. Another aspect includes based on determining that the data returned by the scrub read from the marked channel is stale, performing a scrub writeback of corrected data to the marked channel.
US09513992B2	Method and apparatus to perform concurrent read and write memory operations Subject matter disclosed herein relates to read and write processes of a memory device. During a write process to a particular partition in a memory array, a response to a read request of contents of the particular partition may be delayed. In some embodiments, the contents of the particular partition may be indirectly read during the write process without delaying the response to the read request. The contents of the particular partition can be indirectly read by determining the contents of the particular partition based, at least in part, on an error correction code based, at least in part, on contents of memory partitions of the memory array.
US09513990B2	Memory controller with read unit length module Technologies are generally described for systems, devices and methods relating to generation of an instruction to store data. Read unit length information are identified for data. The read unit length information includes a read unit length. The data has a data length. The data length implicates a first error correction code of a first size. The read unit length relates to an amount of the data to be read as a unit from a memory. The read unit length is different from the data length. A second error correction code is determined to store the data. The second error correction code is based on the read unit length information. The second error correction code has a second size. The instruction is effective to store the second error correction code in association with the data in the memory.
US09513987B2	Using error correcting codes for parity purposes Software that combines parity bits with error correcting codes (ECC) such that a subset of ECC bits is also used for parity purposes, by performing the following steps: (i) providing a first set of redundant bit(s) in a data block, where the first set of redundant bit(s) is adapted to detect and/or correct errors in the data block; (ii) providing, within the first set of redundant bit(s), a first sub-set of parity bit(s), where the first sub-set of parity bit(s) is adapted to provide single bit error detection for the data block; and (iii) determining, based, at least in part, on a first set of data read requirements, whether to use the first set of redundant bit(s) and/or the first sub-set of parity bit(s) to detect and/or correct potential errors while reading data on the data block.
US09513983B2	Method for maintaining file system of computer system A method for maintaining a file system of a computer system is disclosed. An operating system is loaded to the computer system when the computer system is booted, such that the file system of the computer system is monitored in real time after the computer system is booted. When occurrence of an error in the file system is detected, a number of times the error has occurred is accumulated. When the number of times the error has occurred reaches a predetermined threshold, a notification message is generated and displayed on an electronic apparatus. Accordingly, a manager of the computer system may be notified immediately when the occurrence of the error in the file system is detected.
US09513981B2	Communication software stack optimization using distributed error checking A method of processing a request message begins when a first layer of a plurality of layers of a system stack receives the request message. In turn, the plurality of layers negotiate an agreement based on the request message, where the agreement indicates which layers will process particular error reply codes of an error reply code list. Then, a non-controller layer of the plurality of layers performs a first error check in accordance with the agreement and records a first error result in a communication interface based on the first error check; a controller layer of the plurality of layers performs a second error check in accordance with the agreement and records a second error result in the communication interface based on the second error check. Then a reply message responsive to the request message is outputted based on the first error check and the second error check.
US09513979B2	Mobile communication device providing interconnectivity between apps based on storage scope A method and system include a backend mobile development framework. The framework includes a library having a plurality of apps for mobile devices, the apps divided into groups of related apps. A communications module is operable to communicate with multiple mobile devices. A data store provides interconnectivity between apps in each group such that a first app has content information shared with a second app.
US09513977B2	ISA bridging with callback Methods, apparatuses and storage medium associated with ISA bridging with callback, are disclosed. In various embodiments, at least one computer-readable storage medium may include instructions configured to enable a target device with a target ISA, in response to execution of the instructions, to provide an ISA bridging layer to the target device to facilitate a library service to callback a callback function of an application. The library service may be implemented for the target ISA, and the application may be implemented at least partially for a source ISA that may be different from the target ISA. The ISA bridging layer may include a source ISA emulator and a library emulator configured to cooperate to enable the application to call the library service, and the library service to callback the callback function, across the two instruction set architectures. Other embodiments may be disclosed or claimed.
US09513974B2	Task scheduler mechanism, operating system, and multiprocessor system In a multiprocessor system having a high-performance processor and a low-power-consumption processor, tasks are properly assigned to the high-performance processor or to the low-power-consumption processor even if the tasks include those commonly used by a plurality of applications. The applications each include a plurality of tasks that are driven by an input or sequentially driven by another task. A task scheduler mechanism includes a synchronization mechanism that causes a driven task to inherit a priority assigned to the input or a synchronizing task, and a task assignment mechanism that determines in accordance with the inherited priority whether to assign the driven task to the high-performance processor or to the low-power-consumption processor.
US09513973B2	Device and method for synchronizing tasks executed in parallel on a platform comprising several calculation units A device and method for synchronizing tasks executed in parallel on a platform comprising comprises several computation units. The tasks are apt to be preempted by the operating system of the platform, and the device comprises at least one register and one recording module installed in the form of circuits on said platform, said recording module being suitable for storing a relationship between a condition to be satisfied regarding the value recorded by one of said registers and one or more computation tasks, the device comprising a dynamic allocation module installed in the form of circuits on the platform and configured to choose a computation unit from among computation units of the platform when said condition is fulfilled, and for launching the execution on the chosen computation unit of a software function for searching for the tasks on standby awaiting the fulfillment of the condition and notifications of said tasks.
US09513972B2	Task scheduling based on thermal conditions of locations of processors A method of prioritizing processing units in a system for task scheduling includes, for each processing unit of a plurality of processing units in the system, determining a value that represents a thermal condition of a location of the processing unit. It is determined which of the plurality of processing units is not fully loaded and is in a location with a most favorable thermal condition based on the value of the processing unit that represents thermal conditions of the location of the processing unit. A task is scheduled to the processing unit determined to be not fully loaded and in a location with a most favorable thermal condition based on the value of the processing unit that represents thermal conditions of the location of the processing unit.
US09513971B1	Managing provisioning for cloud resource allocations Resource provisioning to a process in a distributed computing system, such as a cloud computing system. An instruction to provision a resource is received. Portions of the resource are provisioned to the process as they become available, and prior to all portions becoming available, based on determining that the provisioning speed is greater than or equal to the use speed for the resource. If the use speed is faster, it may be actively slowed down.
US09513970B2	Optimizing handling of virtual machine mobility in data center environments Techniques are provided for sending address information of virtual machines to a physical switch. A migration of a virtual machine to a physical server is detected. The physical server obtains address information of the virtual machine, and upon obtaining the address information of the virtual machine, the physical server sends the address information to a first physical switch that is connected to the physical server.
US09513968B1	Dynamic resource allocation based on data transferring to a tiered storage A computing system includes a computer in communication with a tiered storage system. The computing system identifies a set of data transferring to a storage tier within the storage system. The computing system identifies a program to which the data set is allocated and determines to increase or reduce resources of the computer allocated to the program, based on the set of data transferring to the storage tier. The computing system discontinues transferring the set of data to the storage tier if a resource allocated to the program cannot be increased.
US09513964B2	Coordinating device and application break events for platform power saving Systems and methods of managing break events may provide for detecting a first break event from a first event source and detecting a second break event from a second event source. In one example, the event sources can include devices coupled to a platform as well as active applications on the platform. Issuance of the first and second break events to the platform can be coordinated based on at least in part runtime information associated with the platform.
US09513958B2	Dynamic time-based sequencing In some embodiments, techniques include identifying a plurality of tasks associated with an identifier corresponding to an electronic device. A task series is generated so as to include the plurality of tasks, where each task in the series is associated with a performance time. When it is determined that the task has not been completed by the performance time, the task series is updated.
US09513957B2	Management system, management program, and management method A plurality of process content is retained, said process content including identifiers of a plurality of part content included in each process and information which denotes dependencies among the plurality of part content. When information is inputted which designates a first process and the part content of a problem portion which is included in the first process, a process similar to the first process is retrieved. On the basis of whether there is a change in any of the plurality of part content which is included in the retrieved process, an evaluation value of the retrieved process is either incremented or decremented, and the information relating to the plurality of processes is outputted on the basis of the evaluation value.
US09513950B2	Dynamic resource configuration based on context Aspects of the disclosure allocate shares of processing resources or other physical resources among virtual machines (VMs) operating as, for example, virtual desktops on a plurality of host computing devices. Allocations of resources are adjusted based on the user activity, VM activity, and/or application activity detected by an agent executing on each VM. Allocated shares may be boosted, unboosted, or normalized, depending on the type and duration of detected activity, by a resource allocation manager executing on a management server.
US09513948B2	Automated virtual machine provisioning based on defect state A method for automatically provisioning a virtual machine based on the state of a defect work-item workflow for reproducing a defect associated with testing a software product is provided. The method may include identifying a defect in the software product. The method may also include identifying steps to reproduce the defect. The method may include producing an automation script to reproduce the defect. The method may include identifying a plurality of relevant environmental details associated with a state of the defect. The method may also include requesting a virtual machine provisioning system to provision a new virtual machine comprising the plurality of relevant environmental details and the produced automation script. Also, the method may include building the new virtual machine. The method may further include informing the defect tracking system that the new virtual machine is ready and including a plurality of updated machine connection details and a defect description.
US09513944B2	Provisioning virtual environments based on policies for troubleshooting purposes A method for selecting a virtual machine (VM) for problem determination utilizes a policy-based process for receiving an authorized program analysis report (APAR) containing problem type, a client information handling system (IHS) environment, a configuration, and a program version. The method determines automatically that the problem according to a provisioning policy is a candidate for provisioning a VM for analyzing the problem and searches a provisioning database for an existing VM for a system environment and configuration according to a closeness criteria. The method applies required updates to the provisioned VM, and utilizes the provisioned VM with the required updates for problem analysis. The method also may automatically create a new baseline image in the database according to expected value policy criteria that exceeds predetermined criteria.
US09513942B2	Apparatus and method for providing contents service with virtual machine An apparatus for providing a contents service includes a service request receiver configured to receive a contents service request from a user device, a device information manager configured to determine a type of the user device, a virtual machine generator configured to acquire template information corresponding to the determined type of the user device, and to generate a virtual machine based on the acquired template information, wherein the virtual machine generates contents in a format specific to the user device and a contents provider configured to provide the user device with the generated contents.
US09513935B2	Auto-scaling thresholds in elastic computing environments Embodiments of the present invention provide systems, methods, and computer program products for configuring auto-scaling parameters of a computing environment, as well as alerting a user when auto-scaling operations are not attainable given current operating configurations.
US09513934B2	Platform and software framework for data intensive applications in the cloud A system deploys visualization tools, business analytics software, and big data software in a multi-instance mode on a large, coherent shared memory many-core computing system. The single machine solution provides or high performance and scalability and may be implemented remotely as a large capacity server (i.e., in the cloud) or locally to a user. Most big data software running in a single instance mode has limitations in scalability when running on a many-core and large coherent shared memory system. A configuration and deployment technique using a multi-instance approach, which also includes visualization tools and business analytics software, maximizes system performance and resource utilization, reduces latency and provides scalability as needed, for end-user applications in the cloud.
US09513930B2	Workflow widgets Systems, methods, computer-readable mediums, user interfaces and other implementations are disclosed for workflow widgets. In some implementations, a widget workflow method includes: launching a widget at a first device; and updating the widget with content created at a second device.
US09513929B2	Foldable computing device capable of behaving as different types of devices The present disclosure involves methods and devices, including computer programs encoded on a computer storage medium, for providing a foldable computing device that provides multiple operating modes and is especially adaptable in size to particular functions of the operating modes. In one aspect, a foldable mobile computing device for establishing a connection with a network or for displaying an electronic document, comprising: a processor; a foldable display including a bendable material configured to emit light and including a folding axis, wherein the bendable material extends across the folding axis and the foldable display is configured to be folded with respect to the folding axis. In an aspect, the foldable device provides access to a first function of the device and to a second function different from the first function upon folding or unfolding a portion of the display with respect to the folding axis, wherein the folding or unfolding of the portion of the display with respect to the folding axis activates the second function.
US09513927B1	Method and implementation for playing media content while booting the software of an soc or computer system Certain aspects direct to a computing device, which include a processor, a random access memory (RAM) having a frame buffer, a video controller configured to read video data from the frame buffer, and a non-volatile memory. The non-volatile memory stores an operating system, a media player, and first video data. The processor is configured to load the boot program to the RAM and execute the boot program. The boot program is configured to, when executed at the processor, boot the operating system in a first process or thread of the boot program, and load the media player and execute the media player in a second process or thread separate from a first process or thread. The media player is configured to, when executed by the processor, read the first video data from the non-volatile memory, and write second video data representing the first video data to the frame buffer.
US09513926B2	Floating mask generation for network packet flow A tag mask generation method comprises receiving a section_selector flag indicating whether a tag mask for a section of a network packet is to be generated; receiving from a parser a parse information for the network packet, wherein the parse information includes a section_pointer that indicates a location of the section in the network packet; generating a pointer based on the section_pointer when the section_selector indicates that the tag mask for the section is to be generated; receiving a base mask for the section; and generating the tag mask via a shifter by shifting the base mask by the amount indicated by the pointer. The parse information may further include a section_pointer_valid flag indicating whether the section is included in the network packet, and the method may further comprise including the tag mask in a combined tag mask when the section_pointer_valid flag indicates that the section is included in the network packet.
US09513925B2	Marking long latency instruction as branch in pending instruction table and handle as mis-predicted branch upon interrupting event to return to checkpointed state A data processing apparatus and method of data processing are provided. The data processing apparatus comprises execution circuitry configured to execute a sequence of program instructions. Checkpoint circuitry is configured to identify an instance of a predetermined type of instruction in the sequence of program instructions and to store checkpoint information associated with that instance. The checkpoint information identifies a state of the data processing apparatus prior to execution of that instance of the predetermined type of instruction, wherein the predetermined type of instruction has an expected long completion latency. If the execution circuitry does not complete execution of that instance of the predetermined type of instruction due to occurrence of a predetermined event, the data processing apparatus is arranged to reinstate the state of the data processing apparatus with reference to the checkpoint information, such that the execution circuitry is then configured to recommence execution of the sequence of program instructions at that instance of the predetermined type of instruction.
US09513922B2	Computer system and a method for generating an optimized program code A computer system for generating an optimized program code from a program code having a loop with an exit branch, wherein the computer system comprises a processing unit, wherein the processing unit is arranged to convert an exit instruction of the exit branch into a predicated exit instruction, wherein the processing unit is arranged to determine common dependencies within the loop, wherein the processing unit is arranged to generate modified dependencies by adding additional dependencies to the common dependencies, and wherein the processing unit is arranged to apply an algorithm that uses software pipelining for generating an optimized program code for the loop based on the modified dependencies.
US09513921B2	Computer processor employing temporal addressing for storage of transient operands A computer processor including a plurality of storage elements logically organized as a fixed length queue referenced by logical temporal addresses. The fixed length queue operates over multiple cycles to temporarily store operands referenced by at least one instruction utilizing the logical temporal addresses. A plurality of functional units performs operations over the multiple cycles, wherein the operations produce and access operands stored in the logical fixed length queue. Operands can be added to the front of the logical fixed length queue according to the temporal order that operands are produced by the functional units, and operands can drop from the end of the logical fixed length queue as operands are added to the front of the fixed length queue. A plurality of operands produced by the plurality of functional units (possibly with different latencies in producing such operands) can be added to the logical fixed length queue in a single cycle. A plurality of operands operated on by the functional units can be accessed from the logical fixed length queue in a single cycle.
US09513919B2	Method and apparatus for speculative decompression An apparatus and method for performing parallel decoding of prefix codes such as Huffman codes. For example, one embodiment of an apparatus comprises: a first decompression module to perform a non-speculative decompression of a first portion of a prefix code payload comprising a first plurality of symbols; and a second decompression module to perform speculative decompression of a second portion of the prefix code payload comprising a second plurality of symbols concurrently with the non-speculative decompression performed by the first compression module.
US09513918B2	Apparatus and method for performing permute operations An apparatus and method are described for permuting data elements with masking. For example, a method according to one embodiment includes the following operations: reading values from a mask data structure to determine whether masking is implemented for each data element of a destination operand; if masking not implemented for a particular data element, then selecting data elements from a first source operand and a second source operand based on index values stored in destination operand to be copied to data element positions within the destination operand, wherein any one of the data elements from either the first source operand and the second source operand may be copied to any one of the data element positions within the destination operand; and if masking is implemented for a particular data element of the destination operand, then performing a designated masking operation with respect to that particular data element.
US09513916B2	Instruction merging optimization A computer-implemented method includes determining that two or more instructions of an instruction stream are eligible for optimization, where the two or more instructions include a memory load instruction and a data processing instruction to process data based on the memory load instruction. The method includes merging, by a processor, the two or more instructions into a single optimized internal instruction and executing the single optimized internal instruction to perform a memory load function and a data processing function corresponding to the memory load instruction and the data processing instruction.
US09513913B2	SM4 acceleration processors, methods, systems, and instructions A processor of an aspect includes a plurality of packed data registers, and a decode unit to decode an instruction. The instruction is to indicate one or more source packed data operands. The one or more source packed data operands are to have four 32-bit results of four prior SM4 cryptographic rounds, and four 32-bit values. The processor also includes an execution unit coupled with the decode unit and the plurality of the packed data registers. The execution unit, in response to the instruction, is to store four 32-bit results of four immediately subsequent and sequential SM4 cryptographic rounds in a destination storage location that is to be indicated by the instruction.
US09513912B2	Memory controllers Methods and controllers for executing an instruction set are provided. In one such method, executing an instruction set includes executing an instruction of one type in the instruction set, executing a context switch instruction, and executing an instruction of a second type in the instruction set. in one such controller, a single machine executes instructions in an instruction set with instructions having an operational code, and instructions that do not have an operational code.
US09513908B2	Streaming memory transpose operations According to one general aspect, an apparatus may include a load/store unit, an execution unit, and a first and a second data path. The load/store unit may be configured to load/store data from/to a memory and transmit the data to/from an execution unit, wherein the data includes a plurality of elements. The execution unit may be configured to perform an operation upon the data. The load/store unit may be configured to transmit the data to/from the execution unit via either a first data path configured to communicate, without transposition, the data between the load/store unit and the execution unit, or a second data path configured to communicate, with transposition, the data between the load/store unit and the execution unit, wherein transposition includes dynamically distributing portions of the data amongst a plurality of elements according to an instruction.
US09513907B2	Methods, apparatus, instructions and logic to provide vector population count functionality Instructions and logic provide SIMD vector population count functionality. Some embodiments store in each data field of a portion of n data fields of a vector register or memory vector, a plurality of bits of data. In a processor, a SIMD instruction for a vector population count is executed, such that for that portion of the n data fields in the vector register or memory vector, the occurrences of binary values equal to each of a first one or more predetermined binary values, are counted and the counted occurrences are stored, in a portion of a destination register corresponding to the portion of the n data fields in the vector register or memory vector, as a first one or more counts corresponding to the first one or more predetermined binary values.
US09513903B2	Fault-tolerant system and fault-tolerant operating method capable of synthesizing result by at least two calculation modules A fault-tolerant system including a calculation unit and an output synthesizer is provided. The calculation unit receives a first environmental parameter and input data, wherein the calculation unit further includes a first and a second calculation circuits. The first calculation circuit is arranged to perform a calculation on the input data in response to the first environmental parameter to generate a first calculation result. The second calculation circuit is different from the first calculation circuit, and arranged to perform the calculation on the input data in response to the first environmental parameter to generate a second calculation result. The output synthesizer selects a first and a second set of bits from the first and the second calculation result according to a control signal, and synthesizes the first set of bits and the second set of bits in sequence to generate an adjusted calculation result.
US09513900B2	Peripheral device and method for updating firmware thereof A protective cover for an electronic device includes a memory configured to store at least an active firmware image and another firmware image, and circuitry configured to execute instructions provided in the firmware image. The circuitry receives commands and a firmware image included from the electronic device. The circuitry determines whether the firmware is targeted to a non-active block of the memory and if so, writes the firmware image to the non-active memory block.
US09513899B2	System wide firmware updates to networked hospital beds A hospital bed is programmable with new firmware that is downloaded to the bed over a network. The firmware is downloaded to the bed automatically from a remote computer device. The remote computer device receives a message from the hospital bed which includes data regarding the version number of the bed's current firmware, and if the version number indicates that the firmware is an outdated version, the remote computer device downloads a new version of the firmware to the bed.
US09513893B2	Scheduled downloads: enabling background processes to receive broadcast data A digital broadcast network is disclosed that can provide scheduled updates for non-critical data in a different manner than critical data updates. Updates that included non-critical information can be scheduled to be broadcast, over a digital broadcast network, during an update window, which can be a specific period of time. Receiving devices can be notified of the update window and, utilizing background functionality, the non-critical updates can be accepted and applied at the receiving device. The non-critical updates might be accepted and applied during the update window if the receiving device is in an idle state or a period of low activity. The non-critical updates can be broadcast on a separate channel or stream. During periods other than during the update window, other data can be transmitted on the separate channel or stream. Critical updates can be applied in real-time.
US09513890B1	Method and system for installing software Method and system are disclosed for providing multiple installations of a software application. The method/system creates an installation template from a single correct or “golden” installation of the software application and uses the installation template to produce additional installations of the software application. In one embodiment, any references to a specific host or computing system in the files or directories of the installed software application are replaced with a temporary variable in the installation template. The installation template may then be stored on a designated server and uploaded to any computing system needing a new installation of the software application. Once uploaded, the variable is replaced with system-specific references to complete the new installations. Since the installations are produced from the installation template and not from floppy disks or CD-ROMs, the process takes significantly less time.
US09513879B2	Model augmentation in a model-driven application development environment A principal model is configured to facilitate automatic generation of at least one resource for use by a computer-executable application. The principal model includes a group of classes, references, attributes, and associations between any of the classes. At least one model item required for a task that is absent from the principal model is identified. The absent model item is instantiated in a decoration model that operates with the principal model to augment operational functionality of the principal model. The decoration model includes a class, a reference, and an attribute for any corresponding one of the group of classes, references, and attributes of the principal model.
US09513870B2	Modulo9 and modulo7 operation on unsigned binary numbers Simultaneous results of modulo7 and modulo9 operations on an unsigned binary number N are achieved by dividing N by a number d, d being power of 2 then the resulting quotient and remainder are used to calculate modulo 7 and modulo9 by repeatedly split-and accumulate operations. The solution allows shared use of a significant amount of logic components, by a scalable architecture modulo7 and modulo9 can be found on large numbers and allows flexible use if only modulo7 or only modulo9 calculation is required.
US09513866B2	Noise cancellation with enhancement of danger sounds Systems and methods may provide for determining a usage context of a headset and detecting one or more danger-related conditions based on the usage context. Additionally, one or more settings of the headset may be adjusted in response to at least one of the one or more danger-related conditions. In one example, adjusting the one or more settings includes one or more of deactivating noise cancellation, adjusting noise cancellation to increase an intensity of at least one of the one or more danger-related sounds, or adjusting one or more audio playback settings associated with the headset.
US09513865B2	Microphone calibration Examples described herein involve calibration of a microphone of a network device based on a first signal detected by the microphone of the network device and a second audio signal detected by a microphone of the playback device. While the network device is positioned within a predetermined physical range of a microphone of a playback device, a microphone of the network device may detect a first audio signal. The network device may also receive data indicating a second audio signal detected by the microphone of the playback device. Based on data indicating the first audio signal and the data indicating the second audio signal, the network device may identify a microphone calibration algorithm, and apply the microphone calibration algorithm when performing a calibration function associated with the playback device. Similar functions may also be performed by a computing device, such as a server to coordinate calibration of the microphone of the network device.
US09513864B2	Broadcast control and accrued history of media Pairing a portable electronic device with a media device that is playing media, providing control to the portable device, displaying information about the media being played on the portable electronic device, and providing a link to the media asset in an online store. Discovering that a media device that is currently publically playing media, receiving a media signal encoded with metadata describing the media being played, and displaying an accrued history of various instances of media items that have been overheard during a public play session as a list of media items associated with metadata describing the media items.
US09513860B2	Display apparatus, print control method, and program A display apparatus displays an identification information element corresponding to an image currently displayed on a display unit in accordance with a first instruction from a user. In accordance with a second instruction from the user, the display apparatus causes a printing apparatus to perform printing based on an image data element corresponding to an identification information element selected by the user from among one or more identification information elements being displayed.
US09513856B2	Beam shaping near field communication device Systems, devices, and related methods for shaping near field interrogation signals are discussed herein. Some embodiments may provide for a printer that includes a housing and a beam shaping near field communication (NFC) device secured with the interior surface. The beam shaping NFC device may include a ferromagnetic component including a core portion and a bottom flange portion. The beam shaping NFC device may further include a wire coil disposed around the core portion. The ferromagnetic component may concentrate near field interrogation signals generated by the wire coil toward a near field interrogation region and away from nearby conductive components, such as the interior surface of the printer.
US09513848B2	Storage and access of job ticket values System and methods for storage and access of job ticket values. In one embodiment, an apparatus includes a job ticket controller that receives a print job and an associated job ticket, and processes the job ticket to identify a group of logical pages that share common attribute values. The job ticket controller caches a shared copy of the attribute values in memory for the group, and identifies static attribute values and dynamic attribute values in the shared copy. Responsive to a request to update a dynamic attribute value of a logical page that belongs to the group, the job ticket controller copies the dynamic attribute values to a separate copy, performs the update, and then provides the separate copy and the static attribute values of the shared copy in response to a request of attribute information of the logical page.
US09513843B2	Method and apparatus for choosing storage components within a tier A method for a storage controller to write a data block to one of a plurality of storage components is provided. The storage controller receives a write request from a host computer, and determines at least a portion of the data block includes a Logical Block Address (LBA) that is not currently mapped to a physical page of storage. The storage controller calculates availability for each storage component within the plurality of storage components, and selects the storage component with a highest calculated availability from the plurality of storage components. The storage controller next determines a next available physical page within the selected storage component. Finally, the storage controller writes the at least a portion of the data block including LBAs that are not currently mapped to a physical page of storage to the next available physical page.
US09513841B2	Information processing device, information processing method, program, and information storage medium for managing and reproducing program execution condition data When execution of a program is started, in a case where a memory region used by the program when the execution of the program was stopped is usable, the past execution conditions of the program to be reproduced are enabled without reading in data disposed in the memory region used by the program, which data was stored when the execution of the program was stopped. When the execution of the program is stopped, a stop and end managing section performs control to store at least a part of the data disposed in the memory region used by the program in association with the program while retaining the data.
US09513840B2	Parallel processes for performing multiple incremental copies A storage controller receives a write command with respect to a track, from a host. A first process determines that the track is a source track and also determines that at least one corresponding target track is in an incremental copy relation to the source track. A second process is generated to modify a target change recording structure, where the second process executes in parallel with the first process.
US09513838B2	Method and apparatus for processing system command during memory backup A method and an apparatus for processing a system command during memory backup. The method includes: acquiring a write address corresponding to a write operation command; if data corresponding to the write address has been read from a raw memory area but is not written to a backup memory area, mapping the write operation command to the raw memory area, and writing data to the write address in the raw memory area according to the write operation command; and deducting a set value from the write address to obtain an initial address to subsequently read data from the raw memory area. According to the embodiments of the present invention, a problem of system command blocking is solved during a memory backup operation, so that a system command is processed in a timely manner.
US09513836B1	Migration of data to sequential access medium A method for migrating data in a storage system by a computer. Data is selected to migrate from a first storage to the second storage, wherein selected files are in a resident state. Metadata is obtaining and subsets of data are ordered based on the obtained metadata, the order of the subsets of data following an expectation of update value. The subsets of data are transferring to the second storage based on the order of the subsets of data based on a predetermined schedule. Data determined as inactive is overwritten on the sequential access medium by transferred data. End data to the sequential access medium is set after a last active data is written before the one or more sets of data are determined to be inactive. The one or more sets of data determined to be inactive are deleted from the second storage and a transfer is initiated.
US09513832B2	Accessing global data from accelerator devices An aspect includes a table of contents (TOC) that was generated by a compiler being received at an accelerator device. The TOC includes an address of global data in a host memory space. The global data is copied from the address in the host memory space to an address in the device memory space. The address in the host memory space is obtained from the received TOC. The received TOC is updated to indicate that global data is stored at the address in the device memory space. A kernel that accesses the global data from the address in the device memory space is executed. The address in the device memory space is obtained based on contents of the updated TOC. When the executing is completed, the global data from the address in the device memory space is copied to the address in the host memory space.
US09513827B1	Determining adjustments of storage device timeout values based on synchronous or asynchronous remote copy state A determination is made as to whether a plurality of storage volumes controlled by a processor complex are secondary storage volumes that are in an asynchronous copy relationship with a plurality of primary storage volumes. A storage device timeout value for a storage device that stores the plurality of storage volumes is changed from a predetermined low value to a predetermined high value, wherein the predetermined high value is indicative of a greater duration of time than the predetermined low value, in response to determining that each of the plurality of storage volumes controlled by the processor complex and stored in the storage device are secondary storage volumes that are in the asynchronous copy relationship with the plurality of primary storage volumes.
US09513826B2	Storage apparatus and storage apparatus control method A storage apparatus, including a first group including first storage media storing data and a second group including second storage media storing no data, makes an area of the first storage media which stores updating target data an invalid area and to store updated data into an area of the first storage media, migrates to the second storage media data stored in an area other than the invalid areas of the set of the first storage media when determining that the first group includes the set of the first storage media in which the sum of the invalid areas is not less than the capacity of the one storage medium, and moves a group including the first storage media from which migration of the data is completed from the first group to the second group.
US09513825B2	Storage system having a channel control function using a plurality of processors Storage system: wherein processor number information includes at least one logical unit number and at least one processor number of storage nodes; wherein transfer list index/processor number information includes a processor number for identifying a processor from among processors of the plurality of storage nodes, and index information for identifying a transfer list including instruction which the processor sends to the protocol processor; wherein a local router determines a first processor from among the processors of the plurality of storage nodes which is to be a transfer destination of a write request based on processor number information in response to the write request from the host computer through the protocol processor; wherein the first processor generates and sends to the protocol processor a first transfer list which includes instruction for processing, and generates first index information which is an index of the first transfer list upon receiving the write request.
US09513823B2	Data migration A method for migrating data in a storage system includes generating a first set of logical disks (LDs), the LDs being mapped to physical storage space in the storage system, generating a temporary virtual volume (VV) mapped to the first set of LDs, generating a second set of LDs mapped to the temporary VV, and migrating data between the second set of LDs and a third set of LDs.
US09513820B1	Dynamically controlling temporary compromise on data redundancy Systems and methods for determining when to allow a temporary compromise on redundancy in a storage system. When servicing write requests, the storage system may utilize data redundancy techniques when writing data to backend storage devices. The operating conditions of the storage system are tracked and early acknowledgements for write requests may be permitted when the storage system is healthy enough. If the number of unacknowledged writes is greater than a programmable threshold, then early acknowledges may be prohibited. Also, if the number of ongoing rebuild processes is greater than a programmable threshold, then early acknowledges may be prohibited.
US09513818B2	Tape drives generating best access order of randomly stored files on a tape A tape drive adapted for providing a best access order for files or data sets on a tape loaded into the tape drive. The tape drive includes a processor and memory storing a file location table for the tape. The file location table includes identifiers for a plurality of files on the tape and location information for the plurality of files on the tape. The tape drive includes an order determination module, executed by the processor, processing an order request. The order request, from a host or user, includes a list of the files on the tape from which to generate, based on the location information in the file location table, a reordered list defining an order for accessing the files on the tape. The reordered list or best access order has (or produces via tape drive access) an access time for the files that is minimal or reduced.
US09513813B1	Determining prefix codes for pseudo-dynamic data compression utilizing clusters formed based on compression ratio A set of K prefix codes for use in pseudo-dynamic compression are determined by seeding each of K clusters with a respective one of K data pages selected from a training data set, where K is a positive integer greater than 1. For each of the K randomly selected data pages, a prefix code is determined for its cluster utilizing Huffman encoding. Each remaining data page of the training data set is assigned to one of the K clusters whose prefix code yields the highest compression ratio. For each of the K clusters, the prefix code is updated by performing Lempel-Ziv (LZ) encoding on all pages assigned to that cluster, forming a sequence from results of the LZ encoding, and extracting an updated prefix code for the cluster from the sequence utilizing Huffman encoding. The set of K prefix codes determined for the K clusters is then output.
US09513806B2	Dimension based load balancing One method includes receiving partitions, generating assignment plans for assignment of the partitions to servers based on dimensional values of dimensions as determined by different assignment heuristics, selecting one of the assignment plans for execution based on analyzing the dimensional values in accordance with the assignment plans, and executing the selected assignment plan on scalable storage. Another method includes determining, for a triggered optimization module that a server is over utilized on a dimension, selecting candidate operations for partitions assigned to the server, for a higher priority optimization module than the triggered optimization module, removing a candidate operation from the candidate operations that would diminish a modeled state of scalable storage, determining an operation of the candidate operations that would improve the modeled state of the scalable storage with respect to a metric of the dimension on the server, and executing the operation on the scalable storage.
US09513805B2	Page table including data fetch width indicator Embodiments relate to a page table including a data fetch width indicator. An aspect includes allocating a memory page in a main memory to an application. Another aspect includes creating a page table entry corresponding to the memory page in the page table. Another aspect includes determining, by a data fetch width indicator determination logic, the data fetch width indicator for the memory page. Another aspect includes sending a notification of the data fetch width indicator from the data fetch width indicator determination logic to supervisory software. Another aspect includes setting the data fetch width indicator in the page table entry by the supervisory software based on the notification. Another aspect includes, based on a cache miss in the cache memory corresponding to an address that is located in the memory page, fetching an amount of data from the memory page based on the data fetch width indicator.
US09513804B2	Virtual tape device and virtual tape device control method A virtual tape device includes a determination unit and a copy creation unit. The determination unit determines, when deleting some logical volume data among a plurality of logical volume data stored on a first physical tape, whether to conduct copy processing to store a copy of the logical volume data onto a second physical tape on the basis of a storage location of the logical volume data. The copy creation unit stores, when it is determined to conduct the copy processing, a copy of the logical volume data on the second physical tape so as to cause spacing between a storage location of the logical volume data on the second physical tape and a head location on the second physical tape to become shorter than spacing between a storage location of the logical volume data on the first physical tape and a head location on the first physical tape.
US09513801B2	Accessing electronic notifications and settings icons with gestures An electronic device detects a gesture on a touch-sensitive display. In response to detecting the gesture on the touch-sensitive display, when the gesture is a first swipe gesture in a first direction, the device displays a plurality of open application icons that corresponds to at least some of a plurality of concurrently open applications. When the gesture is a second swipe gesture in a second direction distinct from the first direction, the device displays one or more settings icons. In some embodiments, the first direction is a horizontal direction. In some embodiments, the second direction is an upward direction.
US09513800B2	Information processing apparatus and medium for correcting the start and end time data based on handwriting user input An information processing apparatus includes a processor and a memory storing instructions. The instructions instruct the processor to execute acquiring start time data identified based on first stroke data input by handwriting, acquiring end time data identified based on second stroke data input by handwriting, first correcting the start time data by entering a first numerical value corresponding to a first unit that is the unit of time for which the numerical value is not identified, based on the end time data, when a numerical value corresponding to a unit of time cannot be identified, and second correcting the end time data by entering a second numerical value corresponding to a second unit that is the unit of time for which the numerical value is not identified, based on the start time data, when a numerical value corresponding to a unit of time cannot be identified.
US09513798B2	Indirect multi-touch interaction Indirect multi-touch interaction is described. In an embodiment, a user interface is controlled using a cursor and a touch region comprising a representation of one or more digits of a user. The cursor and the touch region are moved together in the user interface in accordance with data received from a cursor control device, such that the relative location of the touch region and the cursor is maintained. The representations of the digits of the user are moved in the touch region in accordance with data describing movement of the user's digits. In another embodiment, a user interface is controlled in a first mode of operation using an aggregate cursor, and switched to a second mode of operation in which the aggregate cursor is divided into separate portions, each of which can be independently controlled by the user.
US09513797B2	Locking and unlocking of an electronic device using a sloped lock track Securing an electronic device and associated information is facilitated. A security component facilitates display and operation of a lock track comprising a locked portion having a positive slope and an unlocked portion, including a chasm, that is adjacent to a high point of the positive-sloped unlocked portion of the lock track. A lock facilitator component (LFC) can be moved along the track between a low point of the locked portion and the unlocked portion. The LFC can be moved in response to received input, and if the input is not sufficient to move the LFC from the locked region to the unlocked region, the LFC can be moved back down the positive-sloped lock track to the low point. The security component can control information to be displayed in an overlay display region in accordance with security level(s) of the device or application.
US09513794B2	Event visualization and control A computer-implemented method for event visualization and control performed by a software component executing on a processor, comprises: receiving as input one or more events currently executing on a computer, the one or more events comprising both applications and processes, and user-initiated background events performed by the applications and processes; displaying a graphical user interface (GUI) showing the one or more events along a percent completion timeline, and dynamically updating the GUI such that each of the one or more events move through the percent completion timeline as the one or more events process; and providing interface controls that enable a user to dynamically perform actions on the one or more events, wherein the actions include start, stop, delete, pause, and reorder.
US09513788B2	Image processing apparatus, image processing method, and program Disclosed herein is an image processing apparatus including a display control part configured to display a human-figure virtual object image in a pose from which to extract information necessary for motion capture, the human-figure virtual object image being the object to be handled corresponding to a person targeted to be recognized.
US09513783B1	Determining available screen area A technology is described for determining an available screen area for a computing device. An example method may include referencing the dimensions of a root view associated with an application in order to determine an available screen area for a device display. The available screen area may be a portion of the device display that is not occupied by an operating system GUI (Graphical User Interface). A child view attribute associated with a child view descending from the root view may include the dimensions of the root view. The child view attribute may be referenced by an associated application component to obtain the dimensions of the root view and display properties of the application component may be calculated based at least in part on the dimensions of the root view.

1 2 3 4 5 6 7 8 9 10