| Document | Document Title |
|---|---|
| US09502596B2 |
Patterned thin foil
An adhesive may be applied to a surface of a reusable carrier. Metal foil may be attached to the adhesive to couple the metal foil to the surface of the reusable carrier. The metal foil may be patterned without damaging the reusable carrier. A semiconductor structure (e.g., a solar cell) may be attached to the patterned metal foil. The reusable carrier may then be removed. In some embodiments, the semiconductor structure may be encapsulated using an encapsulant, with the adhesive being compatible with the encapsulant. |
| US09502592B2 |
Film-forming composition
A film-forming composition is characterized by containing: a triazine ring-containing hyperbranched polymer containing a repeating unit structure represented by formula (1); and a dissolution-enhancing agent for breaking a hydrogen bond formed at least within the hyperbranched polymer and/or between molecules, between a nitrogen atom in the triazine ring, and a diarylamine-derived NH group. The film-forming composition has excellent dissolvability in organic solvents such as resist solvents, and has good handling and filtration properties at low viscosity. (In the formula, R and R′ each independently represent a hydrogen atom, an alkyl group, an alkoxy group, an aryl group, or an aralkyl group (however, at least one of R and R′ represents a hydrogen atom); and Ar represents a divalent organic group containing an aromatic ring and/or a heterocyclic ring). |
| US09502589B2 |
Solar cell, solar cell module, and method for manufacturing solar cell
A solar cell has a collecting electrode formed therein. The collecting electrode is provided with: a main conductive layer that contains copper; and an overcoat layer that covers at least a part of the main conductive layer. |
| US09502587B2 |
Solar cell and method of manufacturing
In different exemplary embodiments, a solar cell is provided, including: a substrate with a first region and a second region, wherein the first region includes at least a first electrical conductivity and the second region includes at least a second electrical conductivity which is greater than the first electrical conductivity; and a passivation on the surface of the substrate; and a contact-structure on the surface of the substrate, wherein the contact-structure includes a plurality of contacts; wherein two contacts of the plurality of contacts are disposed at a first distance with respect to each other in the first region; wherein two further contacts of the plurality of contacts are disposed at a second distance with respect to each other in the second region; and wherein the second distance is greater than the first distance. |
| US09502586B1 |
Backside coupled symmetric varactor structure
A symmetric varactor structure may include a first varactor component. The first varactor component may include a gate operating as a second plate, a gate oxide layer operating as a dielectric layer and a body operating as a first plate of an area modulating capacitor. In addition, doped regions may surround the body of the first varactor component. The first varactor component may be supported on a backside by an isolation layer. The symmetric varactor structure may also include a second varactor component electrically coupled to the backside of the first varactor component through a backside conductive layer. |
| US09502585B2 |
Schottky barrier diode and method of manufacturing the same
A method of manufacturing a Schottky barrier diode is provided, which includes: providing a semiconductor substrate including a first well region of a first conductivity type in the semiconductor substrate; forming a surface-doped layer having a dopant of a second conductivity type opposite to the first conductivity type in the first well region; forming a dielectric layer in contact with the surface-doped layer; performing a thermal treatment on the surface-doped layer to move the dopant of the surface-doped layer in the dielectric layer; removing the dielectric layer to expose the first well region; and forming a silicide layer in contact with the exposed first well region. A Schottky barrier diode is also provided. |
| US09502583B2 |
Complementary high mobility nanowire neuron device
A method for forming a semiconductor device includes providing a substrate structure, which includes a nanowire structure supported by two isolation regions on a substrate. The nanowire structure includes a first nanowire and a second nanowire having different high mobility semiconductor materials and conductivity types. A multi-layer film structure is formed surrounding the nanowire structure and includes a conductive material layer sandwiched between two dielectric layers. A plurality of first electrodes are formed surrounding the multi-layer film structure surrounding a channel region of the first nanowire, and a plurality of second electrodes are formed surrounding the multi-layer film structure surrounding a channel region of the second nanowire. A third electrode is formed to contact one end of the nanowire structure, and a fourth electrode is formed to contact the other end of the nanowire structure. A fifth electrode is formed and coupled to a center portion of the nanowire structure. |
| US09502582B2 |
Non-volatile memory unit and method for manufacturing the same
A non-volatile memory unit includes a substrate, a first dielectric layer, an erase gate, a floating gate, a second dielectric layer, a coupled dielectric layer and a couple control gate. The substrate has a source region and a drain region, and the first dielectric layer is formed on the substrate. The erase gate, the floating gate, the second dielectric layer and the selective gate are formed on the first dielectric layer. The second dielectric layer and coupled dielectric layer are formed among and above the erase gate, the floating gate and the selective gate, and the couple control gate is formed on the coupled dielectric layer. |
| US09502570B2 |
Thin film transistor and manufacturing method thereof, an array substrate and a display device
Embodiments of the present invention provide a thin film transistor and its manufacturing method, an array substrate and a display device, to improve the electrical performance of the thin film transistor and improve the picture quality of images displayed by the display device. The thin film transistor includes: a substrate; a gate, a source, a drain and a semiconductor layer formed on the substrate; a first gate protection layer; a gate isolation layer; and a second gate protection layer. The first gate protection layer is at least partly located between the gate and the semiconductor layer, and is an insulating layer. The gate isolation layer is at least partly located between the first gate protection layer and the second gate protection layer, and is a conductive layer. The second gate protection layer is at least partly located between the gate isolation layer and the semiconductor layer, and is an insulating layer. |
| US09502568B2 |
Non-planar quantum well device having interfacial layer and method of forming same
Techniques are disclosed for forming a non-planar quantum well structure. In particular, the quantum well structure can be implemented with group IV or III-V semiconductor materials and includes a fin structure. In one example case, a non-planar quantum well device is provided, which includes a quantum well structure having a substrate (e.g. SiGe or GaAs buffer on silicon), a IV or III-V material barrier layer (e.g., SiGe or GaAs or AlGaAs), and a quantum well layer. A fin structure is formed in the quantum well structure, and an interfacial layer provided over the fin structure. A gate metal can be deposited across the fin structure. Drain/source regions can be formed at respective ends of the fin structure. |
| US09502567B2 |
Semiconductor fin structure with extending gate structure
A semiconductor structure and a method for forming the same are provided. The semiconductor structure includes a substrate and a fin structure formed over the substrate. The semiconductor structure further includes an isolation structure formed around the fin structure and a gate structure formed across the fin structure. In addition, the gate structure includes a first portion formed over the fin structure and a second portion formed over the isolation structure, and the second portion of the gate structure includes an extending portion extending into the isolation structure. |
| US09502566B2 |
Method for producing a field effect transistor including forming a gate after forming the source and drain
The invention concerns a method for producing a transistor. The gate of the transistor is produced after having produced source and drain electrodes of the transistor. From a substrate having a stack of layers comprising at least two surface layers with a first layer of a first semiconductor material intended to produce a conduction channel of the transistor, and a second layer of a second semiconductor material situated on the first layer and intended to at least partly produce the source and drain electrodes of the transistor, the formation of a mask defining a cavity of a gate pattern and the creation of lateral recesses at the periphery of the gate pattern in the second layer and under the mask by an isotropic etching of the second material, and in that it comprises a filling of the lateral recesses with a dielectric material so as to form gate spacers therein. |
| US09502565B2 |
Channel strain control for nonplanar compound semiconductor devices
A circuit device having differently-strained NMOS and PMOS FinFETs is provided. In an exemplary embodiment, a semiconductor device includes a substrate with a first fin structure and a second fin structure formed thereup. The first fin structure includes opposing source/drain regions disposed above a surface of the substrate; a channel region disposed between the opposing source/drain regions and disposed above the surface of the substrate; and a first buried layer disposed between the channel region and the substrate. The first buried layer includes a compound semiconductor oxide. The second fin structure includes a second buried layer disposed between the substrate and a channel region of the second fin structure, such that the second buried layer is different in composition from the first. For example, the second fin structure may be free of the compound semiconductor oxide. |
| US09502558B2 |
Local strain generation in an SOI substrate
Method to strain a channel zone of a transistor of the semiconductor on insulator type transistor that makes use of an SMT stress memorization technique in which regions located under the insulation layer of the substrate (FIG. 6) are amorphized, before the transistor gate is made. |
| US09502557B2 |
LDMOS for high frequency power amplifiers
An LDMOSFET is designed with dual modes. At the high voltage mode, it supports a high breakdown voltage and is biased at a high voltage to get the benefits of high output power, higher output impedance and lower matching loss. At the low voltage mode, it exhibits a reduced knee voltage so that some extra voltage and power can be gained although it is biased at lower voltage. The efficiency is therefore improved as well. |
| US09502552B2 |
Silicon carbide semiconductor device
There is provided a silicon carbide semiconductor device having an improved switching characteristic. A MOSFET includes a silicon carbide layer, a gate insulating film, a gate electrode, and a source electrode. The silicon carbide layer includes a drift region, a body region, and a contact region. The source electrode is in contact with the contact region in a main surface. The MOSFET is configured such that contact resistance of the source electrode with respect to the contact region is not less than 1×10−4 Ωcm2 and not more than 1×10−1 Ωcm2. Moreover, when viewed in a plan view of the main surface, an area of the contact region is not less than 10% of an area of the body region. |
| US09502550B2 |
High electron mobility semiconductor device and method therefor
In one embodiment, Group III-nitride materials are used to form a semiconductor device. A fin structure is formed in the Group III-nitride material, and a gate structure, source electrodes and drain electrodes are formed in spaced relationship to the fin structure. The fin structure provides both polar and semi-polar 2DEG regions. In one embodiment, the gate structure is configured to control current flow in the polar 2DEG region. Shield conductor layers are included above the gate structure and in spaced relationship with drain regions of the semiconductor device. |
| US09502548B1 |
Semiconductor device
A semiconductor device includes a substrate, an active layer, a source electrode, a drain electrode, a gate electrode, a field plate, a first passivation layer, and a metal layer. The active layer is disposed on the substrate. The source electrode and the drain electrode are respectively electrically connected to the active layer. The gate electrode is disposed between the source electrode and the drain electrode and above the active layer. The field plate is disposed above the active layer and between the gate electrode and the drain electrode. The first passivation layer covers the gate electrode and the field plate. The metal layer is disposed on the first passivation layer, is disposed above the gate electrode and the field plate, and is electrically connected to the source electrode. |
| US09502546B2 |
Semiconductor device and semiconductor device manufacturing method
A semiconductor device and manufacturing method achieve miniaturization, prevent rise in threshold voltage and on-state voltage, and prevent decrease in breakdown resistance. N+-type emitter region and p++-type contact region are repeatedly alternately disposed in a first direction in which a trench extends in stripe form in a mesa portion sandwiched between trench gates. P+-type region covers an end portion on lower side of junction interface between n+-type emitter region and p++-type contact region. Formation of trench gate structure is such that n+-type emitter region is selectively formed at predetermined intervals in the first direction in the mesa portion by first ion implantation. P+-type region is formed less deeply than n+-type emitter region in the entire mesa portion by second ion implantation. The p++-type contact region is selectively formed inside the p+-type region by third ion implantation. N+-type emitter region and p++-type contact region are diffused and brought into contact. |
| US09502545B2 |
Field effect semiconductor device
In order to reduce the source resistance in a field effect semiconductor device, an electron injection layer, which causes a band-to-band tunnel current to flow between a source electrode and a channel forming layer of which the central portion is a channel layer, is provided on the channel forming layer on the side in contact with the channel layer. |
| US09502538B2 |
Structure and formation method of fin-like field effect transistor
A structure and a formation method of a semiconductor device are provided. The semiconductor device includes a semiconductor substrate and a fin structure over the semiconductor substrate. The semiconductor device also includes a gate stack covering a portion of the fin structure and an epitaxially grown source/drain structure over the fin structure and adjacent to the gate stack. The semiconductor device further includes a semiconductor protection layer over the epitaxially grown source/drain structure. The semiconductor protection layer has an atomic concentration of carbon greater than that of the epitaxially grown source/drain structure. |
| US09502537B2 |
Method of selectively removing a region formed of silicon oxide and plasma processing apparatus
Provided is a method of selectively removing a first region from a workpiece which includes the first region formed of silicon oxide and a second region formed of silicon. The method performs a plurality of sequences. Each sequence includes: forming a denatured region by generating plasma of a processing gas that contains hydrogen, nitrogen, and fluorine within a processing container that accommodates the workpiece so as to denature a portion of the first region, and removing the denatured region within the processing container. In addition, a sequence subsequent to a predetermined number of sequences after a first sequence among the plurality of sequences further includes exposing the workpiece to plasma of a reducing gas which is generated within the processing container, prior to the forming of the denatured region. |
| US09502536B2 |
Manufacturing method of thin film transistor display panel
Provided is a manufacturing method of a thin film transistor array panel including: formation of a gate line including a gate electrode on a substrate; formation of sequentially a gate insulating layer, an active layer, a data metal layer, and a photoresist etching mask pattern on the gate line; etching the data metal layer with the same shape as the photoresist etching mask pattern; etching the active layer by using the photoresist etching mask pattern; formation of a data line including a source electrode and a drain electrode for completing a channel region on the active layer; and formation of a pixel electrode exposing the drain electrode and electrically connected with the drain electrode, in which in the etching of the active layer, a dry-etch process is performed by using gas including at least one of NF3 and H2. |
| US09502535B2 |
Semiconductor structure and etch technique for monolithic integration of III-N transistors
Semiconductor structures are disclosed for monolithically integrating multiple III-N transistors with different threshold voltages on a common substrate. A semiconductor structure includes a cap layer comprising a plurality of selectively etchable sublayers, wherein each sublayer is selectively etchable with respect to the sublayer immediately below, wherein each sublayer comprises a material AlxInyGazN (0≦x, y, z≦1), and wherein at least one selectively etchable sublayer has a non-zero Ga content (0 |
| US09502530B2 |
Method of manufacturing semiconductor devices
A method of manufacturing a semiconductor device including the steps of providing a substrate having first type semiconductor regions and second type semiconductor regions, forming a conformal first epitaxy mask layer on the substrate, forming first type epitaxial layer in the substrate of the first type semiconductor regions, forming a conformal second epitaxy mask layer on the substrate, forming second type epitaxial layer in the substrate of the second type semiconductor regions, and removing the second epitaxy mask layer. |
| US09502522B1 |
Mass production process of high voltage and high current Schottky diode with diffused design
A process of manufacture of high voltage (300-600V) and high current (10-100 A) Schottky diode, which includes the following steps in sequence: provide a N-type silicon wafer; process phosphor deposition and high-concentration N+ phosphorus diffusion; cutting and chemical mechanical polishing; classifying into different voltage groups; processing primary oxidation and lithography; processing boron diffusion, secondary lithography and wiring; process ion implantation and metal spluttering to form the Schottky barrier; process metal evaporation and lithography for front metal; and finally process etching and metal evaporation for rear metal. Instead of the conventional epitaxial process, a diffusion process is employed to form the N+ layer. The final product is equipped with the advantages of Schottky diode and is applicable for high voltage of 300-600V and high current of 10-100 A. The current leakage and defect rate are dramatically lowered while the cost is lowered, thus mass production is facilitated. |
| US09502515B2 |
Split gate flash memory structure with a damage free select gate and a method of making the split gate flash memory structure
A method of manufacturing a split gate flash memory cell is provided. A select gate is formed on a semiconductor substrate. A sacrificial spacer is formed laterally adjacent to the select gate and on a first side of the select gate. A charge trapping layer is formed lining upper surfaces of the select gate and the sacrificial spacer, and further lining a sidewall surface of the select gate on a second side of the select gate that is opposite the first side of the select gate. A memory gate is formed over the charge trapping layer and on the second side of the select gate. The sacrificial spacer is removed. The resulting semiconductor structure is also provided. |
| US09502511B2 |
Trench insulated gate bipolar transistor and edge terminal structure including an L-shaped electric plate capable of raising a breakdown voltage
An edge terminal structure of a power semiconductor device includes a second conductive-type substrate, a first conductive-type buffer layer, a first conductive-type epitaxial layer, a first and a second electrodes, and a first and a second field plates. A trench is in a surface of the first conductive-type epitaxial layer in an edge terminal area beside an active area of the power semiconductor device. The first field plate includes at least a L-shaped electric-plate, a gate insulation layer under the L-shaped electric-plate, and the first electrode on the L-shaped electric-plate. The second field plate includes a portion of the first electrode and at least an insulation layer between the portion of the first electrode and the first conductive-type epitaxial layer. The insulation layer covers the tail of the trench and completely covers the L-shaped electric-plate. |
| US09502510B2 |
Heterojunction bipolar transistors for improved radio frequency (RF) performance
The present disclosure relates to heterojunction bipolar transistors for improved radio frequency (RF) performance. In this regard, a heterojunction bipolar transistor includes a base, an emitter, and a collector. The base is formed over the collector such that a base-collector junction is formed between the base and the collector. The base-collector junction is configured to become forward-biased at a first turn-on voltage. The emitter is formed over the base such that a base-emitter junction is formed between the base and the emitter. The base-emitter junction is configured to become forward-biased at a second turn-on voltage, as opposed to the first turn-on voltage. Notably, the second turn-on voltage is lower than the first turn-on voltage. |
| US09502508B2 |
Method for manufacturing isolation structure integrated with semiconductor device
A method for manufacturing an isolation structure integrated with semiconductor device includes following steps. A substrate is provided. A plurality of trenched gates is formed in the substrate. A first insulating layer and a second insulating layer are sequentially deposited on the substrate. A first etching process is performed to remove portions of the second insulating layer to expose portions of the first insulating layer. A second etching process is then performed to remove the exposed second insulating layer to expose the trenched gates and to define at least an active region. |
| US09502500B2 |
Forming multi-stack nanowires using a common release material
A method for forming a multi-stack nanowire device includes forming a common release layer on a substrate, the common release layer comprising a common release material. The method also includes forming a first multi-layer stack on a first portion of the common release layer, the first multi-layer stack comprising at least two layers separated by at least one layer comprising the common release material, and forming a second multi-layer stack on a second portion of the common release layer, the second multi-layer stack comprising at least two layers separated by at least one layer comprising the common release material. The method further includes patterning each of the first multi-layer stack and the second multi-layer stack into one or more fins and forming two or more multi-stack nanowires from the one or more fins by removing the common release material using a common etch process. |
| US09502498B2 |
Power semiconductor device
A power semiconductor device may include a first conductivity type semiconductor substrate, a super-junction portion disposed on the first conductivity type semiconductor substrate and including a first conductivity type pillar and a second conductivity type pillar arranged in an alternating manner, and a three-dimensional (3D) gate portion disposed on the first conductivity type pillar. The 3D gate portion is disposed on the first conductivity type pillar to reduce the widths of the first and second conductivity type pillars, thereby effectively reducing a device size. |
| US09502494B2 |
Metal-insulator-metal (MIM) capacitor structure and method for forming the same
A metal-insulator-metal (MIM) capacitor structure and method for forming MIM capacitor structure are provided. The MIM capacitor structure includes a substrate and a metal-insulator-metal (MIM) capacitor formed on the substrate. The MIM capacitor includes a capacitor top metal (CTM) layer, a capacitor bottom metal (CBM) layer and an insulator formed between the CTM layer and the CBM layer. The insulator includes an insulating layer and a first high-k dielectric layer, and the insulating layer includes a nitride layer and an oxide layer, and the nitride layer is formed between the first high-k dielectric layer and the oxide layer. |
| US09502493B2 |
Multi-step method of forming a metal film
The present disclosure relates to an integrated chip having a titanium nitride film that provides for a reduced leakage path, and an associated method of formation. In some embodiments, the integrated chip comprises a semiconductor substrate. A titanium nitride film is disposed over the semiconductor substrate. The titanium nitride film comprises a plurality of titanium nitride layers having grain boundaries abutting vertical column-like structures of titanium nitride. The grain boundaries are discontinuous between a top surface of the titanium nitride film and a bottom surface of the titanium nitride film. The discontinuity of the grain boundaries between the different titanium nitride layers reduces leakage paths through the titanium nitride film (e.g., and thereby can improve operation of a MIM capacitor having titanium nitride electrodes). |
| US09502492B2 |
Semiconductor device, method of manufacturing the same, display unit, and electronic apparatus
A semiconductor device includes: a capacitor including a first insulating film between a lower electrode and an upper electrode; and a first laminated structure including a second insulating film and a semiconductor film, the second insulating film and the semiconductor film being located between part or all of a rim of the lower electrode and the first insulating film. |
| US09502488B2 |
Organic light emitting diode display device and manufacturing method thereof
An organic light emitting display device according to the present disclosure includes: a semiconductor on a substrate including a switching channel of a switching transistor and a driving channel of a driving transistor, the driving transistor being spaced from the switching transistor; a first insulating layer covering the semiconductor; a switching gate electrode on the first insulating layer and overlapping the switching channel and a driving gate electrode on the first gate insulating layer and overlapping the driving channel; a second insulating layer covering the switching gate electrode and the driving gate electrode; a data line on the second insulating layer comprising: an upper data line; and a lower data line; a driving voltage line on the second insulating layer; a passivation layer covering the data line and the driving voltage line; a pixel electrode on the passivation layer; and a first pixel connecting member on the passivation layer. |
| US09502482B2 |
Electro-optical device and electronic apparatus
An electro-optical device includes a reflective layer, a light emitting element including a light emitting layer formed between an anode and a cathode, and a driving transistor configured to control a current flowing through the light emitting element. In the same layer as the reflective layer, a relay electrode included in a current path from the driving transistor to the anode is formed with a gap between the relay electrode and the reflective layer. A contact electrode electrically connecting the relay electrode and the anode is formed as a light shielding layer that blocks light entering the gap. |
| US09502481B2 |
Organic light emitting device
Disclosed is an organic light emitting device, (OLED) comprising a substrate on which a driving transistor is formed, a bank formed on the substrate providing a boundary for a pixel region, a first electrode formed on the substrate and electrically connected with the driving transistor, the first electrode comprising a first and second cross sectional area both oriented in a direction perpendicular to a vertical direction of the substrate, the first area adjacent to the bank, the second area surrounded by the first area, an organic layer formed on the first electrode within the boundary provided by the bank, and a second electrode formed on the organic layer, wherein during operation of the OLED a first electric field between the first area of the first electrode and the second electrode is greater than a second electric field between the second area of the first electrode and the second electrode. |
| US09502480B2 |
Organic light-emitting display device and method of manufacturing the same
An organic light-emitting diode (OLED) display device includes a substrate, a first electrode on the substrate, a pixel defining layer on the substrate and having an opening that partially exposes the first electrode, an organic layer on the first electrode, and a second electrode on the organic layer and the pixel defining layer, wherein the opening includes a lower region adjacent to the first electrode, an upper region adjacent to the second electrode, and a middle region between the lower region and the upper region, wherein the middle region has a width that is greater than a width of the lower region and is greater than a width of the upper region. |
| US09502477B2 |
Display apparatus having color saturation filter with layers of different refractive indexes
A display apparatus and a filter for improving color purity (color saturation filter) are disclosed. In one aspect, the display apparatus includes a substrate, a display device formed on the substrate and having a plurality of pixel areas that emit different colors of light, and a color saturation filter on the display device. The color saturation filter is formed with a substantially uniform thickness over the plurality of pixel areas and has a transmissivity such that a full width at half maximum at the central wavelength of blue light emitted from one of the pixel areas is about 100 nm or less. |
| US09502475B2 |
Organic light emitting device
Disclosed is an organic light emitting device. The organic light emitting device includes a first emission unit configured to include a first red emission layer which emits red light, a first green emission layer which emits green light, and a first blue emission layer which emits blue light, a second emission unit configured to include a second red emission layer which emits red light, a second green emission layer which emits green light, and a second blue emission layer which emits blue light, a charge generation layer disposed between the first emission unit and the second emission unit, a first electrode formed as a reflective electrode, and configured to supply an electric charge having a first polarity to the first emission unit and the second emission unit, and a second electrode configured to supply an electric charge having a second polarity to the first and second emission units. |
| US09502465B2 |
Solid-state image pickup device
A solid-state image pickup device includes a plurality of pixels, each of the pixels including a photoelectric conversion portion, a charge holding portion, a floating diffusion, and a transfer portion. The pixel also includes a beneath-holding-portion isolation layer and a pixel isolation layer. An end portion on a photoelectric conversion portion side of the pixel isolation layer is away from the photoelectric conversion portion compared to an end portion on a photoelectric conversion portion side of the beneath-holding-portion isolation layer, and an N-type semiconductor region constituting part of the photoelectric conversion portion is disposed under at least part of the beneath-holding-portion isolation layer. |
| US09502462B1 |
Image sensor integrated circuit
An integrated circuit (IC) sensor is described. The IC sensor includes a pixel array and IC components. The pixel array has a plurality of pixels, wherein each pixel includes an EMR absorption region including a detector material having a plurality of nanoparticles embedded in a matrix material and exhibiting a nano-plasmonic property. The IC components are arranged to provide amplification of a voltage signal from the EMR absorption region, and to select the voltage signal from the EMR absorption region. |
| US09502457B2 |
Global shutter image sensor pixels having centralized charge storage regions
An image sensor may be provided with an array of image pixels formed on a substrate having front and back surfaces. Each pixel may have a photodiode that receives light through the back surface, a floating diffusion node, and a charge transfer gate. The floating diffusion node may be formed in the center of the photodiode and may be surrounded by the charge transfer gate at the front surface. The charge transfer gate may isolate the floating diffusion node from the surrounding photodiode. The pixel may include reset transistor gates, an addressing transistor gate, and a source follower transistor arranged about the periphery of the photodiode. By centering the floating diffusion node and charge transfer gate within the photodiode, the image pixels may have improved shutter efficiency and charge transfer efficiency relative to pixels having floating diffusion nodes at non-centralized locations. |
| US09502453B2 |
Solid-state imaging devices
A solid-state imaging device is provided. The solid-state imaging device includes a semiconductor substrate containing a plurality of image sensors. A color filter including a plurality of color filter segments is disposed above the semiconductor substrate. Each of the color filter segments corresponds to one of the image sensors. Further, a plurality of partitions is disposed between the color filter segments. Each of the partitions is disposed between any two adjacent color filter segments. The partition has a height smaller than the height of the color filter segment, wherein the height of the partition is based on the bottom of the color filter segment to the top of the partition, and the height of the color filter segment is based on the bottom of the color filter segment to the top of the color filter segment. |
| US09502452B2 |
Image pickup apparatus, image pickup system, and image pickup apparatus driving method
Each of multiple pixels includes a photoelectric conversion unit. A first holding unit is configured to hold a charge generated by the photoelectric conversion unit, at a location different from location of the photoelectric conversion unit. A second holding unit is configured to hold a charge held by the first holding unit at a location different from locations of both of the first holding unit and the photoelectric conversion unit. An amplifying unit includes an input node different from the second holding unit and is configured to output a signal based on a charge transferred to the input node from the second holding unit. A first discharge unit includes a charge draining node which is electrically connected to a line where a predetermined voltage is supplied. The first discharge unit discharges a charge held by the first holding unit to the charge draining node. |
| US09502449B2 |
Low-power semi-reflective display
A semi-reflective display and a method for fabricating and assembling a semi-reflective display are presented, where the display may be comprised of visible light rectifying antenna arrays tuned to four different colors, which when forward biased may use electric power to amplify reflected colored light, and when reversed biased may generate electric power by absorbing light. TFT-tunnel diode logic may be used to control each sub-pixel. |
| US09502448B2 |
Method for fabricating an array substrate with improved driving ability
A method for fabricating an array substrate includes sequentially forming a bottom gate, a first gate insulating layer, an active layer and a second gate insulating layer on a base substrate, a gate line being formed at the same time as forming the bottom gate; forming a top gate on the second gate insulating layer; sequentially forming a gate isolation layer, a source electrode, a drain electrode and a pixel electrode on the top gate. Before forming the top gate on the second gate insulating layer, the method includes forming a nickel layer at an area on the active layer where the source electrode is to be formed and/or an area on the active layer where the drain electrode is to be formed, and then performing a heat treatment on the active layer at a temperature in the range of 500° C.-570° C. for 2 hours in an atmosphere of H2. |
| US09502446B2 |
Poly-silicon TFT, poly-silicon array substrate and preparing method thereof, display device
Provided are a poly-silicon thin film transistor (TFT), a poly-silicon array substrate and a preparing method thereof, and a display device for solving the problems of excessive mask plates, complicated process and high costs in a conventional technology. The method of preparing the poly-silicon TFT comprising a doped region comprises steps: forming a poly-silicon layer on a substrate, forming an active layer by a patterning process; forming a first insulating layer; forming, by a patterning process, via holes exposing the active layer, the source electrode and the drain electrode being connected through the via holes to the active layer; doping the active layer through the via holes by a doping process to form a doped region; forming a source-drain metal layer, and forming the source electrode and the drain electrode by a patterning process. |
| US09502445B2 |
Thin film transistor array substrate and method of manufacturing the same
A TFT array substrate includes a semiconductive oxide layer disposed on an insulating substrate and including a channel portion, a gate electrode overlapping the semiconductive oxide layer, a gate insulating layer interposed between the semiconductive oxide layer and the gate electrode, and a passivation layer disposed on the semiconductive oxide layer and the gate electrode. At least one of the gate insulating layer and the passivation layer includes an oxynitride layer, and the oxynitride layer has a higher concentration of oxygen than that of nitrogen in a location of the oxynitride layer closer to the semiconductive oxide layer. |
| US09502444B2 |
Method for forming a thin-film layer pattern, display substrate and manufacturing method thereof, and display device
A method for forming a thin-film layer pattern, a display substrate and a manufacturing method thereof, and a display device are provided. The method for forming the thin-film layer pattern comprises: forming a first thin-film layer to be patterned on a substrate; forming a first overcoat (OC) layer on a surface of the first thin-film layer; forming a first overcoat layer pattern by beam melting; and removing the first thin-film layer not covered by the first overcoat layer pattern to form a first thin-film layer pattern. The method adopts beam melting process and hence can improve the accuracy and the resolution of the display substrate, improve the product quality and reduce the manufacturing cost. |
| US09502440B2 |
Display device and electronic device
A novel display device capable of excellent reflective display is provided. The display device includes a transistor including a gate electrode layer, a gate insulating layer over the gate electrode layer, a semiconductor layer over the gate insulating layer, and a source electrode layer and a drain electrode layer over the gate insulating layer and the semiconductor layer; a reflective electrode layer on the same plane as the source electrode layer and the drain electrode layer; a coloring layer overlapping with the reflective electrode layer; a pixel electrode layer overlapping with the coloring layer; and an anti-oxidation conductive layer connected to one of the source electrode layer and the drain electrode layer. The pixel electrode layer is connected to the transistor through the anti-oxidation conductive layer. |
| US09502436B2 |
Thin film transistor, array substrate and method for fabricating the same, and display device
A thin film transistor, an array substrate and a method for fabricating the array substrate, and a display device are disclosed. The thin film transistor comprises a gate electrode, a gate insulation layer, a semiconductor active layer, a source electrode, a drain electrode and a protection layer provided on a base substrate, and comprises: a first transparent electrode provided between the source electrode and the semiconductor active layer, corresponding to the source electrode and in direct contact with the source electrode; a second transparent electrode provided between the drain electrode and the semiconductor active layer, corresponding to the drain electrode and in direct contact with the drain electrode, the first transparent electrode is in contact with the semiconductor active layer through a first via provided in the protection layer, the second transparent electrode is in contact with the semiconductor active layer through a second via provided in the protection layer. |
| US09502434B2 |
Semiconductor device and electronic device
The electric characteristics of a semiconductor device using an oxide semiconductor are improved. The reliability of a semiconductor device using an oxide semiconductor is improved. The semiconductor device includes an element layer. The element layer includes a first film, a transistor, and a second film. The first film and the second film are partly in contact with each other. The region in which the first film and the second film are in contact with each other has a closed-loop shape when seen from above. The transistor is located between the first film and the second film. The region in which the first film and the second film are in contact with each other is located between a side surface of the element layer and the transistor. |
| US09502433B2 |
Schottky clamped radio frequency switch
Various methods and devices that involve radio frequency (RF) switches with clamped bodies are provided. An exemplary RF switch with a clamped body comprises a channel that separates a source and a drain. The RF switch also comprises a clamp region that spans the channel, extends into the source and drain, and has a lower dopant concentration than both the source and drain. The RF switch also comprises a pair of matching silicide regions formed on either side of the channel and in contact with the clamp region. The clamp region forms a pair of Schottky diode barriers with the pair of matching silicide regions. The RF switch can operate in a plurality of operating modes. The pair of Schottky diode barriers provide a constant sink for accumulated charge in the clamped body that is independent of the operating mode in which the RF switch is operating. |
| US09502429B2 |
Set of stepped surfaces formation for a multilevel interconnect structure
A trench can be formed through a stack of alternating plurality of first material layers and second material layers. A dielectric material liner and a trench fill material portion can be formed in the trench. The dielectric material liner and portions of first material layer can be simultaneously etched to form laterally-extending cavities having level-dependent lateral extents. A set of stepped surfaces can be formed by removing unmasked portions of the second material layers. Alternately, an alternating sequence of processing steps including vertical etch processes and lateral recess processes can be employed to laterally recess second material layers and to form laterally-extending cavities having level-dependent lateral extents. Lateral cavities can be simultaneously formed in multiple levels such that levels having laterally-extending cavities of a same lateral extent are offset across multiple integrated cavities. |
| US09502421B2 |
Semiconductor device and method for fabricating a semiconductor device
A semiconductor device is disclosed. In one embodiment, the semiconductor device includes two different semiconductor materials. The two semiconductor materials are arranged adjacent one another in a common plane. |
| US09502416B1 |
Semiconductor device including transistors having different threshold voltages
A semiconductor device includes first through fourth areas, first through fourth gate stacks, the first gate stack includes a first high-dielectric layer, a first TiN layer to contact the first high-dielectric layer, and a first gate metal on the first TiN layer, the second gate stack includes a second high-dielectric layer, a second TiN layer to contact the second high-dielectric layer, and a second gate metal on the second TiN layer, the third gate stack includes a third high-dielectric layer, a third TiN layer to contact the third high-dielectric layer, and a third gate metal on the third TiN layer, and the fourth gate stack includes a fourth high-dielectric layer, a fourth TiN layer to contact the fourth high-dielectric layer, and a fourth gate metal on the fourth TiN layer, the first through fourth thicknesses of the TiN layers being different. |
| US09502413B2 |
Semiconductor devices including raised source/drain stressors and methods of manufacturing the same
A semiconductor device including source drain stressors is provided. The semiconductor device includes a gate structure including a gate insulating layer and a gate electrode on a semiconductor substrate. Gate spacers may be disposed on sidewalls of the gate structure and a stressor pattern including an impurity region is disposed on a side of the gate structure. The stressor pattern includes a protruded portion having a top surface higher than a bottom surface of the gate structure and a facet in the protruded portion. The facet is slanted at a predetermined angle with respect to an upper surface of the semiconductor substrate and forms a concave portion with one of the gate spacers. A blocking insulating layer may extend conformally on the stressor pattern and the gate spacers and an insulating wing pattern is disposed in the concave portion on the blocking insulating layer. |
| US09502412B2 |
Semiconductor device structure with gate spacer having protruding bottom portion and method for forming the same
A semiconductor device structure and method for forming the same are provided. The semiconductor device structure includes a substrate and a gate stack structure formed on the substrate. The semiconductor device structure also includes gate spacers formed on the sidewall of the gate stack structure, and the gate spacers include a top portion and a bottom portion adjoined to the top portion, and the bottom portion slopes to a top surface of the substrate. The semiconductor device structure further includes an epitaxial structure formed adjacent to the gate spacers, and the epitaxial structure is formed below the gate spacers. |
| US09502411B1 |
Strained finFET device fabrication
A method for forming a fin on a substrate comprises patterning and etching a layer of a first semiconductor material to define a strained fin, depositing a layer of a second semiconductor material over the fin, the second semiconductor material operative to maintain the a strain in the strained fin, etching to remove a portion of the second semiconductor material to define a cavity that exposes a portion of the fin, etching to remove the exposed portion of the fin such that the fin is divided into a first segment and a second segment, and depositing an insulator material in the cavity, the insulator material contacting the first segment of the fin and the second segment of the fin. |
| US09502410B1 |
Semiconductor structure and manufacturing method thereof
The present invention provides a semiconductor structure, including a substrate having a first fin structure and a second fin structure disposed thereon, a first isolation region located between the first fin structure and the second fin structure, a second isolation region located opposite the first fin structure from the first isolation region, and at least an epitaxial layer disposed on the side of the first fin structure and the second fin structure. The epitaxial layer has a bottom surface, the bottom surface extending from the first fin structure to the second fin structure, and the bottom surface is lower than a bottom surface of the first isolation region and a top surface of the second isolation region. |
| US09502407B1 |
Integrating a planar field effect transistor (FET) with a vertical FET
One embodiment provides a method of integrating a planar field-effect transistor (FET) with a vertical FET. The method comprises masking and etching a semiconductor of the vertical FET to form a fin, and providing additional masking, additional etching, doping and depositions to isolate a bottom source/drain (S/D) region. A dielectric is formed on the bottom S/D region to form a spacer. The method further comprises depositing gate metals, etching a vertical gate for the vertical FET and a planar gate for the planar FET using a shared gate mask, depositing dielectric, etching the dielectric to expose one or more portions of the fin, growing epitaxy on a top S/D region, masking and etching S/D contact openings for the bottom S/D region, forming silicide regions in S/D regions, depositing contact metal in the silicide regions to form contacts, and planarizing the contacts. |
| US09502403B2 |
Method for core and in/out-put device reliability improve at high-K last process
A method for fabricating a semiconductor device includes providing a semiconductor substrate, forming on the semiconductor substrate a dummy gate interface layer and a dummy gate of a core device and a gate interface layer and a dummy gate of an IO device, removing the dummy gates of the core and IO devices, removing the dummy gate interface layer of the core device, forming a gate interface layer in the original location of the removed dummy gate interface layer, forming a high-k dielectric layer each on the gate interface layer of the core and IO devices, and submitting the semiconductor substrate to a high-pressure fluorine annealing. The high-pressure fluorine annealing causes the gate interface layer and the high-k dielectric layer of the core and IO devices to be doped with fluoride ions. |
| US09502398B2 |
Composite device with integrated diode
There are disclosed herein various implementations of composite semiconductor devices. In one implementation, such a composite semiconductor device includes a transition body formed over a diode, the transition body including more than one semiconductor layer. The composite semiconductor device also includes a transistor formed over the transition body. The diode may be connected across the transistor using through-semiconductor vias, external electrical connectors, or a combination of the two. |
| US09502397B1 |
3D interconnect component for fully molded packages
A method of making a semiconductor component package can include providing a substrate comprising conductive traces, soldering a surface mount device (SMD) to the substrate with solder, encapsulating the SMD on the substrate with a first mold compound over and around the SMD to form a component assembly, and mounting the component assembly to a temporary carrier with a first side of the component assembly oriented towards the temporary carrier. The method can further include mounting a semiconductor die comprising a conductive interconnect to the temporary carrier adjacent the component assembly, encapsulating the component assembly and the semiconductor die with a second mold compound to form a reconstituted panel, and exposing the conductive interconnect and the conductive traces at the first side and the second side of the component assembly with respect to the second mold compound. |
| US09502395B2 |
Power semiconductor package having vertically stacked driver IC
In one implementation, a semiconductor package includes a control conductive carrier having a die side and an opposite input/output (I/O) side connecting the semiconductor package to a mounting surface. The semiconductor package also includes a control FET of a power converter switching stage attached to the die side of the control conductive carrier, and a driver integrated circuit (IC) for driving the control FET. The driver IC is situated above the control FET and is electrically coupled to the control FET by at least one conductive buildup layer formed over the control conductive carrier. |
| US09502394B2 |
Package on-Package (PoP) structure including stud bulbs and method
Embodiments concern Package-On-Package (PoP) structures including stud bulbs and methods of forming PoP structures. According to an embodiment, a structure includes a first substrate, stud bulbs, a die, a second substrate, and electrical connectors. The stud bulbs are coupled to a first surface of the first substrate. The die is attached to the first surface of the first substrate. The electrical connectors are coupled to the second substrate, and respective ones of the electrical connectors are coupled to respective ones of the stud bulbs. |
| US09502393B2 |
Display device and method for manufacturing the same
Disclosed is a display device including features that suppresses threshold voltage variation among the oxide thin-film transistors of an array substrate and a method for manufacturing the same. The display device includes a first COG block including sub-pixels configured to receive an output signal from a first drive integrated circuit positioned in a first COG area; a second COG block including sub-pixels configured to receive an output signal from a second drive integrated circuit positioned in a second COG area; and an equipotential line extended from the first COG area to the second COG area. |
| US09502391B2 |
Semiconductor package, fabrication method therefor, and package-on package
Provided is a method of manufacturing a semiconductor package including a through wiring having precision and a low process defect. The semiconductor package includes an insulating substrate including a first through portion and a second through portion; a through wiring which fills the first through portion, and is located to penetrate the insulating substrate; a semiconductor chip which is located in the second through portion, and is electrically connected to the through wiring; a molding member molding the semiconductor chip and the insulating substrate; and a re-wiring pattern layer which is located at a lower side of the insulating substrate, and electrically connects the through wiring and the semiconductor chip. |
| US09502388B2 |
Switching element with a series-connected junction FET (JFET) and MOSFET achieving both improved withstand voltage and reduced on-resistance
Technology capable of improving reliability of a semiconductor device is provided. In the present invention, a gate pad GPj formed on a front surface of a semiconductor chip CHP1 is disposed so as to be closer to a source lead SL than to other leads (a drain lead DL and a gate lead GL). As a result, according to the present invention, a distance between the gate pad GPj and the source lead SL can be shortened, and thus a length of the wire Wgj for connecting the gate pad GPj and the source lead SL together can be shortened. Thus, according to the present invention, a parasitic inductance that is present in the wire Wgj can be sufficiently reduced. |
| US09502387B2 |
Package-on-package structure with through molding via
Disclosed herein is a device comprising a first package having a first side with a plurality of connectors disposed thereon and a second package mounted on the first package by the connectors. A molding compound is disposed on the first side of the first package and between the first package and the second package. A plurality of stress relief structures (SRSs) are disposed in the molding compound, the plurality of SRSs each comprising a cavity free of metal in the molding compound and spaced apart from each of the plurality of connectors. |
| US09502385B2 |
Semiconductor device and connection checking method for semiconductor device
A package-on-package (POP), including a semiconductor device, and a multi-chip-package located above the semiconductor device, wherein the semiconductor device includes a substrate including a first surface, a plurality of electrodes formed on the first surface, a second surface opposite to the first surface, a plurality of lands formed on the second surface, and a plurality of wirings, (a2) a semiconductor chip mounted over the first surface of the substrate, and (a3) a plurality of first solder balls formed on the lands, respectively, wherein the multi-chip-package is electrically connected with the semiconductor device via a plurality of second solder balls, wherein the plurality of second solder balls are connected with the plurality of electrodes, respectively. |
| US09502380B2 |
Three dimensional integrated circuits stacking approach
A semiconductor package and a method of forming a semiconductor package with one or more dies over an interposer are provided. In some embodiments, the method is performed by placing an interposer with one or more through-substrate-vias (TSVs) on a first adhesive layer overlying a first carrier substrate. Connection structures are arranged along a first surface of the interposer facing the first adhesive layer. A first molding compound is formed over the first adhesive layer and surrounding the interposer. The first molding compound is arranged to expose the TSVs along a second surface of the interposer. A first redistribution structure is formed over the second surface of the interposer and the first molding compound, and conductive bump structures are formed over the first redistribution structure. A first packaged die is bonded to the conductive bump structures. |
| US09502375B2 |
Semiconductor device with plated pillars and leads
A semiconductor device with plated pillars and leads is disclosed and may include a semiconductor die comprising a conductive pillar, a conductive lead electrically coupled to the conductive pillar, a metal plating layer covering the conductive lead and conductive pillar, and an encapsulant material encapsulating the semiconductor die and at least a portion of the plating layer. The pillar, lead, and plating layer may comprise copper, for example. The plating layer may fill a gap between the pillar and the lead. A portion of the metal plating layer may, for example, comprise an external lead. The metal plating layer may cover a side surface of the pillar and a top surface, side surface, and at least a portion of a bottom surface of the lead. The metal plating layer may cover side and bottom surfaces of the pillar and top, side, and at least a portion of bottom surfaces of the conductive lead. |
| US09502373B2 |
Lid attach process and apparatus for fabrication of semiconductor packages
An adhesive dispenser comprises a dispensing head. The dispensing head comprises an adhesive material applicator portion on a first level of the dispensing head. The adhesive material applicator portion corresponds to a periphery of a package. The dispensing head also comprises a thermal interface material (TIM) applicator portion on a second level of the dispensing head different from the first level. The TIM applicator portion corresponds to a die of the package. The dispensing head further comprises an adhesive material conduit configured to supply the adhesive material applicator portion with an adhesive material. The dispensing head additionally comprises a TIM conduit configured to supply the TIM applicator portion with a TIM. |
| US09502369B2 |
Semiconductor devices and packages
Semiconductor device packages include first and second semiconductor dice in a facing relationship. At least one group of solder bumps is substantially along a centerline between the semiconductor dice and operably coupled with integrated circuitry of the first and second semiconductor dice. Another group of solder bumps is laterally offset from the centerline and operably coupled only with integrated circuitry of the first semiconductor die. A further group of solder bumps is laterally offset from the centerline and operably coupled only with integrated circuitry of the second semiconductor die. Methods of forming semiconductor device packages include aligning first and second semiconductor dice with active surfaces facing each other, the first and second semiconductor dice each including bond pads along a centerline thereof and additional bond pads laterally offset from the centerline thereof. |
| US09502368B2 |
Picture frame stiffeners for microelectronic packages
A microelectronic package may be formed with a picture frame stiffener surrounding a microelectronic die for reducing warpage of the microelectronic package. An embodiment for fabricating such a microelectronic package may include forming a microelectronic die having an active surface and an opposing back surface, wherein the microelectronic die active surface may be attached to a microelectronic substrate. A picture frame stiffener having an opening therethrough may be formed and placed on a release film, wherein a mold material may be deposited over the picture frame stiffener and the release film. The microelectronic die may be inserted into the mold material, wherein at least a portion of the microelectronic die extends into the picture frame opening. The release film may be removed and a portion of the mold material extending over the microelectronic die back surface may then be removed to form the microelectronic package. |
| US09502366B2 |
Semiconductor structure with UBM layer and method of fabricating the same
A semiconductor structure with an under bump metallization (UBM) layer is provided. The semiconductor structure at least includes a substrate, a metal pad disposed on the substrate, an insulating layer covering the substrate and an edge of the metal pad, wherein at least one recess is disposed within the insulating layer and a first UBM layer contacts the metal pad. The recess is adjacent to the metal pad and the recess is in the shape of a ring. The first UBM layer contacts part of the recess. |
| US09502363B2 |
Wafer level packages and methods for producing wafer level packages having delamination-resistant redistribution layers
Wafer level packages and methods for producing wafer level packages having delamination-resistant redistribution layers are provided. In one embodiment, the method includes building inner redistribution layers over a semiconductor die. Inner redistribution layers include a body of dielectric material containing metal routing features. A routing-free dielectric block is formed in the body of dielectric material and is uninterrupted by the metal routing features. An outer redistribution layer is produced over the inner redistribution layers and contains a metal plane, which is patterned to include one or more outgassing openings overlying the routing-free dielectric block. The routing-free dielectric block has a minimum width, length, and depth each at least twice the thickness of the outer redistribution layer. |
| US09502359B2 |
Integrated circuit component shielding
Embodiments of shielding apparatuses are disclosed herein. In some embodiments, a shielding apparatus may include first and second conductive regions and a plurality of vias disposed between the first and second conductive regions. The first and second conductive regions and the plurality of vias may surround an integrated circuit (IC) component and individual vias of the plurality of vias are spaced relative to one another to shield incoming or outgoing electromagnetic interference (EMI). Other embodiments may be described and/or claimed. |
| US09502349B2 |
Separated lower select line in 3D NAND architecture
Roughly described, a memory device has a multilevel stack of conductive layers which are divided laterally into separate word lines, each defining a block of memory cells. Vertically oriented pillars each include series-connected memory cells at cross-points between the pillars and the conductive layers. String select lines run above the conductive layers, each intersection of a pillar and an string select line defining a respective select gate of the pillar. Bit lines run above the SSLs. Ground select lines run below the conductive layers, each intersection of a pillar and a ground select line defining a respective ground select gate of the pillar. The ground select lines are divided laterally such that the number of ground select lines in each block is greater than 1 but less than the number of string select lines in the block. |
| US09502347B2 |
Microelectronic assemblies formed using metal silicide, and methods of fabrication
Two microelectronic components (110, 120), e.g. a die and an interposer, are bonded to each other. One of the components' contact pads (110C) include metal, and the other component has silicon (410) which reacts with the metal to form metal silicide (504). Then a hole (510) is made through one of the components to reach the metal silicide and possibly even the unreacted metal (110C) of the other component. The hole is filled with a conductor (130), possibly metal, to provide a conductive via that can be electrically coupled to contact pads (120C.B) attachable to other circuit elements or microelectronic components, e.g. to a printed circuit board. |
| US09502346B2 |
Integrated circuit with a sidewall layer and an ultra-thick metal layer and method of making
An integrated circuit that includes a substrate, a metal layer over the substrate and a first dielectric layer over the metal layer. The first dielectric layer includes a via. A sidewall layer that includes a silicon compound is in the via. A second dielectric layer is over the sidewall layer and an ultra-thick metal (UTM) layer is in the via. |
| US09502343B1 |
Dummy metal with zigzagged edges
A structure includes a metal pad, a passivation layer having a portion covering edge portions of the metal pad, and a dummy metal plate over the passivation layer. The dummy metal plate has a plurality of through-openings therein. The dummy metal plate has a zigzagged edge. A dielectric layer has a first portion overlying the dummy metal plate, second portions filling the first plurality of through-openings, and a third portion contacting the first zigzagged edge. |
| US09502342B2 |
Semiconductor package and method of fabricating the same
A method of fabricating a package-on-package (PoP) type of semiconductor package may include providing a lower package with a lower substrate, a lower semiconductor chip, and a lower mold layer and providing an upper package with an upper substrate, an upper semiconductor chip, and an upper mold layer. A through hole is formed to penetrate the upper package, and the upper package and lower package are electrically connected. A thermal interface material is injected into the through hole to form a first heat transmission part between, and in contact with, the upper package and the lower package. |
| US09502338B2 |
Semiconductor package with switch node integrated heat spreader
In one implementation, a semiconductor package includes a patterned conductive carrier including partially etched segments. The semiconductor package also includes a control FET having a control drain attached to a first partially etched segment of the patterned conductive carrier. In addition, the semiconductor package includes a sync FET having a sync source and a sync gate attached to respective second and third partially etched segments of the patterned conductive carrier. The semiconductor package further includes a heat spreading conductive plate situated over a control source of the control FET and over a sync drain of the sync FET so as to couple the control source and the sync drain to a switch node segment of the patterned conductive carrier. |
| US09502336B2 |
Coreless substrate with passive device pads
Embodiments of the present disclosure are directed towards coreless substrates with passive device pads, as well as methods for forming coreless substrates with passive device pads and package assemblies and systems incorporating such coreless substrates. A coreless substrate may comprise a plurality of build-up layers, such as bumpless build-up layers (BBUL). In various embodiments, electrical routing features and passive device pads may be disposed on an outer surface of the substrate. In various embodiments, the passive device pads may be coupled with a conductive element disposed on or within the build-up layers. In various embodiments, an electrical path may be defined in the plurality of build-up layers to route electrical power between the passive device pads and a die coupled to the coreless substrate. |
| US09502333B2 |
Semiconductor device having conductive vias
A semiconductor device is provided, including: a substrate having opposing first and second surfaces and a plurality of conductive vias passing through the first and second surfaces; an insulating layer formed on the first surface of the substrate and exposing end portions of the conductive vias therefrom; and a buffer layer formed on the insulating layer at peripheries of the end portions of the conductive vias, thereby increasing product reliability and good yield. |
| US09502330B1 |
Coolant distribution structure for monolithic microwave integrated circuits (MMICs)
A coolant distribution structure for an MMIC having: an input/output layer with an input port for receiving a coolant for transmission to coolant channels in the MMIC and an output port for exiting the coolant after such coolant has cooled active devices in the MMIC, a coolant pass-through layer to receive the coolant from the input port and having structure to inhibit such received coolant from passing directly to the output port, a coolant distribution layer for receiving coolant passing from the coolant pass-through layer and distributing such received coolant to the cooling channels to absorb heat generated by the active devices and then directing heated coolant to the coolant distribution layer and out of the porting layer via the pass-through layer. The coolant pass-through layer has a structure configured to inhibit such heated coolant from passing directly to the input port prior to such heated absorbed coolant being transmitted to the output port. |
| US09502329B2 |
Semiconductor module cooler
A semiconductor module cooler supplies a cooling medium to a cooling medium jacket from outside to cool a plurality of semiconductor elements thermally connected to the cooling medium jacket through a heat sink. The cooling medium jacket has a cooling fin cooling room including an opening for inserting cooling fins, and cooling the cooling fins; a cooling medium introduction port to introduce the cooling medium; a cooling medium diffusion room to diffuse and supply the cooling medium to the cooling fin cooling room; a cooling medium diffusion wall provided in the cooling medium diffusion room in which the cooling medium diffused by the cooling medium diffusion room flows over to be introduced to the cooling fin cooling room side; a cooling medium discharge port discharging the cooling medium to the outside; and a cooling medium convergence room provided between the cooling fin cooling room and the cooling medium discharge port. |
| US09502328B2 |
Silicon-on-plastic semiconductor device and method of making the same
A semiconductor device that does not produce nonlinearities attributed to a high resistivity silicon handle interfaced with a dielectric region of a buried oxide (BOX) layer is disclosed. The semiconductor device includes a semiconductor stack structure with a first surface and a second surface wherein the second surface is on an opposite side of the semiconductor stack structure from the first surface. At least one device terminal is included in the semiconductor stack structure and at least one electrical contact extends from the second surface and is electrically coupled to the at least one device terminal. The semiconductor stack is protected by a polymer disposed on the first surface of the semiconductor stack. The polymer has high thermal conductivity and high electrical resistivity. |
| US09502327B2 |
Semiconductor device and method for manufacturing the same
A semiconductor device includes: a semiconductor element having a solder region and a non-solder region on a first face; a first metal member disposed on the first face of the semiconductor element; a second metal member disposed on a rear face of the semiconductor element; a first solder that connects the solder region of the semiconductor element and the first metal member; and a second solder that connects the rear face of the semiconductor element and the second metal member. At least the second solder provides a melt-bond. A gravity center position of the first metal member coincides with a center position of the semiconductor element in a projection view from a stacking direction. |
| US09502325B2 |
Integrated circuit barrierless microfluidic channel
A structure and method for fabricating a continuous cooling channel in the back end of line wiring levels of an integrated circuit (IC) chip is provided. This continuous cooling channel may provide a path for a cooling source such as a fluid pumped from an external fluidic-cooling circulation driver to make physical contact locally with and cool the back end levels within the IC chip that may generate heat as a byproduct of the IC device's routine operations. Such a cooling structure is achieved by removing a horizontal portion of a barrier layer from an intermediate region of an interlevel interconnect structure, selective to a vertical portion of the barrier layer located on a sidewall of the interlevel interconnect structure, using gas cluster ion beam etching as well as removing the bulk conductor by additional means. |
| US09502324B2 |
Electronic device
An electronic device having a heat generating element and a housing is provided including a heat dissipation arrangement provided between the heat generating element and the housing, the heat dissipation arrangement comprising a first layer in contact with the heat generating element and a second layer provided on top of the first layer and being in contact with the housing, the first layer having higher heat conductivity than the second layer, the second layer preventing heat from rapidly passing through such that the heat can be diffused in the first layer. |
| US09502322B2 |
Molding compound supported RDL for IC package
One of the embodiments for a package substrate discloses a molding compound having plurality of metal pillar with middle portion embedded therein; a top end of the metal pillar protrudes above the molding compound; a bottom end of the metal pillar protrudes below the molding compound; a bottom RDL is configured on bottom of the molding compound; the RDL has a plurality of top metal pad and a plurality of bottom metal pad; a density of the plurality of bottom metal pad is higher than the density of the plurality of top metal pad; each metal pillar metal pad is electrically coupled to a corresponding first top metal pad. |
| US09502321B2 |
Thin film RDL for IC package
A package substrate comprising a thin film redistribution layer (RDL) with a plurality of metal pillar configured on chip side is disclosed to thin the thickness of an IC package before mounting to a circuit board. The height of metal pillar keeps a proper distance between the IC chip and the package substrate so that an underfill material can be filled in between to ensure the reliability of the IC package. |
| US09502320B2 |
Semiconductor device
A semiconductor device includes an insulating substrate including a metal plate, an insulating plate, and a circuit plate laminated sequentially in order; a semiconductor element fixed to the circuit plate; a wiring member connected to an electrode provided on a surface of the semiconductor element, the circuit plate, or the electrode and the circuit plate; a plastic housing having a hollow shape to receive the insulating substrate, the semiconductor element, and the wiring member therein, the plastic housing having an inner frame on an inner surface and a step formed in a front end of the inner frame; and a sealing material made of a thermosetting resin to seal the insulating substrate, the semiconductor element, and the wiring member inside the plastic housing. |
| US09502316B2 |
Method and device for producing a plurality optoelectronic elements
A method for producing a plurality of optoelectronic components may include measuring at least one measurement parameter for a first optoelectronic component and a second optoelectronic component, and processing the first optoelectronic component and the second optoelectronic component taking account of the measured measurement parameter value of the first optoelectronic component and the measured measurement parameter value of the second optoelectronic component, such that the optoelectronic properties of the first optoelectronic component and the optoelectronic properties of the second optoelectronic component are changed in a different way toward at least one common predefined optoelectronic target property. The processing of at least one value of a measurement parameter of the optoelectronic properties of the first optoelectronic component or of the optoelectronic properties of the second optoelectronic component toward the optoelectronic target property is formed by means of a compensation element. The compensation element is formed as a film. |
| US09502315B2 |
Electrical component testing in stacked semiconductor arrangement
A stacked semiconductor arrangement is provided. The stacked semiconductor arrangement includes a dynamic pattern generator layer having an electrical component. The arrangement also includes a monitoring layer configured to evaluate electrical performance of the electrical component. |
| US09502314B2 |
Method for manufacturing tested apparatus and method for manufacturing system including tested apparatus
Disclosed herein is a method for manufacturing a tested apparatus that includes forming a stacked structure that includes a plurality of first semiconductor chips stacked over a semiconductor wafer. The semiconductor wafer comprises a plurality of second semiconductor chips that are arranged in matrix of a plurality of rows and columns. Each of the first semiconductor chips is stacked over and electrically connected to a different one of the second semiconductor chips. The method further includes contacting a probe card to at least one of the first semiconductor chips to perform a first test operation on a corresponding one of the second semiconductor chips with an intervention of the at least one of the first semiconductor chips so that a plurality of tested apparatus each comprising a pair of first and second semiconductor chips stacked with each other is derived. |
| US09502309B1 |
Forming CMOSFET structures with different contact liners
A method of making a semiconductor device includes forming a first trench contact over a first source/drain region of a first transistor; forming a second trench contact over a second source/drain region of a second transistor; depositing a first liner material within the first trench contact; and depositing a second liner material within the second trench contact; wherein the first liner material and the second liner material include different materials. |
| US09502308B1 |
Methods for forming transistor devices with different source/drain contact liners and the resulting devices
A method includes forming first and second contact openings so as to expose first and second source/drain regions, respectively, of a semiconductor material. At least one process operation is performed to selectively form a first liner only in the first contact opening. The first liner covers a bottom portion of the first contact opening and exposes a sidewall portion of the first contact opening. A second liner is formed in the first and second contact openings. At least one process operation is performed so as to form a conductive material above the second liner to fill the first and second contact openings and define first and second contacts conductively coupled to the first and second source/drain regions, respectively. |
| US09502307B1 |
Forming a semiconductor structure for reduced negative bias temperature instability
An approach to forming a semiconductor structure with improved negative bias temperature instability includes forming an interfacial layer on a semiconductor substrate with an nFET and a pFET. The approach includes depositing a gate dielectric layer on the interfacial layer. Additionally, the approach includes an nFET work function metal layer deposited on the interfacial layer. Additionally, the approach includes removing the nFET work function metal from an area above the pFET and depositing a pFET work function metal layer on a portion of the exposed gate dielectric layer where the portion of the exposed gate dielectric layer is over the pFET. Furthermore, the approach includes depositing a gate metal on the pFET work function metal layer where the gate metal is deposited in an environment with a fluorine containing gas followed by an anneal in a reducing environment. |
| US09502306B2 |
Pattern formation method that includes partially removing line and space pattern
The present invention provides a pattern formation method of forming a pattern on a substrate by partially removing a line and space pattern formed on the substrate, comprising a first formation step of forming a first layer including a plurality of first openings on the line and space pattern, a second step of forming, on the first layer, a second layer including a second opening for exposing one or more first openings, which are used to partially remove the line and space pattern, among the plurality of first openings, and a removing step of partially removing the line and space pattern through the second opening and the first opening, wherein the plurality of first openings are located on a plurality of lines of the line and space pattern. |
| US09502304B2 |
Semiconductor device and driver circuit with drain and isolation structure interconnected through a diode circuit, and method of manufacture thereof
Embodiments of semiconductor devices and driver circuits include a semiconductor substrate having a first conductivity type, an isolation structure (including a sinker region and a buried layer), an active device within area of the substrate contained by the isolation structure, and a diode circuit. The buried layer is positioned below the top substrate surface, and has a second conductivity type. The sinker region extends between the top substrate surface and the buried layer, and has the second conductivity type. The active device includes a drain region of the second conductivity type, and the diode circuit is connected between the isolation structure and the drain region. The diode circuit may include one or more Schottky diodes and/or PN junction diodes. In further embodiments, the diode circuit may include one or more resistive networks in series and/or parallel with the Schottky and/or PN diode(s). |
| US09502303B2 |
Method for manufacturing semiconductor device with a barrier layer having overhung portions
A method for manufacturing a semiconductor device is provided. A substrate with an insulation formed thereon is provided, wherein the insulation has plural trenches, and the adjacent trenches are spaced apart from each other. A barrier layer is formed on an upper surface of the insulation and in sidewalls of the trenches, and the barrier layer comprises overhung portions corresponding to the trenches. A seed layer is formed on the barrier layer. Then, an upper portion of the seed layer formed on an upper surface of the barrier layer is removed. An upper portion of the barrier layer is removed for exposing the upper surface of the insulation. Afterwards, the conductors are deposited along the seed layer for filling up the trenches, wherein the top surfaces of the conductors are substantially aligned with the upper surface of the insulation. |
| US09502292B2 |
Dual shallow trench isolation liner for preventing electrical shorts
A shallow trench is formed to extend into a handle substrate of a semiconductor-on-insulator (SOI) layer. A dielectric liner stack of a dielectric metal oxide layer and a silicon nitride layer is formed in the shallow trench, followed by deposition of a shallow trench isolation fill portion. The dielectric liner stack is removed from above a top surface of a top semiconductor portion, followed by removal of a silicon nitride pad layer and an upper vertical portion of the dielectric metal oxide layer. A divot laterally surrounding a stack of a top semiconductor portion and a buried insulator portion is filled with a silicon nitride portion. Gate structures and source/drain structures are subsequently formed. The silicon nitride portion or the dielectric metal oxide layer functions as a stopping layer during formation of source/drain contact via holes, thereby preventing electrical shorts between source/drain contact via structures and the handle substrate. |
| US09502290B2 |
Oxidation-free copper metallization process using in-situ baking
A method of forming an integrated circuit structure includes providing a substrate; forming a metal feature over the substrate; forming a dielectric layer over the metal feature; and forming an opening in the dielectric layer. At least a portion of the metal feature is exposed through the opening. An oxide layer is accordingly formed on an exposed portion of the metal feature. The method further includes, in a production tool having a vacuum environment, performing a plasma process to remove the oxide layer. Between the step of forming the opening and the oxide-removal process, no additional oxide-removal process is performed to the metal feature outside the production tool. The method further includes, in the production tool, forming a diffusion barrier layer in the opening, and forming a seed layer on the diffusion barrier layer. |
| US09502289B2 |
Selective formation of metallic films on metallic surfaces
Metallic layers can be selectively deposited on one surface of a substrate relative to a second surface of the substrate. In some embodiments, the metallic layers are selectively deposited on copper instead of insulating or dielectric materials. In some embodiments, a first precursor forms a layer on the first surface and is subsequently reacted or converted to form a metallic layer. The deposition temperature may be selected such that a selectivity of above about 50% or even about 90% is achieved. |
| US09502287B2 |
Method of preventing pattern collapse
A device includes a substrate and at least three conducting features embedded into the substrate. Each conducting feature includes a top width x and a bottom width y, such that a top and bottom width (x1, y1) of a first conducting feature has a dimension of (x1 |
| US09502286B2 |
Methods of forming self-aligned contact structures on semiconductor devices and the resulting devices
One method disclosed includes, among other things, forming a structure comprised of an island of a first insulating material positioned between the gate structures above the source/drain region and under a masking layer feature of a patterned masking layer, forming a liner layer that contacts the island of insulating material and the masking layer feature, selectively removing the masking layer feature to thereby form an initial opening that is defined by the liner layer, performing at least one isotropic etching process through the initial opening to remove the island of first insulating material and thereby define a contact opening that exposes the source/drain region, and forming a conductive contact structure in the contact opening that is conductively coupled to the source/drain region. |
| US09502285B1 |
Method of forming trenches
A method of forming trenches is provided. A first layer, a second layer and a third layer are formed on the substrate. A patterned third layer with a plurality of third trenches is formed. A spacer is formed on sidewalls of the third trenches, following by removing a portion of the patterned third layer between the third trenches. By using the spacer and the patterned third layer as a mask, a patterned second layer with a plurality of second trenches is formed. Next, the patterned third layer and the spacer are completely removed, and a block layer is formed on the patterned second layer, filling into the at least one second trench to separate said second trench into at least two parts. The first layer is patterned by using the patterned second layer and the block layer as a mask to form a patterned first layer with first trenches. |
| US09502284B2 |
Metal thin film resistor and process
An integrated circuit with a metal thin film resistor with an overlying etch stop layer. A process for forming a metal thin film resistor in an integrated circuit with the addition of one lithography step. |
| US09502283B2 |
Electron-beam (E-beam) based semiconductor device features
Electron-beam (e-beam) based semiconductor device features are disclosed. In a particular aspect, a method includes performing a first lithography process to fabricate a first set of cut pattern features on a semiconductor device. A distance of each feature of the first set of cut pattern features from the feature to an active area is greater than or equal to a threshold distance. The method further includes performing an electron-beam (e-beam) process to fabricate a second cut pattern feature on the semiconductor device. A second distance of the second cut pattern feature from the second cut pattern feature to the active area is less than or equal to the threshold distance. |
| US09502281B2 |
AVD hardmask for damascene patterning
A method including forming a dielectric layer on a contact point of an integrated circuit structure; forming a hardmask including a dielectric material on a surface of the dielectric layer; and forming at least one via in the dielectric layer to the contact point using the hardmask as a pattern. An apparatus including a circuit substrate including at least one active layer including a contact point; a dielectric layer on the at least one active layer; a hardmask including a dielectric material having at least one opening therein for an interconnect material; and an interconnect material in the at least one opening of the hardmask and through the dielectric layer to the contact point. |
| US09502278B2 |
Substrate holder assembly for controlled layer transfer
A substrate holder assembly for use in a controlled spalling process is provided. The substrate holder assembly includes a base structure having a surface in which a base substrate or other work piece can be placed thereupon. A framing element is located above and spaced apart from the surface of the base structure. The framing element has a window which exposes an upper surface of the base substrate and defines an area of the upper surface of the base substrate in which another material can be applied thereto. A support structure containing at least one mechanical securing element is located on the framing element. The support structure mechanically constrains the base substrate within the substrate holder assembly. Each mechanical securing element contacts at least one surface of the support structure and, optionally, one surface of the base substrate. |
| US09502274B2 |
Wafer loaders having buffer zones
Embodiments of the present inventive concepts provide a wafer loader having one or more buffer zones to prevent damage to a wafer loaded in the wafer loader. The wafer loader may include a plurality of loading sections that protrude from a main body and are configured to be arranged at various locations along an edge of the wafer. Each of the loading sections may include a groove into which the edge of the wafer may be inserted. The loading section may include first and second protrusions having first and second inner sides, respectively, that face each other to define the groove therebetween. At least one of the first and second inner sides may include a recess to define the buffer zone. |
| US09502271B2 |
Warpage control for flexible substrates
Flexible structures and method of providing a flexible structure are disclosed. In some embodiments, a method of providing a flexible structure includes: providing a flex substrate having a device bonded to a first side of the flex substrate; and attaching a rigid layer to a second side of the flex substrate opposite the first side using an adhesive layer. |
| US09502268B2 |
Method and structure for wafer level packaging with large contact area
A method to provide a wafer level package with increasing contact pad area comprising the steps of forming a first packaging layer on wafer top surface, grinding the wafer back surface and etch through holes, depositing a metal to fill the through holes and covering wafer backside, cutting through the wafer from wafer backside forming a plurality of grooves separating each chip then depositing a second packaging layer filling the grooves and covering the wafer back metal, reducing the first packaging layer thickness to expose the second packaging layer filling the grooves and forming a plurality of contact pads overlaying the first packaging layer thereafter cutting through the second packaging layer in the grooves to form individual package. |
| US09502260B2 |
Method for forming a semiconductor structure
The present invention provides a method for forming a semiconductor structure, including: firstly, providing a substrate, a fin structure being disposed on the substrate, a gate structure crossing over the fin structure, and a first hard mask being disposed on the top surface of the gate structure. Next, a dielectric layer is formed, covering the substrate, the fin structure and the gate structure. Afterwards, a second hard mask is formed on the top surface of the first hard mask, where the width of the second hard mask is larger than the width of the first hard mask, a bottom surface of the second hard mask and a top surface of the first hard mask are on the same level. An etching process is then performed to remove parts of the dielectric and parts of the fin structure. |
| US09502258B2 |
Anisotropic gap etch
A method of anisotropically dry-etching exposed substrate material on a patterned substrate is described. The patterned substrate has a gap formed in a single material made from, for example, a silicon-containing material or a metal-containing material. The method includes directionally ion-implanting the patterned structure to implant the bottom of the gap without implanting substantially the walls of the gap. Subsequently, a remote plasma is formed using a fluorine-containing precursor to etch the patterned substrate such that either (1) the walls are selectively etched relative to the floor of the gap, or (2) the floor is selectively etched relative to the walls of the gap. Without ion implantation, the etch operation would be isotropic owing to the remote nature of the plasma excitation during the etch process. |
| US09502254B2 |
Photoresists and methods for use thereof
New photoresists are provided that comprise preferably as distinct components: a resin, a photoactive component and a phenolic component Preferred photoresists of the invention are can be useful for ion implant lithography protocols. |
| US09502252B2 |
Semiconductor device and method for fabricating the same
A method for fabricating semiconductor device is disclosed. The method includes the steps of: providing a substrate having at least one fin-shaped structure thereon, in which the fin-shaped structure comprises a top portion and a bottom portion; and forming a doped layer and a first liner around the bottom portion of the fin-shaped structure. |
| US09502250B2 |
Manufacturing method of silicon carbide semiconductor apparatus
In a surface of a SiC semiconductor portion, a surface electrode film including a first electrode film composed of nickel and a second electrode film composed of nickel, silicon, and tantalum, are sequentially stacked. The first electrode film has a thickness of 3 nm or more and 10 nm or less. Composition of the second electrode film is within a range from 60Ni 30Si 10Ta to 53Ni 27Si 20Ta, expressed in at %. Next, by heat treatment, the SiC semiconductor portion and the first electrode film are reacted to generate a nickel silicide film, and an ohmic contact is formed. At this time, excess carbon atoms that have separated from the SiC semiconductor portion bond to tantalum atoms in the second electrode film and are silicided, making deposition thereof in the surface of the surface electrode film difficult. Thereafter, a wiring film is formed in the surface of the surface electrode film. |
| US09502248B1 |
Methods for making a semiconductor chip device
According to various embodiments, a method may include: forming a first layer on a surface using a first lift-off process; forming a second layer over the first layer using a second lift-off process; wherein the second lift-off process is configured such that the second layer covers at least one sidewall of the first layer at least partially. |
| US09502244B2 |
Manufacturing method for forming semiconductor structure
The present invention provides a method for forming a semiconductor structure, comprising: firstly, a substrate is provided, next, a first dry etching process is performed, to form a recess in the substrate. Afterwards, an ion implantation process is performed to a bottom surface of the recess, a wet etching process is then performed, to etch partial sidewalls of the recess, so as to form at least two tips on two sides of the recess respectively, and a second dry etching process is performed, to etch partial bottom surface of the recess, wherein after the second dry etching process is performed, a lower portion of the recess has a U-shaped cross section profile. |
| US09502239B2 |
Substrate processing method, substrate processing apparatus, method of manufacturing semiconductor device and non-transitory computer-readable recording medium
There is provided a substrate processing method, including: (a) loading a substrate into a processing vessel having a pre-baked film containing a silazane bond; (b) heating the substrate to a first temperature and supplying a process gas to the heated substrate; and (c) heating the substrate to which the process gas has been supplied, to a second temperature which is higher than the first temperature and less than or equal to a temperature at which the pre-bake has been performed. |
| US09502238B2 |
Deposition of conformal films by atomic layer deposition and atomic layer etch
Methods for depositing conformal films using a halogen-containing etchant during atomic layer deposition are provided. Methods involve exposing a substrate to a halogen-containing etchant such as nitrogen trifluoride between exposing the substrate to a first precursor and exposing the substrate to a second plasma-activated reactant. Examples of conformal films that may be deposited include silicon-containing films and metal-containing films. Related apparatuses are also provided. |
| US09502236B2 |
Substrate processing apparatus, non-transitory computer-readable recording medium and method of manufacturing semiconductor device
There is provided a method of manufacturing a semiconductor device by processing a substrate by alternately supplying a first processing gas and a second processing gas plasmatized by a plasma unit to a processing container. The method includes: starting a supply of an electric power to plasmatize the second processing gas to the plasma unit without supplying the second processing gas to the plasma unit; and starting a supply of the second processing gas with the electric power being supplied to the plasma unit. |
| US09502235B2 |
Thin film transistor, method for manufacturing the same, array substrate and display device
According to embodiments of the invention, a thin film transistor (TFT), a manufacturing method of the TFT, an array substrate and a display device are provided. The manufacturing method of the TFT comprises: forming a gate electrode on a substrate; forming a gate insulating layer on the substrate formed with the gate electrode; forming an oxide semiconductor active layer, an etch stop layer and a source/drain electrode on the gate insulating layer, wherein the etch stop layer is obtained by an oxidation treatment. |
| US09502213B2 |
Ion beam line
In one aspect, an ion implantation system is disclosed, which comprises a deceleration system configured to receive an ion beam and decelerate the ion beam at a deceleration ratio of at least 2, and an electrostatic bend disposed downstream of the deceleration system for causing a deflection of the ion beam. The electrostatic bend includes three tandem electrode pairs for receiving the decelerated beam, where each electrode pair has an inner and an outer electrode spaced apart to allow passage of the ion beam therethrough. Each of the electrodes of the end electrode pair is held at an electric potential less than an electric potential at which any of the electrodes of the middle electrode pair is held and the electrodes of the first electrode pair are held at a lower electric potential relative to the electrodes of the middle electrode pair. |
| US09502206B2 |
Corrosion-resistant, strong x-ray window
The invention is an x-ray window with a stack of thin film layers including aluminum layer(s), corrosion-barrier layer(s), and/or polymer layer(s). Aluminum layer(s) can provide improved gas impermeability. Polymer layer(s) can increase structural strength. The x-ray window can be substantially transmissive to x-rays but also substantially block visible light and infrared light. The x-ray window can have minimal deflection. |
| US09502205B2 |
X-ray-generating medical apparatus and acquisition window therefor with a releasable attachment to the medical apparatus
An acquisition window for a medical apparatus (in particular for a computer tomography apparatus) has an element made of a suitable material and at least one attachment element for attachment to the medical apparatus. |
| US09502202B2 |
Systems and methods for generating coherent matterwave beams
Systems and methods for generating a coherent matterwave beam are provided. In some aspects, a system includes a plurality of beam generating units. Each of the plurality of beam generating units is configured to generate a stream of charged particles. The system also includes a magnetic field generator configured to expose the plurality of streams to a magnetic field such that (i) the charged particles of the plurality of streams undergo phase synchronization with one another in response to a vector potential associated with the magnetic field and (ii) the plurality of streams is directed along one or more channels to combine with one another and produce a coherent matterwave beam. |
| US09502201B2 |
Tungsten electrode material and thermionic emission current measuring device
Provided is a tungsten electrode material that can improve the life of an electrode than conventional by the use of a material in place of thorium oxide. The tungsten electrode material includes a tungsten base alloy and oxide particles dispersed in the tungsten base alloy, wherein the oxide particle is an oxide solid solution in which a Zr oxide and/or a Hf oxide and an oxide of at least one or more kinds of rare earth elements selected from Sc, Y, La, Ce, Pr, Nd, Sm, Eu, Gd, Tb, Dy, Ho, Er, Tm, Yb, and Lu are solid-dissolved. |
| US09502198B2 |
Device for controlling electrically actuable valves in different operating modes
A device for controlling an electrically actuable valve having a valve coil, including a main switch, situated in the current circuit of the valve coil, for adjusting the current flowing through the valve coil, and a freewheeling path, which has a freewheeling diode and is switched in parallel with the valve coil. A freewheeling switch is provided, by which the freewheeling path is able to be interrupted or closed. This allows for optionally operating the valve in a PMW or in a switching operation. |
| US09502196B2 |
Impact switch
An impact switch includes a first member having a reservoir for holding a conductive fluid and a second member having a first conductive portion disconnected from a second conductive portion. The second member is coupled to the first member over the reservoir. Responsive to receiving a predetermined level of impact, the conductive fluid moves from the reservoir to an interface between the first and second members to conductively connect the first conductive portion with the second conductive portion. |
| US09502194B2 |
Plastic-shell-encased circuit breaker having automatic locking function
A plastic-shell-encased circuit breaker having an automatic locking function comprises a plastic-shell-encased circuit breaker body, a user input unit for inputting a lock code or an unlock code; an authentication processing unit for receiving the lock code or the unlock code from the user input unit, and for outputting a control signal after authentication; a locking action unit for receiving the control signal from the authentication processing unit, and for enabling the plastic-shell-encased circuit breaker body to produce a self-locking or unlocking action. Utilization of the plastic-shell-encased circuit breaker having the automatic locking function is capable of preventing the circuit breaker from being switched on without careful consideration, so as to ensure security of operators. |
| US09502190B2 |
Switch
A switch has a normally-closed fixed contact unit, a common contact unit, a pressing member, and a movable contact that is attached to the pressing member, and that slides on the normally-closed fixed contact unit and the common contact unit. A conductive region and an insulating region are formed on a sliding surface of the movable contact in the normally-closed fixed contact unit in order toward a pressing direction of the pressing member. A conductive region and an insulating region are formed on a sliding surface of the movable contact in the common contact unit in order toward the pressing direction. The movable contact slides from the conductive regions to the insulating regions to switch from a closed state to an opened state. |
| US09502188B2 |
Adjustable door assembly
One or more apparatuses are provided for forming a seal between a circuit breaker and an enclosure. An adjustable door assembly includes an inner floating frame assembly positioned according to a floating configuration between a first external flange and a second external flange that connect to an enclosure door of an enclosure housing a circuit breaker. The inner floating frame assembly includes an inner floating frame and an inner floating box frame. An adjustable coupling is used to apply a force, between the inner floating frame and the inner floating frame box, to the inner floating box frame towards a front side of the circuit breaker to form a seal between the front side of the circuit breaker and the enclosure door. The seal may provide a barrier for mitigating arc flash, hazardous gases, material, and/or explosive force from escaping from a backside of the circuit breaker. |
| US09502187B2 |
Method for controlling a current-interrupting device in a high-voltage electrical network
The invention relates to a method of controlling switchgear in order to estimate the remanent flux value of a power transformer during disconnection from a high-voltage electrical network using voltage measurements delivered by a capacitive voltage transformer by correcting the transfer function of the capacitive voltage transformer, and in which said value is delivered to a controller that determines the optimum switchgear switching instant. |
| US09502184B2 |
Method for manufacturing a unit for storing electrical energy
The invention relates to a method for manufacturing a unit for storing electrical energy, comprising a cover and an outer casing, the method including a closing step (400) consisting of contactlessly applying a compressive force to one of the parts forming the storage unit, such that the cover and the outer casing are mechanically titled into one another so as to close the outer casing using the cover by means of the engagement of the shapes thereof. |
| US09502180B2 |
Multilayer ceramic capacitor
A multilayer ceramic capacitor may include: a ceramic body; first and second external electrodes; first and second internal electrodes connected to the first and second external electrodes, respectively; first floating electrodes having both end portions overlapped with portions of the first and second internal electrodes, respectively; and at least one second floating electrode shifted with respect to the first floating electrodes in a length direction of the ceramic body. The lengths of portions of the first and second floating electrodes overlapped with the portions of the first internal electrodes may be different from those of portions of the first and second floating electrodes overlapped with the portions of the second internal electrodes. |
| US09502174B2 |
Wireless power transmission apparatus and wireless power reception apparatus
A wireless power transmission apparatus includes a resonance unit including resonators and configured to form a magnetic resonant coupling with another resonator, and a feeding unit configured to transmit alternating current (AC) power to one of the resonators. The wireless power transmission apparatus further includes a controller configured to determine a value of a capacitor connected to one of the resonators, based on a magnitude of a magnetic field formed by the resonance unit. |
| US09502173B2 |
Shield part, method of fabricating the same, and contactless power transmission device having the shield part
There is provided a shield part including: a magnetic laminate formed by laminating a plurality of magnetic layers and having a first surface and a second surface; a coil pattern formed on the first surface; and a first lead part formed at an end portion of a central portion of the coil pattern and a second lead part formed outside of the coil pattern, wherein a portion of the second surface is removed to form a recess, the first lead part is electrically connected to the second lead part by a conductive material disposed in the recess and a first via formed in the magnetic laminate in a lamination direction, and the second lead part is electrically connected to the first lead part by the conductive material disposed in the recess and a second via formed in the magnetic laminate in the lamination direction. |
| US09502163B2 |
PTC circuit protection device
The PTC circuit protection device includes a PTC polymer material and two electrodes attached to the PTC material. The PTC polymer material includes a polymer matrix and a conductive filler dispersed in the polymer matrix. The conductive filler includes first titanium carbide particles and second titanium carbide particles. The first titanium carbide particles have an average Fisher sub-sieve particle size of less than 2.5 μm. The second titanium carbide particles have an average Fisher sub-sieve particle size of less than 3.2 μm. |
| US09502161B2 |
Power resistor with integrated heat spreader
A resistor and an integrated heat spreader are provided. A resistive element having a first surface is in contact with electrically conducting terminals. A heat spreader is provided having at least a portion in thermally conductive contact with at least a portion of the first surface of the resistive element. The heat spreader comprising a thermally conducting and electrically insulating material, and has terminations, each termination adjacent to one of the electrically conducting terminals. Each termination is in thermally conducting contact with the adjacent electrically conducting terminal. A method of fabricating a resistor and an integrated heat spreader is also provided. |
| US09502159B2 |
Superconducting wire connection structure, superconducting wire connection method, and connection superconducting wire
A superconducting wire connection structure comprises a first superconducting wire and a second superconducting wire, ends of which are arranged across from each other, and a third superconducting wire which spans and connects the first superconducting wire and the second superconducting wire along a longitudinal direction of the first superconducting wire and the second superconducting wire. Each of the first superconducting wire, the second superconducting wire and the third superconducting wire is a tape-shaped superconducting wire which includes a substrate laminated with at least a superconductive layer. The third wire is narrower in at least one portion than the first superconducting wire and the second superconducting wire. |
| US09502156B2 |
Flame-retardant resin composition
The present invention relates to a flame-retardant resin composition including (A) a base resin containing (A1) a propylene polymer where 90% by mass or more of constituent monomers are propylene and (A2) at least one of specific thermoplastic elastomers, (B) a metal hydrate, (C) a phenol-based antioxidant, and (D) a metal soap, wherein the blending ratio (A1):(A2) of (A1) the propylene polymer to (A2) the specific thermoplastic elastomer in (A) the base resin is 9:1 to 7:3 in terms of mass ratio; (B) the metal hydrate, (C) the phenol-based antioxidant, and (D) the metal soap each is blended in a specific amount, and (D) the metal soap contains a specific metal salt of one or more specific fatty acids in a specific amount. |
| US09502154B1 |
High density shielded electrical cable and other shielded cables, systems, and methods
A shielded electrical ribbon cable includes adjacent first and second longitudinal conductor sets where each conductor set includes two or more insulated conductors. The first conductor set also includes a ground conductor that lies in the plane of the insulated conductors of the first conductor set. At least 90% of the periphery of each conductor set is encompassed by a shielding film. First and second non-conductive polymeric films are disposed on opposite sides of the cable and form cover portions substantially surrounding each conductor set, and pinched portions on each side of each conductor set. When the cable is laid flat, the distance between the center of the ground conductor of the first conductor set and the center of the nearest insulated conductor of the second conductor set is σ1, the center-to-center spacing of the insulated conductors of the second conductor set is σ2, and σ1/σ2 is greater than 0.7. |
| US09502149B2 |
Ultraviolet systems and methods for irradiating a substrate
A UV system for irradiating a substrate includes a lamphead having an enclosure with an interior. A UV bulb is positioned in the interior and is capable of emitting UV energy when excited by RF energy. The UV system also includes a solid state RF source capable of generating the RF energy. The RF energy is transmitted to the UV bulb, which causes the UV bulb to ignite and emit the UV energy from the interior of the lamphead. |
| US09502147B2 |
Coupling between nanostructures and optical fibers
Technologies are generally provided for enhancing optical coupling between nanostructures, such as a nanowire, and an optical element, such as an optical fiber, for example in order to enable effective optical communication. A nanostructure may be automatically aligned with an optical fiber by suspending the nanowire within a fluid and causing the nanowire to align itself with a tip of the optical fiber also suspended within the fluid. Light may be directed through the optical fiber to induce an optical gradient in the fluid near the optical fiber tip. The optical gradient may attract the nanowire to the tip of the optical fiber, and may cause to align with the optical fiber. Post-alignment, the nanowire may be permanently coupled with the optical fiber to form a nanowire-optical fiber assembly to couple light between the optical fiber and a nanophotonic circuit integrated with the nanowire. |
| US09502143B2 |
Floating nuclear power reactor with a self-cooling containment structure
A floating nuclear power reactor including one or two nuclear power reactors positioned in a floating vessel such as a barge or the like. Means is disclosed for flooding the containment structure of the nuclear reactor and for flooding the reactor vessels to cool the same. |
| US09502142B2 |
Containment for a water cooled and moderated nuclear reactor
A containment for a water cooled and moderated nuclear reactor incorporates two or more separate containment zones. These zones are constructed in such a manner that a leak or break in the reactor coolant system located within one zone will remain confined within this particular zone, so that no adverse ambient conditions of pressure, temperature, and humidity will propagate to any of the other zones. The separation between zones is achieved by having a partition plate extending between the containment envelope and the reactor coolant system where the partition plate is attached to one of the main components of the reactor coolant system. For example, this can be the reactor pressure vessel, as shown in some of the embodiments. The partition is designed to the same pressure and temperature conditions as the containment vessel envelope to ensure a leak tight and permanent separation between adjacent zones. |
| US09502141B2 |
Surface sediment core catcher
A core catcher comprising: a cap configured to be secured to a first end of a core liner such that when the first end of the core liner is inserted into sediment a sample sediment core enters the core liner through the cap; a cross-beam coupled to the cap and mounted across the first end of the core liner such that a cross-section of the first end of the core liner is divided into two openings; a flexible member secured to the cross-beam such that the flexible member, the cross-beam, and the cap form a dual-flap valve designed to allow the sediment core to enter the core liner through the two openings and to prevent the sediment core from escaping the core liner through the cap. |
| US09502137B2 |
Method and device for optimizing log likelihood ratio (LLR) used for nonvolatile memory device and for correcting errors in nonvolatile memory device
In a method of optimizing a log likelihood ratio (LLR) used to correct errors related to data stored in a nonvolatile memory device, variation of threshold voltage distribution for a plurality of memory cells included in the nonvolatile memory device is monitored, and the LLR for the memory cells is updated based on a monitoring result. Although the characteristics of the memory cells are deteriorated, the LLR is continuously maintained to the optimal value. |
| US09502134B2 |
Shift register, method for driving the same, and array substrate
The disclosure relates to a shift register, a method for driving the same, an array substrate and a display apparatus, for reducing the wiring space as required by the shift register. The shift register comprising a control unit and a plurality of output sub-units, wherein the control unit comprises a plurality of output terminals which output gate line control signals sequentially according to the control timing sequence during a first preset time period, and output the gate line control signals sequentially according to the control timing sequence during a second preset time period in an order opposite to or identical to an order in which the gate line control signals are output during the first preset time period; each of the output sub-units is connected to a corresponding output terminal of the control unit, and divides the gate line control signal output from the connected output terminal into at least a first gate line control signal and a second gate line control signal, and outputs the first gate line control signal and the second gate line control signal respectively. |
| US09502133B2 |
Semiconductor device
A memory cell (101) includes a memory transistor (10A) having channel length L1 and channel width W1, and a plurality of select transistors (10B) each electrically being connected in series with the memory transistor and independently having channel length L2 and channel width W2, wherein each of the memory transistor and the plurality of select transistors includes an active layer (7A) formed from a common oxide semiconductor film, the memory transistor is a transistor which is capable of being irreversibly changed from a semiconductor state where drain current Ids depends on gate voltage Vg to a resistor state where drain current Ids does not depend on gate voltage Vg, and channel length L2 is greater than channel length L1. |
| US09502127B2 |
System optimization in flash memories
Methods of determining distributions may include performing a number of hard reads, performing a number of background reads at a frequency based on the number of hard reads, and estimating a conditional probability density of a cell voltage based on the hard reads and the background reads. |
| US09502125B2 |
Concurrently reading first and second pages of memory cells having different page addresses
In an embodiment, a first page of memory cells in a first memory plane is read concurrently with a second page of memory cells in a second memory plane. The second memory plane is different than the first memory plane, but is in the same memory array as the first memory plane. The second page of memory cells has a different page address than the first page of memory cells. |
| US09502123B2 |
Adaptive block parameters
Data programmed in a block using a first set of programming parameters is read and a number of memory cells having threshold voltages in an intermediate threshold voltage range that is between ranges assigned to logic states is determined. The number is compared to a threshold number and if the number exceeds the threshold number then subsequent programming uses a second set of programming parameters. |
| US09502119B2 |
Distributed capacitive delay tracking boost-assist circuit
According to one general aspect, an apparatus may include a plurality of voltage boosted circuits. Each voltage boosted circuit may include a power gater configured to select between an array supply voltage and a second voltage, wherein the second supply voltage is greater than the array supply voltage. Each voltage boosted circuit may include may also include a distributed boost capacitor configured to generate, in part, the second supply voltage. Each distributed boost capacitor may be physically located throughout a boosting network. Each voltage boosted circuit may further include a driver configured to generate an electrical signal based upon, as selected by the power-gater, either the array supply voltage or the second supply voltage. |
| US09502115B2 |
Amplifier stage
An input signal is amplified into an output signal that is to be applied to an electrical load including a capacitive component. An amplifier stage includes a pre-amplifier module to receive a first supply voltage, and an output module to receive a second supply voltage. The pre-amplifier module includes a first gain block to pre-amplify the input signal into a first pre-amplified signal, and a second gain block to pre-amplify the input signal into a second pre-amplified signal. A feedback block feeds back the output signal as a feedback signal. A combination element combines the first pre-amplified signal and the feedback signal into a combined signal. The output module combines the combined signal and the second pre-amplified signal into the output signal. |
| US09502112B2 |
Semiconductor memory device
A semiconductor memory device capable of a high-accuracy data search is provided. Each of the memory cells can hold two bits of information and includes a first cell and a second cell. The semiconductor memory device also includes a match line and a search line pair to transfer search data. The semiconductor memory device further includes a logic operation cell to drive the match line based on comparison results between information held in the first and the second cell and search data transferred by the search line pair and a search line driver to drive the search line pair. In a state with the search line pair precharged to a third voltage between a first voltage and a second voltage, the search line driver drives, according to the search data, one and the other search line included in the search line pair to the first and the second voltage, respectively. |
| US09502111B2 |
Weighted equal cost multipath routing
In some implementations, network traffic can be routed along equal cost paths based on weights assigned to each path. For example, weighted equal cost multipath routing can be implemented by assigning weights to each equal cost path (e.g., uplink, next hop node) to a destination device. When the network device receives a packet, the network device can generate a key (e.g., a random value, a hash value based on packet data, a value between 0 and n, etc.). The key can be used to select an uplink or path upon which to forward the packet. A key can be generated for a packet flow or flowlet. Each flow can be associated with the same key so that each packet in a flow will be forwarded along the same path. Each flowlet can be forwarded along a different uplink. |
| US09502110B1 |
Modular cell for a memory array, the modular cell including a memory circuit and a read circuit
A memory cell for use within a memory array includes a memory circuit and a read circuit. The memory circuit includes a non-volatile memory element (for example, a floating gate transistor) coupled to an RS flip flop. The RS flip flop is configured with a p-channel transistor coupled to receive a first enable signal and an n-channel transistor coupled to receive a second enable signal. The assertion of the enable signals is offset in time to control operations for forcing latch nodes to a specific voltage and enabling latching operation. The read circuit includes latch circuit coupled to outputs of the RS flip flop and operable as a sense amplifier circuit. The memory and read circuits are fabricated within a rectangular circuit area. Many such rectangular circuit area may be positioned adjacent to each other in a row or column of the memory array. |
| US09502109B2 |
Non-volatile semiconductor storage device
Provided is a non-volatile semiconductor memory device capable of reliably preventing a malfunction of a read transistor without increasing the number of bit lines. In a non-volatile semi conductor memory device (1), program transistors (5a, 5b) and erase transistors (3a, 3b) serving as charge transfer paths during data programming and erasure are provided while a second bit line (BLN1) connected to the program transistor (5a) in a first cell (2a) for performing data programming also serves as a reading bit line in the other second cell (2b) by switching switch transistors (SWa, SWb) so that malfunctions of read transistors (4a, 4b) that occur because the read transistors are used for data programming and erasure can be reliably prevented without the number of bit lines being increased. |
| US09502107B2 |
Writing multiple levels in a phase change memory
Structures and methods for a multi-bit phase change memory are disclosed herein. A method includes establishing a write-reference voltage that incrementally ramps over a write period. The increments of the write-reference voltage correspond to discrete resistance states of a storage cell of the multi-bit phase change memory. |
| US09502106B2 |
Semiconductor memory device and method of controlling semiconductor memory device
According to one embodiment, a semiconductor memory device includes a cell array including a plurality of memory cells, a reference circuit, a sense amplifier for sensing a read current flowing through the memory cell, and a reference current flowing through the reference circuit, a write driver for writing data to the memory cell, a sub cell area including the cell array, the sense amplifier, and the write driver, a memory area including a plurality of sub cell areas, and a control circuit for supplying first write data to the sub cell area including the sense amplifier which performs a first read operation of supplying the read current to a selected memory cell without supplying the reference current. |
| US09502104B2 |
Multi-level cell (MLC) non-volatile memory data reading method and apparatus
Embodiments include systems, methods, and apparatuses for reading the signal-level of three-signal-level cells in a non-volatile memory (NVM). In one embodiment, a receiver may be configured to receive a serial string of values and identify which values in the string are the results of a lower-page read or an upper-page read of the cells. In some embodiments, one signal-level of a three-signal level cell may be represented only by a value in the lower-page read of the cells, while a second signal-level of the three-signal level cell may be represented by a value in the lower-page read of the cells and an upper-page read of the cells. |
| US09502103B1 |
Semiconductor memory device
A semiconductor memory device according to an embodiment includes: a semiconductor substrate; and a memory cell array which is arranged above the semiconductor substrate in a first direction. The memory cell array includes: a semiconductor layer which extends in the first direction; a first conductive line which extends in a second direction crossing the first direction; a variable resistance film which is arranged at an intersection between the semiconductor layer and the first conductive line; a plurality of second conductive lines which are arranged in the second direction sandwiching the semiconductor layer and extend in the first direction; and a plurality of third conductive lines which are electrically connected to the second conductive lines. Two of the second conductive lines neighboring to each other in the second direction with the semiconductor layer interposed therebetween are electrically connected to different third conductive lines. |
| US09502099B2 |
Managing skew in data signals with multiple modes
A method for controlling a memory includes causing a data de-skewer to operate in a writing mode, at the data de-skewer, receiving a first signal, and skewing the first data signal by a first compensation skew, causing the data de-skewer to operate in a reading mode, at the data de-skewer, receiving a second signal, and skewing the second signal by a second compensation skew, wherein the first signal is representative of a bit from a byte that is to be written to the memory, and wherein the second signal is representative of a bit from a byte that has been read from the memory. |
| US09502096B2 |
Protocol for memory power-mode control
In one embodiment, a memory device includes a memory core and input receivers to receive commands and data. The memory device also includes a register to store a value that indicates whether a subset of the input receivers are powered down in response to a control signal. A memory controller transmits commands and data to the memory device. The memory controller also transmits the value to indicate whether a subset of the input receivers of the memory device are powered down in response to the control signal. In addition, in response to a self-fresh command, the memory device defers entry into a self-refresh operation until receipt of the control signal that is received after receiving the self-refresh command. |
| US09502093B2 |
Method of writing to a spin torque magnetic random access memory
A spin-torque magnetoresistive memory includes array read circuits and array write circuits coupled to an array of magnetic bits. The array read circuits sample magnetic bits in the array, apply a write current pulse to the magnetic bits to set them to a first logic state, resample the magnetic bits using an additional offset current, and compare the results of sampling and resampling to determine the bit state for each magnetic bit. For each of the magnetic bits in the page having the second logic state, the array write circuits initiate a write-back, wherein the write-back includes applying a second write current pulse having opposite polarity in comparison with the first write current pulse to set the magnetic bit to the second state. A read or write operation may be received after initiation of the write-back where the write-back can be aborted for a portion of the bits in the case of a write operation. The write-back may be performed such that different portions of the magnetic bits are written back at different times, thereby staggering the write-back current pulses in time. |
| US09502089B2 |
Short detection and inversion
In some examples, a memory device may be configured to store data in either an original or an inverted state based at least in part on a state associated with one or more shorted bit cells. For instance, the memory device may be configured to identify a shorted bit cell within a memory array and to store the data in the memory array, such that a state of the data bit stored in the shorted bit cell matches the state associated with the shorted bit cell. |
| US09502088B2 |
Constant sensing current for reading resistive memory
Systems and methods relate to providing a constant sensing current for reading a resistive memory element. A load voltage generator provides a load voltage based on a current mirror configured to supply a constant current that is invariant with process-voltage-temperature variations. A data voltage is generated based on the generated load voltage, by passing a sensing current mirrored from the constant current, through the resistive memory element. A reference voltage is generated, also based on the generated load voltage and by passing reference current mirrored from the constant current, through reference cells. A logical value stored in the resistive memory element is determined based on a comparison of the data voltage and the reference voltage, where the determination is free from effects of process-voltage-temperature variations. |
| US09502082B1 |
Power management in dual memory platforms
Methods, apparatuses, and systems may provide a sensor to monitor a power consumption of a non-volatile random access memory (RAM) and a volatile RAM. A switch, connected to an output of the sensor, controls power to the non-volatile RAM, and a voltage regulator regulates a voltage of the non-volatile RAM and the volatile RAM. One or more memory slots receive the non-volatile RAM and the volatile RAM, and a processor receives information from the sensor, and controls the voltage regulator based on the received information. The voltage regulator comprises a plurality of registers to store power consumption information of the non-volatile RAM and the volatile RAM. |
| US09502078B2 |
Stack bank type semiconductor memory apparatus capable of improving alignment margin
A semiconductor memory apparatus is capable of improving the alignment margin for a bank and sufficiently ensuring a space for forming a global input/output line. The semiconductor memory apparatus includes a stack bank structure having at least two sub-banks continuously stacked without disconnection of data signal lines, and a control block arranged at one side of the stack bank structure to simultaneously control column-related signals of the sub-banks. |
| US09502075B2 |
Methods and apparatus for indexing and archiving encoded audio/video data
Archival storage and retrieval of audio/video information is described. Audio and/or video information is digitized, compressed and stored in an intermediate archive format (IAF), which preserves the content at a high-enough quality for subsequent retrieval and conversion into various formats required at the time of use or distribution. A single capture operation is performed with ancillary metadata being added to facilitate subsequent searching, indexing and format conversion. Captured data content is catalogued and indexed at or subsequent to the creation of an IAF file that includes the archived information. The IAF includes a family of audio-video digital encoding formats based on public standards. The encoding format used in any particular application is determined at encoding time from information provided by the archive system user. At encoding, the particular encoding scheme is selected to optimize a tradeoff between storage constraints and end use quality requirements. |
| US09502072B2 |
Imaging apparatus that generates motion image data having a first frame rate for a slow speed stretch and motion image data having a second frame rate for a normal speed stretch
The present disclosure aims to achieve a more effective image in slow motion. An imaging apparatus of the present disclosure includes an image sensor that outputs image data at a first frame rate and an image processor. The image processor: (i) generates motion image data having a second frame rate that is 1/N of the first frame rate, based on the image data having the first frame rate output from the image sensor, for frames not provided with a given instruction, (ii) generates motion image data having the first frame rate based on the image data having the first frame rate output from the image sensor, for frames provided with a given instruction and (iii) processes the generated motion image data having the first frame rate and the generated motion image data having the second frame rate as a series of motion image data. |
| US09502071B2 |
Spindle motor and disk drive apparatus
A base member includes a base through-hole which interconnects an upper opening and a lower opening. An insulating sheet portion is disposed at a lower surface side of the base member. The insulating sheet portion covers at least a portion of the lower opening. Lead wires extending from coils extend to the lower surface side of the base member through the base through-hole. The lead wires extend radially outward along a lower surface of the insulating sheet portion while making contact with the insulating sheet portion. The lead wires are soldered to land portions of a circuit substrate. The lower opening is covered with a sealing material. The circuit substrate includes a first region. The insulating sheet portion is defined by a smaller number of layers than the first region. |
| US09502059B2 |
Hybrid tape head assembly and drive for accepting the same
A head assembly according to one embodiment includes at least one module having magnetic transducers for reading and/or writing to a magnetic tape; electronics electrically coupled to the transducers, the electronics comprising at least one of amplifiers; bias circuitry; write drivers; write resistors; a memory device; and a chip with at least one of identification information about the head assembly, customization data, and firmware; and a connector for detachably interfacing to a drive having a head region for receiving the head assembly. A method according to one embodiment includes inserting a head assembly in a head region of a magnetic tape drive, the head assembly having one or more modules containing a plurality magnetic transducers and one of amplifiers, write drives, or bias circuitry; wherein upon receiving the head assembly the drive is at least one of a functional drive, an updated drive, and a legacy drive. |
| US09502058B2 |
Suspension board with circuit
A suspension board with circuit includes a metal supporting layer, an insulating base layer on one side thereof in a thickness direction, a conductive pattern disposed on the insulating base layer, an insulating cover layer disposed on the insulating base layer so as to cover the conductive pattern, and a pedestal for supporting a slider which includes a thin pedestal portion. The thin pedestal portion includes a pedestal base layer included in the insulating base layer, a pedestal conductive layer included in the conductive pattern which extends over the pedestal base layer, and a pedestal cover layer included in the insulating cover layer and disposed on the pedestal conductive layer. The conductive pattern includes a first wire placed to extend over the insulating base layer which has a narrower portion, and a dimension of the pedestal conductive layer is 0.5 to 3 times the dimension of the narrower portion. |
| US09502051B1 |
Methods and devices for reducing couple imbalance in a hard drive
In certain embodiments, an apparatus includes a basedeck; a motor coupled to the basedeck and having a rotatable hub; and first, second, third, fourth, and fifth discs coupled to the hub. Three of the five discs are biased against the hub in a first direction and two of the five discs are biased against the hub in a second direction. In certain embodiments, a method includes biasing at least three discs against a hub in a first direction and biasing at least two discs against the hub in a second direction. |
| US09502048B2 |
Adaptively reducing noise to limit speech distortion
The present technology provides adaptive noise reduction of an acoustic signal using a sophisticated level of control to balance the tradeoff between speech loss distortion and noise reduction. The energy level of a noise component in a sub-band signal of the acoustic signal is reduced based on an estimated signal-to-noise ratio of the sub-band signal, and further on an estimated threshold level of speech distortion in the sub-band signal. In various embodiments, the energy level of the noise component in the sub-band signal may be reduced to no less than a residual noise target level. Such a target level may be defined as a level at which the noise component ceases to be perceptible. |
| US09502041B2 |
Apparatus for displaying image and driving method thereof, apparatus for outputting audio and driving method thereof
An image display apparatus, a method for driving an image display apparatus, a sound output apparatus and a method for driving a sound output apparatus, are provided. The image display apparatus comprising a signal separator configured to separate an audio signal and a video signal from an input image signal, an audio decoder configured to decode the audio signal, a sound outputter configured to output the decoded audio signal, a sound effect generator configured to generate a sound effect at a user's request, a communication interface configured to transmit the separated audio signal and the generated sound effect to a surrounding sound output apparatus, respectively, and a controller configured to control the communication interface to transmit the audio signal and the sound effect to the sound output apparatus, wherein the separated audio signal is transmitted when the sound output apparatus is connected. |
| US09502039B2 |
Dynamic threshold for speaker verification
Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for a dynamic threshold for speaker verification are disclosed. In one aspect, a method includes the actions of receiving, for each of multiple utterances of a hotword, a data set including at least a speaker verification confidence score, and environmental context data. The actions further include selecting from among the data sets, a subset of the data sets that are associated with a particular environmental context. The actions further include selecting a particular data set from among the subset of data sets based on one or more selection criteria. The actions further include selecting, as a speaker verification threshold for the particular environmental context, the speaker verification confidence score. The actions further include providing the speaker verification threshold for use in performing speaker verification of utterances that are associated with the particular environmental context. |
| US09502036B2 |
Correcting text with voice processing
The present invention relates to voice processing and provides a method and system for correcting a text. The method comprising: determining a target text unit to be corrected in a text; receiving a reference voice segment input by the user for the target text unit; determining a reference text unit whose pronunciation is similar to a word in the target text unit based on the reference voice segment; and correcting the word in the target text unit in the text by the reference text unit. The present invention enables the user to easily correct errors in the text vocally. |
| US09502035B2 |
Voice recognition method for mobile terminal and device thereof
A voice recognition method and device, for improving efficiency and accuracy of voice recognition. The method comprises: receiving a trigger message of an operation class to be operated for operating on a mobile terminal, wherein the operation class is a class divided according to the service function of the mobile terminal (S101); receiving voice keyword information and determining a voice keyword from the voice keyword information (S102); and retrieving a keyword library under an operation class entry to be operated in accordance with the voice key word, and returning a search result (S103). |
| US09502034B2 |
Mobile terminal and controlling method thereof
A mobile terminal including a touchscreen; a camera; a memory; a wireless communication unit; and a controller configured to display a preview image input through the camera on the touchscreen, capture the preview image and execute a voice recognition function, in response to a first touch gesture performed on the touchscreen, and control the wireless communication unit to transmit the captured image to at least one counterpart terminal found through the voice recognition function in accordance with a voice input, in response to a release of the first touch gesture from the touchscreen. |
| US09502033B2 |
Distributed speech recognition using one way communication
A speech recognition client sends a speech stream and control stream in parallel to a server-side speech recognizer over a network. The network may be an unreliable, low-latency network. The server-side speech recognizer recognizes the speech stream continuously. The speech recognition client receives recognition results from the server-side recognizer in response to requests from the client. The client may remotely reconfigure the state of the server-side recognizer during recognition. |
| US09502032B2 |
Dynamically biasing language models
Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for speech recognition. In one aspect, a method comprises receiving audio data encoding one or more utterances; performing a first speech recognition on the audio data; identifying a context based on the first speech recognition; performing a second speech recognition on the audio data that is biased towards the context; and providing an output of the second speech recognition. |
| US09502030B2 |
Methods and systems for adapting a speech system
Methods and systems are provided for adapting a speech system of a vehicle. In one example a method includes: logging data from the vehicle; logging speech data from the speech system; processing the data from the vehicle and the data from the speech system to determine a pattern of context and a relation to user interaction behavior; and selectively updating a user profile of the speech system based on the pattern of context. |
| US09502029B1 |
Context-aware speech processing
Described herein are systems and methods for context-aware speech processing. A speech context is determined based on context data associated with a user uttering speech. The speech context and the speech uttered in that speech context may be used to build acoustic models for that speech context. An acoustic model for use in speech processing may be selected based on the determined speech context. A language model for use in speech processing may also be selected based on the determined speech context. Using the acoustic and language models, the speech may be processed to recognize the speech from the user. |
| US09502027B1 |
Method for processing the output of a speech recognizer
A method for processing speech, comprising semantically parsing a received natural language speech input with respect to a plurality of predetermined command grammars in an automated speech processing system; determining if the parsed speech input unambiguously corresponds to a command and is sufficiently complete for reliable processing, then processing the command; if the speech input ambiguously corresponds to a single command or is not sufficiently complete for reliable processing, then prompting a user for further speech input to reduce ambiguity or increase completeness, in dependence on a relationship of previously received speech input and at least one command grammar of the plurality of predetermined command grammars, reparsing the further speech input in conjunction with previously parsed speech input, and iterating as necessary. The system also monitors abort, fail or cancel conditions in the speech input. |
| US09502026B2 |
Initiating actions based on partial hotwords
Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, receiving audio data; determining that an initial portion of the audio data corresponds to an initial portion of a hotword; in response to determining that the initial portion of the audio data corresponds to the initial portion of the hotword, selecting, from among a set of one or more actions that are performed when the entire hotword is detected, a subset of the one or more actions; and causing one or more actions of the subset to be performed. |
| US09502024B2 |
Methods, apparatus and computer programs for automatic speech recognition
An automatic speech recognition (ASR) system includes a speech-responsive application and a recognition engine. The ASR system generates user prompts to elicit certain spoken inputs, and the speech-responsive application performs operations when the spoken inputs are recognized. The recognition engine compares sounds within an input audio signal with phones within an acoustic model, to identify candidate matching phones. A recognition confidence score is calculated for each candidate matching phone, and the confidence scores are used to help identify one or more likely sequences of matching phones that appear to match a word within the grammar of the speech-responsive application. The per-phone confidence scores are evaluated against predefined confidence score criteria (for example, identifying scores below a ‘low confidence’ threshold) and the results of the evaluation are used to influence subsequent selection of user prompts. One such system uses confidence scores to select prompts for targetted recognition training—encouraging input of sounds identified as having low confidence scores. Another system selects prompts to discourage input of sounds that were not easily recognized. |
| US09502006B1 |
Load displacement assembly and a stringed musical instrument including the same
A load displacement assembly is disclosed herein. The load displacement assembly includes a saddle member, the saddle member configured to receive a load from one or more strings of a musical instrument; at least one upper load displacement component coupled to the saddle member in a load carrying manner, the at least one upper load displacement component configured to transfer the load from the saddle member to one or more connecting members; and a lower load displacement component coupled to the one or more connecting members in a load carrying manner, the lower load displacement component configured to transfer the load from the one or more connecting members to a monopole area of the soundboard of the musical instrument. A stringed musical instrument, which includes the load displacement assembly, is also disclosed herein. |
| US09502002B2 |
Proximity-based display scaling
A method, apparatus, and program product are disclosed for receiving a proximity input indicator signal associated with an information handling device, the information handling device comprising a display, determining a proximity of a user to the information handling device based on the proximity input indicator signal, and modifying one or more display settings of the information handling device in response to the determined proximity. |
| US09502000B2 |
Timing controller with dithering capability dependent on a pattern and display device having the same
A timing controller for a display apparatus includes a dithering unit outputting a first signal in which bit widths of image signals are reduced, an image pattern detector detecting an image pattern of the image signals and outputting a dithering off signal corresponding to the detected image pattern, a dithering selector receiving the first signal and converts the first signal to a second signal in response to the dithering off signal, and a response time compensator generating a present image signal from the second signal and compensates a liquid crystal response time in accordance with a difference between the present image signal and a first previous image signal to output a data signal. |
| US09501995B2 |
Liquid crystal display and method of charging/discharging pixels of a liquid crystal display
A liquid crystal display includes a liquid crystal panel, a source driving circuit, a timing controller, and a gate driving circuit. The source driving circuit converts frame data into a plurality of data voltages, and charges/discharges a first data line according to a data voltage of the plurality of data voltages. The gate driving circuit enables a gate line corresponding to the data voltage. The timing controller sequentially enables a plurality of switch enable lines corresponding to the gate line. A plurality of pixel switches are turned on according to the enabled gate line. A data line switch is turned on according to an enabled switch enable line. The data voltage charges/discharges a corresponding pixel through the turned-on data line switch and one of the turned-on pixel switches. |
| US09501991B1 |
Scan driving circuit for oxide semiconductor thin film transistors
The present invention provides a scan driving circuit for oxide semiconductor thin film transistors, a pull-down holding circuit part (600) employed in the scan driving circuit for the oxide semiconductor thin film transistors comprises a main inverter and an auxiliary inverter. By introducing a constant low voltage level (DCL) and setting the constant low voltage level (DCL) |
| US09501990B2 |
Scan driving circuit
A scan driving circuit is disclosed and used to execute a driving operation for cascaded scan lines. The scan driving circuit has a pull-down control module, a pull-down module, a pull-up module, a pull-up maintaining module, a bootstrap capacitor, a constant low-level voltage source and a constant high-level voltage source; the scan driving circuit uses a PMOS type transistor to control the pull-down control module, the pull-down module, the pull-up module and the pull-up maintaining module. The scan driving circuit has a simple overall structure and lower energy consumption. |
| US09501985B2 |
Method for driving liquid crystal display device
In an image signal writing period, a first image signal is supplied to a first liquid crystal element and a first capacitor from a first signal line. In a backlight lighting period, display is performed in a light-transmitting pixel portion in response to the first image signal. In a black grayscale signal writing period, a signal for black display is supplied to a second liquid crystal element and a second capacitor from a second signal line. In a still image signal writing period, a second image signal is supplied to the first liquid crystal element, the first capacitor, the second liquid crystal element, and the second capacitor from the first signal line. In a still image signal holding period, display is performed in the reflective pixel portion in response to the second image signal. |
| US09501982B2 |
Calibration apparatus, control method thereof, and image display apparatus
A calibration apparatus including: a measuring unit configured to measure optical characteristics at a measurement position on a screen of an image display apparatus; a storing unit configured to store information on correspondence determined in advance among the optical characteristics at the measurement position and optical characteristics at a plurality of prescribed positions on the screen; an acquiring unit configured to acquire a representative position of an image displayed on the screen; and a calibrating unit configured to perform calibration based on the measurement value measured by the measuring unit, information on the correspondence, and a positional relationship among the plurality of prescribed positions and the representative position. |
| US09501981B2 |
Driving methods for color display devices
The present invention provides driving methods for electrophoretic color display devices. The backplane system used for the driving methods is found to be simpler which renders color display devices more cost effective. More specifically, the driving method comprises first driving all pixels towards a color state by modulating only the common electrode, followed by driving all pixels towards their desired color states by maintaining the common electrode grounded and applying different voltages to the pixel electrodes. |
| US09501978B2 |
Organic light emitting display device, driving method thereof, and manufacturing method thereof
An organic light emitting diode (OLED) display with improved long range uniformity, driving method and manufacturing method are disclosed. The OLED display manufacturing method includes forming a first active pattern on a substrate, a gate insulating layer, a gate electrode overlapping at least a part of the first active pattern on the gate insulating layer and an interlayer insulating layer. The OLED display manufacturing method further includes forming a conductive layer pattern and an anode of an OLED, forming a pixel defining layer and forming the OLED by forming an organic emission layer and a cathode. The conductive layer pattern is formed to cover the gate electrode and contact a first power line on the interlayer insulating layer. |
| US09501976B2 |
Pixel circuit for organic light emitting display and driving method thereof, organic light emitting display
A pixel circuit for an organic light emitting display includes first, second, third, fourth, fifth, and sixth MOS transistors, a first capacitor, and an organic light emitting diode. The gate electrode of the first MOS transistor receives a first scanning signal. A first electrode of the first MOS transistor receives a data signal. The gate electrode of the third MOS transistor receives a third control signal. The gate electrode of the fourth MOS transistor receives the first scanning signal. The gate electrode of the fifth MOS transistor receives a first control signal. A first electrode of the fifth MOS transistor receives a reference voltage. The gate electrode of the sixth MOS transistor receives a second scanning signal. The first electrode of the sixth MOS transistor receives the reference voltage. |
| US09501968B2 |
Organic light emitting display device and driving method thereof
An organic light emitting display includes: a display region including: a plurality of data lines, a plurality of scan lines, and a plurality of pixels coupled to corresponding ones of the data lines and corresponding ones of the scan lines; a timing controller configured to: divide input data into frames, select a set of a plurality of subfields having different time-weighted values for a plurality of gray levels of the input data to generate conversion data, and convert the input data into image data based on the conversion data; a scan driver configured to supply a plurality of scan signals to the scan lines; and a data driver configured to generate a plurality of data signals using the image data and to supply the data signals to the data lines. |
| US09501963B2 |
Color profiling of monitors
A monitor sends an alert to a host computer operatively coupled to the monitor. As a result of receiving the alert, the host computer retrieves display panel data and retrieves monitor control settings from the monitor. The host computer uses the display panel data and monitor control settings to compute a monitor display profile. |
| US09501961B2 |
Display panel and display device
A display panel is disclosed. The display panel includes: at least one first data line, at least one second data line, at least two first pixel columns, and at least two second pixel columns. In two adjacent ones of subpixel rows, the first data line is electrically connected to one of first subpixels in one of the first pixel columns and one of second subpixels in one of the second pixel columns, and the second data line is electrically connected to one of the second subpixels in the one of the second pixel columns and one of the first subpixels in another one of the first pixel columns adjacent to the one of the second pixel columns. |
| US09501958B2 |
Sealing label
A sealing label suitable for sealing a package made of varnished cardboard comprises: a carrier layer, and an adhesive layer, wherein the thickness of the carrier layer, the material of the carrier layer, and the composition of the adhesive layer have been selected such that: a minimum deformation force of the label is smaller than a first breaking force needed to break the cardboard material of the varnished cardboard, a minimum detaching force of the label is greater than the first breaking force, and the minimum detaching force is smaller than a second breaking force needed to break the label, wherein the first breaking force is a first pulling force which causes breaking of the cardboard material in a situation where the label is separated from the varnished cardboard by pulling the label with said first pulling force, and the minimum detaching force is a second pulling force which is needed to separate the adhesive layer of the label from the surface of the varnished cardboard in a situation where the label is pulled with said second pulling force. |
| US09501951B2 |
Using structured communications to quantify social skills
Embodiments for using structured communications to quantify social skills and social behavioral factors. Communications between at least two devices are intercepted and/or relayed by a computer system wherein a portion of the communications correspond to an audible source and wherein the forwarding or processing of communications is based on a combination of historical, contextual and/or commanded information derived from current and past communications by the computer system. Primary statistics are measured based on the communications and contextual information. Secondary statistics are derived related to a user wherein the secondary statistics quantify social skills and behavioral factors of the user in one or more dimensions against one or more profiles or roles. |
| US09501945B2 |
System and method for tracking developmental training
An approach is provided for receiving an input for specifying a developmental training activity associated with a user. The approach involves identifying a classification of the developmental training activity as a team activity, an individual activity, or a combination thereof. The approach also involves determining a weighting for the development training activity based on classification. The approach further involves calculating a training score for the user based on the weighting and the developmental training activity. |
| US09501944B2 |
Method for enhancing memory skills
A system and method for assisting individuals in developing and refining memory skills is disclosed. The computer-base memory enhancing system provides users with a memory enhancing process, memory enhancing interface, memory enhancing files, and memory enhancing methods that provide users with tools to enhance memorization. Among the features and functionalities associated with the computer-base memory enhancing system are: (i) a memory enhancing method that suggests components from queries, (ii) a memory enhancing method that suggests component structures for arranging components, and (iii) a memory enhancing method that superposes components in real-world locations (“the augmented reality memory enhancing method”). |
| US09501939B2 |
Multisensory literacy instruction system
A literacy instruction system includes a plurality of pieces each having a groove in the top face in the shape of a character, such as a letter, numeral, or geometric shape. A flexible, erasable writing surface is permanently adhered to the top face and covers the groove. The writing surface is configured to receive the tip of a writing instrument and resiliently depress into the groove below, whereby a raised outline in the top face guides the tip to aid in writing the character for which the groove is shaped. In an embodiment, the bottom face of each piece is covered in a magnetic material, and the system is packaged with a magnetic board for holding the character pieces. In another embodiment, the plastic writing surface is transparent. These embodiments enable the character pieces to be manipulated quickly and easily, accelerating the process of learning to write and spell. |
| US09501937B2 |
Systems and method of controlling airport traffic
A method of controlling airport traffic is provided. The method includes routing a plurality of aircraft towards a runway and selecting a runway approach vector for each of the plurality of aircraft. First approach legs of each runway approach vector are separated from each other by a distance. |
| US09501934B2 |
Notification system, electronic device, notification method, and program
A notification system includes: a first extraction unit configured to extract caution-required locations present within a predetermined distance range centered on a current position of a vehicle from a plurality of caution-required locations of which the positional information is previously acquired; a second extraction unit configured to extract caution-required locations present within a predetermined angle centered on a current traveling direction of the vehicle from the plurality of caution-required locations; a third extraction unit configured to extract, as a notification target point, a caution-required location where the current position of the vehicle is present within a predetermined angle range centered on the orientation of a link through which the vehicle is determined to pass by referring to map data holding information of a plurality of links in which positions and orientations are matched with each other, from caution-required locations extracted in common by both the first extraction unit and the second extraction unit; and an execution unit configured to execute a caution-required location traveling notification in accordance with the approach of the vehicle to the notification target point extracted by the third extraction unit. |
| US09501931B1 |
On-demand performance of an action associated with a vehicle
A device may detect a trigger associated with a vehicle. The device may determine registration information, associated with the vehicle, based on detecting the trigger. The registration information may include information associated with a user device associated with the vehicle. The device may determine that the user device is not within a particular distance of the vehicle. The device may provide, to the user device and based on determining that the user device is not within the particular distance of the vehicle, an alert associated with the vehicle. The alert may be provided via a communications network. The device may determine, after providing the alert to the user device, that an action, associated with the vehicle, is to be performed. The device may cause the action, associated with the vehicle, to be performed. |
| US09501930B2 |
Power line proximity sensing and warning system
A power line proximity sensing and warning system. The embodiments disclosed herein may be configured as standalone systems or may be used in conjunction with each other or with other conventional systems. |
| US09501929B2 |
Movement assistance device and movement assistance method
A movement assistance device includes a provided information acquirer that acquires, traffic signal cycle data in which traffic signal data comprised of identification information of a traffic light, which is stored in an SNS server, and an image capture date and time and a lighting duration time of the traffic light is organized for each light color pattern of the traffic light, and that specifies, from the identification information of the traffic light of the traffic signal cycle data, a traffic light which a moving object will pass, and calculates a remaining lighting time which will elapse until the lighting of each light color of the specified traffic light is ended from both the time difference between the image capture date and time of each light color of the traffic signal cycle data and the current time, and the lighting duration time of the traffic signal cycle data. |
| US09501923B2 |
Distress identifier to cause an action
Embodiments relate to systems and methods for providing digital dye packs and/or distress signals on a device user interface in connection with a transaction. In an embodiment, a system includes a communication module that interacts with a device having an input device that receives, from a user of the device, specific distress identifier information in connection with conducting a transaction via the device. The system also includes a non-transitory memory comprising a database storing specific distress identifier information with corresponding defensive actions that are executed based on the specific distress identifier information. The system further includes at least one hardware processor in communication with the non-transitory memory and the communication module for executing the defensive actions corresponding to the specific distress identifier information based at least in part on the specific distress identifier information received from the user of the device in connection with the transaction. |
| US09501922B2 |
System and method for automated posting of alarm information to news feed
A system and method for automatically posting alarm information in a video surveillance system to a news feed is provided. The method includes configuring a plurality of surveillance devices, configuring a notification platform, configuring a plurality of alarm types, and providing a remote notification to a mobile handheld device via the notification platform when an alarm that is at least one of the plurality of alarm types occurs in at least one of the plurality of surveillance devices. |
| US09501919B2 |
Method and system for monitoring the activity of a subject within spatial temporal and/or behavioral parameters
Methods and systems for monitoring a subject within a defined spatial environment in order to signal the activity status of subject within the environment to a remote user comprise providing a virtual representation and a virtual model of the subject and the environment respectively. The foregoing can be performed by a camera which is linked to a controller for translating the captured images into virtual versions. The activities of the subject are assigned activity statuses. Hence, assessing the activities of the virtual subject within the virtual environment and comparing this activity to previously assigned statuses provides for determining the activity status of the subject within the environment and communicating this information to a remote user via an interface linked to the controller. |
| US09501916B2 |
Inventory management system using event filters for wireless sensor network data
A wireless sensor node, WSN, tag and method for filtering sensor data obtained by the WSN. At least one event filter is applied to sensor data. The sensor data is based at least in part on motion of the WSN tag. The at least one event filter includes at least one filter parameter, and the at least one filter parameter includes a minimum amount of movement of the WSN tag within a predetermined time threshold. |
| US09501915B1 |
Systems and methods for analyzing a video stream
The various embodiments described herein include methods, devices, and systems for analyzing video streams. In one aspect, a method includes, while receiving a video stream: obtaining motion start information indicating that a portion of the video stream includes a motion event candidate; and segmenting the portion of the video stream into a plurality of segments including an initial segment. The method also includes obtaining a first categorization for the motion event candidate based on the initial segment; and, in accordance with the obtained first categorization, generating a log entry for the motion event candidate including the first categorization. The method further includes: in response to obtaining motion end information, obtaining a second categorization for the motion event based on the plurality of segments; and updating the log entry for the motion event candidate based on the obtained second categorization. |
| US09501914B1 |
Surveillance method
A surveillance method includes capturing media by a media capturing device of a sensor device according to a trigger event; the sensor device sending a media ready notice to a host; the host sending a media size request to the sensor device to request a size of the captured media; the sensor device sending a media size response to the host to notify the host of the size of the captured media; the host determining a number of packets to be transmitted in burst mode according to the notified size of the captured media, followed by sending a corresponding burst mode packets transmit request to the sensor device; and the sensor device transmitting the determined number of packets in a continuous manner to the host according to the burst mode packets transmit request. |
| US09501913B2 |
Programmable security system and method for protecting merchandise
A programmable security system and method for protecting an item of merchandise includes a programming station, a programmable key and a security system. The programming station generates a security code and communicates the security code to a memory of the programmable key. The programmable key initially communicates the security code to a memory of the security device and subsequently operates the security device upon a matching of the security code in the memory of the security device with the security code in the memory of the programmable key. The programmable key may also transfer power via electrical contacts or inductive transfer from an internal battery to the security device to operate a lock mechanism. The security code may be communicated by wireless infrared (IR) systems, electrical contacts or inductive transfer. A timer inactivates the programmable key and/or the security device after a predetermine period of time. A counter inactivates the programmable key after a predetermined maximum number of activations. |
| US09501910B2 |
Payment terminal with insertion slot parallel to terminal position surface
A payment terminal includes a slot for inserting a magnetic memory card. A general display plane of the terminal, formed by a keyboard and/or a terminal screen, forms a non-zero angle with a general positioning surface of the terminal. The bottom plane of the insertion slot of a magnetic memory card is appreciably parallel to the plane on which the terminal is positioned. |
| US09501906B2 |
Gaming system and a method of gaming
A gaming system is disclosed which comprises a plurality of display positions disposed in a display area, a symbol selector arranged to select a plurality of symbols for display at respective display positions, and an outcome evaluator arranged to determine whether the selected symbols correspond to a winning outcome with reference to at least one of a plurality of defined win lines. Each of the defined win lines comprises at least one display position, and at least some of the win lines comprise differing numbers of display positions. A corresponding method of gaming is also disclosed. |
| US09501903B2 |
Gaming system and method for offering simultaneous play of multiple games
Gaming apparatus and methods of conducting a wagering game of chance. A gaming machine is disclosed which is configured for mutually concurrent play of a plurality of games of chance on a single display screen. A method of conducting a wagering activity includes providing a player with a plurality of differing games of chance, at least some of which are mutually concurrently playable on a single screen display of a gaming device and enabling mutually concurrent play of the plurality of differing games of chance on the single screen display. Various other gaming machine configurations and methods of play related to multiple differing games of chance on a single display screen are also disclosed herein. Networked gaming machines are also disclosed. |
| US09501897B2 |
Method and apparatus for enabling customized electronic game feautures by authorized personnel
Methods and apparatus are described relating to allowing authorized personnel to customize rake options for one or more electronic games. In one embodiment, a processor-readable media is described, comprising instructions for receiving an indication by a processor, from a user interface, of a desire to customize rake options associated with an electronic game by the authorized personnel, providing a selection of rake options available for customization to the authorized personnel by the processor via the user interface, receiving, by the processor, a selection of one or more rake option settings chosen by the authorized personnel from the user interface, and reducing an account balance of a game player in accordance with the rake option settings chosen by the authorized personnel as the electronic game is played by the game player. |
| US09501894B2 |
Gaming system and method for triggering a secondary game in association with multiple concurrently played primary games
A gaming system and method for enabling a player to select a plurality of games to simultaneously, concurrently or overlappingly play, wherein regardless or independent of which primary games the player selected to play, the secondary games available to be triggered remain the same. |
| US09501892B2 |
Gaming machine having award modifier dependent on game outcome and method therefor
A gaming system for conducting a wagering game includes a wager input device and a display for displaying a randomly selected outcome. The randomly selected outcome is selected from a plurality of outcomes including at least one winning outcome. The gaming system further includes a controller operative to (i) display the at least one winning outcome, and (ii) provide an award modifier to the player, wherein the award modifier is dependent on a quantity of symbols which comprises the at least one winning outcome. |
| US09501890B2 |
Reduced friction earplug dispenser
A manually operable dispenser for dispensing disposable earplugs. The dispenser includes a housing, an index body, and a plate. The housing forms an opening for receiving earplugs from a container. The index body includes a handle and a hub. The hub forms an upper major face, a lower major face, and a plurality of circumferentially arranged bores. Each of the bores is open to the major faces and is defined by a wall surface extending through a thickness of the hub. At least a portion of the wall surface of each of the bores has an anti-bonding construction. The hub is rotatably mounted within the housing. The plate is connected to the housing, and forms a dispensing aperture. A manually-applied rotational force at the handle selectively aligns respective ones of the bores with the dispensing aperture. The anti-bonding construction promotes sliding, low friction interface with individual earplugs. |
| US09501885B1 |
Systems, methods and devices for processing coins utilizing near-normal and high-angle of incidence lighting
Currency processing systems, coin processing machines, and methods of imaging coins are presented herein. A currency processing system is disclosed which includes a housing with an input area for receiving coins and receptacles for stowing processed coins. A disk-type coin processing unit is coupled to the coin input area and coin receptacles. The coin processing unit includes a rotatable disk for imparting motion to coins, and a sorting head adjacent the rotatable disk with shaped regions for guiding moving coins to exit channels through which the coins are discharged to the coin receptacles. A sensor arrangement mounted adjacent the rotatable disk includes one light emitting device for emitting light onto a coin surface at near-normal incidence, and another light emitting device for emitting light onto the coin surface at high-angle incidence. A photodetector senses light reflected off the coin surface and outputs a coin-image signal for processing the coin. |
| US09501883B2 |
Wireless access control system including lock assembly generated magnetic field based unlocking and related methods
A wireless access control system may include a remote access wireless device that includes a magnetic sensor and a remote controller coupled to remote wireless communications circuitry and the magnetic sensor. The system may also include a lock assembly for a door that includes a magnetic field generator and a lock controller coupled to a lock, lock wireless communications circuitry, and the magnetic field generator. The lock controller may communicate a magnetic field characteristic with the remote wireless communications circuitry, and cooperate with the magnetic field generator to generate a magnetic field based upon the magnetic field characteristic. The remote controller may cooperate with the magnetic sensor to sense the magnetic field, compare the sensed magnetic field to the magnetic field characteristic, and communicate to enable lock unlocking when the sensed magnetic field has a sensed magnetic field characteristic that matches the magnetic field characteristic. |
| US09501882B2 |
System and method to streamline identity verification at airports and beyond
A system and method of performing identity verification based on the use of mobile phones or mobile computing devices in conjunction with a secure identity authority; said method to be used as an alternative to conventional identity verification using paper-based documents such as driver's licenses and passports. The new method improves speed, accuracy, cost, and reliability of identity verification for entities that need to verify identity, as well as convenience for end-users. |
| US09501876B2 |
On-road running test apparatus
In order to efficiently and reliably perform a valid field test, there are provided: a running data acquisition part for sequentially acquiring actual running data of a vehicle under execution of a running test on a road by a driver; and a tendency data output part for sequentially producing and outputting tendency data indicating a tendency as to whether or not the running test is valid, based on the actual running data during the running test. |
| US09501873B2 |
Indicating out-of-view augmented reality images
Embodiments are disclosed that relate to operating a user interface on an augmented reality computing device comprising a see-through display system. For example, one disclosed embodiment includes identifying one or more objects located outside a field of view of a user, and for each object of the one or more objects, providing to the user an indication of positional information associated with the object. |
| US09501867B2 |
System for displaying three-dimensional landscapes
A system for displaying three-dimensional landscapes includes a processor and a storage device in communication with the processor. The processor is configured to identify at least one predetermined landscape element in a landscape to be displayed, individually calculate a representation of the at least one predetermined landscape element and cause a display to display the landscape based on the individually calculated representation of the at least one predetermined landscape element and the altitude data. |
| US09501866B2 |
System and method for modeling virtual contaminants
A method and a computer system for modeling, in a virtual environment of a computer simulation, virtual contaminants in a scene to be rendered. A processing module, using a graphical user interface on a display device, is used for define, in a model, a first additive zone of the scene over which a virtual contaminant is to be added, defining, in the model, a second subtractive zone of the scene over which the virtual contaminant is to be at least partially removed, the second subtractive zone being at least partially enclosed within the first additive zone and a memory module is used for storing the model, the model being made available through a storage module for rendering the virtual contaminants on the scene in the computer simulation. A preview mode may be used for launching the computer simulation at a rate lower than the expected rate of the computer simulation. |
| US09501862B2 |
Visibility silhouettes for masked spherical integration
The disclosure provides an approach for determining, in 3D rendering, the integrals of visibility-masked spherical functions using visibility silhouettes. For a given shade point, the visibility silhouette for that shade point includes a set of edges from the scene geometry which form the boundaries between visible and invisible regions of a hemisphere having the shade point as its center. For each shade point, a rendering application determines a set of contour edges of scene geometry, the contour edges being a superset of the set of visibility silhouette edges, by querying a 4D dual mesh. The rendering application then evaluates the integral of the visibility-masked spherical function for a given shade point by integrating over segments of discrete u-isolines for which an overlap function indicates that a ray from the shade point would not intersect scene geometry. |
| US09501859B2 |
Triangle rasterization
Techniques are disclosed for deriving a list of pixels contained within a projected triangle in a way that is computationally efficient. In particular, the recursive techniques disclosed herein are particularly well-suited for implementation on modern multi-processor computer systems, and enable a list of pixels contained within a projected triangle to be derived quickly and efficiently. For example, in certain embodiments a network of projected triangles is overlaid by a plurality of tiles, which are subsequently divided into an array of sub-tiles, each of which can be processed in parallel by a multi-processor computer system. This recursive process advantageously allows three-dimensional objects to be rendered in a computationally efficient manner. |
| US09501855B2 |
Image processing apparatus and image processing method
To display images by suitably superimposing a graphics image on a high-dynamic-range image in an easily visible manner.A dynamic range converter (311) converts a SDR graphics image to an HDR graphics image based on metadata. An image combiner (312) combines the graphics image of which the dynamic range has been converted to HDR with HDR content. A dynamic range converter (313) performs display mapping on the HDR content combined with the graphics image based on metadata. |
| US09501854B2 |
Color-sample image generator, color-sample generator, color-sample generation method, and color-sample
A color sample image generator, a color-sample generator, and a color sample generation method are provided. The color-sample image generator produces a color sample, and lightness of every pixel of a first area of a first image from which the color sample is to be extracted is measured and all the pixels are arranged in a second area of a second image that is different from the first area based on lightness level. The color-sample generator and the color-sample generation method includes obtaining all pixels of a first area of a first image from which a color sample is to be extracted, measuring a level of lightness of each of the obtained pixels of the first area, and rearranging each of the pixels whose lightness has been measured in a second area of a second image that is different from the first area. |
| US09501848B2 |
Fitting a parametric curve using maximum curvature
Parametric curve fitting using maximum curvature techniques are described. In one or more implementations, a parametric curve is fit to a segment of a plurality of data points that includes a first data point disposed between second and third data points by setting a point of maximum curvature for the segment of the curve at the first data point. A result of the fitting is output by the computing device. |
| US09501845B2 |
Information processing apparatus and information processing method for converting shape and color data
An information processing apparatus obtains shape data including data which indicates vertexes of each of a plurality of polygons representing a stereoscopic object and color data indicating a color of each polygon. The shape data and the color data are converted into shape data and color data in a data format including an area which stores the shape data and an unused area which does not store the shape data. Color data on one of the plurality of polygons is stored in the unused areas corresponding to a plurality of polygons. The converted shape data and color data are output. |
| US09501842B2 |
Image processing apparatus and image processing method with color correction of observation target
Provided is an image processing apparatus capable of adjusting a color of an image of an observation target depending on differences between viewing angles. The image processing apparatus obtains a viewing angle of a first observation target and a viewing angle of a second observation target, and then corrects the color of each observation target by using the obtained viewing angles of the first and second observation targets. |
| US09501839B1 |
Methods and systems for detecting moving objects in a sequence of image frames produced by sensors with inconsistent gain, offset, and dead pixels
Systems and methods of detecting dead pixels of image frames are described including receiving a sequence of image frames, aligning, from the sequence of image frames, pairs of image frames, and for a given pair of image frames, determining differences in intensity of corresponding pixels between the aligned pair of image frames. The method also includes, based on the differences in intensity of corresponding pixels between the aligned pair of image frames, generating mask images indicative of areas in the pairs of image frames having moving objects. The method further includes determining, within the mask images, common pixel locations indicative of areas in the pairs of image frames having moving objects over a portion of the sequence of image frames, and based on a number of the common pixel locations for a given pixel location being above a threshold, identifying the given pixel location as a dead pixel. |
| US09501834B2 |
Image capture for later refocusing or focus-manipulation
A system, method, and computer program product for capturing images for later refocusing. Embodiments estimate a distance map for a scene, determine a number of principal depths, capture a set of images, with each image focused at one of the principal depths, and process captured images to produce an output image. The scene is divided into regions, and the depth map represents region depths corresponding to a particular focus step. Entries having a specific focus step value are placed into a histogram, and depths having the most entries are selected as the principal depths. Embodiments may also identify scene areas having important objects and include different important object depths in the principal depths. Captured images may be selected according to user input, aligned, and then combined using blending functions that favor only scene regions that are focused in particular captured images. |
| US09501827B2 |
Methods and systems for detecting a chemical species
Methods and systems for detecting at least one chemical species including obtaining a first image from a first electromagnetic radiation detector and obtaining a second image from a second electromagnetic radiation detector. The first image includes a first plurality of pixels and the second image includes a second plurality of pixels, each pixel having an associated intensity value. A first resultant image is generated. The first resultant image includes a plurality of resultant pixels, each pixel having an associated intensity value. One or more regions of interest are determined. The correlation between the first image, the second image, and the first resultant image is determined for the one or more regions of interest using a correlation coefficient algorithm to calculate a first correlation coefficient and a second correlation coefficient. The presence of the chemical species is determined based, at least in part, on the first correlation coefficient and the second correlation coefficient. |
| US09501820B2 |
Automated nital etch inspection system
A system and method to inspect flaws associated with a part. The system includes a first image capturing device configured to capture a first set of images of the part and a computer operably associated with first image capturing device and configured to receive and analyze the first set of images. The method includes treating the part with a nital etchant solution, capturing a first set of images of an outer surface of the part with the first image capturing device, and identifying a part defect with an algorithm associated with the computer. |
| US09501819B2 |
Super-resolution apparatus and method
An image-based super-resolution method using a cone-beam-based line-of-response (LOR) reconfiguration in a positron emission tomography (PET) image is provided. That is, an apparatus and method for reconfiguring a super-resolution PET image using a cone-beam-based LOR reconfiguration is provided. |
| US09501816B2 |
Reducing the dynamic range of image data
This disclosure concerns the determination of low dynamic range image data from high dynamic range image data. A processor determines the low dynamic range image data by optimizing a degree to which the low dynamic range image data satisfies a local contrast constraint and a global consistency constraint. The local contrast constraint is based on a local contrast in a perception space while the global consistency constraint is based on a relationship between points in the high dynamic range image data. The determined low dynamic range image data preserves the local contrast from the high dynamic range image data while also preserving the relationship between points in the high dynamic range image data to a high degree. As a result, the method prevents contrast distortion, halos and artifacts and ordering of level lines (isocontours) is preserved. |
| US09501814B2 |
Method and apparatus for image color enhancement
There is provided a method and apparatus for image color enhancement, wherein the method comprises the following steps: S1, collecting color components of an image, converting the color components from a RGB space into a HSV space, and obtaining parameters in the HSV space as hue, saturation, and value respectively; S2, performing gain operations selectively on the saturation and the value by judging the saturation in the HSV space; S3, converting the obtained parameters in the HSV space back into the RGB space. In the above method for image color enhancement, after the color components are converted into the HSV space, firstly, the saturation value is judged, and the gain operations are performed selectively by utilizing the gain function according to the judgment result. |
| US09501810B2 |
Creating a virtual environment for touchless interaction
This disclosure is directed to a touchless interactive environment. An input device may be configured to capture electronic images corresponding to physical objects detectable within a physical three-dimensional region. A computer system may establish a virtual three-dimensional region mapped to the physical three-dimensional region, with the virtual three-dimensional region defining a space where a plurality of virtual objects are instantiated based on the plurality of electronic images. The computer system may select a virtual object from the plurality of virtual objects as one or more commanding objects, with the one or more commanding objects indicating a command of a graphical user interface to be performed based on a position of the one or more commanding objects. The computer system may then perform the command of the graphical user interface based on the position of the one or more commanding objects. |
| US09501807B2 |
Detecting system and detecting method for products
A detecting system for checking shapes, sizes, and/or positions of products, includes a feeding module configured to transfer the products into the detecting system, a detecting module configured to detect the products, a discharging module configured to remove the products out of the detection system, a conveying module configured to transport the products, a data processing module configured to deal with the data information measured by the detecting module, and an electronic control module configured to control the feeding module, the detecting module, the discharging module, the conveying module, and the data processing module. The detecting module includes a first detection module configured to get size and position images of the products, and a second detecting unit configured to detect a gap between two planes of the products. The present disclosure also discloses a detecting method for products. |
| US09501804B2 |
Multi-core processor for performing energy-related operations in an industrial automation system using energy information determined with an organizational model of the industrial automation system
A system may include a multi-core processor that may include a first core configured to determine structured energy data associated with one or more assets in an automation system, wherein the structured energy data comprises a logical grouping of assets in the automation system, a second core configured to control the one or more assets based on the structured energy data, a third core configured to manage security operations in the automation system, and a fourth core configured to manage safety operations in the automation system. |
| US09501801B2 |
One click to update buyer in mass on purchaser orders and prepare changes to communicate to supplier
A mass change of values of a specified attribute (e.g., buyer identity) of multiple purchase orders can be performed automatically in conjunction with additional automatically performed operations, and all in response to a single user activation of a button control, without requiring any further human intervention. The additional operations can include the creation of change orders for each changed purchase order; the logging of each change made to each purchase order in an audit history; the requesting of change approvals for purchase orders; and the preparation of the created change orders for communication to suppliers to whom the changed purchase orders pertain. Thus, each supplier can made aware via an automated process that he is now dealing with a different entity than before. |
| US09501798B1 |
Method and system for enabling interactive communications related to insurance data
A method of providing user interaction includes providing a processor and transmitting a communication from a first party to a second party. The method also includes posting, using the processor, an entry associated with the communication on a website, receiving a second communication from the second party to the first party, and posting, using the processor, a second entry associated with the second communication. |
| US09501797B2 |
System and method for providing electronic price feeds for tradeable objects
System and methods for a price feed generation are described. According to an example method described herein, upon receiving market information including a plurality of linear prices and order quantities, a reference price level is selected and a price feed message is generated to include the reference price level and the plurality of order quantities. The price feed message is then provided to client terminals. |
| US09501796B2 |
Dataset intersection determination
An item is determined to exist in a dataset by arranging the dataset into a plurality of subsets, each bounded by the minimum amount of memory that may be transferred between levels of memory in a memory configuration. The item and the subsets have attributes that allow for a determination of which subset the item would exist in if the item were in the dataset. A singular subset is transferred between levels of memory to determine whether the item exists in the transferred subset. If the item does not exist in the transferred subset, it is determined that the item does not exist in the dataset. |
| US09501793B1 |
Archetecture and associated methodology for data standardization and utilization in retail industry applications
A system, method and server are described for creating customized, in-store customer experiences. In one embodiment, a method is described, comprising receiving proprietary retail data from a first retail establishment over a wide-area network, the proprietary retail data comprising customer purchasing information formatted in a first proprietary format, converting the proprietary retail data into a standard retail data format to produce standardized retail data, receiving an indication from the first retail establishment over the wide-area network that an event relating to the first retail establishment has occurred, and in response to receiving the indication, retrieving standardized retail data relating to the customer from a memory, and providing at least some of the standardized retail data related to the customer to the retail establishment for presentation to the customer. |
| US09501792B2 |
System and method for a graphical user interface including a reading multimedia container
A system and method for a graphical user interface including a multimedia container. The method includes accessing, within a mobile device, a first data store corresponding to a multimedia container and accessing a second data store. The multimedia container comprises a first object and the multimedia container is operable to comprise one or more applications, widgets, and pieces of content. The second data store comprises data corresponding to a first electronic book. The method further includes displaying a first image corresponding to the first object, where the first image comprises a first book cover image corresponding to the first electronic book. The first image further comprises a first statistic corresponding to the first electronic book and the first statistic is related to access of the first electronic book. |
| US09501791B2 |
Online marketplace with seller financing
An online marketplace system generates an online marketplace for seller-financed transactions. The system includes a plurality of listings of transaction offerings that are available. The transaction offerings are listed by a plurality of users and are from a plurality of different categories of products and services. The transaction offerings include a plurality of transaction terms, including payment and seller-financing terms. A transaction engine facilitates the negotiation of transaction terms between users and the formation of agreement between users. Transaction coins are awarded during the successful performance of a transaction according to the agreed upon transaction terms. A reputation engine generates trust profiles and trust scores for users. The trust profiles and trust scores are used by parties to evaluate the trustworthiness of the other party. A user interface engine generates a user interface that includes listings from users and trust scores of those users. |
| US09501789B1 |
System and method for controlling real-time bidding for online advertisements
A method and system for controlling real-time bidding for online advertisements is disclosed. According to one embodiment, a computer-implemented method comprises communicating with a bidder and an impression server and an event tracking server. The bidder receives a real-time bidding (RTB) request containing an available impression from an exchange and places a bid corresponding to the RTB request. The impression server receives impression requests from a browser and responds to the impression requests from the browser. The event tracking server receives event requests from the browser and responds to event requests from the browser. Campaign performance data is retrieved from one or more of the impression server and the event tracking server and compared to the campaign target. The bidder is notified whether to bid for online advertisement impressions based on the campaign performance data. |
| US09501784B2 |
Location-specific advertising
The usefulness, and consequently the performance, of advertisements are improved by allowing businesses to better target their ads to a responsive audience. Location information is determined (or simply accepted) and used. For example, location information may be used in a relevancy determination of an ad. As another example, location information may be used in an attribute (e.g., position) arbitration. Such location information may be associated with price information, such as a maximum price bid. Such location information may be associated with ad performance information. Ad performance information may be tracked on the basis of location information. The content of an ad creative, and/or of a landing page may be selected and/or modified using location information. Tools, such as user interfaces, may be provided to allow a business to enter and/or modify location information. The location information used to target and/or score ads may be, include, or define an area. |
| US09501783B2 |
Systems and methods for planning, executing, and reporting a strategic advertising campaign for television
Systems and methods are disclosed for planning, executing, reviewing, and reporting the results of an advertising campaign to be run on TV. A demand-side platform receives ad slot opportunities from TV programming sources, and analyzes the ad slots to produce a prioritized list of placement opportunities for the advertising campaign to be presented to advertiser/clients. Each ad slot is analyzed with respect to past viewership data and with respect to desired targeting characteristics that may include conventional age and gender targeting, or additionally strategic targeting characteristics. Scores are established for each ad slot with respect to numbers of projected on-target impressions and/or a cost for projected on-target impressions. The scores are sorted to produce the prioritized list. Projected results can be viewed with respect to any or all of network, day, and daypart. After a campaign has completed, viewership data representing actual results is acquired, processed, and reported. |
| US09501779B2 |
Automated thumbnail selection for online video
Access is provided to optimal thumbnails that are extracted from a stream of video. Using a processing device configured with a model that incorporates preferences generated by the brain and behavior from the perception of visual images, the optimal thumbnail(s) for a given video is/are selected, stored and/or displayed. |
| US09501777B1 |
Systems and methods for MAC address tracking for a mobile device
Embodiments that include a first module configured to install and work residently within at least a device-to-web bridge to collect the Media Access Control (MAC) address data and secondary identifier information associated with a given mobile computing device are disclosed. An example attempts to use the device-to-web bridge and to pass that information to a second module to call out and send that information over a wide area network to the mobile advertisement targeting system on a central management server site, which stores that information on a MAC address identification (ID) basis in a database. The MAC addresses may be coupled with their secondary identifier and stored within the database. The second module can call and communicate with a mobile advertisement targeting system configured to utilize MAC address data in combination with a secondary identifier for each mobile computing device tracked by the mobile advertisement targeting system. |
| US09501770B2 |
Electronic money charging service system, electronic money charging server and charging method thereof
E-money recharge service system, e-money recharge server, and recharge method are disclosed. The e-money recharge service system includes: recipient terminal for receiving and storing e-money; payer terminal for performing settlement approval procedure for payment of e-money loaded into recipient terminal; and money recharge server for receiving input of money information including information on the whole or part of identification of recipient terminal, identification of payer terminal, recharge amount, and methods of payment from subscriber to money recharge service, for the subscriber acting money payer recharging the recipient terminal with e-money corresponding to recharge amount and making payment for settling recharge amount of money through the methods of payment, and for the subscriber acting money recipient transmitting message of inquiry to payer terminal of settlement approval of recharge amount and recharging recipient terminal with e-money corresponding to recharge amount if settlement approval is issued by payer terminal. |
| US09501767B2 |
User alerts for monitored transactions at automatic teller machines
An improved method, apparatus, and computer implemented instructions for processing a check in an automatic teller machine in a data processing system. A check is received from a user at the automatic teller machine. The check is scanned to generate an image. A transaction is performed involving the check. The image is transmitted to a mobile device associated with the user, wherein the image is in a format for use with a financial program. |
| US09501766B2 |
Generating a storage drive qualification test plan
A method for generating a storage drive qualification test plan includes receiving input values for a plurality of variables for a qualification test of a storage drive model. Each variable has a drive requirement weight and/or a testing schedule weight. The method includes determining a plurality of weighted drive requirement values by adjusting each input value having a corresponding drive requirement weight by the corresponding drive requirement weight and determining a plurality of weighted testing schedule values by adjusting each input value having a corresponding testing schedule weight by the corresponding testing schedule weight. The method also includes determining a storage drive requirement by increasing or decreasing a baseline storage drive requirement according to the weighted drive requirement values. The method includes determining a testing schedule by increasing or decreasing a baseline testing schedule according to the weighted testing schedule values. |
| US09501763B2 |
Social collaborative scoring for message prioritization according to a temporal factor between sender and recipient
Embodiments of the present invention address deficiencies of the art in respect to message prioritization and provide a novel and non-obvious method, system and computer program product for social collaborative prioritization of messages in a messaging system. In an embodiment of the invention, a method for social collaborative prioritization of messages can be provided for a messaging system. The method can include receiving a message from a sender as directed to a recipient, determining a value for a different social collaborative criterion based upon a temporal factor between the sender and the recipient, transforming the value into a priority for the message, and associating the priority with the message in the messaging system. |
| US09501757B2 |
Identifying remote objects on a client system
A method and system for identifying remote objects on a client system is provided. A client system (101) has a connection means (302) to access a component (310) on a remote system (103). The client system (101) has a graphical user interface (308) including a user interface object (306) representing the component (310) at the remote system (103). Means (304) are provided for applying a theme to the object (306) to distinguish it as representing a remote component (310). The graphical user interface (308) also includes user interface objects (307) for components local to the client system (101), and the means for applying a theme (304) applies distinguishing themes to the local objects (307) and the remote objects (306). |
| US09501756B2 |
System and method for configuring workstations
A method for managing an inventory system includes receiving an operation request that identifies an inventory item and selecting, from a plurality of workstations, a workstation at which to fulfill the operation request. The method also includes moving an inventory holder storing the identified inventory item to the selected workstation and moving a supply holder storing a supply item associated with the received operation request to the selected workstation. The method additionally includes fulfilling the operation request, at least in part, at the workstation. |
| US09501753B2 |
Exploring the impact of changing project parameters on the likely delivery date of a project
A user may be allowed to specify a change in one or more parameter data associated with the project, the one or more parameter data used previously to compute a probability distribution of completion time of the project. The probability distribution of completion time of the project may be recomputed based on the change. The recomputed probability distribution of the completion time of the project may be presented. An option to save the recomputed probability distribution may be provided. An option may be provided to specify another change in one or more parameter data associated with the project and repeat the recomputing and the presenting procedures based on another change in one or more parameter data associated with the project. |
| US09501751B1 |
Virtual interactive taskboard for tracking agile software development
A method of managing tasks during agile software development includes detecting selection of a level in a project hierarchy. In response to said selection of the level, a table is displayed listing a plurality of assets associated with the level and showing tasks associated with respective assets of the plurality of assets. The table indicates a status of each task. A user action to update the status of a particular task is detected; in response, display of the particular task is updated to indicate an updated status of the particular task. Selection of one or more filter criteria is detected; in response, display of the table is updated based on the one or more filter criteria. |
| US09501746B2 |
Systems and methods for electronic message analysis
Systems and methods for analyzing electronic messages are disclosed. In some embodiments, the method comprises receiving a new received message from an indicated sender, the new received message having a first message characteristic of the indicated sender and a second message characteristic, identifying an actual sender message characteristic pattern of an actual sender using the first message characteristic, probabilistically comparing the second message characteristic to the actual sender message characteristic pattern, determining a degree of similarity of the second message characteristic to the actual sender message characteristic pattern, and influencing a probability that the indicated sender is the actual sender based upon the degree of similarity. There may be multiple message characteristics and patterns. In some embodiments, the methods may utilize pattern matching techniques, recipient background information, quality measures, threat intelligence data or URL information to help determine whether the new received message is from the actual sender. |
| US09501744B1 |
System and method for classifying data
In one embodiment, a method includes providing an a priori classification engine, an a posteriori classification engine, and a heuristics engine. The a priori classification engine is operable to perform an a priori classification. The a posteriori classification engine is operable to perform an a posteriori classification. The heuristics engine is operable to perform a heuristics classification. In addition, the method includes accessing data from at least one source. The method further includes, responsive to an indication that the a priori classification should be performed, performing the a priori classification on the data. The method also includes, responsive to an indication that the a posteriori classification should be performed, performing the a posteriori classification on the data. Further, the method includes, responsive to an indication that the heuristics classification should be performed, performing the heuristics classification on the data. |
| US09501743B2 |
Method and apparatus for tailoring the output of an intelligent automated assistant to a user
The present invention relates to a method and apparatus for tailoring the output of an intelligent automated assistant. One embodiment of a method for conducting an interaction with a human user includes collecting data about the user using a multimodal set of sensors positioned in a vicinity of the user, making a set of inferences about the user in accordance with the data, and tailoring an output to be delivered to the user in accordance with the set of inferences. |
| US09501740B2 |
Predicting well markers from artificial neural-network-predicted lithostratigraphic facies
This disclosure generally describes methods and systems, including computer-implemented methods, computer-program products, and computer systems, for predicting well markers. One computer-implemented method includes separating neural-network (NN)-predicted facies output associated with a plurality of wells into two sets, a first set of NN-predicted facies output of training wells and a second set of NN-predicted facies output of target wells, calculating, for each training well of the plurality of wells, a sameness score between zones of NN-predicted facies output and human-identified lithostratigraphic units (finer zones), calculating a mean sameness score for the finer zones for all training wells, identifying finer zones with a mean sameness score greater than a threshold value as dominant facies zones, and iterating over each target well to calculate a top and depth position of each dominant facies zone determined based upon the NN-predicted facies output of the target well. |
| US09501739B2 |
Neuron learning type integrated circuit device using a plurality of synapses, a soma, transistors, a zener diode, and condensers
According to one embodiment, a neuron learning type integrated circuit device includes neuron cell units. Each of the neuron cell units includes synapse circuit units, and a soma circuit unit connected to the synapse circuit units. Each of the synapse circuit units includes a first transistor including a first terminal, a second terminal, and a first control terminal, a second transistor including a third terminal, a fourth terminal, and a second control terminal, a first condenser, one end of the first condenser being connected between the second and third terminals, and a control line connected to the first and second control terminals. The soma circuit unit includes a Zener diode including an input terminal and an output terminal, the input terminal being connected to the fourth terminal, and a second condenser, one end of the second condenser being connected between the fourth terminal and the input terminal. |
| US09501735B2 |
Wearable device made with silicone rubber and electronic components
A wearable device includes a wearable device structure at least partially made of a silicone rubber. A support member is at least partially positioned in the wearable device structure. ID circuitry is at least partially positioned and coupled to the support. One or more batteries coupled to the ID circuitry. |
| US09501732B2 |
Antenna module
An antenna module includes a base including two opposing mounting surfaces, an antenna coil provided on or in the base so as to define an opening, the antenna coil having a shape that is symmetrical or substantially symmetrical with respect to a reference plane, and an IC chip and a plurality of electronic components mounted on one of the mounting surfaces and electrically coupled to the antenna coil, the IC chip and the electronic components being arranged inside the opening when viewed in plan from a normal direction of the mounting surface. At least two of the plurality of electronic components are arranged so as to be symmetrical or substantially symmetrical to each other with respect to the reference plane when viewed in plan from the normal direction. |
| US09501728B1 |
Power conservation in an image forming apparatus by delaying activation of a printing drum
A method for minimizing power consumption of a laser printer includes receiving page description language (PDL) data corresponding to a printing task, identifying commands corresponding to the received PDL data, computing a total predicted rendering time corresponding to the identified commands, computing a print deferral time according to the total predicted rendering time wherein the print deferral time corresponds to an amount of time by which printing drum initialization can be deferred without delaying completion of the printing task, and configuring a printing drum to begin operation according to the print deferral time. A computer program product and computer system corresponding to the method are also disclosed. |
| US09501726B2 |
Printing apparatus, information processing device, and printing method
A CPU of a printing apparatus selects one of a plurality of setting permission information items based on sheet property information in a case in which printing processing is performed employing a specific sheet type. Subsequently, the CPU of the printing apparatus performs a setting regarding each of a plurality of printing setting items so as to obtain a setting permitted in the selected setting permission information item in a case in which printing processing is performed employing a specific sheet type. Thus, a printing apparatus capable of executing the printing settings of a plurality of printing setting items appropriately is provided. |
| US09501724B1 |
Font recognition and font similarity learning using a deep neural network
A convolutional neural network (CNN) is trained for font recognition and font similarity learning. In a training phase, text images with font labels are synthesized by introducing variances to minimize the gap between the training images and real-world text images. Training images are generated and input into the CNN. The output is fed into an N-way softmax function dependent on the number of fonts the CNN is being trained on, producing a distribution of classified text images over N class labels. In a testing phase, each test image is normalized in height and squeezed in aspect ratio resulting in a plurality of test patches. The CNN averages the probabilities of each test patch belonging to a set of fonts to obtain a classification. Feature representations may be extracted and utilized to define font similarity between fonts, which may be utilized in font suggestion, font browsing, or font recognition applications. |
| US09501723B2 |
Method of classifying objects in scenes
A method for classifying objects in a scene captured by a camera determines a likelihood of first set of states for the objects. Each first set is a classification of one of the objects, and partitions a solution space based on the determined likelihood of the first set of states, each partition representing combinations of the classifications of the objects. The partitioning is applied to a solution space of a second set of states, each partition representing combinations of the classifications of a subset of the objects. The method determines a likelihood of the second set of states for the subset of the objects, each state of the second set of states being a classification of one of the subset of objects, and classifies a subset of objects according to the determined likelihood of the second set of states and the partitioning of the second set of states. |
| US09501718B1 |
Image-based control of lighting systems
Systems, methods, and other embodiments associated with image based control of lighting systems are described. According to one embodiment, an apparatus includes an imaging device configured to capture an image of a space. The apparatus also includes a matching logic configured to compare the image to templates in a set of templates to determine a current activity occurring in the space. In response to determining that the image matches a template, the matching logic is configured to generate a match signal that identifies the template. A control logic is configured to access one or more stored scenes. Each scene specifies a lighting setting for a controllable characteristic of at least one light fixture. The control logic selects a scene mapped to the identified template. The control logic further causes the controllable characteristic of the at least one light fixture to be adjusted to the lighting setting defined by the scene. |
| US09501714B2 |
Systems and methods to improve feature generation in object recognition
Present embodiments contemplate systems, apparatus, and methods to improve feature generation for object recognition. Particularly, present embodiments contemplate excluding and/or modifying portions of images corresponding to dispersed pixel distributions. By excluding and/or modifying these regions within the feature generation process, fewer unfavorable features are generated and computation resources may be more efficiently employed. |
| US09501709B2 |
Medical image processing apparatus
A medical image processing apparatus comprises a structure identifying part, an image generator, and a display controller. The structure identifying part identifies a tubular structure inside a subject and a core line in the axial direction of the tubular structure based on medical image data. The image generator generates medical images when viewing a predetermined observation object from a desired view point position inside the tubular structure. The display controller causes the display to display medical images. Furthermore, at each timing, the image generator identifies view point position at which the relative distance between the position of the observation object and the view point position becomes even among each of the timings, and generates a medical image from the view point position for each timing. Moreover, the display controller causes the display to display a plurality of the medical images generated for each of the timings in chronological order. |
| US09501707B2 |
Method and system for bootstrapping an OCR engine for license plate recognition
Methods and systems for bootstrapping an OCR engine for license plate recognition. One or more OCR engines can be trained utilizing purely synthetically generated characters. A subset of classifiers, which require augmentation with real examples, along how many real examples are required for each, can be identified. The OCR engine can then be deployed to the field with constraints on automation based on this analysis to operate in a “bootstrapping” period wherein some characters are automatically recognized while others are sent for human review. The previously determined number of real examples required for augmenting the subset of classifiers can be collected. Each subset of identified classifiers can then be retrained as the number of real examples required becomes available. |
| US09501704B2 |
Drowsiness estimation device, drowsiness estimation method, and computer-readable non-transient recording medium
A drowsiness estimation device comprises an imaging unit 1, a regional temperature calculation unit 6, and a weighted subtraction unit 7. The imaging unit 1 obtains visible spectrum image data in a visible spectrum capture mode and obtains infra-red image data indicating a surface body temperature distribution for a subject's body in an infra-red capture mode. The regional temperature calculation unit 6 detects a temperature of an ocular center region within the surface body temperature distribution indicated by the infra-red image data. The weighted subtraction unit 7 applies a correction to a temperature parameter for drowsiness estimation, based on the detected ocular center region temperature. A drowsiness estimation for the user is then performed according to the corrected parameter. |
| US09501698B2 |
Moving object detection method
When correction values are respectively determined for noise components of “OFFSET COMPONENT OF CCD ELEMENT”, “GRADATION COMPONENT OF BACKGROUND LIGHT” and “OFFSET COMPONENT OF OPTICAL SYSTEM”, the pixel values including as less of these noise components as possible are evaluated. The evaluated pixel values include a noise component of “THERMAL NOISE PLUS READOUT NOISE COMPONENT” which is superposed onto the pixel values. With this taken into consideration, a moving object detection method of an embodiment photographs multiple images of a moving object being an observation object with a photographic area fixed, selects the smallest pixel value in each group of corresponding pixels across the images from image signals representing the images, evaluates image signals including as less of the four noise components as possible by using the smallest pixel value as the correction value for the four noise components. |
| US09501697B2 |
Method for the authentication and/or identification of a security item
A method for authenticating and/or identifying a security article that includes a transparent or translucent substrate and, on a side of a first face of the substrate, a first image. The method includes superimposing at least partially the first image of the article with a second image. The second image may be produced by an electronic imager. The second image may be situated on the side of a second face of the substrate that is opposite to the first face. The method permits observation of an authentication and/or identification information item of the security article during a change of the angle of observation of the first and second superimposed images. |
| US09501695B2 |
Extracting card data from multiple cards
Extracting financial card information with relaxed alignment comprises a method to receive an image of a card, determine one or more edge finder zones in locations of the image, and identify lines in the one or more edge finder zones. The method further identifies one or more quadrilaterals formed by intersections of extrapolations of the identified lines, determines an aspect ratio of the one or more quadrilateral, and compares the determined aspect ratios of the quadrilateral to an expected aspect ratio. The method then identifies a quadrilateral that matches the expected aspect ratio and performs an optical character recognition algorithm on the rectified model. A similar method is performed on multiple cards in an image. The results of the analysis of each of the cards are compared to improve accuracy of the data. |
| US09501691B2 |
Method and apparatus for detecting blink
A method and an apparatus for detecting blink are provided. After obtaining an eye image sequence of a user, a currently analyzed image and a previously captured image are obtained from the eye image sequence and reflective regions of the currently analyzed image and the previously captured image are filtered, wherein the brightness values of pixels included in the reflective regions are higher than a brightness threshold. Difference pixel amount between the currently analyzed image and the previously captured image is calculated so as to determine whether the user blinks according to the difference pixel amount. |
| US09501690B2 |
Passive driver identification
A system for passive driver identification comprises an input interface and a processor. The input interface is configured to receive a collection of face data from a vehicle event recorder. The processor is configured to 1) determine a set of face data of the collection of face data that is associated with a trip; 2) determine a first album associated with the trip, wherein the set of face data associated with the trip is similar to face data of other trips in the first album, and wherein the set of face data associated with the trip is dissimilar to face data of a set of trips in a second album; and 3) assign an identifier that associates the trip to the first album. |
| US09501689B2 |
Image processing apparatus and image processing method
An image processing apparatus includes an image obtaining unit that obtains an image of a face, an edge enhancer that performs edge enhancement on the image and forms an edge-enhanced image, a binarizer that performs binarization on the edge-enhanced image and forms a binary image, and an area identifying unit that identifies an eyelash area in the image on the basis of the binary image. |
| US09501687B2 |
Predictive modeling relating molecular imaging modalities
Systems and methods are provided for generating a model relating parameters generated via a first molecular imaging modality to parameters generated via a second molecular imaging modality. First and second feature extractors extract, from images of a region of interest obtained via respective first and second molecular imaging modalities, respective sets of parameters for respective first and second sets of locations. A mapping component associates respective locations of the first and second sets of locations according to their spatial relationship within the region of interest to produce a training set. Each example in the training set comprises a set of parameters associated with a location in the first set of locations and a set of parameters associated with a location in the second set. A modeling component generates a predictive model relating the parameters associated with the first modality with at least one parameter associated with the second modality. |
| US09501684B1 |
Providing non-destructive editing reconciliation
Implementations generally relate to image editing. In some implementations, a method includes receiving an edited image, where the edited image includes an edit list and an image signature. The method further includes retrieving an original image based on the image signature. The method further includes applying the edit list to the original image to obtain a modified original image. The method further includes providing the modified original image to a user if the comparing of the edited image to the modified original image meets a similarity threshold. |
| US09501677B2 |
Data entry device with enhanced aiming
An improvement is made to a scanning device to increase item throughput at the point of sale (POS). The scanning device implements a mirror that allows a cashier to see hidden or obscured optical codes or bar codes on items. The mirror can reflect an aiming beam from a camera, which also allows the cashier to correctly scan the optical codes or bar codes. The mirror and camera can incorporate different properties to enable both the cashier and a customer to stand on opposite sides of the scanning device and scan items. |
| US09501674B2 |
Terminal for line-of-sight RFID tag reading
There is provided a terminal for use in determining which of one or more candidate RFID tags having unique data stored thereon is a target RFID tag within an area of the terminal. The terminal can comprise program instructions to direct an RFID reading device of the terminal to perform a number of reads of the one or more candidate RFID tags in response to determining that an object is present in the area, to calculate an accumulated RSSI of each of the one or more candidate RFID tags, and to determine the target RFID tag from a highest accumulated RSSI. In one embodiment, the unique data can be an EPC. There is also provided a terminal for use in converting an EPC into a decoded bar code. The terminal can comprise program instructions to transmit the decoded bar code to a computer such as an electronic cash register. |
| US09501673B2 |
Method and apparatus for transmitting a signal by a radio frequency identification reader
A Radio Frequency Identification (RFID) reader is provided that receives a digital input signal, converts the digital input signal to an analog input signal, and determines whether the digital input signal is an unmodulated signal or is modulated with information. When the digital input signal is modulated with information, the RFID reader filters the analog input signal to produce a filtered analog input signal and transmits the filtered signal. When the digital input signal is an unmodulated signal, the RFID reader bypasses the filtering of the analog input signal to produce an unfiltered analog input signal and transmits the unfiltered analog input signal. |
| US09501669B2 |
Method and apparatus for location-based recovery of stolen mobile devices
A method, apparatus, and system for locating mobile devices. The system includes a location-aware mobile device. The location-aware mobile device includes a location-aware mechanism embedded in a platform firmware layer of the location-aware mobile device. The system also includes a central database to receive location information from the location-aware mobile device over a network. If the location-aware mobile device has been stolen, lost, or misplaced, the central database reports the stolen, lost, or misplaced location-aware mobile device and its location to appropriate persons to enable the location-aware mobile device to be recovered. |
| US09501663B1 |
Systems and methods for videophone identity cloaking
A system, method, and computer-usable medium are disclosed for masking the identity of a human agent by transforming a live video transmission into a persona video transmission. A request is received from a user for a videoconference with a human agent. A persona is selected and associated with a human agent. The videoconference is then conducted, using data associated with the persona to transform the live video transmission of the human agent into a persona video transmission, which is correlated to the live video transmission. |
| US09501662B2 |
System and method for online data processing
Customer online data is collected via script on customer computers and is communicated to a server hosted by an organization, such as a card issuer. The customer online data communicated to the server is non-personally identifiable information (non-PII). In turn, the server aggregates the non-PII customer online data from the set of participating merchants. The server associates the received non-PII customer online data with non-PII demographic data. Other non-PII transaction data, such as previous transactions processed at a card issuer, also can be associated with the non-PII customer online data and non-PII demographic data. These associations are, in turn, used to create reports and to provide services to help merchants or other requesting organizations develop online strategies to drive click thru and conversion rates. |
| US09501660B2 |
Privacy protection for a life-log system
Technologies are generally described for privacy protection for a life-log system. In some examples, a method performed under control of a life-log system may include receiving, from a user account, a request to change one or more real life-log data entries relating to a real event that are stored in a first part of a database; removing the one or more real life-log data entries relating to the real event from the first part of the database; and storing, in the first part of the database, one or more misleading life-log data entries relating to a false event corresponding to the real event. |
| US09501657B2 |
Sensitive data protection during user interface automation testing systems and methods
There is provided systems and method for sensitive data protection during user interface automation testing. A user may transmit sensitive data to the test website framework, where the sensitive data is encrypted as a data key. The encrypted data key is set by an administrator of the test website and given to the user. The user may enter the key, where the test website framework application utilizes a conversion kit to decrypt the encrypted data key for use in the website user interface automation test. However, the encrypted data key is pulled into a version control system and/or viewed in test results so that the sensitive data remains hidden from view. In various embodiments, the encrypted data key may be entered into a web element, such as a password field, where the password field displays only the encrypted data key during test results. |
| US09501656B2 |
Mapping global policy for resource management to machines
A global policy is applied to only select resources (e.g., certain file folders) based on property settings associated as metadata with those resources. The resource property settings correspond to a defined property set (e.g., a global taxonomy) that is consistent with the global policy. When global policy is received, the property metadata for each resource determines whether to apply the global policy to that resource. In this way, a central administrator may provide the defined property set, a policy author may provide the policy, and a local administrator may set the resource property settings. |
| US09501652B2 |
Validating sensitive data from an application processor to modem processor
An electronic circuit 120 includes a more-secure processor (600) having hardware based security (138) for storing data. A less-secure processor (200) eventually utilizes the data. By a data transfer request-response arrangement (2010, 2050, 2070, 2090) between the more-secure processor (600) and the less-secure processor (200), the more-secure processor (600) confers greater security of the data on the less-secure processor (200). A manufacturing process makes a handheld device (110) having a storage space (222), a less-secure processor (200) for executing modem software and a more-secure processor (600) having a protected application (2090) and a secure storage (2210). A manufacturing process involves generating a per-device private key and public key pair, storing the private key in a secure storage (2210) where it can be accessed by the protected application (2090), combining the public key with the modem software to produce a combined software, signing the combined software; and storing the signed combined software into the storage space (222). Other processes of manufacture, processes of operation, circuits, devices, wireless and wireline communications products, wireless handsets and systems are disclosed and claimed. |
| US09501647B2 |
Calculating and benchmarking an entity's cybersecurity risk score
Determining an entity's cybersecurity risk and benchmarking that risk includes non-intrusively collecting one or more types of data associated with an entity. Embodiments include calculating a security score for at least one of the one or more types of data based, at least in part, on processing of security information extracted from the at least one type of data, wherein the security information is indicative of a level of cybersecurity. Some embodiments also comprise assigning a weight to the calculated security score based on a correlation between the extracted security information and an overall security risk determined from analysis of one or more previously-breached entities in the same industry as the entity. Embodiments include calculating an overall cybersecurity risk score for the entity based, at least in part, on the calculated security score and the weight assigned to the calculated security score. |
| US09501644B2 |
Malware protection
According to a first aspect of the present invention there is provided a method of protecting a computer system from malware, which malware attempts to prevent detection or analysis when executed in an emulated computer system. The method comprises determining if an executable file should be identified as being legitimate and, if not, executing the executable file while providing indications to the executable file that it is being executed within an emulated computer system. |
| US09501637B2 |
Hardware shadow stack support for legacy guests
Technologies for shadow stack support for legacy guests include a computing device having a processor with shadow stack support. During execution of a call instruction, the processor determines whether a legacy stack pointer is within bounds and generates a virtual machine exit if the legacy stack pointer is out-of-bounds. If not out-of-bounds, the processor pushes a return address onto the legacy stack and onto a shadow stack protected by a hypervisor. During execution of a return instruction, the processor determines whether top return addresses of the legacy stack and the shadow stack match, and generates a virtual machine exit if the return addresses do not match. If the return addresses match, the processor pops the return addresses off of the legacy stack and off of the shadow stack. The stack out-of-bounds and the stack mismatch virtual machine exits may be handled by the hypervisor. Other embodiments are described and claimed. |
| US09501634B2 |
Efficient browser-based identity management providing personal control and anonymity
A system allows a reliable and efficient identity management that can, with full interoperability, accommodate to various requirements of participants. For that a system is presented for providing an identity-related information about a user to a requesting entity. The method includes a location-request step initiated by the requesting entity for requesting from a client application a location information that corresponds to a location entity possessing the identity-related information, a redirecting step for connecting the client application to the location entity in order to instruct the location entity to transfer the identity-related information to the requesting entity, and an acquiring step for obtaining the identity-related information. The acquiring step includes a contact step wherein the location entity contacts the requesting entity, a request step wherein the requesting entity requests the identity-related information, and a response step wherein the requesting entity receives the identity-related information from the location entity. |
| US09501633B2 |
Information processing device, information processing method, and computer program
An information processing device includes a display that displays an input screen including a plurality of images, an image selecting section that selects at least one image within the input screen in accordance with an input operation from a user, and a controller that controls the information processing device on a basis of the image selected by the image selecting section. |
| US09501632B2 |
Visual authentication to a computing device
For visually authenticating to a computing device, a method is disclosed that includes receiving an authentication request at a computing device, displaying a dynamic visual signal in response to the authentication request, wherein the visual signal suggests an authentication token. The method also includes receiving the authentication token in response to displaying the dynamic visual signal, and determining if the authentication token satisfies authentication requirements at the computing device. |
| US09501630B2 |
Method for generating a human likeness score
One embodiment of the invention is a method utilizing a CAPTCHA to generate a human likeness score including blocks: a) receiving a user solution to the CAPTCHA; b) receiving a user interaction pattern descriptive of an interaction undertaken by the user, through a graphical interface of the CAPTCHA, to achieve the user solution; c) determining the accuracy of the user solution; d) comparing the user interaction pattern against an interaction model generated from interaction patterns of previous users; e) calculating the human likeness score based upon the determination of block c) and the comparison of block d), wherein the human likeness score lies within a continuum of human likeness scores. |
| US09501629B2 |
Transparent reconnection
In the event of an unintentional interruption, a token issued by a host system to a client system is used to reestablish communications without disrupting applications on the client system. If the host system provided an Internet Protocol address to the client system to be used during the interrupted communications session, the host system reserves the communications address during an interruption in communications for a period sufficient to permit reestablishment of communications using the reserved address. |
| US09501628B2 |
Generating a distrubition package having an access control execution program for implementing an access control mechanism and loading unit for a client
A data distribution system, method and program for generating a distribution package for distribution data to a client. An environment of a requesting client requesting distribution data is detected. A determination is made of an access control execution program for implementing an access control mechanism and a loading unit on the requesting client. The access control execution program is adapted to the detected environment of the requesting client and control access to a resource from a process in the client. The loading unit loads the distribution data to a protected storage area of the client. A determination is made of a security policy specified for the distribution data. A distribution package is generated including the distribution data, the security policy, the loading unit, and the access control execution program adapted to the environment of the requesting client; and transmitting the generated distribution package to the requesting client. |
| US09501627B2 |
System and method of providing dynamic and customizable medical examination forms
A system and method of providing dynamic and customizable medical forms is disclosed. In certain specific embodiments, these dynamic and customizable medical forms may be automatically presented to users based on a predefined series of rules which allow multiple users having different roles in the clinical process to collaborate and contribute to a medical examination report, while at the same time maintaining an independent record of what was contributed and by whom it was contributed. |
| US09501623B2 |
Prescription verification system
An apparatus for permitting a pharmacist to verify a refill of a filled prescription stored on a host system. A prescription refill screen is provided by the host system to a pharmacy system associated with the pharmacist. The prescription refill screen is associated with the filled prescription. Refill request information is received from the pharmacy system. The refill request information identifying a requested refill of the filled prescription. The refill request information is transmitted through the host system to a health care provider system associated with a health care provider identified by the filled prescription stored on the host system. The host system receives an authorization from the health care provider system authorizing the requested refill of the filled prescription. The host system transmits authorization to the pharmacy system whereby the pharmacist associated with the pharmacy system is authorized to provide the refill of the filled prescription to the patient. |
| US09501622B2 |
Methods and systems for predicting sensitivity of blood flow calculations to changes in anatomical geometry
Embodiments include methods and systems and for determining a sensitivity of a patient's blood flow characteristic to anatomical or geometrical uncertainty. For each of one or more of individuals, a sensitivity of a blood flow characteristic may be obtained for one or more uncertain parameters. An algorithm may be trained based on the sensitivities of the blood flow characteristic and one or more of the uncertain parameters for each of the plurality of individuals. A geometric model, a blood flow characteristic, and one or more of the uncertain parameters of at least part of the patient's vascular system may be obtained for a patient. The sensitivity of the patient's blood flow characteristic to one or more of the uncertain parameters may be calculated by executing the algorithm on the blood flow characteristic of at least part of the patient's vascular system, and one or more of the uncertain parameters. |
| US09501620B2 |
Quantification of blood volume flow rates from dynamic angiography data
Systems and methods are disclosed for quantifying absolute blood volume flow rates by fitting a kinetic model incorporating blood volume, bolus dispersion and signal attenuation to dynamic angiographic data. A self-calibration method is described for both 2D and 3D data sets to convert the relative blood volume parameter into absolute units. The parameter values are then used to simulate the signal arising from a very short bolus, in the absence of signal attenuation, which can be readily encompassed within a vessel mask of interest. The volume flow rate can then be determined by calculating the blood volume within the vessel mask and dividing by the simulated bolus duration. This method is exemplified using non-contrast magnetic resonance imaging data from a flow phantom and the cerebral arteries of healthy volunteers and a patient with Moya-Moya disease acquired using a 2D vessel-encoded pseudo-continuous arterial spin labeling pulse sequence. This allows flow quantification in downstream vessels from each brain-feeding artery separately. The systems and methods can be of use in patients with a variety of cerebrovascular diseases, such as the assessment of collateral flow in patients with steno-occlusive disease or the evaluation of arteriovenous malformations. |
| US09501619B2 |
Integrated medication and infusion monitoring system
A System manages IV pumps so that clinicians automatically receive alerts, decisions, and actions required to maintain a patient IV medication therapy according to a prescribed treatment protocol. An infusion pump monitoring system, includes an acquisition processor for acquiring fluid infusion parameters comprising a patient identifier, infusion fluid identifier and a rate of fluid infusion, for administration of an infusion fluid to a patient at a point of care using an infusion pump. The system also includes a repository of patient medical record information. A fluid infusion monitor uses acquired fluid infusion parameters for automatically searching a patient medical record in the repository for information concerning rate of fluid infusion of a particular infusion fluid and determining if a rate of a previously administered dose of the particular infusion fluid was lower than a rate indicated in the fluid infusion parameters. An interface processor automatically initiates generation of a message indicating a potential adverse reaction to the particular infusion fluid in response to a determination of a lower rate being employed for previously administering the particular infusion fluid. |
| US09501617B1 |
Selective display of medical images
Systems and methods that allow transfer criteria to be defined based on one or more of several attributes, such as a particular user, site, or device, as well as whether individual images and/or image series are classified as thin slices, and applied to medical images in order to determine which images are downloaded, viewed, stored, and/or any number of other actions that might be performed with respect to particular images. |
| US09501616B2 |
Processing of digital data, in particular medical data by a virtual machine
The present invention relates to a virtual machine (VM) for processing digital data (MD), in particular medical data by executing a digital data processing application program, in particular a medical data application program called MeDPAP, the virtual machine (VM) being a simulation of a computer, the virtual machine comprising at least the following components: • a MeDPAP controller (MC) which is constituted —so that it can be addressed by a Uniform Resource Identifier called VM-URI via a wide area network (WAN), —to support direct interoperable interaction with a client application (MCA) over the wide area network (WAN), —to assign a Uniform Resource Identifier called MeDPAP-URI to the MeDPAP, and —to send the assigned MeDPAP-URI to the client application via the wide area network (WAN); and • the MeDPAP which is constituted —to process the digital data (MD), —so that it can be addressed by the client application via the wide area network (WAN) by using the MeDPAP-URI, and —to support direct interaction with the client application over the wide area network for receiving instructions from the client application (MCA) to process the digital data. |
| US09501615B2 |
System and method for management of drug labeling information
A system for managing drug labeling information includes a repository comprising a network accessible database, the repository having an upload portion and a download portion, the repository being accessible to a plurality of users via client computers coupled to a wide area network. The repository includes drug labeling information on a plurality of drugs stored therein. The upload portion of the repository is accessible by a first set of users while the download portion of the repository is accessible by a second set of users. In one preferred aspect of the invention, drug manufactures are able to upload new or revised PDF files containing drug labeling information. The new or revised PDF files are then available for download by pharmacists or other authorized users. |
| US09501609B1 |
Selection of corners and/or margins using statistical static timing analysis of an integrated circuit
Examples of techniques for statistical static timing analysis of an integrated circuit are disclosed. In one example according to aspects of the present disclosure, a computer-implemented method is provided. The method comprises performing an initial statistical static timing analysis of the integrated circuit to create a parameterized model of the integrated circuit for a plurality of paths using a plurality of timing corners to calculate a timing value for each of the plurality of paths, each of the plurality of timing corners representing a set of timing performance parameters. The method further comprises determining at least one worst timing corner from the parameterized model for each of the plurality of paths based on the initial statistical static timing analysis and calculated timing value for each of the plurality of paths. The method also comprises performing a subsequent analysis of the integrated circuit using the at least one worst timing corner. |
| US09501608B1 |
Timing analysis of circuits using sub-circuit timing models
Examples of techniques for analyzing and generating timing reports for circuits are described herein. A computer-implemented method includes splitting a netlist or cross section of a circuit into sub-circuits. The method further includes building a timing graph by combining generated timing models of the sub-circuits. The method includes determining a full set of dependencies based on each sub-circuit's dependent configuration parameters. The method also further includes generating a sample plan for each sub-circuit. The method includes receiving results from a simulation for each sub-circuit based on the sample plan for each sub-circuit. The method includes generating algebraic forms for an early delay, a late delay, and a slew by curve fitting across the configuration parameters. The method includes propagating arrival times and slew in algebraic forms throughout the timing graph. The method includes evaluating checks based on selected projections from the timing graph to find a worst slack configuration. |
| US09501606B2 |
Identifying the cause of timing failure of an IC design using sequential timing
A method of optimizing timing performance of an IC design is provided. The IC design is expressed as a graph that includes a plurality of nodes representing IC components. The method identifies several paths in the graph that each starts from a timed source node and ends to a timed target node. Each path includes several clocked elements and several computational elements. The method optimizes the timing performance of the IC design by skewing clock signals to one or more clocked elements to satisfy a set of timing constraints. For each identified path, the method determines the ratio of signal travel time from the source node to the destination node to a maximum time allocated for the data signal to travel from the source node to the target node. When the IC design fails timing constraints, the path that has a maximum determined ratio as a cause for timing failure. |
| US09501605B1 |
Auto-constraint chip-level routing
This application relates to a method of routing circuit paths of an integrated circuit, IC. The IC comprises a plurality of circuit elements and a plurality of circuit paths connecting the circuit elements. The method comprises steps of: receiving a representation of the IC, comparing, based on the representation, the circuit elements of the IC against a set of reference circuit elements, classifying the circuit paths of the IC into a plurality of categories based on a result of the comparison, and routing the circuit paths of the IC in accordance with their respective categories. The application further relates to a computer-readable storage medium comprising a computer program that makes a computer perform the steps of said method when executed and to an apparatus for routing circuit paths of an IC. |
| US09501593B2 |
Semiconductor device design method, system and computer program product
A semiconductor device design method includes generating a layout of a semiconductor device based on schematic data. The layout includes location data for at least one electrical component. The method includes receiving first voltage data associated with at least one electrical component. The method includes receiving second voltage data based on simulation results for the semiconductor device. The method includes incorporating, based on the location data of the at least one electrical component, the first voltage data or the second voltage data in the layout to generate a modified layout. The first voltage data or the second voltage data being incorporated in at least one marker layer of the modified layout. The method includes performing a voltage-dependent design rule check (VDRC) on the modified layout. The VDRC analyzes spacing rules associated with the at least one electrical component based on the first voltage data or the second voltage data. |
| US09501590B1 |
Systems and methods for testing integrated circuit designs
A CoDec in a design for test integrated circuit. In embodiments described herein, portions of the CoDec are distributed over the area of the IC. In particular, both the compressor and the decompressor may be distributed over the IC. To this end, XOR gates are located locally to the scan chains over the area of the chip to reduce wire length back to the input/output test pins. The compressor and decompressor may be distributed in a 2-dimensional grid. The compressor may XOR each scan chain in two different directions such that a fault may be resolved back to a specific region of the IC. |
| US09501589B2 |
Identification of power sensitive scan cells
Aspects of the disclosed techniques relate to techniques for identifying power sensitive scan cells. Signal probability values for signal lines in a circuit design are first computed, wherein the signal lines comprise signal lines associated with scan cells in the circuit design. Toggling probability values are then computed based on the signal probability values, wherein the toggling probability values comprise toggling rate values for the scan cells. Toggling rate reduction values are then computed based on the toggling probability values, wherein the toggling rate reduction values comprise toggling rate reduction values for the scan cells. Finally, scan cells having high toggling rate reduction values are identified. |
| US09501585B1 |
Methods and system for providing real-time business intelligence using search-based analytics engine
The methods and systems for providing real-time business intelligence using search-based analytics engine facilitate a user to input a natural language query with regard to business analytics and obtain an analytics report in response without the user aggregating or processing raw data from a database query. Such business intelligence platform may receive a data analytics request including a user-desired data variable via a user interface; receive, via the user interface, user-configured parameters identifying a user-selected data source and a user-defined data set; form the user-defined data set based on user-configured parameters; query the user-defined data set to obtain a query result of the user-desired data variable; and generate a user interactive graphical representation of the query result of user-desired data variable. |
| US09501584B2 |
Apparatus and method for distributing a search key in a ternary memory array
Separate key processing units generate different search keys based off of a single master key received at a ternary memory array chip. A reference search key and selection logic are provided to reduce power dissipation in a global search key bus across the chip. The reference search key is the output of one of the key processing units and its bytes are compared with the output from each of the other key processing units. A select signal from each unit indicates which bytes match. Each matching byte at each key processing unit is blocked from changing corresponding bit line logic values across the chip, reducing the number of voltage switches occurring in the global search key bus. The select signal causes a selection module local to each superblock to select the matching byte(s) from the reference search key and non-matching byte(s) from the global search key bus to reconstitute the entire search key. |
| US09501581B2 |
Method and apparatus for webpage reading based on mobile terminal
A webpage reading method based on a mobile terminal is provided. The method includes: based on an input web address, loading current webpage contents corresponding to the web address from a webpage server and displaying the loaded webpage contents; when loading the current webpage contents, detecting whether a pre-reading keyword is included in an HTML file or DOM; when the pre-reading keyword exists, determining whether a percentage of the displayed contents with respect to entire current webpage contents reaches or exceeds a pre-set threshold value; when the percentage reaches or exceeds the pre-set threshold value, pre-reading and caching the next webpage contents based on a web address associated with the pre-reading keyword; and when a pre-set condition of displaying next webpage contents is satisfied, displaying the next webpage contents. The method pre-reads the next webpage contents before all current webpage contents are displayed and displays promptly the next webpage contents after a user finishes reading the current webpage contents, thereby reducing the time spent in waiting for reading the next webpage contents so as to improve the reading experience of the user. |
| US09501577B2 |
Recommending points of interests in a region
Techniques for searching and providing geographical regions are described. The process searches and recommends points of interests based on a user-specified region. Points of interests include spatial objects (e.g., buildings, landmarks, rivers, parks) and their distributions in a geographical region. The process searches and recommends points of interests by partitioning a spatial map into grids to identify representative categories located in each of the grids. In response to the user-specified region, a set of geographical candidates containing the representative categories is retrieved. The process determines whether the user-specified region and the set of geographical candidates include similar or common representative categories and similar or common spatial distributions of the representative categories. Then the process provides the top ranked set of geographical candidates that have similar content information. |
| US09501576B2 |
Identification of content by metadata
Systems and methods for identifying content in electronic messages are provided. An electronic message may include certain content. The content is detected and analyzed to identify any metadata. The metadata may include a numerical signature characterizing the content. A thumbprint is generated based on the numerical signature. The thumbprint may then be compared to thumbprints of previously received messages. The comparison allows for classification of the electronic message as spam or not spam. |
| US09501573B2 |
Electronic personal companion
Personal companions crowd-source and/or crowd-share characterizations, and optionally raw data, from real-world, virtual and/or mixed-reality experiences. Characterizations can advantageously be stored in one or more self-evolving, structured databases, and can be organized according to objects, actions, events and thoughts. Characterizations can be weighted differently for different users, and “forgotten” over time, especially in favor of maintaining higher level characterizations. Personal companions can be used to obtain additional information, and conduct interpersonal, commercial, or other interactions or transactions. |
| US09501571B1 |
Category generalization for search queries
A system and computer-implemented method are provided for associating categories with business names for generalizing search queries, the method including identifying one or more businesses within a first geographic region, determining a business name and one or more categories for each of the one or more businesses, generating one or more name components for each of the one or more businesses from the name of the business, generating one or more name component groups from the name components of the one or more businesses, each name component group including one or more identical name components, determining for each name component group, if the one or more name components within the name component group are associated with businesses that share one or more common categories and associating the one or more common categories with the name component of the name component group. |
| US09501570B2 |
Dynamic routing system
A computing system may comprise a processor and a memory having a routing program, the processor being configured to receive a first request having a data record with a unique subscriber identifier, extract the unique subscriber identifier from the first request, and compare a tag of a database table with the unique subscriber identifier. If the tag does not match the unique subscriber identifier, the processor may be configured to process the first request as part of a general test environment. If the tag matches the unique subscriber identifier, the processor may be configured to route the first request to a live test environment associated with the tag. |
| US09501568B2 |
Audio matching based on harmonogram
In an example context of identifying live audio, an audio processor machine accesses audio data that represents a query sound and creates a spectrogram from the audio data. Each segment of the spectrogram represents a different time slice in the query sound. For each time slice, the audio processor machine determines one or more dominant frequencies and an aggregate energy value that represents a combination of all the energy for that dominant frequency and its harmonics. The machine creates a harmonogram by representing these aggregate energy values at these dominant frequencies in each time slice. The harmonogram thus may represent the strongest harmonic components within the query sound. The machine can identify the query sound by comparing its harmonogram to other harmonograms of other sounds and may respond to a user's submission of the query sound by providing an identifier of the query sound to the user. |
| US09501565B1 |
Knowledge-based editor with natural language interface
A computer-implemented method for knowledge based ontology editing, is provided. The method receives a language instance to update a knowledge base, using a computer. The method semantically parses the language instance to detect an ontology for editing. The method maps one or more nodes for the ontology for editing based on an ontology database and the knowledge base. The method determines whether the mapped nodes are defined or undefined within the knowledge base. The method calculates a first confidence score based on a number of the defined and undefined mapped nodes. Furthermore, the method updates the knowledge base when the first confidence score meets a pre-defined threshold. |
| US09501562B2 |
Identification of complementary data objects
In one aspect, the description relates to identifying complementary data objects, including providing a plurality of data objects, applying a clustering algorithm for grouping at least some of the data objects into two or more clusters, for each of the clusters, calculating a cluster center, calculating, for at least a first one of the cluster centers, a complementary cluster center, determining a second cluster center of a second cluster, the second cluster center being determined as the one of the cluster centers having the smallest distance in respect to the complementary cluster center, selecting at least one data object of the determined second cluster. Other features and aspects may be realized, depending upon the particular application. |
| US09501560B2 |
Systems and methods for identifying and visualizing elements of query results
The systems and methods described herein generally relate to increasing user productivity in reviewing query results by visually depicting the presence/absence of a set of query terms in a set of paragraphs across a set of documents. |
| US09501559B2 |
User-guided search query expansion
A device may receive information that identifies a search query to be used to search a text. The device may provide information that identifies multiple search query expansion techniques for expanding the search query. The device may receive a selection of one or more search query expansion techniques, of the multiple search query expansion techniques, to be performed to expand the search query. The device may perform the one or more search query expansion techniques to generate a set of expanded search queries based on the search query and the text. The device may search the text, using the set of expanded search queries, to identify multiple sections of the text that include an expanded search query included in the set of expanded search queries. The device may provide search results that identify the multiple sections of the text based on searching the text. |
| US09501556B2 |
Importing metadata into metadata builder
First metadata for a first version of a computer program product and a first metadata schema is converted into second metadata for a second version of the computer program product and/or a second metadata schema. The converting may be performed by recursively processing an object class structure representing the second metadata, to construct objects and their contents pursuant to a set of ID references for the second metadata. The recursive processing may be performed by repeatedly calling methods of an object in the object class structure to populate the content of the object using the set of ID references. The repeatedly calling may be performed using object reflection. Related methods, systems and computer programs are described. |
| US09501555B2 |
Real-time data management for a power grid
A real-time data management system, a system, method, apparatus and tangible computer readable medium for accessing data in a power grid are described for controlling a transmission delay of real-time data delivered via a real-time bus, and for delivering real-time data in a power grid. A unified data model covering various organizations and various data resource is described. Further, a management scheme for clustered data is described to provide a transparent and high speed data access. The solutions described may efficiently manage the high volume of real-time data and events, provide data transmission with a low latency, provide flexible extension of both the number of data clusters and the number of databases to ensure high volume data storage, and achieve a high speed and transparent data access. Additionally, rapid design and development of analytical applications, and the near real-time enterprise decision-making business may be enabled. |
| US09501554B2 |
Image processing system, image processing method, and image processing program
An image processing system according to one embodiment includes a feature quantity calculation unit, a classification unit, a score calculation unit, and an output unit. The feature quantity calculation unit calculates a feature quantity for each of a plurality of candidate regions extracted as a candidate for a text region from a plurality of original sample images. The plurality of original sample images include one or more text images containing a text region and one or more non-text images not containing a text region. The classification unit classifies the plurality of candidate regions into a plurality of categories based on the feature quantity. The score calculation unit calculates, for each category, a score indicating a frequency of appearance of the candidate region to which an annotation indicating extraction from the text image is added. The output unit outputs the score of each category as category information. |
| US09501553B1 |
Organization categorization system and method
An organization categorization system and method is disclosed. The organization categorization system and method relies on server data to discover which business organizations are consuming the finite resources of the server and in what proportions. Organizations are categorized according to their consumption of resources. The categorization system and method further ascribes a relative business value to each organization to facilitate the allocation of resources among the various organizations in a business. In an example embodiment, users of the server resources use the SAS programming language and the server resources execute SAS applications that support the SAS programming language. The organization categorization system and method connects an executed computer program to a business-defined classification of applicability to purpose. The system and method employs a double level of abstraction to link specific programming styles, first to a general solution case, and then to link the general solution idiomatically to the business case. |
| US09501551B1 |
Automatic item categorizer
A categorization service is described that automatically categorizes items of interest to a user. The user may possess an item that they wish to offer for sale using the network-based service. The user may prepare an electronic description of the item and submit this item information to a categorization service for categorization. Upon receipt, the categorization service may compare the item information to item category descriptions representing item categories of the network-based server in order to determine category recommendations for the item of interest. The recommended categories are returned to the user to enable the user to assign a category, selected from the category recommendations, to the item of interest. |
| US09501549B1 |
Scoring criteria for a content item
Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for scoring criteria for content items. In one aspect, a method includes identifying a primary ranking signal and a set of auxiliary ranking signals for ranking a set of criteria for a content item. A primary score and a set of auxiliary scores can be identified for each particular criterion in the set of criteria. Each auxiliary score can be adjusted to generate adjusted auxiliary scores. The adjusting can include applying, to at least a portion of the auxiliary scores, a transformation function that reduces an amount of skewness among the auxiliary scores. A ranking score can be determined for each particular criterion based on a function of the primary score for the particular criterion and the adjusted auxiliary scores. |
| US09501548B2 |
Data updating method, system and device
A data updating method is provided, which includes generating Managed Object Instances (MOIs) and an operation identifier of each MOI according to a management operation needed to be performed on an Network Element (NE) device; selecting MOIs in an association relation from the generated MOIs; generating a dynamic MOI and an operation identifier of the dynamic MOI according to the selected MOIs, the dynamic MOI including attribute values corresponding to the operation identifiers of the selected MOIs and the operation identifier of the dynamic MOI including the operation identifiers of the selected MOIs; transmitting the dynamic MOI and the operation identifier of the dynamic MOI to the NE device; and the NE device searches a Managed Object (MO) tree for an MOI node matched with the attribute values of the dynamic MOI after receiving the dynamic MOI and the operation identifier of the dynamic MOI, and updates the matched MOI node according to the operation identifier of the dynamic MOI. A data synchronization system and an NE device are also provided. |
| US09501545B2 |
System and method for caching hashes for co-located data in a deduplication data store
Systems and methods are provided for caching hashes for deduplicated data. A request to read data from the deduplication data store is received. A persist header stored in a deduplication data store is identified in a first hash structure that is not stored in memory of the computing device. The persist header comprises a set of hashes that includes a hash that is indicative of the data the computing device requested to read. Each hash in the set of hashes represents data stored in the deduplication data store after the persist header that is co-located with other data represented by the remaining hashes in the set of hashes. The set of hashes is cached in a second hash structure stored in the memory, whereby the computing device can identify the additional data using the second hash structure if the additional data is represented by the persist header. |
| US09501544B1 |
Federated backup of cluster shared volumes
A method, system, article of manufacture, and apparatus for creating backups of workloads in a clustered environment is discussed. In some embodiments, each node in the environment may sequentially back up its active workloads. The nodes may take data snapshots of a cluster shared volume, and thereafter extract the necessary workload data. The process may be controlled from a master node or an external server. |
| US09501537B2 |
Parallel display of multiple query results
A computer program product tangibly embodied on a computer-readable medium includes executable code that, when executed, causes at least one computer system hosting a computer application to provide a memory to store results of multiple queries processed by the computer application and a feeder component in a front end display logic layer of the computer application. The feeder component is configured to read the results of the multiple queries stored in the memory asynchronously and to supply the results of the multiple queries in parallel to respective query result display entities in a user interface of the computer application. |
| US09501533B2 |
Private queue for a media playback system
Embodiments are discussed for providing private playback queues in a media playback system such that users without access rights to the playback queue may not access the contents of the playback queue. The embodiments may involve receiving at a playback device of a network media system a playlist responsive to an instruction via a first controller interface, adding the playlist to a playback queue associated with the zone, receiving a request from a second controller interface for the information identifying the one or more items in the playback queue, determining that the second controller interface lacks a credential to receive the information identifying the one or more items in the playback queue, and providing the information identifying a subset of the one or more items in the playback queue to the second controller interface. |
| US09501518B2 |
Systems and methods for interval control element chain architecture
This disclosure relates to improving the efficiency and quality of real-time extracting, transforming, and/or loading data using customer information control system (CICS) interval control element (ICE) chain processing. |
| US09501515B2 |
Data governance manager for master data management hubs
Improved data governance solutions to enterprise-level master data storage hubs are provided by implementing data governance functionality with regard to a master data hub. Data governance functionality is provided by providing visibility into the data quality the data of an enterprise. |
| US09501513B2 |
Advanced concurrency management in enterprise service oriented architecture based integrated business processing of distributed application components
A system and process that manages access to a resource in an enterprise service-oriented architecture environment. The system recognizes a master for each resource that has ultimate control over the respective resource. The master grants access to the resource though a lock system. If a system does not relinquish access to the resource, then the master is able to reclaim the lock to ensure the continued availability of the resource to all systems. This system ensures data coherency, while also improving performance by diminishing the amount of time a resource is unnecessarily locked and the time to obtain a lock. |
| US09501512B2 |
Optimizing storage in a publish / subscribe environment
Creating message files in a publication subscription computer system by: (i) receiving data corresponding to a first message; (ii) receiving a list of subscribers that subscribe to a topic of the first message; and (iii) creating a digital data file that includes a payload data and a consumption metadata. The payload data includes content data corresponding to the first message. The consumption metadata includes data relating to whether one or more subscribers of the list of subscribers will potentially consume the first message at a later period in time from the time of receiving the content data corresponding to the first message. |
| US09501510B1 |
Systems and methods for facilitating flip-resistant media fingerprinting
Systems and methods for facilitating media fingerprinting are provided. In one aspect, a system can include: a memory, a microprocessor, a communication component that receives media; and a media fingerprinting component that fingerprints the media. The media fingerprinting component employs a fingerprint generation component stored in the memory and includes: a first hash generation component that generates sets of hashes corresponding to versions of the media; and a second hash generation component that computes a final hash based, at least, on hashing the sets of hashes. In some aspects, the media fingerprinting component can generate a flip-resistant fingerprint based, at least, on the final hash. In some aspects, the flip-resistant fingerprint is the final hash. |
| US09501506B1 |
Indexing system
A hybrid-sharded index includes document-sharded posting lists and term-sharded posting lists. Implementations include systems and methods for updating a hybrid-sharded index. For example, a method may include receiving updates to the hybrid-sharded index and generating, at a first leaf node, replacement posting lists and change information for a respective second leaf node. The method may also include dividing the replacement posting lists into portions, a portion having associated change information and being associated with a respective one of the second leaf nodes and sending the portions to respective leaf nodes. At a particular leaf node of the second leaf nodes, the method includes merging a received portion into an updated posing list portion, swapping the updated posting list portion into memory. During the swap, the change information and the updated posting list portion are used to respond to a query with an older version of the hybrid-sharded index. |
| US09501504B2 |
Automatic detection of potential data quality problems
Technical solutions for detection potential data quality problems are provided. In some implementations, a method includes: automatically without human intervention, identifying a subset of side effect data associated with a set of enterprise data. The side effect data include a plurality of data fields. The method further includes: selecting a first set of data quality detection rules in accordance with a first data field in the plurality of data fields; identifying one or more candidate data quality problems in the set of side effect data by comparing the set of side effect data to the first set of data quality detection rules; and responsive to identifying the one or more candidate data quality problems: causing to be displayed to a user: information representing the one or more candidate data quality problems; and one or more candidate solutions for correcting the one or more candidate data quality problems. |
| US09501501B2 |
Log record management
A database system may maintain a plurality of log records at a distributed storage system. Each of the plurality of log records may be associated with a respective change to a data page. The plurality of log records may be transformed (e.g., cropped, prune, reduce, fused, deleted, merged, added, etc.). |
| US09501499B2 |
Methods and systems for creating image-based content based on text-based content
Systems and methods for creating image-based content based on text-based content. A data processing system receives a text-based content item based on which an image-based content item is to be created. The data processing system determines a context of the text-based content item based on the content of the text-based content item and the content of a landing page associated with the text-based content item. The data processing system determines one or more search terms from the determined context of the text-based content item. The data processing system then identifies from an image database, one or more candidate images that match at least one of the search terms determined from the context of the text-based content item. The data processing system then creates an image-based content item based on the text-based content item using at least one of the candidate images. |
| US09501498B2 |
Object ingestion through canonical shapes, systems and methods
An object recognition ingestion system is presented. The object ingestion system captures image data of objects, possibly in an uncontrolled setting. The image data is analyzed to determine if one or more a priori know canonical shape objects match the object represented in the image data. The canonical shape object also includes one or more reference PoVs indicating perspectives from which to analyze objects having the corresponding shape. An object ingestion engine combines the canonical shape object along with the image data to create a model of the object. The engine generates a desirable set of model PoVs from the reference PoVs, and then generates recognition descriptors from each of the model PoVs. The descriptors, image data, model PoVs, or other contextually relevant information are combined into key frame bundles having sufficient information to allow other computing devices to recognize the object at a later time. |
| US09501496B2 |
Note atlas
Presenting database items includes providing a plurality of clusters, where each of the clusters is formed by grouping database items according to location information associated therewith, creating a plurality of geographic elements based on the clusters, and presenting the geographic elements to a user using a note atlas that represents all of the geographic elements corresponding to a set of the database items, where indicators of corresponding clusters are provided with each of the geographic elements. A quantity of database items may be provided with each of the corresponding clusters. The note atlas may show at least two levels of detail corresponding to a world level of detail, a points of interest level of detail and a city level of detail. Points of interest may be determined by having a user provide points of interest on a map. |
| US09501495B2 |
Location metadata in a media file
This is directed to systems, methods and computer-readable media for media files having timed and untimed location metadata. For example, a media file can include timed location metadata stored in a metadata track of the media file, such that individual timed packets of location information are each associated with different portions of the recorded media. In some embodiments, the location metadata can include information describing the direction the device is facing and/or elevation/tilt of the device relative a horizontal plane (e.g. a plane perpendicular to a line between the device position and the center of the earth) and/or a motion of the device. |
| US09501492B2 |
Combination journaling/non-journaling file system
A method and system for a combined journaling and non-journaling file system is disclosed. In the present invention, data is stored on a first storage media using a first device in a format associated with a file system, wherein the file system is a non-journaling file system. Journal information associated with the file system is stored on a second storage media in the first device, wherein the journal information is distinct from the file system and the data is readable by other devices having a file system compatible with the file system. |
| US09501482B2 |
Download queue as part of user interface library view for on-demand content systems and methods
An exemplary method includes an on-demand content management system detecting a user request for a content library view and displaying, in response to the request, the content library view in a graphical user interface, the content library view including a list of entries graphically representing a plurality of on-demand content instances included in a library of on-demand content, the list of entries comprising a first set of one or more entries representing one or more on-demand content instances included in the library and in a download queue and a second set of one or more entries representing one or more other on-demand content instances included in the library but not in the download queue, wherein a position of the first set of entries is prioritized over a position of the second set of entries in the list of entries. Corresponding methods and systems are also disclosed. |
| US09501480B2 |
Revenue-generating electronic multi-media exchange and process of operating same
In a process for creating media content, media submissions are requested and electronically received from end users and stored in a computer database. The submissions are searched for material to be included in the media content, and cross-checked against the other submissions for originality and timeliness. After the material is selected from one or more submissions, the content is developed and released to an audience for review. The end users whose submission material was included in the released content are rewarded. In one embodiment, third parties are permitted to access and search the submissions on an open exchange. The third parties can bid for rights in submissions on the open exchange. After receiving these bids, they are forwarded to the particular submission's end user for acceptance or rejection. Appropriate billing and payment processes are used to bill and pay the parties involved. |
| US09501475B2 |
Scalable lookup-driven entity extraction from indexed document collections
A set of documents is filtered for entity extraction. A list of entity strings is received. A set of token sets that covers the entity strings in the list is determined. An inverted index generated on a first set of documents is queried using the set of token sets to determine a set of document identifiers for a subset of the documents in the first set. A second set of documents identified by the set of document identifiers is retrieved from the first set of documents. The second set of documents is filtered to include one or more documents of the second set that each includes a match with at least one entity string of the list of entity strings. Entity recognition may be performed on the filtered second set of documents. |
| US09501474B2 |
Enhanced use of tags when storing relationship information of enterprise objects
A computing system provided according to an aspect of the present invention stores tags associated with relationships specified among objects. The tags can then potentially be used to search for objects of interest. In an embodiment, a search request is received indicating a first object, a second object and a search tag. A response is provided containing a sequence of objects and a sequence of relationships connecting the first object with the second object, with each relationship having an associated tag matching the search tag. |
| US09501472B2 |
System and method for dual screen language translation
Generally, this disclosure provides systems and methods to facilitate real-time language translation between two speakers. A system may include an audio beamforming microphone configured to detect speech in a first language from a first speaker and to detect speech in a second language from a second speaker; a language translation module configured to translate the speech in the first language to text in the second language and to translate the speech in the second language to text in the first language; and a display element configured with a first display element side and a second display element side and further configured to display the text in the first language on the first display element side and to display the text in the second language on the second display element side. |
| US09501466B1 |
Address parsing system
A system for identifying address components includes a training address interface, a training address probability processor, a parsing address interface, and a processor. The training address interface is to receive training addresses. The training addresses are a set of components with corresponding identifiers. The training address probability processor is to determine probabilities of each component of the training addresses being associated with each identifier. The parsing address interface to receive an address for parsing. The processor is to determine a matching model of a set of models based at least in part on a matching probability for each model for a tokenized address, which is based on the address for parsing, and associate each component of the tokenized address with an identifier based at least in part on the matching model. |
| US09501465B2 |
Use of templates as message pruning schemas
A system, method, and computer-readable medium for method for generating a template pruning schema from a template. A parser parses the template, where the template includes a typed data structure with one or more fields. The parser retrieves a pruning schema associated with the typed data structure. The parser also generates the template pruning schema from the pruning schema by identifying each field in the pruning schema that corresponds to the field in the template. |
| US09501462B2 |
Form object having form representation and grid representation of form
A form representation of a form is created including an arrangement of form elements with possible data selections from which a form user will make actual selections. A grid representation is automatically created based on the form representation, including an array of cells corresponding to the form elements and the selections and being organized in a first dimension per the arrangement of the form elements and in a second dimension per the possible data selections. Subsequently, (i) properties are identified and property values are assigned to array cells, the property values being user-visible in respective cells in a properties view, and (ii) functions are created for performing calculations using the actual data selections and the property values to yield derived values during use of the form. Events may also be triggered that are defined in the form object. |
| US09501456B2 |
Automatic fix for extensible markup language errors
Methods and apparatus, including computer program products, for an automatic fix for extensible markup language (XML) errors. A method includes detecting a location causing an error in a markup language document, displaying the location and the error on the display unit, analyzing the error and underlying causes of the error, computing a set of possible actions to remedy the error, displaying information about the error and its underlying causes on the display unit, and displaying the set of possible actions to remedy the error on the display unit. |
| US09501453B2 |
Method and system for a flexible-data column user interface
In embodiments there are provided techniques for flexibly displaying information into one or more columns. One technique includes the user interface (UI) receiving from an end user a selection of display criteria configured by an administrative user. Data from a dataset may be selected and/or ordered for displaying according to the criterion selected by the end user. Alternative embodiments may provide displaying positive and negative data, sorting, and fixed locations. |
| US09501449B2 |
Method, apparatus, and computer-readable medium for parallelization of a computer program on a plurality of computing cores
An apparatus, computer-readable medium, and computer-implemented method for parallelization of a computer program on a plurality of computing cores includes receiving a computer program comprising a plurality of commands, decomposing the plurality of commands into a plurality of node networks, each node network corresponding to a command in the plurality of commands and including one or more nodes corresponding to execution dependencies of the command, mapping the plurality of node networks to a plurality of systolic arrays, each systolic array comprising a plurality of cells and each non-data node in each node network being mapped to a cell in the plurality of cells, and mapping each cell in each systolic array to a computing core in the plurality of computing cores. |
| US09501448B2 |
Execution engine for executing single assignment programs with affine dependencies
The execution engine is a new organization for a digital data processing apparatus, suitable for highly parallel execution of structured fine-grain parallel computations. The execution engine includes a memory for storing data and a domain flow program, a controller for requesting the domain flow program from the memory, and further for translating the program into programming information, a processor fabric for processing the domain flow programming information and a crossbar for sending tokens and the programming information to the processor fabric. |
| US09501439B1 |
Communicating in an integrated circuit using hardware-managed virtual channels
Embodiments herein describe a switchboard coupled to a system bus in an integrated circuit for managing the flow of data between different entities coupled to the bus (e.g., processing cores, accelerators, memory controllers, input/output (I/O) interfaces, and the like). The switchboard is a hardware module that may be tasked with assigning different system bus addresses (or range of addresses) to each of the entities coupled to the bus. These addresses may be unique such that each entity can be uniquely identified by its assigned address. The address space of the system bus also includes managed address that are reserved—i.e., are not assigned to any particular entity. The switchboard is tasked with assigning the managed addresses (also referred to as virtual channels) to an entity which can be used to enable direct communication between hardware entities using the system bus. |
| US09501438B2 |
Information processing apparatus including connection port to be connected to device, device connection method, and non-transitory computer-readable recording medium storing program for connecting device to information processing apparatus
An information processing apparatus includes: a connection port configured to be capable of attaching a device thereto; an acquisition unit configured to acquire, from a storage unit included in the device, bus-configuration information indicating a bus configuration of the device; and a setting unit configured to set a bus configuration of the connection port based on the bus-configuration information. |
| US09501435B2 |
Enabling method and enabling device for debugging port of terminal, and terminal
An enabling method and enabling device for a debugging port of a terminal, and a terminal are described, which are configured to enable a debugging port of a terminal under the condition of failure of a touch screen. The method includes: an instruction of enabling a debugging port input by a user is acquired, wherein the instruction is generated by simultaneously executing first operation of pressing a key of a terminal and second operation of covering an infrared sensor of the terminal; an interrupt service subprogram of the infrared sensor is triggered according to the instruction; a state of the infrared sensor and a pressed state of the key of the terminal are judged according to the interrupt service subprogram, and judgement results are obtained; and when the judgement results are determined to be consistent with preset standards, a screen of the terminal is controlled to be unlocked, and the debugging port is enabled. By adopting the technical solutions of the embodiment of the disclosure, an Android Debug Bridge (ADB) debugging port of a mobile phone Universal Serial Bus (USB) may be reliably enabled under the condition of failure of the touch screen to import personal information in a mobile phone into a computer by mobile phone management software in the computer through a USB cable. |
| US09501432B2 |
System and method for computer memory with linked paths
A first memory buffer has a first high speed memory channel and a second high speed memory channel. A second memory buffer is connected to the first memory buffer through a first connection. The second memory buffer has a third high speed memory channel and a fourth high speed memory channel. The first connection connects the first high speed memory channel and the third high speed memory channel. A first memory controller is connected to the first memory buffer through the second high speed memory channel. A second memory controller is connected to the second memory buffer through a second connection. The second connection is connected to the second memory buffer through the fourth high speed memory channel. A first memory module set is connected to the first memory buffer and a second memory module set is connected to the second memory buffer. |
| US09501420B2 |
Cache optimization technique for large working data sets
A system and method for recognizing data access patterns in large data sets and for preloading a cache based on the recognized patterns is provided. In some embodiments, the method includes receiving a data transaction directed to an address space and recording the data transaction in a first set of counters and in a second set of counters. The first set of counters divides the address space into address ranges of a first size, whereas the second set of counters divides the address space into address ranges of a second size that is different from the first size. One of a storage device or a cache thereof is selected to service the data transaction based on the first set of counters, and data is preloaded into the cache based on the second set of counters. |
| US09501419B2 |
Apparatus, systems, and methods for providing a memory efficient cache
The present disclosure relates to apparatus, systems, and methods that implement a less-recently-used data eviction mechanism for identifying a memory block of a cache for eviction. The less-recently-used mechanism can achieve a similar functionality as the least-recently-used data eviction mechanism, but at a lower memory requirement. A memory controller can implement the less-recently-used data eviction mechanism by selecting a memory block and determining whether the memory block is one of the less-recently-used memory blocks. If so, the memory controller can evict data in the selected memory block; if not, the memory controller can continue to select other memory blocks until the memory controller selects one of the less-recently-used memory blocks. |
| US09501418B2 |
Invalidation data area for cache
The present disclosure relates to caches, methods, and systems for using an invalidation data area. The cache can include a journal configured for tracking data blocks, and an invalidation data area configured for tracking invalidated data blocks associated with the data blocks tracked in the journal. The invalidation data area can be on a separate cache region from the journal. A method for invalidating a cache block can include determining a journal block tracking a memory address associated with a received write operation. The method can also include determining a mapped journal block based on the journal block and on an invalidation record. The method can also include determining whether write operations are outstanding. If so, the method can include aggregating the outstanding write operations and performing a single write operation based on the aggregated write operations. |
| US09501414B2 |
Storage control device and storage control method for cache processing according to time zones
A storage control device capable of avoiding a decrease in performance related to accesses to a storage device from a start time of a certain time zone is provided. A schedule information storing unit 130 stores schedule information indicating target data in an access to a storage device in a predetermined time zone. The target data is a target of a cache control using a cache memory. A cache processing unit 120 performs the cache control for the access to the target data and an access to data other than the target data in a time zone except the predetermined time zone, and performs the cache control for the access to the target data in the predetermined time zone. A preprocessing unit 140 performs a preprocessing to make the cache memory available for the cache control of the target data by a start time of the predetermined time zone. |
| US09501411B2 |
Cache backing store for transactional memory
In response to a transactional store request, the higher level cache transmits, to the lower level cache, a backup copy of an unaltered target cache line in response to a target real address hitting in the higher level cache, updates the target cache line with store data to obtain an updated target cache line, and records the target real address as belonging to a transaction footprint of the memory transaction. In response to a conflicting access to the transaction footprint prior to completion of the memory transaction, the higher level cache signals failure of the memory transaction to the processor core, invalidates the updated target cache line in the higher level cache, and causes the backup copy of the target cache line in the lower level cache to be restored as a current version of the target cache line. |
| US09501409B2 |
Concurrent accesses of dynamically typed object data
A method and an apparatus for an enhanced object model to allow concurrent execution for program code generated from dynamic programming languages, such as JavaScript, are described. An index structure may be introduced to an object model representing a dynamically typed object in addition to a type structure and a data payload storing property or field values of the object. Elements of the index structure may point at corresponding property values as an indirection for accessing the object. |
| US09501408B2 |
Efficient validation of coherency between processor cores and accelerators in computer systems
A method of testing cache coherency in a computer system design allocates different portions of a single cache line for use by accelerators and processors. The different portions of the cache line can have different sizes, and the processors and accelerators can operate in the simulation at different frequencies. The verification system can control execution of the instructions to invoke different modes of the coherency mechanism such as direct memory access or cache intervention. The invention provides a further opportunity to test any accelerator having an original function and an inverse function by allocating cache lines to generate an original function output, allocating cache lines to generate an inverse function output based on the original function output, and verifying correctness of the original and inverse functions by comparing the inverse function output to the original function input. |
| US09501406B2 |
Storage control apparatus and storage control method
A storage control apparatus is communicatively connected to a storage device. The storage device includes a plurality of SSDs. The storage control apparatus includes a processing request controller and a device load detector. The device load detector detects an overload of an SSD by detecting a processing delay of the SSD. When the device load detector has detected an overload of an SSD, the processing request controller suppresses issuance of a request to process write-back with respect to a group by delaying issuance of the write-back. |
| US09501402B2 |
Techniques to perform power fail-safe caching without atomic metadata
A method and system to allow power fail-safe write-back or write-through caching of data in a persistent storage device into one or more cache lines of a caching device. No metadata associated with any of the cache lines is written atomically into the caching device when the data in the storage device is cached. As such, specialized cache hardware to allow atomic writing of metadata during the caching of data is not required. |
| US09501393B2 |
Data storage system garbage collection based on at least one attribute
Managing data in a data storage system including at least one Data Storage Device (DSD) and a host. An initial location is determined for data to be stored in the at least one DSD based on at least one attribute defined by the host. A source portion is identified from a plurality of source portions in the at least one DSD for a garbage collection operation based on the at least one attribute defined by the host. A destination portion is identified in the at least one DSD for storing data resulting from the garbage collection operation based on the at least one attribute defined by the host. Garbage collection of the data in the source portion is performed into the destination portion, and after completion of garbage collection, the source portion is designated as a new destination portion for a new garbage collection operation. |
| US09501390B1 |
Enhancing automated mobile application testing
Disclosed are various embodiments for enhancing automated testing for mobile applications by using an automated testing set. An automated testing pattern set may include multiple patterns that have been determined to yield accurate results in testing applications within a particular application category. The automated testing pattern set may be created for each application category by applying automated random pattern generator tests to applications within the same application category and verifying the accuracy of the random patterns produced by the random pattern generator tests by comparing the results from manual testing. The automated testing pattern set is then created based on patterns ranked according to an assigned accuracy score. |
| US09501387B2 |
Test cases generation for different test types
A method and system for generating test cases of different types for testing an application. A functional flow of the application is created. The test cases are generated, based on at least one test case generation rule and additional test information corresponding to different stages of the functional flow with respect to at least two test types. |
| US09501384B2 |
Testing functional correctness and idempotence of software automation scripts
Various embodiments automatically test software automation scripts. In one embodiment, at least one software automation script is obtained. The software automation script is configured to automatically place a computing system into a target state. A plurality of test cases for the software automation script is executed. Each of the plurality of test cases is a separate instance of the software automation script configured based at least on one or more different states of the computing system. The software automation script is determined to be one of idempotent and non-idempotent and/or one of convergent and non-convergent based on executing the plurality of test cases. |
| US09501383B2 |
Method for securing a program
A method for securing a first program, the first program including a finite number of program points and evolution rules associated to program points and defining the passage of a program point to another, the method including defining a plurality of exit cases and, when a second program is used in the definition of the first program, for each exit case, definition of a branching toward a specific program point of the first program or a declaration of branching impossibility, defining a set of properties to be proven, each associated with one of the constitutive elements of the first program, said set of properties comprising the branching impossibility as a particular property and establishment of the formal proof of the set of properties. |
| US09501381B2 |
Method and apparatus for application costing based on client hardware
Various methods for application costing based on the hardware of a client device are provided. One example method may comprise receiving a message comprising an indication of one or more hardware requirements associated with a service. The method of this example embodiment may further comprise determine one or more hardware attributes related to the one or more hardware requirements. The method of this example embodiment may further comprise evaluating whether the one or more hardware attributes satisfy the one or more hardware requirements. Similar and related example methods, example apparatuses, and example computer program products are also provided. |
| US09501380B2 |
Remote monitoring system for handheld electronic devices
A remote monitoring system for handheld electronic devices includes a multi-port hub, and a port visualizer connected to one of the ports of the multi-port hub. The port visualizer is configured to provide a host with mapping information correlating USB hub ports with physical storage bays within the storage system. A USB controller monitors the charge status of the ports and reports the charge status information both locally and to a HED status application. The port visualizer obtains device status information from the host and reports device status information to the HED status application. A client application obtains charge status information and device status information from the HED status application to enable remote monitoring of devices connected to the storage system. |
| US09501378B2 |
Client events monitoring
Embodiments for integrating production support features and recording client events are included in systems that initiate recording of the events occurring on a client application. The systems further receive event data transmitted from the client application, provide the event data on a display of a device of a user in real time, and allow the user to detect issues associated with the client application. The systems are combinable with additional production support features including module tracing. |
| US09501376B2 |
Testing I/O timing defects for high pin count, non-contact interfaces
Indirect testing of multiple I/O interface signal lines concurrently. A system distributes a test data sequence to a group of signal lines. Each signal line receives the test data sequence and checks for errors in receiving the test data sequence at an associated I/O buffer. The system includes an error detection mechanism for each signal line. The system also includes an error detection mechanism for the group of multiple signal lines. If the I/O buffer receives any bit of the test data sequence incorrectly, the signal line error detection indicates an error. The group error detection accumulates pass/fail information for all signal lines in the group. Rather than sending a pass/fail indication on every cycle of the test, the group error detection can count pass/fail information for all signal lines of the group for all bits of the test data sequence and indicate error results after the entire test data is received. |
| US09501371B2 |
Method and apparatus for indirectly assessing a status of an active entity
A method and system permit a backup entity of a redundant apparatus of a communication system that shares control of hardware resources or other network resources with an active entity to indirectly determine a status of the active entity based upon behavior and reaction to actions it takes in connection with resources it shares control of with the active entity. Such a method and system permit the backup entity to deduce the state of the active entity without having any a hardware connection or other communication connection with the active entity. |
| US09501362B2 |
RAID configuration management device and RAID configuration management method
A CM 10 includes an unmount detector 142 and a mount detector 144 that monitor unmount and mount of each disk 21 of a RAID configuration, a write request manager 143 that manages a write request for writing data to a disk 21 that is unmounted, a consistency determination unit 145 that, when mount of a disk 21 of the RAID configuration is detected, makes a determination on consistency of the data of the disk 21 in which mount is detected on the basis of the managed write request, and a RAID incorporating unit that, when it is determined that the data lacks consistency, performs processing for recovering data expected to be written by the write request issued to the disk 21 in which mount is detected while the disk 21 is unmounted and incorporates the disk 21 in an original RAID configuration. |
| US09501357B2 |
Techniques for providing data redundancy after reducing memory writes
The present disclosure relates to techniques for providing data redundancy after reducing memory writes. In one example implementation according to aspects of the present disclosure, a storage controller receives a storage command for providing data redundancy in accordance with a first data redundancy scheme. The storage controller then translates the storage command for providing the data redundancy in accordance with a second data redundancy scheme. |
| US09501356B2 |
Fast data back-up and restore between volatile and flash memory
Back-up of data to flash memory. Data to back up is written into stripes, which are sets of pages across flash memory backup devices having the same block and page address. First metadata is embedded in each stripe indicating any blocks of the flash memory known to be bad. In response to encountering a new error in a block of flash memory during writing data to back up to a stripe, re-writing the stripe starting at the next available stripe excluding pages on the block of flash memory having the new error, writing subsequent stripes excluding pages on the block of flash memory having the new error, and embedding second metadata in the re-written and subsequent stripes indicating the location of the block having the new error. Responsive to finding no bad blocks indicated in the first metadata, initiating a write to two or more stripes simultaneously. |
| US09501355B2 |
Storing data and directory information in a distributed storage network
A method begins with a processing module issuing a set of write requests regarding storing a set of encoded data slices in dispersed storage network (DSN) memory and confirming that at least a write threshold number of encoded data slices have been temporarily stored in the DSN memory. When confirmed, the method continues with the processing module issuing a second set of write requests regarding storing a set of encoded directory slices in the DSN memory and confirming that at least a second write threshold number of encoded directory slices have been temporarily stored in the DSN memory. When confirmed, the method continues with the processing module issuing write commit requests regarding the at least a write threshold number of encoded data slices and the at least a second write threshold number of encoded directory slices. |
| US09501348B2 |
Method and system for monitoring of library components
Embodiments of the present invention provide a method for monitoring components in a library by tracking the movement of library components. By tracking the movement of library components, the degradation of library components can be monitored and the reliability of library components determined, allowing unreliable components to be bypassed or replaced, enhancing the reliability of the library and preventing data loss. |
| US09501340B2 |
Mechanism for facilitating dynamic and efficient management of instruction atomicity violations in software programs at computing systems
A mechanism is described for facilitating dynamic and efficient management of instruction atomicity violations in software programs according to one embodiment. A method of embodiments, as described herein, includes receiving, at a replay logic from a recording system, a recording of a first software thread running a first macro instruction, and a second software thread running a second macro instruction. The first software thread and the second software thread are executed by a first core and a second core, respectively, of a processor at a computing device. The recording system may record interleavings between the first and second macro instructions. The method includes correctly replaying the recording of the interleavings of the first and second macro instructions precisely as they occurred. The correctly replaying may include replaying a local memory state of the first and second macro instructions and a global memory state of the first and second software threads. |
| US09501339B2 |
Message-based model verification
A system and method may generate executable block diagrams having blocks that run in accordance with message-based execution semantics. A message may include an input data payload that does not change over time, and the message may persist for only a determined time interval during execution of block diagram. A verification engine may provide one or more tools for evaluating and verifying operation of message-based blocks. The verification engine may support one or more verification blocks that may be added to the block diagram and associated with the diagram's message-based blocks. The verification blocks may capture and present messages exchanged among the message-based blocks. The verification blocks may also specify an expected interaction of messages, and determine whether the actual messages are equivalent to the expected interaction. |
| US09501337B2 |
Systems and methods for collecting and distributing a plurality of notifications
Methods and systems for collecting and distributing a plurality of notifications are disclosed. In one embodiment, the method includes receiving a plurality of notifications for a client from a plurality of publishers, wherein each notification of the plurality of notifications comprises a client identifier and a notification type identifier. The method also includes, for each notification of the plurality of notifications, authenticating the publisher of the notification upon receiving the notification. The method further includes, for each notification of the plurality of notifications, determining whether the client is subscribed to receive the type of notification identified by the notification type identifier from the publisher of the notification. The method also includes, for each notification of the plurality of notifications, outputting the notification to the client when the publisher of the notification is authentic and the client is subscribed to receive the type of notification from the publisher. |
| US09501335B2 |
Web service API for unified contact store
An Application Programming Interface (API) provides functions for interacting with contact lists and contacts that are stored in a unified contact store by a primary contact service. For example, a client of a unified communications service may use the API to access contact information that is stored with a primary contact service (e.g. a messaging application/service). The contact information is maintained by the primary contact service. The API includes functions such as, but not limited to: adding a new IM contact to a group, adding a new IM group, removing an IM contact from a group, adding a distribution group to an IM list, getting an IM item list, and tagging an IM contact. The contacts may be obtained from the primary contact service and temporarily stored by the client (e.g. within a cache) of a different service. |
| US09501334B2 |
Protocol for communication of data structures
A system and method are provided for communicating information in a data structure between applications. According to the method, a description of a data structure is sent from a first application to a second application, and there is received from the second application an identification of at least one portion of the data structure that is requested by the second application. The first application marshals a subset of the data structure consisting of the at least one portion that was identified, and there is sent from the first application to the second application the marshalled subset of the data structure. |
| US09501331B2 |
Satisfiability checking
A satisfiability checking system may include a single instruction, multiple data (SIMD) machine configured to execute multiple threads in parallel. The multiple threads may be divided among multiple blocks. The SIMD machine may be further configured to perform satisfiability checking of a formula including multiple parts. The satisfiability checking may include assigning one or more of the parts to one or more threads of the multiple threads of a first block of the multiple blocks. The satisfiability checking may further include processing the assigned one or more parts in the first block such that first results are calculated based on a first proposition. The satisfiability checking may further include synchronizing the results among the one or more threads of the first block. |
| US09501327B2 |
Concurrently processing parts of cells of a data structure with multiple processes
Provided are a computer program product, system, and method for concurrently processing parts of cells of a data structure with multiple processes. Information is provided to indicate a partitioning of the cells of the data structure into a plurality of parts, and having a cursor pointing to a cell in the part. Processes concurrently process different parts of the data structure by performing: determining from the cursor for the part one of the cells in the part to process; processing the cells from the cursor to determine whether to process the unit of work corresponding to the cell; and setting the cursor to identify one of the cells from which processing is to continue in a subsequent iteration in response to processing the units of work for a plurality of the processed cells. |
| US09501323B2 |
Management of resources within a computing environment
Resources in a computing environment are managed, for example, by a hardware controller controlling dispatching of resources from one or more pools of resources to be used in execution of threads. The controlling includes conditionally dispatching resources from the pool(s) to one or more low-priority threads of the computing environment based on current usage of resources in the pool(s) relative to an associated resource usage threshold. The management further includes monitoring resource dispatching from the pool(s) to one or more high-priority threads of the computing environment, and based on the monitoring, dynamically adjusting the resource usage threshold used in the conditionally dispatching of resources from the pool(s) to the low-priority thread(s). |
| US09501319B2 |
Method and apparatus for scheduling blocking tasks
Method, system, and computer-readable medium for scheduling blocking tasks are disclosed. A method includes: executing each of a plurality of task functions in a respective coroutine; detecting a first blocking event for a first task function of the plurality of task functions during execution of the first task function; in response to detecting the first blocking event: setting a respective blocking state of the first task function to a pause state; pausing execution of the first task function; and placing the first task function among a group of paused task functions; and after pausing the execution of the first task function: identifying a second task function among the group of paused task functions for which a respective blocking state has been updated to a running state; removing the second task function from the group of paused task functions; and resuming execution of the second task function. |
| US09501317B2 |
System for formulating temporal bases for process coordination in a genetics related process environment
Analytical methods and devices for detection of molecular processes, especially in genetics related environments are faced with the challenge of having to operate with the lack of coherent temporal frameworks that incorporate microscopic to macroscopic scale operations. Drawbacks in overcoming these challenges have resulted in substantial underutilization of resources and below optimum outcome as well. The present innovation as its technical solution to the problem outlined above discloses a computing based generic approach that facilitates incorporating operation of such processes as quantifiable entities in terms of a common temporal scale, thus establishing a coherent framework for coordinating operation of different processes that have varied temporal scales, namely, those occurring in temporal extents shorter as well as longer than its variable operational step enabling its adoption in a wide range of practical applications bringing multiple advantages. |
| US09501313B2 |
Resource management and allocation using history information stored in application's commit signature log
Aspects of the present disclosure are directed towards managing computing resources. Managing computing resources can include initializing in a computer system, an application that corresponds to one or more commit signatures, each of the one or more commit signatures correspond to a transaction within the application and determining that a commit signature of one or more commit signatures is saved in a commit block (COB). Managing computing resources can include retrieving, from the COB, in response to determining that the commit signature is saved in the COB, a first set of resource data that corresponds to the commit signature, the first set of resource data contains information for resource usage that corresponds to the application and allocating resources accessible to the computer system based on the first set of resource data. |
| US09501311B2 |
Apparatus and method for multicore emulation based on dynamic context switching
Provided are an apparatus and method for multicore emulation based on dynamic context switching. The apparatus for multicore emulation based on dynamic context switching includes a multicore emulation managing unit configured to transmit a signal for requesting determination of a core to be emulated among a plurality of cores, and a context switching managing unit configured to receive the signal for requesting determination of a core to be emulated from the multicore emulation managing unit, determine an ID of a core to be emulated according to the received signal, and executing emulation on a core corresponding to the determined core ID. |
| US09501309B2 |
Monitoring hypervisor and provisioned instances of hosted virtual machines using monitoring templates
A method for configuring and maintaining external monitoring of one or more instances of a virtual machine within a virtualized computing environment. The method includes a computer processor monitoring a hypervisor. The method further includes a computer processor identifying a first list, wherein the first list is comprised of one or more monitoring templates respectively associated with one or more virtual machine types, and maintaining a second list comprised plurality of provisioned instances of virtual machines, wherein the second list also includes a first information respectively associated with the plurality of provisioned instances of virtual machines. The method further includes a computer processor compiling a third list and transmitting the third list to the monitoring system. The method further includes a computer processor receiving the third list and in response, a computer processor executing one or more monitoring functions based, at least in part, on the third list. |
| US09501305B2 |
System for virtualisation monitoring
A system for virtualization monitoring is provided as a hardware interface provided on a physical machine supporting a virtualization layer. The interface comprises an indication of the state of virtualization on the physical machine to monitor any virtual machines running on the physical machine. The interface also comprises means for interacting with the virtualization layer, for example for activating a maintenance mode by a migration of virtual servers running on a physical machine. |
| US09501303B1 |
Systems and methods for managing computing resources
Systems and methods for managing computing resources are disclosed. In an example embodiment, a computing system request is received. The computing system request may be in a standardized request format and include a codified architecture and topology criterion. A build request is generated based on the computing system request. A computing resource device in accordance with the codified architecture and meeting the topology criterion is identified. A virtual machine is built on the computing resource device based on the build request. A plurality of applications is deployed on the virtual machine based on the build request to create an instantiated software deployment. Additional methods and systems are disclosed. |
| US09501302B1 |
System, method, and computer program for combining results of event processing received from a plurality of virtual servers
A system, method, and computer program are provided for combining results of event processing received from a plurality of virtual processes or servers. In use, an event is sent to a plurality of virtual processes or virtual servers. Further, a result of processing of the event is received from each of the virtual processes or virtual servers. In addition, the results received from the plurality of virtual processes or virtual servers are combined. |
| US09501301B2 |
Flexible instruction sets for obfuscated virtual machines
A method for protecting computer software code is disclosed. In the embodiment, the method involves receiving instructions corresponding to computer software code for an application, the instructions including a first section of instructions to protect that is indicated by a first indicator and a second section of the instructions to protect that is indicated by a second indicator, rewriting the first section of instructions into a first section of virtual instructions, and rewriting the second section of instructions into a second section of virtual instructions, wherein the first section of instructions includes a first virtual instruction that corresponds to a first handler and the second section of virtual instructions includes a second virtual instruction that corresponds to a second handler, the first handler having different properties than the second handler. |
| US09501300B2 |
Control system simulation system and method
A non-transitory tangible computer-readable medium may include instructions executable by a processor in a simulation system to perform a simulation. The instructions may include to wait for a plurality of virtual controllers to complete a previous simulation step, write a result of the previous simulation step from each of the plurality of virtual controllers to a shared memory, read an input from the memory to each of the plurality of virtual controllers, initiate a simulation step on each of the plurality of virtual controllers, and upon initiation of the simulation step in each of the plurality of virtual controllers, indicate completion of the simulation, in which the plurality of virtual controllers include a controller model having a plurality of simulation steps and the instructions are configured to be executed by the processor in parallel. |
| US09501299B2 |
Minimizing performance loss on workloads that exhibit frequent core wake-up activity
A processor may include a cause agnostic frequency dither filter (FD filter), which may cause reduction in the frequency transitions while maintaining the performance levels. The FD Filter may minimize the performance loss, which may otherwise accrue from these frequency transitions, while trying to maximize the peak frequency of the processor. The FD filter may determine a minimum and maximum limit, which may be used by a power management unit (PMU) to restrict the number of frequency transitions to be within a specified threshold. The FD filter may determine the maximum and minimum limits based on transition data stored in internal tables captured during one or more time windows (or observation windows). Based on an average system behavior, the PMU may either apply the minimum or the maximum limit over the subsequent time window. |
| US09501298B2 |
Remotely executing operations of an application using a schema that provides for executable scripts in a nodal hierarchy
A schema is provided that logically represents a nodal hierarchy relating to execution of an application. The hierarchy includes multiple nodes, including one or more category nodes and one or more content nodes. An executable script is provided with the schema. The script may be associated with at least one node of the hierarchy. Each of multiple user inputs from the computing device are processed using the schema. The individual user inputs may be selective of nodes of the hierarchy. In response to processing each of multiple user inputs, user interface content is provided to the computing device. The user interface content for each user input corresponds to one of (i) one or more nodes, or (ii) a script content, generated as an output of an executed script that is associated with a selected node. |
| US09501294B2 |
Method for automating digital signage applications using intelligent self-configuring objects and smart templates
A digital signage content management system is provided that uses existing interfaces such as web interfaces and turns existing commercially available graphics programs such as web based tools or locally run programs such as Microsoft PowerPoint® into a digital signage platform to facilitate developing and managing digital signage applications through the creation of smart objects and intelligent templates that are easy to create and easy to modify to suit different applications. This enables digital signage content to be professionally created without requiring custom programming for each and every stream of new and/or changing content. The smart objects and intelligent templates can also be used to provide content with changing elements in real-time. |
| US09501284B2 |
Mechanism for allowing speculative execution of loads beyond a wait for event instruction
A processor includes a mechanism that checks for and flushes only speculative loads and any respective dependent instructions that are younger than an executed wait for event (WEV) instruction, and which also match an address of a store instruction that has been determined to have been executed by a different processor prior to execution of the paired SEV instruction by the different processor. The mechanism may allow speculative loads that do not match the address of any store instruction that has been determined to have been executed by a different processor prior to execution of the paired SEV instruction by the different processor. |
| US09501283B2 |
Cross-pipe serialization for multi-pipeline processor
Embodiments relate to cross-pipe serialization for a multi-pipeline computer processor. An aspect includes receiving, by a processor, the processor comprising a first pipeline, the first pipeline comprising a serialization pipeline, and a second pipeline, the second pipeline comprising a non-serialization pipeline, a request comprising a first subrequest for the first pipeline and a second subrequest for the second pipeline. Another aspect includes completing the first subrequest by the first pipeline. Another aspect includes, based on completing the first subrequest by the first pipeline, sending cross-pipe unlock signal from the first pipeline to the second pipeline. Yet another aspect includes, based on receiving the cross-pipe unlock signal by the second pipeline, completing the second subrequest by the second pipeline. |
| US09501280B2 |
Cache storing data fetched by address calculating load instruction with label used as associated name for consuming instruction to refer
A unified architecture for dynamic generation, execution, synchronization and parallelization of complex instruction formats includes a virtual register file, register cache and register file hierarchy. A self-generating and synchronizing dynamic and static threading architecture provides efficient context switching. |
| US09501274B1 |
Qualitative feedback correlator
A computer receives one or more partitions of application code and one or more tags associated with each partition. The computer identifies feedback corresponding to the application and determines whether terms contained within the feedback correspond to the tags associated with the partitions of code. Based on determining that the terms within the feedback correspond to the tags associated with a partition, associating the feedback with the corresponding partition of code. Based on determining that the terms within the feedback do not correspond to the tags associated with a partition, improving correlating accuracy through techniques such as machine learning, text analytics, natural language processing, and developer feedback to determine additional terms and additional tags. |
| US09501272B2 |
Systems and methods for updating a medical device
Embodiments described herein include methods and/or systems for updating a medical device. Embodiments include medical devices which are configured for updates in response to various events including connection of a peripheral device to the medical device, a user initiated event, or based on received recommendations. |
| US09501268B2 |
Generating SIMD code from code statements that include non-isomorphic code statements
Generating SIMD code from code statements that include non-isomorphic code statements. Code statements are received, each code statement has one or more operators in a respective operator order and each operator has a type and associated operands. At least two code statements among the code statements received have an operator of the same type in a different operator order position. A first operator order position is identified for the operators of the same type in each of the code statements. For each of the code statements, code is generated for operators and their associated operands having operator order positions preceding the first operator order positions. SIMD code is generated at least based on the identified first operator order positions, the corresponding operator type, and the operands associated with the operator type at the identified operator order positions. |
| US09501260B2 |
High speed and low power circuit structure for barrel shifter
A barrel shifter uses a sign magnitude to 2's complement converter to generate decoder signals for its cascaded multiplexer selectors. The sign input receives the shift direction and the magnitude input receives the shift amount. The sign magnitude to 2's complement converter computes an output result as a 2's complement of the shift amount using the shift direction as a sign input, assigns a first portion (most significant bit half) of the output result to a first decoder signal, and assigns a second portion (least significant bit half) of the output result to a second decoder signal. The encoding scheme using a sign magnitude to 2's complement converter allows the decoder circuits to be relatively simple, for example, 3-to-8 decoders for a 64-bit operand value rather than the 4-to-9 decoder required in a conventional barrel shifter, leading to faster operation, less area, and reduced power consumption. |
| US09501259B2 |
Audio output device to dynamically generate audio ports for connecting to source devices
An audio output device that operates on a network to connect with a first source device. The connection to the first source device can be made using a first wireless port, so that the first source device streams a first audio content to the first wireless port of the audio output device. When connected to the first source device, the audio output device generates an advertisement for the network, which communicates that the audio output device is available to receive a connection to another source device. In this way, the audio output device generates a new wireless port to connect to a second source device when the connection with the first source device is active. |
| US09501257B1 |
Pass-through printing with XPS printer driver
Methods and apparatus include pass-through printing for print jobs sent to an imaging device from a computing device having an XPS printer driver. If an input and output type of the print job corresponds to XPS, the print job passes directly to the imaging device. If the input type is XPS but the output type is not XPS, an XPS-to-PS filter converts the print job to PS. For PS print jobs, a decider filter reads whether or not a PDF pass-through flag is set in a JCL header to determine whether or not a user of the print job seeks to prevent loss of color fidelity. Upon determining whether an originating document corresponding to the print job is a PDF document, the print job is bundled for imaging with its content and header and converted from PS to PDF or PDF to PS as necessary. |
| US09501253B2 |
Communication apparatus, control method thereof, printing apparatus, and storage medium
A communication apparatus (a printing apparatus 100) according to an aspect of the present invention controls communication with an external apparatus in one of a first wireless communication mode (or a wired communication mode) and a second wireless communication mode. In the case where the communication mode is set to the second wireless communication mode, the printing apparatus 100 switches the communication mode to the first wireless communication mode (or the wired communication mode) when an operation state of the printing apparatus 100 shifts to another state such as a power saving state. |
| US09501250B2 |
Apparatus, system, and method of controlling power supply, and recording medium storing power supply control program
An information processing apparatus stores function information that identifies, for each one of a plurality of functions, one or more devices capable of performing the function, receives a user instruction for executing a job from a first device of the plurality of devices, the user instruction instructing execution of at least one function that cannot be performed by the first device, identifies a second device of the plurality of devices that is capable of performing the at least one function of the user instruction using the function information, and controls the second device to transition from a power save mode to a normal operating mode, while keeping devices other than the second device to be in the power save mode. |
| US09501249B2 |
Printing apparatus and print control method controlling printing based on measured detection pattern
There is provided a printing apparatus that conveys a print medium and performs printing on the conveyed print medium, the printing apparatus including a print data generation unit configured to generate print data by performing predetermined pseudo halftone processing of image data to be printed for quantizing the image data; a pattern data generation unit configured to generate print data on a detection pattern by performing the same predetermined pseudo halftone processing of data on the detection pattern for quantizing the data on the detection pattern; a pattern printing unit configured to print a detection pattern based on the generated print data on the detection pattern; a measuring unit configured to measure the printed detection pattern; and a print control unit configured to control printing based on the print data generated for the image data, based on a measurement result of the detection pattern. |
| US09501248B2 |
Information processing apparatus and recording medium
An information processing apparatus includes a first controller, a second controller, a non-volatile storage medium, and a volatile storage medium. The non-volatile storage medium is able to store data under control by the first controller, and unable to store data under control by the second controller. The volatile storage medium is able to store data under control by the second controller such that the data are readable therefrom under control by the first controller. The second controller includes a first storage unit that stores history data of operation performed under control by the second controller in the volatile storage medium. The first controller includes a reading unit and a second storage unit. The reading unit reads the history data stored in the volatile storage medium by the first storage unit. The second storage unit stores the history data read by the reading unit in the non-volatile storage medium. |
| US09501247B2 |
Image forming apparatus, control method and a non-transitory computer-readable storage device having control program
An image forming apparatus includes a data receiving device, a memory, an image forming device forming an image on a recording medium and a control device controlling the memory to store therein a data aggregate received by the data receiving device. The data aggregate includes image data relating to an image and condition data relating to an image forming condition for forming the image on the recording medium by the image forming device. The control device determines whether command data relating to a command to the image forming apparatus is included in the data aggregate stored in the memory and, when it is determined that the command data is included in the data aggregate stored in the memory, executes a command based on the command data, instead of image formation by the image forming condition relating to the condition data. |
| US09501239B2 |
Grouping method and device for enhancing redundancy removing performance for storage unit
The present invention relates to a grouping method and device for enhancing redundancy removing performance for a storage unit such as a hard disk, a solid state disk (SSD), etc. The grouping method for enhancing performance of a redundancy removing technology may include: extracting samples from data that is stored in a buffer of a memory and is standing by to be processed; performing remaining calculations on the extracted samples; and grouping samples by connecting them to a bucket corresponding to a resultant value of the remaining calculations. |
| US09501238B2 |
Electronic device and method of managing memory of electronic device
A method of managing a memory by an electronic device is provided. The method includes configuring a swap data amount per unit time, identifying an actual use amount of swap data, and comparing the identified actual use amount of the swap data with the configured swap data amount per unit time. |
| US09501234B1 |
System and method for incrementally performing full data backup
A system and method is disclosed for performing a backup of electronic data. An example method includes storing a first incremental data backup portion of a dataset in an electronic memory where the first incremental data backup includes both modified and unmodified portions of the dataset. Once stored, the method includes determining whether the first incremental data backup is a complete backup of the dataset. If the first incremental data backup is not a complete backup of the dataset, the method stores one or more additional incremental data backups of the dataset in the electronic memory that include additional modified and unmodified portions of the dataset until a full backup of the dataset is created. |
| US09501233B2 |
Providing snapshots of virtual storage devices
In general, one aspect of the subject matter described in this specification can be embodied in methods that include receiving, at a computer system, a request to create a snapshot of a virtual storage device, wherein the virtual storage device virtually stores data at virtual addresses, the data being physically stored at a plurality of physical storage locations that are managed by an underlying storage system associated with virtual storage device. The methods can further include identifying, by the computer system, one or more regions of the virtual storage device that have been written to since a previous snapshot of the virtual storage device was created. The methods can additionally include generating a unique identifier for the requested snapshot; and creating the requested snapshot using the identified one more regions and the unique identifier. |
| US09501221B2 |
Dynamically changing a buffer flush threshold of a tape drive based on historical transaction size
According to one embodiment, a method for dynamically changing a buffer threshold in a tape drive includes determining that a drive buffer is emptied of data, calculating a write size indicating an amount of data from a transaction size left to be written to a tape prior to a next anticipated sync command, setting a buffer threshold that triggers a back hitch to a smaller value when the transaction size is less than a buffer size, setting the buffer threshold to the smaller value when an absolute difference between the transaction size and the write size is greater than or equal to the buffer size, and setting the buffer threshold to a larger value when the transaction size is not less than the buffer size and/or the absolute difference between the transaction size and the write size is less than the buffer size. |
| US09501219B2 |
2D line data cursor
Various arrangements for displaying a value of a data point on a graph are presented. The graph that illustrates a plurality of datasets may be presented. Input may be received from a user that indicates a point on the graph. Along a line parallel to an axis that extends through the point on the graph indicated by the user input, a dataset from the plurality of datasets may be identified. The value for the data point of the dataset that corresponds to an intersection of the line parallel to the axis and the visual representation of the dataset may be determined. The value for the data point may be displayed. |
| US09501217B2 |
Target region for removing icons from dock
Providing a mechanism for removal of icons from a dock in response to user input is disclosed. A dock is generated for display in a user interface, the dock comprising a region of the user interface in which one or more icons are presented. An input is received for selecting an icon presented in the dock, the icon associated with an original position in the user interface. A visual indicator of a particular distance to drag the icon before the icon will be removed from the dock is generated for display. A second input for releasing the icon at a second position in the user interface is received. The icon is removed from the dock if a distance between the second position and the original position is within a predefined range of the particular distance. |
| US09501214B2 |
Mobile terminal and controlling method thereof
A mobile terminal including a memory configured to store data; a touchscreen display; and a controller configured to: display a first portion of a panoramic file selected from the memory, said panoramic file having a display size greater than that of the touchscreen display, and scroll automatically the panoramic file in at least one direction so as to display another portion of the panoramic file. |
| US09501211B2 |
User input processing for allocation of hosting server resources
Systems and methods are provided for dynamically allocating and accessing hosting server resources to users of hosting services. The system may include one or more servers that provide multiple levels of access to the hosting server resources, and an administration server configured with one or more migration paths that allow the user to migrate the account between two levels while the account remains accessible to all entities authorized to access the account. The hosting server resources may be divided according to virtual partitions that are resizable by the administration server. The system may include a migration interface stored on and accessible to the user from the administration server. The migration interface provides the user with options to migrate the account between the levels of access. The system may include an application programming interface that provides access to the administration server for changing the account's level of access. |
| US09501210B2 |
Information processing apparatus
An information processing apparatus includes a display device configured to display a first image, a coordinate input device configured to input coordinates on the first image, and a processor configured to perform processing based on input to the coordinate input device. The processor specifies a part of a region on the first image as a specific region, based on coordinates of two points that are input to the coordinate input device, generates a second image that is obtained by enlarging the specific region at a predetermined magnification, and causes the display device to superimpose and display the second image on the first image with the second image occupying a part of the first image. |
| US09501200B2 |
Smart display
A smart display allows a user to build custom layouts of user interface blocks on the smart display independent of the software on the computer creating the user interface. A customization mechanism in the smart display allows a user to select portions of a user interface and move them to different positions on the display. The customization mechanism creates custom layout metadata that defines a screen offset for portions of a user interface moved by the user. The smart display monitors the incoming display data and re-assigns pixel rendering data to the new location in the moved user interface blocks as the data coming from the computer application changes. |
| US09501196B2 |
Display apparatus and touch detection apparatus using shift of detection operation for reduced detection time
A display apparatus includes: a display face; a display function layer adapted to vary display on the display face in response to an inputted image signal; a plurality of driving electrodes disposed separately in one direction; a detection scanning control section configured to apply a detection driving voltage to some of the plural driving electrodes and carry out detection driving scanning while shifting an application object of the detection driving voltage in the one direction on the display face and then control the detection driving scanning such that jump shift of carrying out shift with a pitch of twice or more times a driving electrode pitch is included; and a plurality of sensor lines disposed separately in a direction different from the one direction and responding to touch or proximity of a detection object with or to the display face to exhibit an electric variation. |
| US09501190B2 |
Touch window
Disclosed is a touch window. The touch window includes a cover substrate; a ground electrode on the cover substrate; and a circuit substrate on the cover substrate, including a ground connecting part connected with the ground electrode and an open area to expose the ground connecting part, wherein the ground electrode is electrically connected to the ground connecting part through the open area. |
| US09501189B2 |
Electronic device and method for controlling electronic device
An electronic device includes a control unit (60) that performs processing associated with an object displayed on a display unit (20) in accordance with a contact position of a contacting body in an input acceptance region, of a contact detection unit (10), corresponding to the object and in accordance with data based on pressure detected by a pressure detection unit (30). When the contact position of the contacting body detected by the contact detection unit (10) changes from being inside the input acceptance region to outside the input acceptance region along with an increase in the data based on pressure detected by the pressure detection unit (30), the control unit (60) performs control to consider the contact position to be inside the input acceptance region, thereby preventing operations not intended by the operator when a contact position shifts due to the start of pressure. |
| US09501186B2 |
Touch screen and mobile terminal including same
A touch screen, including: at least two cover glasses; a flexible film; a coating layer coating the flexible film; a transparent bonding layer bonding the flexible film that is coated with the coating layer to the at least two cover glasses; and a flexible printed circuit board electrically connected to the coating layer. |
| US09501185B2 |
Active array of capacitive touch panel and associated capacitive touch panel
An active array of a capacitive touch panel includes a plurality of first electrodes, a plurality of second electrodes and a plurality of first auxiliary electrodes, where the first electrodes are connected to a scan signal transmitting circuit of the capacitive touch panel, and are used for receiving a plurality of scan signals, respectively; the second electrodes are connected to a detecting circuit of the capacitive touch panel; and the first electrodes and the first auxiliary electrodes are fabricated in a same metal layer, and the first electrodes are not connected to the first auxiliary electrodes. |
| US09501183B2 |
Method, apparatus and computer program product for distinguishing a touch event from a gesture
There are disclosed a method, apparatuses and a computer program product for sensing a movement of an object in proximity of a sensing panel. In some embodiments of the method proximity data indicative of existence of one or more pointing objects in proximity of a sensing panel is formed. It is also determined from the proximity data whether at least one of the pointing objects touches the sensing panel. If the determining indicates at least one touch of at least one pointing object, it is determined if a probability that movement of one or more of the pointing objects in proximity of the sensing panel illustrates a predetermined gesture. The probability is compared to a predetermined threshold; and a touch event is sent, if the probability is less than the predetermined threshold. |
| US09501179B2 |
Touch sensor for curved or flexible surfaces
In one embodiment, an apparatus includes a substantially flexible substrate configured to bend at an edge between a first surface and a second surface of a device. The edge has an angle of deviation between the first and second surfaces of at least approximately 45°. The apparatus includes a touch sensor disposed on the substantially flexible substrate and configured to bend with the substantially flexible substrate at the edge between the first and second surfaces. The touch sensor includes drive or sense electrodes made of flexible conductive material configured to bend with the substantially flexible substrate at the edge between the first and second surfaces. The touch sensor has at least one active area on each of the first and second surfaces. |
| US09501178B1 |
Generating audible tooltips
A processor-based system may include software which implements an audible tooltip. For example, in connection with a touch screen display, when an object is contacting or proximate to a given button displayed on the display, both an audible tooltip and a textual tooltip may be provided to give the user information about the functionality of the particular button. In some embodiments of the present invention, this enables the user to operate a touch screen display without actually looking at the display. |
| US09501175B2 |
Techniques and apparatus for managing touch interface
An apparatus may comprise a touch-sensitive user interface, a processor circuit; and a personalized touch event filter that includes a touch trainer module for execution on the processor circuit to generate a user touch profile based upon user touch input received at the touch-sensitive user interface, and a revising plug-in component for execution on the processor circuit to generate a revised touch event based upon a raw touch event received at the touch-sensitive user interface and the user touch profile. |
| US09501170B2 |
Pixel circuit, display device, and method for driving pixel circuit
The present invention is directed to a pixel circuit for a display device and to a method for driving the pixel circuit. The pixel circuit comprises: a light-emitting unit configured to emit light under the control of the light-emission controlling unit; a light-emission controlling unit configured to control the light-emitting unit to emit light at a display stage; a touching unit configured to generate a touch signal; a driver amplifying unit configured to amplify the touch signal at a touch stage and drive the light-emitting unit to emit light at the display stage; a charging unit configured to charge a compensating unit; the compensating unit configured to be charged by the high voltage end prior to the display stage, and be charged by the charging unit at the display stage. |
| US09501169B2 |
Acquiring multiple capacitive partial profiles with orthogonal sensor electrodes
Embodiments include a method, input device, and processing system for driving a plurality of sensor electrodes for capacitive sensing. The method includes acquiring a first capacitive partial profile by driving a capacitive sensing signal onto a first sensor electrode of a first plurality of sensor electrodes while driving a second sensor electrode of the first plurality of sensor electrodes with a substantially constant voltage. The method further includes acquiring a second capacitive partial profile by driving the capacitive sensing signal onto the second sensor electrode while driving the first sensor electrode with the substantially constant voltage, and determining a first capacitive profile based on at least the acquired first and second capacitive partial profiles. |
| US09501168B2 |
Methods and apparatus to detect a presence of a conductive object
A method and apparatus determine a plurality of regions, each of the plurality of regions having a detected change in capacitance value that meets or exceeds a threshold value. In an embodiment, the method and apparatus fit a shape to the plurality of regions and determine another region, the other region being within the fitted shape and not having the detected change in capacitance value that meets or exceeds the threshold value. The method and apparatus may assign an assigned change in capacitance value to the other region. |
| US09501165B2 |
Organic light emitting diode display device with touch screen and method of fabricating the same
An OLED display device with a touch screen includes first and second substrates; organic light emitting diodes in the display area over the first substrate; first pads and second pads in the non-display area over the first substrate; first and second touch electrodes in the display area over the second substrate; touch pads in the non-display area over the second substrate and corresponding to and overlapping the second pads, respectively; and a first adhesive layer between the first and second substrates and exposing the first and second pads, wherein pad contact holes pass through the second substrate, the touch pads, and the first adhesive layer and expose the second pads, respectively, and wherein a conduction means is disposed in each of the pad contact holes and electrically connects each of the touch pads with a corresponding second pad. |
| US09501164B2 |
Thin film transistor liquid crystal display having capacitive touch sensor embedded therein
Provided is a thin film transistor liquid crystal display (TFT LCD) in which a capacitive touch sensor is embedded, the TFT LCD comprising: a touch sensor source follower TFT formed on a substrate; a first electrode connected to a gate electrode of the touch sensor source follower TFT; a touch sensor reset TFT including the first electrode; an insulator film formed on the first electrode; a second electrode formed on the insulator film; and a display switching TFT including the second electrode, wherein the second electrode is connected to a drain electrode of the display switching TFT; the touch sensor reset TFT and the gate electrode of the touch sensor source follower TFT share the first electrode; and the first electrode is connected to the gate electrode of the touch sensor source follower TFT. |
| US09501162B2 |
Display device integrated with touch screen panel and driving method thereof
A display device integrated with a touch screen panel includes a display unit in which scan lines and data lines crossing each other, and pixels are arranged, wherein the pixels are positioned at crossing regions of the scan lines and the data lines and each of the pixels comprises first and second pixel electrodes, first touch electrodes extending along a first direction on the display unit, and second touch electrodes extending along a second direction on the display unit, and arranged to overlap the first touch electrodes, the second touch electrodes being spaced apart from the first touch electrodes, wherein the first touch electrodes are implemented by patterning the second pixel electrode in the first direction, and wherein while a touch driving signal is supplied to one or more first touch electrodes among the first touch electrodes, a second pixel power source is supplied to remaining first touch electrodes. |
| US09501161B2 |
User interface for facilitating character input
Embodiments of the present invention disclose a user interface for facilitating touch input. According to one example, a single desired character is determined upon a touch input being received within at least one area of the user interface. The desired character is appended to an input word string. Furthermore, the input word string and a single desired character are displayed in distinct adjacent areas on the user interface. |
| US09501158B2 |
Storage medium having stored thereon information processing program and information processing apparatus
A data obtaining unit repeatedly obtains acceleration data. An acceleration vector generation unit generates first acceleration vector in accordance with first acceleration data obtained by the data obtaining unit, and generates second acceleration vector in accordance with second acceleration data time-sequentially obtained by the data obtaining unit following the first acceleration data. A cross product direction calculation unit calculates a direction of a cross product between the first acceleration vector and the second acceleration vector. A swing direction identification unit identifies a swing direction in which the input device is swung in accordance with the direction of the cross product. |
| US09501154B2 |
Interactively stylizing camera motion
The subject disclosure is directed towards modifying the apparent camera path from an existing video into a modified, stylized video. Camera motion parameters such as horizontal and vertical translation, rotation and zoom may be individually modified, including by an equalizer-like set of interactive controls. Camera motion parameters also may be set by loading preset data, such as motion data acquired from another video clip. |
| US09501152B2 |
Free-space user interface and control using virtual constructs
During control of a user interface via free-space motions of a hand or other suitable control object, switching between control modes may be facilitated by tracking the control object's movements relative to, and its penetration of, a virtual control construct (such as a virtual surface construct). The position of the virtual control construct may be updated, continuously or from time to time, based on the control object's location. |
| US09501151B2 |
Simultaneous multi-user marking interactions
A method to provide simultaneous interaction with content while not disturbing the content being provided is disclosed. Content may be provided to a group of users. At least one of the users may make a gesture. The gesture may be associated with a user identifier and with a content identifier. An event may be stored based on the gesture from the at least one of the users, the user identifier, and the content identifier. The event may be selected from the group consisting of: a vote, a purchase decision, a modification of content, an adjustment of a device setting, or a bookmark. A notice may be provided to the at least one user to indicate that the action requested by the gesture was performed. |
| US09501148B2 |
Portable display device and operation detecting method
A portable display device includes: an acceleration sensor; an outputting section outputting a detection signal when a measurement value changes across a reference value; a calculating section calculating a duration time in which the measurement value exceeds the reference value; a judging section judging whether the movement state is due to running based on an occurrence frequency of the movement state and the duration time; a setting section setting a running state when the movement state is due to the running; a calculating section calculating a time interval between the movement states; a continuous tap judging section judging whether the movement states are due to continuous tap operations according to a judgment condition based on the duration time and time interval; and a setting range changing section setting a range of the judgment condition in the running state to be broader than that in a non-running state. |
| US09501146B2 |
Electronic device
An exemplary electronic device includes: a housing; a display configured to display an operation area; a touch screen panel configured to detect at least an input operation made by a user to the operation area; a first vibrator configured to vibrate at least one of the display and the touch screen panel; a second vibrator configured to vibrate the housing; and a vibration controller configured to control vibration of the first vibrator and the second vibrator in accordance with the input operation of the user to the touch screen panel. |
| US09501144B2 |
Method and display apparatus for providing content
A method and display apparatus for providing content are provided. The method for providing content includes displaying a content UI in which a plurality of content is included, detecting an area at which a user gazes in the content UI, determining a preference for gaze content that is present in the area at which the user gazes by measuring user's brainwaves, and providing the content UI based on the determined preference. The user can be provided with the content UI that is configured more intuitively and conveniently according to the user preference. |
| US09501142B2 |
Information processing apparatus and method, information processing system, and providing medium
The invention enables users to virtually attach information to situations in the real world, and also enables users to quickly and easily find out desired information. An IR sensor receives an IR signal transmitted from an IR beacon, and supplies the received signal to a sub-notebook PC. A CCD video camera takes in a visual ID from an object, and supplies the inputted visual ID to the sub-notebook PC. A user inputs, through a microphone, a voice to be attached to situations in the real world. The sub-notebook PC transmits position data, object data and voice data, which have been supplied to it, to a server through a communication unit. The transmitted data is received by the server via a wireless LAN. The server stores the received voice data in a database in correspondence to the position data and the object data. |
| US09501139B2 |
Mobile terminal and control method for the mobile terminal
The present disclosure relates to a mobile terminal capable of image capture and a control method thereof. A mobile terminal according to an embodiment of the present disclosure may include a display unit, a camera arranged with a plurality of lenses along a plurality of lines, a controller configured to display images entered through the plurality of lenses in a preset arrangement on the display unit, and capture at least one of the images entered through the plurality of lenses in response to a capture request being received. |
| US09501137B2 |
Virtual machine switching based on processor power states
Technologies are generally provided to switch virtual machines based on processor power states. In some examples, a virtual machine manager (VMM) may determine that a processor configured to execute a first virtual machine (VM) is to execute a VM switch, and cause the processor to enter a low-power state and store a first VM state. The VMM, which may be a VM itself, may then replace the stored first VM state with a second VM state and cause the processor to exit the low-power state. When the processor exits the low-power state, it may load the second VM state and execute a second VM. |
| US09501133B2 |
Method and apparatus for transitioning a device between operating states to control power consumed by the device
A method including: accounting for a transition time for a device to transition between two of first, second, and powered off states; generating a control signal based on the transition time; receiving, at the device and from a processor, an output signal and the control signal; and consuming power, via the device, while operating in the first state and the second state. The method further includes: in response to the control signal, transitioning the device to the second state based on a frequency of the output signal or the control signal; subsequent to transitioning to the second state, performing a function based on the first output signal; and subsequent to performing the function, generating an output via the device; generating a feedback signal based on the output; and based on the feedback signal, transitioning the device to either the first state or the powered off state. |
| US09501129B2 |
Dynamically adjusting power of non-core processor circuitry including buffer circuitry
In one embodiment, the present invention includes a multicore processor having a variable frequency domain including a plurality of cores and at least a portion of non-core circuitry of the processor. This non-core portion can include a cache memory, a cache controller, and an interconnect structure. In addition to this variable frequency domain, the processor can further have a fixed frequency domain including a power control unit (PCU). This unit may be configured to cause a frequency change to the variable frequency domain without draining the non-core portion of pending transactions. Other embodiments are described and claimed. |
| US09501128B2 |
Cooperative reduced power mode suspension for high input/output (‘I/O’) workloads
Method of cooperative reduced power mode suspension for high input/output (‘I/O’) workloads, including: determining, by a transfer monitoring module, a size of a file to be transferred to a recipient, wherein the recipient includes a central processing unit (‘CPU’) operating in a reduced power mode; determining, by the transfer monitoring module, a desired transfer rate for transferring the file to the recipient; calculating, by the transfer monitoring module, an expected transfer completion time in dependence upon the size of the file and the desired transfer rate; and sending, by the transfer monitoring module, a message to the recipient requesting that the CPU suspend the reduced power mode in dependence upon the expected transfer completion time. |
| US09501126B1 |
Power management in a wireless local area network
A computer readable storage medium or media stores machine readable instructions that, when executed by one or more processors, cause the one or more processors to, while a device in a communication network is operating in a first power management mode, simultaneously monitor for an expiration of a first period of time during which no message traffic is observed at all on a communication channel of the communication network, and an expiration of a second period of time during which no message traffic destined for the device is received by the device via the communication channel of the communication network. The instructions also cause the one or more processors to, responsive to the expiration of the first or second period of time, whichever comes first, initiate operation of the device in a second power management mode. |
| US09501118B2 |
Information handling system multi-purpose connector guide pin structure
A USB Type C connector port adapts to support docking solutions with enhanced power transfer features, including increased power transfer levels supported through a guide pin and connector interface, rapid power transfer configuration changes by applying pre-negotiated power settings, external battery charge and discharge at an information handling system with improved efficiency accomplished by transitioning voltage between native and boosted levels responsive to information handling system load, and robust connector port coupling in a cavity of a connector shell. |
| US09501115B2 |
Optimizing power consumption by dynamic workload adjustment
A method and system for optimizing power consumption of a data center by dynamic workload adjustment. At least one candidate workload solution for the data center is generated. Each candidate workload solution represents a respective application map that specifies a respective workload distribution among application programs of the data center. Workload of the data center is dynamically adjusted from a current workload distribution to an optimal workload solution. The optimal workload solution is a candidate workload solution of the at least one candidate workload solution having a lowest sum of a respective power cost and a respective migration cost. Dynamically adjusting the workload of the data center includes: estimating a respective overall cost of each candidate workload solution, selecting the optimal workload solution that has a lowest overall cost as determined from the estimating, and transferring the optimal workload solution to devices of a computer system for deployment. |
| US09501110B2 |
Adjustable data storage drive module carrier assembly
A data storage sled is provided. The data storage sled includes a circuit card assembly comprising connectors that couple to drive modules and a host connector for coupling the data storage sled to an external connector, an enclosure comprising hinged covers each configured to cover apertures in the enclosure thorough which individual ones of the drive modules can be inserted into an associated connector on the circuit card assembly. The data storage sled also includes drive module mounting assembles configured to hold the individual ones of the drive modules into the associated connector by at least including movable mounting features to accommodate varying lengths among the individual ones of the drive modules. |
| US09501105B2 |
Keyboard for an electronic device
Particular embodiments described herein provide for a keyboard that includes a plurality of keys; and a plurality of key actuators. At least a portion of the key actuators raises at least a portion of the plurality of keys when the portion of the plurality of key actuators is activated. In more particular embodiments, the dome supports comprise a dielectric that deforms in a ‘z’ direction with respect to the keyboard when activated to raise the portion of the plurality of keys. |
| US09501103B2 |
Detachable computer with variable performance computing environment
Computing devices are often designed in view of a particular usage scenario, but may be unsuitable for usage in other computing scenarios. For example, a notebook computer with a large display, an integrated keyboard, and a high-performance processor suitable for many computing tasks may be heavy, large, and power-inefficient; and a tablet lacking a keyboard and incorporating a low-powered processor may improve portability but may present inadequate performance for many tasks. Presented herein is a configuration of a computing device featuring a display unit with a resource-conserving processor that may be used independently (e.g., as a tablet), but that may be connected to a base unit featuring a resource-intensive processor. The operating system of the device may accordingly transition between a resource-intensive computing environment and a resource-conserving computing environment based on the connection with the base unit, thereby satisfying the dual roles of workstation and portable tablet device. |
| US09501101B2 |
Bag computer display panel frame
The disclosed invention is a frame used to mount a display to a bag or other object. The frame includes a prop to press against the bag front and hold a display angle relative to the bag. The frame may be adapted to hold thin film display and touch control units, may be light weight and hollow, may include a camera or other tools and may be in two parts to hold the display/control unit. The frame may include finger guides on its back side, may be shaped to fit the operator's hands and may be adapted to attach to the object using an attachment flap. |
| US09501099B2 |
Electronic device
An electronic device is provided. The electronic device can include one or more protrusions and a casing. The casing can be shaped and dimensioned to carry the audio output portions. The casing can include a first face, a second face and sides. The one or more protrusions can extend from any of, or any combination of, the first face, the second face and at least one of the sides. |
| US09501096B2 |
Display positioning system
The present disclosure relates to technology for positioning a display for interaction and/or virtualization of tangible interface objects. According to an example embodiment, a display positioning system includes a display stand including a positioning portion having a recess, supports connected to the positioning portion, and an insert. The supports are configured to cooperatively support the positioning portion when situated on a support surface. The insert may include an elongated body configured to slidably insert into the recess, the recess may be configured to receive and removably retain the insert, the insert and recess being correspondingly shaped. The elongated body may include an upwardly facing surface having a concavity shaped to receive and removably retain at least an edge portion of a computing device display when the insert is inserted into the recess of the display stand and equipped with the computing device display. |
| US09501095B2 |
Display device
A display device prevents a foreign material from entering from a gap formed between an adhesive member and a chassis, said gap being formed due to having a structure simplified. The upper surface of a resin chassis, said upper surface facing a touch panel, is provided with steps having a height equal to a thickness of a double-sided tape or less. The double-sided tape is disposed in a region, which is at the lower level of the steps. In a region where and end portion of the double-sided tape is disposed, wall at a level equivalent to the upper level of the steps is provided such that double-sided tapes and a display device are spatially separated from each other. |