| Document | Document Title |
|---|---|
| US09419705B2 |
Radio communication apparatus for retransmitting data
A radio receiving apparatus for receiving the variable-length RLC PDU data in an RLC layer includes the buffer memory sectioned into a plurality of areas having a predetermined maximum data length of the RLC PDU data. By referring to a sequence number SN included in each received RLC PDU data, the radio receiving apparatus stores the RLC PDU data having an identical sequence number SN into an identical area, and assembles an RLC SDU data on a basis of the RLC PDU data stored in each area. |
| US09419701B2 |
Real-time signal validation method and system
Systems and methods for real-time signal validation are disclosed. In an example embodiment, a subset of terminals in a peer group of satellite terminals is determined. Operational statistics of the satellite terminals in the subset of terminals is measured. Operational statistics of each of the satellite terminals in the subset of terminals is compared to a prior measurement of the same operational statistics. An offset between a current measurement of the operational statistics and the prior measurement of the same operational statistics is determined. An average offset of the current measurement of the operational statistics and the prior measurement of the same operational statistics is determined for the subset of terminals. The average offset for the subset of terminals is merged with a previously determined peer group operational statistic. A signal validation of a terminal is performed using an updated deviation value. |
| US09419700B2 |
Method for wireless communication based on relay and apparatus for the same
Methods for wireless communications based on relay and apparatuses for the same are disclosed. The method for a terminal to transmit signals comprises receiving scheduling information from a base station connected to the terminal; generating uplink data based on the scheduling information; performing punctuation on a data symbol positioned in a region through a downlink synchronization signal is transmitted in the generated uplink data; and transmitting the punctured uplink data. Therefore, the terminal may acquire synchronization signal easily, and perform neighbor cell search correctly based on the acquired synchronization signal. |
| US09419699B2 |
MU-MIMO protocol efficiency
A method for improving multiple-user (MU) multiple-input-multiple-output (MIMO) protocol efficiency includes transmitting an MU frame to multiple devices. The MU frame is beamformed to enable a corresponding one of the devices to receive an intended stream at high power. The MU frame includes an additional sounding-field. Acknowledgement (ACK) responses are received from at least some of the plurality of devices. Each of the ACK responses includes a sounding response frame including a channel feedback. |
| US09419698B2 |
Antenna calibration method, system and apparatus
An embodiment of the present invention relates to the technical field of wireless communications, in particular to an aerial calibration method, system and device. In the prior art, an air interface calibration method involving a user equipment (UE) requires the UE to feed back a channel coefficient, and a channel coefficient direct quantization method occupies a great deal of uplink overhead and reduces system efficiency. The present invention solves the above problem. The method in the embodiment of the present invention comprises: the UE measures a downlink channel and determines a downlink channel matrix; the UE determines a first weighting matrix for aerial calibration according to the downlink channel matrix; the UE notifies a network side of the determined first weighting matrix. In the embodiment of the present invention, a UE decomposes the characteristic value of the downlink channel matrix, or reports the identifier corresponding to the first weighting matrix to the network side device, thus reducing the occupied uplink overhead and improving system efficiency. |
| US09419697B1 |
Antenna diversity system and method
A system including a diversity module and an antenna selection module. The diversity module is configured to measure i) a first signal-to-noise ratio and a first error rate for a first signal received via a first antenna, and ii) a second signal-to-noise ratio and a second error rate for a second signal received via a second antenna. The antenna selection is module configured to select the first antenna or the second antenna by comparing i) the first signal-to-noise ratio to the second signal-to-noise ratio, and ii) the first error rate to the second error rate. |
| US09419695B2 |
Method and arrangement for adapting a multi-antenna transmission
A method in a first node for adapting a multi-antenna transmission to a second node over a wireless channel is provided. The wireless channel has at least three inputs and at least one output. The first node and the second node are comprised in a wireless communication system. The method includes obtaining at least one symbol stream, determining a precoding matrix having a product structure created by a block diagonal matrix being multiplied from the left with a block diagonalizing unitary matrix, precoding the at least one symbol stream with the determined precoding matrix, and transmitting the precoded at least one symbol stream over a wireless channel to the second node. |
| US09419694B2 |
Beamforming using base and differential codebooks
Embodiments of methods and apparatus for determining and/or quantizing a beamforming matrix are disclosed. In some embodiments, the determining and/or quantizing of the beamforming matrix may include the use of a base codebook and a differential codebook. Additional variants and embodiments are also disclosed. |
| US09419692B2 |
Antenna control
An apparatus, method and system for transmission are described herein. For example, apparatus can include a synthesis engine, a power supply and a multiple input single output (MISO) operator. The synthesis engine is configured to generate amplitude control signals, phase control signals and power supply control signals based on command and control information. The power supply is configured to receive the power supply control signals and to generate a power supply signal. Further, the MISO operator is configured to generate an output signal with an amplitude or a phase controlled by at least one of the amplitude control signals, the phase control signals and the power supply signal. |
| US09419682B2 |
Apparatus and method for providing near field communication for mobile device
An apparatus for providing near field communication (NFC) for a mobile device, includes a USB (universal serial bus) signal processing unit configured to convert a signal of the mobile device, which is received through a USB interface into a value to be processed in a central processing unit, and convert a value received from the central processing unit into a signal to be transmitted to the USB interface. Further, the apparatus includes an analog signal processing unit configured to convert an analog signal received from an outside device into a digital signal, and convert a digital signal of the central processing unit into an analog signal to transmit the converted analog signal to the antenna. |
| US09419676B2 |
Pilot transmission and channel estimation for a communication system utilizing frequency division multiplexing
A receiver for receiving a pilot generated based on a polyphase sequence having a constant time-domain envelope and a flat frequency spectrum is disclosed. In one design, the receiver includes at least one demodulator and at least one processor. The demodulator(s) receive at least one single-carrier frequency division multiple access (SC-FDMA) symbol transmitted via a communication channel and including pilot symbols generated based on a polyphase sequence. The demodulator(s) remove a cyclic prefix in each SC-FDMA symbol and demodulate the at least one SC-FDMA symbol to obtain received pilot symbols. The processor(s) derive a channel estimate for the communication channel based on the received pilot symbols. |
| US09419673B2 |
Millimeter band transmitting/receiving system
In the field of millimeter band transmitting/receiving systems for a high-speed contactless transmission, an architecture is provided with a common processing circuit supplying modulation signals and a plurality of transmitting/receiving integrated circuits, all identical to one another, receiving these signals, and also a common clock. The transmitting/receiving integrated circuits each comprise: an oscillator locked with the clock signal to produce a carrier frequency, a transmit channel comprising a first controllable phase shift circuit, a frequency transposition to the carrier frequency, and a power amplifier, a receive channel comprising a low noise amplifier, a frequency transposition from the carrier frequency, and a second controllable phase shift circuit. An antenna is associated with each transmitting/receiving circuit. |
| US09419672B2 |
Wireless communication device and wireless communication method
A wireless communication device has a first wireless communication unit and a second wireless communication unit. A controller of the wireless communication device is configured to set a communication mode of the first wireless communication unit to a normal mode and a high-quality mode. A communication condition using the first wireless communication unit is detected, and whether the particular value is in a particular range indicating certain communication condition or not is determined. When a particular value is in not the particular range, and when the second wireless communication unit is currently in communication with the second external device, the communication mode of the first wireless communication unit is switched to a high-quality mode. |
| US09419669B2 |
Case for an electronic device and manufacturing methods for making a case
An accessory unit includes a front flap and a rear cover. The rear cover includes a recessed portion that defines a chamber and a lip that extends about an opening of the chamber. The chamber is configured to receive a consumer electronic device, and the lip is configured to hold the consumer electronic device therein. The rear cover can include a shell formed from glass fiber reinforced plastics and a lip formed from a thermoplastic. The front flap may include segments formed from panels with folding regions therebetween, which allow the front flap to fold. Further, an end region of the front flap hingedly couples the front flap to the rear cover, such that the front flap may be moved between open and closed configurations. Methods of manufacturing the accessory unit are also disclosed. |
| US09419667B2 |
Apparatus and methods related to conformal coating implemented with surface mount devices
Disclosed are apparatus and methods related to conformal coating of radio-frequency (RF) modules. In some embodiments, a module can include an overmold formed over an RF component mounted on a packaging substrate. The overmold can also cover a surface-mount device (SMD) such as an RF filter implemented as a chip size surface acoustic wave (SAW) device (CSSD). The module can further include a conductive layer formed over the overmold and configured to provide RF shielding functionality for the module. The conductive layer can be electrically connected to a ground plane of the packaging substrate through the SMD. An opening can be formed in the overmold over the SMD; and the conductive layer can conform to the opening to electrically connect the conductive layer with an upper surface of the SMD and thereby facilitate the grounding connection. |
| US09419665B2 |
Alternate user interfaces for multi tuner radio device
A method, device, system, and media are directed to controlling a multi-tuner radio. A voice command may be received and/or filtered. An operation of the radio may be modified based on the voice command. A gesture input may be received through a gesture pad. Another operation of the multi-tuner radio may be modified based on the received gesture input. A fingerprint may be recognized with a gesture pad. A user may be authenticated based on the recognized fingerprint. The operation or the other operation may be personalized based on the fingerprint. User training may be provided for the gesture input. |
| US09419663B2 |
High-speed signaling systems and methods with adaptable, continuous-time equalization
A receiver includes a continuous-time equalizer, a decision-feedback equalizer (DFE), data and error sampling logic, and an adaptation engine. The receiver corrects for inter-symbol interference (ISI) associated with the most recent data symbol (first post cursor ISI) by establishing appropriate equalization settings for the continuous-time equalizer based upon a measure of the first-post-cursor ISI. |
| US09419662B2 |
High-voltage radio-frequency attenuator
A variable attenuator can be used with high-voltage radio-frequency signals. The attenuator can provide wide dynamic range with little loss at the lowest attenuation level. The attenuator may be implemented in digital integrated circuit processes and occupies small integrated circuit area. Additionally, the use of circuit elements external to the SoC may be reduced. The attenuator uses multiple attenuator cells connected in parallel to an RF input and RF output. The attenuator cells use capacitive dividers with pair of capacitors laid out in the same integrated circuit area. The capacitors are also laid out so that the RF input shields the RF output from ground to avoid parasitic capacitance on the RF output. |
| US09419661B2 |
Impulse noise mitigation under out-of-band interference conditions
An impulse noise mitigation circuit (INMC) may set a cut-off frequency of each of two high pass filters to bound a frequency bandwidth of a desired signal, wherein a first of the two filters allows frequencies higher than the frequency bandwidth of the desired signal, and a second of the two filters allows frequencies lower than the frequency bandwidth of the desired signal. The INMC may compute and store a mean magnitude separately for a first signal response of the first filter and a second signal response of the second filter. The INMC may select the first filter for impulse noise mitigation when the mean magnitude of the second filter is greater than the mean magnitude of the first filter. The INMC may select the second filter for impulse noise mitigation when the mean magnitude of the first filter is greater than the second filter. |
| US09419660B2 |
Signal receiver with a duty-cycle controller
The signal receiver has means to suppress at least one higher harmonic component from a MEMS or crystal oscillator having a reference resonator in filtered intermediate signals of a signal receiver. The signal receiver comprises an antenna for receiving electromagnetic signals, a low noise amplifier for amplifying signals received by the antenna, one MEMS or crystal oscillator comprising a reference resonator to generate an oscillating signal with a predefined duty-cycle, a mixer for mixing the amplified and received signals with the oscillating signal to generate intermediate signals, a band-pass filter to filter the intermediate signals, and a duty-cycle controller coupled to the MEMS or crystal oscillator and coupled to the output of the band-pass filter to analyze the spectrum of the filtered intermediate signals and to modify the duty-cycle of the oscillating signal in response to the spectrum analysis of the filtered intermediate signals. |
| US09419657B1 |
Hybrid I/Q and polar transmitter
A hybrid polar I-Q transmitter includes an I-Q derivation circuit configured to receive a first and second I-Q data components comprising a first I-Q data pair, and generate a first and second I-Q derived data components comprising a second I-Q data pair, respectively, based thereon, by utilizing a resolution information of a digital-to-analog converter (DAC) and a design criteria. The I-Q derivation circuit is further configured to determine a residual angle corresponding to a phase angle difference between the first I-Q data pair and the second I-Q data pair. The hybrid polar I-Q transmitter further comprises a modulation circuit configured to compensate the determined residual angle corresponding to the phase angle difference between the first I-Q data pair and the second I-Q data pair. |
| US09419656B2 |
Decoder and method for decoding an encoded sequence of bits
A decoder including an input, a branch metric unit, a path metric unit, a starting state unit, and a tail path forcing unit, or alternatively, a state consistency unit. The input is configured to receive a encoded sequence of bits. The branch metric unit is configured to determine a plurality of branch metrics for a plurality of respective transitions between a plurality of states in a trellis representation of a code used to generate the encoded sequence of bits. The path metric unit is configured to determine, based on the plurality of branch metrics, path metrics corresponding to a plurality of maximum likelihood survival paths reaching the plurality of respective states in the trellis representation. The starting state unit is configured to store a plurality of starting states for the respective maximum likelihood survival paths. The tail path forcing unit is configured to select a tail path of a maximum likelihood survival path at a w number of states prior to this maximum likelihood survival path's ending state in the trellis representation to result in this maximum likelihood survival path's stored starting and ending states being the same, wherein w is equal to a constraint length of the decoder minus one. The state consistency unit is configured to determine whether a maximum likelihood survival path has an ending state in the trellis representation that is equivalent to its stored starting state, wherein if the state consistency unit's determination is positive, the branch metric unit and path metric unit are configured to end the determinations of the branch and path metrics. |
| US09419653B1 |
Systems and methods for combining constrained codes and error correcting codes
Methods and systems are provided for encoding and/or decoding data based on a constrained code and an error correction code (ECC). The data is encoded to generate combined LDPC-constrained codewords that may substantially satisfy both an ECC structure condition and a constrained code condition. A first plurality of sequences may be generated from input data to satisfy the constrained code condition. The first plurality of sequences may then be mapped to a second plurality of sequences that satisfies the ECC condition while preserving the constrained code condition. |
| US09419652B2 |
BCH decoding method and decoder thereof
The present disclosure illustrates a BCH decoding method and a decoder thereof. In this BCH decoding method, the BCH decoder receives an encode data at first, then calculates a syndrome of the encode data. After calculating the syndrome of the encode data, the BCH decoder calculates at least one error location of the encode data in response to the syndrome. Next, the BCH decoder detects at least one determining bit which a first bit string of the encode data comprises. The determining bit is configured for operatively determining whether to continue decoding the encode data. Finally, when the determining bit is detected, an error correction is then performed based upon the error location, such that the BCH decoder outputs decode data. |
| US09419649B1 |
Encoding method and encoding device
An encoding device searches input text data for a date-time notation string that represents at least a date or time. The encoding device generates, upon finding the date-time notation string by the search unit, a converted date and time code including an identification code for identifying the date-time notation string and a normalized date and time notation formed by converting the date-time notation string into a specific date-time notation format. The encoding device converts the input text data based on conversion information that associates the converted date-time code generated by the generation unit with the date-time notation string. |
| US09419648B1 |
Supporting data compression using match scoring
In one embodiment, a processing system is provided. The processing system includes a memory for storing an input bit stream and a processing logic coupled to the memory. The processing logic to identify, within the input bit stream, a first bit subsequence of an input bit sequence and a second bit subsequence of the input bit sequence. A first score reflecting the length of the first bit subsequence and the distance between the input bit sequence and the first bit subsequence and a second score reflecting the length of the second bit subsequence, within the input bit stream, and the distance between the input bit sequence and the second bit subsequence is determined. In view of the first score and the second score, one of the first bit subsequence or the second bit subsequence is selected. A code representing a selected bit subsequence is appended to an output bit sequence. |
| US09419647B2 |
Partitioned data compression using accelerator
In an embodiment, a processor includes a compression accelerator coupled to a plurality of hardware processing cores. The compression accelerator is to: receive input data to be compressed; select a particular intermediate format of a plurality of intermediate formats based on a type of compression software to be executed by at least one of the plurality of hardware processing cores; perform a duplicate string elimination operation on the input data to generate a partially compressed output in the particular intermediate format; and provide the partially compressed output in the particular intermediate format to the compression software, wherein the compression software is to perform an encoding operation on the partially compressed output to generate a final compressed output. Other embodiments are described and claimed. |
| US09419646B2 |
Hardware compression to find backward references with multi-level hashes
Concurrently writing an uncompressed data element, if the uncompressed data element comprises an indication that it is valid, in a main hash table using a first address generated by a first hash function, and reading a first data element from the main hash table using the first address. Introducing a first pipeline delay for maintaining the uncompressed data element in a first data path until the first data element is read. Concurrently writing the first data element to a victim hash table, if the first data element comprises an indication that it is valid, using a second address generated by a second hash function, and reading a second data element from the victim hash table using a third address generated by the second hash function. Introducing a second pipeline delay for maintaining the uncompressed data element in the first data path until the second data element is read. |
| US09419639B1 |
Low distortion sample and hold switch
Devices and methods for analog to digital conversion are provided. The device can have a supply voltage coupled to a bootstrap circuit operable to provide a boosted voltage during a first period defined by a sample phase (Ps) signal and a hold phase (Ph) signal. The device can also have a sampling circuit having an input node and operable to sample an input signal supplied to the input node. The device can also have a switching circuit having a first switch and a second switch. The switching circuit can be coupled to the bootstrap circuit and to the sampling circuit. The switching circuit can be configured to isolate the input node from shorting currents to the supply voltage for a portion of the first period. |
| US09419632B1 |
Charge pump for use in phase-locked loop
A charge pump includes a switching circuit, a constant current source, a constant current sink, an adaptive current source, and an adaptive current sink. The switching circuit generates an output voltage at an output node according to an up control signal and a down control signal. The constant current source supplies a first current to the switching circuit. The constant current sink draws a second current from the switching circuit. The adaptive current source supplies a third current to the switching circuit. The adaptive current sink draws a fourth current from the switching circuit. The third current and the fourth current are adjustable according to the up control signal and the down control signal. |
| US09419628B2 |
Measurement initialization circuitry
Measurement initialization circuitry is described. Propagation of a start signal through a variable delay line may be stopped by either of two stop signals. One stop signal corresponds to a rising edge of a reference clock signal. A second stop signal corresponds to a falling edge of the reference clock signal. The start signal propagation is stopped responsive to the first to arrive of the first and second stop signals. Accordingly, in some examples, start signal propagation through a variable delay line may be stopped responsive to either a rising or falling edge of the reference clock signal. |
| US09419622B2 |
Semiconductor device
To provide a semiconductor device in which signal-transmission speed between a first logic element and a second logic element is not lowered. The semiconductor device includes a first switch between the first logic element and the second logic element, and configuration to the first switch is repeatedly performed until configuration is performed on the first switch while a low-level voltage is input to the first switch from the first logic element. |
| US09419621B1 |
System on chip and method of operating a system on chip
The present application describes a SoC device with observer units for monitoring a state of a respective functional unit of the SoC combiner units for generating combinational events based on one or more observer events issued by the observer units and one or more feedback events from issued by action units and action units for generating feedback events and/or action request based the on at least one combinational event. |
| US09419617B2 |
Circuit for reducing negative bias temperature instability
A circuit comprises a control circuit having an output node. The circuit also comprises a half latch keeper circuit coupled to the control circuit. The half latch keeper circuit is configured to control the output node during a standby mode. The circuit also comprises a transistor coupled to the output node. The control circuit is configured to turn off the transistor during the standby mode. |
| US09419614B2 |
Low-power open-circuit detection system
An open-circuit detection system for an integrated circuit (IC) includes a wire (e.g., part of a wire mesh for device protection) and circuitry for detecting open-circuit conditions in the wire. A first signal generator (e.g., a linear-feedback shift register) applies a binary sequence to a first end of the wire. Switched resistors are connected between a second end of the wire and both a voltage supply and ground. A comparator compares the binary sequence and a signal based on the voltage at the second end of the wire to check for the open-circuit condition. Logic circuitry closes one of the first and second switches as a function of a value in the binary sequence. The comparator checks for the open-circuit condition in the wire randomly and intermittently, which reduces power consumption. |
| US09419612B2 |
Touch panel
A touch panel includes a first substrate and a plurality of conductive electrodes. The conductive electrodes are located at the first substrate, and each of the conductive electrodes includes at least one mesh electrode. Each of the mesh electrodes includes a plurality of conductive patterns, and the conductive patterns of the same mesh electrode are connected together. Each of the conductive patterns has a central point, and distances from the central point of each of the conductive patterns to the central points of adjacent conductive patterns are incongruent, such that the conductive patterns are arranged in an irregular manner. |
| US09419605B2 |
Composite semiconductor switching device
A composite semiconductor switching device includes: a first semiconductor element that incurs switching losses when performing switching operation of turning on and off; a second semiconductor element that is parallelly connected to the first semiconductor element and incurs switching losses larger than the first semiconductor element when performing switching operations of turning on and off; and a controller that operates in order of giving a first on-command signal to the first semiconductor element, giving a second on-command signal to the second semiconductor element, deactivating the first on-command signal, giving a third on-command signal to the first semiconductor element, and deactivating the second on-command signal. |
| US09419603B2 |
Gate driver, driving method thereof, and control circuit of flat panel display device
The present invention discloses a gate driver which employs gate pulse modulation technology for improving an image quality, a driving method thereof, and a control circuit of a flat panel display device employing the gate driver. The gate driver is configured to modulate a gate pulse therein, and output the modulated gate pulse. |
| US09419598B2 |
In-situ delay element calibration
A controllable delay element includes a delay element to provide a variable delay from an input signal to an output signal. The variable delay can be controlled by a digital delay input. The delay element has a delay range that is controlled in response to a delay range input. The delay range of the delay element can be calibrated to a desired range of delays in response to a relative delay between a first timing reference and a second timing reference. A common timing reference is applied to a plurality of receivers and a strobe receiver. The delay through the strobe receiver is adjusted to measure the delay mismatches between the plurality of receivers. The mismatches are used to select a value for the delay through the strobe receiver. |
| US09419593B2 |
Current mode logic circuit for high speed input/output applications
A CML latch includes an input stage including input nodes to receive a differential input signal and output nodes to provide a differential intermediate output signal, and a negative output node to provide a negative side of the differential intermediate output signal, a negative resistance stage including an input node connected to a first voltage source and output nodes connected to the output nodes of the input stage, and a latch stage including input nodes connected to the output nodes of the input stage and output nodes to provide a differential output signal. The negative resistance stage increases a current gain of the input stage. |
| US09419591B2 |
Controllable wide frequency range oscillator
A circuit includes a ring oscillator that includes a plurality of delay stages coupled in series to generate an output frequency for the ring oscillator. A capacitive array is operatively coupled between a supply rail and a power rail for each of the delay stages to supply power to the delay stages. The capacitive array selectively adjusts the output frequency of the ring oscillator via a capacitive setting of the capacitive array. |
| US09419590B2 |
Low power toggle latch-based flip-flop including integrated clock gating logic
Inventive aspects include integrated clock gating logic that can generate an internal glitch-free clock signal. Inventive aspects further include a toggle latch that is coupled to the integrated clock gating logic. The toggle latch can receive the internal clock signal from the integrated clock gating logic. The toggle latch can toggle and latch a data value responsive to the internal clock signal. The integrated clock gating logic can include a latch to latch a clock gating logic signal responsive to a clock signal. The clock gating logic signal can cause the internal clock signal to be quiescent when the input data to the flip-flop remains constant, thereby conserving power consumption. |
| US09419588B1 |
Output driver having output impedance adaptable to supply voltage and method of use
An output driver is provided that adapts an output impedance of the output driver to the voltage level of a power supply, thereby providing a constant output impedance over a range of different operating voltages. The output driver includes a plurality of individual driver circuits, each one of the plurality of individual driver circuits configured to provide a plurality of predetermined output impedances in response to a plurality of power supply voltage level inputs and a decoder. The decoder of the output driver is configured for receiving a digital codeword representative of a voltage level of a power supply coupled to the output driver and for decoding the digital codeword to activate one or more of the individual driver circuits to provide a constant output impedance from the output driver in response to the voltage level of the power supply coupled to the output driver, wherein the constant output impedance is a combination of the predetermined output impedances of the activated individual driver circuits. |
| US09419583B2 |
Nano- and micro-electromechanical resonators
A resonator includes a piezoelectric plate and interdigitated electrode(s). The interdigitated electrode includes a plurality of conductive strips disposed over a top surface of the piezoelectric plate. A two-dimensional mode of mechanical vibration is excited in a cross sectional plane of the piezoelectric plate in response to an alternating voltage applied through the interdigitated electrode. The two-dimensional mode of mechanical vibration is a cross-sectional Lamé mode resonance (CLMR) or a degenerate cross-sectional Lamé mode resonance (dCLMR). |
| US09419579B2 |
Band pass filter circuit and multilayer band pass filter
A band pass filter circuit includes an input terminal, an output terminal, a signal line, and a plurality of main LC parallel resonators. First ends of the plurality of main LC parallel resonators are connected to the signal line, and second ends of the plurality of main LC parallel resonators are connected to one another. At least one attenuation-pole-defining sub LC parallel resonator including an inductor and a capacitor is inserted between a ground and the connected second ends of the plurality of main LC parallel resonators. |
| US09419578B2 |
Tunable RF filter paths for tunable RF filter structures
This disclosure relates generally to radio frequency (RF) filter structures. In one embodiment, an RF filter structure includes a first resonator and a second resonator. The second resonator is operably associated with the first resonator such that an energy transfer factor between the first resonator and the second resonator is less than 10%. The first resonator includes a first inductor and a first capacitive structure electrically connected to the first inductor, while the second resonator has a second inductor and a second capacitive structure electrically connected to the second inductor. A displacement between the first inductor and the second inductor is less than or equal to half a maximum lateral width of the second inductor. To set an electric coupling coefficient, a first cross-coupling capacitive structure is electrically connected between the first resonator and the second resonator. |
| US09419577B2 |
Techniques for distortion reducing multi-band compressor with timbre preservation
Distortion reducing multi-band compressor with timbre preservation is provided. Timbre preservation is achieved by determining a time-varying threshold in each of a plurality frequency bands as a function of a respective fixed threshold for the frequency band and, at least in part, an audio signal level and a fixed threshold outside such frequency band. If a particular frequency band receives significant gain reduction due to being above or approaching its fixed threshold, then a time-varying threshold of one or more other frequency bands are also decreased to receive some gain reduction. In a specific embodiment, time-varying thresholds can be computed from an average difference of the audio input signal in each frequency band and its respective fixed threshold. |
| US09419573B2 |
Variable gain transimpedance amplifier
Embodiments of variable gain transimpedance amplifiers are described. In an embodiment, the variable gain transimpedance amplifier may include an amplifier coupled to an adjustable gain feedback network, the adjustable gain feedback network including a selectable set of Resistor-Capacitor (RC) branches, each RC branch having one or more unit RC elements, each unit RC element being comprised of a unit resistor and a unit capacitor arranged in parallel. |
| US09419572B2 |
Audio device and audio utilization method having haptic compensation function
The present invention discloses an audio device having haptic compensation function capable of compensating a haptic effect according to a power measuring result and an audio signal. An embodiment of the audio device comprises: an audio signal generating circuit operable to generate an audio signal; a power measuring circuit operable to measure a remaining electric quantity of a power source and thereby generate a power measuring result; and a haptic compensating circuit, coupled to the audio signal generating circuit and the power measuring circuit, operable to adjust a gain of the audio signal or the derived signal thereof according to the power measuring result and thereby output a haptic compensation signal which is used to compensate the haptic effect. |
| US09419571B2 |
Precision, high voltage, low power differential input stage with static and dynamic gate protection
A precision, high voltage, low power differential input stage including static and dynamic gate protection is disclosed herein. The differential input stage incorporates the performance of low voltage transistors with the high voltage capability of high voltage transistors. The transistors may be MOSFETs or the like. In addition, gate protection is provided to protect against large DC voltages and AC voltage transitions. The differential input stage includes a pair of input circuits, such as positive and negative input circuits, each including a cascode combination of low and high voltage transistors. In each cascode stage, the low voltage transistor is fabricated with a gate threshold voltage that is as high or higher than that of the high voltage transistors. The low voltage, high threshold transistors in the cascode stages may be configured to match each other. Resistors and capacitors may be provided to protect against excessive input current and voltage. |
| US09419569B2 |
Method and system for a pseudo-differential low-noise amplifier at Ku-band
Methods and systems for a pseudo-differential low-noise amplifier at Ku-band may comprise a low-noise amplifier (LNA) integrated on a semiconductor die, where the LNA comprises differential pair transistors with an embedded inductor tail integrated on the semiconductor die. The embedded inductor tail may comprise: a first inductor with a first terminal capacitively-coupled to a gate terminal of a first transistor of the differential pair transistors and a second terminal of the first inductor coupled to second, third, and fourth inductors. The second inductor may be coupled to a source terminal of the first transistor of the differential pair transistors, the fourth inductor may be coupled to a source terminal of the second transistor of the differential pair transistors, and the third inductor may be capacitively-coupled to a gate terminal of the second transistor of the differential pair transistors and also to ground. The second inductor may be embedded within the first inductor. |
| US09419568B2 |
Circuits and methods related to power amplifier efficiency based on multi-harmonic approximation
Circuits and methods related to power amplifier efficiency based on multi-harmonic approximation. In some embodiments, an output network circuit can be provided for multi-harmonic control of a radio-frequency (RF) power amplifier. The output network circuit can include an impedance matching network configured for a fundamental frequency of the power amplifier. The output network circuit can further include a broadband harmonic trap in communication with the impedance matching network. The broadband harmonic trap can be configured to substantially trap a plurality of harmonics associated with the fundamental frequency. The output network circuit can further include a dipole network in communication with the broadband harmonic trap. The dipole network can be configured to tune reactances resulting from the operation of the broadband harmonic trap. |
| US09419555B2 |
Synchronous machine control apparatus
A synchronous machine control apparatus for correcting a rotor position error that is a difference between a rotor position of a synchronous machine and a rotor position detected by a position detection unit is provided with a current control device for performing control in such a way that respective current command values and respective current detection values in a generation direction (γ axis) of an armature interlinked magnetic flux and in a direction perpendicular (δ axis) to the generation direction of the armature interlinked magnetic flux coincide with each other and with a magnetic flux calculation device for calculating a phase of an armature interlinked magnetic flux, based on an armature current detection value of the synchronous machine and an armature voltage command value therefor; the rotor position error is corrected based on the γδ-axis current command values and a phase of the armature interlinked magnetic flux. |
| US09419553B2 |
Apparatus for controlling rotary machine
In a control apparatus, a target harmonic current obtainer obtains, according to a phase current flowing through at least one phase winding of a stator of a rotary machine, a target harmonic current component flowing in the rotary machine. The target harmonic current component correlates with a fundamental current component of a phase current. An inducing unit superimposes, on at least one of the amplitude and the phase of an output voltage vector of a power converter used by a switching unit, a harmonic signal that changes at an angular velocity identical to an angular velocity of the target harmonic current component. This induces a counteracting harmonic current component in the at least one phase winding. The counteracting harmonic current component counteracts the target harmonic current component. |
| US09419551B2 |
Motor driver and a method of operating thereof
A driver circuit for driving an electrical motor coil is provided which comprises combined switched inductance boost voltage converter circuitry and switched inductance buck voltage converter circuitry. An input node of the driver circuit is provided to be coupled with the electrical motor coil, which provides the inductive element of both the boost and buck circuitry. Further the boost and buck circuitry share a storage capacitor, which provides the capacitive element of each circuitry, and a voltage developed across the storage capacitor by the boost circuitry forms an input of the switched inductance buck voltage converter circuitry. Bidirectional driving of the electrical motor coil is thus provided from a driver circuit which only need be supplied with a single unidirectional supply and the current drawn from that supply is significantly reduced because of the manner in which the boost and buck circuitry operate synergistically to recycle electrical power which is moved back and forth between the electrical motor coil and the storage capacitor. A corresponding driver board, electrical motor driver apparatus, method of operating a driver circuit and apparatus are also provided. |
| US09419540B2 |
Switching power supply circuit
Provided is a switching power supply circuit including an output transistor arranged to be turned on and off to generate a desired output voltage from a pulsating voltage obtained by rectifying an AC input voltage, an oscillator arranged to generate an ON signal at a switching frequency varying periodically in synchronization with the AC input voltage or the pulsating voltage, a controller arranged to generate an OFF signal so that the output voltage is adjusted to a target value while a power factor becomes close to one, a logic circuit arranged to generate a switch control signal in accordance with the ON signal and the OFF signal, and a driver arranged to turn on and off the output transistor in accordance with the switch control signal. |
| US09419539B2 |
Systems and methods for enhanced operation and protection of power converters
An electrical system includes an AC power source and a power converter including at least one first terminal and at least one second terminal. The first terminal is configured to receive voltages with a DC component and the second terminal is configured to receive voltages that have a non-zero time average value including AC and DC components. The electrical system also includes an AC power transmission subsystem coupled to and extending between the AC power source and the power converter. The electrical system further includes a current diversion system including a plurality of first switching devices coupled to the AC power transmission subsystem. The current diversion system also includes a second switching device including a third terminal coupled to the first terminal and a fourth terminal coupled to the second terminal. The second switching device is configured to transmit current only from the third terminal to the fourth terminal. |
| US09419538B2 |
AC/DC power conversion system and method of manufacture of same
A power converter has a transformer having three primary windings configured to receive respective phases of a three-phase alternating current (AC) input signal in a delta configuration and three secondary windings, each split into two portions, wherein the portions are coupled together in a regular hexagon. The power converter includes a rectifier having a first rectifier path coupled between taps of the secondary windings and a positive output of the power converter and a second rectifier path coupled between taps of the secondary windings and a negative output. One of the secondary windings may be reversed with respect to the other secondary windings. The primary windings may be split with a corresponding secondary winding sandwiched between portions of the primary. One of the paths may have a different inductance than the other path. |
| US09419531B2 |
Forward-flyback DC-DC converter using resonant LC output circuit
A forward-flyback DC-DC converter topology includes a transformer, a main switch, a clamp circuit, first and second rectifying switches, an LC resonant circuit and an output capacitor; a primary winding of the transformer and the main switch are connected in series between a first input terminal and a second input terminal, the clamp circuit constituted by a clamp capacitor and a clamp switch connected in series is connected in parallel with the primary winding or with the main switch, a secondary winding of the transformer includes a forward winding and a flyback winding, a terminal of the primary winding through which current flows into is a dotted terminal of the primary winding, and a connecting mode of a secondary side of the transformer is: the dotted terminal of the forward winding being connected with a first output terminal via the first rectifying switch, a dotted terminal of the flyback winding being connected with a second output terminal via the second rectifying switch, the LC resonant circuit being connected with the first and the second output terminals and an unlike terminal of the forward winding and the flyback winding so that the first and the second rectifying switches implement zero-current switching, and the output capacitor being connected between the first and the second output terminals. |
| US09419522B1 |
ZVS DC/DC converter for converting voltage between a battery and a DC link in a hybrid energy storage system and method thereof
The bi-directional DC/DC converter has zero voltage switching (ZVS) soft switching capability resulting in a higher efficiency, and provides reduction of the switching losses due to higher switching frequencies. The capability of operation in higher frequencies results in reducing the size of passive components including inductance and capacitors. The subject DC/DC converter is capable of operating with three voltage levels in both power flow directions, thus providing flexibility in the voltage control and attaining lower inductor current ripple and lower switch voltage ratings. DC link capacitors are replaced with ultra capacitor banks split in two. |
| US09419511B2 |
Capacitor discharging method and discharging circuit thereof
In one embodiment, a method of controlling a capacitor discharge for a switching power supply, can include: (i) generating a first voltage signal from a voltage at an X capacitor that is coupled between input terminals of the switching power supply; (ii) activating a detection signal in response to the first voltage signal being inactive for a duration of a predetermined time interval, where the detection signal being activated indicates a cut-off of the input terminals; and (iii) at least partially discharging the X capacitor after the cut-off and in response to activation of the detection signal. |
| US09419506B2 |
Direct current motor, coil winding method for direct-current motor, and method for manufacturing direct-current motor
A direct-current motor includes a yoke having six magnetic poles, an iron core having nine teeth, first and second coils wound about each tooth in directions different from each other, a commutator for being rotated integrally with the iron core and having eighteen commutator pieces, and three pairs of brushes. The brush having the positive pole electrically connected to the first coil is different from the brush having the positive pole electrically connected to the second coil, the brush having the negative pole electrically connected to the first coil is different from the brush having the negative pole electrically connected to the second coil, or the brush having the positive pole and the brush having the negative pole that are electrically connected to the first coil are respectively different from the brush having the positive pole and the brush having the negative pole that are electrically connected to the second coil. |
| US09419505B2 |
Synchronous motor
A synchronous motor includes a stator with a stator winding, and a rotor on which magnetic poles made of permanent-magnetic material are formed, each pole having a cambered outer contour, especially an outer contour cambered radially outwards, in particular, 2×p individual poles being salient in the circumferential direction, p being the number of pole pairs. |
| US09419502B2 |
Additive manufacturing of a component having a laminated stack of layers
A method of making a component comprises producing a layer of sheet material including an aperture over a movable support. An insulating material is deposited in a first portion of the aperture to form an insulating coating with one or more pockets. A conductive material is deposited in the one or more pockets. Heat and pressure are applied to the layer and the movable support is lowered by a thickness of the layer. The steps are repeated to form a laminated stack defining the component. In some embodiments, the laminated stack of sheet materials forms an induction machine. |
| US09419497B2 |
Double-rotor motor
Provided is a double-rotor type motor including: a stator; a double-rotor that is positioned at a certain gap on an outer surface and an inner surface of the stator; a rotor support on which the double-rotor is integrally formed and a plurality of air passages are radially penetratively formed; and a heat dissipation unit that is integrally formed with the rotor support and that forcibly ventilates outer air into the air passages during rotation of the rotor, to thereby dissipate heat generated from the stator. Thus, outer air may be forcibly ventilated to the stator, to thereby improve the heat dissipation efficiency of the stator. |
| US09419495B2 |
Wind turbine
A wind turbine has a rotor and a generator. A planetary transmission is arranged between the rotor and the generator, the planetary transmission being operatively connected to the rotor and the generator. The planetary transmission has at least one planet gear, at least one planet pin, and a planet carrier, the planet gear being arranged on the planet pin. At least one sliding bearing is arranged between the planet pin and the planet carrier, and the planet gear is rotationally fixed to the planet pin. |
| US09419487B2 |
Rotary electric machine
A rotary electric machine includes: a stator core that is formed of a plurality of split core pieces that are annularly arranged therein, coil conductors being wound around respective split core pieces. One ends of the respective coil conductors which are wound around the respective split core pieces are connected to power supply terminals for corresponding phases, and other ends of the respective coil conductors are connected to each other to form a neutral point, the respective coil conductors are formed of rectangular wires, and the neutral point-side end portions of the respective coil conductors are led to an outside of the stator core from one point on a circumference of the stator core. |
| US09419486B2 |
Housing less transverse flux electrical machine
A housingless transverse flux electrical machine (TFEM) includes a pair of halves adapted to receive therein a plurality of cores and a coil therein. The halves are the exterior boundary for the environment and the TFEM can be in operating configuration without further housing. |
| US09419485B2 |
Coil wire for rotating electrical machine and coil body
A coil wire for a rotating electrical machine forms a coil body wound on teeth of a stator for the rotating electrical machine and includes an element wire assembly and a covering member. The element wire assembly has a plurality of element wires coated with insulation and bound together. The covering member is an electrical conductive member covering around the element wire assembly and provided with a conductive side surface and a slit. The conductive side surface is a surface with which magnetic flux from the teeth is linked when the coil wire is wound on the teeth. The slit is provided on the conductive side surface along a longitudinal direction of the coil wire, and the slit extends from an inner peripheral side to an outer peripheral side of the coil body in an coil end of the coil body. |
| US09419483B2 |
DC electric motor/generator with enhanced permanent magnet flux densities
This disclosure relates in general to a new and improved electric motor/generator, and in particular to an improved system and method for producing rotary motion from a electro-magnetic motor or generating electrical power from a rotary motion input by concentrating magnetic forces due to electromagnetism or geometric configurations. |
| US09419480B2 |
Rotor arrangement and electromechanical transducer having non-parallel permanent magnets
A rotor arrangement includes a support structure providing a mounting surface extending in an axial direction and a circumferential direction. The support structure is adapted to rotate around the axial direction. A first permanent magnet system is arranged at the mounting surface at a first circumferential region. A second permanent magnet system is arranged at the mounting surface at a second circumferential region. A circumferential distance between the first magnet system and the second magnet system at a first axial position differs from the circumferential distance between the first magnet system and the second magnet system at a second axial position. |
| US09419473B2 |
Automatic transfer switch (ATS) bypass switch
An ATS bypass switch includes a draw-out ATS switch; a bypass switch; and a processor structured to automatically control both of the draw-out ATS switch and the bypass switch. |
| US09419463B2 |
Thin film microbattery charge and output control
A control system for charge and output control of a rechargeable thin film microbattery cell comprises a charge control logic component configured to control the level of charge of a thin film microbattery cell, a battery cut-off logic component to cease current draw on the thin battery thin film microbattery cell under predetermined conditions, a mode control logic component operably coupled to the charge control logic component and the battery cut-off logic component to enable operation of the charge control logic component and the battery cut-off logic component under predetermined conditions, and a Switch Capacitor DC-DC Downconverter Component for delivery of voltage external to the system configured to reduce battery output voltage potential by a factor of at least 2:1. Systems operably connected to a rechargeable thin film microbattery cell and powered devices comprising the system and the microbattery cell are also described. |
| US09419462B2 |
Method of laser welding the housing of a rechargeable battery
A rechargeable battery including a housing formed from two components formed from polyphenysulfone plastic. One housing component has a lip that is located inwardly of the other housing component. The housing components are further formed so that photonic energy at a select wavelength passes through the outer component and is absorbed by the lip of the second component. Once a rechargeable cell is placed in in one of the housing components, the housing components are placed together so the lip of the second component abuts an inner surface of the first component. Photonic energy at the select wavelength is directed to the joint between the components. The photonic energy passes through the first component and heats the lip of the second component. The heat causes the lip to melt. The melting plastic forms a hermetic weld between the housing components. |
| US09419461B2 |
Charge and discharge control device, charge control method, discharge control method, and program
When power required by a load is larger than or equal to reception peak-cut power, a secondary battery discharges at a power rate that is larger or equal to a difference between the required power and the reception peak-cut power, and when the required power is smaller than or equal to the reception peak-cut power, the secondary battery discharges at a power rate that is smaller than or equal to the discharge improving power value. When power generated by the load is larger than or equal to transmission peak-cut power, the secondary battery charges at a power rate that is larger or equal to a difference between the regenerative power and the transmission peak-cut power, and when the regenerative power is smaller than or equal to the transmission peak-cut power, the secondary battery charges at a power rate that is smaller than or equal to the charge improving power value. |
| US09419459B2 |
Energy conversion apparatus
Disclosed is an energy conversion apparatus. An energy conversion apparatus may comprise a control part controlling a length of a first time duration in which input current is inputted and accumulated, a length of a second time duration in which the accumulated current is provided to a load, and a length of a third time duration in which inverse current flows; and a DC-to-DC converter including an inductor, a output capacitor, and at least one switching element, wherein the input current is accumulated during the first time duration by switching the at least one switching element according to a control of the control part so as to perform input impedance matching, and the DC-to-DC convert provides a current corresponding to a difference between the accumulated current provided during the second time duration and the inverse current flowing from the output capacitor during the third time duration to the load. |
| US09419458B2 |
Storage system, electronic device, electric vehicle and power system
Discharge is stopped when a voltage of a battery becomes smaller than a defined value or a remaining capacity of the battery reaches 0, and further, when power to a system cannot be maintained, the system is automatically shut down to be put into a shutdown state. When it is determined that the voltage of the battery or an SOC from a battery monitor 11 is smaller than the defined value, a discharge control switch 22 is turned off. A voltage Vx corresponding to a voltage between terminals T1 and T2 is input to an A/D port of a controller 21 and a value thereof is monitored. When it is determined that the voltage Vx input to the A/D port is smaller than a defined value, the controller 21 turns off a switch circuit 12 to turn off power to the battery monitor 11. |
| US09419457B2 |
Method and device with enhanced battery capacity savings
An enhanced battery saving capacity device (200) and method (300) is disclosed. In its simplest form, the method (300) includes the steps of: detecting (310) an off state by detecting a load current below a threshold; and entering (320) a battery saver mode including a duty cycle test period, by: providing a periodic test signal; disconnecting a battery for a first interval of time; and reconnecting the battery for a second interval in synchronization with the periodic test signal, to determine whether the load current exceeds the threshold. The method (300) can reduce power drain when an electronic device is off or stored for an extended period of time. It can also extend the shelf life and minimize the possibility of damage to the life cycle of a battery, by lowering the possibility of severe discharge of a battery. |
| US09419452B2 |
Charging connector overheat detection and protection apparatus
The present invention provides an apparatus that includes a resistive control block (RCB) coupled to data lines of a universal serial bus (USB) connector charging port and is configured to change a level of resistance between the data lines. The apparatus further includes a sensing and adjustment block (SAB) that is configured to sense a predetermined level of overheating of the USB connector charging port and cause the RCB to increase the level of resistance resulting in the USB connector charging port to appear as a different type of port. In another embodiment, an apparatus includes a RCB and SAB. The RCB is coupled to an identification and ground lines of a USB connector and configured to change a level of resistance between them. The SAB is configured to sense a predetermine level of overheating of a USB connector and cause the RCB to decrease the level of resistance. |
| US09419451B2 |
Method and apparatus for charging a battery
A method and apparatus for protecting against certain energy sources used to charge a battery is disclosed. |
| US09419450B2 |
Fast charging of battery using adjustable voltage control
A method for charging at least one lithium ion cell the method includes: (a) applying, to the lithium ion cell, a constant first stage charging current until a first stage charging voltage is about equal to a first stage complete voltage less than a maximum cell voltage, the constant first stage charging current greater than about 1C; and thereafter (b) applying multiple constant second stage charging currents to the lithium ion cell at different current levels, wherein the constant second stage charging currents are applied based on accessing a lookup table that relates at least current, temperature and open source voltage to each other; and thereafter (c) applying, to the lithium ion cell, a constant third stage charging voltage about equal to a complete voltage from the multiple constant second stage charging currents. |
| US09419445B2 |
Method and system for extending battery power at cell sites
The embodiments herein provide a method and system for extending battery power at cell sites. The method for extending battery power at cell sites comprises providing a combination of a valve-regulated lead-acid (VRLA) battery and a Li-ION battery, mixing cell chemistry of the VRLA battery and the Li-ION battery and charging the VRLA-Li-ION battery combination with a single charger circuit. The method further comprises providing a rectifier to both the VRLA battery and the Li-ION battery and activating each battery based on the available power. The Li-ION battery and the VRLA battery are the primary battery and secondary battery. The charging current through the VRLA battery is regulated by varying a pulse width of a high current switch based on the current read through the current sensor attached to a VRLA current path. |
| US09419444B2 |
Wireless charging and communication with power source devices and power charge devices in a communication system
A power source device and a power charge device interoperate according to a wireless charging protocol. The power source device inductively wirelessly transmits charging energy signal via an inductive wireless power transmitting circuit. The power charge device wirelessly receives the inductively wirelessly transmitted charging energy signal via an inductive wireless power receiving circuit. The power charge device transfers wirelessly received charging energy signal to a re-chargeable battery of the power charge device. In response to determining that the power source device and the power charge device are in a charging arrangement, the power source device controls user access to a lockable user interface based on receiving information from the power charge device and can display messages received by the power charge device from a wireless communication network. The power source device can include a personal computing system and the power charge device can include a mobile phone. |
| US09419443B2 |
Transducer sound arrangement for pocket-forming
The present disclosure describes a plurality of transducer arrangements that may be suitable for wireless power transmission based on single or multiple pocket-forming. Single or multiple pocket-forming may include one transmitter and at least one or more receivers, being the transmitter the source of energy and the receiver the device that is desired to charge or power. The transducer arrangements may vary in size and geometry, and may operate as a single array, pair array, quad arrays or any other suitable arrangement, which may be designed in accordance with the desired application. |
| US09419436B2 |
Digital power receiver system
Digital power is regulated by transmitting digital power via a transmission line pair to at least one receiver circuit in a digital power receiving system. The digital power is converted into analog power in the receiver circuit. The analog power is transmitted to at least one power conditioning circuit, and output power is transmitted from the power conditioning circuit. At least one voltage in the digital power receiver system is monitored; and, in response to that monitoring, the output power from the power conditioning circuit is regulated to improve at least one of safety, efficiency, resiliency, control, and routing of power. |
| US09419434B2 |
Power switching apparatus, power supply unit, and computer system
A power switching apparatus includes: a first input terminal to which first power is supplied; a second input terminal to which second power is supplied, the second power having a voltage that is lower than a voltage that the first power has; a first output terminal to supply to an outside the first power supplied to the first input terminal; and a second output terminal to supply to the outside the second power supplied to the second input terminal. First switching means manages the supplying of the second power from the first input terminal to the second output terminal. Second switching means manages the supplying of the second power from the second input terminal to the second output terminal. A processor manages the supplies of the first power and the second power using the first and second switching means. |
| US09419433B2 |
Power supply apparatus relating to DC-DC voltage conversion and having short protection function
A power supply apparatus is provided, and which includes a power conversion circuit, a control chip with soft-start function and a short protection circuit. The power conversion circuit is configured to provide a DC output voltage to a load in response to an output pulse-width-modulation (PWM) signal. The control chip is operated under a DC input voltage, and configured to generate the output PWM signal to control the operation of the power conversion circuit. The short protection circuit is configured to pull-down the level of a soft-start pin of the control chip, so as to substantially/significantly reduce the frequency and duty cycle of the output PWM signal, and then substantially/significantly reduce the current flowing through the shorted load. |
| US09419427B2 |
Device and method for protection from an electric arc
A device for protection against an electric arc in an electric installation comprising: at least one detection apparatus of the electric arc, at least one short-circuiter establishing a short-circuit for extinction of the electric arc, an electronic control unit of the short-circuiter commanding to an established state of said short-circuit in case of detection of the electric arc by the detection apparatus, and a switchgear apparatus for interrupting said short-circuit at the end of a predefined short-circuit time delay as from the time this short-circuit is established. |
| US09419422B2 |
Devices for mounting electrical, audio, and video installations to walls and other flat surfaces
Devices in the form of flush-mounting plates are disclosed which are adapted to connect, for example, one or more receptacles to an electrical box that is disposed inside of a wall. Such flush-mounting plates include a back side that is adapted to be connected to the electrical box through a set of screws disposed through corresponding apertures located in the flush-mounting plate and electrical box, and a front side that is adapted to be connected to the one or more receptacles and a cover plate having a planar exterior surface. The one or more receptacles are positioned between the flush-mounting plate and the cover plate, such that the cover plate, one or more receptacles, and flush-mounting plate are connected to the electrical box in a manner that the exterior surface of the cover plate is substantially flush with an outer wall that surrounds the electrical box. In addition, the cover plate may be connected to the flush-mounting plate through a set of magnets or mechanical means. |
| US09419421B1 |
Screw extender
An apparatus for facilitating using a screw to secure a receptacle cover plate over a junction box recessed in a wall, the junction box including at least one tapped screw receiver, and the cover plate defining at least one hole corresponding to the at least one tapped screw receiver. A bushing is provided with internal (female) threads at a first end. At a second end of the bushing is provided either external (male) threads, or internal threads into which a stud is engaged having external threads. The external threads engage the at least one tapped screw receiver. The at least one screw extends through the at least one hole defined in the cover plate to threadingly engage the internal threads of the bushing, thereby securing the cover plate to the junction box. |
| US09419418B2 |
Wire-pulling device for laying electric cables
A wire-pulling device, in particular for laying electric cables in a building, comprising a frame (16), a spool of a flexible elongate element (6a) wound into a coil, and means for unwinding the member and advancing same into a section of a duct of an electric facility. The spool is mounted on a rotary drum (2) driven by a mechanism (13). The drum (2) has a U-shaped section in which the flexible elongate member is located. The flexible elongate member is fed into a rigid guide member arranged tangentially relative to the periphery of the rotary drum. The drum (2) drives a set of guide rollers (19) arranged at the periphery thereof. Each roller has a central section (3) having a diameter that is larger than that of the side sections (4) thereof that surround same. The two side sections engage with the ends of the arms of the U while the central section contacts the flexible elongate member (6) arranged between the arms of the U. The contact of the central section has a tangential velocity higher than the velocity of the arms of the U with the flexible elongate member. The wire-pulling device includes an electronic device for controlling the motor for driving the drum. |
| US09419417B1 |
Automatic switching interface box for generator
An automatic switching interface box for generators in residential dwellings and small commercial applications provides a breaker box transfer switch for generators powering one or more electrical loads. In power blackout situations, the breaker box transfer switch uses a power control relay to keep the load power on, which eliminates the need for a hot generator plug, because the plug in box is not powered. The generator power output cord is plugged onto the male plug of the interface box, or hard wired thereto. If the auxiliary generator had been started and is at rated voltage, the load is immediately and automatically switched from the utility connection to the generator as electrical source. The relay keeps the prongs of the male plug safely unpowered until the generator is attached since the relay coil is powered by the generator output and the plug is connected to the normally open contacts. |
| US09419416B2 |
Method and apparatus for multiple input power distribution to adjacent outputs
Methods, systems, and apparatuses provide power from multiple input power sources to adjacent outputs efficiently and reliably. Aspects of the disclosure provide a power distribution unit (PDU) that includes a number of power outputs including first and second adjacent power outputs. The PDU includes a printed circuit board having a first conducting layer electrically interconnected to a first power input connection and the first power output, a second conducting layer that is at least partially above the first conducting layer and in facing relationship thereto. The second conducting layer is electrically insulated from the first conducting layer and electrically interconnected with a second power input connection and the second power output, the first and second power outputs thereby connected to different power inputs. |
| US09419413B2 |
Arc management system for an electrical enclosure assembly
An arc management system for an electrical enclosure assembly is provided. The electrical enclosure assembly includes a housing assembly and a conductive bus assembly. The arc management system includes a number of conductive bus extension assemblies, a number of first and second arc horn assemblies, and a number of ground conductor assemblies. Each conductive bus extension assembly includes a conductive member coupled to the conductive bus assembly. Each first arc horn assembly includes a conductive arc horn member. Each first arc horn member is in electrical communication with an associated bus extension conductive member. Each second arc horn assembly includes a conductive arc horn member. Each ground conductor assembly includes a ground conductive member. Each second arc horn member in electrical communication with an associated ground conductor assembly ground conductive member. Each first arc horn member is associated with a second arc horn member and disposed an effective distance therefrom. |
| US09419411B2 |
Semiconductor laser diode
A semiconductor laser diode is disclosed. The semiconductor laser diode including a primary surface constituted by two short sides and two long sides, comprises: an active layer; an electrode provided above the active layer; a first pad connected to the electrode; a second pad connected to the first pad; an inner interconnection configured to connect the electrode to the first pad electrically, the inner interconnection being provided along the long sides; and an outer interconnection configured to connect the first pad to the second pad electrically, the outer interconnection being provided along the long sides, the outer interconnection having a width along the short sides narrower than a width of the first pad along the short sides and a width of the second pad along the short sides. The active layer, the first pad, and the second pad are arranged along the long sides. |
| US09419409B2 |
Single-pump multi-wavelength lasing semiconductor Raman pump laser and pump combination apparatus
A single-pump multi-wavelength lasing semiconductor Raman pump laser comprises a thermoelectric cooler arranged in a shell; a heat transition bearing platform arranged in the thermoelectric cooler; a semiconductor Raman pump laser tube core arranged on the heat transition bearing platform; and a coupling lens group, a thermistor and a backlight detector that are arranged on the heat transition bearing platform respectively. The pump laser tube core, the backlight detector, the thermistor and the thermoelectric cooler are electrically connected to pins outside a laser tube shell. A pump combination apparatus comprises a first signal transmission fiber, a pump signal combiner and a second signal transmission fiber that are sequentially connected to each other. An input terminal of the pump signal combiner is connected to an output terminal of an isolated polarization beam combiner and depolarizer. Two polarization maintaining fiber input terminals of the isolated polarization beam combiner and depolarizer are correspondingly connected to one single pump multi-wavelength lasing semiconductor Raman pump laser respectively. |
| US09419408B2 |
Optical amplifier with self-adjusting gain based on reflected feedback
An optical amplifier with network optimization techniques maximizes performance of a conventional optical amplifier with minimum user intervention. A circulator enables as much light as possible just below a stimulated Brillouin scattering threshold to be launched in to an optical fiber. An amount of reflected power directed by a circulator to a photo diode has a direct correlation to the quality of the received signal in a communications system. |
| US09419404B1 |
Water-cooled carbon-dioxide laser
A carbon dioxide waveguide-laser includes an elongated resonator compartment and an elongated power supply compartment. The resonator and power-supply compartments are separated by a water-cooled heat sink. |
| US09419393B2 |
Male RJ45 connector for RJ45 electrical connection cord
A male RJ45 connector includes a printed circuit (8) having electrical tracks, at least one grounding plate sandwiched between faces (23, 24) of the circuit and a slot extending longitudinally and opening on a side (38) of the circuit and being configured to pass through both the faces and the at least one grounding plate; and a spreader system (9) mounted on the circuit and including a separator body (25), an extension body (26) provided with a hollow (27) configured to receive the printed circuit and a central wall (28) dividing the hollow (27) into two parts and being configured to be inserted into the slot; the central wall and the at least one grounding plate being configured to be electrically interconnected and form an electrically and/or magnetically shielding barrier between pairs of conducting wires (11-14) mounted on the spreader and connected to the circuit. |
| US09419392B2 |
Automatic identification of an adapter in an on-board diagnostic system
Adapters for OBD ports of a vehicle may include mechanisms for identifying the adapter (e.g., determine the manufacturer and/or type of the adapter) to an OBD device that is being used with the adapter. In one implementation, a male OBD connector of an OBD device may include a set of upper pins, a set of lower pins, and a middle portion, disposed between the set of upper pins and the set of lower pins, the middle portion including one or more pins. Identification logic, of the OBD device, may include a sensor connected to the one or more pins, to sense one or more values corresponding to a type of the compatible adapter. |
| US09419391B2 |
Communication connector
Embodiments of the present invention are generally related to communication connectors, and more specifically, to communication connectors such as jacks which are compatible with more than one style of a plug. In one embodiment, the electrical and mechanical design of a jack in accordance with the present invention may extend the usable bandwidth beyond the IEC 60603-7-71 requirement of 1000 MHz to support potential future applications such as, but not limited to, 40GBASE-T. In addition, the jack may be backwards compatible with lower speed BASE-T applications (e.g., 10GBASE-T and/or below) when an RJ45 plug is mated to the jack. |
| US09419388B2 |
Transition device for coaxial cables
A cable transition device comprises a support sleeve configured to be inserted between a structural overwrap and a compliant outer jacket of a coaxial cable. The compliant outer jacket surrounds the signal-carrying conductors and extends beyond a terminal end of a stepped transition. The cable transition device includes a compression device configured to urge the structural overwrap against the support sleeve to establish an environmental seal therebetween and produce a load path from the overwrap to the support structure through one of the support sleeve and the compression device. |
| US09419384B1 |
Connection system for an electrical cable
A connection system for a cable includes a shielded cable that is inserted into a backshell. Among other elements, the shielded cable might include a ferrule that is crimped between shields near an end of the cable. In addition, the backshell includes a channel that clamps around the ferrule, as well as various solder wells. |
| US09419383B1 |
Side-open multimedia interface having a plurality components in a plastic shell surrounded by a metallic shell
The present application specifically relates to a side-open vertical compound high-definition multimedia interface, which includes more than one components and a shell assembly. Each component includes a terminal part and a sub-shell part. The shell assembly includes an upper metal cap, a main plastic shell and a main metal shell, the main plastic shell includes cavities used for containing the components. The component is formed by assembling the terminal part and the sub-shell part together. The number of the cavities is three or more, which are side-openly and vertically provided in the main plastic shell in a parallel manner. Each component can be inserted into one cavity. The main metal shell covers and snaps to the side and bottom portions of the main plastic shell. The advantageous effects of the present invention include: the interface is a compound connector having three or more cavities for containing the components, which could provide the customers with a plurality of connecting ports and thus more choices. At the same time, the interface is featured by anti-vibration, impact-resistance and excellent anti-EMI effects, etc. |
| US09419381B2 |
Shield case
An object of the present invention is to provide a shield case capable of applying shield to a connection portion by means of various versatile connectors. A configuration is made such that the shield case includes a lower case (8) to be mounted on a housing (3) of an electronic control device and an upper case (9) to be fitted into the lower case (8) with a harness (2) having a female connector (5) being nipped. In the shield case, the lower case (8) and the upper case (9) are fastened to the housing (3) by screws (10) with a shield conductor (7) of the harness (2) being nipped between the lower case (8) and the upper case (9). |
| US09419377B2 |
Dual orientation electrical connector assembly
An electrical connector assembly includes a first connector and a second connector. The first connector includes a first terminal group and a first magnetic element around the first terminal group, the first terminal group defines a first central terminal and two first outer terminals located at both sides of the first central terminal. The second connector includes a second terminal group and a second magnetic element, the second terminal group defines a second central terminal, a second outer terminal and an elastic terminal located at both sides of the second central terminal. When the first connector is engaging with the second connector, the first and second magnetic elements are attached to each other, the first central terminal is contacting the second central terminal, the second outer terminal is contacting either of the first outer terminals and the elastic terminal is elastically abutting against the first magnetic element. |
| US09419376B1 |
Multipurpose, electronically versatile connector for wearable electronics
An example of a connector for host devices is provided. Aspects of the disclosure relate generally to a connector that allows a user to blindly connect the connector to a host device. For example, a magnetic system between the connector and host device may attract when the connector is oriented correctly with the host device's socket, and repel when the connector is incorrectly oriented. The connector may have a cord that is positioned such that, when the user incorrectly orients the connector over the host device's socket, the cord may interfere with the host device's housing, thereby indicating to the user to re-orient the connector. The connector may also employ multiplexed pins so the pins can perform more than a single function. For example, the data (D+/D−) pins may transmit music in the form of audio signals, and information content in the form of electrical signals. |
| US09419366B2 |
Contact assembly for a combined power and data connector and socket assembly for a mating connector socket
The invention relates to a contact assembly for a combined power and data connector and to a socket assembly for a mating socket. In order to provide a combined power and data connector that allows combined transport of electrical power and data signals, which is compact, solid and may be produced cost-effectively, it is intended according to the invention that a connector face of the contact assembly comprises a data section and a second section, wherein the data section comprises a plurality of data contacts, which are separated from the second section by at least one separating wall assembly, the data contacts being arranged on a carrier unit that is mounted on a data section side of the separating wall assembly, that the carrier unit further carries electric power and wherein the at least one separating wall assembly comprises a fixation sub-assembly that fixates the carrier unit onto the separating wall assembly. |
| US09419365B2 |
Cable connector assembly having an improved spacer
A cable connector assembly includes an insulative housing (1) defining a cavity (1150), a number of contacts (2,3) retained in the insulative housing, a cable (6) electrically connected with the contacts, a spacer (4) assembled to the back end of the insulative housing, and a metallic shell (5) enclosing the insulative housing. The contacts comprise a number of first and second contacts each having a contacting portion and a tail portion, the tail portions extending beyond a back end of the insulative housing. The spacer has a plurality of grooves (42,43) for receiving tail portions of the contacts and a separator disposed between every two neighboring grooves. The separator is T-shaped in order to restrain the contact tail portion. |
| US09419364B2 |
Flat contact for a connector, receiving block for a flat contact and connector
The disclosure relates to a flat contact for insertion in a receiving member of a connector in an insertion direction (E), a receiving block for inserting the flat contact, and a connector comprising a receiving block and/or a flat contact. A solution is provided in which the positioning of a flat contact relative to the receiving block is simple and precise. This is achieved by a flat contact for insertion in a receiving member of a connector in an insertion direction (E) comprising a clamping portion having clamping projections which protrude in a width direction (B) and a positioning portion which has at the narrow sides thereof guiding faces which extend parallel with the insertion direction (E), the guiding faces projecting beyond the clamping projections in the width direction (B). |
| US09419357B2 |
Connector assembly
A connector assembly includes a receptacle mounted on a first connector mounting surface of a first substrate; a receptacle mounted on a second connector mounting surface of a second substrate; and a relay connector. The relay connector includes a plug to be mated with the receptacle in a direction parallel to the first connector mounting surface; a plug to be mated with the receptacle in a direction parallel to the second connector mounting surface; and a handle that couples the plug and the plug to each other. The relay connector is structured such that a first mating direction in which the plug is mated to the receptacle is substantially the same as a second mating direction (Q) in which the plug is mated to the receptacle. |
| US09419356B2 |
Electrical power contact with two adjacent contact blades abutting each other
A power connector can include a dielectric connector housing and electrical contacts that are supported by the housing. The electrical contacts can each include first and second contact bodies. The first contact body can include a first contact blade and the second contact body can include a second contact blade that can define a mating portion of the electrical contact. The mating portion can be configured to mate with a complementary power connector along a mating direction so as to establish an electrical connection between the power connector and the complementary power connector. The contact blades can be configured slide with respect to each other along the mating direction. |
| US09419354B2 |
Electrical contacts, fusible members, and methods of attaching electrical contacts to substrates
A contact includes a body section, a tail section arranged at a lower portion of the body section, a peg extending from the tail section such that the peg projects from a front surface of the contact, and a fusible member attached to the contact such that the peg protrudes into the fusible member. A lower portion of the fusible member is offset from a main portion of the fusible member. |
| US09419353B1 |
Electrical wire connection strip
The electrical wire connection strip includes a bottom housing portion and an upper housing portion that are slidably connected to one another. The electrical wire connection strip is connectable to additional electrical wire connection strips to form a segmented electrical wire connection block or strip, where each segment can be designated to accept a certain wire gauge size. |
| US09419352B2 |
Terminal block with ground strap, spring force terminals, and screw lug terminal
A terminal block assembly includes a housing, a housing retention member coupled to the housing, a plurality of screw lug terminal assemblies disposed within the housing and a plurality of push-in terminal assemblies disposed within the housing. A push-in terminal of the plurality of push-in terminal assemblies includes a strain relief member and a retention spring assembly. The retention spring assembly includes a finger member and a conductor member. The conductor member electrically couples the finger member to a corresponding screw-lug terminal assembly. A bottom portion of the strain relief member engages the conductor member of the retention spring assembly to retain the retention spring assembly within the housing. A ground strap is disposed within the housing. |
| US09419347B2 |
Circularly polarized antenna
A circularly polarized antenna exhibiting a high performance characteristic can be produced by utilizing a ground plane, a half-loop, and an electric dipole in a predetermined configuration. The circularly polarized antenna can provide benefits, such as wide axial ratio bandwidth, high gain, and simple structure, over other unidirectional circularly polarized antennas. |
| US09419345B2 |
Dual reflector antenna with hybrid subreflector
The present invention relates to a dual reflector antenna with a hybrid subreflector, and more particularly, to a dual reflector antenna with a subreflector having a structure in which an ellipse and a hyperbola are combined. An exemplary embodiment of the present invention provides a dual reflector antenna including: a main reflector; and a hybrid subreflector which faces the main reflector and has a first structure and a second structure which are combined therein. |
| US09419344B2 |
Mountable antenna elements for dual band antenna
A mountable antenna element is constructed as an object from a single piece of material and can be configured to transmit and receive RF signals, achieve optimized impedance values, and operate in a concurrent dual-band system. The mountable antenna element may have one or more legs, an RF signal feed, and one or impedance matching elements. The legs and RF signal feed can be coupled to a circuit board. The impedance matching elements can be utilized to create a capacitance with a portion of the circuit board and thereby optimize impedance of the antenna element at a desired operating frequency. The mountable antenna includes features that enable it for use in concurrent dual band operation with the wireless device. Because the mountable antenna element can be installed without needing additional circuitry for matching impedance and can be constructed from a single piece of material, the antenna element provides for more efficient manufacturing. |
| US09419342B2 |
Low noise block converter and outdoor unit
An outdoor unit includes a dish antenna and a low noise block converter positioned at a focus point of the dish antenna. The low noise block converter comprises a housing, a feed cap disposed on top of the housing, and an air permeable membrane disposed on a bottom portion of the housing. The housing includes a base portion, at least one feed horn protruding from the base portion, and a bottom cover attached to a bottom of the base portion so as to form a housing cavity, wherein the bottom cover has a vent hole forming a flow path between the housing cavity and an external environment. The feed cap is disposed on a feed portion of the at least one feed horn and the air permeable membrane is disposed over the vent hole and coupled to the bottom cover via an adhesive, wherein the membrane is configured to permit egress of a gas from the housing cavity therethrough. |
| US09419337B2 |
Wireless communication device
A wireless communication device includes an antenna for receiving a receiving signal and including a radiator whose input impedance is inductively centralized, a tunable matching circuit coupled to the antenna for adjusting a matching of the antenna according to a control signal, and a radio-frequency processing circuit coupled to the tunable matching circuit, for determining whether to adjust the matching of the antenna according to a receiving band and a transmitting band corresponding to the receiving signal to generate the control signal to the tunable matching circuit, wherein the tunable matching circuit adjusts the matching of the antenna to optimize the matching of the antenna in the receiving band and the transmitting band. |
| US09419336B2 |
Compact broadband antenna
An antenna including a substrate formed of a non-conductive material, a ground plane disposed on the substrate, a wideband element for coupling having one end connected to an edge of the ground plane and an elongate feed arm feeding the wideband element for coupling and having a maximum width of 1/100 of a predetermined wavelength, the predetermined wavelength being defined by formula (I) wherein λp is the predetermined wavelength, f is a lowest operating frequency of the wideband element for coupling, μ is a permeability of the substrate, ∈r is a relative bulk permittivity of the substrate, W is a width of a conductive trace disposed above the substrate and H is a thickness of the substrate, wherein formula (II). |
| US09419328B2 |
Terminal device
A terminal device includes a first house configured to at least accommodate a processing unit and a wireless communication unit. The wireless communication unit is configured to cause the terminal device to perform wireless communication with an external apparatus and exchange data. The wireless communication unit includes an antenna unit configured to receive and transmit a RF signal, a RF circuit connected with the antenna unit and configured to transmit the RF signal to or receive the RF signal from the antenna unit, wherein, an air vent is set on the first house, and the antenna unit is formed by the air vent. |
| US09419320B2 |
Nonreciprocal circuit element and transceiver device
A nonreciprocal circuit element is configured so that a first center electrode and a second center electrode are arranged on a ferrite, to which a direct current magnetic field generated by a permanent magnet is applied, so as to cross each other and be insulated from each other. One end portion of the first center electrode is connected to a first unbalanced input/output port and one port of a plurality of balanced input/output ports and the other end portion of the first center electrode is connected to ground. One end portion of the second center electrode is connected to a second unbalanced input/output port and the other port of the balanced input/output ports and the other end of the second center electrode is connected to the ground. The one end portion of the first center electrode is connected to the ground via a first capacitor element, and the one end portion of the second center electrode is connected to the ground via a second capacitor element. |
| US09419317B2 |
Detecting blockage of air flow through vehicle traction battery
Air is supplied from a passenger cabin of a vehicle to an intake passage between the passenger cabin and a battery of the vehicle. The vehicle may be an electric vehicle such as a hybrid electric vehicle (HEV) or a battery-only electric vehicle (BEV). A signal indicating a blockage of air flow through the battery is generated in response to a difference in temperature exceeding a predetermined magnitude. The difference in temperature is between (i) the intake passage and (ii) the passenger cabin. |
| US09419316B2 |
Apparatus and method for manufacturing a modular battery pack with fluid circulation tube and interleaved fins
A battery pack includes at least one serpentine fluid circulation tube that extends around part of the periphery of a plurality of electric cells. First and second segments of the tube are disposed adjacent a first and a second edge of a first set of the plurality of electric cells. The sets of electric cells are disposed in an alternating arrangement. A first fin and a second fin are provided between each of the electric cells. The fins have a reverse turn wrapped around the segments of the tube. The fins have internal ends that are disposed between the electric cells and the tube segments. The battery pack may be assembled by folding the fins around the electric cells and the tube or by preforming folded sheets that define thermal fins and assembling the folded sheets over segments of the tube from opposite sides of the electric cells. |
| US09419313B2 |
Lithium battery with reference electrode plated on an interior surface of a neutral metal can
A method of manufacturing a reference electrode for a lithium ion battery comprises charging the battery to a threshold state-of-charge, wherein the battery includes a neutral metal can and a negative electrode, and plating a reference electrode on an interior surface of the neutral metal can by electrically connecting the neutral metal can to the negative electrode, a neutral metal can potential being greater than a negative electrode potential. |
| US09419311B2 |
Battery maintenance device with thermal buffer
A battery maintenance device configured to maintain a storage battery. An electrical connection couples the battery maintenance device to the storage battery. Maintenance circuitry couples to the battery through the electrical connection and performs maintenance on the battery. The maintenance circuitry includes an electrical load configured to draw an electrical current from the battery. The electrical current causes the electrical load to heat. A phase change material is thermally coupled to the load. The phase change material has a specific heat index which has a non-linear relationship to temperature to thereby reduce a rate of change in temperature of the electrical load. |
| US09419308B2 |
All-solid-state lithium-ion secondary battery and production method thereof
A method of producing an all-solid-state lithium-ion secondary battery including forming primary sintered bodies of an anode, a cathode, and a solid electrolyte layer; disposing the primary sintered body of the solid electrolyte layer between the primary sintered bodies of the anode and the cathode; forming a laminate of the primary sintered bodies and at least one of a first intermediate layer disposed between the anode and the solid electrolyte layer, and a second intermediate layer disposed between the cathode and the solid electrolyte layer; and firing the laminate to obtain a sintered body including an anode, a solid electrolyte layer, and a cathode, and at least one of a first intermediate layer and a second intermediate layer. In the resulting all-solid-state lithium-ion secondary battery, the first and second intermediate layers have a particle size that is smaller than that of the anode, cathode, and solid electrolyte layer. |
| US09419299B2 |
Battery cells with lithium ion conducting tape-cast ceramic, glass and glass-ceramic membranes
Alkali (or other active) metal battery and other electrochemical cells incorporating active metal anodes together with aqueous cathode/electrolyte systems. The battery cells have a highly ionically conductive protective membrane adjacent to the alkali metal anode that effectively isolates (de-couples) the alkali metal electrode from solvent, electrolyte processing and/or cathode environments, and at the same time allows ion transport in and out of these environments. Isolation of the anode from other components of a battery cell or other electrochemical cell in this way allows the use of virtually any solvent, electrolyte and/or cathode material in conjunction with the anode. Also, optimization of electrolytes or cathode-side solvent systems may be done without impacting anode stability or performance. In particular, Li/water, Li/air and Li/metal hydride cells, components, configurations and fabrication techniques are provided. |
| US09419298B2 |
Fuel cell module
A fuel cell module includes a first area where an exhaust gas combustor and a start-up combustor are provided, an annular second area around the first area and where a reformer and an evaporator are provided, and an annular third area around the second area and where a heat exchanger is provided. The exhaust gas combustor and the start-up combustor are provided coaxially with and separately away from each other. |
| US09419295B2 |
Integrated power generation and chemical production using fuel cells at a reduced electrical efficiency
In various aspects, systems and methods are provided for operating a molten carbonate fuel cell at conditions that can improve or optimize the combined electrical efficiency and chemical efficiency of the fuel cell. Instead of selecting conventional conditions for maximizing the electrical efficiency of a fuel cell, the operating conditions can allow for output of excess synthesis gas and/or hydrogen in the anode exhaust of the fuel cell. The synthesis gas and/or hydrogen can then be used in a variety of applications, including chemical synthesis processes and collection of hydrogen for use as a fuel. |
| US09419293B2 |
Systems and methods for measuring high frequency resistance in a fuel cell system
System and methods for measuring operating parameters of a fuel cell system are presented. In certain embodiments, the systems and methods may be configured to measure a high frequency resistance of a fuel cell system. A method for measuring a high frequency resistance of a fuel cell system may include inducing a current signal and a voltage signal through the FC system at a center frequency using a switched load. The current signal and the voltage signal may then be measured and filtered to isolate the current signal and the voltage signal from noise signals occurring in the FC system. A high frequency resistance of the FC may then be calculated based on the filtered current and voltage signals. |
| US09419285B2 |
All-solid battery
An all-solid battery including a positive electrode including a binder, a negative electrode including a binder, and an electrolyte layer disposed between the positive electrode and the negative electrode and including a solid electrolyte, wherein at least one binder of the positive electrode and the negative electrode is cross-linked by a cross-linking agent. |
| US09419284B2 |
Binder resin for electrode of nonaqueous electrolyte secondary battery, slurry composition, electrode for nonaqueous electrolyte secondary battery, and nonaqueous electrolyte secondary battery
A binder resin for an electrode of a nonaqueous electrolyte secondary battery is provided, which is used as the binder resin in a slurry composition for an electrode of a nonaqueous electrolyte secondary battery, containing a binder resin, an active material and an organic solvent. |
| US09419283B2 |
Non-aqueous lithium secondary battery containing hydrophobic, inactive particle
Provided is a non-aqueous lithium secondary battery comprising an electrode assembly composed of a cathode, an anode, and a separator interposed between the cathode and anode, wherein the cathode and anode have an electrode material containing an active material applied on a current collector, a non-aqueous electrolyte containing a lithium salt, hydrophobic inactive-particles (also, referred to as “hydrophobic particles”) included in the electrode material, and a battery case sealing all the constituent components. Upon adding hydrophobic inactive-particles to the electrode material in a non-aqueous lithium secondary battery, absorption and inflow of water into the electrode material during the battery production is effectively inhibited such as to prevent side reactions caused by water inside the battery, thereby exhibiting improvement in the high-temperature storage characteristics of the battery. |
| US09419282B2 |
Organic active materials for batteries
A rechargeable battery includes a compound having at least two active sites, R1 and R2; wherein the at least two active sites are interconnected by one or more conjugated moieties; each active site is coordinated to one or more metal ions Ma+ or each active site is configured to coordinate to one or more metal ions; and “a” is 1, 2, or 3. |
| US09419278B2 |
Rechargeable metal-ion battery with non-aqueous hybrid ion electrolyte
A method is provided for forming a rechargeable metal-ion battery with a non-aqueous hybrid ion electrolyte. The method provides a transition metal hexacyanometallate (TMHCM) cathode (AXM1YM2Z(CN)N.MH2O), where “A” is from a first group of metals, and M1 and M2 are transition metals. The electrolyte includes a first type of cation from the first group of metals, different than “A”. The method connects the cathode and anode to external circuitry to perform initial charge/discharge operations. As a result, a hybrid ion electrolyte is formed including the first type of cation and “A” cations. Subsequently, cations are inserted into the anode during charging, which alternatively may be only “A” cations, only the first type of cation, or both the “A” cations and the first type of cation. Only “A” cations, only the first type, or both “A” and the first type of cation are inserted into the TMHCM during discharge. |
| US09419276B2 |
Anode active material, lithium secondary battery comprising the same, and method of manufacturing anode active material
The present disclosure relates to an anode active material comprising a composite of a core-shell structure, a lithium secondary battery comprising the same, and a method of manufacturing the anode active material. According to an aspect of the present disclosure, there is provided an anode active material of a core-shell structure comprising a core including alloyed (quasi)metal oxide-Li (MOx—Liy) and a shell including a carbon material coated on a surface of the core. According to another aspect of the present disclosure, there is provided a method of manufacturing the anode active material of the core-shell structure. According to an aspect of the present disclosure, an anode active material with high capacity, excellent cycle characteristics and volume expansion control capacity, and high initial efficiency is provided. |
| US09419274B2 |
Electrochemical cells comprising porous structures comprising sulfur
The present invention relates to the use of porous structures comprising sulfur in electrochemical cells. Such materials may be useful, for example, in forming one or more electrodes in an electrochemical cell. For example, the systems and methods described herein may comprise the use of an electrode comprising a conductive porous support structure and a plurality of particles comprising sulfur (e.g., as an active species) substantially contained within the pores of the support structure. The inventors have unexpectedly discovered that, in some embodiments, the sizes of the pores within the porous support structure and/or the sizes of the particles within the pores can be tailored such that the contact between the electrolyte and the sulfur is enhanced, while the electrical conductivity and structural integrity of the electrode are maintained at sufficiently high levels to allow for effective operation of the cell. Also, the sizes of the pores within the porous support structures and/or the sizes of the particles within the pores can be selected such that any suitable ratio of sulfur to support material can be achieved while maintaining mechanical stability in the electrode. The inventors have also unexpectedly discovered that the use of porous support structures comprising certain materials (e.g., metals such as nickel) can lead to relatively large increases in cell performance. In some embodiments, methods for forming sulfur particles within pores of a porous support structure allow for a desired relationship between the particle size and pore size. The sizes of the pores within the porous support structure and/or the sizes of the particles within the pores can also be tailored such that the resulting electrode is able to withstand the application of an anisotropic force, while maintaining the structural integrity of the electrode. |
| US09419269B2 |
Press apparatus for electrode, electrode manufacturing apparatus, and electrode manufacturing method
According to one embodiment, a press apparatus for an electrode, includes, a press unit configured to compress an electrode sheet includes a first region formed with an electrode layer on a surface thereof and a second region on which the electrode layer is not formed, and a stretching unit includes a stretching member, which comprises a projecting surface located opposite the electrode sheet and projecting toward the electrode sheet, in a position corresponding to the second region, a retracted surface retracted from the electrode sheet relative to the projecting surface, in a position corresponding to the first region, and a relief surface retracted away from the electrode sheet, in a position corresponding to an edge portion of the electrode sheet. |
| US09419267B2 |
Battery terminal with current sensor
A battery terminal with current sensor includes: a battery terminal part that is formed by a conductive metal plate, and that includes a post part to be connected to a battery post of a battery; a current sensor that is integrated with the battery terminal part by a resin molding, and that includes a stud part to be connected to a load; and a sensor part that corresponds to an integrated part of the battery terminal part and the current sensor. The sensor part includes a penetration portion having a hole or slit shape that is formed at a part to be resin-molded of the battery terminal part, and a filling portion that is formed at a resin-molded part of the current sensor and fills the penetration portion. |
| US09419265B2 |
High-strength electrospun microfiber non-woven web for a separator of a secondary battery, a separator comprising the same and a method for manufacturing the same
The present disclosure provides a method for manufacturing an electrospun microfiber non-woven web with high strength for a lithium secondary battery, a non-woven web manufactured therefrom, and a separator comprising the non-woven web. More specifically, the present disclosure provides a microfiber non-woven web manufactured by bringing a solution of engineering plastic resin with high heat-resistance into electrospinning, the manufacture thereof, and a separator comprising the web.According to the present disclosure, the engineering plastic resin with high heat-resistance is used in the manufacture of the microfiber non-woven web to provide improved physical properties including tensile strength and good heat-resistance and chemical-resistance, as compared with conventional polyethylene-based separators. |
| US09419264B2 |
Energy storage module including a plurality of prismatic storage cells
The invention relates to an energy storage module for a device for supplying voltage, particularly in a motor vehicle. The energy storage module includes several prismatic storage cells that are arranged behind one another and stacked in at least one row, two end plates, and at least one tension element. The at least one row of stacked storage cells is braced between the two end plates by the tension element, and at least one of the end plates has at least one supporting surface for support on a structure carrying the energy storage module. The energy storage module also includes at least one thermally insulating element arranged on the supporting surface for thermal insulation between the at least one of the end plates and the carrying structure. |
| US09419258B2 |
Adaptive battery pack-to-universal serial bus power devices
A device includes a battery pack receptacle that removably connects to a particular adapter of multiple adapters for a particular associated battery pack that is used for a cordless device. A universal serial bus (USB) port is connected to the battery pack receptacle. The battery pack is used as a power source for the USB port. |
| US09419255B2 |
Secondary battery
A secondary battery includes an electrode assembly, a support body receiving the electrode assembly, and an external member coupled to the support body, wherein the support body and the external member together enclose the electrode assembly. Another secondary battery includes an electrode assembly including a first electrode plate and a second electrode plate; and a support body receiving the electrode assembly and including a body and a terminal forming part, wherein the terminal forming part is provided with a first electrode terminal electrically connected to the first electrode plate and a second electrode terminal electrically connected to the second electrode plate, and the terminal forming part is integrally formed with the body. |
| US09419254B2 |
Lithium microbattery protected by a cover
A lithium microbattery comprises a stack of active layers containing lithium and a protective cover covering the stack of active layers. The protective cover is fixed to the stack of active layers by means of a layer of glue.A buffer structure comprising at least one alumina layer is arranged between the stack of active layers and the layer of glue, the buffer structure being in contact with said stack of active layers. |
| US09419252B2 |
Rechargeable battery
A rechargeable battery case that prevents a short circuit of a cell by inducing bending of a case under a lateral/longitudinal compression condition in a specific manner. The rechargeable battery case includes an opening in the case through which an electrode assembly is inserted. A bottom portion is provided at an end of the case opposite to that of the opening. A front portion is connected to the bottom portion. A back portion is connected to the bottom portion and the front portion. A joint portion is arranged between the front, back and bottom portion. Further, a first area and a second area are disposed longitudinally in the front and back portions. The second area is on either side of the first area. The joint portion in the second area is thicker than the joint portion in the first area. |
| US09419250B2 |
Methods of forming transfer films
Methods of making transfer films to form bridged nanostructures are disclosed. The methods include applying a thermally stable backfill layer to a structured surface of a sacrificial template layer. |
| US09419248B2 |
Organic LED element, translucent substrate, and method for manufacturing organic LED element
The present invention provides an organic LED element having the significantly larger light emission area than conventional ones. The invention relates to an organic LED element, comprising: a transparent substrate; a light scattering layer; a transparent first electrode; an organic light-emitting layer; and a second electrode formed in this order, wherein the light scattering layer has a base material comprising a glass, and a plurality of scattering materials dispersed in the base material; the light scattering layer has side surfaces, and each of the side surfaces has a surface tilted at an angle larger than right angle from an upper surface on the first electrode side toward a bottom surface on the transparent substrate side; and the first electrode is placed so as to continuously cover the side surfaces. |
| US09419242B2 |
Organic white light emitting display apparatus
Disclosed is an organic white light emitting display apparatus. The organic white light emitting device includes a first substrate including a first sub-pixel area, a second sub-pixel area, a third sub-pixel area, and an organic light emitting device (OLED) that includes a first electrode, a second electrode, and an organic white light emitting layer interposed between the first and second electrodes, and emits whit light for respective sub-pixel areas, a second substrate including first, second, and third color filters of different colors formed on positions corresponding to the respective sub-pixel areas, the second substrate being arranged to face the first substrate, and a partition wall that is extended to an area between neighboring color filters among the color filters and partitions the sub-pixel areas, the partition wall being formed on the first substrate. |
| US09419235B2 |
Method for producing gel containing nano-carbon material
An object of the present invention is to provide a method for producing a gel containing a nano-carbon material, which allows the gelling medium used to be selected from a wide range of substances, is applicable to other nano-carbon materials in addition to carbon nanotubes, and can be implemented in an extremely simple manner. A method for producing a gel containing a nano-carbon material of the present invention as a means for achieving the object is characterized in that a nano-carbon material is stir-mixed with a gelling medium that satisfies the following conditions (but is not an ionic liquid), the gelling medium being in a liquid or molten state: (1) the gelling medium is in a liquid state at ambient temperature or melts when heated; and (2) the gelling medium contains, in the molecule, two or more rings of at least one kind selected from optionally substituted aromatic hydrocarbon monocyclic ring and optionally substituted aromatic heteromonocyclic ring. |
| US09419234B2 |
Electrode body for solar cell, method for producing the electrode body, and solar cell provided with the electrode body
Disclosed is an electrode body for a solar cell, which is capable of being used as a component of both an organic thin-film solar cell and a dye-sensitized solar cell, and has excellent heat resistance. This electrode body for a solar cell is provided with a substrate with a conductive part at least on the surface and a conductive polymer layer located on the conductive part of the substrate, in which the conductive polymer layer includes: a polymer derived from at least one monomer selected from the group consisting of 3,4-disubstituted thiophenes; and an anion as a dopant to the polymer generated from at least one organic non-sulfonate compound having an anion with the molecular weight of 200 or more. Additionally, the density of the conductive polymer layer is in the range of 1.15 to 1.80 g/cm3. The dense conductive polymer layer including the anion as a dopant exhibits excellent heat resistance. |
| US09419231B2 |
Organic electroluminescence device
An organic electroluminescence device including two or more organic thin film layers including an emitting layer between an anode and a cathode, the emitting layer including at least one compound represented by the following formula (1), and an organic thin film layer that is in contact with the emitting layer on the cathode side comprising at least one benzimidazole compound represented by the following formula (A): |
| US09419228B2 |
Heterocyclic compound and organic light-emitting diode comprising the same
A heterocyclic compound is represented by Formula 1 below and an organic light-emitting diode includes the heterocyclic compound. The heterocyclic compounds exhibit good electrical properties, high charge transporting and light-emitting capabilities, and high glass transition temperatures. Organic light-emitting diodes including the compounds of Formula 1 exhibit improved driving voltage, efficiency, brightness, and lifetime characteristics. |
| US09419221B2 |
Method of fabricating semiconductor integrated circuit having phase-change layer
A method of fabricating a semiconductor integrated circuit that includes forming a lower electrode in a semiconductor substrate, forming an interlayer insulating layer including a phase-change region exposing the lower electrode on the semiconductor substrate, forming a first phase-change layer having a crystalline state along surfaces of the interlayer insulating layer and an exposed lower electrode, and growing a second phase-change layer on the first phase-change layer based on the crystallinity of the first phase-change layer to be filled in the phase-change region. |
| US09419220B2 |
Resistive memory elements, resistive memory cells, and resistive memory devices
A method of forming a resistive memory element comprises forming an oxide material over a first electrode. The oxide material is exposed to a plasma process to form a treated oxide material. A second electrode is formed on the treated oxide material. Additional methods of forming a resistive memory element, as well as related resistive memory elements, resistive memory cells, and resistive memory devices are also described. |
| US09419217B2 |
Vertical cross-point memory arrays
A method of manufacturing a memory structure includes forming a plurality of vertically-stacked horizontal line layers, interleaving a plurality of electrically conductive vertical lines with the electrically conductive horizontal lines, and forming a memory film at and between intersections of the electrically conductive vertical lines and the horizontal lines. In one embodiment of the invention, the electrically conductive vertical lines are interleaved with the horizontal lines such that a row of vertical lines is positioned between each horizontally-adjacent pair of horizontal lines in each horizontal line layer. By configuring the electrically conductive vertical lines and electrically conductive horizontal lines so that a row of vertical lines is positioned between each horizontally-adjacent pair of horizontal lines, a unit memory cell footprint of just 2F2 may be realized. |
| US09419209B2 |
Magnetic and electrical control of engineered materials
Methods, systems, and devices are disclosed for controlling the magnetic and electrical properties of materials. In one aspect, a multi-layer structure includes a first layer comprising a ferromagnetic or ferrimagnetic material, and a second layer positioned within the multi-layer structure such that a first surface of the first layer is in direct physical contact with a second surface of the second layer. The second layer includes a material that undergoes structural phase transitions and metal-insulator transitions upon experiencing a change in temperature. One or both of the first and second layers are structured to allow a structural phase change associated with the second layer cause a change magnetic properties of the first layer. |
| US09419206B2 |
Magnetic sensor and method of fabricating the same
Provided are a magnetic sensor and a method of fabricating the same. The magnetic sensor includes: hall elements disposed in a substrate, a protection layer disposed on the substrate, a seed layer disposed on the protection layer, and an integrated magnetic concentrator (IMC) formed on the seed layer, the seed layer and the IMC each having an uneven surface. |
| US09419203B2 |
Passivation and alignment of piezoelectronic transistor piezoresistor
A method of forming a piezoelectronic transistor (PET) device, the PET device, and a semiconductor including the PET device are described. The method includes forming a first metal layer, forming a layer of a piezoelectric (PE) element on the first metal layer, and forming a second metal layer on the PE element. The method also includes forming a well above the second metal layer, forming a piezoresistive (PR) material in the well and above the well, and forming a passivation layer and a top metal layer above the PR material at the diameter of the PR material above the well, wherein a cross sectional shape of the well, the PR material above the well, the passivation layer, and the top metal layer is a T-shaped structure. The method further includes forming a metal clamp layer as a top layer of the PET device. |
| US09419202B2 |
Ultrasound transducer and method for manufacturing an ultrasound transducer
An ultrasound transducer includes an acoustic layer having a front side and an opposite back side. The acoustic layer is configured to convert electrical signals into ultrasound waves to be transmitted from the front side toward a target. The acoustic layer is configured to convert received ultrasound waves into electrical signals. A lens is connected to the front side of the acoustic layer. A heat sink is connected to the back side of the acoustic layer. A flex circuit is disposed between the acoustic layer and the heat sink. The flex circuit includes a backside matching layer incorporated into a body of the flex circuit. The backside matching layer is connected in thermal communication with the acoustic layer and the heat sink such that the backside matching layer is configured to conduct heat from the acoustic layer to the heat sink. |
| US09419199B2 |
Actuator, actuator system, and control of an actuator
The invention relates to an actuator (1), comprising: piezoelectric elements (16) arranged in a stack; first and second inner electrodes (5, 3), which are alternately arranged between the piezoelectric elements (16); a first outer electrode (4), which is connected to the first inner electrodes (5) in an electrically conductive manner; a second outer electrode (2), which is connected to the second inner electrodes (3) in an electrically conductive manner, characterized in that the actuator (1) comprises a plurality of actuator sections (81, 82, 83, 84, 85) and in that the second outer electrode (2) comprises separate electrode segments (21, 22, 23), which are each connected in an electrically conductive manner to the second inner electrodes (3) in one of the actuator sections (81, 82, 83, 84, 85) or in a group of the actuator sections (81, 82, 83, 84, 85). |
| US09419198B2 |
Nanomesh phononic structures for low thermal conductivity and thermoelectric energy conversion materials
A nanomesh phononic structure includes: a sheet including a first material, the sheet having a plurality of phononic-sized features spaced apart at a phononic pitch, the phononic pitch being smaller than or equal to twice a maximum phonon mean free path of the first material and the phononic size being smaller than or equal to the maximum phonon mean free path of the first material. |
| US09419197B2 |
Thermoelectric material and method of preparing the thermoelectric material
A method of preparing thermoelectric material particles, the method comprising: disposing a first electrode and a second electrode in a dielectric liquid medium, wherein the first and second electrodes each comprise a thermoelectric material; applying an electrical potential between the first and second electrodes to cause a spark between the first and second electrodes to provide a vaporized thermoelectric material at a sparking point of at least one of the first and second electrodes; and cooling the vaporized thermoelectric material with the dielectric liquid medium to prepare the thermoelectric material particles. |
| US09419195B2 |
Light emitting diode (LED) die having strap layer and method of fabrication
A light emitting diode (LED) die includes a first-type semiconductor layer, a multiple quantum well (MQW) layer in electrical contact with the first-type semiconductor layer configured to emit electromagnetic radiation, and a second-type semiconductor layer in electrical contact with the multiple quantum well (MQW) layer. The light emitting diode (LED) die also includes a first pad in electrical contact with the first-type semiconductor layer, and a second pad in electrical contact with the second type semiconductor layer. The light emitting diode (LED) die also includes a strap layer having conductive straps and contact areas located in trenches in the first-type semiconductor layer. |
| US09419193B2 |
Optoelectronic component and method for producing an opto-electronic component
An opto-electronic component has a carrier element (3) with a connection region (5). Arranged on the carrier element (3) is a semiconductor chip (7). A contact region (10) is mounted on the surface (8) of the semiconductor chip (7) remote from the carrier element (3). The connection region (5) is electrically conductively connected to the contact region (10) by way of an unsupported conductive structure (13). A method for manufacturing an opto-electronic component is described. |
| US09419192B2 |
Composite resin and electronic device
According to one embodiment, a composite resin includes a resin component; and a plurality of first powder bodies dispersed in the resin component. Each of the first powder bodies has a nonlinear current-voltage characteristic having a decreasing resistance as a voltage increases. The first powder body is a polycrystalline powder body including a plurality of primary particles bound via a grain boundary. A component different from a major component of the primary particles exists in a higher concentration in the grain boundary than in an interior of the primary particles. |
| US09419186B2 |
Light emitting diode chip having wavelength converting layer and method of fabricating the same, and package having the light emitting diode chip and method of fabricating the same
An exemplary embodiment of the present invention discloses a light-emitting diode (LED) chip including a semiconductor stacked structure including a first conductivity-type semiconductor layer, an active layer, and a second conductivity-type semiconductor layer, a first electrode disposed on the semiconductor stacked structure, a wavelength converting layer disposed on the semiconductor stacked structure, and a transparent resin disposed on the wavelength converting layer. |
| US09419184B2 |
Light-emitting device, light-emitting device package, and light unit
A light-emitting device, according to one embodiment, comprises: a light-emitting structure comprising a first conductive semiconductor layer, an active layer which is underneath the first conductive semiconductor layer, and a second conductive semiconductor layer which is underneath the active layer; a reflective electrode, which is arranged under the light-emitting structure; and an electrode which is arranged inside the first conductive semiconductor layer and comprises a conductive ion injection layer. |
| US09419182B2 |
Solid-state radiation transducer devices having at least partially transparent buried-contact elements, and associated systems and methods
Solid-state radiation transducer (SSRT) devices having buried contacts that are at least partially transparent and associated systems and methods are disclosed herein. An SSRT device configured in accordance with a particular embodiment can include a radiation transducer including a first semiconductor material, a second semiconductor material, and an active region between the first semiconductor material and the second semiconductor material. The SSRT device can further include first and second contacts electrically coupled to the first and second semiconductor materials, respectively. The second contact can include a plurality of buried-contact elements electrically coupled to the second semiconductor material. Individual buried-contact elements can have a transparent portion directly adjacent to the second semiconductor material. The second contact can further include a base portion extending between the buried-contact elements, such as a base portion that is least partially planar and reflective. |
| US09419179B2 |
Diode for a printable composition
An exemplary printable composition of a liquid or gel suspension of diodes comprises a plurality of diodes, a first solvent and/or a viscosity modifier. An exemplary diode comprises: a light emitting or absorbing region having a diameter between about 20 and 30 microns and a height between 2.5 to 7 microns; a plurality of first terminals spaced apart and coupled to the light emitting region peripherally on a first side, each first terminal of the plurality of first terminals having a height between about 0.5 to 2 microns; and one second terminal coupled centrally to a mesa region of the light emitting region on the first side, the second terminal having a height between 1 to 8 microns. |
| US09419174B2 |
Transparent quantum dot light-emitting diodes with dielectric/metal/dielectric electrode
Quantum dot light emitting diodes (QD-LEDs) are formed that are transparent and emit light from the top and bottom faces. At least one electrode of the QD-LEDs is a dielectric/metal/dielectric layered structure, where the first dielectric comprises metal oxide nanoparticles or polymer-nanoparticle blends and is 10 to 40 nm in thickness, the metal layer is 5 to 25 nm in thickness, and the second dielectric layer is a nanoparticulate, polymer-nanoparticle blend or continuous layer of 30 to 200 nm in thickness and is situated distal to the light emitting layer of the QD-LED. |
| US09419173B2 |
Flip-chip LED and fabrication method thereof
A flip-chip LED and a method for forming the LED are disclosed. The method includes: providing a substrate and depositing on the substrate an epitaxial layer including, from the bottom upward, an n-type GaN layer, a multi-quantum well active layer, and a p-type GaN layer; etching the epitaxial layer to form an array of openings exposing the n-type GaN layer; forming a first metal layer on the p-type GaN layer; annealing the first metal layer to induce self-assembly thereof; etching the p-type GaN layer by using the first metal layer as a mask such that an array of holes formed therein; and depositing a second metal layer over the array of holes, the second metal layer and the first metal layer form a metal reflector layer. The design can result in an improvement in the light extraction efficiency of the LED. |
| US09419172B2 |
Method of manufacturing light emitting device package
A method of manufacturing a light emitting device package includes forming a plurality of light emitting devices by growing a plurality of semiconductor layers on a wafer, and measuring color characteristics of light emitted from each of the plurality of light emitting devices. For each of the plurality of light emitting devices, a type and an amount of wavelength conversion material is determined for color compensating the light emitting device based on a difference between the measured color characteristics and target color characteristics. A wavelength conversion layer is formed on at least two light emitting devices among the plurality of light emitting devices, the wavelength conversion layer having the type and the amount of wavelength conversion material determined for the at least two light emitting devices. The plurality of light emitting devices is then divided into individual light emitting device packages. |
| US09419171B2 |
Two-part screen printing for solar collection grid
Methods and apparatus relating to providing a collection grid suitable for use in PV modules. The disclosed collection grid may be at least partially applied to a protective laminate sheet in a manner that removes the high temperature requirements of conventional screen printed collection grids, to avoid unwanted heat-related deformation of the laminate sheet. |
| US09419170B2 |
Controlling the stoichiometry and doping of semiconductor materials
Methods for treating a semiconductor material are provided. According to an aspect of the invention, the method includes annealing the semiconductor material in the presence of a compound that includes a first element and a second element. The first element provides an overpressure to achieve a desired stoichiometry of the semiconductor material, and the second element provides a dopant to the semiconductor material. |
| US09419167B2 |
Making semiconductor bodies from molten material using a free-standing interposer sheet
An interposer sheet can be used for making semiconductor bodies, such as of silicon, such as for solar cell use. It is free-standing, very thin, flexible, porous and able to withstand the chemical and thermal environment of molten semiconductor without degradation. It is typically of a ceramic material, such as silica, silicon nitride, silicon oxynitride, silicon oxycarbide, silicon carbide, silicon carbonitride, silicon oxycarbonitride and others. It is provided between a forming surface of a mold sheet, and the molten material from which a semiconductor body will be formed. It may be secured to the forming surface or deposited upon the melt. The interposer sheet suppresses grain nucleation, and limits heat flow from the melt. It promotes separation of the semiconductor body from the forming surface. It can be fabricated before its use. Because free-standing and not adhered to the forming surface, problems of mismatch of CTE are minimized. The interposer sheet and semiconductor body are free to expand and contract relatively independently of the forming surface. |
| US09419163B2 |
Solar panel and method for manufacturing the same
A solar panel capable of exhibiting excellent aesthetics and power generation efficiency, and capable of easily forming a protection plate in a manufacturing process is provided. The solar panel of the present invention comprises a protection plate 1 having translucency from a front surface 1a to a back surface, a solar battery cell, and an encapsulant that is integrally provided on the back surface, and fixes the solar battery cell to the back surface in sealed state. The protection plate is formed from a resin with polycarbonate as a main component by injection molding. The front surface serves as a design surface. A portion of the back surface that faces the solar battery cell serves as an offset surface that is offset with respect to the solar battery cell, and differs from the design surface in shape. |
| US09419160B2 |
Nitride semiconductor structure
A nitride semiconductor structure is provided. The nitride semiconductor structure includes a substrate, a SiC nucleation layer, a composite buffer layer and a nitride semiconductor layer. The SiC nucleation layer is located on the substrate. The composite buffer layer is located on the SiC nucleation layer. The nitride semiconductor layer is located on the composite buffer layer. Besides, the nitride semiconductor structure is an AlN free semiconductor structure. |
| US09419158B2 |
Solar cell and method for manufacturing same
The invention provides a solar cell and a method for manufacturing same. The solar cell contains a carbon structure layer; a microstructure formed on the carbon structure layer; and a charge separation layer which includes a charge separation junction part and which is formed on the surface of the microstructure. |
| US09419155B2 |
Sensing product and method of making
This description relates to a sensing product formed using a substrate with a plurality of epi-layers. At least a first epi-layer has a different composition than the composition of a second epi-layer. The sensing product optionally includes at least one radiation sensing element in the second epi-layer and optionally an interconnect structure over the second epi-layer. The sensing product is formed by removing the substrate and all epi-layers other than the second epi-layer. A light incident surface of the second epi-layer has a total thickness variation of less than about 0.15 μm. |
| US09419152B2 |
Carbon electrode, carbon electrode production method, and photoelectric conversion device
A carbon electrode of an embodiment includes: a graphene having a graphene skeleton, carbon atoms in the graphene skeleton being partially substituted by a nitrogen atom, wherein the graphene contains an oxygen atom, and the carbon electrode is doped with a cation. |
| US09419151B2 |
High-reflectivity back contact for photovoltaic devices such as copper—indium-diselenide solar cells
A photovoltaic device (e.g., solar cell) includes: a front substrate (e.g., glass substrate); a semiconductor absorber film; a back contact including a first conductive layer of or including an alloy of molybdenum (Mo) and copper (Cu) and optionally a second conductive layer of or including either molybdenum (Mo) or Cu; and a rear substrate (e.g., glass substrate). The first conductive layer of or including molybdenum and copper is located between at least the rear substrate and a semiconductor absorber film that is located between at least the back contact and the front substrate. |
| US09419149B2 |
Solar cell sheet and heat treatment process thereof
Provided are a solar cell sheet and a heat treatment process thereof. The heat treatment process includes: a) sifting from solar cell sheets after printed and sintered cell sheets with conversion efficiency lower than 18% and filling factor thereof higher than 70%; b) performing low temperature annealing on the sifted cell sheets; c) sifting from the cell sheets after low temperature annealing cell sheets with lowered filling factor; d) re-sintering the sifted cell sheets; and e) sifting from the re-sintered cell sheets cell sheets with conversion efficiency lower than 18% and returning back to b) until most or all of the sifted meet demands. The low temperature annealing and re-sintering processes proceed cyclically, low temperature annealing can repair the defects in the substrate material, and the re-sintering process can repair the defects generated from low temperature annealing, and the two processes cooperate with each other and sifting can be performed repeatedly, greatly reducing the number of low efficient sheets and improving economic benefits. |
| US09419145B2 |
Semiconductor device
To give favorable electrical characteristics to a semiconductor device. The semiconductor device includes an insulating layer, a semiconductor layer over the insulating layer, a pair of electrodes over the semiconductor layer and each electrically connected to the semiconductor layer, a gate electrode over the semiconductor layer, and a gate insulating layer between the semiconductor layer and the gate electrode. The insulating layer includes an island-shaped projecting portion. A top surface of the projecting portion of the insulating layer is in contact with a bottom surface of the semiconductor layer, and is positioned on an inner side of the semiconductor layer when seen from above. The pair of electrodes covers part of a top surface and part of side surfaces of the semiconductor layer. Furthermore, the gate electrode and the gate insulating layer cover side surfaces of the projecting portion of the insulating layer. |
| US09419136B2 |
Dislocation stress memorization technique (DSMT) on epitaxial channel devices
The present disclosure relates to a transistor device having epitaxial source and drain regions with dislocation stress memorization (DSM) regions that provide stress to an epitaxial channel region, and an associated method of formation. The transistor device has an epitaxial stack disposed over a semiconductor substrate, and a gate structure disposed over the epitaxial stack. A channel region extends below the gate structure between epitaxial source and drain regions located on opposing sides of the gate structure. First and second dislocation stress memorization (DSM) regions have a stressed lattice that generates stress within the channel region. The first and second DSM regions respectively extend from below the epitaxial source region to a first location within the epitaxial source region from below the epitaxial drain region to a second location within the epitaxial drain region. Using the first and second DSM regions to stress the channel region, improves device performance. |
| US09419133B2 |
Semiconductor device and fabrication method of semiconductor device
P+ type regions and a p-type region are selectively disposed in a surface layer of a silicon carbide substrate base. The P+ type region is disposed in a breakdown voltage structure portion surrounding an active region. The P+ type region is disposed in the active region to make up a JBS structure. The p-type region surrounds the P+ type region to make up a junction termination (JTE) structure. A Schottky electrode forms a Schottky junction with an n-type silicon carbide epitaxial layer. The Schottky electrode overhangs an interlayer insulation film covering a portion of the P+ type region and the p-type region and this overhanging portion acts as a field plate. This enables the provision of a semiconductor device configured by using a wide band gap semiconductor capable of maintaining a high breakdown voltage with high reliability, and a method of fabricating thereof. |
| US09419129B2 |
Split gate semiconductor device with curved gate oxide profile
A split gate semiconductor device includes a trench gate having a first electrode region and a second electrode region that are separated from each other by a gate oxide layer and an adjacent dielectric layer. The boundary of the gate oxide layer and the dielectric layer is curved to avoid a sharp corner where the gate oxide layer meets the sidewalls of the trench. |
| US09419128B2 |
Bidirectional trench FET with gate-based resurf
A device includes a semiconductor substrate having a surface, a trench in the semiconductor substrate extending vertically from the surface, a body region laterally adjacent the trench, spaced from the surface, having a first conductivity type, and in which a channel is formed during operation, a drift region between the body region and the surface, and having a second conductivity type, a gate structure disposed in the trench alongside the body region, recessed from the surface, and configured to receive a control voltage is applied to control formation of the channel, and a gate dielectric layer disposed along a sidewall of the trench between the gate structure and the body region. The gate structure and the gate dielectric layer have a substantial vertical overlap with the drift region such that electric field magnitudes in the drift region are reduced through application of the control voltage. |
| US09419125B1 |
Doped barrier layers in epitaxial group III nitrides
A semiconductor structure having a Group III-N buffer layer and a Group III-N barrier layer in direct contact to form a junction between the Group III-V buffer layer the Group III-N barrier layer producing a two dimensional electron gas (2DEG) channel, the Group III-N barrier layer having a varying dopant concentration. The lower region of the Group III-N barrier layer closest to the junction is void of intentionally introduced dopant and a region above the lower region having intentionally introduced, predetermined dopant with a predetermined doping concentration above 1×1017 atoms per cm3. |
| US09419122B1 |
Etch-based fabrication process for stepped field-plate wide-bandgap
A method of making a stepped field gate for an FET including forming a first set of layers having a passivation layer on a barrier layer of the FET and a first etch stop layer over the first passivation layer, forming additional sets of layers having alternating passivation layer and etch stop layers, successively removing portions of each set of layers using lithography and reactive ion etching to form stepped passivation layers and a gate foot, applying a mask having an opening defining an extent of a stepped field-plate gate, and forming the stepped field plate gate and the gate foot by plating through the opening in the mask. |
| US09419121B1 |
Semiconductor device with multiple carrier channels
A semiconductor device includes a layered structure forming multiple carrier channels extending in parallel at different depths of the semiconductor device and a gate electrode having multiple gate fingers of different lengths penetrating the layered structure to reach and control corresponding carrier channels at the different depths. The semiconductor device also includes a carrier electrode having multiple carrier fingers of different lengths penetrating the layered structure to access the corresponding carrier channels. The carrier fingers are interdigitated with the gate fingers. |
| US09419119B2 |
Semiconductor device and manufacturing method thereof
A semiconductor device includes a semiconductor region, a first electrode provided on the semiconductor region, a second electrode provided on the semiconductor region adjacent to and spaced from a side of the first electrode, and containing an identical material as the material of the first electrode, a third electrode provided on the semiconductor region in a location between the first electrode and the second electrode, a first insulating film provided between the semiconductor region and the third electrode, and a fourth electrode connected to the third electrode containing the same material as the material of the first electrode and the second electrode. |
| US09419117B2 |
Semiconductor device, and manufacturing method for same
The present invention is directed to a semiconductor device including a semiconductor chip formed with an SiC-IGBT including an SiC semiconductor layer, a first conductive-type collector region formed such that the collector region is exposed on a second surface of the SiC semiconductor layer, a second conductive-type base region formed such that the base region is in contact with the collector region, a first conductive-type channel region formed such that the channel region is in contact with the base region, a second conductive-type emitter region formed such that the emitter region is in contact with the channel region to define a portion of a first surface of the SiC semiconductor layer, a collector electrode connected to the collector region, and an emitter electrode connected to the emitter region, and a MOSFET including a second conductive-type source region electrically connected to the emitter electrode and a second conductive-type drain region electrically connected to the collector electrode, the MOSFET connected in parallel to the SiC-IGBT. |
| US09419116B2 |
Diodes and methods of manufacturing diodes
Diodes and methods of manufacturing diodes are disclosed. In some examples, the diodes may include a cathode assembly. The cathode assembly may include a cathode electrode and a N+ substrate layer on the cathode electrode. The cathode assembly may additionally include a N buffer layer on the N+ substrate layer, and a N− bulk layer on the N buffer layer. The N buffer layer may be disposed between the N+ substrate layer and the N− bulk layer. Additionally, the N buffer layer may include at least one damaged sublayer having crystal damage configured to provide recombination centers for charge carriers and at least one undamaged sublayer that excludes crystal damage. The diodes may additionally include an anode assembly adjacent to the N− bulk layer. |
| US09419110B2 |
Method for reducing contact resistance in MOS
A method for growing a III-V semiconductor structure on a SinGe1-n substrate, wherein n is from 0 to 1 is provided. The method includes the steps of: (a) bringing a SinGe1-n substrate to a high temperature; (b) exposing the area to a group V precursor in a carrier gas for from 5 to 30 min, thereby forming a doped region at said area; (c) bringing the SinGe1-n substrate to a low temperature; (d) exposing the doped region to a group III precursor in a carrier gas and to a group V precursor in a carrier gas until a nucleation layer of III-V material of from 5 to 15 nm is formed on the nucleation layer; (e) bringing the SinGe1-n substrate to an intermediate temperature; and (f) exposing the nucleation layer to a group III precursor in a carrier gas and to a group V precursor in a carrier gas. |
| US09419109B2 |
Semiconductor device and method for fabricating the same
A semiconductor device comprises a substrate, a gate structure and a gate spacer. The substrate has a semiconductor fin protruding from a surface of the substrate. The gate structure is disposed on the semiconductor fin. The gate spacer is disposed on sidewalls of the gate structure, wherein the gate spacer comprises a first material layer and a second material layer stacked with each other and both of these two material layers are directly in contact with the gate structure. |
| US09419108B2 |
Semiconductor structure and method for manufacturing the same
One embodiment of present invention provides a method for manufacturing a semiconductor structure, which comprises: forming a gate stack on a semiconductor substrate and removing parts of the substrates situated on two sides of the gate stack; forming sidewall spacers on sidewalls of the gate stack and on sidewalls of the part of the substrate under the gate stack; forming doped regions in parts of the substrate on two sides of the gate stack, and forming a first dielectric layer to cover the entire semiconductor structure; selectively removing parts of the gate stack and parts of the first dielectric layer to form a channel region opening and source/drain region openings; forming a high K dielectric layer on sidewalls of the channel region opening; and implementing epitaxy process to form a continuous fin structure that spans across the channel region opening and the source/drain region openings. |
| US09419102B1 |
Method to reduce parasitic gate capacitance and structure for same
Disclosed are methods of forming a semiconductor structure comprising forming, on a supporting substrate, a plurality of composite structures, each comprising an elongated channel structure stacked over an elongated sacrificial base structure, the width of the elongated channel structure being greater than the width of the elongated base structure, subsequently forming a dielectric isolation layer, depositing sacrificial gates, growing source and drain regions on opposed sides of the sacrificial gates, removing the sacrificial gates and recessing the dielectric isolation layer, and removing portions of each of the elongated sacrificial base structures, and forming functional gate structures in regions previously occupied by the sacrificial gates. Also disclosed are semiconductor structures and intermediate structures obtained during such fabrication methods. |
| US09419098B2 |
Tuning strain in semiconductor devices
A Fin Field-Effect Transistor (FinFET) includes a semiconductor layer over a substrate, wherein the semiconductor layer forms a channel of the FinFET. A first silicon germanium oxide layer is over the substrate, wherein the first silicon germanium oxide layer has a first germanium percentage. A second silicon germanium oxide layer is over the first silicon germanium oxide layer. The second silicon germanium oxide layer has a second germanium percentage greater than the first germanium percentage. A gate dielectric is on sidewalls and a top surface of the semiconductor layer. A gate electrode is over the gate dielectric. |
| US09419092B2 |
Termination for SiC trench devices
A silicon carbide device has a termination region that includes a mesa region that links the termination region to an active area of the device and that includes one or more trenches. |
| US09419087B2 |
Bipolar junction transistor formed on fin structures
A Bipolar Junction Transistor (BJT) includes an elongated collector line, an elongated emitter line parallel to the collector line, and an elongated base line parallel to the collector line and positioned between the collector line and the base line. The emitter line, the base line, and the collector line are formed over fin structures. |
| US09419082B2 |
Source/drain profile engineering for enhanced p-MOSFET
P-type metal-oxide semiconductor field-effect transistors (pMOSFET's), semiconductor devices comprising the pMOSFET's, and methods of forming pMOSFET's are provided. The pMOSFET's include a silicon-germanium (SiGe) film that has a lower interface in contact with a semiconductor substrate and an upper surface, and the SiGe film has a graded boron doping profile where boron content increases upwardly over a majority of the width of boron-doped SiGe film between the lower interface of the SiGe film and the upper surface of the SiGe film. Methods of forming the pMOSFET's include: providing a semiconductor substrate; depositing a SiGe film on the semiconductor substrate, thereby forming a lower interface of the SiGe film in contact with the semiconductor substrate, and an upper surface of the SiGe film; and doping the SiGe film with boron to form a SiGe film having a graded boron doping profile where boron content increases upwardly over a majority of the width of boron-doped SiGe film between the lower interface of the SiGe film and the upper surface of the SiGe film. |
| US09419079B1 |
Low defect relaxed SiGe/strained Si structures on implant anneal buffer/strain relaxed buffer layers with epitaxial rare earth oxide interlayers and methods to fabricate same
A method provides a substrate having a top surface; forming a first semiconductor layer on the top surface, the first semiconductor layer having a first unit cell geometry; epitaxially depositing a layer of a metal-containing oxide on the first semiconductor layer, the layer of metal-containing oxide having a second unit cell geometry that differs from the first unit cell geometry; ion implanting the first semiconductor layer through the layer of metal-containing oxide; annealing the ion implanted first semiconductor layer; and forming a second semiconductor layer on the layer of metal-containing oxide, the second semiconductor layer having the first unit cell geometry. The layer of metal-containing oxide functions to inhibit propagation of misfit dislocations from the first semiconductor layer into the second semiconductor layer. A structure formed by the method is also disclosed. |
| US09419075B1 |
Wafer substrate removal
A semiconductor device is formed on a semiconductor substrate, including a primary portion of the substrate. An active component of the semiconductor device is disposed in the primary portion of the substrate. An interconnect region is formed on a top surface of the substrate. Semiconductor material is removed from the substrate in an isolation region, which is separate from the primary portion of the substrate; the isolation region extends from the top surface of the substrate to a bottom surface of the substrate. A dielectric replacement material is formed in the isolation region. The semiconductor device further includes an isolated component which is not disposed in the primary portion of the substrate. The dielectric replacement material in the isolation region separates the isolated component from the primary portion of the substrate. |
| US09419073B2 |
Integrated RF front end system
Systems and methods are disclosed for integrating functional components of front-end modules for wireless radios. Front-end modules disclosed may be dual-band front-end modules for use in 802.11ac-compliant devices. In certain embodiments, integration of front-end module components on a single die is achieved by implementing a high-resistivity layer or substrate directly underneath, adjacent to, and/or supporting SiGe BiCMOS technology elements. |
| US09419065B2 |
Flexible displays
An electronic device may be provided with an organic light-emitting diode display with minimized border regions. The border regions may be minimized by providing the display with bent edge portions having neutral plane adjustment features that facilitate bending of the bent edge portions while minimizing damage to the bent edge portions. The neutral plane adjustment features may include a modified backfilm layer of the display in which portions of the backfilm layer are removed in a bend region. A display device may include a substrate, a display panel on the substrate having display pixels, and peripheral circuitry proximate the display panel and configured to drive the display pixels. A portion of the periphery of the substrate may be bent substantially orthogonal to the display panel to reduce an apparent surface area of the display device. The bent portion may include an electrode for communication with the peripheral circuitry. |
| US09419059B2 |
Light emitting apparatus having first luminous body and second luminous body
A first luminous body is formed on a substrate and is linear. A second luminous body is also formed on the substrate and is linear. The second luminous body extends in parallel with the first luminous body. A first anode and a first cathode are formed on the substrate, and supply electric power to the first luminous body. A second anode and a second cathode are also formed on the substrate, and supply electric power to the second luminous body. The first anode and the first cathode extend in parallel with each other, and the second anode and the second cathode extend in parallel with each other. In a range overlapping with the first luminous body when seen in a plan view, the first anode is not connected to the second anode, and the first cathode is not connected to the second cathode. |
| US09419056B2 |
Resistive memory cell structures and methods
Resistive memory cell structures and methods are described herein. One or more memory cell structures comprise a first resistive memory cell comprising a first resistance variable material and a second resistive memory cell comprising a second resistance variable material that is different than the first resistance variable material. |
| US09419051B2 |
Solid-state imaging device
A solid-state imaging device is provided with a plurality of photoelectric converting portions each having a photosensitive region and an electric potential gradient forming region, and which are juxtaposed so as to be along a direction intersecting with a predetermined direction, a plurality of buffer gate portions each arranged corresponding to a photoelectric converting portion and on the side of the other short side forming a planar shape of the photosensitive region, and accumulates a charge generated in the photosensitive region of the corresponding photoelectric converting portion, and a shift register which acquires charges respectively transferred from the plurality of buffer gate portions, and transfers the charges in the direction intersecting with the predetermined direction, to output the charges. The buffer gate portion has at least two gate electrodes to which predetermined electric potentials are respectively applied so as to increase potential toward the predetermined direction. |
| US09419046B2 |
Integrated scintillator grid with photodiodes
Various embodiments of a structure implemented in an X-ray imaging system are described. In one aspect, a structure implemented in an X-ray imaging system includes a silicon wafer including a first side and a second side opposite the first side. The silicon wafer also includes an array of photodiodes on the first side of the silicon wafer with the photodiodes electrically isolated from each other as well as an array of grid holes on the second side of the silicon wafer. Each grid hole of the array of grid holes is aligned with a respective photodiode of the array of photodiodes. The structure also includes a layer of scintillating material disposed over the array of grid holes on the second side of the silicon wafer. The structure further includes a layer of reflective material disposed on the layer of scintillating material. |
| US09419045B2 |
Solid-state imaging device and electronic instrument
A solid-state imaging device including, a first semiconductor region of the first conduction type, a photoelectric conversion part having a second semiconductor region of the second conduction type formed in the region separated by the isolation dielectric region of the first semiconductor region, pixel transistors formed in the first semiconductor region, a floating diffusion region of the second conduction type which is formed in the region separated by the isolation dielectric region of the first semiconductor region, and an electrode formed on the first semiconductor region existing between the floating diffusion region and the isolation dielectric region and is given a prescribed bias voltage. |
| US09419040B2 |
Image pickup apparatus, semiconductor device, and electronic device including a buried portion disposed adjacent to a bonding portion, and method for manufacturing the same
There is provided a solid state image pickup apparatus including a first semiconductor substrate and a second semiconductor substrate which are bonded to each other, and a buried portion formed in a peripheral portion of the apparatus with a depth of a bonded surface of the first semiconductor substrate and the second semiconductor substrate in such a manner that the bonded surface of the first semiconductor substrate and the second semiconductor substrate is not exposed. |
| US09419035B2 |
Image sensor with color pixels having uniform light absorption depths
An example image sensor includes first, second, and third micro-lenses. The first micro-lens is in a first color pixel and has a first curvature and a first height. The second micro-lens is in a second color pixel and has a second curvature and a second height. The third micro-lens is in a third color pixel and has a third curvature and a third height. The first curvature is the same as both the second curvature and the third curvature and the first height is greater than the second height and the second height is greater than the third height, such that light absorption depths for the first, second, and third color pixels are the same. |
| US09419030B2 |
Solid-state image pickup device
A solid-state image pickup device capable of suppressing the generation of dark current and/or leakage current is provided. The solid-state image pickup device has a first substrate provided with a photoelectric converter on its primary face, a first wiring structure having a first bonding portion which contains a conductive material, a second substrate provided with a part of a peripheral circuit on its primary face, and a second wiring structure having a second bonding portion which contains a conductive material. In addition, the first bonding portion and the second bonding portion are bonded so that the first substrate, the first wiring structure, the second wiring structure, and the second substrate are disposed in this order. Furthermore, the conductive material of the first bonding portion and the conductive material of the second bonding portion are surrounded with diffusion preventing films. |
| US09419028B1 |
Method of manufacturing display device and forming an alignment mark having concave and convex portions formed along a first pattern
A method of manufacturing a display device is disclosed. In one aspect, the method includes forming an active layer over a substrate, forming a first insulating layer over the active layer, forming a gate electrode over the active layer, and forming an alignment mark over the substrate. The forming of the alignment mark includes forming a first layer including a first pattern and forming a second layer over the first layer and including concave and convex portions formed along the first pattern. The first insulating layer is interposed between the first and second layers. |
| US09419027B2 |
Array substrate, method for fabricating the same and display device
An array substrate, a method for fabricating the same and a display device are disclosed. The array substrate comprises a plurality of gate lines and a plurality of data lines which intersect each other to define a plurality of pixel regions, each of the pixel regions comprises a thin film transistor and further comprises: a base substrate; more than one protrusion disposed apart from each other on the base substrate; a first electrode layer comprising at least one first electrode strip disposed in a gap between adjacent protrusions; a second electrode layer comprising at least one second electrode strip disposed on the protrusions. |
| US09419025B2 |
Display device
The present invention relates to a display device, which includes a substrate; a first conductive layer disposed on the substrate and including a first terminal; a first insulating layer disposed on the first conductive layer; a second conductive layer disposed on the first insulating layer and including a second terminal; a second insulating layer disposed on the second conductive layer; a profile relieving member disposed on the second insulating layer; and a contact assistant disposed on the profile relieving member, in which the profile relieving member covers a portion of an edge of at least one of the first terminal and the second terminal. |
| US09419024B2 |
Methods for forming patterned semiconductors
An electro-optic display comprises a substrate (100), non-linear devices (102) disposed substantially in one plane on the substrate (100), pixel electrodes (106) connected to the non-linear devices (102), an electro-optic medium (110) and a common electrode (112) on the opposed side of the electro-optic medium (110) from the pixel electrodes (106). The moduli of the various parts of the display are arranged so that, when the display is curved, the neutral axis or neutral plane lies substantially in the plane of the non-linear devices (102). |
| US09419020B2 |
Analog circuit and semiconductor device
An object is to obtain a semiconductor device having a high sensitivity in detecting signals and a wide dynamic range, using a thin film transistor in which an oxide semiconductor layer is used. An analog circuit is formed with the use of a thin film transistor including an oxide semiconductor which has a function as a channel formation layer, has a hydrogen concentration of 5×1019 atoms/cm3 or lower, and substantially functions as an insulator in the state where no electric field is generated. Thus, a semiconductor device having a high sensitivity in detecting signals and a wide dynamic range can be obtained. |
| US09419019B2 |
Array substrate and display device
An array substrate and a display device is disclosed, for eliminating the interference of transient electromagnetic signals caused by the time-varying voltages on the gate lines and the data lines with the voltages on the pixel electrodes. The array substrate comprises gate lines and data lines disposed on a substrate, and pixel units surrounded and separated by the gate lines and the data lines; and the array substrate further comprises shielding electrodes disposed above at least one of the gate lines and the data lines to cover at least part of the at least one and electrically insulated from the gate lines and the data lines. |
| US09419016B2 |
Junctionless tunnel FET with metal-insulator transition material
Embodiments of the present disclosure provide an integrated circuit (IC) structure, which can include: a doped semiconductor layer having a substantially uniform doping profile; a first gate structure positioned on the doped semiconductor layer; and a second gate structure positioned on the doped semiconductor layer, the second gate structure including a metal-insulator transition material and a gate dielectric layer separating the metal-insulator transition material from the doped semiconductor layer. |
| US09419014B2 |
Alternating tap-cell strategy in a standard cell logic block for area reduction
An integrated circuit includes a plurality of N wells disposed on a P substrate. A plurality of tap columns is located across the plurality of N wells and a plurality of standard cells is located between the tap columns. A plurality of tap cells is disposed consecutively in the plurality of tap columns. Each tap cell further includes a first tap active and a second tap active. The first tap active of a first tap cell extends to the first tap active of a second tap cell which further extends to a well boundary of either the first tap cell or the second tap cell. The first tap active of the first tap cell and the first tap active of the second tap cell are adjacent to each other in the tap column. |
| US09419011B2 |
Three-dimensional semiconductor devices
Three-dimensional (3D) semiconductor devices are provided. The 3D semiconductor device includes a plurality of dummy pillars penetrating each cell pad of an electrode structure and the electrode structure disposed under each cell pad. Insulating patterns of a mold stack structure for formation of the electrode structure may be supported by the plurality of dummy pillars, so transformation and contact of the insulating patterns may be minimized or prevented. |
| US09419010B2 |
High aspect ratio etching method
A plurality of semiconductor layers is etched to define a first plurality of stacks of active strips between a first plurality of trenches. A first memory layer is formed on side surfaces of active strips in the first plurality of trenches, and a first layer of conductive material is formed over the first memory layer. The first plurality of stacks is etched to define a second plurality of stacks of active strips between a second plurality of trenches of the plurality of semiconductor layers. A second memory layer is formed on side surfaces of active strips in the second plurality of trenches, and a second layer of conductive material is formed over the second memory layer. Channel regions of memory cells in the memory device are formed in active strips of the plurality of semiconductor layers in the second plurality of stacks. |
| US09419007B2 |
Semiconductor device
A semiconductor device includes a first vertical memory string connected to a common source line, a second vertical memory string connected to a bit line, a pipe transistor suitable for selectively connecting the first and second vertical memory strings based on a block selection signal, and a plurality of transistors suitable for selectively connecting local lines of the first and second vertical memory strings to corresponding global lines based on the block selection signal. |
| US09419004B2 |
Fuse structure and semiconductor device including the same
A fuse structure includes a first fin pattern disposed in a field insulating layer that includes an upper surface that projects above an upper surface of the field insulating layer, a conductive pattern on the field insulating layer that crosses the first fin pattern, a first semiconductor region positioned on at least one side of the conductive pattern, and first and second contacts disposed on the conductive pattern on each side of the first fin pattern. The fuse structure may be included in a semiconductor device. |
| US09419002B2 |
Semiconductor device for reducing coupling capacitance
A semiconductor device includes a spacer having a nitride/oxide/nitride (NON) structure. The spacer is disposed between a sidewall of a bit line and a bit line contact and a sidewall of a storage node contact plug to reduce coupling capacitance between the bit line and a storage node contact plug and between the bit line contact and the storage node contact plug. |
| US09418998B2 |
Semiconductor devices including a bit line structure and a contact plug
Semiconductor devices are provided. A semiconductor device includes a bit line structure and a contact plug. The contact plug is adjacent a sidewall of the bit line structure and is on a sloped surface of the bit line structure. Moreover, in some embodiments, a level of the sloped surface of the bit line structure becomes lower as the sloped surface approaches the sidewall of the bit line structure. |
| US09418997B2 |
Floating body memory cell having gates favoring different conductivity type regions
A method for fabricating floating body memory cells (FBCs), and the resultant FBCs where gates favoring different conductivity type regions are used is described. In one embodiment, a p type back gate with a thicker insulation is used with a thinner insulated n type front gate. Processing, which compensates for misalignment, which allows the different oxide and gate materials to he fabricated is described. |
| US09418996B2 |
Method of manufacturing semiconductor integrated circuit device
Using an STI insulating film in a high breakdown voltage MOSFET leads to deterioration in reliability due to impact ionization near the bottom corner of a drain isolation insulating film.The invention provides a method of manufacturing a semiconductor integrated circuit device including forming a hard mask film, an opening therein, and a sidewall insulating film on the side surface thereof; forming a shallow trench in the opening with the hard mask film as a mask and oxidizing at least an exposed portion; filling the trench with an insulating film and then removing it so as to leave it outside the trench in the opening and thereby forming a drain offset STI insulating film inside and outside the trench; and forming a gate electrode extending from the upper portion of a gate insulating film in an active region contiguous thereto to the upper portion of the drain offset insulating film. |
| US09418994B1 |
Fin field effect transistor (FinFET) device structure
A fin field device structure and method for forming the same are provided. The FinFET device structure includes a substrate, and the substrate includes a first region and a second region. The FinFET device structure includes an isolation structure formed on the substrate and first fin structures formed on the first region. The FinFET device structure also includes second fin structures formed on the second region, and the number of the first fin structures is greater than the number of the second fin structures. The first fin structures have a first height, the second fin structures have a second height, and a gap between the first height and the second height is in a range from about 0.4 nm to about 4 nm. |
| US09418993B2 |
Device and method for a LDMOS design for a FinFET integrated circuit
Semiconductor devices and methods for manufacturing an LDMOS FinFET integrated circuit. The intermediate semiconductor device includes a substrate, a first well in the substrate, a second well in the substrate, and at least two polysilicon gates. The first well overlaps the second well and the at least one first gate is disposed over the first well and at least one second gate is disposed over the second well. The method includes forming a channel region and a drift region in the substrate, wherein the channel region overlaps the drift region, forming a shallow trench isolation region in the drift region, forming at least one first gate over the channel region, forming at least one second gate over the shallow trench isolation region, and applying at least one metal layer over the at least one first gate and the at least one second gate. |
| US09418991B2 |
ROM chip manufacturing structures
An integrated circuit (IC) chip embodiment includes first and second ROM cells arranged in a same row of a ROM array. The first and second ROM cells include first portions of first and second gate structures, respectively. The IC chip further includes a strap cell disposed between the first and second ROM cells. The strap cell includes second portions of the first and second gate structures. The first gate structure is physically separated from the second gate structure. |
| US09418983B2 |
Semiconductor device and associated method for manufacturing
A semiconductor device having an ESD protection structure and a method for forming the semiconductor device. The ESD protection structure is formed atop a termination area of the substrate and is electrically coupled between a source metal and a gate metal of the semiconductor device. The ESD protection structure has a first portion adjacent to the source metal, a second portion adjacent to the gate metal and a middle portion between and connecting the first portion and the second portion, wherein the middle portion has a first thickness greater than a second thickness of the first portion and the second portion. Such an ESD protection structure is beneficial to the formation of interlayer vias which are formed to couple the ESD protection structure to the source metal and the gate metal. |
| US09418982B2 |
Multi-layered integrated circuit with selective temperature coefficient of resistance
The integrated circuit described herein includes: a first resistor having a first trench in a dielectric layer, the first trench having a first width; a second resistor having a second trench in the dielectric layer, the second trench having a second width not equal to the first width; a trench in a dielectric layer, a first conductive layer having a first TCR and coating at least a portion of the first trench and the second trench; and a second conductive layer having a second TCR and coating at least a portion of the first conductive layer in each of the first trench and the second trench, wherein the second TCR is not equal to the first TCR, and wherein the TCR of the IC is selected based on a dimension of the trench, a thickness of the first conductive layer, and a thickness of the second conductive layer. |
| US09418981B2 |
High-voltage electrostatic discharge device incorporating a metal-on-semiconductor and bipolar junction structure
A semiconductor device formed in a substrate, including a first region, a second region formed over the first region, a third region, a fourth region formed over the third region, and a fifth region formed over the first region and contacting the second region. The first, second, and fourth regions have a first-type conductivity, and constitute drain region, drain electrode, and source region of a metal-on-semiconductor (MOS) structure. The second region has a higher doping level than the first region. The third region has a second-type conductivity and constitutes channel and body regions of the MOS structure. The fifth region has the second-type conductivity and constitutes an emitter region of a bipolar junction (BJ) structure. The second and third regions constitute base and collector regions of the BJ structure. |
| US09418976B2 |
Chip stack with electrically insulating walls
A method of forming a chip stack is provided and includes arraying solder pads along a plane of a major surface of a substrate forming walls of electrically insulating material between adjacent ones of the solder pads. |
| US09418974B2 |
Stacked semiconductor die assemblies with support members and associated systems and methods
Stacked semiconductor die assemblies with support members and associated systems and methods are disclosed herein. In one embodiment, a semiconductor die assembly can include a package substrate, a first semiconductor die attached to the package substrate, and a plurality of support members also attached to the package substrate. The plurality of support members can include a first support member and a second support member disposed at opposite sides of the first semiconductor die, and a second semiconductor die can be coupled to the support members such that at least a portion of the second semiconductor die is over the first semiconductor die. |
| US09418971B2 |
Package-on-package structure including a thermal isolation material and method of forming the same
A semiconductor device includes a first package component and a second package component. The first package component has a first die formed on a first substrate. A second package component has a second die formed on a second substrate. A thermal isolation material is attached on the first die, wherein the thermal isolation material thermally insulates the second die from the first die, and the thermal isolation material has a thermal conductivity of from about 0.024 W/mK to about 0.2 W/mK. A first set of conductive elements couples the first package component to the second package component. |
| US09418970B2 |
Redistribution layers for microfeature workpieces, and associated systems and methods
Redistribution layers for microfeature workpieces, and associated systems and methods are disclosed. One method for processing a microfeature workpiece system includes positioning a pre-formed redistribution layer as a unit proximate to and spaced apart from a microfeature workpiece having an operable microfeature device. The method can further include attaching the redistribution layer to the microfeature workpiece and electrically coupling the redistribution layer to the operable microfeature device. |
| US09418969B2 |
Packaged semiconductor devices and packaging methods
Packaged semiconductor devices and packaging methods are disclosed. In some embodiments, a packaged semiconductor device includes an integrated circuit die and through-vias disposed in a molding compound. A first redistribution layer (RDL) is disposed over a first side of the through-vias, the integrated circuit die, and the molding compound. A second RDL is disposed over a second side of the through-vias, the integrated circuit die, and the molding compound. Contact pads are disposed over the second RDL. An insulating material of the second RDL includes a recess around a perimeter of one of the contact pads. |
| US09418967B2 |
Semiconductor device
A semiconductor device includes a package substrate, an IF chip, and a core chip. The package substrate has: first electrodes aligned and disposed on a first rear surface; second electrodes aligned and disposed in the first direction (Y direction) on a first front surface; and wiring that electrically connects the first electrodes and the second electrodes. The IF chip has third electrodes bonded to the second electrodes. The core chip is connected to the IF chip. In the first direction, the length of the IF chip is more than that of the core chip but equal to or less than that of the package substrate. One of the first electrodes is disposed further toward the outside than a core chip end portion in the first direction. At least one of the second electrodes is disposed further toward the outside than the core chip end portion in the first direction. |
| US09418966B1 |
Semiconductor assembly having bridge module for die-to-die interconnection
In one example, a semiconductor assembly comprises a first IC die, a second IC die, and a bridge module. The first IC die includes, on a top side thereof, first interconnects of a plurality of interconnects and first inter-die contacts of a plurality of inter-die contacts. The second IC die includes, on a top side thereof, second interconnects of the plurality of interconnects and second inter-die contacts of the plurality of inter-die contracts. The bridge module is disposed between the first interconnects and the second interconnects and includes bridge interconnects on a top side thereof, the bridge interconnects mechanically and electrically coupled to the plurality of inter-die contacts, and layer(s) of conductive interconnect disposed on the top side thereof to route signals between the first IC and the second IC. A back side of the bridge module does not extend beyond a height of the plurality of interconnects. |
| US09418965B1 |
Embedded interposer with through-hole vias
A method of forming an integrated circuit package may include forming a first layer of a package substrate and mounting an interposer structure on the first layer of a substrate. In some instances, adhesive is used to attach the interposer structure to the first layer of the substrate. After the interposer structure is mounted on the first layer of the substrate, at least one hole is formed through the interposer structure. The hole may be filled with a conductive material such as copper to form a through-hole via in the interposer structure. A second layer of the substrate may be formed over the interposer structure and the first layer of the substrate. Integrated circuit (IC) dies may be mounted on the substrate and signals may be routed between the IC dies via the interposer structure embedded in the substrate. |
| US09418958B2 |
Anisotropic conductive adhesive
An anisotropic conductive adhesive includes an epoxy adhesive containing an epoxy compound and a curing agent and conducive particles dispersed in the epoxy adhesive. When elastic moduluses at 35° C., 55° C., 95° C., and 150° C. of a cured product of the anisotropic conductive adhesive are denoted by EM35, EM55, EM95, and EM150, respectively, and change rates in the elastic modulus between 55° C. and 95° C. and between 95° C. and 150° C. are denoted by ΔEM55-95 and ΔEM95-150, respectively, the following expressions (1) to (5) are satisfied 700 Mpa≦EM35≦3000 MPa (1) EM150 |
| US09418953B2 |
Packaging through pre-formed metal pins
A package includes first package component and a second package component. The first package component includes a first electrical connector at a surface of the first package component, and a first solder region on a surface of the first electrical connector. The second package component includes a second electrical connector at a surface of the second package component, and a second solder region on a surface of the second electrical connector. A metal pin has a first end bonded to the first solder region, and a second end bonded to the second solder region. |
| US09418950B2 |
Multiple band multiple mode transceiver front end flip-chip architecture and circuitry with integrated power amplifiers
An integrated circuit architecture and circuitry is defined by a die structure with a plurality of exposed conductive pads arranged in a grid of rows and columns. The die structure has a first operating frequency region with a first transmit and receive chain, and a second operating frequency region with a second transmit chain and a second receive chain. There is a shared region of the die structure defined by an overlapping segment of the first operating frequency region and the second operating frequency region with a shared power supply input conductive pad connected to the first transmit chain, the second transmit chain, the first receive chain, and the second receive chain, and a shared power detection output conductive pad connected to the first transmit chain and the second transmit chain. |
| US09418949B2 |
Semiconductor device having voids between top metal layers of metal interconnects
The invention provides a semiconductor device including a substrate, a dielectric layer, a dummy bonding pad, a bonding pad, a redistribution layer, and a metal interconnect. The substrate includes a non-device region and a device region. The dielectric layer is on the non-device region and the device region. The dummy bonding pad is on the dielectric layer of the non-device region. The metal interconnect is in the dielectric layer of the non-device region and connected to the dummy bonding pad. The bonding pad is on the dielectric layer of the device region. The buffer layer is between the bonding pad and the dielectric layer. The buffer layer includes metal, metal nitride, or a combination thereof. The redistribution layer is on the dielectric layer and connects the dummy bonding pad and the bonding pad. |
| US09418948B2 |
Method of making bond pad
A method of making a bonding pad for a semiconductor device includes depositing a first region of the bonding pad on a top metal of the semiconductor device at a first temperature, wherein the first region comprises aluminum, and an entirety of a material of the first region of the bonding pad is different from a material of the top metal. The method further includes depositing a second region of the bonding pad on the first region at a second temperature, wherein the first temperature is different from the second temperature, and the second region is a metallic region. |
| US09418944B2 |
Semiconductor package
A semiconductor package includes a support substrate; a stress relaxation layer provided on a main surface of the support substrate; a semiconductor device located on the stress relaxation layer; an encapsulation material covering the semiconductor device, the encapsulation material being formed of an insulating material different from that of the stress relaxation layer; a line running through the encapsulation material and electrically connected to the semiconductor device; and an external terminal electrically connected to the line. Where the support substrate has an elastic modulus of A, the stress relaxation layer has an elastic modulus of B, and the encapsulation material has an elastic modulus of C under a same temperature condition, the relationship of A>C>B or C>A>B is obtained. |
| US09418943B2 |
Semiconductor package and method of manufacturing the same
A semiconductor package including a marking film and a method of fabricating the same are provided wherein a marking film including a thermoreactive layer may be applied to a molding layer to protect a semiconductor chip under the molding layer and to efficiently perform a marking process. The thickness of the molding layer may thereby be reduced so the entire thickness of the semiconductor package may be reduced. Also, it is possible to prevent warpage of the semiconductor package through the marking film, provide the surface of the semiconductor package with gloss and freely adjust the color of the surface of the semiconductor package. |
| US09418940B2 |
Structures and methods for stack type semiconductor packaging
Methods and structures for stack type semiconductor packaging are disclosed. In one embodiment, a semiconductor device includes a semiconductor chip mounted onto a substrate, a first resin molding portion formed on the substrate for sealing the semiconductor chip, and a through metal mounted on the substrate so as to pierce the first resin molding portion around the semiconductor chip. The semiconductor device further comprises an upper metal electrically coupled with the through metal and mounted on the first resin molding portion to extend from the through metal toward the semiconductor chip along an upper surface of the first resin molding portion, where the through metal and the upper metal are formed into an integral structure. |
| US09418936B2 |
Power line structure for semiconductor apparatus
A semiconductor apparatus has one or more semiconductor chips. The semiconductor apparatus may include a power supply pad; power lines disposed on one side of the power supply pad, and including a first power line and a second power line; and connection lines connecting the power supply pad and the power lines. The connection lines may include a plurality of first connection lines connecting the power supply pad and the first power line, and a plurality of second connection lines connecting the power supply pad and the second power line, and disposed between the first connection lines. One or more pair of adjacent first connection lines may have a connection part by which the pair of adjacent first connection lines are connected with each other. |
| US09418923B2 |
Semiconductor component having through-silicon vias and method of manufacture
A semiconductor component includes a semiconductor substrate having an opening A first dielectric liner having a first compressive stress is disposed in the opening. A second dielectric liner having a tensile stress is disposed on the first dielectric liner. A third dielectric liner having a second compressive stress disposed on the second dielectric liner. |
| US09418921B2 |
Power module
A power module includes a first substrate, at least two power elements, at least one first conductive structure and at least one leadframe. The first substrate includes a dielectric frame, two first fan-out circuit structure layers and two dielectric plates. The two first fan-out circuit structure layers are respectively disposed on two opposite surfaces of the dielectric frame, the two dielectric plates are respectively disposed on the two first fan-out circuit structure layers, each of the dielectric plates has at least one opening, and the opening and the corresponding first fan-out circuit structure layer form a concavity. The two power elements are respectively embedded in the two concavities. The two power elements are electrically connected to each other through the first conductive structure. The leadframe disposed at the first substrate is electrically connected to the two power elements, and is partially extended outside the first substrate. |
| US09418919B2 |
Leadless chip carrier having improved mountability
Consistent with an example embodiment, there is surface-mountable non-leaded chip carrier for a semiconductor device. The device comprises a first contact. A second contact is relative to the first contact; the second contact has a split therein to provide first and second portions of the second contact arranged relative to one another to lessen tilting of a soldering condition involving attachment of the chip carrier to a printed circuit board. |
| US09418911B2 |
Three-dimensional semiconductor memory device having sidewall and interlayer molds
Provided are a three-dimensional semiconductor device and a method of fabricating the same. The three-dimensional semiconductor device may include a mold structure for providing gap regions and an interconnection structure including a plurality of interconnection patterns disposed in the gap regions. The mold structure may include interlayer molds defining upper surfaces and lower surfaces of the interconnection patterns and sidewall molds defining sidewalls of the interconnection patterns below the interlayer molds. |
| US09418908B2 |
Wafer processing method
A wafer processing method includes a first correction step of measuring a distance “a” between a first cut groove previously formed by a first cutting unit and a division line for the next cut groove, and correcting an actual index amount by using a deviation “b” of the first cutting unit equivalent to the difference between the distance “a” and a proper index amount of the first cutting unit, and a second correction step of forming a measurement groove by using a second cutting unit along the division line for the next cut groove, measuring a distance “c” between the first cut groove and the measurement groove, and correcting an actual index amount of the second cutting unit by using a deviation “d” equivalent to the difference between the distance “c” and a proper index amount of the second cutting unit during the cutting step. |
| US09418905B2 |
Adaptive patterning for panelized packaging
An adaptive patterning method and system for fabricating panel based package structures is described. Misalignment for individual device units in a panel or reticulated wafer may be adjusted for by measuring the position of each individual device unit and forming a unit-specific pattern over each of the respective device units. |
| US09418904B2 |
Localized CMP to improve wafer planarization
To provide improved planarization, techniques in accordance with this disclosure include a CMP station that utilizes localized planarization on a wafer. This localized planarization, which is often carried out in a localized planarization station downstream of a CMP station, applies localized planarization to less than the entire face of the wafer to correct localized non-planar features. Other systems and methods are also disclosed. |
| US09418903B2 |
Structure and method for effective device width adjustment in finFET devices using gate workfunction shift
Embodiments of the present invention provide methods and structures by which the inherent discretization of effective width can be relaxed through introduction of a fractional effective device width, thereby allowing greater flexibility for design applications, such as SRAM design optimization. A portion of some fins are clad with a capping layer or workfunction material to change the threshold voltage (Vt) for a part of the fin, rendering that part of the fin electrically inactive, which changes the effective device width (Weff). Other fins are unclad, and provide maximum area of constant threshold voltage. In this way, the effective device width of some devices is reduced. Therefore, the effective device width is controllable by controlling the level of cladding of the fin. |
| US09418901B2 |
Semiconductor device containing HEMT and MISFET and method of forming the same
A semiconductor structure with a MISFET and a HEMT region includes a first III-V compound layer. A second III-V compound layer is disposed on the first III-V compound layer and is different from the first III-V compound layer in composition. A third III-V compound layer is disposed on the second III-V compound layer is different from the second III-V compound layer in composition. A source feature and a drain feature are disposed in each of the MISFET and HEMT regions on the third III-V compound layer. A gate electrode is disposed over the second III-V compound layer between the source feature and the drain feature. A gate dielectric layer is disposed under the gate electrode in the MISFET region but above the top surface of the third III-V compound layer. |
| US09418898B2 |
Integrated circuits with selective gate electrode recess
Integrated circuits including MOSFETs with selectively recessed gate electrodes. Transistors having recessed gate electrodes with reduced capacitive coupling area to adjacent source and drain contact metallization are provided alongside transistors with gate electrodes that are non-recessed and have greater z-height. In embodiments, analog circuits employ transistors with gate electrodes of a given z-height while logic gates employ transistors with recessed gate electrodes of lesser z-height. In embodiments, subsets of substantially planar gate electrodes are selectively etched back to differentiate a height of the gate electrode based on a given transistor's application within a circuit. |
| US09418893B2 |
Organic electroluminescent device and method for fabricating the same
Disclosed an organic electroluminescent device and a method for fabricating the same. The device may include a thin film transistor disposed on a substrate; a first electrode formed for each pixel on the thin film transistor; a first pixel define layer formed to cover an edge portion of the first electrode; a second pixel define layer formed on the first pixel define layer; an organic layer formed on the first electrode; and a second electrode formed on the organic layer. |
| US09418892B2 |
Transistor, semiconductor device and method of manufacturing the same
A semiconductor device including a central region, side regions located in both sides of the central region, and conductive layers including a first barrier pattern formed in the central region, a material pattern formed in the first barrier pattern and having an etch selectivity with respect to the first barrier pattern, and a second barrier pattern formed in the material pattern; and insulating layers alternately stacked with the conductive layers. |
| US09418891B2 |
Method for fabricating semiconductor device including silicon-containing layer and metal-containing layer, and conductive structure of the same
A method for fabricating a semiconductor device includes forming a silicon-containing layer; forming a metal-containing layer over the silicon-containing layer; forming an undercut prevention layer between the silicon containing layer and the metal containing layer; etching the metal-containing layer; and forming a conductive structure by etching the undercut prevention layer and the silicon-containing layer. |
| US09418890B2 |
Method for tuning a deposition rate during an atomic layer deposition process
Embodiments of the invention provide methods for depositing a material on a substrate within a processing chamber during a vapor deposition process, such as an atomic layer deposition (ALD) process. In one embodiment, a method is provided which includes sequentially exposing the substrate to a first precursor gas and at least a second precursor gas while depositing a material on the substrate during the ALD process, and continuously or periodically exposing the substrate to a treatment gas prior to and/or during the ALD process. The deposition rate of the material being deposited may be controlled by varying the amount of treatment gas exposed to the substrate. In one example, tantalum nitride is deposited on the substrate and the alkylamino metal precursor gas contains a tantalum precursor, such as pentakis(dimethylamino) tantalum (PDMAT), the second precursor gas contains a nitrogen precursor, such as ammonia, and the treatment gas contains dimethylamine (DMA). |
| US09418886B1 |
Method of forming conductive features
A method includes forming a patterned mask layer over a conductive layer; forming a first dielectric layer over the patterned mask layer and the conductive layer; selectively etching the first dielectric layer, thereby exposing an upper surface of the patterned mask layer, wherein the upper surface of the first dielectric layer is lower than a top surface of the patterned mask layer; removing the patterned mask layer; and selectively etching the conductive layer to form a conductive feature having a tapered profile. |
| US09418882B2 |
Device and method for aligning substrates
A method for alignment and contact-making of a first substrate with a second substrate using several detection units as well as a corresponding device. |
| US09418877B2 |
Integrated device comprising high density interconnects in inorganic layers and redistribution layers in organic layers
Some novel features pertain to an integrated device (e.g., integrated package) that includes a base portion for the integrated device, a first die (e.g., first wafer level die), and a second die (e.g., second wafer level die). The base portion includes a first inorganic dielectric layer, a first set of interconnects located in the first inorganic dielectric layer, a second dielectric layer different from the first inorganic dielectric layer, and a set of redistribution metal layers in the second dielectric layer. The first die is coupled to a first surface of the base portion. The second die is coupled to the first surface of the base portion, the second die is electrically coupled to the first die through the first set of interconnects. |
| US09418873B2 |
Integrated circuit with on-die decoupling capacitors
A semiconductor device has an on-die decoupling capacitor that is shared between alternative high-speed interfaces. A capacitance pad is connected to the decoupling capacitor and internal connection pads are connected respectively to the alternative interfaces. Internal connection bond wires connect the decoupling capacitor to the selected interface through the capacitance pad and the internal connection pads in the same process as connecting the die to external electrical contacts of the device. |
| US09418870B2 |
Silicon germanium-on-insulator formation by thermal mixing
A layer of amorphous silicon is formed on a germanium-on-insulator substrate, or a layer of germanium is formed on a silicon-on-insulator substrate. An anneal is then performed which causes thermal mixing of silicon and germanium atoms within one of the aforementioned structures and subsequent formation of a silicon germanium-on-insulator material. |
| US09418859B2 |
Plasma-enhanced etching in an augmented plasma processing system
Methods for etching a substrate in a plasma processing chamber having at least a primary plasma generating region and a secondary plasma generating region separated from said primary plasma generating region by a semi-barrier structure. The method includes generating a primary plasma from a primary feed gas in the primary plasma generating region. The method also includes generating a secondary plasma from a secondary feed gas in the secondary plasma generating region to enable at least some species from the secondary plasma to migrate into the primary plasma generating region. The method additionally includes etching the substrate with the primary plasma after the primary plasma has been augmented with migrated species from the secondary plasma. |
| US09418856B2 |
Methods of forming titanium-aluminum layers for gate electrodes and related semiconductor devices
Methods of forming a semiconductor device are provided in which a first titanium-aluminum layer is formed in a recess. A first titanium layer is formed in the recess on top of the first titanium-aluminum layer. A first aluminum layer is formed in the recess on top of the first titanium layer to form a first preliminary gate electrode structure in the recess. The first preliminary gate electrode structure is heated to a temperature sufficient to convert the first titanium-aluminum layer, the first titanium layer and at least some of the first aluminum layer into a second titanium-aluminum layer. A second titanium layer is formed on top of the second titanium-aluminum layer. A second aluminum layer that is thicker than the first aluminum layer is then formed on top of the second titanium layer. The structure is heated to a temperature sufficient to convert the second titanium-aluminum layer, the second titanium layer and the second aluminum layer to a final third titanium-aluminum layer and final gate structure. |
| US09418853B1 |
Method for forming a stacked layer structure
The present invention provides a method for forming a stacked layer structure, including: first, a recess is provided, next, an oxide layer is formed in the recess, where the oxide layer has a thickness T1, a high-k layer is formed on the oxide layer, a barrier layer is formed on the high-k layer, a silicon layer is then formed on the barrier layer, afterwards, an annealing process is performed on the silicon layer, so as to form an oxygen-containing layer between the silicon layer and the barrier layer, where the oxide layer has a thickness T2 after the annealing process is performed, and satisfies the relationship: (T2−T1)/T1≦0.05, and the silicon layer and the oxygen-containing layer are removed. |
| US09418848B2 |
Methods of forming patterns with a mask formed utilizing a brush layer
Some embodiments include methods of forming patterns. A first mask is formed over a material. The first mask has features extending therein and defines a first pattern. The first pattern has a first level of uniformity across a distribution of the features. A brush layer is formed across the first mask and within the features to narrow the features and create a second mask from the first mask. The second mask has a second level of uniformity across the narrowed features which is greater than the first level of uniformity. A pattern is transferred from the second mask into the material. |
| US09418847B2 |
Lithography system and method for haze elimination
The present disclosure provides an apparatus in semiconductor manufacturing. The apparatus includes a mask, a pellicle frame attached to the mask, and a pellicle joined to the pellicle frame thereby forming a sealed enclosure bounded by the pellicle, the pellicle frame, and the mask. The apparatus further includes photo-catalyst particles introduced into the sealed enclosure before the sealed enclosure is formed. The photo-catalyst particles prevent haze formation within the enclosure during lithography exposure processes. |
| US09418844B1 |
Selenium interlayer for high-efficiency multijunction solar cell
A multi-junction solar cell is provided and includes multiple semiconducting layers and an interface layer disposed between the multiple semiconducting layers. The interface layer is made from an interface bonding material that has a refractive index such that a ratio of a refractive index of each of the multiple semiconducting layers to the refractive index of the interface bonding material is less than or equal to 1.5. |
| US09418842B2 |
Coating liquid for forming metal oxide thin film, metal oxide thin film, field-effect transistor, and method for manufacturing field-effect transistor
A coating liquid for forming a metal oxide thin film includes: an inorganic indium compound; an inorganic calcium compound or an inorganic strontium compound, or both thereof; and an organic solvent. |
| US09418834B2 |
System and methods for spin-on coating of self-assembled monolayers or periodic organosilicates on a substrate
This disclosure relates to a processing system for spin-coating a substrate with Molecular Self-assembly (MSA) chemicals to form photoresist films and/or low dielectric constant (low-k) films on the substrate. The spin-coating processing system may include a spin-coating chamber that can receive and spin-coat MSA chemicals onto the substrate and an annealing chamber to thermally treat the substrate after the spin-coat process. In certain embodiments, the spin-coating processing system may also pre-treat or pre-wet the substrate prior to the spin-coating process. |
| US09418833B2 |
Synthetic diamond coated compound semiconductor substrates
A method of fabricating a synthetic diamond coated compound semiconductor substrate, the method comprising: loading a composite substrate into a chemical vapor deposition (CVD) reactor, the composite substrate comprising a single crystal carrier wafer, a layer of single crystal compound semiconductor epitaxially grown on the carrier wafer, and an interface layer disposed on the layer of compound semiconductor, the interface layer forming a growth surface suitable for growth of synthetic diamond material thereon via a CVD technique; and growing a layer of CVD diamond material on the growth surface of the interface layer, wherein during growth of CVD diamond material a temperature difference at the growth surface between an edge and a center point thereof is maintained to be no more than 80° C., and wherein the carrier wafer has an aspect ratio, defined by a ratio of thickness to width, of no less than 0.25/100. |
| US09418830B2 |
Methods for bonding semiconductor wafers
A method of bonding a cap wafer to a device wafer includes heating the device wafer and the cap wafer in the chamber, cooling the device wafer and the cap wafer in the chamber, pressurizing the chamber, introducing gas into the chamber while the chamber is pressurized to accelerate a rate of one of a group consisting of the heating and the cooling, and applying pressure to the device wafer and the cap wafer while a bond is formed between the device wafer and the cap wafer. |
| US09418826B2 |
Ion optical system for mass spectrometer
A mass spectrometer includes: a plasma generation device for generating plasma for ionizing an introduced sample; an interface device for drawing the plasma into vacuum; an ion lens device for extracting and inducing ions as an ion beam from the plasma; a collision/reaction cell for removing an interference ion from the ion beam; a mass analyzer or filter for allowing a predetermined ion in the ion beam from the collision/reaction cell to pass along a first axis based on a mass-to-charge ratio; an ion detector for detecting the ion; an ion deflection device before the mass analyzer, and also an ion deflection device between the mass analyzer and the ion detector. The mass spectrometer reduces background noises in a mass analyzer by removing neutral particles from the ion beam without reducing the measurement sensitivity on ions to be analyzed as much as possible. |
| US09418822B2 |
Plasma processing apparatus, plasma processing method and high frequency generator
A plasma processing apparatus includes a plasma generating device configured to generate a plasma within a processing vessel by using a high frequency wave generated by a microwave generator 41 including a magnetron 42 configured to generate the high frequency wave; detectors 54a and 54b configured to measure a power of a traveling wave that propagates to a load side and a power of a reflected wave reflected from the load side, respectively; and a voltage control circuit 53a configured to control a voltage supplied to the magnetron 42 by a power supply 43. Further, the voltage control circuit 53a includes a load control device configured to supply, to the magnetron 42, a voltage corresponding to a power calculated by adding a power calculated based on the power of the reflected wave measured by the detector 54b to the power of the traveling wave measured by the detector 54a. |
| US09418817B2 |
Focused ion beam apparatus and control method thereof
A focused ion beam apparatus has an emitter for emitting an ion beam, an ion source chamber accommodating the emitter, a cooling unit and a heating unit for cooling and heating, respectively, the emitter, and an ion source gas supply section for supplying to the ion source chamber an ion source gas that is exchangeable with another ion source gas. A control section controls an operation of the cooling unit such that a temperature of a wall surface contacting the ion source gas in the ion source chamber is maintained at a temperature higher than a temperature at which the ion source gas before and after the exchange freezes. The control section controls an operation of the heater so that the emitter is temporarily heated to release the ion source gas from a surface of the emitter before the ion source gas is exchanged with the other ion source gas. |
| US09418811B2 |
Relay
A relay includes a fixed contact point, a movable contact member and an electromagnetic device. The electromagnetic device includes a bobbin, a coil, a movable iron core, a first armature, a second armature, and a ferromagnetic member. The first armature has a first hole to which a first end portion of the movable iron core is insertion-fitted. The second armature has a second hole to which a second end portion of the movable iron core is insertion-fitted. The bobbin has a first rib formed on each of facing surfaces of a pair of first side pieces and a second rib formed on each of facing surfaces of a pair of second side pieces. The first armature is interposed between the first ribs of the pair of first side pieces and the second armature is interposed between the second ribs of the pair of second side pieces. |
| US09418810B2 |
Multiphase medium voltage vacuum contactor
A multiphase medium voltage vacuum contactor is disclosed which can include a mounting frame on which there are positioned: for each phase, a current interrupter having a vacuum bulb which contains a fixed contact and a corresponding movable contact; and an actuator for moving the movable contacts between a closed position where they are coupled each to a corresponding fixed contact and an open position where they are each electrically separated from the corresponding fixed contact, and an electronic unit driving the actuator. An exemplary voltage transformer for feeding the electronic unit can be mounted on the frame. One or more sacrificial fault-protection devices and/or current sensors can be operatively associated to the voltage transformer and embedded into an electrically insulating coating encasing the transformer. |
| US09418808B2 |
RFID tag based state monitoring of contactors
A motor starter or contactor having a radio frequency identification (RFID) tag incorporated therein for accurate determination of the position of contacts in the motor starter/contactor is disclosed. The motor starter/contactor includes separable contacts comprising a fixed contact structure and a movable contact structure having a closed position and an open position. An electromagnet is also included in the motor starter/contactor that is arranged to translate the movable contact structure between the closed position and the open position. An RFID tag is positioned on or adjacent the separable contacts to indicate the position of the movable contact structure in the motor starter/contactor. |
| US09418806B2 |
Power switching apparatus
A power switching apparatus comprising a vacuum interrupter assembly and a switching assembly connected in parallel between a pair of terminals, each of the terminals being connectable in use to an electrical circuit. The vacuum interrupter assembly includes at least one vacuum interrupter having a pair of electrically conductive rods connected at a first end to a respective one of the terminals and extending at a second end into a vacuum tight enclosure. A first electrode is mounted at or near the second end of a first of the electrically conductive rods and a slotted coil including a support base mounted at or near the second end of a second of the electrically conductive rods. A second electrode is mounted on an inner surface of the slotted coil and a third electrode is mounted on the support base. The second ends of the electrically conductive rods extend into the vacuum tight enclosure such that the first and third electrodes define opposed contact surfaces and at least one of the electrically conductive rods is movable relative to the other to open or close a gap between the opposed contact surfaces. The switching assembly includes at least one crossed-field plasma discharge switch that does not carry any current in its open state and conducts and carries current in its closed state. The switching assembly is controllable to switch between open and closed states to modify, in use of the power switching apparatus, a current flowing through the vacuum interrupter assembly. |
| US09418800B2 |
Slim keypad structure and electronic device using the same
A slim key includes a supporting plate, at least one key cap, at least one dome and a light-permeable circuit board. The supporting plate is disposed above the circuit board and has at least one frame part. Each frame part is formed with a light-permeable hole at a central portion thereof. The key pad is disposed on the top surface of the frame part correspondingly. The circuit board has at least one conductive circuit formed thereon under the dome correspondingly. The dome is correspondingly disposed between the frame part and the circuit board. According to one embodiment, the instant disclosure also provides an electronic device with the slim keypad structure. |
| US09418796B2 |
Electrode foil, current collector, electrode, and electric energy storage element using same
A cathode foil for a solid electrolytic capacitor is designed to increase capacitance, reduce ESR and leakage current, enhance heat resistance, and reduce production costs, while enhancing a power density, realizing rapid charging-discharging, and improving a life property, in an electric energy storage element such as a secondary battery, an electric double layer capacitor and a hybrid capacitor. A cathode foil or a current collector may include a metal foil, a metal layer, a mixed layer containing carbon and a substance composing the metal layer in a mixed state, and a carbon layer consisting substantially of carbon, each formed on the metal foil. The mixed layer is configured to have a composition changing from a state containing substantially only the substance composing the metal layer to a state containing substantially only carbon, in a direction from the metal layer to the carbon layer. |
| US09418794B2 |
MEMS variable capacitor
Disclosed is a MEMS variable capacitor, the capacitor including a first electrode, a second electrode that is floated on an upper surface of the first electrode, and a third electrode capable of variably-adjusting a capacitance value by adjusting a gap between the first electrode and the second electrode. |
| US09418793B2 |
Variable capacitance device
A variable capacitance device includes a substrate, a beam portion, lower drive electrodes and upper drive electrodes. The beam portion is made of an insulating material and is connected to the substrate via an anchor portion. In the lower drive electrode and the upper drive electrode, electrostatic attraction generated by the application of a DC voltage continuously changes. In the lower drive electrodes and the upper drive electrode, electrostatic capacitance generated by the application of an RF signal between the electrodes on both sides continuously changes in accordance with the deformation of the beam portion due to the electrostatic attraction. The beam portion includes an inner circumferential portion including the upper drive electrode, an outer circumferential portion including the upper drive electrode, and ladder portions sandwiched by the inner circumferential portion and the outer circumferential portion. The beam portion has a cross-sectional area that is reduced by the ladder portions. |
| US09418790B2 |
Method for manufacturing a multilayer ceramic electronic component
A multilayer ceramic electronic component including thin external terminal electrodes each having a superior bonding force to a ceramic base body is provided. In order to form the external terminal electrodes, after Cu plating films are deposited on exposed portions of internal electrodes by direct plating on a ceramic base body, a Cu liquid phase, an O2-containing liquid phase, and a Cu solid phase are generated between the Cu plating film and the ceramic base body by a heat treatment, so that Cu oxides are dispersed in the Cu plating film, at least near an interface with the ceramic base body. Since the Cu oxides function as an adhesive, a bonding force of the Cu plating film to the ceramic base body can be increased, and hence the external terminal electrode having a superior bonding force to the ceramic base body can be obtained. |
| US09418785B2 |
Wireless power transmission system with enhanced magnetic field strength
A wireless power transmission system with an enhanced magnetic field strength is provided. A wireless power transmitter includes a generator configured to generate a power. The wireless power transmitter further includes a resonator configured to generate a magnetic field to transmit the power to a target device. The wireless power transmitter further includes a slab unit configured to enhance the magnetic field. |
| US09418783B2 |
Inductor design with metal dummy features
Techniques are disclosed for enhancing performance of integrated or on-chip inductors by implementing a schema of conductive metal dummies in the design thereof. In some cases, a metal dummy schema may be disposed in a layer proximate an upper surface of the inductor. The techniques may be implemented to improve overall inductor performance while enabling area scaling effects such as shrinking of inductor-to-inductor spacing on a die and/or increasing the quantity of inductors that may be manufactured on a die. In some cases, conductive metal dummies may be disposed in a region of minimal or non-peak magnetic field relative to the inductor, orthogonal to current flow in the inductor, and/or so as to minimize their occupation of the overall area of the inductor. The techniques may be implemented in analog circuits such as inductor-capacitor phase-locked loops (LC-PLLs), high-volume architectures, processor microarchitectures, applications involving stringent jitter requirements, microprocessor clocking, and wireless communication systems. |
| US09418780B2 |
Magnetic composite material
A magnetic composite material including a dielectric material and magnetic metal particles in the dielectric material, wherein and a real part μ′ of a complex permeability is greater than about 1 at a frequency of about 3 gigahertz (GHz), and the loss tangent tan δ is less than or equal to about 0.1. |
| US09418779B2 |
Process for preparing scalable quantities of high purity manganese bismuth magnetic materials for fabrication of permanent magnets
A scalable process is detailed for forming bulk quantities of high-purity α-MnBi phase materials suitable for fabrication of MnBi based permanent magnets. |
| US09418771B2 |
Complex oxide sintered body, sputtering target, transparent conductive oxide film, and method for producing same
The present invention provides a complex oxide sintered body 10 wherein Zr/(In+Zr+Y) is 0.05 to 4.5 at % and Y/(In+Zr+Y) is 0.005 to 0.5 at % in an atomic ratio when indium, zirconium, and yttrium are designated by In, Zr, and Y, respectively. Moreover, the present invention provides a sputtering target including the complex oxide sintered body 10 and a transparent conductive oxide film obtained by sputtering the sputtering target. |
| US09418769B2 |
Conductive carbon nanotube-metal composite ink
An electrically conductive carbon nanotube-metal composite ink may include a carbon nanotube-metal composite in which metal nanoparticles are bound to a surface of a carbon nanotube by chemical self-assembly. The electrically conductive carbon nanotube-metal composite ink may have higher electrical conductivity than a commonly used metal nanoparticles-based conductive ink, and may also be used in deformable electronic devices that are flexible and stretchable, as well as commonly used electronic devices, due to the bending and stretching properties of the carbon nanotube itself. |
| US09418767B2 |
X-ray focusing device
The X-ray focusing device includes a point/parallel type multi-capillary X-ray lens (MCX) and a point/parallel type single capillary X-ray lens (SCX). MCX and SCX are positioned so that the end face of the parallel end of SCX is positioned closed to the focal point position on the converging end of MCX so that the optical axes of the two coincide. X-rays that are efficiently collected by MCX are emitted from the converging end and become incident to the end face of parallel end of SCX so that the X-rays are efficiently incorporated into SCX. The X-rays are then irradiated from the converging end of SCX onto focal point having a small diameter. This allows taking advantages of MCX and SCX while compensating for their disadvantages. |
| US09418764B2 |
Actuator device and process for producing an actuator device
Actuator device having an expansion unit, which includes a magnetic shape memory alloy material, and a spring unit which interacts therewith in a restoring manner, wherein at least one spring of the spring unit is assigned to the expansion unit, which is designed to perform an expansion movement along an expansion direction, in such a way that the spring can exert a restoring spring force counter to the expansion direction on the expansion unit, and wherein the spring is set up and/or predetermined in its spring characteristic curve properties in such a way that a spring force profile of the spring unit along a stroke range, determined by an expansion force profile of the expansion unit and a restoring spring force profile, of the expansion movement does not form a continuously rising curve, and/or the spring force profile, with respect to a continuously rising curve, extends and/or increases the stroke range. |
| US09418751B1 |
Pre-program detection of threshold voltages of select gate transistors in a memory device
A memory device includes memory cells arranged in NAND strings between select gate transistors. A threshold voltage (Vth) distribution of the select gate transistors is evaluated, such as in response to a program, erase or read command involving a block or sub-block of memory cells. For example, a lower tail and an upper tail of the Vth distribution can be evaluated using read voltages. If the Vth is out-of-range, such as due to read disturb, data retention loss or defects in the memory device, the block or sub-block is marked as being bad and previously-programmed data in the block or sub-block can be copied to another location. If the Vth is in range, the command can be executed. Also, a control gate voltage for the select gate transistors can be set based on a Vth metric which is obtained from the evaluation. |
| US09418750B2 |
Single ended word line and bit line time constant measurement
In non-volatile memories, bit lines and word lines commonly to driving and decoding circuitry on a single end. Techniques are presented for determining the time constant associated with charging the far end of such lines from the near end, at which the circuitry is connected. While driving a discharged line from the near end, the number of clock cycles for the current to drop from a first level to a second level can be used to estimate the time constant for the far end. Alternately, the line can be initially charged up, after which the current is monitored at the near end. The differences in time constants for different word lines can be used to vary the time used when accessing a selected word line. |
| US09418740B2 |
Semiconductor storage device writing data into memory cells using a half selected state and a write state
A memory includes BLs and WLs. Resistance-change memory elements are connected between the BLs and the WLs via selection gates, respectively. A BL driver applies a voltage to a selected BL among the BLs. A WL driver applies a voltage to a selected WL among the WLs. In a write operation, the BL driver and the WL driver apply a first voltage between a reference voltage and a write voltage to selection candidate memory elements connected to the selected BL or the selected WL among the memory elements to bring the selection candidate memory elements to a half-selected state. The BL driver and the WL driver apply a second voltage to the selection candidate memory elements in the half-selected state at different timings, respectively, in order to bring the selection candidate memory elements to a write state and then return the selection candidate memory elements to the half-selected state. |
| US09418738B2 |
Apparatuses and methods for efficient write in a cross-point array
A memory circuit, including a memory array (such as a cross-point array), may include circuit elements that may function both as selection elements/drivers and de-selection elements/drivers. A selection/de-selection driver may be used to provide both a selection function as well as an operation function. The operation function may include providing sufficient currents and voltages for WRITE and/or READ operations in the memory array. When the de-selection path is used for providing the operation function, highly efficient cross-point implementations can be achieved. The operation function may be accomplished by circuit manipulation of a de-selection supply and/or de-selection elements. |
| US09418736B2 |
High voltage generating circuit for resistive memory apparatus
A high voltage generating circuit for a resistive memory apparatus is provided. The high voltage generating circuit includes a capacitor spaced from a semiconductor substrate and electrically insulated from the semiconductor substrate. A switching device, which is electrically connected to the capacitor, is electrically insulated from the semiconductor substrate. |
| US09418733B2 |
Joint short-time and long-time storage device and storage method thereof
A joint short-time and long-time storage device, including a first electrode layer, a functional material layer connected to the first electrode layer, and a second electrode layer connected to the functional material layer. The first electrode layer is made of inert conductive metal, the second electrode layer is made of active conductive metal, and the functional material layer is made of chalcogenide. |
| US09418732B2 |
Semiconductor memory device
A semiconductor memory device includes a memory cell, a bit line electrically connected to a first end of the memory cell, a source line electrically connected to a second end of the memory cell, a sense amplifier electrically connected to the bit line, and a controller configured to perform a read operation including first and second read operations on the memory cell. During the first read operation, a pre-charge voltage is applied to the bit line and a source line voltage lower than the pre-charge voltage is applied to the source line, and during the second read operation, a first voltage that is greater than the source line voltage and less than the pre-charge voltage is applied to the bit line. |
| US09418730B2 |
Handshaking sense amplifier
Handshaking sense amplifier. In accordance with a first embodiment, an electronic circuit includes a sense amplifier configured to differentially sense contents of a memory cell. The circuit also includes a self-timing circuit configured to detect a completion of evaluation by the sense amplifier; and to initiate a subsequent memory operation responsive to the completion. A completion of evaluation may not be aligned with a clock edge. |
| US09418729B2 |
Multi-port memory cell
A circuit includes a first data line, a second data line, a reference node, and a memory cell. The memory cell includes a data node, a first transistor, a second transistor, and a third transistor. The first transistor and the second transistor are connected in series between the first data line and the reference node. The first transistor is configured to be turned off when the gate of the first transistor has a voltage level corresponding to the first logical value. The third transistor is between the data node and the second data line. The third transistor is configured to be turned off when a gate of the third transistor has a voltage level corresponding to a second logical value different from the first logical value. |
| US09418726B1 |
Data reception chip
A data reception chip coupled to an external memory including a first input-output pin to output first data and including a comparison module and a voltage generation module is provided. The comparison module is coupled to the first input-output pin to receive the first data and compares the first data with a first reference voltage to identify the value of the first data. The voltage generation module is configured to generate the first reference voltage and includes a first resistor, a second resistor, a first capacitor and a second capacitor. The second resistor is serially connected to the first resistor. The first and second resistors divide a first operation voltage to generate the first reference voltage. The second capacitor is serially connected to the first capacitor. The first and second capacitors direct the first reference voltage to track the noise of the first operation voltage. |
| US09418723B2 |
Techniques to reduce memory cell refreshes for a memory device
Examples may include techniques to reduce memory cell refreshes for a memory device. These techniques include a control unit receiving a command to cause an internal refresh counter for the memory device to increment without causing one or more rows of an array of memory cells to be refreshed during an auto-refresh interval. In some examples, a memory controller has access to a refresh counter register at the memory device that may allow the memory controller to determine when to send the command that causes the internal refresh counter to increment without refreshing the one or more rows during the auto-refresh interval. |
| US09418719B2 |
In-memory computational device
A computing device comprising includes a memory array having a plurality of sections with memory cells arranged in rows and column, at least one cell in each column of the memory array connected to a bit line having a bit line voltage associated with a logical 1 or a logical 0. The computing device additionally includes at least one multiplexer to connect a bit line in a column of a first section to a bit line in a column in a second section different from the first section and a decoder to activate a word line connected to a cell in the column in the second section to write the bit line voltage into the cell. |
| US09418718B2 |
Semiconductor apparatus with clock control
A semiconductor apparatus includes: a command control unit configured to decode external signals and generate a read strobe signal or a write strobe signal; a clock enable signal generation unit configured to activate one of a read clock enable signal and a write clock enable signal in response to the read strobe signal or the write strobe signal; and a clock control unit configured to generate a first control clock signal and a second clock control signal in response to an internal clock signal, the read clock enable signal, and the write to clock enable signal. |
| US09418712B1 |
Memory system and method for power management using a token bucket
A memory system and method for power management are disclosed. In one embodiment, a memory system is provided comprising at least one memory die, a sensor configured to sense an average amount of power consumed by the memory system over a time period, and a controller. The controller is configured to maintain a token bucket that indicates an amount of power currently available for memory operations in the at least one memory die and is further configured to reduce a number of tokens in the token bucket by an amount of power consumed over the time period as indicated by the average amount of power sensed by the sensor over the time period. Other embodiments are disclosed. |
| US09418705B2 |
Sensor and media event detection system
Enables detection of events using motion capture sensors and potentially other sensors electromagnetic field, temperature, humidity, wind, pressure, elevation, light, sound, or heart rate sensors to confirm and post events, differentiate similar types of motion events to determine the type of equipment or activity or quality of the event, such proficiency. Enables motion capture data and other sensor data to be utilized to curate text, images, video, sound and post the results to social networks, for example in a dedicated feed. Embodiments of the system also may post or filter to social media sites using any other filter besides location and time and the text in the social media posts for example. May use motion or other sensor data to define and event, eliminate false positive events, post true events, and/or correlate the events with social media to confirm the events, or post the events in a particular channel. |
| US09418699B1 |
Management of sequentially written data
A Data Storage Device (DSD) includes a disk with a zone of tracks to be sequentially written. A sequential write pointer is maintained indicating a next physical location for writing data in the zone. When a write command is received to write data in a target region at a physical location behind the sequential write pointer, it is determined whether a write count for each of the target region and an adjacent region before the target region has reached a threshold number of writes. If it is determined that the write counts for both the target region and the adjacent region have not reached the threshold number of writes, the sequential write pointer for the zone is moved to the physical location and the data is written at the physical location to fulfill the write command. |
| US09418694B2 |
Optical recording method, optical recording medium, optical recording medium recording apparatus, optical recording apparatus, optical disk, and optical disk recording/reproducing apparatus
A mark having a length nT (n being an integer equal to or greater than 3 and T being a clock period) is formed by modulating irradiation laser power with three values of recording power Pw, erase power Pe, and bias power Pb (Pw>Pe>Pb). Constant strength periods (At) of the recording power Pw are set as AtT, A1T, . . . , and AmT and constant strength periods (Bt) of the bias power Pb are set as BtT, B1T, . . . , BmT, and CT (C=−1 to 3). The application of laser is divided into pulses in order of AtT, BtT, A1T, B1T, . . . , AmT, BmT, and CT (m=(n−k)/2, k=3 (if n is an odd number), or k=4 (if n is an even number)). (Here, the constant strength period of the recording power Pw for n=3, n=4, n≧5 (odd number), and n≧6 (even number) is set as At3, At4, Atod, and Atev, the constant strength period of the bias power Pb for n=3, n=4, n≧5 (odd number), and n≧6 (even number) is set as Bt3, Bt4, Btod, and Btev, and then, At3+Bt3=Atod+Btod=Am+Bm=2T and At4+Bt4=Atev+Btev=3T). |
| US09418687B2 |
Suspension board with circuit
A suspension board with circuit includes a slider mounting region configured to mount a slider thereon, a pedestal portion provided in the slider mounting region and configured to support the slider, and a dam portion provided in the slider mounting region and configured to prevent an adhesive fixing the slider from flowing out of the slider mounting region. The thickness of the pedestal portion is thicker than that of the dam portion. |
| US09418682B2 |
Universal magnetic recording head chip
An apparatus according to one embodiment includes a magnetic head having, on one module thereof, an array of N first data transducers positioned towards a media facing surface of the module, and M second data transducers interleaved with the array of first transducers. Only some of the data transducers are coupled to pads. An apparatus according to another embodiment includes a magnetic head having, on one module thereof, an array of data transducers positioned towards a media facing surface of the module, the data transducers including at least one of data readers, data writers, and combinations thereof. A plurality of pads are on the module, but less than all of the first and/or second data transducers are coupled to pads. |
| US09418681B2 |
Method and background estimator for voice activity detection
The present invention relates to a method and a background estimator in voice activity detector for updating a background noise estimate for an input signal. The input signal for a current frame is received and it is determined whether the current frame of the input signal comprises non-noise. Further, an additional determination is performed whether the current frame of the non-noise input comprises noise by analyzing characteristics at least related to correlation and energy level of the input signal, and background noise estimate is updated if it is determined that the current frame comprises noise. |
| US09418680B2 |
Voice activity detector for audio signals
According to one aspect, a method for detecting voice activity is disclosed, the method including receiving a frame of an input audio signal, the input audio signal having an sample rate; dividing the frame into a plurality of subbands based on the sample rate, the plurality of subbands including at least a lowest subband and a highest subband; filtering the lowest subband with a moving average filter to reduce an energy of the lowest subband; estimating a noise level for each of the plurality of subbands; calculating a signal to noise ratio value for each of the plurality of subbands; and determining a speech activity level of the frame based on an average of the calculated signal to noise ratio values and a weighted average of an energy of each of the plurality of subbands. Other aspects include audio decoders that decode audio that was encoded using the methods described herein. |
| US09418679B2 |
Methods and apparatus for interpreting received speech data using speech recognition
A method for processing a received set of speech data, wherein the received set of speech data comprises an utterance, is provided. The method executes a process to generate a plurality of confidence scores, wherein each of the plurality of confidence scores is associated with one of a plurality of candidate utterances; determines a plurality of difference values, each of the plurality of difference values comprising a difference between two of the plurality of confidence scores; and compares the plurality of difference values to determine at least one disparity. |
| US09418676B2 |
Audio signal processor, method, and program for suppressing noise components from input audio signals
The invention provides an audio signal processing device capable of improving sound quality by causing a voice switch to operate appropriately. Delay-subtraction processing is performed on an input signal to form a first and second directional signal with nulls in a first and second specific direction, respectively, and a coherence is obtained using the two directional signals. The coherence is then compared to a determination threshold value to determine whether the input audio signal is a target-sound segment arriving from a target-direction, or a non-target-sound segment other than the target-sound segment. A gain is set according to the determination result, and any non-target-sound is attenuated by multiplying the input signal by the gain. The determination threshold value is controlled based on an average value of coherence in interfering-sound segments. |
| US09418675B2 |
Wearable communication system with noise cancellation
A method and a wearable communication system for personal face-to-face and wireless communications in high noise environments are provided. A noise cancellation device (NCD) operably coupled to a wireless coupling device (WCD) includes a speech acquisition unit, an audio signal processing unit, one or more loudspeakers, and a communication module. The NCD receives voice vibrations from user speech via a contact microphone and a second microphone and converts the voice vibrations into an audio signal. The NCD processes the audio signal to remove noise signals and enhance a speech signal contained in the audio signal. A loudspeaker emits the speech signal during face-to-face communication. The NCD transmits the speech signal to a communication device via the WCD and receives an external speech signal from the communication device during wireless communication. With the NCD, the signal intelligibility and signal-to-noise ratio can be improved, for example, from −10 dB to 20 dB. |
| US09418666B2 |
Method and apparatus for encoding and decoding audio/speech signal
Provided is a method of encoding an audio/speech signal, the method including determining a variable length of a frame, that is, a processing unit of an input signal in accordance with a position of an attack in the input signal; transforming each frame of the input signal to a frequency domain and dividing the frame into a plurality of sub frequency bands; and, if a signal of a sub frequency band is determined to be encoded in the frequency domain, encoding the signal of the sub frequency band in the frequency domain, and if the signal of the sub frequency band is determined to be encoded in a time domain, inverse transforming the signal of the sub frequency band to the time domain and encoding the inverse transformed signal in the time domain. According to the present invention, the audio/speech signal may be efficiently encoded by controlling time resolution and frequency resolution. |
| US09418663B2 |
Conversational agent with a particular spoken style of speech
Methods, systems, and apparatus, including computer programs encoded on computer storage media, for handing off a user conversation between computer-implemented agents. One of the methods includes receiving, by a computer-implemented agent specific to a user device, a digital representation of speech encoding an utterance, determining, by the computer-implemented agent, that the utterance specifies a requirement to establish a communication with another computer-implemented agent, and establishing, by the computer-implemented agent, a communication between the other computer-implemented agent and the user device. |
| US09418659B2 |
Computer-implemented system and method for transcribing verbal messages
A computer-implemented system and method for transcribing verbal messages is provided. Verbal messages each comprising audio content are received. Automatically recognized text is generated for the audio content of at least one of the verbal messages. A turn-around processing time is applied to the verbal message. The automatically recognized text and verbal message are transferred to a human agent when an expected processing time of the verbal message satisfies the turn-around processing time. At least a portion of the automatically recognized text is replaced with manual transcription from the human agent. The automatically recognized text and manual transcription are provided as a text message. |
| US09418658B1 |
Configuration of voice controlled assistant
A voice interaction architecture has a hands-free, electronic voice controlled assistant that permits users to verbally request information from cloud services. Since the assistant relies primarily, if not exclusively, on voice interactions, configuring the assistant for the first time may pose a challenge, particularly to a novice user who is unfamiliar with network settings (such as wife access keys). The architecture supports several approaches to configuring the voice controlled assistant that may be accomplished without much or any user input, thereby promoting a positive out-of-box experience for the user. More particularly, these approaches involve use of audible or optical signals to configure the voice controlled assistant. |
| US09418657B2 |
Communication system and method for an ear worn communication device
A communication system and method provides a communication device that fits on the ear and responds to audible commands. The communication system is sufficiently independent to initiate and receive communications without requiring a mobile phone, since contact information is stored in the communication device. The communication device is configured with a motion sensor, and a remote control module to control a car or computer. The communication system performs functions, optionally, with an audible command, such as, initiating communication, accessing content, accessing tools, making payments. |
| US09418655B2 |
Method and apparatus to model and transfer the prosody of tags across languages
A method of transferring the prosody of tag questions across languages includes extracting prosodic parameters of speech in a first language having a tag question and mapping the prosodic parameters to speech segments in a second language corresponding to the tag question. Accordingly, semantic and pragmatic intent of the tag question in the first language may be correctly conveyed in the second language. |
| US09418652B2 |
Automated learning for speech-based applications
Systems and methods for modifying a computer-based speech recognition system. A speech utterance is processed with the computer-based speech recognition system using a set of internal representations, which may comprise parameters for recognizing speech in a speech utterance, such as parameters of an acoustic model and/or a language model. The computer-based speech recognition system may perform a first task in response to the processed speech utterance. The utterance may also be provided to a human who performs a second task based on the utterance. Data indicative of the first task, performed by the computer system, is compared to data indicative of a second task, performed by the human in response to the speech utterance. Based on the comparison, the set of internal representations may be updated or modified to improve the speech recognition performance and capabilities of the speech recognition system. |
| US09418636B1 |
Wind musical instrument automated playback system
An automated playback system for a wind musical instrument which reproduces the musical performance of the wind instrument with high fidelity. The system comprises a sounding body, a piston, a signal-driven actuation means, a signal playback means and a drive signal. In one or more embodiments, the sounding body has a shape related to a wind musical instrument and has a sleeve opening which houses a piston; an electro-dynamic actuation means motivates a piston using a unique armature structure; a signal playback means provides a drive signal related to a measurement of the internal air column acoustic pressure of a wind instrument while played by a human player. Embodiments of the invention provide a convincing reproduction of a live musical performance and can be used in situations ordinarily requiring a human performer, offering a distinct advantage. |
| US09418635B1 |
Retrofittable closed-loop heater system for mouthpiece of brass wind musical instrument
A heater system for the mouthpiece of a musical brass instrument includes a heater element and a heat sensor, both in thermal proximity to the mouthpiece, closed-loop electronic circuitry coupled to the heater element and heat sensor, and a battery power source. The musician playing the mouthpiece uses a control to adjust desired mouthpiece temperature. The circuitry compares musician adjusted temperature to heat sensor detected mouthpiece temperature and controls electrical current through the heater element to adjust mouthpiece temperature as required. The heater system preferably fits within a cylindrical-shaped housing having a central opening through which the mouthpiece fits. In practice the mouthpiece is removed from the instrument leadpipe, is passed through the central opening of the housing, and reinserted into the leadpipe. A battery supply may be attached to the instrument to couple battery operating power through a cable to the circular housing and components within. |
| US09418628B2 |
Displaying image data based on perspective center of primary image
A method for displaying image data from a plurality of images on a display monitor, where at least some of the images are acquired from different locations, includes displaying the image data from the images on the display monitor. The image data may be displayed from a perspective center associated with the different locations from which the images are acquired. A primary image is determined based on a portion of the image data from the primary image that is displayed on the display monitor compared to portions of the image data from other images that are displayed on the display monitor. Thereafter, the image data on the display monitor is displayed from a perspective center of the primary image. A stacking order of the plurality of images is arranged so that the primary image is on top. |
| US09418626B2 |
Sensing during non-display update times
A method of capacitive sensing using an integrated capacitive sensor device and display device comprising a plurality of combination electrodes comprises driving a first of the plurality of combination electrodes for capacitive sensing during a first non-display update time period of a first frame; driving a second of the plurality of combination electrodes for capacitive sensing during a second non-display update time period of the first frame; and driving a third of the plurality of combination electrodes for capacitive sensing during a third non-display update time period of the first frame, the plurality of combination electrodes configured for both capacitive sensing and display updating. Driving the first second, and third combination electrodes for capacitive sensing comprises driving the first, second, and third combination electrodes with a signal that transitions at least twice during each respective non-display update time period of the display device. |
| US09418621B2 |
Selective monitor control
Reducing energy usage by a monitor includes a map manager between a monitor interface and a processor that divides a display area of a monitor into areas and stores display information in a staging area. The map manager distinguishes an active window selected by a user from the remainder inactive, unselected areas of a display, and further determines a used subset of areas within the active window distinguished from the remainder unused areas as a function of a user preference. Accordingly, the map manager drives the monitor at each of the used area active window areas with the processor display information stored in the staging area at a normal luminance specified by the processor display information, and at each of the remainder unused, inactive and unselected areas of the total display area at a reduced luminance lower than the specified normal luminance. |
| US09418610B2 |
Method for driving liquid crystal display and liquid crystal display using same
An exemplary liquid crystal display (LCD) provides data lines, gate lines, and pixel units arranged as a matrix array. A method for driving the LCD includes a step of analyzing and determining polarities of one column of the pixel units as determining pixels, thereby defining a first polarity group and a second polarity group, and a step of sequentially applying corresponding data signals to a part of the whole pixel units that are arranged at same rows with the first polarity group in a part of a period of a frame. Corresponding data signals are sequentially applied to the other part of the whole pixel units that are arranged at same rows with the second polarity group in another part of a period of a frame. |
| US09418608B2 |
Display device and control method
A display device (1) in accordance with an embodiment of the present invention includes: an LCD driving section (20) and an LCD controller (30) for causing an image based on an image signal to be displayed on an LCD (10); and a CPU (40) for supplying an image signal to the LCD controller (30), the LCD controller (30) being configured to supply, to the CPU (40), a control signal that instructs the CPU (40) to supply an image signal, and the CPU (40) being configured to supply an image signal in a case where the CPU (40) receives a control signal. |
| US09418603B2 |
Redundant control system for LCD
In an exemplary embodiment, each horizontal and vertical conductor of a TFT array may be in electrical contact with a first and second control system. Initially, the entire display is driven by the first control system. When/if a failure occurs in the first control system, it is powered down and the second control system maintains operation of the entire display. Each control system may contain a set of source/gate drivers, display interface board, and power supply. A reversionary button may allow the user to manually switch between control systems. Alternatively, failure may be detected by the display interface boards or a graphics processor. |
| US09418600B2 |
Apparatus for controlling a display and method thereof
An apparatus for controlling a display having a backlight module provided with a first set of units and a display panel provided with a second set of units is provided. In one embodiment, the apparatus comprises a reference value generator, a control value generator, and a compensation circuit. The reference value generator generates a reference value representative of a portion of pixels contained in an input image associated with one of the second set of units. The control value generator generates a control value to control one of the first set of units in view of the reference value. The compensation circuit adjusts the portion of pixels contained in the input image in view of the control value. The one of the first units is associated with the one of the second units. |
| US09418596B2 |
Organic light emitting display and method for driving the same
An organic light emitting display and method for driving the same are discussed. The organic light emitting display according to an embodiment includes a panel, drivers, and a short circuit detector. The short circuit detector forms a closed loop with a signal line, transmits input pulses through one end of the signal line and receives output pulses fed back through the other end of the signal line compares the input pulses and the output pulses. |
| US09418592B2 |
Organic light emitting display device having a power supplier for outputting a varied reference voltage
An organic light emitting display device includes: an organic light emitting display panel configured to include a plurality of power lines, a plurality of scan lines and a plurality of data lines; a power supplier configured to apply a reference voltage to the power lines; and a controller configured to apply at least one control signal to the power supplier. The reference voltage is gradually varied along the distance from the power supplier. |
| US09418591B2 |
Timing controller, driving method thereof, and display device using the same
A timing controller includes a logo detecting unit configured to compare a plurality of frames to detect a logo region, an edge detecting unit configured to detect an edge, corresponding to a boundary between the logo region and an external region of the logo region, from the logo region by using a change amount of brightness between the logo region and the external region, a brightness compensating unit configured to reduce a brightness of the logo region including the edge, and an output unit configured to output image data whose a brightness is compensated for by the brightness compensating unit. |
| US09418590B2 |
Organic light emitting display device and method of adjusting luminance of the same
A method of adjusting luminance of an organic light emitting display device is provided. By the method, initial compensation data are derived from optical images of a plurality of pixels, a look-up table (LUT) is generated using the initial compensation data, compensation data are derived by measuring deterioration degrees of the pixels, the LUT is updated by applying a filter for redistributing the compensation data among the pixels, an operation for adjusting the luminance are performed with image data of the pixels and the compensation data stored in the LUT, and driving data that are calculated by the operation for adjusting the luminance are outputted. |
| US09418589B2 |
Display device for controlling light emission period based on the sum of gray values and driving method of the same
A display device is disclosed. In one aspect, the device includes a display panel that includes i) a plurality of pixels including first and second light emission control transistors, ii) a first light emission driver configured to generate a first switching control signal, iii) a second light emission driver configured to generate a second switching control signal, iv) a signal controller configured to generate and transfer a first light emission control signal and v) a light emission controller configured to generate and transfer a second light emission control signal. The light emission controller acquires information of a gray depth from a result value obtained by summing gray data, determines a light emission control algorithm according to the gray depth, and generates the second light emission control signal so that the pixels emit light during different light emission periods for a plurality of frames. |
| US09418588B2 |
Flat panel display device and method to control the same
A flat panel display device includes: a first display unit, a second display unit, and a third display unit. The first display unit comprises a (1-1)-th surface facing a (1-2)-th surface, and is configured to display an image on the (1-1)-th surface and enable external light to transmit from the (1-2)-th surface to the (1-1)-th surface. The second display unit comprises a (2-1)-th surface facing a (2-2)-th surface, and is configured to display an image on the (2-1)-th surface and enable external light to transmit from the (2-2)-th surface to the (2-1)-th surface. The third display unit comprises a (3-1)-th surface facing a (3-2)-th surface, and is configured to display an image on the (3-1)-th surface. The third display unit is disposed between the first display unit and the second display unit. |
| US09418583B2 |
Transmission device, reception device, transmission-reception system, and image display system
Reception devices 201 to 20N are arranged one-dimensionally in this order. The reception device 20n has a data input buffer 21, a first clock input buffer 221, and a first clock output buffer 231. The first clock input buffer 221 buffers a clock input to the first clock terminals P21 and P22, and outputs it to the first clock output buffer 231. The first clock output buffer 231 buffers a clock input from the first clock input buffer 221 and outputs it from the second clock terminals P31 and P32. The data input terminals P11 and P12 are located between the first clock terminal and the second clock terminal. |
| US09418581B2 |
Display device, head-mounted display device, display system, and control method for display device
A transmission-type head-mounted display device which makes a user visually recognize a display image screen as a virtual image, includes: a display control unit which causes a guide image for guiding the user's line of sight to the center of the display image screen, to be displayed on the display image screen; and a display unit which displays the guide image. |
| US09418580B2 |
Display apparatus having a short gate line and method of driving the same
A display apparatus includes a gate line, a first data line which receives a first data signal, a second data line which receives a second data signal having a gray scale lower than a gray scale of the first data signal and a polarity opposite to the first data signal, a short gate line which receives a short gate signal, and a plurality of pixels, each pixel including a first sub-pixel which displays a first image corresponding to the first data signal, a second sub-pixel which displays a second image corresponding to the second data signal, and a switching device which electrically connects the first sub-pixel and the second sub-pixel in response to the short gate signal. A pixel alternately displays a display image and a black image in a unit of at least one frame. |
| US09418576B2 |
Dissolvable thermal direct adhesive label and label assembly including the same
A label assembly including one or more dissolvable thermal direct adhesive labels mounted on a release liner. According to one embodiment, each label includes a base layer, a thermal direct layer, an adhesive layer, and a barrier layer. The base layer, which has an upper surface and a lower surface, is water-dissolvable and may be made of a water-dissolvable paper. The thermal direct layer is positioned directly over the upper surface of the base layer and functions in the conventional manner to produce markings therein in response to heat. The adhesive layer is water-dissolvable and is positioned below the lower surface of the base layer. The barrier layer, which is positioned directly below the lower surface of the base layer and directly over the adhesive layer, serves to prevent migration of the adhesive layer through the base layer and into contact with the thermal direct layer. |
| US09418575B2 |
Dynamically updating map projections
Embodiments of the invention may provide the ability to dynamically create and update map projections to reduce the spatial distortion in a desirable way for a specific map view. For example, as a map view is changed, a new central meridian may be selected and a new map projection may be created based on the selected central meridian. Dynamically updating map projections so that all map layers are correctly representing the most important spatial attributes for the given situation may enable a map analyst to correctly interpret the maps being viewed. |
| US09418573B2 |
Surgical simulation device and assembly
A system for simulating a surgical procedure, which includes a housing covering an anatomical model. The model is made up of simulated tissue supported on a base assembly that allows pivoting and rotation of the simulated tissue. The simulated tissue includes a portion that represents soft tissue, such as dermal tissue, muscle, connective tissue and the like, and a portion that represents hard tissue, such as osseous tissue. The housing includes apertures through which a surgical instrument may be inserted for simulating a procedure on the simulated tissue. Cannulas may be set within the apertures. |
| US09418570B2 |
Guitar teaching data creation device, guitar teaching system, guitar teaching data creation method, and computer-readable storage medium storing guitar teaching data
A guitar teaching data creation device includes a central processing unit (CPU) having: a distribution map creating module for collating respective sounds of chords with addresses of sounds on a fingerboard of a teaching-oriented guitar, and creating a distribution map of the respective sounds of the chords; a sequence creating module for creating sequences from the distribution map; a numerical diagram creating module for creating numerical diagrams of combinations from the sequences; a graphic converting module for converting the numerical diagrams into graphics; and a display module for prioritizing the graphics and transmitting a signal to arrange and display the graphics. |
| US09418568B2 |
System, method and apparatus for driver training system with dynamic mirrors
A training system has one or more displays that simulate or mimic rear view mirrors, showing, for example, what is visible behind the simulated vehicle. The training system includes sensors, software, and related hardware for determining a position of a trainee's head within the simulated vehicle and calculating a viewing angle and/or distance between the trainee's eye(s) and the rear view mirrors. Based upon the viewing angle and/or distance, a rear image is panned/zoomed on each of the rear view mirrors corresponding to the viewing angle and/or distance. |
| US09418564B2 |
Method for determining a guidance law for obstacle avoidance by an aircraft, related computer program product, electronic system and aircraft
This method for determining an obstacle avoidance guidance law for an aircraft is implemented by a system for determining said guidance law. The aircraft comprises a collision avoidance system adapted to detect a collision risk with the obstacle and said determination system. This method comprises determining one or more set points from among flight path angle and speed set points, at least one set point depending on at least one vertical speed limit value, at least one set point comprising a vertical component in a vertical direction, each limit value being provided by the collision avoidance system following the detection of a collision risk with the obstacle; and computing the avoidance guidance law as a function of the determined set points. During the determination step, at least one determined set point comprises a longitudinal component in a longitudinal direction perpendicular to the vertical direction. |
| US09418557B2 |
Fleet operation management system
A fleet operation management system for a vehicle traveling on a predetermined travel route comprises: a storage unit (128, 142) which stores travel route information including the position, height and surface resistance of the vehicle's travel route; a speed prediction unit (102) which predicts future change in the speed of the vehicle coasting on the travel route based on the current position, the current speed, and the travel route information; and an operation timing calculation unit (104) which judges which of acceleration, deceleration and coasting should be performed at the current position based on the change in the coasting speed so that the vehicle speed after the lapse of a predetermined time will be within a predetermined range. This configuration makes it possible to properly judge which of the acceleration, the deceleration and the coasting should be performed on the vehicle's travel route from the viewpoint of fuel-efficient operation. |
| US09418553B2 |
Easy parking finder
A driver uses a mobile phone application to transmit a request to a central processor for information on available parking spaces, accommodating a specific size car, close to her present location or a future location.An image processor processes real time images from linked cameras overlooking parking spaces, comparing them with reference images of unoccupied parking spaces, vehicles including automobiles, bicycles and motorcycles, a no parking sign sandwich board and a traffic cone. The image processor sends the information on available parking spaces to the central processor.The central processor saves image processor information and information on available parking spaces, parking fee and advertising promotions from parking facilities on a database and transmits a response to the driver's request.The mobile phone application displays and audio broadcasts the response. The driver pays a fee and reserves an available parking space to exclude it from responses to other requests. |
| US09418545B2 |
Method and system for collecting traffic data
A method of identifying congestion comprising the steps of monitoring traffic conditions using off call tracking data relating to cellular mobile communication devices carried in vehicles along an off call path and determining when an off call path crossing time of the call path exceeds a threshold. When the off call path crossing time exceeds the threshold, obtaining traffic data from probe vehicles on roads corresponding to the off call path, and analyzing the traffic data to determine the location of the congestion along the off call path. |
| US09418543B1 |
Wireless electrical apparatus controller and method of use
A device for controlling at least one electrical apparatus comprising a microprocessor wired to an RF transceiver, the microprocessor storing operating protocol commands as sent over a wireless network, the RF transceiver and microprocessor being configured in cooperation with software code residing in the microprocessor to receive and extract real-time data as sourced from a network time source of the wireless network and embedded in the network signal, and a clock circuit connected to the microprocessor and configured for storing the real-time data, whereby the device controls power to the electrical apparatus according to the operating protocol commands at real-time as obtained from the wireless network by which the operating protocol commands are sent and as kept by the clock circuit, thus eliminating the need for a separate GPS receiver in the device for receiving real-time data. |
| US09418542B2 |
Method for operating a remote control system and remote control system of this type
A method for operating a remote control system includes the method steps of providing a remote control system with an operating unit having a display and at least one operating element and with a communication unit having a communication connection to the operating unit, providing a control unit, which has a communication connection to the communication unit, of a work machine, detecting an operating unit actual configuration with a plurality of operating and selection menus by using the operating unit, transmitting the operating unit actual configuration from the operating unit to the control unit, detecting a work machine actual configuration by using the control unit, selecting at least one of the operating and selection menus depending on the work machine actual configuration, transmitting the at least one operating and selection menu to the operating unit and displaying the at least one operating and selection menu on the display. |
| US09418538B2 |
Self-contained, pocket-sized presentation apparatus
A self-contained, pocket-sized presentation apparatus includes a USB drive having a housing, a memory, a processor, and protective cover. A user input device, wireless transmitter, and power source, are integrally disposed within the cover, the transmitter being operatively engaged with the input device and configured to selectively transmit wireless signals in response to selective user actuation of the input device. A wireless receiver is disposed within the housing of the USB drive, to receive and couple wireless signals from the transmitter to the USB drive. The USB drive is configured to receive the wireless signals from the wireless receiver, to selectively generate Page Up and Page Down instructions responsive thereto, and to send the Page Up and Page Down instructions via the USB plug. The memory is configured to contain computer readable program code therein, in the form of a presentation, and in the form of a portable presentation application. |
| US09418529B2 |
Methods and arrangements for sensors
Generally, smart sensors, logic to process messages from smart sensors, and smart sensor systems are described herein. Embodiments may comprise logic such as hardware and/or code to communicate events as messages via a messaging system to post the messages to a messaging account. The messaging system may be a texting service like Twitter™ that captures the messages and then re-broadcasts the messages, e.g., immediately as a tweet or a cellular text message. In some embodiments, the smart sensor comprises a communications module with a Twitter™ application program interface (API) on a communications platform with a software/hardware framework to interconnect with one or more pluggable monitors with sensors. In other embodiments, the communications module may be integrated with one or more monitors. Further embodiments comprise a smart-device, which can provide status updates and event notifications to a user. |
| US09418520B2 |
Gaming, system, method and device including a symbol changing or augmenting feature
Gaming systems, devices and methods are set forth which provide for the selection and application of modifiers to game outcomes. The modifiers confer different functionalities to base game symbols or an augmenting functionality to alter or provide an outcome. Different sets of modifiers may be accessed randomly or under different conditions and event. |
| US09418513B2 |
Gaming system and a method of gaming
There is described a gaming system including an award controller for allocating an award at a plurality of gaming machines. The award controller is arranged to allocate, in response to a win at a first gaming machine of the plurality of gaming machines, an award to a player of at least one further gaming machine of the plurality of gaming machines based on a location of the at least one further gaming machine. |
| US09418511B2 |
Player choice game feature
A gaming machine has display means and a game control means. A game is played in which one or more random events are displayed on the display means and, if a predefined winning event occurs, the machine awards a prize. On the occurrence of a predefined event, the player is offered a choice of two or more different prize sets, each containing a plurality of prize outcomes. The prize is drawn from the prize set or sets selected. The sets of prizes may be presented on segments of wheels that can spin before stopping randomly on a segment which defines the prize outcome. Alternatively the sets of prizes are presented on the faces of dice which are arranged to spin before stopping with the front face of the die defining the prize won. |
| US09418509B2 |
Multi-sensor monitoring of athletic performance
Athletic performance monitoring systems and methods, many of which utilize, in some manner, global positioning satellite (“GPS”) data, provide data and information to athletes and/or to equipment used by athletes during an athletic event. Such systems and methods may provide route information to athletes and/or their trainers, e.g., for pre-event planning, goal setting, and calibration purposes. Such systems and methods optionally may provide real time information to the athlete while the event takes place, e.g., to assist in reaching the pre-set goals. Additionally, data and information collected by such systems and methods may assist in post-event analysis for athletes and their trainers, e.g., to evaluate past performances and to assist in improving future performances. |
| US09418508B2 |
System and method for providing a bonus game on a bingo based game
The gaming system that includes a server, a gaming machine communicatively coupled to the server, and a processor. The processor is programmed to: upon receiving a wager at the gaming machine, provide a bingo based game on the gaming machine, the bingo based game comprising gaming content that includes at least one bingo game card, determine that a triggering event has occurred during play of the bingo based game, and based on the triggering event, provide the player with at least one free bingo card in a bingo based bonus game. |
| US09418506B2 |
Electronic gaming machine and gaming method
An electronic gaming machine has an electronic game controller and a display where game symbols are arranged in an array of predetermined game positions. The appearance of a first special symbol causes a group of predetermined game positions to be selected where each game symbol occupying a predetermined game position in said group is changed into a second special symbol either during a play of a game or at the completion of said play, said change into said second special symbol being visible to said player. A gaming method is also provided. |
| US09418505B2 |
Gaming method and apparatus for portioning a play area
A method and apparatus for use in gaming activities, such as in a slot machine. A first grid comprising a plurality of elements overlayed a second grid comprising a plurality of elements is presented. At least some of the elements of the first grid and the second grid are marked. Marked elements of first grid are then used to form a subportion, the subportion boundary enclosing an area and having a correspondingly marked element of the first grid at each corner. Payouts are issued for marked elements and element combinations of the second grid within the subportion. The payouts may be administered according to a pay table. |
| US09418500B2 |
Media processing device
The present invention provides a media processing device having improved ease of use. An automatic teller machine has: a housing having predetermined space at interior thereof, and at which opening portion is formed in at least one side surface; a unit housing that houses plural storage containers storing bank notes, and that can be accommodated within the housing, and that is provided so as to be able to be pulled out along a pull out direction to exterior of the housing via the opening portion; and a reject container housing case that is structured so as to be able to be attached to and removed from the unit housing at a front side of a unit housing front surface plate that is at a distal end side in the pull out direction of the unit housing, and that houses a reject container that stores bank notes. |
| US09418497B2 |
Device and method for self-limiting access to objects and substances
A time-locking container to limit the compulsive overuse of objects and substances, such as but not limited to money, food, alcohol, and tobacco. The container locks until a future date and time of day set by the user. The container informs the user, before it locks, of the duration of locking. If the duration exceeds a user-selectable maximum, the container waits for user confirmation, otherwise it locks after a delay. This feature prevents an accidental prolonged lockout. While the container is locked, the user can extend, but not shorten, the duration of locking. The user can request early access to the contents, while the container is locked, subject to an unlocking delay before access is granted, a relocking delay after which access is denied, and an inhibit delay limiting the frequency of use of the early open feature. The device provides a programmable schedule, and can relock itself after a programmable delay. |
| US09418496B2 |
Automated postflight troubleshooting
The advantageous embodiments provide a method for identifying anomalies on an object. The advantageous embodiments detect a presence of the object in a control area using a sensor system. In response to detecting the presence of the object in the control area, the object is identified using the sensor system. Scan priorities are identified for the object using the sensor system. The object is scanned while the object is within the control area to form scan results. The scan results are analyzed and a determination is made as to whether a number of maintenance anomalies are detected on the object using the scan results. |
| US09418487B2 |
Billing a rented third party transport including an on-board unit
A system, method, and computer readable medium for toll service activation using an on-board unit in a third party transport comprises, a third party entity, a toll rental entity, and an on-board unit communicably coupled to the third party entity and to the toll rental entity, wherein the on-board unit, receives a position signal, initiates a toll service request, converts the position signal to a toll usage, and stores the position signal, the toll service request and the toll usage. |
| US09418483B2 |
Information processing device and method of processing information
A method and apparatus adapted to input a position and orientation of a viewpoint in an image in MR space obtained by superimposing a first virtual object to be displayed on a display of a real space; to input a position and orientation of the real object; to calculate an amount of change in a relative orientation between the orientation of the viewpoint and the orientation of the real object; to switch a first virtual object to be displayed to a second virtual object to be displayed which is different from the first virtual object to be displayed when the amount of change exceeds a predetermined threshold; and to output an image in the MR space obtained by superimposing the second virtual object to be displayed on the display of the real space in accordance with the position and orientation of the viewpoint and the position of the real object. |
| US09418480B2 |
Systems and methods for 3D pose estimation
The present system provides a tool to estimate the relative pose of a generic object with respect to a camera view-point by processing 2D images from a monocular camera in real-time. The capability of solving the pose estimation problem relies on the robust detection and matching in consecutive image frames of significant visual features belonging to an object of interest. To accomplish this, the system incorporates 3D modeling of the object of interest. In one embodiment, the shape of interest may be approximated by a parametric surface such as a cylinder, sphere, ellipsoid, or even complex non-parametric models. The system can restrain information retrieved at a 2D image level to estimate parameters about the pose. In operation, the accuracy of the 3D pose estimation of the object is a function of the degree of approximation of the selected model and the ability to select and track relevant features across consecutive image frames. |
| US09418474B2 |
Three-dimensional model refinement
A three-dimensional measurement is refined by warping two-dimensional images of an object from offset camera positions according to a three-dimensional model of the object, and applying any resulting discrepancies to refine the three-dimensional model, or to refine one of a number of three-dimensional measurements used to create the three-dimensional model. |
| US09418472B2 |
Blending between street view and earth view
In one aspect, computing device(s) may determine a plurality of fragments for a three-dimensional (3D) model of a geographical location. Each fragment of the plurality of fragments may correspond to a pixel of a blended image and each fragment has a fragment color from the 3D model. The one or more computing devices may determine geospatial location data for each fragment based at least in part on latitude information, longitude information, and altitude information associated with the 3D model. For each fragment of the plurality of fragments, the one or more computing devices may identify a pixel color and an image based at least in part on the geospatial location data, determine a blending ratio based on at least one of a position and an orientation of a virtual camera, and generate the blended image based on at least the blending ratio, the pixel color, and the fragment color. |
| US09418470B2 |
Method and system for selecting the viewing configuration of a rendered figure
A method for determining a viewing configuration of a rendered figure of a rehab-patient or a sports trainee, aiming to deliver a suitable view on the rendered figure, the method comprising the steps of capturing motion data in the 3D space of one or more body parts of the rehab-patientor the sports trainee and providing them to a computer; and further the step of performing on the computer measurements of deviation of the captured motion data from a reference list of motion data and/or measurements of main motion direction; and based on the results of the above measurements, determining the viewing configuration. |
| US09418466B2 |
Geospatial representation of data-less map areas
Some embodiments provide a non-transitory machine-readable medium that stores a mapping application which when executed on a device by at least one processing unit renders views of a three-dimensional (3D) map. The mapping application requests a first set of map tiles associated with a portion of the 3D map. In response to the request, the mapping application receives a second set of map tiles associated with portion of the 3D map. The mapping application identifies a third set of map tiles included in the first set of map tiles but not included in the second set of map tiles. For each map tile in the third set of map tiles, the mapping application generates a replacement map tile comprising geospatial data. The mapping application renders the portion of the 3D map based on the second set of map tiles and the set of replacement map tiles. |
| US09418465B2 |
Multipoint offset sampling deformation techniques
Systems and methods for performing MOS skin deformations are provided. In one example process, the in vector of a MOS transform may be manually configured by a user. In another example process, a slide/bulge operation may be configured to depend on two or more MOS transforms. Each of the MOS transforms may be assigned a weight that represents the transform's contribution to the overall slide/bulge. In yet another example process, a bulge operation for a MOS vertex may be performed in a direction orthogonal to the attached MOS curve regardless of the direction of the attachment vector. In yet another example process, a ghost transform may be inserted into a MOS closed curve and used to calculate skin deformations associated with first transform of the MOS closed curve. |
| US09418463B2 |
Mobile communication device
A mobile communication device that includes: a storage unit configured to store therein image data; an address book storage unit configured to store therein communication party information associated with the image data; and an output control unit configured to display, when a sent mail that is transmitted by the mobile communication device is selected by selection of transmission destination information that corresponds to the sent mail, image data together with the transmission destination information, wherein the transmission destination information comprises communication party information pertaining to the sent mail, the image data being associated with the transmission destination information such that the image data is displayed together with the transmission destination information upon selection of the transmission destination information, and wherein the image data was previously stored in the storage unit and not attached to the sent mail when it was sent. |
| US09418462B2 |
Digital media enhancement system, method, and apparatus
Aspects are disclosed for enhancing digital media. In an aspect, a target object in a primary image is identified, and reference images that include the target object are located. The target object is then modified within the primary image according to data derived from analyzing the reference image. In another aspect, a primary file is received, and at least one reference file is referenced to generate enhancement data that facilitates enhancing the primary file from an extrapolation of the reference file. In yet another aspect, media files corresponding to a common event are aggregated, and a desired enhancement of a primary file is identified. Here, the desired enhancement corresponds to a modification of an obstruction included in the primary file. A reference file which includes data associated with the desired enhancement is then referenced, and the obstructed data is modified based on replacement data extrapolated from the reference file. |
| US09418460B2 |
Alignment based on visual content
Disclosed is a method including storing in a memory presentation data, including image data, processing the image data to generate positioning data for positioning the image on a presentation in accordance with a plurality of image positioning techniques, and selecting positioning data for positioning the image in accordance with at least one of the plurality of image positioning techniques. A user interface, which may be graphical, permits a user to toggle through the positions generated by the various techniques, and to lock the image in a desired position. Also disclosed are a system and a computer-usable storage medium having instructions thereon for implementing the method. |
| US09418459B2 |
Region filling using matching criteria
A method for filling closed regions in a drawing using a region filling tool that may appear as a paint bucket. Rather than independently selecting regions to fill or filling based on style-by-layer techniques, the user selects a seed region such that other regions of the drawing are filled if parameters of the other regions match the parameters of the seed region. Matching criteria parameters may include an exact match parameter, a shape matching parameter, a layer matching parameter, and a line weight matching parameter. The parameters may be used alone or in conjunction with other parameters. In this manner, multiple regions in the drawing that are similar to the seed region may be filled using one interaction with the region filling tool. This approach allows the user to more efficiently and intuitively fill regions in the drawing. |
| US09418449B2 |
Device and method for measuring surfaces
According to the invention, a method for detecting and measuring local shape deviations in flat, curved, or domed surfaces of a test object, wherein three-dimensional measurement data (D) of the surfaces are evaluated by means of an evaluating apparatus, is designed and further developed, with regard to nondestructive testing of test objects with objective and easy-to-interpret assessment results, in such a way that the evaluating apparatus uses at least one virtual filter element as a concave filter for detecting concave sub-areas in flat or convex surfaces and/or as a convex filter for detecting convex sub-areas in flat or concave surfaces, that the filter element determines magnitudes of the shape deviations, and that said magnitudes are output by means of an outputting apparatus as measured values. The invention specifies a device for performing a corresponding method. |
| US09418447B2 |
Single-image specular reflection separation
Systems and methods are discussed to separate the specular reflectivity and/or the diffuse reflectivity from an input image. Embodiments of the invention can be used to determine the specular chromaticity by iteratively solving one or more objective functions. An objective function can include functions that take into account the smooth gradient of the specular chromaticity. An objective function can take into account the interior chromatic homogeneity of the diffuse chromaticity and/or the sharp changes between chromaticity. Embodiments of the invention can also be used to determine the specular chromaticity of an image using a pseudo specular-free image that is calculated from the input image and a dark channel image that can be used to iteratively solve an objective function(s). |
| US09418443B2 |
Apparatus and method for detecting obstacle
An apparatus and method for detecting an obstacle include a camera to photograph first and second images at different points in time successively. A calculator is configured to calculate a movement distance and a rotation amount of a vehicle by comparing the two images photographed by the camera with each other. A rotation amount compensator is configured to compensate for the rotation amount of the first image based on the second image. A difference value calculator is configured to calculate a difference value between the first image of which the rotation amount is compensated for and the second image based on the calculated movement distance of the vehicle. An obstacle detector extracts a region having the difference value exceeding an expectation value to detect the obstacle. |
| US09418442B2 |
Tool tracking during surgical procedures
A system and method for tracking a surgical implement in a patient can have an imaging system configured to obtain sequential images of the patient, and an image recognition system coupled to the imaging system and configured to identify the surgical implement in individual images. The image recognition system can be configured to identify the surgical implement relative to the patient in one of the images based, at least in part, on an identification of the surgical implement in at least one preceding one of the sequential images, and a probabilistic analysis of individual sections of the one of the images, the sections being selected by the image recognition system based on a position of the surgical implement in the patient as identified in the at least one preceding one of the images. |
| US09418438B2 |
Networked capture and 3D display of localized, segmented images
Systems, devices and methods are described including receiving a source image having a foreground portion and a background portion, where the background portion includes image content of a three-dimensional (3D) environment. A camera pose of the source image may be determined by comparing features of the source image to image features of target images of the 3D environment and using the camera pose to segment the foreground portion from the background portion may generate a segmented source image. The resulting segmented source image and the associated camera pose may be stored in a networked database. The camera pose and segmented source image may be used to provide a simulation of the foreground portion in a virtual 3D environment. |
| US09418428B2 |
Position management device, position management system, position management method, and position management program
The position management device includes: a calculation unit that gives identification on an object being monitored to the object being monitored cyclically imaged, and calculates positional information of the object from an image of the object; a storage unit that associates the identification and an imaging time with the positional information, and stores these items; and a comparison unit that compares, with respect to the object, an absolute value of a difference between the positional information as of a current time and the positional information as of each of the imaging times one and two cycle(s) prior to the current time, as stored in the storage unit, with a predetermined reference value, and outputs the positional information as of the current time if the absolute value for at least one of the imaging times is less than the reference value. |
| US09418426B1 |
Model-less background estimation for foreground detection in video sequences
A camera outputs video as a sequence of video frames having pixel values in a first (e.g., relatively low dimensional) color space, where the first color space has a first number of channels. An image-processing device maps the video frames to a second (e.g., relatively higher dimensional) color representation of video frames. The mapping causes the second color representation of video frames to have a greater number of channels relative to the first number of channels. The image-processing device extracts a second color representation of a background frame of the scene. The image-processing device can then detect foreground objects in a current frame of the second color representation of video frames by comparing the current frame with the second color representation of a background frame. The image-processing device then outputs an identification of the foreground objects in the current frame of the video. |
| US09418425B2 |
3D image acquisition apparatus and method of calculating depth information in the 3D image acquisition apparatus
A 3-dimensional (3D) image acquisition apparatus and a method of calculating depth information in the 3D image acquisition apparatus, the 3D image acquisition apparatus including: an optical modulator for modulating light reflected from a subject by sequentially projected N (N is 3 or a larger natural number) light beams; an image sensor for generating N sub-images by capturing the light modulated by the optical modulator; and a signal processor for calculating depth information regarding a distance to the subject by using the N sub-images. |
| US09418424B2 |
Laser scanning systems and methods
A three-dimensional scanner uses a rotatable mounting structure to secure a laser line source in a manner that permits rotation of a projected laser line about an axis of the laser, along with movement of the laser through an arc in order to conveniently position and orient the resulting laser line. Where the laser scanner uses a turntable or the like, a progressive calibration scheme may be employed with a calibration fixture to calibrate a camera, a turntable, and a laser for coordinated use as a three-dimensional scanner. Finally, parameters for a scan may be automatically created to control, e.g., laser intensity and camera exposure based on characteristics of a scan subject such as surface characteristics or color gradient. |
| US09418420B2 |
System and method for automated detection of lung nodules in medical images
A system and method for automatically segmenting a computed tomography (CT) image of a patient's lung. The method includes the steps of segmenting the CT image to acquire one or more lung regions, intensity thresholding the lung regions to generate a mask region comprising high-intensity regions corresponding to anatomical structures within the lung regions, computing a Euclidean distance map of the mask region, performing watershed segmentation of the Euclidean distance map to generate one or more sub-regions, identifying a seed point for each sub region, growing candidate regions from the seed point of each sub-region, and classifying one or more candidate regions as a lung nodule based on one or more geometric features of the candidate regions. |
| US09418419B2 |
Control method and apparatus to prepare medical image data with user acceptance of previews after each of first and second filtering of the medical image data
Medical image data of at least one medical imaging apparatus are prepared in a computerized procedure wherein the medical image data are received by a reception unit, a first subset of the medical image data is selected by at least one first filter unit, the first subset of the medical image data is processed by at least one second filter unit, with the processing leading to a second subset, the second subset of the medical image data are sorted and/or grouped by the processing unit, a presentation type for the second subset of the medical image data is determined by means of the processing unit, and the second subset of the medical image data is presented as an output according to a defined presentation type by an output unit. |
| US09418418B2 |
Method for quantifying the morphological regularity degree of the pellucid zone in embryos and oocytes
The present invention refers to a method for calculating a shape factor indicative of the evenness of the pellucid zone thickness of a biological structure and to a method for evaluating the evenness of the pellucid zone thickness of a biological structure through said shape factor. |
| US09418415B2 |
Trabecular bone analyzer
Disclosed herein is a trabecular bone analyzer that can quantitatively determine the state of trabecular bone accurately. The trabecular bone analyzer of may perform trabecular bone analysis on a tomographic image D. In the tomographic image D, trabeculae forming a network may appear without overlapping. Therefore, such trabecular bone analysis may more accurately quantify trabecular bone. |
| US09418411B2 |
System and method for sun glint correction of split focal plane visible and near infrared imagery
A computer implemented method and system for reducing sunglint effects in a multispectral digital image from a satellite multiband imager having a sampling time delay between collection of a first bandset and a second bandset, each bandset including a near infrared band and a plurality of other wavelength bands. For each bandset separately, extract pixels in a window surrounding a current pixel, determine a local low glint value as the characteristic value of a small subset of pixels in the window having the lowest near infrared reflectance values, determine a near infrared glint value by subtracting the local low glint value from the near infrared reflectance value of the current pixel, and determine glint-corrected values for each of the wavelength bands by subtracting the local low glint value from each wavelength band reflectance value. A second pass can apply a near infrared band subtraction correction to all bands of the first bandset and the second bandset. The satellite imager can be the WorldView-2 or WorldView-3 system. |
| US09418409B2 |
Image recovery method
An image recovery method is disclosed for eliminating an effect of an environmental medium. The image recovery method includes receiving a captured image affected by the environmental medium, defining a respective local window with each pixel located at a center of the respective local window, and under an assumption that original radiance of all pixels within the respective local window in the captured image are identical, performing a minimization calculation for each local window, to obtain a corresponding transmission of each pixel in the captured image. |
| US09418405B2 |
Method and system for reducing motion blurring in digital radiography
A method of reducing motion blurring in digital radiography includes capturing at least one temporally coded blurred image of an object generated by using a coded pattern, and generating a de-blurred image from the at least one temporally coded blurred image by using the coded pattern and an estimate of a motion vector of the object. The at least one temporally coded blurred image is captured by using a total amount of generated light corresponding to at least a portion of radiation transmitted by the object. A digital radiography system is also provided. |
| US09418399B1 |
Hybrid image camouflage
Designs and methods are provided for a hybrid image camouflage comprising a micro camouflage pattern of primarily fine features and a macro camouflage pattern of primarily coarse features. The patterns may be combined such that the appearance of the micro pattern predominates at close range, and the appearance of the macro pattern predominates at long range. |
| US09418398B2 |
Low power subpixel rendering on RGBW display
An apparatus and method for providing low power subpixel rendering are provided. The method includes receiving image data for a first pixel of a captured image, receiving image data for a second pixel of the capture image, determining a first saturation value of the first pixel and a second saturation value of the second pixel, determining a maximum saturation value based on the first saturation value and the second saturation value, and rendering a subpixel value using a one dimensional filter or a unity filter based on the determined maximum saturation value. |
| US09418397B2 |
Start-up processing task distribution among processing units
Embodiments are disclosed for distributing processing tasks during a start up routine for a computing device between a central processing unit (CPU) and a graphics processing unit (GPU). In some embodiments, a method of loading an operating system for a computing device with a CPU includes receiving power from a power supply and locating a master boot record in a non-volatile storage device. The method further includes copying a first portion of a compressed operating system image from an address indicated by the master boot record to a location in a volatile storage device and instructing a GPU to decompress the first portion of the compressed operating system image in the volatile storage device. |
| US09418396B2 |
Watermarking digital images to increase bit depth
Watermark data is converted to watermark coefficients, which may be embedded in an image by converting the image to a frequency domain, embedding the watermark in image coefficients corresponding to medium-frequency components, and converting the modified coefficients to the spatial domain. The watermark data is extracted from the modified image by converting the modified image to a frequency domain, extracting the watermark coefficients from the image coefficients, and determining the watermark data from the watermark coefficients. The watermark data may be truncated image data bits such as truncated least significant data bits. After extraction from the watermark, the truncated image data bits may be combined with data bits representing the original image to increase the bit depth of the image. Watermark data may include audio data portions corresponding to a video frame, reference frames temporally proximate to a video frame, high-frequency content, sensor calibration information, or other image data. |
| US09418394B2 |
Operation simulation system of robot system
An operation simulation system of a robot system for simulating operation of a robot system having a robot on a computer, including a setting unit setting a movement point moving together with a moving member, linked with the moving member which is included in the robot system and moves in accordance with a predetermined program; a data acquisition unit acquiring time series position data of the movement point when operating the robot system in accordance with the program on the computer; an image generation unit generating an image of the robot system operating in accordance with the program on the computer and generating an image of a movement path of the movement point based on the time series position data acquired by the data acquisition unit; and a display unit displaying the robot system image and the movement path image generated by the image generation unit. |
| US09418393B2 |
System, method, and apparatus for settlement for participation in an electric power grid
Systems, methods, and apparatus embodiments for electric power grid and network registration and management of physical and financial settlement for participation of active grid elements in supply and/or curtailment of power, wherein Internet Protocol (IP)-based messages including IP packets are generated by transforming raw data content into settlement grade content. Settlement is provided for grid elements that participate in the electric power grid following initial registration of each grid element with the system, preferably through network-based communication between the grid elements and a coordinator, either in coordination with or outside of an IP-based communications network router. Messaging related to settlement is managed through a network by a Coordinator using IP messaging for communication with the grid elements, with the energy management system (EMS), and with the utilities, market participants, and/or grid operators. |
| US09418388B1 |
Techniques for displaying third party content
Systems and methods for managing third party content are described. In one embodiment, the method includes storing information for a plurality of third party content elements that were selected by a user for display with a page of content, in response to a user request corresponding to a page associated with one of the plurality of third party content elements specified by the stored information, rendering for display on the page a third party content module associated with the third party content element, and, in response to a user modification of the third party content module, storing information corresponding to the user modification. The modified content module is rendered for display on a page of content according to the stored information. The user has the ability to customize and control the parameters of content modules selected by the user to be rendered on the accessed page. |
| US09418386B2 |
System and method for capturing sales tax deduction information from monetary card transactions
Systems and methods are provided for managing sales tax information. The information may be generated, for example, in connection with transactions involving financial accounts, such as a credit card account. The sales tax information may be received electronically from, for example, a merchant or a point of sale device. A determination may be made whether there is any missing sales tax information. If there is missing information a request may be generated and sent to a source having the information. The source may receive the request, retrieve the desired information, and transmit it to the requesting entity. The sales tax information may be stored and later retrieved for presentation to a user, such as the account holder. The account holder may use the information in completing a tax return. |
| US09418384B1 |
Systems and methods for scrubbing confidential insurance account data
Methods and systems for scrubbing confidential insurance account information are provided. According to embodiments, a scrubbing server can receive a request to scrub confidential insurance data that includes the contents of an insurance account information database and an indication of the category of confidential data stored in the database. The scrubbing server can scrub the valid data contained in the received database, replacing confidential information with “scrambled” data that is not confidential. The scrubbing server can transmit the contents of the scrubbed database back to the requesting party. |
| US09418376B2 |
Method and system to digitally sign and deliver content in a geographically controlled manner via a network
A method and system to digitally sign a content license associated with content, and to distribute content via a network in a geographically controlled manner, commences when a content requestor requests delivery of the encrypted content. A content delivery system performs a content to determine a geographic location associated with the content requestor. The content requestor authorization process may also determine geographic access criteria associated with the content, and whether the geographic location complies with the geographic access criteria. The content delivery system will release the content for delivery to the content requestor if the content location complies with the geographic access criteria. |
| US09418375B1 |
Product recommendation using sentiment and semantic analysis
In an approach to determine a product rating a computer receives a user request for a product rating. The computer retrieves from on-line sources, product information on the product and analyzes the product information to determine a first product rating. The analysis includes at least a sentiment, and a trend of the sentiment. The approach includes a computer identifying products similar to the product and retrieving from on-line sources product information on similar products. A computer extracts comments on the product from the similar product information and determines an adjustment to the first product rating based on an analysis of the comments and references to the product in the similar product information. The adjustment to the first product rating includes using a sentiment, a trend of the sentiment over time, and a frequency of comments and references to the product over time in the retrieved plurality of similar product information. |
| US09418374B2 |
Selection of keyword phrases for providing contextually relevant content to users
A process is described for assessing the suitability of particular keyword phrases for use in serving contextually relevant content for display on pages of network-accessible sites. In one embodiment, the process involves scoring the key phrases based in part on collected user behavioral data, such as view counts of associated social media content items. A process is also disclosed in which selected keyword phrases on a page are transformed into links that can be selected by a user to view bundled content that is related to such keyword phrases. |
| US09418373B2 |
Interactive advertising using digital watermarks
A method and system for interactive advertising may use digital watermarks embedded in multimedia content displayed to a user of a mobile device that includes a camera. The user may capture the digital watermark by simply recording the multimedia content using the camera on the mobile device. A digital watermark value obtained from the digital watermark may be sent to a watermark service provider who validates the digital watermark value and returns an advertising token to the mobile device. The advertising token may be usable by the user to receive promotions, offers, and other information associated with an advertiser. |
| US09418368B2 |
Methods and systems for determining interest in a cohort-linked avatar
Avatars, methods, apparatuses, computer program products, devices and systems are described that carry out receiving an indication of interest in at least one cohort-linked avatar attribute; and transmitting the at least one cohort-linked avatar attribute in response to the indication of interest. |
| US09418363B2 |
Point of sale activation card unit
A point of sale activation unit that includes a first wallet portion, a second wallet portion and an activation card portion. The first wallet portion defines a first opening that has a shape corresponding to a machine readable code and includes a security tab affixed thereto with two nicks. The security tab obscures a second opening. The second wallet portion is coupled to the first wallet portion. The activation card portion is narrower than the second opening. The machine readable code is printed on an exterior side and an activation code is printed on an interior side of the activation card portion, which extends from the second wallet portion. The first wallet portion, the second wallet portion and the activation card portion are all cut from a single flat sheet and are folded and glued together so that the machine readable code is exposed through the first opening. |
| US09418360B1 |
Digital kiosk
The present invention includes systems and methods for operating a fan kiosk. A graphical user interface at a kiosk provides a user with an option to select a player. One or more displays at the kiosk display one or more life-size representations and one or more sponsor identifiers of one or more sponsors of the selected player. The kiosk also uses information from a database to generate the displays. The kiosk can provide an image of the selected player superimposed on an image of the user. The kiosk saves user information and synchronizes saved data with the database. |
| US09418356B2 |
Streamlined collaboration on document
Collaborating on documents by e-mail may be streamlined into a unified process. In one example, a user creates a document in an online document service, and sends the document to collaborators by mailing a link to the document. The document may have permissions set so that the creator of the document, and any user on the e-mail distribution list, can read and edit the document. When a user receives the e-mail, that user may open and edit the document. Upon closing the editing application, the user may be presented with an appropriate interface to create a reply e-mail. |
| US09418352B2 |
Image-augmented inventory management and wayfinding
Systems and methods may provide for receiving a query regarding an establishment, retrieving an output image from an image database in response to the query, and transmitting the output image to a mobile device. In one example, image data including a plurality of interior establishment images and a plurality of stocking area images are also received, wherein the image database may be constructed based on the received image data. |
| US09418351B2 |
Automated network inventory using a user device
A system configured to receive a request to perform a survey on a piece of equipment associated with a network; and present, for display, a user interface that allows a user, of the user device, to enter equipment information, associated with the piece of equipment, where the equipment information includes information that uniquely identifies the piece of equipment, information associated with a location of the piece of equipment, or information that identifies ownership of the piece of equipment . The system is also configured to receive, via the user interface, the equipment information; and transmit the equipment information to a server device. |
| US09418342B2 |
Method and apparatus for detecting mode of motion with principal component analysis and hidden markov model
A method, computer-readable storage device and apparatus for determining a mode of motion are disclosed. For example, a method receives training data comprising gait information associated with a plurality of different modes of motion. The method performs principal component analysis on the training data to extract principal components from the training data and generates a hidden markov model for each of a plurality of different modes of motion based upon the training data. The method receives testing data comprising gait information, transforms the testing data based upon the principal components and calculates a likelihood of the testing data based upon each hidden markov model for each of the plurality of different modes of motion. The method determines the mode of motion of the testing data, where the mode of motion is one of the plurality of different modes of motion for which a highest likelihood is calculated. |
| US09418340B2 |
Fast learning to train learning machines using shadow joining
In one embodiment, a node receives a request to initiate a shadow joining operation to shadow join a field area router (FAR) of a computer network, and preserves its data structures and soft states. The shadow joining operation may then be initiated to shadow join the FAR, wherein shadow joining comprises preforming join operations without leaving a currently joined-FAR, and the node measures one or more joining metrics of the shadow joining operation, and reports them accordingly. In another embodiment, a FAR (or other management device) determines a set of nodes to participate in a shadow joining operation, and informs the set of nodes of the shadow joining operation to shadow join the FAR. The device (e.g., FAR) participates in the shadow joining operation, and receives reports of one or more joining metrics of the shadow joining operation measured by the set of nodes. |
| US09418338B2 |
Determination of uncertainty measure for estimate of noise power spectral density
Systems/methods for computing a power spectral density estimate for a noise signal. Where the noise signal appears in two channels (a single channel), n successive data acquisitions from the two channels (the single channel) are used to compute n respective cross (power) spectral densities, which are then averaged. The averaged cross (power) spectral density may then be smoothed in the spectral domain. The magnitude of the smoothed cross (power) spectral density comprises an estimate for the noise power spectral density. An effective number of independent averages may be computed based on the number n, the time-domain window applied to the acquired sample sets, the amount of overlap between successive sample sets, and the shape of the frequency-domain smoothing function. A statistical error bound (or uncertainty measure) may be determined for the power spectral density estimate based on the effective number of averages and the averaged single-channel and cross-channel spectral estimates. |
| US09418337B1 |
Systems and models for data analytics
Systems and methods are provided that allow for generating and applying an improved predictive data model that aggregates two or more models performed sequentially, for the purposes of improving the prediction of overall profitability of individuals or households in a population. The models may be generated by the processing of customer profitability data and third-party population data together. One of the two aggregated models may be an inherently probabilistic, binary model tasked with determining whether an individual is a high-loss individual and using that result to improve the predictive capability of the system. |
| US09418336B2 |
Automatic recognition and insights of data
Automatic recognition and presentation of insights of data is provided through analysis of overall data to infer locations of a user's data. Statistical, heuristic, and comparable analysis on the user's data sets is used to determine insights such as trends, correlations, outliers, comparisons, and patterns. The insights are then presented to the user through automatically optimized visualizations (highlighting determined insights), emphasis on presented raw data, data formatting suggestions, and similar ones with the capability to explore further. |
| US09418329B2 |
Product holder
A holder for a product package includes a substrate having an inside surface, with opposing end portions of the substrate being folded upwards. The holder also includes a securing member disposed on at least one of the end portions, the securing member configured to secure the product package within the end portions of the substrate. The holder also includes a RFID tag disposed on the substrate. |
| US09418328B2 |
RFID tags and processes for producing RFID tags
A Radio Frequency Identification (RFID) tag. The RFID tag comprises a flexible substrate and an integrated circuit embedded within the flexible substrate. The top surface of the integrated circuit is coplanar with the flexible substrate. At least one conductive element is formed on the flexible substrate. The conductive element is electrically connected to the integrated circuit. The conductive element serves as an antenna for the RFID tag. |
| US09418325B1 |
Document box synchronization on an imaging system
In one aspect, an example method includes receiving, by an image forming device, authentication data corresponding to an external device; transmitting, by the image forming device, authentication approval data; after transmitting the authentication approval data, the image forming device receiving a first document list from the external device, wherein the first document list includes first document data; responsive to receiving the first document list, the image forming device retrieving second document data corresponding to documents stored by the image forming device, wherein the stored documents correspond to the external device; identifying a document using the first and second document data, wherein data corresponding to the identified document is included in either the first document data or the second document data; and responsive to the identification, transferring the data corresponding to the identified document between the external device and the image forming device. |
| US09418322B2 |
XML printer system with RFID capability
An XML system is configured to encode RFID devices embedded in media, based upon an extensible markup language (XML) input data stream. The computer system further includes an XML processor configured to receive and process a format template, associate the XML data contained in the XML input data stream and the format template, a formatting engine configured to format the associated XML data according to a format governed by the format template, and/or generate encoding information for an RFID device. |
| US09418320B2 |
Apparatus and method for detecting object using PTZ camera
An apparatus for detecting an object includes a filter for filtering a current input image and a background model generated based on a previous input image, a homography matrix estimation unit for estimating a homography matrix between the current input image and the background model, an image alignment unit for converting the background model by applying the homography matrix to a filtered background model and aligning a converted background model and a filtered current input image, and a foreground/background detection unit for detecting a foreground by comparing corresponding pixels between the converted background model and the filtered current input image. |
| US09418318B2 |
Robust subspace recovery via dual sparsity pursuit
A computer-implemented method of detecting a foreground data in an image sequence using a dual sparse model framework includes creating an image matrix based on a continuous image sequence and initializing three matrices: a background matrix, a foreground matrix, and a coefficient matrix. Next, a subspace recovery process is performed over multiple iterations. This process includes updating the background matrix based on the image matrix and the foreground matrix; minimizing an L−1 norm of the coefficient matrix using a first linearized soft-thresholding process; and minimizing an L−1 norm of the foreground matrix using a second linearized soft-thresholding process. Then, background images and foreground images are generated based on the background and foreground matrices, respectively. |
| US09418310B1 |
Assessing legibility of images
In some implementations, legibility of an image may be automatically determined based, at least in part, on text contained in the image. For example, image analysis techniques may be used to identify text components in an image. One or more features of each text component may be determined for use in assessing the legibility of the text component. For example, a classifier trained on the one or more features may provide a confidence level indicative of the legibility of each text component. The confidence level for each of the text components may be compared to a legibility threshold for determining whether the text component is legible or illegible. Based, at least in part, on the determination as to how much of the text in the image is legible or illegible, an overall legibility of the image may be assessed. |
| US09418309B2 |
Method and apparatus for performing a fragmentation assessment of a material
A method and apparatus for performing a fragmentation assessment of a material including fragmented material portions is disclosed. The method involves receiving two-dimensional image data representing a region of interest of the material, and processing the 2D image data to identify features of the fragmented material portions. The method also involves receiving a plurality of three dimensional point locations on surfaces of the fragmented material portions within the region of interest, identifying 3D point locations within the plurality of three dimensional point locations that correspond to identified features in the 2D image, and using the identified corresponding 3D point locations to determine dimensional attributes of the fragmented material portions. |
| US09418303B2 |
Method for traffic sign recognition
A traffic sign recognition method analyzes and classifies image data of a sensor in an information processing unit. The image data is analyzed to select an image portion judged to contain a traffic sign of a particular sign class. A class-specific feature is identified in the image portion. A modified image portion is created, in which the class-specific feature has been shifted to a center of the modified image portion. Then the modified image portion is evaluated by a learning-based algorithm to recognize the traffic sign of the particular sign class. |
| US09418299B2 |
Surveillance process and apparatus
A method and apparatus for performing surveillance comprising: imaging, at a first frame rate, an area (4) to produce images; detecting, using the images, a feature of interest (22) within the area (4); determining a region of interest (24), the region of interest (24) corresponding to a region within the area (4) in which the feature of interest (22) will be located at a later time-step; and, at the later time-step, using the region of interest (24), imaging the area (4) such that images of the region within the area (4) in which the feature of interest (22) is located are produced at a second frame rate, while images of the rest of the area (4) are produced at a third frame rate, the second rate being different to the third rate. |
| US09418298B2 |
System and method for using a website containing video playlists as input to a download manager
Systems and methods for enabling the download of a set of media files with a specific order and specific contents and, more particularly, to enabling a download manager to automatically receive the information it requires to retrieve those elements required to replicate a streaming edit through local playback after the downloads complete. |
| US09418297B2 |
Detecting video copies
A computer-implemented method for detecting a copy of a reference video, comprises segmenting respective ones of multiple frames of the reference video into multiple regions, determining sets of image features appearing in respective ones of the multiple frames, determining a measure for the relative number of image features for a given region across the multiple frames, generating a spatio-temporal signature for the reference video using the determined measures, and comparing the signature for the reference video against a spatio-temporal signature of a query video to determine a likelihood of a match. |
| US09418296B1 |
Detecting segments of a video program
In an embodiment, a data store storing a first video and a second video that is associated with the first video; a computer processor coupled to the data store and programmed to: generate a first model fingerprint of the first video, based on pixels in a first model frame in a first model segment of the first video stored in the data store; generate a first test fingerprint of the second video based on pixels in a first test frame in the second video stored in the data store; determine a first closeness value between the first model fingerprint and the first test fingerprint; determine, based on the first closeness value, whether the first test frame is a first boundary of a first segment in the second video, wherein the first segment in the second video is similar to the first model segment in the first video. |
| US09418289B2 |
IC layout pattern matching and classification system and method
A system and method for restricting the number of layout patterns by pattern identification, matching and classification, includes decomposing the pattern windows into a low frequency component and a high frequency component using a wavelet analysis for an integrated circuit layout having a plurality of pattern windows. Using the low frequency component as an approximation, a plurality of moments is computed for each pattern window. The pattern windows are classified using a distance computation for respective moments of the pattern windows by comparing the distance computation to an error value to determine similarities between the pattern windows. |
| US09418285B2 |
Information processing apparatus and input control method
An information processing apparatus includes an image capturing section to capture an image of a hand; an extracting section to extract a hand area from the captured image; a reference line determining section to determine a reference pushdown line in the image on the hand area; a determining section to determine a pushdown move if the bottom part of the hand area comes below the reference pushdown line; a first position determining section to determine a depth position based on an aspect ratio of the hand area if the pushdown move is determined; a second position determining section to determine a lateral position based on a position of the bottom part of the hand area if the pushdown move is determined; and an input key determining section to determine an input key from the determined depth position and lateral position. |
| US09418284B1 |
Method, system and computer program for locating mobile devices based on imaging
Method for generating and using a database of pixel patterns includes obtaining images using a mobile device including a common pixel pattern and processing each image based on a size of the pixel pattern and/or angular orientation of the pixel pattern relative to an imaging direction to derive positional information about the pixel pattern. Location of the mobile device is determined by obtaining an image including a stationary pixel pattern, searching the database for the obtained pixel pattern, and retrieving positional information about a closest match pixel pattern. With the retrieved positional information, an angle between an imaging direction in which the image including the closest match pixel pattern was obtained and an imaging direction in which the image was obtained and/or a size differential between the closest match pixel pattern and the pixel pattern in the obtained image is/are analyzed to derive positional information about the mobile device's location. |
| US09418283B1 |
Image processing using multiple aspect ratios
A system to recognize text, objects, or symbols in a captured image using machine learning models reduces computational overhead by generating a plurality of thumbnail versions of the image at different downscaled resolutions and aspect ratios, and then processing the downscaled images instead of the entire image, or sections of the entire image. The downscaled images are processed to produce a combine feature vector characterizing the overall image. The combined feature vector is processed using the machine learning model. |
| US09418279B2 |
Detection of an object's varying features with a non-stationary device
Disclosed are systems, apparatus, devices, method, computer program products, media and other implementations, including a method that includes capturing by an image capturing unit of a mobile device images of a scene including a target object, determining motion of the mobile device, and detecting from the captured images variations in one or more varying features of the target object based, at least in part, on the determined motion of the mobile device, the variations in the one or more varying features being independent of the target object's position in the scene. |
| US09418278B2 |
Image analysis method, camera apparatus, control apparatus, control method and storage medium
A control apparatus detects a state of an object independently of results of analysis of images captured by a plurality of cameras and controls analysis of the images captured by the plurality of cameras concurrently capturing the object whose state has been detected, according to the state of the object. |
| US09418277B2 |
Electronic device and method for unlocking the electronic device
A method for unlocking an electronic device stores a user fingerprint in a storage device and presets account information corresponding to each application for each of the user fingerprints. The method further receives fingerprint data input from the electronic device. When the received fingerprint data matches one of the user fingerprints, the account information corresponding to the matched fingerprint for each of the plurality of applications is confirmed. The method further replaces a default account information of each of the plurality of applications stored in the storage device by the confirmed account information corresponding to the matched fingerprint for each of the applications, and the electronic device is unlocked. |
| US09418276B2 |
Fingerprint authentication method and fingerprint authentication device
A client terminal acquires an image that includes at least a part of a fingerprint, and detects an orientation of a ridge that forms the fingerprint from the image, and detects a singular point of the fingerprint from the image, and calculates an angle formed, on a circumference of a reference circle whose center is the singular point, by the orientation of the ridge and the direction of a tangent line that comes into contact with the reference circle, and creates narrow down data that is used to narrow down matching data that is used to match the fingerprint by associating the angle with a position on the circumference of the reference circle. |
| US09418275B2 |
Biometric information processing for providing increased authentication precision by guiding a user to place auxiliary information within an imaging range
A biometric information processing apparatus includes a processor; and a memory, wherein the processor is configured to extract auxiliary information representing a part of a body being captured together with biometric information from a plurality of images captured by an imaging unit; to trace the auxiliary information in a time direction; to extract the biometric information from at least one image among the plurality of images; to associate the traced auxiliary information with the extracted biometric information in terms of a positional relationship; and to output the auxiliary information having been associated with the biometric information. |
| US09418274B2 |
Biometric authentication technique utilizing image data of both hands
A biometric authentication apparatus includes a single reading sensor configured to acquire first matching authentication characteristics data being unique to a first hand and used for matching, and second matching authentication characteristics data being unique to a second hand and used for matching; and a communications part configured to externally transmit the first and second matching authentication characteristics data for one person as authentication data and to receive an authentication result. |
| US09418267B1 |
Modular RFID shelving
A modular shelf for an integrated display structure that addresses the mutually important, yet unrelated issues of inventory control, shelf labeling and point of purchase advertising. The modular shelf has a non-metallic low density core, a molded frame secured along the outer perimeter of the core, a thermoplastic or resinous sheet secured to each of the top face and the bottom face of the core, and a plurality of antennae embedded within at least one of the top sheet and the bottom sheet. An RF or other electronic transceiver is electrically connected to the antennae secured within a cavity of the rear molded member, and a power and communications connects the RF transceiver with a front video display panel and with power and communications components in a support base of a shelf gondola. |
| US09418264B2 |
Antenna
An antenna (18), in particular a patch antenna, is provided having a planar resonator element (22) which has the geometry of a polygon with a plurality of edges, wherein the resonator element (22) has a plurality of slots (26) at the edges for their extension and additionally has a plurality of projections (28) at the edges. |
| US09418263B2 |
Operating systems for an RFID tag
In embodiments of the present invention improved capabilities are described for a radio frequency (RF) computing tag comprising mounting an antenna and an RF computing device that is enabled for RF communication and for computing on a single substrate, the RF computing device comprising: (i) an RF and analog block for receiving and transmitting an RF signal through the antenna, wherein the energy from a received RF signal provides power to the RF computing device, (ii) a power management block for managing power requirements of the RF computing device, and (iii) a processor-based data processing and controller block for digital information management, comprising an operating system, a programmable memory, a programmable memory, and a data store, wherein the programmable memory stores an operating system for operation of the RF computing device wherein the operating system is an extension of a second operating system on a second computing system. |
| US09418262B1 |
Method to differentiate radio frequency identification tags from other metal objects
Radio Frequency Identification (RFID) tags will be embedded into materials used to make various items (e.g., garments). Embedded RFID tags will be used to track the manufacturing process, inventory management and verify the authenticity of manufactured goods. RFID tags utilize a standard language (e.g., EPC Gen2 v2, etc.) that distinctly identifies the objects and manufacturers of the items the tags are embedded in. RFID tags also contain memory fields that can be written to from an RFID Interrogator. Containing electronic circuitry and an antenna, RFID tags will activate metal detectors, creating false alarms and neutralizing their usefulness. Techniques are provided for combining a metal detector and a RFID Reader in a single device to enable a security function for differentiating garments and/or accessories with an embedded RFID tag or standalone metal object. This invention applies to all metal detectors, x-ray, and millimeter scanners to include handheld, portable and standalone systems. |
| US09418259B2 |
Tag transmission apparatus and signal transmitting method thereof
Disclosed herein are a tag transmission apparatus and a signal transmitting method thereof. The tag transmission apparatus converts a plurality of data bits into a symbol, which is one of a plurality of symbols, and multiplies the converted symbol by a square-wave having a predetermined frequency to thereby generate a subcarrier signal. Here, in the case in which the plurality of data bits are n (n is a natural number larger than 2) bits, the number of the plurality of symbols is 2n. |
| US09418258B2 |
Data-detector circuit for RFID tags
Data-detector circuit for RFID labels, wherein the package is detected using two circuits, a polarizing circuit and a polarized circuit. The polarization signal can be sent from the polarizing circuit to the polarized circuit via a low-pass filter. The reference signal for comparison with the package detected is generated on the basis of the package attenuated by means of a voltage splitter. The reference signal is filtered via a low-pass filter. The resulting circuit has the characteristics of low consumption and high sensitivity. |
| US09418255B2 |
Media processing device, media processing system, and control method of a media processing device
Overwriting information that was correctly written to an IC tag that can communicate wirelessly but is not the IC tag on the medium intended to be processed is prevented so that the wrong information is not stored in the IC tag. When writing write data including uniquely assigned tag ID information to an IC tag ends correctly, the system controller 35 of the media processing device 2 stores information indicating that writing the IC tag was completed. When writing write data to an IC tag, the system controller 35 reads the tag ID information and determines if information matching the read tag ID information is included in the stored tag ID information. If matching information is found, the system controller 35 prohibits writing to the IC tag. |
| US09418249B2 |
System of providing a fixed identification of a transponder while keeping privacy and avoiding tracking
Transponder (180) having stored a fixed identification number, which expands said identification number with a random number, encrypts said expanded number with a key, and sends it to a reader (160) on its request. Reader (160), which on request receives an encrypted number from a transponder (180), decrypts a received encrypted number with a key, which was also used by the transponder (180), and extracts a fixed identification number associated with the transponder (180). |
| US09418245B2 |
Encryption processing device, encryption processing method, and program
Included is an encryption processing unit configured to divide and input configuration bits of data to be data processed into a plurality of lines, and to repeatedly execute data conversion processing of data for each line. The encryption processing unit includes an F function execution unit to input data from one line configuring the plurality of lines and generate converted data, an XOR calculation unit to execute an XOR calculation with other lines of data corresponding to the output from the F function, an intermediate data storage register to store intermediate data during the process of generating converted data in the F function execution unit, and an inverse calculation executing unit to calculate input data regarding the F function execution unit on the basis of the data stored in the intermediate storage register. |
| US09418244B2 |
Protecting content from third party using client-side security protection
Architecture that employs encryption and storage of encryption keys to protect trusted client message content from an untrusted third-party hosted service. Each trusted user machine is configured to optionally apply security to messages. Rules determine when automatic protection is applied and the level of protection to apply. The trusted client automatically downloads the rules (or rules policies) from a trusted rules service and caches the rules locally. During composition, the rules analyze the message and automatically apply security template(s) to the message. The security template(s) encrypt the body of the message, but not the headers or subject. The untrusted message service processes the header and delivers the message to the correct recipient. The hosted service cannot view the contents of the message body, and only intended recipients of the protected message can view the message body. Offline protection is supported, and the user can override protection by the rules. |
| US09418243B2 |
Invoking a private browsing mode by selection of a visual control element within a browser tab
Activating a private browsing mode for a browser can include receiving an electronic document within the browser and detecting an indicator associated with the electronic document using a processor, wherein the indicator is correlated with the private browsing mode of the browser. Responsive to detecting the indicator, the electronic document can be rendered within a view of the browser in which private browsing mode is activated. |
| US09418242B2 |
Computer implemented method for analyzing data of a user with the data being stored pseudonymously in a database
The invention relates to a computer implemented method for analyzing data of a first user, wherein an asymmetric cryptographic key pair is associated with the first user, said asymmetric cryptographic key pair comprising a public key and a private key, the data being stored pseudonymously in a database with the data being assigned to an identifier, wherein the identifier comprises the public key, the method comprising: receiving a set of rules, the set of rules describing data processing steps, receiving the identifier, retrieving the data assigned to the identifier from the database, analyzing the retrieved data by applying the set of rules, providing a result of the analysis. |
| US09418241B2 |
Unified platform for big data processing
This technology relate to methods and systems for big data processing. The system includes extraction modules for extracting data from the data sources. The system also includes means for defining rules to be applied on the data and means for applying the rules on the data in conjunction with the extraction modules. The means for applying the rules is capable of applying pre-defined set of rules and the rules defined by means of defining the rules. The system also has controllers for defining access control restrictions on the data in conjunction with the extraction modules, display for displaying visual representations of the data processing in conjunction with the extraction modules and memory to store the extracted data in indexed form. |
| US09418230B2 |
Automated tools for building secure software programs
A computer implemented tool is described that includes an assertion generator module that can automatically generate assertions, which are usable to verify application-specific security properties, for a computer software program. An assertion checker module can automatically analyze the computer software program to ensure that it satisfies the application-specific security properties. A graphical user interface module can display feedback to diagnose security flaws detected in the computer software program based on the analysis by the assertion checker module. In support of these modules are a code preprocessor module that can translate source code of the computer software program into an intermediate abstract representation, and a database module that can store the generated assertions and associated data in a database. Each of the modules can provide functionality at any time during code construction of the computer software program. |
| US09418226B1 |
Apparatus and method for assessing financial loss from threats capable of affecting at least one computer network
Apparatus for assessing threat to at least one computer network in which a plurality of systems (301, 302, 303, 304, 305, . . . 30n) operate is configured to determine predicted threat activity (13), to determine expected downtime of each system in dependence upon said predicted threat activity, to determine loss (12A, 12B, 12C, 12D, 12E, . . . , 12m) for each of a plurality of operational processes (31A, 31B, 31C, 31D, 31E, . . . 31m dependent on the downtimes of the systems, to add losses for the plurality of processes so as to obtain a combined loss (12SUM) arising from the threat activity. |
| US09418224B2 |
Portable electronic device and control method of portable electronic device
An IC card stores history information indicating information relating to a command executed for each logical channel in a storage portion and determines the validity of the command based on history information of a logical channel specified by the command stored in the storage portion when the command is supplied from an external device, performs a process corresponding to the command when the validity of the command is determined, and stores information relating to the executed command in the storage portion as history information of the logical channel. |
| US09418221B2 |
Method, device, and system of differentiating among users based on responses to injected interferences
Devices, systems, and methods of detecting user identity, differentiating between users of a computerized service, and detecting a cyber-attacker. An end-user device (a desktop computer, a laptop computer, a smartphone, a tablet, or the like) interacts and communicates with a server of a computerized server (a banking website, an electronic commerce website, or the like). The interactions are monitored, tracked and logged. User Interface (UI) interferences or irregularities are intentionally introduced to the communication session; and the server tracks the response or the reaction of the end-user to such communication interferences. The system determines whether the user is a legitimate human user, or a cyber-attacker or automated script posing as the legitimate human user. The system further detects click-fraud, and prevents or mitigates Application Distributed Denial-of-Service attacks. |
| US09418219B2 |
Inter-process message security
An inter-process messaging security management may be provided. A message comprising an operation to be performed may be sent from a process operating in a process chamber to a second process operating in another chamber. Before the message is allowed to be delivered, the validity of the operation contained in the message may be verified and a security policy may be examined to determine whether the message is permitted to be sent from the first process to the second process. If the security policy permits the second process to execute the operation requested by the first process, the message may be delivered to the second process. If the operation is not permitted, the message may not be delivered and an error message may be returned to the first process. |
| US09418216B2 |
Cloud service authentication
One or more techniques and/or systems are provided for obtaining access to a cloud service. In particular, a user may log into a client device using an operating system (OS) cloud login ID. The user may access cloud services (e.g., a music streaming service, a data storage service, etc.) through applications executing on the client device using merely the OS cloud login ID without providing additional login credentials specific to the cloud services. A client side application may request a token to access a cloud service. The token may be generated by an identity provider based upon the identity provider verifying an application ID identifying the application, a cloud service ID identifying the cloud service and/or OS cloud credentials. In this way, the application may present the token to a cloud service provider for verification to gain access to the cloud service hosted by the cloud service provider. |
| US09418214B1 |
Anonymous biometric enrollment
In the present invention systems and methods to perform the biometric anonymous enrollment of an individual into an anonymous biometric engine are disclosed. An enrollment authority or client verifies the credentials of an individual and collects the biographic/demographic and biometric information. The biographic demographic information is stored by the enrollment authority and a token is generated for the individual; the biometric information and the token are sent to a biometric engine for storage. The stored information may be used to identify or verify individuals. |
| US09418207B1 |
Method of securely distributing a controlled substance
A method of securely distributing a controlled substance which includes the steps of inputting a plurality of parameters into a secure pill device having a tamper resistance mechanism, shipping the secure pill device from a first facility to a second facility, periodically evaluating a first condition, comparing a first parameter in the plurality of parameters against the first condition, and engaging the tamper resistance mechanism when the first condition exceeds the first parameter in the plurality of parameters. The method may also include the steps of transferring a plurality of the controlled substance from the pill secure pill device to a patient pill dispenser having a patient tamper resistance mechanism, inputting a plurality of patient parameters into the patient pill dispenser and comparing the plurality of patient parameters with a plurality of conditions. |
| US09418197B1 |
Method for designing diodes
A method of designing a diode includes generating a layout of the diode and calculating a calculated voltage overshoot based on the layout. The calculating includes calculating variables of: the length of an N region of the diode; current density during an ESD event; electron charge; hole mobility; electron mobility; doping concentration of the diode; and rise time of the ESD event. |
| US09418196B2 |
Layout optimization for integrated circuit design
A method includes receiving a target pattern that is defined by a main pattern, a first cut pattern, and a second cut pattern, with a computing system, checking the target pattern for compliance with a first constraint, the first constraint associated with the first cut pattern, with the computing system, checking the target pattern for compliance with a second constraint, the second constraint associated with the second cut pattern, and with the computing system, modifying the pattern in response to determining that a violation of either the first constraint or the second constraint is found during the checking. |
| US09418193B2 |
Arrayed imaging systems having improved alignment and associated methods
Arrayed imaging systems include an array of detectors formed with a common base and a first array of layered optical elements, each one of the layered optical elements being optically connected with a detector in the array of detectors. |
| US09418191B2 |
Providing electron beam proximity effect correction by simulating write operations of polygonal shapes
A method for writing a design to a material using an electron beam includes assigning a first dosage to a first polygonal shape. The first polygonal shape occupies a first virtual layer and includes a first set of pixels. The method also includes simulating a first write operation using the first polygonal shape to create the design, discerning an error in the simulated first write operation, and assigning a second dosage to a second polygonal shape to reduce the error. The second polygonal shape occupies a second virtual layer. The method further includes creating a data structure that includes the first and second polygonal shapes and saving the data structure to a non-transitory computer-readable medium. |
| US09418190B2 |
Virtual sub-net based routing
A method and system to route connections of sub-networks in a design of an integrated circuit and a computer program product are described. The system includes a memory device to store instructions to route the connections of the sub-networks, and a processor to execute the instructions to determine a baseline route for each of the connections of each of the sub-networks, identify noise critical sub-networks in the integrated circuit design based on congestion, set a mean threshold length (MTL), segment the connections of the noise critical sub-networks based on the MTL, and re-route the baseline route based on segmenting. The MTL indicates a maximum length of each segment of each connection, each segment includes a different wirecode which is different from a wirecode of an adjacent segment, and each wirecode defines a width, a metal layer, and a spacing for each segment. |
| US09418185B2 |
Thermal modeling of an orthogonal machining process
A novel procedure is disclosed, that can be incorporated into Finite Element Analysis (FEA) or other similar analysis techniques, to obtain the steady state temperature distribution in a coupled transient heat transfer analysis rapidly as well as accurately. A scale factor is used to reduce the thermal inertia per unit volume (specific heat capacity) in regions of steady state temperature distribution, thereby hastening the achievement of steady state. An application of this procedure to estimate steady state temperature distributions within cutting tools, and the estimation of cutting tool wear based on the obtained steady state temperature distributions is shown as an example. |
| US09418178B2 |
Controlling a size of hierarchical visualizations through contextual search and partial rendering
Exemplary embodiments disclose controlling of the size and content of a hierarchical visualization by a software component executing on a computer that displays a multi-level hierarchical visualization of nodes including a collapsed sub-hierarchy. The exemplary embodiments include displaying a user interface that enables a user to invoke a contextual search that is contextual to the collapsed sub-hierarchy; responsive to the user invoking the contextual search, receiving search criteria entered by the user; displaying any nodes from the collapsed sub-hierarchy matching the search criteria; receiving a user selection of which ones of the matching nodes from the collapsed sub-hierarchy to show; and displaying a partial rendering of the collapsed sub-hierarchy that shows the selected matching nodes while keeping remaining non-matching nodes hidden. |
| US09418176B2 |
Graph-based system and method of information storage and retrieval
Structure of a resultant Every Document as a Graph (EVG) graph may be outlined using an EVG query. First metadata for a first data source may be retrieved. At least one entity key may be determined for a first entity, the entity key coming directly from the EVG query or from an entity on a preceding level of the EVG graph. Based on the first metadata and entity key, an edge may be created in the EVG graph beginning at the first entity, wherein the edge contains information retrieved from the first data source. Second metadata for a second data source may be retrieved. Based on the second metadata and information contained in the edge retrieved from first data source, a second entity may be created in the EVG graph, wherein the edge connects to the second entity, wherein the second entity contains information retrieved from the second data source. |
| US09418175B2 |
Enumeration of a concurrent data structure
An enumerable concurrent data structure referred to as a concurrent bag is provided. The concurrent bag is accessible by concurrent threads and includes a set of local lists configured as a linked list and a dictionary. The dictionary includes an entry for each local list that identifies the thread that created the local list and the location of the local list. Each local list includes a set of data elements configured as a linked list. A global lock on the concurrent bag and local locks on each local list allow operations that involve enumeration to be performed on the concurrent bag. |
| US09418173B2 |
Detection of cross-platform differences of web applications
A method for detecting a cross-platform difference of a web application may include generating a first relative layout model based on a first relationship between multiple elements of a screen of a web application when the web application is executed on a first platform. The method may further include generating a second relative layout model based on a second relationship between the multiple elements of the screen of the web application when the web application is executed on a second platform. The method may also include determining a difference between the first relationship and the second relationship based on a comparison of the first relative layout model with respect to the second relative layout model. |
| US09418169B2 |
Extracting document data from multiple sources for display on a mobile communication device using HTTP request headers having XML strings therein
A method operable on a mobile communication device, comprising opening a browser session and issuing an HTTP request for document data, wherein the request includes an XML descriptor added to headers of the HTTP request for identifying the request and the document data being requested, and receiving an HTTP response including the XML descriptor along with document binary data representing respective chunks of the document data for display on the mobile communication device. |
| US09418168B2 |
Providing cloud-based, generic OData mashup services using an on-demand service
The present disclosure describes methods, systems, and computer program products for providing cloud-based, generic OData mashup services. One computer-implemented method includes parsing a received a request for service-related data to determine a subject mashup service associated with the request, retrieving a subject mashup service definition from a service repository, retrieving subservice definitions associated with the subject mashup service definition, instantiating subservices with a computer using the subservice definitions, and transmitting a request to retrieve the service-related data from the instantiated subservices. |
| US09418164B2 |
Shared geo-located objects
A method of reviewing geo-coded information at a geographic information system is disclosed. The method may include receiving information identifying a geo-located object from a submitter of the object, receiving information identifying the location of the geo-located object from the submitter, and receiving a request from a user of the geographic information system for one or more geo-located objects that includes the submitted geo-located object, and transmitting information for permitting display of the geo-located object to the user of the geographic information system. |
| US09418153B2 |
Video search and playback interface for vehicle monitor
A method and apparatus are provided, wherein the apparatus includes a plurality of video recordings in a database containing images of vehicles traveling within a predetermined geographic area and a list of license plates attached to each of those vehicles, a display that depicts a map of the geographic area, an input that receives an identifier of a license plate of a vehicle and a time period, and a processor that searches the plurality of video recordings for the license plate, returns a list of cameras capturing images of the identified license plate, sorts the returned list by time of capture, and displays a motion path of the vehicle on the map for the time period based upon the returned list. The method and apparatus may also include a uniform interface where the end-user can click the camera mark on the vehicle motion path to playback historic video recorded by this camera individually or click the whole motion path to playback a merged video which combines all recorded video from returned cameras into one display using only one window for the display of the merged video. |
| US09418152B2 |
System and method for flexible speech to text search mechanism
A system and method for receiving an initial search entry to search text data. The text data may be, for example, an N word lattice, transcribed by a text to speech engine. The difference between the initial search entry and one or more entries in the dictionary may be measured. One or more similar entries may be selected from the dictionary that have the smallest measures of difference to the initial search entry. The text data may be searched for the one or more selected similar entries. Each of the searched similar entries found in the text data may be displayed as a search result. |
| US09418150B2 |
System and process for concept tagging and content retrieval
A system and process for tagging electronic documents or other electronic content with concepts mentioned, contained, or otherwise described in that content. Once tagged, the content may be searchable, indexable, and retrievable in order to provide that content to an end user or another recipient. The system may be configured to handle a considerable number of asset files and a large number of users, workflows, and access applications simultaneously. The system may auto-tag the content and also may include a user interface for confirming and updating those tags and for manually creating new or additional tags. Content may include documents such as medical documents relating to procedures, diagnoses, medications or other domains. Alternatively, the content may include information about various care providers, in order to allow a user to locate a physician meeting one or more desired criteria. |
| US09418149B2 |
Auto summarization of content
A method of summarizing data files includes implementing, at a server, a storage event for a data file, analyzing the data file and creating a summary of the data file, and storing the summary linked to the data file. |
| US09418146B2 |
Optimizing a clustered virtual computing environment
Exemplary embodiments of the present invention disclose a method, computer program product, and system for optimizing a clustered virtual computing environment. In exemplary embodiments, performance attributes are identified for a set of operating devices within the clustered virtual computing environment. Historical data of the identified performance attributes is obtained to create a historical data repository. A rulebase is developed using the historical data repository and input from user. A combined correlation pattern repository is generated using a first correlation pattern, a second correlation pattern and a scale-time invariant weight fraction. |
| US09418144B2 |
Similar document detection and electronic discovery
Systems and methods are disclosed for performing duplicate document analyses to identify texturally identical or similar documents, which may be electronic documents stored within an electronic discovery platform. A process is described which includes representing each of the documents, including a target document, as a relatively large n-tuple vector and also as a relatively small m-tuple vector, performing a series of calculations on the set of m-tuple vectors to identify a set of documents which are candidate near-duplicates to the target document, and then filtering the candidate set of near-duplicate documents based upon the distance of their n-tuple vectors from the n-tuple vector of the target document. |
| US09418136B1 |
Method and system for matching descriptive text for a multimedia content in a vendor's catalog with descriptive text for a multimedia content in media store's catalog
A media store server offers access to multimedia contents available from servers of one or more vendors. The media store server provides customers' digital information devices with catalog of content offered through the media store server. To provide a unified catalog for the store, the media store server retrieves a first descriptive text for a multimedia content in a catalog of vendor's server. The first descriptive text is converted into a second descriptive text representing the multimedia content, which is in a standardized format required for the media store server catalog. The second descriptive text for the multimedia content is compared with the descriptive texts of multimedia contents in the media store server catalog. The first descriptive text for the vendor's multimedia content is stored in the catalog of the media store server, if the second descriptive text for the multimedia content matches with any of the descriptive texts of multimedia contents in the catalog of the media store server. The stored first descriptive text provides a link to or association for access to the actual file on the vendor's server, i.e. so when users searches, the text comes up from the store server and selection enables user to access/download multimedia content from the vendor's server. |
| US09418126B2 |
Out of home media measurement
A system may include at least one data source configured to provide network usage data indicative of the existence of communications with subscriber devices, and web and application usage data indicative of data usage of the subscriber network by the subscriber devices. The system may also include a data warehouse server configured to perform operations including correlating the network usage data and web and application usage data into subscriber-level data; associating, with the subscriber-level data, subscriber attributes indicative of a preference of the subscriber for content in a particular category of content, and profile attributes indicative of demographic characteristics of the subscriber; matching the subscriber-level data with a set of subscriber profiles, each of the set of subscriber profiles including a set of subscriber attributes and profile attributes associated with the respective subscriber profile; and aggregating the subscriber-level data into aggregate-level data according to the matching subscriber profiles. |
| US09418124B2 |
System and method of integrating time-aware data from multiple sources
A time-aware union operator is disclosed for consistent integration of time-aware data, wherein the time-aware union produces a time-aware consistent integrated view of underlying sources according to specified key constraints and policies. The implementation of time-aware union is idempotent, commutative, and associative, thus making it suitable for data integration, and it produces the same integrated outcome, modulo representation of time, regardless of the order in which sources are integrated. |
| US09418123B2 |
Method and system for recommending target object information
Embodiments of the present application relate to a method for recommending target object information, a system for recommending target object information, a client for recommending target object information, a server for recommending target object information, and a computer program product for recommending target object information. A method for recommending target object information is provided. The method includes receiving a target object informational recommendation request including information pertaining to a plurality of short-listed objects selected, determining historical selection information on the plurality of short-listed objects, the historical selection information including a historical count, a selection count, or both, and sending the part or all of the short-listed object historical selection information to a client. |
| US09418121B2 |
Search results for descriptive search queries
Methods, systems, and apparatus, including computer programs encoded on computer storage media, for identifying resources responsive to a search query. One of the methods includes maintaining an index for a collection of resources, where each resource is associated with zero or more respective entity tags, and each entity tag includes a respective entity name, receiving a search query from a user device, identifying resources that satisfy the search query, determining that the search query satisfies one or more descriptive query criteria, processing each entity tag that is associated with a respective identified resource, generating a results page that includes user interface elements, each selectable by a user operating the user device to initiate an entity-specific search, and sending the results page to the user device. |
| US09418116B2 |
Capturing evolution of a resource memorandum according to resource requests
The present disclosure teaches capturing a resource memorandum as triggers happen in a workflow. A workflow manager detects the triggers and instructs a chronicle processor to update the resource memorandum. The workflow manager instructs a version generator to capture the updated resource memorandum by storing a resource request identifier, a version identifier, a likeness of the resource memorandum, and/or data from the resource memorandum. The workflow manager also forwards a new version of the resource memorandum to institute agents for further review and/or processing according to the workflow. |
| US09418108B2 |
Hybrid query execution plan
A procedural pattern in a received query execution plan can be matched to a stored pattern for which an equivalent declarative operator has been pre-defined. The query execution plan can describe a query for accessing data. A hybrid execution plan can be generated by replacing the procedural pattern with the equivalent declarative operator. A hybrid execution plan processing cost can be assigned to execution of the hybrid execution plan and a query execution plan processing cost can be assigned to execution of the query execution plan. The assigning can include evaluating a cost model for the hybrid execution plan and the query execution plan. The query can be executed using the hybrid execution plan if the hybrid execution plan processing cost is less than the query execution plan processing cost or the query execution plan if the hybrid execution plan processing cost is greater than the query execution plan processing cost. Related systems, methods, and articles of manufacture are disclosed. |
| US09418104B1 |
Refining search results
A computer-implemented method for processing query information includes receiving data representative of a search query from a user search session. The method also includes identifying a plurality of search results based upon the search query. Each search result is associated with a plurality of user characteristics and data that represents requestor behavior relative to previously submitted queries associated with the respective search result. The method also includes ordering the plurality of user characteristics based upon the data that represents requestor behavior relative to previously submitted queries and the respective search result. The method also includes adjusting the ordered plurality of user characteristics based upon at least one predefined compatibility associated with the user characteristics. The method also includes ranking the search results based upon the adjusted plurality of user characteristics. |
| US09418097B1 |
Listener event consistency points
Implementations are provided herein for sending event notifications based on modifications to files and/or directories. When a file is read, modified or changed under the conditions for a registered event notification, a consistency point can be established. An impact list can then be determined based on the target. It can then be determined whether the version of event caches associated with the files and folders identified in the impact list match a global event cache version determined at the time of the consistency point. If the event caches are an old version, the system call can be restarted, and the event caches can be rebuilt to the current version. If the event caches of the impact list are current, the file system operation can be performed, and notifications can be sent based on the set of listeners identified within the current set of event caches. |
| US09418096B2 |
Control method, and information processing system
A control method is used in an information processing system which has a plurality of computers. The control method includes receiving, by a first computer of the plurality of computers, an update request of data from a first client device, receiving, by a second computer of the plurality of computers, a read request of the data from a second client device. The control method also includes selecting, by the second computer, a computer as an query destination from the plurality of computers excluding the first computer and a third computer that is a terminal to receive the update request sent from the first computer, when the data is undergoing updating due to the update request; transmitting a verify request to inquire whether the data is undergoing updating, to the query destination; and transmitting the data to the second client device based on a reply from the query destination. |