最新美国发明专利第2015-12-29期 - 专利汇|PatentHub专利检索|专利查询网|发明专利查询分析

Document	Document Title
US09225404B2	Hybrid beamforming for data transmission Technology to provide hybrid beamforming feedback is disclosed. In an example, a user equipment (UE) can include computer circuitry configured to: Receive a reference signal (RS) from a node; calculate an optimal channel direction from the RS; calculate an optimal signal-to-interference-plus-noise ratio (SINR) for the optimal channel direction, where the optimal SINR is conditionally calculated with an intra-cell interference component or calculated without the intra-cell interference component based on a feedback configuration; and transmit the optimal channel direction and the optimal SINR to the node.
US09225402B2	Random access heterogeneous MIMO network A number of techniques, which may be used together, provide distributed coordination of multiple stations so that concurrent transmissions and increased throughput are achieved on a shared radio medium. Each of the techniques provides a separate innovation that can be used alone or in combination with one or more of the other techniques.
US09225401B2	Method and apparatus of beam training for MIMO operation and multiple antenna beamforming operation The disclosed invention provides an efficient method for MIMO beam training for multiple antennas to enable spatial multiplexing MIMO operation and spatial combining in a wireless network. The invention discloses a simple and efficient beam-training algorithm and protocol for MIMO operation that operates in high SNR condition for reliable MIMO operation. In one novel aspect, the best MIMO beam combinations are determined after TX sector sweeping and RX sector sweeping. The best MIMO beam combinations are determined in such a way that no any selected TX/RX sectors come from the same TX/RX antenna/beamformer. The selection criteria includes not only signal quality, but also considers mutual interference and leakage among multiple MIMO spatial streams to improve overall MIMO performance. Simultaneous RX or TX training are also supported to reduce training time.
US09225400B2	Method and apparatus for processing feedback in a wireless communication system A method and apparatus for processing feedback implemented in a wireless transmit/receive unit (WTRU) comprises estimating a channel matrix. The effective channel is calculated and a precoding matrix is selected. Feedback bits are generated and transmitted.
US09225398B2	Multi-user MIMO-SDMA for finite rate feedback systems A multi-user MIMO downlink beamforming system with limited feedback (200) is provided to enable precoding for multi-stream transmission, where a channel codeword (ui) and one or more channel quality indicator values (CQIA, CQIB) are computed at the user equipment (201.i) on the basis of maximizing a predetermined SINR performance metric (pi) which estimates the receive signal-to-noise-ratio (SINR) at the user equipment (201.i). The computed codeword (ui) and CQI values (or differential values related thereto) are quantized and fed back to help the base station (210) which applies a correction to the appropriate CQI value in the course of designing the transmit beamforming vectors w and determining the appropriate modulation and coding level to be used for downlink data transmission.
US09225392B2	Flat power coil for wireless charging applications A coil assembly is disclosed. The coil assembly includes a coil that is provided on a substrate. The coil includes a trace element that is wound on the substrate. The trace element includes an interior gap that extends or is present along at least a portion of the trace element. The interior gap is dimensioned to reduce a presence of eddy currents that would otherwise be generated when the coil is active to inductively transmit or receive signals.
US09225391B2	Wireless power transmitting apparatus and method thereof Disclosed are a wireless power transmitting apparatus and a method thereof. The wireless power transmitting apparatus wirelessly transmits power to a wireless power receiving apparatus. The wireless power transmitting apparatus detects a wireless power transmission state between the wireless power transmitting apparatus and the wireless power receiving apparatus, and generates a control signal to control transmit power based on the detected wireless power transmission state. The wireless power transmitting apparatus generates the transmit power by using first DC power based on the control signal, and transmits the transmit power to a transmission resonance coil through a transmission induction coil unit based on an electromagnetic induction scheme.
US09225388B2	Transmitting magnetic field through metal chassis using fractal surfaces Described herein are techniques related one or more systems, apparatuses, methods, etc. for reducing induced currents in a apparatus chassis. For example, a fractal slot is constructed in the apparatus chassis to reduce the induced currents, and enhance passage of magnetic fields through the apparatus chassis. In this example, the fractal slot may include a no-self loop fractal space filling curve shape to provide high impedance to the induced currents.
US09225386B2	Method for placement of fingers with G-Rake advanced receiver An electronic device includes a Rake receiver for receiving wireless signals, wherein the Rake receiver includes a predetermined number of fingers and a combiner. The Rake receiver also includes a channel detection circuit configured to identify at least one channel tap in a received signal, and a placement circuit configured to place a finger of the predetermined number of fingers at a location corresponding to the at least one identified channel tap. If all of the predetermined number of fingers are not associated with a corresponding channel tap, unplaced fingers of the predetermined number of fingers are placed at locations based on a signal-to-interference ratio estimate at an output of the combiner.
US09225383B2	System and method for implementation of a direct sequence spread spectrum transmitter A direct sequence spread spectrum data transmitter for creating a modulated data signal comprising: a programmable-system-on-a-chip baseband modulator having only four blocks of programming logic, the four blocks of programming logic consisting of a DigBuf clock buffer block, a pseudo-random-sequence 8-bit block, an 8-bit timer block, and a serial peripheral interface slave block. A remote telemetry unit comprising the foregoing transmitter. A method for manufacturing the foregoing transmitter. A method for controlling the foregoing transmitter.
US09225381B2	Tunable quality factor The present disclosure relates to a wireless communication system configured to transforming the radiating mechanism of the antenna system in such a way to support different operating modes depending on the needs. In some examples, the wireless communication system comprises an antenna structure connected to a signal process unit. The antenna structure comprises a radiating mechanism configured to transmit or receive electromagnetic radiation. A switchable operating mode element is configured to receive a signal and to dynamically vary a quality factor of the radiating element by selectively routing the signal along one of a plurality of signal paths, which respectively provide different antenna parameters to the radiating mechanism, based upon a current operating mode of the wireless communication system. By dynamically varying a quality factor of the radiating element, the wireless communication system can effectively support different operating modes.
US09225379B2	Apparatus and method for embedding components in small-form-factor, system-on-packages According to various aspects of the present disclosure, devices and methods are disclosed that include communication platform including a small form factor platform having a system-on-package architecture. The system-on-package architecture may be arranged as a stack of layers including: a first layer of the stack of layers having a first conformable material; a second layer of the stack of layers having a second conformable material; a third layer of the stack of layers having a third material, wherein the first conformable material and the second conformable material are more flexible than the third material; and one or more electronic components embedded within the stack of layers, wherein the one or more electronic components are configured to process a received wireless signal.
US09225378B2	Switch circuit and method of switching radio frequency signals An RF switch circuit and method for switching RF signals that may be fabricated using common integrated circuit materials such as silicon, particularly using insulating substrate technologies. The RF switch includes switching and shunting transistor groupings to alternatively couple RF input signals to a common RF node, each controlled by a switching control voltage (SW) or its inverse (SW_), which are approximately symmetrical about ground. The transistor groupings each comprise one or more insulating gate FET transistors connected together in a “stacked” series channel configuration, which increases the breakdown voltage across the series connected transistors and improves RF switch compression. A fully integrated RF switch is described including control logic and a negative voltage generator with the RF switch elements. In one embodiment, the fully integrated RF switch includes an oscillator, a charge pump, CMOS logic circuitry, level-shifting and voltage divider circuits, and an RF buffer circuit.
US09225375B2	Ophthalmic lens system capable of wireless communication with multiple external devices The present invention relates to methods, apparatus, and devices associated with an ophthalmic lens system wherein the lenses may communicate with multiple external devices. More particularly, the present invention relates to an ophthalmic lens system that may communicate with a secondary and a tertiary device, wherein the wireless communication with the secondary and the tertiary electronic external devices may reduce power, communication, and processing requirements within the ophthalmic lenses and may broaden the range of possible functionalities of the ophthalmic lens system.
US09225374B2	Mobile device having SIM card, base station connected thereto, and battery management method thereof A mobile device is provided. The mobile device includes a battery, a Subscriber Identification Module (SIM) card, and a control unit. The mobile device transmits residual power information of the battery to a base station, and receives a SIM card polling cycle determined on the basis of the residual power information from the base station. Thereafter, the mobile device periodically determines the state of the SIM card in the received SIM card polling cycle.
US09225371B2	Offset compensation for serial links A method for compensating an offset in a receiver is provided. The method includes receiving first data from a first sampler and receiving second data from a second sampler. The method also include determining a first average value from the boundary of the first data over a selected period of time; and sending an offset signal to the first sampler based on the first average value. The method may also include determining a second average value from the boundary of the second data over a selected period of time; and sending an offset signal to the second sampler based on the second average value of the boundary data.
US09225370B2	Method and system for a combined signal detection for physical layer communication devices Communication devices coupled via a communication link may comprise physical layer devices that may be operable to determine presence of a received signal and to mitigate noise in the signal prior to processing and/or validating the signal. Analog and/or digital signal processing may be utilized to process the signal and/or mitigate noise in the signal. Noise mitigation may comprise near-end crosstalk cancelling and/or echo cancelling and/or may utilize local transmit signal information. Subsequent to noise mitigation, samples of the noise reduced signal may be accumulated and/or an average signal strength and/or average signal power level may be determined. The average signal strength and/or average signal power level may be compared to one or more thresholds which may be configurable and/or programmable.
US09225364B1	Distortion compensation method, distortion compensation apparatus, and non-transitory computer readable storage medium In a distortion compensation apparatus, a monitor unit monitors a power value of a transmission baseband signal. An update control unit does not allow an updating unit to execute update processing when the power value monitored by the monitor unit is lower than a first threshold, and causes the updating unit to execute the update processing when higher than the first threshold. That is, the update control unit controls execution/non-execution of the update processing by the updating unit based on the monitored power value.
US09225362B2	Power supply A power supply for a radio frequency (RF) power amplifier that amplifies an RF input signal into an RF output signal and a method of operation in the power supply. The power supply comprises a first power converter to convert an input voltage to the power supply into a first supply voltage of the RF power amplifier. The power supply comprises a second power converter to receive the input voltage and the first supply voltage and to selectively convert either the input voltage or the first supply voltage into at least a portion of a second supply voltage of the RF power amplifier.
US09225360B2	Iterative data storage read channel architecture In one embodiment, a computer program product for iterative read channel operation has program instructions embodied therewith that are executable by a controller to cause the controller to: in an iterative process until a maximum number of iterations has been reached or a valid codeword is produced: execute one or more digital front-end (DFE) functions on a plurality of signal samples employing the set of decisions provided by a decoder; execute a detection algorithm on the signal samples using a detector employing the set of decisions provided by the decoder to regenerate the set of decisions provided by a detector; execute a decoding algorithm of an error correcting code (ECC) using the set of decisions provided by the detector to regenerate the set of decisions provided by the decoder; and output decoding information relating to the signal samples when the decoding algorithm produces a valid codeword.
US09225359B2	Configurable and low power encoder for cyclic error correction codes A method for encoding includes receiving input data symbols to be encoded with an Error Correction Code (ECC) so as to produce a code word of the ECC including redundancy symbols. The input data symbols are applied first and second processing stages, such that the first processing stage performs a first polynomial division by a fixed-coefficient polynomial with a first degree of parallelism, and the second processing stage performs a second polynomial division by a configurable-coefficient polynomial with a second degree of parallelism that is smaller than the first degree of parallelism, so as to jointly produce the redundancy symbols.
US09225356B2	Programming a non-volatile memory (NVM) system having error correction code (ECC) A method of programming a non-volatile semiconductor memory device includes determining a number of bit cells that failed to program verify during a program operation. The bit cells are included in a subset of bit cells in an array of bit cells. The method further determines whether an Error Correction Code (ECC) correction has been previously performed for the subset of bit cells. The program operation is considered successful if the number of bit cells that failed to program verify after a predetermined number of program pulses is below a threshold number and the ECC correction has not been performed for the subset of bit cells.
US09225354B2	Coding method, decoding method, coder, and decoder A coding method, a decoding method, a coder, and a decoder are disclosed herein. A coding method includes: obtaining the pulse distribution, on a track, of the pulses to be encoded on the track; determining a distribution identifier for identifying the pulse distribution according to the pulse distribution; and generating a coding index that includes the distribution identifier. A decoding method includes: receiving a coding index; obtaining a distribution identifier from the coding index, wherein the distribution identifier is configured to identify the pulse distribution, on a track, of the pulses to be encoded on the track; determining the pulse distribution, on a track, of all the pulses to be encoded on the track according to the distribution identifier; and reconstructing the pulse order on the track according to the pulse distribution.
US09225352B2	Signal transmission system, photoelectric conversion apparatus, and image pickup system A signal apparatus includes a plurality of pairs, each pair of which includes plural digital signal output units configured to output a digital signal, a block wiring to which output terminals of the plural digital signal output units are connected, and a buffer circuit an input terminal of which is connected to the block wiring, in which the output terminal of the buffer circuit included in one of the pairs is connected to the block wiring included in another one of the pairs.
US09225346B2	Filtering circuit, phase identity determination circuit and delay locked loop A filtering circuit includes a clock selection unit configured to transfer a first clock or a second clock having a frequency lower than the first clock as an operating clock in response to a frequence signal, and a filter configured to filter an input signal and generate a filtered signal in synchronization with the operating clock.
US09225342B2	Oscillation device An oscillation device corrects a setting value of an output frequency based on a detection result of an ambient temperature of a crystal unit. The oscillation device includes: an oscillation circuit; a temperature detection portion that detects the ambient temperature and outputs a digital value corresponding to the temperature detection value; an accumulator that accumulates the digital value; a rounding processing portion that performs rounding for the digital value accumulated in the accumulator; a digital filter that receives the digital value obtained from the rounding processing portion and obtains a step response gradually increasing from “0” and converging to a step value; and a correction value obtaining portion that obtains a frequency correction value of the oscillation frequency of the oscillation circuit caused by a difference between the ambient temperature and a reference temperature, wherein the setting value of the output frequency is corrected based on the frequency correction value.
US09225339B2	Electronic device including predicted frequency error estimation of a voltage controlled oscillator and related methods An electronic device may include a voltage controlled oscillator (VCO) and a temperature sensor. The electronic device may also include a controller configured to cooperate with the VCO and the temperature sensor to determine both a temperature and a frequency error of the VCO for each of a plurality of most recent samples. Each of the most recent samples may have a given age associated therewith. The controller may also be configured to align the temperature, the frequency error, and the given age for each of most recent samples in a three-dimensional (3D) coordinate system having respective temperature, frequency error and age axes. The controller may also be configured to estimate a predicted frequency error of the VCO based upon the aligned temperature, frequency error, and given age of the most recent samples.
US09225337B2	Temperature threshold circuit with hysteresis A circuit for determining a threshold indication of temperature with respect to a threshold temperature. The circuit includes a timer circuit and a temperature sensor circuit having an counter whose output has a relationship to temperature. At the end of a period determined by the timer circuit, a comparator circuit compares the count of the counter with an indication of the threshold temperature to determine a state of the threshold indication. In response to a change in state of the threshold indication, the circuit changes one of the count time or the counter output's relationship to temperature to provide a hysteresis for the threshold indication.
US09225336B2	Programmable logic device and semiconductor device To provide a PLD having a reduced circuit area and an increased operation speed. In the circuit structure, a gate of a transistor provided between an input terminal and an output terminal of a programmable switch element is in an electrically floating state in a period when a signal is input to the programmable switch element. The structure enables the voltage of a gate to be increased by a boosting effect in response to a signal supplied from programmable logic elements, suppressing a reduction in amplitude voltage. This can reduce a circuit area by a region occupied by a booster circuit such as a pull-up circuit and increase operation speed.
US09225328B2	Nonvolatile memory device with time-multiplexed, on-die-terminated signaling interface In a non-volatile memory device having an array of non-volatile storage elements, command, address and data signals are received at respective times via a time-multiplexed external signaling line, the data signals representing data to be stored within the array of non-volatile storage elements. A control signal is received via a signaling path external to the non-volatile memory device, and an on-die termination element is switchably coupled to the time-multiplexed signaling line at least in part in response to a transition of the control signal from a first logic state to a second logic state.
US09225323B1	Signal crossing detection Various aspects of the present disclosure are directed to detecting crossings such as zero crossings that can pose problems to circuit operation. In accordance with an example embodiment, two or more circuits are implemented for detecting signal crossings of an electrical signal during respective time cycles, such that at least one of the circuits is operating to detect such a crossing at all times. Each circuit undergoes a reset condition, which is controlled to ensure that at least one circuit remains operating for detecting zero crossing.
US09225316B2	Duty cycle correction circuit and operation method thereof A duty cycle correction circuit includes a clock adjustment unit configured to adjust a duty ratio of an input clock signal in response to a duty control signal and generate an output clock signal, a tracking type setting unit configured to generate an tracking type selection signal for setting a first or second tracking type based on a duty locking state of the output clock signal, and a control signal generation unit configured to generate the duty control signal, into which the first or second tracking type is incorporated, in response to the tracking type selection signal and the output clock signal.
US09225313B2	Bulk acoustic wave resonator having doped piezoelectric layer with improved piezoelectric characteristics A bulk acoustic wave (BAW) resonator structure includes a first electrode disposed over a substrate, a piezoelectric layer disposed over the first electrode and a second electrode disposed over the first piezoelectric layer. The piezoelectric layer is formed of a piezoelectric material doped with one of erbium or yttrium at an atomic percentage of greater than three for improving piezoelectric properties of the piezoelectric layer.
US09225311B2	Method of manufacturing switchable filters Switchable and/or tunable filters, methods of manufacture and design structures are provided. The method of forming the filters includes forming at least one piezoelectric filter structure comprising a plurality of electrodes formed to be in contact with at least one piezoelectric substrate. The method further includes forming a micro-electro-mechanical structure (MEMS) comprising a MEMS beam in which, upon actuation, the MEMS beam will turn on the at least one piezoelectric filter structure by interleaving electrodes in contact with the piezoelectric substrate or sandwiching the at least one piezoelectric substrate between the electrodes.
US09225302B2	Controlled power boost for envelope tracker An envelope-tracking (ET) power supply may include a boost control pin. The boost control pin receives a boost enable signal that activates or enables a supplemental power supply in the ET power supply. The supplemental power supply facilitates the generation of a power supply signal for a selected processing stage, e.g., a power amplifier. The supplemental power supply helps the processing stage meet the demands on it caused by the signal that the processing stage needs to handle.
US09225300B2	Configurable power amplifier and related construction method A multiple-path, configurable, radio-frequency (RF) circuit is provided, including: a first amplifier path amplify a first RF signal to generate a first amplified signal; a second amplifier path configured to amplify a second RF signal to generate a second amplified signal; a corrective input matching circuit, configured to change first input-impedance-matching properties of the first amplifier path, and to change second input-impedance-matching properties of the second amplifier path; a first isolation element configured to selectively ground an input node of the second amplifier path; a second isolation element configured to selectively ground an output node of the second amplifier path; and a third isolation element connected between the first and second amplifier paths, configured to selectively isolate the corrective input matching circuit from first and second input nodes of the first and second amplifier paths, respectively, or connect the corrective input matching circuit to the first and second input nodes.
US09225299B2	Variable-class amplifier, system, and method A method and generator for modifying interactions between a load and the generator are described. The method includes applying output power to the load using a power amplifier, controlling a level of the output power responsive to a power control setting, and adjusting a conduction angle of the power amplifier to reduce a level of sensitivity of the power amplifier to variations of an impedance of the load. The generator includes a compensation subsystem coupled to the power amplifier that controls a conduction angle of the power amplifier to enable a sensitivity of the power amplifier to be adjusted.
US09225295B2	Distortion compensation apparatus and distortion compensation method A distortion compensation apparatus including: a processor configured to generate a pre-distortion signal by compensating an input signal for a distortion based on a distortion compensation coefficient and a plurality of delayed signals obtained by delaying the input signal by a plurality of amounts of delay, and an amplifier configured to generate an amplified signal by amplifying the pre-distortion signal, wherein the processor calculates the distortion compensation coefficient based on the input signal, the pre-distortion signal, and the amplified signal, and calculates the plurality of amounts of delay based on the amplified signal.
US09225294B2	Amplifier with improved noise reduction An amplifier with improved noise reduction is disclosed. In an exemplary embodiment, an apparatus includes at least one capacitor configured to receive an adjustable current and generate a corresponding ramp voltage configured to control coupling between a main amplifier output and a secondary amplifier output. The apparatus also includes at least one comparator configured to adjust the adjustable current to generate the ramp voltage with selected ramp-up or ramp-down voltage characteristics.
US09225293B2	Pop and click noise reduction Disclosed are advances in the arts with novel and useful electronic circuitry with pop and click noise reduction. A load circuit is connected with a full or single-ended half-H bridge circuit and another circuit mechanism in a configuration by which a signal may be used to selectably bring the load circuit terminals to a selected voltage level when an externally applied signal is not present.
US09225291B2	Adaptive adjustment of power splitter A device includes a power splitter configured to couple to an amplifier having a first path and a second path. The device includes a controller coupled to first and second variable attenuators and first and second adjustable phase shifters. The controller is configured to monitor a phase shift and an output power of each of the first path and second path of the amplifier, and adjust at least one of the first and second variable attenuators and the first and second adjustable phase shifters based upon the phase shift and the output power of each of the first path and second path of the amplifier to modify an input signal to the first path or the second path of the amplifier.
US09225290B2	Radio frequency signal amplifying system A radio frequency signal amplifying system includes an amplifier having an input terminal and an output terminal, an attenuator electrically connected to the input terminal of the amplifier, a peak power detecting module configured to apply a peak power attenuation signal to the attenuator by taking a peak power level of an input signal into consideration, and an average power detecting module configured to apply an average power attenuation signal to the attenuator by taking an average power level of an output signal from the output terminal into consideration. The attenuator is configured to generate the attenuated signal to the input terminal of the amplifier by taking the peak power attenuation signal, the average power attenuation signal, or the combination thereof into consideration.
US09225287B2	Oscillator, rectifier, and transceiver device An oscillator has an oscillation portion that generates oscillatory electric signals due to a magnetization motion; and a first electric circuit that is connected in parallel to the oscillation portion. A current whose magnitude oscillates flows to the first electric circuit, and the first electric circuit is arranged such that a magnetic field generated by the current is applied to the oscillation portion.
US09225282B2	Methods and apparatuses for controlling output voltages of inverters driving electric motors A method of controlling an output voltage of an inverter driving an electric motor may include calculating a current total harmonic distortion (THD) of a current output to the electric motor; comparing the current THD with a reference current THD; determining a pulse width modulation (PWM) method to be changed from a first modulation method that reduces harmonic components of the current output to the electric motor to a second modulation method when the current THD is less than the reference current THD, the PWM method modulating a pulse width of a control pulse signal for controlling the output voltage of the inverter; and/or generating the control pulse signal based on the determined PWM method.
US09225275B2	Power tool with light unit A power tool including a motor, light unit, and switch unit for selectively connecting the motor and light unit to a power source. A control module includes a controller coupled to a first electronic switch to control power delivery to the motor based on a position of the switch unit, and to a second electronic switch to control power delivery to the light source based on a position of the switch unit. A timer is configured to keep the light unit illuminated for a predetermined amount of time after the switch unit has been activated or deactivated. The control module also includes a boot circuit with a semiconductor switch that continues to deliver power to the controller and to the light unit when the switch unit is deactivated subsequent to being activated, to enable the light unit to remain illuminated after the switch unit has been deactivated.
US09225274B2	Method and apparatus for estimating angles in a synchronous machine The invention relates to an apparatus for estimating angles in a synchronous machine (11), having an angle sensor device (15) which is designed to determine event-discrete measured values for a rotor angle (φ) of a rotor of the synchronous machine (11) and to output a measurement signal dependent on the determined measured values, an estimation device (16) which is designed to record current and/or voltage signals from the synchronous machine (11), to calculate a deviation (Δφ) of the rotor angle (φ) of the rotor of the synchronous machine (11) from an expected rotor angle on the basis of the recorded current and/or voltage signals and to output a deviation signal dependent on the calculated deviation (Δφ), and a combining device (17) which is designed to receive the measurement signal and the deviation signal and to calculate an estimated value ({circumflex over (φ)}) for the rotor angle (φ) of the rotor of the synchronous machine (11) from a combination of the measurement signal and the deviation signal.
US09225271B2	Semiconductor integrated circuit and motor driving apparatus A motor driving apparatus according to an embodiment includes a brushless motor. The motor driving apparatus includes a position sensor that outputs a position detection signal in synchronization with a phase of an induced voltage of a coil of the brushless motor. The motor driving apparatus includes a semiconductor integrated circuit that controls driving of the brushless motor by supplying a pseudo sine-wave driving voltage from an energization terminal to the coil of the brushless motor based on the position detection signal and a command signal that prescribes driving of the brushless motor.
US09225268B2	Electric vehicle drive system An electric vehicle drive system includes an electric-vehicle power conversion device, and an earth ground switch that is a triple-pole single-throw switch having a switching contact unit. The electric-vehicle power conversion device includes a smoothing circuit unit that includes a filter capacitor that receives and stores therein power supplied from an overhead wire, an inverter that converts a DC voltage of the smoothing circuit unit into an AC voltage to drive an electric motor, and a brake chopper circuit that consumes excess power, which cannot be returned toward the overhead wire. A brake resistance in the brake chopper circuit is connected to the switching contact unit. When the switching contact unit is closed, the brake resistance is electrically connected between the positive electrode and the negative electrode of the filter capacitor.
US09225267B2	Transducing apparatus A transducing apparatus that is sensitive to physical vibrations. The transducing apparatus converts physical manifestations into electrical signals.
US09225265B2	Vibration generation device There is provided a vibration generation device, including: a housing including an inner space; a direction conversion member mounted in the housing to be disposed within the inner space; a piezoelectric actuator including a piezoelectric element fixed to the direction conversion member and horizontally deformed; and a vibrator fixed to the direction conversion member and disposed within the inner space and vertically displaced due to horizontal deformation of the piezoelectric actuator.
US09225260B2	High-efficiency, low-power power supply circuit A power supply circuit includes a rectifier, a charging circuit, and a storage capacitor. An AC signal is rectified by the rectifier thereby generating a rectified signal VR between a VR node and a GND node. The capacitor is coupled between an output voltage VO node and the GND node. If VR is greater than a first predetermined voltage VP then the VO node is decoupled from the VR node. If VR is below VP then the charging circuit supplies a substantially constant charging current from the VR node, through the charging circuit, to the VO node, and to the capacitor, provided that VO on the capacitor is below a second predetermined voltage VO(MAX) and provided that VR is adequately high with respect to VO. Due to the charging current, the voltage VO on the storage capacitor is restored to the desired second predetermined voltage.
US09225257B2	Power supply circuit A power supply circuit (1) including: rectifying and smoothing circuit (31); transistor (switching element) (37) connected to an output terminal of the rectifying and smoothing circuit (31); transformer (TF1) including primary coil (L36) connected to the transistor (37) and secondary coil (L47) magnetically coupled with the primary coil (L36); current detector circuit (41) detecting current flowing through the transistor (37), and outputting voltage corresponding to the current; voltage output circuit (44) outputting, while the transistor (37) is in a turned-on state, voltage dependent on voltage induced by the secondary coil (L47); and on-off control circuit (57) turning off the transistor (37) when absolute value (Vbe) of a difference between the voltage from the current detector circuit (41) and the voltage from the voltage output circuit (44) is no smaller than threshold voltage (Von), and turning on the transistor (37) when the absolute value (Vbe) is smaller than the threshold voltage (Von).
US09225256B2	Apparatus and method for controlling DC-AC power conversion An apparatus and method for controlling the delivery of power from a DC source to an AC grid includes an inverter configured to deliver power from the unipolar input source to the AC grid and an inverter controller. The inverter includes an input converter, an active filter, and an output converter. The inverter controller includes an input converter controller, an active filter controller and an output converter controller. The input converter controller is configured to control a current delivered by the input converter to a galvanically isolated unipolar bus of the inverter. The output converter is configured to control the output converter to deliver power to the AC grid. Additionally, the active filter controller is configured to control the active filter to supply substantially all the power that is deliver by the output controller to the AC grid at a grid frequency.
US09225255B2	Power supply system, comprising a converter connected to a network and a transformer connected in parallel relative to the converter to limit the homopolar current, and a drive chain comprising such a power supply system A power supply system for supplying electrical power to a load is capable of delivering an output voltage to the load from an input voltage coming from an electric power network. The power supply system includes: at least two input terminals and at least two output terminals, the input terminals being adapted to be connected to the electric power network and the output terminals being adapted to be connected to the load, a converter capable of converting the input voltage into the output voltage, the converter being connected between the input terminals and the output terminals, and a device for limiting the homopolar current that is likely to flow between the electric power network and the load. The device for limiting the homopolar current comprises a transformer connected in parallel with respect to the converter, between the input terminals and the output terminals, the transformer having a first electromagnetic coil and a second electromagnetic coil.
US09225254B2	Supply circuit having at least one switching unit coupled between a bridge circuit and an associated load circuit A supply circuit includes: a bridge circuit, one or more resonant circuits coupled to the bridge circuit, each of the one or more resonant circuits being coupleable to a corresponding load circuit among one or more load circuits each of which includes one or more loads; one or more supply switching units, each of the one or more supply switching units being associated with a corresponding one of the one or more resonant circuits and being coupled between the bridge circuit and an associated one of the one or more load circuits for connecting and disconnecting the associated load circuit from the bridge circuit; and a control unit for controlling each of the one or more supply switching units in synchronization with a resonant current of the resonant circuit associated with the supply switching unit.
US09225253B2	High voltage switching linear amplifier and method therefor A switching linear amplifier has a DC-DC converter to increase a low input DC voltage to a first high voltage DC. A high voltage high frequency inverter is coupled to the DC-DC converter to generate high voltage pulses. A multistage voltage multiplier is coupled to the high voltage high frequency inverter to generate a second high voltage DC. A controlled charge and discharge circuit is coupled to the multistage voltage multiplier to drive a capacitive load.
US09225252B2	Reduction of supply current variations using compensation current control A power distribution system and method includes a controller that is configured to control a switching power converter. In at least one embodiment, the controller includes a compensation current control circuit to control a compensation current that reduces and, in at least one embodiment, approximately eliminates variations in current drawn by the controller during a particular operational time period. In at least one embodiment, the power distribution system is a lamp that includes the controller, a switching power converter, and one or more light sources, such as light emitting diodes.
US09225251B2	Duty cycle control method, power supply system and power converter using the same A power converter includes a power module, a feedback module, and a control module. The power module is used for converting an input voltage into an output voltage. The feedback module is electrically connected with the power module for generating a feedback voltage according to the output voltage. The control module is electrically connected with the feedback module and the power module for comparing a reference duty cycle value with a duty cycle, generating a variable reference voltage according to the comparison between the reference duty cycle value and the duty cycle, comparing the variable reference voltage with the feedback voltage, and adjusting the duty cycle according to the comparison between the variable reference voltage and the feedback voltage.
US09225248B2	Using a digital delay locked loop synchronous direct current to reduce the electromagnetic interference-wave control method of a DC buck converter and the switching signal A synchronous direct current (DC)-DC buck converter and a method of controlling the waveforms of switching signals disclosed herein. The synchronous DC-DC buck converter generates a stepped-down output voltage using a first switch configured to apply an input voltage to an inductor and a second switch configured to switch in response to a second switching signal. The synchronous DC-DC buck converter includes a sawtooth generation unit, a driver oscillating signal generation unit, a switching signal generation unit, and a phase tracking unit. The sawtooth generation unit generates a sawtooth wave. The driver oscillating signal generation unit generates an error voltage between the output voltage and a reference voltage, and compares the sawtooth wave with the error voltage, so as to generate a driver oscillating signal. The switching signal generation unit generates each of the first and second switching signals. The phase tracking unit generates the frequency setting signal.
US09225246B2	DC-DC buck circuit A DC-DC Buck circuit has a DC input terminal, a DC output terminal, a ground terminal, an inductor, a capacitor, a sampling resistor, a PWM control chip and a DrMOS chip. The output of the driver pin of the PWM control chip is unrelated to the voltage between the inductor and the sampling resistor. The DC-DC Buck circuit can produce a larger output voltage while also being compatible with a DrMOS chip.
US09225244B2	Circuit arrangement for reducing power loss in the case of an active electrical current output of a field device A circuit arrangement comprises a voltage regulator coupled to an external voltage supply and a control loop associated with the voltage regulator. The control loop includes an electrical current controller for setting the electrical current value, an analog-digital converter, a reference resistor and a computation/control unit coupled with the voltage regulator and the said analog-digital converter, and the control loop is so embodied that the voltage regulator, as a function of the presently set electrical current value, controls a voltage to an external load connected with the electrical current output. Particularly the computation/control unit is adapted to calculate a voltage to be delivered by the voltage regulator and to operate both, the electrical current controller and the voltage regulator for setting the electrical current value and to operate and for tuning the voltage delivered by the voltage regulator as a function of the presently set electrical current value, respectively.
US09225241B2	Pulse width modulation DC-DC converter for stabilizing output voltage A PWM DC-DC converter includes a switching unit converting an input voltage into an output voltage, a PID controller producing a PID control voltage, a comparator producing a switching control voltage, a switching controller which supplies a switching control signal to the switching unit, turns on a charge switch and at the same time turns off a discharge switch in an on-period of the switching control voltage, and turns off the charge switch and at the same time turns on the discharge switch in an off-period of the switching control voltage, and an operating point compensation unit which operates in response to an operating point compensation signal and supplies an initialization voltage of a uniform level to a node during a predetermined period for an initial drive.
US09225239B2	Multiple output charge pump with multiple flying capacitors A multiple output charge pump that includes a first flying capacitor, a second flying capacitor, a first output node, a second output node, and a switching network. The first output node is configured to provide a first voltage, and the second output node is distinct from the first output node and is configured to provide a second voltage, different than the first voltage. The switching network is configured to provide a first mode of operation in which the first and second flying capacitors are connected in one of in series with one another between an input voltage and ground or in parallel with one another between the input voltage and ground, a second mode of operation in which the first and second flying capacitors are connected in parallel with one another between ground and the second output node, and a third mode of operation.
US09225235B2	Power factor correction circuit There is provided a power factor correction circuit including: a power conversion circuit unit controlling an inductor current according to a switching signal applied to a main switch to convert an external input voltage into an output voltage having a predetermined range; an imbalance detection circuit outputting an imbalance state signal when the external input voltage is in an unbalanced state by using the inductor current; and a soft start circuit unit performing soft starting by adjusting the switching signal when the imbalance state signal is output by the imbalance detection circuit unit.
US09225232B2	Capacitor discharge circuit and power converter A capacitor discharge circuit and a power converter are provided. The capacitor discharge circuit includes a detection circuit and a discharge loop; the detection circuit has input ends electrically connected with input ends of an AC power supply, and an output end outputting a discharge detection signal to an input end of the discharge loop; the discharge loop is electrically connected with both ends of the capacitor that needs to be discharged and includes a switch unit and an energy consumption unit. When the AC power supply is disconnected, the discharge detection signal switches on the switch unit to conduct the discharge loop, such that the energy consumption unit discharges the capacitor that needs to be discharged. The power converter includes the capacitor discharge circuit.
US09225228B2	Method of manufacturing laminated stator core and laminated stator core manufactured by the method A method of manufacturing a laminated stator core and a laminated stator core manufactured by the method, the method capable of forming a recess 21 over one or both of (a) a lateral portion of an ear piece C of the stator core sheet A to be formed adjacent to the stator core sheet B and (b) a peripheral portion of the annular yoke piece D continuing to the lateral portion, the peripheral portion beside the ear piece C; fitting one ear piece E of the stator core sheet B with a gap in the recess 21; and thereby improving a material yield when the stator core sheets 13 are formed from the strip material 14.
US09225227B2	Electric machine An electric machine (1), in particular for a drive apparatus for a motor vehicle, comprising a rotor shaft (9), which is mounted rotatably in a housing (2), comprising a slip ring device (13), which has at least two slip rings (14, 15) arranged in rotationally fixed fashion on the rotor shaft (9) and at least two sliding contacts (16, 17), which are arranged in the housing (2) and interact with in each case one of the slip rings (14, 15), and comprising a rotation angle detection device, which has at least one rotation angle encoder (23) arranged on the rotor shaft (9) and at least one rotation angle sensor (26) arranged in the housing for detecting the rotation angle encoder (23).
US09225221B2	Stator housing assembly for a canned motor A stator housing assembly (3) for a pump (2) having a wet-running electric motor (8) includes a stator housing (4) and a can (6), wherein the stator housing (4) and the can (6) are designed as a single component (3). The stator housing assembly (3) also includes at least one engagement element (310) for positively connecting to a pump housing (14).
US09225218B2	Winding overhang support of an electrical machine The winding overhang of the rotor of an electrical machine is subject to strong centrifugal forces during operation, especially when the machines run at high speed. The winding overhang support prevents the production of relative movements between the winding overhang and the rotor base. These movements result in strong mechanical stresses on the winding bars. The winding overhang support includes an inner ring and an outer ring between which the winding bars are arranged in the region of the winding overhang, the outer ring being shrunk on the inner ring and both the outer ring and the inner ring being interspaced from the lamination stack.
US09225215B2	Rotating electric machine A rotating electric machine includes a hollow cylindrical stator core and a stator coil mounted on the stator core. The stator core has a plurality of slots that are arranged in a circumferential direction of the stator core. The stator coil is formed of a plurality of substantially U-shaped electric conductor segments to include at least one Δ-Y connection. The Δ-Y connection includes a Δ-connected first three-phase winding and a Y-connected second three-phase winding. The first three-phase winding includes three phase windings that are Δ-connected to define three terminals of the first three-phase winding therebetween. The second three-phase winding includes three phase windings that are respectively connected to the three terminals of the first three-phase winding. Further, the number of turns of the first three-phase winding and the number of turns of the second three-phase winding are respectively set to two different odd numbers.
US09225206B2	Windmill generator A windmill generator is provided configured to produce electric current to a receiving device when flux lines of a magnetic field are crossed by a coil. The windmill generator comprises a coil frame armature around which a coil is wrapped. Rare earth magnets are disposed in proximity to the coil. A set of wings may be coupled to the coil frame armature. When motion is induced to the coil from the pushing effect of moving air pushing the set of wings, an electric field and electric current due are produced due to flux lines of the magnetic field of the magnet being crossed by the moving coil. Alternatively, the set of wings may be coupled to the at least one magnet. When motion is induced to a magnet, an electric field/electric current is produced.
US09225199B2	Variable power energy harvesting system Systems for harvesting energy from a variable output energy harvesting apparatus are disclosed. The systems include an energy harvesting apparatus for providing energy input to a switched mode power supply and a control loop for dynamically adjusting energy harvesting apparatus input to the switched mode power supply, whereby system output power is substantially optimized to the practical. Exemplary embodiments include systems for harvesting energy using solar cells in boost, buck, and buck-boost configurations.
US09225196B2	Rectifying-and-modulating circuit and wireless power receiver incorporating the same A wireless power receiver includes a power receiving circuit wirelessly receiving power transmitted from a wireless power transmitter so as to generate an induced current, and a rectifying-and-modulating circuit including first to eighth switches and a control unit. The control unit is operable to control operation of each of the first to eighth switches between conduction and non-conduction. Accordingly, the first to fourth switches cooperatively constitute a full-bridge rectifier for rectifying the induced current generated by the power receiving circuit, and each of the fifth to eighth switches is operable to switch synchronously with a respective one of the first to fourth switches or to became non-conducting, thereby changing an amplitude of the induced current.
US09225185B2	Method and apparatus for controlling charging in electronic device A method for controlling charging in an electronic device for managing the electronic device, to stably charge a battery is provided. The method includes setting alarm such that a wake up signal is generated after a time elapses when entry into a suspend mode is requested during charging a battery or in a charging stop state, entering the suspend mode, waking-up and determining a state of the battery wake up, and turning-on or -off the battery charging according to the determined state of the battery.
US09225183B2	Charging system for fleet golf A charging system is disclosed for charging a battery system of an electric vehicle. In one form, the charging system includes a first connector including a power control unit that is operable to selectively supply charging power from a power source. A second connector is connected with the first connector and includes a fault detection circuit. A controller is connected with the fault detection circuit and the power control unit. The controller is operable to control the power control unit to selectively supply charging power to a battery system if a fault is not detected from fault detection circuit. A cordset for use with the charging system is also disclosed that allows the cordset to perform certain electrical functions and connect the cordset to a connector of the vehicle in a breakaway manner.
US09225182B2	Charge controller with protective function and battery pack A charge controller includes a charge control circuit that, when detecting that a charging power supply is connected, controls the charging transistor to apply the charge current; a first and second control switch element connected in series between one terminal of a secondary battery and an external terminal; and a protection circuit that, when the secondary battery is over-discharged, turns off the first control switch element to stop discharge current and when deeply discharged, turns off the second control switch element. The protection circuit sends a charge inhibit signal to the charge control circuit when the secondary battery is deeply discharged, and while receiving the charge inhibit signal, the charge control circuit keeps the charging transistor off to prevent the charge current from flowing even if detecting that the charging power supply is connected.
US09225180B2	Electric storage device management apparatus and method of equalizing capacities of electric storage devices An electric storage device management apparatus is provided for monitoring an electric storage device assembly charged and discharged by a charger/discharger. The electric storage assembly includes a plurality of electric storage devices connected in series. The electric storage device management apparatus includes a voltmeter, a discharging circuit, and a controller. The voltmeter is configured to measure voltages of the electric storage devices respectively. The discharging circuit is configured to discharge the electric storage devices individually. The controller is configured to: determine whether a voltage of each electric storage device has reached a reference voltage during charging or discharging of the electric storage device assembly; and control the discharging circuit to discharge each electric storage device if the voltage of the electric storage device has reached the reference voltage.
US09225178B2	Charging apparatus A charging apparatus capable of charging a battery device includes a communication terminal configured to receive a signal for controlling charging of the battery device from the battery device, a detection unit configured to detect a voltage level of an input signal which is input in the charging apparatus via the communication terminal, a signal switching unit configured to connect between the communication terminal and the detection unit and change the voltage level of the input signal, and a charging control unit configured to control charging of the battery device based on the voltage level of the input signal changed by controlling the signal switching unit.
US09225177B2	Wireless power receiver for receiving power from a wireless power transmitter using a power signal through a resonance frequency band A wireless power reception method of a wireless power receiver for receiving power from a wireless power transmitter, according to the embodiment includes receiving a connection signal for identifying the wireless power receiver from the wireless power transmitter; transmitting a response signal in response to the connection signal to the wireless power transmitter; negotiating a power transmission condition with the wireless power transmitter; and receiving the power according to the negotiated power transmission condition.
US09225174B2	Control system, control apparatus and control method Disclosed herein is a control system, including: a first apparatus configured to adjust an output voltage thereof so that the output voltage may be included in a range determined in advance in response to a variation of an input voltage thereto from an electric power generation section; and a second apparatus configured to change a charge rate into a battery in response to the variation of the input voltage supplied from the first apparatus, wherein when a state in which the output voltage from the first apparatus is near to a lower limit thereof continues for a period longer than a period of time set in advance, one of two or more lower limits prepared in advance is selected as the value of the lower limit in accordance with to which one of sections set in advance input current from the electric power generation section belongs.
US09225173B2	Systems and methods for microgrid power generation and management Systems and methods for coordinating selective activation of a multiplicity of emergency power generation equipment over a predetermined geographic area for distribution and/or storage to supply a microgrid of electrical power for a substantially similar geographic area.
US09225169B1	Isolated signal transmitting device, isolated signal transmitting circuit and receiving circuit thereof An isolated signal transmitting device, an isolated signal transmitting circuit and an isolated receiving circuit thereof are provided to transmit analog signals and digital signals not commonly grounded. The isolated signal transmitting device adapts one current loop for transmitting the analog signals and the digital signals in two opposite directions. The isolated signal transmitting device has two optical couplers to isolate an input and an output of the isolated signal transmitting device not commonly grounded, and the coupled analog signals and the coupled digital signals have respective outputs. Then a user can determine whether the signal is digital or not according to the respective output.
US09225168B2	Switching power supply device and control circuit thereof A control circuit of a switching power supply device has a first current source capable of supplying an auxiliary current to a load resistance of the switching power supply device when a load current flowing through the load resistance increases, a second current source capable of pulling in a current from the load resistance when the load current flowing through the load resistance decreases, and an auxiliary current controller configured to activate the first current source or the second current source from when a variation in the load current flowing through the load resistance is detected to have exceeded a predetermined level until a current flowing through the inductor becomes equal to the current flowing through the load resistance.
US09225166B2	Electro-static discharge protective circuit and display substrate and display device having the same The present invention relates to display technology. It discloses an electro-static discharge protective circuit comprising: a first thin film transistor having a first source electrode connected to a first reference level end, and a first gate electrode and a first drain electrode connected with each other at a first node; a second thin film transistor having a second source electrode connected to said first node, and a second gate electrode and a second drain electrode connected with each other at a discharge end; a third thin film transistor having a third source electrode connected to said discharge end, and a third gate electrode and a third drain electrode connected with each other at a second node, wherein said second node is connected with said first node; and a fourth thin film transistor having a fourth source electrode connected at said second node, and a fourth gate electrode and a fourth drain electrode connected to a second reference level end. The electro-static discharge protective circuit according to the present invention can reduce a risk of circuit breakdown and failure. Correspondingly, the present invention also discloses a display substrate and a display device having the abovementioned electro-static discharge protective circuit.
US09225165B2	Surge arrester with extendable collar A surge arrester has a collar for fixing tensioning elements. The collar is extendable and is capable of absorbing released energy in the event of a fault and holding together the cage containing the tensioning elements. The collar, which fixes the tensioning elements in the radial direction, is positioned around the cage of the surge arrester formed from the tensioning elements. The form of the collar is such that it has defined deformation regions, with the result that the collar can expand and thus widen in the event of a force effect in the radial direction. If the varistor elements expand in the manner of an explosion during an overload, the collar is expanded and absorbs some of the released energy. This ensures that the cage is held together in the event of an overload and thus no fragments of the varistor elements can be flung out of the cage.
US09225150B2	Spark plug A spark plug includes an insulator including an axial hole and having an outer periphery with a tapered outer face; a metal shell having a thread portion and a tapered inner face; and a circular packing sandwiched between the tapered outer face of the insulator and the tapered inner face of the metal shell. On at least one cross section including the axis, (A/B)≧3.1, B≧0.25, and (A+B)≦2.0 are satisfied, where A represents a length of (a difference between an effective diameter of the thread portion and an inner diameter at a rear end of the tapered inner face)/2, and B represents a length of (a difference between the inner diameter at the rear end of the tapered inner face and an inner diameter at a front end of the tapered inner face)/2.
US09225149B2	Surface emitting laser element and atomic oscillator A surface emitting laser element includes plural surface emitting lasers provided on a substrate. Each of the plural surface emitting lasers includes a first reflection mirror provided on the substrate; an active layer provided on the first reflection mirror; a wavelength adjustment region provided on the active layer; and a second reflection mirror provided on the wavelength adjustment region. The wavelength adjustment region includes a phase adjustment layer and a wavelength adjustment layer provided on the phase adjustment layer. A thickness of the wavelength adjustment region is approximately an odd multiple of a wavelength of emitted light divided by four. A thickness of the phase adjustment layer is approximately an even multiple of the wavelength of the emitted light divided by four. A thickness of the wavelength adjustment layer is different from a thickness of a wavelength adjustment layer of at least one of the other surface emitting lasers.
US09225147B2	Optical semiconductor device and method of manufacturing the same An optical semiconductor device includes a semiconductor substrate; a lower cladding layer formed over the semiconductor substrate; a quantum well active layer formed on the lower cladding layer; a diffraction grating layer formed over the quantum well active layer and having diffraction gratings formed in a surface thereof; and an upper cladding layer formed on the diffraction gratings of the diffraction grating layer. Further, a band gap in outer regions of the quantum well active layer that are adjacent to outer end surfaces of the optical semiconductor device is greater than the band gap in an inner region of the quantum well active layer that is located between the outer regions, and a thickness of one or more layers, which include the lower cladding layer and positioned between the semiconductor substrate and the quantum well active layer, is greater than or equal to 2.3 μm.
US09225145B2	Electro-optical component The invention relates, inter alia, to a method for producing an electro-optical component (10, 200) suitable for emitting electromagnetic radiation (120), wherein in the method a first intermediate layer (60) is applied on a carrier, a second intermediate layer (70) is applied on the first intermediate layer, and after the second intermediate layer has been applied, the buried first intermediate layer is locally modified, wherein as a result of the local modification of the buried first intermediate layer in a lateral direction a refractive index jump is produced which brings about a lateral wave guiding of the electromagnetic radiation (120) in the unmodified region of the first intermediate layer.
US09225143B1	Polarization scraping method and system for unidirectional rotational mode selection within a laser cavity A compact laser is provided for in accordance with an exemplary embodiment in the present disclosure includes a compact resonator structure using a non-planar geometry of bulk components. The laser includes a preferred rotational direction of lasing modes and employs bulk components for establishing the preferred rotational direction of lasing modes within resonator. In some embodiments, the preferred rotational direction of lasing modes is established using a reflective element that is outside the resonator structure. In some embodiments, the reflective element induces polarization shifts in the reflected light that are compensated for by a wave plate, which may be outside the resonator structure.
US09225133B2	Quick-mount ballasts Quick-mount ballasts including a body and a receiver. The body includes a first protrusion, a connecting portion distal the first protrusion, the connecting portion containing a primary plurality of electrical contacts, and a second protrusion proximate the connecting portion. The receiver includes a guide, a wire trap proximate the guide, a receiving portion distal the guide, the receiving portion containing a secondary plurality of electrical contacts, and a retainer proximate the receiving portion.
US09225132B2	Connection plug for portable device A connection plug for a portable device is configured such that a single case is provided with different kinds of plug connection terminal units, which allows the single connection plug to perform functions of two kinds of connection plugs. The connection plug includes a case having an upper plug connection terminal unit and a lower plug connection terminal unit which are spaced apart from each other and disposed along upper and lower portions of the case respectively.
US09225127B2	Connection illumination using communication elements An aspect provides a plug including: a connection element for connecting to a port of an information handling device; a detection element disposed within the plug; and an illumination source disposed within the plug; the detection element controlling illumination of the illumination source via detecting the information handling device. Other aspects are described and claimed.
US09225124B2	Connector with electronic component and holder A connector includes an electronic component (60), a holder (20) for holding the electronic component (60), a housing (10) including an insertion opening (11), into which the holder (20) is insertable and which is open only in one direction, and configured to accommodate the holder (20) holding the electronic component (60), and conductive members (40) for conductively connecting the electronic component (60) and mating terminal fittings. The conductive members (40) include holder press-fit portions (51, 53) to be press-fitted into the holder (20) and housing press-fit portions (55) to be press-fitted into the housing (10) and the holder (20) is held in the housing (10) by the conductive members (40).
US09225121B2	Low crosstalk electrical connector An electrical connector includes contact units and housing units for retaining the contact units. The contact unit includes an insulating body and a plurality of contacts retained therein. The housing unit includes a shielding member defining an upper end and a lower end opposite to each other, an insulating cover seated on the upper end of the shielding member, and an insulating base seated on the lower end of the shielding member. A cavity is defined between the insulating cover and the insulating base for decreasing the plastic content so as to reduce the crosstalk.
US09225120B2	Electrical connectors including electromagnetic interference (EMI) absorbing material Examples of electrical connectors that incorporate electromagnetic interference (EMI) absorbing materials are described. In one example, an electrical connector includes a first pair of conductors, a second pair of conductors, and electromagnetic interference (EMI) absorbing material at least partially separating the first pair of conductors from the second pair of conductors. Each of the first and second pairs of conductors defines one of a differential pair or a signal conductor/ground pair. The EMI absorbing material may be configured to attenuate, primarily by absorption, an electromagnetic field generated due to transmission of electrical signals via one of the first pair and second pair of conductors to reduce the electromagnetic inference from the electromagnetic field on the other of the first pair and second pair of conductors.
US09225116B2	Quick connect power connector isolating system A connector system, keying member and method for electrically connecting a post to a connector. The system includes a terminal post, a connector and a keying member. The connector has a housing body with a post receiving passage for receiving the terminal post therein. The housing body has a keying member receiving recesses provided proximate a first end of the post receiving passage. A keying member is positioned on the terminal post and maintained thereon. The keying member is configured to be positioned in the keying member receiving recesses when the connector is properly inserted onto the terminal post. The keying member prevents the mating of an improper connector onto a respective post.
US09225115B2	Retention key lock for board-to-board connectors Board-to-board connectors that consume a minimal amount of board area, are simple to assemble, and provide a clear indication that a proper connection has been made. One example may consume minimal area, since only a retention key and slots in boards and connectors are needed. The connector may be simple to assemble since it may be as simple as stacking components, pushing down, and turning a retention key. Further, a first and a first line on a key and a cowling may be aligned after assembly to provide a clear indication that the connector has been properly assembled.
US09225113B2	Card edge connector To satisfy the demand for a reduction in height, provided is a technique for reducing a gap between a motherboard and a daughterboard in the state where the daughterboard is connected to the motherboard. A card edge connector is used to be mounted on a connector mounting surface of a mainboard to connect a memory module to the mainboard. The card edge connector includes a latch portion for pressing the memory module to be displaced in a direction away from the connector mounting surface, toward the connector mounting surface. The latch portion is configured to be elastically displaceable in the direction away from the connector mounting surface.
US09225107B2	Electrical connection having a bushing or a conductor configured to absorb limited torque An electrical connection for an electrical component or electrically heatable honeycomb body, in an exhaust system of an internal combustion engine includes an electrical conductor passing through a metallic jacket of the exhaust system, a bushing and an insulating layer and having an outer connection section with circular cross section. The connection section has a contact surface for connection to a supply line connection piece. The bushing and/or electrical conductor near the bushing can absorb torques up to 3.6, 4.5 or 7 Nm per cm2 of contact surface acting on the connection section and/or an internal or external thread in circumferential direction, by shaping the electrical conductor near the bushing or using structures and/or changes to the cross section or a form-locking construction of the electrical conductor and the bushing. Damage to electrical exhaust components due to external torques, disassembly and maintenance can thus be avoided.
US09225105B2	Waterproof ear jack socket and method of manufacturing the same A waterproof ear jack socket includes: an upper socket having at least one slit formed such that a first portion of a contact terminal passes through one surface of the upper socket to be exposed to the outside; a lower socket having a recess for engaging a second portion of the contact terminal on one surface thereof facing the upper socket, the lower socket being coupled to the upper socket to form a plug insertion hole into which an ear jack plug is inserted; and a waterproof cover attached to an outer circumference of a socket body formed by coupling the upper socket and the lower socket.
US09225104B2	Connector and connector assembly provided therewith A connector (L1) has a one-piece rubber plug (39) with wire insertion holes (45) to collectively seal wires (W) drawn out from the rear end surface of an inner housing (22) by inserting the wires into the corresponding wire insertion holes (45). The connector (L1) has wall surfaces (23, 41) for sandwiching the one-piece rubber plug (39) from front and rear in an inserting direction of the wires (W). Positioning pins (48) project substantially parallel with axial directions of the wire insertion holes (45) from the wall surface (41) on the side of the inner housing (22) toward the one-piece rubber plug (39) and to be inserted and press-fit into positioning holes 51 arranged near the wire insertion holes (45). Narrowed portions (51A) having a small hole diameter are formed at axial intermediate positions of the positioning holes (51).
US09225102B1	Interconnection system for network modules An interconnection system for portable networking modules including a pair of male connectors on one side and a female connector and an alignment slot on an opposing side. Two or more modules can be connected in a daisy chain series by aligning a male and female connector, rotating the modules around the connectors' central axis, mating the opposing connectors, and twisting the modules into alignment. When connected, one male connector is engaged with the female connector, and the other male connector fits into the alignment slot. Twisting in the opposite direction disconnects the modules. The connectors transmit data and power between connected modules. The male connectors also receive power modules such as military radio battery packs.
US09225099B2	System and method for identifying connections in an industrial enclosure The subject matter disclosed herein describes a system for connecting devices mounted to and within an industrial enclosure. The conductors for a device having multiple electrical conductors are bundled together. A first color coded element, such as a sleeve, is slid over the bundle providing a first identifier. The ends of the conductors are terminated at a single plug for insertion into a receptacle. A second color coded element, such as a label, which corresponds to the first color coded element, identifies into which receptacle each plug is to be inserted. In addition, each pole of the plug and/or receptacle includes a key or a corresponding space to receive a key. Various combinations of keys and spaces are defined such that each plug may be inserted into a single receptacle.
US09225098B2	Splice box A splice box includes: a housing including chambers each partitioned with each of partition walls, and slits each provided at each of the partition walls; and a splice terminals each including a terminal body portion inserted into and thereby received in each of the chambers, a pair of contact portions made to protrude from respective sides of the terminal body portion and arranged at the slits. A first contact portion and a second contact portion of each pair of adjacent splice terminals contact each other. Each of the chambers is provided with a pair of elastic portions so contacting side wall portions on respective sides of the terminal body portion as to have elastic deformation, and each of the elastic portions has a deformation portion formed by a part of the partition wall and a contact protrusion portion protruding from the deformation portion to the chamber side.
US09225096B2	High-voltage resistance cable termination A linear connector contact array is presented with focus on the tails of the contacts that are connected to individual wires. A wire management comb made from dielectric material positions each wire over its contact's tail. The wire is attached to the tail by electrically welding the wire to the tail without removing the insulating material. This is accomplished with a heated welding electrode that melts through the insulator material until electrical contact is made with the wire. A non-heated electrode is beneath the tail to complete this circuit. The wire management comb has deep channels which form insulating ribs between adjacent wires. The weld sites are staggered, and exposed ends of the contact tails are held short of the end of the management comb.
US09225095B2	Ball plunger-style connector assembly for electrical connections A ball plunger-style lateral connector assembly for electrical connections. One embodiment has an electrically conductive connector body with an electrically conductive pin extending into the body's interior area. An electrically conductive connector plate adjacent to the body's closed end engages the pin. An insulator sleeve in the body's interior area is adjacent to the body's sidewall. An electrically conductive biasing member in the interior area engages the connector plate; the insulator sleeve is between the biasing member and the connector body. An electrically conductive ball track in the interior area is in engagement with the other end of the biasing member. An electrically conductive ball is disposed in the body's open end and is seated in the ball track. The ball rolls within ball track during use of the lateral connector.
US09225094B2	Direct plug element having force-free contacting A direct plug element (2), comprising a plug housing (6), a direct contact (3), which is designed for direct contacting with an exposed contact region (40), wherein the direct contact (3) has a one-piece design, wherein the direct contact (3) is U-shaped and has a contact lamella region (31) and a press-on spring region (32), and wherein a contact point (33) on the contact lamella region (31) is offset in the plugging direction (S) from a press-on point (34) on the press-on spring region (32).
US09225093B2	Power circuit electrical connection system A connector system is provided for use in power applications, such as for conveying three phase power in electrical enclosures. The system comprises plug assemblies in which a power conductor is mounted in a floating arrangement with elastically deformable conductive structures extending from either side thereof. A mating receptacle may be mounted on a bus conductor. Three such arrangements may be provided for conveying three phase power. The structures allow for plug-in mating of the system components while accommodating considerable translational and angular misalignment between the connector parts.
US09225090B2	Flexible flat cable connector fixing structure The present invention discloses a flexible flat cable connector fixing structure. The fixing structure includes a flexible flat cable, a first connector, and a hold-down strip. The first connector includes a plurality of contacts, a first slot and a first circuit board. The first slot includes a plurality of passageways, for placing the contacts, and a back-end seam. The first circuit board is fixed with a back of the first slot and includes a plurality of conducting portions, for being conductively fixed with the contacts, and a plurality of conducting parts, positioned on a front of the first circuit board, for being electrically connected to the flexible flat cable. The flexible flat cable is conductively fixed with the conducting parts, stretches through the seam, and further stretches through the hold-down strip to be positioned by the hold-down strip.
US09225088B2	Lower profile card edge connector A card edge connector for being retained into a notch of a print circuit board includes an insulative housing defining a central slot extending along a longitudinal direction, a first wall and a second wall located on the opposite sides of the central slot and a fitting portion extending downwardly into the notch from a bottom portion of the first wall, the fitting portion defining a plurality of first terminal slots and the second wall defining a plurality of second terminal slots. A plurality of first terminals are received in the first terminal slots, and a plurality of second terminals are received in the second terminal slots. Each first terminal defines a first retaining portion received in the first terminal slot and a first soldering portion extending out of the housing forwardly, each second terminal defines a second soldering portion rearwardly extending out of the housing.
US09225082B2	Device for electrically connecting a cable, in particular a plug-in connector part A device (11) for electrically connecting a cable, in particular a plug-in connector part (2), has a housing (48) in which a connecting element (78) can be mechanically fixedly connected to an inner conductor (53) of the cable. The device (11) also includes at least one fixing element (81, 85, 87) for immovably fixing the connecting element (78) and the inner conductor (53) of the cable in the housing (48) by positive engagement when a tensile force occurs.
US09225080B2	Terminal connecting-and-fixing structure A terminal connecting-and-fixing structure capable of ensuring the connection between the terminal and the bus bar even in the case of loose of the bolt and suppressing increase in the contact resistance, thereby preventing poorness of the conduction, is provided. A terminal connecting-and-fixing structure comprises a bus bar 10 having a plate-like shape, a bolt 30 penetrating the bus bar 10, and a nut 40 tightened by the bolt 30, and a terminal 20 mounted on the bolt 30, wherein the terminal 20 and the bus bar 10 is connected and fixed by fastening the nut 40 to the bolt 30, and wherein the bus bar 10 has a concave portion 12, and the terminal 20 and the bus bar 10 is connected and fixed by fastening the nut 40 to the bolt 30 while an end portion of the terminal 20 is press-fitted in the concave portion 12.
US09225075B2	High voltage device system of railcar and railcar The present invention is a high voltage device system mounted on a railcar and includes a plurality of high voltage devices to which high-voltage electric power from an overhead contact line is supplied, a plurality of high-voltage cables configured to connect the high voltage devices with each other, and a joint device to which the high-voltage cables are connected. The high-voltage cables respectively include cable connector portions at tip end portions thereof, and each of the cable connector portions includes a base tubular portion configured to cover the high-voltage cable and a fit tubular portion extending from the base tubular portion in a direction substantially perpendicular to a longitudinal direction of the high-voltage cable. The joint device includes joint connector portions, each of which is fitted to the fit tubular portion of the cable connector portion to be connected to the high-voltage cable.
US09225072B2	Radiowave absorber A radiowave absorber of an embodiment includes: core-shell particles each including: a core portion that contains at least one magnetic metal element selected from a first group including Fe, Co, and Ni, and at least one metal element selected from a second group including Mg, Al, Si, Ca, Zr, Ti, Hf, Zn, Mn, rare-earth elements, Ba, and Sr; and a shell layer that coats at least part of the core portion, and includes an oxide layer containing at least one metal element selected from the second group and contained in the core portion; and a binding layer that binds the core-shell particles, and has a higher resistance than the resistance of the core-shell particles. The volume filling rate of the core-shell particles in the radiowave absorber is not lower than 10% and not higher than 55%.
US09225067B2	Enhanced power cable arrangement apparatus and method of reducing a common-mode interference signal An enhanced power cable arrangement apparatus (150) comprises a tuner housing (160), a power adaptor housing (162), and a power cable (164) extending between the tuner housing (160) and the power adaptor housing (162). A reception antenna (166) is provided that extends between the tuner housing (160) and the power adaptor housing (162), the reception antenna (166) comprising a pole portion that extends substantially in parallel with and in spaced relation to the power cable (164). A first end of the reception antenna (166) for coupling to a tuner apparatus (178) is coupled to an amplifier apparatus (194) and a common-mode filter (188).
US09225066B2	Coupled feed microstrip antenna The present invention is related to a microstrip antenna including an insulating substrate, a first conducting layer and a second conducting layer respectively located at two opposing surfaces of the insulating substrate, a non-conductive isolation zone defined in the second conducting layer, and a feed-in unit located within the con-conductive isolation zone. Thus, the non-conductive isolation zone separates the second conducting layer and the feed-in unit. During application, the feed-in unit is connected with a signal feed-in terminal, enabling the microstrip antenna to receive and transmit wireless signals. During fabrication of the microstrip antenna, it does not need to make a through hole on the insulating substrate, reducing the microstrip antenna process steps and material consumption and lowering the microstrip antenna fabrication cost.
US09225065B2	Adaptive antenna module A cheaper to produce, smaller and easy to drive adaptive antenna module is presented. The module comprises a signal path, an antenna, and a tuning circuit with two variable impedance elements. The tuning circuit operates over a restricted range of impedances and maintains the series resonance characteristic of the antenna.
US09225063B2	Multi-band antenna Methods and systems for extending a bandwidth of a multi-band antenna of a user device are described. A multi-band antenna includes a single radio frequency (RF) input coupled to a first loop antenna, the first loop antenna configured to provide a first resonant mode. The multi-band antenna also includes a second antenna parasitically coupled to the first loop antenna to provide additional resonant modes of the multi-band antenna. The second antenna is a T-monopole antenna with a base coupled to the ground plane, a first arm extending out from a first side of the base, a second arm extending out from a second side of the base and a folded arm extending back towards the second side of the base from a distal end of the second arm.
US09225062B2	Systems and methods for polling for dynamic slot reservation Embodiments include systems and methods for allocating time to a plurality of devices in the network of a piconet controller. Embodiments comprise selectively directing a steerable antenna beam of the piconet controller to a plurality of devices in succession during a polling process to receive time allocation requests from one or more of the devices. Subsequent to the polling process, a grant procedure is performed wherein a device is granted permission to transmit in a subsequent time interval. Also during the grant process, one or more devices are instructed to receive from the device granted permission to transmit. The polling process and the grant process occur in the same superframe.
US09225061B2	Portable motorized satellite television antenna system A portable motorized satellite television antenna system is connectable to a separate receiver. The satellite television antenna system can include an enclosure with at least a portion thereof comprising an electromagnetic wave permeable material. A reflector dish can be disposed inside of the enclosure. A low noise block converter can be disposed inside of the enclosure and configured to receive incoming satellite television signals. A first drive motor can be coupled to the satellite television antenna system such that at least one of an azimuth orientation and an elevation orientation of the dish can be adjusted. An electronic control system disposed inside of the enclosure and connected to the first drive motor to control automated aiming of the dish. The electronic control system and first drive motor can be powered solely by the separate receiver though a single conduit that spans between the satellite antenna system and the receiver.
US09225059B2	Antenna unit and planar wireless device An object of the present invention is to provide a planar type antenna unit and a planar type wireless device capable of reducing a projecting area of the wireless device. To achieve the above object, the planar type wireless device of the present invention is provided with a grounded planar antenna 10 which includes a radiating element 11 and a ground plate 12, a thin-film battery 20 which includes a positive-electrode current collector 21 opposing a negative-electrode current collector which is formed by the ground plate 12, and a transmitter/receiver IC arranged at a power feeding point 13 of the grounded planar antenna 10 and including a transmitter-receiver circuit which receives power from the negative-electrode current collector of the thin-film battery 20 and the positive-electrode current collector 21 of the thin-film battery 20, and transmits and receives signals by operating the radiating element 11 of the grounded planar antenna 10.
US09225057B2	Antenna apparatus and wireless communication device using same An antenna device includes an antenna element 10 and a printed circuit board 20 on which the antenna element 10 is mounted. The antenna element 10 includes a base 11 which is made of a dielectric material and a radiation conductor formed on at least one surface of the base 11. The printed circuit board 20 includes ground clearance region 23a having substantially a rectangular shape and having one side contacting an edge of the printed circuit board and other three sides surrounded by an edge line of a ground pattern, an antenna mounting region 27 provided within the ground clearance region 23a, and at least one frequency adjusting element 30 provided within the ground clearance region 27. The frequency adjusting element 30 is provided on the far side of the antenna mounting region 27 as viewed from an edge 20e of the printed circuit board 20.
US09225055B2	Antenna device An outer peripheral wall and an inner peripheral wall are formed in the lower part of a shark-fin antenna case. The lower end surface of the inner peripheral wall is bonded to the upper surface of an insulating base in an antenna base arranged on the lower surface of the antenna case. Thus, an antenna assembly can be housed in the antenna case which is constructed to be waterproof. The antenna assembly is provided with an element holder that is arranged upright on the antenna base; an umbrella-shaped element that is fixed to the top part of the element holder in such a way that the rear part thereof is positioned above the insulating base; an amplifier substrate for amplifying a reception signal of the umbrella-shaped element; and a coil that causes the umbrella-shaped element to resonate at the specified frequency.
US09225053B2	Antenna and electronic device having the same A multi-band antenna includes a grounding portion, a main radiating portion, and a shielding wall. The main radiating portion includes a first radiating portion having a first feed end and a second radiating portion having a second feed end. The first and second radiating portions are structurally symmetrical. The main radiating portion and the shielding wall are arranged on opposite sides of the grounding portion.
US09225049B2	Noise suppression structure A noise suppression structure for suppressing an undesired high-frequency current in a transmission line (i.e. a sleeve) of a short-circuited termination type includes a conductor base encompassing the periphery of the transmission line and a conductor short-circuiting part which is connected to the transmission line at the opposite side to an open end of the conductor base and whose inductance is greater than that of the conductor base. It is possible to increase an inductance by modifying the shape of the terminal end of the sleeve, equivalent to a quarter wavelength of an undesired high-frequency current which occurs in a wireless circuit of a mobile wireless terminal and flows through a ground layer, thus reducing the entire length and realizing miniaturization while securing desired input impedance.
US09225047B2	Fuel cell device A fuel cell includes a fuel cell, auxiliaries, a storage battery, an auxiliary power switching unit and a controlling device. The fuel cell is connected to a system power supply. The auxiliaries are coupled to the fuel cell. The auxiliary power switching unit switches power supplies to at least one of the auxiliaries from the storage battery. When the fuel cell device that is not operating starts operation at a time of power failure of the system power supply, the controlling device determines whether or not each of the auxiliaries need power for startup of the fuel cell and prompts the auxiliary power switching unit to supply the power from the storage battery to one or more auxiliaries for which the controlling device has determined a power demand for the startup.
US09225046B2	Protected anode and lithium air battery and all-solid battery including protected anode A protected anode including an anode including a lithium titanium oxide; and a protective layer including a compound represented by Formula 1 below, a lithium air battery including the same, and an all-solid battery including the protected anode: Li1+XMXA2−XSiYP3−YO12 wherein M may be at least one of aluminum (Al), iron (Fe), indium (In), scandium (Sc), or chromium (Cr), A may be at least one of germanium (Ge), tin (Sn), hafnium (Hf), and zirconium (Zr), 0≦X≦1, and 0≦Y≦1.
US09225041B2	Automobile battery and method for manufacturing pole plates A battery includes anode plates, formed as a mesh by forming cuts in series on a lead plate strip rolled into a uniform thickness, for storing electricity in a chemically reactive state by expansion processing, cathode plates formed as a mesh for storing electricity in a chemically reactive state, separators between the anode and cathode plates for electrical insulation, mechanical separation, and the impregnation of an AGM with electrolyte, such that the chemical reaction for storing electricity is facilitated and the pressure in the cell remains constant, upper and lower cases made of polypropylene and containing the anode plates, cathode plates, separators, and electrolyte in a plurality of mutually separate cells, and a cap coupled into the screw holes formed in the cell units in the upper case, for discharging gas generated during charge and discharge when the pressure of the gas is over a permissible level.
US09225039B2	Electrolytic solution, secondary battery, battery pack, electric vehicle, electric power storage system, electric power tool, and electronic apparatus A secondary battery includes: a cathode; an anode; and an electrolytic solution. The electrolytic solution includes an unsaturated cyclic ester carbonate and one or more selected from a group configured of aromatic compounds, dinitrile compounds, sulfinyl compounds, and lithium salts.
US09225037B2	Lithium secondary battery using ionic liquid A flame-retardant lithium secondary battery is provided that has better battery performance and higher safety than conventional batteries. The lithium secondary battery uses a positive electrode that includes a positive electrode active material of the general formula (1) below, and a nonaqueous electrolytic solution in which an ionic liquid that contains bis(fluorosulfonyl)imide anions as an anionic component is used as the solvent, (1) LiNixMnyO4, wherein x and y are values that satisfy the relations x+y=2, and x:y=27.572.5 to 22.577.5.
US09225035B1	Low profile battery module and improved thermal interface An arrangement of a battery module and a method for making this module are presented. An embodiment is comprised of a plurality of Lithium-ion pouch type unit cells stacked in a linear array. A lightweight frame structure compresses the unit cells and the cells are encapsulated with thermally conductive epoxy. A method of assembly constrains the unit cells during encapsulation such that a thin wall of epoxy is achieved, reducing the thermal resistance of the side walls. A slotted flat panel is placed over the unit cells and the cell tabs protrude through the panel. An arrangement of slotted bus bars reside on the flat panel and the cell tabs are bent at right angles in a manner that allows the tabs to be attached to the bus bars by a soldering or similar means. In an embodiment of the battery module, the flat panel contains battery management circuitry.
US09225031B2	System for energy generation or storage on an electrochemical basis A system for energy generation or storage on an electrochemical basis includes at least one flow cell, each flow cell including two half-cells through which differently charged electrolyte liquids (21, 22) flow and which are separated by a membrane, at least one electrode being disposed in each of these half-cells, and a tank for each of the electrolyte liquids. A common gas volume (23) connecting the tanks is provided, and at least one catalyst (24) for reducing a positive reaction partner of then redox pair in contact with the positive electrolyte liquid (22) and also with the common gas volume (23) is disposed in the tank for the positive electrolyte liquid (22).
US09225026B2	Humidification apparatus for fuel cell system A humidification apparatus for a fuel cell system is provided herein. A membrane humidifier includes humid air inlets, through which humid air discharged from a cathode of a fuel cell stack is introduced, and air outlets, through which air humidifying dry air in hollow fiber membranes is discharged, an air line connected from a cathode outlet of the fuel cell stack to the humid air inlets of the membrane humidifier to supply humid air. Exhaust lines are connected to the air outlets. A flow control valve is provided in the air line and controls the introduction of humid air into the humid air inlets, respectively. An exhaust valve is also provided to open and close flow paths of the exhaust lines. A controller controls the opening and closing of the flow control valve and the exhaust valve based on operating conditions of the fuel cell stack.
US09225023B2	Fullerenes as high capacity cathode materials for a rechargeable magnesium battery A magnesium electrochemical cell having a positive electrode containing a carbon cluster compound as an active material is provided. In a preferred embodiment the carbon cluster material is a comminuted fullerene.
US09225019B2	Cathode active material for lithium secondary battery Disclosed herein is a cathode active material based on lithium nickel-manganese-cobalt oxide represented by Formula 1, wherein an ion-conductive solid compound and conductive carbon are applied to a surface of the lithium nickel-manganese-cobalt oxide. A lithium secondary battery having the disclosed cathode active material has improved rate properties and high temperature stability, in turn embodying excellent cell performance.
US09225016B2	Hydrogen absorbing alloy, negative pole, and nickel—hydrogen secondary battery A hydrogen storage alloy wherein elution of Co, Mn, Al, and the like elements into an alkaline electrolyte is inhibited, an anode for a nickel-hydrogen rechargeable battery employing the alloy, and a nickel-hydrogen rechargeable battery having the anode.
US09225015B2	Lithium air battery A lithium air battery including a negative electrode comprising lithium, a positive electrode using oxygen as a positive active material, and an organic electrolyte including an organic compound capable of intercalating and deintercalating electrons involved in an electrochemical reaction.
US09225014B2	Battery, negative electrode active material, and electric tool A battery is provided including a positive electrode; a negative electrode including a first negative electrode active material; and an electrolytic solution, wherein the first negative electrode active material includes a core portion having a core portion surface, wherein the core portion has a median diameter of 0.3 μm to 20 μm, and a covering portion that covers at least part of the core portion surface, wherein the covering portion comprises at least Si, O and at least of one element M1 selected from Li, carbon (C), Mg, Al, Ca, Ti, Cr, Mn, Fe, Co, Ni, Cu, Ge, Zr, Mo, Ag, Sn, Ba, W, Ta, Na, and K.
US09225013B2	Method for producing cathode-active material for lithium secondary battery The present invention provides a method for producing a cathode-active material containing an olivine-type lithium metal phosphate for a lithium secondary battery which does not need washing or sintering after hydrothermal synthesis, the method including a step in which hydrothermal synthesis is carried out by using a mixture containing HMnPO4 and a lithium source as a raw material to produce an olivine-type lithium metal phosphate.
US09225012B2	Electrode of secondary cell including porous insulating layer, and manufacturing method thereof The present invention provides a manufacturing method of a secondary cell electrode forming a porous insulating layer on at least one surface between a negative electrode and a positive electrode, including coating an electrode layer slurry on the electrode surface, coating the porous insulating layer while in a state in which the electrode layer slurry has not been dried, and simultaneously drying the electrode layer slurry and the porous insulating layer coating slurry so a binder of the porous insulating layer does not block the pores of the electrode layer.
US09225011B2	Doped carbon-sulfur species nanocomposite cathode for Li—S batteries We report a heteroatom-doped carbon framework that acts both as conductive network and polysulfide immobilizer for lithium-sulfur cathodes. The doped carbon forms chemical bonding with elemental sulfur and/or sulfur compound. This can significantly inhibit the diffusion of lithium polysulfides in the electrolyte, leading to high capacity retention and high coulombic efficiency.
US09225009B2	Self-assembled composite of graphene oxide and tetravalent vanadium oxohydroxide A composite material comprising graphene oxide and an electrochemically active ingredient, in particular H4-xV3O8 with x ranging from 0.1 to 2.2, as well as a method for its manufacture were developed. The composite material is suitable for being used as electrode in an electrochemical cell.
US09225006B2	Electrode, secondary battery, battery pack, electric vehicle, electric power storage system, electric power tool, and electronic apparatus A secondary battery includes: a cathode; an anode; and an electrolytic solution. The cathode includes a lithium composite oxide, a first compound, and a second compound. The lithium composite oxide includes lithium (Li) and a transition metal element as constituent elements. The first compound includes a first metal element different from the transition metal element as a constituent element, the first compound existing on a surface and inside of the lithium composite oxide. The second compound includes a second metal element different from the first metal element as a constituent element, the second compound existing on the surface of the lithium composite oxide.
US09225005B2	Positive-electrode material for lithium secondary-battery, process for producing the same, positive electrode for lithium secondary battery, and lithium secondary battery A lithium-transition metal compound powder for a positive-electrode material of lithium secondary batteries can include a lithium-transition metal compound that is capable of an insertion and elimination of lithium ions. The particles in the powder contain, in the inner part thereof, a compound that, when analyzed by an SEM-EDX method, has peaks derived from Group-16 elements belonging to the third or later periods of the periodic table and Group-5 to Group-7 elements belonging to the fifth and sixth periods of the periodic table.
US09225001B2	Prismatic secondary battery A groove is formed in a ring shape and a ring-shaped convexity is formed on the periphery of a through-hole of a positive electrode terminal plate. An upper end side of a crimping part of a positive electrode exterior terminal is inserted through the through-hole of the positive electrode terminal plate and crimped, and welded spots are formed by irradiation with high-energy beams between a distal end side of the crimping part and the convexity. The mechanical and electrical connection of an exterior terminal and a terminal plate to the crimping part through welding with high-energy beams makes it possible to provide a prismatic secondary battery of enhanced reliability in which cracking is less likely to occur in the welded spots, the coupling strength between the exterior terminal and the terminal plate is increased, and fluctuations in the internal resistance are curbed.
US09225000B2	Current collecting terminal with PTC layer for electrochemical cells An electrochemical cell battery having current collecting terminals acting as security device. The current collecting terminals utilize layers of PTC materials strategically positioned whereby if a temperature of an electrochemical cell rises above the transition temperature of the layer of PTC material, electrical current is prevented to flow between electrochemical cells by the layer of PTC material.
US09224999B2	Vehicle battery module The vehicle battery module includes cut rubber tubing attached to tops of voltaic cells. Tabs from the cells pass through seating apertures in a printed circuit board. The rubber tubing atop each cell buffers contact between the circuit board (PCB) and the cell's top edge. Solder joints secure electromechanical connection of the tabs to the printed circuit board. A strain relief bend in the tabs provides robust mechanical connection between the cells and printed circuit board. Printed circuits on the board allow the cells to be electrically connected in various configurations. Terminal and connectors on the printed circuit board provide connection to a load and monitoring device. A vehicle battery pack is comprised of a plurality of vehicle battery modules.
US09224998B2	Rechargeable battery for replacing dry battery and its structural component and corresponding battery compartment Rechargeable battery for replacing dry battery and its structural component and corresponding battery compartment are provided, the structural component includes a battery shell for accommodating the electric core of the rechargeable battery, the battery shell has a first end face and a second end face opposed each other, the first end face is provided with a positive electrode and a negative electrode for external power supply, the second end face or the first end face or the side face of the battery shell is provided with a charging port, the positive electrode on the first end face is electrically connected with outwardly projecting elastic conductive structure.
US09224993B2	Battery pack encasing structure and walking assistance device using same A connector provided in a lower middle part of a battery pack, is protected from moisture in a reliable manner while simplifying the installing and removing of the battery pack. A vertical wall of the battery pack is formed with an arch-shaped ridge having a higher middle part and a pair of lower lateral end parts. A battery pack receiving recess is provided with a vertical wall opposing the vertical wall of the battery pack, and a pair of through holes on either lower end thereof. The vertical wall of the battery pack receiving recess is formed with an arch-shaped groove configured to receive the arch-shaped ridge of the battery pack. Moisture that may be deposited on the vertical wall surfaces is trapped by a water channel defined by the groove and the ridge, and drained from the battery pack receiving recess via the through holes.
US09224978B2	Organic light emitting diode display device An organic light emitting diode (OLED) display device includes a first substrate; a first electrode positioned on the first substrate; an organic light emission layer positioned on the first electrode; a second electrode positioned on the organic light emission layer; and a capping layer positioned on the second electrode to cover the organic light emission layer and including an ultraviolet (UV) interception material intercepting UV rays irradiated to the organic light emission layer from the exterior.
US09224976B2	Light-emitting element, light-emitting device, electronic device, and lighting device Provided is a light-emitting element including an anode over a substrate, a layer containing a composite material in which a metal oxide is added to an organic compound, a light-emitting layer, and a cathode having a light-transmitting property. The anode is a stack of a film of an aluminum alloy and a film containing titanium or titanium oxide. The film containing titanium or titanium oxide is in contact with the layer containing a composite material.
US09224975B2	Organic light emitting display panel and method of manufacturing the same An organic light emitting display panel including a partition wall to prevent different organic light emitting materials from being mixed with each other between adjacent light emitting areas. The partition wall may protrude from a surface of a pixel definition layer or a first common layer. Accordingly, desired light colors are generated by organic light emitting patterns respectively disposed in the light emitting areas.
US09224974B2	Optoelectronic device with homogeneous light intensity An optoelectronic device comprising: a first electrical supply conductor (206); a second electrical supply conductor (212) which is connected to a first electrical terminal (104); and a functional layer (208) for emitting radiation arranged between the first electrical supply conductor (206) and the second electrical supply conductor (212), the second electrical supply conductor (212) having a lateral first electrical conductivity which changes monotonically over the extent of the second electrical supply conductor (212) away from the first electrical terminal (104).
US09224973B2	Flexible organic light emitting display device A flexible organic light emitting display device includes: a display panel configured to output an image; a retardation film formed on an upper portion of the display panel to cover the display panel and formed by laminating a half wave plate and a quarter wave plate; and a polarizing plate attached to the retardation film. A color shift in a black screen can be improved by replacing a barrier film used for face seal with a retardation film including a half wave plate and a quarter wave plate combined at a predetermined angle.
US09224970B2	Organic light emitting diode, organic light emitting display panel including the organic light emitting diode and method of manufacturing the organic light emitting display panel An organic light emitting diode includes a first electrode layer, a first common layer disposed on the first electrode layer, an organic light emitting layer disposed on the first common layer, a second common layer disposed on the organic light emitting layer, and a second electrode layer disposed on the second common layer. The organic light emitting layer and the first common layer have the same directional property. Since an injection/transportation of charge at an interface of the first common layer and the organic light emitting layer becomes smooth, charges are not accumulated at the interface. Thus, life of the organic light emitting diode is extended.
US09224967B2	White organic light emitting device A white organic light emitting device includes: first and second electrodes formed to face each other on a substrate; a first stack configured with a hole injection layer, a first hole transportation layer, a first light emission layer and a first electron transportation layer which are stacked between the first and second electrodes; a second stack configured with a second hole transportation layer, a second light emission layer, a third light emission layer, a second electron transportation layer and an electron injection layer which are stacked between the first stack and the second electrode; and a charge generation layer interposed between the first and second stacks and configured to adjust a charge balance between the two stacks.
US09224965B2	Organic thin film transistor and method for manufacturing the same An organic thin film transistor and a method for manufacturing the same is disclosed, which can improve the device properties by decreasing a contact resistance which occurs in a contact area between an organic semiconductor layer and source/drain electrodes. The organic thin film transistor includes a gate electrode formed on a substrate, a gate insulation layer formed on the gate electrode, source and drain electrodes overlapped with both edges of the gate electrode and formed on the gate insulation layer, an organic semiconductor layer formed on the gate insulation layer including the source/drain electrodes, a first adhesive layer having hydrophilic properties formed between the gate insulation layer and the source/drain electrodes, and a second adhesive layer having hydrophobic properties formed between the organic semiconductor layer and the gate insulation layer.
US09224964B2	Substrate cartridge, substrate-processing apparatus, substrate-processing system, substrate-processing method, control apparatus, and method of manufacturing display element A substrate cartridge includes a cartridge main body that houses a substrate and an information-maintaining section that is housed in the cartridge main body and maintains information that includes at least specification information of specification values of the substrate housed in the cartridge main body.
US09224963B2	Stable emitters Stable and efficient organic light-emitting diodes were prepared using tetradentate platinum-based blue and red emitters. In one example, a series of stable and efficient red phosphorescent OLEDs was fabricated employing a phenyl-pyridyl-carbazole based tetradentate cyclometalated Pt(II) complex as an emitting dopant and utilizing a commercially available host, transporting, and blocking materials. By implementing this platinum complex in electrochemically stable device architectures, long operational lifetimes were achieved with an estimated LT97 of over 600 hrs at luminance of 1000 cd/m2.
US09224962B2	Dendrimers containing luminescent gold (III) compounds for organic light-emitting devices and their preparation A novel class of saturated or conjugated dendrimers containing at least one strong σ-donating group coordinated to cyclometalated tridentate gold(III) compounds having the chemical structure depicted by generic formula: wherein: (a) [Au] is a cyclometalated tridentate gold(III) group; (b) Unit A is a σ-donating chemical group; (c) Unit B is a central part of the dendrons comprising a branch point of component dendrimers; (d) Unit C is optional surface groups or dendrons of the dendrimers; (e) n=0 or 1.
US09224960B2	Light-emitting element, light-emitting device, and electronic device A light-emitting element with improved emission efficiency is provided. The light-emitting element includes a light-emitting layer in which a first light-emitting layer and a second light-emitting layer are stacked in contact with each other over an anode, and a first substance serving as an emission center substance in the second light-emitting layer constitutes the first light-emitting layer. A second substance serving as a host material to disperse the first substance serving as an emission center substance is included in the second light-emitting layer. In the light-emitting element, the second substance is a substance having an energy gap (or triplet energy) larger than the first substance.
US09224959B2	Method for producing a pi-electron conjugated compound A leaving substituent-containing compound including a partial structure represented by the following General Formula (I): where a pair of X1 and X2 or a pair of Y1 and Y2 each represent a hydrogen atom; the other pair each represent a group selected from the group consisting of a halogen atom and a substituted or unsubstituted acyloxy group having one or more carbon atoms; a pair of the acyloxy groups represented by the pair of X1 and X2 or the pair of Y1 and Y2 may be identical or different, or may be bonded together to form a ring; R1 to R4 each represent a hydrogen atom or a substituent; and Q1 and Q2 each represent a hydrogen atom, a halogen atom or a monovalent organic group, and may be bonded together to form a ring.
US09224958B2	Organic electroluminescent materials and devices Compounds according to Formula I, devices containing the same and formulations containing the same are described. In Formula I, m1, m2 and m3 are 0, 1, 2 or 3; at least one of m1, m2 and m3 is 1, 2 or 3; n1, n2, and n3 are integers independently selected from 1 to 10; and any of the hydrogens is optionally substituted by deuterium.
US09224956B2	Method for manufacturing organic thin-film element, apparatus for manufacturing organic thin-film element, method for forming organic film, and method for manufacturing organic EL element A method for reducing an internal pressure of a vacuum chamber while preventing impurity contamination within the vacuum chamber as much as possible is provided. The method includes: rough pumping reducing an internal pressure of a vacuum chamber by using a roughing pump, the roughing pump being a mechanical pump that is capable of reducing the internal pressure of the vacuum chamber to be less than 15 Pa; main pumping reducing the internal pressure of the vacuum chamber by using a main pump after the rough pumping, the main pump being a non-mechanical pump. Transition from the rough pumping to the main pumping is performed when the internal pressure of the vacuum chamber is no less than 15 Pa.
US09224952B2	Methods of manufacturing electronic display devices employing nozzle-droplet combination techniques to deposit fluids in substrate locations within precise tolerances An ink printing process employs per-nozzle droplet volume measurement and processing software that plans droplet combinations to reach specific aggregate ink fills per target region, guaranteeing compliance with minimum and maximum ink fills set by specification. In various embodiments, different droplet combinations are produced through different print head/substrate scan offsets, offsets between print heads, the use of different nozzle drive waveforms, and/or other techniques. Optionally, patterns of fill variation can be introduced so as to mitigate observable line effects in a finished display device. The disclosed techniques have many other possible applications.
US09224950B2	Methods, systems, and apparatus for improving thin film resistor reliability Provided are resistive random access memory (ReRAM) cells and methods of fabricating thereof. The ReRAM cells may include a first layer operable as a bottom electrode. The ReRAM cells may also include a second layer operable as a variable resistance layer configured to switch between at least a first resistive state and a second resistive state. The ReRAM cells may further include a third layer formed over the second layer. The third layer may have a substantially constant electrical resistivity. Moreover, the third layer may include a ternary metal-silicon nitride having a ratio of metal to silicon that is between about 1:1 and 1:4. Furthermore, the ternary metal-silicon nitride may include a metal that has an atomic weight that is greater than 90. The ReRAM cells may further include a fourth layer operable as a top electrode.
US09224947B1	Resistive RAM and method of manufacturing the same A resistive RAM and a method of manufacturing the same are provided. The resistive RAM includes a first electrode, a second electrode, a transition metal oxide (TMO) layer between the first and second electrodes, an activated metal layer between the first electrode and the TMO layer, and a metal oxynitride layer formed on a surface of the activated metal layer in the gas environment containing oxygen and nitrogen elements.
US09224945B2	Resistive memory devices Electronic apparatus, systems, and methods can include a resistive memory cell having a structured as an operably variable resistance region between two electrodes and a metallic barrier disposed in a region between the dielectric and one of the two electrodes. The metallic barrier can have a structure and a material composition to provide oxygen diffusivity above a first threshold during program or erase operations of the resistive memory cell and oxygen diffusivity below a second threshold during a retention state of the resistive memory cell. Additional apparatus, systems, and methods are disclosed.
US09224944B2	Magnetic memory and method of manufacturing the same A magnetic memory according to an embodiment includes: at least one memory cell comprising a magnetoresistive element as a memory element, and first and second electrodes that energize the magnetoresistive element. The magnetoresistive element includes: a first magnetic layer having a variable magnetization direction perpendicular to a film plane; a tunnel barrier layer on the first magnetic layer; and a second magnetic layer on the tunnel barrier layer, and having a fixed magnetization direction perpendicular to the film plane. The first magnetic layer including: a first region; and a second region outside the first region so as to surround the first region, and having a smaller perpendicular magnetic anisotropy energy than that of the first region. The second magnetic layer including: a third region; and a fourth region outside the third region, and having a smaller perpendicular magnetic anisotropy energy than that of the third region.
US09224943B2	Forming method of an annular storage unit of a magneto-resistive memory The present invention discloses a method of forming an annular storage structure of a magneto-resistive memory. It relates to the manufacturing process of the semiconductor devices. The method includes the following steps: a silicon oxide layer and a silicon nitride layer is formed on the thin-film layer of a magnetic channel junction; a circular silicon nitride trench is formed; a poly-silicon thin film is deposited to cover the silicon nitride trench, the annular poly-silicon structure is formed by plasma etching back; the remaining silicon nitride thin film is removed to form the annular poly-silicon hard mask; the poly-silicon hard mask is used when the magnetic channel junction thin film layer is etched by plasma etching. At last, the unit structure of magnetic channel junction is formed. The advantages of the above technical solutions are: the diameter of the round photo-resist pattern is larger; it is possible to use the photo-etching with normal resolution, thus the method reduces the cost of production enhances market competitiveness and obtains significant economic benefits.
US09224937B2	Precursor of MgB2 superconducting wire, and method for producing the same An MgB2 superconducting wire excellent in critical current density property is supplied by using a crystalline boron powder which is low in costs and easy to obtain. For the wire, a precursor of the MgB2 superconducting wire is used, the precursor having a linear structure including a core region containing a magnesium powder and a boron powder, and a sheath region formed of a metal covering an outer circumferential portion of the core region. The boron powder is crystalline, and has a volume-mean particle size of 2 μm or less.
US09224936B2	Thermoelectric conversion device A thermoelectric conversion device includes: a substrate; two magnetic layers having a fixed magnetization direction with respect to the substrate; and at least one electrode including a material having a spin orbit interaction, wherein a gap (or dielectric layer of low thermal conductivity) is provided between the magnetic layers. A thickness of the gap (or dielectric layer) is of a distance within the range at that a magnetic dipole interaction is exerted, and a film thickness of the magnetic layers is of about a characteristic length determined by diffusion or the like of a magnetic excitation.
US09224933B2	Light emitting device package and package for mounting light emitting device A package for mounting a light emitting device thereon. The package includes a substrate, a light emitting device mounting part including a wiring formed on one surface of the substrate, the wiring including two areas that are arranged facing each other and being separated a predetermined interval apart from each other in a plan view, first and second through-wirings that penetrate the substrate and are provided on the two areas, respectively, each of the first and second through-wirings including one end electrically connected to the light emitting device mounting part and another end exposed from another surface of the substrate. A part of each of the first and second through-wirings includes a maximum part having a plan-view shape that is larger than a plan-view shape of the one end of each of the first and second through-wirings.
US09224915B2	Semiconductor light-emitting device, method for producing same, and display device A semiconductor light-emitting device (101) includes an LED chip (4), a lead (1) having a main surface (11) on which the LED chip (4) is mounted, and a resin package (5) covering the LED chip (4). The main surface (11) is roughened, and the main surface (11) is held in contact with the resin package (5). These configurations contribute to the downsizing of the semiconductor light-emitting device (101).
US09224914B2	Insulating layer for planarization and definition of the active region of a nanowire device Various embodiments include methods of fabricating a semiconductor device that include forming a plurality of nanowires on a support, wherein each nanowire comprises a first conductivity type semiconductor core and a second conductivity type semiconductor shell over the core, forming an insulating material layer over at least a portion of the plurality of nanowires such that at least a portion of the insulating material layer provides a substantially planar top surface, removing a portion of the insulating material layer to define an active region of nanowires, and forming an electrical contact over the substantially planar top surface of the insulating material layer.
US09224910B2	Supporting substrate for preparing semiconductor light-emitting device and semiconductor light-emitting device using supporting substrates A method may be provided for preparing a semiconductor light-emitting device. The method may include: preparing a first wafer in which a semiconductor multi-layered light-emitting structure is disposed on an upper part of an initial substrate; preparing a second wafer which is a supporting substrate; bonding the second wafer on an upper part of the first wafer; separating the initial substrate of the first wafer from a result of the bonding; and fabricating a single-chip by severing a result of the passivation. Other embodiments may be provided.
US09224909B2	GaN based light emitting devices utilizing dispersion bragg reflection layer Light emitting devices and methods of manufacturing the light emitting devices. The light emitting devices include a silicon substrate; a metal buffer layer on the silicon substrate, a patterned dispersion Bragg reflection (DBR) layer on the metal buffer layer; and a nitride-based thin film layer on the patterned DBR layer and regions between patterns of the DBR layer.
US09224907B2	Vertical structure LEDs A vertical structure light-emitting device includes a conductive support, a light-emitting semiconductor structure disposed on the conductive support structure, the semiconductor structure having a first semiconductor surface, a side semiconductor surface and a second semiconductor surface, a first electrode electrically connected to the first-type semiconductor layer, a second electrode electrically connected to the second-type semiconductor layer, wherein the second electrode has a first electrode surface, a side electrode surface and a second electrode surface, wherein the first electrode surface, relative to the second electrode surface, is proximate to the semiconductor structure; and wherein the second electrode surface is opposite to the first electrode surface, and a passivation layer disposed on the side semiconductor surface and the second semiconductor surface.
US09224905B2	Photoelectric conversion device and method for producing photoelectric conversion device In this method for producing a photoelectric conversion device: an i-type non-crystalline layer and an n-type non-crystalline layer comprising a non-crystalline semiconductor film are formed on the light-receiving surface of a semiconductor substrate; an i-type non-crystalline layer and an n-type non-crystalline layer comprising a non-crystalline semiconductor film are formed on the back surface of the semiconductor substrate; a protective layer is formed on the n-type non-crystalline layer; an insulating layer is formed on the n-type non-crystalline layer; and in the state where the top of the n-type non-crystalline layer is covered by the protective layer, patterning is performed by eliminating a portion of the i-type non-crystalline layer, the n-type non-crystalline layer, and the insulating layer.
US09224902B2	Solar cell having silicon nano-particle emitter A silicon solar cell having a silicon substrate includes p-type and n-type emitters on a surface of the substrate, the emitters being doped nano-particles of silicon. To reduce high interface recombination at the substrate surface, the nano-particle emitters are preferably formed over a thin interfacial tunnel oxide layer on the surface of the substrate.
US09224899B2	Light mixer for generating terahertz radiation The invention relates to a light mixer for generating terahertz radiation, comprising a photodetector (PHD) coupled to an antenna (AT) for terahertz radiation, characterized in that the photodetector comprises a layer of photoconductive material capable of absorbing optical radiation, said layer having a thickness that is less than the absorption length of said radiation by the photoconductive material and being contained between an at least partially transparent so-called upper electrode and a reflective so-called lower electrode, said lower and upper electrodes comprising a resonant cavity for said optical radiation. The invention further relates to a terahertz radiation source comprising such a light mixer and to two laser radiation sources arranged to stack two laser radiation beams on the upper electrode of the photodetector. The invention also relates to the use of such a light mixer for generating terahertz radiation via light mixing.
US09224896B2	Photoelectric conversion material A photoelectric conversion material is disclosed in the present invention and comprises at least a cone material. The cone material is composed of an isomer and comprises a plurality of grains. The sizes of the grains are arranged from smaller ones to larger ones along a direction. In the meantime, a method for fabricating the above photoelectric conversion material is also disclosed here. The method comprises the following steps. First, a precursor is provided. The precursor comprises at least a cone material and the cone material is a multilayer structured material, such as sodium titanate and potassium titanate, formed by stacking first materials and second materials. And then, the precursor is annealed to let the second materials leave from the cone material, and the cone material becomes the above photoelectric conversion material with a plurality of grains.
US09224891B2	Photodetection device The invention relates to a photodetector for infrared light radiation having a given wavelength (λ), including a stack of layers consisting of: a continuous layer (11) of a partially absorbent semiconductor material, which constitutes the photodetection area; a spacer layer (12) of a material that is transparent to said wavelength and has an index ne; and a structured metal mirror (13), the distance (g) between the top of said mirror and the semiconductor layer being less than (λ)/ne and the mirror surface having a profile corresponding to the periodic repetition, according to period (P), of a basic pattern defined by the alternating series of raised surfaces (131, 132) and slots (133, 134) having the widths (L1, L2) and (L3, L4), respectively, the widths (L1) to (L4) being such that none are equal to zero, and that the sum thereof is equal to P and at least L1≠L2 or L3≠L4.
US09224890B1	Light sensor having transparent substrate with lens formed therein Light sensor devices are described that have a glass substrate, which includes a lens to focus light over a wide variety of angles, bonded to the light sensor device. In one or more implementations, the light sensor devices include a substrate having a photodetector formed therein. The photodetector is capable of detecting light and providing a signal in response thereto. The sensors also include one or more color filters disposed over the photodetector. The color filters are configured to pass light in a limited spectrum of wavelengths to the photodetector. A glass substrate is disposed over the substrate and includes a lens that is configured to collimate light incident on the lens and to pass the collimated light to the color filter.
US09224888B2	Solar cell and solar-cell module A solar cell has a passivation film formed on a crystalline silicon substrate that has at least a p-n junction, and an electrode formed by printing and heat-treating a conductive paste. The solar cell has a first electrode comprising an extraction electrode, which extracts photogenerated carriers from the silicon substrate, formed so as to contact the silicon substrate and a second collector electrode, which collects the carriers collected at the extraction electrode, formed so as to contact the first electrode. Other than the point of contact between the first electrode and the second electrode, at least, the second electrode contacts the silicon substrate only partially or not at all. By leaving the passivation film between the collector electrode and the silicon, either completely or partially, the solar cell reduces charge losses at electrode/silicon interfaces, improves the short-circuit current and open voltage, and yields improved characteristics.
US09224883B2	Optical sensor An optical sensor has a semiconductor substrate, an insulation film formed on the semiconductor substrate, a light receiving part formed on the semiconductor substrate, and an electrode formed on the semiconductor substrate through the insulation film. The light receiving part has a light receiving element which changes light into electric charge, and a reset element which discharges the electric charge accumulated in the light receiving element. The electrode has a first electrode applying a control voltage to the reset element. The first electrode has a light shielding property. The first electrode defines a shape of a light receiving surface of the light receiving element.
US09224881B2	Layers for increasing performance in image sensors An imaging device includes a semiconductor substrate having a photosensitive element for accumulating charge in response to incident image light. The semiconductor substrate includes a light-receiving surface positioned to receive the image light. The imaging device also includes a negative charge layer and a charge sinking layer. The negative charge layer is disposed proximate to the light-receiving surface of the semiconductor substrate to induce holes in an accumulation zone in the semiconductor substrate along the light-receiving surface. The charge sinking layer is disposed proximate to the negative charge layer and is configured to conserve or increase an amount of negative charge in the negative charge layer. The negative charge layer is disposed between the semiconductor substrate and the charge sinking layer.
US09224880B2	Method for manufacturing solar cell with interconnection sheet, method for manufacturing solar cell module, solar cell with interconnection sheet, and solar cell module Provided is a method for manufacturing a solar cell with an interconnection sheet, a method for manufacturing a solar cell module, a solar cell with an interconnection sheet, and a solar cell module. Fixing resin is arranged at least on one side of a location between electrodes of solar cell and a location between interconnections of an interconnection sheet. Thereafter, a first cure state of fixing resin is attained. Thereafter, an adjoining member containing conductive material is provided, and a solar cell and interconnection sheet are stacked to soften the fixing resin exhibiting the first cure state and then re-cure the same to attain a second cure state.
US09224879B2	Semiconductor device and electronic device There is provided a semiconductor device including a substrate made from a semiconductor material, and layers that are made from plural kinds of materials and formed over the substrate. An opening portion that is formed to penetrate at least a layer formed as an insulating film among the layers formed over the substrate and expose a surface of an electrode pad is filled with aluminum or an aluminum alloy.
US09224875B2	Nonvolatile semiconductor storage device According to one embodiment, a control gate is formed on the semiconductor substrate and includes a cylindrical through hole. A block insulating film, a charge storage film, a tunnel insulating film, and a semiconductor layer are formed on a side surface of the control gate inside the through hole. The tunnel insulating film comprises a first insulating film having SiO2 as a base material and containing an element that lowers a band gap of the base material by being added. A density and a density gradient of the element monotonously increase from the semiconductor layer toward the charge storage film.
US09224872B2	Non-volatile memory circuit A non-volatile memory circuit includes a non-volatile memory having a first source and drain region having a non-LOCOS offset structure and a second source and drain region having a LOCOS offset structure. A pair of switch circuits are connected in parallel to the respective first and second source and drain regions for switching voltages applied to the first and second source and drain regions so that the first source and drain region serves as a drain and the second source and drain region serves as a source in a writing mode, the second source and drain region serves as a drain and the first source and drain region serves as a source in a reading mode, and equal voltages are applied to the first source and drain region and the second source and drain region in a retention mode.
US09224864B1	Semiconductor device and method of fabricating the same A semiconductor device includes a fin structure, an insulating structure, a protruding structure, an epitaxial structure, and a gate structure. The fin structure and the insulating structure are disposed on the substrate. The protruding structure is in direct contact with the substrate and partially protrudes from the insulating structure, and the protruding structure is the fin structure. The epitaxial structure is disposed on a top surface of the fin structure and completely covers the top surface of the fin structure. In addition, the epitaxial structure has a curved top surface. The gate structure covers the fin structure and the epitaxial structure.
US09224861B2	Semiconductor device with notched gate A semiconductor device includes a semiconductor substrate, a body region disposed in the semiconductor substrate and having a first conductivity type, a source region disposed in the semiconductor substrate adjacent the body region and having a second conductivity type, a drain region disposed in the semiconductor substrate, having the second conductivity type, and spaced from the source region to define a conduction path, a gate structure supported by the semiconductor substrate, configured to control formation of a channel in the conduction path during operation, and having a side adjacent the source region that comprises a notch, the notch defining a notch area, and a notch region disposed in the semiconductor substrate in the notch area and having the first conductivity type.
US09224860B2	Trench-gate type semiconductor device and manufacturing method therefor A trench-gate type semiconductor device that can prevent breakdown of a gate insulating film caused by a displacement current flowing into a protective diffusion layer at a portion of a trench underlying a gate electrode at a turn-off time and simultaneously improves a current density by narrowing a cell pitch. The semiconductor device includes a gate electrode embedded into a trench penetrating a base region. The gate electrode is disposed into a lattice shape in a planar view, and a protective diffusion layer is formed in a drift layer at the portion underlying thereof. At least one of blocks divided by the gate electrode is a protective contact region on which the trench is entirely formed. A protective contact for connecting the protective diffusion layer at a bottom portion of the trench and a source electrode is disposed on the protective contact region.
US09224858B1	Lateral double-diffused metal oxide semiconductor field effect transistor (LDMOSFET) with a below source isolation region and a method of forming the LDMOSFET Disclosed are a field effect transistor (FET) (e.g., a lateral double-diffused metal oxide semiconductor field effect transistor (LDMOSFET)) and a method of forming the FET. In the FET, an etch stop pad is on a semiconductor substrate (e.g., a P-type silicon substrate). A semiconductor layer (e.g., a silicon layer) is also on the substrate and extends laterally over the etch stop pad. A first well region (e.g., an N-well region) extends through the semiconductor layer into the substrate such that it contains the etch stop pad. A second well region (e.g., a P-well region) is in the first well region aligned above the etch stop pad. A source region (e.g., a N-type source region) is in the second well region. A buried isolation region (e.g., a buried air-gap isolation region) is within the first well region aligned below the etch stop pad so as to limit vertical capacitor formation.
US09224856B2	LDMOS transistors for CMOS technologies and an associated production method In a semiconductor component or device, a lateral power effect transistor is produced as an LDMOS transistor in such a way that, in combination with a trench isolation region (12) and the heavily doped feed guiding region (28, 28A), an improved potential profile is achieved in the drain drift region (8) of the transistor. For this purpose, in advantageous embodiments, it is possible to use standard implantation processes of CMOS technology, without additional method steps being required.
US09224854B2	Trench gate trench field plate vertical MOSFET A semiconductor device having a vertical drain extended MOS transistor may be formed by forming deep trench structures to define vertical drift regions of the transistor, so that each vertical drift region is bounded on at least two opposite sides by the deep trench structures. The deep trench structures are spaced so as to form RESURF regions for the drift region. Trench gates are formed in trenches in the substrate over the vertical drift regions. The body regions are located in the substrate over the vertical drift regions.
US09224852B2	Corner layout for high voltage semiconductor devices A corner layout for a semiconductor device that maximizes the breakdown voltage is disclosed. The device includes first and second subsets of the striped cell arrays. The ends of each striped cell in the first array is spaced a uniform distance from the nearest termination device structure. In the second subset, the ends of striped cells proximate a corner of the active cell region are configured to maximize breakdown voltage by spacing the ends of each striped cell a non-uniform distance from the nearest termination device structure. It is emphasized that this abstract is provided to comply with the rules requiring an abstract that will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims.
US09224850B2	Semiconductor device and method of manufacturing the same In one embodiment, a first main terminal region of a first conductivity type and a second main terminal region of a second conductivity type, which is an opposite conductivity type of the first conductivity type, formed in the semiconductor substrate so as to sandwich a gate electrode, a diffusion layer of the second conductivity type coming in contact with the first and second element isolation insulator films and having an upper surface in a position deeper than lower surfaces of the first and second main terminal regions, a first well region of the first conductivity type formed between the first main terminal region and the diffusion layer, and a second well region of the first conductivity type formed between the second main terminal region and the diffusion layer. The second well region has a impurity concentration higher than that of the first well region.
US09224848B2	Compound semiconductor device and manufacturing method of the same An AlGaN/GaN.HEMT includes, a compound semiconductor lamination structure; a p-type semiconductor layer formed on the compound semiconductor lamination structure; and a gate electrode formed on the p-type semiconductor layer, in which Mg being an inert element of p-GaN is introduced into both sides of the gate electrode at the p-type semiconductor layer, and introduced portions of Mg are inactivated.
US09224847B2	High electron mobility transistor and method of forming the same A High Electron Mobility Transistor (HEMT) includes a first III-V compound layer having a first band gap, and a second III-V compound layer having a second band gap over the first III-V compound layer. The second band gap is greater than the first band gap. A crystalline interfacial layer is overlying and in contact with the second III-V compound layer. A gate dielectric is over the crystalline interfacial layer. A gate electrode is over the gate dielectric. A source region and a drain region are over the second III-V compound layer, and are on opposite sides of the gate electrode.
US09224843B2	Formation of a high aspect ratio trench in a semiconductor substrate and a bipolar semiconductor device having a high aspect ratio trench isolation region Disclosed is a trench formation technique wherein a first etch process forms an opening through a semiconductor layer into a semiconductor substrate and then a second etch process expands the portion of the opening within the substrate to form a trench. However, prior to the second etch, a doped region is formed in the substrate at the bottom surface of the opening. Then, the second etch is performed such that an undoped region of the substrate at the sidewalls of the opening is etched at a faster etch rate than the doped region, thereby ensuring that the trench has a relatively high aspect ratio. Also disclosed is a bipolar semiconductor device formation method. This method incorporates the trench formation technique so that a trench isolation region formed around a collector pedestal has a high aspect ratio and, thereby so that collector-to-base capacitance Ccb and collector resistance Rc are both minimized.
US09224839B2	Method for manufacturing semiconductor device To provide a method for manufacturing a thin film transistor in which contact resistance between an oxide semiconductor layer and source and drain electrode layers is small, the surfaces of the source and drain electrode layers are subjected to sputtering treatment with plasma and an oxide semiconductor layer containing In, Ga, and Zn is formed successively over the source and drain electrode layers without exposure of the source and drain electrode layers to air.
US09224838B2	Method for manufacturing oxide semiconductor film and method for manufacturing semiconductor device An object is to provide an oxide semiconductor having stable electric characteristics and a semiconductor device including the oxide semiconductor. A manufacturing method of a semiconductor film by a sputtering method includes the steps of holding a substrate in a treatment chamber which is kept in a reduced-pressure state; heating the substrate at lower than 400° C.; introducing a sputtering gas from which hydrogen and moisture are removed in the state where remaining moisture in the treatment chamber is removed; and forming an oxide semiconductor film over the substrate with use of a metal oxide which is provided in the treatment chamber as a target. When the oxide semiconductor film is formed, remaining moisture in a reaction atmosphere is removed; thus, the concentration of hydrogen and the concentration of hydride in the oxide semiconductor film can be reduced. Thus, the oxide semiconductor film can be stabilized.
US09224836B2	Semiconductor device having vertical channel, resistive memory device including the same, and method of manufacturing the same A semiconductor device, a resistive memory device including the same, and a method of manufacturing the same are provided. The semiconductor device includes a pillar extending substantially perpendicular from a semiconductor substrate, the pillar including an inner portion and an outer portion surrounding the inner portion. A junction region is formed in an upper region and a lower region of the vertical pillar, and a gate surrounds the pillar. The inner portion of the pillar includes a semiconductor layer having a lattice constant that is larger than a lattice constant of the outer portion of the pillar.
US09224835B2	Method for producing SGT-including semiconductor device Isotropic etching is conducted by using SiN layers that are disposed on i-layers having an island structure on an i-layer substrate and have the same rectangular shape in a plan view as the i-layers. As a result, SiO2 layers each having a circular shape in a plan view are formed. Then the SiN layers are removed and the i-layers are etched by using the SiO2 layers as a mask to form Si pillars. Then surrounding gate MOS transistors are formed in the Si pillars.
US09224833B2	Method of forming a vertical device According to an exemplary embodiment, a method of forming a vertical device is provided. The method includes the following operations: providing a vertical structure over a substrate; forming a first dielectric layer over the vertical structure and the substrate; laterally etching a sidewall of the first dielectric layer; replacing a portion of the first dielectric layer over the vertical structure with a second dielectric layer; and etching a portion of the first dielectric layer to expose the lateral surface of the vertical structure.
US09224832B2	Semiconductor integrated circuit apparatus and method of manufacturing the same A semiconductor integrated circuit apparatus and a method of manufacturing the same are provided. The semiconductor integrated circuit apparatus includes a semiconductor substrate having an active island, a gate buried in a predetermined portion of the active island, a source and a drain formed at both sides of the gate, and a current blocking layer formed in the active island corresponding to a lower portion of the drain. When current flows in from the drain, the current blocking layer is configured to discharge the current into the inside of the semiconductor substrate through a lower portion of the source.
US09224831B2	Method of manufacturing an oxide semiconductor device and method of manufacturing a display device having the same Disclosed is a method of manufacturing an oxide semiconductor device, including: forming a gate electrode on a substrate; forming a gate insulating layer on the gate electrode; forming an active pattern on the gate insulating layer; forming a first mask pattern on the gate insulating layer and the active pattern; forming an insulating interlayer on the gate insulating layer, the active pattern, and the first mask pattern; forming a second mask pattern on the insulating interlayer, the second mask pattern comprising an opening that exposes a region where the first mask pattern is formed; forming contact holes exposing portions of the active pattern by patterning the insulating interlayer using the first mask pattern and the second mask pattern; and forming a source electrode and a drain electrode on the gate insulating layer by filling the contact holes, the drain electrode spaced apart from the source electrode.
US09224830B2	Transistor and method of fabricating the same A field effect transistor is provided. The transistor may include a source electrode and a drain electrode provided spaced apart from each other on a substrate and a ‘+’-shaped gate electrode provided on a portion of the substrate located between the source and drain electrodes.
US09224823B2	Semiconductor apparatus A semiconductor apparatus includes a drain region of a first-conductivity type, a drain electrode electrically coupled to the drain region, and a semiconductor layer of the first-conductivity type formed onto the drain region and having a first impurity concentration. The semiconductor apparatus further includes: a source region of the first-conductivity type formed on the semiconductor layer and having a second impurity concentration; a first source electrode electrically coupled to the source region; and a gate electrode formed via an insulating layer. The one end of the gate electrode is in a depth of the source region, and the other end is in a depth of the semiconductor layer or the drain region. A second source electrode is provided in the semiconductor layer under the gate electrodes via an insulating layer. A second spacing between the second source electrodes is larger than a first spacing between the gate electrodes.
US09224819B2	Semiconductor device and method for manufacturing the same A semiconductor device of an embodiment includes a semiconductor layer formed of a III-V group nitride semiconductor, a first silicon nitride film formed on the semiconductor layer, a gate electrode formed on the first silicon nitride film, a source electrode and a drain electrode formed on the semiconductor layer such that the gate electrode is interposed between the source electrode and the drain electrode, and a second silicon nitride film formed between the source electrode and the gate electrode and between the drain electrode and the gate electrode and having an oxygen atom density lower than that of the first silicon nitride film.
US09224817B2	Composite substrate of gallium nitride and metal oxide The present invention discloses a novel composite substrate which solves the problem associated with the quality of substrate surface. The composite substrate has at least two layers comprising the first layer composed of GaxAlyIn1-x-yN (0≦x≦1, 0≦x+y≦1) and the second layer composed of metal oxide wherein the second layer can be removed with in-situ etching at elevated temperature. The metal oxide layer is designed to act as a protective layer of the first layer until the fabrication of devices. The metal oxide layer is designed so that it can be removed in a fabrication reactor of the devices through gas-phase etching by reactive gas such as ammonia.
US09224815B2	Method of tuning doping concentration in III-V compound semiconductor through co-doping donor and acceptor impurities A method includes epitaxially growing a first III-V compound semiconductor, wherein the first III-V compound semiconductor is of p-type. The first III-V compound semiconductor is grown using precursors including a first precursor comprising Cp2Mg, and a second precursor comprising a donor impurity. A second III-V compound semiconductor is grown overlying and contacting the first III-V compound semiconductor. The second III-V compound semiconductor is of n-type.
US09224814B2	Process design to improve transistor variations and performance The present disclosure relates to a method of forming a transistor device having a carbon implantation region that provides for a low variation of voltage threshold, and an associated apparatus. The method is performed by forming a well region within a semiconductor substrate. The semiconductor substrate is selectively etched to form a recess within the well region. After formation of the recess, a carbon implantation is selectively performed to form a carbon implantation region within the semiconductor substrate at a position underlying the recess. An epitaxial growth is then performed to form one or more epitaxial layers within the recess at a position overlying the carbon implantation region. Source and drain regions are subsequently formed within the semiconductor substrate such that a channel region, comprising the one or more epitaxial layers, separates the source/drains from one another.
US09224809B2	Field effect transistor structure comprising a stack of vertically separated channel nanowires A field effect transistor structure comprises a source and a drain on a substrate, and a stack of n vertically separated channel nanowires isolated from the substrate and connecting the source and the drain, where n is an integer and 2≦n≦20. The channel nanowires collectively comprise at least two different thicknesses and/or at least two different dopant concentrations and/or at least two different semiconductor materials.
US09224806B2	Edge termination structure with trench isolation regions A semiconductor device includes a semiconductor body and an edge termination structure. The edge termination structure comprises a first oxide layer, a second oxide layer, a semiconductor mesa region between the first oxide layer and the second oxide layer, and a doped field region comprising a first section in the semiconductor mesa region, and a second section in a region below the semiconductor mesa region. The second section overlaps the first and the second oxide layers in the region below the semiconductor mesa region.
US09224805B2	Semiconductor devices with guard rings Semiconductor devices with guard rings are described. The semiconductor devices may be, e.g., transistors and diodes designed for high-voltage applications. A guard ring is a floating electrode formed of electrically conducting material above a semiconductor material layer. A portion of an insulating layer is between at least a portion of the guard ring and the semiconductor material layer. A guard ring may be located, for example, on a transistor between a gate and a drain electrode. A semiconductor device may have one or more guard rings.
US09224804B2	Guarding ring structure of a high voltage device and manufacturing method thereof The present invention provides a guarding ring structure of a semiconductor high voltage device and the manufacturing method thereof. The guarding ring structure comprises a first N type monocrystalline silicon substrate (3), a second N type monocrystalline silicon substrate (8), a discontinuous oxide layer (2), a metal field plate (1), a device region (9), multiple P+ type diffusion rings (5) and an equipotential ring (4). The second N type monocrystalline silicon substrate (8) is a single N type crystalline layer epitaxially formed on the first N type monocrystalline silicon substrate (3) and has lower doping concentration than the first N type monocrystalline silicon substrate (3). N type diffusion rings (6) are embedded in the inner side of the P+ type diffusion rings (5) and are fully depleted at zero bias voltage. The guarding ring structure can achieve the same withstand voltage with less area and design time.
US09224803B2	Formation of a high aspect ratio contact hole A small contact hole having a large aspect ratio is formed by employing a stop layer with a trench formed therein. A relatively large contact hole is formed above the trench, and the small contact hole is formed below the trench, using properties of the trench and the stop layer to limit the size of the small contact hole.
US09224802B2	Silicon carbide semiconductor device and method for manufacturing same Each of first to third impurity regions of a silicon carbide substrate has a portion located on a flat surface of a first main surface. On the flat surface, a gate insulating film connects the first and third impurity regions to each other. On the flat surface, a first main electrode is in contact with the third impurity region. A second main electrode is provided on a second main surface. A side wall insulating film covers a side wall surface of the first main surface. The side wall surface is inclined by not less than 50° and not more than 80° relative to a {000-1} plane. In this way, a leakage current is suppressed in a silicon carbide semiconductor device.
US09224801B2	Multilayer MIM capacitor An improved semiconductor capacitor and method of fabrication is disclosed. A MIM stack, comprising alternating first-type and second-type metal layers (each separated by dielectric) is formed in a deep cavity. The entire stack can be planarized, and then patterned to expose a first area, and selectively etched to recess all first metal layers within the first area. A second selective etch is performed to recess all second metal layers within a second area. The etched recesses can be backfilled with dielectric. Separate electrodes can be formed; a first electrode formed in said first area and contacting all of said second-type metal layers and none of said first-type metal layers, and a second electrode formed in said second area and contacting all of said first-type metal layers and none of said second-type metal layers.
US09224793B1	Display device with micro cover layer and manufacturing method for the same There is provided a flexible display having a plurality of innovations configured to allow bending of a portion or portions to reduce apparent border size and/or utilize the side surface of an assembled flexible display.
US09224792B2	Semiconductor device and manufacturing method thereof As a result of miniaturization of a pixel region associated with an improvement in definition and an increase in a substrate size associated with an increase in area, defects due to precision, bending, and the like of a mask used at the time of evaporation have become issues. A partition including portions with different thicknesses over a pixel electrode (also referred to as a first electrode) in a display region and in the vicinity of a pixel electrode layer is formed, without increasing the number of steps, by using a photomask or a reticle provided with an auxiliary pattern having a light intensity reduction function made of a diffraction grating pattern or a semi-transmissive film.
US09224788B2	Nonvolatile memory device and method for manufacturing same According to an embodiment, a nonvolatile memory device includes a first wiring extending to a first direction, a second wiring disposed on the first wiring in a second direction which is orthogonal to the first direction, a first insulating film provided between the first wiring and the second wiring, a bit line extending in the second direction, and a variable resistance film contacting an end portion of the first wiring, an end portion of the second wiring, and an end portion of the first insulating film. A dielectric constant of a center portion between the first and second wirings in the second direction is higher than at vicinities of the first and the second wirings. The variable resistance film is disposed between the bit line and the first wiring, between the bit line and the second wiring, and between the bit line and the first insulating film.
US09224784B2	Non-volatile memory devices and methods of fabricating the same A nonvolatile memory device is provided. The nonvolatile memory device comprises a plurality of impurity regions formed in a substrate, a first contact electrically connected to at least one of the impurity regions, a second contact electrically connected to at least one of the impurity regions, a first information storage portion formed at a first height from the substrate and electrically connected to the first contact, and a second information storage portion formed at a second height, which is different from the first height, from the substrate and electrically connected to the second contact.
US09224781B2	Structure of dielectric grid for a semiconductor device An image sensor device and a method for manufacturing the image sensor device are provided. An image sensor device includes a pixel region and a non-pixel region in a substrate. In the pixel region there is a plurality of sensor elements. The non-pixel region is adjacent to the pixel region and has no sensor element. Dielectric grids are disposed in the pixel region with a first dielectric trench between two adjacent dielectric grids. The first dielectric trench aligns to a respective sensor element. Second dielectric trenches are disposed in the non-pixel region.
US09224779B2	Imaging apparatus with sensor chip and separate signal processing chips An imaging apparatus includes a sensor chip, a substrate, upper and lower signal processing chips and connection boards. The sensor chip has pad electrodes to which electrical signals to be supplied to a pixel array are input. The substrate has first wiring patterns connected to signal lines, to which signals of the pixel array are output, and second wiring patterns connected to pad electrodes. The upper and lower signal processing chips have pad electrodes to which signals processed by signal processing circuits are output. The connection boards have FPC wiring electrically connected to the pad electrodes and FPC wiring electrically connected to the second wiring patterns formed on the substrate.
US09224778B2	Solid-state image sensor and electronic device There is provided a solid-state image sensor including a semiconductor substrate in which a plurality of pixels are arranged, and a wiring layer stacked on the semiconductor substrate and formed in such a manner that a plurality of conductor layers having a plurality of wirings are buried in an insulation film. In the wiring layer, wirings connected to the pixels are formed of two conductor layers.
US09224776B2	Image pickup element, image pickup apparatus, and image pickup system An image pickup element includes a first pixel, a second pixel, and a third pixel that share one microlens, a first boundary that is provided between the first pixel and the second pixel, and a second boundary that is provided between the first pixel and the third pixel, and when a charge amount of the first pixel is saturated, a first charge amount from the first pixel to the second pixel via the first boundary is larger than a second charge amount from the first pixel to the third pixel via the second boundary.
US09224769B2	Pixel device, and radiation detecting module and apparatus having the same A pixel device having an improved energy resolution includes at least one photodiode and at least one voltage supply unit for applying a voltage to the photodiode. The pixel device includes a voltage storage unit and a voltage adjusting unit. In a precharge mode, the voltage storage unit stores a first anode voltage. In a sensing mode, the voltage adjusting unit adjusts a second anode voltage of the anode of the photodiode to be the same as the first anode voltage stored in the voltage storage unit.
US09224767B2	Method for driving photoelectric conversion apparatus In a photoelectric conversion apparatus including a plurality of pixels arranged in a matrix, each pixel including a photoelectric conversion unit, first and second holding units that hold electric charge, a first transfer unit that connects the photoelectric conversion unit and the first holding unit, a second transfer unit that connects the first and second holding units, and a third transfer unit that connects the photoelectric conversion unit and a power supply, each pixel is controlled so that the potential of the third transfer unit for electric charge held in the photoelectric conversion unit is higher than that of the first transfer unit at least during a charge accumulation period of the pixel, and thereafter, the potential of the third transfer unit is higher than that of the photoelectric conversion unit while the potentials of the first and second transfer units are lower than that of the photoelectric conversion unit.
US09224763B2	Display device and method of manufacturing the same Provided are a display device and a method of manufacturing of the display device. The display device includes a substrate subjected to a primary preprocess; a conductor formed on the substrate and subjected to a secondary preprocess; and an insulating layer formed on the substrate and the conductor, in which the primary preprocess is performed for a surface energy of the first substrate higher than a first reference value and the secondary preprocess is performed for a surface energy of the conductor lower than a second reference value.
US09224759B2	Pixel array substrate structure, method of manufacturing pixel array substrate structure, display device, and electronic apparatus A pixel array substrate structure includes: first and second planarizing films sequentially stacked on a substrate where a circuit unit is formed; and a relay wire formed between the first and second planarizing films, in which the relay wire electrically connects a first contact portion formed on the first planarizing film and connected to the circuit unit with a second contact portion formed at a position different from the first contact portion when seen from above, on the second planarizing film.
US09224755B2	Flexible active matrix display High resolution active matrix structures are fabricated using techniques applicable to flexible substrates. A backplane layer including active semiconductor devices is formed using a semiconductor-on-insulator substrate. The substrate is thinned using a layer transfer technique or chemical/mechanical processing. Driver transistors are formed on the semiconductor layer of the substrate along with additional circuits that provide other functions such as computing or sensing. Contacts to passive devices such as organic light emitting diodes may be provided by heavily doped regions formed in the handle layer of the substrate and then isolated. A gate dielectric layer may be formed on the semiconductor layer, which functions as a channel layer, or the insulator layer of the substrate may be employed as a gate dielectric layer.
US09224752B1	Double-source semiconductor device A semiconductor device may include a first source layer, a first insulating layer located over the first source layer, and a first stacked structure located over the first insulating layer. The semiconductor device may include first channel layers passing through the first stacked structure and the first insulating layer. The semiconductor device may include a second source layer including a first region interposed between the first source layer and the first insulating layer and a second region interposed between the first channel layers and the first insulating layer.
US09224750B1	Multi-layer memory array and manufacturing method of the same A memory array includes a plurality of ridge-shaped multi-layer stacks extending along a first direction, and a hard mask layer formed on top of the plurality of ridge-shaped multi-layer stacks. The hard mask layer includes a plurality of stripes vertically aligned with the plurality of ridge-shaped multi-layer stacks, respectively, a plurality of bridges connecting adjacent ones of the stripes along a second direction orthogonal to the first direction, and a plurality of hard mask through holes between the plurality of bridges and the plurality of stripes.
US09224749B1	Method for filling polysilicon gate in semiconductor devices, and semiconductor devices Present example embodiments relate generally to semiconductor devices and methods of fabricating a semiconductor device comprising forming an insulating base layer over a surface of a substrate. The method further comprises forming a multilayer over the insulating base layer, the multilayer having conducting and insulating layers. The method further comprises etching a pattern in the multilayer and forming a charge storage layer over the patterned multilayer. The method further comprises forming a protective silicon layer over the charge storage layer, followed by performing a heat treatment process.
US09224746B2	Inverted-T word line and formation for non-volatile storage A non-volatile memory system, comprising non-volatile storage device with word lines having an inverted T-shape over floating gates. The inverted T-shape shape has a wider bottom portion and a thinner top portion. The thinner top portion increases the separation between adjacent word lines relative to the separation between the wider bottom portions. An air gap may separate adjacent word lines. The thinner top portion of the word lines increases the path length between adjacent word lines. The likelihood of word line to word line short may be decreased by reducing the electric field between adjacent word lines.
US09224744B1	Wide and narrow patterning using common process A NAND flash memory chip includes narrow word lines that are directly patterned from sidewall spacers and larger structures that are patterned from sidewall spacers with covering material. Sidewall spacers with covering material define wider features than sidewalls alone. Closely spaced sidewalls with covering material define large structures such as contact pads and select lines.
US09224743B2	Nonvolatile memory device A nonvolatile memory device includes a first active region and a second active region separated from each other; a floating gate crossing the first active region, and disposed such that an end thereof overlaps with the second active region; a selection gate crossing the first active region, and disposed side by side with and coupled to the floating gate; a dielectric layer disposed between the floating gate and the selection gate, wherein a stack of the dielectric layer, the floating gate and the selection gate forms a first capacitor in a horizontal structure; a well region disposed in the second active region and coupled to the floating gate, wherein a stack of the well region and the floating gate forms a second capacitor in a vertical structure; and a contact commonly coupled to the well region and the selection gate.
US09224742B2	Method for providing electrical connections to spaced conductive lines An integrated circuit and a method of formation provide a contact area formed at an angled end of at least one linearly extending conductive line. In an embodiment, conductive lines with contact landing pads are formed by patterning lines in a mask material, cutting at least one of the material lines to form an angle relative to the extending direction of the material lines, forming extensions from the angled end faces of the mask material, and patterning an underlying conductor by etching using said material lines and extension as a mask. In another embodiment, at least one conductive line is cut at an angle relative to the extending direction of the conductive line to produce an angled end face, and an electrical contact landing pad is formed in contact with the angled end face.
US09224741B2	Semiconductor devices including vertical transistors, electronic systems including the same and methods of manufacturing the same The semiconductor device includes word lines on a semiconductor substrate, common gates connected to each of the word lines and vertically disposed in the semiconductor substrate, buried bit lines intersecting the word lines at a non-right angle in a plan view, and a pair of vertical transistors sharing each of the common gates. The pair of vertical transistors is disposed on both sides of one of the word lines. Further, the pair of vertical transistors is electrically connected to the two adjacent buried bit lines. Electronic systems including the semiconductor device and related methods are also provided.
US09224740B1	High-K dielectric structure for deep trench isolation A method of deep trench isolation which includes: forming a semiconductor on insulator (SOI) substrate comprising a bulk semiconductor substrate, a buried insulator layer and a semiconductor layer on the buried insulator layer (SOI layer), one portion of the SOI substrate having a dynamic random access memory buried in the bulk semiconductor substrate (eDRAM) and a deep trench fin contacting the eDRAM and a second portion of the SOI substrate having an SOI fin in contact with the buried insulator layer; conformally depositing sequential layers of oxide, high-k dielectric material and sacrificial oxide on the deep trench fin and the SOI fin; stripping the sacrificial oxide over the SOI fin to expose the high-k dielectric material over the SOI fin; stripping the exposed high-k dielectric material over the SOI fin to expose the oxide layer over the SOI fin.
US09224736B1	Structure and method for SRAM FinFET device The present disclosure provides an embodiment of a fin-like field-effect transistor (FinFET) device. The device includes a first fin structure disposed over an n-type FinFET (NFET) region of a substrate. The first fin structure includes a silicon (Si) layer, a silicon germanium oxide (SiGeO) layer disposed over the silicon layer and a germanium (Ge) feature disposed over the SiGeO layer. The device also includes a second fin structure over the substrate in a p-type FinFET (PFET) region. The second fin structure includes the silicon (Si) layer, a recessed silicon germanium oxide (SiGeO) layer disposed over the silicon layer, an epitaxial silicon germanium (SiGe) layer disposed over the recessed SiGeO layer and the germanium (Ge) feature disposed over the epitaxial SiGe layer.
US09224733B2	Semiconductor structure and method of fabrication thereof with mixed metal types A semiconductor structure includes a first PMOS transistor element having a gate region with a first gate metal associated with a PMOS work function and a first NMOS transistor element having a gate region with a second metal associated with a NMOS work function. The first PMOS transistor element and the first NMOS transistor element form a first CMOS device. The semiconductor structure also includes a second PMOS transistor that is formed in part by concurrent deposition with the first NMOS transistor element of the second metal associated with a NMOS work function to form a second CMOS device with different operating characteristics than the first CMOS device.
US09224730B2	Semiconductor device In a semiconductor device including an IGBT and a freewheeling diode W≧2×L1/K1/2, where K≧2.5, W denotes a distance between the divided first regions, L1 denotes a thickness of the drift layer, k1 denotes a parameter that depends on structures of the insulated gate bipolar transistor and the freewheeling diode, and K denotes a value calculated by multiplying the parameter k1 by a ratio of a snapback voltage to a built-in potential between the deep well layer and the drift layer.
US09224720B2	Light-emitting device including light-emitting diode element that is mounted on outer portion of electrode In an aspect of the present invention, a light-emitting device includes a substrate; a first electrode and a second electrode arranged on an upper surface of the substrate with a gap between the first electrode and the second electrode, the gap being positioned at a central portion of the upper surface of the substrate; a first light-emitting diode element electrically mounted on the first electrode; and a second light-emitting diode element electrically mounted on the second electrode, wherein the first electrode includes a first inner portion and a first outer portion that are two equal area portions divided at a center line of the first electrode, and the first light-emitting diode element is mounted on the first outer portion of the first electrode, and wherein the second electrode includes a second inner portion and a second outer portion that are two equal area portions divided at a center line of the second electrode, and the second light-emitting diode element is mounted on the second outer portion of the second electrode.
US09224719B2	Light emitting semiconductor A light emitting semiconductor element includes at least two electrically conductive units, at least a light emitting semiconductor die and a light transmitting layer. A groove is located between the two electrically conductive units. The light emitting semiconductor die is cross over the electrically conductive units. The light transmitting layer covers the light emitting semiconductor and partially fills within the groove for linking the electrically conductive units.
US09224715B2	Methods of forming semiconductor die assemblies Semiconductor assemblies, structures, and methods of fabrication are disclosed. A coating is formed on an electrically conductive pillar. The coating, which may be formed from at least one of a silane material and an organic solderability protectant material, may bond to a conductive material of the electrically conductive pillar and, optionally, to other metallic materials of the electrically conductive pillar. The coating may also bond to substrate passivation material, if present, or to otherwise-exposed surfaces of a substrate and a bond pad. The coating may be selectively formed on the conductive material. Material may not be removed from the coating after formation thereof and before reflow of the solder for die attach. The coating may isolate at least the conductive material from solder, inhibiting solder wicking or slumping along the conductive material and may enhance adhesion between the resulting bonded conductive element and an underfill material.
US09224714B2	Semiconductor device having a through-substrate via Semiconductor devices are described that include a via that extends only partially through the substrate. Through-substrate vias (TSV) furnish electrical interconnectivity to electronic components formed in the substrates. In implementations, the semiconductor devices are fabricated by first bonding a semiconductor wafer to a carrier wafer with an adhesive material. The semiconductor wafer includes an etch stop disposed within the wafer (e.g., between a first surface a second surface of the wafer). One or more vias are formed through the wafer. The vias extend from the second surface to the etch stop.
US09224713B2	Semiconductor device and manufacturing method thereof In one embodiment, a semiconductor device includes a first semiconductor chip and a second semiconductor chip stacked on the first semiconductor chip. The first and second semiconductor chips are electrically connected via first bump connection parts. Stopper projections and bonding projections are provided at least one of the first and second semiconductor chips. The stopper projections are in contact with the other of the first and second semiconductor chips in an unbonded state. The bonding projections are bonded to the first and second semiconductor chips.
US09224712B2	3D bond and assembly process for severely bowed interposer die An interposer structure containing a first set of solder balls is placed in proximity to a vacuum distribution plate which has a planar contact surface and a plurality of openings located therein. A vacuum is then applied through the openings within the vacuum distribution plate such that the first set of solder balls are suspended within the plurality of openings and the interposer structure conforms to the planar contact surface of the vacuum distribution plate. A semiconductor chip containing a second set of solder balls is tacked to a surface of the interposer structure. A substrate is then brought into contact with a surface of the interposer structure containing the first set of solder balls, and then a solder reflow and underfill processes can be performed. Warping of the interposer structure is substantially eliminated using the vacuum distribution plate mentioned above.
US09224710B2	Semiconductor package and method of fabricating the same Provided is a semiconductor package, the semiconductor package includes a first substrate, a first semiconductor chip which is mounted on the first substrate, a second substrate which is disposed on the first semiconductor chip, at least one second semiconductor chip which is disposed on the second substrate; and a plurality of wires which are in contact with the first substrate and the second substrate to connect the first substrate and the second substrate to each other.
US09224709B2	Semiconductor device including an embedded surface mount device and method of forming the same Embodiments of the present disclosure include devices and methods of forming the same. An embodiment is a device including a solder resist coating over a first side of a substrate, an active surface of a die bonded to the first side of the substrate by a first connector, and a surface mount device mounted to the die by a second set of connectors, the surface mount device being between the die and the first side of the substrate, the surface mount device being spaced from the solder resist coating.
US09224707B2	Substrate for semiconductor package and process for manufacturing A semiconductor package substrate includes a core portion, an upper circuit layer and a plurality of pillars. The pillars are disposed on and project upward from the upper circuit layer. Top surfaces of the pillars are substantially coplanar. The pillars provide an electrical interconnect to a semiconductor die. Solder joint reliability as between the substrate and the semiconductor die is improved.
US09224706B2	Terminal structure, and semiconductor element and module substrate comprising the same A preferred terminal structure comprises a base material; an electrode formed on the base material; an insulating covering layer formed on the base material and on the electrode and having an opening exposing at least part of the electrode; an under bump metal layer containing Ni, formed in a region in the opening on the electrode so that an upper surface of the metal layer is at a position lower than an upper surface of the insulating covering layer in a peripheral edge portion of the opening; and a dome-shaped bump containing Sn and Ti, formed in a region in the opening on the under bump metal layer, wherein an end portion of a boundary between the under bump metal layer and the bump is in contact with an inner wall of the opening portion in the insulating covering layer.
US09224705B2	Semiconductor device A semiconductor device includes a substrate having a plurality of electrodes and a plurality of leads that are connected to the electrodes and a semiconductor element that is mounted on the substrate. The semiconductor element has a rectangular shape including a long side, a short side, and a corner portion, and has bumps connected to the electrodes. An underfill is filled between the substrate and the semiconductor element and extends on the substrate around the semiconductor element. An overcoat covers the leads on the substrate. At least one of the plurality of leads that is connected to the electrode corresponding to the bump arranged nearest to the corner portion along the long side of the semiconductor element has at least two successive bent portions that are bent in the same direction and is laid out toward the short side of the semiconductor element in a plan view.
US09224702B2	Three-dimension (3D) integrated circuit (IC) package A three-dimension (3D) integrated circuit (IC) package is disclosed. The 3D IC package has a package substrate having a surface. At least one integrated circuit (IC) chip with or without suppressing a transient voltage and at least one transient voltage suppressor (TVS) chip are arranged on the surface of the substrate and electrically connected with each other. The IC chip is independent from the TVS chip. The IC chip and the TVS chip stacked on each other are arranged on the package substrate. Alternatively, the IC chip and the TVS chip are together arranged on an interposer formed on the package substrate.
US09224701B2	Protection of an integrated circuit against attacks An integrated circuit, including: a semiconductor substrate of a first conductivity type; a plurality of regions of the first conductivity type vertically extending from the surface of the substrate, each of the regions being laterally delimited all along its periphery by a region of the second conductivity type; and a device for detecting a variation of the substrate resistance between each region of the first conductivity type and an area for biasing the substrate to a reference voltage.
US09224700B2	Package of environmental sensitive element A package of an environmental sensitive element including a flexible substrate, an environmental sensitive element, at least one flexible sacrificial layer and a packaging structure is provided. The environmental sensitive element is disposed on the flexible substrate. The flexible sacrificial layer is disposed on the environmental sensitive element, wherein the environmental sensitive element includes a plurality of first thin films and the flexible sacrificial layer includes a plurality of second thin films. The bonding strength between two adjacent second thin films is equal to or lower than the bonding strength between two adjacent first thin films. Further, the packaging structure covers the environmental sensitive element and the flexible sacrificial layer.
US09224699B2	Method of manufacturing semiconductor package having magnetic shield unit A method of manufacturing a semiconductor package having a magnetic shield function is provided. The method includes forming cracks in a lattice structure on an active surface in which electrode terminals are formed; grinding a back surface of a wafer facing the active surface, bonding a tape on the active surface of the wafer, expanding the tape such that the wafer on the tape is divided as semiconductor chips, forming a shield layer on surfaces of the semiconductor chips and the tape, cutting the shield layer between the semiconductor chips and individualizing as each of the semiconductor chips which has a first shield pattern formed on back surface and sides, bonding the semiconductor chips on a substrate, and forming a second shield pattern on each of the active surfaces of the semiconductor chips, wherein the semiconductor chips and the substrate are physically and electrically connected by a bonding wire.
US09224694B2	Traceable integrated circuits and production method thereof An embodiment of a method for producing traceable integrated circuits includes forming on a wafer of semiconductor material functional regions for implementing specific functionalities of corresponding integrated circuits, forming at least one seal ring around each functional region of the corresponding integrated circuit, and forming on each integrated circuit at least one marker indicative of information of the integrated circuit. Forming on each integrated circuit at least one marker may include forming the at least one marker on at least a portion of the respective seal ring that is visible.
US09224687B2	Programmable fuse structure and methods of forming Methods of forming an electrically programmable fuse (e-fuse) structure and the e-fuse structure are disclosed. One embodiment of an e-fuse structure includes: a silicon structure; a pair of silicide contact regions overlying the silicon structure; and a silicide link overlying the silicon structure and connecting the pair of silicide regions, the silicide link having a depth less than a depth of each of the pair of silicide contact regions.
US09224686B1	Single damascene interconnect structure A single damascene interconnect structure which includes a first layer of a first dielectric material having a first filled opening that has a sidewall layer which includes a compound of a metal, O, and Si such that the metal is Mn, Ti and Al, and with Cu filling the first filled opening. The compound is in direct contact with the first dielectric material. Also included is a second layer that includes a second dielectric material having a second filled opening that has a barrier layer of a refractory material with Cu filling the second filled opening. The first layer is adjacent to the second layer and the first filled opening is aligned with the second filled opening so that one of the first and second filled openings is a via and the other of the first and second filled openings is a trench.
US09224685B1	Shielded metal-oxide-metal (MOM) capacitor structure A metal-oxide-metal (MOM) capacitor structure is disclosed. The MOM capacitor includes a plurality of layers, each layer having a plurality of electrodes. The plurality of electrodes, separated by oxide layers, forms a first plate and a second plate of the MOM capacitor. The plurality of electrodes on each of the layers is coupled to a plurality of electrodes on an adjacent layer through a plurality of vias. A shield layer is coupled to each of the electrodes that forms the second plate of the MOM capacitor on each of the plurality of layers.
US09224682B2	Semiconductor device A semiconductor device includes a first semiconductor and second semiconductor chips mounted over a package substrate. The first semiconductor chip includes a plurality of first bonding pads which are arranged along one side of the first semiconductor chip. The second semiconductor chip includes a plurality of second bonding pads and at least one third bonding pad. The second bonding pads are arranged along one side of the second semiconductor chip and for coupling respectively to the first bonding pads by wire-bonding coupling. The at least one third bonding pad is for enabling relay coupling of a corresponding second bonding pad to at least one predetermined first bonding pad which is arranged along the second bonding pads and included in the first bonding pads without crossing another wire in the wire-bonding coupling.
US09224678B2	Method and apparatus for connecting packages onto printed circuit boards Methods and apparatus are disclosed for attaching the integrated circuit (IC) packages to printed circuit boards (PCBs) to form smooth solder joints. A polymer flux may be provided in the process to mount an IC package to a PCB. The polymer flux may be provided on connectors of the IC package, or provided on PCB contact pad and/or pre-solder of the PCB. When the IC package is mounted onto the PCB, the polymer flux may cover a part of the connector, and may extend to cover a surface of the molding compound on the IC package. The polymer flux may completely cover the connector as well. The polymer flux delivers a fluxing component that facilitates smooth solder joint formation as well as a polymer component that offers added device protection by encapsulating individual connectors. The polymer component may be an epoxy.
US09224674B2	Packaged semiconductor die with bumpless die-package interface for bumpless build-up layer (BBUL) packages A packaged semiconductor die with a bumpless die-package interface and methods of fabrication are described. For example, a semiconductor package includes a substrate having a land side with a lowermost layer of conductive vias. A semiconductor die is embedded in the substrate and has an uppermost layer of conductive lines, one of which is coupled directly to a conductive via of the lowermost layer of conductive vias of the substrate. In another example, a semiconductor package includes a substrate having a land side with a lowermost layer of conductive vias. A semiconductor die is embedded in the substrate and has an uppermost layer of conductive lines with a layer of conductive vias disposed thereon. At least one of the conductive lines is coupled directly to a conductive via of the semiconductor die which is coupled directly to a conductive via of the lowermost layer of conductive vias of the substrate.
US09224672B1	Thermal management of electronic components An electronic device comprises a multi-layer printed circuit board. On the printed circuit board there is installed electronic components and a metal frame that encloses at least part of the electronic components. A layer of bonded anisotropic conductive film is disposed on the frame and the electronic components. The layer connects thermally a sheet of metal foil on the frame and on the electronic components. The sheet of metal foil covers the electronic component and the metal frame.
US09224671B2	III-N device structures and methods A III-N device is described with a III-N layer, an electrode thereon, a passivation layer adjacent the III-N layer and electrode, a thick insulating layer adjacent the passivation layer and electrode, a high thermal conductivity carrier capable of transferring substantial heat away from the III-N device, and a bonding layer between the thick insulating layer and the carrier. The bonding layer attaches the thick insulating layer to the carrier. The thick insulating layer can have a precisely controlled thickness and be thermally conductive.
US09224669B2	Method and structure for wafer level packaging with large contact area A method to provide a wafer level package with increasing contact pad area comprising the steps of forming a first packaging layer on wafer top surface, grinding the wafer back surface and etch through holes, depositing a metal to fill the through holes and covering wafer backside, cutting through the wafer from wafer backside forming a plurality of grooves separating each chip then depositing a second packaging layer filling the grooves and covering the wafer back metal, reducing the first packaging layer thickness to expose the second packaging layer filling the grooves and forming a plurality of contact pads overlaying the first packaging layer thereafter cutting through the second packaging layer in the grooves to form individual package.
US09224668B2	Semiconductor HEMT device with stoichiometric silicon nitride layer A semiconductor device includes: a compound semiconductor stack structure including a plurality of compound semiconductor layers stacked over a semiconductor substrate; and a first insulating film covering the surface of the compound semiconductor stack structure, the first insulating film being a silicon nitride film including, on the top side, a first region containing nitrogen element in excess of the stoichiometric ratio.
US09224666B2	Circuit arrangement for a thermally conductive chip assembly and a manufacturing method The circuit arrangement according to the invention provides a substrate (10), a connecting element (18) and a chip (16). The substrate (10) provides at least a partial metallisation (11) on its surface. The connecting element (18) is applied to the metallisation (11). The chip (16) is applied to the connecting element (18). The connecting element (18) provides an electrically non-conductive glass layer (14), which is applied directly to the metallisation (11), and an adhesive layer (15) between the chip (16) and the glass layer (14).
US09224664B2	Bio-implantable hermetic integrated ultra high density device An implantable bio-compatible integrated circuit device and methods for manufacture thereof are disclosed herein. The device includes a substrate having a recess. An input/output device including at least one bio-compatible electrical contact is coupled to the substrate in the recess. A layer of hermetic bio-compatible, hermetic insulator material is deposited on a portion of the input/output device. An encapsulating layer of bio-compatible material encapsulates at least a portion of the implantable device, including the input/output device. At least one bio-compatible electrical contact of the input/output device is then exposed. The encapsulating layer and the layer of bio-compatible, hermetic insulator material form a hermetic seal around the at least one exposed bio-compatible electrical contact.
US09224655B2	Methods of removing gate cap layers in CMOS applications One illustrative method disclosed herein includes the steps of forming a masking layer that covers a P-type transistor and exposes at least a gate cap layer of an N-type transistor, performing a first etching process through the masking layer to remove a portion of the gate cap of the N-type transistor so as to thereby define a reduced thickness gate cap layer for the N-type transistor, removing the masking layer, and performing a common second etching process on the P-type transistor and the N-type transistor that removes a gate cap layer of the P-type transistor and the reduced thickness gate cap of the N-type transistor.
US09224653B2	Integrated circuit and method of forming the integrated circuit with improved logic transistor performance and SRAM transistor yield In an integrated circuit that includes an NMOS logic transistor, an NMOS SRAM transistor, and a resistor, the gate of the SRAM transistor is doped at the same time that the resistor is doped, thereby allowing the gate of the logic transistor to be separately doped without requiring any additional masking steps.
US09224651B2	Method for plating a semiconductor package lead A method of forming a packaged semiconductor device includes loading an array of package sites in position for saw singulation, saw singulating the array of package sites, and performing a non-electrolytic plating operation on exposed lead tips of individual packages from the array of package sites as the array of package sites is saw singulated.
US09224647B2	Semiconductor device and method of forming TSV interposer with semiconductor die and build-up interconnect structure on opposing surfaces of the interposer A semiconductor device has a substrate with first and second opposing surfaces. A plurality of conductive vias is formed partially through the first surface of the substrate. A first conductive layer is formed over the first surface of the substrate electrically connected to the conductive vias. A first semiconductor die is mounted over the first surface of the substrate. The first semiconductor die and substrate are mounted to a carrier. An encapsulant is deposited over the first semiconductor die, substrate, and carrier. A portion of the second surface of the substrate is removed to expose the conductive vias. An interconnect structure is formed over a surface of the substrate opposite the first semiconductor die. A second semiconductor die can be stacked over the first semiconductor die. A second semiconductor die can be mounted over the first surface of the substrate adjacent to the first semiconductor die.
US09224645B2	Silicon carbide semiconductor device and method for manufacturing the same A silicon carbide semiconductor device includes: a silicon carbide layer, a reaction layer which is in contact with the silicon carbide layer, a conductive oxidation layer which is in contact with the reaction layer, and an electrode layer which is formed over the reaction layer with the conductive oxidation layer interposed therebetween. A thickness of the conductive oxidation layer falls within a range of 0.3 nm to 2.25 nm.
US09224644B2	Method to control depth profiles of dopants using a remote plasma source Methods and apparatus for processing using a remote plasma source are disclosed. The apparatus includes an outer chamber enclosing a substrate support, a remote plasma source, and a showerhead. A substrate heater can be mounted in the substrate support. A transport system moves the substrate support and is capable of positioning the substrate. The remote plasma source may be used to provide a plasma surface treatment or as a source to incorporate dopants into a pre-deposited layer.
US09224639B2	Method to etch cu/Ta/TaN selectively using dilute aqueous Hf/hCl solution Copper can be etched with selectivity to Ta/TaN barrier liner and SiC hardmask layers, for example, to reduce the potential copper contamination. The copper film can be recessed more than the liner to further enhance the protection. Wet etch solutions including a mixture of HF and HCl can be used for selective etching copper with respect to the liner material, for example, the copper film can be recessed between 2 and 3 nm, and the barrier liner film can be recessed between 1.5 and 2 nm.
US09224637B1	Bi-level dry etching scheme for transistor contacts Contact holes of different depths for source, drain, and gate connections are formed by common etch steps using a relatively low etch rate material over the gate electrode and a relatively high etch rate material over the source and drain terminals to provide similar etch times for all three holes so that risk of over-etching is reduced.
US09224635B2	Connections for memory electrode lines Subject matter disclosed herein may relate to word line electrodes and/or digit line electrodes in a cross-point array memory device. One or more word line electrodes may be configured to form a socket area to provide connection points to drivers and/or other circuitry that may be located within a footprint of an array of memory cells.
US09224634B2	Method of manufacturing a semiconductor device with an isolation region and a device manufactured by the method A method of manufacturing a semiconductor device includes forming trench isolation structures, exposing some of the trench isolation structures 28 to leave others 30 masked, and then selectively etching a buried layer to form a cavity 32 under an active device region 34. The active device region 34 is supported by support regions in the exposed trenches 28. The buried layer may be a SiGe layer on a Si substrate.
US09224633B2	Method for manufacturing a composite wafer having a graphite core, and composite wafer having a graphite core According to an embodiment, a composite wafer includes a carrier substrate having a graphite layer and a monocrystalline semiconductor layer attached to the carrier substrate.
US09224631B2	Multiple bonding layers for thin-wafer handling Multiple bonding layer schemes that temporarily join semiconductor substrates are provided. In the inventive bonding scheme, at least one of the layers is directly in contact with the semiconductor substrate and at least two layers within the scheme are in direct contact with one another. The present invention provides several processing options as the different layers within the multilayer structure perform specific functions. More importantly, it will improve performance of the thin-wafer handling solution by providing higher thermal stability, greater compatibility with harsh backside processing steps, protection of bumps on the front side of the wafer by encapsulation, lower stress in the debonding step, and fewer defects on the front side.
US09224629B2	Compliant bipolar micro device transfer head with silicon electrodes A compliant bipolar micro device transfer head array and method of forming a compliant bipolar micro device transfer array from an SOI substrate are described. In an embodiment, a compliant bipolar micro device transfer head array includes a base substrate and a patterned silicon layer over the base substrate. The patterned silicon layer may include first and second silicon interconnects, and first and second arrays of silicon electrodes electrically connected with the first and second silicon interconnects and deflectable into one or more cavities between the base substrate and the silicon electrodes.
US09224628B2	Reduced capacity carrier, transport, load port, buffer system In accordance with an exemplary embodiment a semiconductor workpiece processing system having at least one processing tool for processing semiconductor workpieces, a container for holding at least one semiconductor workpiece therein for transport to and from the at least one processing tool and a first transport section elongated and defining a travel direction. The first transport section has parts, that interface the container, supporting and transporting the container along the travel direction to and from the at least one processing tool. The container is in substantially continuous transport at a substantially constant rate in the travel direction, when supported by the first transport section. A second transport section is connected to the at least one process tool for transporting the container to and from the at least one processing tool.
US09224611B2	Semiconductor structure and manufacturing method and operating method of the same A semiconductor structure and a manufacturing method and an operating method of the same are provided. The semiconductor structure includes a substrate, a main body structure, a first dielectric layer, a first conductive strip, a second conductive strip, a second dielectric layer, and a conductive structure. The main body structure is formed on the substrate, and the first dielectric layer is formed on the substrate and surrounding two sidewalls and a top portion of the main body structure. The first conductive strip and the second conductive strip are formed on two sidewalls of the first dielectric layer, respectively. The second dielectric layer is formed on the first dielectric layer, the first conductive strip, and the second conductive strip. The conductive structure is formed on the second dielectric layer.
US09224606B2	Method of fabricating semiconductor device isolation structure A semiconductor device including reentrant isolation structures and a method for making such a device. A preferred embodiment comprises a substrate of semiconductor material forming at least one isolation structure having a reentrant profile and isolating one or more adjacent operational components. The reentrant profile of the at least one isolation structure is formed of substrate material and is created by ion implantation, preferably using oxygen ions applied at a number of different angles and energy levels. In another embodiment the present invention is a method of forming an isolation structure for a semiconductor device performing at least one oxygen ion implantation.
US09224603B2	Method of fabricating power transistor with protected channel A transistor includes a substrate, a well formed in the substrate, a drain including a first impurity region implanted in the well, a source including a second impurity region implanted in the well and spaced apart from the first impurity region, a channel for current flow from the drain to the source, and a gate to control a depletion region between the source and the drain. The channel has an intrinsic breakdown voltage, and the well, drain and source are configured to provide an extrinsic breakdown voltage lower than the intrinsic breakdown voltage and such that breakdown occurs in a breakdown region in the well located outside the channel and adjacent the drain or the source.
US09224602B2	Sub-second annealing lithography techniques Techniques are disclosed for sub-second annealing a lithographic feature to, for example, tailor or otherwise selectively alter its profile in one, two, or three dimensions. Alternatively, or in addition to, the techniques can be used, for example, to smooth or otherwise reduce photoresist line width/edge roughness and/or to reduce defect density. In some cases, the sub-second annealing process has a time-temperature profile that can effectively change the magnitude of resist shrinkage in one or more dimensions or otherwise modify the resist in a desired way (e.g., smooth the resist). The techniques may be implemented, for example, with any type of photoresist (e.g., organic, inorganic, hybrid, molecular photoresist materials) and can be used in forming, for instance, processor microarchitectures, memory circuitry, logic arrays, and numerous other digital/analog/hybrid integrated semiconductor devices.
US09224596B2	Methods of fabricating thick semi-insulating or insulating epitaxial gallium nitride layers Semiconductor device structures and methods of fabricating semiconductor devices structures are provided that include a semi-insulating or insulating GaN epitaxial layer on a conductive semiconductor substrate and/or a conductive layer. The semi-insulating or insulating GaN epitaxial layer has a thickness of at least about 4 μm. GaN semiconductor device structures and methods of fabricating GaN semiconductor device structures are also provided that include an electrically conductive SiC substrate and an insulating or semi-insulating GaN epitaxial layer on the conductive SiC substrate. The GaN epitaxial layer has a thickness of at least about 4 μm. GaN semiconductor device structures and methods of fabricating GaN semiconductor device structures are also provided that include an electrically conductive GaN substrate, an insulating or semi-insulating GaN epitaxial layer on the conductive GaN substrate, a GaN based semiconductor device on the GaN epitaxial layer and a via hole and corresponding via metal in the via hole that extends through layers of the GaN based semiconductor device and the GaN epitaxial layer.
US09224595B2	Semiconductor optical element array and method of manufacturing the same The present invention provides a semiconductor optical element array including: a semiconductor substrate having a main surface in which a plurality of concave portions is formed; a mask pattern that is formed on the main surface of the semiconductor substrate and includes a plurality of opening portions provided immediately above the plurality of concave portions; a plurality of fine columnar crystals that is made of a group-III nitride semiconductor grown from the plurality of concave portions to the upper side of the mask pattern through the plurality of opening portions; an active layer that is grown on each of the plurality of fine columnar crystals; and a semiconductor layer covering each of the active layers.
US09224592B2	Method of etching ferroelectric capacitor stack A method of etching a ferroelectric capacitor stack structure including conductive upper and lower plates with a ferroelectric material, such as lead-zirconium-titanate (PZT), therebetween, with each of these layers defined by the same hard mask element. The stack etch process involves a plasma etch with a fluorine-bearing species as an active species in the etch of the conductive plates, and a non-fluorine-bearing chemistry for etching the PZT ferroelectric material. An example of the fluorine-bearing species is CF4. Endpoint detection can be used to detect the point at which the upper plate etch reaches the PZT, at which point the gases in the chamber are purged to avoid etching the PZT material with fluorine. A steeper sidewall angle for the capacitor structure can be obtained.
US09224589B2	Method for eliminating contact bridge in contact hole process A method for eliminating contact bridge in a contact hole process is disclosed, wherein a cleaning menu comprising a multi-step adaptive protective thin film deposition process is provided, so that a stack adaptive protective thin film is formed on the sidewall of the chamber of the HDP CVD equipment. The stack adaptive protective thin film has good adhesivity, compactness and uniformity to protect the sidewall of the chamber of the HDP CVD equipment from being damaged by the plasma, and avoid the generation of defect particles, thereby improving the HDP CVD technical yield and eliminating the contact bridge phenomenon in the contact hole process.
US09224587B2	Apparatus and method for thermal assisted desorption ionization systems The present invention is directed to a method and device to desorb an analyte using heat to allow desorption of the analyte molecules, where the desorbed analyte molecules are ionized with ambient temperature ionizing species. In various embodiments of the invention a current is passed through a mesh upon which the analyte molecules are present. The current heats the mesh and results in desorption of the analyte molecules which then interact with gas phase metastable neutral molecules or atoms to form analyte ions characteristic of the analyte molecules.
US09224586B2	Apparatuses and methods for portable mass spectrometry Methods and apparatuses for portable mass spectrometry are disclosed. The apparatuses comprise at least one source of ionized analyte, at least one frequency scanning subsystem, at least one detector, and optionally at least one vacuum pump, and are portable. In some embodiments, the apparatuses comprise multiple sources of ionized analyte and/or are configured to obtain mass spectra of a large analyte, such as analyte with an m/z ratio of at least 105, or analyte with a molecular weight of at least 105 Da, as well as mass spectra of small molecule analyte. In some embodiments, the methods comprise obtaining mass spectra with a portable apparatus described above.
US09224585B2	Dose-rate measuring system In order to obtain a dose-rate measuring system that reduces an influence of an electromagnetic induction noise acting around an ionization chamber and a signal converter, a cabinet of the ionization chamber, shields of cables, a cabinet of the signal converter, and a cabinet of a measuring unit are connected in series, and a single-point ground is performed at the measuring unit, and other units except the grounded measuring unit are insulated from the earth, and moreover, a heatproof insulating material having water repellency is coated on a fixed portion of the ionization chamber, whereby the ionization chamber is electrically insulated from a chassis at a fixed side, and the heatproof insulating material having water repellency is coated on a connecting portion of a connector for connecting a cable to another cable, after a waterproof process is performed on the connecting portion by using a bonding tape.
US09224581B2	Parallel plate reactor for uniform thin film deposition with reduced tool foot-print A capacitive-coupled parallel plate plasma enhanced chemical vapor deposition reactor includes a gas distribution unit that is integrated in an RF electrode and is formed with a gas outlet. The parallel plate reactor is configured so that layers with high thickness homogeneity and quality can be produced. The capacitively coupled parallel plate plasma enhanced vapor deposition reactor has gas distribution unit with a multiple-stage showerhead constructed in such a way that it provides an independent adjustment of gas distribution and gas emission profile of the gas distribution unit.
US09224573B2	System and method for X-ray source weight reduction The invention provides an X-ray source having a generator for generating an electron beam, an accelerator for accelerating the generated electron beam in a desired direction, one or more magnetic elements for transporting portions of the electron beam in a more than one desired direction, and a shaped target made from a material having an atomic number lying within a predetermined range of values, the transported parts of the electron beam producing a fan beam of X rays upon striking the shaped target.
US09224569B2	Multi species ion source A high brightness ion source with a gas chamber includes multiple channels, wherein the multiple channels each have a different gas. An electron beam is passed through one of the channels to provide ions of a certain species for processing a sample. The ion species can be rapidly changed by directing the electrons into another channel with a different gas species and processing a sample with ions of a second species. Deflection plates are used to align the electron beam into the gas chamber, thereby allowing the gas species in the focused ion beam to be switched quickly.
US09224567B2	Resin molded product A resin molded product comprises a fiber to which a metal heating element is attached, a first attaching part that standing upright on a main body of the resin molded product to attach and fix one part of the metal heating element, a second attaching part standing upright on the main body correspondingly to the first attaching part to attach and fix the other part of the metal heating element, and a rib extended continuously and integrally from the first attaching part to the second attaching part and standing upright on the main body, wherein a gate position is provided in the vicinity of the first attaching part on a straight line connecting the first attaching part to the second attaching part in a back side of the resin molded product to set an orientation of the fiber formed in the rib in the extending direction of the rib.
US09224563B2	Electronic part and electronic control unit A main body of an electronic part is formed in a rectangular pillared shape having a first and a second axial end surface. A first electrode is formed on the first axial end surface electrically and mechanically connected to a first wiring pattern formed on a board surface of a printed board. A second electrode is formed on the second axial end surface, to which one end of a fuse terminal is electrically connected. The other end of the fuse terminal is connected to a second wiring pattern of the printed board or a wiring member which is formed as an independent member from the printed board. A cut-off portion is formed in a connecting portion of the fuse terminal.
US09224561B2	Systems and methods for delaying actuation of a relay A system includes a relay, an actuation circuit, and an actuation delay circuit. The relay is coupled to a source of an input voltage or current waveform. The relay includes an actuation coil. The actuation circuit detects a peak or valley of a rectified voltage ripple waveform. The rectified voltage ripple waveform is generated from the input voltage or current waveform. The actuation circuit also causes an actuation voltage to be provided to the actuation coil. The actuation delay circuit delays the actuation circuit from providing the actuation voltage. The actuation delay circuit is configured based on the peak or valley of the rectified voltage ripple waveform. The actuation delay generated by the actuation delay circuit causes the relay to begin allowing current to flow to a load device at a time coincident with a zero-crossing time value of the input voltage or current waveform.
US09224558B2	Polarity independent switching device for carrying and disconnecting direct current A polarity-independent switching device for carrying and disconnecting high DC currents has a gastight, encapsulated, electrically insulating housing which can be filled with an insulating gas, and at least one pair of contacts disposed in the housing and made up of a fixed contact and a mobile contact. The two contacts are in contact with each other in a switched-on state of the switching device and are not in contact in a switch-off state of the switching device. An arc driver arrangement is included which generates a magnetic field at least in the region of the pair of contacts, as well as a first arc routing arrangement with which an arc produced between the contacts is guided in a first current direction to a quenching area arranged at a distance from the contacts.
US09224557B2	Switch device A switch device has an upper case, a hollow tube that is vertically opened and provided on an upper surface of the upper case, an operation knob that is swingably supported by the tube so as to cover an upper opening of the tube, and a lower case that is fitted in the upper case. The tube has a front sidewall and a back sidewall. The front sidewall and the back sidewall are opposed in front-back direction with the upper opening interposed therebetween. A drain groove extending along the back sidewall is formed at an upper end of the back sidewall. One of or both ends in a lengthwise direction of the drain groove are opened.
US09224556B2	Switch A switch has a base having a frame integrally formed on a periphery of an upper face of the base, a fixed contact formed on an inner side face of the frame, and a support protrusion that protrudes from the upper face of the base that is integrally formed so as to expose a common fixed contact, an electrically conductive spring member whose connecting part arranged at a center of a spiral spring is nonrotatably supported by the support protrusion and that extends a driving piece from the free end of the spiral spring, and an actuating lever whose one end is rotatably supported by the upper face of the base and that integrally forms an actuating trigger that presses the driving piece of the electrically conductive spring member.
US09224544B2	Trace structure for the touch panel and electrical testing method A trace structure for a touch panel having a transparent substrate with a touch sensing region and a border region surrounding the touch sensing region, the trace structure including: a plurality of traces disposed on the transparent substrate and within the border region; a plurality of bonding pads disposed in the border region of the transparent substrate, wherein each bonding pad has a first side and a second side, and the first side of each bonding pad is connected to a corresponding trace of the plurality of traces; and at least two trace extending portions extended toward an outer edge of the border region from the second side of two of the plurality of bonding pads.
US09224543B2	Ceramic electronic component including glass coating layer A ceramic electronic component includes a ceramic body, a plurality of internal electrodes provided in the ceramic body and including ends exposed on a surface of the ceramic body; a glass coating layer covering a portion of the surface of the ceramic body on which the internal electrodes are exposed; and an electrode terminal provided directly on the glass coating layer and including a plating film. The glass coating layer is made of a glass medium in which metal powder particles are dispersed. The internal electrodes project from the surface of the ceramic body into the glass coating layer without passing through the glass coating layer. The metal powder particles define conduction paths electrically connecting the internal electrodes with the electrode terminal.
US09224537B2	Electrode and/or capacitor formation Technologies are generally described related to the design, manufacture and/or use of electrodes, capacitors, or any other similar component. In an example, a system effective to form a component may include a container effective to receive graphite nanoplatelets and effective to receive ruthenium chloride. The system may include a coating device in communication with the container. The system may further include a processor arranged in communication with the container and the coating device. The processor may be configured to control the container effective to combine the ruthenium chloride with the graphite nanoplatelets under reaction conditions sufficient to form a ruthenium oxide graphite nanoplatelets nanocomposite. The processor may further be configured to control the coaling device effective to coat a support with the ruthenium oxide graphite nanoplatelets nanocomposite.
US09224536B2	Variable capacitance device A variable capacitance device that achieves a desired capacitance even when factors causing varied capacitances are generated is configured such that a capacitance detection pulse signal is applied from a capacitance detection signal generation unit to a driving capacitor and a reference capacitor of a MEMS mechanical unit. The device voltage of the driving capacitor based on the capacitance detection signal and a driving voltage is applied to the inverting input terminal of a comparator. The device voltage of the reference capacitor based on the capacitance detection signal and the driving voltage is applied to the non-inverting input terminal of the comparator. The comparator generates a comparison output signal including “Hi” and “Low” values from the difference between these device voltages, and applies the output signal to a driving voltage generation unit. The driving voltage generation unit increases or decreases the driving voltage based on the comparison output signal.
US09224535B2	High power electrical distribution system A high power electrical distribution system for distribution high power to at least one consumer arranged on a rotatable element. The distribution system includes at least one high frequency alternating current HFAC generator configured to generate HFAC. A rotary power transformer is connected to the at least one HFAC generator. The rotary power transformer includes a stationary part and a rotatable part and is configured to receive HFAC from the at least one HFAC generator and to couple HFAC electrical energy from the stationary part to the rotatable part. At least one high power distribution bus is located on the rotatable element and is configured to receive HFAC from the rotary power transformer and to distribute HFAC to the at least one consumer.
US09224533B2	Wireless electric power transmission apparatus A wireless electric power transmission apparatus as an embodiment of the present disclosure includes: two antennas having the ability to transmit electric power by a non-contact method via resonant magnetic coupling, one of the two antennas being a series resonant circuit, of which the resonant frequency is fs, the other antenna being a parallel resonant circuit, of which the resonant frequency is fp; an oscillator which is connected to one of the two antennas that transmits RF power; and a control section which controls a transmission frequency according to the magnitude of the electric power to be transmitted from one of the two antennas to the other. fs/fp is set to be a value that is less than one.
US09224530B2	Power supply apparatus A power supply apparatus including a first magnetic core, a second magnetic core having a shape symmetrical to a shape of the first magnetic core, a third magnetic core between the first and second magnetic cores, a first coil wound around at least one of the first and third magnetic cores, and a second coil wound around at least one of the second and third magnetic cores, wherein a material for the third magnetic core is different from a material for the first magnetic core or the second magnetic core.
US09224526B1	Magnet construction by combustion driven high compaction A neo magnet is constructed by mixing a neo magnet powder with about 1% added two-part electrical insulating resin powder. The mixed powders are placed in a die and precompacted under about 20 tsi when filling a combustion chamber with a pressurized combustible gas and air mixture. The gas is ignited and rapidly drives a punch in to the die forming a solid magnet having a density of 6.1 g/cm3 or more. The solid magnet is heat treated to cure the resin and is coated with a polymer, zinc, aluminum or gold. Before precompacting a lubricated core rod in place in the die producing a thin-walled, neo ring magnet having a length to wall thickness aspect ratio.
US09224525B2	Over-current protection device and circuit board structure containing the same An over-current protection device, which can be surface-mounted and stand upright on a circuit board and withstand 60 to 600 volts, comprises a PTC device, first and second electrodes. The PTC device is a laminated structure comprising first and second conductive layers and a PTC material layer. The first and second conductive layers are in physical contact with first and second planar surfaces of the PTC material layer, respectively. The first electrode is disposed on the first conductive layer. The second electrode is disposed on the second conductive layer and is separated from the first electrode. The first electrode, the second electrode and the PTC device commonly form an end surface which is substantially perpendicular to the first and second planar surfaces. The first electrode and the second electrode at the end surface serve as interfaces electrically connecting to the circuit board.
US09224520B2	Cover assemblies and methods for covering electrical cables and connections A cold-applied cover assembly for environmentally protecting an electrical substrate includes a cold-applied polymeric cover member configured to surround the electrical substrate, and a gas transmission barrier (GTB) layer. The GTB layer is configured to surround the electrical substrate to define a protected chamber containing the electrical substrate and to inhibit ingress of a gas through the cover assembly into the protected chamber.
US09224516B2	Battery tab and packaging frame design Improved battery packaging and constructions for batteries, particularly thin, flat-profile packaged batteries are provided. The battery packaging constructions may eliminate the need for soldering by providing current collector tabs coated by electrically conductive adhesive tape such as z-axis conductive tape and may provide support for current collector tabs and a regular battery perimeter by providing supportive battery packaging and/or frame materials. Better fabrication results, particularly when the batteries are used in smart cards, RFID tags, and medical devices.
US09224514B2	Cathode active material for lithium ion battery, cathode for lithium ion battery, and lithium ion battery There is provided a cathode active material for a lithium ion battery having good battery properties. The cathode active material for a lithium ion battery is represented by a composition formula: LixNi1−yMyO2+αwherein M is one or more selected from Sc, Ti, V, Cr, Mn, Fe, Co, Cu, Zn, Ga, Ge, Al, Bi, Sn, Mg, Ca, B, and Zr; 0.9≦x≦1.2; 00.1, and has a moisture content measured by Karl Fischer titration at 300° C. of 1100 ppm or lower.
US09224510B2	Handling system for a container for nuclear fuel assembly A handling system including a tool for lifting the container, wherein the lifting tool includes a lifting carrier to be suspended and a member for gripping the container comprising removable devices for fastening the container onto the gripping member.According to one aspect of the invention, the gripping member is mounted so that it may rotate on the lifting carrier about a substantially horizontal rotation axis when the lifting carrier is suspended.
US09224509B2	Container, device and method for encapsulating a fuel rod or a fuel rod portion in a gas-tight manner A container, a device, and a method encapsulate a fuel rod or a fuel rod portion in a gas-tight manner. The container has a hollow cylindrical container part which is closed at the free ends of the container part in a fluid-tight manner by a respective single-piece closure stopper. The closure stopper is provided with a channel that fluidically connects the flushing chamber of the container part to the exterior exclusively in an intermediate position, which is assumed prior to reaching an end position during the assembly process and in which the closure stopper additionally projects out of the container part by an axial length compared to the end position of the closure stopper.
US09224508B2	Radiation resistant medical gown Disclosed is a radiation resistant medical gown. More specifically, the invention relates to a medical gown that incorporates a radiation resistant and/or dissipating material into select portions of the garment. The gown further includes an upstanding collar that protects the wearer's thyroid from radiation exposure. The collar includes a Velcro® type fastener that prevents the collar from sagging. The gown is both sterile and disposable.
US09224507B2	Systems and methods for managing shared-path instrumentation and irradiation targets in a nuclear reactor Systems and methods permit discriminate access to nuclear reactors. Systems provide penetration pathways to irradiation target loading and offloading systems, instrumentation systems, and other external systems at desired times, while limiting such access during undesired times. Systems use selection mechanisms that can be strategically positioned for space sharing to connect only desired systems to a reactor. Selection mechanisms include distinct paths, forks, diverters, turntables, and other types of selectors. Management methods with such systems permits use of the nuclear reactor and penetration pathways between different systems and functions, simultaneously and at only distinct desired times. Existing TIP drives and other known instrumentation and plant systems are useable with access management systems and methods, which can be used in any nuclear plant with access restrictions.
US09224500B2	Systems and methods for testing and assembling memory modules Embodiments described herein relate to systems and methods for testing and assembling memory modules. In at least one embodiment, the method comprises: assembling a memory module, the memory module comprising at least one memory device having one or more defective memory locations; wherein the assembling comprises storing the data that identifies the one or more defective memory locations on the memory device in a persistent store on the memory module, wherein the memory module comprises a microprocessor and persistent memory associated with the microprocessor, and wherein the persistent store on the memory module comprises the persistent memory associated with the microprocessor.
US09224497B2	One time programmable memory cell capable of reducing leakage current and preventing slow bit response The present invention provides a one time programmable (OTP) memory cell including a select gate transistor, a following gate transistor, and an antifuse varactor. The select gate transistor has a first gate terminal, a first drain terminal, a first source terminal, and two first source/drain extension areas respectively coupled to the first drain terminal and the first source terminal. The following gate transistor has a second gate terminal, a second drain terminal, a second source terminal coupled to the first drain terminal, and two second source/drain extension areas respectively coupled to the second drain terminal and the second source terminal. The antifuse varactor has a third gate terminal, a third drain terminal, a third source terminal coupled to the second drain terminal, and a third source/drain extension area coupled with the third drain terminal and the third source terminal for shorting the third drain terminal and the third source terminal.
US09224491B1	Average voltage band detection and use for tuning of voltages in ASICS The timing and power consumption of controller circuits are is dependent on Process, Voltage, and Temperature. If the controller ASIC can measure the average voltage level during run-time, then firmware can use this information to tune the voltages for optimal speed/power performance. A voltage detector generates an output of, for example, 3 bits, where each state of the three bit bus represents a voltage band. These bits can then be used by the firmware to trim the appropriate regulators to boost/lower the voltages. This can be done for both the core voltage and I/O voltages. The firmware can be further optimized to take into account the states of temperature detectors and process detectors along with voltage band detector to optimize the system performance.
US09224490B1	Voltage switch circuit A voltage switch circuit includes plural transistors, a first control circuit and a second control circuit. The first transistor has a source terminal connected to a first voltage source and a gate terminal connected to a node b1. The second transistor has a source terminal connected to a drain terminal of the first transistor, a gate terminal receiving an enabling signal and a drain terminal connected to a node b2. The third transistor has a source terminal connected to the node b2, a gate terminal connected to a second voltage source and a drain terminal connected to an output terminal. The first control circuit is connected to the node b1. The second control circuit is connected to the output terminal.
US09224486B1	Control gate driver for use with split gate memory cells A circuit for driving a control gate of a split-gate nonvolatile memory cell may include a switched current source; a first transistor having a current electrode coupled to the switched current source and a control electrode coupled to a voltage source; a second transistor having a current electrode coupled to a second node of the switched current source, and a control electrode coupled to a third voltage source; a third transistor having a control electrode coupled to the second transistor, a current electrode coupled to the first transistor and a fourth switched voltage source; and a fourth transistor having a current electrode coupled to the first switched voltage source, a control electrode coupled to the switched current source, and a second current electrode coupled to the second transistor at a driver voltage node, wherein a voltage level at the driver voltage node is operable to drive the control gate.
US09224479B1	Threshold voltage adjustment in solid state memory A method is disclosed for setting or modifying a threshold voltage in a NAND flash memory, using an optimization method and based on an error, such as stored in a threshold voltage table. In an embodiment, a method is provided to optimize the read voltage on a NAND flash memory in order to minimize the errors on the NAND flash memory in the fewest reads operations as possible. Advantageously, the method of the present disclosure is more reliability as the method minimizes a Raw Bit Error Rate (RBER) on the NAND flash memory. In an embodiment, a NAND controller adjusts an existing cell read threshold voltage for a selected cell, using an iterative optimization method, based on a difference between first and second error rates, or a difference between first and second probabilities, to generate an adjusted cell read threshold voltage.
US09224478B2	Temperature-based adaptive erase or program parallelism A method includes, in one implementation, performing a memory operation to place memory cells of a memory array to a first logic state using a voltage of a charge pump. A portion of the operation is performed on the memory cells using the voltage of the charge pump. A temperature of the memory array is compared to a threshold. If the temperature is above a reference level, a load on the charge pump is reduced by providing the voltage to only a reduced number of memory cells.
US09224475B2	Structures and methods for making NAND flash memory A NAND flash memory chip includes wide openings in an inter-poly dielectric layer through which gaps are later etched to define structures such as select gates. Such select gates are asymmetric, with inter-poly dielectric on a side adjacent to a memory cell and no inter-poly dielectric on a side away from a memory cell. Gaps etched through such openings may also define peripheral devices.
US09224473B1	Word line repair for 3D vertical channel memory A memory device includes a plurality of stacks of conductive strips alternating with insulating strips, including at least a bottom plane of conductive strips, a plurality of intermediate planes of conductive strips, a top plane of conductive strips, and an additional intermediate plane. A plurality of vertical structures is arranged orthogonally to the plurality of stacks. Memory elements are disposed in interface regions at cross-points between side surfaces of the plurality of stacks and the plurality of vertical structures. A stack of linking elements is connected to conductive strips in respective intermediate planes and to the additional intermediate plane. Decoding circuitry is coupled to the plurality of intermediate planes and the additional intermediate plane, and is configured to replace an intermediate plane indicated to be defective with the additional intermediate plane.
US09224472B2	Memory device and driving method of the memory device A memory device which can reduce power consumption and a driving method thereof are disclosed. In a memory element including an inverter and the like, a capacitor for holding data and a capacitor switching element for controlling store and release of charge in the capacitor are provided. The capacitor switching element is designed so that the off-state current is sufficiently low. Therefore, even when power supply of the inverter is stopped after charge corresponding to data is stored in the capacitor, data can be held for a long period of time. In order to return data, potentials of output and input terminals of the inverter are set to a precharge potential, then charge in the capacitor is released, and power is supplied to the inverter. A switching element for supplying the precharge potential may be provided.
US09224469B2	Semiconductor memory device and memory system A semiconductor memory device according to an embodiment includes a memory cell array and a control circuit. The memory cell array includes first lines and second lines intersecting each other, a third line commonly connecting to the first lines, memory cells disposed at intersections of the first lines and the second lines, respectively. The control circuit is configured to execute a state determining operation detecting a voltage of the third line, and adjust a voltage applied to the first lines and the second lines during a resetting operation or a setting operation based on a result of the state determining operation. The resetting operation raises a resistance value of the variable resistance element. The setting operation lowers the resistance value of the variable resistance element.
US09224468B2	Resistive memory and associated operation method A resistive memory includes a resistive memory cell, a main transistor and an auxiliary transistor. The drain of the main transistor and the drain of the auxiliary transistor are coupled to one end of the resistive memory cell. When the resistive memory cell is programmed, the main transistor is turned on and the auxiliary transistor is turned off. When the resistive memory cell is erased, the main transistor and the auxiliary transistor are turned on.
US09224466B1	Dual capacitor sense amplifier and methods therefor Methods and apparatus are provided for reading a selected memory cell of a memory array using a sense amplifier that includes a first capacitor and a second capacitor. The selected memory cell is coupled to a bit line and a selected word line. A first noise voltage is generated on the first capacitor, and a selected memory cell voltage and a second noise voltage are generated on the second capacitor. The first noise voltage is an estimate of the second noise voltage. An output signal value is generated proportional to a difference between the selected memory cell voltage and a reference voltage, and a difference between the first noise voltage and second noise voltage. The output signal value is used to determine a data value for the selected memory cell.
US09224463B2	Compact volatile/non-volatile memory cell A memory device includes at least one memory cell having a first transistor coupled between a first storage node and a first supply voltage; a second transistor coupled between a second storage node and the first supply voltage and a single resistance switching element. Control terminals of the first and second transistors are coupled to the second and first storage nodes respectively. The single resistive switching element is coupled in series with the first transistor and is programmable to have one of first and second resistances. The first storage node is coupled to a first access line via a third transistor connected to said first storage node, and the second storage node is coupled to a second access line via a fourth transistor connected to the second storage node.
US09224462B2	Resistive memory device having defined or variable erase unit size A resistive memory device that simultaneously erases memory cells connected to selected word line(s) included in an erase unit. The erase unit includes fewer word lines than are included in a memory block of the resistive memory device. However, erase verification may nonetheless be performed on a block basis.
US09224459B1	Memory device and method of initializing memory device According to one embodiment, a memory device includes a semiconductor layer connected between a first conductive line and one end of a third conductive line, resistance change elements connected between second conductive lines and the third conductive line respectively, a select FET having a select gate electrode, and using the semiconductor layer as a channel, and a control circuit changing a condition of initialization of each of non-completed elements in which the initialization is not completed among the resistance change elements based on a number of completed elements in which the initialization is completed among the resistance change elements.
US09224456B2	Setting operating parameters for memory cells based on wordline address and cycle information Disclosed is an apparatus and method for adjusting operating parameters in a storage device. A controller in a solid state drive monitors current operating conditions of the drive's flash memory, and when the flash memory has been subjected to a predetermined number of program/erase cycles one or more stored bias values are retrieved from a storage location based on the wordline(s) associated with a current memory operation. Parameters of the memory operation are then adjusted based on the retrieved bias values, and the memory operation is performed using the adjusted parameters.
US09224446B2	Multi-port memory circuit, accessing method and compiler A memory circuit includes first and second word lines, a plurality of memory cells and a timing controller. Each memory cell includes a first access port and a second access port. The first access port is coupled to the first word line and configured to be enabled by a first word line signal on the first word line. The second access port is coupled to the second word line and configured to be enabled by a second word line signal on the second word line. The timing controller is configured to receive a timing select signal and to control a time delay between the first word line signal and the second word line signal to be different in response to different first and second states of the timing select signal.
US09224444B1	Method and apparatus for VT invariant SDRAM write leveling and fast rank switching A method, non-transitory computer readable medium and apparatus for synchronizing a clock signal data path, a write strobe signal data path and a write data signal data path are disclosed. The method determines an amount of phase shift between the clock signal data path and the write strobe signal data path and between the clock signal data path and the write data signal data path, gates a clock signal to generate strobe clock signals that are phase shifted by at least one phase shift, applies a fine phase shift to the strobe clock signals where the strobe clock signals have an overall phase shift that is approximately equal to the amount of phase shift, and synchronizes a launch of the clock signal data path, the write strobe signal data path, and the write data signal data path using the strobe clock signals with the overall phase shift.
US09224443B2	Semiconductor devices and electronic systems including the same Semiconductor devices are provided. The semiconductor device includes an internal clock generator and an internal strobe signal generator. The internal clock generator generates an internal clock signal having a frequency which is higher than that of an input clock signal according to a phase difference between the input clock signal generated from an external device and a first input control signal. The internal strobe signal generator generates an internal strobe signal having a frequency which is higher than that of an input strobe signal according to a phase difference between the input strobe signal generated from the external device and a second input control signal.
US09224436B2	Apparatuses including a memory array with separate global read and write lines and/or sense amplifier region column select line and related methods Apparatuses and methods for memory arrays with separate global read and write lines and/or sense amplifier region column select lines are disclosed. An example apparatus includes first and second memory sections, and further includes a sense amplifier region. A memory section includes a word line extending in a first direction and a digit line extending in a second direction, and the sense amplifier region is disposed between the first and second memory sections. The sense amplifier region includes a sense amplifier coupled to the digit line, a local input/output (LIO) line, a column select circuit coupled to the sense amplifier, and a column select line. The column select line extends in the first direction and is configured to provide a column select signal to the column select circuit. Capacitance of a LIO line may be reduced by coupling fewer sense amplifiers of a group to the LIO line.
US09224430B2	Devices, methods, and systems supporting on unit termination The present disclosure includes devices, methods, and systems supporting on unit termination. A number of embodiments include a number of memory units, wherein a memory unit includes termination circuitry, and a memory unit does not include termination circuitry.
US09224425B2	Time stamped imagery assembly for course performance video replay Embodiments of the present invention address deficiencies of the art in respect to video imagery assembly for course oriented activities and provide a method, system and computer program product for time stamped imagery assembly for course performance video replay. In an embodiment of the invention, a method for time stamped imagery assembly can include acquiring different images from different cameras disposed about an activity course traversed by a moving object and time stamping each of the different images. The method also can include repeatedly acquiring position and time stamp data for the moving object as the moving object traverses the activity course. Finally, the method can include assembling the different images acquired from the different cameras in a single sequence of images with positions in the sequence determined by correlating time stamps for each of the images with the acquired position and time stamp data of the moving object.
US09224423B1	Re-writing of initial sectors in a storage device Technologies are described herein for rewriting the initial sectors of a data track on a recording medium of a storage device in order to reduce the occurrence of initial sector weak writes and/or adjacent track erasure. Upon receiving a write command at the storage device, a plurality of sequential segments on the recording media targeted by the write command is determined. The plurality of sequential segments is written to the recording medium, and then data is rewritten to an initial segment of the plurality of sequential segments.
US09224421B2	Non-decision directed magnetoresistive asymetry estimation Systems and methods for magnetoresistive asymmetry estimation may include, but are not limited to, operations for: receiving a magnetic read head transducer output; computing a mean value of the magnetic read head transducer output; computing a median value of the magnetic read head transducer output; and applying a correction coefficient to a magnetic read head detector input according to at least the mean value of the magnetic read head transducer output and the median value of the magnetic read head transducer output.
US09224418B2	Accessing protected content on an optical disc Embodiments for validating an optical disc storing protected content are provided. In one example, a method comprises receiving the optical disc in an optical disc drive, detecting with a signal detector a signal while the optical disc is at rest, spinning the optical disc, determining, with the signal detector, one or more of an electrical and magnetic effect on the signal resulting from the spinning of the optical disc, and validating the optical disc if the one or more of the electrical and magnetic effect meets a predetermined condition.
US09224417B2	Casing for receiving an extractible hard drive and including a rocking cam for extracting said hard drive A casing is provided which includes a housing for receiving an extractable element and an extractor member mounted in the vicinity of the housing. The extractor member includes a tilting cam having a bearing end extending into the housing and an actuation end co-operating with a slidable lever having a drivable first end and a second end provided with a recess having the actuation end of the cam passing therethrough. The actuation end of the tilting cam includes a rear edge provided with an indentation and resilient return means holding said rear edge pressed against a rear end of the recess so that the rear end of the recess drops into the indentation at the end of insertion of the extractable element.
US09224411B1	Magnetic layers having granular exchange tuning layer An apparatus includes a first magnetic layer including a plurality of grains. The first magnetic layer has a first anisotropy value. The apparatus also includes a second magnetic layer including a plurality of grains. The second magnetic layer has a second anisotropy value that is different than the first anisotropy value. The apparatus also includes an exchange tuning layer including a plurality of grains and located between the first and second magnetic layers. The exchange tuning layer has stronger inter-granular exchange coupling than the first and second magnetic layers. The exchange tuning layer has an anisotropy value less than the first and second anisotropy values.
US09224398B2	Compressed sampling audio apparatus Apparatus comprising at least one processor and at least one memory including computer code, the at least one memory and the computer code configured to with the at least one processor cause the apparatus to at least perform: transforming an audio signal into a sparse domain signal, the sparse domain signal representing the audio signal; transforming the sparse domain signal into a measurement domain signal; determining a sampling pattern dependent on the measurement domain signal; and measuring the measurement domain signal dependent on the sampling pattern.
US09224394B2	Service oriented speech recognition for in-vehicle automated interaction and in-vehicle user interfaces requiring minimal cognitive driver processing for same A system and method for implementing a server-based speech recognition system for multi-modal automated interaction in a vehicle includes receiving, by a vehicle driver, audio prompts by an on-board human-to-machine interface and a response with speech to complete tasks such as creating and sending text messages, web browsing, navigation, etc. This service-oriented architecture is utilized to call upon specialized speech recognizers in an adaptive fashion. The human-to-machine interface enables completion of a text input task while driving a vehicle in a way that minimizes the frequency of the driver's visual and mechanical interactions with the interface, thereby eliminating unsafe distractions during driving conditions. After the initial prompting, the typing task is followed by a computerized verbalization of the text. Subsequent interface steps can be visual in nature, or involve only sound.
US09224391B2	Method and system for automatically providing linguistic formulations that are outside a recognition domain of an automatic speech recognition system A method for automatically providing a hypothesis of a linguistic formulation that is uttered by users of a voice service based on an automatic speech recognition system and that is outside a recognition domain of the automatic speech recognition system. The method includes providing a constrained and an unconstrained speech recognition from an input speech signal, identifying a part of the constrained speech recognition outside the recognition domain, identifying a part of the unconstrained speech recognition corresponding to the identified part of the constrained speech recognition, and providing the linguistic formulation hypothesis based on the identified part of the unconstrained speech recognition.
US09224390B2	Coordinated deep tagging of media content with community chat postings Embodiments of the present invention address deficiencies of the art in respect to deep tagging of media content and provide a method, system and computer program product for coordinating deep tagging of media content with chat postings. In an embodiment of the invention, a method for coordinating deep tagging of media content with chat postings can be provided. The method can include monitoring a group chat of participants co-browsing media content, identifying a token in the group chat appearing a threshold number of times within a temporal window, and creating a deep tag in the media content in association with a portion of the media content played back concurrently with the temporal window.
US09224388B2	Sound recognition method and system A method for generating an anti-model of a sound class is disclosed. A plurality of candidate sound data is provided for generating the anti-model. A plurality of similarity values between the plurality of candidate sound data and a reference sound model of a sound class is determined. An anti-model of the sound class is generated based on at least one candidate sound data having the similarity value within a similarity threshold range.
US09224380B2	Audio device, and methods for designing and making the audio devices An audio device is provided with a plurality of Helmholtz resonators. Whereas a cross-sectional area of a neck and a volume of a cavity communicating with the neck are same between at least two of the Helmholtz resonators, a ratio of minimum and maximum values of distances between a center of gravity of the cross section of the neck and individual points defining an outer periphery of the cross section is different between said at least two of the Helmholtz resonators.
US09224376B1	Electric violin An electric violin comprises a head, a body and a bowstring module; the head is attached to the body via a connecting rod. The head includes a display screen and several string-buttons mounted at a side of the display screen. Each string-button is corresponding in position with one line of string-related instructions. The body includes a main CPU module, a data storage device, an audio circuit, a sound amplifier and a speaker therein. The body includes a control button and a bowstring-holding mechanism. The bowstring-holding mechanism includes a mounting groove in the body and a signal interface mounted in the bottom of the mounting groove. The bowstring module includes a base and a playing element; the playing element and the connection terminal are mounted on the base; the base is attached to the mounting groove by snap joint; and the connection terminal is connected with the signal interface.
US09224373B2	Musical notation systems for guitar fretboard, visual displays thereof, and uses thereof There are provided visual displays for graphically showing on a visual representation of a guitar fretboard a location relationship between a given chord and its chord tones as well as for graphically showing on a visual representation of a guitar fretboard a location relationship between a given position and its scale tones. The present disclosure also relates to a method for visually expressing, on a visual representation of a guitar fretboard, the location relationship between a given chord, its chord tones and its scale tones, in a given key; a music notation method for representing a location relationship between a given chord, its chord tones and the scale tones of the scale to which said given chord belong, on a visual representation of at least a portion of a guitar fretboard; and visual display for expressing musical harmonic functions.
US09224371B1	Three-in-one drum A three-in-one drum includes a drum chamber, a drum skin and pressing rings. A beating tray is vertically and adjustably disposed in the drum chamber and covered with a cushion. The bottom of the beating tray has a microphone vibrator connected to a loudspeaker box. When the adjusting rod is rotated clockwise, the beating tray rises and the cushion is close to the drum skin. The drum skin does not ground when being beaten, this is the mute drum function. An beating trigger connected with an electronic sound source sends electronic signal to perform the electric drum function. The microphone vibrator amplifies the audio frequency signal to perform the audio amplification function. When the adjusting rod is rotated counter clockwise, the beating tray is lowered and the cushion is located away from the drum skin which sounds when being beaten to perform the raw sound drum function.
US09224367B2	Image processing apparatus, image processing method, and image processing program There is provided an image processing apparatus, an image processing method, and an image processing program realizing natural scroll display and high-speed scroll. The image processing apparatus includes: a detector detecting a scroll request; and a processor, when the detector detects a high-speed scroll request, employing a blurred picture created through a blurring process as a new picture required for a subsequent update of image displayed in a scroll region, thereby generating an image to be displayed.
US09224366B1	Bendable stereoscopic 3D display device Disclosed is a bendable stereoscopic 3D display device that includes a display panel including a plurality of left-eye pixels and a plurality of right-eye pixels, the display panel being divided into a plurality of blocks; a separator on the display panel to transmit or block images output from the left-eye pixels and the right-eye pixels; a gate driver and a data driver to drive the display panel; a timing controller to receive image data and a timing signal for driving the gate driver and the data driver; and a control unit to receive a bending information on at least one of the plurality of blocks when there is a change in curvature of the display panel, reset a view map of the at least one of the plurality of blocks based on the bending information, and rearrange the image data based on the view map.
US09224364B2	Apparatus and method for interacting with handheld carrier hosting media content Improved techniques for interacting with one or more handheld carriers hosting media content are disclosed. The handheld carrier hosting media content may be sensed, and at least a portion of the media content may be integrated into operation of a media activity provided by a computing device, upon recognizing the media activity and the media content. The media activity provided by the computing device may involve creating or editing an electronic document. The integration of the media content into operation of the media activity may involve insertion or importation of the media content into the electronic document.
US09224362B2	Monochromatic edge geometry reconstruction through achromatic guidance Many imaging scenarios involve an achromatic image (e.g., a panchromatic image or a near-infrared image) and one or more concurrently captured monochromatic images (e.g., RGB images captured through a Bayer filter array), and the compositing of these images through de-mosaicing and/or pan-sharpening to generate a high-resolution color image. However, in many such scenarios, the monochromatic images may exhibit distortion of edge geometry, resulting in artifacts and/or color distortions near visual edges of the composite image. However, such distortions may be absent from the achromatic image, and edge geometry may be represented as an intensity gradient among respective neighborhoods of achromatic pixels. Presented herein are techniques for reducing such distortions in monochromatic images through iterative adjustment of monochromatic pixel intensity to reflect the gradients of the neighborhoods of the corresponding achromatic pixels. Convergence of such adjustments produces composite images exhibiting accurately reconstructed edge geometry.
US09224361B2	Method, device and system for compensating brightness of a liquid crystal module A method for compensating the brightness of a liquid crystal module involves acquiring an image of a liquid crystal module to obtain the acquired image. The acquired image of the liquid crystal module is compared with a standard image to find a dark region. The compensation coefficient of each pixel in the dark region is calculated. In a display control circuit of the liquid crystal module, the calculated compensation coefficient of pixels is stored for compensating the backlight unit corresponding to pixels in dark region.
US09224358B2	Proximity-based multi-display configuration A process is utilized to provide a multi-display configuration. The process detects, at a first proximity-based device within a first display device, a presence of a second proximity-based device within a second display device. The presence is within a proximity. Further, the process displays a first portion of a multi-display image at the first display device based upon a location of the first display device relative to the second display device.
US09224356B2	Digital to-analog-conversion circuit and data driver for display device DAC includes a decoder that receives N number of reference voltages and an n-bit digital signal (n 4) to select first to third voltages, and an operational amplifier to output (first voltage+second voltage+2 third voltage)/4 voltage. The operational amplifier is able to output, for respective 2^n combinations of the n-bit digital signal, voltage levels from an Ath level, as a base level, to an (A−1+2^n)th level. The N number of reference voltages include Ath level, (A+4)th level, (A−4+2^n) and (A+2^n), and an at most {−4+2^(n−2)} reference voltages obtained by decimating a pre-set at least one reference voltage from {−3+2^(n−2)} reference voltages that are other than the four number of reference voltages from the {1+2^(n−2)} reference voltages corresponding to the voltage levels spaced each other at an interval of 4 levels from the Ath level. N is not less than 4 and not more than 2^(n−2).
US09224350B2	Liquid crystal display device and driving method of liquid crystal display device In one frame period, a field period in which an image signal is input to pixels in odd-numbered rows and a field period in which an image signal is input to pixels in even-numbered rows are alternately provided. Hues of light transmitted to a pixel portion from a light supply portion are different between two sequential field periods. Further, in a plurality of field periods in one frame period, hues of light transmitted to the pixel portion from the light supply portion are different among a plurality of field periods in which image signals are input to the pixels in the odd-numbered rows, and/or those are different among a plurality of field periods in which image signals are input to the pixels in the even-numbered rows.
US09224349B2	Display device and driving method thereof A disclosed display device includes a display panel with data lines and gate lines, the gate lines including odd-numbered gate lines and even-numbered gate lines. The display device also includes a timing controller to generate a gate output enable signal, and a gate output enable signal division circuit to extract odd-numbered high logic periods of the gate output enable signal to output a first gate output enable signal and to extract even-numbered high logic periods of the gate output enable signal to output a second gate output enable signal. The display device further includes a gate driver to supply a first gate pulse to an odd-numbered gate line in response to the first gate output enable signal and a second gate pulse to an even-numbered gate line in response to the second output enable signal.
US09224335B2	Organic light emitting diode display device and method for driving the same Discussed are an organic light emitting diode (OLED) display device and a method for driving the same. The OLED display device includes pixels each including a light emitting element, and a pixel driving circuit. The pixel driving circuit includes a driving switching element connected in series between high and low-level voltage supply lines, together with the light emitting element, a first switching element for connecting a data line and a first node connected to a gate of the driving switching element in response to a first scan signal, a second switching element for connecting an initialization voltage supply line and a second node connected to a source of the driving switching element in response to a second scan signal, and a third switching element for connecting the high-level voltage supply line and a drain of the driving switching element in response to an emission signal.
US09224332B2	Organic light-emitting display device An organic light-emitting display device includes: an organic light-emitting panel in which a plurality of pixel regions are arranged, the pixel regions each including a drive transistor configured to drive an organic light emission element and a sensing transistor configured to detect a threshold voltage of the drive transistor during a sensing interval; and a controller configured to compare a pixel number of a low grayscale range and a pixel number of a high grayscale range, which are obtained from an image signal, and adjust the sensing interval according to a compared resultant.
US09224330B2	Display device for reducing dynamic false contour A display device includes a display panel and a timing controller. The display panel includes a plurality of pixels, and the timing controller determines a driving method that includes a first sub-frame arrangement method and a second sub-frame arrangement method. An arrangement of weight values of a plurality of sub-frames of the second sub-frame arrangement method is given in an opposite order from an arrangement of weight values of a plurality of sub-frames of the first sub-frame arrangement method. The timing controller applies the first sub-frame arrangement method to a first pixel among the pixels, and applies the second sub-frame arrangement method to a second pixel that is disposed next to the first pixel.
US09224327B2	Power supply device, display apparatus having the same, and power supply method A display apparatus includes an OLED panel receiving an input of a video signal and a plurality of driving power levels for RGB colors and displaying an image, a video signal providing unit providing the video signal to the OLED panel, and a power supply supplying the plurality of driving power levels to the OLED panel unit and performing individual feedback control for each of the plurality of driving power levels.
US09224316B2	Wall plaque with decorative graphic and methods of making the same Implementations of the present invention provide systems, apparatus, and methods for precisely placing a graphic in a desired position between a face panel and a rear panel. In particular, implementations of the present invention comprise wall plaques having graphics that are printed directly to the back surface of face panels. Printing a graphic directly to the back surface of a face panel may help to ensure that the graphic is flat on the back surface of the face panel and is not misaligned. In addition, printing a graphic directly to the back surface of a face panel may help to eliminate the possibility that the graphic will be wrinkled, torn, or otherwise damaged prior to being laminated on the back surface of a face panel. Implementations of the present invention may also make the manufacturing process more efficient both in terms of cost and time.
US09224314B2	Identification label unit An identification label unit capable of allowing authenticity determination of a product is provided.According to the present invention, an identification label unit, including: an identification label provided with an identifier; a viewer plate to cover the identification label; and a retaining member to retain the identification label and the viewer plate so as to allow relative rotation of the identification label or the viewer plate with respect to each other; wherein: display and non-display of the identification label is switched by relative rotation of the identification label or the viewer plate with respect to each other, is provided.
US09224306B2	Soil behavior simulator for agricultural implement blades A soil behavior simulator is provided that includes a particle recirculation system configured to flow particulate material along an agricultural implement blade, and a drive unit configured to drive the agricultural implement blade in rotation.
US09224303B2	Computer based system for training workers A computer based system having one or more computers is provided. In one embodiment, the system comprises a plurality of trainee client computers. The system can include at least one controlled digital character and a non-trainee digital entity, a plurality of models, and a rendering module for rendering the models on a display. The system is usable in training workforce teams and in a wide variety of additional applications.
US09224301B2	System and method for providing advisory support information on downlink clearance and reports A method for requesting air traffic control (ATC) clearance comprising receiving user input to display an ATC clearance request page corresponding to a respective flight parameter; based on the received user input, requesting a computed value for the respective flight parameter from a flight management (FMS) system; and displaying the computed value with the ATC clearance request page corresponding to the respective flight parameter.
US09224295B2	Automated system for preventing vehicle bunching The present invention contemplates a distributed automatic control system for preventing the vehicle bunching. Information of vehicle locations is automatically detected and used to determine the positions and velocities of vehicles along a route. Vehicles pass predetermined points, such as stations, along the route. Information about whether the vehicle skipped the station, arrived at the station, or departed from the station, is automatically calculated based on the position and velocity information. This information is distributed among the vehicles that belong to the same route. An in-vehicle controller dynamically calculates holding times at each station and displays the information to the driver so that buses do not get too close to one another, thereby preventing bunching while maintaining appropriate speeds of the vehicles.
US09224294B1	Automobile emergency vehicle warning display system An factory installed automobile emergency vehicle warning display system to alert a motorist of an approaching emergency vehicle as the emergency vehicle transmits an RF (or other) signal which is received by a sensory-receiver. The sensory-receiver then communicates to a visual-alarm to display a message and to an audible-alarm to transmit a corresponding audible message through a speaker.
US09224290B1	Presence-based device operation Data indicative of user proximity to one or more devices is provided to a server. Based on the proximity data, the server may modify content distribution to, or the behavior of, the one or more devices. In one implementation, determination that no user is proximate to the device may result in pausing or stopping streaming of content to the server.
US09224289B2	System and method of determining occupant location using connected devices A vehicle computing system enabling one or more processors to establish a communication connection with at least one of a plurality of handheld computing devices within a vehicle while enabling and determining infotainment control based on the location of the handheld device in the vehicle. The system may determine if the at least one of a plurality of handheld computing devices is a driver or non-driver handheld computing device based on a detected location of the communication connection. The system may determine that the at least one of a plurality of handheld computing devices is a non-driver handheld computing device based on the detected location, therefore enabling infotainment control from the non-driver handheld device. The system may determine that the at least one of a plurality of handheld computing devices is a driver handheld computing device based on the detected location, therefore limiting infotainment control from the driver handheld device.
US09224285B1	Alarm probability Alarm system technology, in which an alarm event is detected at a property monitored by an alarm system when the alarm system was set in an armed state. Based on detection of the alarm event, an alarm probability score that indicates a likelihood of the alarm event being an emergency situation is determined and the alarm event is handled based on the determined alarm probability score.
US09224281B2	Smoke detector sensor network system and method A system and method for detecting smoke in a compartment that includes a first set of sensors, a second set of sensors and a processor. Each sensor in the first set is configured to sense particles. Each sensor in the second set is configured to sense at least one gas. The processor is configured to receive first input data from the first set of sensors and second input data from the second set of sensors, to compare the second input data with a noise level when the first input data indicates that particles are present in the compartment, and to generate an alert signal when the second input data exceeds the noise level. The processor preferably calculates a rate of change of the second data and compares the second input data with the noise level only when the rate of change of the second data exceeds a third threshold.
US09224280B2	Security wrap A security wrap (20) for protecting an electronic component (16) includes a substrate (26) having a first side and a second side opposite to each other. A conductive path (22) is disposed over the first side of the substrate (26) and has first and second ends coupled to the electronic component (16), and a pattern selected from a plurality of predetermined patterns. A layer of adhesive (28) is over the first side of the substrate (26) and bonds the first side of the substrate (26) to the electronic component (16) with the conductive path (22) sandwiched there between.
US09224279B2	Tour monitoring device A monitoring device that is capable of setting both of the tour monitoring time and the unmoving object monitoring time without restriction. A tour monitoring unit causes an image pickup unit to perform a tour monitoring. An unmoving object monitoring unit performs an unmoving object detection process and an unmoving object determination process at positions subjected to the tour monitoring. A control unit performs a control such that the tour monitoring is performed at a position different from the position where the unmoving object detection process is performed after the unmoving object detection process is performed and the unmoving object determination process is performed after the tour monitoring is performed at the different position.
US09224276B2	Writing underlay that generates awakening effect Power of concentration of a person at a study time usually declines with the passage of time. However, a practical and concrete method of actively providing a stimulus that makes the person less drowsy, that is, a device that realizes provision of a local exercise stimulus that vibrates a part of a human body, has not been developed. The invention provides an underlay that is used as a stationery product and that generates an awakening effect, the underlay having plural shapes of protrusions and indentations at an upper surface side of the underlay.
US09224275B2	Media processing method using multiple processing units for performing multiple processes A media processing method comprising receiving, by a first connection unit, a command sent from a host computer; and detecting, by an external device control unit, a process that can be executed by an external processing device. One or more controlling operations are performed by a control unit based on the command received by the first connection unit. Such control entails (i) executing a first process by a first processing unit, or (ii) executing a second process by a second processing unit when the external processing device cannot execute the command, the second process being different than the first process, or (iii) transmitting the command by a second connection unit to the external processing device when the external processing device can execute the command.
US09224274B1	System and method for financial services device usage A system and method is provided to enable a financial services device, such as, for example, an ATM or financial services kiosk, to support a variety of card types. The card may be used for login purposes. The financial services device according to exemplary embodiments may be capable of supporting both magnetic strip only cards and EMV type cards. A card is inserted into a card reader, the card type is determined, and the card is removed. When an EMV card is recognized, the financial services may request the card be reinserted into the card reader whereupon it is clamped and held for the duration of interaction with the financial services device.
US09224271B2	Alphanumeric slot game system and method A slot game and systems and methods for administering the slot game wherein the slot administrator defines game parameters that in turn define the contours of the slot game. Game play consists of wagers made on plays of alphanumeric combinations that a player tries to successfully match with the characters on spinning slot wheels.
US09224265B2	Gaming system and method for providing an offer and acceptance game A gaming system for providing a multiple round offer and acceptance game with a multi-component offers. In various embodiments, the offer and acceptance game is a multi-round offer and acceptance game, wherein the player's decisions during one or more rounds of the offer and acceptance game determine, at least in part, whether the player will play or participate in each of the subsequent rounds of the offer and acceptance game. In these embodiments, for each played round of the offer and acceptance game, the gaming system enables the player to accept or reject one or more different offers which have different award values and also contribute different amounts toward terminating the play of the offer and acceptance game.
US09224264B2	Multiple currency bill acceptor Provided is a multi-currency bill acceptor that can easily convert an existing cashless system into a multi-currency cashless system at low cost. In the case of reading a ticket, the multi-currency bill acceptor converts information on the ticket into data in a ticket format readable by a game controller and sends it to the game controller; in the case of reading a bill, it sends information on the bill to the game controller in a form of data converted into a ticket format.
US09224257B2	Payment authorized lock system and methods of making and using the same A payment authorized door and/or gate lock system that controls access to a given area through the processing, storage and recollection of data input through a touchscreen user interface.
US09224256B2	Walk-through security gate, in particular for use at airports The invention relates to a walk-through security gate (1), in particular for the use at airports for demarcation between a secured zone and an unsecured zone, wherein the gate can be opened in accordance with the checking of access data such as a flight ticket and a blocking element (6) that blocks the gate is pivoted from a blocked position into a walk-through position in the context. Corresponding fully automatic solutions are part of the prior art in the context. For various reasons, however, there is a need for being able to also operate such “self-boarding gates” semi-automatically, i.e. in conjunction with support staff, wherein in the context the problem of the operating personnel obstructing the gate delimited by guide elements (4) arises. According to the invention, the problems is solved in that a console (5) is associated with at least one of the guide elements (4) that delimit the gate, by means of which console (5) the access data can be automatically retrieved. At the same time, the console (5) is additionally provided with a manual scanner (8). When the manual scanner is put into operation, the scanner (7) of the console (5) used for the automatic checking is taken out of operation and thus the checking of the access data is possible in manual operation, and at least one blocking element (6) that blocks the gate is pivoted into a walk-through position only in accordance with the checking of the access data by means of a manual scanner (8).
US09224255B2	Vehicle diagnostic system, vehicle diagnostic method, and vehicle Provided are a vehicle configured such that if idling does not automatically stop, an in-vehicle display will occur immediately if a malfunction is the cause, thereby enabling a driver to have peace of mind and concentrate on driving, without giving the driver an unnecessary sense of unease; a vehicle diagnostic system therefor; and a vehicle diagnostic method. The vehicle comprises an idle stop error display unit provided corresponding to a specific ECU among a plurality of ECUs, and that indicates that an idle stop malfunction has occurred, being a malfunction corresponding to a second IS malfunction code, when a malfunction has occurred within a control target range for any among the plurality of ECUs, said malfunction recording the second IS malfunction code which does not cause the operation of a warning light requesting inspection or repair of an error that has occurred inside the vehicle.
US09224253B2	External diagnosis device, vehicle diagnosis system and vehicle diagnosis method In an external diagnosis device, a vehicle diagnosis method and a vehicle diagnosis system, when an IGSW is on, power is supplied from a vehicle-mounted power supply to the external diagnosis device, and a capacitor provided on the external diagnosis device is charged, and when the IGSW is turned off, the power supply from the vehicle-mounted power supply to the external diagnosis device is stopped, and power is supplied from the capacitor to the external diagnosis device.
US09224249B2	Peripheral access devices and sensors for use with vehicle telematics devices and systems A telematics method and system includes, and uses, a telematics device with a controller in communication with a diagnostic system configured to receive diagnostic information from a host vehicle; a position-locating system configured to determine location information of the host vehicle; a wireless transceiver configured to transmit and receive information through a wireless network to and from at least one Internet-accessible website; and, a communication interface including at least a short range wireless interface link. The telematics device may be embodied in an access device, which may include the position-locating system. The access device may be a smartphone, or similar device, that retrieves/transmits diagnostic data/information, and other data/information to/from the vehicle via the short range wireless link. The access device performs various telematics device functions; it uses a long range wireless interface to communicate diagnostic and related information to a central host computer, and to receive related information from same.
US09224244B2	Parameterized graphical representation of buildings The invention relates to generating a three-dimensional (3D) graphical representation of a building. The method comprises establishing appearance control data comprising information on parameterized architectural features of the building and on building blocks which are fragments indicative of the building, and retrieving template data from a database based on references in the appearance control data, wherein the template data relates to a prefabricated graphical representation of the building blocks. The method further comprises, for each building block, calculating a 3D graphical representation of the building block based on the respective template data and the appearance control data, and combining the 3D graphical representations of the building blocks based on the appearance control data to generate the 3D graphical representation of the building.
US09224239B2	Look-based selection for rendering a computer-generated animation A system and method for computing a rendered image of a computer-generated object in a computer-generated scene. A dependency graph is accessed, the dependency graph including a plurality of interconnected nodes including a look-selector node. An asset is accessed at an input to the look-selector node. The asset includes a plurality of looks for the computer-generated object, each look of the plurality of looks corresponding to a different visual appearance of the computer-generated object. At the look-selector node, an active look is selected from the plurality of looks. The active look is passed to a next node of the dependency graph. The rendered image of the computer-generated object is computed having a visual appearance that corresponds to the active look.
US09224236B2	Interactive changing of the depiction of an object displayed using volume rendering A depiction of a three-dimensional object that is displayed using volume rendering is influenced. A representation of the object, in which values of a variable characterizing the object are given at spatial points of the object and in which color values are allocated to the variable during the course of rendering, is provided. A set of points defined in the space of representation of the object is input, and a distance from spatial points incorporated by the representation to the set of points is calculated. Color values allocated to spatial points are modified, or color values are determined according to the calculated distance. A depiction of the object by volume rendering is calculated using the representation of the object, the representation incorporating the modified or determined color values.
US09224232B2	Stereoscopic image generation device, stereoscopic image display device, stereoscopic image adjustment method, program for causing computer to execute stereoscopic image adjustment method, and recording medium on which the program is recorded A stereoscopic image generation device that generates a stereoscopic image including a right-eye image and a left-eye image is provided. The stereoscopic image generation device includes an image enlarging/reducing unit that enlarges or reduces the right-eye image and the left-eye image which constitute stereoscopic image data, and a display control unit that performs control to display a stereoscopic image by showing the right-eye image and the left-eye image of the stereoscopic image data for a right eye and a left eye, respectively. The image enlarging/reducing unit enlarges or reduces the right-eye image and the left-eye image on the basis of parallax amount adjustment information, which includes a position of a right-eye-image reference point and a position of a left-eye-image reference point which are respectively provided at different positions for the right-eye image and the left-eye image, and enlargement ratios of the right-eye image and the left-eye image, with reference to the right-eye-image reference point and the left-eye-image reference point. Accordingly, a position in the depth direction can be easily controlled while adjusting a parallax.
US09224231B2	Augmented reality system indexed in three dimensions A portable computerized device is configured to display a three dimensional graphic. The portable computerized device includes a camera device capturing an image including location data for each of a plurality of tokens. The portable computerized device is configured to display the three dimensional graphic based upon the location data.
US09224230B2	Method of displaying three-dimensional image and display apparatus for performing the same A method of displaying a three-dimensional (“3D”) image includes generating a frame image including a plurality of image blocks having a left-eye image and a right-eye image which are alternately arranged, the frame image displayed on a display panel and driving each of a plurality of shutter blocks in an active 3D panel as a first mode corresponding to the left-eye image or a second mode corresponding to the right-eye image so that left and right eyes of the viewer view the left-eye image and the right-eye image.
US09224229B2	Process and apparatus for data registration A process of bringing first and second data sets into registration/conformity with each other. A plurality of candidate data sets are provided, each being a differently shifted or distorted form of a reference data set. Each of the first and second data sets and the reference data set being a representation of a particular physical object. The process compares respectively the first and second data sets with each of the candidate data sets and in dependence on the comparisons to determine respective first and second transformations that bring into registration or conformity with each other the reference data set and a particular candidate data set out of the plurality of candidate data sets which provides a best match with the respective first and second data sets, and brings the first and second data sets into registration/conformity with each other in dependence on the first and second transformations.
US09224224B2	Methods and systems for predictive clinical planning and design and integrated execution services Systems and methods for predictive clinical planning, design, and integrated execution services are provided. The system may comprise a database, a web server, an application server, and a client.The system may be used to develop a strategic map of a proposed clinical plan, wherein the clinical plan may include a draft launch label attribute, one or more strategies, and a schema; linking the clinical plan and schema to one or more trials; subsequently linking the trials to one or more objectives and measures; subsequently linking none, one, or a plurality of objectives to none, one, or a plurality of measures; identifying patient criteria and enrolling patients from one or more investigator sites located in one or more countries; and integrating the clinical plan with a clinical plan execution application.
US09224222B2	Interactive multidimensional drilldown analysis Analytical functions to be applied to business intelligence data may be sequentially selected from a set of chips, each corresponding to a different function. A function associated with a selected chip may be applied to the business intelligence data and the selected chip may be added to an analysis path with other selected chips in a sequential order of selection. A result, which may include at least two selectable data points, may be displayed. Once a data point selection is made, the selection may be used to limit the functions associated with subsequently displayed chips to the selected data points. The chips listed in the analysis path may be used to change prior data point selections, the changes of which may be automatically propagated to any subsequently selected chips as indicated in the analysis path.
US09224220B2	Eye image simulation device, eye image generation method, and eye image generation program An eye image simulation device is provided that generates an eye image using information relating to an eyelash shape that is set up by a user. The eye image simulation device includes an eyelash generation unit that generates eyelashes with polygons using the information relating to the eyelash shape, a form alteration unit that alters a form that is configured by connecting the tips of the eyelashes generated by the eyelash generation unit, and a simulation image generation unit that generates the eye image using the eyelashes generated by the eyelash generation unit or the form altered by the form alteration unit.
US09224219B2	Systems and methods for presenting a free-form drawing Systems and method for presenting a free-form drawing are described. In some aspects, a first point, a second point, and a third point from an input curve in the free-form drawing are received. A first quadratic Bezier curve is determined, where a control point of the first quadratic Bezier curve includes the second point and endpoints of the first quadratic Bezier curve include the first point and the third point. A first portion of the first quadratic Bezier curve is provided for display, where endpoints of the first portion of the first quadratic Bezier curve include the first point and a second terminal point, and where the first portion of the first quadratic Bezier curve does not include the third point.
US09224217B2	Analytical charting Methods, program products, and systems for analytical charting are described. A system implementing analytical charting techniques can receive a selection input from a data view displaying data retrieved from a database table. The system can determine a context of the selection input, a data environment in which the selection input is received, and characteristics of data being selected. Based on the context, the data environment, and the characteristics, the system can generate a chart data grouping that specifies a relationship between data in a chart. The system can automatically specify one or more data series for the chart based on the chart data grouping. The system can generate chart parameters automatically and transparently to the user. The system can provide the system-generated chart parameters for display and allow user modification to the system-generated chart parameters. The system can then generate a chart using the chart parameters.
US09224215B2	Apparatus and method for encoding/decoding images for intra-prediction A method of decoding an image includes the steps of restoring a residual value by performing inverse quantization and inverse transform on the residual value by entropy decoding a received bit stream, generating a prediction unit by performing intra prediction selectively using one of a plurality of prediction modes on a prediction unit split by conducting at least one of asymmetric partitioning and geometrical partitioning, and restoring an image by adding the residual value to the prediction unit. It may be possible to enhance encoding efficiency of high-resolution images having a resolution of HD or higher by performing intra prediction on the asymmetric partitioning and/or geometrical partitioning.
US09224211B2	Method and system for motion detection in an image Embodiments for moving object detection in an image are disclosed. These include detecting a moving object in an input image by selecting video frames that are visually similar to the input image, generating a model motion image by estimating motion for each selected video frame, and detecting, using the model motion image, a moving object in the input image based on differences between the model motion image and the input image.
US09224200B2	Computer vision based method for extracting features relating to the developmental stages of Trichuris spp. eggs There is provided a computer vision based method for extracting features relating to the developmental stages of Trichuris spp. eggs, wherein for the final developmental stages a larva is present inside the egg, said Trichuris spp. eggs having a substantially oblong or elliptical shape with a protruding polar plug at each end, the shape of the Trichuris spp. eggs thereby defining a longitudinal direction and a transverse direction of the eggs.
US09224198B2	Analysis of the digital image of the surface of a tyre and processing of non-measurement points In a method for processing an image of a surface of a tire, a 3D digital image of the surface is captured, and each pixel of the captured image is assigned a grey level value proportional to an elevation of a corresponding point with respect to the surface. The pixels are placed in rows and columns. A search is made for zones of the surface that include pixels having a grey-level value lower than a given threshold. Boundaries of an encompassing box that includes one or more of the zones are determined. Inside the encompassing box, a grey-level value equal to a mean grey-level value of a set of reference pixels (Kij, si) positioned in a zone situated in immediate proximity to a pixel under consideration is assigned to each of the pixels whose grey-level value is lower than the given threshold.
US09224197B2	Method and apparatus for implementing optical roll scanning to identify defects in roll components used in an image production device A system and method are provided for employing a unique optical roll scanning technique, scheme or process for detecting and identifying periodic surface defects associated with rolls usable in image production devices. An apparatus is provided for mounting the roll to implement an inspection technique that facilitates forming an image of a surface of the roll by rotating the roll through an entire cycle above a full width scanner device. The formed image of the surface of the scanned roll is filtered and analyzed particularly by applying a Fourier analysis technique, and/or by subjecting the filtered image data to a series of fast Fourier transforms (FFTs), potentially including 2D FFTs. The analysis process allows detected periodic defects in the formed image of the surface of the roll under analysis to be characterized by a magnitude of a response in a spatial frequency domain.
US09224194B2	Joint video deblurring and stabilization Joint video deblurring and stabilization techniques are described. In one or more implementations, a deblurring and stabilization module is configured to jointly deblur and stabilize a video by grouping video frames into spatial-neighboring frame clusters, and building local mesh homographies for video frames in each spatial-neighboring frame cluster.
US09224190B2	Method and apparatus for processing image taken under low illumination environment A method and apparatus for processing an image for enhancing an image quality captured in a low illumination environment is disclosed. The method for processing the image may include estimating motion information based on a base frame among input frames captured using a short exposure time and high ISO sensitivity conditions, removing noise of the base frame using the motion information, and enhancing an image quality of the base frame from which the noise has been removed using a reference frame captured under a long exposure condition.
US09224189B2	Method and apparatus for combining panoramic image The disclosure discloses a method and an apparatus for combining panoramic image. The method includes: obtaining multiple original images of the same scene, performing folding change and coordinates transformation to the multiple original images, and determining an overlapping area of the multiple original images; establishing a mathematical model of the multiple original images, aligning the overlapping area of the multiple original images, and transforming the multiple original images to a coordinate system of a reference image; obtaining the space transformation relationship among/between the multiple original images according to the coordinate system of the reference image, selecting an appropriate image combining strategy, and completing the combining of the images. The solution can realize obtaining scene picture with large field of view without reducing image resolution.
US09224187B2	Wavefront order to scan order synchronization Blocks of pixels from a video frame may be encoded in a block processing pipeline using wavefront ordering, e.g. according to knight's order. Each of the encoded blocks may be written to a particular one of multiple buffers such that the blocks written to each of the buffers represent consecutive blocks of the frame in scan order. Stitching information may be written to the buffers at the end of each row. A stitcher may read the rows from the buffers in order and generate a scan order output stream for the frame. The stitcher component may read the stitching information at the end of each row and apply the stitching information to one or more blocks at the beginning of a next row to stitch the next row to the previous row. Stitching may involve modifying pixel(s) of the blocks and/or modifying metadata for the blocks.
US09224184B2	Methods and arrangements for identifying objects The present disclosure relates generally to digital watermarking and grocery/retail store checkout. One claim recites a system comprising: a 2D camera for capturing imagery of packaged items, the packaged items including digital watermarking printed on product packaging; one or more processors programmed for: prioritizing at least some image areas from within at least one captured imagery frame for digital watermark detection based on: i) area brightness, and on ii) area frame location; and detecting digital watermarks from one or more image areas prioritized from the prioritizing image areas, in which the detecting digital watermarks analyzes image areas in order of prioritization. Of course, other features, combinations and claims are also provided.
US09224180B2	Remotely-executed medical diagnosis and therapy including emergency automation Devices, systems, methods, and software for providing remote medical diagnosis and therapy to a subject comprising: a module for conducting telecommunications with a telemedicalist; a module for applying a diagnostic or a therapeutic analysis; an apparatus for dispensing one or more medical items from an inventory of medical items, the inventory of medical items risk profiled to a subject, a population, a venue, or a situation; and optionally, a biosensor apparatus.
US09224177B2	Systems and methods for searching for and translating real estate descriptions from diverse sources utilizing an operator-based product definition Disclosed herein are: systems capable of searching, receiving and conglomerating the data from real estate databases of varying formats, and translating that received into a common format; execution of pre-defined translation rules referencing data tags used within the system or the originating databases; rules constructed in a simple, hierarchical or a class-based structure whereby one rule depends upon the output of another rule for its input; data sources prioritized or merged where the same property-related information is presented in more than one source; map definitions containing rule sets crafted for a particular use, such as for a particular consumer or user; such systems used in the course of real estate appraisals, in property search reports, extending across databases of differing formats. Detailed information on various example embodiments of the inventions are provided in the Detailed Description below, and the inventions are defined by the appended claims.
US09224175B2	Collecting naturally expressed affective responses for training an emotional response predictor utilizing voting on content Described herein are systems, methods, and computer program products for collecting naturally expressed affective responses for training an emotional response predictor utilizing voting on content. In one embodiment, a label generator is configured to receive a vote, provided by a user, on a segment of content consumed by the user. The label generator determines whether the user consumed the segment during a duration that is shorter than a predetermined threshold, and utilizes the vote to generate a label related to an emotional response to the segment. A training module receives the label and measurement of an affective response of the user taken, at least in part, during a period that starts at most 30 seconds before the vote is provided, and trains the emotional response predictor with the measurement and the label.
US09224174B2	Determining influence in a social networking system An influence metric describing the influence of a social networking system object on social networking system users is determined based on affinities between the users and the object. For example, affinities between the associated users and the object are combined to determine the influence metric. Content may be selected for presentation to users based in part on influence metrics of the content. Additionally, influence metrics of objects associated with a user may be combined to determine the relevance of objects associated with the user, which may also be used to select content for presentation to the user.
US09224172B2	Customizable content for distribution in social networks Particular embodiments of the present invention are related to customizing content based on a social context associated with the viewer of the content. The social context may include information regarding the viewer's friends or contacts in a social network, and information regarding the interaction of such friends or contacts with the customizable content.
US09224166B2	Retrieving product information from embedded sensors via mobile device video analysis A system for accessing product information from embedded sensors via mobile device video analysis is disclosed. The system includes a processing device configured for analyzing a video stream of the surrounding environment captured on a mobile device. At least one product that has one or more embedded sensors associated therewith is identified within the surrounding environment. The system retrieves information associated with the one or more products from the one or more embedded sensors. Information retrieved, or information derived from the information retrieved, from the embedded sensors is presented to the user via a display of the video stream on the mobile device.
US09224161B2	System and method for verifying message delivery integrity in a wireless mobile message broadcasting system A system and method verifying the operational integrity of a wireless message broadcasting messaging system with a heartbeat message generator module and a heartbeat feedback reporting system for receiving a broadcast message record including the broadcast message and the broadcast target area defined as geographical information, generating a heartbeat broadcast message, identifying by the broadcast message routing subsystem at least one wireless network providing point to multipoint cell broadcasting messaging to at least a portion of the broadcast target area, transmitting the broadcast message to each of the identified wireless networks, and transmitting the generated heartbeat message to at least one coupled wireless network in addition to transmitting the heartbeat broadcast message to each of the identified wireless networks, and receiving an indication of receipt of the heartbeat broadcast message from a remote feedback receiver verifying the receipt of the message as indicated by the received indication.
US09224160B2	System and method for message receipt verification in a wireless mobile message broadcasting system A system and method for verifying the receipt of wireless broadcast messages over a wireless message broadcasting system having a broadcast control module and a feedback reporting system for performing the receiving a broadcast message record including the broadcast message and the broadcast target area defined as geographical information, identifying at least one wireless network from among one or more coupled wireless networks that provides point to multipoint cell broadcasting messaging to at least a portion of the message specific broadcast target area as received in the broadcast message record, and transmitting the broadcast message to each of the identified wireless networks, and receiving an indication of receipt of the broadcast message by a remote feedback receiver located within a transmission area of at least one of the coupled wireless networks, and verifying the receipt of the message as indicated by the received indication.
US09224157B2	Method and apparatus for presenting content in response to user inputs using dynamic intelligent profiling Different users may receive different information in response to a selection of the same link that is displayed on a website, mobile site or in the real world. The content delivered to a particular user may be dependent on the time of the selection, the geographic location of the user, a weather condition at the geographical location, personal information associated with the user, a number of previous selections of the link by prior individuals, and any combination of the these or other variables, which may be determined by an originator of the link or another party. Dynamic intelligent profiling platforms may be established for determining content or destinations to be presented to customer devices interacting with any of a variety of touchpoints, based on the real-world conditions of each customer.
US09224155B2	Systems and methods for managing publication of online advertisements Exemplary embodiments provide systems, devices, one or more non-transitory computer-readable media and computer-executable methods for managing publication of online advertising. In exemplary embodiments, computer-based publication techniques may include, but is not limited to, automatically determining whether the content of a particular web page article is suitable or unsuitable for accompaniment with one or more advertisements, automatically determining whether an advertisement is suitable or unsuitable for publication on a web page associated with a web page article, and automatically determining a category that may be used to classify the content of a web page article in order to select one or more categories of advertisements suitable for accompaniment with the web page article.
US09224154B2	System and method for administering a loyalty program and processing payments The present invention is directed to a system and method for administration of a customer loyalty program at a point of sale terminal. The system, in one embodiment, contains a database of customer records for the loyalty program where each customer record contains information about a customer's payment device and information about a customer's mobile device. The system may locate a customer record in a database based on payment device or mobile device information captured at the point of sale terminal and apply any applicable loyalty program discounts. The system may then forward the payment device information to a third-party payment processor for payment processing. The system may print out a receipt at the point of sale terminal indicating any discounts and containing a promotional message. The system may also send a promotional message to the customer's mobile device using the mobile device information stored in the customer's record.
US09224146B2	Apparatus and method for point of sale terminal fraud detection A system, apparatus, method and computer programming for monitoring security of a payment terminal is described. There is provided monitoring of one or more security parameters associated with the payment terminal; detecting any violation of any one of the security parameters; classifying the detected any violation of the one or more of the security parameters into a classification; transmitting data regarding the any violation of the one or more of the security parameters, including the classification thereof, to a centralized terminal management server. If the any detected violation of the one or more of the security parameters is classified as potential fraudulent activity, there is also provided one or more security actions in response to the any detected violation of the one or more of the security parameters.
US09224145B1	Venue based digital rights using capture device with digital watermarking capability A system for tracking copyright compliance comprises a database, the database including unique identifiers for a plurality of content capture devices. The unique identifiers may be obtained from devices prior to the presentation of protectable content, for example, by pre-registration during the process of obtaining a ticket to a performance or at a security checkpoint at an event. The unique identifiers may be associated with a copyright policy pertaining to content at the event. Each device may embed its unique identifier in content captured by the device, such as via a watermark. Software may obtain data embedded in content and access the database to determine the copyright status of the content by sending a request including data identifying the capture device. If content is obtained from an unauthorized source, the content may be traced back to a specific device.
US09224144B2	Securing communications with a pin pad Described in an example embodiment herein is an apparatus comprising an input device and a processor communicatively coupled with the input device. The processor employs asymmetric encryption to provision the input device with a terminal master key. The processor employs the terminal master key with a symmetric encryption algorithm to transfer a communication key to the input device. The processor obtains data representative of a financial account. The processor receives data representative of the personal identification number for authorizing a financial transaction with the financial account from the input device, the data representative of the personal identification number is encrypted with the communication key. The processor receives a request for a financial transaction associated with the financial account via the input device. The processor determines whether the financial transaction is authorized based on the data representative of the personal identification number received from the input device.
US09224143B2	System and method for checkless cash advance settlement Methods, devices, and systems for conducting a checkless cash access settlement are provided. In one embodiment, a cash advance method includes the following: a customer initiates a cash access transaction with a financial card via a cash access system; the customer receives authorization or denial; the customer provides identification and the financial card to a cashier or attendant; the cashier or attendant validates the customer's identity, retrieves the transaction information, and completes the cash advance application; the application prints a non-negotiable instrument, such as a transaction receipt; the customer signs the receipt confirming the transaction with a physical receipt or electronic capture; the receipt image is stored electronically for subsequent transmittal to a central server; the transaction information, including the receipt image if applicable, is recorded on the central server; and the central server generates an ACH file and electronically transmits the ACH file to a designated financial institution.
US09224142B2	Card reader with power efficient architecture that includes a power supply and a wake up circuit These and other objects of the present invention are achieved in a card reader with a read head positioned in a housing. The read head is configured to be coupled to a mobile device and has a slot for swiping a magnetic stripe of a card. The read head reads data on the magnetic stripe and produces a raw magnetic signal indicative of data stored on the magnetic stripe. A power supply is coupled to wake-up electronics and a microcontroller. An output jack is adapted to be inserted in a port of the mobile device and deliver an output jack signal to the mobile device.
US09224141B1	Encoding a magnetic stripe of a card with data of multiple cards A method and apparatus for encoding a magnetic stripe area of a magnetic stripe card with account data from multiple cards are disclosed. The magnetic stripe card (“the card”) can be associated with account data from multiple cards, such as account data from a driver's license and from various payment cards, such as a credit card, a debit card, and a pre-paid gift card. Location information indicating the location of the card can be obtained, and account data for the multiple cards associated with the card can be selected based on a criterion, such as based on the location information. The card includes a magnetic stripe emulator, and the emulator is encoded with account data of the multiple cards, such that with a single swipe of the card through a card reader, the card reader can read the account data of the multiple cards from the magnetic stripe area.
US09224140B2	Near field communication activation and authorization A method of activation and authorization of a near field communication (NFC) enabled device comprising: receiving login information from an NFC enabled device; sending packet data via a network in response to receiving the login information from the NFC enabled device; and receiving corresponding data from the NFC enabled device in response to the sending of the packet data, the sending of the packet data and the receiving of the corresponding code facilitates the activation and authorization of the NFC enabled device, and the subsequent activation of the NFC device via a NFC link without further authorization of the NFC enabled device, is described herein.
US09224138B2	POS control system, control method of a POS control system, and printing device A POS control system 1 has a POS terminal 8 that transmits print control data; a printer 12 including a print unit 41, a print control unit 29 that controls the print unit 41 based on the print control data, and a print data communication unit 26 that transmits the print control data by a first WebSocket connection CT1; and a print data process unit 51 that executes a process based on the received print control data.
US09224135B2	Method and apparatus for adaptive configuration for translation of business messages A method of adapting a message translation system includes receiving a message from a sender; selecting a configuration set from a stored plurality of configuration sets based on at least two of: information regarding the sender of the message, information regarding a recipient of the message, and information regarding the message type; processing the message in accordance with information derived from the selected configuration set; identifying an issue with the processing of the message in accordance with information derived from the selected configuration set; determining a resolution for the identified issue with the processing of the message in accordance with information derived from the selected configuration set; updating the selected configuration set based upon the determined resolution; reprocessing the message in accordance with information derived from the updated configuration set; and transmitting the message reprocessed in accordance with information derived from the updated configuration set to a recipient.
US09224134B2	Arranging a conversation among a plurality of participants Arrangements disclosed herein relate to arranging a conversation among a plurality of participants. At least one user input related to a conversation intended by at least one user to take place can be identified. The desired conversation can include the plurality of participants. The conversation need not pre-scheduled. Contextual information of the plurality of participants can be monitored in real time to determine whether it is presently appropriate for the conversation to take place. When the contextual information of the plurality of participants indicates that it is presently appropriate for the conversation to take place, initiation of the conversation can be attempted.
US09224133B2	Method for establishing interpersonal communication and system A method includes determining a set of individuals available to participate in a chat event, and determining a pairing of individuals from the first set including a first individual and a second individual, the pairing based on matching criterion. The method also includes providing an invitation to the first individual and to the second individual, establishing communication between the first individual and the second individual in response to an acceptance of the first invitation by the first individual or in response to an acceptance of the first invitation by the second individual.
US09224126B2	Collaborative decision making Techniques for collaborative decision making are presented. A collaborative decision making process is referred to as a buzz. A principal creates and defines the policies for the buzz as well as the criteria for participants of the buzz. The buzz is launched for online collaboration and is managed according to the policies. Actions and decisions are logged and recorded during the buzz.
US09224121B2	Demand-driven collaborative scheduling for just-in-time manufacturing A schedule manager may include a chromosome comparator configured to compare a plurality of schedule chromosomes, each schedule chromosome including a potential schedule of use of manufacturing resources within one or more time intervals in producing one or more items, and configured to compare each of the plurality of schedule chromosomes relative to constraints, to thereby output a selected subset of the plurality of schedule chromosomes. The schedule manager may include a chromosome combiner configured to combine schedule chromosomes of the selected subset to obtain a next generation of schedule chromosomes for output to the chromosome comparator and for subsequent comparison therewith of the next generation of schedule chromosomes with respect to the constraints, as part of an evolutionary loop of the plurality of schedule chromosomes between the chromosome comparator and the chromosome combiner, and a scheduler configured to select a selected schedule chromosome therefrom.
US09224115B2	Information technology energy wastage management system Various technologies related to managing energy wastage management in the information technology (IT) domain are described. Implementation of the described features can lead to considerable energy savings for organizations having significant information technology hardware. Attendance information from various sources can be incorporated into the system. Power state information from a lightweight client running at nodes can also be incorporated. Wastage results can be generated and provided to encourage reduction of wastage. Enforcement of wastage policies can also be implemented. Monitoring can be done on an individual, department, or campus-wide level. Management can be accomplished in many cases without having to invest in specialized sensors or other costly infrastructure.
US09224113B2	Preparing preliminary transaction work for a mobile banking customer Embodiments of the invention are directed to systems, methods and computer program products for transaction queuing. In some embodiments, a system is configured to: receive information associated with an intended transaction, wherein a user will execute the intended transaction at a facility at a user-defined time; determine preliminary work associated with the intended transaction that can be performed prior to the user-defined time; and perform the preliminary work associated with the intended transaction. The preliminary work is placed on a transaction queue until the user arrives at the facility.
US09224111B2	Message queue based product asset management auditing system A server detects a product asset management operation and generates an event message corresponding to the product asset management operation. The event message includes data describing the product asset management operation. The server sends the event message to one or more message queues. One or more listeners that are associated to the one or more message queues can obtain the event message to perform an auditing action that indicates to a user an occurrence of the product asset management operation.
US09224110B2	Sub-problem optimization of supply chain planning problems A system and method is disclosed for optimizing supply chain planning problems associated with a supply chain network. The system includes a supply chain planner coupled with one or more supply chain entities. The supply chain planner determines a supply chain plan for managing the flow of one or more items through the supply chain network.
US09224109B2	Filtered peer-to-peer business communication in a distributed computer environment A method for filtered peer-to-peer business communication in a distributed computer environment includes accessing offers associated with one or more offerors and requests associated with one or more requestors, each offer and each request including a set of filter components. Filter components of offers are compared with corresponding filter components of requests to determine whether one or more offers match one or more requests. A match is determined between an offer and a request if the filter components of the offer match the corresponding filter components of the request. In response, at least a matching portion of the offer and request is replicated and communicated to both the offeror associated with the offer and the requestor associated with the request to provide filtered peer-to-peer communication between the offeror and requestor.
US09224106B2	Computationally efficient whole tissue classifier for histology slides Systems and methods are disclosed for classifying histological tissues or specimens with two phases. In a first phase, the method includes providing off-line training using a processor during which one or more classifiers are trained based on examples, including: finding a split of features into sets of increasing computational cost, assigning a computational cost to each set; training for each set of features a classifier using training examples; training for each classifier, a utility function that scores a usefulness of extracting the next feature set for a given tissue unit using the training examples. In a second phase, the method includes applying the classifiers to an unknown tissue sample with extracting the first set of features for all tissue units; deciding for which tissue unit to extract the next set of features by finding the tissue unit for which a score: S=U−h*C is maximized, where U is a utility function, C is a cost of acquiring the feature and h is a weighting parameter; iterating until a stopping criterion is met or no more feature can be computed; and issuing a tissue-level decision based on a current state.
US09224102B2	Apparatus and method for analysing events from sensor data by optimisation The present invention relates to sensor signal analysis. It relates particularly, but not exclusively, to methods, systems and devices for monitoring and processing the sensor signals to determine automatically characteristics of events represented by the sensor signals. The present invention is particularly, but not exclusively, related to methods, systems and devices for monitoring moisture in absorbent articles such as diapers, incontinence garments, dressings and pads resulting from wetness events caused by, for example, urinary and/or faecal incontinence. In an embodiment, the invention includes a method for processing sensor signals representing an event in an absorbent article. The method comprises: receiving sensor signals from a sensor representing one or more events in an absorbent article; and processing the sensor signals to determine a characteristic of at least one event in the absorbent article. One such characteristic can include the volume of a voiding event such as a urinary incontinence event. In another embodiment, the method includes carrying out a learning phase including the steps of: receiving sensor signals representing one or more events in each of one or more absorbent articles; receiving observation data indicative of a cumulative characteristic of the one or more events in each absorbent article; and identifying an optimal mathematical model describing a relationship between the sensor signals and the observation data. Such events can include urinary incontinence events occurring in absorbent articles such as diapers. Observation data can be measured cumulative volume of a cycle of voiding events occurring in a diaper.
US09224098B2	Sensitivity analysis tool for multi-parameter selection Methods, software, products and systems used to support decision making in complex multidimensional problem environments. Methods, software, products and systems to prioritize solutions for selection based upon selection criteria and available data regarding the possible solutions. The methods achieve a robust approach to determine the sensitivity of a selection to a multi-parameter profile of selection criteria and the importance of such criteria.
US09224091B2	Learning artificial neural network using ternary content addressable memory (TCAM) A circuit is provided for that includes one or more TCAM arrays including one or more matchlines configured to model a neural network. Each of the one or more TCAM arrays models a connected group of neurons such that input search data into the one or more matchlines is modeled as neuron dendrite information, and the output from the one or more matchlines is modeled as neuron axon information. The circuit further includes one or more additional bits included within each of the one or more matchlines that are configured to model connectivity strength between each neuron dendrite and axon. The circuit also includes a real-time learning block included within each of the one or more TCAM arrays configured to modify the connectivity strength between each neuron dendrite and axon using wild-cards written and stored in the one or more additional bits.
US09224090B2	Sensory input processing apparatus in a spiking neural network Apparatus and methods for feedback in a spiking neural network. In one approach, spiking neurons receive sensory stimulus and context signal that correspond to the same context. When the stimulus provides sufficient excitation, neurons generate response. Context connections are adjusted according to inverse spike-timing dependent plasticity. When the context signal precedes the post synaptic spike, context synaptic connections are depressed. Conversely, whenever the context signal follows the post synaptic spike, the connections are potentiated. The inverse STDP connection adjustment ensures precise control of feedback-induced firing, eliminates runaway positive feedback loops, enables self-stabilizing network operation. In another aspect of the invention, the connection adjustment methodology facilitates robust context switching when processing visual information. When a context (such an object) becomes intermittently absent, prior context connection potentiation enables firing for a period of time. If the object remains absent, the connection becomes depressed thereby preventing further firing.
US09224087B2	Secure identification of a product In a method for marking a product first a product identification (12) is generated (S1) and applied (S5) onto the product (21). Subsequently the product identification (26) applied onto the product (21) is captured (S6) and stored (S8, S9) in a product database (11). Here in particular also an independent authentication feature (22) is designated (S3, S5) and applied (S6) together with the product identification (26) onto the product (21) and stored (S8, S9) in the product database (11).
US09224086B2	Method for contacting a chip The invention relates to a method for contacting a chip with a conductor arrangement and also to a conductor arrangement, particularly a transponder antenna, an intermediate carrier or the like, with a carrier substrate (55) for accommodating the chip and with a chip having chip terminal faces formed thereon, wherein a conductor material layer (66) is formed on the carrier substrate, wherein the conductor material layer forms a conductor arrangement (64) having at least two conductors (56, 57) which are connected to each other in a chip contact area (58), wherein an insulating gap (59) is formed in the chip contact area, such that mutually electrically insulated conductor terminal faces (60, 61) of the conductors are formed, wherein the chip terminal faces are contacted with the conductor terminal faces, and wherein the insulating gap is formed by removal of the conductor material layer by means of a laser.
US09224085B2	Electronic passport An electronic passport in the form of a booklet, bearing a plurality of sheets sewn there among at the respective longitudinal center lines is described. The electronic passport has a cover sheet and a data sheet. The cover sheet has a layer made of fabric, an electronic inlay and an internal flyleaf layer and embedding an electronic data storage means provided with an antenna for radio transmission. The data sheet is made by a first and a second layer of plastic material. The data sheet defines a data page bearing identification data of a subject and a connecting page made fixed with the cover sheet, and also comprises an intermediate layer of flexible material extending at the center line of sewing.
US09224082B2	Combination of luminescent substances The invention relates to a luminescent composition comprising a component which can be excited by infrared (IR) radiation and a component which can be excited by ultraviolet (UV) radiation. The composition has a characteristic emission spectrum and may optionally be used together with a reading system adapted to the emission spectrum in order to mark substances or mixtures of substances.
US09224081B2	Image recording apparatus An image recording apparatus includes: at least one container, a recorder, a communication unit, an input device, a memory, a display, and a controller. The controller performs: receiving a recording command via the communication unit; storing the recording command in the memory; and detecting a remaining amount of the consumables in the container. And the controller further performs: calculating a consumption amount of the consumables in accordance with the stored recording command; receiving authentication information; authenticating the stored recording command and comparing the detected remaining amount of the consumables with the calculated consumption amount to be consumed for the image of the authenticated recording command; and displaying information of a first authenticated recording command with a first indication indicating the first authenticated recording command is executed, when the calculated consumption amount is equal to or less than the detected remaining amount.
US09224078B2	Image forming apparatus, method, and computer-readable storage medium for forming images on recording media such as paper having different sizes An image forming apparatus is provided with a storage unit for storing setting information including at least a size of a substitute recording medium, and a processing unit for executing a print instruction by automatically changing a size of a recording medium to be used to the size of the substitute recording medium based on the setting information stored in the storage means, when the size of the recording medium specified by the print instruction is not available.
US09224072B2	System and method for generating a user interface from a printer description Systems, methods, and machine-readable media for generating a user interface from a printer description file are discussed. The system comprising an interface module, an option module, and an interface generation module. The interface module may be configured to receive a printer description file comprising a plurality of printer options for a remote printer and the option module may be configured to select a subset of the plurality of printer options for the remote printer based on a list of prioritized printer options. The interface generation module may be configured to generate rendering code based on the subset of the plurality of printer options for the remote printer, the rendering code to enable a computing device to generate a user interface for the remote printer. The rendering code may be transmitted to a computing device in response to receiving, from the computing device, a print request for the remote printer.
US09224061B1	Text orientation estimation in camera captured OCR A system estimates text orientation in images captured using a handheld camera prior detecting text in the image. Text orientation is estimated based on edges detected within the image, and the image is rotated based on the estimated orientation. Text detection and processing is then performed on the rotated image. Non-text features along a periphery of the image may be sampled to assure that clutter will not undermine the estimation of orientation.
US09224057B2	Biometric identification A system for biometrically authenticating a user includes: elements for obtaining image data that are representative of at least one user-associated biometric feature and at least one user-associated identifier, elements for extracting the at least one biometric feature in the image data, elements for extracting the at least one identifier in the image data, elements for performing a search for a reference biometric feature associated with the at least one identifier, elements for comparing the extracted biometric feature with the reference biometric feature, and elements for authenticating the user in accordance with a result of the comparison.
US09224052B2	Method for in-image periodic noise pixel inpainting A method for in-image periodic noise pixel inpainting is provided. It is determined whether a current frame includes periodic noise pixels, and locations of periodic noise pixels are identified. Non-periodic-noise pixels in a reference frame are utilized to inpaint the periodic noise pixels in the current frame.
US09224051B2	Lens-attached matter detector for determining presence or absence of attached matter, lens-attached matter detection method executed by the same, and vehicle system having the same A lens-attached matter detector includes an edge extractor configured to create an edge image based on an input image, divide the edge image into a plurality of areas including a plurality of pixels, and extract an area whose edge intensity is a threshold range as an attention area, a brightness distribution extractor configured to obtain a brightness value of the attention area and a brightness value of a circumference area, a brightness change extractor configured to obtain the brightness value of the attention area and the brightness value of the circumference area for a predetermined time interval, and obtain a time series variation in the brightness value of the attention area based on the brightness value of the attention area, and an attached matter determiner configured to determine the presence or absence of attached matter based on the time series variation in the brightness value of the attention area.
US09224049B2	Detection of static object on thoroughfare crossings Foreground object image features are extracted from input video via application of a background subtraction mask, and optical flow image features from a region of the input video image data defined by the extracted foreground object image features. If estimated movement features indicate that the underlying object is in motion, a dominant moving direction of the underlying object is determined. If the dominant moving direction is parallel to an orientation of the second, crossed thoroughfare, an event alarm indicating that a static object is blocking travel on the crossing second thoroughfare is not generated. If the estimated movement features indicate that the underlying object is static, or that its determined dominant moving direction is not parallel to the second thoroughfare, an appearance of the foreground object region is determined and a static-ness timer run while the foreground object region comprises the extracted foreground object image features.
US09224046B2	Multi-view object detection using appearance model transfer from similar scenes View-specific object detectors are learned as a function of scene geometry and object motion patterns. Motion directions are determined for object images extracted from a training dataset and collected from different camera scene viewpoints. The object images are categorized into clusters as a function of similarities of their determined motion directions, the object images in each cluster are acquired from the same camera scene viewpoint. Zenith angles are estimated for object image poses in the clusters relative to a position of a horizon in the cluster camera scene viewpoint, and azimuth angles of the poses as a function of a relation of the determined motion directions of the clustered images to the cluster camera scene viewpoint. Detectors are thus built for recognizing objects in input video, one for each of the clusters, and associated with the estimated zenith angles and azimuth angles of the poses of the respective clusters.
US09224045B2	Video camera with capture modes Embodiments provide a video camera that can be configured to allow tagging of recorded video and/or capture of video segments or sequences of images in response to user actuation of a camera control identifying an event of interest. For example, a user may press a button on the camera when an event of interest occurs, and in response the camera may tag a captured video file at a timestamp corresponding to the event. In another example, the user may initiate capture of video segments or sequences of images at an occurrence of an event of interest by pressing a button. The camera may include an image data buffer that may enable capture of video segments and/or sequences of images occurring before the user initiates capture of the event. User interfaces may enable the user to quickly review the captured video or sequences of images of the events of interest.
US09224043B2	Map generation apparatus, map generation method, moving method for moving body, and robot apparatus Performing map construction under a crowded environment where there are a lot of people. It includes a successive image acquisition unit that obtains images that are taken while a robot is moving, a local feature quantity extraction unit that extracts a quantity at each feature point from the images, a feature quantity matching unit that performs matching among the quantities in the input images, where quantities are extracted by the extraction unit, an invariant feature quantity calculation unit that calculates an average of the matched quantities among a predetermined number of images by the matching unit as an invariant feature quantity, a distance information acquisition unit that calculates distance information corresponding to each invariant feature quantity based on a position of the robot at times when the images are obtained, and a map generation unit that generates a local metrical map as a hybrid map.
US09224038B2	Partial overlap and delayed stroke input recognition An optimal recognition for handwritten input based on receiving a touch input from a user may be selected by applying both a delayed stroke recognizer as well as an overlapping recognizer to the handwritten input. A score may be generated for both the delayed stroke recognition as well as the overlapping recognition and the recognition corresponding to the highest score may be presented as the overall recognition.
US09224037B2	Apparatus and method for controlling presentation of information toward human object A human object recognition unit recognizes a human object included in a captured image data. A degree-of-interest estimation unit estimates a degree of interest of the human object in acquiring information, based on a recognition result obtained by the human object recognition unit. An information acquisition unit acquires information as a target to be presented to the human object. An information editing unit generates information to be presented to the human object from the information acquired by the information acquisition unit, based on the degree of interest estimated by the degree-of-interest estimation unit. An information display unit outputs the information generated by the information editing unit.
US09224035B2	Image classification and information retrieval over wireless digital networks and the internet A method and system for matching an unknown facial image of an individual with an image of a celebrity using facial recognition techniques and human perception is disclosed herein. The invention provides a internet hosted system to find, compare, contrast and identify similar characteristics among two or more individuals using a digital camera, cellular telephone camera, wireless device for the purpose of returning information regarding similar faces to the user The system features classification of unknown facial images from a variety of internet accessible sources, including mobile phones, wireless camera-enabled devices, images obtained from digital cameras or scanners that are uploaded from PCs, third-party applications and databases. Once classified, the matching person's name, image and associated meta-data is sent back to the user. The method and system uses human perception techniques to weight the feature vectors.
US09224032B2	Methods for analyzing absorbent articles A method for analyzing an absorbent article may include providing a three-dimensional computed tomography data set comprising a mannequin image and an article image. The article image may be constructed from projections collected while the absorbent article is fitted to a mannequin. An outer surface of the mannequin image may be identified. A desired distance may be provided. A volumetric demarcation may be spaced the desired distance away from the outer surface of the mannequin image. An image volume may be disposed between the outer surface of the mannequin image and the volumetric demarcation. A relevant portion of the article image may be enhanced using a processor. The relevant portion of the article image may be coincident with the image volume.
US09224030B2	Sensor identification Techniques described here use variations in the sensor to generate an identifier for the sensor. Each sensor may be comprised of sub-sensing units, called pixels that may demonstrate variation in their sensing capability from one pixel to another. Embodiments of the invention, describe a method for using the relative variance of each pixel (relative to the whole sensor or/and a portion of the sensor) in generating an identifier for the sensor. In one embodiment, the method may obtain information associated with a plurality of pixels from a sensor, detect variations in the information associated for each of the pixels from a subset of the plurality of pixels and generate an identifier for the sensor using the detected variations in the information associated with each of the pixels from the subset of plurality of pixels.
US09224029B2	Electronic device switchable to a user-interface unlocked mode based upon a pattern of input motions and related methods An electronic device may include a finger biometric sensor, a display, and a processor coupled to the finger biometric sensor and the display. The processor may be switchable between a user-interface locked mode and a user-interface unlocked mode. The processor may be capable of determining a pattern of input motions on the finger biometric sensor and displaying an image on the display corresponding to the pattern of input motions. The processor may also be capable of switching between the user-interface locked mode and the user-interface unlocked mode when the pattern of input motions matches a stored pattern representing a user unlock code.
US09224025B2	Decodable indicia reading terminal with optical filter A decodable indicia reading terminal can comprise a housing including a housing window, a multiple pixel image sensor disposed within the housing, an imaging lens configured to focus an image of decodable indicia on the image sensor, an optical bandpass filter disposed in an optical path of light incident on the image sensor, an analog-to-digital (A/D) converter configured to convert an analog signal read out of the image sensor into a digital signal representative of the analog signal, and processor configured to output a decoded message data corresponding to the decodable indicia by processing the digital signal.
US09224024B2	Invariant design image capture device An indicia reading terminal for reading of a decodable indicia is provided wherein the indicia reading terminal includes an image sensor integrated circuit comprising an image sensor having a plurality of pixels; a memory for storing image data, and a unit for processing the image data for attempting to decode decodable indicia represented in the image data; and an optical system, including a lens assembly and at least a first aperture and a second aperture, the second aperture being smaller than the first aperture. The lens assembly comprises one or more lens elements. The first aperture is disposed in the lens assembly, and the second aperture is disposed at a distal end of the optical system, adjacent to the lens assembly.
US09224023B2	Apparatus operative for capture of image data There is set forth an apparatus for capturing image data. In one embodiment, an apparatus is operative for capture of a first frame of image data and a second frame of image data. In one embodiment, an apparatus is operative for processing the first frame of image data and the second frame of image data.
US09224022B2	Autofocus lens system for indicia readers An autofocus lens system includes no conventional moving parts and has excellent speed and low power consumption. The system includes a small electronically-controlled focusing-module lens. The focusing-module lens includes two adjustable polymeric surfaces (e.g., two adjustable-surface lenses in a back-to-back configuration). The curvature of the surfaces can be adjusted to change focus. The performance of the autofocus lens system is extended by adding a conventional first and second lens, or lens group, on either side of the focusing-module lens. What results is an autofocus lens system with excellent near field and far field performance.
US09224020B2	Method, transponder, and circuit for selecting one or more transponders A method and device for selecting one or more transponders, in particular backscatter-based transponders, from a plurality of transponders by a base station, which method is based on a slotted ALOHA method, in which the base station defines numbered time slots and a random number generated in a given transponder determines a time slot when the transponder transmits its transponder-specific identification to the base station. The random number is generated in a given transponder with the aid of a random number generator, the relevant random number generator is switched into a counter operating mode after reception of a selection command transmitted by the base station, while a count state of the random number generator is decremented or incremented when the base station transmits the start of a time slot, the relevant transponder transmits a transponder-specific identification to the base station if the count state of its random number generator is equal to a predetermined value, and the relevant random number generator is then switched back into the operating mode for random number generation.
US09224019B2	Electromagnetic interference device identification system and method A system and method for device identification includes a receiver adapted to detect an electromagnetic radiation interference signal emitted by a device and a microprocessor operatively connected to the receiver. The microprocessor may identify at least one device characteristic parameter of the electromagnetic radiation signal. The system includes memory for storing at least one constant or predicted future characteristic value associated with the device and the microprocessor may compare the detected characteristic parameter to the at least one constant or predicted future characteristic value to identify and recognize the device that emitted the electromagnetic radiation signal.
US09224018B1	Swipe-guide for card reader Aspects of the technology relate to a swipe-guide attachment for use with a mobile card reader. In some aspects, the swipe-guide attachment is configured to facilitate insertion of a payment card into the card reader and prevent rotation of the card reader. A swipe-guide may include a harness for enclosing the card reader, and can include an aperture, for example, to permit passage of an audio plug of the card reader into a headphone port of a host mobile device.
US09224016B2	Automatic gain control and baseband preintegration to reduce computation requirements at lower data rates A method for processing baseband signals according to one embodiment includes receiving I and Q baseband signals; and selectively reducing an amount of samples of the baseband signals to be processed in a correlator, wherein the reduction rate is based on a data rate of the baseband signals. A preintegrator module according to one embodiment includes an automatic gain control section for performing automatic gain control on I and Q baseband signals; a first preintegrator coupled to an output of the automatic gain control section, the first preintegrator being for selectively reducing an amount of samples in the I baseband signal based on a data rate of the I baseband signal; and a second preintegrator coupled to an output of the automatic gain control section, the second preintegrator being for selectively reducing an amount of samples in the Q baseband signal based on a data rate of the Q baseband signal. Additional systems and methods are also presented.
US09224015B2	Smart wallet A smart wallet that can only be exclusively opened by an authorized individual through biometric authentication is disclosed. The smart wallet also has a security system associated therewith to prevent the smart wallet from being lost or stolen. The system comprises a fob key configured to send periodic wireless transmissions to the smart wallet device having the ability for approximate range detection. Various embodiments include audible, visual and vibrational indications for authentication, battery power and range detection.
US09224014B2	Hard disk drive sanitizer system and method A hard disk drive (HDD) sanitizer system comprises an electronic device having a basic input/output system (BIOS), the BIOS comprising a sanitizer routine executable for sanitizing a HDD.
US09224013B2	Secure processing sub-system that is hardware isolated from a peripheral processing sub-system Systems and methods are provided that allow a secure processing system (SPS) to be implemented as a hard macro, thereby isolating the SPS from a peripheral processing system (PPS). The SPS and the PPS, combination, may form a secure element that can be used in conjunction with a host device and a connectivity device to allow the host device to engage in secure transactions, such as mobile payment over a near field communications (NFC) connection. As a result of the SPS being implemented as a hard macro isolated from the PPS, the SPS may be certified once, and re-used in other host devices without necessitating re-certification.
US09224011B2	Embedded system, information processing unit, and image forming apparatus An embedded system includes a nonvolatile memory, a control section, and a firmware update section. The nonvolatile memory stores firmware and a public key in a normal area, and stores a hash value concerning the public key in an access restricted area. The control section reads and executes the firmware from the nonvolatile memory. The firmware update section receives new firmware in which the hash value is encrypted and given as an electronic signature, and updates the firmware to the new firmware. The firmware update section is configured to: read the public key from the nonvolatile memory to calculate the hash value concerning the public key; when the hash value is identical to the hash value stored in the nonvolatile memory, calculate a hash value of the new firmware; decrypt the electronic signature with the public key to restore the hash value; and when these hash values are identical to each other, update the firmware.
US09224010B2	Secure document creation from potentially unsecure source templates An illustrative embodiment of a computer-implemented method for generating secured documents using a source template is disclosed, in which a computer system receives the source template; converts the source template into a secured template comprising user-modifiable extension points, wherein the secured template is not user-modifiable outside of the user-modifiable extension points; receives a user input comprising one or more user-indicated modifications at one or more of the user-modifiable extension points; modifies the secured template into a custom document with modifications to the one or more user-modifiable extension points in accordance with the one or more user-indicated modifications; and transforms the custom document into a secured custom document that comprises the modifications to the one or more user-modifiable extension points and that is in a format that is executable using a source schema associated with the source template.
US09224008B1	Detecting impersonation on a social network In one implementation, a method includes receiving a claim that identifies a first user profile page as allegedly impersonating a second user profile page on a social network, and retrieving first information associated with the first user profile page and second information associated with the second user profile page. The method can also include comparing the first information and the second information to identify indicators of impersonation. The method can further include, based upon the identified indicators of impersonation, determining that the first user profile page is likely impersonating the second user profile page on the social network, wherein first user profile page is determined to be likely impersonating the second user profile page when the first and second user profile pages are determined to be similar to each other; and returning a flag indicating that the first user profile page is likely impersonating the second user profile page.
US09224006B1	System and method of secure data access Disclosed are systems, methods and a computer readable medium for providing multi-level data access security. An example method includes performing an analysis of hardware and software of a user's computer system in order to mitigate the risk of unauthorized data access; receiving a user's request for data access from an application on the user's computer system, wherein the request contains a query for retrieving data; modifying the user's request for data access for possible risk mitigation based on results of the hardware and software analysis; authenticating a user sending the request for data access and redirecting the request for data access in case of successful authentication; identifying user's clearance level; retrieving query result from data storage based on user's clearance level and user's query; applying access control policies to query result for modifying query result in order to exclude from query result information requiring suppression; and transmitting final query result to the user's computer system.
US09224005B2	Cloud key directory for federating data exchanges Methods, systems, and computer program products for providing attribute-based data access. Embodiments include receiving a data request specifying search data attributes describing requested data that is to be found in an anonymous directory. The anonymous directory provides access to secured data of clients according to access controls, including secured data comprising a first portion that is unencrypted and readable by the anonymous directory and a second portion that is encrypted and unreadable by the anonymous directory. The second portion is encrypted using multi-authority attribute-based encryption that associates the second portion with encryption data attributes. The anonymous directory provides the first acid second portions of data f conditions in the access controls are met. The first and second portions of data are provided, based on determining that the conditions in the access controls are met, and that at least one data attribute is relevant to at least one encryption data attribute.
US09224002B2	Method and apparatus for file encryption/decryption A file encrypting method and apparatus, and a file decrypting method and apparatus is provided. The method includes following steps: creating a virtual disk; the virtual disk receiving a writing request from a file system, encrypting data in the writing request; and notifying the file system to write the encrypted data into a corresponding physical disk, so that the file system writes the encrypted data into the corresponding physical disk after receiving a notification from the virtual disk. The methods and apparatuses can employ the virtual disk to encrypt data in the writing request and decrypt the data required by the reading request, and this manner achieves highly-reliable, secure and effective file encrypting.
US09224000B1	Systems and methods for providing information security using context-based keys Systems and methods for securing or encrypting data or other information arising from a user's interaction with software and/or hardware, resulting in transformation of original data into ciphertext. Generally, the ciphertext is generated using context-based keys that depend on the environment in which the original data originated and/or accessed. The ciphertext can be stored in a user's storage device or in an enterprise database (e.g., at-rest encryption), or shared with other users (e.g., cryptographic communication). Use of context-based encryption keys enables key association with individual data elements, as opposed to public-private key pairs, or use of conventional user-based or system-based keys. In scenarios wherein data is shared by a sender with other users, the system manages the rights of users who are able to send and/or access the sender's data according to pre-defined policies/roles.
US09223998B1	System and method for enhancing data security by use of dynamic honey tokens Systems and methods for enhancing the security of confidential data such as customer email lists or similar contact information. Specifically, the invention is directed to a method of inserting a form of data referred to as a honey token into a data set when it is accessed by a user (such as an employee of the rightful owner of the data). In contrast to conventional forms of such tokens, the inventive token is dynamically generated and includes information identifying the user (i.e., the party accessing the data).
US09223997B2	Detecting and breaking CAPTCHA automation scripts and preventing image scraping A security device may receive a request from a client device and intended for a server device. The security device may identify the request as being associated with a malicious activity. The malicious activity may include one or more undesirable tasks directed to the server device. The security device may generate a challenge-response test based on identifying the request as being associated with the malicious activity. The challenge-response test may be generated using one or more construction techniques. The security device may provide the challenge-response test to the client device. The security device may receive, from the client device, a proposed solution to the challenge-response test. The security device may identify the proposed solution as being generated using an optical character recognition (OCR) program. The security device may protect the server device from the client device based on identifying the solution as being generated using an OCR program.
US09223996B2	Protection of memory areas A method for loading a program, contained in at least a first memory, into a second memory accessible by an execution unit, in which the program is in a cyphered form in the first memory, a circuit for controlling the access to the second memory is configured from program initialization data, instructions of the program, and at least initialization data being decyphered to be transferred into the second memory after configuration of the circuit.
US09223992B2	System and method for evaluating a reverse query Real-time techniques for determining all access requests to an attribute-based access control policy which evaluate to a given decision, “permit” or “deny”. The policy is enforced to control access to one or more resources in a computer network. In one embodiment, a method includes: (i) receiving a reverse query and a set of admissible access requests, each of which includes one or more attributes in the policy and values of these; (ii) extracting attributes to which all access requests in the set assign identical values; (iii) reducing the ABAC policy by substituting values for the extracted attributes; (iv) caching the policy as a simplified policy; (v) translating the simplified policy and the given decision into a satisfiable logic proposition; (vi) deriving all solutions satisfying the proposition; and (vi) extracting, based on the solutions, all access requests from the set for which the policy yields the given decision.
US09223987B2	Confidential information identifying method, information processing apparatus, and program An information processing apparatus includes a clustering unit configured to read messages from a log and to classify the read messages into clusters according to similarities of the messages; a variable portion finding unit configured to find a portion variable between messages; an attribute determination unit configured to estimate and determine a confidential attribute of the variable portion by using predefined rule; and an attribute estimation unit configured to, in a case where there is a portion whose confidential attribute is undeterminable by using the rules, estimate the confidential attribute of the portion having the undeterminable confidential attribute with use of either a correspondence between appearance locations in the messages, or a co-appearance relation of a portion having a determined confidential attribute and the portion having the undeterminable confidential attribute.

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