Document Document Title
US09225028B2 Fuel cell system
A fuel cell system capable of carrying out a proper current limiting even when decreasing a cell voltage through, e.g., a rapid warm-up is provided. When a rapid warm-up is started, an acceptable cell-voltage value setting part sets a acceptable lowest-cell-voltage value in accordance with the operation state of a fuel cell. Meanwhile, a target cell-voltage value setting part sets an initial value for a target lowest-cell-voltage value. The target cell-voltage value setting part then compares a lowest cell voltage detected by a cell monitor with the set target lowest-cell-voltage value, and judges whether or not the lowest cell voltage is near the target lowest-cell-voltage value continuously for a given time period. If the result of the judgment is positive, the target cell-voltage value setting part updates the target lowest-cell-voltage value with a value obtained by decreasing the target lowest-cell-voltage value only by an update width.
US09225027B2 Method of forming a fuel cell stack
A method of forming a fuel cell stack, wherein the stack includes an anode electrode layer, an adhesive and anode gas diffusion layer coupled to the anode electrode layer, an ion exchange membrane coupled on a first side to the gas diffusion layer opposite the anode electrode layer, an adhesive and cathode gas diffusion layer coupled to a second side of the ion exchange membrane, and a cathode electrode layer coupled to the adhesive and cathode gas diffusion layer opposite the ion exchange membrane. The fuel cell stack may be flexible.
US09225025B2 PEM fuel cell stack
A fuel cell includes a cathode flow field plate, an anode flow field plate, and a membrane electrode assembly (MEA) sandwiched between the cathode and anode flow field plate. The cathode flow field plate has a flat side and an opposed channel side that the MEA is sandwiched between the anode flow field plate and the flat side of the cathode flow field plate. The cathode flow field plate further has a plurality of flow channels formed at the channel side for enabling fluid flowing along the flow channels to promote electrochemical reaction through the MEA so as to generate electrical energy.
US09225024B2 Highly sinterable lanthanum strontium titanate interconnects through doping
An interconnect material is formed by combining a lanthanum-doped strontium titanate with an aliovalent transition metal to form a precursor composition and sintering the precursor composition to form the interconnect material. The aliovalent transition metal can be an electron-acceptor dopant, such as manganese, cobalt, nickel or iron, or the aliovalent transition metal can be an electron-donor dopant, such as niobium or tungsten. A solid oxide fuel cell, or a strontium titanate varistor, or a strontium titanate capacitor can include the interconnect material that includes a lanthanum-doped strontium titanate that is further doped with an aliovalent transition metal.
US09225022B2 Positive active material for lithium secondary battery and lithium secondary battery
The positive active material is a positive active material for a lithium secondary battery, including a lithium transition metal compound that has an olivine crystal structure and contains at least Ni, Fe, and Mn as transition metal elements, wherein when the sum of mole atoms of Ni, Fe, and Mn of transition metal elements contained in the lithium transition metal compound is expressed as 1, and the mole atomic ratios of Ni, Fe, and Mn are represented by a, b, and c (a+b+c=1, a>0, b>0, c>0), respectively, the following is satisfied: 0.85≦c≦0.92 and 0.3≦a/(a+b)≦0.9.
US09225021B2 Nonaqueous electrolyte secondary battery
A nonaqueous electrolyte secondary battery includes: a positive electrode; a negative electrode; and a nonaqueous electrolyte, wherein the positive electrode contains a positive electrode active material having an olivine structure, and the nonaqueous electrolyte contains at least one member of sulfone compounds represented by the following formulae (1) and (2). wherein R1 represents CmH2m-n1Xn2; X represents a halogen; m represents an integer of from 2 to 7; each of n1 and n2 independently represents an integer of from 0 to 2m; R2 represents CjH2j-k1Zk2; Z represents a halogen; j represents an integer of from 2 to 7; and each of k1 and k2 independently represents an integer of from 0 to 2j.
US09225020B2 Positive electrode active substance for lithium ion batteries, positive electrode for lithium ion batteries, and lithium ion battery
The present invention provides a positive electrode active material for a lithium ion battery which has high capacity and good rate characteristics. The positive electrode active material has a layer structure represented by the compositional formula: Liα(NiβMe1-β)Oγ, wherein Me represents at least one type selected from the group consisting of Mn, Co, Al, Mg, Cr, Ti, Fe, Nb, Cu and Zr, x denotes a number from 0.9 to 1.2, y denotes a number from 0.5 to 0.65, and z denotes a number of 1.9 or more. The positive electrode active material is selected by measuring the coordinates of the lattice constant a and compositional ratio (Li/M) and selecting materials within the region enclosed by three lines given by the equations: y=−20.186x+59.079, y=35x−99.393, and y=−32.946x+95.78, wherein the x-axis represents a lattice constant a and the y-axis represents a compositional ratio (Li/M) of Li to M.
US09225018B2 Air cathode for air batteries and air battery
The present invention is to provide an air cathode for air batteries, having excellent high-rate discharge performance, and an air battery comprising the air cathode.Disclosed is an air cathode for air batteries, using oxygen as an active material and configured to form an air battery comprising the air cathode, an anode and an electrolyte layer present between the air cathode and the anode, the air cathode comprising: a catalyst layer which contains at least an electrode catalyst and an electroconductive material; an oxide as the electrode catalyst, which is active against at least oxygen reduction reaction; and at least one kind of metal carbide as the electroconductive material, selected from the group consisting of a tungsten carbide, a titanium carbide and a molybdenum carbide.
US09225017B2 Alkaline storage cell and method for manufacturing alkaline storage cell
An alkaline storage cell comprises a positive electrode including a cobalt additive and nickel hydroxide particles that have been covered by a cobalt compound film layer, and a negative electrode including a hydrogen-absorbing alloy that contains nickel and cobalt. The positive electrode has a capacitance V, the negative electrode has a capacitance W, the cobalt additive is cobalt metal or a cobalt compound, the positive electrode contains X mass % of the cobalt additive, the cobalt is included by Y mass % in the hydrogen-absorbing alloy, and X, Y, V, and W satisfy the relationship 1.1≦(X/Y)×(W/V)≦1.91.
US09225010B2 Silicon-containing particles, negative electrode material for nonaqueous electrolyte secondary battery using the same, nonaqueous electrolyte secondary battery, and method of manufacturing silicon-containing particles
The present invention intends to provide silicon-containing particles that, when used as a negative electrode active material for a nonaqueous electrolyte secondary battery, can form a nonaqueous electrolyte secondary battery that is less in volume change during charge/discharge and has high initial efficiency and excellent cycle characteristics. The present invention provides silicon-containing particles that are used as a negative electrode active material for a nonaqueous electrolyte secondary battery and have a diffraction line with a peak at 2θ=28.6° in X-ray diffractometry, a negative electrode material for a nonaqueous electrolyte secondary battery therewith, a nonaqueous electrolyte secondary battery, and a method of manufacturing the silicon-containing particles.
US09225003B2 Method for manufacturing storage battery electrode, storage battery electrode, storage battery, and electronic device
To provide a method for forming a storage battery electrode including an active material layer with high density in which the proportion of conductive additive is low and the proportion of the active material is high. To provide a storage battery having a higher capacity per unit volume of an electrode with the use of a storage battery electrode formed by the formation method. A method for forming a storage battery electrode includes the steps of forming a mixture including an active material, graphene oxide, and a binder; providing a mixture over a current collector; and immersing the mixture provided over the current collector in a polar solvent containing a reducer, so that the graphene oxide is reduced.
US09224996B2 Battery pack including a plurality of unit cells with a case having an insulation structure that engages with guide pins
A battery pack including a plurality of unit cells, the battery pack including: a plurality of unit cells, a case accommodating the plurality of unit cells, and a first insulation structure covering a first external surface of the case. A plurality of first guide pins project from the first external surface of the case. A plurality of first coupling holes into which the first guide pins are respectively inserted is formed in the first insulation structure.
US09224992B2 Secondary battery
A secondary battery capable of preventing an internal electric short by allowing an upper cap plate to be deformed toward the outside of a can and having improved stability under external impacts. The secondary battery includes a can having an internal space, an electrode assembly inserted into the space of the can, and a cap plate coupled to a top portion of the can, wherein the cap plate includes a deformation inducing part having a groove formed on its one surface.
US09224991B2 Nonaqueous electrolyte battery
A nonaqueous electrolyte battery is provided which includes a battery element, and a package member for packaging the battery element, and in the nonaqueous electrolyte battery, the package member includes a layer which contains a blackbody material capable of using blackbody radiation and which has an emissivity of 0.6 or more.
US09224987B2 Device for manufacturing organic light-emitting display panel and method of manufacturing organic light-emitting display panel using the same
A device for manufacturing an organic light-emitting display panel and a method of manufacturing an organic light-emitting display panel by using the same. A device for manufacturing an organic light-emitting display panel includes a plurality of chambers; a deposition unit configured to form a transfer layer on a film supplied into the plurality of chambers in a roll-to-roll process; and a laser thermal transfer device configured to transfer a pattern of the transfer layer formed on the film onto a substrate that is supplied into a chamber of the plurality of chambers.
US09224986B2 Organic light-emitting display device and method of manufacturing same
An organic light-emitting display device includes a substrate; a passivation layer disposed on the substrate; at least one color filter disposed on the passivation layer; an overcoat layer covering the at least one color filter; a first electrode disposed on the passivation layer and surrounding the overcoat layer; a second electrode facing the first electrode; and an organic layer disposed between the first electrode and the second electrode.
US09224985B2 Optoelectronic component
An optoelectronic component may include an electrically active region and a light-refracting structure which includes at least one graphene layer, in which at least one lens-like structure is formed. The electrically active region may include a first electrode, a second electrode, and an organic functional layer structure between the first electrode and the second electrode.
US09224984B2 Optical films for reducing color shift and organic light-emitting display apparatuses employing the same
Optical films, and organic-light-emitting display apparatuses, include a high refractive index pattern layer including a first surface and a second surface facing each other. The first surface includes a pattern having grooves. The grooves each have a curved surface and a depth greater than a width. The high refractive index pattern layer is formed of a material having a refractive index greater than 1. Further included is a low refractive index pattern layer formed of a material having a refractive index smaller than that of the material constituting the high refractive index pattern layer. The low refractive index pattern layer includes a filling material for filling grooves. A tilt angle, θ, of each groove satisfies the following condition, 15°≦θ≦75°.
US09224977B2 Method of manufacturing organic electroluminescent display device
A method of manufacturing an organic electroluminescent display device of the invention includes the steps of: forming, on a mother substrate including display regions and terminal forming regions, an upper electrode in each of the display regions; and cutting the mother substrate along each border between the display regions to thereby divide the mother substrate into a plurality of individual pieces. The step of forming the upper electrode includes the step of depositing a material of the upper electrode in the display regions using a mask including a frame-shaped frame and stripe-shaped shielding portions that cover regions corresponding to the terminal forming regions. The shielding portion is fixed in a state where the shielding portion spans between facing sides of the frame and tension in one direction is applied, and extends only in the one direction inside an inner periphery of the frame in a plan view.
US09224972B2 Organic light emitting diode display having dual gate thin film transistors
An organic light emitting diode (OLED) display is disclosed. In one embodiment, the display includes: 1) a data line and a driving voltage line crossing a scan line and respectively transmitting a data signal and a driving voltage, 2) a switching thin film transistor connected to the scan line and the data line and 3) a driving thin film transistor connected to the switching thin film transistor and the driving voltage line. The display also includes a compensation thin film transistor compensating a threshold voltage of the driving thin film transistor and connected to the driving thin film transistor and an OLED connected to the driving thin film transistor, wherein the compensation gate electrode of the compensation thin film transistor includes a first compensation gate electrode and a second compensation gate electrode separated from and formed with different layers from each other.
US09224966B2 Organic light-emitting device, method of manufacturing the same, and flat panel display device including the same
An organic light-emitting device including: a substrate; a first electrode; a second electrode; an emission layer between the first electrode and the second electrode; and an electron transport layer between the emission layer and the second electrode, wherein the emission layer includes a blue emission layer, the electron transport layer includes a unit that includes a first single layer including a first material, a first mixed layer on the first single layer and including the first material and a second material, a second single layer on the first mixed layer and including the second material, a second mixed layer on the second single layer and including the first and second materials, and a third single layer on the second mixed layer and including the first material, wherein the first mixed layer has a thickness that is larger than that of the second mixed layer.
US09224961B2 Condensed-cyclic compound, organic light-emitting diode comprising the same and flat panel display device comprising the organic light-emitting diode
A condensed-cyclic compound of Formula 1, an organic light-emitting diode (OLED) including the same and a flat panel display device including the OLED. The condensed-cyclic compound of Formula 1 may be used in an organic light-emitting diode. Accordingly, an OLED according to an embodiment of the present invention includes a first electrode, a second electrode disposed opposite to the first electrode, and a first layer interposed between the first electrode and the second electrode, wherein the first layer includes the condensed-cyclic compound represented by Formula 1. The OLED may further include at least one layer selected from the group consisting of a hole injection layer, a hole transport layer, an emission layer, a hole blocking layer, an electron transport layer and an electron injection layer.
US09224954B2 Organic light emitting diode and method of manufacturing
Aspects of the present disclosure provide for manufacturing an organic light emitting diode (OLED) by forming two terminals of the OLED on two substrates of the display, and then depositing a plurality of layers of the OLED on one or both of the two terminals to form a first portion and a second portion of the OLED on each substrate. The two portions are joined together to form an assembled OLED. The deposition of the two portions can be stopped with each portion having approximately half of a common layer exposed. The two portions can then be aligned to be joined together and an annealing process can be employed to join together the two parts of the common layer and thereby form the OLED.
US09224949B2 Memristive elements that exhibit minimal sneak path current
Memristive elements are provided that include an active region disposed between a first electrode and a second electrode, the active region including two switching layers formed of a switching material capable of carrying a species of dopants and a conductive layer formed of a dopant source material. Memristive elements also are provided that include two active regions disposed between a first electrode and a second electrode, and a third electrode being disposed between and in electrical contact with both of the active regions. Each of the active regions include a switching layer formed of a switching material capable of carrying a species of dopants and a conductive layer formed of a dopant source material. Multilayer structures including the memristive elements also are provided.
US09224948B2 Resistance variable memory device with nanoparticle electrode and method of fabrication
A chalcogenide-based programmable conductor memory device and method of forming the device, wherein a nanoparticle is provided between an electrode and a chalcogenide glass region. The method of forming the nanoparticle utilizes a template over the electrode or random deposition of the nanoparticle.
US09224946B2 Three-terminal synapse device and method of operating the same
A three-terminal synapse device may include a drain layer formed on a substrate, a gate layer formed on the drain layer, a source layer vertically stacked on the substrate and facing the drain layer and the gate layer. First and second vertical insulating layers may be formed between the source layer and a stack including the drain layer and the gate layer. The first and second vertical insulating layers have different ion mobilities from each other. The first and second vertical insulating layers may cover side surfaces of the drain layer and the gate layer. The ion mobility of the second vertical insulating layer may be greater than that of the first vertical insulating layer.
US09224942B2 Memory element and memory device
There is disclosed a memory element including a layered structure including a memory layer that has a magnetization perpendicular to a film face; a magnetization-fixed layer; and an insulating layer provided between the memory layer. An electron that is spin-polarized is injected in a lamination direction of a layered structure, a magnitude of an effective diamagnetic field which the memory layer receives is smaller than a saturated magnetization amount of the memory layer, in regard to the insulating layer that comes into contact with the memory layer, and the other side layer with which the memory layer comes into contact at a side opposite to the insulating layer, at least an interface that comes into contact with the memory layer is formed of an oxide film, and the memory layer includes at least one of non-magnetic metal and oxide in addition to a Co—Fe—B magnetic layer.
US09224941B2 System with magnetically stable states and method for asserting magnetically stable state
The disclosed subject matter relates to a non-volatile memory bit cell (500 or 600) for solid-state data storage, including, e.g., an elongated magnetic element (102) or “dot”. For appropriate geometry and dimensions of the dot, a two-fold, energetically-degenerate micromagnetic configuration (100 or 200) can be stabilized. Such a stable configuration can consist of two magnetic vortices (1081, 1082) and a flower state region (110). Due to energy minimization, the flower state region can be off-center (relative to a minor axis (106)) and along the major axis (104) of the dot. An electrical current (302) flowing perpendicular to the plane at, or in proximity to, the dot center can, according to current polarity, switch the configuration or state of the dot between the two specular magnetically stable configurations (e.g., a write operation). Reading of the cell state can be accomplished by using the magnetoresistive effect.
US09224939B2 Tunneling magnetoresistance sensor
A tunneling magnetoresistance sensor includes a substrate, an insulating layer, a tunneling magnetoresistance component and a first electrode array. The insulating layer is disposed on the substrate. The tunneling magnetoresistance component is in contact with the insulating layer and includes at least one magnetic tunneling junction unit. The first electrode array disposed in direct contact with the insulating layer. The first electrode array includes a number of first electrodes. Each of the at least one magnetic tunneling junction unit is electrically connected to two neighboring first electrodes of the first electrode array to form a current-in-plane tunneling conduction mode.
US09224934B2 Stress relief for array-based electronic devices
In accordance with certain embodiments, an electric device includes a flexible substrate having first and second conductive traces on a first surface thereof and separated by a gap therebetween, an electronic component spanning the gap, and a stiffener configured to substantially prevent flexing of the substrate proximate the gap during flexing of the substrate.
US09224931B2 Method for producing an optoelectronic semiconductor component
A method of producing a component including providing a carrier having a top, an underside, and at least one connection area, applying an optoelectronic component to the top, wherein the optoelectronic component has a contact area facing away from the carrier, applying insulating material to the contact and connection areas, wherein the insulating material is free of foreign particles, applying an insulating layer to exposed places of the insulating material, optoelectronic component and carrier, wherein the insulating layer includes foreign particles in a predefinable concentration, removing the insulating layer in a region above the contact and/or connection areas, to produce openings, removing the insulating material in a region above the contact and connection areas, thereby producing at least two openings in the insulating material, and arranging conductive material on the insulating layer and at least in places in the openings, wherein conductive material conductively connects the contact and connection areas.
US09224930B2 Semiconductor light emitting device and multiple lead frame for semiconductor light emitting device
A semiconductor light emitting device that is excellent in radiating heat and that can be molded into a sealing shape having intended optical characteristics by die molding is provided. The semiconductor light emitting device includes: a lead frame including a plate-like semiconductor light emitting element mounting portion having an LED chip mounted on a main surface, and a plate-like metal wire connecting portion extending over a same plane as the semiconductor light emitting element mounting portion; a metal wire electrically connecting the LED chip and the metal wire connecting portion; a thermosetting resin molded by die molding or dam-sheet molding so as to completely cover the LED chip and the metal wire; and a resin portion provided to surround the lead frame and having the thickness not greater than the thickness of the lead frame.
US09224924B2 Optoelectronic component including an adhesive layer and method for producing the same
An optoelectronic component includes at least one active semiconductor layer sequence, at least one first and one second element, and at least one adhesive layer arranged between at least one first element and at least one second element. The adhesive layer is produced from an adhesive that comprises at least a first monofunctional, difunctional or polyfunctional epoxy resin, an accelerator and an adhesion promoter.
US09224923B2 Light enhancing structure for a light emitting diode
A light enhancing structure includes a light emitting diode in it and at least one coating layer. The light emitting diode unit includes a plurality of surfaces and a light-emitting surface. The light-emitting surface is for allowing a plurality of lights generated inside the light emitting diode unit to emit through. The coating layer is formed on the surfaces for blocking or reflecting one of the lights generated inside the light emitting diode unit, and to light intensity of the light emitting diode unit is enhanced.
US09224922B2 Light emitting device
A light emitting device includes at least one layer below or above a reflective layer to prevent delamination of the reflective layer from a layer below and/or above the reflective layer.
US09224918B2 Light emitting diode with nanostructured layer and methods of making and using
A light emitting diode has a plurality of layers including at least two semiconductor layers. A first layer of the plurality of layers has a nanostructured surface which includes a quasi-periodic, anisotropic array of elongated ridge elements having a wave-ordered structure pattern, each ridge element having a wavelike cross-section and oriented substantially in a first direction.
US09224917B2 Light emitting diode having photonic crystal structure and method of fabricating the same
Disclosed are a light emitting diode (LED) having a photonic crystal structure and a method of fabricating the same. An LED comprises a support substrate, a lower semiconductor layer positioned on the support substrate, an upper semiconductor layer positioned over the lower semiconductor layer, an active region positioned between the lower and upper semiconductor layers, and a photonic crystal structure embedded in the lower semiconductor layer. The photonic crystal structure may prevent the loss of the light advancing toward the support substrate and improve the light extraction efficiency.
US09224913B2 Near UV light emitting device
Disclosed herein is an ultraviolet (UV) light emitting device. The light emitting device includes an n-type contact layer including a GaN layer; a p-type contact layer including a GaN layer; and an active layer of a multi-quantum well structure disposed between the n-type contact layer and the p-type contact layer, the active area configured to emit near ultraviolet light at wavelengths of 365 nm to 309 nm.
US09224912B2 Optoelectronic device and method for manufacturing the same
A method of fabricating an optoelectronic device, comprises: providing a substrate, wherein the substrate comprises a first major surface and a second major surface opposite to the first major surface; forming a light emitting stack on the second major surface of the substrate; forming a supporting layer covering the light emitting stack; forming a plurality of first modified regions in the substrate by employing a first energy into the substrate after forming the supporting layer; and cleaving the substrate.
US09224908B2 Electro-optical device and electronic apparatus
An electro-optical device includes a scanning line and a data line intersecting each other, a pixel circuit provided at a position corresponding to an intersection of the scanning line and the data line, and a power supply wiring line that supplies a given potential. The pixel circuit includes a light emitting element and a driving transistor configured to control a current flowing through the light emitting element. A gate electrode of the driving transistor is electrically connected via a first relay electrode to a given node. The first relay electrode is formed in the same layer as the power supply wiring line and the data line. The first relay electrode is surrounded on at least three sides by the power supply line.
US09224901B1 Scintillator and semiconductor based materials incorporating radioactive materials
Scintillator and semiconductor based materials incorporating radioactive materials and their method of manufacture are disclosed. The disclosed materials are integrated with energy conversion devices and structures to provide nuclear battery assemblies which exhibit increased power densities.
US09224900B2 Display device and manufacturing method thereof
A touch sensitive display device utilizing infrared ray sensing transistors. The transistors are configured, and comprise specified materials, to allow them to be formed with fewer photolithography processes, reducing cost and manufacturing time.
US09224895B2 Photovoltaic device including semiconductor nanocrystals
A photovoltaic device includes a semiconductor nanocrystal and a charge transporting layer that includes an inorganic material. The charge transporting layer can be a hole or electron transporting layer. The inorganic material can be an inorganic semiconductor.
US09224894B2 Device for the homogeneous wet-chemical treatment of substrates
A device for wet-chemical treatment of substrates includes: an accommodation device for a substrate and a process medium, the substrate having a treatment side in operative connection with the process medium; a fluid guidance element, having a specified surface texture, housed in the accommodation device, the specified surface texture being configured to provide a guidance of the process medium along the specified surface texture, the specified surface texture being positioned lying opposite and at a predetermined fixed recess at a distance from the treatment side of the substrate; and the process medium being moved in the intervening space between the specified surface texture of the fluid guidance element and the treatment side of the substrate.
US09224892B2 Silicon thin film solar cell having improved haze and methods of making the same
A method of increasing the haze of a coating stack having a top layer and an undercoating layer using a chemical vapor deposition coating process includes at least one of: increasing a precursor flow rate; decreasing a carrier gas flow rate; increasing a substrate temperature; increasing a water flow rate; decreasing an exhaust flow rate; and increasing a thickness of at least one of the top layer or undercoating layer.
US09224889B2 Optical assembly for a light sensor, light sensor assembly using the optical assembly, and vehicle rearview assembly using the light sensor assembly
An optical assembly is provided wherein the optical assembly includes a first optical element and a second optical element. The first optical element is configured to receive light and alter a transmission path of the light through the first optical element in a first direction and a second direction. The second optical element is configured to receive the light from the first optical element, and alter a transmission path of the light through the second optical element in the first and second directions. The light is passed through the second optical element, such that a sensor receives light from a field of view that is approximately 30 degrees to 60 degrees offset from a field of view of the sensor.
US09224886B2 Silicon thin film solar cell
A silicon thin film solar cell is discussed. The silicon thin film solar cell includes a substrate on which light is incident, a first electrode positioned on the substrate at a surface opposite a surface of the substrate on which the solar light is incident, a second electrode positioned on the first electrode, at least one photoelectric conversion unit positioned between the first electrode and the second electrode, and a back reflection layer positioned between the at least one photoelectric conversion unit and the second electrode. The back reflection layer includes a first reflection layer formed of a material having an absorption coefficient equal to or less than 400 cm−1 with respect to light having a wavelength equal to or greater than 700 nm.
US09224885B2 Conductive compositions and processes for use in the manufacture of semiconductor devices—organic medium components
Embodiments of the invention relate to a silicon semiconductor device, and a conductive paste for use in the front side of a solar cell device.
US09224884B2 Light sensor having transparent substrate and diffuser formed therein
A light sensor is described that includes a glass substrate having a diffuser formed therein and at least one color filter integrated on-chip (i.e., integrated on the die of the light sensor). In one or more implementations, the light sensor comprises a semiconductor device (e.g., a die) that includes a semiconductor substrate. At least one photodetector (e.g., photodiode, phototransistor, etc.) is formed in the substrate proximate to the surface of the substrate. The color filter is configured to filter light received by the light sensor to pass light in a limited spectrum of wavelengths (e.g., light having wavelengths between a first wavelength and a second wavelength) to the photodetector. A glass substrate is positioned over the substrate and includes a diffuser. The diffuser is configured to diffuse light incident on the diffuser and to pass the diffused light to the at least one color filter for further filtering.
US09224882B2 Low voltage photodetectors
A low voltage photodetector structure including a semiconductor device layer, which may be Ge, is disposed over a substrate semiconductor, which may be Si, for example within a portion of a waveguide extending laterally within a photonic integrated circuit (PIC) chip. In exemplary embodiments where the device layer is formed over an insulator layer, the insulator layer is removed to expose a surface of the semiconductor device layer and a passivation material formed as a replacement for the insulator layer within high field regions. In further embodiments, controlled avalanche gain is achieved by spacing electrodes in a metal-semiconductor-metal (MSM) architecture, or complementary doped regions in a p-i-n architecture, to provide a field strength sufficient for impact ionization over a distance not significantly more than an order of magnitude greater than the distance that a carrier must travel so as to acquire sufficient energy for impact ionization.
US09224878B2 High work function, manufacturable top electrode
Provided are MIM DRAM capacitors and methods of forming thereof. A MIM DRAM capacitor may include an electrode layer formed from a high work function material (e.g., greater than about 5.0 eV). This layer may be used to reduce the leakage current through the capacitor. The capacitor may also include another electrode layer having a high conductivity base portion and a conductive metal oxide portion. The conductive metal oxide portion serves to promote the growth of the high k phase of the dielectric layer.
US09224874B2 Semiconductor storage device
A semiconductor storage device according to the present embodiment includes a semiconductor substrate. A tunnel insulating film is provided on the semiconductor substrate. A charge accumulation layer is provided on the tunnel insulating film. An intermediate dielectric film is provided on the charge accumulation layer. A control gate electrode is formed on the intermediate dielectric film. The intermediate dielectric film includes a laminated film of silicon oxide films of multiple layers and silicon nitride films of at least one layer, and a silicon oxynitride film provided between adjacent ones of the silicon oxide films and the silicon nitride films.
US09224868B2 Pixel structure
A pixel structure includes a substrate, a patterned semiconductor layer, an insulation layer, a gate electrode, a first inter-layer dielectric (ILD) layer, a second ILD layer, a third ILD layer, a source electrode and a drain electrode. The patterned semiconductor layer is disposed on the substrate. The insulation layer is disposed on the patterned semiconductor layer. The gate electrode is disposed on the insulation layer. The first ILD layer is disposed on the gate electrode, the second ILD layer is disposed on the first ILD layer, and the third ILD layer is disposed on the second ILD layer. The source electrode and the drain electrode are disposed on the third ILD layer, wherein the source electrode and the drain electrode are electrically connected to the patterned semiconductor layer via a first contact window and a second contact window respectively.
US09224865B2 FinFET with insulator under channel
A FinFET has a structure including a semiconductor substrate, semiconductor fins and a gate spanning the fins. The fins each have a bottom region coupled to the substrate and a top active region. Between the bottom and top fin regions is a middle stack situated between a vertically elongated source and a vertically elongated drain. The stack includes a top channel region and a dielectric region immediately below the channel region, providing electrical isolation of the channel. The partial isolation structure can be used with both gate first and gate last fabrication processes.
US09224862B2 High voltage semiconductor device and method for fabricating the same
A high voltage semiconductor device is provided. The device includes a semiconductor substrate having a high voltage well with a first conductivity type therein. A gate structure is disposed on the semiconductor substrate of the high voltage well. A source doped region and a drain doped region are in the high voltage well on both sides of the gate structure, respectively. A lightly doped region with the first conductivity type is between the source and drain doped regions and relatively near to the source doped region. The disclosure also presents a method for fabricating a high voltage semiconductor device.
US09224859B1 High voltage metal-oxide-semiconductor transistor device
A high voltage metal-oxide-semiconductor (HV MOS) device includes a substrate including a first conductivity type, a gate positioned on the substrate, a drain region formed in the substrate, the drain region including a second conductivity type, and a source region formed in the substrate, where the source region includes at least one first part and at least one second part, the first part includes the second conductivity type, the second part includes the first conductivity type, and the first conductivity type and the second conductivity type are complementary.
US09224857B2 Semiconductor structure and method for manufacturing the same
A semiconductor structure comprises a substrate having a first conductive type; a deep well having a second conductive type formed in the substrate and extending down from a surface of the substrate; a first well having the first conductive type and a second well having the second conductive type both formed in the deep well and extending down from the surface of the substrate, and the second well spaced apart from the first well; a gate electrode formed on the substrate and disposed between the first and second wells; an isolation extending down from the surface of the substrate and disposed between the gate electrode and the second well; a conductive plug penetrating into the isolation and reaching the bottom thereof; and a first doping electrode region having the second conductive type, formed within the second well and below the isolation to connect the conductive plug.
US09224849B2 Transistors with wrapped-around gates and methods for forming the same
A device includes a substrate, a semiconductor strip over the substrate, a gate dielectric wrapping around the semiconductor strip, and a gate electrode wrapping around the gate dielectric. A dielectric region is overlapped by the semiconductor strip. The semiconductor strip and the dielectric region are spaced apart from each other by a bottom portion of the gate dielectric and a bottom portion of the gate electrode.
US09224845B1 Silicon carbide static induction transistor and process for making a silicon carbide static induction transistor
A static induction transistor is formed on a silicon carbide substrate doped with a first conductivity type. First recessed regions in a top surface of the silicon carbide substrate are filled with epitaxially grown gate regions in situ doped with a second conductivity type. Epitaxially grown channel regions in situ doped with the first conductivity type are positioned between adjacent epitaxial gate regions. Epitaxially grown source regions in situ doped with the first conductivity type are positioned on the epitaxial channel regions. The bottom surface of the silicon carbide substrate includes second recessed regions vertically aligned with the channel regions and silicided to support formation of the drain contact. The top surfaces of the source regions are silicided to support formation of the source contact. A gate lead is epitaxially grown and electrically coupled to the gate regions, with the gate lead silicided to support formation of the gate contact.
US09224842B2 Patterning multiple, dense features in a semiconductor device using a memorization layer
Provided are approaches for patterning multiple, dense features in a semiconductor device using a memorization layer. Specifically, an approach includes: patterning a plurality of openings in a memorization layer; forming a gap-fill material within each of the plurality of openings; removing the memorization layer; removing an etch stop layer adjacent the gap-fill material, wherein a portion of the etch stop layer remains beneath the gap-fill material; etching a hardmask to form a set of openings above the set of gate structures, wherein the etch to the hardmask also removes the gap-fill material from atop the remaining portion of the etch stop layer; and etching the semiconductor device to remove the hardmask within each of the set of openings. In one embodiment, a set of dummy S/D contact pillars is then formed over a set of fins of the semiconductor device by etching a dielectric layer selective to the gate structures.
US09224840B2 Replacement gate FinFET structures with high mobility channel
A method is disclosed for fabricating an integrated circuit in a replacement-gate process flow utilizing a dummy-gate structure overlying a plurality of fin structures. The method includes removing the dummy-gate structure to form a first void space, depositing a shaper material to fill the first void space, removing a portion of the plurality of fin structures to form a second void space, epitaxially growing a high carrier mobility material to fill the second void space, removing the shaper material to form a third void space, and depositing a replacement metal gate material to fill the third void space.
US09224837B2 Semiconductor structures with pair(s) of vertical field effect transistors, each pair having a shared source/drain region and methods of forming the structures
Disclosed are semiconductor structures and methods of forming the structures. The structures each comprise a pair of vertical FETs. Specifically, a U-shaped semiconductor body has a horizontal section and two vertical sections. The horizontal section comprises a shared source/drain region for first and second vertical FETs. Each vertical section comprises a channel region and a source/drain region above the channel region for a corresponding one the vertical FETs. In one semiconductor structure, each vertical section has a gate wrapped around the channel region. In another semiconductor structure, each vertical section has a front gate positioned adjacent to the inner vertical surface at the channel region and a back gate positioned adjacent to the outer vertical surface at the channel region. In any case, a contact, which is electrically isolated from the gates, extends vertically to the shared source/drain region in the horizontal section. Optionally, metal strap(s) electrically connect the pair of vertical FETs to adjacent pair(s).
US09224827B2 High voltage resistor
Provided is a semiconductor device. The semiconductor device includes a resistor and a voltage protection device. The resistor has a spiral shape. The resistor has a first portion and a second portion. The voltage protection device includes a first doped region that is electrically coupled to the first portion of the resistor. The voltage protection device includes a second doped region that is electrically coupled to the second portion of the resistor. The first and second doped regions have opposite doping polarities.
US09224826B2 Multiple thickness gate dielectrics for replacement gate field effect transistors
After removal of the disposable gate structures to form gate cavities in a planarization dielectric layer, a silicon oxide layer is conformally deposited on silicon-oxide-based gate dielectric portions in the gate cavities. A portion of the silicon oxide layer can be nitridated to form a silicon oxynitride layer. A patterned masking material layer can be employed to physically expose a semiconductor surface from a first-type gate cavity. The silicon oxide layer can be removed while preserving an underlying silicon-oxide-based gate dielectric portion in a second-type gate cavity. A stack of a silicon oxynitride layer and an underlying silicon-oxide-based gate dielectric can be protected by a patterned masking material layer in a third-type gate cavity during removal of the silicon oxide layer in the second-type gate cavity. A high dielectric constant gate dielectric layer can be formed in the gate cavities to provide gate dielectrics of different types.
US09224825B2 Semiconductor device
The semiconductor device of the present invention includes a semiconductor region made of a material to which conductive impurities are added, an insulating film formed on a surface of the semiconductor region, and an electroconductive gate electrode formed on the insulating film. The gate electrode is made of a material whose Fermi level is closer to a Fermi level of the semiconductor region than a Fermi level of Si in at least a portion contiguous to the insulating film.
US09224821B2 Customizable nonlinear electrical devices
In one example, a customizable nonlinear electrical device includes a first conductive layer, a second conductive layer, and a thin film metal-oxide layer sandwiched between the first conductive layer and the second conductive layer to form a first rectifying interface between the metal-oxide layer and the first conductive layer and a second rectifying interface between the metal-oxide layer and the second conductive layer. The metal-oxide layer includes an electrically conductive mixture of co-existing metal and metal oxides. A method forming a nonlinear electrical device is also provided.
US09224812B2 System and method for integrated circuits with cylindrical gate structures
A system and method for integrated circuits with surrounding gate structures are disclosed. The integrated circuits system includes a transistor having a gate all around cylindrical (GAAC) nanowire channel with an interposed dielectric layer. The cylindrical nanowire channel being in a middle section of a semiconductor wire pattern connects the source and drain region positioned at the two opposite end sections of the same wire pattern. A method is provided for manufacturing the integrate circuits system with a GAAC transistor including forming an SOI layer wire pattern on the buried oxide layer of an SOI wafer; forming a cavity underneath the middle section of the wire pattern and shaping the middle section to cylindrically shaped channel; forming a gate electrode surrounding the cylindrical channel region with an interposed gate dielectric layer, the gate electrode being positioned on the buried oxide layer vertically towards the wire pattern; forming the source/drain regions at the two opposite end sections of the wire pattern on either sides of the gate electrode and channel.
US09224810B2 CMOS nanowire structure
Complimentary metal-oxide-semiconductor nanowire structures are described. For example, a semiconductor structure includes a first semiconductor device. The first semiconductor device includes a first nanowire disposed above a substrate. The first nanowire has a mid-point a first distance above the substrate and includes a discrete channel region and source and drain regions on either side of the discrete channel region. A first gate electrode stack completely surrounds the discrete channel region of the first nanowire. The semiconductor structure also includes a second semiconductor device. The second semiconductor device includes a second nanowire disposed above the substrate. The second nanowire has a mid-point a second distance above the substrate and includes a discrete channel region and source and drain regions on either side of the discrete channel region. The first distance is different from the second distance. A second gate electrode stack completely surrounds the discrete channel region of the second nanowire.
US09224808B2 Uniaxially strained nanowire structure
Uniaxially strained nanowire structures are described. For example, a semiconductor device includes a plurality of vertically stacked uniaxially strained nanowires disposed above a substrate. Each of the uniaxially strained nanowires includes a discrete channel region disposed in the uniaxially strained nanowire. The discrete channel region has a current flow direction along the direction of the uniaxial strain. Source and drain regions are disposed in the nanowire, on either side of the discrete channel region. A gate electrode stack completely surrounds the discrete channel regions.
US09224797B2 Metal-insulator-metal (MIM) capacitor with deep trench (DT) structure and method in a silicon-on-insulator (SOI)
A structure forming a metal-insulator-metal (MIM) trench capacitor is disclosed. The structure comprises a multi-layer substrate having a metal layer and at least one dielectric layer. A trench is etched into the substrate, passing through the metal layer. The trench is lined with a metal material that is in contact with the metal layer, which comprises a first node of a capacitor. A dielectric material lines the metal material in the trench. The trench is filled with a conductor. The dielectric material that lines the metal material separates the conductor from the metal layer and the metal material lining the trench. The conductor comprises a second node of the capacitor.
US09224789B2 Image pickup device and electronic apparatus
An image pickup device includes: a first electrode film; an organic photoelectric conversion film; a second electrode film; and a metal wiring film electrically connected to the second electrode film, the first electrode film, the organic photoelectric conversion film, and the second electrode film all provided on a substrate in this order, and the metal wiring film coating an entire side of the organic photoelectric conversion film.
US09224787B2 Method for fabricating nonvolatile memory device
A method for fabricating a nonvolatile memory device is provided. The method includes forming a transistor including an impurity region formed in a substrate, forming a first interlayer insulation layer covering the transistor, the first interlayer insulation layer including a protrusion overlapping the impurity region, and forming an information storage unit on the protrusion, the information storage unit exposing side surfaces of the protrusion using point cusp magnetron-physical vapor deposition (PCM-PVD) and electrically connected to the impurity region.
US09224786B2 Semiconductor storage device
A memory includes a semiconductor substrate. Magnetic tunnel junction elements are provided above the semiconductor substrate. Each of the magnetic tunnel junction elements stores data by a change in a resistance state, and the data is rewritable by a current. Cell transistors are provided on the semiconductor substrate. Each of the cell transistors is in a conductive state when the current is applied to the corresponding magnetic tunnel junction element. Gate electrodes are included in the respective cell transistors. Each of the gate electrodes controls the conductive state of the corresponding cell transistor. In active areas, the cell transistors are provided, and the active areas extend in an extending direction of intersecting the gate electrodes at an angle of (90−a tan(1/3)) degrees.
US09224783B2 Plasma densification of dielectrics for improved dielectric loss tangent
Defects in hydrogenated amorphous silicon are reduced by low-energy ion treatments and optional annealing. The treatments leave strongly-bonded hydrogen and other passivants in place, but increase the mobility of loosely-bonded and interstitially trapped hydrogen that would otherwise form unwanted two-level systems (TLS). The mobilized hydrogen atoms may be attracted to unused passivation sites or recombined into H2 gas and diffuse out of the deposited layer. The treatments also increase the density of the material. The optional anneal may partially crystallize the layer, further densify the layer, or both. The reduced number of defects and the increased crystallinity reduce the loss tangent of amorphous silicon dielectrics for superconducting microwave devices.
US09224782B2 Imaging systems with reference pixels for image flare mitigation
Imaging devices may include processing circuitry, a lens, and an array of image sensor pixels and reference pixels. The array may receive direct image light and stray light from the lens. The image sensor pixels may include clear color filter elements and the reference pixels may include opaque color filter elements. The opaque color filter elements may block direct image light from being captured by the reference pixels. The image sensor pixels may generate pixel values in response to the direct image light and the stray light whereas the reference pixels may generate reference pixel values in response to the stray light. The processing circuitry may mitigate stray light effects such as local flare and veiling glare within the imaging system by adjusting the pixel values based on the reference pixel values. The imaging system may be calibrated in a calibration system for generating stray light calibration data.
US09224777B2 Solid-state image pickup device and method for manufacturing solid-state image pickup device
A method for manufacturing a solid-state image pickup device that includes a substrate including a photoelectric conversion unit and a waveguide arranged on the substrate, the waveguide corresponding to the photoelectric conversion unit and including a core and a cladding, includes a first step and a second step, in which in the first step and the second step, a member to be formed into the core is formed in an opening in the cladding by high-density plasma-enhanced chemical vapor deposition, and in which after the first step, in the second step, the member to be formed into the core is formed by the high-density plasma-enhanced chemical vapor deposition under conditions in which the ratio of a radio-frequency power on the back face side of the substrate to a radio-frequency power on the front face side of the substrate is higher than that in the first step.
US09224775B2 Back side illumination image sensor with low dark current
An integrated circuit includes a back side illuminated image sensor formed by a substrate supporting at least one pixel, an interconnect part situated above a front side of the substrate and an anti-reflective layer situated above a back side of the substrate. The anti-reflective layer may be formed of a silicon nitride layer. An additional layer is situated above the anti-reflective layer. The additional layer is formed of one of amorphous silicon nitride or hydrogenated amorphous silicon nitride, in which the ratio of the number of silicon atoms per cubic centimeter to the number of nitrogen atoms per cubic centimeter is greater than 0.7.
US09224773B2 Metal shielding layer in backside illumination image sensor chips and methods for forming the same
A device includes a semiconductor substrate having a front side and a backside. A photo-sensitive device is disposed at a surface of the semiconductor substrate, wherein the photo-sensitive device is configured to receive a light signal from the backside of the semiconductor substrate, and convert the light signal to an electrical signal. An amorphous-like adhesion layer is disposed on the backside of the semiconductor substrate. The amorphous-like adhesion layer includes a compound of nitrogen and a metal. A metal shielding layer is disposed on the backside of the semiconductor substrate and contacting the amorphous-like adhesion layer.
US09224772B2 Opto-electronic module and method for manufacturing the same
A method for manufacturing a device that includes an opto-electronic module includes creating a wafer stack including multiple active optical components mounted on a substrate wafer, and an optics wafer including multiple passive optical components. The optics wafer can include a blocking portion, which is substantially non-transparent for at least a specific wavelength range, and a transparent portion, which is substantially non-transparent for the specific wavelength range. Each opto-electronic module includes a substrate member, an optics member, an active optical component mounted on the substrate member, and a passive optical component. The optics member is directly or indirectly fixed to the substrate member. The opto-electronic modules can have excellent manufacturability, small dimensions and high alignment accuracy.
US09224771B2 Imaging apparatus using control electrode to perform focal point detection with phase difference detection type
An imaging apparatus includes a plurality of pixels, a signal holding unit, first and second control electrodes. Each of the plurality of pixels includes a photoelectric conversion unit, and an amplification element to amplify signals based on signal charges generated by the photoelectric conversion unit, in which the plurality of pixels output signals for performing a phase contrast detection type of focal point detection. The signal holding unit is in an electrical pathway between an output node of the photoelectric conversion unit and an input node of the amplification element, in which signals for performing the phase contrast detection type of focal point detection are held. The first control electrode is configured to transfer a signal of the photoelectric conversion unit to the signal holding unit. The second control electrode is configured to transfer a signal for performing the phase difference detection type of focal point detection.
US09224768B2 Pin diode structure having surface charge suppression
A semiconductor structure having: a silicon structure; and a plurality of laterally spaced PiN diodes formed in the silicon structure; and a surface of the silicon structure configured to reduce reverse bias leakage current through the PiN diodes. In one embodiment, a gate electrode structures is disposed on a surface of the silicon structure, the gate electrode structure having portions disposed between adjacent pairs of the diodes, the gate structure being biased to prevent leakage current through the diodes.
US09224762B1 Array substrate and display device
An array substrate and a display device incorporating the array substrate are disclosed. The array substrate comprises a first material layer located on a thin film transistor, the first material layer having a first via hole; a conductive interlayer located on the first material layer, the conductive interlayer being electrically connected with the drain of the thin film transistor through the first via hole; and a second material layer located on the conductive interlayer, the second material layer having a second via hole staggered with the first via hole. A pixel electrode is located on the second material layer. The conductive interlayer is electrically connected with the pixel electrode through the second via hole, so as to form a storage capacitance with a common electrode. The array substrate has an increased storage capacitance and provides the display device with improved display stability, pixel opening ratio, and display quality.
US09224758B2 Semiconductor device
A highly reliable semiconductor device that includes a transistor including an oxide semiconductor, which can display a high-definition image and can be manufactured with a high yield. The semiconductor device includes a pixel portion including a plurality of pixels, a gate signal line driver circuit portion, and a source signal line driver circuit portion including a first circuit that controls timing of sampling video signals and a second circuit that samples the video signals in accordance with the timing and then inputs the sampled video signals to the pixels. The second circuit includes a plurality of transistors in each of which an oxide semiconductor stacked layer is used as a channel formation region, the first circuit and the second circuit are electrically connected to each other by a wiring, and the wiring is electrically connected to gates of at least two transistors of the plurality of transistors.
US09224751B2 Three-dimensional (3D) semiconductor device
A semiconductor device includes interlayer dielectrics stacked and spaced apart from each other, a channel layer passing through the interlayer dielectrics, line pattern regions each surrounding a sidewall of the channel layer to be disposed between the interlayer dielectrics, a barrier pattern formed along a surface of each of the line pattern regions and the sidewall of the channel layer, a reaction preventing pattern formed on the barrier pattern along a surface of a first region of each of the line pattern regions, the first region being adjacent to the channel layer, a protection pattern filled in the first region on the reaction preventing pattern, and a first metal layer filled in a second region of each of the line pattern regions.
US09224748B2 Method of forming spaced-apart charge trapping stacks
Methods are provided for fabricating memory devices. A method comprises fabricating charge-trapping stacks overlying a silicon substrate and forming bit line regions in the substrate between the charge trapping stacks. Insulating elements are formed overlying the bit line regions between the stacks. The charge-trapping stacks are etched to form two complementary charge storage nodes and to expose portions of the silicon substrate. Silicon is grown on the exposed silicon substrate by selective epitaxial growth and is oxidized. A control gate layer is formed overlying the complementary charge storage nodes and the oxidized epitaxially-grown silicon.
US09224747B2 Vertical NAND device with shared word line steps
A memory device includes a memory cell array having a first side and a second side and a stepped word line contact region located between the first side and the second side of the memory array. A first word line stair pattern is located in the stepped word line contact region adjacent to the first side of the memory array and a second word line stair pattern located in the stepped word line contact region adjacent to the second side of the memory array. A peripheral device region located in the stepped word line contact region between the first and the second word line stair patterns.
US09224745B2 Method of manufacturing semiconductor device
A method of manufacturing a semiconductor device includes: forming a conductive film on a semiconductor substrate; patterning the conductive film in a memory region to form a first gate electrode; after forming the first gate electrode, forming a mask film above each of the conductive film in a logic region and the first gate electrode; removing the mask film in the logic region; forming a first resist film above the mask film left in the memory region and above the conductive film left in the logic region; and forming a second gate electrode in the logic region by etching the conductive film using the first resist film as a mask.
US09224738B1 Methods of forming an array of gated devices
A method of forming an array of gated devices includes forming trenches between walls that longitudinally extend in rows and project elevationally from a substrate. The walls comprise semiconductor material. Gate dielectric is formed within the trenches laterally over side surfaces of the walls and conductive gate material is formed within the trenches laterally over side surfaces of the gate dielectric. Side surfaces of an elevationally inner portion of the gate material within the trenches are laterally covered with masking material and side surfaces of an elevationally inner portion of the gate material within the trenches are laterally uncovered by the masking material. The elevationally outer portion of the gate material that is laterally uncovered by the masking material is removed while the side surfaces of the elevationally inner portion of the gate material are laterally covered by the masking material to form gate lines within the trenches laterally over elevationally inner portions of the walls.
US09224737B2 Dual epitaxial process for a finFET device
A method includes forming a first fin and a second fin extending above a semiconductor substrate, with a shallow trench isolation (STI) region between them. A space is defined between the first and second fins above a top surface of the STI region. A first height is defined between the top surface of the STI region and top surfaces of the first and second fins. A flowable dielectric material is deposited into the space. The dielectric material has a top surface above the top surface of the STI region, so as to define a second height between the top surface of the dielectric material and the top surfaces of the first and second fins. The second height is less than the first height. First and second fin extensions are epitaxially formed above the dielectric, on the first and second fins, respectively, after the depositing step.
US09224732B2 Method of forming high voltage device
A method of forming a device includes forming a buried well region of a first dopant type in a substrate. A well region of the first dopant type is formed over the buried well region. A first well region of a second dopant type is formed between the well region of the first dopant type and the buried well region of the first dopant type. A second well region of the second dopant type is formed in the well region of the first dopant type. An isolation structure is formed at least partially in the well region of the first dopant type. A first gate electrode is formed over the isolation structure and the second well region of the second dopant type.
US09224731B2 Chip resistor and electronic equipment having resistance circuit network
[Theme] A compact and refined chip resistor, with which a plurality of types of required resistance values can be accommodated readily with the same design structure, was desired.[Solution Means] A chip resistor 10 is arranged to have a resistor network 14 on a substrate. The resistor network 14 includes a plurality of resistor bodies R arrayed in a matrix and having an equal resistance value. A plurality of types of resistance units are respectively arranged by one or a plurality of the resistor bodies R being connected electrically. The plurality of types of resistance units are connected in a predetermined mode using connection conductor films C and fuse films F. By selectively fusing a fuse film F, a resistance unit can be electrically incorporated into the resistor network 14 or electrically separated from the resistor network to make the resistance value of the resistor network 14 the required resistance value.
US09224727B2 ESD protection apparatus
An ESD protection apparatus comprises an n-type substrate with a first doping density, a low voltage n-type well in the substrate, a low voltage p-type well in the substrate, a first n-type semiconductor region over the low voltage n-type well and a second n-type semiconductor region over the low voltage p-type well, wherein the first semiconductor region and the second semiconductor region are separated by a first isolation region.
US09224725B2 Semiconductor integrated circuit device
Diffusion regions having the same conductivity type are arranged on a side of a second wiring and a side of a third wiring, respectively under a first wiring connected to a signal terminal. Diffusion regions are separated in a whole part or one part of a range in a Y direction. That is, under first wiring, diffusion regions are only formed in parts opposed to diffusion regions formed under the second wiring and third wiring connected to a power supply terminal or a ground terminal, and a diffusion region is not formed in a central part in an X direction. Therefore, terminal capacity of the signal terminal can be reduced without causing ESD resistance to be reduced, in an ESD protection circuit with the signal terminal.
US09224723B2 Semiconductor device
Provided is a semiconductor device including a plurality of pillar columns, each of the plurality of pillar columns including a plurality of pillars arranged in one direction to be offset from each other, wherein an mth pillar and an (m+1)th pillar, among the plurality of pillars included in each pillar column, are aligned with each other (m is an integer of 0 or more).
US09224718B2 White light emitting diodes package containing plural blue light-emitting diodes
A white light-emitting diode (LED) package containing plural blue LED chips is disclosed. The white LED package includes a transparent plate, plural blue LED chips bonded on a front surface of the transparent plate, a front fluorescent glue layer covering the plural blue LED chips, and a rear transparent glue layer covering a rear surface of the transparent plate and located at a position aligned with the front fluorescent glue layer. The edge of the rear transparent glue layer has an inclined lateral surface or a curved inclined lateral surface. Therefore, the light can be extracted from both front and rear surfaces, and the light extraction efficiency of the rear surface of the transparent plate is increased. The rear transparent glue layer can be replaced by a rear fluorescent glue layer to reduce the color temperature difference between the lights extracted from the front surface and the rear surface.
US09224717B2 Package-on-package assembly with wire bonds to encapsulation surface
A method of making a microelectronic package includes forming a dielectric encapsulation layer on an in-process unit having a substrate having a first surface and a second surface remote therefrom. A microelectronic element is mounted to the first surface of the substrate, and a plurality of conductive elements exposed at the first surface, at least some of which are electrically connected to the microelectronic element. Wire bonds have bases joined to the conductive elements and end surfaces remote from the bases and define an edge surface extending away between the base and the end surface. The encapsulation layer is formed to at least partially cover the first surface and portions of the wire bonds with unencapsulated portions of the wire bonds being defined by at least one of the end surface or a portion of the edge surface that is uncovered thereby.
US09224711B2 Method for manufacturing a semiconductor device having multiple heat sinks
A method for manufacturing a semiconductor device is provided, the method including: mounting a first element on a wiring substrate, placing a first heat sink on the first element with a metal material interposed between the first heat sink and the first element, attaching the first heat sink to the first element via the metal material by heating and melting the metal material, and mounting a second element on the wiring substrate after the steps of attaching the first heat sink to the first element.
US09224697B1 Multi-die integrated circuits implemented using spacer dies
An integrated circuit includes an interposer die having a surface, a first die mechanically and electrically attached to the surface of the interposer die, and a second die only mechanically attached to the surface of the interposer die using a die attach adhesive.
US09224696B2 Integrated semiconductor device and method for fabricating the same
An integrated semiconductor device and method for fabricating the same are provided wherein the integrated semiconductor device comprises a substrate a first stress-inducing layer, a second stress-inducing layer and an integrated circuit layer. The first stress-inducing layer covers on the substrate. The second stress-inducing layer partially covers on the first stress-inducing layer. The integrated circuit layer is bonded over the substrate.
US09224695B2 Chip arrangement and a method for manufacturing a chip arrangement
In various embodiments a chip arrangement is provided, wherein the chip arrangement may include a chip and at least one foil attached to at least one side of the chip.
US09224693B2 Semiconductor device and method of forming TMV and TSV in WLCSP using same carrier
A semiconductor device has a semiconductor die mounted over a carrier. An encapsulant is deposited over the semiconductor die and carrier. An insulating layer is formed over the semiconductor die and encapsulant. A plurality of first vias is formed through the insulating layer and semiconductor die while mounted to the carrier. A plurality of second vias is formed through the insulating layer and encapsulant in the same direction as the first vias while the semiconductor die is mounted to the carrier. An electrically conductive material is deposited in the first vias to form conductive TSV and in the second vias to form conductive TMV. A first interconnect structure is formed over the insulating layer and electrically connected to the TSV and TMV. The carrier is removed. A second interconnect structure is formed over the semiconductor die and encapsulant and electrically connected to the TSV and TMV.
US09224692B2 Semiconductor device having a nanotube layer and method for forming
A method of forming a semiconductor device includes forming a first conductive layer over the substrate. A dielectric layer, having a first opening, is formed over the first conductive layer. A seed layer is deposited over the first dielectric layer and in the first opening. A layer is formed of conductive nanotubes from the seed layer over the first dielectric layer and over the first opening. A second dielectric is formed over the layer of conductive nanotubes. An opening is formed in the second dielectric layer over the first opening. Conductive material is deposited in the second opening.
US09224691B2 Semiconductor device contact structures
Semiconductor contact structures extend through a dielectric material and provide contact to multiple different subjacent materials including a silicide material and a non-silicide material such as doped silicon. The contact structures includes a lower composite layer formed using a multi-step ionized metal plasma (IMP) deposition operation. A lower IMP film is formed at a high AC bias power followed by the formation of an upper IMP film at a lower AC bias power. The composite layer may be formed of titanium. A further layer is formed as a liner over the composite layer and the liner layer may advantageously be formed using CVD and may be TiN. A conductive plug material such as tungsten or copper fills the contact openings.
US09224689B2 Semiconductor device having groove-shaped via-hole
The semiconductor device has insulating films 40, 42 formed over a substrate 10; an interconnection 58 buried in at least a surface side of the insulating films 40, 42; insulating films 60, 62 formed on the insulating film 42 and including a hole-shaped via-hole 60 and a groove-shaped via-hole 66a having a pattern bent at a right angle; and buried conductors 70, 72a buried in the hole-shaped via-hole 60 and the groove-shaped via-hole 66a. A groove-shaped via-hole 66a is formed to have a width which is smaller than a width of the hole-shaped via-hole 66. Defective filling of the buried conductor and the cracking of the inter-layer insulating film can be prevented. Steps on the conductor plug can be reduced. Accordingly, defective contact with the upper interconnection layer and the problems taking place in forming films can be prevented.
US09224688B2 Metal routing architecture for integrated circuits
A device includes a substrate, a metal pad over the substrate, and a metal trace electrically disconnected from the metal pad. The metal pad and the metal trace are level with each other. A passivation layer includes a portion overlapping an edge portion of the metal pad. A metal pillar is overlying the metal pad, and is electrically connected to the metal pad. The metal trace has a portion overlapped by the metal pillar.
US09224684B2 Wiring board and method of manufacturing wiring board
There is provided a wiring board. The wiring board includes: a first insulating layer; a secondary battery on one surface of the first insulating layer; a second insulating layer formed on the secondary battery; a third insulating layer covering the second insulating layer; a first wiring layer on one surface of the third insulating layer; and a via electrically connecting the first wiring layer to an electrode of the secondary battery. A rigidity of the second insulating layer is lower than those of the first and third insulating layers.
US09224681B2 CTE matched interposer and method of making
The present interposer makes it possible to tailor the coefficient of thermal expansion of the interposer to match components to be attached thereto within very wide ranges. The semiconductor interposer, includes a substrate of a semiconductor material having a first side and an opposite second side. There is at least one conductive wafer-through via including metal. At least one recess is provided in the first side of the substrate and in the semiconductor material of the substrate, the recess being filled with metal and connected with the wafer-through via providing a routing structure. The exposed surfaces of the metal-filled via and metal-filled recess are essentially flush with the substrate surface on the first side of the substrate. The wafer-through via includes a narrow part and a wider part, and contact elements are provided on the routing structure having an aspect ratio, height:diameter, <1:1, preferably 1:1 to 2:1.
US09224680B2 Electrical connections for chip scale packaging
Electrical connections for chip scale packaging are disclosed. In one embodiment, a semiconductor device includes a post-passivation layer disposed over a substrate, the substrate having a first direction of coefficient of thermal expansion mismatch. The semiconductor device includes a first opening through the post-passivation layer, the first opening comprising a plurality of elongated apertures. A longest of the plurality of elongated apertures comprises a first dimension, wherein the first dimension is aligned substantially perpendicular to the first direction of coefficient of thermal expansion mismatch.
US09224677B1 Semiconductor package
Semiconductor packages and associated techniques are described. A described semiconductor package includes a lead frame; a first wire bond; a second wire bond; a first voltage source to provide a first voltage; a second voltage source to provide a second voltage; a first die pad coupled with the first voltage source via the first wire bond; a second die pad coupled with the second voltage source via the second wire bond; a first die disposed on the first die pad; a second die disposed on the second die pad; and an encapsulant. The first die pad and the second die pad can be electrically isolated from each other such that the first die pad is maintainable at a first potential associated with the first voltage source and the second die pad is maintainable at a second potential associated with the second voltage source.
US09224675B1 Automatic capacitance tuning for robust middle of the line contact and silicide applications
A method includes forming a first metal liner conformally along a sidewall and a bottom of a contact opening. A second metal liner is formed above and in direct contact with the first metal liner, a grain size of the first metal liner is larger than a grain size of the second metal liner. A barrier layer is formed above and in direct contact with the second metal liner and the contact opening is filled with a conductive material to form a middle-of-the-line contact.
US09224670B2 Semiconductor device
A semiconductor device includes an AC coupling element, and a temperature monitoring unit that outputs a temperature monitor signal, the temperature monitoring unit has a first temperature monitoring element that outputs the temperature monitor signal, and the first temperature monitoring element is arranged in a region immediately below or a region adjacent to the AC coupling element.
US09224667B2 Semiconductor device and manufacturing method thereof
It is an object of the present invention to provide a peeling method that causes no damage to a layer to be peeled and to allow not only a layer to be peeled with a small surface area but also a layer to be peeled with a large surface area to be peeled entirely. Further, it is also an object of the present invention to bond a layer to be peeled to various base materials to provide a lighter semiconductor device and a manufacturing method thereof. Particularly, it is an object to bond various elements typified by a TFT, (a thin film diode, a photoelectric conversion element comprising a PIN junction of silicon, or a silicon resistance element) to a flexible film to provide a lighter semiconductor device and a manufacturing method thereof.
US09224665B2 Semiconductor device and method for producing the same
A semiconductor device includes a circuit substrate which is configured with an insulative substrate formed of a ceramic material and provided on its one surface with an electrode formed of a copper material, and a power semiconductor element bonded with the electrode using a sinterable silver-particle bonding material, wherein the electrode has a Vickers hardness of 70 HV or more in its portion from the bonding face with the power semiconductor element toward the insulative substrate to a depth of 50 μm, and has a Vickers hardness of 50 HV or less in its portion at the side toward the insulative substrate.
US09224660B2 Tuning wafer inspection recipes using precise defect locations
Systems and methods for determining one or more parameters of a wafer inspection process are provided. One method includes aligning optical image(s) of an alignment target to their corresponding electron beam images generated by an electron beam defect review system. The method also includes determining different local coordinate transformations for different subsets of alignment targets based on results of the aligning. In addition, the method includes determining positions of defects in wafer inspection system coordinates based on coordinates of the defects determined by the electron beam defect review system and the different local coordinate transformations corresponding to different groups of the defects into which the defects have been separated. The method further includes determining one or more parameters for an inspection process for the wafer based on defect images acquired at the determined positions by a wafer inspection system.
US09224659B2 Method and apparatus for semiconductor testing at low temperature
A method for testing a plurality of semiconductor devices arranged on a strip may include forming an array of semiconductor devices on a frame, wherein contact pads of adjacent semiconductor devices are shorted, partially cutting the strip to electrically isolate individual semiconductor devices in the array, placing the strip on an adhesive tape configured to withstand low temperatures (e.g., below −20° C. or below −50° C.), arranging the strip and tape on a test chuck, exposing the test chuck, strip, and tape to temperatures below an ambient temperature and testing the plurality of semiconductor devices while exposed to a low temperature. In one embodiment a KAPTON™ film is used as the adhesive tape.
US09224658B2 Membrane-based sensor device with non-dielectric etch-stop layer around substrate recess
A sensing device has a semiconductor substrate with an opening and a membrane spanning the opening. A heater is arranged on the membrane. To reduce the thermal conductivity of the membrane, a recess is etched into the membrane from below.
US09224656B2 Method of CMOS manufacturing utilizing multi-layer epitaxial hardmask films for improved gate spacer control
An integrated circuit containing PMOS transistors may be formed by forming a dual layer hard mask. A first layer of the hard mask is carbon-containing silicon nitride formed using a hydrocarbon reagent. A second layer of the hard mask is chlorine-containing silicon nitride formed on the first layer using a chlorinated silane reagent. After SiGe epitaxial source/drain regions are formed, the hard mask is removed using a wet etch which removes the second layer at a rate at least three times faster than the first layer.
US09224654B2 Fin capacitor employing sidewall image transfer
Spacer structures are formed around an array of disposable mandrel structures and above a doped semiconductor material portion. A sidewall image transfer process is employed to pattern an upper portion of the doped semiconductor material portion into an array of doped semiconductor fins. After formation of a dielectric material layer on the top surfaces and sidewall surfaces of the doped semiconductor fins, gate-level mandrel structures are formed to straddle multiple semiconductor fins. A conductive hole-containing structure is formed to laterally surround a plurality of gate-level mandrel structures, which is subsequently removed. A contact-level dielectric layer is formed over the conductive hole-containing structure and the plurality of doped semiconductor fins. The semiconductor fins function as a lower electrode of a fin capacitor, and the conductive hole-containing structure functions as an upper electrode of the fin capacitor.
US09224649B2 Compliant interconnects in wafers
A microelectronic assembly includes a substrate and an electrically conductive element. The substrate can have a CTE less than 10 ppm/° C., a major surface having a recess not extending through the substrate, and a material having a modulus of elasticity less than 10 GPa disposed within the recess. The electrically conductive element can include a joining portion overlying the recess and extending from an anchor portion supported by the substrate. The joining portion can be at least partially exposed at the major surface for connection to a component external to the microelectronic unit.
US09224646B2 Method for fabricating semiconductor package
Disclosed is a method for fabricating a semiconductor package, including providing a package unit having an insulating layer and at least a semiconductor element embedded into the insulating layer, wherein the semiconductor element is exposed from the insulting layer and a plurality of recessed portions formed in the insulating layer; and electrically connecting a redistribution structure to the semiconductor element. The formation of the recessed portions release the stress of the insulating layer and prevent warpage of the insulating layer from taking place.
US09224640B2 Method to improve fine Cu line reliability in an integrated circuit device
Structure and methods for forming a semiconductor structure. The semiconductor structure includes a plurality of layers comprising at least one copper interconnect layer. The copper interconnect layer provides an electrical conduit between one of physically adjacent layers in the semiconductor structure and an integrated circuit in the semiconductor structure and an electronic device. A plurality of studs is positioned within the at least one copper interconnect layer. The studs are spaced apart by a distance less than or equal to a Blech length of the at least one copper interconnect layer. The Blech length is a length below which damage due to electromigration of metal atoms within the at least one copper interconnect layer does not occur. The plurality of studs comprises copper atom diffusion barriers.
US09224627B2 Single and dual stage wafer cushion and wafer separator
Improvements in a single and dual stage wafer cushion is disclosed where the wafer cushion can use an edge hinge as a single first stage cushion and a second mid span hinge for the dual stage wafer cushion. This dual stage design gives two distinctly different cushioning forces as opposed to using a single stage design where the force is linear with the amount of compression that is being applied to the outer surfaces of the wafer cushion. The outside edge of the ring provides the greatest expansion such that only the outer edge of the ring makes contact with the outer edge of a wafer. The wafer cushion is a material that flexes and absorbs shocks before the shock is transferred to the wafer stack. The material minimizes debris or contaminants from embedding into the wafer cushion and also prevents sheading of material from the wafer cushion.
US09224624B2 Liquid processing method
A liquid processing method is provided for performing a liquid process on a front surface of a substrate by using a processing solution and then performing a rinse process on the front surface of the substrate by using a rinse solution having a temperature lower than a temperature of the processing solution. The method includes performing an intermediate process between the liquid process and the rinse process, for adjusting a temperature of the front surface of the substrate to a temperature higher than the temperature of the rinse solution and lower than the temperature of the processing solution. In the intermediate process, an intermediate processing solution having a temperature higher than the temperature of the rinse solution and lower than the temperature of the processing solution is supplied only to a rear surface of the substrate.
US09224623B2 Microwave irradiation apparatus
There is provided a microwave irradiation apparatus capable of independently controlling a temperature of a target object while irradiating microwave to the target object. The microwave irradiation apparatus 2 includes a processing chamber 4 configured to be vacuum-evacuated; a supporting table 6 configured to support the target object; a processing gas introduction unit 106 configured to introduce a processing gas into the processing chamber; a microwave introduction unit 72 configured to introduce the microwave into the processing chamber; a heating unit 16 configured to heat the target object; a gas cooling unit 104 configured to cool the target object by a cooling gas; a radiation thermometer 64 configured to measure a temperature of the target object; and a temperature control unit 70 configured to adjust the temperature of the target object by controlling the heating unit and the gas cooling unit based on the temperature measured by the radiation thermometer.
US09224622B2 Semiconductor device, method of manufacturing the device, and liquid crystal display
In order to shield the light incident from the chip side surface or chip rear surface of a semiconductor chip that forms an LCD driver, a light-shielding film is formed over the chip side surface and chip rear surface of the semiconductor chip itself, not using a light-shielding tape that is a component separate from the semiconductor chip. Accordingly, the light-shielding tape as a separate component is not used, and hence the trouble that the light-shielding tape may protrude from the surface of a glass substrate whose thickness has been made small can be solved. As a result, the thinning of a liquid crystal display, and the subsequent thinning of the mobile phone in which the liquid crystal display is mounted can be promoted.
US09224621B2 Encapsulation process and associated device
The invention relates to an encapsulation process for an electronic component (2). The component (2) is connected to an electrical contact track composed of a metal layer (101).The process according to the invention comprises the following steps: deposition of a titanium nitride layer (102) directly on at least part of the electrical contact track (101); and deposition of an aluminum oxide layer (4) by atomic layer deposition, such that the encapsulation layer (4) directly covers the titanium nitride layer (102). The process according to the invention enables electrical contact through the encapsulation layer (4).The invention also relates to an electronic device obtained using such a process.
US09224613B2 Method for polishing both sides of a semiconductor wafer
Both sides of a large diameter semiconductor wafer are polished by the following ordered steps: a) polishing the wafer backside on a polishing pad containing a fixed abrasive, a polishing agent solution free of solids being introduced between the wafer backside and the polishing pad; b) stock polishing the wafer frontside on a polishing pad which contains a fixed abrasive, a polishing agent solution free of solids being introduced between the wafer frontside of and the polishing pad; c) removing microroughness and microdamage from the wafer frontside by polishing the frontside on a polishing pad, a polishing agent solution containing abrasives being introduced between the wafer frontside and the polishing pad; and d) final polishing of the wafer frontside by polishing the frontside on a polishing pad containing no fixed abrasive, a polishing agent solution containing abrasives being introduced between the wafer frontside and the polishing pad during the polishing step.
US09224610B2 Integrated circuits having improved high-K dielectric layers and methods for fabrication of same
Integrated circuits and methods for fabricating integrated circuits are provided. In accordance with an exemplary embodiment, a method for fabricating an integrated circuit includes exposing a portion of a surface of a semiconductor substrate between a first spacer and a second spacer. The method further includes selectively forming a dielectric layer on the portion of the surface. A metal gate is formed over the dielectric layer and between the first spacer and the second spacer. The metal gate contacts the first spacer and the second spacer.
US09224609B2 Method for manufacturing semiconductor device using oxide semiconductor
A semiconductor device for high power application in which a novel semiconductor material having high mass productivity is provided. An oxide semiconductor film is formed, and then, first heat treatment is performed on the exposed oxide semiconductor film in order to reduce impurities such as moisture or hydrogen in the oxide semiconductor film. Next, in order to further reduce impurities such as moisture or hydrogen in the oxide semiconductor film, oxygen is added to the oxide semiconductor film by an ion implantation method, an ion doping method, or the like, and after that, second heat treatment is performed on the exposed oxide semiconductor film.
US09224607B2 Dual epitaxy region integration
A semiconductor device includes a first device region and second device region of opposite polarity. Each device region includes at least a transistor device and associated epitaxy. A high-k barrier is formed to overlay the first device region epitaxy only. The high-k barrier may include a substantially horizontal portion formed upon a top surface of the first device region epitaxy and a substantially vertical portion formed upon an outer surface of the first device region epitaxy. The substantially vertical portion may partially isolate the first device region from the second device region.
US09224600B2 Method of manufacturing part of a thin-film device using an ink comprising a material precursor
A method for the manufacture of at least part of a thin-film device including forming one or more indentations in a substrate, preferably a plastic substrate, an indentation having sidewalls and a base; filling at least one of the one or more indentations with a first ink, the first ink having a first material precursor, preferably a first metal-, semiconductor-, or a metal-oxide precursor; and, annealing at least a portion of the first ink such that a surface of the base inside the indentation is dewetted and a narrowed first structure of the first material inside of the indentation is formed.
US09224599B2 P-type metal oxide semiconductor material and method for fabricating the same
A P-type metal oxide semiconductor material is provided. The P-type metal oxide semiconductor material has a formula of In(1−3)Ga(1−b)Zn(1+a+b)O4, wherein 0≦a≦0.1, 0≦b≦0.1, and 0
US09224598B2 Method of formation of tin oxide semiconductor thin film doped with antimony
Provided is a composition for forming tin oxide semiconductor including a tin precursor compound, an antimony precursor compound, and a solvent, according to an aspect of the present disclosure. Also provided is a method of forming a tin oxide semiconductor thin film. The method includes preparing a composition including a tin precursor compound and an antimony precursor compound dissolved in a solvent; disposing the composition on a substrate; and performing a heat treatment on the substrate coated with the composition.
US09224597B2 Method for manufacturing gallium nitride-based film chip
A method for manufacturing gallium nitride-based film chip is provided. The method comprises: growing a gallium nitride-based semiconductor multilayer structure on a sapphire substrate; thinning and polishing the sapphire substrate; coating a reflecting compound metal layer on the gallium nitride-based semiconductor multilayer structure by evaporating; coating a first glue on the reflecting compound metal layer and solidifying the first glue with a first temporary substrate; peeling the sapphire substrate off by laser; coating a second glue on the peeling surface and solidifying the second glue with a second temporary substrate; removing the first temporary substrate and the first glue; bonding the reflecting compound metal layer with a permanent substrate by eutectic bonding; removing the second temporary substrate and the second glue.
US09224584B2 Sputtering target assembly
Provided is a sputtering target assembly comprising two or more sputtering target-backing plate bonded bodies B aligned in the width direction, wherein the sputtering target-backing plate bonded bodies B each include a cylindrical target having a diameter of 100 mm or more and a length of 1000 mm or more and composed of three or more target pieces A being divided such that the dividing lines lie in the circumferential direction and being bonded or placed onto a cylindrical or columnar backing plate, wherein the bonded bodies B are arranged to form the sputtering target assembly in such a manner that the dividing lines between the three target pieces of one bonded body B are not present at the same positions of the dividing lines between fractional target pieces of adjacent another bonded body B. It is an object of the present invention to provide a sputtering target assembly that can reduce defects due to occurrence of particles originated from the piece-bonding area.
US09224583B2 System and method for heating plasma exposed surfaces
A substrate support apparatus for a plasma processing system includes a layer of dielectric material having a top surface and a bottom surface. The top surface is defined to support a substrate in exposure to a plasma. The substrate support apparatus also includes a number of optical fibers each having a first end and a second end. The first end of each optical fiber is defined to receive photons from a photon source. The second end of each optical fiber is oriented to project photons received from the photon source onto the bottom surface of the layer of dielectric material.
US09224582B2 Apparatus and method for depositing electrically conductive pasting material
A method and apparatus are described for reducing particle contamination in a plasma processing chamber. In one embodiment, a pasting disk is provided which includes a disk-shaped base of high-resistivity material that has an electrically conductive pasting material layer applied to a top surface of the base so that the pasting material layer partially covers the top surface of the base. The pasting disk is sputter etched to deposit conductive pasting material over a wide area on the interior surfaces of a plasma processing chamber while minimizing deposition on dielectric components that are used to optimize the sputter etch process during substrate processing.
US09224579B2 Adjustable non-dissipative voltage boosting snubber network for achieving large boost voltages
This disclosure describes a non-dissipative snubber circuit configured to boost a voltage applied to a load after the load's impedance rises rapidly. The voltage boost can thereby cause more rapid current ramping after a decrease in power delivery to the load which results from the load impedance rise. In particular, the snubber can comprise a combination of a unidirectional switch, a voltage multiplier, and a current limiter. In some cases, these components can be a diode, voltage doubler, and an inductor, respectively.
US09224578B2 Charged particle beam writing apparatus and method for acquiring dose modulation coefficient of charged particle beam
A apparatus includes a unit to operate a first dose of a beam corrected for a proximity effect for each of second mesh regions of a second mesh size obtained by dividing the first mesh size by a product of a natural number and a number of passes, by using a dose model using a dose threshold; a unit to operate a representative temperature rising due to heat transfer originating from irradiation of the beam by using a dose for an applicable pass of the first dose and a unit to operate a polynomial having a term obtained by multiplying a dose modulation coefficient based on the representative temperature by a pattern area density as an element, and a dose that makes a difference between a value obtained by operating the polynomial and the dose threshold within a tolerance is used.
US09224577B2 Method for correcting electronic proximity effects using off-center scattering functions
A method for projecting an electron beam, used notably in direct or indirect writing lithography and in electronic microscopy. Proximity effects created by the forward and backward scattering of the electrons of the beam in interaction with the target must be corrected. For this, the convolution of a point spread function with the geometry of the target is conventionally used. At least one of the components of the point spread function has its maximum value not located on the center of the beam. Preferably, the maximum value is instead located on the backward scattering peak. Advantageously, the point spread function uses gamma distribution laws.
US09224575B2 Charged particle beam device and overlay misalignment measurement method
An overlay misalignment amount of patterns on different layers can be accurately measured. To achieve this, a charged particle beam device includes: a charged particle beam source irradiating a sample with a charged particle beam under one irradiation condition; a first detector that detects a signal generated front a first pattern formed on a first layer in an irradiation region; a second detector that detects a signal generated from a second pattern formed on a second layer in the irradiation region at a same time as the first detector; and an image processing unit that calculates an overlay misalignment amount between the first pattern and the second pattern based on a first detection signal and a second detection signal output by the first detector and the second detector, respectively.
US09224574B2 Charged particle optical equipment and method for measuring lens aberration
Beam scanning for obtaining a scanned image is performed by an aberration corrector, which is an aberration measured lens, and a scanning coil disposed above an objective lens, instead of a scanning coil ordinarily placed on the objective lens. Thus, distortion with an aberration of an aberration measured lens is scanned on the surface of a sample, and then a scanned image is formed from a scattered electron beam, a transmission electron beam, or a reflected/secondary electron beam that is generated by the scan, achieving a scanning aberration information pattern equivalent to a conventional Ronchigram. Such means is a feature of the present invention.
US09224572B2 X-ray tube with adjustable electron beam
An X-ray tube assembly is provided including an emitter configured to emit an electron beam, an emitter focusing electrode, an extraction electrode, and a downstream focusing electrode. The emitter focusing electrode is disposed proximate to the emitter and outward of the emitter in an axial direction. The extraction electrode is disposed downstream of the emitter and the emitter focusing electrode. The extraction electrode has a negative bias voltage setting at which the extraction electrode has a negative bias voltage with respect to the emitter. The downstream focusing electrode is disposed downstream of the extraction electrode, and has a positive bias voltage with respect to the emitter. When the extraction electrode is at the negative bias voltage setting, the electron beam is emitted from an emission area that is smaller than a maximum emission area from which electrons may be emitted.
US09224570B2 Vacuum encapsulated, high temperature diamond amplified cathode capsule and method for making same
A vacuum encapsulated, hermetically sealed cathode capsule for generating an electron beam of secondary electrons, which generally includes a cathode element having a primary emission surface adapted to emit primary electrons, an annular insulating spacer, a diamond window element comprising a diamond material and having a secondary emission surface adapted to emit secondary electrons in response to primary electrons impinging on the diamond window element, a first high-temperature solder weld disposed between the diamond window element and the annular insulating spacer and a second high-temperature solder weld disposed between the annular insulating spacer and the cathode element. The cathode capsule is formed by a high temperature weld process under vacuum such that the first solder weld forms a hermetical seal between the diamond window element and the annular insulating spacer and the second solder weld forms a hermetical seal between the annular spacer and the cathode element whereby a vacuum encapsulated chamber is formed within the capsule.
US09224568B2 Arc tube device and stem structure for electrodeless plasma lamp
A plasma lamp apparatus. The apparatus has an arc tube structure having an inner region and an outer region in one or more embodiments. The arc tube structure has a first end comprising an associated first end diameter and a second end comprising a second end diameter according to a specific embodiment. The apparatus also has a center region provided between the first end and the second end in one or more embodiments. The center region has a center diameter, which is less than a first end diameter and/or a second end diameter.
US09224566B2 Fuse driver circuits
Fuse driver circuits, fuse driver testing circuitry, and methods for testing the fuse driver circuits using the testing circuitry are described. In some embodiments, the fuse driver circuit can be made using a fuse, a NMOS transistor, and a PMOS transistor. The drain of the NMOS transistor can be connected to the negative end of the fuse. The source of the NMOS transistor can be connected to ground. The drain of the PMOS transistor can be connected to a positive end of the fuse. The NMOS and PMOS transistors provide enhanced robustness to the fuse driver circuit in both undervoltage and overvoltage conditions. Other embodiments are also described.
US09224562B2 Electromagnetic relay
An electromagnetic relay, in particular a motor vehicle relay, contains a magnet yoke, a relay coil, a hinged armature which is pivotable about an axis of rotation and on which a moving contact, as working or switchover contact, is retained relative to at least one fixed contact. A piezo actuator is provided, which keeps the working or switchover contact closed when the relay coil is de-energized as a result of the actuation of the piezo actuator.
US09224554B2 Anti-tilt and rotation techniques for a touchsurface assembly having translating keys
The key assembly comprises a keycap having a touchsurface for receiving a press force that moves the keycap from an unpressed position toward a pressed position. The keycap has first and second ramp contacting features comprising first and second angular protrusions. The first and second angular protrusions have first and second protrusion angles relative to first and second side portions of the keycap (respectively). The key assembly also has a base having first and second ramps that contact the first and second ramp contacting features and guide the keycap in the press direction and the second direction as the keycap moves from the unpressed position toward the pressed position. The base has first and second angular features configured to contact the first and second angular protrusions of the first and second ramp contacting features (respectively) to resist rotation of the keycap as the keycap moves toward the pressed position.
US09224550B2 Corrosion resistant barrier formed by vapor phase tin reflow
A copper substrate for use as a contact having Sn plating, nickel plating and Au plating overlying the substrate. A combination of Sn plating is applied over a copper substrate; nickel plating is applied over the Sn plating; and Au plating is applied over the nickel plating to form a stack. The stack is then processed by a vapor phase Sn reflow step that results in the formation of intermetallics and eliminates stannous oxide layers that may otherwise form on the tin layer. The intermetallic layers provide excellent corrosion resistance, and serve as diffusion barriers to prevent the further migration of either Ni atoms or Cu atoms into the Sn, and Sn atoms outwardly into either the Ni or the Cu. Regardless of the thickness, the interfaces are substantially free of oxides, in particular tin oxide, and not prone to delamination.
US09224548B2 Disconnect switch including fusible switching disconnect modules
A disconnect switch includes an enclosure containing a fusible switch disconnect assembly, and a switch mechanism and handle associated with the switch mechanism for opening and closing current paths in the fusible switch disconnect assembly. The fusible switch disconnect assembly may receive a plurality of retractable rectangular fuse modules having terminal blades. Switch contacts are provided in the fusible switch disconnect assembly and are positionable with rotary switch actuators, all of which may be operated via the handle and the switch mechanism.
US09224547B2 Vehicle door window switch
A vehicle door switch is provided. The door switch includes a top housing and a bottom housing. The bottom housing having at least one first opening arranged opposite the top housing. A printed circuit board is disposed within the housing. A shield member is provided having a planer portion with a top surface and a bottom surface. The bottom surface is arranged adjacent the printed circuit board, the shield member further having a side wall extending about the perimeter of the planer portion. The printed circuit board is disposed within the area defined by the side wall.
US09224546B2 Brake drive controlling device for promptly switching state of brake from released state to fastened state
A diode includes an anode connected to the other ends of brake coils, and a cathode connected to one end of a smoothing capacitor. A diode includes an anode connected to the other end of the smoothing capacitor, and a cathode connected to one ends of the brake coils. By providing the diodes, energy stored in the brake coils, when at least one of an NPN type transistor and an NPN type transistor is in an on-state, is returned to the smoothing capacitor when the NPN type transistors are in an off-states.
US09224541B2 Solid electrolytic capacitor for use in high voltage and high temperature applications
A capacitor assembly for use in high voltage and high temperature environments is provided. More particularly, the capacitor assembly includes a solid electrolytic capacitor element containing an anode body, a dielectric overlying the anode, and a solid electrolyte overlying the dielectric. To help facilitate the use of the capacitor assembly in high voltage applications, it is generally desired that the solid electrolyte is formed from a dispersion of preformed conductive polymer particles. In this manner, the electrolyte may remain generally free of high energy radicals (e.g., Fe2+ or Fe3+ ions) that can lead to dielectric degradation, particularly at relatively high voltages (e.g., above about 60 volts). Furthermore, to help protect the stability of the solid electrolyte at high temperatures, the capacitor element is enclosed and hermetically sealed within a housing in the presence of a gaseous atmosphere that contains an inert gas.
US09224539B2 Solid electrolytic capacitor and method for manufacturing the same
A solid electrolytic capacitor includes an anode body, a dielectric coating formed to cover the anode body, a first solid electrolyte layer formed to cover the dielectric coating, a second solid electrolyte layer made of a conductive polymer and formed to cover a relatively thin portion of the first solid electrolyte layer, and a cathode layer formed to cover the first solid electrolyte layer and the second solid electrolyte layer.
US09224534B2 Electromagnetic resonance coupler
The electromagnetic resonance coupler includes: a transmission substrate; a reflective substrate; the first resonant wiring having an open loop shape having a first opening; a first input/output wiring connected to the first resonant wiring; the second resonant wiring provided inside the first resonant wiring and having an open loop shape having a second opening; a second input/output wiring connected to the second resonant wiring, the first resonant wiring, the first input/output wiring, the second resonant wiring, and the second input/output wiring being provided on the transmission substrate; and a reflection wiring provided on the reflective substrate and having a open loop shape having a third opening, in which, when viewed in a direction perpendicular to a main face of the transmission substrate, the reflection wiring and the first resonant wiring overlap and the reflection wiring and the second resonant wiring overlap.
US09224532B2 Rolled-up inductor structure for a radiofrequency integrated circuit (RFIC)
A rolled-up inductor structure for a radiofrequency integrated circuit (RFIC) comprises a multilayer sheet in a rolled configuration comprising multiple turns about a longitudinal axis. The multilayer sheet comprises a conductive pattern layer on a strain-relieved layer, and the conductive pattern layer comprises at least one conductive strip having a length extending in a rolling direction. The at least one conductive strip thereby wraps around the longitudinal axis in the rolled configuration. The conductive pattern layer may also comprise two conductive feed lines connected to the conductive strip for passage of electrical current therethrough. The conductive strip serves as an inductor cell of the rolled-up inductor structure.
US09224528B2 Electromagnetically actuatable valve
An electrically actuatable valve for injecting fuel includes a magnetic actuator having multiple components, at least one component of the magnetic actuator having multiple sectors made of soft magnetic material and multiple insulating separating webs. A separating web is situated between each two neighboring sectors and entirely separates the neighboring sectors from one another electrically.
US09224527B2 Production method of ultrafine crystalline alloy ribbon
A method for producing an ultrafine-crystalline alloy ribbon having a structure in which crystal grains having an average grain size of 1-30 nm are dispersed at a ratio of 5-30% by volume in an amorphous matrix ultrafine, comprising the steps of ejecting an alloy melt onto a rotating cooling roll to quench it; forming an easily windable ribbon having such toughness that it is not fractured when bent to a bending radius of 1 mm or less, before the start of winding around a reel; and changing the forming conditions of the ribbon after the start of winding around a reel, to obtain a structure in which ultrafine crystal grains having an average grain size of 1-30 nm are dispersed at a ratio of 5-30% by volume in an amorphous matrix.
US09224522B2 Holdout devices and cover assemblies and methods incorporating the same
A cover assembly for covering an elongate substrate includes a holdout device and a resilient, elastically radially expanded sleeve member. The holdout device includes a core having an axially extending slit defined therein and defining a core passage to receive the substrate, and a designated target region. The sleeve member defines an axially extending sleeve passage. The sleeve member is mounted on the core such that the core is disposed in the sleeve passage and the sleeve member exerts a radially compressive recovery force on the core. When the substrate is disposed in the core passage and a radially directed release force is applied to the target region, the core will reduce in circumference and collapse around the substrate under the recovery force of the sleeve member to a collapsed position.
US09224521B2 Halogen-free polymer resin composition and polymer resin material made by using said composition
The present arrangement is directed to a polymer resin composition having polyvinyl acetate resin having 60 to 80% by weight of vinyl acetate group as a base resin. The composition has the following components based on 100 parts by weight of the base resin: 10 to 15 parts by weight of ethylene resin having a polar group or its copolymer resin; 29 to 40 parts by weight of ether-type polyurethane resin; 140 to 171 parts by weight of aluminum hydrate; 15 to 55 parts by weight of magnesium hydrate and flame retardant aid; 3 to 5 parts by weight of antioxidant; 10 to 15 parts by weight of plasticizer; and 4 to 0.5 parts by weight of crosslinking agent.
US09224517B2 Paste composition for electrode and photovoltaic cell
A paste composition for an electrode, the paste composition comprising: phosphorous-containing copper alloy particles in which the content of phosphorous is from 6% by mass to 8% by mass; glass particles; a solvent; and a resin.
US09224515B2 Cathode active material for lithium ion battery, cathode for lithium ion battery, and lithium ion battery
There is provided a cathode active material for a lithium ion battery having good battery properties. The cathode active material for a lithium ion battery is represented by a composition formula: Li(LixNi1-x-yMy)O2+α wherein M is one or more selected from Sc, Ti, V, Cr, Mn, Fe, Co, Cu, Zn, Ga, Ge, Al, Bi, Sn, Mg, Ca, B, and Zr; 0≦x≦0.1; 00, and has a moisture content measured by Karl Fischer titration at 300° C. of 1100 ppm or lower.
US09224513B2 Zinc oxide sintered compact tablet and manufacturing method thereof
Provided is a zinc oxide sintered compact tablet enabling a transparent conductive film having no pinholes defects to be stably obtained during vacuum deposition film formation by suppressing the occurrence of the splashing phenomenon. A zinc oxide sintered compact tablet having hexagonal crystal structure, wherein when the integrated intensity of surface (103) and surface (110) found through X-ray diffraction analysis using CuKα radiation is taken to be I(103) and I(110) respectively, the orientation of the uniaxially pressed surface that is expressed by I(103)/(I(103)+I(110)) is 0.48 or more is obtained by performing pressurized formation of a granulated powder composed of a zinc oxide powder or a powder mixture of zinc oxide and an added element as a dopant and having a percentage of donut shaped secondary particles of 50% or more, sintering at normal pressure and a temperature of 800° C. to 1300° C., and further performing reduction treatment by maintaining the normal pressure sintered compact in a vacuum at a pressure of 1×10−3 Pa or more and at a temperature of 800° C. to 1300° C. for no less than 1 minute and no longer than 10 minutes.
US09224512B2 Positive electrode active material for non-aqueous secondary battery and manufacturing method thereof, as well as non-aqueous secondary battery using positive electrode active material
A positive electrode active material for a non-aqueous secondary battery having high capacity and high rate characteristics is intended to be provided. Further, a positive electrode for a non-aqueous secondary battery and a non-aqueous secondary battery are intended to be provided by using the positive electrode active material. The positive electrode active material for the non-aqueous secondary battery contains a lithium composite oxide having an olivine structure represented by the chemical formula: Li1+AMnXM1−X(PO4)1+B in which A>0, B>0, M represents a metal element, M in the chemical formula is one or more metal elements selected from Fe, Ni, Co, Ti, Cu, Zn, Mg, V, and Zr, the ratio A/B in the chemical formula is within a range of: 2
US09224511B2 Electrical wire and electrical wire with terminal
The invention relates to an electrical wire and an electrical wire with a terminal capable of diminishing the adjustment of a crimping height. There is provided an electrical wire 1 including a conductor part 11 that is made of a precipitation strengthened copper alloy having a cross-sectional area of 0.13 sq in the ISO 6722 standard and is compressed, wherein the conductor part 11 has a rate of elongation of 7% or more, and a tensile strength of 500 MPa or more. In addition, the electrical conductivity of the conductor part is 70% IACS or more.
US09224504B2 Mapping of random defects in a memory device
A memory device includes a memory array with random defective memory cells. The memory array is organized into rows and columns with a row and column identifying a memory location of a memory cell of the memory array. The memory device includes a row address device and a column address device and is operative to use a grouping of either the row or the column addresses to manage the random defective memory cells by mapping the memory location of a defective memory cell to an alternate memory location.
US09224496B2 Circuit and system of aggregated area anti-fuse in CMOS processes
Gate oxide breakdown anti-fuse suffers notorious soft breakdown that reduces yield and reliability. This invention discloses circuit and system to enhance electrical field by blocking LDD so that the electrical field is higher and more focused near the drain junction, to make electrical field in the channel more uniform by creating slight conductive or conductive in part or all of the channel, or to neutralize excess carriers piled up in the oxide by applying alternative polarity pulses. The embodiments can be applied in part, all, or any combinations, depending on needs. This invention can be embodied as a 2 T anti-fuse cell having an access and a program MOS with drain area in the program MOS, or 1.5 T anti-fuse cell without any drain in the program MOS. Similarly this invention can also be embodied as a 1 T anti-fuse cell having a portion of the channel made conductive or slightly conductive to merge the access and program MOS into one device with drain area, or 0.5 T anti-fuse cell without any drain.
US09224489B2 Flash memory devices having multi-bit memory cells therein with improved read reliability
Integrated circuit memory devices include an array of nonvolatile N-bit memory cells, where N is an integer greater than one. Control circuitry is also provided to reliably read data from the N-bit memory cells. This control circuitry, which is electrically coupled to the array, is configured to determine, among other things, a value of at least one bit of data stored in a selected N-bit memory cell in the array. This is done by decoding at least one hard data value and a plurality of soft data values (e.g., 6 data values) read from the selected N-bit memory cell using a corresponding plurality of unequal read voltages applied to the selected N-bit memory cell during a read operation.
US09224488B2 Semiconductor memory device
According to one embodiment, a semiconductor memory device includes the following structure. A memory cell array includes memory cells arranged at positions where bit lines and word lines cross are arranged on a semiconductor substrate. A sense amplifier reads data stored in the memory cell. The hookup region includes a transfer transistor arranged between the memory cell array and the sense amplifier. One end of a current path of the transfer transistor is connected to a first interconnect formed between the semiconductor substrate and the bit line. The other end of the current path is connected to the sense amplifier. A guard ring region is arranged between the memory cell array and the hookup region. A contact plug is arranged to overlap the guard ring region.
US09224487B2 Semiconductor memory read and write access
A semiconductor memory includes a sense amplifier which operates in response to activation of a sense amplifier enable signal and determines logic held in a nonvolatile memory cell according to a voltage of a bit line, the voltage varying with a cell current flowing through a real cell transistor, a replica cell transistor coupled in series between a first node and a ground line, and a timing generation unit. The timing generation unit activates the sense amplifier enable signal when the first node coupled to the ground line via the replica cell transistor changes from a high level to a low level. The replica cell transistor includes a control gate receiving a constant voltage and a floating gate coupled to the control gate. Thus, the activation timing of the sense amplifier can be optimally set in accordance with the electric characteristic of the memory cell.
US09224485B2 Nonvolatile memory device and method of programming the same minimizing disturbance from adjacent cells
A nonvolatile memory device and a method of programming the same. The nonvolatile memory device includes a memory cell array including a plurality of memory cells and a program control logic circuit controlling the memory cell array. The program control logic circuit programs a first memory cell so that the threshold voltage of the first memory cell corresponding to data of erasure state is higher than the threshold voltage of a second memory cell corresponding to data of program state, in the memory cell array. The nonvolatile memory device controlled in this manner can provide higher reliability.
US09224474B2 P-channel 3D memory array and methods to program and erase the same at bit level and block level utilizing band-to-band and fowler-nordheim tunneling principals
A p-channel flash memory device including a 3D NAND array has excellent performance characteristics. Techniques for operating 3D, p-channel NAND arrays include selective programming, selective (bit) erase, and block erase. Selective programming bias arrangements induce band-to-band tunneling current hot electron injection to increase threshold voltages in selected cells. Selective erase biasing arrangements induce −FN hole tunneling to decrease threshold voltages in selected cells. Also, block erase bias arrangements induce −FN hole tunneling in selected blocks of cells.
US09224470B1 Memory circuit and method of programming memory circuit
A method includes applying a first voltage setting to a first node and a second node of a selected memory cell for a first predetermined period of time in response to a command for programming a first logical state to the selected memory cell. A first stored logical state of the selected memory cell is obtained after the applying the first voltage setting operation. If the first stored logical state differs from the first logical state, a second voltage setting is applied to the first node and the second node of the selected memory cell; and a first retrial is performed. The first retrial includes applying the first voltage setting to the first node and the second node of the selected memory cell for the first predetermined period of time.
US09224465B2 Cross-point memory bias scheme
The present disclosure relates to a cross-point memory bias scheme. An apparatus includes a memory controller including a word line (WL) control module and a bit line (BL) control module, the memory controller configured to initiate selection of a target memory cell; a sense module configured to determine whether the target memory cell has been selected; and a C-cell bias module configured to establish a C-cell bias if the target cell is not selected.
US09224464B2 Memory circuit and related method
A device includes a memory bit cell, a first current source, and a current comparator electrically connected to the memory bit cell and the first current source. A first transistor has a first terminal electrically connected to a first voltage supply node, a control terminal electrically connected to a controller, and a second terminal electrically connected to the memory bit cell and the current comparator. A sense amplifier is electrically connected to the current comparator and a reference current generator.
US09224457B2 Non-volatile storage with temperature compensation based on neighbor state information
Data is programmed into and read from a set of target memory cells. When reading the data, temperature compensation is provided. The temperature compensation is based on temperature information and the state of one or more neighbor memory cells. In one embodiment, when data is read from set of target memory cells, the system senses the current temperature and determines the differences in temperature between the current temperature and the temperature at the time the data was programmed. If the difference in temperature is greater than a threshold, then the process of reading the data includes providing temperature compensation based on temperature information and neighbor state information. In one alternative, the decision to provide the temperature compensation can be triggered by conditions other than a temperature differential.
US09224455B1 Method and apparatus for bit-line sensing gates on an SRAM cell
A circuit for providing additional current in a memory cell without a higher supply voltage is provided. Embodiments include a circuit having a six transistor static random access memory (SRAM) cell including a first inverter and second cross-coupled to a second inverter; a first transistor having a first source coupled to a first bit-line, a first drain coupled to the first inverter, and a first gate coupled to a word-line; a second transistor having a second source coupled to the second inverter, a second drain coupled to a second bit-line, and a second gate coupled to the word-line; and a plurality of bit-line sensing transistors coupled to the first transistor and to the second transistor.
US09224453B2 Write-assisted memory with enhanced speed
A write-assisted memory includes a pre-charge assist circuit that assists the pre-charge of the power supply voltage on a power supply lead for an accessed memory cell in a bit-line-multiplexed group of memory cells subsequent to a write-assist period by coupling charge from the power supply leads for the remaining non-accessed memory cells in the bit-line-multiplexed group of memory cells.
US09224452B2 Heterogeneous memory systems, and related methods and computer-readable media for supporting heterogeneous memory access requests in processor-based systems
Heterogeneous memory systems, and related methods and computer-readable media for supporting heterogeneous memory access requests in processor-based systems are disclosed. A heterogeneous memory system is comprised of a plurality of homogeneous memories that can be accessed for a given memory access request. Each homogeneous memory has particular power and performance characteristics. In this regard, a memory access request can be advantageously routed to one of the homogeneous memories in the heterogeneous memory system based on the memory access request, and power and/or performance considerations. The heterogeneous memory access request policies may be predefined or determined dynamically based on key operational parameters, such as read/write type, frequency of page hits, and memory traffic, as non-limiting examples. In this manner, memory access request times can be optimized to be reduced without the need to make tradeoffs associated with only having one memory type available for storage.
US09224450B2 Reference voltage modification in a memory device
A method and apparatus for modifying a reference voltage between refreshes in a memory device are disclosed. The memory array may include a plurality of memory cells. The memory device may also include a sense amplifier. The sense amplifier may be configured to read data from the plurality of memory cells using a reference voltage. The memory device may also include a sense amplifier reference voltage modification circuit. The sense amplifier reference voltage modification circuit may be configured to detect a triggering event and modify the reference voltage in response to detecting a triggering event.
US09224449B2 Variable dynamic memory refresh
A system and method are provided for refreshing a dynamic memory. A first region of a memory is refreshed at a first refresh rate and a second region of the memory is refreshed at a second refresh rate that is different than the first refresh rate. A memory controller is configured to refresh the first region of a memory at the first refresh rate and refresh the second region of the memory at the second refresh rate.
US09224439B2 Memory with word line access control
A memory having a memory array having a plurality of word lines, a plurality of bit cells coupled to the word lines, and a plurality of control memory cells coupled to the word lines. Each word line of the plurality of word lines has a control memory cell coupled thereto and each control memory cell has an output. The memory also has a plurality of logic circuits coupled to the plurality of word lines. The output of each control memory cell is coupled to a corresponding one of the plurality of logic circuits. The plurality of logic circuits prevents access to the word line selected by a row address if the output of the control memory cell coupled to the selected word line is in a first logic state.
US09224438B2 Multiple data rate memory interface architecture
The present invention provides a DQS bus for implementing high speed multiple-data-rate interface architectures in programmable logic devices. The DQS bus has a balanced tree structure between at least one data strobe circuit and a plurality of I/O register blocks.
US09224437B2 Gated-feedback sense amplifier for single-ended local bit-line memories
A single-ended input sense amplifier uses a pass device to couple the input local bit-line to a global bit-line evaluation node. The sense amplifier also includes a pair of cross-coupled inverters, a first inverter of which has an input that coupled directly to the global bit-line evaluation node. The output of the second inverter is selectively coupled to the global bit-line evaluation node in response to a control signal, so that when the pass device is active, the local bit line charges or discharges the global bit-line evaluation node without being affected substantially by a state of the output of the second inverter. When the control signal is in the other state, the cross-coupled inverter forms a latch. An internal output control circuit of the second inverter interrupts the feedback provided by the second inverter in response to the control signal.
US09224435B2 Radiation-hard precision voltage reference
According to one aspect, embodiments herein provide a PVR comprising a resonator having an oscillation frequency, the resonator comprising at least one proof-mass, a mechanical reference, at least one drive plate located adjacent a first side of the at least one proof-mass, and at least one sense plate located adjacent a second side of the at least one proof-mass, a voltage source coupled to the drive and sense plates, a reference oscillator configured to provide a reference signal having a reference frequency to the voltage source; and an output, wherein the voltage source is configured to provide a bias voltage signal to the at least one drive and at least one sense plates of the resonator to drive the oscillation frequency of the resonator to match the reference frequency, and wherein the bias voltage signal is also provided to the output of the PVR as a voltage reference signal.
US09224434B2 Voltage generating circuit
A circuit includes a first transistor of a first type, a second transistor of a second type, a sense amplifier, a first data line, and a second data line. The second type is different from the first type. The first data line is coupled with a first terminal of the sense amplifier. The second data line is coupled with a second terminal of the sense amplifier. A first terminal of the first transistor is configured to receive a supply voltage. A second terminal of the first transistor, a third terminal of the first transistor, a second terminal of the second transistor, a third terminal of the second transistor are coupled together and are configured to carry a voltage. A first terminal of the second transistor is configured to receive a reference supply voltage. The first and second data lines are configured to receive a voltage value of the voltage.
US09224433B1 Method and apparatus for power supply aware memory access operations in an integrated circuit
On-die variability noise or other variations in the power supply voltage to a storage circuit may cause the ability to perform memory access operations to be marginal. A control circuit may be coupled to the storage circuit and the power distribution network and monitor the actual power supply voltage. The control circuit may include a reference voltage generator that generates a nominal voltage. The control circuit may further include a comparator that generates a status signal based on a comparison between the actual power supply voltage and a nominal voltage. Based on the status signal, the control circuit may control memory access operations performed by the storage circuit. For example, the control circuit may enable and disable the execution of read and write operations on the storage circuit. If desired, the control circuit may also control the operation of predetermined portions of the integrated circuit.
US09224432B2 Semiconductor package
In a semiconductor package, a circuit pattern is arranged in a circuit board and contact pads on the circuit board are connected with the circuit pattern. Contact terminals contact external contact elements on a first surface of the circuit board. An integrated circuit (IC) chip structure is mounted on the circuit board and electrically connected to the inner circuit pattern. An operation controller on the circuit board controls operation of the semiconductor package according to the package users' individual choice.
US09224429B2 Three-dimensional semiconductor devices and methods of fabricating the same
According to example embodiments of inventive concepts, a three-dimensional semiconductor device may include: a memory cell array including memory cells that may be arranged three-dimensionally, the memory cell array including a left side opposite a right side, and a top side opposite a bottom side in a plan view; at least one word line decoder adjacent to at least one of the left and right sides of the memory cell array; a page buffer adjacent to the bottom side of the memory cell array; and a string selection line decoder adjacent to one of the top and bottom sides of the memory cell array.
US09224428B2 Recording apparatus and control method thereof
A recording apparatus independently sets conditions of information data to be simultaneously recorded in a plurality of recording media in a simultaneous recording mode according to a user instruction. The recording apparatus processes information data according to the set conditions so as to generate a plurality of information data to be recorded in the plurality of recording media in the simultaneous recording mode, and their identification information, and records the plurality of generated information data and identification information in the plurality of recording media. When different conditions are set as the conditions of the information data to be simultaneously recorded in the plurality of recording media, a plurality of pieces of identification information which have different values are generated for the information data to be simultaneously recorded in the plurality of recording media.
US09224426B2 Apparatus and method for managing multimedia playback
An apparatus and method of managing reproduction of multimedia contents. A multimedia reproduction method includes: receiving identification information on predetermined multimedia contents; receiving first reproduction information on the predetermined multimedia contents, from a multimedia reproduction management apparatus receiving the transmitted identification information; and if first identification information contained in the received first reproduction information corresponds with the transmitted identification information, reproducing the predetermined multimedia contents based on the first reproduction information. According to the apparatus and method, even when a DVD title being played back is replaced by another DVD title, or when the power of a DVD playback apparatus is suddenly interrupted, the reproduction position information is safely maintained.
US09224424B2 Data recording/reproducing device, archive system, and recording control method
A data recording/reproducing device for recording data on a recordable area of a recording medium in an arbitrary recording unit, includes a control unit that controls the operation of the data recording/reproducing device. The control unit designates a recording unit where data on the recordable area is not recorded as a non-use area, determines whether data has been recorded, or unrecorded in the recording unit on the recordable area, determines the recording unit designated as the non-use area to have been recorded, and records data in the recording unit determined to be unrecorded when data is recorded on the recording medium, under the control.
US09224416B2 Near field transducers including nitride materials
An apparatus that includes a near field transducer, the near field transducer including an electrically conductive nitride.
US09224415B2 Microprobe, recording apparatus, and method of manufacturing microprobe
According to one embodiment, a microprobe includes a supporting base, an insulating layer, and an electrode layer arrayed in a first direction in this order. A principal surface of the microprobe is formed in a second direction different from the first direction. A step is formed on at least the electrode layer on the principal surface, and the electrode layer is partitioned into a first area and a second area by the step.
US09224412B2 Perpendicular magnetic recording disk with template layer formed of a blend of nanoparticles
A continuous-media perpendicular magnetic recording disk has a granular recording layer (RL) with controlled grain pitch distribution and controlled long range ordering of the grains. The disk includes a substrate with a template layer for the RL that comprises a blend of at least two different sized nanoparticles. The nanoparticles have a nanoparticle core with attached polymer ligands. The nanoparticle cores protrude above the surface of the template layer to provide a nonplanar surface topology. The blend of two sizes of nanoparticles causes the RL to have low grain pitch distribution and a disruption of long range ordering so that there are no large magnetic rafts. One of the nanoparticles types has a diameter greater than 105% of the diameter of the other nanoparticle type and is present in the total blend of nanoparticles of between about 5% and 35% or between about 55% and 90%.
US09224409B2 Tolerance ring with grouped waves
A tolerance ring can include a generally cylindrical body having a sidewall. The sidewall can include a first unformed section and a gap in the first unformed section. The gap can extend along an entire length of the body to establish a split in the body. The sidewall can also include a second unformed section opposite the first unformed section, a first wave bank flanking the first unformed section with the gap, and a second wave bank flanking the first unformed section with the gap. The wave banks can be equally spaced around a circumference of the body of the tolerance ring and the body of the tolerance ring can be symmetrical about a center axis that extends from a center of the tolerance ring and bisects the gap in the first unformed section.
US09224407B2 Varying write pole side shield gap
A magnetic element can be configured with a write pole that continuously extends from an air bearing surface along a plane orthogonal to the air bearing surface. A magnetic shield can be separated from the write pole by a first gap distance on the air bearing surface throughout a tip portion of the write pole and by a second gap distance distal the air bearing surface along the plane orthogonal to the air bearing surface along a body portion of the write pole with the first and second gap distances measured parallel to the air bearing surface and the second gap distance being greater than the first gap distance.
US09224406B2 Technique for estimating particular audio component
Candidate frequencies per unit segment of an audio signal are identified. First processing section identifies an estimated train that is a time series of candidate frequencies, each selected for a different one of the segments, arranged over a plurality of the unit segments and that has a high likelihood of corresponding to a time series of fundamental frequencies of a target component. Second processing section identifies a state train of states, each indicative of one of sound-generating and non-sound-generating states of the target component in a different one of the segments, arranged over the unit segments. Frequency information which designates, as a fundamental frequency of the target component, a candidate frequency corresponding to the unit segment in the estimated train is generated for each unit segment corresponding to the sound-generating state. Frequency information indicative of no sound generation is generated for each unit segment corresponding to the non-sound-generating state.
US09224401B2 Audio signal encoding method and device
An audio signal encoding device includes: a window determination unit for determining the type of window of each channel; a correction unit for correcting the number of available bits; and a quantization unit for quantizing the audio signal of each channel sequentially so that the number of bits is equal to or less than the corrected number of available bits while adding the number of bits left unused, and the correction unit includes: a use rate history calculation unit for calculating a bit use rate in quantization of each type of window; and a corrected bit number calculation unit for correcting the number of available bits so that the rate of used bits to the number of available bits of each channel on the assumption that quantization is performed with the calculated bit use rate in quantization approaches the same.
US09224400B2 Downmix limiting
The invention relates to downmixing techniques by which output audio signals are obtained from input audio signals partitioned into subgroups. A variable common gain limiting factor is applied to all downmix coefficients that govern the contributions from the input signals in a subgroup. While preserving the proportions between signal values within a subgroup, the invention makes it possible to limit the gain of different input signal subgroups to different extents, so that relatively more perceptible signals can be limited relatively less. It then becomes possible to achieve a consistent dialogue level while transitioning in a less perceptible fashion between signal portions with and without gain limiting. Embodiments of the invention include a method, a mixing system and a computer-program product.
US09224399B2 Apparatus and method for concealing frame erasure and voice decoding apparatus and method using the same
An apparatus and method for concealing frame erasure and a voice decoding apparatus and method using the same. The frame erasure concealment apparatus includes: a parameter extraction unit determining whether there is an erased frame in a voice packet, and extracting an excitement signal parameter and a line spectrum pair parameter of a previous good frame; and an erasure frame concealment unit, if there is an erased frame, restoring the excitement signal and line spectrum pair parameter of the erased frame by using a regression analysis from the excitement signal and line spectrum pair parameter of the previous good frame. According to the method and apparatus, by predicting and restoring the parameter of the erased frame through the regression analysis, the quality of the restored voice signal can be enhanced and the algorithm can be simplified.
US09224397B2 Method and electronic device for easily searching for voice record
A method of writing a specific time point through a familiar pattern input that can be instantaneously applied to a portion desired to be memorize or highlighted by the user during audio recording. An electronic device according to an embodiment disclosed in the present disclosure may include a storage unit configured to store audio data and the recording information of the audio data; a controller configured to convert an input audio signal into audio data to store the audio data; a display unit configured to display one or more texts based on the execution of a speech-to-text (STT) for the input audio signal; and an input unit configured to receive a specific pattern input or a selection input for part of the texts from the user while receiving the audio signal.
US09224393B2 Noise estimation for use with noise reduction and echo cancellation in personal communication
A method comprises processing M subband communication signals and N target-cancelled signals in each subband with a set of beamformer coefficients to obtain an inverse target-cancelled covariance matrix of order N in each band; using a target absence signal to obtain an initial estimate of the noise power in a beamformer output signal averaged over recent frames with target absence in each subband; multiplying the initial noise estimate with a noise correction factor to obtain a refined estimate of the power of the beamformer output noise signal component in each subband; processing the refined estimate with the magnitude of the beamformer output to obtain a postfilter gain value in each subband; processing the beamformer output signal with the postfilter gain value to obtain a postfilter output signal in each subband; and processing the postfilter output subband signals to obtain an enhanced beamformed output signal.
US09224392B2 Audio signal processing apparatus and audio signal processing method
Likelihood calculation means extracts audio features expressing features of a voice signal and a non-voice signal from an acquired audio signal, and calculates likelihood expressing probability that the voice signal is included in the audio signal using the audio features. Spectral feature extraction means performs a frequency analysis to the audio signal to extract a spectral feature. Using the spectral feature, first basis matrix producing means produces a first basis matrix expressing the feature of the non-voice signal. Second basis matrix producing means specifies a component having a high association with the voice signal in the first basis matrix using the likelihood, and excludes the component to produce a second basis matrix. Spectral feature estimation means estimates a spectral feature of the voice signal or a spectral feature of the non-voice signal by performing nonnegative matrix factorization to the spectral feature using the second basis matrix.
US09224389B2 System and method for performing distributed speech recognition
A system and method for performing distributed speech recognition is provided. Audio data is received on a main recognizer and on each of a plurality of secondary recognizers. Secondary grammars are transmitted to each of the secondary recognizers. The secondary recognizers each perform speech recognition on the audio data using the secondary grammar for that secondary recognizer. A new grammar is constructed based on results of the speech recognition by each of the secondary recognizers. The main recognizer performs speech recognition on the audio data using the new grammar.
US09224387B1 Targeted detection of regions in speech processing data streams
In speech processing systems, a special audio trigger indication is configured to efficiently isolate and mark incorrect speech processing results. The trigger indication may be configured to be easily recognizable by a speech processing device under various ASR and acoustic conditions. Once a speech processing device recognizes the trigger indication, incorrectly processed speech processing results are marked and may be isolated and prioritized for review by training and upgrading processes.
US09224386B1 Discriminative language model training using a confusion matrix
Features are disclosed for discriminative training of speech recognition language models. A confusion matrix can be generated from acoustic model training data for use in discriminative training. The confusion matrix can include probabilities for the substitution, insertion, and/or deletion of some or all subword units of a language. Probabilities can be calculated based on the presence or absence of subword units in a processed acoustic model training data audio recording when compared to a correct transcription of the recording. The probabilities can be used to generate erroneous transcriptions in language model training corpora, and the language model can be trained to distinguish the erroneous transcriptions from the correct transcriptions.
US09224385B1 Unified recognition of speech and music
Methods, systems, and computer programs are presented for unified recognition of speech and music. One method includes an operation for starting an audio recognition mode by a computing device while receiving an audio stream. Segments of the audio stream are analyzed as the audio stream is received, where the analysis includes simultaneous checking for speech and music. Further, the method includes an operation for determining a first confidence score for speech and a second confidence score for music. As the audio stream is received, additional segments are analyzed until the end of the audio stream or until the first and second confidence scores indicate that the audio stream has been identified as speech or music. Further, results are presented on a display based on the identification of the audio stream, including text entered if the audio stream was speech or song information if the audio stream was music.
US09224384B2 Histogram based pre-pruning scheme for active HMMS
Embodiments of the present invention include an acoustic processing device, a method for acoustic signal processing, and a speech recognition system. The speech processing device can include a processing unit, a histogram pruning unit, and a pre-pruning unit. The processing unit is configured to calculate one or more Hidden Markov Model (HMM) pruning thresholds. The histogram pruning unit is configured to prune one or more HMM states to generate one or more active HMM states. The pruning is based on the one or more pruning thresholds. The pre-pruning unit is configured to prune the one or more active HMM states based on an adjustable pre-pruning threshold. Further, the adjustable pre-pruning threshold is based on the one or more pruning thresholds.
US09224381B2 Audio signal processing apparatus and audio signal processing system
An audio signal processing apparatus does not drive a drive unit in a period during which an audio signal used for noise reduction processing is acquired, or does not stop a recording operation until the audio signal used for noise reduction processing is acquired.
US09224379B2 Acoustic decorative material
An acoustic decorative sheet includes a film layer, a glass cloth layer, and an adhesive layer separating the film layer from the glass cloth layer. The adhesive layer is adhered to the film layer and the glass cloth layer. The film layer and the adhesive layer have a plurality of micro bores disposed there through. The micro bores have a diameter in a range from 20 to 500 micrometers and number from 2 to 700 microbores per cm2. An acoustic assembly includes the acoustic decorative sheet, a substrate; and an air gap at least partially separating the acoustic decorative sheet from the substrate.
US09224377B2 Computerized percussion instrument
A computerized musical percussion instrument is disclosed.Markers carried by the musician are observed by an imager to produce a series of two dimensional images over the time of the performance.A processor receives the images and distinguishes between markers (e.g. left hand, right hand) by comparing the position and size of unidentified markers in the current image to the position and size of identified markers in preceding images.The processor analyzes each markers' movements and detects a drum hit when a marker undergoes a sharp reversal of its motion direction after reaching sufficient speed. The processor determines which drum the musician intends to hit by comparing the position and size of the marker at the instant of the hit to the position and size attributes of each drum. The processor outputs an audio signal for each hit, corresponding to the drum hit, with a volume determined by marker speed.
US09224370B1 Stringed musical instrument with rotating neck
Provided is a foldable stringed having a rotating neck in which the fret board in the folded position is opposite the rear face and the mechanism employs a flexible cable system under variable tension.
US09224369B2 Device for modeling (shaping) surface of fret, fret board, or fingerboard of string instrument
Provided is a tool for polishing the surface of frets, a fretboard or a fingerboard of a stringed instrument, so as to shape and adjust the frets, the fretboard or the fingerboard to have a curve appropriate for the stringed instrument having a curve.
US09224368B2 Merging three-dimensional models of varying resolution
Systems and methods for merging three-dimensional models, such as a three-dimensional range sensor-based model and a three-dimensional camera-based model, are provided. According to aspects of the present disclosure, an enhanced volumetric merging technique can be used to merge the three-dimensional models. A plurality of voxels can be constructed for a three-dimensional space. A first distance field can be propagated based on the range sensor-based model in an extended margin between the range sensor-based model and a range sensor viewpoint. A second distance field can be propagated based on the camera-based model for voxels in the extended margin. A cumulative distance field can be determined based at least in part on the first field and the second distance field. The merged three-dimensional model can be constructed from the cumulative distance field using, for instance, a suitable meshing algorithm.
US09224365B2 Method and apparatus for reducing interference and mobile terminal
A method and apparatus for reducing interference and a mobile terminal using the method and apparatus. The method includes: selecting a display mode of a pixel, for a frequency falling into a receiving band range of radio communication, according to a corresponding relation between the pixel to be displayed and a strength value of interference induced in the frequency. The present invention may not only further reduce interference brought by the MIPI high-speed data transmission to radio communication receiver, but also have effect on those bands lower than 1 GHZ, lower the requirements on hardware and hence lower hardware cost, and occupy no design space.
US09224360B2 Display device
A display device includes a display panel, and a driving unit that generates driving signals for driving the display panel. The display panel receives the driving signals and outputs the driving signals as test driving signals. The driving unit includes an analog-digital converter to which the test driving signals are input, and includes a register that stores signal levels detected by the analog-digital converter.
US09224359B2 In-band peripheral authentication
This document describes techniques (300, 400) and apparatuses (100, 500, 600, 700) for in-band peripheral authentication. These techniques (300, 400) and apparatuses (100, 500, 600, 700) may communicate via a non-media channel allowing host device (102) to authenticate peripheral (106), enable an enhanced operational mode of the host device (102), and/or provide content configured for the peripheral (106) without the use of out-of-band signaling.
US09224355B2 Interactive system and method for operating a plurality of flexible displays to implement interactive operation
A method for operating a plurality of flexible displays to implement an interactive operation among the plurality of flexible displays is provided. The method is used between the plurality of flexible displays and a system control platform. Each flexible display is configured with a plurality of light sensors and a plurality of sensors and a processor. The method includes: quantifying, by each light sensor, a external luminosity value received by each flexible display; quantifying, by each sensor, a sensor-measuring value received by each flexible display; generating and transmitting, by the processor coupled to the light sensors and the sensors, luminosity information and sensor information according to the external luminosity values and the sensor-measuring values; and receiving, by the information platform, the luminosity information and the sensor information, and implements the interactive operation among the plurality of flexible displays between the plurality of flexible displays according to the sensor information.
US09224354B2 Liquid crystal display device and a pixel driving method thereof
A pixel driving method of a liquid crystal display (LCD) device, the LCD device comprising a first stage pixel, a second stage pixel, a first transistor, a second transistor, a third transistor, a first scan line, a second scan line, a plurality of data lines, a main pixel electrode, a sub pixel electrode, and a share capacitance, and the pixel driving method comprising the following steps: A step of driving the first scan line during the first driving period to charge the main pixel electrode and the sub pixel electrode of the first stage pixel, a step of ceasing to drive the first scan line during the second driving period to reduce voltages of the main pixel electrode and the sub pixel electrode of the first stage pixel, a step of driving the second scan line during the third driving period to turn on the third transistor of the first stage pixel, and a step of ceasing to drive the second scan line during the fourth driving period and pulling down the voltages of the main pixel electrode and the sub pixel electrode of the first stage pixel by implementing the share capacitance, which is connected with the third transistor during the third and the fourth driving period.
US09224353B2 Liquid crystal monitor using DC-DC converter
A liquid crystal monitor includes a first voltage conversion circuit (e.g. a DC/DC converter), which converts an external DC voltage into a first internal DC voltage supplied to CPU circuitry, and a second voltage conversion circuit, which converts the external DC voltage into a second internal DC voltage for driving a backlight of a liquid crystal panel. The external DC voltage is set proximate to a center value between the first internal DC voltage and the second internal DC voltage. This allows the liquid crystal monitor to be equipped with a battery unit producing a single external DC voltage, thus reducing weight compared to a conventional liquid crystal monitor.
US09224352B2 Display device with de-multiplexers having different de-multiplex ratios
A display device comprises a display area, a plurality of data buses located in the display area, a controller, a first de-multiplexer, and a second de-multiplexer. The controller is adapted to provide a first data signal and a second data signal. The first de-multiplexer has a first de-multiplexer ratio, and is adapted to output the first data signal received from the controller to a plurality of first data buses of the data buses. The second de-multiplexer has a second de-multiplexer ratio, and is adapted to output the second data signal received from the controller to a plurality of second data buses of the data buses. The first de-multiplexer ratio is different from the second de-multiplexer ratio.
US09224351B1 Digitally controlled voltage generator
A digitally controlled voltage generator is disclosed for use in applications requiring fine resolution voltage control, such as generating a common voltage for a liquid crystal display. A constant resistance digital to analog converter (DAC) is configured to provide appropriate voltage steps by tuning bias resistors to generate desirable reference voltages for the DAC. The bias resistors are configured to be tuned after placement and routing steps in an integrated circuit design.
US09224348B2 Liquid crystal display
A liquid crystal display is disclosed. The liquid crystal display includes a data driving circuit, that converts digital video data into positive and negative data voltages, supplies the positive and negative data voltages to data lines of a liquid crystal display panel, and causes the data voltages supplied to the same data line to have the same polarity during one frame period, and a gate driving circuit sequentially supplying a gate pulse to gate lines of the liquid crystal display panel. Subpixels of the liquid crystal display panel include first and second subpixels positioned adjacent to each other in a horizontal direction. Each of the first and second subpixels is successively charged to the data voltages of two colors.
US09224347B2 TFT-LCD driving circuit
A TFT-LCD driving circuit is disclosed. The TFT-LCT driving circuit comprises input terminals, output terminals, and a processing circuit connected between the input terminals and the output terminals, for processing a CPV signal, an OE1 signal, an OE2 signal, and a STV signal, so that a set time interval exists between a falling edge of the output CLK signal and a rising edge of the CLKB signal in one cycle of the CLK signal, or that the set time interval exists between a rising edge of the output CLK signal and a falling edge of the CLKB signal in one cycle of the CLKB signal. Confusion of data input to pixel electrodes due to delays of gate driving signals may be avoided by the TFT-LCD driving circuit.
US09224346B2 Liquid crystal display device and related alignment method
A liquid crystal display device includes a display panel, a multiplexer, an alignment circuit and a short bar circuit. The multiplexer is configured to provide a plurality of output data signals according to a plurality of switch control signals and an input data signal. During the alignment period, the alignment circuit is configured to provide a curing voltage to the display panel, and the short bar circuit is configured to couple the multiplexer to a predetermined voltage.
US09224344B2 Electrophoretic display with a compensation circuit for reducing a luminance difference and method thereof
An electrophoretic display includes an electrophoretic panel and a compensation circuit. The electrophoretic panel includes a common electrode, a plurality of scan lines, a plurality of data lines, a plurality of first switches, and a plurality of pixels. Each pixel of the plurality of pixels is coupled to the common electrode and coupled to a corresponding scan line and a corresponding data line through a corresponding first switch of the plurality of first switches. The compensation circuit reduces a voltage drop between a pixel voltage of the pixel and a common voltage of the common electrode when the plurality of first switches are turned off. A capacitor of the compensation circuit is coupled between each scan line and the common electrode. A second switch of the compensation circuit is turned off to float the common electrode before the plurality of first switches are turned off.
US09224343B2 Fixed image display device and method of manufacturing the same
There is provided a display device, which is arranged to display a predetermined fixed image, having a pixel electrode layer comprising a plurality of pixel portions, and opaque solidified electrolyte arranged in a plurality of separated segments in ionic contact with a respective pixel portion, wherein each electrolyte segment and respective pixel portion form a pixel element. The fixed image display further comprises at least one continuous electrode layer extending across at least two rows and two columns of the pixel matrix, and is connected to the electrolyte segments of a subset of the pixel elements. Upon application of an electric potential difference between the patterned electrode layer and the pixel electrode layer, the pixel portions of the subset of the pixel elements switch color.
US09224340B2 Predictive power control in a flat panel display
A Predictive Power Control (PPC) device within a TCON Bias IC that addresses an overdesign inefficiency and enables a low cost solution. A PPC block utilizes the next frame image data and interacts with a pulse width modulation (PWM) control block of internal regulators to proactively prepare the output voltages of a power regulator for the power requirements in one or more future frames, for example.
US09224336B2 Display device of active matrix type
A display device of active matrix type allows reducing display brightness non-uniformity that is caused by initial variation and fluctuation over time in a driving transistor for emissive elements in pixel circuits. The display device includes pixel circuits, a measurement circuit and a gradation voltage supplying circuit. Each pixel circuit includes the driving transistor and an input circuit. The measurement circuit includes a constant current supplying circuit for generating and supplying one or more constant currents to the input circuit of the pixel circuits in a time division manner. The measurement circuit A/D-converts output voltages of the constant current supplying circuit and calculates data relating to electron mobility and threshold value of the driving transistor. The gradation voltage supplying circuit supplies to the pixel circuits a corrected gradation voltage, which is data corrected on the basis of data calculated from the measurement circuit.
US09224334B2 Display and electronic apparatus
A display device includes pixels, each including a set of sub-pixels. A first subset of the pixels may each include white, green, and blue sub-pixels, but not a red sub-pixel. A second subset of the pixels may each include white, green, and red sub-pixels, but not a blue sub-pixel. The pixels may alternate between the first subset and the second subset in at least one direction. First luminance data may be extracted from an input image signal based on a map that specifies locations of pixels of the first subset, and second luminance data may be extracted from the input image signal based on a map that specifies locations of pixels of the second subset. The display device may drive the blue sub-pixels based on the first luminance data and drive the red sub-pixels based on the second luminance data.
US09224333B2 Electro-optical device having pixel circuit and driving circuit, driving method of electro-optical device and electronic apparatus
An electro-optical device includes a first storage capacitor that has a first electrode and a second electrode, and a second storage capacitor that has a third electrode and a fourth electrode, and a first pixel circuit. The first pixel circuit includes a first transistor having a first gate, a first drain, and a first source, an electro-optical element, a second transistor through which a first data line is electrically connected to the first gate during the second transistor is in an on-state, and a third transistor through which the first gate is electrically connected to the first drain or the first source. The second electrode and the third electrode are electrically connected to the first data line.
US09224331B2 Organic electroluminescent display
An organic light-emitting display screen includes n×m picture dots organized in a matrix with m rows and n columns. Each picture dot includes an organic diode and first and second driver circuits for the diode. Each of the first and second driver circuits includes a driving transistor connected between a reference voltage and one electrode of the diode, a switching transistor for switching a gate voltage onto a gate of the driving transistor, and a capacitor connected to the gate of the driving transistor. A circuit for addressing each of the n×m picture dots, to control alternately and simultaneously a recovery phase on one driver circuit and a display phase on the other driver circuit of a picture dot, includes as row select lines, only m row select lines, one per row of picture dots, and/or as data lines, only n data lines, one per column of picture dots.
US09224324B2 Cascode driver circuit
This disclosure provides systems, methods, and apparatus for providing a cascode driver circuit for providing positive and negative polarities of two or more voltages at an output node. The voltages provided by the cascode driver circuit can be used to provide voltages to various interconnects and terminals of the display apparatus. The cascode driver circuit includes a first circuit for providing a positive polarity of two or more voltages to an output node via a first set of cascode transistors and a second circuit for providing negative polarities of the two or more voltages via a second set of cascode transistors. The driver circuit includes body-effect mitigation circuitry for reducing the impact of body-effect on the performance of the driver circuit. The driver circuit also includes circuitry for reducing substrate leakage current.
US09224320B2 Projection display providing additional modulation and related methods
A projection display system includes a spatial modulator that is controlled to compensate for flare in a lens of the projector. The spatial modulator increases achievable intra-frame contrast and facilitates increased peak luminance without unacceptable black levels. Some embodiments provide 3D projection systems in which the spatial modulator is combined with a polarization control panel.
US09224319B2 Method for automatically altering a theme associated with a room or similar space
A method for changing a theme associated with a given space (e.g., restaurant). A wall system includes a wall panel having multiple themes depicted thereon or multiple wall panels each having a theme depicted thereon. Using a series of winches, chain drives, cables and pulleys or the like, the wall panels are moved to change the theme of the space. A ceiling system includes two ceiling panels movable via a series of winches, chain drives, cables and pulleys. Once separated the ceiling panels expose a theme different than that depicted while closed. Audio and/or visual cues may be provided to alert patrons to a theme change.
US09224315B2 Display board
A display board is provided for displaying mementos. The board comprises a support board, a display panel, a filler material, a holder assembly, and at least one memento holder. The holder assembly has an outer edge and an inner edge that defines a window in the holder assembly for displaying the display panel. The holder assembly comprises a holder assembly member having a member panel, cushion pad and fabric layer. The memento holders are typically ribbons situated along the holder assembly, preferably in an intersecting manner. The methods of displaying the mementos using the display of the present invention are also provided.
US09224312B2 Methods and devices for determining sensing device usability
Methods and devices for determining sensing device usability, e.g., for point of care immunoassay devices. In one embodiment, the invention is to a method of determining device usability, comprising the steps of providing a device comprising a first electrical pad; a second electrical pad; and a continuous polymer layer contacting at least a portion of the first and second electrical pads; applying a potential across the first and second electrical pads; measuring an electrical property associated with the continuous polymer layer; and determining whether the measured electrical property associated with the continuous polymer layer has exceeded a threshold level associated with the device usability.
US09224305B2 Information processing apparatus, information processing method, and non-transitory computer readable medium storing information processing program
An information processing apparatus includes a sound recognition unit that recognizes a sound of a moving image including a captured document, a detecting unit that detects a word which appears in both a recognition result of the sound recognition unit and a word extracted from the captured document in the moving image, an extracting unit that extracts an occurrence time of the word detected by the detecting unit in the moving image and a position of the word in the document, a display unit that displays the word extracted by the extracting unit on the document in a different manner from that in which another word is displayed, a designating unit that designates the word displayed by the display unit on the basis of an operation of an operator, and a reproducing unit that reproduces the moving image from the occurrence time of the word designated by the designating unit.
US09224304B2 Computing method and system with detached sensor in a network environment
One embodiment includes a computer-implemented method and system in a network environment using at least a display and a detached sensor. Another embodiment includes a computer-implemented system helping a user learn using a detached imaging sensor. In yet another embodiment, a computer-implemented system monitors automatically more than once a user's behavior while the user is working on materials. Through monitoring the user's voluntary or involuntary behavior, the system determines what to present by the display. The presentation could include providing rewards, punishments, stimulation, and other materials. The system can also react by asking the user a question. Based on the user's response, the system may change to more appropriate materials, or different presentation styles.
US09224297B2 Park assist object distance measurement clock control
A method of determining an object distance from a vehicle includes sending a first transmission signal during a first burst period from a first transmitter, listening for a first reflection signal during a first listen period in a receiver, and sending a second transmission signal during a second burst period from a second transmitter. The second transmission signal is sent based on a time when the first transmission signal is sent.
US09224296B1 School child tracking system
A system for tracking school buses and schoolchildren to enhance the security and safety of schoolchildren and provide real-time information about the location of students and buses to teachers and administrators and parents by utilizing GPS components and fingerprint scanning technology. In some embodiments, the system is comprised of the following parts: a client software component, hosted on a data storage unit and executed by a client microprocessor.
US09224293B2 Apparatus and system for monitoring and managing traffic flow
An apparatus and system for monitoring and managing traffic flow. The system includes a plurality of remote sensor devices arranged in a plurality of vehicles, a plurality of remote communication hub devices operatively arranged along one or more roadways and in communication with the plurality of remote sensor devices, a central server, a network interface in communication with the central server and the plurality of remote communication hub devices over a network, and a shared database in communication with the central server. The central server is configured to receive traffic data from the plurality of remote sensor devices over the network, update traffic data in the shared database, periodically calculate an optimal traffic flow for one or more of vehicles traveling along the one or more roadways based on the updated traffic data, and transmit timing adjustments over the network to one or more traffic light intersections based on the optimal traffic flow calculations. The network interface is configured to send and receive traffic data. The traffic data includes vehicle location information and network traffic congestion information.
US09224288B2 Control apparatus, control method, program and system
A control apparatus is provided, which includes: a determination section that determines a control command according to sensor information, on the basis of a control rule capable of being set by a user for determining the control command controlling a device; and a control section that controls the device in accordance with the control command determined by the determination section.
US09224283B2 Substrate processing apparatus, alarm management method of substrate processing apparatus, and storage medium
A substrate processing apparatus is provided with: a detection unit that detects a factor for which interlock is applied to one or more of a plurality of modules and outputs a detection signal; interlocking management unit that, based on the detection signal output from the detecting units, applies interlock to the module to be interlocked if the factor has been occurred; and an alarm management unit that determines parent-child relationships between a parent alarm indicating that the factor for which interlock is applied has been detected, and child alarms each indicating that interlock has been applied to each module, and causes a display unit to display in a grouped manner the parent alarm and the child alarm or alarms having the parent-child relationship.
US09224273B1 Banking system controlled responsive to data bearing records
An apparatus that operates to cause financial transfers responsive to data read from data bearing records, includes at least one processor that is in operative connection with a card reader, a check acceptor, a cash dispenser and a display. The at least one processor causes the machine to operate to read card data from a user card, and to cause a determination to be made that the read card data corresponds to an authorized financial account. The at least one processor is operative to cause data to be read from a check and/or cash to be dispensed, and a financial transfer to or from the account corresponding to the value thereof. Machine instructions are output and user transaction inputs can be received through either a primary or an auxiliary touch screen display.
US09224270B2 Gaming machine and method of allowing players to play gaming machines
A slot game is provided. A display device displays a plurality of reels. During the slot game the reels are spun and an outcome of the game is randomly determined. The outcome of the game is displayed on the display device in a grid comprised of a plurality of symbol positions in a predetermined arrangement. One of the symbols from a corresponding reel are displayed at each symbol position. The spinning reels are visible in the grid during play of the game. The controller awards the player an award as a function of the wager, the outcome of the game and a predetermined paytable. A first one of the reels contains a stack of adjacent, similar symbols. The stack of adjacent similar symbols are displayed with a first single graphic overlay.
US09224268B2 Gaming system with privacy features
A wagering game system includes a peripheral device with a peripheral device display and at least one processor configured to execute at least one application to display information on the peripheral device display. The system also includes a wagering game terminal with a terminal display configured to display a wagering game and a player-accessible interface configured to allow a player to communicatively couple the peripheral device to the wagering game terminal. The at least one application includes a wagering game application relating to the wagering game displayed on the terminal display of the wagering game terminal, and the at least one processor of the peripheral device executes the wagering application to display, on the peripheral device display, wagering game information relating to the wagering game.
US09224261B2 Method and apparatus for conditional payouts in a gaming device
A gaming device incentivizes additional game play by combining payouts with conditional payouts. During game play, players are informed of the conditions, which must be satisfied so as to vest the conditional payouts. Subsequent game play is monitored to see if the player has satisfied the conditions. If the player has satisfied the conditions, then the conditional payout vests. If the condition is not met, then the conditional payout terminates.
US09224260B2 Method of apparatus for communicating information about networked gaming machines to prospective players
On a network of electronic gaming machines, data regarding the performance of the machines or the players of the machines is collected and processed to make predictions of future jackpots and recommendations of games to play. The predictions and recommendations are delivered via at least one virtual persona that communicates with players or potential players via displays in a casino or on a web browser, via smartphone. Players can conduct conversations with the persona using cellular telephone, text messaging, or other types of Internet communications.
US09224259B1 Conflict resolution in asynchronous multiplayer games
A method and system to host a computer-implemented multiplayer game includes functionality to identify and resolve conflicts resulting from asynchronous game play. Client system game state information that changes responsive to in-game actions performed on a client system is intermittently synchronized with authoritative game state information, during which the in-game actions may be validated. Actions that fail a prerequisite check based on the authoritative game state information are analyzed in automated fashion to determine whether they are redundant actions that fail the prerequisite check owing to their having been performed with respect to outdated client system game state information. One or more remedial actions are performed for respective redundant actions, e.g., by allowing the redundant action and modifying the game state, by restoring spent resources to affected players, or by disallowing both the redundant action and an associated preempting action.
US09224258B2 Image reading device
An image reading device having a conveying unit for conveying an irradiated member that has a hologram area in a conveying direction; a first light source for applying light to an irradiated part in the hologram area; and a second light source separated from the first light source along the conveying direction and applying light to an irradiated part in the hologram area when the hologram area is conveyed by a prescribed distance. An irradiation angle at which the irradiated part is irradiated with the light of the first light source is made to be different from an irradiation angle at which the irradiated part is irradiated with the light of the second light source when the hologram part is conveyed by the prescribed distance. Lights reflected by the hologram area are respectively received to detect an electric signal of the hologram area of the irradiated member.
US09224252B1 Method of diagnosing the rationality of a humidity sensor output signal
A method of diagnosing rationality of a humidity sensor output signal determines that the humidity sensor output signal has passed a rationality diagnostic if the output signal is changing sufficiently. If the output signal is not changing sufficiently, the method determines whether it should be changing sufficiently by whether a humidity capacity index determined based on temperature and pressure local to the humidity sensor is changing sufficiently. If the humidity capacity index is changing sufficiently and the humidity sensor output signal is not, the method determines that the humidity sensor output signal has failed a diagnostic check. Upon determining that the humidity sensor output signal has failed the diagnostic check a predetermined number of times, the method determines that the humidity sensor output signal has failed the rationality diagnostic.
US09224251B2 Gateway device
A gateway device includes a request receiving portion, a request storage, a request conversion portion, a request transmitting portion, a response receiving portion, a response storage, a response conversion portion, and a response transmitting portion. When receiving, from a first diagnosis purpose tool, a diagnosis request for performing a malfunction diagnosis to an ECU equipped to a vehicle, the gateway device relays a diagnosis request and a diagnosis response between the first diagnosis purpose tool and the ECU. When receiving, from a second diagnosis purpose tool, a diagnosis request for performing a malfunction diagnosis to the ECU equipped to the vehicle, the gateway device relays a diagnosis request and a diagnosis response between the second diagnosis purpose tool and the ECU after converting identification informations of the diagnosis request and the diagnosis response.
US09224247B2 Three-dimensional object processing device, three-dimensional object processing method, and information storage medium
Provided is a three-dimensional object processing device which is configured to: project a three-dimensional object that is disposed in a virtual three-dimensional space onto each of a plurality of projection planes that are set in the virtual three-dimensional space to obtain projected objects; deform each of the projected objects in a corresponding one of the plurality of projection planes; and deform the three-dimensional object in the virtual three-dimensional space based on each of the projected objects, which have been deformed in the corresponding one of the plurality of projection planes.
US09224246B2 Method and apparatus for processing media file for augmented reality service
A method and an apparatus for processing a media file for an augmented reality service are provided. The method includes analyzing at least one media file including a marker track and a virtual object track to be used for providing the augmented reality service; generating image data needed for reproducing an image by extracting video data and/or audio data included in the media file; generating virtual object data for displaying a virtual object by extracting virtual object information included in the media file; and synthesizing the image data and the virtual object data based on the marker track to structure a final image and reproducing the final image on a screen.
US09224242B2 Automated three dimensional mapping method
An automated three dimensional mapping method estimating three dimensional models taking advantage of a plurality of images. Positions and attitudes for at least one camera are recorded when images are taken. The at least one camera is geometrically calibrated to indicate the direction of each pixel of an image. A stereo disparity is calculated for a plurality of image pairs covering a same scene position setting a disparity and a certainty measure estimate for each stereo disparity. The different stereo disparity estimates are weighted together to form a 3D model. The stereo disparity estimates are reweighted automatically and adaptively based on the estimated 3D model.
US09224240B2 Depth-based information layering in medical diagnostic ultrasound
Information layering is provided in medical imaging. Two or more types of information are provided in one image. A three-dimensional surface is formed for two-dimensional scanning and/or imaging. The depth or third dimension is mapped to one type of data. Variation in values of this type of data causes variation in the surface away from flat. Data of another type is mapped to the surface, such that each location having a color or gray scale value based on the other type and a depth based on the one type. The surface is rendered using three-dimensional rendering to show the depth information even though both types of data represent a scanned plane. Stereoscopic viewing may allow the user to better visualize the depth information.
US09224238B2 Seamless texturing of 3D meshes of objects from multiple views
Methods and systems for texturing of three-dimensional (3D) object data models are provided. An example method may include receiving information indicating a geometry of an object receiving a plurality of images of the object. The method may also include assigning images of the plurality of images that have a resolution above a threshold to a plurality of polygons that approximate the geometric surface of the object. The method may also include determining adjacent polygons that are assigned to different images of the plurality of images so as to identify boundaries of images and minimizing such boundaries. The method may also include determining a mismatch factor for boundaries of the modified boundaries of images and reassigning images in boundaries having a mismatch factor above a threshold so as to reduce a gradient variation between the images in the modified boundaries.
US09224237B2 Simulating three-dimensional views using planes of content
Approaches enable image content (e.g., still or video content) to be displayed in such a way that the image content will appear, to a viewer, to include portions with different locations in physical space, with the relative positioning of those portions being determined at least in part upon a current relative position and/or orientation of the viewer with respect to the device, as well as changes in that relative position and/or orientation. For example, image content can be grouped or otherwise contained or assigned to different planes, levels, or other such groupings of content. The planes of content can enable image content included within those planes to be displayed to provide a viewer with an appearance or view of the content that appears to be positioned and/or displayed in 3D space. As that viewing angle changes, the content can be re-rendered or otherwise updated to display the image content from a perspective that reflects the change in viewing angle.
US09224228B1 Data presentation
A method, computer program product, and computing system for receiving an indication of a user selecting a selected portion of a piece of content for review on a display screen. A determination is made concerning whether the piece of content will fit within the display screen. If the piece of content will not fit within the display screen: a header portion of the piece of content is rendered within an upper portion of the display screen, and the selected portion of the piece of content is rendered within a main portion of the display screen.
US09224223B2 Visual analytics using multivariate concentric rings with a visual start time mechanism
Visual analytics using multivariate concentric rings with a visual start time mechanism includes displaying an interactive graph where the interactive graph has multiple concentric rings that have multiple cells that represent sequential time periods. The concentric rings form a time unit that starts at an origin and ends at a time unit end and also has a pre-nonorigin starting section and a post-nonorigin starting section. A color is displayed in the cells to represent measurements associated with time stamps corresponding to cells in the post-nonorigin starting section. Further, a background color is displayed in cells of the pre-nonorigin starting section. The cells in the pre-nonorigin starting section are reused by displaying a color to represent metrics associated with time stamps belonging to a subsequent time unit.
US09224221B2 Arranged display of data associated with a set of time periods
In an embodiment, a method of providing an arranged display of data associated with a set of time periods is presented. In this method, values of a first data type are accessed, the values being observed during each of multiple time periods. An order for the time periods is determined based on the values of the first data type. A selectable region for each of the time periods is displayed, the regions being arranged according to the order. In response to a user selection of one of the selectable regions, a value of a second data type is displayed, the value of the second data type being observed during the time period of the selected one of the selectable regions.
US09224214B2 Apparatus and method for encoding/decoding images for intra-prediction
A method of decoding an image includes the steps of restoring a residual value by performing inverse quantization and inverse transform on the residual value by entropy decoding a received bit stream, generating a prediction unit by performing intra prediction selectively using one of a plurality of prediction modes on a prediction unit split by conducting at least one of asymmetric partitioning and geometrical partitioning, and restoring an image by adding the residual value to the prediction unit. It may be possible to enhance encoding efficiency of high-resolution images having a resolution of HD or higher by performing intra prediction on the asymmetric partitioning and/or geometrical partitioning.
US09224213B2 Systems and methods for context based image compression
Techniques for compressing images based on context are provided. A first image and a second image may be identified for display on a client device. One or more contexts of the first image may be identified. One or more contexts of the second image may be identified. A first image quality for the first image may be determined based on the one or more contexts of the first image. A second image quality for the second image may be determined based on the one or more contexts of the second image. The first image may be compressed at the first image quality and the second image at the second image quality. The compressed first image and the compressed second image may be transmitted to the client device.
US09224208B2 Image-based surface tracking
A method of image-tracking by using an image capturing device (12). The method comprises: performing an image-capture of a scene (54) by using an image capturing device; and tracking movement (62) of the image capturing device (12) by analyzing a set of images by using an image processing algorithm (64).
US09224206B1 3D model updates using crowdsourced video
An exemplary method includes prompting a user to capture video data at a location. The location is associated with navigation directions for the user. Information representing visual orientation and positioning information associated with the captured video data is received by one or more computing devices, and a stored data model representing a 3D geometry depicting objects associated with the location is accessed. Between corresponding images from the captured video data and projections of the 3D geometry, one or more candidate change regions are detected. Each candidate change region indicates an area of visual difference between the captured video data and projections. When it is detected that a count of the one or more candidate change regions is below a threshold, the stored model data is updated with at least part of the captured video data based on the visual orientation and positioning information associated with the captured video data.
US09224202B2 Device and method for extracting information from characteristic signals
A device and a method for extracting information from detected characteristic signals are provided. A data stream (26) derivable from electromagnetic radiation (20) emitted or reflected by an object (10) is received. The data stream (26) includes a continuous or discrete characteristic signal (68) including physiological information (30) indicative of desired object motion to be detected and utilized so as to extract at least one at least partially periodic vital signal of interest. A plurality of characteristic index elements (60) can be derived from the data stream (26) through a dimensional reduction (66). The plurality of characteristic index elements (60) includes a directional motion component (70) associated with a disturbance-reduced index element (40) having a determined orientation substantially aligned with a reference motion direction (41) indicative of the desired object motion. Consequently, dimensional reduced data can be utilized for detecting the vital signal of interest.
US09224201B2 Method for the reduction of artifacts in image data sets and computing facility
A method for the reduction of artifacts based on an unequal representation of the same material classes in various locations, in particular of cupping artifacts, in a three-dimensional image data set, reconstructed from two-dimensional x-ray projection images is provided. An image datum, describing an attenuation value, is allocated respectively to a voxel, wherein at least two material class regions are located in a post-processing step, which receive, in particular, image data, which is homogeneously distributed and lies in an expected material class interval of the attenuation values, and, considering at least one characteristic of the material class regions, calculates a smooth homogenization function, which is to be applied to the image data of the entire image data set and is applied to the image data of the image data set.
US09224199B2 Pathological diagnosis assisting apparatus, pathological diagnosis assisting method and non-transitory computer readable medium storing pathological diagnosis assisting program
A pathological diagnosis assisting apparatus according to the present invention includes an image classification unit configured to classify at least one type of a specific substance, a tissue area extraction unit configured to extract a tissue area in the image of the sample, an image dividing unit configured to divide the tissue area into a plurality of sections, a specific substance occupancy rate calculation unit configured to, calculate an occupancy rate of the at least one type of the specific substance in each of the plurality of sections, and a diagnosis assisting information providing unit configured to determine an intermediate value of the occupancy rate of the specific substance from the calculated occupancy rates of the plurality of sections and to provide the intermediate value as the diagnosis assisting information.
US09224193B2 Focus stacking image processing apparatus, imaging system, and image processing system
An image processing apparatus comprises: an image acquisition unit for acquiring a plurality of original images acquired by imaging a specimen including a structure in various focal positions using a microscope apparatus; an image generation unit for generating, on the basis of the plurality of original images, a first image on which blurring of an image of the structure has been reduced in comparison with the original images; and an analysis unit for obtaining information relating to the structure included in the first image by applying image analysis processing to the first image. The image generation unit selects a part of the original images having focal positions included within a smaller depth range than a thickness of the specimen from the plurality of original images obtained from the specimen, and generates the first image using the selected original images.
US09224192B2 Device and method for the processing of remote sensing data
The processing of remote sensing data, wherein first image data are processed with the use of second digital image data which, compared with the first image data, have a finer local resolution. The local resolution of the first digital image data is refined temporarily. The local resolution and every pixel of the temporarily refined first image data corresponds to the local resolution and each pixel of the second digital image data. Determining a weighting value for the pixels of the second digital image data which corresponds to a weighting of a image value of the pixel in the ratio of the image value of the pixel to image values of surrounding pixels. A smoothing of the local plot of the image values in the area of the pixel and its environment is implemented such that the weighting value of larger values is based on additional smoothing of image values.
US09224191B2 Masking tool
A system for controlling effects performed on an image includes a digital camera having a display that displays the image. Masking tools position graphical representations on the display to define a portion of the image that is altered when the effects are subsequently applied to the image. The several masking tools may be combined to form a single masking tool.
US09224188B2 Image processing device, method and program
A three-dimensional moving image and an ultrasonic moving image showing a body part making periodic motion are obtained, and, from the moving images, a characteristic part having a shape that changes with the periodic motion is extracted. Phases of the periodic motion captured in the moving images are obtained. For at least one of the moving images, the phases are obtained based on the shape of the extracted characteristic part. For each phase, the positions of the characteristic part shown in the three-dimensional moving image and the ultrasonic moving image are associated with each other based on the extracted characteristic part and the obtained phases. Comparison images are generated by aligning, for each phase, the positions of the characteristic part shown in the three-dimensional moving image and the ultrasonic moving image with each other based on the associated positions of the characteristic part and the phases, and displayed.
US09224185B2 Fast storage method for image data, valuable-file identifying method and identifying device thereof
Disclosed are a valuable-file identifying method and an identifying device thereof. The identifying method and the identifying device store image data of a valuable file using a fast storage method for image data. The fast storage method for image data comprises: compulsively converting collected single-byte image data into long-integer image data; using N data masks which correspond to each other through a “bitwise AND” operation to extract the long-integer image data in such a manner that N points are extracted from M*N points in each line and one point is extracted from L points in each column, where N is an integer greater than or equal to 2, L and M are all integers greater than or equal to 1; and integrating the data extracted respectively by N data masks through a “bitwise OR” operation to obtain coded image data and store same. In conclusion, the present invention converts single-byte image data into long-integer image data, and extracts multipoint data at one time using a plurality of data masks which correspond to each other, reducing the number of operations, and achieving fast, compressed storage of images.
US09224173B2 Ordering activities and notifications within a collaboration platform
A method, an apparatus and computer readable storage media facilitate establishing a communication session between a computing device of a user and at least one other computing device within a collaboration platform (system) to facilitate one or more communications between the user and other users associated with the platform. Updates are received to an account of the user that is accessible via the user's computing device, wherein the updates provide information relating to posted activities, notifications or other content and individuals associated with the posted activities, the posted activities, notifications or other content being available at one or more computing devices associated with the platform. The updates are automatically organized in at least one order based upon a profile of the user that is associated with the user's account. The computing device of the user provides a listing of the updates based upon an order determined by the organizing operation.
US09224167B2 System and method for aiding user in online searching and purchasing of multiple items
A system and method for searching for and/or purchasing multiple items on the Internet is provided. The system identifies a plurality of purchasing alternatives based on predetermined criteria and allows the consumer to select from among the purchasing alternatives to purchase the desired items.
US09224165B2 Deploying multiple E-commerce systems in a single computing platform
A method, system, architecture and apparatus for deploying multiple e-commerce systems in a single computing platform. In accordance with the present invention, an e-commerce systems architecture can include an instantiable owning business logic component derived from an abstract business definition and one or more instantiable business element components configured for aggregation under the control of a business facility instance. The business facility instance can include a coupling to an instance of the owning business logic component. Finally, the architecture can include an instantiable partner business component derived from the abstract business definition. In particular, the instantiable partner business component can include a configuration for limited access to selected ones of the instantiable business element components aggregated under the control of the business facility instance.
US09224163B2 Incremental computation of billing percentile values in a cloud based application acceleration as a service environment
Disclosed is a method of incremental computation of billing percentile values in a cloud based application acceleration as a service environment. In one aspect, a method includes sampling a usage data of a network entity of an application acceleration as a service provider in intervals of five minutes using a processor and a memory. A 95th percentile value is automatically calculated based on a next value in the billing cycle after the top 5% of samples in the billing cycle. The 95th percentile value of each of a plurality of billable units for each of billing measurements for a large scale data associated with the network entity is incrementally computed by computing the 95th percentile value upon a newest set of data arrived to the network entity in each five minute interval. A billing amount is determined based on an incremental computation.
US09224159B2 Distributed content exchange and presentation system
An Internet-oriented advertising exchange controller presents website content in a plurality of frames as well as support search criteria and other flexible forms of inventory formatting and delivery. Applications include Internet protocol request coordination or relay, cooperative frame based or interstitial advertising, and support for a local search or dataless metasearch system. The controller operates in a cookieless environment, has logic to protect advertiser's investment from AutoSurf equivalent systems, and protects against other inappropriate stimuli including denial of service or IP blast attacks.As such, an advertiser's credits are affected only by human stimuli. Communication with and among exchange controllers for sharing or delivering information about inventory occurs by a number of protocols with optional encryption. The controller provides a foundation for a robust, advertiser protective, web based advertising and network search system with economic support by use of unstoppable framesets, and ultimately frame-based advertising and presentation methods.
US09224156B2 Personalizing video content for Internet video streaming
A video preparation system is described. The system includes an event detector, a viewer identification, a selector, a video synthesis module, and a communications module. The event detector may be configured to detect an event associated with a main video content. The viewer identification module may be configured to determine an identification of a viewer associated with the event and to obtain information about the viewer. The selector may be configured to select additional video content that could be presented with the main video content. The video synthesis module may be configured to modify, in real time, the video content to produce a resulting content based on the information about the viewer. The communications module may be configured to provide the resulting content to a play-out server, the resulting content suitable for streaming via the Internet to a client computer system associated with the viewer.
US09224153B2 Recently viewed items display area
A most recently viewed item is displayed in a display element, which is positioned next to at least one other element on a web page. The display element is expanded so that the element covers the at least one other element on the web page and so that at least one other recently viewed item appears in the display element. The display element is contracted so that only the most recently viewed item appears in the display element and so that the at least one other element on the web page is visible.
US09224151B2 Presenting advertisements based on web-page interaction
Embodiments of the invention provide a method, system, and media for presenting advertisements (or other information) based on user interaction with a web page. One embodiment of the method includes determining that programmatic code that describes the web page is to be dynamically modified before it is to be presented on a display device. The method further includes identifying remotely stored supplemental information that is associated with the web page. The supplemental information includes a listing of words on the web page that are to be considered key words which key words are to be associated with descriptive terms that relate to the key words. The descriptive terms might even be generated after a rendering of the web page as well as before. Additional supplemental information might include a listing of triggering events that are associated with different objects of the web page (such as key words, text boxes, etc.) such that if an object is interacted with in a predetermined way, then some action is to follow. The method additionally includes modifying the programmatic code of the web page according to the supplemental information, observing a triggering event, gathering descriptive words associated with the occurrence of the event trigger, communicating the appropriate descriptive words so as to return fresh advertising content, and without obscuring an initial content of the web page, presenting information based on the advertising content.
US09224149B2 External referencing by portable program modules
A computer-implemented method includes storing at a computer server indicative data for a first web-accessible document that is not associated with the computer server, receiving a request from a program module in a container document associated with the web-accessible document, and providing, in response to the request, information related to the indicative data.
US09224148B2 System to manage automated prize value accumulation and distribution
A system to manage prize accumulation and distribution includes an interface to receive publication data from a publishing user. The publication data is to be published by the computer system. The interface further receives a prize contribution value, at the computer system and from the publishing user, in exchange for the presentation of an opportunity to win a cumulative prize. The opportunity to win the cumulative prize is to be presented by the computer system in conjunction with the publication of the publication data. A publication module is to electronically publish the publication data on behalf of the publishing user, and is to electronically present the opportunity to win the cumulative prize in conjunction with the publication of the publication data. A prize processing module is to calculate a value of the cumulative prize, based on a cumulative contribution of prize contribution values received from a plurality of publishing users.
US09224137B1 System for an automated dispensing and retrieval kiosk for recorded media
A system for an automated dispensing and retrieval kiosk for recorded media includes a kiosk having a plurality of vertical racks arranged in a circular formation, each vertical rack configured for storing a plurality of recorded media. A customer interface allows a customer to select or return a recorded media. A robotic element delivers the selected recorded media from the vertical racks to a media output, at the customer interface. The element also delivers a returned recorded media from a media input at the customer interface to the vertical racks. A computer controls operation of the kiosk, and an internet interface connects the kiosk to the Internet. The kiosk may communicate with a central server and/or other kiosks of a group, to locate a requested recorded media within a kiosk of the group. Once located within the group, the requested media may be reserved for customer pick-up.
US09224136B1 Systems and methods for remote deposit of checks
Remote deposit of checks can be facilitated by a financial institution. A customer's general purpose computer and image capture device may be leveraged to capture an image of a check and deliver the image to financial institution electronics. Additional data for the transaction may be collected as necessary. The transaction can be automatically accomplished utilizing the images and data thus acquired.
US09224131B2 System and method for facilitating collaboration in a shared email repository
The present invention facilitates collaboration on electronic messages. Methods are provided in which an electronic message is stored and presented to users. A user is allowed to perform an action on the electronic message and the action is recorded. Additionally, the record is associated with the electronic message. The users are notified of the action.
US09224128B2 Energy information exchange
Disclosed are various embodiments for facilitating data synchronization in a utility computing environment. A data synchronization application can monitor source systems in such an environment and generate periodic change sets that correspond to data that has changed in the various source systems. Destination systems can subscribe to change sets and receive the appropriate change sets by monitoring flags that the data synchronization application can set. Various classes of change sets that correspond to data within a particular change set can also be generated.
US09224123B2 Electric product and method of controlling the same
An electric product includes a recognition device to obtain an image of a recognition object, a control unit to recognize item information from the image obtained by the recognition device and compare the recognized item information with information stored in a memory unit, and a display unit to display a result of the comparison, wherein the control unit displays, on the display unit, category information corresponding to the recognized item information when the recognized item information matches the information stored in the memory unit.
US09224122B2 Outdoor device management system
An outdoor device management system, in installations of at least one outdoor device such as a road lamp, a street trash can, an electrical box, a monitor, an electric meter or a sprinkler, uses a wireless sensor with a global positioning system (GPS) chip to sense an identification element of the outdoor device, capture a unique identifier address (UID) and generate sensed data containing coordinate data and then transmits the sensed data to a terminal device, labeling the outdoor device on a corresponding position in a map, and transmitting an operation instruction to trigger and control operations of the corresponding outdoor device. The outdoor device includes a detection element for detecting and reporting current operating status for the terminal device, using the map to plan an optimal path to expedite going to maintain the outdoor device when abnormality occurs so as to improve the convenience and accuracy of management.
US09224120B2 Computing systems and methods for electronically indicating the acceptability of a product
In part, the invention relates to computing systems and methods for electronically indicating the acceptability of a product. An image capture and communication device may analyze a product label that includes one or more monitors, authentication elements, and identification elements. The image capture and communication device may determine the type and features of the monitors, authentication elements, and identification elements. The image capture and communication device may transmit data based on the type and features to a host server, which may transmit data associated with the host product to the image capture and communication device in, inter alia, the form of an acceptability report.
US09224119B2 Architecting and defining extensible methods and processes to build hybrid solutions
A method and system defines a mechanism to architect and define extensible methods and processes to build hybrid solutions. Solution templates provide a mechanism to architect and define the software development method in an extensible way and it enables the method architecture to be flexible to assemble method content and process elements only for those solution types that are necessary for a given solution. Solution templates keep the common base method lightweight and reusable and control the proliferation of software development processes necessary to build hybrid solutions by defining the solution templates for each of the solution types as pluggable extensions or add-ons to the base method that can be assembled on demand based on project needs.
US09224089B2 Method and apparatus for adaptive bit-allocation in neural systems
Certain aspects of the present disclosure support a technique for adaptive bit-allocation in neural systems. Bit-allocation for neural signals and parameters in a neural network described in the present disclosure may comprise for a plurality of synapse circuits in the neural simulator network, dynamically allocating a number of bits to the neural circuit signals based on at least one characteristic of one or more neural potential in the neural simulator network; and for the plurality of synapse circuits in the neural simulator network, dynamically allocating a number of bits to at least one neural processing parameter of the synapse circuit based on at least one condition of the neural simulator network.
US09224084B2 Smart device programmable electronic luggage tag
A programmable luggage tag has a rigid, flat case containing a bistable visual display assembly, a BLE, NFC or other comparable short range, radio receiver and a processor configured to convert short range radio image control signals detected by the receiver into commands to modify the image on the display. A manual input switch on the case activates circuitry with a battery in the case for a time sufficient to receive the control signals and modify the image. A multilayer plastic, resiliently flexible thin flap is fixed with the case extending away from the case generally in a common plane with the case. The flap includes an encapsulated passive RFID transponder and mounting holes distal to the housing permitting the tag to be resiliently secured to the handle of a piece of luggage.
US09224083B2 Multi-functional credit card type portable electronic device
An embodiment includes a credit card device capable of generating a programmed magnetic field of alternating polarity based on a speed of a card swipe, and methods for constructing the device for the purpose of emulating a standard credit card. An apparatus is described to allow said device to emulate behavior of a credit card when used in electronic credit card readers. Additionally methods are described to allow user control of said device for the purpose of authorizing or controlling use of said device in the application of credit, debit and cash transactions, including cryptocurrency and card-to-card transactions. Methods are also described for generating a limited-duration credit card number when performing a transaction for the purpose of creating a limited-use credit card number, which is limited in scope of use to a predetermined number of authorized transactions. Furthermore said device may interact with other similar devices in proximity for the purpose of funds or credit/debit transfers.
US09224079B2 Image processing apparatus configured to perform pixel dithering based on dithering table and pass information
An image processing apparatus includes a dithering unit that retains a dithering table; a gray-scale value input unit that inputs, to the dithering unit, a gray-scale value of each pixel constituting image data of a predetermined color; and a pass information input unit that inputs, to the dithering unit, pass information indicating whether printing is a first pass to perform printing on a recording medium yet to be printed or a second pass to perform reprinting on the same surface of the recording medium already subjected to printing. The dithering unit performs dithering on each pixel based on the dithering table, the gray-scale value, and the pass information.
US09224077B2 Control apparatus, image forming apparatus, image forming system, control method, and computer-readable medium
A control apparatus includes an operation section, a correction section, and a controller. The operation section performs an operation for forming an image having a predetermined density. The correction section corrects a value of the density. In a case where an image formation condition is switched from a first image formation condition to a second image formation condition, when image formation under the second image formation condition is to be performed on at least a predetermined number of recording media or to be performed for at least a predetermined period, the controller performs control so that the correction section executes a process of correcting the value. When the image formation is not to be performed on at least the predetermined number of recording media or not to be performed for at least the predetermined period, the controller performs control so that the correction section does not execute the process.
US09224074B2 System and method for tuning device link profiles for color printing
A system and method according to which device link profiles (DLPs) for color printing are tuned or otherwise adjusted.
US09224073B2 Data processor saving data indicating progress status of printing process retrievable by client
A data processor and a host device are bi-directionally communicably connected to each other. The data processor includes a process-executing unit and a progress-status-saving unit. The process-executing unit executes a prescribed process when a process-requested file is written in a prescribed folder. The progress-status-saving unit saves progress status data indicating a progress status of the prescribed process so that the progress status data is retrievable by the host device.
US09224069B2 Program, method and apparatus for accumulating images that have associated text information
A computer-readable recording medium storing a program for causing a computer to execute an image accumulating procedure, the procedure includes: specifying a second image similar to a first image that is associated with text information; displaying the second image in an identifiable manner, and the text information on a display device; and storing the text information associated with image information that is related to the second image, based on instruction information that instructs a use of the text information with respect to the second image.
US09224067B1 System and methods for digital artifact genetic modeling and forensic analysis
Described is a cyber security system for digital artifact genetic modeling and forensic analysis. The system identifies the provenance (origin) of a digital artifact by first receiving a plurality of digital artifacts, each digital artifact possessing features. Raw features are extracted from the digital artifacts. The raw features are classified into descriptive genotype-phonotype structures. Finally, lineage, heredity, and provenance of the digital artifacts are determined based on mapping of the genotype-phenotype structures.
US09224064B2 Electronic device, electronic device operating method, and computer readable recording medium recording the method
A method for operating an electronic device is provided. The method includes detecting a plurality of feature points in at least a partial region in a digital image, selecting at least two feature points from the detected plurality of feature points, determining whether there is a probability that an object existing in at least one of a plurality of reference images exists in the digital image, by using at least a portion of the at least two feature points, and determining a pose of the object after the probability that the object exists in the digital image is determined.
US09224055B2 Exterior environment recognition device
An exterior environment recognition device includes: a specific object detection unit to detect a specific object on the basis of a color image; a data retaining unit to associate and retain the specific object and a luminance range indicating the color of the specific object; and a transparency reduction determination unit to compare a luminance of the color image of the specific object and a luminance range associated with the specific object, and to determine a reduction in transparency of a transparent body located in an image-capturing direction of the onboard camera.
US09224054B2 Machine vision based obstacle avoidance system
Machine vision based obstacle avoidance system is provided. The system utilizes a CCD camera to capture an image. A normalized image and dynamic masking is used in object detection.
US09224053B1 Combining multiple estimates of an environment into a consolidated estimate for an autonomous vehicle
A vehicle is provided that may combine multiple estimates of an environment into a consolidated estimate. The vehicle may receive first data indicative of the region of interest in an environment from a sensor of the vehicle. The first data may include a first accuracy value and a first estimate of the region of interest. The vehicle may also receive second data indicative of the region of interest in the environment, and the second data may include a second accuracy value and a second estimate of the region of interest. Based on the first data and the second data, the vehicle may combine the first estimate of the region of interest and the second estimate of the region of interest.
US09224048B2 Scene-based people metering for audience measurement
Scene-based people metering for audience measurement is disclosed. Example methods disclosed herein include grouping successive image frames depicting a location of a media presentation to form a sequence of scenes, respective scenes including respective groups of the image frames. Such example methods also include grouping matching scenes into respective scene clusters having respective sizes, the scene clusters being represented by respective key frames. Such example methods further include assigning respective ranks to the key frames of the respective scene clusters, the respective ranks being determined based on the respective sizes of the scene clusters. Such example methods additionally include processing the key frames in accordance with the respective ranks to monitor an audience of the media presentation.
US09224044B1 Method and system for video zone monitoring
A computing system receives a definition of a zone of interest within the scene depicted in the video steam. In response to receiving the definition of the zone of interest, the computing system determines, for each motion event detected in the video stream, whether a respective event mask of the motion event overlaps with the zone of interest by at least a predetermined overlap factor; and identifying the motion event as an event of interest associated with the zone of interest in accordance with a determination that the respective event mask of the motion event overlaps with the zone of interest by at least the predetermined overlap factor.
US09224041B2 Table of contents extraction based on textual similarity and formal aspects
An initial organizational table for a document is determined based on textual similarity between entries of the organizational table and target text fragments and not taking into account text formatting. A classifier is trained to identify text fragment pairs consisting of entries of the organizational table and corresponding target text fragments based at least in part on text formatting features. The training employs a training set of examples annotated based on the initial organizational table. The initial organizational table is updated using the trained classifier.
US09224040B2 Method for object recognition and describing structure of graphical objects
The invention involves a method for processing of machine-readable forms or documents of non-fixed format. The method makes use of, for example, a structural description of characteristics of document elements, a description of a logical structure of the document, and methods of searching for document elements by using the structural description. A structural description of the spatial and parametric characteristics of document elements and the logical connections between elements may include a hierarchical logical structure of the elements, specification of an algorithm of determining the search constraints, specification of characteristics of every searched element, and specification of a set of parameters for a compound element identified on the basis of the aggregate of its components. The method of describing the logical structure of a document and methods of searching for elements of a document may be based on the use of the structural description.
US09224036B2 Generating static scenes
Implementations generally relate to generating static scenes. In some implementations, a method includes collecting photos associated with objects in at least one location. The method also includes collecting attention information associated with one or more of the objects. The method also includes generating an attention map based on the attention information. The method also includes generating a model of the at least one location based on the photos and the attention map.
US09224034B2 Face searching and detection in a digital image acquisition device
A method of detecting a face in an image includes performing face detection within a first window of the image at a first location. A confidence level is obtained from the face detection indicating a probability of the image including a face at or in the vicinity of the first location. Face detection is then performed within a second window at a second location, wherein the second location is determined based on the confidence level.
US09224031B2 Compact dark field light source and dark field image analysis at low magnification
The invention relates to image analysis of dark field images obtained at low magnification below 10:1. Image analysis of dark field images obtained at low magnification can be combined with analyzes of images obtained in respect of the same section of a sample and same magnification but with other techniques such as fluorescent microscopy. The system and method can be used e.g. for particle counting, particle size measurement, particle size distribution, morphology measurement, where the particles can be cells and/or cell parts. The invention also relates to a compact dark field light source unit, a system or apparatus including a microscope which by itself is compact and comprises the mentioned dark field light source unit.
US09224021B2 Point of entry deactivation
A system and method for automatically deactivating a security tag upon entry into business establishment to prevent tag pollution. The system and method involve positioning a security tag deactivator at an entrance of a business establishment and emitting an EM field sufficient to deactivate any security tag that enters into the business establishment.
US09224017B2 Use of multiplexed RFID controller to verify connections in automated systems
A system and method for using multiplexed RFID transceivers and RFID tags to verify connections and communicate the connection status to a host system is provided. RFID tags that are programmed with connection specific indicia are attached at or in proximity to various connections in a pharmaceutical or biotech processing system and interrogated by remote antennas driven by a multiplexed RFID transceiver. This enables a user to verify the status of each connection and communicate the connection status to a host system.
US09224009B1 System and method for applying privacy settings to a plurality of applications
A system and method for adjusting privacy protection for a user in a plurality of applications is disclosed. A privacy protection request is sent to a user device. In one embodiment, the request is displayed on user device in the form of a pop-up window. In another embodiment, the request is displayed in a privacy settings area. The privacy protection request includes a plurality of protection levels. Once a protection level is selected the protection level is sent back and received by the system. Privacy settings are adjusted according to the selected privacy protection level based on information stored in a master template. In some embodiments, the privacy protection level is translated to associated privacy settings. Once the privacy settings have been adjusted, the privacy settings are applied to a plurality of online applications associated with the user based on the privacy protection level selected.
US09224007B2 Search engine with privacy protection
A search engine system with privacy protection, including a data indexer configured to create an index of data, a search engine configured to search the index of the data in response to a query, and create a search result set including excerpts from the data, and a privacy protector configured to identify at least one data entity within at least one excerpt of the search result set that meets at least one predefined entity extraction criterion, redact the search result set by removing the data entity from the excerpt, and present the redacted search result set on a computer output device.
US09224001B2 Access control list for applications on mobile devices during a remote control session
A method of implementing access restrictions on mobile devices during a remote control session Network based restrictions; User controlled restrictions, or User controlled access list restrictions. A remote support technician connects to a mobile device to perform remote access to the mobile device. As part of the remote control session a policy can be pushed to the device that would have a list of applications that would need to be allowed by the user to be shared with remote technician. Alternatively no policy is pushed and the user must allow remote support technician access.
US09223999B2 Management of Digital information
According to an embodiment of the present invention, a system provides secure access to a digital item and includes at least one processor. The system partitions the digital item into a plurality of segments each containing a portion of the digital item and associated with a corresponding sensitivity level. The portion of the digital item within each segment is encrypted in accordance with the corresponding sensitivity level, and the plurality of segments are randomly stored among a plurality of storage units. Embodiments of the present invention further include a method and computer program product for providing secure access to a digital item in substantially the same manner described above.
US09223995B1 Semantic obfuscation of data in real time
Systems and methods for automatically maintaining the anonymity or privacy of a stream of data as it is transmitted over a network or provided for other use, by receiving a data stream in real-time from an original source and identifying a data subset of interest within the original data stream. The data subset of interest is segregated from the data stream for either obfuscating at least a portion of the data subset in accordance with certain criteria or encrypting it. The data subset is obfuscated or encrypted for purpose of transmission over the network or for testing and reunited at a target source with the remainder of the data stream.
US09223993B2 Method for mandatory access control of processing in hardware cores
A method for providing hardware mandatory access control (MAC) may include coupling an input filter to a hardware core. The input filter may receive one or more labeled objects and may qualify the labeled objects based on a first label associated with each of the labeled objects. The input filter may strip the first label from each of the labeled objects to provide one or more input objects. The hardware core may receive the one or more input objects and may provide one or more output objects. An output filter may be coupled to the hardware core. The output filter may receive the one or more output objects and may associate to each of the one or more output objects a second label. Operations of the input filter and the output filter may be coordinated by a label manager.
US09223991B2 Systems, methods, and computer medium to securely transfer large volumes of data between physically isolated networks having different levels of network protection
Embodiments of computer-implemented methods, systems, and non-transitory computer-readable medium having one or more computer programs stored therein are provided to transfer contents of transactional database records associated with a data historian between two or more networks configured to have different levels of network protection. Generated data barcodes can be decoded to produce contents of transactional database records to be transmitted between two or more networks having different levels of network security protection. Decoded contents of the transactional database records can then be securely communicated back to the sender for comparison by generating validation barcodes to be decoded by the sender. Generated verification barcodes can then be decoded to produce verification data. Verification data can confirm success of the transmission of contents of transactional database records encoded in the data barcodes. Decoded contents of transactional database records can then be stored responsive to an indication of successful transmission.
US09223983B2 Security co-processor boot performance
Technologies for improving platform initialization on a computing device include beginning initialization of a platform of the computing device using a basic input/output system (BIOS) of the computing device. A security co-processor driver module adds a security co-processor command to a command list when a security processor command is received from the BIOS module. The computing device establishes a periodic interrupt of the initialization of the platform to query the security co-processor regarding the availability of a response to a previously submitted security co-processor command, forward any responses received by the security co-processor driver module to the BIOS module, and submit the next security co-processor command in the command list to the security co-processor.
US09223980B1 Systems and methods for indicating malware statuses of electronic messages
The disclosed computer-implemented method for indicating malware statuses of electronic messages may include (1) determining that a user is attempting to distribute an electronic message, (2) scanning the electronic message to determine a malware status of the electronic message, (3) before distributing the electronic message, including, with the electronic message, an indication of the malware status of the electronic message, and (4) after including the indication of the malware status with the electronic message, distributing the electronic message to a recipient system, where the recipient system uses the malware status included with the electronic message to determine the malware status of the electronic message. Various other methods, systems, and computer-readable media are also disclosed.
US09223977B2 Detection of DOM-based cross-site scripting vulnerabilities
Testing a Web-based application for security vulnerabilities. At least one client request including a payload having a unique identifier can be communicated to the Web-based application. Response HTML and an associated Document Object Model (DOM) object can be received from the Web-based application. Content corresponding to the payload can be identified in the DOM object via the unique identifier. A section of the DOM object including the payload can be identified as un-trusted.
US09223975B2 Data identification system
Disclosed is a method of operating a data storage system. The method comprises identifying changed segments of a primary storage volume, receiving a data request for a plurality of data items in a secondary storage volume, identifying changed data items of the plurality of data items in the secondary storage volume based on a correspondence between the plurality of data items in the secondary storage volume and the changed segments of the primary storage volume, and transferring the changed data items in response to the data request.
US09223974B2 Anti-viral compiler
In one general embodiment, a computer program product for compiling code includes a computer readable storage medium having computer readable code stored/encoded thereon. The computer readable code is readable/executable by a processor to: receive computer readable code to compile, the code including one or more functions, each function including one or more call functions; and build a stack frame for one of the call functions in the code. The stack frame includes: a return address sequence, logic configured to define local variables, logic configured to define a first guard variable and a second guard variable, logic configured to compare the first guard variable to the second guard variable, logic configured to execute the return address sequence when the first and second guard variables match, and logic configured to abort prior to executing the return address sequence when the first and second guard variables do not match.
US09223972B1 Dynamically remote tuning of a malware content detection system
According to one embodiment, an apparatus comprises a processor and memory. Communicatively coupled to the processor, the memory comprises one or more detection modules each being software that is configurable to enable, disable or modify capabilities for that corresponding detection module. A first detection module the detection modules, when executed by the processor, conducts a first capability including an analysis of a received object to determine if the received object is associated with a malicious attack. The analysis may be altered upon receipt of a configuration file that is substantially lesser in size than the software forming the first detection module and includes information to alter one or more rules controlling the first capability.
US09223969B2 Anti-malware system and operating method thereof
Provided are an anti-malware system, and an operating method thereof. The anti-malware system matches an filtering operation on first target data to be filtered with a rule pattern, performs a filtering operation on the first target data according to a matching result, matches second target data to be malware-scanned with a malware pattern, and performs a malware scanning operation on the second target data according to a matching result, wherein the filtering operation and the scanning operation are performed on a system-on-chip (SoC).
US09223968B2 Determining whether virtual network user is malicious user based on degree of association
Embodiments of the present application relate to a method of controlling user risk, a system for controlling user risk, and a computer program product for controlling user risk. A method is provided. The method includes retrieving association data of a first user and association data of a second user, the association data including multidimensional data, and data relating to each dimension identifying a user and serving as an association dimension, based on the association data, computing an association value between the first user and the second user for an association dimension, gathering the association value to obtain a degree of real association, and determining that the other user is malicious.
US09223966B1 Systems and methods for replicating computing system environments
The disclosed computer-implemented method for replicating computing system environments may include (1) identifying each application installed on a plurality of computing systems, (2) creating, within a virtual machine image, virtual containers that store each application installed on the plurality of computing systems, (3) determining that a potentially malicious file is directed to a target computing system within the plurality of computing systems, (4) identifying each application installed on the target computing system, (5) in response to determining that the file is directed to the target computing system, replicating a configuration of the target computing system within the virtual machine image by, for each application installed on the target computing system, activating a virtual container that stores the application, and (6) determining how the file would affect the target computing system by sending the file to the virtual machine image and analyzing how the file impacts the virtual machine image.
US09223963B2 Systems and methods for behavioral sandboxing
Methods and system for behavioral sandboxing are described. In one example embodiment, a system for behavioral sandboxing can include a network and a computer. The network communicatively coupled to a source of an executable application. The computer communicatively couple to the network and including a behavioral analysis module and a plurality of execution environments. The behavioral analysis module is configured to perform behavioral analysis on the executable application downloaded over the network. The plurality of execution environments including a standard execution environment and a protected execution environment. The behavioral analysis module is configured to evaluate a plurality of behavioral characteristics of the executable application to determine whether the executable application should be executed within the protected execution environment prior to execution of the executable application. The behavioral analysis module also monitors execution of the executable application to determine whether the execution environment can be changed.
US09223961B1 Systems and methods for performing security analyses of applications configured for cloud-based platforms
A computer-implemented method for performing security analyses of applications configured for cloud-based platforms may include 1) identifying an online platform that hosts an online service and that is capable of hosting a plurality of third-party applications integrated with the online service and configured to operate on the online platform, 2) identifying at least one third-party application that is integrated with the online service and configured to operate on the online platform, 3) identifying metadata describing at least one characteristic of the third-party application, and 4) performing a security analysis of the third-party application based at least in part on the metadata. Various other methods, systems, and computer-readable media are also disclosed.
US09223960B1 State-machine clock tampering detection
An apparatus for detecting tampering with a clock of a state-machine, comprising, a master state-machine having master states and driven by a master clock, the master states being switchable responsive to events, and an auxiliary state-machine having auxiliary states and driven by an auxiliary clock synchronous with the master clock, the auxiliary states being switchable responsive to a signal generated based at least on said events, consequently establishing a correspondence between the master states and the auxiliary states, thus ensuing that subsequent to tampering with the master clock the correspondence between the master states and the auxiliary states become discordant, thereby indicating that the master clock has been tampered with.
US09223959B2 Systems and methods for authentication based on user preferences
This disclosure relates generally to authentication for an electronic device, and more particularly to systems and method for authentication based on user preferences. In one embodiment, an authentication method is disclosed, comprising: receiving, at the electronic device, a first input; determining a password theme based on the first input and user preferences associated with the password theme; displaying the password theme, the displayed password theme comprising a plurality of visual cues; receiving, at the electronic device, a second input comprising a sequence of visual cues selected from the visual cues; verifying the sequence of visual cues; and providing access to the electronic device based on the verification.
US09223949B1 Secure transformable password generation
The invention relates to generating and using secure transformable passwords. In one example, a user grants a third party access to an online account at a host server, and the user requests a transformed password from the host server. The host server associates an encryption key with the third party and generates a transformed password using the user's online account password and the encryption key. The user transmits the transformed password to the third party which may use the transformed password to access the online account. The host server generates a second transformed password and compares it to the password information received from the third party. If the received password information and the second transformed password are identical, access is granted. The invention also includes methods for invalidating the transformed passwords by changing the encryption keys to an invalid state.
US09223945B2 Code diversity method and system
In one embodiment, a processing device includes a memory to store an executable program including a multiplicity of encrypted component blocks such that different combinations of blocks selected from the encrypted component blocks are operative when decrypted and executed to perform a same functionally equivalent data transformation, each of the component blocks being operative upon execution to convert input data into output data, and a processor operative to receive a selection of cryptographic keys, decrypt some of the encrypted component blocks using the cryptographic keys such that each one of the some encrypted component blocks is decrypted with a different one of the cryptographic keys yielding a multiplicity of decrypted component blocks, and execute the executable program including the multiplicity of decrypted component blocks to perform the same functionally equivalent data transformation. Related apparatus and methods are also described.
US09223944B2 Media rights management on multiple devices
Media rights are managed to include not just device authentication, but to include elements of user, device, and service authorization. A user can play media on a mobile device, continue playing the media on a desktop computer, and subsequently move to a large screen television and media rights are automatically identified to provide the most appropriate authorized content. This allows an authorized user to seamlessly access different forms of the same content on a variety of authenticated devices using the same digital rights management mechanisms.
US09223940B2 Merchandising media based on ownership audit
A machine performs an ownership audit on source media files whose media tracks are used, or proposed for use, in a mash-up media file. The machine may access a first group of media identifiers from a user's media library and identify authorized media files that the user is authorized to play or use in a mash-up. The machine may access a second group of media identifiers that identify source media files selected by the user for inclusion in a mash-up. The machine may determine whether all source media files are authorized and then present a notification that indicates whether the mash-up media file can be generated, or has been generated, exclusively from authorized media files. If a source media file is not authorized, the notification may include a suggestion that the user purchase an authorization to play the media file, use it in a mash-up, or both.
US09223933B2 Formlets as an enabler of the clinical user experience
Certain examples provide systems, methods, apparatus, etc., to generate formlets for user review of and interaction with clinical data and associated functionality for one or more patients. An example method includes receiving one or more query criterion to retrieve data and generating a query result of data from one or more data stores based on the one or more query criterion. The example method includes applying a transform to the query result data. The example method includes applying a data template and binding instructions to the transformed query result data to generate a formlet including data and at least one of associated relationship and functionality information for display of and interaction with the data. The example method includes facilitating runtime configurability of the formlet by a user. The example method includes displaying the formlet for user review and interaction.
US09223931B2 Ultrasound diagnostic device and method of displaying ultrasound images
The present invention relates to an ultrasound diagnostic device. The ultrasound diagnostic device comprises: a storage unit configured to store a plurality of consecutive image frames based on ultrasound echoes reflected from a target object; an image processing unit configured to form preview images of the image frames, wherein the preview images are stored in the storage unit in association with the corresponding image frames; and a user input unit allowing a user to input a selection instruction for selecting one of the preview images, wherein the image processing unit is further configured to read out an image frame corresponding to the selected preview image from the storage unit in response to the selection instruction.
US09223930B2 Methods and systems for identifying the quantitation cycle for a PCR amplification reaction
Methods and systems for identifying a quantitation cycle (Cq) for a PCR reaction that includes fitting a line having a plurality of line segments to data points associated with a PCR amplification reaction. The data points include a cycle value associated with a PCR cycle and a product value associated with a PCR product. A baseline is identified and reaction segment associated with an exponential region of the PCR reaction is also identified. The reaction segment includes a subset of the plurality of line segments having a slope not less than a steepness criterion. A reaction line is fit to the data points associated with the reaction segment. The Cq is identified by calculating the cycle value for a data point defining the intersection of the baseline and reaction line.
US09223928B1 Reverse engineering part families for multiple disciplines
Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for identifying a plurality of part families, where each part family comprises a plurality of parts; and for each part in each part family: obtaining connection port geometry information for a physical part in a part family; positioning each of the port vectors in a three-dimensional space at a respective location specified by the port vector; generating a respective port alignment line for each of the port vectors; generating one or more base curves each positioned to align with a plurality of the port alignment lines; generating one or more port solids from the connection port geometry information; and constructing body geometry between each of the one or more port solids by sweeping along a respective base curve, wherein the constructing is based at least on the connection port geometry information.
US09223926B2 Method for correcting electronic proximity effects using the deconvolution of the pattern to be exposed by means of a probabilistic method
A method of lithography by radiation having critical dimensions of the order of some ten nanometers makes it possible to carry out the correction of the proximity effects by joint optimization of the dose modulation and geometric corrections. Accordingly, a deconvolution of the pattern to be etched is carried out by an iterative procedure modeling the interactions of the radiation with the resined support by a joint probability distribution. Advantageously, when the support exposure tool is of formed-beam type, the pattern to be etched is split into contrasted levels and then the deconvolved image is vectorized and fractured before carrying out the exposure step. In an advantageous embodiment, the method is applied to at least two character cells which are exposed in a multi-pass cells projection method.
US09223924B2 Method and system for multi-patterning layout decomposition
A portion of a layout of a single layer of an integrated circuit is to be multi-patterned. A method for layout decomposition includes determining spacings between adjacent pairs of patterns, and generating a conflict graph having a plurality of sub-graphs, in which a respective vertex corresponds to each respective sub-graph. The patterns within each respective sub-graph are divided into at least a first group and a second group, each of which is assigned to be patterned on the single layer by a respectively different one of a first mask or a second mask. The method further include determining, in a processor, a count of color-rule violations in the plurality of patterns within each respective sub-graph based on a predetermined set of criteria; and within each sub-graph, assigning the first group of patterns in the sub-graph to the one of the first mask or the second mask which results in a smaller count of color-rule violations.
US09223922B2 Semiconductor device design method
A method of generating a netlist comprises extracting a first capacitance value between the first set of electrical components inside a defined region using a first extraction technique. The method additionally comprises extracting a second capacitance value between a second set of electrical components comprising at least one electrical component outside the defined region using a second extraction technique different from the first extraction technique. The method also comprises generating the netlist including the first capacitance value and the second capacitance value. The first extraction technique is capable of extracting capacitance values between electrical components arranged in a first quantity of directions with respect to one another and the second extraction technique is capable of extracting capacitance values between electrical components arranged in a second quantity of directions with respect to one another. The first quantity of directions is greater than the second quantity of directions.
US09223919B2 System and method of electromigration mitigation in stacked IC designs
A computer implemented method comprises accessing a 3D-IC model stored in a tangible, non-transitory machine readable medium, processing the model in a computer processor to generate a temperature map containing temperatures at a plurality of points of the 3D-IC under the operating condition; identifying an electromigration (EM) rating factor, and calculating and outputting from the processor data representing a temperature-dependent EM current constraint at each point.
US09223917B2 Polynomial synthesis
Galois Field circuit production apparatus for fabricating a polynomial over GF(2m) in a circuit, comprising, an input device for allowing a specification relating to a desired polynomial over GF(2m) to be entered, a processor and memory for producing an improved, and preferably optimized, netlist, and means for fabricating a circuit from an improved netlist, wherein the processor and memory are configured to factorize a netlist corresponding to an input specification, determining common factors by passing through chains of multipliers following chains of adders, and to use an optimization algorithm on the factorized net list to generate an improved net list, and wherein the means for fabricating operably fabricates a circuit based on the improved netlist produced by the processor.
US09223913B2 Method for the acoustic analysis of a body and a system for the execution of such a method
A system and method for the acoustic analysis of a body, in particular a fuselage structure of an aircraft, is provided including: inputting data for geometry, material, boundary conditions and acoustic parameters of the body, generating a body idealized in terms of its structural mechanics, and a cavity simulating the interior of the body, on the basis of the data inputted as a numerical body model, inputting the geometry of the body with a pattern of nodes and the generation of finite elements, stimulating an acoustic loading case by subjecting the body model to at least one sound pressure wave at a defined frequency, analyzing the effect of the sound pressure wave on the body model, and outputting a sound reduction index (R) for the body with reference to that frequency.
US09223912B1 Systems, methods and devices for providing RLCK parasitic extraction back-annotation in electronic design automation
Systems, computer-readable storage media, and methods of providing RLCK parasitic extraction for electronic design of integrated circuits are presented herein. For one implementation, the method includes: importing a simulator netlist extracted from the schematic file that simulates the IC, the simulator netlist providing nets and devices in the schematic; importing the layout file which represents the physical layout of the IC; generating from the layout file a connectivity list with connectivity points in the IC for connecting generated RLCK parasitics; extracting from the layout file an RLCK netlist for the connectivity points; generating from the layout data file and the connectivity list a cross-reference between the connectivity points and the nets and devices in the simulator netlist; from the cross-reference, simulator netlist, and RLCK netlists, update the simulator netlist to includes RLCK parasitics for the connectivity points in the IC; and output an indication of the updated simulator netlist.
US09223911B2 Optical model employing phase transmission values for sub-resolution assist features
Optical simulation can be performed employing a calibrated printing model, in which a unique phase transmission value is assigned to each type of sub-resolution assist features (SRAFs). The printing model can be calibrated employing a mask including multiple test patterns. Each test pattern is defined by a combination of a main feature, at least one SRAF applied to the main feature, and the geometrical relationship between the main feature and the at least one SRAF. Generation of the phase transmission values for each SRAF can be performed by fitting a printing model employing phase shift values and/or transmission values for SRAFs with measured printed feature dimensions as a function of defocus and/or with measured SRAF printing behavior on a printed photoresist layer. A properly calibrated printing model can predict the printed feature dimensions, shift in the best focus, and presence or absence of printed SRAFs.
US09223909B2 Cascaded eddy simulation
A fluid flow is simulated by causing a computer to perform operations on data stored in the memory to compute at least one eddy of a fluid flow at a first scale and perform operations to compute at least one eddy of the fluid flow at both the first scale and a second scale. The second scale is a finer scale than the first scale, and the computation of the at least one eddy of the fluid flow at the second scale is constrained by results of the computation of the at least one eddy of the fluid flow at the first scale.
US09223906B2 Generating thermal zones
Methods, systems, and apparatus, including computer programs encoded on a storage medium, for generating thermal zones. In one aspect, a method includes identifying a perimeter zone for a first portion of a conceptual representation of a building; and dividing the perimeter zone into a plurality of thermal zones, comprising: determining a plurality of first candidate thermal zones based at least in part on a maximum thermal zone angle threshold that each of the first candidate thermal zones satisfy, determining a plurality of second candidate thermal zones based at least in part on a maximum thermal zone length threshold that each of the second candidate thermal zones satisfy, and selecting a plurality of thermal zones from the first candidate thermal zones and the second candidate thermal zones.
US09223902B1 Architectures for content identification
A user can capture various types of information concurrently using multiple sensors of an electronic device. This “scene” data can be provided to a service for processing, which is able to identify various types of potential matches and aggregate information to be returned to the client device. In at least some embodiments, matching information can be sent with the results such that the electronic device can match an element in the scene the next time that element is encountered, without having to contact the service again. In some embodiments, an attempt can be made to predict elements that the user might attempt to identify, and one or more corpora of data can be sent to the electronic device such that the client device can perform any matching on the device for elements in those corpora.
US09223901B2 Method for selecting elements in textual electronic lists and for operating computer-implemented programs using natural language commands
A method for controlling a program by natural language allows a user to efficiently operate a computer-implemented target program through intuitive natural language commands. A list of natural language commands related to the target program is compiled. Each natural language command is stored as an element in an electronic list. Natural language commands generally consist of short sentences comprising at least a predicate (a verb) and an object (a noun). A user can filter the list of natural language commands by entering the initials of a natural language command. The user enters the first character of the first word to be filtered, followed by the first character of the second word to be filtered, and so forth. Filtering by initials very rapidly reduces the number of choices presented to a user and minimizes the number of keystrokes required to select a particular list element.
US09223899B2 Composite term index for graph data
An indexing system for graph data. In particular implementations, the indexing system provides for denormalization and replica index functionality to improve query performance.
US09223898B2 Filtering suggested structured queries on online social networks
In one embodiment, a method includes accessing a social graph comprising a plurality of nodes and a plurality of edges connecting the nodes, receiving from a user an unstructured text query, generating a set of structured queries based on the text query, calculating a quality score based on the text query and the structured query for each structured query in the set, and filtering the set to remove each structured query having a quality score less than a threshold score.
US09223890B2 System and method of processing content using a uniform resource identifier
A host server receives a content request in the form of a Uniform Resource Identifier (URI) from a client. The URI identifies a first content resource and describes a first service resource to be applied to a representation of the first content resource. The URI is translated into an instruction set. The host server causes execution of the instruction set to apply the first service resource to a representation of the content resource. A processed representation of the first content resource is then provided to the client in response to the request.
US09223889B2 Age appropriate filtering
An approach is provided in which a web page management system receives web page content requested by a browser, and parses the web page content according to one or more assessment categories. The web page management system analyzes the parsed web page content and generates content characterization results in response to the analysis. In turn, by comparing the content characterization results to knowledge base entries, the web page management system generates an “age level content ranking” of the web page content and performs an action on the web page content based upon the age level content ranking.
US09223888B2 Combining client and server classifiers to achieve better accuracy and performance results in web page classification
In one embodiment, an internet monitor service may use a final content rating to determine access to a webpage. A monitor client 102 may generate a client content rating of a webpage 104. The monitor client 102 may factor the client content rating with a server content rating of the webpage 104 to determine a final content rating for the webpage 104.
US09223879B2 Dynamically generating recommendations based on social graph information
In one embodiment, a method includes maintaining access to information comprising nodes and edges; receiving a request from a first user corresponding to a first user node for a structured document corresponding to a first concept node; determining a first data set that identifies concept nodes connected by edges with user nodes that are each connected by edges with both the first user node and the first concept node; determining a second data set that identifies concept nodes connected by edges with the first concept node and user nodes that are each connected to the first user node; generating a score for each concept node in the data sets; selecting one or more concept nodes based on their scores as recommended nodes; and transmitting to the client device the structured document and code executable by a client application to render node names or identifiers of the recommended nodes for display.
US09223878B2 User characteristic influenced search results
Improved mobile content presentation capabilities are disclosed for mobile communications facilities, such as cell phones. Information relating to the user characteristics associated with a mobile communication facility and other capabilities are employed to improve the presentation and relevance of mobile content to appropriate or desirable mobile communication facilities.
US09223877B1 Index server architecture using tiered and sharded phrase posting lists
An information retrieval system uses phrases to index, retrieve, organize and describe documents. Phrases are extracted from the document collection. Documents are the indexed according to their included phrases, using phrase posting lists. The phrase posting lists are stored in an cluster of index servers. The phrase posting lists can be tiered into groups, and sharded into partitions. Phrases in a query are identified based on possible phrasifications. A query schedule based on the phrases is created from the phrases, and then optimized to reduce query processing and communication costs. The execution of the query schedule is managed to further reduce or eliminate query processing operations at various ones of the index servers.
US09223873B2 Method and system for incrementally selecting and providing relevant search engines in response to a user query
Methods and systems for incrementally selecting and providing relevant search engines in response to a user query. A method of incrementally selecting and providing relevant search engines is based in part on identifying a set of search engines associated with corresponding metadata, receiving a partial search query entered by the user of a device, inferring after each user keypress a set of potential full queries intended by the user, using the potential full queries and the search engine metadata to identify a set of relevant search engines, and for each of these search engines, providing a direct link to launch a relevant query in the search engine. The user input may be either ambiguous, or erroneous, and may be entered using an input-constrained device.
US09223872B2 Dynamic query resolution using accuracy profiles
In various embodiments, methods and systems for dynamic validation of selectable data are provided. This may be accomplished by referencing search engine session data of a user. The search engine session data includes a plurality of search queries each having an entered-attribute and a resolved-attribute. A variation between the entered-attribute and the resolved-attribute, for each of the plurality of search queries, is determined based on analyzing the entered-attribute and the resolved-attribute. The entered-attribute is an input of the user and the resolved-attribute is a resolved-input for executing the search query. An input-precision score is generated for the user based on the variation between the entered-attribute and the resolved-attribute, for each of the plurality of search queries.
US09223870B2 Decoration of search results by third-party content providers
An ecosystem that enables content providers to decorate search results with interactive content. The searching user can then interact with the content and view the content without leaving the search results page. The content provider sends content and metadata to a content enrichment enabler that transforms the content into an enriched content, and receives back from the enrichment enabler a location identifier which includes information that identifies the provider and the location of the enriched content. The content provider then embeds the identifier in each of the content provider webpages for which such content has been produced. The identifier is indexed by a search engine to identify the interactive content and source thereof for surfacing on a search results page. The search result is decorated with an indicator that the user recognizes as the availability of the enriched content, and uses to access the content via the web page.
US09223865B2 Method and system for property-based indexing and/or querying of web services resources
In one aspect of the present disclosure, a method and system for creating and/or updating resource property-based indexes for Web Service Resources among multiple Web Services ServiceGroups is provided. In another aspect, a method and system for querying target WS-Resources with a certain property among multiple WS-ServiceGroups which have been connected with each other and have WS-Resource property indexes created therein is provided.
US09223864B2 Method and system for making and playing soundtracks
A composite variable duration soundtrack for a user to play while reading a text source, the soundtrack duration being defined by a soundtrack timeline. The soundtrack comprises multiple sound layers configured to play concurrently through the soundtrack timeline, each sound layer having an arrangement of one or more audio features that are configured to play at preset start times in the soundtrack timeline. At least one sound layer is adapted for modifying the preset start and stop times of its audio features to match the reading speed of a user based on a reading speed input.
US09223863B2 Detection of conditions from sound
Disclosed are various systems, methods, and programs embodied in a computer-readable medium for sound analysis. The sound analysis involves transforming a sound print into a frequency domain in a memory to generate a frequency spectrum. A plurality of signatures are identified in the frequency spectrum. Also, a plurality of frequency ranges associated with the signatures are identified in the sound print. The frequencies associated with a physiological profile are cross-referenced with the frequency ranges to determine if the physiological profile is applicable to the sound print.
US09223861B2 Method and system for automatic assignment of identifiers to a graph of entities
Method, system, and programs for providing identifiers to objects. Input data representing a plurality of objects is received and categorized into a plurality of entity categories. A first graph of entities is generated using the plurality of entity categories. The first graph of entities are matched with a second graph of entities. A comparison of object pairs is then made, in which each object pair includes a first object from the first graph of entities and a corresponding second object from the second graph of entities. Identifiers are assigned to each object based on comparing the object pairs.
US09223858B1 System and method to determine quality of a document screening process
Legal document processing (review/summarization/analysis) is a complex and intellectually intensive process. The quality process required for accomplishing this task needs to ensure acceptable levels of accuracy to the customer along with speed and efficiency. Defining of Error Codes, measurement of Error Codes and the related analysis, calibration of results and the analysis of deviations and similarities and the sampling strategy associated with unit selection are critical in ensuring a high acceptable quality level. A system and method of searching through documents in order to find documents relevant to a defined inquity, whereby the number of irrelevant documents produced and number of relevant documents overlooked is minimized. A system and method of using scoring and quality evaluations for a given search project are described.
US09223852B2 Methods and systems for analyzing search terms in a multi-tenant database system environment
Knowledge base is gaining popularity as a customer support tool. Customers search the knowledge base for solutions to their issues. Keywords searched in knowledge base are analyzed and reports are made available for managers and supervisors to understand the trends and requirements of customers. The number of keywords searched can be extremely large in some organizations. In this specification, storing the keywords in a meaningful way in order to generate report for further analysis is discussed. Efficient data storage helps in managing voluminous data and also reducing the amount of memory required to store the data. Any of the above embodiments can be used independently or together with any combination of other embodiments.
US09223849B1 Generating a reputation score based on user interactions
A system and method for generating a reputation score is disclosed. A processing unit processes user activity data from data sources to identify user interactions associated with a user. A categorizing engine categorizes the user interactions into categories. A social bonus engine determines a social bonus score based on social affinity data. A scoring engine computes a first reputation score for the user by combining scores for the categorized user interactions with a social bonus score. A learning engine receives a second set of user interactions and training data and generates a learning result that is used to update the first reputation score.
US09223847B2 Using dimension substitutions in OLAP cubes
Systems, methods and computer program products that provide a framework for the creation, editing, manipulation and use of model-based, multidimensional analysis services (MAS) cubes and using substitute dimensions in such cubes are disclosed. To permit a user to obtain better and automatic access to business intelligence, a method of generating a model-based MAS cube comprises creating a data source comprising a data warehouse in the memory via the processor, creating a data source view providing a dimension, a fact and an outrigger from the created data source, and creating the MAS cube comprising at least one measure group. Using substitute dimensions comprises finding all relevant substitutions for a measure group, creating a table for the measure group in the data source view, adding a property as the primary key of the substitute dimension and generating a query containing an inner join logical link between the substitute and original dimension.
US09223841B2 System and method for providing high availability data
A computer-implemented data processing system and method writes a first plurality of copies of a data set at a first plurality of hosts and reads a second plurality of copies of the data set at a second plurality of hosts. The first and second pluralities of copies may be overlapping and the first and second pluralities of hosts may be overlapping. A hashing function may be used to select the first and second pluralities of hosts. Version histories for each of the first copies of the data set may also be written at the first plurality of hosts and read at the second plurality of hosts. The version histories for the second copies of the data set may be compared and causal between the second copies of the data set may be evaluated based on the version histories for the second copies of the data set.
US09223838B2 Sponsored search queries on online social networks
In one embodiment, a method includes accessing a social graph that includes a plurality of nodes and edges, identifying a node corresponding to an advertiser, generating a plurality of structured queries, where each structured query comprises reference to nodes and edges of the social graph, and where at least one structured query is a sponsored query comprising a reference to the identified node and one or more edges that are connected to the identified node, and sending one or more of the structured queries to a user for display, where at least one of the sent structured queries is a sponsored query.
US09223831B2 System, method and computer program product for searching summaries of mobile apps reviews
A system, method, and computer program product (e.g. mobile App) and/or web-based service is provided to enable users to research online reviews in order to assess the performance and functionality of mobile applications. The system extracts reviews from multiple online sources, including: mobile Apps “stores”, blogs, online magazines, websites, etc.; and, utilizes sentiment analysis algorithms and supervised machine learning analysis to present more informative summaries for each App's reviews. Summaries may include: a sentence that encapsulates a sentiment held by many users; the most positive and negative comments; and a list of features with average scores (e.g. graphics, fun, easy to use, etc.). Additionally, the user may view a separate review detail page per App that provides further summaries, such as a short list of other Apps that the same reviewer gave a very positive review for the features. The user is then able to purchase and download the App via a link.
US09223830B1 Content presentation analysis
A presentation analysis service may obtain presentation information from one or more computing devices that are presenting the item of content. The presentation information may be used to generate recommendations to be provided to a user that is consuming the item of content and/or to a provider of items of content. Further, the presentation information may be used to adapt a presentation of the item of content.
US09223828B2 Data flow graph optimization using adaptive rule chaining
A query is received and an initial data flow graph comprising a plurality of nodes is generated for executing the query. The initial data flow graph is optimized using a model optimizer that accesses at least one of a plurality of patterns to identify a matching pattern and executes at least one optimization rule associated with a matching pattern. Execution of the query is then initiated using the optimized data flow graph. Related apparatus, systems, techniques and articles are also described.
US09223823B2 Transaction log management
Managing a log-full condition of a transaction log in a transaction processing system, where the transaction log has a plurality of log records each associated with a particular transaction. When a log-full condition is detected, the active transaction having the oldest log entry of all active transactions is identified and logging for all transactions except for the identified transaction is temporarily suspended. A dynamic transaction backout of the identified transaction is initiated, with the writing of a backout record for the identified transaction to the log being delayed. Confirmation that the backout has completed is awaited before trimming the log. Then the delayed backout record for the identified transaction is written to the log, and normal logging is resumed.
US09223822B1 Techniques for performing indication management
Described are techniques for performing indication management. Registration criteria is received that includes information identifying a first set data elements of a first data model about which a subscriber is registered to receive notifications. Operations are performed to a second set of data elements stored in a first table of a database in accordance with a second data model where the operations each modify an existing data element of the first table, add a row to said first table or delete a row from said first table. Information is recorded in a delta table regarding the operations. A query is executed that uses the delta table and the first table to generate a virtual table including information regarding the operations performed. First processing is performed using the virtual table to determine notifications for the subscriber regarding data elements of the first set in accordance with said registration criteria.
US09223821B2 Data backup prioritization
A method for prioritizing data backup requests includes assigning priority values to a plurality of parameters, each parameter being associated with a plurality of data backup requests. The data backup requests can be sorted according to a primary parameter based on the priority values to prioritize the data backup requests. The data backup requests can also be sorted according to a secondary parameter when at least two of the data backup requests have a same primary parameter priority value.
US09223814B2 Scalable selection management
Architecture for handling large data selections with small and substantially constant memory footprints. The architecture facilitates the creation of sets of data objects (e.g., rows) of a data source based on selection of the data objects. The set structures can be defined according to a range (span) of data objects selected and a pattern of the objects selected. These set structures are then saved in memory, rather than the data objects, to provide optimized memory usage. In a database implementation, the solution stores the set representation (the structure) in nearly a constant amount of memory, regardless of the number of rows in the grid, and regardless of the number of rows selected. Memory usage can be proportional to the number of discontinuous spans of rows selected by the user. Structures in memory can be consolidated, replaced, or eliminated dynamically as the user changes row selections and pattern criteria.
US09223813B2 Versioning for configurations of reusable artifacts
Arrangements described herein relate to versioning configurations of reusable artifacts. An artifact baseline corresponding to the present version of a first artifact can be created. Responsive to creating that artifact baseline, the present version of the first artifact, and present versions of children artifacts of the present version of the first artifact, are made immutable. Responsive to identifying a change to the present version of the first artifact, a new version of the first artifact can be automatically created, wherein the new version of the first artifact is mutable.
US09223812B2 Adaptive scheduled periodic caching
A system, a method, and a computer program product for adaptive scheduled periodic caching are disclosed. A data stream is received. The data stream contains a plurality of versions of data arranged in a plurality of data clusters. Each data cluster includes an anchor version having a plurality of versions of data dependent on the anchor version. A size of each anchor version of each data cluster is determined. A number of versions of data dependent on each anchor version is also determined. For each anchor version, a ratio of the determined number of dependent versions of data to the determined size of each anchor is computed. At least one anchor version for storing in a memory location is selected based on the computed ratio.
US09223811B2 Creation and expiration of backup objects in block-level incremental-forever backup systems
Embodiments of the present invention provide a scalable, efficient way to backup data in a block-level incremental-forever backup system such that backup and expiration of data can be achieved at the granularity of a single backup version, without having to read or move data that is stored in backup storage.
US09223809B2 Code processing technique
A disclosed data structure of a phrase tree includes, as data of each node in the phrase tree, a data block including a first area for holding a code for a character or a character string, a second area for holding, for each character that will be used, an appearance sequential number of a second character that appears next to the character or the character string, and a third area for holding, according to the appearance sequential number, a number of appearances or a code corresponding to a character string comprising the character or the character string and the second character when the number of appearances exceeds a threshold.
US09223806B2 Restarting a batch process from an execution point
Batch processing machines, systems and methods are provided. The method comprises copying target data from a target location to a first data storage medium, wherein the target data stored in the first data storage medium is utilized by a batch process; executing the batch process; checkpointing state information for the batch process at one or more time intervals while the batch process is executing; determining whether a data record in the target data stored in the target location was updated while the batch process was executing; and reinstating the batch process from a point in time prior to an earliest point in the batch process when a representation of an updated data record in the target data in the target location was accessed by the batch process.
US09223805B2 Durability implementation plan in an in-memory database system
A database durability implementation records only committed transactions in a log file. A pair of log files and a pair of snapshot files are maintained. When a snapshot of the database is completed, the ‘current’ log becomes the ‘prior’ log and the other log becomes the ‘current’ log. After the next snapshot is completed, the prior log and prior snapshot may be deleted. Transactions that are not committed are not recorded in the current log, thereby avoiding the need to undo aborted transactions. If a given change is reflected in a completed snapshot, it does not appear in either of the logs; if the change is not yet reflected in a completed snapshot, it is guaranteed to be stored in one of the logs. During recovery, the system assesses both snapshots. The most recent of the completed snapshots is used, and the corresponding log(s) is (are) applied.
US09223803B2 Creating and organizing events in an activity stream
A system and method for creating and organizing events includes an activity stream application that captures, searches and collaborates on one or more events. The events include unstructured data comprising text, digital ink, an audio clip and an image. The activity stream application receives user input and generates a new event and combines related events into the same activity. The activity stream application receives a search query and searches for events that are relevant to the search query. In one embodiment, the search query includes contextual information that includes at least one of at a similar time, at a similar location, in a similar situation and a relatedness of event attributes.
US09223802B2 Automatic sharing of superlative digital images
Described herein are techniques related to automatic sharing of superlative digital images. Such techniques include an automatic selection of one or more superlative digital images from a set of digital images based, at least in part, upon weighted criteria regarding properties (e.g., metadata or content) of the digital images. Instead, interested parties (e.g., subscribers and/or persons with an association with a particular image) are notified automatically. This Abstract is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims.
US09223801B2 Information management method and information management apparatus
An information management method to be executed by a computer, the information management method includes: accepting a registration request including information in which latitude and longitude are included, and correspondence information corresponding to the position information; generating one character string by alternately arraying one character of the latitude and another one character of the longitude, each of the one character and the other one character is in a same digit regarding all of the digits of each of the latitude and the longitude, or some digits from the least significant digit of each of the latitude and the longitude; and storing the correspondence information in a storage unit in a manner correlated with the character string as a key.
US09223800B1 Cluster file system providing object store and functionality for transformation of metadata files into objects
A cluster file system includes a physical file system and a virtual file system arranged between the physical file system and multiple clients. The virtual file system comprises a data object processing module configured to receive multiple data files from each of one or more of the clients and to transform the data files into data objects for object-based storage in the physical file system. The virtual file system further comprises a metadata object processing module configured to receive metadata files associated with the data files and to transform the metadata files into metadata objects for object-based storage in the physical file system. The virtual file system thereby implements multiple object stores utilizing the physical file system for independent storage of data objects and metadata objects but presents a file-based interface to the clients. In some embodiments, the virtual file system illustratively comprises a parallel log-structured file system (PLFS).
US09223799B1 Lightweight metadata sharing protocol for location transparent file access
A storage processor having access to published logical unit numbers of a common block file system mounted on another storage processor processes requests for a particular file system object of the common block file system using metadata objects of the common block file system cached in both storage processors to access storage units shared between the two storage processors.
US09223797B2 Reparse point replication
Systems and methods for replicating data from a master server to a replica or backup server include capturing a read event associated with a retrieved file at the master server. The retrieved file may be generated by updating a reference file with remotely stored data. Attributes associated with the retrieved file may be checked to determine if they include attributes associated with the reference file, and if they do not, at least a portion of data and one or more attributes of the retrieved file may be copied or replicated to the replica server. The captured read event may be generated when an application attempts to access or read the retrieved file. An event associated with generation of the reference file may also be captured at the master server, and copies to the replica server.
US09223795B2 Managing network storage with a user-level file system
A user-level file system interfacing with at least one user application for a transparent view with a file system module implemented in a kernel subsystem and a user storage client module implemented in a user-level file system to access and synchronize at least a resource stored within a storage media device, and translating a request, from the user application, to access the resource to the user-level file system for the transparent view. The user-level storage client module receives the request to access the resource from the user application for the transparent view. A storage prediction service retrieves the request to access the resource from the user-level storage client module for the transparent view. The network storage service receives the request to access the resource from the user-level storage client module. The user application is provided with access to the transparent view of requested resource stored within the storage media device.
US09223793B1 De-duplication of files for continuous data protection with remote storage
Technologies are described herein for performing data de-duplication of a version of a data file for backup to a remote storage location. A CDP module executing on a computer creates a collection of files corresponding to the version of the data file by de-duplicating the version against a previous version master file stored locally on the computer. The previous version master file contains one or more unique data blocks of a specific block size from a previous version of the data file. Once the de-duplication against the locally maintained previous version master file is complete, the CDP module stores the collection of files corresponding to the version of the data file to the remote storage location. The remote storage location also contains a master file corresponding to the data file that contains all of the unique data blocks in the previous version master file.
US09223782B2 System for performing instructions that are dependent upon received media-based messages and associated methods and components
A system for performing instructions determined by received media-based messages, the system including an interface for receiving a media-based message from a system user; a database associating a plurality of specifications of media-based messages with respective stored instructions; a recognition engine for identifying a correspondence between a received media-based message and a stored specification of a media-based message. The system may include an instruction engine for performing an instruction associated with a stored specification of an media-based message for which a correspondence has been identified; an interface for receiving an activation request; and a database manager configured to process the activation request to generate publication data for creating a publication that may be recorded by a user to define a new media-based message and configured to adapt the database to include a specification of the new media-based message. The system may include a database manager configured to arbitrate which of plural stored instructions is performed in response to an identified correspondence between the received media-based message and one or more specifications of media-based messages.
US09223781B2 Method and apparatus for automatic editing
The system provides for the automatic editing of a video comprised of a plurality of content segments. When two or more content clips are available at a particular moment in time, the system will automatically choose at least a portion of one of the clips pursuant to preference metrics determined by a user. The system contemplates the ability of the user to define specific metrics to control the editing, including frequency of edits, content of content clip, level of activity, and the like. In another embodiment, the system has a plurality of pre-defined editing modes that define various metrics for use in the automatic editing system, including guaranteed participation, speaker-centric, quality of clip, and the like.
US09223774B2 Email suggestor system
The email suggestor system and method provide an efficient and effective way to capture a user identifier, such as an email address of a consumer in a retail environment. The email suggestor system generates one or more suggested first text portions based on input data, outputs at least one of the suggested first text portions, and receives a selection of a first text portion. The email suggestor system generates one or more suggested second text portions of a user identifier based on the input data, outputs at least one of the suggested second text portions, and receives a selection of a second text portion. The email suggestor system generates a user identifier including the selected first text portion and the selected second text portion. The email suggestor system uses received feedback response to refine and/or train one or more models with which it generates the suggested text portions.
US09223771B2 Locking spreadsheet cells
In some embodiments, an option to lock one or more associated cells is provided with respect to each different group of cells in a single sheet of a spreadsheet application. One or more locked cells of a group of cells do not scroll out of view at least while a portion of the group of cells is viewable in a given display view.
US09223769B2 Data processing systems, devices, and methods for content analysis
Systems, devices and methods operative for identifying a reference within a figure and an identifier in a text associated with the figure, the reference referring to an element depicted in the figure, the reference corresponding to the identifier, the identifier identifying the element in the text, placing the identifier on the figure at a distance from the reference, the identifier visually associated with the reference upon the placing, the placing of the identifier on the figure is irrespective of the distance between the identifier and the reference.
US09223767B1 Unified graphical user interface for displaying a plan of operations in a datacenter
In a computer-implemented method for a unified graphical user interface for displaying a plan of operations in a datacenter metadata is accessed from a plurality of disparate software bundles for updating targets in a datacenter. A unified visualization of a plan of operations on the targets is displayed via a unified graphical user interface based on the accessed metadata, wherein the unified graphical user interface displays the plan of operations with a common look and feel.
US09223766B2 Preserving formatting of content selection through snippets
An e-reader application preserves formatting of a selection through a snippet. The application determines a format of a portion of content in response to a user action selecting the portion. The formatted portion is stored in the snippet. The source code of the portion is extracted from the content and stored in the snippet to preserve its format. The snippet is displayed in a navigation pane using the format. The snippet is resized according to the defined format to fit available space in the navigation pane. The application is enabled to navigate to a location of the portion within the content in response to detecting another selection activating the snippet.
US09223764B2 Assistive technology for the visually impaired
Disclosed are methods and apparatus for generating accessible documents. In one embodiment, an initial document in a print format is obtained. The print format of the initial document is identified as one of a plurality of print formats. A parser corresponding to the one of the plurality of print formats is applied such that the initial document is parsed according to the print format of the initial document. An intermediate document that conforms to an intermediate format is generated based upon results obtained from applying the parser. A template for converting the intermediate document into an accessible document is obtained. The template is then such that an accessible document corresponding to the initial document is generated, wherein the accessible document includes a plurality of tags that designate an order of a plurality of regions of the accessible document.
US09223759B2 Systems and methods for providing electronic document services
A system facilitates the procurement of one or more document services for a document directly from a document preparation software application used to create the document. The system activates a graphical user interface within the document preparation software application, contacts a server to identify available document services, and configures the graphical user interface based on the available document services. The system detects selection of one of the available document services and provides the document from the document preparation software application to one or more service providers for performance of the selected document service.
US09223757B2 Automated paragraph layout
Methods and apparatus for calculating paragraph layout. A method begins with a first node in a paragraph and calculates an optimal line break scheme for paragraph layout that ended in the node. For every subsequent node in the paragraph, the method calculates an optimal line break scheme for paragraph layout that ends respectively in every subsequent node. Each optimal line break scheme is calculated by minimizing the total of a penalty value of a current line and all preceding penalties of all preceding lines. The preceding penalties of all preceding lines are defined by a previously calculated optimal line break scheme.
US09223755B2 Apparatus and method for automatically generating a deterministric target differential equation system
An apparatus and method are provided for automatically generating a deterministic target differential equation system for evaluating an output differential equation system with stochastic input parameters with a device for providing a weighted sum of orthogonal basic functions inserted into the output differential equation system, which forms a stochastic random variable. A multiplication device for multiplying the output differential equation system by the orthogonal basic functions and an integration device for integrating the output differential equation system which is multiplied by the orthogonal basic functions to generate the deterministic target differential equation system are provided. A control device calculates stochastic output parameters based on the deterministic target differential equation system generated and accordingly controls a mechanical or electronic adjustment element. The apparatus may be suitable for use in a robust regulating and control circuit for regulating an installation, e.g., a chemical reaction installation, e.g., to minimize harmful exhaust gas substances.
US09223754B2 Co-simulation procedures using full derivatives of output variables
A computer-implemented method for use in simulating dynamic behavior of complex engineering systems comprised of several subsystems includes computing a Jacobian matrix based on output derivatives, wherein the output derivatives are based on corresponding state variable derivatives related to corresponding first input variables for each of a plurality of subsystems. The method also includes modifying the first input variables and computing second input variables and residuals for each of the plurality of subsystems based on corresponding state variable derivatives.
US09223753B2 Dynamic range adjusting floating point execution unit
A floating point execution unit is capable of selectively repurposing a subset of the significand bits in a floating point value for use as additional exponent bits to dynamically provide an extended range for floating point calculations. A significand field of a floating point operand may be considered to include first and second portions, with the first portion capable of being concatenated with the second portion to represent the significand for a floating point value, or, to provide an extended range, being concatenated with the exponent field of the floating point operand to represent the exponent for a floating point value.
US09223752B2 Digital signal processor with one or more non-linear functions using factorized polynomial interpolation
A digital signal processor and method are disclosed with one or more non-linear functions using factorized polynomial interpolation. A digital signal processor evaluates a non-linear function for a value, x, by obtaining two or more values from at least one look-up table for said non-linear function that are near said value, x; and interpolating said two or more obtained values to obtain a value, y, using a factorized polynomial interpolation.
US09223748B2 Speed control apparatus and program for speed control apparatus; and automatic vehicle driving apparatus, engine dynamo control apparatus, and control programs used for respective apparatuses
In order to further improve followability of an actual vehicle speed with respect to a commanded vehicle speed at a starting time point, the present invention is provided with a vehicle speed control part that, a predetermined time before the starting time point that is a time when the commanded vehicle speed rises from zero, sets a clutch position of a vehicle to an initial intermediate position where power is partially transmitted, and at and during a certain period of time after the starting time point, performs clutch feedback control that changes the clutch position depending on a deviation between the actual vehicle speed and the commanded vehicle speed so as to make the actual vehicle speed follow the commanded vehicle speed, wherein the vehicle speed control part sets the initial intermediate position depending on rising commanded acceleration that is a time rate of change at the time when a value of the commanded vehicle speed rises from zero.
US09223747B2 System for reusing triple event data in PET and method, program product thereof
The invention provides a system for reusing triple event data of PET. The system includes an input unit, a determining unit, and an output unit. A plurality of data is generated by an object undergoing the PET scan, and the input unit is used to receive the data. The determining unit is used to determine the data and pick out data corresponding to triple event from the data and according to a formula to pick out data corresponding to coincident event from the data corresponding to triple event. In other words, the determining unit picks out data corresponding to true triple event from the data to reuse and analyze the data corresponding to coincident event and further to generate an analysis result. The output unit is used to output the analysis result.
US09223742B2 Data structures for facilitating communication between a host device and an accessory
Computer readable storage mediums, electronic devices, and accessories having stored thereon data structures. A data structure includes a pin selection field operable to identify a connector pin and cause a host device to select one of a plurality of communication protocols for communicating with an accessory over the identified connector pin. The data structure also includes an accessory capability field defining an accessory identifier that uniquely identifies the accessory.
US09223741B1 Systems for setting the address of a module
A circuit module is disclosed. The circuit module has a ground connection, a power connection, a shunt regulator coupled to the power connection and to the ground connection, a current measuring circuit that measures a current flowing between the power connection and the ground connection, one or more communication connections, and a digital logic circuit coupled to the one or more communication connections to send and receive communications. The digital logic circuit responds to communications addressed to a communication address with the communication address based on the current measured by the current measuring circuit. Other systems are disclosed.
US09223740B2 Detection method and apparatus for hot-swapping of SD card
A detection method for detecting a hot-swapping status of a Secure Digital (SD) card is provided. The detection method includes steps of: transmitting an inquiry command to the SD card at a predetermined frequency when an application requiring the hot-swapping status of the SD card is activated; receiving a current command return message replied in response to the inquiry command, wherein the current command return message includes information indicative of a presence or information indicative of an absence of the SD card; determining the hot-swapping status according to a previous command return message and the current command return message; and replying the determined hot-swapping status to the application.
US09223736B2 Devices and methods for an enhanced driver mode for a shared bus
A device includes a transmission circuit that is configured and arranged to transmit data in accordance with a signal bus protocol that uses passive bias to set a signal bus to a recessive value in the absence of an actively-driven signal value. The transmission circuit includes a first driver circuit that is configured and arranged to actively drive the signal bus to a dominant value that is different from the recessive value. The transmission circuit also includes a second driver circuit that is configured and arranged to actively drive the signal bus to the recessive value. A control circuit is configured and arranged to disable the second driver circuit in response to the device operating in a first data transmission mode, and to enable the second driver circuit in response to the device entering a second transmission mode.
US09223734B2 Switch with synthetic device capability
A method of sharing of a function of a device with a plurality of hosts through a PCIe switch is provided. A function on a device is presented to a first host and a second host through the switch. Read and write on the function's register set within the first host and within the second host are captured, thereby enabling a management system of the switch to create a shadow copy of the first host register sets and second host register sets. The creation of sets of shadow queues on the management system is enabled. The first set of shadow queues of the first set of registers is used to direct read and write operations from the first host to the function. The second set of shadow queues of the second set of registers is used to direct read and write operations from the second host to the function.
US09223733B2 Bidi extension for connected devices
Bidirectional (bidi) extension techniques for USB and/or other similar busses/connections are described in which an interface is provided to enable bidirectional communication with connected devices. The interface may be implemented as an operating system component to handle bidi communication for devices from multiple different independent hardware vendors (IHVs). Device drivers for different devices can be configured to include extension files in accordance with an established schema for bidi communication. The extension files describe supported bidi attributes, capabilities of the device, and how to make calls into the device. The interface operates to detect the extension files and set-up a corresponding device for bidi communication. Applications then interact through the interface to access, retrieve, and set configuration and status data for connected devices. The use of extension files enable creation of architecture independent devices drivers that can be used across different platforms with substantially no changes.
US09223731B2 Arbitration circuit and control method thereof
An arbitration circuit includes a use frequency setting block that sets a setting value for limiting a bus use frequency for each of a plurality of masters. A use request management section holds the bus use request from each of the plurality of masters and selects a use request that has not been granted from among the held use requests. A use frequency limitation block limits the use request selected by the use request management section such that the bus use frequency of each of the plurality of masters will not exceed its setting value. A use request grant block grants a use request of any one of the plurality of masters from among use requests not limited by the use frequency limitation block received from the plurality of masters.
US09223728B2 Servicing a globally broadcast interrupt signal in a multi-threaded computer
Methods, apparatuses, and computer program products for servicing a globally broadcast interrupt signal in a multi-threaded computer comprising a plurality of processor threads. Embodiments include an interrupt controller indicating in a plurality of local interrupt status locations that a globally broadcast interrupt signal has been received by the interrupt controller. Embodiments also include a thread determining that a local interrupt status location corresponding to the thread indicates that the globally broadcast interrupt signal has been received by the interrupt controller. Embodiments also include the thread processing one or more entries in a global interrupt status bit queue based on whether global interrupt status bits associated with the globally broadcast interrupt signal are locked. Each entry in the global interrupt status bit queue corresponds to a queued global interrupt.
US09223721B2 Embedded processor with virtualized security controls using guest identifications, a common kernel address space and operational permissions
A method includes assigning unique guest identifications to different guests, specifying an address region and permissions for the different guests and controlling a guest jump from one physical memory segment to a second physical memory segment through operational permissions defined in a root memory management unit that supports guest isolation and protection.
US09223719B2 Integrating data from symmetric and asymmetric memory
Data stored within symmetric and asymmetric memory components of main memory is integrated by identifying a first data as having access characteristics suitable for storing in an asymmetric memory component. The first data is included among a collection of data to be written to the asymmetric memory component. An amount of data is identified within the collection of data to be written to the asymmetric memory component. The amount of data is compared within the collection of data to a volume threshold to determine whether a block write to the asymmetric memory component is justified by the amount of data. If justified, the collection of data is loaded to the asymmetric memory component.
US09223716B2 Obstruction-aware cache management
Processors and methods disclosed herein include a cache memory unit, n processor cores where n≧1, a controller connected to the cache memory unit and to each of the n processor cores, and n obstruction monitoring units, where each obstruction monitoring unit is connected to the controller and to a different one of the n processor cores, and where during operation of the electronic processor, each obstruction monitoring unit is configured to detect an obstruction corresponding to an operation from the processor core connected to the obstruction monitoring unit before the operation executes in the cache memory unit.
US09223715B2 Microprocessor mechanism for decompression of cache correction data
An apparatus has a fuse array, a cache memory, and cores. The fuse array is disposed on a die, into which is programmed the configuration data. The fuse array includes a first plurality of fuses and a second plurality of fuses. The first plurality of fuses stores compressed cache correction data. The second plurality of fuses stores compressed fuse correction data that indicates locations and values corresponding to one or more fuses within the first plurality of fuses whose states are to be changed from that which was previously stored. The cores are disposed on the die, where each of the cores accesses the fuse array upon power-up/reset. The each of the cores includes a cache fuses decompressor that changes the states according to the locations and the values, decompresses the compressed cache correction data, and distributes decompressed cached correction data to initialize the cache memory.
US09223714B2 Instruction boundary prediction for variable length instruction set
A system, processor, and method to predict with high accuracy and retain instruction boundaries for previously executed instructions in order to decode variable length instructions is disclosed. In at least one embodiment, a disclosed processor includes an instruction fetch unit, an instruction cache, a boundary byte predictor, and an instruction decoder. In some embodiments, the instruction fetch unit provides an instruction address and the instruction cache produces an instruction tag and instruction cache content corresponding to the instruction address. The instruction decoder, in some embodiments, includes boundary byte logic to determine an instruction boundary in the instruction cache content.
US09223712B2 Data cache method, device, and system in a multi-node system
A data cache method, device, and system in a multi-node system are provided. The method includes: dividing a cache area of a cache medium into multiple sub-areas, where each sub-area is corresponding to a node in the system; dividing each of the sub-areas into a thread cache area and a global cache area; when a process reads a file, detecting a read frequency of the file; when the read frequency of the file is greater than a first threshold and the size of the file does not exceed a second threshold, caching the file in the thread cache area; or when the read frequency of the file is greater than the first threshold and the size of the file exceeds the second threshold, caching the file in the global cache area. Thus overheads of remote access of a system are reduced, and I/O performance of the system is improved.
US09223707B2 Mobile memory cache read optimization
Examples of enabling cache read optimization for mobile memory devices are described. One or more access commands may be received, from a host, at a memory device. The one or more access commands may instruct the memory device to access at least two data blocks. The memory device may generate pre-fetch information for the at least two data blocks based at least in part on an order of accessing the at least two data blocks.
US09223705B2 Cache access arbitration for prefetch requests
A processor employs a prefetch prediction module that predicts, for each prefetch request, whether the prefetch request is likely to be satisfied from (“hit”) the cache. The arbitration priority of prefetch requests that are predicted to hit the cache is reduced relative to demand requests or other prefetch requests that are predicted to miss in the cache. Accordingly, an arbiter for the cache is less likely to select prefetch requests that hit the cache, thereby improving processor throughput.
US09223702B2 Systems and methods for read caching in flash storage
A flash controller receives a read request for reading a page of data from the flash memory from a host system, and identifies, in a cache tag table stored in the random access memory, a virtual unit address associated with the page of data. In response to identifying the virtual unit address in the cache tag table, controller determines whether a valid tag line for the page of data is associated with the virtual unit address in the cache tag table. In response to determining that the valid tag line is associated with the virtual unit address in the cache tag table, the controller reads the page of data from the random access memory in accordance with the read request and returns the read data to the host system.
US09223701B2 Data processing apparatus and method for performing load-exclusive and store-exclusive operations
A data processing apparatus is provided in which a processor unit accesses data values stored in a memory and a cache stores local copies of a subset of the data values. The cache maintains a status value for each local copy stored in the cache. When the processor unit executes a load-exclusive operation, a first data value is loaded from a specified memory location and an exclusive use monitor begins monitoring the specified memory location for accesses. When the processor unit executes a store-exclusive operation, a second data value is stored to the specified memory location if the exclusive use monitor indicates that the first data value has not been modified since the load-exclusive operation was executed. When a local copy of the first data value is stored in the cache and the status value for the local copy of the first data value indicates that the processor unit has exclusive usage of the first data value, the data processing apparatus is configured to prevent modification of the status value for a predetermined time period after the processor unit has executed the load-exclusive operation.
US09223698B2 SSD-block aligned writes
An SSD, comprising a mapping module and a controller, mapping module is capable of mapping a plurality of SSD-block aligned groups, each comprises a specific sequence of LBAs, to SSD blocks. The controller is capable of determining whether a LBA referenced in an incoming write request is a first LBA in a respective group, and if so, the controller is capable of: opening an ongoing SSD-block aligned write session; assigning a SSD block to the session; and recording in the session's data an indication of which LBA is associated with the write data that was saved to the SSD. In case the LBA referenced in the incoming write request is not the first LBA in the respective group, but is a successor of a latest-saved LBA of the group, storing the write data in sequence with a latest used segment of the SSD-block that was assigned to the group.
US09223697B2 Computer reprogramming method, data storage medium and motor vehicle computer
A method (50) for reprogramming a computer (10) by modification of the content of a non-volatile rewritable memory (104) of the computer via reprogramming software stored in the non-volatile rewritable memory (104). The reprogramming software includes a task sequencer and a plurality of software components, divided in advance into at least two sets, namely: a first set including each software component to be executed simultaneously with an operation of modifying the content of the non-volatile rewritable memory (104), and a second set including some or all of the other software components of the reprogramming software. During the reprogramming of the computer, the software components of the second set are executed from the non-volatile rewritable memory (104), and the task sequencer and the software components of the first set to be executed are copied in advance into a volatile memory (106) of the computer, and are executed from the volatile memory.
US09223687B2 Determining the logical address of a transaction abort
Embodiments relate to determining the logical address of a transaction abort. In an embodiment, one or more instructions are received are received from an application. The one or more instructions are executed within a first transaction. The first transaction delays committing stores to memory until it has completed. At least one of the one or more instructions includes a first logical memory address. The first logical memory address corresponds to a first memory address in a memory system. It is determined if the first memory address is equal to a second memory address that is stored in a conflict register. Based on determining that they are equal the first logical memory address is saved as a logical address associated with a cross invalidate (XI) signal at a location available to the application.
US09223686B1 Cache memory data storage control system and method
A caching system and methodology for data in a memory for faster access to commonly-used data by other applications and computer devices on a network. The memory can include a solid-state drive (SSD) array for the cache memory that has read-bias, in addition to a magnetic hard drive array. The system uses a logical set of slots to hold identifiers for specific groups of data that can be placed into cache memory and each identifier has a usage attribute that changes based upon the usage of the specific group of data and causes the identifier to move within the set of slots and potentially into cache memory.
US09223684B2 Online application testing across browser environments
A stub can be loaded into a first browser environment of a browser application on a client machine, with the stub being loaded from a domain. The stub can execute to load an online application test into the first browser environment. Additionally, the test can execute in the first browser environment to conduct the test on an online application. For example, the test may be conducted from a second browser environment of the browser on the client machine. Performing the test can include loading one or more digital pages from the application into the second browser environment.
US09223683B1 Tool to analyze dependency injection object graphs for common error patterns
The present document pertains to systems and methods of dependency framework analysis to automatically identify errors in the dependency framework of an application or software module. Variations discussed include devices and methods for identifying errors in an object dependency graph by techniques such as determining a module and module type associated with a method at a plugin point on the object dependency graph; automatically selecting, from a set of testlets, at least one testlet associated with the determined module type, where each testlet is associated with one or more common dependency errors; and automatically creating, with a processor, at least one test suite for each selected testlet, where automatically creating includes building an executable code module that, when executed with a processor, analyzes the dependency graph at the plugin point and generates data showing a location and severity of common dependency errors within the graph.
US09223678B2 Data processor device having a debug control module which selectively modifies trace messages
Upon detecting an occurrence of a watchpoint event for debugging a computer processing system, at least a portion of at least one message in a trace message buffer is flushed when a characteristic of the at least one of the messages matches a specified characteristic.
US09223673B1 Custom host errors definition service
A custom host errors definition service is provided. The custom host errors definition service can create separate endpoints through which different customers can define custom host errors for one or more host computing systems, which might operate in a distributed execution environment. A custom host error definition can specify one or more host computing systems, one or more system components of the one or more host computing systems, one or more attributes, one or more error conditions for the one or more attributes, and one or more actions to perform as a result of the error conditions being satisfied. The error conditions can be, but are not limited to, threshold conditions, component failure conditions, missing hardware conditions, degraded hardware conditions, system firmware failures, incorrect firmware conditions, and the like.
US09223672B1 Method and system for providing error repair status data to an application user
Application user contact data associated with an application user is obtained indicating how to contact the application user. Application user identification data is then assigned to the application user. Application request data requesting access to the application, and/or a feature/operation associated with the application, and/or data associated with the application, is received and request identification data is assigned to the application request data. When error data associated with the application request data indicating an error has occurred is received, an error repair status data location is designated and error repair status data associated with the error is provided to/stored in the error repair status data location. Application user error notification data is then generated and provided to the application user including data for accessing the error repair status data in the designated error repair status data location.
US09223669B2 Self-expanding test automation method
A method for automatically testing an apparatus controlled by software based on pilot test case file comprising user input sequence data recorded manually and the time stamp of the input. In the process of automated testing, these pre-recorded user inputs are replay with same input sequence but with either the same time interval between two subsequent inputs recorded prior; or with a random time interval autonomously generated in a range set by the test configuration. During the process of replaying user input, a separate plural numbers of background tasks are executed in parallel with random execution delays to generate varying system load and execution timing to simulate the apparatus' unpredictable real operation scenarios. The user input and new random time interval between each user input are recorded at replay as a new expanded test record file for later test result trace and failure analysis.
US09223668B2 Method and apparatus to trigger and trace on-chip system fabric transactions within the primary scalable fabric
A fabric trace hook is disclosed to enable debugging operations of agents operating in a peer-to-peer integrated on-chip system fabric. The fabric trace hook, embedded within the IOSF, includes programmable triggering and capturing logic, timestamp capability, and a security feature to disallow tracing of proprietary transactions. The fabric trace hook may operate in a lossy or lossless mode.
US09223664B1 Energy storage for memory protection during power event
An energy storage device included in a data center environment can supply energy to a set of solid state drives in the data center environment when power failure or another power event has occurred. In some embodiments, there can be a controller for each solid state drive. The controller can be configured to detect or determine the occurrence of the power failure or other power event and, in response, transmit a command to a respective solid state drive instructing the solid state drive to perform a graceful and atomic shutdown operation, so that data stored on the drive is made durable and the drive enters a quiescent state (e.g., sleep mode, hibernate mode, power-off mode, etc.). As such, the energy storage device can provide protection against power events to solid state drives that lack native (e.g., built-in, inherent, etc.) power protection mechanisms.
US09223655B2 Storage system and method for controlling storage system
Provided is a storage system which allows reliability to be improved by recovering target data relatively early. A plurality of storage apparatuses 210 forms a parity group 230 for data recovery. An FM board 150 serving as a first memory apparatus is a large-capacity memory apparatus with a parity calculation function 1512. In carrying out a data recovery process, the FM board 150 acquires other data D0 and D1 and a parity P0 needed to recover target data D2, and carries out a predetermined parity calculation by the parity calculation function to recover the target data D2. When the recovered data D2 is written to a plurality of different FM boards 150, the data D2 becomes redundant and the data recovery process is therefore considered to be complete.
US09223652B2 Triple parity encoding to facilitate data recovery
Examples are disclosed for facilitating recovery from failures associated with a storage array having a plurality of storage devices.
US09223649B2 System and method of sending correction data to a buffer of a non-volatile memory
A method and apparatus for receiving data from a buffer of a non-volatile memory is described. An error correction coding (ECC) operation is initiated at a controller to correct bit errors in the data. Correction data is sent from the controller to the buffer of the non-volatile memory to correct the bit errors in the data; the correction data may correspond to a portion of the data in the buffer.
US09223644B1 Preventing unnecessary data recovery
A method that prevents unnecessary data recovery includes receiving, at a data processing device, a status of a resource of a distributed system. When the status of the resource indicates a resource failure, the method includes executing instructions on the data processing device to determine whether the resource failure is correlated to any other resource failures within the distributed system. When the resource failure is correlated to other resource failures within the distributed system, the method includes delaying execution on the data processing device of a remedial action associated with the resource. However, when the resource failure is uncorrelated to other resource failures within the distributed system, the method includes initiating execution on the data processing device of the remedial action associated with the resource.
US09223642B2 Green NAND device (GND) driver with DRAM data persistence for enhanced flash endurance and performance
A Green NAND Device (GND) driver application queries AC line and battery status and then stores an image of processor states and caches and a resume routine to DRAM when power failure occurs. A DRAM image is then stored to flash memory for a persistent mode when battery power is available. The image in DRAM may be a partial image that includes entries, flushed caches, processor contexts, ramdisks, write caches, and a resume context. Endurance of flash memory is increased by a Super Enhanced Endurance Device (SEED) SSD. In a power down mode, the GND driver limits DRAM use and only caches in DRAM data that can be deleted on power down. Host accesses to flash are intercepted by the GND driver and categorized by data type. Paging files and temporary files cached in DRAM are optionally written to flash.
US09223639B2 In place object reconstruction
Updating an implementation object is disclosed. A proxy is configured to provide access to a first implementation object that is used to manage an item of content included in a collection of managed content. The first implementation object is replaced with a second implementation object. The proxy is associated with the second implementation object.
US09223632B2 Cross-cloud management and troubleshooting
A cloud management system is described herein that provides the ability for an application to span two or more clouds while allowing operation, management, and troubleshooting of the distributed application as a single application. The system provides infrastructure that communicates across datacenters for execution and for centralizing knowledge of instances of an application that are running at different locations. The infrastructure provided by the system monitors both the application and connections between the clouds, with intelligence to know if issues are within the application or because of the connection between the clouds. The system coordinates management functions across multiple cloud platforms/locations. Thus, the cloud management system creates a single monitoring and troubleshooting interface and knowledge and execution fabric across multiple clouds so that applications spread across multiple clouds can be monitored, managed, and debugged more easily.
US09223624B2 Processing requests in a cloud computing environment
Embodiments of the present invention provide a distributed approach to request processing. Specifically, in a typical embodiment, a request is received via a cloud dispatcher, which generates and places a corresponding message in a cloud manager queue associated with a set (at least one) of cloud managers. The message is then placed in a cloud node queue associated with a set of cloud nodes that process the message and provide state information related to request processing in an audit queue associated with an audit database. In addition, cloud manager state information is placed in a dispatcher queue associated with the cloud dispatcher. This state information is used by the cloud dispatcher to determine where to place incoming requests. Under these embodiments, each cloud resource runs self-contained management code and performs actions by receiving instructions from a queue. Thus, the messages may be directed to a specific resource or broadcasted to a “pool” of resources of which any resource can take the request and process it.
US09223623B2 Dynamic service resource control
The embodiments may provide a data processing apparatus for controlling service resource allocation. The data processing apparatus including a resource hints controller configured to obtain a resource control request before a task is to be executed on a virtual machine having resources allocated to a processing unit, a memory unit and a storage unit. The resource hints controller is configured to obtain a usage of the resources allocated to at least one of the processing unit, the memory unit and the storage unit of the virtual machine, and increase the resources allocated to the at least one of the processing unit, the memory unit and the storage unit in response to the resource control request based on the usage being equal to or above a threshold level.
US09223621B1 Organizing content using pipelines
A transcoding service is described that is capable of transcoding or otherwise processing content, such as video, audio or multimedia content, by utilizing one or more pipelines. A pipeline can enable a user to submit transcoding jobs (or other processing jobs) into an available pipeline, where a transcoding service (or other such service) assigns one or more computing resources to process the jobs received to each pipeline. The transcoding service and the pipelines can be provided by at least one service provider (e.g., a cloud computing provider) or other such entity to a plurality of customers. A service provider can also provide the computing resources (e.g., servers, virtual machines, etc.) used to process the transcoding jobs from the pipelines.
US09223617B2 Methods and systems for migrating networked systems across administrative domains
Systems and methods for determining whether networked system migrations are successful are disclosed. In accordance with one method, a first set of properties of the networked system on a source platform in a first administrative domain is determined. Further, the method includes transferring the networked system to a destination platform in a second administrative domain. In addition, a second set of properties of the transferred system on the destination platform is determined, where the first and second sets of properties include functional properties and at least one of: performance properties, security properties or reliability properties. The method also includes outputting an indication that the transfer of the system to the destination platform is successful in response to determining that one or more of the properties of the second set are equivalent to corresponding properties of the first set.
US09223609B2 Input/output operations at a virtual block device of a storage server
Example embodiments disclosed herein relate to input/output (I/O) operations at a virtual block device of a storage server. Example embodiments include requesting an input/output (I/O) operation at an offset of a virtual block device of a storage server in response to a virtual machine request for an I/O operation at a virtual disk.
US09223606B1 Automatically configuring and maintaining cluster level high availability of a virtual machine running an application according to an application level specified service level agreement
A process running on a virtual machine determines an application level specified SLA, according to which an application is to be made available. The virtual machine level process transmits the SLA to a process running on a cluster infrastructure. The cluster infrastructure level process uses high-availability cluster functionality to configure the cluster infrastructure to make the application available as specified by the SLA. Where the SLA specifies failover support for the virtual machine on which the application is running, nodes of the cluster infrastructure are made available for this purpose. The application is thus made available as specified by the SLA. This can be done without requiring an application administrator to have access to the cluster infrastructure, or participation by an infrastructure administrator.
US09223601B2 Control device, control method, and non-transitory computer-readable storage medium for a virtual system deployment
A control device includes a memory and a processor coupled to the memory, wherein the processor executes a process comprising determining the order of setting of operating conditions which are set to a plurality of virtual machines and make the virtual machines operate, respectively, in accordance with processing dependency between software executed by the plurality of virtual machines and first setting the respective operating conditions of the virtual machines in the setting order at the determining.
US09223597B2 Archiving virtual machines in a data storage system
The data storage system according to certain aspects can manage the archiving of virtual machines to (and restoring of virtual machines from) secondary storage. The system can determine whether to archive virtual machines based on usage data or information. The usage information may include storage usage, CPU usage, memory usage, network usage, events defined by a virtual machine software or application, etc. The system may archive virtual machines that are determined to have a low level of utilization. For example, a virtual machine can be archived when its usage level falls below a threshold level. The system may create a virtual machine placeholder for an archived virtual machine, which may be a “light” or minimal version of the virtual machine that acts as if it is the actual virtual machine. By using a virtual machine placeholder, a virtual machine may appear to be active and selectable by the user.
US09223595B2 Mechanism for comparison of disparate data in data structures
A device receives a first result that includes first data, and a second result that includes second data, and determines whether a comparator supports the first data and the second data. When the comparator supports the first data and the second data, the device utilizes the comparator to select comparison logic for the first data of the first result and for the second data of the second result, compares the first result and the second result, using the selected comparison logic, to determine whether the first result is equivalent to the second result, and outputs or stores the determination of whether the first result is equivalent to the second result.
US09223594B2 Plug-in installer framework
There is provided a system and method for providing a plug-in installer framework. The method includes creating an installer plug-in and reading configuration information with the installer plug-in. An application server may be contacted by the installer plug-in to determine which plug-in files to update in local storage. The updated plug-in files may be downloaded from an application server to local storage, and additional plug-ins may be created within the installer plug-in from the plug-in files in local storage. The additional plug-ins may be loaded through the installer plug-in within a host application.
US09223590B2 System and method for issuing commands to applications based on contextual information
A system and method for issuing commands to an application based on contextual information. A control application receives an indication that a text manipulation event has occurred in a user interface of a second application. Next, the control application queries the second application to obtain contextual information established by the second application prior to the event, the contextual information providing context to the text manipulation event that occurred in the user interface of the second application. The control application then issues one or more commands to the second application based on the contextual information providing context to the text manipulation event.
US09223589B2 Smooth layout animation of visuals
A declarative animation system allows a designer to declaratively specify transitory behavior of a user interface or other visual display by recognizing changes in an underlying data model that spans visual elements. A visual display is typically comprised of one or more visual elements, as well as an underlying data model. Although animating within a particular visual element is typically straightforward, moving items across visual elements typically involves sophisticated programming logic. However, using the declarative animation system, visual elements can be associated with an underlying data model in a manner that allows the visual display layer to recognize and respond to changes in the underlying data model. This association can also be leveraged to allow automatically generated animation between visual elements without the addition of custom programmatic code. Thus, the declarative animation system allows designers to specify intuitive, graphically sophisticated interfaces without programming knowledge.
US09223584B2 Information processing apparatus, restoring method of BIOS setup, restoring program
An information processing apparatus compares a first device model information of the information processing apparatus with second device model information stored in a nonvolatile memory unit being externally connected to the information processing apparatus, and compares first device identification information of the information processing apparatus with second device identification information stored into the nonvolatile memory unit based on detection of a boot-up. When the device model information comparison process is determined to be identical and when the device identification information comparison process is determined to be non-identical, the information processing apparatus reads out second BIOS setup value stored in the nonvolatile memory unit and replaces with the first BIOS setup value stored in the BIOS information memory unit.
US09223580B2 Systems, methods and computer products for cross-thread scheduling
Systems, methods and computer products for cross-thread scheduling. Exemplary embodiments include a cross thread scheduling method for compiling code, the method including scheduling a scheduling unit with a scheduler sub-operation in response to the scheduling unit being in a non-multithreaded part of the code and scheduling the scheduling unit with a cross-thread scheduler sub-operation in response to the scheduling unit being in a multithreaded part of the code.
US09223579B2 Handling atomic operations for a non-coherent device
In one embodiment, the present invention includes a method for receiving a non-coherent atomic request from a device coupled to an agent via a non-coherent link, accessing a mapping table of the agent to convert the non-coherent atomic request into a coherent atomic request, and transmitting the coherent atomic request via a coherent link to a second agent coupled to the agent to cause the second agent to be a completer of the non-coherent atomic request. Other embodiments are described and claimed.
US09223575B2 Processor exploiting trivial arithmetic operations
The present application relates to the field of processors and in particular to the carrying out of arithmetic operations. Many of the computations performed by processors consist of a large number of simple operations. As a result, a multiplication operation may take a significant number of clock cycles to complete. The present application provides a processor having a trivial operand register, which is used in the carrying out of arithmetic or storage operations for data values stored in a data store.
US09223572B2 Interleaving half of packed data elements of size specified in instruction and stored in two source registers
An apparatus includes an instruction decoder, first and second source registers and a circuit coupled to the decoder to receive packed data from the source registers and to unpack the packed data responsive to an unpack instruction received by the decoder. A first packed data element and a third packed data element are received from the first source register. A second packed data element and a fourth packed data element are received from the second source register. The circuit copies the packed data elements into a destination register resulting with the second packed data element adjacent to the first packed data element, the third packed data element adjacent to the second packed data element, and the fourth packed data element adjacent to the third packed data element.
US09223569B1 Automatic software catalog content creation based on bio-inspired computing prediction
A computer system for automatically creating a software catalog content that includes a plurality of software components associated with a computing system is provided. The computer system may include creating a population comprising a plurality of potential software signatures associated with the plurality of software components. The computer system may include ranking the population based on a highest ratio value. The computer system may include selecting a set of parent software signatures based on the ranking. The computer system may include creating a new population of potential software signatures based on the selected set of parent software signatures. The computer system may include performing recombination on the new population of potential software signatures. The computer system may include predicting at least one potential software signature from the new population of potential software signatures based on a comparison between the performed recombination and the created new population of potential software signatures.
US09223567B2 Integrated exchange of search results in an integrated software development environment
In a method for sharing computer-generated search results, in an integrated development environment (IDE), a first computer inserts, into a message, a portion of search results of a search of one or more files accessible via the IDE. The portion of the search results includes a user-selectable file name. The first computer inserts metadata into the message. The metadata includes an identifier of a version of the file. The first computer displays the message in a graphical window such that the search results are visible in the graphical window and the metadata is invisible in the graphical window. The first computer sends the message to a second computer.
US09223564B2 Update systems responsive to ongoing processing at a storage system
Methods and systems for updating devices of a storage system are provided. The system comprises a management system and at least one client system. The management system contacts a network-accessible portal providing updates for firmware residing on storage system devices. The client system is coupled for communication with the management system and comprises one or more storage system devices. The management system acquires version information for the storage system devices of the client system, and compares the version information for the storage system devices to version information accessible via the portal to determine whether to download updates from the portal. The client system downloads an update from the management system, determines a volume of activity at a storage system device, and pushes the update to the storage system device if the volume of activity is below a threshold.
US09223561B2 Method for providing an on-demand software execution service
A method for providing an on-demand software execution service has the following steps: receiving from at least one terminal, at least one request for executing at least one software package, by a virtual machine launched on a virtual machine launching server from files from a set of files for launching virtual machines, and selecting from a set of servers at least one server to which the request will be directed, according to a rule for distributing the execution load of virtual machines by servers of the set of servers.
US09223554B1 Recovering source code structure from program binaries
Recovering structure from binaries is disclosed. A binary file having components including a plurality of linker objects is received. A cross reference map of linker objects is created. The linker objects are associated based on calls. An address space distance for each call is determined. Boundaries are defined in the cross reference map based on the address space distance. Subsets are defined as portions of the file that are separated by the boundaries.
US09223552B2 Compiling optimization of an application and compiler thereof
One aspect is a method for compiling optimization of an application and a compiler thereof. The method includes determining could-be-constant variables in source code of the application. Constant variables designated as final constant variables and values of the constant variables are obtained using the could-be-constant variables. The application is compiled using the constant variables and the values of the constant variables.
US09223547B1 Audio input for structured languages
Techniques are described for generating text in a structured language, such as source code in a programming language, based on audio input. Audible tokens may be associated with higher-level constructs, including design elements such as methods, classes, design patterns, and so forth. Additionally, audible tokens may be associated with lower-level syntactic constructs of a programming language, such as programming language keywords, tokens, and so forth. Techniques may receive and parse the audio input including the audible tokens, and generate source code output. Techniques may also provide audio information indicating a development context that may otherwise be indicated visually in a development environment.
US09223545B2 Modified fixed-point algorithm for implementing infrared sensor radiation equation
A system including an integrated circuit chip also includes a microcontroller in the chip and an algorithm for execution by the microcontroller. The algorithm includes addition, subtraction, and multiplication operators (e.g. 25,15,20) and shift-left and shift-right operators (e.g., 48,21) configured for solving particular equations (Eqns. 1-4). Input numbers are within particular ranges to allow the shift operators to shift binary bits so each number so it fits within a register of a particular width. An IR sensor (4) may convert IR radiation (3) to produce a voltage (Vobj) representing the temperature (Tobj) of an IR emitting object (2). The algorithm (100) operates in conjunction with the microcontroller (7) to convert the voltage (Vobj) into a value representing the temperature (Tobj) of the remote object (2) without keeping track of decimal points and resolution of the numbers.
US09223538B2 Interactive sound reproducing
An audio system attachable to a computer includes a sound reproduction device for producing audible sound from audio signals. The sound reproduction device includes a radio tuner and a powered speaker. The audio system further includes a connector for connecting the sound reproduction device with a computer. The computer provides audio signals from a plurality of sources, the sources including a computer CD player, digitally encoded computer files stored on the computer, and a computer network connected to the computer. The sound reproduction device further includes control buttons for controlling at least one of the computer CD player, the digitally encoded computer files and the computer network.
US09223535B2 Smartpad smartdock
A multi-display device is adapted to be dockable or otherwise associatable with an additional device. In accordance with one exemplary embodiment, the multi-display device is dockable with a smartpad. The exemplary smartpad can include a screen, a touch sensitive display, a configurable area, a gesture capture region(s) and a camera. The smartpad can also include a port adapted to receive the device. The exemplary smartpad is able to cooperate with the device such that information displayable on the device is also displayable on the smartpad. Furthermore, any one or more of the functions on the device are extendable to the smartpad, with the smartpad capable of acting as an input/output interface or extension of the smartpad. Therefore, for example, information from one or more of the displays on the multi-screen device is displayable on the smartpad.
US09223530B2 Multi-tiered constraint checking for managing print jobs
A method implemented in a print job management apparatus for processing print jobs in a multiple-printer print shop environment is described. When an operator manually assigns a print job to a printer, the print job requirements are compared with capabilities of the printer to detect any constraints (i.e. incompatibilities between printer capabilities and print job requirements). The job is printed if no constraint is detected. If a constraint of a first category is detected (e.g. incompatible color capabilities, paper size and type, layout, etc.), printing will not proceed and an error message is displayed. If a constraint of a second category is detected (e.g. inadequate finishing capabilities), a warning message is displayed with a request for operator instruction regarding whether to proceed with printing. If the operator chooses to proceed, the job will be printed, and a banner page containing instructions regarding uncompleted job requirements is generated.
US09223520B2 External memory controller node
A memory controller to provide memory access services in an adaptive computing engine is provided. The controller comprises: a network interface configured to receive a memory request from a programmable network; and a memory interface configured to access a memory to fulfill the memory request from the programmable network, wherein the memory interface receives and provides data for the memory request to the network interface, the network interface configured to send data to and receive data from the programmable network.
US09223518B1 Method and system for remote cache direct data placement
Method and system for processing a read request are provided. The first adapter receives the read request from a client to read data using a logical object managed by a second adapter. The first adapter is configured to generate a vendor unique command descriptor block for the second adapter to obtain the data and write the data at a location specified by the read request. The second adapter is configured to retrieve the data from a storage location specified by the logical object and writing the data at the location specified by the read request; and notifies the first adapter after writing the data.
US09223514B2 Erase suspend/resume for memory
An apparatus includes an input/output (I/O) interface configured to couple a controller to an I/O buffer of a memory device. The controller includes an erase module coupled to the I/O interface. The erase module is configured to issue an instruction to the memory device to erase data from the memory device. The controller includes an erase suspend module coupled to the I/O interface. The erase suspend module is configured to determine that an erase operation executing within the electronic memory device satisfies a suspend policy in response to receiving a memory access request to perform an operation on the memory device on which the erase operation is executing. The erase suspend module is further configured to issue a suspend command to the memory device to suspend the erase operation.
US09223513B2 Accessing data in a dual volume data storage system using virtual identifiers
A data storage system, and a method for accessing data in a data storage system, wherein the data storage system comprises at least a first volume and a second volume, and the first volume and the second volume remain consistent by a synchronous copy relationship, the method comprising: setting a virtual unique identifier of the second volume as a unique identifier of the first volume; creating a first path from a host to the first volume and a second path from the host to the second volume by using the unique identifier of the first volume; accessing data by using the first path from the host to the first volume; and setting the second path from the host to the second volume as unavailable.
US09223512B2 System and method for predicting backup data volumes
A method and system for predicting the managed backup occupancy of a backup system are disclosed. The method includes determining the variables m0, x1 to xn, r and z1 to zn. Variable m0 is the current managed backup occupancy of the backup system, x1 to xn are the expected occupancies of backups taken by the backup system per predetermined time period T with retention periods of 0-1 time periods T, 1-2 time periods T, 2-3 time periods T and so on up to n time periods T respectively, r is the expected growth rate of a protected data volume of the backup system per time period T, and z1 to zn are the data volumes of existing backups that are expected to expire within each of the first to nth time periods T after the current time respectively.
US09223511B2 Data deduplication
The present disclosure includes devices and methods for data deduplication. One such method includes receiving a write command, transforming data associated with the write command, determining if a transformation value of the data exists in a transformation table, and responsive to a determination that the transformation value does not exist in the transformation table, writing the data associated with the write command to a memory device.
US09223510B2 Optimizing storage utilization by modifying a logical volume offset
Methods, apparatus and computer program products implement embodiments of the present invention that include arranging a first multiple of storage slices to store a second multiple of logical volumes, and assigning a respective offset to each of the logical volumes. Each of the logical volumes are then configured to start storing data at a first of the storage slices indicated by the assigned respective offset. In operation, data can be stored to a slice indicated by the assigned offset and an internal volume offset. Subsequent to configuring each of the logical volumes, one the storage slices having a highest storage utilization is identified, and one of the logical volumes having a highest number of physical regions in the identified storage slice is reconfigured to start storing the data at a second of the storage slices.
US09223509B2 File processing method and storage device
A file processing method and a storage device are disclosed. In the method, a storage device receives T files that are to be stored in the RAID, and determines a sequence number of a check block of a stripe of the RAID. The storage device obtains a data block of the Kth file in the T files as the Kth data block of the stripe, where a value of K progressively increases from 1 to T, and the value of K is not equal to the sequence number of the check block of the stripe. After computing the check block according to data blocks, the storage device writes, into the T disks, the data blocks and the obtained check block of the stripe. Using the foregoing method, one file can be written into one disk of the RAID while ensuring security of file storage.
US09223502B2 Method of migrating stored data and system thereof
There is provided a storage system and a method of moving a source data portion from a source logical volume to a destination logical volume. The method comprises: configuring a source mapping data structure to comprise an entry indicative of mapping between logical addresses corresponding to source data portion and addresses corresponding to source data portion and related to a physical address space; and, responsive to a move command, providing an atomic operation comprising configuring a destination mapping data structure to comprise an entry associated with said at least one destination range and comprising a reference to said entry in the source mapping data structure; and configuring said at least one entry in the source mapping data structure DSsrc to bear an indication that said one or more contiguous ranges of addresses corresponding to said source data portion in the source logical volume Vsrc are unavailable to a client.
US09223498B2 Method for setting and method for detecting virtual key of touch panel
A method for setting and a method for detecting a virtual key of a touch panel are provided. The method for setting the virtual key of the touch panel includes the following steps. A setting interface is provided. A key function is received via the setting interface by a processor. A key area is received via the setting interface by the processor. The key function and the key area are stored in a register. The register corresponds to the virtual key.
US09223497B2 In-context word prediction and word correction
Methods and systems for predicting user input on a keyboard. Methods include enabling user input on a display comprising at least three fields. The first field displays an input string that is based on input selections such as keyboard entries. The second field displays a candidate prediction generated based on other input selections, consisting at least in part of a proposed completion to the input selection, and partially based on the input string in the first field. The third field displays another candidate prediction generated based on the input string in the first field as well as the candidate prediction in the second field.
US09223494B1 User interfaces for wearable computers
A method for operating a wearable computer using a user interface system having a touch pad includes changing the behavior of the wearable computer in direct response to gestures received at the touch pad. The gestures are not used for graphical user interface selections and are not used for cursor operations but rather directly invoke communication, navigation, machinery operation, or other primary device features or operations.
US09223489B2 Method and apparatus for gesture based copying of attributes
A method and apparatus for copying of attributes of user interface (UI) elements on a touch screen display is disclosed. The method comprises detecting a gesture of a plurality of predefined gestures made on a UI element displayed on a touch screen display, wherein the gesture selectively signifies at least one attribute to copy; determining a source UI element based on the gesture; determining the at least one attribute to copy based on the gesture; and applying the determined attribute from the source UI element to a target UI element displayed on the touch screen display.
US09223487B2 Electronic apparatus, method of controlling the same, and related computer program
Objects are indicated on a display. A touch panel is superposed on the display. An acquiring section operates for detecting user's touches to the touch panel and acquiring positions of the user's touches to the touch panel as touch positions. A decision is made as to whether or not the distance between first and second touch positions decreases in accordance with the lapse of time. A selecting section operates for setting a rectangular area with respect to the display and selecting an object or objects contained in the rectangular area in cases where it is decided that the distance between the first and second touch positions decreases in accordance with the lapse of time. Two opposite corners of the rectangular area are respectively coincident with the first and second touch positions occurring at an initial stage of the user's touches to the touch panel.
US09223482B2 Characterizing states of subject
Among other things, a user of a browser is exposed simultaneously to three interfaces: A viewing interface for at least one image of a subject that is stored on a device on which the browser is running, a decision support interface that aids the user in determining the state of the subject based on the image, and a template interface that aids the user in capturing uniform descriptive information about the state of the subject. At least two of the viewing interface, the decision support interface, and the template interface operate cooperatively so that actions of the user with respect to one of the two interfaces causes changes in content exposed by the other of the two interfaces.
US09223481B2 Method and apparatus for customizing map presentations based on mode of transport
An approach is provided for customizing map presentations based on mode of transport. A map customizing platform determines a mode of transport with respect to a mapping service. The map customizing platform then selects one or more characteristics for rendering a map display of the mapping service based, at least in part, on the mode of transport and causes, at least in part, rendering of the map display based, at least in part, on the characteristics.
US09223479B2 Communicating plans for users of a social networking system
Exemplary systems and methods for calendaring are provided. Exemplary systems include a natural language receiving component configured to receive a natural language entry corresponding to a future status, a calendar generation engine configured to create a calendar entry based on the natural language entry, a social network database configured for accessing and querying by the calendar generation engine, a privacy component configured to receive a privacy setting indicating a person who is approved to view the calendar entry, and a display module configured to display the calendar entry on a calendar. Exemplary methods include receiving a natural language entry corresponding to a future status, creating a calendar entry, and displaying the calendar entry.
US09223477B2 Command user interface for displaying selectable software functionality controls
An improved user interface is provided for displaying selectable software functionality controls and for presenting logical groupings of particular functionality controls associated with a selected top-level functionality. Underneath a row of top-level functionality tabs, functionalities controls associated with a given top-level functionality tab are presented in logical groupings. Selection of a particular tab switches modes of the user interface to present controls for functionalities associated with the selected tab.
US09223475B1 Bookmark navigation user interface
A user interface for a touch-screen display of an electronic book reader device is described. The user interface has a bookmark feature designed to facilitate navigation through bookmarked locations in digital content items, such as electronic books, in response to use input via the touch-screen display. Further, the user interface provides a split progress indicator with separate portions presented in different areas of the display. The portions of the indicator are configured to represent proportions of content that comes before and after the current location being displayed.
US09223473B2 Supplemental services interface
Examples are described for integrating interface functionality with other experiences. For example, if a user is interested in a particular item of scheduled or on-demand content (e.g., a television series episode), the user may also be interested in a web page devoted to the television series and/or other extras such as cast interviews, news, related theme apps, and the like. These types of experiences may be integrated into an interface by presenting the experiences as supplemental services that may be presented and/or selected.
US09223472B2 Closing applications
Application closing techniques are described. In one or more implementations, a computing device recognizes an input as involving selection of an application displayed in a display environment by the computing device and subsequent movement of a point of the selection toward an edge of the display environment. Responsive to the recognizing of the input, the selected application is closed by the computing device.
US09223471B2 Touch screen control
This document relates to touch screen controls. For instance, the touch screen controls can allow a user to control a computing device by engaging a touch screen associated with the computing device. One implementation can receive at least one tactile contact from a region of a touch screen. This implementation can present a first command functionality on the touch screen proximate the region for a predefined time. It can await user engagement of the first command functionality. Lacking user engagement within the predefined time, the implementation can remove the first command functionality and offer a second command functionality.