| Document | Document Title |
|---|---|
| US09215308B2 |
Mobile terminal and control method thereof
Disclosed are a mobile terminal and a control method thereof. The mobile terminal includes a radio communication unit, a memory storing one or more applications each including one or more tasks, and a controller performing a specific operation corresponding to the one or more tasks and generating at least one stack by placing in turn the one or more tasks on top of one another. The at least one stack is sent to at least one another electronic device through the radio communication unit such that a task included in the stack is executed in the at least one another electronic device. The stack generated by the mobile terminal can share the stack with another electronic device. |
| US09215305B2 |
Voice-operated interface for DTMF-controlled systems
An arrangement for allowing “hands-free” access to DTMF-controlled systems, such as one's voice mail messaging systems, utilizes a speech-to-DTMF tone application that monitors the communication between the user and the DTMF-controlled system. A speech recognition unit is utilized to retrieve certain voice commands (e.g., “next”, “skip”, “repeat”, “forward”, etc.) when uttered by the user. The application then translates the received commands into the proper DTMF tone sequence used by the DTMF-controlled system and transmits the DTMF tones to the system. The application is particularly useful in the cell phone environment and avoids the necessity of the user to constantly switch between using the keypad and listening to messages/commands from the system. |
| US09215304B2 |
Data store and enhanced features for headset of portable media device
A media headset for exchanging data with a media device includes at least one audio speaker that provides an audio output, a data store that stores media device data, a communications interface for exchanging the media device data with the media device, and a connector for detachably connecting the communications interface to the media device. |
| US09215291B2 |
Device and method for UE aggregate maximum bit rate
A policy control node, a PCN, for a first PLMN, the PCN comprising a PCRF, the PCN having an interface towards an SPR/UDR, in the first PLMN, the PCRF of the PCN being arranged to receive a request from another node in the first PLMN or in a second PLMN for establishing a PDN-connection for a UE. The PCRF is arranged to, as a result of said request, send a query to the SPR/UDR regarding whether or not the PCRF is allowed to set the upper limit for the UE-AMBR for the UE, the PCRF being arranged to, if the reply from the SPR/UDR to the query is positive, determine and transmit the upper limit of the UE-AMBR for the UE to said other node. |
| US09215288B2 |
Methods and apparatus to share online media impressions data
Methods and apparatus to share online media impression data are disclosed. An example method includes sending a response to a request, the response including an identification of a first cookie used by an audience measurement entity and an indication of a database proprietor, and receiving a mapping of the first cookie to a second cookie used by the database proprietor and demographic information associated with the second cookie by the database proprietor. |
| US09215284B2 |
Method and apparatus for providing service based on component using personal network
Provided are a method and an apparatus for providing a service based on Personal Network Entity (PNE) components and resources within an apparatus without implementing a function of generating and managing a service group only in a case in which a plurality of PNEs provide a similar function by providing a function of generating and managing the service group based on components included in a network apparatus or resources with the apparatus in an environment providing a Converged Personal Network Service (CPNS) service. Accordingly, it is possible to avoid inefficient overlapping developments and operations and prevent resources from being wasted. |
| US09215281B2 |
Method and apparatus for setting programmable features of an appliance
An interactive interface facilitates the setting of preferences and other programmable parameters of an appliance. The interface is hosted by a server on a global computer network. The appliance owner initiates a connection to the server and is presented with a graphical user interface for setting the preferences and features of the appliance. Once the desired settings have been made, they are downloaded to the appliance either directly from the server or the appliance owner's computer or indirectly using a portable transfer device. |
| US09215279B1 |
Servicing of storage device software components of nodes of a cluster storage system
Described herein are method and apparatus for servicing software components of nodes of a cluster storage system. During data-access sessions with clients, client IDs and file handles for accessing files are produced and stored to clients and stored (as session data) to each node. A serviced node is taken offline, whereby network connections to clients are disconnected. Each disconnected client is configured to retain its client ID and file handles and attempt reconnections. Session data of the serviced node is made available to a partner node (by transferring session data to the partner node). After clients have reconnected to the partner node, the clients may use the retained client IDs and file handles to continue a data-access session with the partner node since the partner node has access to the session data of the serviced node and thus will recognize and accept the retained client ID and file handles. |
| US09215278B2 |
Interconnect delivery process
A method for enforcing data integrity in an RDMA data storage system includes flushing data write requests to a data storage device before sending an acknowledgment that the data write requests have been executed. An RDMA data storage system includes a node configured to flush data write requests to a data storage device before sending an acknowledgment that a data write request has been executed. |
| US09215277B2 |
Resource sharing method and device, and storage medium
Disclosed are a resource sharing method and device, and a storage medium. The technical solution in the embodiments of the present invention is applied to use a relationship chain to perform authentication control. When a resource download link is generated, corresponding relationship chain information is added into the link, and the resource download link is recorded and sent by a sharing server. When a user needs to perform downloading according to the received resource download link, authentication is performed on the user according to the relationship chain information. Only users who have the friendly relationship corresponding to the relationship chain are permitted to download specific contents, thereby introducing a controlled resource sharing mechanism in the existing download platform system, controlling contents to be legally and orderly spread, and at the same time enabling the resource spreading process to be traced. |
| US09215271B2 |
Method and apparatus for executing application of mobile device
An apparatus and method for executing an application within a mobile device is provided. The method includes receiving, at a first device, a message from a second device external to the first device, the message including an application identifier; executing, at the first device, at least one application among a plurality of applications based at least in part on the application identifier; and performing, at the first device, a function of the at least one application based at least in part on a command received from the second device. |
| US09215269B2 |
Predictive caching for content
Disclosed are various embodiments for predictive caching of content to facilitate instantaneous use of the content. If a user is likely to commence use of a content item through a client, and if the client has available resources to facilitate instantaneous use, the client is configured to predictively cache the content item before the user commences use. In doing so, the client may obtain metadata for the content item and an initial portion of the content item from a server. The client may then initialize various resources to facilitate instantaneous use of the content item by the client based at least in part on the metadata and the initial portion. |
| US09215267B2 |
Adaptive streaming for content playback
Streamed content that is a subset of a set of content is received. Further, the streamed content is stored. In addition, at least a portion of the streamed content is played. A request to download a remainder of the set of content is received. Further, a download bitrate is selected. In addition, the remainder of the set of content is received according to the download bitrate. |
| US09215261B2 |
Method and system for providing media programming
A method of generating media programming includes the steps of providing by an aggregator to a client a list of feeds; receiving by the aggregator from the client a selection of one of the feeds; receiving by a publisher from the aggregator the feed selection; and providing to the client media programming based on a publisher-initiated feed responsive to the feed selection and including media elements selected and concatenated with the feed responsive to the client information. |
| US09215257B2 |
Terminal device and method for exchanging VoIP signaling
A terminal device capable of creating a group for allowing other terminal devices to join the group is provided. When a terminal device not belonging to the group calls a terminal device in the group, any of the terminal devices in the group can answer the call in response a user input. A method for exchanging voice over Internet protocol (VoIP) signaling between the terminal devices within the group is also provided. |
| US09215256B2 |
Updating contact information for client devices registered to the same user for an internet protocol multimedia subsystem service
In an embodiment, a single registrar component of an Internet Protocol (IP) Multimedia Subsystem (IMS) network, receives a request to register a client device associated with a user to an IMS service. The single registrar component sends an acknowledgment to the request that indicates an assignment of device-specific routing identifier(s) (e.g., GRUUs) for the client device. The acknowledgment is further configured to include an indication other device-specific routing identifier(s) for other client device(s) that have already registered to the IMS service in association with the same user. |
| US09215252B2 |
Methods and apparatus to identify privacy relevant correlations between data values
Methods, apparatus, systems and articles of manufacture are disclosed to identify privacy relevant correlations between data values. An example disclosed apparatus includes a principal monitor to identify a first privacy value associated with a first principal, a tuple manager to build a probability tuple matrix comprising a first tuple and a plurality of second tuples, the first tuple including the first principal and the associated first privacy value, and an Eigenvector engine to evaluate the probability tuple matrix to identify a dominant Eigenvector indicative of a correlation between the first privacy value and one of the plurality of second tuples. |
| US09215249B2 |
Systems and methods for distributed trust computing and key management
Devices, systems, and methods for conducting trusted computing tasks on a distributed computer system are described. In some embodiments, a client device initiates a trusted task for execution within a trusted execution environment of a remote service provider. The devices, systems, and methods may permit the client to evaluate the trusted execution capabilities of the service provider via a planning and attestation process, prior to sending data/code associated with the trusted task to the service provider for execution. Execution of the trusted task may be performed while enforcing security and/or compartmentalization context on the data/code. Systems and methods for managing and exchanging encryption keys are also described. Such systems and methods may be used to maintain the security of the data/code before during, and/or after the execution of the trusted task. |
| US09215248B1 |
User access rate limiting among content delivery nodes
Systems, methods, and software for operating one or more content delivery nodes (CDN), which cache content for delivery to end users, are provided herein. In one example, content requests received from at least a first end user for the content at a first CDN are monitored to determine when the content requests comprise an attack on the first CDN. Responsive to the attack on the first CDN, a rate limit is established in the first CDN on at least the content requests received by the first CDN and an indication of the attack is transferred for delivery to at least a second CDN. Responsive to the indication of the attack, the rate limit is applied for further content requests received for the content at the second CDN. |
| US09215246B2 |
Website scanning device and method
The invention discloses a website scanning apparatus for performing a security vulnerability scanning on a target website, which apparatus comprises: a web page obtaining component obtaining current content and/or features of a web page corresponding to a link to be processed; a link processing component including a change judgment device for judging whether the web page corresponding to the link to be processed has been changed based on stored web page content and/or features corresponding to the link to be processed as well as the current web page content and/or features of the link to be processed; and a vulnerability detecting component for performing a security vulnerability detection on a web page corresponding to a link to be processed for which the web page has been changed. The invention also discloses a website scanning method corresponding thereto. |
| US09215245B1 |
Exploration system and method for analyzing behavior of binary executable programs
Systems and methods for automatically analyzing and predicting behavior of binary executable programs are provided. A virtual machine receives a URL or content based feature corresponding to a binary executable program and the virtual machine analyzes the behavior of the binary executable program. The safety information of the binary executable program is determined based on the analysis report generated by the virtual machine and its impact on the virtual machine. A binary explorer selects a URL or content based feature corresponding to the binary executable program to be analyzed. A binary analyzer automatically records the behavior of the binary executable program to generate a report containing safety information describing the interaction occurred between the binary executable program and the analysis virtual machine. A result interpreter determines and predicts whether the binary executable program is safe based on the information generated by the binary analyzer. |
| US09215235B1 |
Using events to identify a user and enforce policies
Enforcing a policy is described. A mapping between an IP address of a device and a user identity is identified, at least in part by correlating event information. A policy is applied to the device based at least in part on the user identity. One example of an event is an access to a mail server, such as an access to a Microsoft Exchange server. |
| US09215230B2 |
Method for authentication, RF chip document, RF chip reader and computer program products
An authentication method for trusted communication between a first party (A) and a second party (B) is intended to be efficient and secure.For this purpose, provision is made to combine password-based authentication and certificate-based authentication. For certificate-based authentication, the first party (A) has a static key pair consisting of a private static key and a public static key and a certificate for the public static key issued by a certification body (C). The certification body (C) is assigned a public key which is known by the second party (B). During the certificate-based authentication, the party A calculates a transformation between its own ephemeral key pair from the password-based authentication and its own static key pair from the certificate-based authentication so as to obtain a transformation parameter for carrying out the transformation. The practice of reusing the party's own ephemeral key pair from the password-based authentication in the certificate-based authentication reduces the overall calculation and communication complexity, on the one hand, and links the two protocols, on the other hand, thus ensuring that both protocols are executed by the same party. This increases the security while simultaneously reducing the complexity.The novel method is suitable for authenticating electronic passports. |
| US09215224B2 |
Automated security token administrative services
This invention provides a system, method and computer program product to allow a user to access administrative security features associated with the use of a security token. The administrative security features provide the user the ability to unlock a locked security token, diagnose a security token, activate and deactivate a security token, request a replacement security token or temporary password or report the loss of a security token. The invention comprises a client application which integrates into the standard user login dialog associated with an operating system. A portion of the user dialog is linked to a remote server to access the administrative services. |
| US09215223B2 |
Methods and systems for secure identity management
A method for authorizing a virtual identity using an access device may include sending, from an access device, a request to a resource through a network. The method may also include accessing a resource challenge that is acceptable to the resource and sending the resource challenge to an identity repository. The method may additionally include receiving, from the identity repository, a first signed resource challenge and signing the resource challenge to generate a second signed resource challenge. The method may further include sending an authorization for the virtual identity to the resource through the network. The authorization may include the first signed resource challenge and the second signed resource challenge. |
| US09215221B2 |
Method for implementing local routing of traffic, base station and system
Embodiments of the present invention provide a method for implementing local routing of traffic, a base station and a system are provided, which relate to the field of communications technologies. The method for implementing local routing of traffic includes: judging whether local routing processing is performed on an uplink traffic flow of a first terminal that serves as a sending end; if it is judged as yes, updating a key of the uplink traffic flow of the first terminal and/or a key of a downlink traffic flow of a second terminal that serves as a receiving end to a public key; forwarding an encrypted data packet of the uplink traffic flow of the first terminal to the second terminal through the downlink traffic flow of the second terminal, where an encryption and decryption operation is not performed on the encrypted data packet before the forwarding or during the forwarding. |
| US09215220B2 |
Remote verification of attributes in a communication network
It is provided an apparatus, comprising property checking means configured to check whether a claimant property information received from a claimant device corresponds to a predefined claimant attribute; obtaining means configured to obtain a result, which is positive only if the claimant property information corresponds to the predefined claimant attribute as checked by the property checking means; key generation means configured to generate a first claimant intermediate key from a predefined claimant permanent key stored in the apparatus; supplying means configured to supply, to the claimant device, the first claimant intermediate key using a secured protocol, wherein at least one of the key generation means and the supplying means is configured to generate and to supply, respectively, the first claimant intermediate key only if the result is positive. |
| US09215219B1 |
Method for protecting data used in cloud computing with homomorphic encryption
A method for protection of cloud computing includes homomorphic encryption of data. Partially or fully homomorphic encryption allows for data within the cloud to be processed without decryption. A partially or fully homomorphic encryption is provided. The proposed scheme can be used with both an algebraic and analytical approaches. A cloud service is implemented on a server. A client encrypts data using fully homomorphic encryption and sends it to the server. The cloud server performs computations without decryption of the data and returns the encrypted calculation result to the client. The client decrypts the result, and the result coincides with the result of the same calculation performed on the initial plaintext data. |
| US09215217B2 |
Auto-discovery of diverse communications devices for alert broadcasting
Methods and systems for communicating messages to target communications devices in a target physical location are disclosed. Network sources are queried for logical locations accessible to the network source. A specification of a physical location associated with each logical location is received. Each logical location specification is stored in a data store in association with the associated physical location specification. A specification of the target physical location is received. Those logical location specifications associated with the target physical location are retrieved from the data store, thereby identifying target logical locations. For each target logical location, at least one of the network sources accessible to that logical location is queried for specifications of communications devices accessible to that logical location, thereby identifying the communications devices in the target physical location. The message is communicated to the target communications devices in the target physical location via at least one of the target logical locations. |
| US09215213B2 |
Method and apparatus for distributing firewall rules
Some embodiments of the invention provide a novel method for specifying firewall rules. In some embodiments, the method provides the ability to specify for a particular firewall rule, a set of network nodes (also called a set of enforcement points below) at which the particular firewall should be enforced. To provide this ability, the method of some embodiments adds an extra tuple (referred to below as the AppliedTo tuple) to a firewall rule. This added AppliedTo tuple lists the set of enforcement points at which the firewall rule has to be applied (i.e., enforced). |
| US09215208B2 |
Network attack offensive appliance
A network system for launching a cyber-offensive countermeasure to improve network security is provided. For example, a system that enables launching a cyber-offensive countermeasure on a network may include a receiving section that receives packets routed on the network and analyzes the received packets to detect an attack directed toward a device on the network when the attack is external to the device, an editing section that edits the received packets, and a transmitting section that transmits the edited packets on the network. |
| US09215207B2 |
Method and apparatus for analysing and monitoring an electronic communication
The present invention relates to a method and apparatus for monitoring electronic communications by way of determining the dialogue that takes place in an electronic communication. In one form the present invention provides a dictionary for analysis of an electronic communication comprising a store of expressions wherein the store of expressions is arranged according to: at least one section, each section corresponding to one of a plurality of grammatical functions; at least one subject, each subject corresponding to one of a plurality of categories of expressions for facilitating monitoring of an electronic communication. The present invention also provides a method and apparatus for monitoring an electronic communication utilising the above dictionary. |
| US09215206B2 |
Subnet prioritization for IP address allocation from a DHCP server
A method, apparatus, and machine readable storage medium is disclosed for handling Dynamic Host Configuration Protocol (DHCP) at a first DHCP server. The method may include receiving, via a configuration file at the first DHCP server, a priority for each of a plurality of subnets; assigning the priority to each of the plurality of subnets; receiving a DHCP Discover message from a client; in response to receipt of a DHCP Discover message from a client, selecting a subnet having a highest priority from said plurality of subnets; selecting an Internet Protocol (IP) address from said selected subnet having a highest priority; and transmitting a DHCP Offer message to said client, offering said selected IP address. |
| US09215199B2 |
Message gateway with hybrid proxy/store-and-forward logic
Described is a technology by which an email filtering service or other gateway includes hybrid proxy and store-and-forward logic. A message is initially processed with proxy logic. If the proxy logic is unable to complete filtering/scanning of a message within a timeout period, the store-and-forward logic is invoked to complete filtering/scanning of the message. The store-and-forward logic also may be invoked if a delivery attempt made by the proxy logic fails or does not complete prior to a delivery timeout period. When such a condition is met, the store-and-forward logic accepts the message, including storing the message, sending a response that indicates the message was accepted, and closing the connection over which the message was received. The store-and-forward logic may complete any scanning if not completed by the proxy logic, and takes over delivery responsibilities. |
| US09215198B2 |
Efficient use of resources in message classification
A system and method are disclosed for routing a message through a plurality of test methods. The method includes: receiving a message; applying a first test method to the message; updating a state of the message based on the first test method; and determining a second test method to be applied to the message based on the state. |
| US09215197B2 |
System, method, and computer program product for preventing image-related data loss
A system, method, and computer program product are provided for preventing data loss associated with an image. In use, an image is identified, and it is determined whether the image includes predetermined data. In addition, an action is performed based on the determination, for preventing data loss. |
| US09215196B2 |
Schema-based dynamic parse/build engine for parsing multi-format messages
A parse/build engine that can handle multi-format financial messages. The engine converts the different format messages into a common format, and the common format message is then processed by the business service application. A parser examines the message and determines an appropriate schema for the particular format of message received. The schema is a data structure in a schema registry that includes a grammar structure for the received format as well as pointers to handlers for converting the different fields of the message into the internal message format using the grammar structure (the “grammar” can include field sequence, field type, length, character encoding, optional and required fields, etc.). The handlers are individually compiled. As formats change, new formats or changes to old formats can be dynamically added to the parse/build engine by loading new schema and handlers. |
| US09215195B2 |
Method and apparatus for message synchronization in instant messaging applications
Implementations of the present invention disclose a message synchronizing method and apparatus in an instant messaging application. The method includes detecting a log-in status corresponding to an instant messaging account currently logged-in through an instant messaging application at a first terminal, receiving a request to update an application state of the instant messaging application, determining if the log-in status is a multi-terminal log-in status, where the multi-terminal log-in status indicates that the instant messaging account is simultaneously logged-in from the first terminal and a second terminal. Upon receiving the request to update the application state of the instant messaging application, when that the log-in status is the multi-terminal log-in status, a message synchronization operation is initiated between the first and second terminals. Otherwise, the log-in status is set to indicate that the instant messaging account is logged-in from the first terminal. |
| US09215188B2 |
System and method for processing network packets received on a client device using opportunistic polling between networking layers
A method for receiving network packets on a client device comprising: initially entering into a first mode of operation in which polling from a network layer to a driver layer is disabled, wherein in the first mode of operations data packets received by the driver layer are pushed up to the network layer; monitoring a load factor defining a current network load on the client device; and entering into a second mode of operation in which polling from the network layer to the driver layer is enabled, wherein when in the second mode of operation, the network layer polling the driver layer when it is ready to accept new packets from the driver layer. |
| US09215184B2 |
Methods of and apparatus for managing non-congestion-controlled message traffic in a datacenter
Managing non-congestion-controlled message traffic in a datacenter. Any non-congestion-controlled packets originating in a sending server and intended for a receiving server are encapsulated in the sending server and transmitted through a virtual circuit having a message transport protocol with rate control. The packets are decapsulated in the receiving server. |
| US09215179B2 |
SDN-based network sharing method and apparatus for supporting multiple operators
A method for performing Software Defined Network (SDN)-based network sharing by a controller to support multiple operators is provided. The method includes configuring a plurality of flow tables in which an independent packet processing operation policy is defined per operator; and transmitting the plurality of configured flow tables to a network equipment, to establish an independent packet processing operation policy per operator in the network equipment. |
| US09215178B2 |
Network packet steering via configurable association of packet processing resources and network interfaces
Methods and systems are provided for steering network packets. According to one embodiment, a dynamically configurable steering table is stored within a memory of each network interface of a networking routing/switching device. The steering table represents a mapping that logically assigns each of the network interfaces to one of multiple packet processing resources of the network routing/switching device. The steering table has contained therein information indicative of a unique identifier/address of the assigned packet processing resource. Responsive to receiving a packet on a network interface, the network interface performs Layer 1 or Layer 2 steering of the received packet to the assigned packet processing resource by retrieving the information indicative of the unique identifier/address of the assigned packet processing resource from the steering table based on a channel identifier associated with the received packet and the received packet is processed by the assigned packet processing resource. |
| US09215177B2 |
System and method for distribution of policy enforcement point
The disclosure herein describes an edge device of a network for distributed policy enforcement. During operation, the edge device receives an initial packet for an outgoing traffic flow, and identifies a policy being triggered by the initial packet. The edge device performs a reverse lookup to identify at least an intermediate node that is previously traversed by the initial packet and traffic parameters associated with the initial packet at the identified intermediate node. The edge device translates the policy based on the traffic parameters at the intermediate node, and forwards the translated policy to the intermediate node, thus facilitating the intermediate node in applying the policy to the traffic flow. |
| US09215170B2 |
Method of transporting data with embedded clock
A method for transporting data with embedded information is provided. The method is adapted to a data transmission interface for coding an original data and then transporting thereof, including: packing the original data, wherein every N bits form a packet, and N is an integer of at least 4; analyzing whether or not existing a long-run length of long-run data with consecutive same bit data in the packet, wherein when the long-run length is greater than a predetermined length, bit data with a predetermined bit length after an Lth bit of the long-run data is toggled; coding the packet to embed a coding information, wherein the coding information determines whether or not the long-run data has been toggled; and transporting the coded packet. |
| US09215169B2 |
Delivering correct number information in a private SIP network
A computer device may include logic configured to receive a first Session Initiation Protocol (SIP) message from a telephone device; select a first back-to-back user agent (B2BUA) and a first screened telephone number (STN) associated with the first B2BUA; generate a second SIP message that includes a first destination address of the first B2BUA, and the first STN; and send the second SIP message to the first B2BUA. The logic may further determine that an acknowledgement response has not been received from the first B2BUA; select a second B2BUA, and a second STN associated with the second destination B2BUA, in response to determining that the acknowledgement response has not been received; generate a third SIP message that includes a second destination address of the second B2BUA, and the second STN; and send the third SIP message to the second B2BUA. |
| US09215168B2 |
Controller area network communications using ethernet
Systems and methods for implementing controller area network (CAN) communications between CAN nodes using Ethernet are provided. An Ethernet switch includes ports, each of which is configured to receive an Ethernet data packet (EDP) from a CAN node. Each EDP includes a CAN message, which includes an identification (ID) of a corresponding CAN node. A first port is configured to receive a first EDP and a second port is configured to receive a second EDP. The Ethernet switch also includes a controller module configured to detect a CAN conflict between the first EDP and the second EDP. The controller module is configured to select, in response to the detection of the CAN conflict, the first EDP or the second EDP based on the ID corresponding to the first EDP and the ID corresponding to the second EDP. The controller module is configured to route the selected EDP to a destination. |
| US09215166B2 |
Systems and methods of multicast reconfiguration using cross-layer information
A method includes receiving, at a first node of a data network, a message indicating a failure of a communication link of the data network. The message is received at the first node from a second node of the data network. The method includes determining an alternate route from the first node to a data source of the data network. The alternate route includes a third node as an upstream node of the first node. The method includes determining whether the third node is a downstream node of the first node prior to sending a first join message from the first node to the third node, and sending the first join message from the first node to the third node conditioned on determining that the third node is not a downstream node of the first node. |
| US09215162B2 |
Biological data networks and methods therefor
A system and method of transmitting and receiving information pertaining to biological sequence data is disclosed. The method includes receiving, at a network interface of a node of a network, a data packet including a first header containing network routing information and a second header associated with a layered model representative of the biological sequence data. The method also includes parsing the data packet and separating the first header from the second header. |
| US09215154B2 |
Providing a monitoring service in a cloud-based computing environment
Technologies are described herein for providing a monitoring service in a cloud-based computing environment. A request is received from a user to subscribe to the monitoring service. The monitor workflow may correspond to the monitoring service. A first call to a finder application is executed over a communications network to retrieve data points according to the monitor workflow. A second call to an analyzer application is executed over the communications network to identify a relevant data point in the data points. A third call to a notifier application is executed over the communications network to notify the user of the relevant data point. |
| US09215148B2 |
Method and device for terminal device management based on right control
A method and a device for terminal device management based on right control are provided. The method includes the following steps. A Get command on an access control list (ACL) of a managed node in a device management tree (DMT) from a device management (DM) server is received, where the Get command includes a Unified Resource Identity (URI) of the managed node. It is determined whether the DM server has a direct right of executing the Get command on the managed node. The Get command is processed when it is determined that the DM server has the direct right of executing the Get command on the managed node. The method and the device simplify the complexity of right management, and reduce the number of times of message interaction between the DM server and a terminal device, thereby improving the efficiency and performance of terminal device management. |
| US09215146B2 |
Switch identification
An example switch in accordance with the present disclosure is to process a command to determine desired identification information; generate a link layer discovery protocol (LLDP) frame based at least in part on the desired identification information, wherein the LLDP frame comprises an optional type-length-value (TLV) that causes a second switch to enable a light source; and transmit the LLDP to the second switch. |
| US09215143B2 |
Exchange and use of globally unique device identifiers for circuit-switched and packet switched integration
According to one aspect, a system and method of exchanging GRUUs (Globally Routed User Agent URI (Uniform Resource Identifier)) between a first telephony-enabled device and a second telephony enabled device using a circuit-switched message is provided. Once exchanged, the telephony enabled devices can exchange SIP (session initiated protocol) communications routed by the GRUUs. Any one of the telephony-enabled devices can add a media component to the SIP communications. According to another aspect, a system and method of generating GRUUs is provided. According to another aspect, a system and method of handing off communications to a packet switched network from a circuit switched network is provided. |
| US09215138B2 |
Determining a system configuration for performing a collective operation on a parallel computer
Determining a system configuration for performing a collective operation on a parallel computer that includes a plurality of compute nodes, the compute nodes coupled for data communications over a data communications network, including: selecting a system configuration on the parallel computer for executing the collective operation; executing the collective operation on the selected system configuration on the parallel computer; determining performance metrics associated with executing the collective operation on the selected system configuration on the parallel computer; selecting, using a simulated annealing algorithm, a plurality of test system configurations on the parallel computer for executing the collective operation, wherein the simulated annealing algorithm specifies a similarity threshold between a plurality of system configurations; executing, the collective operation on each of the test system configurations; and determining performance metrics associated with executing the collective operation on each of the test system configurations. |
| US09215137B2 |
Relay device, relay method, and relay processing program
A failure is detected in a middle path of communication information received from one communication network. When the communication information received from the one communication network is relayed to another communication network, information is output to the other communication network by storing information about the failure detected from the communication information received from the one communication network in a header of communication information to be output to the other communication network. |
| US09215131B2 |
Methods for exchanging network management messages using UDP over HTTP protocol
A network access device (NAD) receives a UDP packet from a client to be transmitted to a management server over Internet, the UDP packet including a management message. The NAD is one of NADs managed by the management server. The NAD determines whether the management server is reachable using a UDP protocol. The NAD transmits the UDP packet to the management server using the UDP protocol over the Internet if it is determined that the management server is reachable using the UDP protocol. Otherwise, the NAD extracts a UDP payload from the UDP packet, encapsulates the UDP payload within an HTTP POST request, and transmits the HTTP POST request having the UDP payload encapsulated therein to the management server using a HTTP protocol over the Internet. |
| US09215126B2 |
Information processing system running operating systems based on connection state
This information processing system processes information through communication between a first information processing device and a second information processing device. The second information processing device has a recording unit and a control unit. The recording unit records a first OS and a second OS. The control unit selects one of the first OS and the second OS, according to a connection state with the first information processing device. The control unit controls the second information processing device or a combination of the first information processing device and the second information processing device, using the OS selected here. |
| US09215125B2 |
Techniques for connecting an external network coprocessor to a network processor packet parser
A network processor includes first communication protocol ports that each support ‘M’ minimum size packet data path traffic on ‘N’ lanes at ‘S’ Gigabits per second (Gbps) and traffic with different communication protocol units on ‘n’ additional lanes at ‘s’ Gbps. The first communication protocol ports support access to an external coprocessor using parsing logic located in each of the first communication protocol ports. The parsing logic, during a parsing period, is configured to send a request to the external coprocessor at reception of a ‘M’ size packet and to receive a response from the external coprocessor. The parsing logic sends a request maximum ‘m’ size byte word to the external coprocessor on one of the additional lanes and receives a response maximum ‘m’ size byte word from the external coprocessor on the one of the additional lanes while complying with the equation N×S/M= |
| US09215123B1 |
DNS requests analysis
Provided are computer-implemented methods and systems for analyzing domain name system requests and developing profiles associated with these requests. Multiple requests received from the same internet protocol (IP) address may be analyzed to differentiate computer systems used to generate these requests, applications provided on these computer systems, and even different users. The requests are analyzed based on text string content (e.g., domain and subdomain names) and timing. One or more profiles are developed and continuously updated based on requests received from the same IP address. These profiles may be used in real time to provide feedback to the users (e.g., deliver marketing content) or for subsequent analysis of comprehensive data sets (e.g., to identify behavior patterns). For example, a profile may be used to identify a number and types of computers in the household, a number and demographic information of users, and other such identifiers. |
| US09215122B2 |
Radio communication apparatus and interference signal detection method
Until when a desired signal is received in a reception mode, a level comparator extracts a portion of a frequency-domain signal output from a Fourier transformer, the portion matching with the frequency of the desired signal, and, when the reception level of the extracted portion matching with the frequency of the desired signal is higher than a predetermined threshold value, determines that an interference signal exists. An LO frequency controller sets the frequency of a local signal (LO) based on the determination result in the level comparator such that the frequency of intermodulation distortion caused by the interference signal becomes an intermediate frequency of the frequency band of the desired signal. When it is determined that the interference signal exists, an RX controller changes gain settings of a low-noise amplifier circuit and gain settings of a variable gain amplifier circuit and changes the cutoff frequency of a filter circuit. |
| US09215121B1 |
Method and apparatus for implementing transmit diversity in OFDM systems
A plurality of diagonal matrices Ci is determined, where the plurality of diagonal matrices Ci is for modifying a plurality of transmit signals to be transmitted via a plurality of transmit antennas, each diagonal matrix Ci for modifying an i-th block of sub-carriers, adjacent in frequency, in the plurality of transmit signals. The plurality of diagonal matrices Ci is used to modify the plurality of transmit signals to implement transmit diversity. |
| US09215120B2 |
Multi-band crest factor reduction
Clipping a widely-separated, multi-carrier signal is effectively performed without having to use a high sampling speed. Clipping is performed in a first stage at a combined signal level, but with a predetermined carrier separation of at least twice the channel bandwidth (2CBW), followed by repositioning the carriers at baseband zero frequency. After clipping, carriers are placed at their respective center frequencies with full carrier separation reintroduced in a second stage. Iterative clipping stages smooth out signal reshaping and re-settled amplitudes for combined carriers. |
| US09215118B2 |
Communication method and transmission apparatus
An electronic device that performs an inverse fast Fourier transform (IFFT) on N (N is an integer equal to or larger than 2) orthogonal frequency-division multiplexed (OFDM) transmission signals; performs a fast Fourier transform (FFT) on the N transmission signals which have been subjected to the IFFT; detects phases of the N transmission signals which have been subjected to the FFT; detects relative delay amounts of the N transmission signals based on the detected phases of the N transmission signals; and adjusts a timing at which at least one of the N transmission signals is subjected to the inverse fast Fourier transform based on the detected relative delay amounts. |
| US09215108B2 |
Decision feedback equalizer
A decision feedback equalizer that can operate at higher speed is provided. The decision feedback equalizer includes a weighting addition circuit (adder 21, coefficient units Tap1a, Tap2 to Tapn) that sums an input signal to weighted versions of feedback signals FB1 to FBn, n being an integer not less than 2. The decision feedback equalizer also includes a decision circuit 11 that decides whether or not the result of addition by the weighting addition circuit is not less than a defined threshold value and that outputs the result of the decision to outside and to a shift register (latch circuits L2 to Ln). The decision circuit operates in synchronism with a clock signal. The shift register sequentially holds the result of decision of the decision circuit 11 in synchronism with the clock signal, and outputs the contents held by its component registers as feedback signals FB2 to FBn. The decision feedback equalizer includes a decision circuit 12 that decides whether or not the result of addition by the weighting addition circuit is not less than a defined threshold value and that outputs the result of decision as feedback signal FB1. The second decision circuit operates in synchronism with the clock signal. |
| US09215107B1 |
Dual loop clock and data recovery
A clock and data recovery (CDR) apparatus includes an analog to digital converter configured to sample an input signal according to a sampling clock and provide a digitized signal, a first loop circuit configured to provide a first equalized signal corresponding to the digitized signal, and a slicer configured to provide a data signal based on the first equalized signal. A second loop circuit is configured to provide a second equalized signal corresponding to the digitized signal and adjust the sampling clock according to the second equalized signal. A CDR method includes converting an analog signal into a digitized signal using a sampling clock, providing a first equalized signal using the digitized signal, providing a second equalized signal using the digitized signal, determining the sampling clock using the second equalized signal, and generating a data signal using the first equalized signal. |
| US09215105B2 |
Equalizer and signal receiver thereof
An equalizer includes a first sampler, a second sampler, and an equalization circuit. The first sampler is used for sampling an input data to generate an output data, and the second sampler is used for sampling the input data to generate an edge information. The equalization circuit is coupled to the first sampler and the second sampler, and includes an equalization unit and a control unit. The equalization unit performs an equalization operation on an original input data in order to generate the input data according to a plurality of tap coefficients. The control unit is coupled to the equalization unit, for adjusting the plurality of tap coefficients according to the output data and the edge information. |
| US09215096B2 |
Computer implemented methods and apparatus for providing communication between network domains in a service cloud
Disclosed are systems, apparatus, and methods for integrating a service console application by providing communication between a first and second network domain. In various implementations, first data is received at a second network domain, where the first data includes one or more functions. A first message may be received at the second network domain, the first message being provided at the second network domain in response to the one or more functions being invoked, and the message identifying the one or more functions. Responsive to receiving the message, the one or more functions may be executed at a computing device associated with the second network domain. Responsive to executing the one or more functions, a second message may be sent to the first domain indicating that the one or more functions have been executed, where the second message is operable to invoke and execute one or more call back functions. |
| US09215095B2 |
Multiple personalities
A computer implemented method enables perception of multiple online personas in an instant messaging communications session by identifying at least two identities within a communications environment to whom messages may be directed, and by enabling a first persona of a user to be projected to a first of the identities while concurrently enabling a second persona of the same user to be projected to a second of the identities. |
| US09215092B2 |
Clock selection for synchronous Ethernet
An Ethernet PHY may receive an indication from a local timing source that a local clock is suitable for propagation to a link partner. In response, a timer in the Ethernet PHY may be started. In instances that the Ethernet PHY receives, during a time period subsequent to starting the timer and before the timer reaches a predetermined value, an indication that the link partner is propagating a clock that is suitable for the Ethernet PHY to synchronize to, the Ethernet PHY may be configured as timing slave. In instances that the Ethernet PHY does not receive, during the time period subsequent to starting the timer and before the timer reaches a predetermined value, an indication that the link partner is propagating a clock that is suitable for the Ethernet PHY to synchronize to, Ethernet PHY may be configured as timing master upon the timer reaching the predetermined value. |
| US09215089B2 |
Touch sensor system
A touch sensor system includes buses, a plurality of touch sensor devices disposed on the buses, and an information integrating device that is connected to all the buses and integrates information from the touch sensor device. The touch sensor device includes a sensor unit and a signal processing unit that transmits a sensor data signal generated by processing an analog sensor signal to the information integrating device through the bus. The signal processing unit includes a digital converting unit, a threshold evaluating unit that gives a start permission of the signal process when a sensor value exceeds a preset threshold, an ID adding unit that adds a transmitter identification number to the sensor signal, and a data transmitting unit that outputs the sensor data signal to a signal line of the bus. Fast responses are made possible without increasing the amount of data and host processing load while including many touch sensor elements. |
| US09215087B2 |
Directed route load/store packets for distributed switch initialization
Techniques for transmitting a packet from a source switch module to a destination switch module. Embodiments receive, at a first port of a first switch module, a packet that includes (i) path information specifying a route to the destination switch module, (ii) a set of load/store operations to be executed by the destination switch module and (iii) return path information specifying a route from the destination switch module to the source switch module. Upon determining that the first switch module is the destination switch module, the set of load/store operations are copied from the received packet into an execution buffer for automatic execution. Once the set of load/store operations are executed, embodiments transmit the packet to a second switch module using the first port on which the packet was received. |
| US09215085B2 |
Iterative simulation of requirement metrics for assumption and schema-free configuration management
Technologies are presented for a method and a system that is configured to receive a topology description of an existing customer deployment and a set of achieved performance metrics at a current datacenter and iterate simulations using policy settings across available service levels to find settings that match or exceed the achieved performance levels. Customer specifications may be received in a standardized format along with measured performance so that settings can be derived from fundamental simulation. The resulting simulations may be used to generate a menu of options and their performance automatically for a customer and that information may be provided to a configuration manager when the customer chooses a setup. |
| US09215080B2 |
Adaptive bit rate distribution of multicast streams
A system for adaptive bit rate distribution of multicast streams may include one or more processors and a memory. The one or more processors may be configured to identify streams, such as multicast streams, transmitted by a content delivery network. The streams may each contain a content item that is encoded at a different bit rate for each stream. The one or more processors may determine segments of the streams, for example based on time stamps associated with the content item or markers of the streams. The one or more processors may transmit a first segment of a first stream encoded at a first bit rate to a user device in response to a request therefor and, upon completing the transmission of the first segment, transmit a second segment of a second stream encoded at a second bit rate to the user device in response to a request therefor. |
| US09215076B1 |
Key generation for hierarchical data access
Systems and methods for authentication generate keys from secret credentials shared between authenticating parties and authenticators. Generation of the keys may involve utilizing specialized information in the form of parameters that are used to specialize keys. Keys and/or information derived from keys held by multiple authorities may be used to generate other keys such that signatures requiring such keys and/or information can be verified without access to the keys. Keys may also be derived to form a hierarchy of keys that are distributed such that a key holder's ability to decrypt data depends on the key's position in the hierarchy relative to the position of a key used to encrypt the data. Key hierarchies may also be used to distribute key sets to content processing devices to enable the devices to decrypt content such that sources or potential sources of unauthorized content are identifiable from the decrypted content. |
| US09215074B2 |
Expressing intent to control behavior of application components
Detection, identification, and control of application behavior dealing with malware, security risks, data privacy, or resource usage can be difficult in an era of complex, composite software applications composed of multiple components. Software applications are analyzed to determine their components and to identify the behaviors associated with each of the components. Components can also be analyzed with respect to similarity of previously known components. Behaviors can include use of personal identifying information or device information, or any actions that can be taken by applications on the device, including user interface displays, notifications, network communications, and file reading or writing actions. Policies to control or restrict the behavior of applications and their components may be defined and applied. In one embodiment this can include the identification of advertising networks and defining policies to permit various opt-out actions for these advertising networks. |
| US09215073B2 |
Key insulation method and device
Embodiments of the present invention provide a key insulation method and device. The key insulation method includes: randomly selecting a first parameter s from Z*q, acquiring a helper initial key from a helper, and generating an initial user private key according to the first parameter s, a preset first cryptographic hash function H1, and the helper initial key; and acquiring a helper updated key for a time segment i from the helper, and updating a user private key for a time segment j according to the helper updated key for the time segment i to obtain a user private key for the time segment i. According to the key insulation method and device provided by the embodiments, in a process of generating an initial key and a process of updating a key, lifecycle is not involved, which improves flexibility of a key system. |
| US09215067B2 |
Achieving storage efficiency in presence of end-to-end encryption using downstream decrypters
Embodiments of the invention relate to efficiently storing encrypted data in persistent storage or passing to another data processing component. A downstream decrypter is utilized to act within the data path between a data generator and a storage server. The decrypter fetches an encryption key and any other necessary auxiliary information necessary to decrypt received data. Following decryption of the data, the decrypter has the ability to operate directly on plaintext and perform storage efficiency functions on the decrypted data. The decrypter re-encrypts the data prior to the data leaving the decrypter for persistent storage to maintain the security of the encrypted data. |
| US09215066B2 |
Method and system for making information in a data set of a copy-on-write file system inaccessible
Information in a data set of a copy-on-write file system may be made inaccessible. A first key for encrypting a data set of a copy-on-write file system is generated and wrapped with a second key. An encrypted data set is created with the first key. The wrapped first key is stored with the encrypted data set. A command to delete the encrypted data set is received and the second key is altered or changed to make information in the encrypted data set of the copy-on-write file system inaccessible. |
| US09215053B2 |
Mapping user data onto a time-frequency resource grid in a coordinated multi-point wireless communication system
Methods and apparatus are disclosed for receiving user data in a wireless communication system that employs coordinated multi-point transmission of the user data from a first cell serving a wireless terminal and a second cell site neighboring the first cell site. In an exemplary system, the first cell site maps control signals and user data to a time-frequency resources according to a first mapping pattern, while the second cell site maps control data and traffic data to the time-frequency resources according to a second mapping pattern. An exemplary method comprises extracting user data, according to the first mapping pattern, from time-frequency resources of a first transmission for the wireless terminal transmitted from the first cell site; detecting a control element transmitted by one of the first and second cell sites, the control element indicating that user data associated with the control element is mapped to the time-frequency resources according to the second mapping pattern; and, responsive to said detecting, extracting user data according to the second mapping pattern from time-frequency resources of a second transmission for the wireless terminal transmitted from the second cell site. |
| US09215051B2 |
Sounding in multicarrier wireless communications
A wireless device transmits one of the sounding reference signals (SRSs) on a first cell in a first cell group in parallel with transmission a first random access preamble. The wireless device drops transmission of a first SRS if the first SRS transmission and a second random access preamble transmission coincide in the same subframe and the wireless device has insufficient power to transmit the first SRS in parallel with the second random access preamble. |
| US09215050B2 |
Method and apparatus for transmitting uplink control information in wireless communication system
Provided is a method and an apparatus for transmitting uplink control information by a terminal in wireless communication system. When a PUCCH resource used for transmitting only periodic CSI from a subframe, the resource is a first resource, and a resource indicated by ARI is a second resource, when a setting allows transmitting together ACK/NACK and the periodic CSI through a PUCCH from the same subframe, the first resource and the second resource are mutually exclusive, and the second resource that is used for transmitting together the ACK/NACK and the periodic CSI uses the resource indicated by the ARI from resources determined by an RRC. |
| US09215043B2 |
Systems and methods for scheduling and MU-MIMO in uplink Vo-IP for OFDMA/SCFDMA networks
A system and method for increasing the capacity of VoIP transmissions is disclosed. A preferred embodiment comprises fixing original transmissions into a frequency band and changing the retransmissions into separate frequency bands. Alternatively, the original transmissions may be changed into separate bands while the retransmissions may be fixed into a single frequency band. Additionally, an early termination procedure may be utilized and a combination of multi-input multi-output scheduling may be performed to further increase the capacity of the system. Another embodiment comprises reducing the overhead of a feedback signal for semi-persistent scheduling. |
| US09215041B2 |
Automatic repeat request (ARQ) protocol employing first information indicating whether to perform retransmission of an uplink data packet and second information indicating a transport format for the retransmission
A transmission apparatus controls a transport format for retransmission of data packets transmitted uplink to a receiving apparatus via at least one data channel using an automatic repeat request (ARQ) protocol. A transmitter transmits an uplink data packet via the data channel to the receiving apparatus, and a receiver receives first information along with second information from the receiving apparatus. The first information is used for determination whether to perform a retransmission of the uplink data packet at the transmission apparatus, and the second information indicates a transport format for the retransmission. The transmitter transmits the retransmission from the transmission apparatus to the receiving apparatus according to the transport format indicated in the second information element using a transmission timing based on the ARQ protocol. |
| US09215036B2 |
Methods and apparatus to identify the accessibility of base stations in communication systems
A system and method for identifying the accessibility of a base station in a communication system. The system includes at least one Closed Subscriber Group (CSG)-Open (hybrid) base station. The base station can apply a base station identifier, such as a CSG identifier, as a cyclic redundancy check (CRC) mask to a first broadcast channel communication and can include the base station identifier in the payload of, or as a CRC mask applied to, a second broadcast channel communication. A mobile station can determine from the base station identifier in the first broadcast communication if the mobile station is a member authorized closed access to the base station. The mobile station can determine from the base station identifier in second first broadcast communication if the mobile station is a non-member authorized open access to the base station. |
| US09215034B2 |
Signal reconstruction method and apparatus
A method includes determining a correlation between a first residual error and multiple columns in a sensing matrix according to a measured value of an original signal and the sensing matrix, and determining a first array most correlative to the measured value of the original signal in the sensing matrix according to the correlation between the first residual error and the multiple columns; determining a correlation between a kth residual error and the multiple columns according to a correlation between a (k−1)th residual error and the multiple columns, and determining a kth array most correlative to the measured value of the original signal according to the correlation between the kth residual error and the multiple columns in the sensing matrix, where 2≦k≦K; and recovering the original signal after determining a Kth array most correlative to the measured value of the original signal. |
| US09215033B2 |
Device, system and method of communicating data over wireless communication symbols with check code
Some demonstrative embodiments include devices, systems and/or methods of communicating data over wireless communication symbols with check-code. For example, a wireless communication unit may communicate a sequence of wireless communication symbols representing transmitted data bits, wherein a symbol of the symbols includes at least one data block, which includes a set of data bits and a set of repetition bits, the set of data bits including a first number of the transmitted data bits, and the set of repetition bits including a second number of bits, which are identical to at least a subset of the set of data bits, and wherein the symbol includes at least one plurality of check-code bits corresponding to the at least one data block. |
| US09215030B2 |
Allocation of spectral capacity in a wavelength-division multiplexing optical network
A method for allocating spectral capacity in a WDM optical network comprising: —providing (4) a group of connection demands, —defining a group of candidate lightpaths that are adapted to carry an optical signal transparently, —defining a highest admissible spectral efficiency for each candidate lightpath, —computing (6) a respective spatial path for each connection demands, —for each candidate lightpath, determining the connection demands that match the candidate lightpath and computing its (1 2) spectral resource saving as a function of the difference between the spectral resources that would be used with its highest admissible spectral efficiency and the spectral resources that would be used with its reference spectral efficiency for the total capacity of the matching connection demands, —selecting (14) and allocating spectral resources to the candidate lightpath having the highest admissible spectral resource saving, —removing (14) the selected candidate lightpath and iterating to the step of determining the matching connection demands. |
| US09215026B2 |
Radio base station apparatus, mobile terminal device and wireless communication method
To provide a radio base station apparatus, mobile terminal device and wireless communication method for transmitting and receiving downlink channel quality measurement reference signals in consideration of orthogonalization among transmission antennas, orthogonalization among cells, and interference estimation of high accuracy, in a wireless communication method of the invention, a radio base station apparatus generates channel quality measurement reference signals, performs randomization processing on the channel quality measurement reference signals to be mutually non-orthogonal among at least a part of cells, and orthogonalizes the channel quality measurement reference signals among transmission antennas to transmit to a mobile terminal device together with control information, and the mobile terminal device receives a downlink signal including the control information and the channel quality measurement reference signal, extracts the channel quality measurement reference signal using the control information, and measures channel quality using the channel quality measurement reference signal. |
| US09215024B2 |
Base station subsystem, a RBS part and a TMA part and methods thereof for synchronizing the RBS part and the TMA part
A base station subsystem (1000), a TMA part (100) and a RBS part (150) of a communication system employing TDD; and respective methods are provided for synchronizing the RBS part of the base station subsystem (1000) with the TMA part (100) The RBS part (150) comprises an RBS modem (160) adapted to generate a switch signal comprising a switch command word, and to further send the switch signal to a TMA modem (110). The TMA modem (110) is adapted to demodulate the switch signal and to compare the switch command word with switch command words stored in a register. When any of the switch command words in the register (111) matches the switch command word of the demodulated switch signal, the TMA modem (110) is configured to generate a control signal for controlling a switch of the TMA part for synchronizing the RBS part (150) with the TMA part. |
| US09215018B2 |
Light display production strategy and device control
Producing a light display for entertainment at a venue includes broadcasting a sonic timing signal, and driving internal timers on mobile handheld electronic devices at the venue toward a synchronous state via the sonic timing signal. Producing the light display further includes triggering illumination of the devices at different times each determined by the corresponding internal timer and contingent upon a location at the venue, to generate a light display. Related control methodology and control logic is also disclosed. |
| US09215015B2 |
Method for selecting wireless network and portable electronic device thereof
A method for selecting a wireless network and a portable electronic device thereof are provided, and the method for selecting the wireless network includes following steps. A plurality of wireless network signal indicators of at least one wireless network are detected. Moreover, a target wireless network is selected from the at least one wireless network for operating therein according to the wireless network signal indicators. |
| US09215013B2 |
Reception apparatus and electronic equipment
A reception apparatus includes a plurality of reception circuits that receive transmission signals, a plurality of local oscillation circuits that respectively supply the plurality of reception circuits with local oscillation signals, and a control unit that controls tunings in the plurality of reception circuits. When at least one reception circuit among the plurality of reception circuits is not used to receive the transmission signals, the control unit searches for an interference wave using the unused reception circuit. |
| US09215012B2 |
Method and system for using orthogonal space projections to mitigate interference
Systems and methods are provided for mitigating natural and man-made interference through the use of one or more orthogonal, or nearly-orthogonal, projections of the received signal, which is assumed to be contaminated with interference, into one or more orthogonal projection spaces based on properties of the signal of interest. Once separated into orthogonal projection space(s), the system and method use information contained in the orthogonal projection space(s) to separate the signal of interest, or target signal, from the interference and to mitigate the interference. |
| US09215008B2 |
Low-latency, high-bandwidth long range communication system
A free space line of site communication system for communicating between a first destination and a second destination includes a constellation of airborne platforms in a train-like formation, each travelling at a constant speed and distance relative to each other. Each of the airborne platforms includes: one or more inter-airborne platform optical or RF transceivers for communication with a previous and a next neighboring airborne platforms, wherein each inter-airborne platform transceiver is capable of adjusting its velocity to keep a constant speed and distance relative to its neighboring airborne platforms, and one or more up/down link transceivers for communication with multiple ground sites, each ground site having two or more ground optical or RF transceivers. A first airborne platforms closest to the first destination communicates with the first destination and a second airborne platforms closest to the second destination communicates with the second destination. |
| US09215007B2 |
Optical network switching node in multi-chassis cluster, optical burst synchronization method, and line card chassis
An embodiment of the present invention provides an optical burst synchronization method. A synchronization method includes: selecting a reference chassis, and transmitting, by an output port corresponding to an FTL in the reference chassis, an optical burst test signal respectively to receive ports corresponding to ORs in other line card chassis, where the optical burst test signal carries a transmission timeslot number; and acquiring, by a receive port corresponding to an OR in each line card chassis, according to an optical path difference between the receive port corresponding to the OR in each line card chassis and the output port corresponding to the FTL in the reference chassis, time of receiving the optical burst test signal, and the transmission timeslot number, a time-phase difference between each line card chassis and the reference chassis, and calibrating a local clock phase according to the time-phase difference. |
| US09215004B2 |
Stationary proximity wireless communication apparatus, portable proximity wireless communication apparatus, proximity wireless communication system and proximity wireless communication method
A stationary proximity wireless communication apparatus has an electromagnetic-wave transmitting and receiving part comprising a first indicator that indicates a zone to place a portable proximity wireless communication apparatus and an antenna that is installed in the zone to emit electromagnetic waves having directivity in a direction of a recommended optimum position suitable to place the portable proximity wireless communication apparatus in the zone from a position different from the recommended optimum position, and a wireless communication part configured to perform modulation and demodulation processes of electromagnetic waves transmitted and received at the antenna. |
| US09214999B2 |
Apparatus and method for adaptive receive diversity using link quality in wireless communications
Aspects of the present disclosure relate to apparatuses and methods for performing adaptive receive-diversity (RxD) to improve power consumption using multiple antennas/receivers. In one aspect, a first receive-diversity (RxD) state is enabled at an access terminal utilizing two receive chains for a communication link. Link quality metrics corresponding to the communication link are determined. The access terminal selectively switches from the first RxD state to a second RxD state utilizing three or more receive chains dependent upon the link quality metrics, such that the energy per bit of the second RxD state is more energy efficient than the energy per bit of the first RxD state. |
| US09214998B2 |
Methods and arrangements for communications in low power wireless networks
Embodiments may comprise an orthogonal frequency division multiplexing (OFDM) system operating in the 1 GHz and lower frequency bands. In many embodiments, the physical layer logic may implement orthogonal frequency division multiplexing symbols encoded with 32 sub-carriers such as twenty data sub-carriers, four pilot sub-carriers, seven guard sub-carriers, and one direct current (DC) sub-carrier. Many embodiments may transform the orthogonal frequency division multiplexing symbols between frequency and time domains with a 32-point, fast Fourier transform or inverse fast Fourier transform. Some embodiments may up-convert and transmit a communication signal with the orthogonal frequency division multiplexing symbols at one megahertz. Further embodiments may receive and detect communications signal with the orthogonal frequency division multiplexing symbols at one megahertz. |
| US09214987B2 |
Near field antenna for object detecting device
A near field antenna adapted to an object detecting device, for sensing a plurality of units under test of at least an object under test. The near field antenna comprises a periodic guided-wave structure, a metallic reflection portion and at least two near field magnetic coupling antennas. The periodic guided-wave structure disposed below the object under test has a plurality of conductive units periodically arranged on a first plane. The metallic reflection portion is disposed under the periodic guided-wave structure to form an enclosed space. The near field magnetic coupling antennas are disposed on a second plane parallel to the periodic guided-wave structure, and are located in the enclosed space. The feed point and the ground point of each near field magnetic coupling antenna are fed by a coaxial cable with a feeding direction parallel to the periodically arranged conductive units. |
| US09214983B2 |
Method and apparatus for collecting and processing interference information
A system that incorporates the subject disclosure may perform, for example, a method for receiving interference information from each of the plurality of communication devices detecting interference information in a plurality of segments of a radio frequency spectrum, correlating the interference information of the plurality of communication devices to generate correlated information, and identifying a plurality of interferers according to the correlated information. Other embodiments are disclosed. |
| US09214980B2 |
High-frequency signal processor and wireless communication system
There is a need to reduce secondary intermodulation distortion that may occur in a reception circuit of a high-frequency signal processor and a wireless communication system having the same. In test mode, for example, a test signal generating circuit TSGEN generates a test signal RFtst at f_tx±0.5 MHz. The test signal RFtst is input to a mixer circuit MIXrx_I (MIXrx_Q). A correction circuit block CALBK detects an IM2 component resulting from the MIXrx_I (MIXrx_Q). The CALBK varies a differential balance for the MIXrx_I (MIXrx_Q) and concurrently monitors a phase for the IM2 component resulting from MIXrx_I (MIXrx_Q). The CALBK searches for the differential balance corresponding to a transition point that allows the phase to transition by approximately 180°. The MIXrx_I (MIXrx_Q) operates in normal mode using the differential balance as a search result. |
| US09214979B2 |
Dual mode power amplifier control interface with a multi-mode general purpose input/output interface
In accordance with some embodiments, the present disclosure relates to a dual mode control interface that can be used to provide both a radio frequency front end (RFFE) serial interface and a two-mode general purpose input/output (GPIO) interface within a single digital control interface die. In certain embodiments, the dual mode control interface, or digital control interface, can communicate with a power amplifier. Further, the dual mode control interface can be used to set the mode of the power amplifier. |
| US09214976B2 |
Display apparatus
A display apparatus including a display module further including a control board for controlling an operation of the display module to display an image. An outer casing unit accommodates the display module, and a wireless communication unit performs wireless communication with an external communication device. The wireless communication unit includes at least one antenna for transmitting and receiving a radio signal to and from the external communication device, and a wireless communication board converts the radio signal received from the antenna into an electrical signal and transmits the electrical signal to the control board or transmits the electrical signal provided from the control board to the antenna, wherein the antenna and the wireless communication board are arranged to be spatially separated from each other. |
| US09214974B2 |
Method for sensing wireless microphones using augmented spectral correlation function
A method for detecting wireless microphone signals based on an augmented spectral correlation function is provided. The method includes obtaining an augmented spectral correlation function (SCF) of acquired digital signals based on a SCF of the digital signal and a conjugate SCF proposed in the present invention, calculating a statistic, and comparing it with a decision threshold simulated or calculated through a predetermined method to determine whether the digital signal is a wireless microphone signal. With the proposed augmented SCF, the present invention overcomes a difficulty in sensing TV white space, namely, the inability of most existing detection methods to effectively distinguish between narrowband interferences and wireless microphone signals. Meanwhile, the detection method has low algorithm complexity and is easy to implement in real systems. |
| US09214969B2 |
Scalable digital predistortion system
The scalable digital predistortion system and method provides compensation for the nonlinear distortions of power amplifiers and transmitters. The scalable digital predistortion system and its associated update algorithms provide scalability in terms of signal bandwidth and average power, allowing for low complexity updates following changes in the signal's bandwidth and/or power level. The method applies both memory polynomial functions and memoryless predistortion functions for compensating for the nonlinear distortions. |
| US09214967B2 |
Circuits and methods for reducing insertion loss effects associated with radio-frequency power couplers
Disclosed are circuits and methods for reducing insertion loss effects associated with radio-frequency (RF) power couplers. In some implementations, an RF circuit can include a first path configured to route a first RF signal in a first band, and a second path configured to route a second RF signal in a second band. The RF circuit can further include a power detector having a first coupler configured to detect power along the first path, and a second coupler configured to detect power along the second path. The first coupler and the second couplers can be connected in a daisy-chain configuration. The RF circuit can further include an adjustment circuit implemented along at least one of the first path and the second paths. The adjustment circuit can be configured to move a frequency response feature associated with the power detector to a different frequency range. |
| US09214966B2 |
Method and apparatus for controlling power consumption of turbo decoder
Embodiments of the present invention disclose a method and an apparatus for controlling power consumption of a TURBO decoder, which relate to the field of wireless communications technologies, can control a peak operation amount of the TURBO decoder to be within a certain range, and avoid occurrence of greater peak power consumption during a work process of the TURBO decoder, thereby lowering the manufacturing cost of a device using the TURBO decoder. The method of the present invention includes: determining size of a transmission block; determining, according to the size of the transmission block, the number of iteration times required for the TURBO decoder to process the transmission block, so as to control an operation amount required for the TURBO decoder to process the transmission block. The present invention is applicable to the TURBO decoder. |
| US09214965B2 |
Method and system for improving data integrity in non-volatile storage
A method for improving data integrity in a non-volatile memory system includes: accessing a non-volatile memory cell for retrieving hard data bits; generating soft information by capturing a reliability of the hard data bits; calculating syndrome bits by applying a lossy compression to the soft information; and generating a host data by executing a low density parity check (LDPC) iterative decode on the hard data bits and the syndrome bits. |
| US09214964B1 |
Systems and methods for configuring product codes for error correction in a hard disk drive
Systems and methods are provided for using a product code having a first dimension and a second dimension to encode data, decode data, or both. An encoding method includes receiving a portion of user data to be written in the first dimension, and computing first parity symbols with respect to the first dimension for the portion of user data. Partial parity symbols with respect to the second dimension are computed for the portion of user data and are used to obtain second parity symbols for the portion of user data. A decoding method includes decoding a first codeword in the first dimension. When the decoding the first codeword in the first dimension is successful, a target syndrome of a second codeword in the second dimension is computed based on a result of the decoding of the first codeword, wherein the first codeword partially overlaps with the second codeword. |
| US09214960B2 |
Apparatus and method for transmitting and receiving data in communication/broadcasting system
An apparatus and method for transmitting and receiving data in a wireless communication is provided. The method includes Low Density Parity Check (LDPC)-encoding LDPC information bits to generate a codeword, determining a number (Npunc) of bits to be punctured in parity bits of the codeword, determining a number (Npunc—group) of parity bit groups in which all bits are punctured, and puncturing the all bits within 0th to (Npunc—group−1)th parity bit groups indicated by a puncturing pattern, wherein the puncturing pattern is defined as an order of the parity bit groups defined as 29, 45, 43, 27, 32, 35, 40, 38, 0, 19, 8, 16, 41, 4, 26, 36, 30, 2, 13, 42, 46, 24, 37, 1, 33, 11, 44, 28, 20, 9, 34, 3, 17, 6, 21, 14, 23, 7, 22, 47, 5, 10, 12, 15, 18, 25, 31 and 39. |
| US09214959B2 |
Systems and methods for skip layer data decoding
The present inventions are related to systems and methods for data processing, and more particularly to systems and methods for performing data decoding including skipping one or more codeword blocks in the data decoding process. In one embodiment a data processing system includes a skip control circuit operable to skip re-application of a data decode algorithm to a portion of a codeword where at least the number of unsatisfied checks for the portion is zero. |
| US09214956B2 |
Semiconductor device, multichip package and semiconductor system using the same
A semiconductor device includes an error detection unit suitable for receiving data and a cyclic redundancy check (CRC) code, and for outputting a detection signal by detecting a transmission error of the data, and a signal change unit suitable for generating error information based on the detection signal while changing a signal form of the error information based on a signal transmission environment of the data. |
| US09214955B2 |
Boolean entropy decoder and boolean entropy decoding method for video display system
A Boolean entropy decoder including a decoding module, a buffer and an updating module is provided. The decoder sequentially generates a first boolean value, a second boolean value and a third boolean value. The first and second boolean values are generated during a same cycle. The decoding module requires a first bit amount while generating a first value corresponding to the first boolean value, and requires a second bit amount while generating a second value corresponding to the second boolean value. The buffer temporarily stores a bit segment in the bitstream to be provided to the decoding module. The updating module fetches a new bit segment according to the first bit amount and the second bit amount and updates the buffer. The decoding module selectively updates a value corresponding to the third boolean value after the buffer is updated. |
| US09214953B1 |
Generalized data weighted averaging method for equally weighted multi-bit D/A elements
A multi-level data weighted averaging circuit for inclusion in a multi-bit DAC circuit has a thermometer encoder that includes a binary to thermometer code conversion array configured for retaining or generating a multi-bit code representing an amplitude to be developed by each of the DAC element of the DAC circuit. The thermometer encoder is in communication with a multi-bit delta/sigma modulator to receive an oversampled binary coding representing an amplitude of a sampling of an analog signal. The oversampled binary coding is applied to an element selector to select the elements retaining or generating the element binary strings of bits of the multi-bit thermometer code. The multi-bit thermometer code is transferred to a rotational dynamic element matching circuit that rotationally selects order that the DAC elements are to receive each of the element binary strings of bits of the multi-bit thermometer code. |
| US09214950B1 |
Apparatus and method for temperature compensated gain and mismatch trim in subranging quantizers and analog to digital converters
A flash analog to digital converter (ADC) provides a temperature compensated trim current by applying a first temperature compensated reference current across a replica resistor ladder. The reference current is mirrored to a trim digital to analog converter, which outputs a fractional portion of the temperature compensated reference current. The proportional trim current is then fed back to the reference current to provide a trimmed temperature compensated reference current. The trimmed reference current is mirrored across the output resistor ladder providing a trimmed current in which the trim varies along with temperature changes due to the trim current being a proportion of the temperature compensated reference current. A proportional trim current which varies with temperature changes is applied to the gain current trim and mismatch current trim in a DAC of a quantizing stage of a sub-ranging ADC. |
| US09214946B2 |
Phase locked loop circuit
A phase locked loop circuit is provided which includes a bang-bang phase frequency detector configured to receive a reference signal and a feedback signal, detect a phase difference between the reference signal and the feedback signal, output a detection signal on the based on a result of the detection; an analog-digital mixed filter configured to receive the detection signal and output a control signal on the basis of the received detection signal; a voltage controlled oscillator configured to output an output signal in response to the control signal; and a divider configured to divide the output signal by n to output as the feedback signal. The detection signal is a digital signal, and the control signal is an analog signal. |
| US09214944B2 |
Digital counter
A digital counter includes: a plurality of flip-flops configured to generate a plurality of count signals; and a controller configured to prevent level transition of an input terminal of a flip-flop to generate a count signal corresponding to a least significant bit (LSB), in response to a clock signal and a count end signal. |
| US09214943B1 |
Fractional frequency divider
A fractional frequency divider counts pulses of a digital input clock signal and enables a clock gating module when a preset count is reached. The clock gating module combines the outputs of two clock gating cells that receive, respectively, the input clock signal and an inverted version of the input clock signal. Output pulses are produced on both positive and negative edges of the input clock signal. This permits generation of output clock pulses that can be set to have a spacing and width granularity of half an input clock period, giving the advantages of low jitter and fine duty cycle control. |
| US09214942B2 |
Low output impedance, low power buffer
A complementary push-pull buffer includes complementary transconductance (GM) devices connected as source-followers to drive a load. Current flowing through the GM devices is split, on the source side, between constant-current source circuitry and a push signal current multiplier (e.g., a current mirror) and, on the sink side, between constant-current sink circuitry and a pull signal current multiplier. The devices used to implement the constant-current circuits and the current multipliers are sized such that the current multipliers provide low output impedance, while the current splitting provides low overall power consumption. |
| US09214941B2 |
Input/output circuits and methods of implementing an input/output circuit
An input/output circuit implemented in an integrated circuit is described. The input/output circuit comprises an input/output pad and a voltage control circuit coupled to the input/output pad. The voltage control circuit sets a voltage at the input/output pad at a first voltage when the input/output pad is implemented as an input pad and at a second voltage when the input/output pad is implemented as an output pad. Methods of implementing input/output circuits in an integrated circuit are also described. |
| US09214938B2 |
Capacitive sensor interface and method
Electronic interface and method for reading a capacitive sensor that includes one input capacitor (30) or several input capacitors, in which the capacitive sensor is excited with a two-level voltage (Vlow, Vhigh) and read by a charge-sense amplifier whose output is sampled in four successive instants. An evaluation unit (333) is arranged to compute two difference values (V12, V34) between two pairs of samples corresponding to different voltage levels and to combine said difference values into an output value (V_out_raw) proportional to the charge transferred to the input of the charge-sense amplifier and an error value (error_bit) sensitive to a time derivative of a noise current din/dt. |
| US09214934B2 |
Desaturation detection circuit for use between the desaturation detection input of an optocoupler and the output of a power switching device
A desaturation detection circuit for use between the desaturation detection input of an optocoupler and the output of a power switching device, the desaturation detection circuit comprising: a threshold setting element having an input and an output, the input for connection to the output of a power switching device via one or more diode(s), the threshold setting element being arranged to set a threshold voltage at the input at which the threshold setting element will provide an output at the output of the threshold setting element when the input voltage is exceeded, and a detector having an input connected to the output of the threshold setting element and an output connectable to a desaturation detection input of an optocoupler, the detector being arranged to detect an output at the output of the threshold setting element and in response to provide a control signal at the output of the detector for the desaturation detection input to trigger a desaturation routine in the optocoupler. |
| US09214920B2 |
Antenna matching circuit
An antenna matching circuit includes at least two signal paths are connected to one antenna connection. The signal paths are designed to transmit and/or receive RF signals. A matching circuit includes a discrete line for phase shifting integrated at the antenna end in at least one of the signal paths. In this case, at least one of the capacitances contained in the discrete line is in the form of a micro-acoustic resonator, whose resonance is shifted sufficiently far that it is outside the pass band of the respective signal paths. |
| US09214916B2 |
Acoustic processing device
There is provided an acoustic processing device capable of applying acoustic processing matching listener's sense to reproduce an audio signal with satisfactory sound quality in terms of auditory sense irrespective of the characteristics of a sound source. The acoustic processing device (1) includes a gain calculation section (5) that calculates a gain correction amount corresponding to predetermined auditory sense characteristics, an offset gain calculation section (6) that calculates a gain offset based on a frequency characteristics of an audio signal analyzed by a frequency analysis section (3), an acoustic signal generation section (7) that generates an acoustic signal based on the gain correction amount and the gain offset, and an acoustic addition section (8) that adds the generated acoustic signal to the audio signal. |
| US09214910B2 |
Integrated circuit
According to one embodiment, provided are an amplifier transistor configured to amplify an input signal; a biasing circuit configured to set a bias voltage in such a manner as to allow the amplifier transistor to perform amplification; an electrostatic protective circuit configured to set the bias voltage for the amplifier transistor in such a manner as to make the amplifier transistor to turn off based on voltage to be applied to the amplifier transistor; and a switching circuit configured to switch the bias voltage for the amplifier transistor based on a power supply condition. |
| US09214908B2 |
Amplification circuit
An amplification circuit (100) comprising a first filter (102) and an LNA (110). The first filter (102) comprising an input (104) for receiving an input signal; a first differential output (106); and a second differential output (108). The first filter (102) has a differential mode of operation for frequencies in its pass-band (706, 806) and a common mode of operation for frequencies outside its pass-band (706, 806), and may be an acoustic wave filter. The LNA (110) comprising a first differential input (112) connected to the first differential output (106) of the first filter (102); a second differential input (114) connected to the second differential output (108) of the first filter (102); and an output (116) for providing an amplified output signal. |
| US09214905B2 |
High output power amplifier
A high-output electric power amplifier using a depression-type FET includes a drain voltage supply portion adapted to create a positive voltage to be applied to a drain terminal in the depression-type FET, and a gate bias voltage supply portion adapted to create a negative voltage to be applied to a gate terminal in the depression-type FET, wherein the drain voltage supply portion uses an external commercial power supply as an electric power source, and the gate bias voltage supply portion uses a battery as an electric power source, in order to certainly prevent breakdowns of the FET due to excessive electric currents. |
| US09214904B2 |
Differential power amplifier using mode injection
Disclosed is a differential power amplifier using mode injection, which includes: a first transistor of which the gate receives a first signal and the source is connected to the ground; a second transistor of which the gate receives a second signal and the source is connected to the ground; a third transistor of which the source is connected to the source of the first transistor; a fourth transistor of which the source is connected to the source of the second transistor; a fifth transistor of which the source is connected with the drain of the first transistor and the drain is connected with a first output port and the drain of the third transistor; and a sixth transistor of which the source is connected with the drain of the second transistor and the drain is connected with a second output port and the drain of the fourth transistor. |
| US09214903B2 |
Amplifier
An amplifier includes a transistor chip, a matching chip with a capacitor group having multiple MIM capacitors, each of the MIM capacitors including a lower electrode, a dielectric, and an upper electrode, a bonding wire that electrically connects the transistor chip to the upper electrode of any one of the MIM capacitors of the capacitor group and transmits a high-frequency signal, and a case that accommodates the transistor chip and the matching chip. The lower electrodes of the MIM capacitors are grounded, and capacitance values of each of the MIM capacitors of the capacitor group are different from each other. |
| US09214902B2 |
Bias-boosting bias circuit for radio frequency power amplifier
Various embodiments provide a bias circuit for a radio frequency (RF) power amplifier (PA) to provide a direct current (DC) bias voltage, with bias boosting, to the RF PA. The bias circuit may include a bias transistor that forms a current mirror with an amplifier transistor of the RF PA. The bias circuit may further include a first resistor coupled between the gate terminal and the drain terminal of the bias transistor to block RF signals from the gate terminal of the bias transistor. The bias circuit may further include a second resistor coupled between the drain terminal of the bias transistor and the RF PA (e.g., the gate terminal of the amplifier transistor). An amount of bias boosting of the DC bias voltage provided by the bias circuit may be based on an impedance value of the second resistor. |
| US09214900B2 |
Interference reduction between RF communications bands
Radio frequency (RF) power amplifier (PA) circuitry and a PA envelope power supply are disclosed. The RF PA circuitry receives and amplifies an RF input signal to provide an RF output signal using an envelope power supply signal, which is provided by the PA envelope power supply. The RF PA circuitry operates in either a normal RF spectral emissions mode or a reduced RF spectral emissions mode. When reduced RF spectral emissions are required, the RF PA circuitry operates in the reduced RF spectral emissions mode. As such, at a given RF output power, during the reduced RF spectral emissions mode, RF spectral emissions of the RF output signal are less than during the normal RF spectral emissions mode. As a result, the reduced RF spectral emissions mode may be used to reduce interference between RF communications bands. |
| US09214899B2 |
Power amplifier assembly comprising suspended strip lines
It is presented a power amplifier assembly comprising; a radio frequency multi-order power amplifier comprising a circuit board; a grounding structure connected to the radio frequency multi-order power amplifier and comprising a recess; a combining network connected to a plurality of outputs of the radio frequency multi-order power amplifier. The combining network comprises: a plurality of input connection points, wherein each of the plurality of input connection points is connected to a respective output of the plurality of outputs of the radio frequency multi-order power amplifier; an output connection point; and a conductor arrangement comprising a plurality of conductive paths arranged between the plurality of input connection points and the output connection point; wherein at least one of the plurality of conductive paths is at least partly formed by a suspended conductor positioned in the recess of the grounding structure. |
| US09214895B2 |
Oscillator with primary and secondary LC circuits
One aspect of this disclosure is an apparatus including an oscillator that includes a secondary LC circuit to increase a tuning range of the oscillator and/or to reduce a phase noise of the oscillator. Another aspect of this disclosure is an apparatus that includes oscillator with a primary LC circuit and a secondary LC circuit. This oscillator can operate in a primary oscillation mode or a secondary oscillation mode, depending on whether oscillation is set by the primary LC circuit or the secondary LC circuit. |
| US09214893B2 |
String monitor
A string monitor comprises a modular base unit and one or more sensor modules which may include sensor modules for measuring DC voltage and current. |
| US09214889B2 |
Motor drive control apparatus
There is provided a motor drive control apparatus that includes a resistor, which directly or indirectly detects a driving current supplied to a motor and generates a voltage corresponding to the driving current, converts, with an AD converter, the voltage corresponding to the motor driving current detected by the resistor into a numerical value, and reflects the motor driving current converted into the numerical value on driving control for the motor, wherein a plurality of the resistors is connected in series to form a resistor string, and voltage between arbitrary two points of the resistor string is AD-converted. |
| US09214885B1 |
Independent pathways for detecting fault condition in electric motor
An electric motor system having substantially independent hardware-based and software-based pathways for detecting and initiating responses to fault conditions, such as over-current conditions, in an electric motor which is powered by a power inverter which is controlled by a power module and a microprocessor. Each pathway involves comparing a voltage, which is representative of an electric current flowing to the motor, to a predetermined maximum voltage, and if the former exceeds the latter using hardware or software to initiate shutting off the motor, such as by shutting off the power inverter. When one pathway detects a fault condition it may notify the other pathway, and the notified pathway may also initiate shutting off the motor. |
| US09214884B2 |
Motor driving device and brushless motor
A motor driving device of the present invention is a motor driving device that incorporates so-called vector control of controlling a current applied to a motor winding in accordance with the position of a rotor. The motor driving device receives the input of a duty command value from a host controller via a command input port, for example. The motor driving device obtains a current command or a speed command as a command value such that the input duty command value is equal to the duty of a drive pulse output from an inverter. Then, the motor driving device performs vector control based on the obtained command value. |
| US09214882B2 |
Control device and method for determining the rotor angle of a synchronous machine
Determining the rotor angle of a synchronous machine. In one aspect, the invention provides a method that includes generating a multiplicity of pulse-width-modulated drive signals for the phases of an inverter feeding the synchronous machine depending on a voltage to be fed into the synchronous machine, and applying a first phase shift to one or more of the multiplicity of pulse-width-modulated drive signals, so that the duration of the switching states of the inverter is extended in order to generate a first switching pattern for the phases of the inverter. The method also includes applying a second phase shift to one or more of the multiplicity of pulse-width-modulated drive signals for generating a second switching pattern, selecting one or more of the first and second switching patterns, determining one or more of neutral point potentials at the neutral point of the synchronous machine, and calculating the rotor angle of the synchronous machine. |
| US09214881B2 |
Power conversion apparatus
A DC link is provided, which includes a capacitor connected in parallel to an output of a converter circuit, and outputs a pulsating DC link voltage. An inverter circuit is provided, which converts an output of the DC link to AC by switching, and supplies the AC to a motor connected thereto. A controller is provided, which controls switching of the inverter circuit so that motor currents pulsate in synchronization with pulsation of a power-supply voltage. The controller controls the switching of the inverter circuit in accordance with a load of the motor or an operational state of the motor, and reduces pulsation amplitude of the motor currents. |
| US09214878B2 |
Multilevel power converter circuit
A multilevel power converter circuit driven by two direct current power supplies in series includes a first semiconductor switch series circuit that combines a series circuit of 2n IGBTs connected between positive and negative electrodes with a capacitor, a second semiconductor switch series circuit that combines a series circuit of 2n−2 IGBTs connected between the emitter of a first IGBT of the first semiconductor switch series circuit and the collector of a 2nth IGBT with a capacitor, and a bidirectional switch connected between an intermediate point of the second semiconductor switch series circuit and an intermediate point of the direct current power supply, to reduce a voltage change in the alternating current output when semiconductor switches are switching. |
| US09214876B2 |
Method of shoot-through generation for modified sine wave Z-source, quasi-Z-source and trans-Z-source inverters
This invention belongs into the field of power electronics and semiconductor converter control and pertains to the method of shoot-through generation for modified sine wave Z-source, quasi-Z-source and trans-Z-source inverters. The inverter can be controlled using either the modified sine wave pulse-width modulation or phase-shift modulation method. There are three methods for shoot-through generation in the case of modified sine wave control: by overlapping active states, during the freewheeling state and during the zero state. To equalize switching losses in the case of unsymmetrical switching patterns, control signals of upper and lower switching elements are periodically interchanged. |
| US09214875B2 |
Multilevel inverter
The present disclosure proposes an input power of each unit power cell of a cascaded H-bridge inverter that is mutually insulated. To this end, the present disclosure includes a phase shift transformer configured to output a voltage of predetermined phase by receiving an AC input power having a fixed frequency, and a plurality of unit power cells serially-connected configured to output a voltage having a predetermined phase by receiving a voltage provided by the phase shift transformer, wherein the phase shift transformer is configured to include the number of phase shifts corresponding to the number of the plurality of unit power cells. |
| US09214871B2 |
Power conversion device with a daisy chain configuration communication control unit
A power conversion device includes: a plurality of cascade-connection type single-phase power converters; and a central control unit that controls the plurality of the single-phase power converters, wherein each of the plurality of single-phase power converters has a single-phase power converter control unit, and the central control unit and the plurality of the single-phase power converter control units are connected via a communication means having a daisy-chain configuration, wherein the single-phase power converter control unit transmits and receives a control signal via the communication means having the daisy-chain configuration, as well as a specific pattern signal, other than a control signal frame, which can be distinguished from the control signal frame, and determines a communication error due to not receiving the specific pattern signal at the single-phase power converter control unit, or an inconsistency between the received signal and the specific pattern signal. |
| US09214870B2 |
Synchronous rectifier circuit
Provided is a synchronous rectifier circuit which, even if a synchronous rectification element having a low on-resistance is used, can perform a synchronous rectifying operation without being influenced by the inductance component. It is a synchronous rectifier circuit having a synchronous rectification element QSR1 and a synchronous rectification control circuit IC1 for turning on/off the synchronous rectification element QSR1 in accordance with the current iSR flowing through the synchronous rectification element QSR1, including a current detection circuit for detecting the current iSR flowing through the synchronous rectification element QSR1 during an on-period of the synchronous rectification element QSR1 as a synchronized voltage waveform, the synchronous rectification control circuit IC1 being configured so as to turn off the synchronous rectification element QSR1 on the basis of the voltage waveform detected by the current detection circuit 1a. |
| US09214867B2 |
Low power converter
An AC to DC converter system is disclosed in which a conversion circuit for converting an AC input signal to a DC output signal is operably coupled with an enabling circuit designed for sensing and output parameter indicative of the presence or absence of a load at the DC output. The system is designed so that the conversion circuit operates in an inactive standby state when there is no load, and in an active state for supplying DC power when a load is present. The enabling circuit is configured to operate using low power. |
| US09214857B2 |
Apparatus and system for noise cancellation of power converters
An apparatus and system comprise a noise cancelation power converter being configured for phase inverted synchronous operation with respect to a primary power converter. The primary power converter is operable to supply power to at least one device. The primary power converter produces a first electromagnetic interference during operation to supply the power. The first electromagnetic interference is coupleable to the device. The noise cancelation power converter further is configured with parasitic components substantially matching parasitic components of the primary power converter. The noise cancelation power converter further produces a second electromagnetic interference that is coupleable to the device. The second electromagnetic interference comprises frequency components having an inverted phase relative to frequency components of the first electromagnetic interference for substantially reducing a sum of the first electromagnetic interference and the second electromagnetic interference during coupling to the device. |
| US09214855B2 |
Active power factor correction circuit for a constant current power converter
The present disclosure provides techniques for power factor correction on a constant current system. In an example embodiment, the present disclosure provides a power factor correction circuit which receives a constant current power input. The power factor correction circuit provides an input voltage tuned to match the phase of the input current. The input voltage is tuned via charging and draining an input capacitor by a switching device. The switching device is driven on a duty cycle synchronously associated with the input current waveform. |
| US09214852B2 |
Precharge circuits and methods for DC-DC boost converters
The present invention discloses precharge circuits and methods for DC-DC boost converters. In one embodiment, a precharge method for a DC-DC boost converter having a current mirror circuit that includes a reference transistor and a power transistor, can include: (i) maintaining a reference current flowing through the reference transistor as substantially constant; (ii) maintaining a drain-source voltage of the reference transistor and a drain-source voltage of the power transistor as substantially equal; and (iii) obtaining a substantially constant mirror current by reflecting the reference current through the power transistor to operate as a precharging current of a precharge circuit. |
| US09214843B2 |
Method of binding stator coils of motor
A method of making an electric motor includes installing a plurality of hairpin coils in a plurality of slots, wherein the plurality of hairpin coils comprise a first hairpin coil and a second hairpin coil, the first hairpin coil comprising a first end and the second hairpin coil comprising a second end. The method further includes inserting the first and second ends into a void of an electrically conductive coupler to electrically connect the first and second ends; and placing the insulation cap over the coupler so as to protect the coupler from contacting other electric conductive materials. |
| US09214839B2 |
Three-phase dynamoelectric machines and stators with phase windings formed of different conductor material(s)
A stator for a polyphase dynamoelectric machine includes a stator core and windings positioned about the stator core. The windings include at least a first phase winding and a second phase winding. The first phase winding is formed of at least one electrical conductor material that is not present in the second phase winding. |
| US09214837B2 |
Electric motor with plural stator components
An electric motor apparatus comprising: a rotor; and a stator formed of at least two stator components, each of the at least two stator components having a substantially hollow cylindrical form. The rotor is mounted within the at least two stator components on a rotational mounting such that the rotor can rotate about a longitudinal central axis with respect to the stator. Each of the at least two stator components comprising at least two protrusions arranged at different circumferential points on an inner surface of the at least two stator components, each of the at least two protrusions having a winding mounted thereon; and control circuitry configured to generate control signals to control power supplied to the windings on each of the at least two stator components, such that power can be controlled to each of the at least two stator components independently of each other. The at least two stator components are mounted adjacent to each other along the longitudinal central axis and rotationally offset with respect to each other, such that the at least two protrusions on one of the at least two stator components are offset with respect to the at least two protrusions on an adjacently mounted one of the at least two stator components, such that a portion of each of the windings that extends beyond a longitudinal end of the protrusions on one of the at least two stator components fits within a gap between windings mounted on the adjacently mounted stator component. |
| US09214834B1 |
Automatic emergency lighting load control
An emergency load control device includes a lighting relay that is coupled to a lighting load based on a relay control signal input. Further, the emergency load control device includes an emergency relay that is coupled to an emergency lighting load based on an emergency relay control signal input. Furthermore, the emergency load control device includes a power controller that is coupled to the lighting relay and the emergency relay. The power controller is configured to output the relay control signal input to the lighting relay and the emergency relay control signal input to the emergency relay to control the operation of the lighting load and the emergency lighting load respectively. In addition, the emergency load control device includes a dimmer control circuit coupled to the lighting load and the emergency lighting load. The dimmer control circuit controls dimming of the lighting load and the emergency lighting load. |
| US09214833B1 |
Redundant charging and discharging MOSFET driving in battery backup system
Aspects of the disclosure relate generally to uninterruptible power supply units for systems requiring back up power. Each unit may include UPS circuitry for controlling charging and allowing discharging of a battery. The UPS circuitry may includes a controller and a plurality of metal-oxide semiconductor field effect transistors (“MOSFET”) switches. The MOSFETs may include charging and discharging MOSFETs arranged in series with the battery all driven by a single gate driver, such as a controller. In this regard, the controller may limit the charging current though all of the MOSFETs and charge the battery. The MOSFETs may be arranged such that if the charging MOSFET fails, the redundant charging MOSFET may continue to limit the charging current to the battery. Similarly, a redundant discharging MOSFET may be arranged in series with a discharging MOSFET in order to continue to provide discharging current if the discharging MOSFET fails. |
| US09214831B2 |
Wind charger
A wind charger set on a circuit board for powering a button cell held by a holder set on the circuit board. The wind charger includes a bracket attached to the holder, a wind turbine fixed on the bracket and a charge circuit. The charge circuit is set on the circuit board. The wind turbine transfers airflow created by a heat-dissipating device set on the circuit board into electricity for powering the charge circuit, which charges the button cell. |
| US09214823B1 |
Correlating operational states and battery usage of devices to extend battery duration
A plurality of client devices may each run on battery power and each experience respective battery usage while in a respective operational state. A server may receive, from the plurality of client devices, a plurality of reports correlating the client devices' respective operational states with the client devices' respective battery usage. Based on the reports, the server may identify at least two client devices in the plurality that reported a common operational state. The server may further determine a representative battery usage for the common operational state, and use this representative battery usage to predict battery usage for a particular client device that is in the common operational state. Then, the server may instruct the particular client device to take an action based upon the predicted battery usage. |
| US09214822B2 |
Battery pack manager unit and method for using same to extend the life of a battery pack
The present invention generally relates to a device and method for the management of a collection of battery cells. In one embodiment, the present invention permits the management of a collection of battery cells composed of an overall battery pack manager unit, individual cell manager units, and wireless communication links between these units. In another embodiment, the present invention relates to a device and method for the management of a collection of battery cells in the field of rechargeable batteries, such as batteries based on lithium-based chemistries, nickel-based chemistries, and lead-acid chemistries. In still another embodiment, the present invention is directed to a method that permits the maximization of battery pack capacity during a charge-discharge cycle and/or permits the maximization of the total number of charge-discharge cycles. |
| US09214819B2 |
DC/DC converter circuit and battery system
A DC/DC converter circuit includes at least two DC/DC converters and a low-pass filter, the DC/DC converters in each case having one input side and one output side. The DC/DC converters are connected to each other in series on their output side, and the low-pass filter is post-connected to the DC/DC converters that are connected in series to each other, so as to smooth the output voltage generated by the DC/DC converters at their output side. |
| US09214818B2 |
Wireless power transmission system, and method of controlling transmission and reception of resonance power
A resonance power transmission system, and a method of controlling transmission and reception of a resonance power are provided. According to one embodiment, a method of controlling resonance power transmission in a resonance power transmitter may include: transmitting resonance power to a resonance power receiver, the resonance power having resonance frequencies which vary with respect to a plurality of time intervals; and receiving, from the resonance power receiver, information regarding the resonance frequency having the highest power transmission efficiency among the resonance frequencies used in the time intervals. |
| US09214817B2 |
Circuitry arrangement for a solar power plant comprising a DC voltage source for an offset voltage
A circuitry arrangement for a solar power plant includes a transformerless inverter for feeding electric power from at least one photovoltaic generator into an alternating power grid, a galvanic separation of all lines carrying current between the inverter and the power grid, and a DC voltage source in an offset path between one electric line at the input side of the galvanic separation and a reference potential. The DC voltage source provides an offset voltage. The offset path includes a DC branch and an AC branch connected in parallel. The direct voltage source is connected in series with a current sensor in the DC branch, and at least one capacitor is arranged in the AC branch. Further, a DC contactor triggered by the current sensor is arranged in the offset path. |
| US09214816B2 |
System and method for subsea power distribution network
An integrated power distribution system utilizes a subsea power distribution hub that receives high voltage electricity through an umbilical from a host surface facility. The subsea power distribution hub steps down the high voltage electricity and distributes the appropriate electrical power supply to multiple components of a subsea production system (e.g., in-well pumps, subsea booster pumps, subsea processing units, subsea valves, and subsea sensors) via jumpers. The integrated subsea power distribution system can be utilize to supply electrical power to all of the required process components of the subsea production system from the in-well completion to the surface host facility. |
| US09214815B2 |
Power supply system including a battery, a DC/DC converter, and an inverter
A power supply system includes an inverter controller which amplifies a deviation between a bus voltage command signal and a bus voltage signal obtained by detecting a bus voltage, inputs the amplified deviation to a first limit unit for limiting output power of a commercial power supply, divides the deviation into a first deviation within a first limit value of the first limit unit and a second deviation which exceeds a range of the first limit value, and controls an inverter on the basis of the first deviation, and a DC/DC converter controller which controls a DC/DC converter on the basis of the second deviation. |
| US09214812B2 |
B-side feed for critical power applications
A method of providing power to a load, such as an IT load, includes generating an output power using at least one power module comprising at least one fuel cell segment, providing a first portion of the output power through a grid to an A-side power feed of the load, and providing a second portion of the output power to a B-side power feed of the load. |
| US09214810B2 |
Method of operation and device for controlling an energy installation having photovoltaic modules
A method and device are provided for operating an energy installation and include multiple photovoltaic modules linked to at least one inverter. Switching means are provided to electrically arrange the photovoltaic modules in at least two configurable series of photovoltaic modules parallel to each other, so that each module can be individually connected to or disconnected from any of the series of photovoltaic modules. Current values and voltage values supplied individually by each photovoltaic module are measured. Intermediate electrical magnitudes are calculated or chosen corresponding respectively to a plurality of configurations of the series of photovoltaic modules. The intermediate electrical magnitudes are compared with each other or with a reference magnitude. A configuration is selected of each series of photovoltaic modules according to the result of the comparison. |
| US09214808B2 |
Electronic device and power control circuit for same
An electronic device includes a MCU, and a power control circuit. The power control circuit includes a first switch unit connected between a power source and the MCU, and a second switch unit connected between a control terminal of the first switch unit and the MCU. In a first status, the second switch unit outputs a first control signal to switch on the first switch to connect the MCU to the power source for enabling the MCU to receive power; and further outputs a boot signal to the MCU to power the electronic device. Switched to a second status, a shutdown signal is output to the MCU to shutdown the electronic device; and the second switch module further outputs a second control signal to switch off the first switch after a determined time period, to cut power consumption to nil at the end of that period. |
| US09214806B1 |
ESD protecting circuit
An ESD protecting circuit, which comprises: a first voltage pad; a second voltage pad; an I/O pad; a first ESD protecting module, comprising a first terminal coupled to the first voltage pad; a MOS transistor, comprising a first terminal coupled to a second terminal of the first ESD protecting module, comprising a second terminal coupled to the I/O pad, and comprising a control terminal for receiving a control signal; a second ESD protecting module, comprising a first terminal coupled to the first terminal of the MOS transistor, and comprising a second terminal coupled to the second voltage pad; and an ESD detecting circuit, for generating the control signal to control the MOS transistor to be conductive when an ESD voltage is detected and to control the MOS transistor to be nonconductive when the ESD voltage is not detected. |
| US09214802B2 |
Fault protection of a variable differential transformer (VDT) excitation circuit
An excitation circuit includes an operational amplifier, a transistor circuit, a switch, and a pull-down resistor. The operational amplifier receives an excitation input voltage at a non-inverting input and provides an operational amplifier output. The transistor circuit receives the operational amplifier output and provides a transistor circuit output. The transistor circuit output is connected to an inverting input of the operational amplifier. The switch is connected between the operational amplifier output and the transistor circuit. The switch is opened to disconnect the operational amplifier output from the transistor circuit. The pull-down resistor is connected between an output of the switch and ground, wherein the pull-down resistor turns off the transistor circuit when the switch is opened. |
| US09214801B2 |
Power supply device for plasma processing
A power supply device for plasma processing, wherein electric arcs may occur, comprises a power supply circuit for generating a voltage across output terminals, and a first switch connected between the power supply circuit and one of the output terminals. According to a first aspect the power supply device comprises a recovery energy circuit connected to the output terminals and to the power supply circuit. According to a second aspect the power supply device comprises an inductance circuit including an inductor and a second switch connected parallel to the inductor. According to a third aspect the power supply device comprises a controller for causing the power supply circuit and the first switch to be switched on and off. The controller is configured to determine a quenching time interval by means of a self-adaptive process. The quenching time interval defines the time interval during which, in an event of an arc, no voltage is generated across the output terminals. |
| US09214790B2 |
Filtered laser array assembly with external optical modulation and WDM optical system including same
A filtered laser array assembly generally includes an array of laser emitters coupled between external modulators and an arrayed waveguide grating (AWG). Each of the laser emitters emits light across a plurality of wavelengths including, for example, channel wavelengths in an optical communication system. The AWG filters the emitted light from each of the laser emitters at different channel wavelengths associated with each of the laser emitters. Lasing cavities are formed between each of the laser emitters and a back reflector coupled to an output of the AWG such that laser output from the laser emitters is provided at the respective channel wavelengths of the reflected, filtered light. The external modulators enable high speed modulation of the laser output. The modulated laser output may then be optically multiplexed to produce an aggregate optical signal including multiple channel wavelengths. |
| US09214786B2 |
Diode laser packages with flared laser oscillator waveguides
A high brightness diode laser package includes a plurality of flared laser oscillator waveguides arranged on a stepped surface to emit respective laser beams in one or more emission directions, a plurality of optical components situated to receive the laser beams from the plurality of flared laser oscillator waveguides and to provide the beams in a closely packed relationship, and an optical fiber optically coupled to the closely packed beams for coupling the laser beams out of the diode laser package. |
| US09214784B2 |
Laser device
An end surface 3b of a solid-state laser element 3 is sloped in such a way that, assuming that laser light is incident upon air from the end surface, an angle of incidence which a normal to an inner side of the end surface forms with a traveling direction of the laser light substantially matches the Brewster angle at the incidence plane, an end surface 4a of a wavelength conversion element 4 is sloped in such a way that, assuming that the laser light is incident upon air from the end surface, an angle of incidence which a normal to an inner side of the end surface forms with a traveling direction of the laser light substantially matches the Brewster angle at the incidence plane, and the end surface 3b and the end surface 4b are arranged in such a way as to be opposite to each other. |
| US09214783B2 |
Light emitting device, lighting system, headlight, and vehicle
A light emitting device which includes at least one of a laser light source (1), wiring (9), a lens for excitation (2), a luminous body (4), a laser cut filter (6), a half parabolic mirror (5P), and a base (5h), in which a part of the wiring (9) is installed at a portion in which a breakage easily occurs due to at least one deformation of the laser light source (1), the lens for excitation (2), the luminous body (4), the laser cut filter (6), the half parabolic mirror (5P), and the base (5h), or a change in an installation position thereof. |
| US09214774B2 |
Wedge converter
Embodiments of the present invention include devices for converting a bi-pin interface to a wedge interface in a light-emitting-diode (LED) lighting system. The ultimate purpose of the invention is to reduce the cost, service time, and risk challenges faced by LED-lighting servicers. The invention accomplishes this purpose by neutralizing the challenge imposed by unknown inventory requirements. |
| US09214771B2 |
Connector for a cable
A connector for a cable, in one embodiment, has a body configured to receive a cable. The connector has a plurality of contacts moveably positioned within the body, and the connector has a component configured to slide or axially move. |
| US09214769B2 |
Electrical plug connector
A switching device of electrical plug connector includes a plug body, a circuit board and a switching member. The plug body includes a connecting shell and an inserting space. The circuit board is disposed at the plug body and connected to a plurality of conductive plates. The switching member is connected to the circuit board and includes a transmission bar, a contact plate and an elastic member. The transmission bar passes through the circuit board; one end of the transmission bar is disposed in the inserting space. The contact plate is disposed adjacent to the conductive plates and connected to another end of the transmission bar. The elastic member sleeves on the transmission bar. When an electrical receptacle connector inserts into the connecting shell, one end of the transmission bar is abutted to drive another end of the transmission bar moving, thereby connecting the contact plate with the conductive plates. |
| US09214763B2 |
Fly line connector
A fly line connector is disclosed. A pin is connected to a main body. A fly line is wrapped around the pin. A first engaging portion is formed on the main body. A first engaging hole is formed in the main body and is opposite to the first engaging portion. When a number of the fly line connectors are combined together, the first engaging portion of one of the fly line connectors is engaged with the first engaging hole of the other one of the fly line connectors. |
| US09214760B2 |
Connector terminal including buffer portion and connector housing used for the same
The connector terminal includes at opposite ends a pair of press-fit terminals to be inserted into through-holes formed through two printed circuit boards located facing each other, each of the press-fit terminals having a plurality of contact pieces, and further includes at least one buffer portion deformable in accordance with a gap between imaginary longitudinal center lines of the press-fit terminals. |
| US09214759B2 |
Connector with slideable retention feature and patch cord having the same
A patch cord including a connector attached to an end of an electrical cable. The connector includes a boot member that slides over a portion of a wire manager to actuate a retention arrangement of the connector. Certain types of retention arrangements are actuated by deflecting flexible tabs of the wire manager inwardly to bite into at least an outer jacket of the electrical cable. |
| US09214758B2 |
Hermetic housing arrangement
The present disclosure relates to a housing arrangement, in particular to a hermetic housing arrangement, having at least one housing for connecting a plug-in connector, wherein the housing arrangement has at least one seal. The housing arrangement in accordance with the present disclosure is characterized in that the at least one seal can be placed in at least one opening provided in the housing and/or in an opening provided in a plug flange of the plug-in connector and designed as a milled portion. |
| US09214754B2 |
Holding device used for electrical connector
A holding device for an electrical connector, includes a frame with an opening defined on a center thereof. A first locking portion is disposed on the frame and extends into the opening. A second locking portion has a main body with an elastic arm. The main body defines a fixed end fixed to the frame and an active end rotating around the fixed end. The second locking portion has an open position that the active end can move freely and a closed position that the active end locks to the frame while the elastic arm extends into the opening. |
| US09214753B2 |
Connector for biological information measurement, and biological information measurement device using same
In the present invention, a metal upper cover that covers an upper face opening of a frame is mounted on this upper face opening, and a bent piece that is inserted into a bent piece insertion hole provided to the frame is provided to a portion of the upper face cover on the side of a sensor insertion hole. Furthermore, ground connection pieces formed by extending the outside of the left and right sides of the frame from the upper face toward the lower face are provided in portions opposite the left and right edges linked to the edge of the top cover on which the sensor insertion opening of the frame is provided. |
| US09214746B2 |
Contact terminal interposed between two contact targets
A contact terminal interposed between two contact targets so as to provide electrical conduction between the two contact targets includes: a first conductive member including a salient portion composed of a plurality of inclined surfaces, and a first contact portion that is provided at an end different from the salient portion and contacts an electrode of one of the contact targets; and a second conductive member including a second contact portion that has a curved shape and contacts an electrode of another one of the contact targets, a plurality of elastic portions each of which extends in a band shape along the curved shape from the second contact portion and is elastically deformable, and sliding contact portions each of which is provided at a leading end of one of the elastic portions and slidably contacts a corresponding one of the inclined surfaces. |
| US09214742B2 |
Systems and methods for a power adapter
In accordance with one embodiment, an adapter for connecting a network device is provided. The adapter includes adapter housing. The adapter housing further includes a base and a wall, such that the wall extends axially from the base. The base of the adapter housing also includes an inner surface and an outer surface. The adapter includes a plurality of socket openings that extend across the base between the inner surface and the outer surface. The plurality of socket openings extend axially, the socket openings continue across the inner surface of the base through the first end of the rim and the second end of the rim. In one embodiment, the adapter includes a bypass circuit. The bypass circuit allows a network device to get power from a line side of a power meter and the consumer to get power from the load side of the power meter. |
| US09214741B2 |
Connection terminal, connection device, method for manufacturing the device, motor using the device, and compressor using the motor and blower using the motor
Connection terminal (10) according to the present invention includes a tab part and not smaller than four pinching plates (12) that hold an aluminum electric wire. Pinching plates (12) each include first slit (13) and contact surfaces (14). First slit (13) has a first open end located in one side of the slit, and a first tip located in the other side. The aluminum electric wire is inserted into first slit (13). Contact surfaces (14) are in contact with the aluminum electric wire that is press-fitted into first slit (13). A contact area in which contact surfaces (14) are in contact with a core wire is an area of 100% to 200% of a radial cross-sectional area of the core wire. |
| US09214740B2 |
Radial line slot array antenna
A radial line slot array antenna has a slotted conductor plate in which a plurality of slots are formed and arranged in a spiral. The plurality of slots are arranged in the slotted conductor plate such that the arrangement distance in a radial direction between the slots varies gradually between a first portion determined based on a first frequency and a second portion determined based on a second frequency that is different from the first frequency. |
| US09214735B2 |
Impedance matching component, metamaterial panel, converging component and antenna
An impedance matching component is disclosed. The impedance matching component is disposed on and closely attached to a first side surface of a function dielectric sheet. The impedance matching component comprises a first plurality of impedance matching layers, each of which has a refractive index distribution represented as follows: n i ( r ) = n m i n × ( n g ( r ) n m i n ) i c + 1 ; where, i represents a serial number of each of the impedance matching layers and is a positive integer; ni(r) represents refractive indices of points in the ith impedance matching layer that have a distance of r from a center of the ith impedance matching layer; ng(r) represents refractive indices of points in the function dielectric sheet that have a distance of r from a center of the function dielectric sheet; nmin represents the minimum refractive index of the function dielectric sheet; and c represents the number of the impedance matching layers. |
| US09214732B2 |
Flexible PIFA antenna with tunable coupling element
A modified PIFA antenna is designed for wireless local area network (WLAN) applications. The modified PIFA antenna is configured to resist detuning effects caused by use of various cable lengths and is adapted for use in the 2.4 GHz operation band. A slot extends between the ground and feed portions of the antenna for slightly increasing frequency bandwidth of the antenna. |
| US09214727B2 |
Multi-band antenna
A multi-band antenna comprises a single-pole radiating portion and a coupling radiating portion coupled to a grounding terminal. The single-pole radiating portion has a first radiating unit and a fourth radiating unit coupled to a feeding terminal. The single-pole radiating portion is bent to form a second radiating unit and a third radiating unit. The coupling radiating portion has a fifth radiating unit, and the coupling radiating portion is bent to form a sixth radiating unit. The sixth radiating unit of the coupling radiating portion and the third radiating unit of the single-pole radiating portion are coupled to each other to generate a LTE technology band near 700 MHz. The fifth radiating unit of the coupling radiating portion, the third radiating unit and the fourth radiating unit of the single-pole radiating portion are coupled to each other to generate a high frequency band. |
| US09214725B2 |
Antenna device
Provided is an antenna device (1) including: an antenna element (120); a substrate (100) on which a ground conductor is provided; a first feeding portion (130); a second feeding portion (140); and a switching section (111, 131, 141). A direction in which high frequency electric current mainly flows in the ground conductor is different from while the first feeding portion (130) feeds the antenna element (120) to while the second feeding portion (140) feeds the antenna element (120). |
| US09214723B2 |
Waterproof part
A waterproof part for a feedhorn includes a first waterproof unit having a first interface for generating a first reflected wave and a first transmitted wave when a satellite signal incidents the first interface, and a second waterproof unit covering on the first waterproof unit and having a second interface for generating a second reflected wave and a second transmitted wave when the first transmitted wave incidents the second interface, wherein the first and second reflected waves are substantially out-of-phase to substantially cancel the first and second reflected waves. |
| US09214718B2 |
Methods for characterizing tunable radio-frequency elements
A wireless electronic device may contain at least one antenna tuning element for use in tuning the operating frequency range of the device. The antenna tuning element may include radio-frequency switches, continuously/semi-continuously adjustable components such as tunable resistors, inductors, and capacitors, and other load circuits that provide desired impedance characteristics. A test station may be used to measure the radio-frequency characteristics associated with the tuning element. The test station may provide adjustable temperature, power, and impedance control to help emulate a true application environment for the tuning element without having to place the tuning element within an actual device during testing. The test system may include at least one signal generator and a tester for measuring harmonic distortion values and may include at least two signal generators and a tester for measuring intermodulation distortion values. During testing, the antenna tuning element may be placed in a series or shunt configuration. |
| US09214712B2 |
Apparatus and methods related to ferrite based circulators
Apparatus and methods related to ferrite based circulators are disclosed. A ferrite disk used in a circulator can be configured to reduce intermodulation distortion when routing radio-frequency signals having closely spaced frequencies. Such a reduction in intermodulation distortion can be achieved by adjusting magnetization at the edge portion of the ferrite disk. By way of an example, a ferrite disk with a reduced saturation magnetization (4 PiMs) edge portion can reduce intermodulation distortion. Example configurations with such a reduced 4 PiMs edge portions are disclosed. |
| US09214709B2 |
Battery-capacitor hybrid energy storage system for high temperature applications
A hybrid energy storage system (ESS) includes a first energy storage device including a battery having an impedance for providing a substantially constant power output, and a second energy storage device linked to the first energy storage and including a high power electrochemical double layer capacitor (EDLC) for providing intermittent bursts of high voltage output in a range of 1.5 to 3.0 volts, wherein an operation rating of the second energy source is within a temperature range between 75 degrees Celsius and 330 degrees Celsius while exhibiting a leakage current less than 1 amp per liter of volume over the range of operating temperatures and at a voltage up to a rated voltage. |
| US09214705B2 |
Battery cell of improved cooling efficiency
Disclosed herein is a battery cell configured such that at least one electrode assembly of a structure having a cathode, an anode, and a separator interposed between the cathode and the anode is mounted in a battery case, at least one heat dissipation member to dissipate heat generated in the electrode assembly during charge and discharge of the battery cell or upon occurrence of a short circuit is disposed in the electrode assembly and/or is in contact with an outer surface of the electrode assembly, and a portion of the heat dissipation member is exposed outward from the electrode assembly. |
| US09214700B2 |
Lithium iron phosphate containing sulfur compound based upon sulfide bond and lithium secondary battery using the same
Disclosed is lithium iron phosphate having an olivine crystal structure, wherein the lithium iron phosphate has a composition represented by the following Formula 1, a sulfur compound with a sulfide bond is contained, as an impurity, in the lithium iron phosphate particles, and carbon (C) is coated on particle surfaces of the lithium iron phosphate: Li1+aFe1-xMx(PO4-b)Xb (1) (wherein M, X, a, x, and b are the same as defined in the specification). |
| US09214691B2 |
Systems and methods of securing immunity to air CO2 in alkaline fuel cells
An air CO2 filtration assembly or system is provided that includes CO2 filters or traps designed and configured with a limited, but high capacity, volume to maximize filtration/absorption of CO2 from an air stream supplied to an alkaline fuel cell to thereby minimize the CO2 level in the air stream fed into the fuel cell cathode. The CO2 filters or traps include at least one thermally regenerative CO2 chemical filter or trap arranged in a tandem configuration with a strongly bonding CO2 chemical filter or trap. The combination of the two types of filters or traps sequentially filter/absorb CO2 from the air stream and reduce the level of CO2 in the air stream fed into the cathode. The air CO2 filtration assembly or system may be used in conjunction with electrochemical purging of the alkaline fuel cell that enables removal of CO2 from the fuel cell by anodic decomposition of accumulated carbonate ions in the fuel cell anode and release of CO2 through the anode exhaust stream. |
| US09214687B2 |
Fluid manifold and method therefor
A electrochemical cell system includes a fluid manifold having a layered structure. The fluid manifold includes at least one conduit layer having a first side and a second side. The at least one conduit layer has at least one conduit channel. |
| US09214684B2 |
Fuel control system and method for fuel cell system
The present invention provides a fuel control system and method, e.g., for a vehicle fuel cell system, which can efficiently supply hydrogen to a fuel cell stack and increase the efficiency of an ejector. For this purpose, the present invention provides a fuel control system having a series-connected multi-stage pressure control structure, in which an additional injector is provided in series between an injector for controlling the pressure of hydrogen supplied, a pressure control valve, or a pressure control actuator and a hydrogen recirculation ejector in a hydrogen supply passage, through which hydrogen is supplied from a hydrogen supply unit to a fuel cell stack, such that the pressure of hydrogen supplied is controlled in stages. |
| US09214683B2 |
Hybrid fuel cell
A power generator includes a chemical hydride multilayer fuel cell stack. A flow path extends through the fuel cell stack to provide oxygen containing air to the fuel cell stack and to cool the fuel cell stack. A hydrogen generator is coupled to the flow path to receive water vapor from ambient air introduced into the flow path and water vapor generated by the fuel cell stack and to provide hydrogen to the fuel cell stack. A controller separately controls airflow past the fuel cell stack and water vapor provided to the hydrogen generator. |
| US09214682B2 |
Fuel cell
A fuel cell is formed by sandwiching a membrane electrode assembly between a first separator and a second separator. A fuel gas flow field is formed in the second separator. An inlet buffer is connected to the inlet of the fuel gas flow field, and an outlet buffer is connected to an outlet of the fuel gas flow field. The inlet buffer is deeper than the outlet buffer. Therefore, the pressure loss in the inlet buffer is smaller than the pressure loss in the outlet buffer. |
| US09214680B2 |
Platinum and platinum based alloy nanotubes as electrocatalysts for fuel cells
Electrocatalyst durability has been recently recognized as one of the most important issues that have to be addressed before the commercialization of the proton exchange membrane fuel cells (PEMFCs). The present invention is directed to a new class of cathode catalysts based on supportless platinum nanotubes (PtNTs) and platinum alloy nanotubes, for example, platinum-palladium nanotubes (PtPdNTs), that have remarkable durability and high catalytic activity. Due to their unique combination of dimensions at multiple length scales, the platinum nanotubes of the present invention can provide high platinum surface area due to their nanometer-sized wall thickness, and have the potential to eliminate or alleviate most of the degradation pathways of the commercial carbon supported platinum catalyst (Pt/C) and unsupported platinum-black (PtB) as a result of their micrometer-sized length. The platinum nanotube catalysts of the present invention asymptotically approach a maximum of about twenty percent platinum surface area loss in durability test, while the commercial PtB and Pt/C catalysts lose about fifty-one percent and ninety percent of their initial surface area, respectively. Moreover, the PtNT and PtPdNT catalysts of the present invention show higher mass activity and much higher specific activity than commercial Pt/C and PtB catalysts. |
| US09214673B2 |
Positive electrode material for a lithium-ion accumulator
A compound of formula Lia+y(M1(1−t)Mot)2M2b(O1−xF2x)c wherein: M1 is selected from the group consisting in Ni, Mn, Co, Fe, V or a mixture thereof; M2 is selected from the group consisting in B, Al, Si, P, Ti, Mo; with 4≦a≦6; 0 |
| US09214672B2 |
Electrode for secondary battery, secondary battery and cable-type secondary battery comprising the same
The present invention provides an electrode for a secondary battery, more specifically an electrode for a secondary battery, comprising a current collector; an electrode active material layer formed on at least one surface or the whole outer surface of the current collector; a graphite-based coating layer formed on the top surface of the electrode active material layer and comprising graphite, a conductive material and a first polymer binder; and a porous coating layer formed on the top surface of the graphite-based coating layer and comprising a second polymer binder. Also, the present invention provides a secondary battery and a cable-type secondary battery comprising the electrode. |
| US09214671B2 |
Nonaqueous electrolyte battery, battery pack and rechargeable vacuum cleaner
A nonaqueous electrolyte battery includes a positive electrode, a negative electrode and a nonaqueous electrolyte. At least one of the positive electrode and the negative electrode comprises a current collector made of aluminum or an aluminum alloy and an active material layer laminated on the current collector. The active material layer contains first active material particles having an average particle diameter of 1 μm or less and a lithium diffusion coefficient of 1×10−9 cm2/sec or less at 20° C., and second active material particles having an average particle diameter of 2 to 50 μm. A true density of the second active material particles is larger by 0.01 to 2.5 g/cm3 than a true density of the first active material particles. |
| US09214668B2 |
Si composite electrode with Li metal doping for advanced lithium-ion battery
A silicon electrode is described, formed by combining silicon powder, a conductive binder, and SLMP™ powder from FMC Corporation to make a hybrid electrode system, useful in lithium-ion batteries. In one embodiment the binder is a conductive polymer such as described in PCT Published Application WO 2010/135248 A1. |
| US09214663B2 |
Alkaline storage battery positive electrode, method of fabricating the same, and alkaline storage battery
In an alkaline storage battery positive electrode, the surface of positive electrode active material particles is uniformly coated with a conductive agent and the alkaline storage battery positive electrode is capable of suppressing an increase in internal battery resistance.The method of fabricating includes: (A) fixing active material particles to a current collector, the active material particles containing, as a main component, nickel hydroxide coated with a conductive agent, the conductive agent containing, as a main component, at least one kind of cobalt compound selected from the group consisting of cobalt hydroxide, tricobalt tetroxide, and cobalt oxyhydroxide; and (B) reducing the cobalt atom in the cobalt compound such that the cobalt atom has an oxidation number of less than +2, by applying a reduction current in an electrolyte solution to the current collector to which the active material particles are fixed, after the step (A). |
| US09214660B2 |
Flexible substrate battery jacket
A flexible battery jacket adapted to combine two or more batteries for forming a low profile power-pack assembly. The battery jacket folds about the two or more batteries and connects respective positive and negative terminals of the batteries at one or more contacts of the battery jacket. The contacts are coupled to conductors which communicate the power to a positive and a negative supply terminal, respectively, on a single portion of the battery jacket assembly. In this regard, the flexible battery jacket combines two or more batteries in parallel or series configuration and provides supply terminals on a single substrate surface for easily connecting with an electronic device. |
| US09214659B2 |
Use of a ceramic separator in lithium ion batteries, comprising an electrolyte containing ionic fluids
The invention relates to a separator filled with an electrolyte composition. The separator has a ceramic surface and the electrolyte composition comprises an ionic fluid. Filling with the electrolyte composition can take place, for example, by inserting the separator into a battery, e.g. into a lithium ion battery, which is filled with a corresponding electrolyte composition. |
| US09214657B2 |
Power storage device and power storage system
Provided is a power storage device including: a first chassis member; a second chassis member; a power inlet; one or plural power outlets; a battery module; a power conversion device; a housing; a lower lid; and an upper lid. The battery module is fixed closely to one surface of the first main surface portion. The power conversion device is fixed closely to one surface of the second main surface portion. A gap portion is formed between the first main surface portion and the second main surface portion by disposing the other surface of the first main surface portion and the other surface of the second main surface portion to face each other. The space is used to make air taken through the plural openings of the lower lid flow via the plural openings of the upper lid. |
| US09214656B2 |
Battery adapter for a night vision device
My invention relates to an improvement in the constant and extended supply of electrical power to night vision devices and the convenience of making use of a standardized, commonly available battery with higher reserve power for the same. Specifically, my invention provides an adapter that is placed into the battery compartment of an NVD, is securely fixed in that compartment so as to maintain electrical connectivity regardless of jarring forces it may endure, and contains a port into which the wire lead from an external power pack is plugged so as to provide the electrical power. The external power pack can be configured to hold the battery or batteries of choice, and can be made to attach either to the user's person or the same object that the NVD is attached to, such as a rifle. The external power pack will allow the use of batteries with a higher reserve power, or batteries that are rechargeable/reusable, and supports the user not having to carry a multitude of differing batteries in order to have spare power available for several different devices. |
| US09214654B2 |
Transportion, storage and installation rack for battery packs
A rack for battery packs for transporting battery modules which are stored therein, and includes a bottom frame and struts located at four corners of the bottom frame. A fitting projection is formed at an upper end of each of the struts, a fitting hole into which the fitting projection is fitted is formed in a bottom part of each of the struts. When the rack is stacked one on top of another by fitting the fitting projection of each of the struts of a lower rack into the projection hole of each of the struts of an upper rack, the rack for battery pack can be used as an installation rack. Accordingly, a separate installation rack is not necessary, and returning a transportation rack is not necessary, either. |
| US09214651B1 |
Secondary battery
A secondary battery is disclosed. In one aspect, the battery includes first and second battery cells facing each other and a case comprising first and second cell accommodators respectively at least partially accommodating the first and second battery cells, and a circuit accommodator formed between the first and second cell accommodators and accommodating a protection circuit configured to control charging and discharging operations. The circuit accommodator has top and bottom surfaces opposing each other, and each of the first and second cell accommodators has top and bottom surfaces opposing each other. The top surface of the circuit accommodator has a downward step with respect to the top surfaces of the first and second cell accommodators. |
| US09214650B2 |
Battery module case
The present invention relates to a battery module case, and more particularly, to a battery module case in which sub-battery modules are slidably mounted in a vertical or horizontal direction, wherein each sub-battery module comprises one or more battery cells, electrode tabs extending in one direction from the respective battery cells, and a pouched type case consisting of aluminum laminate sheets for covering the surfaces of the battery cells, except for the surfaces on which the electrode tabs are formed. The battery module case of the present invention is formed into an assembly type structure to be coupled to the outer surfaces of the sub-battery modules, wherein the outer surfaces include surfaces on which the electrode tabs are formed. At least two or more sub-battery modules are stacked and arranged in parallel, such that the surfaces on which the electrode tabs are formed are aligned in the same direction. |
| US09214649B2 |
Light-emitting device
A light-emitting device includes: a light-emitting element including a transparent electrode, a reflecting electrode, and an organic layer that includes a light-emitting layer; a transparent multilayer body including a low-refractive-index layer and a high-refractive-index layer, the high-refractive-index layer being provided in contact with the transparent electrode; a first uneven structure at an interface between the low-refractive-index layer and the high-refractive-index layer, the first uneven structure including depressions and projections, a height of each of the projections relative to the depressions being 400 nm or more; and a second uneven structure at an interface between the reflecting electrode and the organic layer, the second uneven structure including depressions and projections, a height of each of the projections relative to the depressions in the second uneven structure being 20 nm or more and 100 nm or less. |
| US09214642B2 |
OLED device and manufacturing method thereof, display apparatus
An OLED device, comprising: a first electrode (10), a second electrode (11) and an organic thin film layer (13); the organic thin film layer comprises a hole layer (103), an electron layer (104) and an organic light emitting layer (105) located between the hole layer (103) and the electron layer (104); and the organic thin film layer (13) further comprises a hole blocking layer (12). The organic light emitting layer (105) comprises a first light emitting unit (1051), a second light emitting unit (1052) and a third light emitting unit (1053). A manufacturing method of an OLED device and a display apparatus comprising an OLED device are provided. |
| US09214634B2 |
Organic photovoltaic cell, organic semiconductor polymer and composition for organic semiconductor material used therefor
An organic photovoltaic cell, containing a first electrode; a second electrode; and a photoelectric conversion layer between the first electrode and the second electrode, wherein the photoelectric conversion layer contains a polymer having a structural unit represented by formula (I): wherein X represents S, NR2, O, Se or Te; Y represents NR2, O, Te, SO, SO2 or CO; and R1 and R2 represent a hydrogen atom or a substituent. |
| US09214632B2 |
Manufacturing apparatus and manufacturing method of lighting device
A manufacturing apparatus of a lighting device, including a vacuum chamber, an exhaust system by which the vacuum chamber is set to a reduced-pressure state, and a transfer chamber from which a substrate is transferred to the vacuum chamber is provided. The vacuum chamber of the manufacturing apparatus includes a plurality of deposition chambers in which a first electrode, a first light-emitting unit including at least a light-emitting layer, an intermediate layer, a second light-emitting unit including at least a light-emitting layer, a second electrode, a sealing film are formed, and a substrate transfer means by which the substrate is sequentially transferred to the deposition chambers. |
| US09214626B2 |
Resistance change memory device
A resistance change memory device with a high ON/OFF radio can be provided according to an embodiment includes a first electrode containing a first element, a resistance change layer provided on the first electrode and containing an oxide of the first element, an oxygen conductive layer provided on the resistance change layer, containing a second element and oxygen, having oxygen ion conductivity, and having a relative permittivity higher than a relative permittivity of the resistance change layer, and a second electrode provided on the oxygen conductive layer. The resistance change layer undergoes dielectric breakdown earlier than the oxygen conductive layer when a voltage between the first electrode and the second electrode is continuously increased from zero. |
| US09214622B2 |
Size-controllable opening and method of making same
A support structure includes an internal cavity. An elastic membrane extends to divide the internal cavity into a first chamber and a second chamber. The elastic membrane includes a nanometric-sized pin hole extending there through to interconnect the first chamber to the second chamber. The elastic membrane is formed of a first electrode film and a second electrode film separated by a piezo insulating film. Electrical connection leads are provided to support application of a bias current to the first and second electrode films of the elastic membrane. In response to an applied bias current, the elastic membrane deforms by bending in a direction towards one of the first and second chambers so as to produce an increase in a diameter of the pin hole. |
| US09214619B2 |
Method of improving energy consumption efficiency and mobile terminal thereof, and use of thermo-electric conversion module
The present disclosure provides a method of improving the energy consumption efficiency and a mobile terminal thereof, and a use of a thermo-electric conversion module. The method comprises the following steps: A. a power amplifier module electrically connected to a circuit board of the mobile terminal amplifies a communication signal of the mobile terminal to generate heat energy; B. a thermo-electric conversion module, of which an output terminal is electrically connected to the circuit board, absorbs the heat energy generated by the power amplifier module during operation; and C. the thermo-electric conversion module converts the heat energy absorbed into electric power and output the electric power to the circuit board. |
| US09214617B2 |
Electronic component module
An electronic component module has a circuit board in which metal plates are bonded to both surfaces of a ceramic substrate, and an electronic component that is bonded to at least one surface of the metal plate and is operable at least 125° C. The electronic component is bonded to the metal plate via a brazing material layer having a higher melting point than a operating temperature of the electronic component. |
| US09214613B2 |
Method of forming light-generating device including reflective layer
A system and method for manufacturing a light-generating device is described. A preferred embodiment comprises a plurality of LEDs formed on a substrate. Each LED preferably has spacers along the sidewalls of the LED, and a reflective surface is formed on the substrate between the LEDs. The reflective surface is preferably located lower than the active layer of the individual LEDs. |
| US09214611B2 |
Reflecting resin sheet, light emitting diode device and producing method thereof
A reflecting resin sheet provides a reflecting resin layer at the side of a light emitting diode element. The reflecting resin sheet includes a release substrate and the reflecting resin layer provided on one surface in a thickness direction of the release substrate. The reflecting resin layer is formed corresponding to the light emitting diode element so as to be capable of being in close contact with the light emitting diode element. |
| US09214608B2 |
Luminescence diode arrangement, backlighting device and display device
A luminescence diode arrangement includes a first luminescence diode chip, a second luminescence diode chip and a luminescence conversion element, wherein the first luminescence diode chip emits blue light, the second luminescence diode chip contains a semiconductor layer sequence that emits greens light, the luminescence conversion element converts part of the blue light emitted by the first luminescence diode chip into red light, and the luminescence diode arrangement emits mixed light containing blue light of the first luminescence diode chip, green light of the second luminescence diode chip and red light of the luminescence conversion element. |
| US09214607B1 |
Wire bonded light emitting diode (LED) components including reflective layer
A Light Emitting Diode (LED) component includes an LED die having first and second opposing faces and a sidewall. A contact is provided that is spaced apart from the LED die. The contact includes an inner face adjacent the first face and an outer face adjacent the second face. The contact may be a portion of a lead frame or a discrete contact slug. A wire bond extends between the first face and the inner face. A reflective layer is provided on the inner face that extends to the sidewall and also extends along the sidewall. The reflective layer may include white paint. Related fabrication methods are also described. |
| US09214604B2 |
Plasmonic IR devices
An infra-red (IR) device comprising a dielectric membrane formed on a silicon substrate comprising an etched portion; and at least one patterned layer formed within or on the dielectric membrane for controlling IR emission or IR absorption of the IR device, wherein the at least one patterned layer comprises laterally spaced structures. |
| US09214603B2 |
Semiconductor light emitting device including GaAs substrate
A semiconductor light emitting device including: a substrate made of GaAs; and a semiconductor layer formed on the substrate, in which part of the substrate on a side opposite to the semiconductor layer is removed by etching so that the semiconductor light emitting device has a thickness of not more than 60 μm. |
| US09214599B2 |
Light-emitting device
A light-emitting device includes a substrate, and a plurality of light-emitting elements that are mounted on the substrate and each emit light within a same color region. The plurality of light-emitting elements satisfy at least one of a first condition and a second condition. The first condition is that a maximum deviation in peak wavelength of light emitted from the plurality of light-emitting elements is not less than 1.25 nm. The second condition is that a maximum deviation in threshold voltage of the plurality of light-emitting elements is not less than 0.05 V. |
| US09214598B2 |
Pixel structure of a liquid crystal display panel and pixel forming method thereof
A pixel structure of a liquid crystal display panel includes a first substrate; a color filter layer formed on the first substrate, the color filter layer comprising a plurality of filtering areas for filtering light, and a plurality of blocking areas for blocking light; a main spacer formed on one of the blocking areas; a sub spacer formed on another one of the blocking areas; a second substrate; a thin film transistor formed on the second substrate; an insulating layer formed above the thin film transistor and the second substrate; a liquid crystal layer formed between the first substrate and the second substrate; wherein a distance from an upper surface of the insulating layer near the main spacer to the second substrate is greater than a distance from an upper surface of the insulating layer near the sub spacer to the second substrate. |
| US09214591B2 |
Securing device for solar cells and method for securing solar cells
The invention relates to a device for securing solar cells to glass surfaces, the securing device comprising a film of encapsulation material containing a plurality of holes and troughs in the film surface. Solar cells disposed on the film can be secured to a glass surface as a result of a vacuum being generated in the troughs and holes. The invention also relates to a method for securing solar cells in solar module production. |
| US09214590B2 |
High fidelity nano-structures and arrays for photovoltaics and methods of making the same
A photovoltaic device includes an electron accepting material and an electron donating material. One of the electron accepting or donating materials is configured and dimensioned as a first component of a bulk heterojunction with a predetermined array of first structures, each first structure is substantially equivalent in three dimensional shape, has a substantially equivalent cross-sectional dimension, and where each first structure of the array of first structures has a substantially equivalent orientation with respect to adjacent first structures of the predetermined array forming a substantially uniform array. |
| US09214588B2 |
Wavelength sensitive sensor photodiodes
The present invention is directed toward a dual junction photodiode semiconductor devices with improved wavelength sensitivity. The photodiode employs a high quality n-type layer with relatively lower doping concentration and enables high minority carrier lifetime and high quantum efficiency with improved responsivity at multiple wavelengths. In one embodiment, the photodiode comprises a semiconductor substrate of a first conductivity type, a first impurity region of a second conductivity type formed epitaxially in the semiconductor substrate, a second impurity region of the first conductivity type shallowly formed in the epitaxially formed first impurity region, a first PN junction formed between the epitaxially formed first impurity region and the second impurity region, a second PN junction formed between the semiconductor substrate and the epitaxially formed first impurity region, and at least one passivated V-groove etched into the epitaxially formed first impurity region and the semiconductor substrate. |
| US09214585B2 |
Annealing for damage free laser processing for high efficiency solar cells
Annealing solutions providing damage-free laser patterning utilizing auxiliary heating to anneal laser damaged ablation regions are provided herein. Ablation spots on an underlying semiconductor substrate are annealed during or after pulsed laser ablation patterning of overlying transparent passivation layers. |
| US09214582B2 |
Uni-travelling-carrier photodiode
A uni-travelling carrier photodiode includes an absorption region of p-type doped material. The photodiode further includes a first collector layer and second collector layer wherein the absorption region is located between the first collector layer and the second collector layer. |
| US09214581B2 |
Barrier infrared detectors on lattice mismatch substrates
Systems and methods of implementing barrier infrared detectors on lattice mismatched substrates are provided. The barrier infrared detector systems combine an active detector structure (e.g., contact/barrier/absorber pairs) with a non-lattice matched substrate through a multi-layered transitional structure that forms a virtual substrate that can be strain balanced with the detector structure. The transitional metamorphic layer may include one or both of at least one graded metamorphic buffer layer or interfacial misfit array (IMF). A further interfacial layer may be interposed within the transitional structure, in some embodiments this interfacial layer includes at least one layer of AlSb. |
| US09214579B2 |
Electrical contact structure with a redistribution layer connected to a stud
A manufacturing method of a semiconductor structure includes the following steps. A wafer structure having a silicon substrate and a protection layer is provided. An electrical pad on the protection layer is exposed through the concave region of the silicon substrate. An isolation layer is formed on the sidewall of the silicon substrate surrounding the concave region and a surface of the silicon substrate facing away from the protection layer. A redistribution layer is formed on the isolation layer and the electrical pad. A passivation layer is formed on the redistribution layer. The passivation layer is patterned to form a first opening therein. A first conductive layer is formed on the redistribution layer exposed through the first opening. A conductive structure is arranged in the first opening, such that the conductive structure is in electrical contact with the first conductive layer. |
| US09214577B2 |
Reduced light degradation due to low power deposition of buffer layer
Methods for forming a photovoltaic device include forming a buffer layer between a transparent electrode and a p-type layer. The buffer layer includes a work function that falls substantially in a middle of a barrier formed between the transparent electrode and the p-type layer to provide a greater resistance to light induced degradation. An intrinsic layer and an n-type layer are formed over the p-type layer. |
| US09214576B2 |
Transparent conducting oxide for photovoltaic devices
One embodiment of the present invention provides a solar cell. The solar cell includes a Si base layer, a passivation layer situated above the Si base layer, a layer of heavily doped amorphous Si (a-Si) situated above the passivation layer, a first transparent-conducting-oxide (TCO) layer situated above the heavily doped a-Si layer, a back-side electrode situated below the Si base layer, and a front-side electrode situated above the first TCO layer. The first TCO layer comprises at least one of: GaInO, GaInSnO, ZnInO, and ZnInSnO. |
| US09214575B2 |
Solar cell contact and method of making the contact
A solar panel comprises a back contact layer, an absorber layer over the back contact layer, a buffer layer over the absorber layer, and a front contact layer comprising a transparent conductive material over the buffer layer. The front contact layer has a plurality of outer edges and a seed layer comprising a seed layer material along the outer edges. |
| US09214572B2 |
High voltage MOSFET devices and methods of making the devices
A SiC MOSFET device having low specific on resistance is described. The device has N+, P-well and JFET regions extended in one direction (Y-direction) and P+ and source contacts extended in an orthogonal direction (X-direction). The polysilicon gate of the device covers the JFET region and is terminated over the P-well region to minimize electric field at the polysilicon gate edge. In use, current flows vertically from the drain contact at the bottom of the structure into the JFET region and then laterally in the X direction through the accumulation region and through the MOSFET channels into the adjacent N+ region. The current flowing out of the channel then flows along the N+ region in the Y-direction and is collected by the source contacts and the final metal. Methods of making the device are also described. |
| US09214571B2 |
Semiconductor device capable of reducing influences of adjacent word lines or adjacent transistors and fabricating method thereof
A semiconductor device capable of reducing influences of adjacent word lines is provided in the present invention. The semiconductor device includes: a substrate, and a word line disposed in the substrate. The word line includes: a gate electrode, a gate dielectric layer disposed between the gate electrode and the substrate and at least one first charge trapping dielectric layer disposed adjacent to the gate electrode, wherein the first charge trapping dielectric layer comprises HfO2, TiO2, ZrO2, a germanium nanocrystal layer, an organic charge trapping material, HfSiOxNy, or MoSiOqNz. |
| US09214569B2 |
Memory device
According to example embodiments, a memory device includes a substrate, a channel region on the substrate, a plurality of gate electrode layers stacked on each other on the substrate, and a plurality of contact plugs. The gate electrode layers are adjacent to the channel region and extend in one direction to define a pad region. The gate electrode layers include first and second gate electrode layers. The contact plugs are connected to the gate electrode layers in the pad region. At least one of the contact plugs is electrically insulated from the from the first gate electrode layer and electrically connected to the second gate electrode layer by penetrating through the first gate electrode layer. |
| US09214568B2 |
Thin film transistor with two-dimensional doping array
A thin film transistor includes: a source region; a drain region; and a polycrystalline thin film active channel region connected to the source region and the drain region, the active channel region comprising grains and being doped with a two-dimensional pattern comprising a plurality of doped regions, the plurality of doped regions each comprising at least portions of a plurality of the grains and at least one grain boundary. |
| US09214558B2 |
Method of forming semiconductor device including silicide layers
A method includes forming a gate structure on a semiconductor material region, wherein the gate structure includes spacer elements abutting a gate electrode layer. The gate electrode layer is etched to provide a recess. A hard mask layer is formed over the gate electrode layer in the recess. Silicide layers are then formed on a source region and a drain region disposed in the semiconductor material region, while the hard mask is disposed over the gate electrode layer. A source contact and a drain contact is then provided, each source and drain contact being conductively coupled to a respective one of the silicide layers. |
| US09214551B2 |
Method for fabricating semiconductor device, and semiconductor device made thereby
A method for fabricating a semiconductor device, and a semiconductor device made with the method are described. In the method, a cavity is formed in a substrate, a first epitaxy process is performed under a pressure higher than 65 torr to form a buffer layer in the cavity, and a second epitaxy process is performed to form a semiconductor compound layer on the buffer layer in the cavity. In the semiconductor device, the ratio (S/Y) of the thickness S of the buffer layer on a lower sidewall of the cavity to the thickness Y of the buffer layer at the bottom of the cavity ranges from 0.6 to 0.8. |
| US09214549B2 |
High voltage device having Schottky diode
A high voltage device having Schottky diode includes a semiconductor substrate, a Schottky diode formed on the semiconductor substrate, at least a first doped region having a first conductive type formed in the semiconductor substrate and under the Schottky diode, and a control gate positioned on the semiconductor substrate. The control gate covers a portion of the Schottky diode and the first doped region positioned on the semiconductor substrate. |
| US09214540B2 |
N-type metal oxide semiconductor (NMOS) transistor for electrostatic discharge (ESD)
One or more techniques or systems for forming an n-type metal oxide semiconductor (NMOS) transistor for electrostatic discharge (ESD) are provided herein. In some embodiments, the NMOS transistor includes a first region, a first n-type plus (NP) region, a first p-type plus (PP) region, a second NP region, a second PP region, a shallow trench isolation (STI) region, and a gate stack. In some embodiments, the first PP region is between the first NP region and the second NP region. In some embodiments, the second NP region is between the first PP region and the second PP region, the gate stack is between the first PP region and the second NP region, the STI region is between the second NP region and the second PP region. Accordingly, the first PP region enables ESD current to discharge based on a low trigger voltage for the NMOS transistor. |
| US09214534B2 |
Lateral PNP bipolar transistor formed with multiple epitaxial layers
A lateral bipolar transistor with deep emitter and deep collector regions is formed using multiple epitaxial layers of the same conductivity type. Deep emitter and deep collector regions are formed without the use of trenches. Vertically aligned diffusion regions are formed in each epitaxial layer so that the diffusion regions merged into a contiguous diffusion region after annealing to function as emitter or collector or isolation structures. In another embodiment, a lateral trench PNP bipolar transistor is formed using trench emitter and trench collector regions. In yet another embodiment, a lateral PNP bipolar transistor with a merged LDMOS transistor is formed to achieve high performance. |
| US09214533B2 |
Semiconductor device having transparent electrodes
This semiconductor device (100A) includes: a substrate (2); a gate electrode (3) formed on the substrate (2); a gate insulating layer (4) formed over the gate electrode (3); an oxide semiconductor layer (5) formed on the gate insulating layer (4); source and drain electrodes (6s, 6d) electrically connected to the oxide semiconductor layer (5); a first transparent electrode (7) electrically connected to the drain electrode (6d); an interlayer insulating layer (8) including a dielectric layer (8a) formed over the source and drain electrodes (6s, 6d); and a second transparent electrode (9) formed on the interlayer insulating layer (8). At least a portion of the second transparent electrode (9) overlaps with the first transparent electrode (7) with the dielectric layer (8a) interposed between them, and the oxide semiconductor layer (5) and the first transparent electrode (7) are formed out of the same oxide film. |
| US09214525B2 |
Gate stack having electron blocking layers on charge storage layers for electronic devices
Methods and apparatuses for electronic devices such as non-volatile memory devices are described. The memory devices include a multi-layer control dielectric, such as a double or triple layer. The multi-layer control dielectric includes a combination of high-k dielectric materials such as aluminum oxide, hafnium oxide, and/or hybrid films of hafnium aluminum oxide. The multi-layer control dielectric provides enhanced characteristics, including increased charge retention, enhanced memory program/erase window, improved reliability and stability, with feasibility for single or multi state (e.g., two, three or four bit) operation. |
| US09214523B2 |
Field-effect transistor
A field-effect transistor includes a plurality of unit elements, an insulating film, and a wiring. The plurality of unit elements include a semiconductor layer having a first surface, a plurality of drain electrodes, gate electrodes, and a source electrode. The source electrode is electrically continuously provided across the plurality of unit elements outside the gate electrodes on the first surface and has narrow parts between the gate electrodes which are spaced apart from each other and which belong to adjacent unit elements among the plurality of unit elements. The narrow parts have a width narrower than a width of other parts of the source electrode. The insulating film has openings provided on the source electrode. The insulating film covers the source electrode across the plurality of unit elements. The openings are arranged at the other parts of the source electrode on both sides of each of the narrow parts. |
| US09214522B2 |
Production method of semiconductor device, semiconductor wafer, and semiconductor device
A semiconductor wafer, includes: a plurality of element regions; a surface electrode that is disposed in each of the plurality of element regions; an insulating layer that is disposed in each of the plurality of element regions and of which height from a front side surface of the semiconductor wafer is higher than that of the surface electrode in a periphery of the surface electrode; and a dicing line groove that is formed in a front side surface of the semiconductor wafer, that surrounds the surface electrode with the insulating layer therebetween, of which height from the front side surface of the semiconductor wafer is lower than that of the insulating layer, and that extends to a perimeter of the semiconductor wafer; in which the insulating layer is formed with a communication passage that extends from a side of the surface electrode to the dicing line groove. |
| US09214520B2 |
Semiconductor device
An embodiment is a semiconductor device which includes a first oxide semiconductor layer over a substrate having an insulating surface and including a crystalline region formed by growth from a surface of the first oxide semiconductor layer toward an inside; a second oxide semiconductor layer over the first oxide semiconductor layer; a source electrode layer and a drain electrode layer which are in contact with the second oxide semiconductor layer; a gate insulating layer covering the second oxide semiconductor layer, the source electrode layer, and the drain electrode layer; and a gate electrode layer over the gate insulating layer and in a region overlapping with the second oxide semiconductor layer. The second oxide semiconductor layer is a layer including a crystal formed by growth from the crystalline region. |
| US09214512B2 |
Three-terminal variable capacitor
A novel semiconductor variable capacitor is presented. The semiconductor structure is simple and is based on a semiconductor variable MOS capacitor structure suitable for integrated circuits, which has at least three terminals, one of which is used to modulate the equivalent capacitor area of the MOS structure by increasing or decreasing its DC voltage with respect to another terminal of the device, in order to change the capacitance over a wide ranges of values. Furthermore, the present invention decouples the AC signal and the DC control voltage minimizing the distortion and increasing the performance of the device, such as its control characteristic. The present invention is simple and only slightly dependent on the variations due to the fabrication process. It exhibits a high value of capacitance density and, if opportunely implemented, shows a quasi linear dependence of the capacitance value with respect to the voltage of its control terminal. |
| US09214511B2 |
Integrated inductor and integrated inductor fabricating method
The present invention provides an integrated inductor and an integrated inductor fabricating method. The integrated inductor comprises: a semiconductor substrate, an inductor, and a redistribution layer (RDL). The inductor is formed above the semiconductor substrate. The RDL is formed above the inductor and has a specific pattern to form a patterned ground shield (PGS). The integrated inductor fabricating method comprises: forming a semiconductor substrate; forming an inductor above the semiconductor substrate; and forming redistribution layer (RDL) having a specific pattern above the inductor to form a patterned ground shield (PGS). |
| US09214505B2 |
Display and electronic unit
A display includes: a first region including first pixels configured of a single color; a second region including second pixels configured of a plurality of colors different from the single color, the second pixels having an organic layer including a common light emitting layer; and a dividing wall separating the first region from the second region. |
| US09214504B2 |
Display module
An organic display device includes a pixel driving circuit having a thin film transistor connected to a current supply line and a capacitor. A first insulation layer, with a first electrode thereon, covers a source electrode of the transistor. The first electrode is connected to the transistor through a contact hole in the insulation layer. A second insulation layer including an aperture is formed on the first insulation layer and electrode layers. An organic light emitting layer, with a second electrode thereon is formed in the aperture and connected to the first electrode. The second insulation layer includes an inner wall at the aperture, said inner wall having a surface of a convex plane on an edge of the recessed part of the first electrode. The convex plane is located between the organic light emitting layer and the edge of the first electrode, and the second electrode is formed over plurality of pixels. |
| US09214503B2 |
Organic light emitting display panel including a protective spacer and method of manufacturing the same
An organic light emitting display panel may include a plurality of thin film transistors on a substrate, an insulating interlayer on the thin film transistors, a plurality of first electrodes on a portion of the insulating interlayer electrically connected to the thin film transistors, a plurality of metal lines on a portion of the insulating interlayer, a pixel defining layer on a portion of the insulating interlayer and a portion of the first electrodes, a plurality of organic light emitting structures on the first electrodes in the pixel area, a second electrode on the organic light emitting structures, and a spacer on the pixel defining layer. The insulation interlayer may partially expose electrodes of the thin film transistors. The pixel defining layer may define a pixel area by partially exposing the first electrodes, and an exposed area of the insulating interlayer by partially exposing the insulating interlayer. |
| US09214501B2 |
In-cell OLED touch display panel structure
An in-cell OLED touch display panel structure includes an upper substrate, a lower substrate, an OLED layer configured between the upper and lower substrates, and a black matrix layer. The black matrix layer is disposed at one surface of the upper substrate that faces the OLED layer, and the black matrix layer is composed of a plurality of opaque conductor lines. The plurality of opaque conductor lines is divided into a first group of opaque conductor lines, a second group of opaque conductor lines, and a third group of opaque conductor lines. The second group of opaque conductor lines is formed with N mesh-like polygonal regions. The opaque conductor lines in any one of the polygonal regions are electrically connected together, while any two polygonal regions are not connected, so as to form a single-layered touch sensing pattern on the black matrix layer. |
| US09214499B2 |
Organic light emitting display device
An organic light emitting display device includes a plurality of first sub-pixels arranged adjacent to each other along a first direction, each of the first sub-pixels includes a first emission region configured to emit light of a first color and a first transmission region configured to transmit external light, the first emission regions of at least two of the first sub-pixels are adjacent to each other; and a plurality of second sub-pixels arranged adjacent to each other along the first direction and adjacent to corresponding ones of the plurality of first sub-pixels along a second direction crossing the first direction, each of the plurality of second sub-pixels includes a second emission region configured to emit light of a second color and a second transmission region configured to transmit external light, the second emission regions of at least two of the sub-pixels are adjacent to each other. |
| US09214497B2 |
Organic light emitting display device and method of manufacturing the same
An organic light emitting display device includes a substrate and a plurality of pixels defined in the substrate. A pixel includes red subpixel, green subpixel, blue subpixel, and white subpixel. The organic light emitting display device includes an anode electrode formed on the substrate, a cathode electrode opposing the anode electrode, and a red common emission layer, a green common emission layer, and a blue common emission layer formed across each of the red, green, blue and white subpixel areas. The blue common emission layer is disposed above and adjacent to the anode electrode, the green common emission layer is disposed above the blue common emission layer, and the red common emission layer is disposed above the green common emission layer and adjacent to the cathode electrode. |
| US09214491B2 |
Solid-state imaging apparatus for causing an FD capacitor value to be variable without increasing a number of elements
A solid-state imaging apparatus wherein an FD capacitor value is variable without increasing the number of elements. There is provided a solid-state imaging apparatus including a plurality of photoelectric conversion elements arranged in a horizontal direction and a vertical direction, for generating an electric charge by photoelectric conversion; a plurality of transfer transistors each connected to each of the photoelectric conversion elements, for transferring the electric charge generated by the plurality of photoelectric conversion elements; a plurality of floating diffusion regions for holding the electric charge transferred by the transfer transistors; a plurality of amplifiers each connected to each of the floating diffusion regions, for amplifying a signal based on the electric charge in the plurality of floating diffusion regions; and a connecting unit for connecting and disconnecting between the plurality of floating diffusion regions. |
| US09214488B2 |
Solid state imaging device
According to one embodiment, a solid state imaging device includes a semiconductor substrate comprising a first surface and a second surface opposite the first surface; a circuit at a side of the first surface of the semiconductor substrate; a pixel in the semiconductor substrate and converting light from a side of the second surface into electric charge; and an element at a side of the second surface of the semiconductor substrate. The pixel includes a photo diode in the semiconductor substrate at the side of the first surface, and the photo diode includes a diffusion layer in an impurity region in the semiconductor substrate at the side of the first surface. |
| US09214487B2 |
Image sensor having light distributing element
An image sensor including a plurality of sensing pixels, a plurality of micro-lenses disposed on the sensing pixels and a plurality of first light distributing elements disposed between the sensing pixels and the micro-lenses is provided. Each of the first light distributing elements includes a first refractive index pattern and a second refractive index pattern surrounding the first refractive index pattern. The refractive index of the first refractive index pattern is larger than the refractive index of the second refractive index pattern. |
| US09214486B2 |
Imaging device and imaging apparatus generating image information for each of plural pixels from received light
An imaging apparatus includes an imaging device which includes a plurality of pixels and is operable to generate image information for each pixel from received light. Each of the plurality of pixels includes one of first to fourth color filters. Each of the first to the fourth color filters has different spectral characteristics. The fourth color filter has the highest light transmittance among the color filters. The first to the fourth color filters are arranged in a specific array. The specific array has first to third centroids which make a Bayer array. |
| US09214485B2 |
Thick multilayer interference filter having a lower metal layer located within an interconnect region
A multilayer optical filter is provided for an integrated circuit including a substrate and a metallization layer interconnection part. The optical filter is formed from a first filter part located within the interconnection part and positioned over a photosensitive region of the substrate. The optical filter further includes a second filter part positioned above the first filter part and the interconnection part. The first and second filter parts each include a metal layer. The first and second filter parts are separated from each other as a function of a wavelength in vacuum of an optical signal to be filtered and received by the photosensitive region. |
| US09214481B2 |
TFT-LCD, driving device and manufacturing method thereof
An embodiment of the disclosed technology provides a driving device for a thin film transistor liquid crystal display (TFT-LCD) and a method for manufacturing the same. The driving device comprises at least one first TFT and at least one second TFT formed a base substrate, wherein load of the first TFT is larger than load of the second TFT, the first TFT is of a top-gate configuration, and the second TFT is of a bottom-gate configuration. |
| US09214479B2 |
Light emitting diode display panel
A light emitting diode (LED) display panel includes a plurality of pixel units, a plurality of first bar-shaped electrode layers arranged along a first direction and a plurality second bar-shaped electrode layers arranged along a second direction. The first bar-shaped electrode layers are coupled to a first power supply and the pixel units, and the second bar-shaped electrode layers are also coupled to the first power supply. Only a non-complete portion of overlap positions between the first and second bar-shaped electrode layers have first conductive paths configured to couple the first bar-shaped electrode layers to the corresponding second bar-shaped electrode layers. |
| US09214478B2 |
Display panel and method of manufacturing the same
A display panel includes gate lines extending in a first direction, a first column insulating layer between the gate lines, a gate electrode disposed on the first column insulating layer. The first column insulating layer, the gate lines, and the gate electrode are covered by a gate insulating layer. An active layer is disposed on the gate insulating layer. Source and drain electrodes are disposed above the active layer. Data lines are connected to the source electrode. A second column insulating layer is interposed between the data lines and includes a first contact hole to expose the drain electrode. A contact electrode is disposed in the first contact hole and connected to the drain electrode, a second contact hole is formed through a protective layer to correspond to the first contact hole, and a pixel electrode is connected to the contact electrode through the second contact hole. |
| US09214477B2 |
Display device and electronic equipment
A display device includes a pixel array section, the pixel array section having pixels arranged in a matrix form, at least one of the pixels including an electro-optical element, a write transistor, a holding capacitance, a drive transistor, and a switching transistor. A write scan line is disposed for each pixel row of the pixel array section and adapted to convey a write signal to be applied to the gate electrode of the write transistor. The wiring structure of the write scan line does not intersect with the wiring pattern connected to the gate electrode of the drive transistor. |
| US09214474B2 |
Semiconductor device and method for manufacturing semiconductor device
To provide a transistor including an oxide semiconductor layer and having electric characteristics required depending on an intended use and provide a semiconductor device including the transistor, in a transistor in which a semiconductor layer, source and drain electrode layers, a gate insulating film, and a gate electrode are stacked in this order over an oxide semiconductor insulating film, an oxide semiconductor stack layer which includes at least two oxide semiconductor layers with energy gaps different from each other and a mixed region therebetween is used as the semiconductor layer. |
| US09214466B2 |
Method and system for split threshold voltage programmable bitcells
A bitcell may include an insulating region, a first doping proximate to the insulating region, and a second doping surrounding the first doping. The second doping can be characterized by a higher gate voltage breakdown than the first doping. Also, the bitcell may include a gate terminal, and the bitcell may be configured for programming by a voltage on the gate terminal that results in a conductive hole selectively burned in the insulating region between the gate terminal and the first doping. |
| US09214465B2 |
Structures and operational methods of non-volatile dynamic random access memory devices
A Dynamic Random Access Memory (DRAM) cell and a semiconductor Non-Volatile Memory (NVM) cell are incorporated into a single Non-Volatile Dynamic Random Access Memory (NVDRAM) cell. The NVDRAM cell is operated as the conventional DRAM cell for read, write, and refreshment on dynamic memory applications. Meanwhile the datum in the NVM cells can be directly loaded into the correspondent DRAM cells in the NVDRAM cell array without applying intermediate data amplification and buffering leading to high speed non-volatile data access. The datum in DRAM cells can be also stored back to the correspondent semiconductor NVM cells in the NVDRAM cells for the datum required for non-volatile data storage. The NVDRAM of the invention can provide both fast read/write function for dynamic memory and non-volatile memory storage in one unit memory cell. |
| US09214464B2 |
Method of manufacturing semiconductor device with offset sidewall structure
A method of manufacturing a semiconductor device with NMOS and PMOS transistors is provided. The semiconductor device can lessen a short channel effect, can reduce gate-drain current leakage, and can reduce parasitic capacitance due to gate overlaps, thereby inhibiting a reduction in the operating speed of circuits. An N-type impurity such as arsenic is ion implanted to a relatively low concentration in the surface of a silicon substrate (1) in a low-voltage NMOS region (LNR) thereby to form extension layers (61). Then, a silicon oxide film (OX2) is formed to cover the whole surface of the silicon substrate (1). The silicon oxide film (OX2) on the side surfaces of gate electrodes (51-54) is used as an offset sidewall. Then, boron is ion implanted to a relatively low concentration in the surface of the silicon substrate (1) in a low-voltage PMOS region (LPR) thereby to form P-type impurity layers (621) later to be extension layers (62). |
| US09214458B2 |
Semiconductor device
In a semiconductor device having a built-in Schottky barrier diode as a reflux diode, a maximum unipolar current is increased in a reflux state and a leakage current is reduced in an OFF state. A Schottky electrode is provided in at least a part of a surface between adjacent well regions of a second conductivity type disposed on a surface layer side of a drift layer of a first conductivity type, and an impurity concentration of a first conductivity type in a first region provided in a lower part of the Schottky electrode and provided between the adjacent well regions is set to be higher than a first impurity concentration of a first conductivity type in the drift layer and to be lower than a second impurity concentration of a second conductivity type in the well region. |
| US09214456B2 |
Light emitting diode (LED) system having lighting device and wireless control system
A light emitting diode (LED) system includes one or more light emitting diodes (LED), or other lighting devices, configured to provide lighting in an area, and a wireless control system configured to control the light emitting diodes (LED). The wireless control system includes at least one transmitter/receiver device in signal communication with the light emitting diode (LED), and a wireless control device operable by a user, configured to send input signals to the transmitter/receiver device for controlling the light emitting diode (LED), and to receive output signals from the transmitter/receiver device for indicating a status of the light emitting diodes (LED). |
| US09214454B2 |
Batch process fabrication of package-on-package microelectronic assemblies
A microelectronic assembly can be made by joining first and second subassemblies by electrically conductive masses to connect electrically conductive elements on support elements of each subassembly. A patterned layer of photo-imageable material may overlie a surface of one of the support elements and have openings with cross-sectional dimensions which are constant or monotonically increasing with height from the surface of that support element, where the masses extend through the openings and have dimensions defined thereby. An encapsulation can be formed by flowing an encapsulant into a space between the joined first and second subassemblies. |
| US09214449B2 |
Reconfigurable connections for stacked semiconductor devices
Some embodiments include apparatus, systems, and methods comprising semiconductor dice arranged in a stack, a number of connections configured to provide communication among the dice, at least a portion of the connections going through at least one of the dice, and a module configured to check for defects in the connections and to repair defects the connections. |
| US09214444B2 |
Aluminum coated copper ribbon
A ribbon, preferably a bonding ribbon for bonding in microelectronics, contains a first layer containing copper, a coating layer containing aluminum superimposed over the first layer, and an intermediate layer. In a cross-sectional view of the ribbon, the area share of the first layer is from 50 to 96% and the aspect ratio between the width and the height of the ribbon in a cross-sectional view is from 0.03 to less than 0.8. The ribbon has a cross-sectional area of 25,000 μm2 to 800,000 μm2. The intermediate layer contains at least one intermetallic phase containing materials of the first and coating layers. The invention further relates to a process for making a wire, to a wire obtained by the process, to an electric device containing the wire, to a propelled device comprising said electric device and to a process of connecting two elements through the wire by wedge-bonding. |
| US09214442B2 |
Power semiconductor module, method for producing a power semiconductor module, and semiconductor chip
In a power semiconductor module, a copper-containing first soldering partner, a connection layer, and a copper-containing second soldering partner are arranged successively and fixedly connected with one another. The connection layer has a portion of intermetallic copper-tin phases of at least 90% by weight. For producing such a power semiconductor module the soldering partners and the solder arranged there between are pressed against one another with a predefined pressure and the solder is melted. After termination of a predefined period of time the diffused copper and the tin from the liquid solder form a connection layer comprising intermetallic copper-tin phases, the portion of which is at least 90% by weight of the connection layer created from the solder layer. |
| US09214441B2 |
Semiconductor package including stacked memory chips
According to example embodiments, a semiconductor package includes a first and a second semiconductor package. The first semiconductor package includes a first package substrate, first and second memory chips spaced apart from each other on the first package substrate in a first direction, third and fourth memory chips on the first and second memory chips, respectively, and first and second jumper chips on the first and second memory chips, respectively. The first and second jumper chips are spaced apart from the third and fourth memory chips, respectively, in a second direction crossing the first direction. The second semiconductor package may include a second package substrate and a logic chip on the second package substrate. The first semiconductor package may be on the second semiconductor package. |
| US09214436B2 |
Etching of under bump mettallization layer and resulting device
Methods for wet etching a UBM layer and the resulting devices are disclosed. Embodiments may include patterning metal bumps on a wafer that has at least two metal layers thereon; exposing the wafer to a first acid solution to remove a portion of a first of the two metal layers exposed by the patterning of the metal bumps; and exposing the wafer to a second acid solution to remove a portion a second of the two metal layers exposed by the patterning of the metal bumps and the exposure of the wafer to the first acid solution, wherein an undercut below the metal bumps, formed by removal of the portions of the first and second metal layers, is less than 1.5 microns. |
| US09214434B1 |
Fan-out semiconductor package
A wafer level fan out package includes a semiconductor die having a first surface, a second surface, and a third surface. A stiffener is disposed on the third surface of the semiconductor die. A conductive via passes through the stiffener. First and second electrically conductive patterns electrically connected to the conductive via are disposed on the first and second surfaces of the semiconductor die and stiffener. Solder balls are electrically connected to the first or second electrically conductive patterns. |
| US09214433B2 |
Charge damage protection on an interposer for a stacked die assembly
An apparatus relating generally to an interposer is disclosed. In such an apparatus, the interposer has a plurality of conductors and a plurality of charge attracting structures. The plurality of charge attracting structures are to protect at least one integrated circuit die to be coupled to the interposer to provide a stacked die. The plurality of conductors include a plurality of through-substrate vias. |
| US09214432B2 |
Explosion-protected semiconductor module
A semiconductor module has a carrier, a semiconductor chip mounted on the carrier, a bond wire, a module housing, and a first sound absorber. The module housing has a housing side wall. The bond wire is arranged in the module housing. At least a section of the first sound absorber is arranged between the semiconductor chip and the housing side wall. |
| US09214429B2 |
Trench interconnect having reduced fringe capacitance
Ultra-low-k dielectric materials used as inter-layer dielectrics in high-performance integrated circuits are prone to be structurally unstable. The Young's modulus of such materials is decreased, resulting in porosity, poor film strength, cracking, and voids. An alternative dual damascene interconnect structure incorporates deep air gaps into a high modulus dielectric material to maintain structural stability while reducing capacitance between adjacent nanowires. Incorporation of a deep air gap having k=1.0 compensates for the use of a higher modulus film having a dielectric constant greater than the typical ultra-low-k (ULK) dielectric value of about 2.2. The higher modulus film containing the deep air gap is used as an insulator and a means of reducing fringe capacitance between adjacent metal lines. The dielectric layer between two adjacent metal lines thus forms a ULK/high-modulus dielectric bi-layer. |
| US09214428B2 |
Self-aligned protection layer for copper post structure
A semiconductor device includes a copper-containing post overlying and electrically connected to a bond pad region. The semiconductor device further includes a protection layer on a surface of the copper-containing post, where the protection layer includes manganese. |
| US09214426B1 |
Highly coupled spiral planar inductors structure at bump to compensate on die excess capacitance of differential I/O
Methods and apparatuses for reducing excess on die capacitance. The method couples a first die pad to a first via. The method couples a second die pad to a second via. The method couples a first inductor to the first die pad and the second via. The method couples a second inductor to the second die pad and the first via. |
| US09214423B2 |
Method of forming a HEMT semiconductor device and structure therefor
In one embodiment, a method of forming a HEMT device may include plating a conductor or a plurality of conductors onto an insulator that overlies a plurality of current carrying electrodes of the HEMT device. The method may also include attaching a connector onto the conductor or attaching a plurality of connectors onto the plurality of conductors. |
| US09214422B2 |
Semiconductor apparatus having signal and ground terminals arranged on vertically adjacent wiring substrates
A semiconductor apparatus includes a first wiring substrate, a second wiring substrate positioned above the first wiring substrate, multiple connection terminals provided between the first wiring substrate and the second wiring substrate and configured to electrically connect the first wiring substrate and the second wiring substrate, an electronic component provided on at least one of the first wiring substrate and the second wiring substrate. The multiple connection terminals include a signal terminal and ground terminals provided on both sides of the signal terminal. The signal terminal and the ground terminals have side surfaces that face each other. The signal terminal and the ground terminals are adjacently arranged, so that intervals between the side surfaces of the signal terminal and the ground terminals are constant from a plan view. |
| US09214421B2 |
Semiconductor device with fine conductive pillar and method of manufacturing the same
A semiconductor device and a method of manufacturing the same are provided. A semiconductor device comprises a substrate, a conductive pattern formed on the substrate, and at least a conductive pillar having a predetermined height formed on the conductive pattern. The conductive pillar can be formed under a focus ion beam (FIB) or an electron beam environment. In one embodiment, a diameter of the conductive pillar is no more than 10 μm. |
| US09214417B2 |
Combined packaged power semiconductor device
A combined packaged power semiconductor device includes flipped top source low-side MOSFET electrically connected to top surface of a die paddle, first metal interconnection plate connecting between bottom drain of a high-side MOSFET or top source of a flipped high-side MOSFET to bottom drain of the low-side MOSFET, and second metal interconnection plate stacked on top of the high-side MOSFET chip. The high-side, low-side MOSFET and the IC controller can be packaged three-dimensionally reducing the overall size of semiconductor devices and can maximize the chip's size within a package of the same size and improves the performance of the semiconductor devices. The top source of flipped low-side MOSFET is connected to the top surface of the die paddle and thus is grounded through the exposed bottom surface of die paddle, which simplifies the shape of exposed bottom surface of the die paddle and maximizes the area to facilitate heat dissipation. |
| US09214416B1 |
High speed, low loss and high density power semiconductor packages (μMaxPak) with molded surface mount high speed device(s) and multi-chip architectures
A new Power DFN and Power QFN package architecture that accommodates Bump-chip die and other components in cavities on the bottom-side of the matrix leadframe, and the technique is also applicable to laminated substrate packages like the BGA and LGA.The package is especially suited for high speed power compound semiconductor devices like GaN and SiC. The package enables single and multiple power switch configurations, and well controlled paralleling of high speed power die switches. It enables co-packaging of associated components like cascoded switchs, gate drivers, isolators and protection devices, which must be tightly coupled at high switching speeds.The architecture accommodates components on the top-side of the leadframe as well allowing for multi-chip functions with extremely low interconnect inductance and resistance, and higher circuit and power densities.The package architecture provides for lower package thermal resistance with parallel thermal paths from both sides of power die to the external bottom-side pads, and supplementary isolated and non-isolated top-side heat dissipation.These type packages use standard proven, reliable and cost effective materials & assembly techniques that are available at commercial contract assemblers. They minimizes NRE for special equipment, tooling and development, and reduces time to market. |
| US09214413B2 |
Semiconductor die package with pre-molded die
A semiconductor die is packaged by providing a die assembly that includes a semiconductor die with an active surface and an opposite mounting surface with an attached thermally conductive substrate. The die assembly is mounted on a first surface of a lead frame die flag so that the thermally conductive substrate is sandwiched between the die flag and the semiconductor die. Bonding pads of the die are electrically connected with bond wires to lead frame lead fingers. A mold compound then encapsulates the semiconductor die, bond wires, and thermally conductive substrate. A second surface of the die flag is exposed through the mold compound. |
| US09214410B2 |
Stack packages and methods of fabricating the same
Stack packages are provided. The stack package includes a first chip and a second chip. The first chip includes a first chip body, first through electrodes penetrating the first chip body, and an insulation layer disposed on a bottom surface of the first chip body. The second chip includes a second chip body and bumps disposed on a top surface of the second chip body. The first and second chips are vertically stacked such that the bumps penetrate the insulation layer to pierce the first through electrodes and the top surface of the second chip body directly contacts the insulation layer. Related fabrication methods, electronic systems and memory cards are also provided. |
| US09214409B2 |
Semiconductor device
Provided is a semiconductor device. The semiconductor device includes a conductive pattern disposed on a semiconductor substrate. First and second conductive lines disposed on the conductive pattern and located at the same level as each other, are provided. An isolation pattern is disposed between the first and second conductive lines. A first vertical structure passing through the first conductive line and conductive pattern is provided. A second vertical structure passing through the second conductive line and conductive patterns is provided. An auxiliary pattern passing through the conductive pattern and in contact with the isolation pattern is provided. |
| US09214406B2 |
Electronic control device
In an electronic control device, semiconductor modules are disposed in a power region of a substrate, and on a surface of a substrate adjacent to a housing to radiate heat from rear surfaces to the housing through a heat radiation layer. Therefore, a heat radiation performance improves. Further, a first distance from an end surface of a power region corresponding part corresponding to the power region to the substrate is shorter than a second distance from an end surface of a control region corresponding part corresponding to a control region of the substrate to the substrate. Therefore, a closed circuit bridged by parasitic capacitances is formed mainly in an area of the power region and the power region corresponding part. A noise generated from the semiconductor modules is returned to noise sources through the closed circuit without affecting the control region. |
| US09214405B2 |
Semiconductor module having heat dissipating portion
A semiconductor module includes a control board, and a shield plate arranged opposing the control board. A metal first heat dissipating portion is provided on a surface of the control board. A metal second heat dissipating portion is provided on a first surface of the shield plate, opposing the surface of the control board. A dielectric body is arranged between the first heat dissipating portion and the second heat dissipating portion. |
| US09214402B2 |
Pressure sensor device with gel retainer
A pressure sensor device includes a gel retainer that is mounted or formed on a substrate. The gel retainer has a cavity and a pressure sensing die is mounted inside the cavity. The die is electrically connected to one or more other package elements. A pressure-sensitive gel material is dispensed into the cavity to cover an active region of the pressure sensing die. A mold compound is applied on an upper surface of the substrate outside of the gel retainer. |
| US09214400B2 |
Semiconductor device with back gate isolation regions and method for manufacturing the same
The present disclosure provides a semiconductor device and a method for manufacturing the same. The semiconductor device comprises: an SOI wafer comprising a semiconductor substrate, an insulating buried layer, and a semiconductor layer, wherein the insulating buried layer is disposed on the semiconductor substrate, and the semiconductor layer is disposed on the insulating buried layer; adjacent MOSFETs formed in the SOI wafer, wherein each of the adjacent MOSFETs comprises a back gate formed in the semiconductor substrate and a back gate isolation region formed completely under the back gate; and a shallow trench isolation, wherein the shallow trench isolation is formed between the adjacent MOSFETs to isolate the adjacent MOSFETs from each other, wherein a PN junction is formed between the back gate and the back gate isolation region of each of the adjacent MOSFETs. According to embodiments of the present disclosure, a PN junction is formed between the back gate isolation regions of the adjacent MOSFETs. In addition to back gate isolation implemented by the shallow trench isolation between the adjacent MOSFETs, the adjacent MOSFETs are also isolated by means of PNPN junctions or NPNP junctions formed in the back gates and the back gate isolation regions. As a result, the semiconductor device has a better isolation effect, and thus the possibility of accidental breakdown of the semiconductor device is substantially reduced. |
| US09214394B2 |
CMOS fabrication
A method of manufacturing a memory device includes an nMOS region and a pMOS region in a substrate. A first gate is defined within the nMOS region, and a second gate is defined in the pMOS region. Disposable spacers are simultaneously defined about the first and second gates. The nMOS and pMOS regions are selectively masked, one at a time, and LDD and Halo implants performed using the same masks as the source/drain implants for each region, by etching back spacers between source/drain implant and LDD/Halo implants. All transistor doping steps, including enhancement, gate and well doping, can be performed using a single mask for each of the nMOS and pMOS regions. Channel length can also be tailored by trimming spacers in one of the regions prior to source/drain doping. |
| US09214390B2 |
Method for forming through-silicon via (TSV) with diffused isolation well
A semiconductor device and method for forming the same provide a through silicon via (TSV) surrounded by a dielectric liner. The TSV and dielectric liner are surrounded by a well region formed by thermal diffusion. The well region includes a dopant impurity type opposite the dopant impurity type of the substrate. The well region may be a double-diffused well with an inner portion formed of a first material and with a first concentration and an outer portion formed of a second material with a second concentration. The surrounding well region serves as an isolation well, reducing parasitic capacitance. |
| US09214387B2 |
Systems and methods for providing intramodule radio frequency isolation
A radio frequency (RF) module comprises RF-shielding structure for providing three-dimensional electromagnetic interference shielding with respect to one or more RF devices disposed on the module. The RF-shielding may comprise wirebond structures disposed adjacent to or surrounding an RF device. Two or more intramodule devices may have wirebond structures configured to at least partially block certain types of RF signals disposed between the devices, thereby reducing effects of cross-talk between the devices. |
| US09214385B2 |
Semiconductor device including passivation layer encapsulant
A method of fabricating a semiconductor device includes forming a passivation layer on a least one capping layer of the semiconductor device, and forming an encapsulant layer on the passivation layer. The method further includes patterning the encapsulant layer to expose a portion of the passivation layer and forming a final via opening in the passivation layer. A conductive material is deposited in the final via opening. The method further includes planarizing the conductive material until reaching a remaining portion of the encapsulant layer such that the conductive material is flush with the encapsulant layer and the passivation layer is preserved. |
| US09214381B2 |
Semiconductor device and method of fabricating the same
A semiconductor device includes a substrate, a conductive pattern, a side spacer, and an air gap. The substrate includes an interlayer insulating layer and a trench penetrating the interlayer insulating layer. The conductive pattern is disposed within the trench of the substrate. The side spacer is disposed within the trench. The side spacer covers an upper side surface of the conductive pattern. The air gap is disposed within the trench. The air gap is bounded by a sidewall of the trench, the side spacer, and a lower side surface of the conductive pattern. A level of a bottom surface of the conductive pattern is lower than a level of bottom surfaces of the side spacer. |
| US09214380B2 |
SOS substrate having low surface defect density
Method of making a bonded SOS substrate with a semiconductor film on or above a sapphire substrate by implanting ions from a surface of the semiconductor substrate to form an ion-implanted layer; activating at least a surface of one of the sapphire substrate and the semiconductor substrate from which the ions have been implanted; bonding the surface of the semiconductor substrate and the surface of the sapphire substrate at a temperature of from 50° C. to 350° C.; heating the bonded substrates at a maximum temperature of from 200° C. to 350° C.; and irradiating visible light from a sapphire substrate side or a semiconductor substrate side to the ion-implanted layer of the semiconductor substrate to make the interface of the ion-implanted layer brittle at a temperature of the bonded body higher than the temperature at which the surfaces were bonded, to transfer the semiconductor film to the sapphire substrate. |
| US09214371B2 |
Thermal treatment apparatus and thermal treatment method
In a loading area below a vertical furnace of a thermal treatment apparatus, a gas stream flows along a first direction from one side to the other side of the loading area into a first evacuation opening provided in the other side of the loading area. A thermal evacuation part is located, along the first direction, between a first evacuation opening and an upstream end of a substrate holding member located at an unload position that is located between the one side and the other side of the loading area. The thermal evacuation part includes a second evacuation opening that is arranged to oppose at least an upper part of the substrate holding member located at the unload position and evacuates an environment around the substrate holding member located at the unload position. |
| US09214370B2 |
Substrate transfer device, substrate transfer method, and storage medium
A substrate transfer device that transfers a substrate by allowing a substrate opening formed on a front surface of a substrate transfer vessel to face an opening formed on a partition wall from one side of the partition wall and separating a cover body of the substrate transfer vessel from the other side of the partition wall includes a door configured to open and close the opening from the other side of the partition wall; a reciprocating unit configured to straightly move the door back and forth between a first position where the opening is closed and a second position away from the first position toward the other side of the partition wall; and a rotating unit configured to rotate the door around a rotation axis in a straightly moving direction of the door between the second position and a third position deviated from a region facing the opening. |
| US09214366B2 |
Apparatus for treating substrate by applying chemical solution on substrate using plural rollers
An apparatus for treating a substrate including a plurality of transfer rollers configured to transfer a substrate and simultaneously to be rotated to wet a back surface of the substrate; a plurality of chemical solution supply tanks configured to receive the chemical solution therein, the plurality of the chemical solution supply tanks arranged under the plurality of the transfer rollers, respectively, with being spaced apart a predetermined distance from each other; a main tank configured to surround the plurality of the chemical solution supply tanks; and an exhaustion unit configured to suck and exhaust fume generated in the process of wetting the back surface with the chemical solution and liquid drops of the chemical solution. |
| US09214365B2 |
Two-fluid nozzle and substrate liquid processing apparatus and substrate liquid processing method
A two-fluid nozzle 34 for spraying, toward a processing target object, droplets of a processing solution which are formed by mixing the processing solution discharged from a liquid discharge portion 48 and a gas discharged from a gas discharge opening 52 can uniformly spray the droplets of the processing solution having small diameters. Here, the liquid discharge portion 48 includes a multiple number of liquid discharge openings 47 arranged along a circle inside the gas discharge opening 52, and the multiple number of liquid discharge openings 47 discharge the processing solution in an outward direction of the circle. |
| US09214358B1 |
Equal gate height control method for semiconductor device with different pattern densites
A method of forming a semiconductor integrated circuit (IC) that has substantially equal gate heights regardless of different pattern densities in different regions of the IC includes providing a substrate with a first pattern density in a first region of the IC and a second pattern density in a second region of the IC, forming a first polysilicon layer above the substrate, the first polysilicon layer having an uneven upper surface, forming a stop layer above the first polysilicon layer, treating the stop layer to change its etch selectivity relative to the first polysilicon layer, forming a second polysilicon layer above the stop layer, removing the second polysilicon layer, the stop layer, and a top portion of the first polysilicon layer, the remaining portion of the first polysilicon layer having a planar upper surface. |
| US09214357B1 |
Substrate treating apparatus and method
The present invention disclosed herein relates to a substrate treating apparatus and method. The substrate treating method includes: providing a substrate on which an oxide layer is formed; treating the oxide layer with a first process gas in a plasma state to substitute the treated oxide layer with a by-product layer; and heating the substrate to remove the by-product layer at a temperature which is above a first heating temperature at which the by-product layer is decomposed and is above a second heating temperature that is a boiling point of an additive by-product generated while the by-product layer is decomposed. |
| US09214352B2 |
Ohmic contact to semiconductor device
Embodiments of an ohmic contact structure for a Group III nitride semiconductor device and methods of fabrication thereof are disclosed. In one embodiment, the ohmic contact structure has less than or equal to 5%, more preferably less than or equal to 2%, more preferably less than or equal to 1.5%, and even more preferably less than or equal to 1% degradation for 1000 hours High Temperature Soak (HTS) at 300 degrees Celsius. In another embodiment, the ohmic contact structure additionally or alternatively has less than or equal to 10% degradation, more preferably less than or equal to 7.5% degradation, more preferably less than or equal to 6% degradation, more preferably less than or equal to 5% degradation, and even more preferably less than 3% degradation for 1000 hours High Temperature operating Life (HToL) at 225 degrees Celsius and 50 milliamps (mA) per millimeter (mm). |
| US09214350B2 |
Semiconductor device having a capacitive element
The performances of a semiconductor device are improved. A semiconductor device has a first electrode and a dummy electrode formed apart from each other over a semiconductor substrate, a second electrode formed between the first electrode and the dummy electrode, at the circumferential side surface of the first electrode, and at the circumferential side surface of the dummy electrode, and a capacitive insulation film formed between the first electrode and the second electrode. The first electrode, the second electrode, and the capacitive insulation film form a capacitive element. Further, the semiconductor device has a first plug penetrating through the interlayer insulation film, and electrically coupled with the first electrode, and a second plug penetrating through the interlayer insulation film, and electrically coupled with the portion of the second electrode formed at the side surface of the dummy electrode opposite to the first electrode side. |
| US09214346B2 |
Apparatus and method to reduce particles in advanced anneal process
Embodiments of the invention generally relate to apparatus and methods of thermal processing of semiconductor substrates using a pellicle to eliminate contamination of an aperture member. The aperture member is disposed between an energy source and a substrate to be processed. The pellicle may be a thin piece of membrane that is substantially transparent to selected forms of energy, such as pulses of electromagnetic energy from a laser that emits radiation at one or more appropriate wavelengths for a desired period of time. In one embodiment, the pellicle is mounted at a predetermined distance from the aperture member and covering pattern openings (i.e., apertures) formed on the aperture member such that any particle contaminants that may land on the aperture member will land on the pellicle. The pellicle keeps particle contaminants out of focus in the final energy field, thereby preventing particle contaminants from being imaged onto the processed substrate. |
| US09214340B2 |
Apparatus and method of forming an indium gallium zinc oxide layer
The embodiments of the disclosure may generally provide a method and apparatus for forming thin film transistor device that includes an indium gallium zinc oxide (IGZO) layer using a multi-component precursor gas. The embodiments of the disclosure may provide a plasma enhanced chemical vapor deposition system configured to form an IGZO layer on large area substrates. However, it should be understood that the disclosure has utility in other system configurations such other types of chemical vapor deposition systems and any other system in which distributing a multi-component precursor gas to and within a process chamber is desired. |
| US09214335B2 |
Surface plasma modification of porous thin-films to optimize pore filling
The present invention describes a process to modify a top portion of a porous ultra low-k (ULK) material in order to maximize porosity filling with a filling material that initially displayed low compatibility with the ULK material. Surface modification is achieved by a plasma treatment, enhancing the compatibility between the ULK surface and the filling material. The invention obtains high filling levels with minimum modification to the ULK material, as only a thin top portion is modified without significant pore sealing. |
| US09214331B2 |
Substrate processing method and substrate processing apparatus
DIW in an excessively cooled state is supplied as a solidification liquid to a substrate W, and a solidified material of the DIW is formed by a landing impact on the substrate W. This makes the use of a gaseous refrigerant necessary to form a solidified material unnecessary, eliminates the need for a facility to generate the gaseous refrigerant, shortens a processing time and further enables running cost and the like to be suppressed. |
| US09214330B2 |
Light source device and filament
A light source device comprising a filament showing high electric power-to-visible light conversion efficiency is provided. The light source device of the present invention comprises a translucent gastight container, a filament disposed in the translucent gastight container, and a lead wire for supplying an electric current to the filament. The filament comprises a substrate formed from a metal material and a visible light-absorbing film covering the substrate. The visible light-absorbing film is transparent to lights of infrared region. The reflectance of the substrate for visible lights is thereby made low, and the reflectance of the substrate for infrared lights is thereby made high. Therefore, radiation of infrared lights is suppressed, and visible luminous efficiency can be enhanced. |
| US09214328B2 |
Space focus time of flight mass spectrometer
A Time of Flight mass spectrometer is disclosed wherein a fifth order spatial focusing device is provided. The device which may comprise an additional stage in the source region of the Time of Flight mass analyzer is arranged to introduce a non-zero fifth order spatial focusing term so that the combined effect of first, third and fifth order spatial focusing terms results in a reduction in the spread of ion arrival times ΔT of ions arriving at the ion detector. |
| US09214327B2 |
Vacuum analyzer utilizing resistance tubes to control the flow rate through a vacuum reaction chamber
A vacuum analyzer including a vacuum reaction chamber; a gas source; a flow rate-restricting resistance tube connected to the reaction chamber; a pressure detection device disposed upstream from the flow rate-restricting resistance tube; a flow rate adjustment for adjusting the amount of gas exiting the flow rate-restricting resistance tube so that the detected value from the pressure detection device reaches a prescribed value; a split flow path that is provided with a splitter resistance tube and divides the gas at a location between the flow rate adjustment and the pressure detection device; a passage open to the atmosphere which divides the gas flowing from upstream at a location between the flow rate adjustment and the pressure detection device and releases the divided gas to the atmosphere; and a valve provided in the passage open to the atmosphere. Therein, the split flow path is connected immediately downstream from the valve. |
| US09214325B2 |
Ion trap with radial opening in ring electrode
Apparatuses and methods for performing mass analysis are disclosed. One such apparatus may include an ion trap device. The ion trap device may comprise a first end cap having a first aperture and a second end cap having a second aperture, wherein the first aperture and the second aperture may define an ejection axis. The ion trap device may also comprise a ring electrode substantially coaxially aligned between the first and second end caps. The ring electrode may include an opening extending along a radial direction of the ring electrode, wherein the radial direction is substantially perpendicular to the ejection axis. One such method may include ionizing a sample in an ion trap through an opening separating at least part of first and second ring sections of the ion trap and detecting ions ejected though an aperture on an end cap of the ion trap. |
| US09214324B2 |
Analysis device and analysis method
Provided is a technique of analyzing particles in real time while collecting and condensing the particles continuously. Gas and/or particles as a detection target substance that are attached to an authentication target 2 are removed by air flow from a blowing region 5. The removed sample is sucked and is condensed and sampled at a sampling region 10, and ions of the sample are generated at an ion source 21 and are then subjected to mass analysis at a mass analysis region 23. Determination of the obtained mass spectrum is made as to the presence or not of a mass spectrum derived from the detection target substance, and a monitor 27 displays a result thereof. Thereby, the detection target substance attached to the authentication target 2 can be detected continuously in real time, promptly and with a less error rate. |
| US09214323B1 |
Method and apparatus for transporting sample plates between chambers of a mass spectrometer
A sample plate handling system for a time-of-flight mass spectrometer includes a sample plate for supporting samples for analysis. A first sample plate receiver is positioned in a first chamber. First and second sample plate receivers are positioned in a second chamber. A first gate valve isolates the first and second chambers when closed and allows transfer of sample plates between the first sample plate receiver in the first chamber and one of the first and second sample plate receivers in the second chamber when the first gate valve is open. A first linear extender pushes a sample plate from the first sample plate receiver in the first chamber to the first sample plate receiver positioned in the second chamber, and then retracts a second sample plate from the second sample plate receiver positioned in the second chamber and transports the second sample plate to the first sample plate receiver in the first chamber. A first sample plate receiver is positioned in a third chamber. A second gate valve isolates the third chamber from the second chamber when closed and allows transfer of sample plates between the first sample plate receiver in the third chamber and one of the first and second sample plate receivers in the second chamber when the second gate valve is open. A second linear extender pushes a sample plate from the first sample plate receiver in the third chamber to the first sample plate receiver positioned in the second chamber, and then retracts the second sample plate from the second plate receiver positioned in the second chamber and transports it into the third chamber. |
| US09214322B2 |
Ion detection system and method
A detection system and a method for detecting ions which have been separated in a time-of-flight (TOF) mass analyzer, comprising an amplifying arrangement for converting ions into packets of secondary particles and amplifying the packets of secondary particles, wherein the amplifying arrangement is arranged so that each packet of secondary particles produces at least a first output and a second output separated in time and so that during the delay between producing the first and second output the first output produced by a packet of secondary particles is used for modulating the second output produced by the same packet. An increased dynamic range of detection and protection of the detection system against intense ion pulses is thereby provided. |
| US09214321B2 |
Methods and systems for applying end cap DC bias in ion traps
A mass spectrometer for analyzing a sample utilizing an ion trap comprises an entrance end cap defining an entrance aperture configured to receive the sample entering the ion trap; a ring electrode defining a ring cavity configured to generate, based on a radio frequency (RF) voltage applied to the ring electrode, an electric field configured to trap the sample received through the entrance aperture; an exit end cap defining an exit aperture configured to receive sample ions exiting the ion trap; and an end cap controller configured to generate a bias control voltage for applying a DC bias potential to at least one of the entrance end or the exit end cap, wherein a value of the bias control voltage is based on an operational parameter of the mass spectrometer. |
| US09214310B2 |
Service disconnect assembly
A service disconnect assembly includes a receiver assembly having a fuse receptacle that is configured to receive a fuse therein. The service disconnect assembly includes a lockout device having a latch. The latch is actuatable between a latched position and an unlatched position. The latch cooperates with the receiver assembly in the latched position such that the lockout device cannot be removed from the receiver assembly. The latch is configured to be locked in the latched position. |
| US09214305B2 |
Switch with quenching chamber
A switch for multi-pole direct current service independent of polarity includes a plurality of switching chambers. Each chamber includes a double interrupter having two separate fixed contacts with a first contact area, a movable contact piece with two second contact areas, each for creating a connection between the contact areas in an ON state and for separating the contact areas in an OFF state, and at least two quenching devices for quenching arcs occurring when the OFF state is brought about. The switch also includes magnets for exerting a magnetic field in an area of the contact areas to exert a magnetic force on the arcs and drive the arcs, independent of their current direction, in the direction of one of the erasing devices. The contact pieces are disposed with the second contact areas essentially in a line perpendicular to a direction of motion of the arcs. |
| US09214304B2 |
Switch unit
A switch unit includes an operating component, and a base portion that supports the operating component capable of being pressed in criss-cross directions. The base portion is provided with a plurality of T-shaped regulating components that are formed in positions in directions sandwiched between the criss-cross directions. Each of the regulating components is provided with a leg portion that extends from the base portion towards the operating component, and an abutting portion that extends from an end portion of the leg portion along a line that connects together predetermined positions of the criss-cross directions that are located on both sides of each regulating component. |
| US09214300B2 |
Keyboard device with luminous key
A keyboard device with a luminous key is provided. The keyboard device includes at least one luminous key, a light-emitting element, and a light shade, and a membrane switch circuit module. When the membrane switch circuit member is triggered by the at least one luminous key, the membrane switch circuit member generates at least one luminous key signal. The light-emitting element is used for emitting a light beam. The light shade is used for shading the light beam. Moreover, the light shade and the membrane switch circuit member are integrally formed with each other. Consequently, the light shade can be securely fixed on the membrane switch circuit module. |
| US09214299B2 |
Operation command transmitting device
An operation command transmitting device includes a coupling portion coupling a bar portion to a housing so that the bar portion is movable relative to the housing along a central axis and the bar portion is allowed to be tilted around a supporting axis passing through the bar portion, and an abutment portion with which the bar portion comes into abutment when the bar portion is tilted from an untilted neutral condition. The operation command transmitting device includes an axis defining portion defining the supporting axis so that a position of the supporting axis relative to the housing does not change regardless of a tilting of the bar portion and a movement of the bar portion along the central axis. |
| US09214298B2 |
Button structure for electronic device
A button structure is provided for installing to a casing of an electronic device having a button opening. The button structure is flexible and comprises an engaging portion, a button portion, a first alignment portion, a second alignment portion and a hollow sleeve. The engaging portion is disposed at a fixing end of the button structure. The button structure is connected to the inward side of the casing through the engaging portion. The button portion is disposed at a free end of the button structure for aligning with the button opening of the casing. The button portion has a light guiding portion for neighboring to a light emitting diode. The first alignment portion and the second alignment portion are mounted on a first protrusion portion and a second protrusion portion of the casing respectively. The hollow sleeve is disposed axially movably to the fixing sleeve of the casing. |
| US09214296B2 |
Waterproof structure and switch device including waterproof structure
An engine start switch includes a substrate on which electronic components are mounted, a case which is formed in a cylindrical shape by a peripheral wall portion surrounding the substrate and of which at least one end portion is opened, and a support member that supports the substrate in the case and extends toward the open end of the case from one end portion thereof supporting the substrate. The support member includes an outer surface that faces an inner surface of the peripheral wall portion with a gap interposed therebetween, and a gap at the one end portion of the support member is wider than a gap at other portions excluding at least the one end of the support member. |
| US09214290B2 |
Touch panel and manufacturing method thereof
A touch panel having a shielding layer and a manufacturing method thereof is provided. A manufacturing method of the touch panel comprises the steps of forming a plurality of first conductive axes and a plurality of second conductive units on a substrate; covering the first conductive axes and the second conductive units with an insulating layer and exposing at least a partial set of second conductive units; and forming a plurality of bridging structures and a shielding layer on the insulating layer simultaneously, wherein the bridging structures electrically connect to the second conductive units. The proposed method allows the shielding layer to be formed during the formation of the bridging structures, thereby eliminating the step of forming the shielding layer separately through an independent process, which saves costs and time. |
| US09214286B2 |
Dye-sensitized solar cell and preparing method of the same
A dye-sensitized solar cell including an inorganic dye containing all of Pb, Hg and S as a photo-sensitive dye and a manufacturing method of the same are provided. |
| US09214282B1 |
Three-terminal capacitor
A length of a first-side outer electrode is E1, a length of a second-side outer electrode is E3, a length of a center outer electrode is E2, a distance between the first-side outer electrode and the center outer electrode is ME1, a distance between the center outer electrode and the second-side outer electrode is ME2, a length of a capacitor element is L, a width from an edge of the first side second extending portion closer to a third surface to the third surface is M1L, a width from an edge of the first side second extending portion closer to a fourth surface to an edge of the first-side outer electrode on a first surface is M1R, a width from an edge of the first extending portion closer to the third surface to an edge of the center outer electrode on the first surface closer to the third surface is M2L, and a width from an edge of the first extending portion closer to the fourth surface to an edge of the center outer electrode on the first surface closer to the fourth surface is M2R, such that E1+ME1+E2+ME2+E3>L, |ME1−ME2|<50 μm, M2L |
| US09214279B2 |
Ultrafine metal oxide particle dispersion liquid and ultrafine metal oxide particle thin film
An ultrafine metal oxide particle dispersion liquid is prepared by mixing an ultrafine titanium-based composite metal oxide particle dispersion liquid prepared by hydrolysis in a microemulsion containing a hydrophobic dispersion medium, water, and a surfactant and an organic metal compound solution for the same titanium-based composite metal oxide at a ratio of 1:1 to 1:30 in terms of the composite metal oxide contained. |
| US09214275B2 |
Method for manufacturing grain oriented electrical steel sheet
According to the present invention, a grain oriented electrical steel sheet in which iron loss has been further reduced can be obtained by carrying out decarburization annealing as continuous annealing including: (1) heating the steel sheet to a temperature in the range of 700° C. to 750° C. at heating rate of 50° C./second or higher at least in a temperature range of 500° C. to 700° C. in an atmosphere having oxidation potential P(H2O)/P(H2) equal to or lower than 0.05; (2) then cooling the steel sheet to a temperature range below 700° C. in an atmosphere having oxidation potential P(H2O)/P(H2) equal to or lower than 0.05; and (3) reheating the steel sheet to a temperature in the range of 800° C. to 900° C. and retaining the steel sheet at the temperature for soaking in an atmosphere having oxidation potential P(H2O)/P(H2) equal to or higher than 0.3. |
| US09214272B2 |
Three-phase-two-phase stationary transformer with forced linked flux
A three-phase-two-phase transformer including a magnetic circuit, three-phase windings, and two-phase windings, wherein the magnetic circuit includes a first column, a second column, and a third column that are magnetically connected together, the three-phase windings including a first winding, a second winding, and a third winding. The two-phase windings include a fourth winding around the first column, a fifth winding around the first column, a sixth winding around the third column, and a seventh winding around the third column, the fourth winding and the seventh winding being connected in series and forming a first two-phase phase, and the fifth winding and the sixth winding being connected in series and forming a second two-phase phase. |
| US09214268B2 |
Method and apparatus for producing accurate kinematics in a computing device
Method, system, and apparatus for optimizing kinematics of a magnetic latch having a magnetic element is disclosed. |
| US09214267B2 |
Electromagnetic actuator device
An electromagnetic actuator device, comprising a coil unit, which surrounds a first yoke section of a stationary yoke unit and is activated by energizing the coil unit, and armature elements, which are guided so as to be movable relative to the yoke unit and which interact with an output-side actuating partner and are driven in order to perform an actuating movement, the armature elements interact with at least one second yoke section of the yoke unit to form an air gap lying outside of the first yoke section for a magnetic flux produced by the activated coil unit. Permanent magnet elements are connected magnetically parallel to the coil unit in such a way that a permanent-magnet magnetic flux of the permanent magnet elements through the first yoke section can occur, a coil magnetic flux of the coil unit flowing across the air gap is overlaid in a magnetically parallel and/or equally directed manner with a permanent-magnet magnetic flux of the permanent magnet elements flowing across the air gap, and activation of the coil unit by means of energizing causes an at least partial magnetic flux shift, in particular magnetic flux displacement, of the permanent-magnet magnetic flux of the permanent magnet elements from the first yoke section to the second yoke section. |
| US09214262B2 |
Star-quad cable having a shield
A star-quad cable for transmitting electrical signals, having at least two pairs of conductors, each conductor having one wire made of an electrically conductive material and a conductor sheath radially enclosing the wire and made of an electrically insulating material, the conductors being arranged on the corners of a square in a cross-section, with the conductors of a pair arranged on diagonally opposite corners of the square, wherein four conductors are twisted at a predetermined stranding factor; and a shield made of an electrically conductive material and enclosing the two pairs of conductors is arranged radially on the outside, constructed from a weave of individual shield wires. At least one shield wire or at least one shield wire bundle is stranded radially enclosing the conductors such that they run in the axial direction substantially parallel to a wire of a conductor. |
| US09214258B2 |
Semiconductor composites comprising carbon nanotubes and diketopyrrolopyrrole-thiophene based copolymers
A semiconductor composition includes a semiconducting polymer containing a diketopyrrolopyrrole (DKPP) moiety and carbon nanotubes dispersed into the semiconducting polymer. An electronic device contains a semiconductor layer including a semiconductor composition having a semiconducting polymer including a diketopyrrolopyrrole (DKPP) moiety and carbon nanotubes dispersed into the semiconducting polymer. A semiconductor composition contains a semiconducting polymer including a diketopyrrolopyrrole (DKPP) moiety, a solvent selected from the group consisting of tetrachloroethane, dichlorobenzene, chlorobenzene, chlorotoluene, and a mixture thereof, and a carbon nanotube. |
| US09214254B2 |
Ultra-thin AZO with nano-layer alumina passivation
An electrical conductor includes an ultra-thin layer of aluminum-doped zinc-oxide and a nano-layer of alumina in contact and conformal with a surface of the ultra-thin aluminum-doped zinc-oxide layer. |
| US09214253B2 |
Sintered compact of indium oxide system, and transparent conductive film of indium oxide system
A sintered indium oxide comprising niobium as an additive, wherein the ratio of the number of niobium atoms relative to the total number of atoms of all metal elements contained in the sintered compact is within a range of 1 to 4%, the relative density is 98% or higher, and the bulk resistance is 0.9 mΩ·cm or less. Provided are a sintered compact of indium oxide system and a transparent conductive film of indium oxide system, which have characteristics of high transmittance in the short wavelength and long wavelength ranges since the carrier concentration is not too high even though the resistivity thereof is low. |
| US09214241B2 |
Semiconductor memory device and erasing method
A reliable semiconductor memory device and an erasing method for erasing data in a reliable manner are provided. The erasing method is applied to erase a semiconductor memory device having a memory array, and the memory array has an NAND string. A predetermined voltage is applied to a gate of a select transistor of the NAND string, and the predetermined voltage is applied to a word line of a memory cell of the NAND string. An erasing voltage is applied to a substrate region at a first timing, and the substrate region has the NAND string. The gate of the select transistor is floated at a second timing. Here, there is a fixed time interval between the first timing and the second timing, and the second timing is later than the first timing. |
| US09214239B2 |
Semiconductor memory device, memory system including the same and operating method thereof
A semiconductor memory device includes a memory cell array including a plurality of memory cells, a peripheral circuit suitable for generating program and erase voltages and applying the program and erase voltages to the plurality of memory cells when program and erase operations are performed on the plurality of memory cells, and a control logic suitable for controlling the peripheral circuit unit during the program and erase operations and counting a pulse number of the program and erase voltages to store a resultant count number as status data. |
| US09214235B2 |
U-shaped common-body type cell string
A flash device comprising a well and a U-shaped flash cell string, the U-shaped flash cell string built directly on a substrate adjacent the well. The U-shaped flash cell string comprises one portion parallel to a surface of the substrate, comprising a junctionless bottom pass transistor, and two portions perpendicular to the surface of the substrate that comprise a string select transistor at a first top of the cell string, a ground select transistor at a second top of the cell string, a string select transistor drain, and a ground select transistor source. |
| US09214228B1 |
Semiconductor memory device and method of forming thereof
A semiconductor memory device has a memory cell array including memory cells, the memory cell being disposed at an intersection of first lines and second lines, the second lines being disposed intersecting the first lines, and the memory cell including a variable resistance element; and a control circuit. The control circuit is configured to execute a forming operation sequentially on a plurality of the memory cells. The control circuit applies a forming voltage to a selected memory cell of the memory cells, and controls the forming voltage such that the forming voltage is lower as the forming operation progresses. |
| US09214227B2 |
Nonvolatile memory device performing read operation using reference cell array and semiconductor system using the same
Provided is a nonvolatile memory device including a resistive memory cell and semiconductor system using the same that is capable of setting the reference resistance value using resistance values of a plurality of memory cells. The nonvolatile memory device comprises one or more column lines, two or more row lines, a plurality of memory cells configured to be connected to the column lines and each of the row lines, and a reference resistance setting unit configured to enable a subset or all of the column lines and row lines and to set a reference resistance value. |
| US09214225B2 |
3D variable resistance memory device having junction FET and driving method thereof
A 3D variable resistance memory device having a junction FET and a driving method thereof are provided. The variable resistance memory device includes a semiconductor substrate and a string selection switch formed on the semiconductor substrate. A channel layer is formed on the column string selection switch. A plurality of gates stacked along a length of the channel layer and each of the gates contacts an outer side of the channel layer. A variable resistance layer is formed on an inner side of the channel layer, and contacts the channel layer. |
| US09214221B2 |
Semiconductor device with logic circuit, SRAM circuit and standby state
A semiconductor device is provided. The semiconductor device includes a logic circuit, an SRAM circuit coupled to a power line, and a switch coupled between the logic circuit and the power line. Before the switch is changed to an off position, a part of information held in the logic circuit is transferred to the SRAM circuit. |
| US09214218B2 |
Semiconductor DRAM with non-linear word line discharge
Disclosed herein a device that includes a memory cell array including plurality of word lines, a plurality of bit lines each intersecting the word lines and a plurality of memory cells each disposed at an associated one of intersections of the word and bit lines, and the device further includes a driver configured to drive a selected one of the word lines from an inactive level to an active and to drive the selected one of the word lines from the active level to an intermediate level at a first rate and from the intermediated level to the inactive level at a second rate. The intermediate level is between the active and inactive levels, and the first rate is greater than the second rate. |
| US09214215B2 |
Decreased switching current in spin-transfer torque memory
Switching current in Spin-Transfer Torque Memory (STTM) can be decreased. A magnetic memory cell is driven with a first pulse on a write line of the memory cell to heat the cell. The cell is then driven with a second pulse on the write line to set the state of the cell. |
| US09214214B2 |
Physically unclonable function based on the random logical state of magnetoresistive random-access memory
One feature pertains to a method of implementing a physically unclonable function (PUF). The method includes exposing an array of magnetoresistive random access memory (MRAM) cells to an orthogonal external magnetic field. The MRAM cells are each configured to represent one of a first logical state and a second logical state, and the orthogonal external magnetic field is oriented in an orthogonal direction to an easy axis of a free layer of the MRAM cells to place the MRAM cells in a neutral logical state that is not the first logical state or the second logical state. The method further includes removing the orthogonal external magnetic field to place each of the MRAM cells of the array randomly in either the first logical state or the second logical state. |
| US09214212B2 |
Magnetic tunnel junction memory device
A magnetic-assist, spin-torque transfer magnetic tunnel junction device and a method for performing a magnetic-assist, spin-torque-transfer write to the device are disclosed. In an exemplary embodiment, the magnetic tunnel junction device includes a first electrode, a pinned layer disposed on the first electrode, a free layer disposed on the pinned layer, and a barrier layer disposed between the pinned layer and the free layer. The device further includes a second electrode electrically coupled to the free layer, the second electrode containing a magnetic assist region. In some embodiments, the magnetic assist region is configured to produce a net magnetic field when supplied with a write current. The net magnetic field is aligned to assist a spin-torque transfer of the write current on the free layer. |
| US09214210B2 |
Semiconductor memory apparatus, block decoder therefor, and decoding method thereof
A block decoder including a first selection unit configured to receive a block address signal and output a block select signal to any one of a plurality of blocks, and a second selection unit configured to receive a high voltage and control a potential level of the block select signal according to the block address signal. |
| US09214209B2 |
Semiconductor device
Disclosed is a semiconductor device which is intended to reduce the total number of storage element blocks that constitute a desired logic circuit. The semiconductor device includes N address lines (N is an integer equal to two or more), N data lines, and a plurality of storage sections. Each of the storage sections includes an address decoder for decoding an address supplied via the N address lines to output a word select signal to word lines; and a plurality of storage elements which are connected to the word lines and the data lines, each store data that constitute a truth table, and input or output the data via the data lines in accordance with the word select signal supplied via the word lines. The semiconductor device is adapted such that the N address lines for the storage sections are connected to the respective data lines of other N ones of the storage sections, while the N data lines for the storage sections are connected to the respective address lines of other N ones of the storage sections. |
| US09214206B2 |
Method of testing non-volatile memory device and method of managing non-volatile memory device
A method of testing a non-volatile memory device and a method of managing the non-volatile memory device are provided. The method of testing the non-volatile memory device includes calculating first and second values based on program loop frequencies corresponding to word lines of a memory area. A characteristic value of the memory area may be calculated based on the first and second values, and may be compared to a reference value to determine whether the memory area is defective. |
| US09214202B2 |
Input buffer and memory device including the same
An input buffer includes a first buffer, a feedback circuit and a second buffer circuit. The feedback circuit includes a feedback resistor and a feedback inverter. The first buffer may be configured to output an amplification signal to an output node of the first buffer based on an input signal. The feedback circuit connected to the output node of the first buffer may be configured to control the amplification signal. The second buffer circuit may be configured to output a buffer output signal by buffering the amplification signal. The feedback resistor may receive the amplification signal from the output node of the first buffer and provide a feedback signal to a feedback node. The feedback inverter is connected between the feedback node and the output node. The feedback inverter may be configured to control the amplification signal based on the feedback signal. |
| US09214201B2 |
DRAM and access and operating method thereof
An operating access method for a DRAM is provided. A first address is obtained via an address bus and a first command is obtained via a command bus from a controller. A second address is obtained via the address bus and a second command is obtained via the command bus from the controller after the first command is obtained. The first address and the second address are combined to obtain a valid address, wherein the valid address is a row address when each of the first command and the second command is an active command. In addition, the valid address is a column address when the second command is an access command. |
| US09214198B2 |
Continuous capacitor health monitoring and power supply system
An electronic device includes a subsystem, a plurality of energy storage elements coupled to the subsystem through one or more switches, and a charging and monitoring apparatus for concurrently charging the plurality of energy storage elements and monitoring operability of the energy storage elements. A first subset of the energy storage elements is coupled to a first node and a second subset of the energy storage elements is coupled to a second node of a bridge circuit. A power supply provides a DC charging voltage and an AC test voltage to both the first and second subsets of the energy storage elements. A monitoring circuit produces a predefined fault signal if a predefined electrical characteristic of the first subset of the energy storage elements differs from a same predefined electrical characteristic of the second subset of the energy storage elements by more than a predefined amount. |
| US09214196B2 |
System and method for powering a wireless sensor device
A system and method for powering a wireless sensor device are disclosed. In a first aspect, the wireless sensor device comprises at least two electrodes configured to be attached to a body and at least two leads coupled to the at least two electrodes. The wireless sensor device also includes a system on chip (SoC) coupled to the at least two leads and a portable power source (Vbatt) coupled to the SoC. When the at least two electrodes are attached to the body, a difference in resistance is measured between the at least two leads by the SoC and the difference in resistance is utilized by the SoC to enable the portable power source to activate the wireless sensor device. |
| US09214191B2 |
Capture and transmission of media files and associated metadata
A method and a system of associating correlating metadata with data assets, such as video and audio files, so that the files are rendered as a combination presentation are described herein. The system includes a client a media capture device that provides on board storage, network connectivity, preprocessing, preview buffering, file management, and an eventing system. The method includes capturing the media, associating the media with other media via an identifier, and supports associating correlating metadata prior to time of media capture and during media capture on the capture device itself, and after media capture either on a local machine or on an on-line group. When the combination presentation is presented, additional associated advertising and annotations may be provided upon rendering. |
| US09214188B1 |
Adjusting rotation speed of disk to reduce fly height modulation when servo writing in gas
A method is disclosed for selecting a rotation speed when servo writing a disk of a disk drive. A gas is injected into a head disk assembly (HDA) comprising the disk. The disk is rotated while reading data from the disk using a head to generate a read signal. A fly height modulation (FHM) of the head is measured in response to the read signal. When the FHM exceeds a threshold, the rotation speed is adjusted. The disk is servo written at the adjusted rotation speed. After servo writing the disk and evacuating the gas from the HDA, the disk is rotated at a normal rotation speed lower than the adjusted rotation speed used to servo write the disk, and manufacturing data is written to the disk at the normal rotation speed. |
| US09214183B2 |
Secure storage
A system 100 for securely storing digital data includes a data storage 110 and a physical uncloneable function 120 (PUF), including an input (122) for receiving a challenge and an output (124) for producing a response to the challenge. Means 130 determine an identifier associated with the data storage. Means 140 supply a representation of the identifier to the PUF as a challenge and retrieve a corresponding response from the PUF. A cryptographic unit 150 performs a cryptographic operation for securing or verifying a digital content item stored in the data storage, where the cryptographic operation is performed under control of a cryptographic key derived from the received response. |
| US09214180B2 |
Glass substrate for information recording medium and method for manufacturing the same
The present invention relates to a method for manufacturing a glass substrate for an information recording medium having a high level of cleanness and superior smoothness. The manufacturing method includes a step for washing a disk-shaped glass plate with an acid washing liquid, a step for removing at least part of a surface layer, which is formed on the surface of the glass plate, by performing grinding with diamond abrasion grains, and a step for washing the surface with a neutral or alkaline washing liquid. |
| US09214177B2 |
Perpendicular magnetic recording medium and magnetic recording and reproducing apparatus
According to one embodiment, provided is a perpendicular magnetic recording medium including an orientation control layer formed on a non-magnetic substrate, the orientation control layer consisting of a Ni alloy having fcc structure, non-magnetic buffer layer containing silver having fcc structure, non-magnetic seed layer consisting of Ag particles having fcc structure and amorphous Ge grain boundaries between the Ag particles, non-magnetic intermediate layer consisting of Ru or Ru alloy, and perpendicular magnetic recording layer, wherein the orientation control layer contacts the non-magnetic buffer layer, and the non-magnetic buffer layer contacts the non-magnetic seed layer. |
| US09214175B1 |
Data storage device configuring a gain of a servo control system for actuating a head over a disk
A data storage device is disclosed comprising a first disk surface comprising servo data defining servo tracks at a first radial density, a first head, and a voice coil motor (VCM) configured to actuate the first head over the first disk surface using a servo control system. A load operation is executed to load the first head over the first disk surface, and a back electromotive force (BEMF) voltage generated by the VCM during the load operation is evaluated to generate an estimated distance traveled. The servo data on the first disk surface is detected, and an initial servo track during the load operation based on the detected servo data to generate a measured distance traveled. A gain of the servo control system is configured based on the estimated distance traveled and the measured distance traveled. |
| US09214174B1 |
Method of manufacturing a disk drive head gimbal assembly having a flexure tail with folded bond pads
A method to manufacture a head stack assembly for a disk drive, the method comprising: attaching a head gimbal assembly that includes a flexure tail having flexure bond pads to an actuator that includes a flexible printed circuit (FPC) with FPC bond pads; folding each of the flexure bond pads upon itself such that the flexure tail is substantially thicker at each of the folded flexure bond pads; aligning the flexure bond pads with the FPC bond pads; introducing an adhesive material that includes electrically conductive beads of substantially similar size between each of the flexure bond pads and corresponding ones of the FPC bond pads; and bringing a thermode tool into contact with the flexure bond pads after folding, with the thermode tool pressing the flexure bond pads against the FPC bond pads for a period. |
| US09214173B2 |
Slider with high and low surface energy coatings proximate transducer
A slider, such as for a data storage system, the slider having a leading edge, a trailing edge, an air-bearing surface, and a transducer proximate the trailing edge. The slider has a low surface energy coating on the air-bearing surface and a high surface energy coating on the transducer. In some embodiments, the high surface energy coating is present on a contact sensor. |
| US09214171B2 |
Magnetoresistance effect element, magnetic head, magnetic head assembly, magnetic recording and reproducing device, and method for manufacturing magnetoresistance effect element
According to one embodiment, a magnetoresistance effect element includes first and second shields, first and second side magnetic units, a stacked body, and a hard bias unit. The first side magnetic unit includes a first soft magnetic layer, a first nonmagnetic intermediate layer, and a second soft magnetic layer. The second side magnetic unit includes a third soft magnetic layer, a second nonmagnetic intermediate layer, and a fourth soft magnetic layer. The stacked body includes a fifth ferromagnetic layer, a third nonmagnetic intermediate layer, and a sixth ferromagnetic layer. The hard bias unit is provided between the first and second shields. A first distance between the first and fifth magnetic layers is shorter than a second distance between the second and sixth magnetic layers. A third distance between the third and fifth magnetic layers is shorter than a fourth distance between the fourth and sixth magnetic layers. |
| US09214167B2 |
Main pole layer with at least tow sacrificial layers and a gap layer
In accordance with one embodiment, an apparatus may be implemented that comprises a main pole layer of magnetic material, a non-magnetic gap layer of material above the main pole layer, an etched first sacrificial layer of material above the non-magnetic gap layer of material, and a second sacrificial layer of material above the etched first sacrificial layer of material. |
| US09214166B1 |
Gradient write gap for perpendicular magnetic recording writer
The present disclosure provides for a magnetic writer pole for use in a hard drive. The magnetic writer pole comprises a first bevel formed by a non-magnetic layer, the first bevel formed at a first angle and extending to a first throat height. The magnetic writer pole further comprises a second bevel formed by the non-magnetic layer and extending distally from the first bevel at a second angle that is greater than the first angle and extending to a second throat height. The magnetic writer pole further comprises a third bevel formed by the non-magnetic layer and extending distally from the second bevel at a third angle that is greater than the second angle. |
| US09214164B2 |
Miniskirt tape head having quasi-statically tilted transducer arrays
In one general embodiment, an apparatus includes a magnetic head. The magnetic head has a first portion and a second portion, the first portion and the second portion together providing a tape bearing surface. The first portion has an opening at least partially encircling the second portion. The second portion has at least one array of transducers. A longitudinal axis of each of the at least one array is defined between opposite ends thereof. The longitudinal axis of each of the at least one array of transducers is oriented at an angle relative to a line oriented orthogonally to the intended direction of tape travel thereacross, the angle being between 0.2° and about 10°. |
| US09214160B2 |
Alias cancelling during audio coding mode transitions
An apparatus for processing an audio signal and method thereof are disclosed. The present invention includes receiving, by an audio processing apparatus, an audio signal including a first data of a first block encoded with rectangular coding scheme and a second data of a second block encoded with non-rectangular coding scheme; receiving a compensation signal corresponding to the second block; estimating a prediction of an aliasing part using the first data; and, obtaining a reconstructed signal for the second block based on the second data, the compensation signal and the prediction of aliasing part. |
| US09214159B2 |
Watermark signal provider and method for providing a watermark signal
A watermark signal provider comprises a time-frequency-domain waveform provider to provide time-domain waveforms for a plurality of frequency subbands. The time-frequency-domain waveform provider is configured to map a given value of a time-frequency-domain representation onto a bit shaping function, a temporal extension of which is longer than a bit interval, such that there is a temporal overlap between bit shaped functions provided for temporally subsequent values of the time-frequency-domain representation of the same frequency subband. A time-domain waveform of a given frequency subband contains a plurality of bit shaped functions provided for temporally subsequent values of the time-frequency-domain representation. The water mark signal provider further has a time-domain waveform combiner. |
| US09214157B2 |
System and method for machine-mediated human-human conversation
Disclosed herein are systems, methods, and non-transitory computer-readable storage media for processing speech. A system configured to practice the method monitors user utterances to generate a conversation context. Then the system receives a current user utterance independent of non-natural language input intended to trigger speech processing. The system compares the current user utterance to the conversation context to generate a context similarity score, and if the context similarity score is above a threshold, incorporates the current user utterance into the conversation context. If the context similarity score is below the threshold, the system discards the current user utterance. The system can compare the current user utterance to the conversation context based on an n-gram distribution, a perplexity score, and a perplexity threshold. Alternately, the system can use a task model to compare the current user utterance to the conversation context. |
| US09214155B2 |
Handsfree device with countinuous keyword recognition
A handsfree device, which is coupled to a data processing device, may be operable to monitor at least one audio stream for occurrence of at least one keyword. Upon recognition of the at least one keyword, the handsfree device may establish a first connection between the handsfree device and the data processing device for launching a voice interface in the data processing device. The handsfree device may send audio data received after the recognition of the at least one keyword to the data processing device, via the first connection for responding to the audio data via the voice interface. During a keyword configuration operation, the handsfree device may send at least one inputted keyword to the data processing device for recording. The handsfree device may receive, via a second connection, the recorded at least one keyword from the data processing device for keyword configuration of the handsfree device. |
| US09214153B2 |
Aural smoothing of a vehicle
A method of controlling sounds associated with a vehicle is provided. The method includes: performing on a processor, monitoring engine torque; and selectively controlling the generation of one or more tones associated with the vehicle based on the engine torque. |
| US09214149B2 |
Transducer and system of arrangement for a panel array
A sensor system includes a pressure sensor portion, and an accelerometer. Outputs from the sensor system are handled by a signal processing system that includes a first beamforming module for inputs from a pressure sensor, a second beamforming module for inputs from an accelerometer, and an adaptive beam interpolation module. A method for signal processing signals from both a pressure sensor and an accelerometer. An array of sensors transfers data wirelessly. |
| US09214146B2 |
Electronic musical instruments using mouthpieces and FSR sensors
Electronic musical instruments as disclosed, include sensors to digitize and alter the sound using FSR sensors in the mouthpieces and other elements of the instrument to mimic the variations available in analog instruments. |
| US09214142B2 |
Free floating integrated lug bridge
A percussion instrument holder that allows attachment to a user mounted carrier. The holder allows adjustment for positioning about the user, and pivoting of the holder to allow the holder to pivot or rotate up to allow the holder with instruments to fit a narrower space. The holder further allows for pivotal attachment of individual drums to link or pivot allowing the linked drums to articulate. The holder can also consist of members that allow a connected drum to move in horizontal position, angle, or height of the drum. A plurality of unique drum connecting members is disclosed that allow the connecting members to connect onto drum tension rods or on a drum lug. The plurality of connecting members can be fabricated from multiple pieces that can interconnectably be locked into position. |
| US09214138B2 |
Redundant pixel mitigation
Among other things, one or more techniques and/or systems are provided for mitigating redundant pixel texture contribution for texturing a geometry. That is, the geometry may represent a multidimensional surface of a scene, such as a city. The geometry may be textured using one or more texture images (e.g., an image comprising color values and/or depth values) depicting the scene from various view directions (e.g., a top-down view, an oblique view, etc.). Because more than one texture image may contribute to texturing a pixel of the geometry (e.g., due to overlapping views of the scene), redundant pixel texture contribution may arise. Accordingly, a redundant textured pixel within a texture image may be knocked out (e.g., in-painted) from the texture image to generate a modified texture image that may be relatively efficient to store and/or stream to a client due to enhanced compression of the modified texture image. |
| US09214135B2 |
System for monitoring a video
A computer-implemented method monitors a video-based graphic. The method includes displaying a video-based graphic. A position of a pointer is monitored. The method includes determining a transparency of the video-based graphic at a location of the pointer. An action is performed based on the determined transparency of the video-based graphic at a location of the pointer. |
| US09214133B2 |
Pixel structure, 2D and 3D switchable display device and display driving method thereof
A two-dimension (2D) and three-dimension (3D) switchable display device and display driving method thereof are provided. Each pixel unit of the 2D and 3D switchable display device includes a first sub-pixel, a second sub-pixel and a third sub-pixel. The first sub-pixel, driven by a first gate line, has a first sub-pixel voltage, and the third sub-pixel, driven by a second gate line, has a third sub-pixel voltage different from the first sub-pixel voltage. The charge of the second sub-pixel is shared by a first gate line of an adjacent pixel unit, and the second sub-pixel has a second sub-pixel voltage different from the first sub-pixel voltage and the third sub-pixel voltage. The first sub-pixel, the second sub-pixel and the third sub-pixel of the pixel unit can be driven in a pre-charge driving manner. |
| US09214131B2 |
Non-volatile display accessory controlled and powered by a mobile device
A mobile device accessory includes an integrated non-volatile display (NVD) that uses substantially no power in order to maintain an image displayed thereon. A mobile device connected to the accessory controls the NVD by providing both image data for display on the NVD and power for powering of the NVD. In response to receiving a user-input command to display an image on the NVD, the mobile device transiently provides power to the accessory. While power is provided, the mobile device transmits the data for the image to the accessory. Once the image is displayed on the NVD, the mobile device substantially withdraws power provided to the accessory. Upon receiving a user-input command to update an image on the NVD, the mobile device again transiently provides power to the accessory for a limited period of time sufficient to provide and display the updated image on the NVD. |
| US09214127B2 |
Liquid crystal display using depletion-mode transistors
Methods and devices employing charge removal circuitry are provided to reduce or eliminate artifacts due to a bias voltage remaining on an electronic display after the display is turned off. In one example, a method may include connecting a pixel electrode of a display to ground through charge removal circuitry while the display is off (e.g., using depletion-mode transistors that are active when gates of the depletion-mode transistors are provided a ground voltage). When a corresponding common electrode is also connected to ground, a voltage difference between the pixel electrode and common electrode may be reduced or eliminated, preventing a bias voltage from causing display artifacts in the pixel. |
| US09214125B2 |
Display device and electronic apparatus
A display device includes a plurality of signal lines that are so juxtaposed as to be extended along one direction, a plurality of common drive electrodes that are so juxtaposed as to be extended along the signal lines, and a plurality of display elements that are each connected to a respective one of the plurality of signal lines and are each connected also to the common drive electrode that makes a pair with the connected signal line. Scan driving of the plurality of display elements is performed in the direction of the signal lines. |
| US09214123B2 |
Liquid crystal display device and method for driving the same
A first sample holding unit (22) samples and holds subframe data on a column data line (D) inputted via a first switching unit (21) when a pixel (20) is selected by a row selection signal applied via a row selection line (W). After the subframe data is held by the first sample holding units (22) of all pixels, a second sample holding unit (24) samples and holds the subframe data inputted through a second switching unit (23) activated by a common signal to apply the subframe data to a pixel electrode (12) of a liquid crystal element (LC). Consequently, a voltage selection unit between the second sample holding unit (24) and the pixel electrode (12) becomes unnecessary as well as subframe data can be transferred without a suspension period of the subframe data. |
| US09214121B2 |
Driving method of liquid crystal display device
It is an object to provide a liquid crystal display device and a driving method of a liquid crystal display device in each of which deterioration of an image display function can be suppressed and power consumption can be sufficiently reduced. In the liquid crystal display device, a fixed potential is input to a capacitor before a power source is turned off, so that a potential difference between electrodes of the capacitor disappears (capacitance becomes almost zero) such that electric field is not applied to liquid crystals, whereby the liquid crystals are in an initial state. When the supply of the power source is stopped after an initial-state image is displayed, unnecessary electric field is not continuously applied to the liquid crystals in an off state, whereby the liquid crystals can be in the stable initial state; therefore, the liquid crystals can be prevented from deteriorating. |
| US09214117B2 |
Display control circuit, liquid crystal display apparatus having the same, and display control method
An object of the present invention is to reduce noise during three-dimensional display without increasing memory capacity in a liquid crystal display apparatus capable of displaying an image in two display modes of a 2D mode (two-dimensional display) and a 3D mode (three-dimensional display).In an SDRAM as a volatile memory provided in a timing controller IC, data necessary for a correcting process to an input image signal is stored as follows. Overdrive data is compressed at a relatively high compression degree in the 2D mode and is compressed at a relatively low compression degree in the 3D mode, and the compressed data is stored into the SDRAM. Display unevenness correction data is compressed at a relatively low compression degree in the 2D mode and is compressed at a relatively high compression degree in the 3D mode, and the compressed data is stored into the SDRAM. |
| US09214112B2 |
Display device and display method
Disclosed is a display device capable of compensating unevenness in brightness caused by physical restrictions of a display device or degradation in image quality caused by a partial reduction in contrast occurring in the local dimming technology using human visual characteristics. A liquid crystal panel (101) modulates illuminating light in accordance with the transmittance, and displays images on a screen. A backlight (102) emits the illuminating light to the liquid crystal panel (101) such that amounts of the illuminating light differ for each light emitting area of the screen. A backlight control unit (106) controls emission brightness of the backlight (102) for each light emitting area. A local gradation converting unit (104) performs gradation conversion on an image signal, and acquires a brightness value for each pixel after the conversion. A backlight driving unit (107) controls the transmittance for each pixel on the basis of the acquired brightness values after the conversion. The local gradation converting unit sets conversion characteristics for pixels to be processed in the image signal such that the brightness values of the pixels to be processed are low as the lightness of the periphery of the pixels to be processed is high, and performs gradation conversion using the set conversion characteristics. |
| US09214111B2 |
Image display apparatus and method
When an environment to appreciate an image displayed on an LCD panel is a normal environment, BLD control is performed according to the second backlight brightness characteristic in which the display brightness in the LCD panel is close to be linear, when it is a dark environment, BLD control is performed according to the first backlight brightness characteristic in which the backlight brightness of the low brightness part of the image is set lower than the second backlight brightness characteristic, and, when it is a bright environment, BLD control is performed according to the third backlight brightness characteristic in which the backlight brightness of the medium brightness part of the image is set higher than the second backlight brightness characteristic. |
| US09214109B2 |
Mother substrate of organic light emitting display device
An organic light emitting display device may include a plurality of pixels, a plurality of scan lines for selectively applying a scan signal to the pixels, a plurality of data lines crossing the scan lines for applying a data signal to the respective pixels, a scan driver for applying a scan signal to the scan lines, and at least one first testing unit electrically connected to the scan driver, wherein at least one output line of the first testing unit is electrically connected to the scan driver, and at least one other output line of the first testing unit is electrically disconnected and in an electrically open state. |
| US09214107B2 |
Active matrix display device compensating for ageing of the display element and variations in drive transistor threshold voltage
An active matrix LED display has a light-dependent device for detecting the brightness of the display element and threshold voltage measurement circuitry for measuring a threshold voltage of a pixel the drive transistor. Compensation for ageing of the display element is thus provided by an optical feedback path, and compensation for drive transistor threshold variations is provided by measurement of the threshold voltage. This provides a reliable compensation scheme for the threshold voltage variations, while also providing ageing compensation. |
| US09214105B2 |
Display panel and testing method thereof
A display panel and a testing method of the display panel are provided. The display panel has a display region and a non-display region and includes a first substrate, a second substrate, and a display medium. The display panel further includes scan lines, data lines, pixel units, at least one testing line, and at least one testing pad. The scan lines and the data lines are located on the first substrate within the display region. The pixel units are located on the first substrate within the display region. Each pixel unit electrically connects one of the scan lines and one of the data lines. The testing line is located on the first substrate within the non-display region, crosses over the scan lines, and is insulated from the scan lines. The testing pad is located on the first substrate within the non-display region and electrically connected to the testing line. |
| US09214102B2 |
Rapidly rechargeable warning device
The present invention is to provide a rapidly rechargeable warning device, which includes a power receiving element for receiving external electric power, a charging control module for receiving electric power from the power receiving element, a fast energy storage element (e.g., a supercapacitor or any rapidly rechargeable components) being rapidly charged by the charging control module and then outputting electricity stored therein, an warning element (e.g., a light-emitting diode, a buzzer, or a vibrator) capable of issuing a warning signal (e.g., a light signal, a warning sound, or vibrations) upon receiving the electricity outputted by the fast energy storage element. Thus, since the fast energy storage element can be fully charged within a short time through being connected to a cigarette lighter socket of a car, or a transformer connected to an indoor power source, the warning device can be used immediately and effectively prevent user from using one-time batteries. |
| US09214100B2 |
Identification mat for identifying electrical components, and method for manufacturing such an identification mat
An identification mat for identifying electrical components having a plurality of identification units, wherein an identification unit has a crossbar and a plurality of identification plates integrally moulded on the crossbar. The identification units are connected to one another by means of a frame, wherein the frame is provided with a guidance device for guiding the identification mat in a printer. The identification mat allows identification units to be provided which can be labelled or printed essentially using all commercially available printing methods, particularly using a thermal transfer printing method and/or an inkjet printing method. The identification mat is produced from an amorphous plastic. |
| US09214093B2 |
Audio description availability notifier
A method and apparatus are provided to notify a visually impaired visual media consumer of the availability of audio description for items of visual media via one or more audible indications. Further, a catalog of items of visual media can be sorted or arranged such that items of visual media having audio description may be selected or inquired about in a quicker and more convenient manner. |
| US09214090B2 |
Computer systems for capturing student performance
A method of capturing student performance can be provided that includes enabling a course creator to generate assessment data related to learning assessments for an online course and to generate learning outcomes for the online course, associating the assessment data with the learning outcomes, such that at least some of the learning assessments correspond to at least some of the learning outcomes, and generating an online classroom. The method may further include providing the learning assessments to students enrolled in the online course using the online classroom, wherein the students can generate completed learning assessments, and determining, for each of the completed learning assessments, whether one or more of the learning outcomes were met by each of the students. |
| US09214088B2 |
Obstacle information system of a helicopter
An obstacle information system and method for a helicopter with a warning information processor (3) and a display unit (1) for any obstacle (2) within a predetermined minimum distance d4. Said warning information processor (3) is fed with information related to detected distance d5 and direction of said at least one obstacle (2) detected by an obstacle sensor system (4) to compute and prepare the information for presentation on the display unit (1). Said display unit (1) comprises at least an indication area with a central circular surface (6) and a concentric ring-shaped area (7) around the circular surface (6). Said circular surface (6) is used exclusively for alerts. The ring-shaped area (7) is used for both. Warnings and alerts and the repartition in the indication area of circular surface (6) and ring-shaped area (7) are dependent on the detected distance d5 of said at least one obstacle (2). |
| US09214087B2 |
Device for assisting aircraft crew when performing flight level changes
This device providing assistance to aircraft crew for a flight level change of the aircraft in air traffic, comprising means for viewing the position of the aircraft in the vertical plane, is wherein the viewing means comprise: display means capable of displaying an image comprising at least one zone corresponding to a target altitude (FL) for the aircraft, and in that it comprises: selection means for selecting said zone in the image. |
| US09214086B1 |
Vehicle to vehicle wireless communication apparatus with potential crash warning
A wireless communication device for vehicle-to-vehicle communication includes a vehicle positioning module that uses sensors and detects a current position and a direction of the vehicle. In a map matching, pre-calculated route information and road network information based on the current position are retrieved from map data and a current link of the vehicle is identified and a potential signal pattern is determined regarding a position of next intersection and the road network information based on the current position, the direction of the vehicle and the current link. Based on the potential signal pattern, radio characteristics including a level of intensity, a frequency, and a direction are assigned. A transmitter produces a radio signal of the radio characteristics carrying the current position, the speed and the direction of the vehicle. An antenna module converts the radio signal from the transmitter into radio waves and radiates the radio waves. |
| US09214083B2 |
Apparatus and method for controlling automatic opening of trunk
Provided are an apparatus and method for controlling automatic opening of a vehicle's trunk through wireless communication between a fob key for the vehicle and a bumper LF antenna disposed in the rear of the vehicle. The apparatus controls the trunk so as to be automatically opened through communication with the bumper LF antenna on the basis of the position of the fob key and the number of receptions of an RF signal, when a fob key holder approaches the trunk for opening the trunk. Alternatively, a sensor module is attached near the trunk (particularly, a lower end center of a rear bumper) and determines whether there is the fob key, thereby allowing the trunk to be automatically opened when a sensing signal is inputted by simple movement. |
| US09214081B1 |
Alert network and method for transmitting and propagating alerts
An alert network is described. The alert network has a plurality of individual monitoring systems, a plurality of user terminals respectively associated with the individual monitoring systems, alert transmitters in the monitoring systems, for transmitting primary alerts to selected user terminals and/or to other monitoring systems in accordance with parameterized transmission rules, alert receivers in said terminals, and alert propagators in the terminals, capable of selectively propagating received primary alerts to other terminals and or to other monitoring systems as secondary alerts, in accordance with parameterized propagation rules. A method for transmitting and propagating alerts according to corresponding parameters in such a network is also described. |
| US09214080B2 |
Building security system
A security system that can be used in a home, office, or other building in order to generate alarms or take other actions depending on conditions within the building. The security system may rely on sensors within the building which sense various conditions and collect other data. The information learned from the sensors can be communicated to a location outside the building for processing, such as, but not limited to, processing associated with a need to instigate an alarm. |
| US09214076B2 |
Firefighter's safety monitoring and alarm
A firefighter's safety apparatus includes a first system located in a firefighter's helmet and a second system located at a central station. The first includes a power source, an ambient temperature sensor for relaying ambient temperature information to a microprocessor, a first on/off light source and a second light source coupled to the microprocessor for emitting a status alarm signal when the temperature sensed is above a preset level. An audible alarm is coupled to the microprocessor for emitting an audio signal when the temperature sensed is above the preset level. A manually operated panic switch causes a transceiver coupled to the microprocessor to send a radio signal to the central station if the firefighter is injured or does not move for a preset time and activates the audio alarm. The second system includes a transceiver, a power source and a microprocessor and a power source electronically coupled. |
| US09214071B2 |
Gaming machine having enhanced bonus game play schemes
A gaming machine has a wager-input device for receiving a first wager from a player to play a wagering game having a basic game and a bonus game. A display displays a plurality of symbols located thereon during the basic game. The symbols indicate a randomly-selected outcome selected from a plurality of outcomes in response to the wager. The plurality of outcomes includes a bonus-triggering outcome. A set of available game-enhancement parameters is displayed and the player is provided an option of submitting a second wager to purchase at least one of the set of available game-enhancement parameters. The set of available game-enhancement parameters provides an enhancement selected from the group consisting of: additional bonus-triggering outcomes providing a higher probability of triggering the bonus game, and enhanced awards during the bonus game. |
| US09214066B2 |
Systems, methods and devices for playing wagering games with randomized clumping of symbols
Gaming devices, gaming systems, methods of conducting a wagering game, and computer programs for initiating a wagering game are presented herein. A gaming system is presented that includes a wager input device, a display, and a controller. The wager input device receives wagers from players to play the wagering game. The display displays outcomes of the wagering game. Prior to displaying the outcome of the wagering game, the controller determines whether to add at least one symbol clump to at least one of a plurality of reels. A symbol clump comprises one or more identical symbols occupying two or more symbol positions located immediately adjacent one another on one reel. In response to a determination to add at least one symbol clump, the controller instructs the display to visually indicate the addition of the symbol clump to the reel, and to display the outcome of the wagering game. |
| US09214065B2 |
Gaming device having multiple different types of progressive awards
A gaming system including a plurality of different types of progressive awards adapted to be provided to one or more players of the gaming machines. In one embodiment, one or more progressive awards are each associated with a progressive hit value, wherein when each progressive award increments to its respective progressive hit value, a triggering event occurs and such progressive award is provided to a player. In one embodiment, one or more progressive awards are each associated with a secondary game, wherein if the secondary game is triggered, a player is provided either a static award or one of the progressive awards associated with the secondary game based on a play of the secondary game. In one embodiment, one or more progressive awards are each associated with an outcome of a primary game, wherein if the associated primary game outcome is generated, such progressive award is provided to a player. |
| US09214064B2 |
Systems and methods for determining a level of reward
A gaming system and method which includes enabling a player to initiate a play of a game, for the initiated play of the game: (i) randomly generating a game outcome, (ii) displaying to the player the randomly generated game outcome, (iii) determining any award associated with the displayed game outcome, and (iv) displaying to the player any determined award, enabling the player to invite a quantity of other players to each initiate a play of at least one game, the quantity of other players being greater than zero, and if the player invited the quantity of other players, providing the player a benefit, an amount of the benefit being based on the quantity of other players invited. |
| US09214061B2 |
Gaming machine running common game
When a common game condition is established, at least one of the following games is run: a first common game in which a participating gaming terminal is able to win a bonus type more than once and a payout based on a unit payout amount corresponding to the bonus type that the gaming terminal wins is awarded to the gaming terminal; a second common game in which a participating gaming terminal is able to win a bonus type more than once and a payout based on the number of winnings is awarded to the gaming terminal; and a third common game in which one of the participating gaming terminals is able to win one of the predetermined bonus types and a payout is awarded to the gaming terminal which wins said one of the bonus types. |
| US09214055B2 |
Video extension library system and method
Various embodiments disclosed herein are directed to a game platform and video extension system for a gaming device. The system includes an operating system that provides services to render graphics for the gaming device. Further, the operating system includes an OS video engine and a server. The system also includes a game that includes a game library and game application. The game library includes one or more library video engines. The game application includes one or more game modules, in which each game module is associated with a corresponding library video engine in the game library or OS video engine in the operating system. Additionally, the system enables game modules within the gaming application that have new features which are not supported by the video engine of the game operating system to be instead supported by corresponding library video engines within the game library. |
| US09214054B2 |
Driving device for vending machine
A driving device in a vending machine includes a pushing member, a securing member, and a driving assembly. The motor of the driving assembly provides a rotating force which acts on the securing member, and the securing member supports and rotates the helical pushing member, to drive goods out of the vending machine. The style of attachment between the pushing member and the securing member is such that the starting angle of the helical pushing member can be adjusted by unclipping the end of the pushing member with fingertip force from the securing member and reclipping it at a different preferred orientation. The driving device is used for adjusting the appropriate rotation angle of the pushing member. |
| US09214052B2 |
Analysis of stereoscopic images
A method of identifying the left-eye and the right-eye images of a stereoscopic pair, comprising the steps of comparing the images to locate an occluded region visible in only one of the images; detecting image edges; and identifying a right-eye image where image edges are aligned with a left hand edge of an occluded region and identifying a left-eye image where more image edges are aligned with a right hand edge of an occluded region. |
| US09214051B1 |
Dynamic touch screen for automated teller machines (“ATMs”)
Systems and methods according to the present invention provide a more secure Automated Teller Machine (ATM) transaction by preventing observation of banking customers' Personal Identification Number (PIN). Such systems and methods make it difficult to obtain a customer's PIN by tracking the hand movement of a customer using an ATM. Inputs presented for a customer selection are preferably dynamically displayed in different locations preferably each time the customer is asked to enter a PIN. Dynamically changing the sequence of the display and/or location of the presented inputs reduces the possibility of mapping the hand movement of the customer to the positions of the inputs displayed for a customer selection. Inputs may also be presented at a very narrow viewing angle, thereby making observation of a PIN difficult. Hence, banking customers are preferably provided with a more robust and secured ATM transaction system. |
| US09214049B2 |
Valuable-medium processing apparatus and valuable-medium processing method
The complexity of a task is reduced when a user processes a valuable medium, such as sales proceeds, of a plurality of days, on a sales day basis, all at once at a later date. A valuable-medium processing apparatus includes a valuable-medium processing unit that processes a valuable medium, a storage unit that stores therein information on the valuable medium processing, a display unit that displays the information on the valuable medium processing, an input unit for inputting the information on the valuable medium processing, a display control unit that causes the display unit to display information on a no-processing day when the valuable medium was not processed by the valuable-medium processing unit, and a control unit that causes the valuable-medium processing unit to process the valuable medium on a specific no-processing day when the specific no-processing day displayed on the display unit was inputted by using the input unit. |
| US09214043B2 |
Gesture based map annotation
A method, apparatus and computer readable medium provide for gesture based map annotation. In the context of a method, an annotation is made to a map that includes a three-dimensional model of geographic elements. The annotation is based on a free-space user gesture and is positioned at an annotation point on a surface of the three-dimensional model of the map. The annotation point is derived from a geographic location and a gesture direction associated with the user gesture. |
| US09214041B2 |
Method for enhancing the determination of a seismic horizon
The invention pertains to a method for enhancing the determination, from a seismic image of at least a portion of a seismic horizon in a three-dimensional domain. The method comprises: receiving the seismic image; receiving a plurality of related control points; defining pseudo-rectangles; for each pseudo-rectangle applying a diffeomorphic transformation F: defining a new domain; transforming points of the seismic image; transforming said pseudo-rectangle into a corresponding rectangle; applying a horizon reconstruction algorithm to the transformed points, to determine a part of a transformed horizon, the reconstruction comprising solving a Poisson equation; and computing a part of the horizon, said computing comprising applying an inverse diffeomorphic transformation F−1 to the determined part of a transformed horizon. |
| US09214039B2 |
Method for creating three-dimensional shape data, apparatus for creating three-dimensional shape data, and corresponding computer-readable storage medium
A three-dimensional shape data creating method associates characteristic points and characteristic axes on an image of a sketch drawn by a designer, or the like, with given points and given axes in a vehicle specs box, and determines the placement position and viewpoint direction of the sketch in a three-dimensional space by selecting combinations (point and point, axis and axis, and point and axis) having the minimum error in correspondence. Then, complex surfaces of given regions depicted in the sketch are created at a time in the three-dimensional space, by forming each cross-section line in a given region depicted in the sketch from a basic line and a fillet joint line, and a fillet joint surface is created between adjacent ones of the created complex surfaces of the given regions so as to join the complex surfaces. |
| US09214031B2 |
Motion detection method and associated apparatus
A motion detection method is provided. The method includes steps of: capturing a current frame, generating a current luma frame according to the current frame, generating a foreground binary image according to the current luma frame, a background luma image and a sensitivity, and updating the background luma frame according to an updating frequency and the sensitivity. |
| US09214030B2 |
Method and apparatus for processing video sequences
A method for processing a video sequence having a plurality of frames includes the steps of: extracting features from each of the frames, determining correspondences between the extracted features from two of the frames, estimating motion in the video sequence based on the determined correspondences, generating a background mosaic for the video sequence based on the estimated motion, and performing foreground-background segmentation on each of the frames based on the background mosaic. |
| US09214027B2 |
Apparatus, method, and non-transitory computer-readable medium
An apparatus includes a specifying unit configured to specify, based on an image as a candidate of an output target, at least one object region satisfying a predetermined condition from the image, a determination unit configured to determine whether the object region specified in the image by the specifying unit is divided in the image, and a decision unit configured to decide the output target region in the image based on a determination result by the determination unit. |
| US09214026B2 |
Belief propagation and affinity measures
Belief propagation and affinity measure techniques are described. In one or more implementations, beliefs may be formed to solve a labeling problem for a node, such as to perform image processing. An affinity measure may be calculated that describes how similar the node is to another node. This affinity measure may then be used as a basis to determine whether the share the belief formed for the node with the other node to solve a labeling problem for the other node. |
| US09214025B2 |
Depth estimation using normalized displacement of image pairs
Systems and methods are provided for depth map estimation using normalized displacement of image pairs. In one embodiment, an image manipulation application identifies image pairs from an input image. Each of the image pairs includes an image portion from a first perspective and the image portion from a second perspective. The image manipulation generates displacement vectors for the image pairs. Each of the displacement vectors represents at least one of a horizontal displacement and a vertical displacement of the image portion from the first perspective to the second perspective. The image manipulation application generates normalized displacement vectors corresponding to the displacement vectors. Each of the normalized displacement vectors is generated by transforming a respective orientation of a corresponding one of the displacement vectors to a common reference direction. The image manipulation application generates a depth map based on the normalized displacement vectors. |
| US09214021B2 |
Distributed position identification
A method and apparatus for identifying a position of a mobile platform. Images are provided by a camera system on a first mobile platform. The images include images of a second platform. An identified position of the first mobile platform is generated using the images and the position information for the second platform. The position information for the second platform identifies a location of the second platform. |
| US09214013B2 |
Systems and methods for correcting user identified artifacts in light field images
Systems and methods for correction of user identified artifacts in light field images are disclosed. One embodiment of the invention is a method for correcting artifacts in a light field image rendered from a light field obtained by capturing a set of images from different viewpoints and initial depth estimates for pixels within the light field using a processor configured by an image processing application, where the method includes: receiving a user input indicating the location of an artifact within said light field image; selecting a region of the light field image containing the indicated artifact; generating updated depth estimates for pixels within the selected region; and re-rendering at least a portion of the light field image using the updated depth estimates for the pixels within the selected region. |
| US09214012B2 |
Apparatus and method for image processing and storage medium
An image processing apparatus and method including executing high-pass filtering in a column direction on the pixel values of original image data read from a flat panel detector to obtain first image data, and subtracting a value obtained by converting each of the pixel values of the first image data in accordance with an absolute value of a statistic calculated from pixel values in the same pixel row of the first image data from the value of a corresponding pixel of the original image data to obtain processed image data. |
| US09214011B2 |
Camera defocus direction estimation
Apparatus and methods for estimating defocus direction from a single image obtained, such as in a digital camera apparatus, are presented. To determine defocus direction, point spread function (PSF) differences for the image are evaluated in the frequency domain, with frequency pairs being found having largest difference in their Fourier transform magnitudes, from which a direction estimate feature is extracted, and defocus direction estimated based on relation of estimated feature and statistics derived from camera image tests. The method can be applied for controlling autofocus mechanisms in cameras, or other applications requiring rapid determination of defocus directions, such as from a single image. |
| US09214010B2 |
Image processing apparatus, image processing method, and program product
A transformation rule of color transformation in an appropriate color space is set even without advanced knowledge and know-how. A three-dimensional lookup table unit transforms color information on an input image signal on the basis of a transformation rule. A correction range calculation unit calculates a correction range in a predetermined color space on the basis of a positional relationship between source coordinates and destination coordinates in the color space. A lattice point transfer distance calculation unit calculates the transformation destination coordinates at respective points on the basis of the positional relationship between the source coordinates and the destination coordinates, and a positional relationship between coordinates at the respective points within the correction range and the source coordinates to reflect the calculated transformation destination coordinates on the transformation rule. |
| US09214008B2 |
Shader program attribute storage
A system, method, and computer program product are provided for determining a size of an attribute storage buffer. Input attributes read by a shader program to generate output attributes are identified. A portion of the output attributes to be consumed by a destination shader program is identified. The size of the attribute storage buffer that is allocated for execution of the shader program is computed based on the input attributes and the portion of the output attributes. |
| US09214007B2 |
Graphics processor having unified cache system
Graphics processing units (GPUs) are used, for example, to process data related to three-dimensional objects or scenes and to render the three-dimensional data onto a two-dimensional display screen. One embodiment, among others, of a unified cache system used in a GPU comprises a data storage device and a storage device controller. The data storage device is configured to store graphics data processed by or to be processed by one or more shader units. The storage device controller is placed in communication with the data storage device. The storage device controller is configured to dynamically control a storage allocation of the graphics data within the data storage device. |
| US09213999B2 |
Providing iPSCs to a customer
The present disclosure features methods relating to conducting a stem cell technology business such as a regenerative medicine business based on induced pluripotent stem cells (iPSCs) and cells differentiated from iPSCs. The present disclosure also provides a database of iPSC-derived cells and methods of using the database for tracking customers and samples, as well as methods for marketing and running the business. |
| US09213989B2 |
Product catalog dynamically tailored to user-selected media content
Systems and methods for media-oriented product catalog creation are disclosed herein. Media content displayed or otherwise selected by a content consumer can be identified. Accordingly, products or services depicted by the media content can be compiled into a dynamic product catalog. The catalog can include a description of the products or services as well as associated contextual references to the media content, such as a screen capture or video clip that depicts one or more portions of the media content in which the product or service was featured. |
| US09213988B2 |
Electronic commerce infrastructure system
A networked commercial interaction management method assembles information into bundles that include a data element reference and meta data describing the data element. The method distributes the meta data and the data element reference from the bundles through the network, and distributes copies of the data elements in the bundles from the network node of their respective data owners to the network nodes of accessors using the meta data and the data element reference distributed through the network. In at least one embodiment, the method periodically issues bundle version identifying signals to different nodes of the network. The bundle version identifying signals indicate changes to the data elements to the network nodes of accessors. |
| US09213984B2 |
System identification, estimation, and prediction of advertising-related data
In accordance with the invention, a system, method, and apparatus for analyzing advertisement-related data are presented, which may include receiving data related to an aspect of an advertisement and modeling the aspect of the advertisement with a mathematical model. The mathematical model may include a control-signal-related component, a control-signal-independent component, and an error component. Each component may be updated based on at least one of a control signal, the received data, and a previous state of at least one of the components. An updated model may be created base on the updated components. The system, method, and apparatus may also include predicting the aspect of the advertisement using the updated model. Exemplary aspects of and data related to the advertisement may include one or more of the following: a number of impressions, “clicks,” or “conversions” and/or the impression-to-conversion, impression-to-click, or click-to-conversion ratios. |
| US09213983B2 |
Computing system, method, and non-transitory computer-readable medium for providing a multi-tenant knowledge network
A non-transitory computer-readable medium includes executable instructions that when executed by a processor cause the processor to effectuate a method. The method may include obtaining raw data from a plurality of different data sources; analyzing the raw data to identify one or more data structures of the raw data and to tag data identifying at least one of the plurality of different data sources; generating a plurality of Universal Data Model (UDM) constructs, each UDM construct being based at least in part on the one or more data structures of the raw data and each UDM construct excluding the source-identifying data. |
| US09213982B2 |
Method and system of providing information during content breakpoints in a virtual universe
The present invention is directed to a system and method for providing information during content breakpoints in a virtual universe. The system comprises a placement engine configured to detect a content breakpoint within a virtual universe, which is defined as at least one of a login process, a logoff process, a teleportation, a wait state, and during any point where a user changes information streams in the virtual universe. The system also comprises an insertion resolution engine configured to create a list of prioritized information to present to a user within the virtual universe and an information definition engine configured to present the prioritized information to the user of the virtual universe during the content breakpoint. |
| US09213980B2 |
Using behavioral data in rating user reputation
In a system and method for using user behavior and interaction data to rate a reputation of a user, a processor-implemented tracking component tracks an interaction of a user with a network-based publisher. A processor-implemented reputation component generates a reputation value for the user from the tracked user interaction. |
| US09213978B2 |
System and method for speech trend analytics with objective function and feature constraints
Disclosed herein are systems, methods, and non-transitory computer-readable storage media for performing trend analysis of speech. A system practicing the method receives a speech trend analysis request having candidate feature constraints, an objective function with respect to a speech trend to be analyzed, and a set of speech record constraints. The system selects a subset of speech records from the group of speech records based on the set of speech record constraints to yield selected speech records, identifies features in the selected speech records based on the set of candidate feature constraints to yield identified features, and assigns a weight to each of the identified features based on the objective function. Then the system ranks the identified features by their respective weights to yield ranked identified features, and outputs at least one of the ranked identified features associated with a speech-based trend in response to the speech trend analysis request. |
| US09213977B2 |
Authentication of a data card using a transit verification value
Transaction processing involves receiving data from an access transaction application of a portable consumer device, wherein the received data comprises data from an access transaction data string that includes a transit verification value wherein, with the exception of the transit verification value, the access transaction data string is substantially similar to a retail data string comprising retail data, wherein the access application data string is adapted for use with an access transaction processing system and the retail data string is adapted for use with a retail processing system. The transaction processing involves processing access transaction application data for selective authorization of the transaction. |
| US09213975B2 |
Adaptive policies and protections for securing financial transaction data at rest
A system, method, and computer-readable medium for challenge-response authentication are provided. A plurality of codes is received over a communication network based on input provided by way of a user interface displaying a plurality of images. An alphanumeric string is generated based on the received plurality of codes and based on a table that associates each one of the plurality of codes with a respective one of the plurality of images and with a respective one of a plurality of alphanumeric characters. A determination is made as to whether to grant authorization based on whether the generated alphanumeric string matches an alphanumeric user identifier stored in a memory device in association with a user. |
| US09213971B2 |
Method and system for providing information on pre-purchase and post-purchase items using RFID and computer-readable storage media storing programs for executing the method
Pre-purchase and post-purchase item information provision methods and systems using an RFID technology and computer readable storage media storing programs for executing the methods are provided. A pre-purchase item information provision method for a radio frequency identification system according to the present invention includes transmitting, if a mobile reader is detected by a local server installed in a salesroom, a certificate containing information on a location of an object information service server and an authentication value to the mobile reader; transmitting, at the mobile reader, a query requesting an item ID to a tag attached to a target item; transmitting, at the tag, a item ID information generated by encrypting the item ID using the authentication value to the mobile reader; transmitting, at the mobile reader, the item ID information and the authentication value to the object information service server; and transmitting, at the object information service server, data retrieved in a database in correspondence to the item ID, the data being retrieved when the authentication value exists in the database. The item information provision method and system of the present invention can guarantee reliability of information on an item in the pre-purchase state and prevent the information from being eavesdropped in both the pre-purchase and post-purchase states. Also, the item information provision method and system can prevent the tag ID from being tracked, thereby protecting purchaser's privacy, preventing the tag from being forged, and improving computation efficiency. |
| US09213965B1 |
Machine, methods, and program product for electronic inventory tracking
Machine, methods, and program product for facilitating electronic inventory tracking and management of products through messaging over a payment network, are provided. An example includes an inventory management computer in communication with a merchant POS apparatus or terminal over an existing financial services payment network and configured to receive and process purchase transaction data associated with a product being purchased, for use by a product provider. The computer can include electronic inventory management program product configured to perform various operations including receiving a purchase transaction message sent through the payment network, storing purchase transaction data, and notifying a product provider of the purchase transaction data. The purchase transaction message can include a financial services electronic payment network compatible universal product-transaction identifier, which can be received through the POS terminal in response to a consumer or merchant interfacing the product's container, or an associated purchase ticket or slip storing the transaction identifier, with the POS terminal. |
| US09213960B2 |
Filtering inventory objects using images in an RFID system
A method for filtering scanned objects displayed on a reader is provided. The reader may scan one or more transponders, and obtain, from a database, an image for each scanned transponder. Each transponder may be associated with an object (e.g., an item of retail inventory). The obtained image for each object may be presented on an interface, and a selection of an object category may be received using the obtained images. A determination may be made as to which objects are associated with the selected object category. A display screen may display data associated with only the objects associated with the selected object category. |
| US09213955B2 |
Work order optimization
A method may include receiving an order associated with processing a media file, generating a work order associated with fulfilling the order and identifying tasks associated with the work order. The method may also include accessing information identifying previously processed orders and determining whether at least one stored asset associated with one of the previously processed orders is usable when processing the first order. The method may further include retrieving, when a first one of the stored assets is usable, the first stored asset, and using the first stored asset when processing the work order. |
| US09213953B1 |
Multivariable load balancing in a fulfillment network
A multivariable load balancing system for a merchandise fulfillment network is described. The multivariable load balancing system employs Multiple-Input-Multiple-Output (MIMO) load balancing functionality or other closed loop control functionality to control which fulfillment resources (such as fulfillment centers) are to handle customer orders to reduce real world costs. |
| US09213952B2 |
Automatic scheduling tool
Embodiments of the invention relate to a message based scheduling tool employed to function with an electronic calendar. As messages are transmitting between clients, a tool is employed to parse the messages to search for one or more string(s) of characters characteristic of a meeting. Based upon these characteristics and the parsing, the electronic calendars are searched to find an available time slot on both calendars in which a meeting can take place, and, if an available time is found, the meeting is scheduled and the clients are sent notification of the scheduling. |
| US09213946B1 |
Comparing models
Methods, systems and computer program products for evaluating performance of generative models are disclosed. One method includes providing a base model and a candidate model having observed variables and first and second conceptually related variables related to the observed variables, respectively, receiving observations assigned to a subset of the observed variables, and for each observation, evaluating the observation by the base model to produce a base assessment of the observation, evaluating the observation by the candidate model to produce a second assessment of the observation, determining a similarity measure of the assessment of the observation based on the base and second assessments, and selecting a subset of observations having low similarity measures for use in evaluating performance of the candidate model. |
| US09213945B2 |
Method for controlling quantum dot device by perturbing dangling bond electronic states
A quantum device is provided that includes controllably quantum mechanically coupled dangling bonds extending from a surface of a semiconductor material. Each of the controllably quantum mechanically coupled dangling bonds has a separation of at least one atom of the semiconductor material. At least one electrode is provided for selectively modifying an electronic state of the controllably quantum mechanically coupled dangling bonds. By providing at least one additional electron within the controllably quantum mechanically coupled dangling bonds with the proviso that there exists at least one unoccupied dangling bond for each one additional electron present, the inventive device is operable at least to 293 degrees Kelvin and is largely immune to stray electrostatic perturbations. Room temperature operable quantum cellular automata and qubits are constructed thereform. |
| US09213942B2 |
Pattern behavior support in a rule engine
Some embodiments of pattern behavior support in a rule engine have been presented. In one embodiment, a behavior builder registry is stored on a computer-readable storage device in a server. The behavior builder registry includes a set of behaviors supported by a rule engine and a set of builders associated with the behaviors. A compiler running on the server may compile a set of rules using the behavior builder registry to generate a network having a set of nodes. In response to a data object asserted propagating into a node of the network, the rule engine may first check one or more behaviors at the node before applying one or more regular constraints at the node on the data object asserted. |
| US09213940B2 |
Cyberpersonalities in artificial reality
The invention concerns cyberpersonalities, including their and varied use in artificial reality. A cyberpersonality is comprised of a base personality (12). The base personality (12) is selected from a set of base personalities, each one representing the personality of a theoretical person. The cyberpersonality also includes a dynamic personality (14) that reflects the actual person (real or company) that the cyberpersonality is meant to represent and is able to learn. Information contained in the base (12) and dynamic (14) personality can be used to allow the person that the cyberpersonality mimics to interact in the artificial reality without direct control. The cybersonality can chat with third parties, including asking questions and answering questions, so as to learn more about each other. Other uses are related to searching, advertising and direct marketing. |
| US09213936B2 |
Electronic brain model with neuron tables
A method of emulating the human brain with its thought and rationalization processes is presented here, as well as a method of storing human-like thought. The invention provides for inclusion of psychological profiles, experience and societal position in an electronic emulation of the human brain. This permits a realistic human-like response by that emulation to the people and the interactive environment around it. |
| US09213932B2 |
Communication system using wireless power
Provided is a device and system for performing communication using wireless power, and a communication device using wireless power. The device may calculate a slope of an envelope in a waveform of energy stored in a target resonator through mutual resonance with a source resonator, and estimate a point placed within a predetermined interval around a point at which the slope reaches a maximum as a starting point of the mutual resonance between the source resonator and the target resonator. |
| US09213927B1 |
Methods for setting the address of a module
A method of operating a module is disclosed. The method includes adjusting an impedance between a power connection and a ground connection to regulate a power connection voltage targeted to a predetermined target voltage, and setting a module communication address based on the adjustment. The power connection voltage is a voltage on the power connection. Other methods are disclosed. |
| US09213923B2 |
Printer calibration using limited range reflection scanners as input sources
A method of calibrating a printer using a reflective scanner is disclosed. Because the reflective scanner used for calibration may only be able to accurately measure a limited density range that is less than the full density range of the printer, some information from the reflective scanner is disregarded or deemphasized during the calibration process. A calibration page is printed and scanned. Lookup tables (LUTs) that comprise the printer calibration values are updated based on adjustments calculated from the scanner for density regions where the scanner produces relatively accurate measurements, but updated based on the preexisting settings for density regions where the scanner produces relatively inaccurate measurements. In transitions regions between accurate and inaccurate regions, the LUTs are adjusted based on a combination of measurements from the scanner and the preexisting settings. |
| US09213921B2 |
Electronic card connector and electronic device using the same
An electronic device includes a housing and an electronic card connector fixed on the housing. The electronic card connector includes a tray and a fixing member. The tray includes a main body defining a card slot. The tray further includes two elastic arms protruding from two sidewalls of the tray respectively. The elastic arms include protrusions. The fixing member includes two notches corresponding to the two protrusions. When the main body receives in the second accommodating space, each of the two protrusions receives in one of the two notches respectively to engage the tray with the fixing member. When a pressure applied on the two elastic arms to enable the two protrusions to disengage from the two notches, the tray is disengaged from the fixing member. |
| US09213920B2 |
Using infrared imaging to create digital images for use in product customization
Techniques for using infrared imaging to create digital images for use in product customization are described. In an embodiment, an infrared photograph of a product with imprinted markup is received and a visible light photograph of the product with the imprinted markup is received. The imprinted markup is visible in the visible light photograph but is not visible in the infrared photograph. Instructions for rendering a customization image of the product depicting a particular customization are determined based in part on the infrared photograph and visible light photograph, where the particular customization is not in the infrared photograph or the visible light photograph. |
| US09213918B2 |
Vehicle identification based on an image
A machine may be configured as a vehicle identification machine to identify a model of a vehicle based on an image that depicts a dashboard of the vehicle. As configured, the machine may receive an image of the dashboard, where the image depicts a layout of instrumentation within the dashboard. The machine may identify the layout of instrumentation by processing the image. For example, the machine may process the image by determining a position of an instrument within the layout of instrumentation, determining an outline of instrument, or both. The machine may access a data record that correlates a model of the vehicle with the identified layout of instrumentation and, based on the data record, identify the model of the vehicle. The machine may then provide a notification that references the vehicle, references the identified model of the vehicle, or references both. |
| US09213915B2 |
Sparse adaptive filter
The disclosure provides a filtering engine for selecting a subset of hyperspectral imaging wavebands having information useful for detecting a target in a scene. Selecting these wavebands, called “sparse bands,” is an iterative process. One or more search techniques of varying computational complexity are used in the process. The techniques rely on various selection criteria, including a signal to clutter ratio that measures the “goodness” of band selection. A convenient example of the filtering engine uses several of the techniques together in a layered approach. In this novel approach, simpler computational techniques are applied, initially, to reduce a number of bands. More computationally intensive techniques then search the reduced band space. Accordingly, the filtering engine efficiently selects a set of sparse bands tailored for each target and each scene, and maintains some of the detection capability provided with a full set of wavebands. |
| US09213913B1 |
Rapid iterative detection (RID)
A rapid target detection approach with corresponding method and system to detect targets in scene pixels, efficiently, is presented. The approach includes tailoring an approximation of a target score for each scene pixel, individually, based on an “intermediate target score.” The intermediate target score includes a portion of the terms used to compute the target score. The portion is selected by computing a signal-to-clutter ratio (SCR) for a spectral reference associated with a target and ranking the terms by their contribution to the SCR. Scene pixels with low intermediate target scores are removed from further processing. The remaining scene pixels are further processed, including computing target scores to detect targets in these scene pixel. Advantageously, examples of the approach process a few terms of all scene pixels, eliminate most scene pixels, and calculate more terms on high target scoring scene pixels as needed. |
| US09213909B2 |
Object detection method, object detection apparatus, and program
An object detection method includes an image acquisition step of acquiring an image including a target object, a layer image generation step of generating a plurality of layer images by one or both of enlarging and reducing the image at a plurality of different scales, a first detection step of detecting a region of at least a part of the target object as a first detected region from each of the layer images, a selection step of selecting at least one of the layer images based on the detected first detected region and learning data learned in advance, a second detection step of detecting a region of at least a part of the target object in the selected layer image as a second detected region, and an integration step of integrating a detection result detected in the first detection step and a detection result detected in the second detection step. |
| US09213907B2 |
Hierarchical classification in credit card data extraction
Embodiments herein provide computer-implemented techniques for allowing a user computing device to extract financial card information using optical character recognition (“OCR”). Extracting financial card information may be improved by applying various classifiers and other transformations to the image data. For example, applying a linear classifier to the image to determine digit locations before applying the OCR algorithm allows the user computing device to use less processing capacity to extract accurate card data. The OCR application may train a classifier to use the wear patterns of a card to improve OCR algorithm performance. The OCR application may apply a linear classifier and then a nonlinear classifier to improve the performance and the accuracy of the OCR algorithm. The OCR application uses the known digit patterns used by typical credit and debit cards to improve the accuracy of the OCR algorithm. |
| US09213903B1 |
Method and system for cluster-based video monitoring and event categorization
A computing system obtains a respective motion vector for each of a series of motion event candidates in real-time as said each motion event candidate is detected in a live video stream. In response to receiving the respective motion vector for each of the series of motion event candidates, the computing system determines a spatial relationship between the respective motion vector of said each motion event candidate to one or more existing clusters established based on a plurality of previously processed motion vectors, and in accordance with a determination that the respective motion vector of a first motion event candidate of the series of motion event candidates falls within a respective range of at least a first existing cluster of the one or more existing clusters, assigns the first motion event candidate to at least a first event category associated with the first existing cluster. |
| US09213899B2 |
Context-aware tracking of a video object using a sparse representation framework
A method, system, and/or computer program product tracks an object in a video. A bounding box is defined by the user in a first frame, thus representing the object to be tracked based on a point of interest. A static dictionary D is populated with the densely overlapping patches from a search window. A new frame in the video is detected, and candidate patches, in the new frame, that potentially depict the object being tracked are identified. The candidate patches are co-located with the multiple densely overlapping patches to form a dynamic candidate dictionary Y of candidate patches. Candidate patches that best match the densely overlapping patches from the first frame are identified by an L1-norm solution, in order to identify a best-matched patch in the new frame. |
| US09213898B2 |
Object detection and extraction from image sequences
Object detection and extraction is performed from image sequences utilizing circular buffers for both source images and tracking. The detection and extraction process is performed in relation to the previous and current image, and the current and next image, including: alignment, absolute difference, removal of non-overlaps, and contour detection in difference images. An intersection is performed on these two outputs to retain contours of the current image only. Recovery of missing contour information is performed utilizing gradient tracing, followed by morphological dilation. A splitting process is performed if additional objects are found in a bounding box area. A mask image bounded by object contour is created, color attributes assigned, object verification performed and outliers removed. Then untracked objects are removed from the mask and a mask is output for moving objects with rectangular boundary box information. |
| US09213896B2 |
Method for detecting and tracking objects in image sequences of scenes acquired by a stationary camera
In a sequence of images of a scene acquired by a stationary camera, objects are detected and tracked by determining a first set of candidate foreground regions according to a background model. A second set of candidate foreground regions is determined according to a set of foreground models. Then, candidate foreground regions in the first set and the second set are validated to produce a final set of foreground regions in the image that include the objects. |
| US09213895B2 |
Iris scanning apparatus employing wide-angle camera, for identifying subject, and method thereof
Embodiments provide an iris scanning apparatus for identifying a subject, employing a wide-angle image collector, and a method thereof. A wide angle camera is employed in the iris scanning apparatus to allow a user to easily locate a small eye region of a subject without having to check back and forth between an image display and the subject's face. The apparatus and method are also capable of measuring the distance to the subject's eye and displaying the distance information on the image display, and informing the user as to whether the eye of the subject is within operating range of the iris scanning apparatus. Also, iris scanning is automatically performed without the user's input when an eye is positioned within operating range, and is not performed if an image captured by the iris scanning apparatus does not contain an eye region, in order to prevent erroneous operation. |
| US09213894B2 |
Image evaluation device, image evaluation method and program storage medium
An image evaluation device includes a storage unit that stores sample image data that represent a virtual sample image simulating a sample image included in a sample printout that is recognized as a non-defective printout; a reading unit that reads an inspection object image included in an inspection object printout obtained by printing the sample image on a recording medium by a printing device using image data representing the sample image; an extraction unit that extracts a line defect including a linear pattern formed in a specific direction from the inspection object image represented by inspection object image data, based on a difference value between the sample image data and the inspection object image data; and an evaluation unit that evaluates a visibility of the line defect extracted by the extraction unit. |
| US09213886B2 |
Method and device for notification of facial recognition environment, and computer-readable recording medium for executing method
According to a method for providing a notification on a face recognition environment of the present disclosure, the method includes obtaining an input image that is input in a preview state, comparing feature information for a face included in the input image with feature information for a plurality of reference images of people stored in a predetermined database to determine, in real-time, whether the input image satisfies a predetermined effective condition for photographing. The predetermined effective condition for photographing is information regarding a condition necessary for recognizing the face included in the input image at a higher accuracy level than a predetermined accuracy level. The method further includes providing a user with a predetermined feedback for photographing guidance that corresponds to whether the predetermined effective condition for photographing is satisfied. According to the method, a condition of a face image detected for face recognition is checked, and if there is an unsuitable element in recognizing the face, it is notified to a user such that an obstruction environment hindering the face recognition by the user is removed, for enhancing a success rate of the face recognition. |
| US09213885B1 |
Object recognizer and detector for two-dimensional images using Bayesian network based classifier
System and method for determining a classifier to discriminate between two classes—object or non-object. The classifier may be used by an object detection program to detect presence of a 3D object in a 2D image. The overall classifier is constructed of a sequence of classifiers, where each such classifier is based on a ratio of two graphical probability models. A discreet-valued variable representation at each node in a Bayesian network by a two-stage process of tree-structured vector quantization is discussed. The overall classifier may be part of an object detector program that is trained to automatically detect different types of 3D objects. Computationally efficient statistical methods to evaluate overall classifiers are disclosed. The Bayesian network-based classifier may also be used to determine if two observations belong to the same category. |
| US09213882B2 |
Devices and methods of reading monochromatic patterns
A method of extracting data from an identifiable monochromatic pattern. The method comprises separating a polychromatic optical signal, received from an object having identifiable monochromatic pattern, into a plurality of wavelength components, separately capturing each of the wavelength components, reconstructing a plurality of images each from a different wavelength component, detecting the identifiable monochromatic pattern in one or more of the images, and extracting data associated with or encoded by the detected identifiable monochromatic pattern. The images have different depths of field. |
| US09213881B1 |
Providing operating instructions for a barcode reader from a server
A barcode reader may include one or more advancements in the manner in which its software and/or firmware are updated and/or installed. The barcode reader may have an image sensor that captures an image of a barcode, a communication interface, volatile memory, non-volatile memory, and a processor. The barcode reader may receive executable code, selected from multiple versions, from a configuration server remote from the barcode reader. The executable code may be loaded directly into the volatile memory, without first being loaded into the non-volatile memory. The executable code may be loaded at a location in the volatile memory that begins at a start address stored in the non-volatile memory or in a header of the executable code. The barcode reader may execute the executable code to commence operation of the barcode reader directly after the executable code has been loaded into the volatile memory. |
| US09213879B1 |
Barcode reader which obtains supplemental operating instructions from a remote server
A barcode reader for decoding data from a barcode includes barcode reading hardware, including an image sensor which captures an image of a barcode within a field of view. The barcode reader also includes a processor. The processor executes embedded firmware to operate the barcode reading hardware. The processor also generates decoded data representative of data encoded in the barcode by executing supplemental operating instructions which the barcode reader obtains from a remote configuration server upon power up of the barcode reader. The supplemental operating instructions are distinct from the embedded firmware and include instructions which, when executed by the processor, enable the barcode reader to output the decoded data from the barcode within the field of view. |
| US09213877B1 |
Barcode reader which obtains operating instructions from a remote server
A barcode reader for providing decoded data to a remote computing system includes a communication interface, non-volatile memory comprising first executable code, volatile memory, and a processor. The processor executes the first executable code to utilize the communication interface to obtain second executable code from a remote configuration server. The processor also loads the second executable code directly to the volatile memory and executes the second executable code to commence operation of the barcode reader. |
| US09213873B2 |
Determining movement of a radio frequency identification tag using a phase difference/frequency model
Determining movement of a Radio Frequency Identification (RFID) tag first establishes a phase difference/frequency model comprising a set of phase-wrapped local rates-of-change and an intercept point. RFID tag readings are then made to measure phase differences between the interrogation signal and the tag response at different frequencies. A correlation is determined between the measured phase differences versus frequency and the phase-wrapped local phase rates-of-change of the phase difference/frequency model. If the correlation is better than or equal to a predetermined limit, the tag is stationary, or if the correlation is worse than the predetermined limit, the tag is moving. |
| US09213870B1 |
RFID tag and reader authentication by trusted authority
A Radio Frequency Identification (RFID) reader containing a reader key authenticates an RFID tag containing a tag key by receiving a reader challenge from a verification authority; determining a reader response based at least on the reader challenge and the reader key; sending a first message including at least the reader response but not the reader key to the verification authority; receiving a tag identifier from the tag; challenging the tag with a tag challenge; receiving a tag response based at least on the tag challenge and the tag key but not including the tag key; sending a second message including at least the tag identifier and the tag response to the verification authority; and receiving an electronically-signed reply from the verification authority. The reader validates the verification authority reply by checking the signature. The verification authority may notify a designated party if a response is incorrect. |
| US09213868B2 |
Electronic device
An electronic device comprises a housing defining an inserting slit configured to receive a memory card, a printed circuit board configured to be installed within the housing, a card reader installed in the housing and electrically coupled to the printed circuit board, and an elastic cover coupled to the housing and configured to cover the inserting slit. The card reader is configured to be substantially adjacent to the inserting slit. The elastic cover defines a slot for guiding the memory card to a receiving portion of the card reader. The elastic cover is configured to deform and expose the memory card upon depression, so that the memory card is ejected out of the housing via the slot. |
| US09213867B2 |
Secure cloud database platform with encrypted database queries
A cloud computing service to securely process queries on a database. A security device and method of operation are also disclosed. The security device may be provisioned with a private key of a subscriber to the cloud service and may have processing hardware that uses that key, sequestering the key and encryption processing in hardware that others, including operating personnel of the cloud service, cannot readily access. Processing within the security device may decrypt queries received from the subscriber and may encrypt responses for communication over a public network. The device may perform functions on clear text, thereby limiting the amount of clear text data processed on the cloud platform, while limiting bandwidth consumed in communicating with the subscriber. Such processing may include formatting data, including arguments in a query, in a security protocol used by the cloud platform. |
| US09213866B1 |
Circuits for and methods of preventing unauthorized access in an integrated circuit
A circuit for preventing unauthorized access in an integrated circuit includes a plurality of circuit block and a plurality of protection circuits. Each protection circuit is coupled to an input of a corresponding circuit block of the plurality of circuit blocks. Each protection circuit determines whether an access request to the corresponding circuit block is authorized. The protection circuits could be implemented to monitor system-on-chip interconnections of master and slave circuits, for example. A method of preventing unauthorized access in an integrated circuit could be implemented using the circuit. |
| US09213859B2 |
Securing user data in cloud computing environments
Systems and methods for obfuscating user data in a remote web-based application are disclosed. According to one method, user inputs to a displayed web page of the remote web-based application are received at a first web browser that is used by the user, wherein at least a portion of the user inputs comprise user-inputted data intended to be stored at the web-based application. The user inputs are transmitted to a management component that is configured to interact with a second web browser that communicates with the web-based application. The management component obfuscates at least a portion of the user-inputted data and forwards the obfuscated and un-obfuscated portions of the user inputs to the second web browser, which correspondingly transmits the obfuscated and un-obfuscated portions of the user inputs to the remote web-based application. |
| US09213855B1 |
Trusted user circles
A trusted user circle server for encryption key distribution and authentication support, as well as a client-side application which resides on user's devices are disclosed. In particular, the trusted user circle server manages a repository for static public keys (SPUK) which are used for authentication and secure distribution of a dynamic private context key (DPCK) used for the end-to-many encryption. Accordingly, posting users encrypt posted document using the DPCK and viewing users retrieve the DPCK to decrypt the posted document. These keys are associated to the trusted user circle and are generated dynamically for a given circle policy context (CPC). The CPC is an identifier that represents a group of members of a trusted user circle. It changes whenever any member of the trusted user circle leave it, when a new trusted user circle is created or when the DPCK expires after a pre-determined period of time. |
| US09213854B2 |
Head-mounted display apparatus with enhanced security and method for accessing encrypted information by the apparatus
There are provided a head-mounted display (HMD) apparatus and a method for accessing encrypted information by the apparatus, in which the head-mounted display apparatus with enhanced security according to an embodiment of the present invention includes a biometric information input unit that receives biometric information of a user; a communication module that transmits or receives information to or from a server; a memory that stores encrypted information; a processor that transmits the biometric information received through the biometric information input unit to a user authentication server through the communication module, receives access privilege information from the user authentication server, and decrypts the encrypted information stored in the memory based on the received access privilege information; and a display unit that displays the decrypted information through the processor. |
| US09213847B2 |
Computer-implemented method and apparatus for encoding natural-language text content and/or detecting plagiarism
A computer-implemented letter-based method of encoding a length-significant portion of natural language text to generate a letter-based fingerprint of the text portion, the method including detecting letter-based locations of occurrences of pre-determined single-letter and/or multi-letter pattern(s) within the length-significant portion, the detecting being carried out such that at least some occurrences are detected in a word-boundary independent manner that does not depend on locations of word-word boundaries, for a pattern occurrence letter-position signal which describes letter positions of the occurrences of the patterns within the text portion, computing frequency-dependent absolute or relative magnitudes of signal strength for a plurality of frequencies, the computed magnitudes representing letter-based frequencies of the pattern occurrences within the natural language text portion, and storing the computed signal strength magnitudes at the plurality of frequencies, the generated fingerprint comprising the stored signal strength magnitudes. Related apparatus and methods are also described. |
| US09213846B2 |
Using flash storage device to prevent unauthorized use of software
A flash storage device and a method for using the flash storage device to prevent unauthorized use of a software application are provided. An identifier may be encoded within specific sectors of the flash storage device. One bits of the identifier may be encoded as unusable ones of the specific sectors and zero bits of the identifier may be encoded as usable one of the specific sectors. Alternatively, the zero bits of the identifier may be encoded as the unusable ones of the specific sectors and the one bits of the identifier may be encoded as the usable ones of the specific sectors. The software application may be permitted to execute on a processing device connected to the flash storage device only when the identifier is encoded within the flash storage device. |
| US09213845B1 |
Content access control across multiple media devices
Described herein are systems and methods for controlling access by a user to content across a plurality of media devices. Access content limits may be set and enforced across the plurality of media devices. A user exceeding the limits may be disallowed from access to the content. The content access limits for a user may be specified by one or more of time, cost, content category, and so forth. |
| US09213842B2 |
Tracing data block operations
An apparatus and related method to track data block operations in a cloud system are provided. Attributes associated with the data block operation may be attached to each individual data block targeted by the data block operation. |
| US09213841B2 |
Method, manufacture, and apparatus for secure debug and crash logging of obfuscated libraries
A method, apparatus, and manufacture for debugging and crash logging is provided. A log file is received, where the log file includes encrypted log messages that indicate execution trace of obfuscated code while leaving code locations of corresponding code in the obfuscated code unknown. The encrypted log messages include execution way-point indices. Next, at least a portion of the log file is then decrypted. A debug log viewer is then employed to view the decrypted log file. The debug log viewer includes an execution way-point manifest that correlates each of the execution way-point indices to a corresponding code location. |
| US09213838B2 |
Systems and methods of processing data associated with detection and/or handling of malware
The present disclosure relates to malware and, more particularly, towards systems and methods of processing information associated with detecting and handling malware. According to certain illustrative implementations, methods of processing malware are disclosed. Moreover, such methods may include one or more of unpacking and/or decrypting malware samples, dynamically analyzing the samples, disassembling and/or reverse engineering the samples, performing static analysis of the samples, determining latent logic execution path information regarding the samples, classifying the samples, and/or providing intelligent report information regarding the samples. |
| US09213832B2 |
Dynamically scanning a web application through use of web traffic information
Collecting log file data from at least one log file. From the collected log file data, at least one HTTP request can be generated to exercise a web application to perform a security analysis of the web application. The HTTP request can be communicated to the web application. At least one HTTP response to the HTTP request can be received. The HTTP response can be analyzed to perform validation of the web application. Results of the validation can be output. |
| US09213831B2 |
Malware detection and prevention by monitoring and modifying a hardware pipeline
The various aspects provide a method for recognizing and preventing malicious behavior on a mobile computing device before it occurs by monitoring and modifying instructions pending in the mobile computing device's hardware pipeline (i.e., queued instructions). In the various aspects, a mobile computing device may preemptively determine whether executing a set of queued instructions will result in a malicious configuration given the mobile computing device's current configuration. When the mobile computing device determines that executing the queued instructions will result in a malicious configuration, the mobile computing device may stop execution of the queued instructions or take other actions to preempt the malicious behavior before the queued instructions are executed. |
| US09213823B2 |
Method for inputting a code using a portable device, and associated portable device
A method and apparatus are provided for entering a code using a portable device. The method includes measuring at least one angle of inclination of the portable device and generating an input code from the measured angle of inclination. |
| US09213818B2 |
Anonymous authentication using backup biometric information
A method for performing anonymous authentication by an electronic device is described. The method includes obtaining biometric data. The method also includes enrolling biometric information based on the biometric data. The method also includes generating backup biometric information based on the biometric data. The backup biometric information includes a backup biometric template. The method also includes generating a backup public key and a backup private key. The method also includes enrolling the backup biometric information. Enrolling the backup biometric information includes distributing the backup biometric template, the backup public key and the backup private key among different entities. |
| US09213817B2 |
Motion-based credentials using magnified motion
Systems and methods are provided which allow for motion-based authentication of a user using magnified motion. Very small or imperceptible motions of a user may be captured and magnified to determine characteristics of the motions that may be used as a motion-based credential for user authentication. The motions, which may be very small and imperceptible to an observer, may be difficult for potential attackers to observe and copy, but may be useful when magnified. |
| US09213814B2 |
User authentication based on self-selected preferences
Embodiments of the invention are directed to a system, method, and a computer program product for a user authentication based on self-selected preferences. The system typically including a memory, a processor, and a module configured to receive a request to execute a user action from a user associated with an application, wherein the user action requires validation of one or more authentication credentials; access a user-selected preference indicating a level of authentication associated with a user-selected preference as desired by the user; determine authentication types from a plurality of authentication types associated with the level of authentication and the user-selected preference; request one or more authentication credentials corresponding to the determined one or more authentication types; receive one or more authentication credentials from the user; validate the one or more authentication credentials and in response to the successful validation of the one or more authentication credentials, execute the user action. |
| US09213811B2 |
Methods and systems for improving the security of secret authentication data during authentication transactions
A method for improving the security of secret authentication data during authentication transactions is provided that includes converting the secret authentication data of a user into scrambled secret authentication data by associating a different text-string with each item of information included in the secret authentication data. The method also includes capturing the scrambled secret authentication data with a communications device, and conducting an authentication transaction with the captured authentication data. |
| US09213805B2 |
Approach for managing access to data on client devices
A device management system is configured to manage access to electronic documents on client devices using policies. The policies specify one or more download and processing restrictions to be enforced with respect to the particular electronic document at client devices for example, particular hardware and software configurations that are required at client devices before data is permitted to be downloaded to those client devices. The policies may also specify other requirements that must be satisfied before data is permitted to be downloaded to those client devices, for example, user authentication. |
| US09213803B2 |
System and method for collecting, analyzing and reporting fitness activity data
In one aspect of the invention, a system for monitoring a fitness activity of user performing a fitness activity with an exercise device is described herein. The system includes a sensor for sensing and transmitting data indicative of an exercise that is being performed with an exercise device, a user identification device, a database, and a processor. The processor is configured to receive a signal indicative of a patron ID and responsively retrieve a patron record being associated with the received patron ID from the database. The processor also determines a planned exercise sequence associated with the patron exercise session as a function of the retrieved patron record, determines a current exercise sequence being performed by the patron, and determines a condition of the patron exercise session as a function of the planned exercise sequence and the current exercise sequence. |
| US09213798B2 |
Method, system and computer program product of checking an integrated circuit layout for instances of a reference pattern
A method 100, a computer program product and a system of checking an integrated circuit layout for instances of a reference pattern is provided The method 100 comprises the steps of: i) receiving 102 the integrated circuit layout, ii) receiving 104 a drawing of the reference pattern from a user, iii) deducting 106 a basic pattern definition from the drawn reference pattern, iv) determining 108 a set of topological relation based on the drawn reference pattern, v) forming 110 a complex pattern description which is a combination of the deducted basic pattern definition and the set of topological relations, vi) checking 112 the integrated circuit layout for patterns that match the complex pattern description to find instances of the reference pattern in the integrated circuit layout, and vii) storing 114 found instances of the reference pattern. |
| US09213797B2 |
Method, system and computer program product for designing semiconductor device
A method of designing a semiconductor device is performed by at least one processor. In the method, a first environment temperature for a first substrate is determined based on an operational temperature of a second substrate, the first and second substrates stacked one upon another in the semiconductor device. An operation of at least one first circuit element in the first substrate is simulated based on the first environment temperature. |
| US09213796B2 |
Method for designing semiconductor integrated circuit and program
A method for designing a semiconductor integrated circuit includes: determining, by a designing device, first wirings over which signals are propagated and second wirings which are not used for propagation of the signals among a plurality of wirings of a semiconductor integrated circuit; and determining, by the designing device, from among the second wirings, third wirings to be used for storing electrical charges for electrical charge recycling of the first wirings for a most number of the first wirings in a range that satisfies a timing constraint based on operation rates of the signals propagated over the first wirings and delay times of the first wirings. |