最新美国发明专利第2015-12-15期 - 专利汇|PatentHub专利检索|专利查询网|发明专利查询分析

Document	Document Title
US09214794B2	Messenger supported overhead cable for electrical transmission A transmission line assembly for transmission and distribution of high voltage power which comprises a conductor, a separate messenger member and coupling means. The conductor has a predetermined length. The separate messenger member has a predetermined length. The coupling means couples the messenger to the conductor to the messenger. The messenger member and the conductor remain structurally separate from each other and functionally independent.
US09214793B2	Electrical connection box An electrical connection box assembled by a lock structure has a first case, a second case, a plurality of lock pieces, an engagement protrusion, a plurality of lock recesses, and an engagement part. The plurality of lock pieces are provided to a peripheral wall of the first case and are elastically deformable toward an inner side of the first case. The engagement protrusion is provided to an outer surface of each lock piece. The plurality of lock recesses are provided to a peripheral wall of the second case. The engagement part is provided bridging each lock recess, the lock pieces being disposed between the lock recesses and the engagement parts, the engagement protrusions engaging the engagement parts to assemble the first and second cases, engagement between the engagement protrusions and the engagement parts being released by deformation of the lock pieces inside the lock recesses.
US09214792B2	Electrical junction box A harness outlet through which a wiring harness is passed is provided on a sidewall of a case of an electrical junction box. A harness guide is extended form a circumference of the harness outlet to protect the wiring harness and to regulate a path (outlet direction) of the wiring harness. At a side near the harness outlet, the harness guide covers a whole circumference of the wiring harness. At a side away from the harness outlet, the harness guide covers both sides and an upper portion of the wiring harness, and a portion for covering the lower portion of the wiring harness is not provided on the harness guide.
US09214791B1	Fuse disconnect safety switch (FDSS) Various embodiments provide safety disconnect systems for a power system. In one aspect, a safety switch system and method for a power system, including a plurality of sequentially interlocked switches capable of being operated in a predetermined sequence to isolate one or more fuses, is provided. The described safety switch system is a convenient and sequential approach to safely remove power from a system and access associated fuses.
US09214787B2	III-V photonic crystal microlaser bonded on silicon-on-insulator Novel methods and systems for miniaturized lasers are described. A photonic crystal is bonded to a silicon-on-insulator wafer. The photonic crystal includes air-holes and can include a waveguide which couples the laser output to a silicon waveguide.
US09214785B2	Semiconductor laser light source having an edge-emitting semiconductor body A semiconductor laser light source comprising an edge-emitting semiconductor body (10) is provided. The semiconductor body (10) contains a semiconductor layer stack (110) having an n-type layer (111), an active layer (112) and a p-type layer (113) which is formed for generating electromagnetic radiation which comprises a coherent portion (21). The semiconductor laser light source is formed for decoupling the coherent portion (21) of the electromagnetic radiation from a decoupling surface (101) of the semiconductor body (10) which is inclined with respect to the active layer (112). The semiconductor body (10) comprises a further external surface (102A, 102B, 102C) which is inclined with respect to the decoupling surface (101) and has at least one light-diffusing sub-region (12, 12A, 12B, 12C, 120A, 120B) which is provided in order to direct a portion of the electromagnetic radiation generated by the semiconductor layer stack (110) in the direction towards the further external surface (102A, 102B, 102C).
US09214782B2	Dielectric laser electron accelerators A laser-driven dielectric electron accelerator is composed of a dielectric photonic crystal accelerator structure having an electron beam channel and buried grating whose elements are arranged linearly parallel to the electron beam channel. The accelerator structure preferably has a thin film material coating. The grating may have an asymmetric structure. The accelerator and undulator structures may be integrated with on-chip optical and electronic devices such as waveguide devices and control circuits so that multiple devices can be fabricated on the same chip.
US09214781B2	Fiber amplifier system for suppression of modal instabilities and method Apparatus and method for suppressing modal instabilities (MI) in fiber-amplifier systems. In some embodiments, thermal effects drive the MI process, and in some such embodiments, the present invention provides a plurality of options for mitigating these thermal effects. In some embodiments, the present invention provides a hybrid fiber with a smaller core in the initial length where the thermal loads are highest, followed by a larger-core fiber. In some embodiments the length of the smaller-core section is chosen to keep the core heat-per-unit-length of the second section below a critical value for the onset of MI. In some embodiments, the hybrid fiber of the present invention avoids modal instabilities while yielding almost the same performance as compared to conventional fibers with regard to minimizing fiber nonlinearities such as Stimulated Brillouin Scattering (SBS). In some embodiments, the hybrid fiber outputs a signal beam with at least 1 kW of power.
US09214776B2	Light bulb socket having a plurality of thread locks to engage a light bulb A threadless light socket assembly allows a light bulb to be changed by pushing or pulling the light bulb into or out of the socket provides an outer insulator housing and an insulator cap which carrying a ground socket in a medial channel that grounds a light bulb base to a power supply. Plural spring biased thread locks protrude into center of the ground socket and are staggered in height to align with threads defined in a light bulb base. A positive contact is in the socket assembly supplies positive power from a power supply to the light bulb base. The threadless light socket has interchangeable components to allow installation in new and existing light fixtures.
US09214775B2	Joint connector and method for identifying bus bar pattern in joint connector A joint connector includes a bus bar and a housing. The bus bar juxtaposes plural tab pieces to be connected to mating terminals. The housing has a bus bar accommodating part accommodating the bus bar, and includes plural terminal receiving chambers for receiving the mating terminals. The housing is formed with plural continuity check holes at a back end of the housing so as to expose a back end of the bus bar. In a case where the plural bus bars are accommodated in the bus bar receiving parts, at least one of the continuity check holes is positioned between the adjacent bus bars, and the at least one of the continuity check holes is formed in a resin-sealed part filled with an insulating resin material.
US09214773B2	Configurable safety light receptacle An electrical receptacle provide outlets and a cavity for receiving an insert. The insert connects to the electrical main through the receptacle and can provide additional functionality through the insert including emergency lighting, night lighting, gas detectors and charging connections.
US09214768B2	Communication connector and transmission module thereof A transmission module of a communication connector includes a plurality of first signal terminals, a plurality of second signal terminals, and a plurality of ground terminals. The terminals are coupling along a coupling direction. Along the coupling direction, the grounding terminals respectively correspond to the first and second terminals, a main portion of each signal terminal is orthogonally projecting to an area of a main portion of the corresponding ground terminal, in which the area is located inside the contour of the main portion. Moreover, the width of the main portion is less than or equal to two times of the width of the main portion of the corresponding signal terminal. Thus, the instant disclosure provides the transmission module with novel type.
US09214767B1	Electrical connector and method of making the same An electrical connector having an insulative housing, a middle grounding member and a pair of contact modules. The insulative housing has a mating portion, a body portion and an upper cavity and a lower cavity at upper and lower sides of the body portion. The mating portion has a top wall, a bottom wall, a pair of side walls and a receiving space therebetween. The middle grounding member is retained in the body portion. Each contact module has an insulator received in the upper or lower cavity, contacts and a locking spring in the insulator. The locking spring is at a lateral side of the contacts and has a fixing portion fixed in the insulator, a locking arm forwardly extending to the receiving space and an extension tab backwardly extending from a rear side of the fixing portion. Each contact has a contact arm extending to the receiving space.
US09214761B2	Plug-in connector having a cable sheath with two parts adjustable in different positions relative to each other The invention relates to a plug-in connector for a data or telecommunication cable comprising several wires with a contact carrier, comprising connection contacts for a plug-in connection and with connecting contacts, connected thereto in an electrically-conducting fashion, for the wires of the cable, and with an accepting screen.
US09214757B2	Contamination avoidance combination high voltage interlock cover The present disclosure is directed towards a high voltage interface cover system for inhibiting liquid contamination of high voltage connection areas of EV's and HEV's. This liquid contamination may come from atmospheric precipitation or road splash which comes in contact with the surface of either the HVDC connection block cover and/or the high voltage main device cover, and flows into the interface seals connecting them. The cover system comprises a pair of interlocking covers which provide a tortuous path for liquid contamination to penetrate the interface.
US09214752B2	Bus bar module A bus bar module includes: a bus bar module body section formed of an insulating material, and including an output terminal installation section on which to install an output terminal, a part of the output terminal installation section projecting, and a cover latching section provided to a tip end side of the projecting output terminal installation section; and an output terminal cover configured to cover the output terminal on the output terminal installation section, provided to the bus bar module body section using a hinge section which is provided to a base end side of the output terminal installation section, and including a cover latch section provided to a tip end side of the output terminal cover, the cover latch section being fastened to the cover latching section of the bus bar module body section when the output terminal cover covers the output terminal on the output terminal installation section.
US09214751B2	Coaxial connector plug and coaxial connector receptacle A coaxial connector plug and a coaxial connector receptacle that may be stably suctioned by a suction nozzle. A coaxial connector receptacle including a substantially cylindrical outer conductor and a center conductor surrounded by the outer conductor is mountable to a coaxial connector plug. An outer conductor has a substantially cylindrical shape extending in the z-axis direction, and is provided with a slit that connects between the upper end and the lower end of the outer conductor. A center conductor is surrounded by the outer conductor. A projection is positioned in the slit. The outer conductor of the coaxial connector receptacle is inserted into the outer conductor from the negative side in the z-axis direction. The center conductor of the coaxial connector receptacle is connected to the center conductor.
US09214749B2	Pluggable apparatus of circuit board, and server A pluggable apparatus of a circuit board is provided, which solves the problem that hot plugging of a Peripheral Component Interconnect Express (PCI-E) card is difficult to implement. The pluggable apparatus of the circuit board includes a base plate, a pulling strip, a rotating member, and a carrier plate, where the pulling strip is movably connected to the base plate by using a transverse guide mechanism, sawteeth are formed on a body of the pulling strip, the pulling strip further includes a handle that extends out of the base plate; the rotating member is in a bending line shape; the carrier plate is movably connected to the base plate by using a longitudinal guide mechanism; and a clamping trough is disposed on the carrier plate and is configured to fasten the circuit board.
US09214747B2	Low profile electrical connector have a FPC An electrical connector electrically connecting a chip module to a printed circuit board includes an insulative housing with a number of terminals therein and includes a substrate and a sidewall extending upwardly from the substrate, the substrate includes a top surface, a bottom surface opposite to the top surface and a number of through holes penetrated from the top surface to the bottom surface, wherein the electrical connector further includes a flex film located under the substrate, a frame located above the flex film and a number of solder balls electrically connecting the flex film to the printed circuit board, the four sides of the flex film and the frame are both insert-molded into the insulative housing.
US09214743B2	Right angle connector assembly A connector assembly includes a dielectric having a right angle body including a first segment and a second segment and defining a right angle chamber extending through the first and second segments. At least one door at a right angle corner of the body provides access to the right angle chamber through a rear opening in an open state, and restricts access to the rear opening in a closed state. A female center contact in the right angle chamber in the first segment has a terminating end configured to electrically connect to a cable conductor of a cable received in the right angle chamber in the second segment. A front shield receives the dielectric and forces the door to move from the open state to the closed state upon loading the dielectric into the front shield. A rear shield couples to the front shield.
US09214739B2	Overlapped and staggered antenna arrays An antenna structure includes a dielectric material in which antenna array elements are placed on either side. Elements on either side of the dielectric material overlap or are staggered opposing elements. The dielectric material may also include co-located, antenna arrays of array elements radiating in different directions. Antenna array elements may be formed using conformal shielding which applied and selectively removed to create antenna structures. Devices that include the antenna structure can include a casing that is a shaped lens to increase antenna aperture size and enhance antenna performance.
US09214737B2	Mobile wireless communications device including an electrically conductive director element and related methods A mobile wireless communications device may include a portable housing, a printed circuit board (PCB) carried by the portable housing, a wireless transceiver carried by the PCB, and an antenna connected to the transceiver and carried by the PCB. The mobile wireless communications device may further include at least one director element for directing a beam pattern of the antenna. More particularly, the at least one director element may include an electrically conductive main branch carried by the portable housing, and an electrically conductive connector portion extending between the main branch and the PCB.
US09214736B2	Systems and methods for mitigating disturbances in a dual gridded reflector antenna Methods and systems for mitigating disturbances in a dual gridded reflector antenna are provided. An antenna system that includes a first reflective surface, a second reflective surface, and an intercostal ring is provided. The intercostal ring is configured to connect the first reflective surface and the second reflective surface. A baffle is disposed between the intercostal ring and a path of the electromagnetic waves. The baffle is configured to redirect the electromagnetic waves away from the intercostal ring. Alternatively, the baffle is not present, and the intercostal ring is configured to redirect a perturbed portion of an electromagnetic wave away from wave paths of electromagnetic waves reflected by the first reflective surface and the second reflective surface, respectively.
US09214734B2	Multi-quadrifilar helix antenna In accordance with one or more embodiments of the present invention, a quadrifilar helix antenna can be formed to accommodate multiple frequencies using a single microstrip feed system, illustratively comprising an infinite balun in combination with interspersed antenna conductors tuned for effective resonance at the desired frequencies around the single feed system. Accordingly, as an additional aspect, the present invention also combines the multiple frequency antenna elements and the single feed system into a unitary assembly of cylindrical geometry that is generally reduced in size, with the interspersed arrangement of the multiple (e.g., resonating) antenna conductors wrapped into a short cylindrical surface. Through the use of the single hybrid feed system and resonating antenna conductors for multiple frequencies, the need for complex feed networks having multiple circuits (hybrid circuits, transformers, etc.) is alleviated, while still maintaining acceptable levels of performance.
US09214733B2	Antenna device Provided is an antenna device including a substrate, a metal chassis disposed adjacent a rear surface of the substrate, multiple patch antenna elements formed in an array on a front surface of the substrate, feeding lines formed on the front surface of the substrate and through which electricity is fed to the multiple patch antenna elements, and a ground conductor formed on the rear surface of the substrate in a portion opposite the feeding lines.
US09214731B2	Planar antenna having a widened bandwidth A planar antenna with widened bandwidth comprises at least one first conducting element disposed above an earth plane and separated from the latter, and means for exciting said at least first conducting element, configured to excite two distinct orthogonal resonant modes, wherein said at least first conducting element is embodied by a substrate comprising at least one thin layer of an anisotropic material with relative permeability of greater than 10 for 2 GHz. The antenna applies notably to mobile communications terminals.
US09214726B2	High frequency phase shifter array testing Aspects of the invention provide for an architecture and method for testing high frequency phase shifter arrays. In one embodiment, an architecture for testing a phase shifter array, includes: a plurality of power dividers, each power divider configured to receive an output from a phase shifter within the phase shifter array and split the output into a first signal and a second signal; a plurality of power clippers, each power clipper configured to receive the second signal and modify the second signal by limiting an amplitude of the second signal; a first power combiner configured to receive the first signal from each of the plurality of power dividers to generate a first output; and a second power combiner configured to receive the modified second signal from each of the plurality of power clippers to generate a second output.
US09214724B2	Antenna array with wide-band reactance cancellation An antenna array containing two or more radiating elements, with nearest neighbor radiating elements connected together with a non-Foster circuit at terminals of the radiating elements such that mutual reactance of the elements is reduced over a wider bandwidth than which would be obtained if the non-Foster circuits were omitted.
US09214722B2	Origami folded antennas An antenna includes a dielectric sheet and a conductive film. The dielectric sheet is folded into a plurality of fold segments and is configured to be compressed into a compressed state and to be expanded into an expanded state. The conductive film is disposed on a portion of the dielectric sheet. The conductive film has a pattern that defines a current path from the bottom of the dielectric sheet to the top of the dielectric sheet. The pattern is configured so that the each of the plurality of fold segments includes a portion of the pattern and so that the portion of the pattern on each fold segment is substantially non-juxtaposed with respect to the portion of the pattern on each adjacent fold segment when the dielectric sheet is fully compressed into the compressed state.
US09214720B2	Communication system node comprising a re-configuration network The present invention relates to a node (1) in a wireless communication system, the node (1) comprising at least one antenna (2) which comprises an even number (A) of antenna ports (3, 4, 5, 6), at least four, where each antenna port (3, 4, 5, 6) is associated with a corresponding polarization (P1, P2), beam-width and phase center. The antenna ports (3, 4, 5, 6) are connected to a reconfiguration network (7) which is arranged for pair-wise linear combination of antenna ports (3, 4, 5, 6) of mutually orthogonal polarizations to a number (B) of virtual antenna ports (8, 9), which number (B) is equal to half the number (A) of antenna ports (3, 4, 5, 6). The virtual antenna ports (8, 9) correspond to virtual antennas and are connected to corresponding radio branches (10, 11). The present invention also relates to a corresponding method.
US09214717B2	Handheld electronic devices and methods involving improved antenna performance Handheld electronic devices and methods involving improved antenna performance are provided. A representative device includes: a housing; a first antenna mounted at a first position of the housing; a second antenna mounted at a second position of the housing; a hand position monitoring system operative to determine a position of a hand of a user grasping the housing of the device; and an antenna selection system operative to selectively and alternately activate the first antenna and the second antenna such that, responsive to the hand position monitoring system determining that the hand is in a vicinity of the first antenna, the antenna selection system activates the second antenna, and responsive to the hand position monitoring system determining that the hand is in a vicinity of the second antenna, the antenna selection system activates the first antenna.
US09214713B2	Method of fabricating a microstrip line dielectric overlay A printed circuit board has a dielectric constant different from the dielectric constant of free space, with at least two microstrip lines routed adjacent to one another on a surface of the printed circuit board. A dielectric coating is applied to at least one of the at least two microstrip lines such that the dielectric constant of the dielectric coating differs from the dielectric constant of free space. In a further embodiment, the dielectric coating comprises a material having a dielectric constant approximately equal to the dielectric constant of the printed circuit board.
US09214710B1	Hybrid battery power system A hybrid battery is configured to power at least one of a low current circuitry and a high current circuitry. The hybrid battery includes a primary battery configured to supply relatively constant, low current to the low current circuitry and a secondary battery configured to supply intermittent, high peak current to the high current circuitry. The hybrid battery also includes a controller configured to monitor energy load requirements of the low current circuitry and the high current circuitry, adaptively direct energy generated by the primary battery and the secondary battery to the low current circuitry and the high current circuitry respectively, and maintain a state of charge of the secondary battery by directing electrical energy from the primary battery to the secondary battery.
US09214707B2	Metal/oxygen battery with precipitation zone In one embodiment, an electrochemical cell includes a negative electrode, a positive electrode, a precipitation zone located between the negative electrode and the positive electrode and in fluid communication with the positive electrode, and a fluid electrolyte within the positive electrode and the precipitation zone, wherein the precipitation zone is configured such that a discharge product which is produced as the cell discharges is preferentially precipitated within the precipitation zone.
US09214706B2	Battery heating circuits and methods using resonance components in series based on charge balancing Certain embodiments of the present invention disclose a battery heating circuit, wherein: the battery comprises a battery E1 and a battery E2. For example, the heating circuit comprises: a first charging/discharging circuit, which is connected with the battery E1, and comprises a damping component R1, a current storage component L1, a first switch unit 1 and a charge storage component C, all of which are connected in series to each other; and a second charging/discharging circuit, which is connected to the battery E2, and comprises a damping component R2, a current storage component L2, a second switch unit 2 and the charge storage component C, all of which are connected in series with each other.
US09214697B2	Lithium secondary battery An incombustible lithium secondary battery, which has excellent battery capacity and high safety, contains a separator provided between a positive electrode and a negative electrode, and a nonaqueous electrolytic solution containing a lithium salt, in which the nonaqueous electrolytic solution employs an ionic liquid as a solvent, and the separator contains an electrically insulating porous inorganic membrane and a substrate. The ionic liquid may contain a bis(fluorosulfonyl)imide anion as an anionic component, and may contain a cation containing a nitrogen atom as a cationic component.
US09214696B2	Degassing method of secondary battery using centrifugal force Disclosed is a method for manufacturing a battery cell including an electrode assembly and electrolyte provided in a battery case made of a laminate sheet having a resin layer and a metal layer, which includes: (a) mounting the electrode assembly in the battery case and sealing the periphery of the battery case except for one end part thereof through thermal fusion; (b) introducing the electrolyte through the unsealed end part and sealing the end via thermal fusion; (c) charging-discharging the battery cell to activate the same; (d) transferring gas generated during activation and excess electrolyte to the foregoing end part of the battery cell by centrifugal force; and (e) removing the gas and excess electrolyte from the end part.
US09214694B2	Assembly for reversible fuel cell A membrane-electrode assembly for use in a reversible fuel cell comprises an ion conductive membrane having first and second surfaces; a first electrocatalyst layer in contact with the first surface of the membrane, such first electrocatalyst layer comprising at least one discrete electrolysis-active area (ELE1i) and at least one discrete energy generation-active area (EG1i). A second electrocatalyst layer is placed in contact with the second surface of the membrane, such second electrocatalyst layer comprising at least one discrete electrolysis-active area (ELE2i) and at least one discrete energy generation-active area (EG2i). Each of the discrete electrolysis-active area(s) (ELE1i) on the first electrocatalyst layer correspond and are aligned with each of the discrete electrolysis-active area(s) (ELE2i) on the second electrocatalyst layer, and each of the discrete energy generation-active area(s) (EG1i) on the first electrocatalyst layer correspond and are aligned with each of the discrete energy generation-active area(s) (EG2i) on the second electrocatalyst layer.
US09214693B2	Solid oxide fuel cell Provided is a solid oxide fuel cell (SOFC), including: a fuel electrode for allowing a fuel gas to be reacted; an air electrode for allowing a gas containing oxygen to be reacted; an electrolyte film provided between the fuel electrode and the air electrode; and a reaction prevention film provided between the air electrode and the electrolyte film. The reaction prevention film includes two layers including one layer of a porous layer having an interface with the electrolyte film; and one layer of a dense layer having an interface with the air electrode. The dense layer has a porosity of 5% or less and the porous layer has a porosity of 5.1 to 60%. The porous layer includes closed pores each having a diameter of 0.1 to 3 μm. The porous layer includes closed pores each including a component (such as Sr) for the air electrode.
US09214692B2	Poly(benzimidazole-co-benzoxazole) and method for preparing the same Provided is poly(benzimidazole-co-benzoxazole) having polybenzimidazole to which benzoxazole units are introduced, as a polymer electrolyte material. The polymer electrolyte material has both high proton conductivity and excellent mechanical properties even when it is obtained by in-situ phosphoric acid doping. The polymer electrolyte material may substitute for the conventional phosphoric acid-doped polybenzimidazole in a polymer electrolyte membrane fuel cell, particularly in a high-temperature polymer electrolyte membrane fuel cell.
US09214690B2	Solid oxide fuel cell device A solid oxide fuel cell device is provided which prevents excessive rising of the temperature inside a fuel cell module during the startup process. In a startup process, control unit controls to cause a transition from a fuel gas reforming reaction process to a POX process, an ATR process, and a SR process, then to a generating process; when the cell stack temperature and reformer temperature in each process satisfy respectively set transition conditions, a transition to the next process takes place; if control unit determines a temperature rise assist state exists, it executes an excess temperature rise suppression control so that during at least the transition to the generating process, the reformer temperature does not exceed a predetermined value.
US09214689B2	Operation control device and operation control method for fuel cell power plant A fuel cell power plant stops anode gas supply to a fuel cell stack 1 by an anode gas supply mechanism 20 when an anode gas pressure in the fuel cell stack 1 reaches an upper limit pressure, and resumes supplying the anode gas by the anode gas supply mechanism 20 when the anode gas pressure in the fuel cell stack 1 lowers to a lower limit pressure. A sensor 52-54 detects if a hydrogen supply amount supplied to the fuel cell stack 1 satisfies a required amount to generate a target generated power, and a controller 51 corrects the lower limit pressure in an increasing direction when the hydrogen supply amount does not satisfy the required amount, thereby suppressing a generated power of the fuel cell stack 1 from reducing even when a flooding takes place in the fuel cell stack 1.
US09214688B2	Fuel cell system A fuel cell system for generating power by supplying anode gas and cathode gas to a fuel cell includes a valve provided in the fuel cell system and to be driven by a stepping motor, a stop-time valve control unit for controlling a valve body of the valve to a predetermined initialization position by controlling the stepping motor when a request to stop the fuel cell system is made, and a valve initializing unit for rotating the stepping motor by a predetermined initialization step number smaller than a maximum step number of the stepping motor so that the valve body of the valve moves toward the initialization position when a request to start the fuel cell system is made.
US09214685B2	Fuel cell system Piping interconnecting a fuel cell and a humidifier is laid with a rising gradient from the end on the humidifier side of the piping toward the end on the fuel cell side of the piping. The piping is first bent vertically downward and then vertically upward, and this forms a water containing trap in the piping. Problems caused by freezing of condensed water occurring in the piping can be avoided.
US09214681B2	Extended duration power supply The present invention concerns a power supply (10) comprising a primary cell (11) adapted to provide a primary cell current. The primary cell (11) comprises an anode, a cathode current collector and an electrolyte, whereby a passivation layer is formed on a surface of the anode as a result of a chemical reaction between the anode and the electrolyte. To ensure that the passivation layer remains essentially intact for the lifetime of the primary cell, the power supply (10) further comprises a current limiter (12) that is configured to prevent the magnitude of the primary cell current exceeding a value that would damage the passivation layer.
US09214675B2	Electrolytic manganese dioxide and method for producing same, and method for producing lithium-manganese complex oxide The invention provides electrolytic a manganese dioxide with a BET specific surface area of 20 to 60 m2/g, and a volume of at least 0.023 cm3/g for pores with pore diameters of 2 to 200 nm. Also provided is a method for producing an electrolytic manganese dioxide including a step of suspending a manganese oxide in a sulfuric acid-manganese sulfate mixed solution to obtain the electrolytic manganese dioxide, wherein a manganese oxide particles are continuously mixed with a sulfuric acid-manganese sulfate mixed solution, for a manganese oxide particle concentration of 5 to 200 mg/L in the sulfuric acid-manganese sulfate mixed solution. Still further provided is a method for producing a lithium-manganese complex oxide, including a step of mixing the electrolytic manganese dioxide with a lithium compound and heat treating the mixture to obtain a lithium-manganese complex oxide.
US09214674B2	Coated active material and lithium solid state battery The problem of the present invention is to provide a coated active material having a soft coating layer and capable of improving a contact area. The present invention solves the above-mentioned problem by providing a coated active material comprising a cathode active material and a coating layer for coating the above-mentioned cathode active material, containing an Li ion conductive oxide, wherein the above-mentioned coating layer further contains lithium carbonate.
US09214669B2	Non-aqueous electrolyte secondary battery A non-aqueous electrolyte secondary battery includes a positive electrode containing active material particles composed of a core section formed of olivine type LiFePO4; an intermediate section that lies on the outer side of the core section and has LiFexPyOz; and a surface section that lies on the outer side of the intermediate section and has LiFeaPbOc; and a negative electrode containing lithium titanate, in which battery the molar concentration ratio of Fe relative to P at the core section is greater than the average of x/y of LiFexPyOz, the average value of a/b of LiFeaPbOc at the surface section of the positive electrode active material particles is smaller than the average of x/y of LiFexPyOz, and the positive electrode active material particles include a region in which x/y of LiFexPyOz at the intermediate section increases continuously or intermittently in the direction from the surface section toward the core section.
US09214667B2	Lithium-ion secondary battery, anode for lithium-ion secondary battery, power tool, electric vehicle and energy storage system A lithium-ion secondary battery allowed to improve cycle characteristics and initial charge-discharge characteristics is provided. The lithium-ion secondary battery includes: a cathode; an anode including an anode active material layer; and an electrolytic solution. The anode active material layer includes an anode active material and an inorganic compound, and the inorganic compound includes one or both of an alkoxysilane compound and a hydrolysate thereof.
US09214662B2	Electrode manufacturing method An electrode manufacturing method includes: a coating process of applying a coating material to a metal foil while the metal foil is fed forward to form a coated foil; and a drying process of drying the coated foil by heating while the coated foil is fed forward to pass through a drying oven of a drying machine placed in line on a feeding path. The drying oven includes at least a first drying chamber which the coated foil first passes through in the drying process and a second drying chamber which the coated foil passes through following the first drying chamber. The first drying chamber has a smaller area in cross section perpendicular to the feed direction along the feeding path than an area of the second drying chamber to provide a smaller volume than a volume of the second drying chamber.
US09214655B2	Power storage device A power storage device includes a plurality of power storage elements (10) lined up along a predetermined arrangement direction; a dividing member (40) that is made of insulating material and arranged between two adjacent power storage elements; a pair of end plates (31) that sandwich the plurality of power storage elements, and apply restraining force thereto, in the arrangement direction; and a metal connecting member (32) that extends in the arrangement direction and is fixed to the pair of end plates. The dividing member includes a retaining portion (42) that is positioned between the power storage elements and the connecting member, and that retains the connecting member.
US09214653B2	Secondary battery comprising terminal insulating members Terminal insulating members 7A, 7B have inner side surfaces of a first support base 71A facing each other, and an engaging recesses 75 extending along a surface of a cover 6 are formed in inner surfaces of both the terminal insulating members. An outer surface along a short side of the cover in a second support base 72A is formed with an engaging recess 76 extending along a cover surface. The engaging recesses 75 and 76 of both the terminal insulating members are arranged to face each other. Further, both the terminal insulating members are also provided with engaging recesses 77 having a substantially circular cross-sectional shape on both side surfaces along a long side of the cover. The configuration can be used for positioning or fixing an accessory loaded into a secondary battery SB. As a result, a part only for loading an external part is unnecessary.
US09214648B2	Light extraction substrate and organic light-emitting device having the same A light extraction substrate which can realize a superior light extraction efficiency when applied to an organic light-emitting device, and an organic light-emitting device having the same. The light extraction substrate includes a base substrate and a matrix layer. One surface of the matrix layer adjoins to the base substrate, and the other surface of the matrix layer adjoins to an organic light-emitting diode. The light extraction substrate also includes a rod array disposed inside the matrix layer. The rod array includes at least one rod which is arranged in a direction normal to the one surface of the matrix layer. The rod array and a cathode of the organic light-emitting diode form an antenna structure which guides light generated from the organic light-emitting diode to be emitted in the normal direction.
US09214645B1	Inverted top emitting device and method for producing same An inverted top emitting device includes an TIO/Ag/ITO substrate, a cathode layer, an electron transport layer, an emissive layer, a hole transport layer, and an anode layer. The TIO/Ag/ITO substrate, the cathode layer, the electron transport layer, the emissive layer, the hole transport layer, and the anode layer are stacked in sequence. The cathode layer is made of cesium carbonate. The inverted top emitting device and its producing method provided by the present invention change the current structure of ITO/Ag/ITO/HTL/EML/ETL/Mg:Ag of the device to ITO/Ag/ITO/Cs2CO3/ETL/EML/HTL/MoO3/Ag. This avoids use of low work function metals, such as magnesium. Thus, even if the encapsulation is not satisfactory, the device is less likely to be oxidized by water and oxygen, providing the device with a longer service life.
US09214644B2	Active matrix dilute source enabled vertical organic light emitting transistor Various embodiments are provided for dilute source enabled vertical organic light emitting transistors. In various embodiments, a display panel includes an array of pixels. In one embodiment, among others, at least one pixel includes a switching transistor and a driving transistor coupled to the switching transistor, where the driving transistor is configured to emit light responsive to activation by the switching transistor. The driving transistor may be a dilute source enabled vertical organic light emitting transistor (DS-VOLET). The switching transistor may include a dilute source enabled vertical-field effect transistor (DS-VFET). In another embodiment, a double dilute source enabled vertical-field effect transistor (DS-VFET) includes a first DS-VFET coupled to a second DS-VFET.
US09214640B2	Flexible display device having flexible display substrate with bending area between display area and peripheral circuit area A flexible display device and a method of manufacturing the same are provided. The flexible display device comprises a first flexible substrate including a display area including an organic light emitting layer, and a peripheral circuit area, and a second flexible substrate coming in contact with the first flexible substrate and including a pattern for facilitating bending thereof, wherein the second flexible substrate has a certain shape according to the pattern, and the first flexible substrate has a shape corresponding to the certain shape. Various embodiments of the present invention provide a flexible display device capable of realizing a narrow bezel-type or bezel-free display device and simultaneously realizing improved types of design, facilitating bending of a bezel area so as to realize a narrow bezel-type or bezel-free display device, and minimizing damage to an area to be bent.
US09214639B2	Conductive polymer on a textured or plastic substrate A conducting material can include a fibrous substrate and a conductive polymer coating on a surface of the fibrous substrate.
US09214637B2	Chalcogen-containing aromatic compound, organic semiconductor material, and organic electronic device Provided are a novel chalcogen-containing aromatic compound and an organic electronic device using the compound. This compound is a chalcogen-containing aromatic compound represented by the formula (1). Among the organic electronic devices each using this chalcogen-containing aromatic compound are an organic EL device, an organic TFT device, a photovoltaic device, and the like. In the formula (1): X represents oxygen, sulfur, or selenium; A represents an alkyl group, a cycloalkyl group, an alkenyl group, an alkynyl group, an aromatic hydrocarbon group, an aromatic heterocyclic group, or an amino group; and n's each independently represent an integer of 0 to 2, provided that a sum of two n's is 1 to 4.
US09214635B2	Anthradithiophene-based semiconducting polymers and methods thereof Compositions, synthesis and applications for benzene, furan, thiophene, selenophene, pyrole, pyran, pyridine, oxazole, thiazole and imidazole derivatized anthra[2,3-b:6,7-b′]dithiophene (ADT) based polymers, namely, poly{5,11-bis(5-(2-ethylhexyl)thiophen-2-yl)anthra[2,3-b:6,7-b′]dithiophene-2,8-diyl-alt-2-ethyl-1-(thieno[3,4-b]thiophen-2-yl)hexan-1-one-4,6-diyl}, poly{5,11-bis(5-(2-ethylhexyl)furan-2-yl)anthra[2,3-b:6,7-b′]dithiophene-2,8-diyl-alt-2-ethyl-1-(thieno[3,4-b]thiophen-2-yl)hexan-1-one-4,6-diyl and poly{5,11-bis(5-(2-ethylhexyl)selenophen-2-yl)anthra[2,3-b:6,7-b′]dithiophene-2,8-diyl-alt-2-ethyl-1-(thieno[3,4-b]thiophen-2-yl)hexan-1-one-4,6-diyl} are disclosed. Further, an organic solar cell constructed of a derivatized anthra[2,3-b:6,7-b′]dithiophene (ADT) based polymer is discussed.
US09214630B2	Method of making a multicomponent film Described herein is a method and precursor composition for depositing a multicomponent film. In one embodiment, the method and composition described herein is used to deposit a germanium-containing film such as Germanium Tellurium, Antimony Germanium, and Germanium Antimony Tellurium (GST) films via an atomic layer deposition (ALD) and/or other germanium, tellurium and selenium based metal compounds for phase change memory and photovoltaic devices. In this or other embodiments, the Ge precursor used comprises trichlorogermane.
US09214629B2	Resistive memory and method for fabricating the same A resistive memory having a leakage inhibiting characteristic and a method for fabricating the same, which can suppress a sneak current in a large scaled crossing array of a RRAM. A memory cell forming the resistive memory comprises a lower electrode, a first semiconductor-type oxide layer, a resistive material layer, a second semiconductor-type oxide layer and an upper electrode which are sequentially stacked. Each of the semiconductor-type oxide layers may be a semiconductor-type metal oxide or a semiconductor-type non-metal oxide. The sneak current may be effectively reduced by means of a Schottky barrier formed between the semiconductor-type oxide layer and the metal electrode, the fabrication process is easy to be implemented, and a high device integration degree can be achieved.
US09214627B2	Memory cell arrays Some embodiments include memory cells. The memory cells may have a first electrode, and a trench-shaped programmable material structure over the first electrode. The trench-shape defines an opening. The programmable material may be configured to reversibly retain a conductive bridge. The memory cell may have an ion source material directly against the programmable material, and may have a second electrode within the opening defined by the trench-shaped programmable material. Some embodiments include arrays of memory cells. The arrays may have first electrically conductive lines, and trench-shaped programmable material structures over the first lines. The trench-shaped structures may define openings within them. Ion source material may be directly against the programmable material, and second electrically conductive lines may be over the ion source material and within the openings defined by the trench-shaped structures.
US09214625B2	Thermally assisted MRAM with increased breakdown voltage using a double tunnel barrier A mechanism is provided for a thermally assisted magnetoresistive random access memory device (TAS-MRAM). A non-magnetic heating structure is formed of a barrier seed layer disposed on a buffer layer. A non-magnetic tunnel barrier is disposed on the barrier seed layer. A barrier cap layer is disposed on the non-magnetic tunnel barrier. A top buffer layer is disposed on the barrier cap layer. An antiferromagnetic layer is disposed on the top buffer layer of the non-magnetic heating structure. A magnetic tunnel junction is disposed on the antiferromagnetic layer. The magnetic tunnel junction includes a ferromagnetic storage layer disposed on the antiferromagnetic layer, a non-magnetic active tunnel barrier disposed on the ferromagnetic storage layer, and a ferromagnetic sense layer disposed on the non-magnetic active tunnel barrier.
US09214624B2	Amorphous spacerlattice spacer for perpendicular MTJs A perpendicular magnetic tunnel junction (MTJ) apparatus includes a tunnel magnetoresistance (TMR) enhancement buffer layer deposited between the tunnel barrier layer and the reference layers An amorphous alloy spacer is deposited between the TMR enhancement buffer layer and the reference layers to enhance TMR The amorphous alloy spacer blocks template effects of face centered cubic (fcc) oriented pinned layers and provides strong coupling between the pinned layers and the TMR enhancement buffer layer to ensure full perpendicular magnetization.
US09214621B2	Piezoelectric multilayer component and method for forming an external electrode in a piezoelectric multilayer component A piezoelectric multilayer component is specified. At least one external electrode is fixed to a stack of piezoelectric layers and electrode layers arranged therebetween. At least one region of the external electrode projects beyond the stack and the external electrode is at least partly pressure-deformed in said region. Furthermore, a method for forming an external electrode in a piezoelectric multilayer component is specified.
US09214620B2	Piezoelectric actuator with outer electrode A piezoelectric actuator of a multilayer design has a stack of piezoelectric layers and electrode layers arranged in between. The electrode layers are contacted by way of two outer electrodes, which have a multiplicity of wires. The outer electrodes are fastened in fastening regions on first side faces of the stack and are led around the edge of the stack that is closest to the respective fastening region.
US09214616B2	Solid state light sources based on thermally conductive luminescent elements containing interconnects Solid state light sources based on LEDs mounted on or within thermally conductive luminescent elements provide both convective and radiative cooling. Low cost self-cooling solid state light sources can integrate the electrical interconnect of the LEDs and other semiconductor devices. The thermally conductive luminescent element can completely or partially eliminate the need for any additional heatsinking means by efficiently transferring and spreading out the heat generated in LED and luminescent element itself over an area sufficiently large enough such that convective and radiative means can be used to cool the device.
US09214610B2	Method and apparatus for fabricating phosphor-coated LED dies A lighting apparatus includes a first doped semiconductor layer, a light-emitting layer disposed over the first doped semiconductor layer, a second doped semiconductor layer disposed over the light-emitting layer, a first conductive terminal, a second conductive terminal, and a photo-conversion layer. The second doped semiconductor layer has a different type of conductivity than the first doped semiconductor layer. The first conductive terminal and the second conductive terminal each are disposed below the first doped semiconductor layer. The photo-conversion layer is disposed over the second doped semiconductor layer and on side surfaces of the first and second doped semiconductor layers and the light-emitting layer. A bottommost surface of the photo-conversion layer is located closer to the second doped semiconductor layer than bottom surfaces of the first and second conductive terminals.
US09214606B2	Method of manufacturing light-emitting diode package A method of manufacturing a light-emitting diode package is illustrated. A light-emitting diode chip is manufactured. A material layer is formed on side surfaces and a rear surface of the light-emitting diode chip. The material layer is then oxidized to convert the material layer into an oxidized layer to form a reflective layer on the side surfaces and the rear surface of the light-emitting diode chip. The light-emitting diode chip is packaged.
US09214605B2	Nitride semiconductor light emitting device A nitride semiconductor light emitting device includes a laminate, first and second electrodes, a conductive layer, and a phosphor layer. The laminate includes a first layer including a first electroconductive-type layer, a second layer including a second electroconductive-type layer, a light emitting layer between the first and second layers, and a nitride semiconductor. The laminate has a recessed portion extending from the first layer to the second layer in a central portion or an outer peripheral portion. The first electrode arranged on the first layer reflects light emitted from the light emitting layer. The second electrode is surrounded by the light emitting layer or on the periphery thereof and connected to a bottom surface of the recessed portion. The conductive layer is arranged on a surface of the second layer at a side opposite to the light emitting layer. The phosphor layer overlies the second layer and the conductive layer.
US09214600B2	Optoelectronic semiconductor chip An optoelectronic semiconductor chip includes a number active regions that are arranged at a distance from each other and a substrate that is arranged on an underside of the active regions. One of the active regions has a main extension direction. The active region has a core region that is formed using a first semiconductor material. The active region has an active layer that covers the core region at least in directions perpendicular to the main extension direction of the active region. The active region has a cover layer that is formed using a second semiconductor material and covers the active layer at least in directions perpendicular to the main extension direction of the active region.
US09214592B2	Method of making interposer package for CMOS image sensor An image sensor package and method of manufacture that includes a crystalline handler with conductive elements extending therethrough, an image sensor chip disposed in a cavity of the handler, and a transparent substrate disposed over the cavity and bonded to both the handler and image sensor chip. The transparent substrate includes conductive traces that electrically connect the sensor chip's contact pads to the handler's conductive elements, so that off-chip signaling is provided by the substrate's conductive traces and the handler's conductive elements.
US09214583B2	Method to build transparent polarizing solar cell The present disclosure provides a means to build a solar cell that is transparent to and polarizes visible light, and to transfer the energy thus generated to electrical power wires.
US09214580B2	Multi-junction solar cell with dilute nitride sub-cell having graded doping A lattice-matched solar cell having a dilute nitride-based sub-cell has exponential doping to thereby control current-carrying capacity of the solar cell. Specifically a solar cell with at least one dilute nitride sub-cell that has a variably doped base or emitter is disclosed. In one embodiment, a lattice matched multi junction solar cell has an upper sub-cell, a middle sub-cell and a lower dilute nitride sub-cell, the lower dilute nitride sub-cell having doping in the base and/or the emitter that is at least partially exponentially doped so as to improve its solar cell performance characteristics. In construction, the dilute nitride sub-cell may have the lowest bandgap and be lattice matched to a substrate, the middle cell typically has a higher bandgap than the dilute nitride sub-cell while it is lattice matched to the dilute nitride sub-cell. The upper sub-cell typically has the highest bandgap and is lattice matched to the adjacent sub-cell. In further embodiments, a multi junction solar cell according to the invention may comprise four, five or more sub-cells in which the one or more sub-cells may each comprise exponentially doped dilute nitride alloys.
US09214567B2	Nanowire compatible E-fuse An e-fuse is provided in one area of a semiconductor substrate. The E-fuse includes a vertical stack of from, bottom to top, base metal semiconductor alloy portion, a first metal semiconductor alloy portion, a second metal semiconductor portion, a third metal semiconductor alloy portion and a fourth metal semiconductor alloy portion, wherein the first metal semiconductor alloy portion and the third metal semiconductor portion have outer edges that are vertically offset and do not extend beyond vertical edges of the second metal semiconductor alloy portion and the fourth metal semiconductor alloy portion.
US09214566B2	Semiconductor device A semiconductor device in which release of oxygen from side surfaces of an oxide semiconductor film including c-axis aligned crystal parts can be prevented is provided. The semiconductor device includes a first oxide semiconductor film, a second oxide semiconductor film including c-axis aligned crystal parts, and an oxide film including c-axis aligned crystal parts. In the semiconductor device, the first oxide semiconductor film, the second oxide semiconductor film, and the oxide film are each formed using a IGZO film, where the second oxide semiconductor film has a higher indium content than the first oxide semiconductor film, the first oxide semiconductor film has a higher indium content than the oxide film, the oxide film has a higher gallium content than the first oxide semiconductor film, and the first oxide semiconductor film has a higher gallium content than the second oxide semiconductor film.
US09214565B2	Semiconductor device and method for manufacturing semiconductor device Provided is a miniaturized transistor having high electrical characteristics. The transistor includes a source electrode layer in contact with one side surface of the oxide semiconductor layer in the channel-length direction and a drain electrode layer in contact with the other side surface thereof. The transistor further includes a gate electrode layer in a region overlapping with a channel formation region with a gate insulating layer provided therebetween and a conductive layer having a function as part of the gate electrode layer in a region overlapping with the source electrode layer or the drain electrode layer with the gate insulating layer provided therebetween and in contact with a side surface of the gate electrode layer. With such a structure, an Lov region is formed with a scaled-down channel length maintained.
US09214564B2	Thin film transistor and organic light emitting diode display having minimal overlap of gate electrode by source and drain electrodes A thin film transistor (TFT) includes a gate electrode disposed on a substrate. An oxide semiconductor layer is disposed on the gate electrode. An insulation layer is disposed on the oxide semiconductor layer. The insulation layer includes a first contact hole that exposes a first part of the oxide semiconductor layer corresponding to a first end of the gate electrode and a second contact hole that exposes a second part of the oxide semiconductor layer corresponding to an opposite end of the gate electrode. A source electrode is disposed on the insulation layer and contacts the first part of the oxide semiconductor layer through the first contact hole. A drain electrode is disposed on the insulation layer and contacts the second part of the oxide semiconductor layer through the second contact hole.
US09214562B2	Method of manufacturing field-effect transistor, field-effect display device and electromagnetic wave detector There is provided a method of manufacturing a field-effect transistor, in which on a electroconductive layer including a source electrode, a drain electrode and pixel electrode formed by a conductive layer-forming, an inorganic insulating layer containing an inorganic material as a main component is formed so as to cover the electroconductive layer and an oxide semiconductive layer, and after a photoresist film is formed on the inorganic insulating layer and is exposed in a pattern shape, a resist pattern is formed by being developed using a developer in development, and by removing the area exposed from the resist pattern in the inorganic insulating layer by using the developer as an etching liquid, a part of the electroconductive layer is exposed, thereby forming a contact hole; a field-effect transistor, a display device and an electromagnetic wave detector.
US09214556B2	Self-aligned dual-metal silicide and germanide formation A method includes growing an epitaxy semiconductor region at a major surface of a wafer. The epitaxy semiconductor region has an upward facing facet facing upwardly and a downward facing facet facing downwardly. The method further includes forming a first metal silicide layer contacting the upward facing facet, and forming a second metal silicide layer contacting the downward facing facet. The first metal silicide layer and the second metal silicide layer comprise different metals.
US09214553B2	Methods of forming stressed channel regions for a FinFET semiconductor device and the resulting device One method disclosed includes, among other things, forming an initial fin structure comprised of portions of a substrate, a first epi semiconductor material and a second epi semiconductor material, forming a layer of insulating material so as to over-fill the trenches that define the fin, recessing a layer of insulating material such that a portion, but not all, of the second epi semiconductor portion of the final fin structure is exposed, forming a gate structure around the final fin structure, further recessing the layer of insulating material such that the first epi semiconductor material is exposed, removing the first epi semiconductor material to thereby define an under-fin cavity and substantially filling the under-fin cavity with a stressed material.
US09214550B2	Quasi-vertical structure having a sidewall implantation for high voltage MOS device A semiconductor device includes a buried layer in a substrate, the buried layer having a first dopant type. The semiconductor device further includes a first layer over the buried layer, the first layer having the first dopant type. The semiconductor device further includes at least one first well in the first layer, the at least one first well having a second dopant type. The semiconductor device further includes an implantation region in a sidewall of the first layer, the implantation region having the second dopant type, wherein the implantation region is below the at least one first well. The semiconductor device further includes a metal electrode extending from the buried layer to a drain contact, wherein the metal electrode is insulated from the first layer and the at least one first well by an insulation layer.
US09214548B1	High voltage integrated devices, methods of fabricating the same, electronic devices including the same, and electronic systems including the same A high voltage integrated device includes a drift region in a substrate, a source region in the substrate and spaced apart from the drift region, a drain region in the drift region, a trench insulation layer in the drift region between the source region and the drain region, and a gate insulation layer and a gate electrode sequentially stacked on the substrate between the source region and the drift region and extending onto the trench insulation layers. The upper sidewall of the first trench insulation layer has a first angle to the bottom surface thereof and the lower sidewall of the first trench insulation layer has a second angle, which is smaller than the first angle, to the bottom surface thereof.
US09214546B2	Silicon carbide switching device with novel overvoltage detection element for overvoltage control A semiconductor device includes a silicon carbide semiconductor substrate, a silicon carbide layer, a switching element section, and an overvoltage detection element section whose area is smaller than that of the switching element section. The switching element section includes a first electrode pad, a first terminal section surrounding the first electrode pad and provided in the silicon carbide layer, and a first insulating film covering the first terminal section. The overvoltage detection element section includes a second electrode pad, a second terminal section surrounding the second electrode pad and provided in the silicon carbide layer, and a second insulating film covering the second terminal section and being in contact with the silicon carbide layer. A breakdown field strength of at least part of a portion of the second insulating film being in contact with the silicon carbide layer is lower than that of the first insulating film.
US09214545B2	Dual gate oxide trench MOSFET with channel stop trench A semiconductor device has a plurality of gate electrodes over a gate insulator layer formed in active trenches located in an active region of a semiconductor substrate. A first gate runner is formed in the semiconductor substrate and electrically connected to the gate electrodes. The first gate runner abuts and surrounds the active region. A second gate runner is connected to the first gate runner to make contact to a gate metal. A dielectric filled trench surrounds the first and second gate runners and the active region and a highly doped channel stop region is formed under the dielectric filled trench.
US09214544B2	Source and body contact structure for trench-DMOS devices using polysilicon A semiconductor device includes a gate electrode, a top source region disposed next to the gate electrode, a drain region disposed below the bottom of the gate electrode, a oxide disposed on top of the source region and the gate electrode, and a doped polysilicon spacer disposed along a sidewall of the source region and a sidewall of the oxide. Methods for manufacturing such device are also disclosed. It is emphasized that this abstract is provided to comply with the rules requiring an abstract that will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims.
US09214542B2	Semiconductor device with integrated electrostatic discharge (ESD) clamp A device includes a substrate, a body region in the substrate and having a first conductivity type, source and drain regions in the substrate, having a second conductivity type, and spaced from one another to define a conduction path that passes through the body region, a doped isolating region in the substrate, having the second conductivity type, and configured to surround a device area in which the conduction path is disposed, an isolation contact region in the substrate, having the second conductivity type, and electrically coupled to the doped isolating region to define a collector region of a bipolar transistor, and first and second contact regions within the body region, having the first and second conductivity types, respectively, and configured to define a base contact region and an emitter region of the bipolar transistor, respectively.
US09214541B2	Self-aligned contact for replacement gate devices A conductive top surface of a replacement gate stack is recessed relative to a top surface of a planarization dielectric layer by at least one etch. A dielectric capping layer is deposited over the planarization dielectric layer and the top surface of the replacement gate stack so that the top surface of a portion of the dielectric capping layer over the replacement gate stack is vertically recessed relative to another portion of the dielectric layer above the planarization dielectric layer. The vertical offset of the dielectric capping layer can be employed in conjunction with selective via etch processes to form a self-aligned contact structure.
US09214539B2	Gallium nitride transistor with a hybrid aluminum oxide layer as a gate dielectric Some embodiments of the present disclosure relates to a hybrid gate dielectric layer that has good interface and bulk dielectric properties. Surface traps can degrade device performance and cause large threshold voltage shifts in III-N HEMTs. This disclosure uses a hybrid ALD (atomic layer deposited)-oxide layer which is a combination of H2O-based and O3/O2-based oxide layers that provide both good interface and good bulk dielectric properties to the III-N device. The H2O-based oxide layer provides good interface with the III-N surface, whereas the O3/O2-based oxide layer provides good bulk properties.
US09214538B2	High performance multigate transistor A novel semiconductor power transistor is presented. The semiconductor structure is simple and is based on a FET structure, where multiple channels and multiple gate regions are formed in order to achieve a lower specific on-resistance, and a higher control on the transport properties of the device. No dielectric layer is present between gate electrodes and device channels, decreasing the parasitic capacitance associated with the gate terminal. The fabrication of the device does not require Silicon On Insulator techniques and it is not limited to Silicon semiconductor materials. It can be fabricated as an enhancement or depletion device with much more control on the threshold voltage of the device, and with superior RF performance.
US09214536B2	Lateral insulated gate bipolar transistor A lateral insulated gate bipolar transistor includes a semiconductor substrate including a drift layer, a collector region, a channel layer, an emitter region, a gate insulating layer, a gate electrode, a collector electrode, an emitter electrode, and a barrier layer. The barrier layer is disposed along either side of the collector region and is located to a depth deeper than a bottom of the channel layer. The barrier layer has an impurity concentration that is higher than an impurity concentration of the drift layer. The barrier layer has a first end close to the collector region and a second end far from the collector region. The first end is located between the channel layer and the collector region, and the second end is located on the bottom of the channel layer.
US09214535B2	Semiconductor device A collector layer of a first conductivity type is provided in the IGBT region and the boundary region and functions as a collector of the IGBT in the IGBT region. A cathode layer of a second conductivity type is provided in the diode region apart from the collector layer and functions as a cathode of the diode. A drift layer of the second conductivity type is provided in the IGBT region, the boundary region, and the diode region, the drift layer being provided on sides of the collector layer and the cathode layer opposite the first electrode. A diffusion layer of the first conductivity type is provided in the boundary region on a side of the drift layer opposite the first electrode.
US09214530B2	Methods of forming semiconductor devices including a stressor in a recess Semiconductor devices including a stressor in a recess and methods of forming the semiconductor devices are provided. The methods may include forming a fast etching region comprising phosphorous in an active region and forming a first trench in the active region by recessing the fast etching region. The methods may also include forming a second trench in the active region by enlarging the first trench using a directional etch process and forming a stressor in the second trench. The second trench may include a notched portion of the active region.
US09214529B2	Fin Fet device with independent control gate A FinFET device with an independent control gate, including: a silicon-on-insulator substrate; a non-planar multi-gate transistor disposed on the silicon-on-insulator substrate, the transistor comprising a conducting channel wrapped around a thin silicon fin; a source/drain extension region; an independently addressable control gate that is self-aligned to the fin and does not extend beyond the source/drain extension region, the control gate comprising: a thin layer of silicon nitride; and a plurality of spacers.
US09214528B2	Method to fabricate self-aligned isolation in gallium nitride devices and integrated circuits A method for forming an enhancement mode GaN HFET device with an isolation area that is self-aligned to a contact opening or metal mask window. Advantageously, the method does not require a dedicated isolation mask and the associated process steps, thus reducing manufacturing costs. The method includes providing an EPI structure including a substrate, a buffer layer a GaN layer and a barrier layer. A dielectric layer is formed over the barrier layer and openings are formed in the dielectric layer for device contact openings and an isolation contact opening. A metal layer is then formed over the dielectric layer and a photoresist film is deposited above each of the device contact openings. The metal layer is then etched to form a metal mask window above the isolation contact opening and the barrier and GaN layer are etched at the portion that is exposed by the isolation contact opening in the dielectric layer.
US09214527B2	Methods of forming diodes Some embodiments include methods of forming diodes in which a first electrode is formed to have a pedestal extending upwardly from a base. At least one layer is deposited along an undulating topography that extends across the pedestal and base, and a second electrode is formed over the least one layer. The first electrode, at least one layer, and second electrode together form a structure that conducts current between the first and second electrodes when voltage of one polarity is applied to the structure, and that inhibits current flow between the first and second electrodes when voltage having a polarity opposite to said one polarity is applied to the structure. Some embodiments include diodes having a first electrode that contains two or more projections extending upwardly from a base, having at least one layer over the first electrode, and having a second electrode over the at least one layer.
US09214526B2	Semiconductor device A semiconductor device includes: a drift layer having a first conductivity type; a body layer having a second conductivity type; a first semiconductor region having the first conductivity type; a gate insulation film; a trench gate electrode; a first main electrode; a second semiconductor region having the second conductivity type; and a conductor region. The first main electrode is electrically connected with the body layer and the first semiconductor region. The second semiconductor region is disposed on a bottom part of the gate trench, and is surrounded by the drift layer. The conductor region is configured to electrically connect the first main electrode with the second semiconductor region and is configured to equalize, when the semiconductor device is in an off-state, a potential of the second semiconductor region and a potential of the first main electrode.
US09214521B2	Reverse conducting IGBT A semiconductor device includes a first emitter region of a first conductivity type, a second emitter region of a second conductivity type complementary to the first type, a drift region of the second conductivity type, and a first electrode. The first and second emitter regions are arranged between the drift region and first electrode and each connected to the first electrode. A device cell of a cell region includes a body region of the first conductivity type adjoining the drift region, a source region of the second conductivity type adjoining the body region, and a gate electrode adjacent the body region and dielectrically insulated from the body region by a gate dielectric. A second electrode is electrically connected to the source and body regions. A parasitic region of the first conductivity type is disposed outside the cell region and includes at least one section with charge carrier lifetime reduction means.
US09214519B2	In2O3—SnO2—ZnO sputtering target A sputtering target including indium (In), tin (Sn) and zinc (Zn) and an oxide including one or more elements X selected from the following group X, the atomic ratio of the elements satisfying the following formulas (1) to (4): Group X: Mg, Si, Al, Sc, Ti, Y, Zr, Hf, Ta, La, Nd, Sm 0.10≦In/(In+Sn+Zn)≦0.85 (1) 0.01≦Sn/(In+Sn+Zn)≦0.40 (2) 0.10≦Zn/(In+Sn+Zn)≦0.70 (3) 0.70≦In/(In+X)≦0.99 (4).
US09214516B2	Field effect silicon carbide transistor In a SiC-MOSFET power device for which a SiC substrate is used, a laminated insulating film having a charge-trapping characteristic is employed as a gate insulating film of the SiC-DiMOSFET, and charges are injected into the laminated insulating film, thereby suppressing a change in the gate threshold voltage.
US09214515B2	Method for making a semiconductor structure with a buried ground plane The invention relates to a method for making a semiconducting structure, including: a) forming, on the surface of a semiconductor substrate (2), called the final substrate, a semiconducting layer (4), doped with elements from columns III and V of the Periodic Table so as to form a ground plane, b) forming a dielectric layer (3), c) then assembling, by direct adhesion of the source substrate, on the final substrate (2), the layer (4) forming the ground plane between the final substrate and the source substrate, the dielectric layer being between the source substrate and the ground plane, d) then thinning the source substrate, leaving, on the surface of the semiconductor structure, a film (20) made from a semiconducting material.
US09214514B2	Mechanisms for forming semiconductor device having stable dislocation profile Embodiments that relate to mechanisms for providing a stable dislocation profile are provided. A semiconductor substrate having a gate stack is provided. An opening is formed adjacent to a side of the gate stack. A first part of an epitaxial growth structure is formed in the opening. A second part of the epitaxial growth structure is formed in the opening. The first part and the second part of the epitaxial growth structure are formed along different directions.
US09214513B2	Fin structure and method for forming the same According to an exemplary embodiment, a method of forming a fin structure is provided. The method includes the following operations: etching a first dielectric layer to form at least one recess and a first core portion of a fin core; form an oxide layer as a shallow trench isolation layer in the recess; etching back the oxide layer to expose a portion of the fin core; and forming a fin shell to cover a sidewall of the exposed portion of the fin core.
US09214510B2	OLED lighting device with short tolerant structure A first device that may include a short tolerant structure, and methods for fabricating embodiments of the first device, are provided. A first device may include a substrate and a plurality of OLED circuit elements disposed on the substrate. Each OLED circuit element may include a fuse that is adapted to open an electrical connection in response to an electrical short in the pixel. Each OLED circuit element may comprise a pixel that may include a first electrode, a second electrode, and an organic electroluminescent (EL) material disposed between the first and the second electrodes. Each of the OLED circuit elements may not be electrically connected in series with any other of the OLED circuit elements.
US09214509B2	Display device A display device includes a pixel unit including a plurality of pixels coupled to a plurality of control lines and to a plurality of power lines to commonly receive same control signals and power source, a plurality of inlet pads positioned outside the pixel unit, the plurality of inlet pads being configured to apply the power source to the plurality of power lines, a pad bar electrically coupling the plurality of inlet pads, and a plurality of coupling patterns contacting end portions of the plurality of power lines and corresponding end portions of the pad bar, the plurality of coupling patterns electrically connecting the plurality of power lines and the pad bar, and one or more of the end portions of the pad bar and the ends portions of the plurality of power lines have different contact areas with the plurality of coupling patterns.
US09214506B2	Pixel unit driving circuit, method for driving pixel unit driving circuit and display device A pixel unit driving circuit provides a method for driving a pixel unit for operating a display device. The circuit comprises four TFT transistors and two capacitors. The display process is divided into three processes, which are a pre-charging phase, a compensation phase and a display phase. As compared with the conventional pixel structure, the nonuniformity and the shift of the threshold voltage of the depleted TFT or the enhanced TFT driving transistor, and the nonuniformity of the OLED voltage may be effectively compensated.
US09214502B2	Photodetector and up-conversion device with gain Embodiments of the invention are directed to IR photodetectors with gain resulting from the positioning of a charge multiplication layer (CML) between the cathode and the IR sensitizing layer of the photodetector, where accumulating charge at the CML reduces the energy difference between the cathode and the CML to promote injection of electrons that result in gain for an electron only device. Other embodiments of the invention are directed to inclusion of the IR photodetectors with gain into an IR-to-visible up-conversion device that can be used in night vision and other applications.
US09214500B2	Pixel structure of electroluminescent display panel A pixel structure of an electroluminescent display panel includes display pixel units. Each display pixel unit is composed of one first sub-pixel, one second sub-pixel, and one third sub-pixel. Each first sub-pixel is disposed adjacent to another first sub-pixel along a column direction to form a first pixel unit with a first frame. Each second sub-pixel is disposed adjacent to another second sub-pixel along the column direction to form a second pixel unit with a second frame. Each third sub-pixel is disposed adjacent to another third sub-pixel along the column direction to form a third pixel unit with a third frame. Each first, second, and third pixel units respectively have an identical first length along the column direction. Each first pixel unit and one adjacent first pixel unit disposed in a different row are shifted relatively along the row direction by the first length.
US09214498B2	Organic light emitting display device and driving method of the same An organic light emitting display device comprises: a lower substrate; a underlying wire formed on the lower substrate; and red, green, and blue subpixels each comprising a transistor section formed on the lower substrate and an organic light emitting diode, wherein the white subpixel comprises a first electrode which is non-overlapped with the underlying wire and is spaced apart from the underlying wire.
US09214495B1	Memory cell structure and formation method thereof A memory cell structure is provided. A first doping region is formed in a substrate. A second doping region is formed in the substrate. A first gate is formed on the substrate. The first and second doping regions and the first gate constitute a first transistor. A first word line is electrically connected to the first gate. The first word line firstly extends along a first direction and then along a second direction which is different from the first direction. A resistive layer is electrically connected to the first doping region. A conductive layer comprises a first source line and a bit line. The first source line is electrically connected to the second doping region, and the bit line is electrically connected to the resistive layer. The first and second doping regions extend along a third direction which is different from the first and second directions.
US09214493B2	Light emitting device It is an object of the invention to provide a light emitting device in which burden on a light emitting element having low luminous efficiency is relieved, and the deterioration of a light emitting element, the reduction in color reproduction due to the deteriorated light emitting element, and increase in electric power consumption can be suppressed. A light emitting device according to the invention has light emitting elements each of which emits one of colors corresponding to three primary colors. Further, one feature of the light emitting device according to the invention has a light emitting element which emits a neutral color. The light emitting device according to the invention has a structure in which a plurality of pixels having light emitting elements each of which emits one of colors corresponding to three primary colors, and a light emitting element which emits a neutral color as one group, are arranged.
US09214492B2	Multispectral sensor The present invention relates to a color and non-visible light e.g. IR sensor, namely a multispectral sensor which can be used in a camera such as a TOF camera for depth measurement, reflectance measurement and color measurement, and for generation of 3D image data or 3D images as well as the camera itself and methods of operating the same.
US09214484B2	Image sensor packages An image sensor package may include: a package substrate including a chip attachment area on an upper surface thereof, a pad area having a plurality of pads around the chip attachment area, and a holder attachment area at an outside of the pad area, wherein an upper surface of the holder attachment area is at a lower level than an upper surface of the pad area; an image sensor chip mounted on the chip attachment area of the package substrate; a transparent member above the package substrate and configured to cover the image sensor chip; and a holder on the holder attachment area of the package substrate and configured to fix the transparent member.
US09214480B2	Display device and method of manufacturing the same A display device and a method of manufacturing the same are disclosed, in which a sensing electrode for sensing a touch of a user is built in a display panel, whereby a separate touch screen is not required on an upper surface of the display panel unlike the related art and thus thickness and manufacturing cost are reduced.
US09214476B1	Pixel structure A pixel structure includes a first conductive layer, a semiconductor layer, an insulating layer, a second conductive layer, a passivation layer, and a first electrode layer. The first conductive layer includes a scan line and a bottom electrode. The semiconductor layer includes a first semiconductor pattern having a first source region, a first drain region, and a first channel region. The insulating layer is disposed on the semiconductor layer. The second conductive layer is disposed on the insulating layer and includes a top electrode, a first gate, a first source, a first drain, and a data line connected with the first source. The bottom electrode and the top electrode overlap to form a capacitor. The passivation layer covers the first and second conductive layers and the semiconductor layer. The first electrode layer is disposed on the passivation layer and provides electrical connection to different layers.
US09214471B2	Memory architecture of 3D array with diode in memory string A 3D memory device includes a plurality of ridge-shaped stacks, in the form of multiple strips of conductive material separated by insulating material, arranged as strings which can be coupled through decoding circuits to sense amplifiers. Diodes are connected to the bit line structures at either the string select of common source select ends of the strings. The strips of conductive material have side surfaces on the sides of the ridge-shaped stacks. A plurality of conductive lines arranged as word lines which can be coupled to row decoders, extends orthogonally over the plurality of ridge-shaped stacks. Memory elements lie in a multi-layer array of interface regions at cross-points between side surfaces of the conductive strips on the stacks and the conductive lines.
US09214470B2	Non-volatile memory device with vertical memory cells and method for fabricating the same A non-volatile memory device includes a plurality of gate electrodes stacked over a semiconductor substrate and stretched in a first direction along the semiconductor substrate and a plurality of junction layers having a first region protruding from the semiconductor substrate and crossing the gate electrodes and a second region formed between the gate electrodes.
US09214463B2	Methods of forming metal silicide regions on a semiconductor device An integrated circuit device includes a PMOS transistor and an NMOS transistor. The PMO transistor includes a gate electrode, at least one source/drain region, a first sidewall spacer positioned adjacent the gate electrode of the PMOS transistor, and a multi-part second sidewall spacer positioned adjacent the first sidewall spacer of the PMOS transistor, wherein the multi-part second sidewall spacer includes an upper spacer and a lower spacer. The NMOS transistor includes a gate electrode, at least one source/drain region, a first sidewall spacer positioned adjacent the gate electrode of the NMOS transistor, and a single second sidewall spacer positioned adjacent the first sidewall spacer of the NMOS transistor. A metal silicide region is positioned on each of the gate electrodes and on each of the at least one source/drain regions of the PMOS and the NMOS transistors.
US09214457B2	Method of integrating high voltage devices The present invention is directed to a method for forming multiple active components, such as bipolar transistors, MOSFETs, diodes, etc., on a semiconductor substrate so that active components with higher operation voltage may be formed on a common substrate with a lower operation voltage device and incorporating the existing proven process flow of making the lower operation voltage active components. The present invention is further directed to a method for forming a device of increasing operation voltage over an existing device of same functionality by adding a few steps in the early manufacturing process of the existing device therefore without drastically affecting the device performance.
US09214455B2	Stub minimization with terminal grids offset from center of package A microelectronic package includes a microelectronic element having memory storage array function overlying a first surface of a substrate, the microelectronic element having a plurality of contacts aligned with an aperture in the substrate. First terminals which are configured to carry all address signals transferred to the package can be exposed within a first region of a second substrate surface, the first region disposed between the aperture and a peripheral edge of the substrate. The first terminals may be configured to carry all command signals, bank address signals and command signals transferred to the package, the command signals being write enable, row address strobe, and column address strobe.
US09214453B2	Optical device and method for manufacturing same The present invention relates to an optical device and a method for manufacturing the same. The technical object of the invention is to realize a surface emitting body which allows heat generated from a light-emitting chip to be easily dissipated, eliminates the need for an additional wiring layer, and allows a singular light emitting chips or a plurality of light emitting chips to be arranged in series, in parallel, or in series-parallel. The present invention discloses an optical device comprising: a substrate; a plurality of light emitting chips disposed on the substrate; a plurality of conductive wires which electrically connect the substrate with the light emitting chips such that the plurality of light emitting chips are connected to each other in series, in parallel or in series-parallel; and a protective layer which covers the plurality of light emitting chips and the plurality of conductive wires on the substrate.
US09214452B2	Semiconductor package and method for fabricating the same A semiconductor package includes a package substrate on which a substrate pad is disposed, a structure disposed over the package substrate, a semiconductor chip disposed over the structure using an adhesive member having a magnetic material layer disposed therein, a chip pad disposed on a top surface of the semiconductor chip, and a bonding wire coupling the substrate pad and the chip pad.
US09214450B2	Package-on-package with via on pad connections An interposer includes a core dielectric material, a conductive pipe penetrating through the core dielectric material, and a metal pad underlying the conductive pipe. The metal pad includes a center portion overlapped by a region encircled by the conductive pipe, and an outer portion in contact with the conductive pipe. A dielectric layer is underlying the core dielectric material and the metal pad. A via is in the dielectric layer, wherein the via is in physical contact with the center portion of the metal pad.
US09214439B2	Forming in-situ micro-feature structures with coreless packages Methods of forming a microelectronic packaging structure and associated structures formed thereby are described. Those methods may include attaching a die to a carrier material, forming dielectric material surrounding the die, forming buildup layers in the dielectric material to form a coreless bumpless buildup package structure, and patterning the carrier material to form microchannel structures on the package structure.
US09214430B2	Semiconductor device and method for manufacturing semiconductor device Provided are a semiconductor device in which abrasive grain marks are formed in a surface of a semiconductor substrate, a dopant diffusion region has a portion extending in a direction which forms an angle included in a range of −5° to +5° with a direction in which the abrasive grain marks extend, and the dopant diffusion region is formed by diffusing a dopant from a doping paste placed on one surface of the semiconductor substrate; and a method for manufacturing the semiconductor device.
US09214425B2	Low-stress vias A component can include a substrate having a front surface and a rear surface remote therefrom, an opening extending from the rear surface towards the front surface, and a conductive via extending within the opening. The substrate can have a CTE less than 10 ppm/° C. The opening can define an inner surface between the front and rear surfaces. The conductive via can include a first metal layer overlying the inner surface and a second metal region overlying the first metal layer and electrically coupled to the first metal layer. The second metal region can have a CTE greater than a CTE of the first metal layer. The conductive via can have an effective CTE across a diameter of the conductive via that is less than 80% of the CTE of the second metal region.
US09214419B2	Power semiconductor device and preparation method thereof A preparation method for a power semiconductor device includes: providing a lead frame containing a plurality of chip mounting units, one side edge of a die paddle of each chip mounting unit is bent and extended upwardly and one lead connects to the bent side edge of the die paddle and extends in an opposite direction from the die paddle; attaching a semiconductor chip to the top surface of the die paddle; forming metal bumps on each electrode at the front of the semiconductor chip with a top end of each metal bump protruding out of a plane of the top surface of the lead; heating the metal bump and pressing a top end of each metal bump by a pressing plate forming a flat top end surface that is flush with the top surface of the lead; and cutting the lead frame to separate individual chip mounting units.
US09214418B2	Lead frame with radiator plate, method for manufacturing lead frame with radiator plate, semiconductor device, and method for manufacturing semiconductor device A lead frame with a radiator plate on which a semiconductor chip 50 is to be mounted is provided with a radiator plate 30, and a lower surface side lead frame 40 including an upper surface 41 and a lower surface 42. The lower surface side lead frame 40 overlaps and fixes the radiator plate 30 with the lower surface 42 making contact with the radiator plate 30. A through hole 43 piercing the lower surface side lead frame 40 from the upper surface 41 to the lower surface 42 is formed at a position where the lower surface side lead frame 40 overlaps the radiator plate 30, and an opening area of the through hole 43 at the lower surface 42 is larger than an opening area of the through hole 43 at the upper surface 41.
US09214415B2	Integrating multi-output power converters having vertically stacked semiconductor chips A packaged multi-output converter (200) comprising a leadframe with a chip pad (201) as ground terminal and a plurality of leads (202) including the electrical input terminal (203); a first FET chip (sync chip, 220) with its source terminal affixed to the leadframe and on its opposite surface a first drain terminal (221) positioned adjacent to a second drain terminal (222), the drain terminals connected respectively by a first (241) and a second (242) metal clip to a first (204) and second (205) output lead; a second FET chip (control chip, 211), positioned vertically over the first drain terminal, with its source terminal attached onto the first clip; a third FET chip (control chip, 212), positioned vertically over the second drain terminal, with its source terminal attached onto the second clip; and the drain terminals (213, 214) of the second and third chips attached onto a third metal clip (260) connected to the input lead (203).
US09214414B2	Lead frame for mounting LED elements, lead frame with resin, method for manufacturing semiconductor devices, and lead frame for mounting semiconductor elements A lead frame for mounting LED elements includes a frame body region and a large number of package regions arranged in multiple rows and columns in the frame body region. The package regions each include a die pad on which an LED element is to be mounted and a lead section adjacent to the die pad, the package regions being further constructed to be interconnected via a dicing region. The die pad in one package region and the lead section in another package region upward or downward adjacent to the package region of interest are connected to each other by an inclined reinforcement piece positioned in the dicing region.
US09214412B2	Semiconductor device A semiconductor device includes a first chip mounting portion, a first semiconductor chip arranged over the first chip mounting portion, a first pad formed in a surface of the first semiconductor chip, a first lead which serves as an external coupling terminal, a first conductive member which electrically couples the first pad and the first lead, and a sealing body which seals a part of the first chip mounting portion, the first semiconductor chip, a part of the first lead, and the first conductive member. The first conductive member includes a first plate-like portion, and a first support portion formed integrally with the first plate-like portion. An end of the first support portion is exposed from the sealing body, and the first support portion is formed with a first bent portion.
US09214408B2	Fluid cooled thermal management technique for a high-density composite focal plane array A fluid cooled thermal management technique for a high-density composite focal plane array (CPFA) is disclosed. In one embodiment, a high density CFPA assembly includes a plurality of imaging dies mounted on a front surface of a printed wiring board (PWB) and a base plate. The base plate has a substantially matched coefficient of thermal expansion (CTE) to that of the high density CFPA. Further, the high density CFPA is disposed on a front side of the base plate. Furthermore, the base plate has a plurality of integral serpentine fluid flow channels configured to receive and circulate fluid and further configured such that the heat generated by the CFPA is transferred via conduction into the base plate and to the integral serpentine fluid flow channels and to the circulating fluid to dissipate the generated heat.
US09214403B2	Stacked semiconductor package A stacked semiconductor package including a first printed circuit board and a second printed circuit board is provided. The first printed circuit board may include a first surface upon which a first semiconductor chip is mounted and a second surface upon which at least one connecting structure is attached. The first printed circuit board may further include at least one thermal via and a heat sink and the at least one thermal via and the heat sink may be disposed under the first semiconductor chip with the heat sink being disposed between the first surface and the second surface. The second printed circuit board may include a third surface upon which a second semiconductor chip is mounted. The second printed circuit board may be disposed under the first printed circuit board with the at least one connecting structure connecting the first printed circuit board to the second printed circuit board.
US09214401B2	Display substrate, method of manufacturing the same and display apparatus having the same A display substrate includes a base substrate including a display area and a peripheral area surrounding the display area, a switching element in the display area, a main-test-line in the peripheral area, extending in the second direction and electrically connected with a data line, a sub-test-line in the peripheral area, and a test pad in the peripheral area and electrically connected with the main-test-line and the sub-test-line. The switching element is electrically connected with a gate line extending in a first direction and the data line extending in a second direction crossing the first direction. The sub-test-line is electrically connected with the data line. The sub-test-line is in a different layer from the main-test-line.
US09214399B2	Integrated circuit with matching threshold voltages and method for making same An integrated circuit having a substrate, a buffer layer formed over the substrate, a barrier layer formed over the buffer layer, and an isolation region that isolates an enhancement mode device from a depletion mode device. The integrated circuit further includes a first gate contact for the enhancement mode device that is disposed in one gate contact recess and a second gate contact for the depletion mode device that is disposed in a second gate contact recess.
US09214397B2	Structure and method to modulate threshold voltage for high-K metal gate field effect transistors (FETs) A method for forming an electrical device that includes forming a high-k gate dielectric layer over a semiconductor substrate that is patterned to separate a first portion of the high-k gate dielectric layer that is present on a first conductivity device region from a second portion of the high-k gate dielectric layer that is present on a second conductivity device region. A connecting gate conductor is formed on the first portion and the second portion of the high-k gate dielectric layer. The connecting gate conductor extends from the first conductivity device region over the isolation region to the second conductivity device region. One of the first conductivity device region and the second conductivity device region may then be exposed to an oxygen containing atmosphere. Exposure with the oxygen containing atmosphere modifies a threshold voltage of the semiconductor device that is exposed.
US09214396B1	Transistor with embedded stress-inducing layers A method of forming a transistor device is provided, including the subsequently performed steps of forming a gate electrode on a first semiconductor layer, forming an interlayer dielectric over the gate electrode and the first semiconductor layer, forming a first opening in the interlayer dielectric at a predetermined distance laterally spaced from the gate electrode on one side of the gate electrode and a second opening in the interlayer dielectric at a predetermined distance laterally spaced from the gate electrode on another side of the gate electrode, the first and second openings reaching to the first semiconductor layer, forming cavities in the first semiconductor layer through the first and second openings formed in the interlayer dielectric, and forming embedded second semiconductor layers in the cavities.
US09214391B2	Methods for forming interconnects in microelectronic workpieces and microelectronic workpieces formed using such methods Methods for forming interconnects in microelectronic workpieces and microelectronic workpieces having such interconnects are disclosed herein. One aspect of the invention is directed toward a method for manufacturing a microelectronic workpiece having a plurality of microelectronic dies. The individual dies include an integrated circuit and a terminal electrically coupled to the integrated circuit. In one embodiment, the method includes forming an opening in the workpiece in alignment with the terminal. The opening can be a through-hole extending through the workpiece or a blind hole that extends only partially through the substrate. The method continues by constructing an electrically conductive interconnect in the workpiece by depositing a solder material into at least a portion of the opening and in electrical contact with the terminal. In embodiments that include forming a blind hole, the workpiece can be thinned either before or after forming the hole.
US09214389B2	Methods of forming memory arrays Some embodiments include methods of forming memory arrays. An assembly is formed which has an upper level over a lower level. The lower level includes circuitry. The upper level includes semiconductor material within a memory array region, and includes insulative material in a region peripheral to the memory array region. First and second trenches are formed to extend into the semiconductor material. The first and second trenches pattern the semiconductor material into a plurality of pedestals. The second trenches extend into the peripheral region. Contact openings are formed within the peripheral region to extend from the second trenches to the first level of circuitry. Conductive material is formed within the second trenches and within the contact openings. The conductive material forms sense/access lines within the second trenches and forms electrical contacts within the contact openings to electrically couple the sense/access lines to the lower level of circuitry.
US09214388B2	Bonded structure employing metal semiconductor alloy bonding Vertical stacks of a metal portion and a semiconductor portion formed on a first substrate are brought into physical contact with vertical stacks of a metal portion and a semiconductor portion formed on a second substrate. Alternately, vertical stacks of a metal portion and a semiconductor portion formed on a first substrate are brought into physical contact with metal portions formed on a second substrate. The assembly of the first and second substrates is subjected to an anneal at a temperature that induces formation of a metal semiconductor alloy derived from the semiconductor portions and the metal portions. The first substrate and the second substrate are bonded through metal semiconductor alloy portions that adhere to the first and second substrates.
US09214382B2	Semiconductor devices including air gap spacers A spacer covering a sidewall of a contact plug includes a relatively more damaged first portion and a relatively less damaged second portion. An interface of the first and second portions of the spacer is spaced apart from a metal silicide layer of the contact plug. Thus reliability of the semiconductor device may be improved. Related fabrication methods are also described.
US09214377B2	Methods for silicon recess structures in a substrate by utilizing a doping layer Embodiments of the present invention provide a methods for forming silicon recess structures in a substrate with good process control, particularly suitable for manufacturing three dimensional (3D) stacking of fin field effect transistor (FinFET) for semiconductor chips. In one embodiment, a method of forming recess structures in a substrate includes etching a first portion of a substrate defined by a second portion formed in the substrate until a doping layer formed in the substrate is exposed.
US09214374B2	Semiconductor devices including stress relief structures A microelectronic device includes a substrate having at least one microelectronic component on a surface thereof, a conductive via electrode extending through the substrate, and a stress relief structure including a gap region therein extending into the surface of the substrate between the via electrode and the microelectronic component. The stress relief structure is spaced apart from the conductive via such that a portion of the substrate extends therebetween. Related devices and fabrication methods are also discussed.
US09214372B2	Substrate processing system, carrying device and coating device A substrate processing system includes a processing unit, a substrate loading unit, a substrate unloading unit, and a carrying unit. A carrying device has a constitution in which a suction portion suctioning and holding a substrate is rotatable about an arm portion provided in a base portion and the substrate is rotated in the state where the substrate is held by a holding portion. A coating device has a constitution in which a liquid material is ejected from a nozzle to both surfaces of the substrate rotating in an upright state.
US09214369B2	Dynamic pitch substrate lift An apparatus for dynamically adjusting the pitch between substrates in a substrate stack comprises first and second lift portions. The first lift portion supports a first group of the plurality of substrates, and the second lift portion supports a second group of the plurality of substrates. The first and second lift portions are operable to move the first and second groups of substrates in a first direction independently from each other. This independent movement enables the pitch, or spacing, between adjacent substrates to be dynamically adjusted so that an end effector of a robot can be positioned between such adjacent substrates to pick one of the substrates without inadvertently engaging another substrate that is not being picked. Other embodiments are disclosed.
US09214359B2	Method and apparatus for simultaneously removing multiple conductive materials from microelectronic substrates A method and apparatus for simultaneously removing conductive materials from a microelectronic substrate. A method in accordance with one embodiment of the invention includes contacting a surface of a microelectronic substrate with an electrolytic liquid, the microelectronic substrate having first and second different conductive materials. The method can further include controlling a difference between a first open circuit potential of the first conducive material and a second open circuit potential of the second conductive material by selecting a pH of the electrolytic liquid. The method can further include simultaneously removing at least portions of the first and second conductive materials by passing a varying electrical signal through the electrolytic liquid and the conductive materials. Accordingly, the effects of galvanic interactions between the two conductive materials can be reduced and/or eliminated.
US09214355B2	Molecular radical etch chemistry for increased throughput in pulsed plasma applications As device feature size shrinks, plasma induced damage is a major concern affecting micro-electronic and nano-electronic device fabrication. Pulsed plasmas are a means of mitigating the damages. However, in conventional standard etch chemistry, the etch rate for pulsed plasmas is reduced significantly resulting in a substantially decreased throughput of tech processes. A new etch chemistry is disclosed in the present invention to increase throughput in pulsed plasma applications driven mainly by the molecular radicals.
US09214354B2	Manufacturing method for semiconductor device In a manufacturing method of sequentially forming a gate electrode film of the MOSFET, forming a gate electrode film of the non-volatile memory FET, patterning the gate electrode of the non-volatile memory FET, and patterning the gate electrode of the MOSFET, in order to form the MOSFET and the non-volatile memory FET on the same semiconductor substrate. The value of the product of S/L and H/L is specified in a case that the line of the gate electrode of the non-volatile memory FET is set to L, the space thereof is set to S, and the height thereof is set to H so that the thickness of a resist film on the gate electrode of the non-volatile memory FET which is formed in advance is set to a thickness which is not lost by etching for forming the gate electrode of the MOSFET.
US09214349B2	Method for manufacturing semiconductor device A method for manufacturing a semiconductor device is provided. The method includes forming an insulation film including a trench on a substrate, forming a first metal gate film pattern along side and bottom surfaces of the trench, forming a second metal gate film on the first metal gate film pattern and the insulation film, and forming a second metal gate film pattern positioned on the first metal gate film pattern by removing the second metal gate film to expose at least a portion of the insulation film and forming a blocking layer pattern on the second metal gate film pattern by oxidizing an exposed surface of the second metal gate film pattern.
US09214348B2	Semiconductor device including a gate dielectric layer A semiconductor device is fabricated by, inter alia, forming a sacrificial liner on an active portion of a semiconductor substrate, oxidizing the sacrificial liner to transform the sacrificial liner into a gate dielectric layer, and forming a gate on the gate dielectric layer.
US09214344B1	Pillar-supported array of micro electron lenses One embodiment relates to a pillar-supported array of micro electron lenses. The micro-lens array includes a base layer on a substrate, the base layer including an array of base electrode pads and an insulating border surrounding the base electrode pads so as to electrically isolate the base electrode pads from each other. The micro-lens array further includes an array of lens holes aligned with the array of base electrode pads and one or more stacked electrode layers having openings aligned with the array of lens holes. The micro-lens array further includes one or more layers of insulating pillars, each layer of insulating pillars supporting a stacked electrode layer. Another embodiment relates to a method of fabricating a pillar-supported array of micro electron lenses. Other embodiments, aspects and features are also disclosed.
US09214343B2	ZNSNO3/ZNO nanowire having core-shell structure, method of forming ZNSNO3/ZNO nanowire and nanogenerator including ZNSNO3/ZNO nanowire, and method of forming ZNSNO3 nanowire and nanogenerator including ZNSNO3 nanowire A ZnSnO3/ZnO nanowire, a method of forming a ZnSnO3/ZnO nanowire, a nanogenerator including a ZnSnO3/ZnO nanowire, a method of forming a ZnSnO3 nanowire, and a nanogenerator including a ZnSnO3 nanowire are provided. The ZnSnO3/ZnO nanowire includes a core and a shell that surrounds the core, wherein the core includes ZnSnO3 and the shell includes ZnO.
US09214342B2	Method for producing compound semiconductor crystal, method for producing electronic device, and semiconductor wafer A method for producing a compound semiconductor crystal, includes; a sacrificial layer formation step of forming a sacrificial layer containing Cx1Siy1Gez1Sn1-x1-y1-z1 (0≦x1<1, 0≦y1≦1, 0≦z1≦1, and 0
US09214341B2	Method for manufacturing a semiconductor structure and semiconductor component comprising such a structure Method for manufacturing at least one semiconductor structure (130) on the surface (105) of a substrate (100) wherein the surface comprises silicon. The method comprises steps consisting of providing the substrate (100), forming in contact with an area (101) of the surface (105), referred to as the formation area, a layer (120) of a first material, the remainder (102) of the surface (105), referred to as the free area, remaining free from the first material, the dimensions of the formation area (101) and the first material being suitable for forming the structure (130), the first material comprising gallium, the formation of said layer (120) taking place at a temperature less than 600° C., and forming the structure (130) in contact with the layer (120).
US09214338B2	Method of making graphene layers, and articles made thereby There is provided a method for forming a graphene layer. The method includes forming an article that comprises a carbon-containing self-assembled monolayer (SAM). A layer of nickel is deposited on the SAM. The article is heated in a reducing atmosphere and cooled. The heating and cooling steps are carried out so as to convert the SAM to a graphene layer.
US09214337B2	Patterned silicon-on-plastic (SOP) technology and methods of manufacturing the same A semiconductor device and methods for manufacturing the same are disclosed. The semiconductor device includes a semiconductor stack structure attached to a wafer handle having at least one aperture that extends through the wafer handle to an exposed portion of the semiconductor stack structure. A thermally conductive and electrically resistive polymer substantially fills the at least one aperture and contacts the exposed portion of the semiconductor stack structure. One method for manufacturing the semiconductor device includes forming patterned apertures in the wafer handle to expose a portion of the semiconductor stack structure. The patterned apertures may or may not be aligned with sections of RF circuitry making up the semiconductor stack structure. A following step includes contacting the exposed portion of the semiconductor stack structure with a polymer and substantially filling the patterned apertures with the polymer, wherein the polymer is thermally conductive and electrically resistive.
US09214333B1	Methods and apparatuses for uniform reduction of the in-feature wet etch rate of a silicon nitride film formed by ALD Disclosed herein are methods of depositing a SiN film having a reduced wet etch rate. The methods may include adsorbing a film precursor comprising Si onto a semiconductor substrate in a processing chamber to form an adsorption-limited layer of precursor, and then removing unadsorbed precursor from the volume surrounding the adsorbed precursor. The adsorbed precursor may then be reacted by exposing it to a plasma comprising N-containing ions and/or radicals to form a SiN film layer on the substrate, and the SiN film layer may then be densified by exposing it to a He plasma. The foregoing steps may then be repeated to form another densified SiN film layer on the substrate. Also disclosed herein are apparatuses for depositing SiN films having reduced wet etch rates on semiconductor substrates which employ the foregoing techniques.
US09214329B2	Electrodeless plasma discharge lamp A discharge lamp (20) for providing visible and/or infrared radiation comprising a stationary light transmitting bulb (21) filled with a composition that emits light when in plasma state, a radiofrequency source (41) having an output terminal (44) radiating a radiofrequency field for ionizing and heating the composition in the bulb to bring it in a plasma state (35), and a dielectric rod (22) aligned with the output terminal and positioned between the output terminal (44) and the bulb (21) acting as dielectric waveguide for the radiofrequency field.
US09214320B2	Inert-dominant pulsing in plasma processing systems A method for processing substrate in a processing chamber, which has at least one plasma generating source and a gas source for providing process gas into the chamber, is provided. The method includes exciting the plasma generating source with an RF signal having RF frequency. The method further includes pulsing the gas source, using at least a first gas pulsing frequency, such that a first process gas is flowed into the chamber during a first portion of a gas pulsing period and a second process gas is flowed into the chamber during a second portion of the gas pulsing period, which is associated with the first gas pulsing frequency. The second process gas has a lower reactant-gas-to-inert-gas ratio relative to a reactant-gas-to-inert-gas ratio of the first process gas. The second process gas is formed by removing at least a portion of a reactant gas flow from the first process gas.
US09214314B1	Ion beam manipulator An ion beam manipulator including a suppression electrode, a ground electrode connected to the suppression electrode in a parallel, spaced-apart relationship therewith by three electrically insulating connectors, the connectors being spaced 120 degrees apart from one another around a circumference of the suppression electrode and the ground electrode, a plurality of linkages extending from the electrically insulating connectors, at least one of the linkages including a pair of parallel support arms connected at a first end to a corresponding one of the electrically insulating connecters by a first pair of universal joints and connected at a second end to a bracket by a second pair of universal joints, and a drive shaft extending from the bracket, the drive shaft coupled to an actuator configured to extend and retract the drive shaft along a longitudinal axis of the drive shaft.
US09214313B2	Ion source with independent power supplies An ion source is disclosed which utilizes independently powered electrodes that are isolated with a series of insulators. The ion source comprises an anode electrode with a hollow interior, where the anode is disposed between a cathode and an anti-cathode. A magnet or electro-magnet imposes a magnetic field in an axial direction through the bore of the anode. Gas is introduced into the anode area at a controllable pressure. The ion source includes a first voltage differential between the anode and cathode for the production of plasma and a second voltage differential between the anode and the anti-cathode for extraction of ions from the plasma, forming an ion beam, which is preferably of a narrow diameter at low beam energy. In particular, the voltage differential between the anti-cathode and anode is adjusted to control the initial beam divergence of extracted ions. An optional focus electrode with an independent power supply further focuses the ion beam. A final electrode defines the output boundary of the ion source to provide un-perturbed drift of the ions into the vacuum chamber.
US09214312B2	X-ray tube with a backscattering electron trap An x-ray tube has a backscatter electron trap to prevent extra focal radiation caused by backscattered electrons from the focal spot from passing through the beam exit window to an exterior of the x-ray tube. The backscatter electron trap has a surface that faces the x-ray beam in the x-ray tube. No portion of that surface is visible both from an arbitrary point in the x-ray beam outside of the x-ray tube and from an arbitrary point at the focal spot.
US09214309B2	Two-pole circuit breaker with trip bar apparatus and methods A two-pole circuit breaker has an internal rotating trip bar that causes a second pole to trip (i.e., interrupt power) in response to a first pole tripping. A first pole may trip when the two-pole circuit breaker senses an electrical fault in the first pole. The tripping of the second pole in response to the first pole tripping may be referred to as common tripping. The trip bar may be connected to a tripping mechanism in each pole and may have interface features that result in less force required to trip the second pole, greater trip bar design tolerances, and/or ultimately more reliable common tripping. Methods of assembling a two-pole circuit breaker are also provided, as are other aspects.
US09214302B2	Electric current switching apparatus A rotary switch module includes a first stationary contact, a second stationary contact, and a movable contact for making an electrical connection between the first stationary contact and the second stationary contact. A rotary actuator is provided for rotating the movable contact, the rotary actuator having on its surface a first indication indicating an open position of the switch, and a second indication indicating a closed position of the switch. A first window indicates the first indication, and a second window separate from the first window indicates the second indication.
US09214301B2	Luminous keyboard device A luminous keyboard device includes a keypad module, a supporting plate, a flexible circuit board, a light-emitting element, a reflective layer, and a light guide plate. The supporting plate includes plural receiving parts. The flexible circuit board is contacted with the plural receiving parts to form plural bent structures. The light-emitting element and the reflective layer are disposed on the flexible circuit board. When a light beam is emitted by the light-emitting element, the portion of the light beam that is not directed to the light guide plate is reflected back to the light guide plate by the reflective layer on the plural bent structures. Consequently, the amount of light introduced into the light guide plate increases.
US09214297B2	Touch panel and a manufacturing method thereof The present disclosure provides a touch panel which at least comprises a sensing area, a conductive wire area, and earthing lines. The conductive wire area surrounds the sensing area and is electrically connected to the sensing area, and the conductive wire area comprises a first conductive wire area and a second conductive wire area. The earthing lines are set between the first conductive wire area and the second conductive wire area. The touch panel can efficiently shield signal crosstalk between the first conductive wire area and the second conductive wire area by setting the earthing lines between the first conductive wire area and the second conductive wire area, thereby reducing the influence of signal crosstalk on efficiency of the touch panel.
US09214294B2	Key switch device, and method of manufacturing key switch device A key switch device includes a key top; a link member that guides an elevating operation of the key top while being interlocking with the key top, the link member including a rotatable shaft and a sliding shaft that is connected to the key top; a membrane sheet that includes a contact that opens and closes in accordance with the elevating operation of the key top; a back plate; a housing that holds the rotatable shaft of the link member to the back plate; and a pushing unit that pushes the link member such that the sliding shaft moves away from the back plate.
US09214293B2	Key structure with scissors-type connecting member A key structure includes a base plate, a keycap, a scissors-type connecting member, and an elastic element. The scissors-type connecting member is connected with the base plate and the keycap. After the key structure is assembled and the keycap is not assembled, the elastic element provides an upward first elastic force, and the scissors-type connecting member is bent to provide a downward second elastic force. By exerting a small force on the keycap, the key structure can be triggered.
US09214292B2	Compact vacuum interrupter with selective encapsulation A vacuum interrupter is disclosed with a fixed contact and a movable contact placed axially in a spaced apart relationship. The ceramic insulator cylinders each surround the fixed contact and the movable contact. A floating shield within the ceramic cylinders has a floating potential flange disposed between the two ceramic cylinders, and exposed to external ambient. Encapsulation for at least one contact terminal extends from a metallic end cap of the corresponding contacts to cover a respective ceramic cylinder by an overlapping distance.
US09214291B2	Touch panel and method of manufacturing the same Disclosed are a touch panel and a method of manufacturing the same. The touch panel includes a gas generation layer; a sensing electrode pattern on the gas generation layer; a gas blocking layer between the gas generation layer and the sensing electrode pattern to block a gas generated from the gas generation layer.
US09214287B2	Dye-sensitized solar cell and method for preventing elution of catalyst from catalyst electrode Providing a dye-sensitized solar cell having high durability and thermal resistance, and preventing elution of a platinum group catalyst from a catalytic electrode: by surface-treating the catalytic electrode with (a) a specific sulfur material having a molecular weight of 32 to 10,000 containing a sulfur atom having an oxidation number of −2 to 0, (b) another specific sulfur material containing no sulfur atom having an oxidation number of −2 to 0, but containing a sulfur atom having an oxidation number of +1 to +4 [with the proviso that the sulfur material (b) is such a material that a surface of the surface-treated catalyst electrode has a photoelectron peak within a binding energy range of 161 to 165 eV in an X-ray photoelectron spectrum], or (c) a mixture of the sulfur materials (a) and (b); and/or by adding the sulfur material into the electrolyte layer.
US09214284B2	Decoupling device with three-dimensional lead frame and fabricating method thereof A decoupling device including a lead frame and at least one capacitor unit set is provided. The lead frame includes a cathode terminal portion and at least two anode terminal portions disposed at two sides of the cathode terminal portion and opposite to each other. The anode terminal portions are electrically connected through a conductive line. One of the anode terminal portions extends along a first direction to form an extending portion, and the extending portion is bended along a second direction perpendicular to the first direction to form an anode side plate. Each capacitor unit set includes a plurality of capacitor units. The capacitor unit sets are connected in parallel on a same plane and disposed on the lead frame. Each capacitor unit has a cathode portion electrically connected to the cathode terminal portion and an anode portion electrically connected to the anode side plate along the first direction.
US09214280B2	Very thin dielectrics for high permittivity and very low leakage capacitors and energy storing devices Methods are disclosed for creating extremely high permittivity dielectric materials for use in capacitors and energy storage devices. High permittivity materials suspended in an organic non-conductive media matrix with enhanced properties and methods for making the same are disclosed. Organic polymers, shellac, silicone oil, and/or zein formulations are utilized to produce thin film low conductivity dielectric coatings. Transition metal salts as salt or oxide matrices are formed at low temperatures utilizing mild reducing agents.
US09214278B2	Multilayered ceramic electronic component and board for mounting the same There is provided a multilayered ceramic electronic component including: a ceramic body including a dielectric layer and having first and second side surfaces; first and second internal electrodes having an overlapping region provided in the ceramic body, forming a capacitance forming area exposed to the first side surface, the first internal electrode having a first lead-out portion, and the second internal electrode being insulated from the first internal electrode and having a second lead-out portion; a first external electrode connected to the first lead-out portion and a second external electrode connected to the second lead-out portion; and an insulating layer formed on the first side surface, wherein the first and second external electrodes further include non-conductive layers formed on outer surfaces thereof.
US09214277B2	Capacitor having a plurality of minute internal electrode portions filled by a dielectric layer A capacitor includes a dielectric layer, a first external electrode layer, a second external electrode layer, a first internal electrode portion, a second internal electrode portion, and a close contact portion. The dielectric layer includes a first surface, a second surface facing the first surface, and a plurality of through-holes communicating between the first surface and the second surface. The first internal electrode portion is provided on a first through-hole portion. The second internal electrode portion is provided on a second through-hole portion. The close contact portion brings at least one of the first external electrode layer and the second external electrode layer into close contact with the dielectric layer, the close contact portion being provided on a third through-hole portion, the third through-hole portion being the remaining portion of the plurality of through-holes.
US09214270B2	Electronic component and manufacturing method thereof An electronic component includes a first conductor layer including a first conductor pattern P1, a first insulating layer covering the first conductor layer, a first opening h1 passing through the first insulting layer to expose top and side surfaces of the first conductor pattern P1 therethrough, and a second conductor layer formed on the first insulating layer and including a second conductor pattern P2 connected to the first conductor pattern P1 through the first opening h1. A first opening region which is a planar region inside the first opening h1 includes a first region in which the first conductor pattern P1 is formed and a second region in which the first conductor pattern P1 is not formed. The second conductor pattern P2 is embedded in both the first and second regions of the first opening h1.
US09214266B2	Electromagnetic force driving device An electromagnetic force driving device having reduced size and weight, and easily changeable electromagnetic characteristics and holding force, is provided. The device includes: a first housing; a second housing installed under the first housing; a partitioning wall partitioning the first and second housings; a first mover installed on a top of the first housing; a coil unit installed at a lower portion of the second housing to be movable according to a direction of current supplied; a second mover including one end combined with the coil unit, and another end passing through the partitioning wall and connected to the first mover to operate the first mover according to a movement of the coil unit; an upper magnet installed in the first housing to maintain a predetermined position of the first mover; and a lower magnet arranged in the second housing to form a magnetic field at the coil unit.
US09214265B2	Single- or multi-phase dry-type transformer having at least two coils A single- or multi-phase dry-type transformer includes at least two coils. A barrier between phases made of an electrically insulating material is arranged in the intermediate space between the individual coils.
US09214264B2	Magnetic device and power converter employing the same A magnetic device and power converter employing the same. In one embodiment, the magnetic device includes a first L-core segment including a first leg and a second leg extending therefrom, and an opposing second L-core segment including a first leg and a second leg extending therefrom. The magnetic device also includes a winding formed around at least one of the first leg and the second leg of the first L-core segment or the second L-core segment.
US09214263B2	Magnetite-containing resin and electronic component This disclosure provides a magnetic material-containing resin to be used for coating and forming cores. A magnetite-containing resin of the present invention includes a magnetite having a residual magnetic flux density of less than 15 Am2/kg and a coercive force of less than 12 kA/m. A coil is provided that has a structure in which by coating a winding with the magnetite-containing resin, a magnetite-containing resin layer is formed.
US09214261B2	Cable for high-voltage electronic device A cable for a high-voltage electronic device having a small diameter and an excellent voltage resistance characteristic. The cable includes an inner semiconducting layer, a high-voltage insulator, an outer semiconducting layer, a shielding layer, and a sheath on an outer periphery of a cable core portion, wherein the high-voltage insulator is formed of an insulating composition containing 0.5 to 5 parts by mass of an inorganic filler with respect to 100 parts by mass of an olefin-based polymer, and the inorganic filler has an average dispersed-particle diameter of 1 μm or less.
US09214260B2	Differential signal transmission cable and multi-core differential signal transmission cable A differential signal transmission cable includes first and second signal lines arranged parallel to each other, a conductive layer made of a conductor in which a current is induced when signals propagate through the first and second signal lines, and a dielectric disposed between the first and second signal lines and the conductive layer. The conductive layer has a signal attenuating structure including a non-continuous section in which the conductor is non-continuous, the non-continuous section being located such that, among differential signal components and common-mode signal components included in the signals propagating through the first and second signal lines, the common-mode signal components are attenuated by an attenuation factor greater than an attenuation factor of the differential signal components.
US09214259B2	Composite laminated ceramic electronic component A composite laminated ceramic electronic component that includes co-fired low dielectric-constant ceramic layers and high dielectric-constant ceramic layers. The low dielectric-constant ceramic layers and the high dielectric-constant ceramic layers are each composed of a glass ceramic containing: a first ceramic composed of MgAl2O4 and/or Mg2SiO4; a second ceramic composed of BaO, RE2O3 (where RE is a rare-earth element), and TiO2; glass containing each of 44.0 to 69.0 weight % of RO (where R is an alkaline-earth metal), 14.2 to 30.0 weight % of SiO2, 10.0 to 20.0 weight % of B2O3, 0.5 to 4.0 weight % of Al2O3, 0.3 to 7.5 weight % of Li2O, and 0.1 to 5.5 weight % of MgO; and MnO. The content ratios of the glass, etc. are varied between the low dielectric-constant ceramic layers and the high dielectric-constant ceramic layers.
US09214257B2	Organic electrolyte for magnesium batteries and magnesium battery using the organic electrolyte An organic electrolyte for magnesium batteries including an ether solvent; a magnesium compound represented by Formula 1 dissolved in the ether solvent; and a Lewis acid: wherein CY1 is an optionally substituted C6-C50 aromatic ring, X1 is, each independently, an electron withdrawing group, X2 is a halogen, n is an integer of 1 to 10, and an angle between a CY1-X1 bond and a CY1-Mg bond is 150 degrees or less.
US09214256B2	Carbon nanotube-transparent conductive inorganic nanoparticles hybrid thin films for transparent conductive applications An optically transparent, electrically conductive hybrid film includes a carbon nanotubes network deposited on a substrate, and a population of transparent conductive inorganic nanoparticles distributed throughout the carbon nanotubes network to provide a conductive transparent hybrid film.
US09214255B2	P-doped conjugated polymer electrolyte and an organic electronic device using the same Disclosed are a p-doped conjugated polymer electrolyte and an organic electronic device using the same. The p-doped conjugated polymer electrolyte according to the present invention not only has an outstanding hole-transport capability but can also act as an electron-blocking layer and hence can be used in organic electronic devices, such as organic light-emitting devices or organic solar cells, in order to improve the light-emitting efficiency of the organic light-emitting device or the energy-conversion efficiency of the organic solar cell. Also, because the charge on the p-doped conjugated polymer electrolyte is almost completely neutral, the present invention can solve the problem of anode corrosion and make a positive contribution to increased life-cycle of the device.
US09214251B2	Aluminum alloy conductor An aluminum alloy conductor, containing: 0.01 to 0.4 mass % of Fe, 0.1 to 0.3 mass % of Mg, 0.04 to 0.3 mass % of Si, 0.1 to 0.5 mass % of Cu, and 0.001 to 0.01 mass % of Ti and V in total, with the balance being Al and inevitable impurities,wherein the conductor contains three kinds of intermetallic compounds A, B, and C, in which the intermetallic compounds A, B, and C have a particle size of 0.1 μm or more but 2 μm or less, 0.03 μm or more but less than 0.1 μm, and 0.001 μm or more but less than 0.03 μm, respectively, and area ratios a, b, and c of the intermetallic compounds A, B, and C, in an arbitrary region in the conductor, satisfy: 0.1%≦a≦2.5%, 0.1%≦b≦3%, and 1%≦c≦10%.
US09214250B2	Polymer particle A heat-treated polymer particle comprising an addition polymer core particle which has had swollen and polymerized therein a blend of an aromatic alcohol with an aldehyde or a blend of an aromatic amine or urea with an aldehyde and which has been subsequently heat treated, e.g. to a temperature of at least 150° C.
US09214248B2	Capture and removal of radioactive species from an aqueous solution The present invention relates to a method of capturing radioactive species in an aqueous solution and removing the radioactive species for disposal. The method includes the steps of providing a macroporous bead form sequestration resin including a sequestration ligand coupled to a sulfonic acid based polymer resin, subjecting the bead form sequestration resin to radioactive species contained in the aqueous solution to allow the bead form sequestration resin to capture the radioactive species; using an acid to lower a pH of the resin to release the radioactive species; and disposing the radioactive species in a radioactive storage facility.
US09214247B2	Water filling system for reactor water level gauge A water filling system for a reactor water level gauge is provided for filling a reactor water level gauge instrumentation pipe in a reactor building with water and filling the reactor water level gauge with water even in an unexpected abnormal event where the reactor building is brought into a highly radioactive environment. The water filling system for a reactor water level gauge includes a water filling instrumentation pipe guided from the reactor water level gauge instrumentation pipe in the reactor building to an outside of the reactor building and filling the reactor water level gauge instrumentation pipe in the reactor building with water even in an unexpected abnormal event of a nuclear power plant.
US09214246B2	System and method for operating a modular nuclear fission deflagration wave reactor Illustrative embodiments provide modular nuclear fission deflagration wave reactors and methods for their operation. Illustrative embodiments and aspects include, without limitation, modular nuclear fission deflagration wave reactors, modular nuclear fission deflagration wave reactor modules, methods of operating a modular nuclear fission deflagration wave reactor, and the like.
US09214242B2	Programming method for NAND flash memory device to reduce electrons in channels In a programming method for a NAND flash memory device, a self-boosting scheme is used to eliminate excess electrons in the channel of an inhibit cell string that would otherwise cause programming disturb. The elimination is enabled by applying a negative voltage to word lines connected to the inhibit cell string before boosting the channel, and this leads to bringing high program immunity. A row decoder circuitry to achieve the programming operation and a file system architecture based on the programming scheme to improve the efficiency of file management are also described.
US09214240B2	Dynamic erase depth for improved endurance of non-volatile memory Improving endurance for non-volatile memory by dynamic erase depth is disclosed. A group of memory cells are erased. Then, at least some of the erased memory cells are programmed. Programming the memory cells typically impacts the erase threshold distribution of those memory cells that were intended to stay erased. The erase depth of the next erase can be adjusted based on how the program operation affects the erase threshold distribution. As one example, the upper tail of the erase distribution is measured after programming. The higher the upper tail, the shallower the next erase, in one embodiment. This helps to improve endurance. In one embodiment, the erase depth is adjusted by determining a suitable erase verify level. Rather than (or in addition to) adjusting the erase verify level, the number of erase pulses that are performed after erase verify passes can be adjusted to adjust the erase depth.
US09214238B2	Semiconductor memory device A semiconductor memory device includes first to fourth memory cells that are stacked above a semiconductor substrate, first to fourth word lines that are connected to gates of the first to fourth memory cells, respectively, and a row decoder that applies voltages to the first to fourth word lines. The row decoder applies a first programming voltage to the first word line during a write operation performed on the first memory cell, applies the first programming voltage to the second word line during a write operation performed on the second memory cell, applies a second programming voltage to the third word line during a write operation performed on the third memory cell, and applies the second programming voltage to the fourth word line during a write operation performed on the fourth memory cell. The second programming voltage is higher than the first programming voltage.
US09214237B2	Nonvolatile semiconductor memory device A nonvolatile semiconductor memory device includes a control circuit configured to control a soft program operation of setting nonvolatile memory cells to a first threshold voltage distribution state of the nonvolatile memory cells. When a characteristic of the nonvolatile memory cells is in a first state, the control circuit executes the soft program operation by applying a first voltage for setting the nonvolatile memory cells to the first threshold voltage distribution state to first word lines, and applying a second voltage higher than the first voltage to a second word line. When the characteristic of the nonvolatile memory cells is in a second state, the control circuit executes the soft program operation by applying a third voltage equal to or lower than the first voltage to the first word lines and applying a fourth voltage lower than the second voltage to the second word line.
US09214236B2	Thermally assisted flash memory with diode strapping A memory includes an array of memory cells including rows and columns. The memory includes circuitry coupled to the word lines applying a first bias voltage to a first set of spaced-apart locations on a word line or word lines in the array, while applying a second bias voltage different than the first bias voltage, to a second set of spaced-apart locations on the word line or word lines, locations in the first set of spaced-apart locations being interleaved among locations in the second set of spaced-apart locations, whereby current flow is induced between locations in the first and second sets of locations that cause heating of the word line or word lines.
US09214234B2	Nonvolatile semiconductor memory device and method of manufacturing the same According to one embodiment, a memory cell string stacked body includes first memory cell transistors above a semiconductor substrate, and second memory cell transistors below a first channel semiconductor film, and one of the first memory cell transistors and one of the second memory cell transistors share with a control gate electrode. The control gate electrodes of the first memory cell transistors cover an upper surface of a first charge storage layer and at least a part of a side surface in a second direction via a first insulating film in the one of the first memory cell transistors. The control gate electrodes of the second memory cell transistors cover only a lower surface of a second charge storage layer via a second insulating film in one of the second memory cell transistors.
US09214233B2	Method for erasing memory cells in a flash memory device using a positive well bias voltage and a negative word line voltage A memory device of the non-volatile type including a memory array having a plurality of memory cells organized as sectors, each sector having a main word line associated with a plurality of local word lines, each local word line coupled to the main word line by a respective local word line driver circuit, each of the local word line driver circuits consisting of a first MOS transistor coupled between the respective main word line and a respective local word line and a second MOS transistor coupled between the respective local word line and a first biasing terminal.
US09214232B2	Methods and apparatuses for calibrating data sampling points Methods and apparatuses for calibrating data sampling points are disclosed herein. An example apparatus may include a memory that may be configured to receive a calibration command and an attribute. The memory may include a first register that is configured to store a tuning data pattern and a second register that is configured to receive and store the tuning data pattern stored in the first register. The second register may be further configured to store the tuning data pattern responsive, at least in part, to the memory receiving the calibration command. The memory may be configured to execute an operation on at least one of the tuning data pattern stored in the first register or the tuning data pattern stored in the second register based, at least in part, on the attribute.
US09214231B2	Crossbar memory to provide content addressable functionality Examples disclose a crossbar memory with a first crossbar to write data values corresponding to a word. The crossbar memory further comprises a second crossbar, substantially parallel to the first crossbar, to receive voltage for activation of data values across the second crossbar. Additionally, the examples of the crossbar memory provide an output line that interconnects with the crossbars at junctions, to read the data values at the junctions. Further, the examples of the crossbar memory provide a logic module to determine whether the second crossbar data values correspond to the word written in the first crossbar.
US09214226B2	Semiconductor memory device A semiconductor memory device including a memory cell array including a memory cell layer containing plural memory cells operative to store data in accordance with different resistance states; and an access circuit operative to make access to the memory cells, the memory cell changing the resistance state from a first resistance state to a second resistance state on application of a voltage of a first polarity, and changing the resistance state from the second resistance state to the first resistance state on application of a voltage of a second polarity, the access circuit applying voltages, required for access to the memory cell, to first and second lines connected to a selected memory cell, and bringing at least one of the first and second lines connected to non-selected memory cells into the floating state to make access to the selected memory cell.
US09214224B2	Memory elements with series volatile and nonvolatile switches A memory element includes a nonvolatile switch to be set to a first low resistance state by applying a voltage higher than a positive threshold voltage and to a second high resistance state by applying another voltage more negative than a negative threshold voltage. The memory element further includes a volatile switch in series with the nonvolatile switch, the nonvolatile switch to be set to a third low resistance state by applying a current higher than a threshold current and to fourth high resistance state by applying a current lower than the threshold current. A method for operating a memory array with memory elements with series volatile and nonvolatile switches is also provided.
US09214219B2	Distributed sub-page selection Described are dynamic, random-access memories (DRAM) architectures and methods for subdividing memory activation into fractions of a page. Circuitry in support of sub-page activation is placed in the intersections of local wordline drivers and sense-amplifier stripes to allow independent control of adjacent arrays of memory cells without significant area overhead.
US09214217B2	Semiconductor integrated circuit device An output signal characteristic of a differential amplifier circuit is improved. When an input data signal becomes ‘Low’, current flowing through a first transistor will decrease and potential at a connection (a node) between a first resistor and a second resistor will increase. This potential is input (negatively fed back) to the gate of a second transistor, and because this gate potential increases, a tail current amount is adjusted in an increasing direction. When the input data signal becomes ‘High’, the current of the first transistor increases and thus the potential at the node decreases. Thus, the gate potential (negative feedback) of the second transistor decreases, and the tail current amount is adjusted in a decreasing direction. Thus, in the rising and falling of an input waveform, the difference in a delay time with respect to the output waveform decreases, respectively.
US09214213B2	Magnetic memory A magnetic memory according to an embodiment includes: a magnetic layer including a plurality of magnetic domains and a plurality of domain walls, and extending in a direction; a pinning layer formed with nonmagnetic phases and magnetic phases, extending in an extending direction of the magnetic layer and being located adjacent to the magnetic layer; an electrode layer located on the opposite side of the pinning layer from the magnetic layer; an insulating layer located between the pinning layer and the electrode layer; a current introducing unit flowing a shift current to the magnetic layer, the shift current causing the domain walls to shift; a write unit writing information into the magnetic layer; a read unit reading information from the magnetic layer; and a voltage generating unit generating a voltage to be applied between the pinning layer and the electrode layer.
US09214204B2	Wordline pulse duration adaptation in a data storage apparatus Apparatus for storing data and a method of adapting a duration of a wordline pulse in an apparatus for storing data are provided. Sensor circuitry comprises a calibrated bitcell which is calibrated to use a duration of wordline pulse which matches a longest wordline pulse required by any bitcell in an array of bitcells for a successful write operation to be carried out. The duration of wordline pulse is signalled to wordline pulse circuitry, which generates a wordline pulse for the array of bitcells with this wordline pulse duration. The sensor circuitry is configured to adapt the wordline pulse duration in dependence on current local conditions in which the apparatus operates to compensate for influence of the current local conditions on the longest wordline pulse required by any bitcell in the array of bitcells.
US09214200B2	Methods and apparatus for transmitting data in a phase modulated signal derived from early and late timing signals A system includes a transmitter circuit and a receiver circuit that are coupled together through transmission lines. The transmitter circuit generates an early timing signal, a nominal timing signal, and a late timing signal. A multiplexer circuit selects between the early and the late timing signals based on a data signal to generate an encoded output signal that encodes the data signal. The nominal timing signal and the encoded output signal are transmitted through the transmission lines to the receiver circuit. The receiver circuit samples the encoded output signal in response to the nominal timing signal to generate even and odd sampled data signals. Complementary timing signals can be transmitted through transmission lines on opposite sides of the encoded output signal to provide crosstalk cancellation.
US09214199B2	DDR 2D Vref training A method is provided for performing memory operations in response to instructions to perform a double data rate (DDR) memory reference voltage training in the voltage domain by a processing device and determining a DDR memory reference voltage and a DDR memory delay time based upon the memory operation. Computer readable storage media are also provided. A circuit is provided that includes a communication interface portion coupled to a memory and to a processing device. The circuit also includes a circuit portion, coupled to the communication interface portion that has a hardware state machine or an algorithm. The state machine or algorithm provides instructions to the processing device to perform a double data rate (DDR) reference voltage training in the voltage domain.
US09214197B2	Secondary memory device and electronic system employing the same A secondary memory device includes a substrate configured to receive power from an external power source, at least one of non-volatile memory devices mounted on the substrate, a control device mounted on the substrate to control the non-volatile memory devices, and a secondary battery electrically connected to the substrate and configured to supply second power to the substrate when a power supply from the external power source is abnormally stopped.
US09214195B1	Stack bank type semiconductor memory apparatus capable of improving alignment margin A semiconductor memory apparatus is capable of improving the alignment margin for a bank and sufficiently ensuring a space for forming a global input/output line. The semiconductor memory apparatus includes a stack bank structure having at least two sub-banks continuously stacked without disconnection of data signal lines, and a control block arranged at one side of the stack bank structure to simultaneously control column-related signals of the sub-banks.
US09214190B2	Audio signal processing method An audio signal processing method includes the steps of: dividing an audio signal data stream into a plurality of selection segments; determining a target segment in the audio signal data stream, the target segment including a splice point for splicing a splice segment thereto; selecting one of the selection segments as the splice segment according to at least one parameter of the target segment; and processing the target segment and the splice segment to splice the splice segment to the target segment, and outputting a processed segment.
US09214189B2	Image editing apparatus, image editing method, and storage medium storing image editing control program An image editing method includes detecting positions of the moving object contained in the images for the stored series of images, detecting a locus of movement of the moving object based on the detected positions of the moving object contained in the series of images, specifying an image corresponding to a feature point of the detected locus of movement of the moving object, extracting, from the series of images stored in the memory, images which include the specified image and correspond to a second shooting time interval longer than the first shooting time interval, and storing the extracted series of images as an image file in a memory.
US09214187B2	Cycle-slip resilient iterative data storage read channel architecture According to one embodiment, a magnetic medium's readback signal samples are processed iteratively to provide a slip-resistant read channel by feeding the decoder output decisions back to the read channel front end where they are used to drive the decision-aided digital signal processing functions and control loops. Since data decisions provided by the decoder are typically more reliable than those provided by the detector, a significant performance improvement is obtained. A more reliable operation of the digital front-end signal processing functions in turn allows improvements to the reliability of the decoded data. Usage of Error Correcting Code (ECC) schemes that are soft decodable makes the read channel technique, described according to various embodiments herein, particularly efficient.
US09214184B2	Digital rights management system, devices, and methods for binding content to an intelligent storage device The present invention relates to digital rights management (DRM) for content that may be downloaded and bound to a storage device. The storage device may be an intelligent storage device, such as a disk drive, or network attached storage. In addition, the storage device is capable of performing cryptographic operations and providing a root of trust. In one embodiment, the DRM employs a binding key, a content key, and an access key. The binding key binds the content to a specific storage and is based on a key that is concealed on the storage. However, the binding key is not stored on the storage with the content. The content key is a key that has been assigned to the content, for example, by a trusted third party. The access key is determined based on a cryptographic combination of the content key and the binding key. In one embodiment, the content is encrypted based on the access key and stored in encrypted form in the storage device.
US09214181B2	Recording film for optical information recording medium, optical information recording medium, and sputtering target used to form said recording film Provided is a recording film for an optical information recording medium with which it is possible to meet all predetermined characteristics requirements and increase productivity while reducing the number of layers in the optical information recording medium. The present invention relates to a recording film for an optical information recording medium on which recording is performed by laser light irradiation, wherein the recording film for an optical information recording medium includes: Mn; at least one element (group X element) selected from the group consisting of Bi, Ag, Co, Cu, In, Sn, and Zn (group X); and oxygen (O). At least some of the Mn and at least some of the group X element are oxidized.
US09214176B1	PZT limiter for a micro dual stage actuated suspension A PZT limiter in a microactuator type dual stage actuated (DSA) suspension limits travel of the PZT, particularly of the cantilevered end of the PZT and particularly during non-operational shock. The PZT limiter thus limits the stresses including bending placed on the PZT during the shock event and thus helps to prevent cracking of the PZT. Additionally, by limiting displacement of the PZT, the limiter improves the mechanic and electrical performance of the suspension during operation.
US09214172B2	Method of manufacturing a magnetic read head A tunnel magnetoresistance (TMR) read sensor having a tabbed AFM layer and an extended pinned layer and methods for making the same are provided. The TMR read sensor has an AFM layer recessed from the air bearing surface, providing a reduced shield-to-shield distance.
US09214170B2	TMR device with low magnetostriction free layer A high performance TMR sensor is fabricated by employing a free layer comprised of CoNiFeB or CoNiFeBM where M is V, Ti, Zr, Nb, Hf, Ta, or Mo and the M content in the alloy is <10 atomic %. The free layer may have a FeCo/FeB/CoNiFeB, FeCo/CoFe/CoNiFeB, FeCo/CoFeB/CoNiFeB, or FeCo/CoNiFeB/CoFeB configuration. A CoNiFeBM layer may be formed by co-sputtering CoB with CoNiFeM. A 15 to 30% in improvement in TMR ratio over a conventional CoFe/NiFe free layer is achieved while maintaining low Hc and RA<3 ohm-um2. The CoNiFeB or CoNiFeBM layer has a magnetostriction (λ) value between −5×10−6 and 5×10−6.
US09214169B1	Magnetic recording read transducer having a laminated free layer A method and system provide a magnetic transducer including a first shield, a read sensor, and a second shield. The read sensor is between the first shield and the second shield. The read sensor includes a pinned layer, a nonmagnetic spacer layer and a free layer. The nonmagnetic spacer layer is between the pinned layer and the free layer. The free layer includes a plurality of ferromagnetic layers interleaved with and sandwiching a plurality of nonmagnetic layers. The plurality of ferromagnetic layers are ferromagnetically aligned.
US09214168B1	Method and system for providing a magnetic transducer having improved shield-to-shield spacing A method and system for providing a magnetic transducer is described. The method and system include providing a magnetic structural barrier layer and a crystalline magnetic layer on the magnetic structural barrier layer. The magnetic structural barrier layer may reside on a shield. The method and system also include providing a nonmagnetic layer on the crystalline magnetic layer. A pinning layer is provided on the nonmagnetic layer. Similarly, a pinned layer is provided on the pinning layer. The pinning layer is magnetically coupled with the pinned layer. The method and system also include providing a free layer and a nonmagnetic spacer layer between the pinned layer and the free layer.
US09214163B2	Speech processing apparatus and method A speech processing apparatus and method. The speech processing apparatus includes a microphone to receive a speech signal, an analog/digital converter to convert the speech signal generated by the microphone into a digital speech signal, and an automatic gain controller to calculate an average value of the magnitude of the digital speech signal generated by the analog/digital converter in a plurality of frames, to determine in which region of a speech signal band the average value is located, the speech signal band being divided into a plurality of regions according to the strength of speech, and to adjust gain according to a location of the average value on the speech signal band so that the strength of speech has a level of an optimal region capable of processing the speech signal. Accordingly, speech recognition may be maximized without being constrained by the distance of a speech source.
US09214162B2	Audio-signal correction apparatus, audio-signal correction method and audio-signal correction program Sequential digital audio signals are received to calculate a difference between each currently sampled digital audio signal and another digital audio signal sampled at one sampling period before each currently sampled digital audio signal. Differences for the sequential digital audio signals are stored. The number of digital audio signals consecutively clipped is counted in the received sequential digital audio signals. A specific difference is retrieved, from the stored differences, for a digital audio signal sampled at a specific number of sampling periods before each clipped digital audio signal. The specific number of sampling periods is determined based on the counted number of digital audio signals consecutively clipped. Each clipped digital audio signal is corrected based on the specific difference.
US09214161B2	Audio signal encoding method, audio signal decoding method, encoding device, decoding device, audio signal processing system, audio signal encoding program, and audio signal decoding program When a frame immediately preceding an encoding target frame to be encoded by a first encoding unit operating under a linear predictive coding scheme is encoded by a second encoding unit operating under a coding scheme different from the linear predictive coding scheme, the encoding target frame can be encoded under the linear predictive coding scheme by initializing the internal state of the first encoding unit. Therefore, encoding processing performed under a plurality of coding schemes including the linear predictive coding scheme and a coding scheme different from the linear predictive coding scheme can be realized.
US09214158B2	Audio decoding device and audio decoding method An audio decoding device includes a processor; and a memory which stores a plurality of instructions, which when executed by the processor, cause the processor to execute, decoding, using a first channel signal and a second channel signal included in a plurality of channels of an audio signal having a first frequency range and a second frequency range, a first prediction coefficient of the first frequency range and a second prediction coefficient of the second frequency range, both selected from a code book when prediction-encoding a third channel signal that is not subjected to prediction encoding and that is included in the plurality of channels; decoding a residual signal included in the first frequency range, the residual signal representing an error occurring in prediction encoding; and prediction-decoding the third channel signal subjected to prediction-encoding in the second frequency range from the first channel signal, the second channel signal.
US09214156B2	Method and apparatus for a multi I/O modality language independent user-interaction platform Automated user-machine interaction is gaining attraction in many applications and services. However, implementing and offering smart automated user-machine interaction services still present technical challenges. According to at least one example embodiment, a dialogue manager is configured to handle multiple dialogue applications independent of the language, the input modalities, or output modalities used. The dialogue manager employs generic semantic representation of user-input data. At a step of a dialogue, the dialogue manager determines whether the user-input data is indicative of a new request or a refinement request based on the generic semantic representation and at least one of a maintained state of the dialogue, general knowledge data representing one or more concepts, and data representing history of the dialogue. The dialogue manager then responds to determined user-request with multi-facet output data to a client dialogue application indicating action(s) to be performed.
US09214154B2	Personalized text-to-speech services A personalized text-to-speech (pTTS) system provides a method for converting text data to speech data utilizing a pTTS template representing the voice characteristics of an individual. A memory stores executable program code that converts text data to speech data. Text data represents a textual message directed to a system user and speech data represents a spoken form of text data having the characteristics of an individual's voice. A processor executes the program code, and a storage device stores a pTTS template and may store speech data. The pTTS system can be used to provide various services that provide immediate spoken presentation of the speech data converted from text data and/or combine stored speech data with generated speech data for spoken presentation.
US09214152B2	Ultrasound probe with an acoustical lens The present invention relates to an ultrasound probe (60) comprising: an ultrasound transducer (12) having an emission surface (24) for generating ultrasound waves, and an acoustical lens (12) with a first part (64) having an inner surface (66) facing the emission surface (24), wherein the inner surface (64) comprises a plurality of protrusions (74) and/or recesses (76) for scattering reflections of ultrasound waves.
US09214151B2	Receiver controller for wireless power transfer A signal generator generates an electrical signal that is sent to an amplifier, which increases the power of the signal using power from a power source. The amplified signal is fed to a sender transducer to generate ultrasonic waves that can be focused and sent to a receiver. The receiver transducer converts the ultrasonic waves back into electrical energy and stores it in an energy storage device, such as a battery, or uses the electrical energy to power a device. In this way, a device can be remotely charged or powered without having to be tethered to an electrical outlet.
US09214150B2	Continuous adaptation of secondary path adaptive response in noise-canceling personal audio devices A personal audio device, such as a wireless telephone, includes an adaptive noise canceling (ANC) circuit that adaptively generates an anti-noise signal from a reference microphone signal and injects the anti-noise signal into the speaker or other transducer output to cause cancellation of ambient audio sounds. An error microphone is also provided proximate the speaker to provide an error signal indicative of the effectiveness of the noise cancellation. A secondary path estimating adaptive filter is used to estimate the electro-acoustical path from the noise canceling circuit through the transducer so that source audio can be removed from the error signal. Noise is injected either continuously and inaudibly below the source audio, or in response to detection that the source audio is low in amplitude, so that the adaptation of the secondary path estimating adaptive filter can be maintained, irrespective of the presence and amplitude of the source audio.
US09214147B2	Audio signal distortion using a secondary audio signal for enhanced control of psycho-acoustic and musical effects A distorter is provided that allows a musician/sound engineer to affect the operation of a distortion circuit using a second musical instrument or a sound modifier, enabling the musician/audio engineer to vary the behavior of the distorter in real time. The invention enables a musician and/or sound engineer to achieve sounds and effects that are impossible to create using conventional distorters. The invention enables a user to provide a primary audio signal representing a musical instrument that is to undergo audio signal distortion; and to provide a secondary audio signal representing a sound modifier or a second musical instrument that is used to modify psycho-acoustic and/or musical effects of the audio signal distortion. An output signal is produced having substantially non-clipped parts for conveying the sound of the musical instrument, and having clipped parts for conveying psycho-acoustic and/or musical effects responsive to the second musical instrument or the sound modifier.
US09214145B2	Electronic musical instrument to generate musical tones to imitate a stringed instrument Provided are an electronic musical instrument, computer storage device, and method for generating tone. A sound source in an electronic musical instrument generates a first tone at a first pitch in response to a first tone generation instruction received by an input device of the electronic musical instrument. A second tone generation instruction is received to generate a second tone at a second pitch while generating the first tone at the sound source. A determination is made of a pitch difference of the first and the second pitches. The sound source is controlled to generate the second tone and to not generate the first tone in response to determining that the pitch difference does not exceed a predetermined number of tones. The sound source is controlled to generate the second tone in response to determining that the pitch difference exceeds the predetermined number of tones.
US09214143B2	Association of a note event characteristic Some embodiments provide a music editing application that enables a user to compose and edit note characteristics, e.g., via a touch-sensitive display. The GUI can display a portion of a music track including note events. In response to receiving a user selection of a note event and a user indication for editing a note event, the GUI can display a menu providing a list of characteristics. The characteristics can include an option for associating at least one of several virtual instruments or one of several articulations with the note event. Upon receiving a user input indicating a characteristic, the matrix editor can associate the note event with the characteristic based on the user input. The music editing application can allow the user to edit additional note characteristics (e.g., an instrument, an articulation) because of the extended capacity for data associated with each note event.
US09214141B2	Stand and cradle for double bass and cello A stand and cradle suitable for resting a bass or cello instrument upon a floor includes an angled base forming a back support and C-bout support upon which a bass or cello may be rested. The base is further supported by a pivotally coupled angled support which maintains the angle of incline of the base. In one embodiment, a pair of generally planar wood members are used to fabricated the base and angled support. In an alternative embodiment, the base is formed of a pair of tubular legs pivotally joined to together with a pivotally secured angle support also formed of a tubular member. In each embodiment, the cradle and base support is foldable to a collapsed configuration for easy storage and transport.
US09214139B2	Image display apparatus and image display method An image display apparatus has: a first image generator that defines each position between a predetermined start point and end point of a tubular structure as a first viewpoint and generates a first image obtained by observing an image of the inside of the tubular structure from each first viewpoint toward the end point; a second image generator that defines each position between the start point and the end point as a second viewpoint and generates a second image obtained by observing an image of the inside of the tubular structure from each second viewpoint toward the start point; and a user interface that is provided with an operation part, a monitor and a display controller and is configured so that, in response to an instruction from the operation part, the display controller makes the monitor display the first image and the second image.
US09214136B1	Highlighting an object in a display using a dynamically generated highlight object A particular method includes detecting an interaction event using an event capture object of a rendered display of a graphics file. The graphics file is rendered to generate the rendered display by layering one or more foreground objects over one or more background objects. The method also includes executing code associated with the graphics file in response to detecting the interaction event. The code is executed to determine information descriptive of the event capture object, to generate a highlight object corresponding to the event capture object, and to modify the rendered display to display the highlight object.
US09214134B2	Method of displaying image of display panel A display panel includes a plurality of pixels. Each of the pixels includes four sub-pixels. After the display panel receives luminance values of four sub-pixels of a pixel, the display panel compares a sub-pixel of the pixel with same color sub-pixels of neighboring pixels. If a luminance value of the same color sub-pixel of neighboring pixel is greater than the luminance value of the sub-pixel by a predetermined threshold, the luminance value of the sub-pixel of the pixel is reduced.
US09214130B2	Display device and mobile terminal A display device of at least one embodiment of the present invention is a display device of an active matrix type, and includes a display driver supplied with image data included in serial data by serial transmission. The serial data is provided with a first flag for specifying a polarity of voltage of a common electrode. The display driver extracts the first flag from the serial data in accordance with a timing of a serial clock, and performs display in accordance with the image data, while generating the voltage of the common electrode which voltage has the polarity specified by the first flag extracted. This realizes a display device capable of generating a timing signal for AC common voltage, while having a small circuit.
US09214124B1	Row driving circuit for array substrate and liquid crystal display device An n-th stage array substrate row driving unit of a row driving circuit for an array substrate is provided. The n-th stage array substrate row driving unit comprises an (n−3)-th and an (n−2)-th stage signal input terminal and a pull-up controlling unit. The pull-up controlling unit is a first thin film transistor and is connected to the (n−2)-th and a (n−3)-th stage signal input terminal. A peak voltage of the (n−3)-th stage signal input terminal is twice a peak voltage of the (n−2)-th stage signal input terminal. Thus, the threshold voltage shift of the TFT elements can be avoided, and the stability of the output can be improved.
US09214122B2	LCD device and television receiver A liquid crystal display device which carries out a single tone display with a change in pixel luminance during a single cycle composed of first to mth frame periods (m is an integer of 4 or more), includes: pixels of a first type in which when a halftone is displayed, supply of two or more kinds of data voltage during at least either the first to nth frame periods (n is an integer of 2 or more to m or less) or the (n+1)th to mth frame periods causes liquid crystal layers to produce rise responses during the first to nth frame periods and produce decay responses during the (n+1)th to mth frame periods; and pixels of a second type in which when a halftone is displayed, supply of two or more kinds of data voltage during at least either the first to nth frame periods or the (n+1)th to mth frame periods causes liquid crystal layers to produce decay responses during the first to nth frame periods and produce rise responses during the (n+1)th to mth frame periods. This makes it possible to achieve both an improvement in viewing angle characteristic and a reduction in flickers.
US09214116B2	Display panel having a transparent subpixel connected to a first gate line with a first transistor and a second gate line adjacent to the first gate line with a second transistor and a display apparatus having the same A display panel includes a first color subpixel, a second color subpixel and a transparent subpixel. The first color subpixel is connected to a first gate line. The second color subpixel is connected to the first gate line. The transparent subpixel is connected to the first gate line and a second gate line adjacent to the first gate line.
US09214115B2	Display device A display device includes a substrate having an image display area, pixel electrodes formed in the image display area of the substrate, a common electrode formed in the image display area of the substrate, inside signal lines formed inside the image display area of the substrate and electrically connected to the pixel electrodes, outside signal lines formed outside the image display area of the substrate and electrically connected to the inside signal lines, and a common line formed inside and outside the image display area of the substrate and electrically connected to the common electrode. A coupling capacitance is formed between the inside signal lines and the common electrode. The outside signal lines include a first portion, and a second portion that is higher in electric resistance than an electric resistance of the first portion, and the second portion has a bend.
US09214114B2	Method for adjusting gamma curve and gamma voltage generator and display control system therof A method for adjusting a gamma curve used in a display control system of a display apparatus, and the method comprises steps of: analyzing each sub pixel gray value distribution of each color in a frame; and adjusting at least a gamma reference voltage according to the sub pixel gray value distribution of the color, such that a gray level voltage number corresponding to the sub pixel gray values in at least a predetermine region which has the relative large statistical number or ratio is increased, and a gray level voltage number corresponding to the sub pixel gray values in at least a predetermine region which has the relative low statistical number or ratio is decreased.
US09214108B2	Self-luminous display apparatus, peak luminance adjustment apparatus, electronic apparatus, peak luminance adjustment method and program A self-luminous display apparatus, a peak luminance adjustment apparatus is disclosed wherein power to be consumed by a self-luminous display panel is compulsorily suppressed to a level within a prescribed range and consequently the life of a battery is maintained. A mean gradation value calculation section calculates a mean gradation value of a video signal inputted within a period of one frame. A power consumption calculation section determines a standard peak luminance corresponding to the calculated mean gradation value and calculates a power consumption amount to be consumed based on the standard peak luminance and the calculated mean gradation value. A peak luminance adjustment section adjusts the standard peak luminance so that a total value of the power consumption to be consumed within a fixed period of time may not exceed a preset power amount.
US09214103B2	Modular sign system A sign system comprises one or more box-like modules having a front section and a corresponding rear section sized to fit together in sliding engagement to define an interior cavity. The sections may be joined together with fasteners which engage the side panels of each section thereby leaving the front and rear surfaces free of discontinuities. The sign modules may be affixed to a generally planar surface or supported on internal or external mounting posts. During installation, the rear section may be mounted first and the front section subsequently attached to the rear section. In this way only approximately one-half of the total weight of the sign need be lifted and manipulated at any one time thereby facilitating installation. The interior cavity defined by the front and rear sections may accommodate lighting means for internally lighting the sign.
US09214101B2	Backlit graphic display device A graphic display device illuminates interchangeable graphic panels and is mountable to a translucent mounting surface. The graphic display device includes a housing assembly, a light guide assembly, and select device support structure. The housing assembly includes a housing back, a housing front, and peripheral housing edging. Together, the housing back and housing edging define an assembly-receiving volume. The light guide of the light guide assembly is positionable within the assembly-receiving volume for guiding light from the light source in an anterior direction. The device support structure alternatively fasten the graphic display device to a translucent mounting surface or support the device upon a support surface adjacent a window such that the light from the light source is guided in an anterior direction through the window.
US09214099B2	Map data, map data production method, storage medium and navigation apparatus A map data production method is disclosed. The method includes: dividing a record target map area into meshes; creating mesh-unit data elements as groups of mesh-unit data elements so that the groups respectively correspond to the meshes, and each group of mesh-unit data elements describes information on map components of a corresponding one of the meshes in such manner that mesh-unit data elements in the each group respectively describes the information on the map components; creating data files, through (i) organizing, according to map component type, the mesh-unit data elements into sets of mesh-unit data elements and (ii) respectively storing the sets of mesh-unit data elements, each set having a same map component type, in the data files; and creating map data from the plurality of data files.
US09214096B2	System and method for seizure simulation in health training mannequin One embodiment is directed to a seizure simulation system, comprising a motion inducer comprising a housing, an interface structure, and an actuator; wherein the interface structure is coupled to the actuator, movable relative to the housing, and configured to interface with a portion of a health training mannequin, from a position external to the health training mannequin, to induce motion in at least one portion of the health training mannequin.
US09214095B2	Surgical simulation model generating method, surgical simulation method, and surgical simulator A surgical simulation model generating method includes: a first process in which a computing unit acquires geometrical information of an organ from a medical image stored in a storage unit, including an image of the organ, and generates volume data for the organ; a second process in which, after the first process, the computing unit forms nodal points by meshing the organ represented by the generated volume data; a third process in which the computing unit generates a simulated membrane that covers the organ represented by the volume data meshed in the second process; and a fourth process in which the computing unit generates a simulated organ by drawing an imaginary line so as to extend from each nodal point formed on a surface of the organ represented by the volume data meshed in the second process in a direction that intersects the simulated membrane and thereby forming a membrane nodal point at a point where the imaginary line intersects the simulated membrane generated in the third process, and by arranging on each imaginary line an imaginary inter-membrane spring that connects between the nodal point formed on the surface of the organ and the membrane nodal point, while also arranging an in-plane spring that connects between adjacent membrane nodal points on the simulated membrane.
US09214085B2	Vehicle gateway device A vehicle gateway device is provided in a vehicle and can update information acquired by communication with outside the vehicle. The vehicle gateway device determines whether the update information acquired by communication with outside the vehicle is information for a vehicle system related to vehicle control, records and manages the update information when it is determined that the update information is information for the vehicle system, and transmits the update information to an information processing unit when it is determined that the update information is not information for the vehicle system. In this way, a recording medium with low memory capacity can be used to update information and information update management can be simplified.
US09214084B2	Smart traffic sign system and method A system for increasing awareness of a driver to traffic-signs on the road is provided herein. The system includes: a sensor attached to a vehicle and configured to determine a type of one or more traffic-signs that are present in a scene containing the vehicle, wherein at least some of the traffic-signs are time-variant traffic-signs which present time-variant visual indicators; and a controller configured to: monitor and analyze, in real time: relative metrics indicative of one or more spatial relations between the vehicle and the one or more detected traffic-signs; and temporal data associated with the time-variant visual indicators of the time-variant traffic-signs; apply one or more decision functions to at least two of: the detected one or more traffic-signs and to the monitored relative metrics, and the temporal data associated with the time-variant visual indicators, so as invoke an action selected from a predefined set of actions.
US09214082B2	System and method for alarm system tamper detection and reporting An alarm system for detecting and reporting “smash and crash” intrusions is described. The alarm system includes a plurality of intrusion sensors and a security alarm panel in communication with each of the plurality of intrusion sensors at the site of the alarm system. An alarm gateway is provided remote from the security alarm panel, the alarm gateway monitoring the status of the security alarm panel for indications of tampering. A central station is in communication with the alarm gateway and monitors the status of the alarm system, where the alarm gateway sends an alarm condition to the central station when tampering at the security alarm panel is detected.
US09214078B1	Individual activity monitoring system and method An individual activity monitoring system comprises a microphone configured to receive sounds and convert them to audio signals, a memory configured to store recorded audio signal patterns of water flow events, and a microprocessor coupled to the microphone and configured to receive the audio signals, compare the audio signals to the recorded audio signal patterns, and recognize whether the audio signals represent a water flow event. The microprocessor is configured to reset a reset clock in response to a recognized water flow event, and being further configured to issue an alert notification in response to an absence of a subsequent water flow event after the reset clock exceeds a preprogrammed time period since a last recognized water flow event.
US09214074B1	Video monitoring system for a path A number of monitoring devices are directed at a path. A controller is electrically coupled to the number of monitoring devices. The controller may be configured to cause video captured by each of the number of monitoring devices to be displayed and/or stored in response to determining that an image of a carrier that was previously present in an image field captured by a first monitoring device of the plurality of monitoring devices that is directed at a starting location of the path is absent from image field captured by the first monitoring device. Alternatively, the controller may be configured to determine whether the carrier travels between successive locations of the path within a certain length of time and to indicate a timing violation when the carrier fails to travel between the successive locations of the path within the certain length of time.
US09214070B2	Gaming machine conducting indication effect A gaming machine randomly determines symbols to be rearranged on a reel unit in a game in a normal mode, based on a predetermined probability. The gaming machine determines whether the determined symbols include a chance symbol. When it is determined that the symbols include a chance symbol, the gaming machine randomly determines an expecting degree and conducts the shifting to a chance mode. In the game in the chance mode, the gaming machine randomly determines the symbols to be rearranged on the reel unit based on the probability corresponding to the determined expecting degree. When the game is run for a predetermined number of times, the gaming machine ends the chance mode.
US09214069B2	Gaming machine and method of providing an electronic game A gaming machine and method are provided which provide a plurality of games on a display device to a player. The outcome of the games are randomly selected and displayed on the display device. For each game: if the outcome is a winning outcome an award is awarded to the player as a function of the outcome, the wager made by the player, and a predetermined paytable and if a triggering condition in the outcome of each game, an other award is responsively awarded to the player if the triggering condition is detected in at least two of the plurality of games.
US09214068B2	Gaming system and method providing a multi-player bonus game One embodiment provides a gaming system having a plurality of gaming devices. Each of the gaming devices enables a player to make wagers on plays of a primary game. For each gaming device, for each occurrence of a designated accumulation outcome, the player of that gaming device accumulates one or more positions on a bonus game display matrix. When a bonus game trigger occurs, the triggering gaming device is identified. In the bonus game, a plurality of symbols are displayed in the plurality of positions of the bonus game display matrix. The player of the triggering gaming device is provided with any awards associated with any winning symbol combinations formed by the displayed symbols. Additionally, for each assigned position of the bonus game display matrix that displays a symbol which is part of a winning symbol combination, a participation award is provided to the player assigned to that position.
US09214063B2	System and method of revealing the outcomes of real world wagers through escalating reveals The invention relates to systems and methods of selecting and placing real-world wagers responsive to one or more wager triggers, obtaining outcomes of the real-world wagers, facilitating user interactions with various interactive media, and revealing the outcomes of the real-world wagers through the interactive media to give an appearance that the outcomes of the real-world wagers resulted from the user interactions even though the outcomes resulted from the real-world wagers and were determined before the user interactions. The system may reveal a single outcome (or other value) using a reveal staircase, in which the outcome is split into different increments each having a different value. In an implementation, the different increments may be revealed randomly or in order of their value. For example, a ten dollar payout may be revealed using four fifty cent reveals, three one dollar reveals, one two dollar reveal, and one three dollar reveal.
US09214059B2	Lighting assembly for reel slot machine A lighting assembly for a reel slot machine includes an interface board and a flexible printed circuit board (PCB). The interface board is substantially planar, electrically couplable to the reel slot machine, and includes a first electrical connection plug and a second electrical connection plug spaced from the first electrical connection plug. The flexible PCB defines a first end and a second end, the first end and second ends of the flexible PCB are electrically coupled to the first electrical connection plug and the second electrical connection plug, respectively. The flexible PCB bows away from each of the first and second ends to define a bowed primary face facing away from the interface board. The flexible PCB further comprises a plurality of light sources coupled to the bowed primary face. During use, the plurality of light sources selectively illuminate to provide lighting to a reel of the reel slot machine.
US09214057B2	System gaming A system provides a player tracking system and system gaming apparatus for playing non-base games by funding the credit side of a gaming cycle. The system further includes at least one gaming device having a base game. The player tracking system and system gaming apparatus includes a player tracking user interface. The player tracking user interface provides a player with an opportunity to select and play a non-base game that may be promotional-funded or player-funded.
US09214050B2	Bill counter with a detector A bill counter has two side panels, a bill-in part, a bill-out part, and a detector. The detector has a reflecting board, a lighting element, and an image capturing device. When the bill counter is in use, the lighting element flashes upon the passing of a bill. The reflecting board reflects the flash to uniformly illuminate the bill, and the image capturing device takes images at the same time. Because the image capturing device does not need to be located near the bill, even when the bill is moved slightly by shock, the images taken do not distort greatly, which prevents identification failure. Besides, the image capturing device eliminates the problem of image dragging, such that a mechanism of the bill counter can be simplified and a production cost is reduced.
US09214048B2	System for feeding banknotes to a banknote transporting unit with the aid of a docking station The invention relates to a system (10) for removing banknotes from at least one banknote transporting unit (12) and/or for feeding banknotes to the banknote transporting unit (12). The system (10) has a docking station (14) comprising a receiving area (16) secured by a safe for receiving the banknote transporting unit (12) and a control unit (28) for controlling the docking station (14).
US09214047B2	Equipment for the storing of values in sack and respective method for the account and transport of the stored values An equipment (21) for the storing of values (23) as banknotes, checks and other documents in sack, comprising one or two filling and sealing units (26a, 26b) for a value sack or value sacks (24a, 24b) to be closed irreversibly, and which is coupled to an interface unit (31) of a deposit and withdrawal machine (22). A transfer safe (27) lodges the filling and sealing unit or units and the value sacks and an introduction unit (42) is connected with the interface unit (31) for transferring the values. The introduction unit (42) includes a stacking device (43) for the values (23) to be stored in sack, a bundling device (44) for bundling the formed stacks and a moving and transferring mechanism (46) for shifting the stacks between the stacking device, the bundling device and the filling and sealing unit or units. A method for making easier and accelerating the operations of account and transport of the stored values is also described.
US09214045B1	Flash memory express erase and program A mechanism for express storage of sensor data in response to an indication of a power fluctuation, power brownout or blackout that can affect operation of a microcontroller is provided. Embodiments provide a flash memory having memory space allocated to express storage of the sensor data, and a protocol machine configured to provide the desired information to reserved registers associated with express program/erase operations accessing the allocated memory space.
US09214038B1	Efficiently implementing and displaying independent 3-dimensional interactive viewports of a virtual world on multiple client devices Methods, apparatuses and systems directed to efficiently circumventing the limitations of client side rendering of virtual worlds. In a particular implementation, a proposed system renders each client viewport remotely, removing the burden of rendering a 3D scene from the local client device. 3D viewports, rather than being rasterized on the local client, are instead generated on a remote render device which then transmits a visual representation of the viewport to the client device in a format (including, but not limited to a video stream) which the client can use to display the scene without requiring complex 3D rasterization. This process eliminates the need for the client to have any specialized 3D rendering software or hardware, or to install or download any persistent render assets on the local system. The hardware requirements for the client are therefore roughly equivalent to those needed to play a continuous video stream.
US09214037B2	Method and system for distributing images to client systems A method and system for distributing images for display by client systems. A distribution system includes an image server system that is connected to image client systems via a communications link, such as the Internet. The image server system is responsible for providing image packages to the image client systems and for collecting information from the image client systems. Each image client system periodically sends a heartbeat communication to the image server system. Upon receiving a heartbeat communication, the image server system determines the state of the image client system that sent the heartbeat communication and responds appropriately. The response may include instructions for the image client system to retrieve new images, to retrieve software updates, to send usage data, and so on.
US09214032B2	Interactive guest image capture using video wall/floor/ceiling displays for selections of background scenes, and selection/distribution of customized Systems and methods for creating and distributing professional quality pictorial souvenirs giving the illusion that guests of a facility were imaged at other locations, including making initial arrangements with guests, showing selections of background scene images at video displays and flashing chroma key images interspersed with frames of the scene images, taking key guest images in synch with the flashed key images, extracting guest image content from the key guest images and merging into selecting scene images, showing initial merges images for guest selection and providing souvenir portfolios that include merged images to guests or designees after making financial arrangements, including for payment to third parties for copyright content included in the souvenirs and with advertisers for promotional material included in the souvenirs.
US09214029B2	Method and system for image segmentation Method and system is disclosed for image segmentation. The method includes acquiring a digital image, constructing a graph from the digital image, calculating a plurality of cost functions, constructing an electrical network based upon the constructed graph and the plurality of calculated cost functions, simulating the electrical network using fixed-point linearization, and segmenting the image using the simulated electrical network to produce segmented layers. Simulation may be executed in parallel to achieve desirable computational efficiencies.
US09214028B2	Method for segmenting a three-dimensional image data set, corresponding computer program and corresponding system The present invention relates to a method for segmenting a three-dimensional image data set, comprising the steps of: a) providing a three-dimensional image data set of a body structure, which is to be segmented, and a generic model of the body structure; b) generating synthetic two-dimensional image data sets on the basis of the three-dimensional image data set of the body structure provided in a); and c) pre-positioning the generic model in relation to the three-dimensional image data set of the body structure provided in a); and e) generating a three-dimensional model of the body structure by fitting the generic model to the synthetic two-dimensional image data sets of the body structure, generated in step b).
US09214022B1	Enhanced accuracy for tracking tethered airborne vehicles Wind energy systems, such as an Airborne Wind Turbine (“AWT”), may be used to facilitate conversion of kinetic energy to electrical energy. An AWT may include an aerial vehicle that flies in a path to convert kinetic wind energy to electrical energy. The aerial vehicle may be tethered to a ground station with a tether that terminates at a tether termination mount system. In one aspect, the tether termination mount system may include a tether termination unit configured in one or more gimbals that allow for the tether termination unit to rotate about one or more axes while tracking the aerial vehicle in flight. In a further aspect, the tether termination mount system may include an imaging device configured for imaging the aerial vehicle during flight in order to enhance tracking accuracy over that which is performed by angular motion of the tether termination unit.
US09214020B2	Method and apparatus for orienting image representative data A method for processing a three-dimensional image file captured directly from a live subject, the file including the cranium of the subject, comprises: providing a vertex point cloud for the three-dimensional image file; determining a median point for the vertex point cloud; determining a point on the cranium; and utilizing the median point and the cranium point to define a z-axis for the three-dimensional image file.
US09214018B1	Method for remote rework imaging for part inconsistencies A method for reworking an inconsistency on a part. A location of the inconsistency is identified for the part in a model of the part. An image is generated for a rework for the part. The image is projected for the rework on the part based on the location identified for the inconsistency. The rework is performed for the inconsistency on the part using the image projected on the part.
US09214017B2	Coffee machine and brewing assembly for a coffee machine A brewing assembly for a coffee machine, which brewing assembly includes a brewing module with a brewing head, an upper and lower closure element, and a drive module with at least one linear guide element. The brewing head has a cylindrical brewing chamber, which can be closed by the upper and lower closure elements and cooperates with the linear guide such that the brewing head is displaceable linearly in the brewing assembly. The drive unit also includes a motor drive for the linear guide element. The brewing head and at least one of the two closure elements with at least a brewing chamber are arranged in the brewing module in a linearly displaceable fashion. The brewing module is arranged detachably in or on the drive unit such that when it is in or on the drive unit at least the brewing head is linearly displaceable via the linear guide element.
US09214015B2	System for image enhancement A system for image enhancement includes a computer receiving an input image, and modifies the entire range of frequencies of the image, wherein the modifying is greater for the lower frequency aspects of the input image relative to the higher frequency aspects of the input image based upon a brightening process that is based upon a brightening selection, where the brightening selection is based upon a backlight level of a display to display the input image. The computer modifies the higher frequency aspects of the input image based upon an enhancement process that is based upon the brightening selection which is based upon the backlight level of the display. The computer combines the modifies image based upon the brightening process and the modified image based upon the enhancement process.
US09214014B2	Motion compensation in a three dimensional scan The present disclosure provides computing device implemented methods, computing device readable media, and systems for motion compensation in a three dimensional scan. Motion compensation can include receiving three-dimensional (3D) scans of a dentition, estimating a motion trajectory from one scan to another, and calculating a corrected scan by compensating for the motion trajectory. Estimating the motion trajectory can include one or more of: registering a scan to another scan and determining whether an amount of movement between the scans is within a registration threshold; determining an optical flow based on local motion between consecutive two-dimensional (2D) images taken during the scan, estimating and improving a motion trajectory of a point in the scan using the optical flow; and estimating an amount of motion of a 3D scanner during the scan as a rigid body transformation based on input from a position tracking device.
US09214009B2	Image registration device and method, image segmentation device and method and medical image apparatus The present invention provides an image registration device and method, an image segmentation device and method and a medical image apparatus. The image registration device includes: a rigid registration unit for performing a rigid registration of a first input image with a second input image, which is a reference, to obtain first deformation information; a first non-rigid registration unit for performing a first non-rigid registration of the first and second input images by taking the first deformation information as the initial deformation information to obtain second deformation information; and a second non-rigid registration unit for performing a second non-rigid registration of the first and second input images by taking the second deformation information as the initial deformation information to obtain third deformation information. By combining rigid registration with non-rigid registration, the present invention realizes a fast image registration.
US09214006B2	Hidden surface removal in graphics processing systems Early depth test stages of a graphics processing pipeline broadcast information about fragments having conditional discard tests associated with them and that pass those early depth tests to other stages in the pipeline. The other stages in the pipeline use the early depth test pass information to determine if the processing of any fragments that they are currently processing can be slowed down. If a fragment that triggered the slowing down of the processing of fragments that are already in the pipeline passes all the conditional discard tests it is to be subjected to, a signal that triggers stopping of the processing of the fragments whose processing it had previously slowed down is sent. If the fragment fails a conditional discard test it is to be subjected to, a signal triggering the reviving of the processing of the fragments whose processing it had previously slowed down is sent.
US09214005B2	Methods and systems for overriding graphics commands Disclosed are “graphics overrides.” An override accepts a stream of graphics commands as produced by an application and then modifies the stream before it is rendered by the GPU. Different overrides perform different modifications. One override can modify a stream of graphics commands in response to another stream. Overrides can enforce conformity with a visual paradigm and, by being modified, can support a change to that paradigm without requiring the applications to change. Overrides can monitor the entire computing environment and improve the response to that environment of a particular application: For example, an override monitors frames as they are produced by an application. If the application cannot keep up with a fixed frame rate, then the override produces “synthetic” frames to take the place of missing frames. Overrides are not restricted to fixing existing problems. Rather, applications can be developed that depend upon the presence of overrides.
US09214004B2	Watermarking and scalability techniques for a virtual desktop planning tool A method for measuring performance of virtual desktop services offered by a server including a processor is described. A first encoded watermark is embedded into user interface display generated by a virtual desktop when initiating an operation. The first encoded watermark includes pixels identifying the operation and indicating its initiation. A second encoded watermark is embedded into the user interface upon completion of the operation indicating completion of the operation. An action performance time is then computed and stored in a memory. Multiple performance times may be compiled from multiple operations of multiple virtual desktops to assess the performance of the system as a whole.
US09214001B2	Automatic contact center agent assistant A method and apparatus are provided for presenting information to an agent of an organization. The method includes the steps of the organization detecting a contact with a client of the organization, classifying the contact based upon information delivered along with the contact and delivering the contact to the agent. The method further includes the steps of retrieving a set of reference key words and key words in context based upon the classification of the contact, detecting keywords and keywords in context from a dialog between the agent and client, matching at least some of the detected keywords and key words in context with the reference keywords and keywords in context, identifying information within a database based upon the matching and presenting the identified information to the agent.
US09213996B2	System and method for analyzing social media trends Disclosed are methods for identifying topical experts from a seed set of experts by identifying “second tier” influencers for the topic. New concepts detected among a pool of experts and second tier influencers are monitored among the general population and their significance evaluated. Reports may be generated for these detected trends. Trends in social media for a concept represented in a taxonomy may be detected by monitoring content for descendent nodes for the concept. Correlations between social media activity with respect to the concept and sales of products corresponding to the concept may be made and sales predicted for the same or different products that correspond to descendants of the concept in the taxonomy.
US09213994B2	Systems and methods for quantifying flood risk In various embodiments, a flood risk score may be determined for a property point that provides a comprehensive assessment of the property point's risk of flooding. Determining the flood risk score may include determining a flood risk characteristic for the property point and assigning a flood risk score that corresponds to the flood risk characteristic. In some embodiments, flood risk characteristics may include a difference in elevation between the elevation of the property point and an elevation of a calculated point (e.g., on a known flood risk zone boundary). Flood risk characteristics may also include a flood zone determination for the property point and/or proximity of the property point to a known flood risk zone boundary or a flood source. In some embodiments, flood risk scores may be provided on flood risk score reports.
US09213993B2	Investment, trading and accounting management system Systems and methods to manage investments, trades, and financial accounting. The integrated system processes an investment under various investment groups and accounting methodologies, such as GAAP, SAP, Tax, and. Trade. An investment is processed based on events occurring during the life of the investment for each accounting method to provide for accurate financial reporting in accordance with the one or more accounting methods, such as GAAP, SAP, and Tax accounting. The system is flexible to calculate cash flow, yield, and amortization for an investment during the lifespan timeline of the investment based on the occurrence of an event (or a hypothetical event) during the lifespan timeline of the investment. Accurate reporting is provided by effective dating events of an investment to the appropriate reporting period. The system provides for consolidation, e.g., the aggregation of income and assets from a set of portfolios to report them as one group.
US09213991B2	Re-Ranking item recommendations based on image feature data An apparatus and method to adjust item recommendations are disclosed herein. A first image attribute of a query image is compared to a second image attribute of each of a plurality of inventory images of a plurality of inventory items to identify the inventory items similar to the query image. Item recommendations comprising the identified inventory items in a first listing order are provided for display at a remote device. A second listing order of the identified inventory items is determined based on a user preference for a particular one of the identified inventory items. At least the second listing order is provided to the remote device for re-display of the item recommendations in accordance with the second listing order.
US09213990B2	Method of reducing financial fraud by user devices patronizing commercial websites A real-time fraud prevention system enables merchants and commercial organizations on-line to assess and protect themselves from high-risk users. A centralized database is configured to build and store dossiers of user devices and behaviors collected from subscriber websites in real-time. Real, low-risk users have webpage click navigation behaviors that are assumed to be very different than those of fraudsters. Individual user devices are distinguished from others by hundreds of points of user-device configuration data each independently maintains. A client agent provokes user devices to volunteer configuration data when a user visits respective webpages at independent websites. A collection of comprehensive dossiers of user devices is organized by their identifying information, and used calculating a fraud score in real-time. Each corresponding website is thereby assisted in deciding whether to allow a proposed transaction to be concluded with the particular user and their device.
US09213976B2	Multi application smartcard with currency exchange, location, tracking and personal identification capabilities A smart card capable of performing more than one function, said smart card comprising a first memory means comprising a first set of data to access a bank account, a second set of data to access a credit card account, a third set of data representing the identification of a holder of the smart card, and a fourth set of data to access telephone communication services. The smart card further comprises a microprocessor, said microprocessor being in electrical communication with a second memory means, and a location tracking means for determining a location of the smart card.
US09213974B2	Remote revocation of application access based on non-co-location of a transaction vehicle and a mobile device Embodiments of the invention relate to an invention for accessing a remotely located mobile device of a user based on certain events. The system, method, and computer program product are configured to: (a) monitor one or more transaction involving a transaction vehicle of a user; (b) determine a physical location of a transaction vehicle based at least partially on the one or more transactions; (c) determine a geographic location of a mobile device of the user, wherein the mobile device is associated with the transaction vehicle; (d) determine whether or not the transaction vehicle of the user and the mobile device of the user are co-located; and (e) reconfigure one or more applications accessible to the mobile device or one or more functional features of the mobile device based at least partially on determining that the mobile device and the transaction vehicle of the user are not co-located.
US09213973B2	Car wallet application Embodiments of the disclosure generally relate to systems and methods for processing electronic payments for retail services and goods delivered by a retail establishment. In embodiments, a mobile wallet application is installed in the automobile. The automobile wallet application can receive and/or send transaction and payment information over a near field communication system to a retailer and on to an authorizing authority. The authorizing authority receives the payment and transaction information, authorizes or declines the payment of the transaction, and forwards the authorization or declination to the automobile wallet application. If authorized, the retailer provides the retail good or service.
US09213970B1	Processing of co-mingled paper correspondence Aspects of the disclosure relate to providing apparatus and methods for processing co-mingled paper correspondence received at a central location. Apparatus and methods provide an ability to co-mingle paper correspondence and corresponding digital images of the paper correspondence. Apparatus and methods provide an ability to translate transaction information extracted from the co-mingled correspondence to a payment time. Apparatus and methods provide may utilize custom scan templates to improve a reliability and accuracy of information extracted from co-mingled correspondence.
US09213969B2	Transmitter, receiver, transmitting method, receiving method, communication system, communication method, program, and computer-readable storage medium To provide a technique for making it possible to perform proximity communication using an apparatus not including a special proximity communication device. Transmission data is acquired. Output sound data of a PCM format obtained by encoding the transmission data is output, the output sound data indicating sound in an inaudible frequency band. A DA converter is caused to convert the output sound data, whereby a speaker is caused to output sound corresponding to the output sound data. The output sound data indicates sound having a plurality of sections with sound and soundless sections between the adjacent sections with sound according to the transmission data and that the output sound data indicates a sine curve in which the amplitude of the sections with sound increases from a start time and decreases after reaching a maximum.
US09213968B2	Systems and methods for conducting financial transactions using non-standard magstripe payment cards Systems and methods for conducting financial transactions using non-standard magstripe payment cards are provided. One such system includes a magnetic stripe card storing information including a serial number on a magnetic medium of the magnetic stripe card, where the stored information does not include a Primary Account Number, a card reader configured to extract information from the magnetic medium, the extracted information including the stored serial number and a magnetic fingerprint including an intrinsic magnetic characteristic of the magnetic medium, and a computer coupled to the card reader and to a server, where the computer and the server are configured to execute a requested financial transaction using the extracted information.
US09213967B1	System and method for a frame-based internet enabled user interface A system and method for a frame-based internet enabled interface. In one embodiment, a system is disclosed for a client-side frame based internet enabled interface. The system comprises a first frame and a second frame in a window. The first frame encapsulates a resource from a third-party internet based service. The resource is requested by a user through an internet enabling software. In addition, the second frame comprises user-specific information that is related to content provided from the resource.
US09213966B2	Regulation compliant data integration for financial institutions A method to access financial data. The method includes redirecting, by a computer processor and based on an input of a user, the user to a website of a financial institution (FI), wherein the user submits a request via the website to access the financial data, obtaining, in response to the user submitting the request, a token identifying the request, identifying, by the computer processor, a financial data structure in a remote repository based on the token, wherein the FI stores a financial data record in the financial data structure in response to the request, and retrieving, without user intervention, the financial data record from the financial data structure, wherein the financial data record is used by a financial management application to prepare a financial management report for the user.
US09213961B2	Systems and methods for generating social index scores for key term analysis and comparisons In one aspect, the present disclosure relates to a method, in a computer network, for generating social index scores associated with key terms within web-based social network sites. Generally, the method comprises the steps of receiving an input of the key terms from a user, generating search queries from the key terms, providing the generated search queries to the web-based social network sites, capturing search results received from the web-based social network sites in response to the provided search queries, generating, from the captured search results, the social index scores using a processing algorithm, storing the generated social index scores in at least one database, and, providing at least one representation of the generated social index scores to the user in one or more of numerical, visual, and printed form.
US09213957B2	Computer-implemented system and method for providing just-in-time loading zone parking A computer-implemented method for system and method for providing just-in-time loading zone parking is provided. A next delivery destination for a delivery driver is determined. A just-in-time parking reservation at the next delivery destination is booked. The just-in-time parking reservation includes a parking location and start time. A time of arrival by the delivery driver at the parking location is estimated. An amount of time between the estimated time of arrival and the start time of the just-in-time parking reservation is determined. Parking in the parking location by other drivers is permitted when the estimated time of departure is sufficiently prior to the start time of the just-in-time parking reservation.
US09213956B2	Algorithm for predicting and mitigating adverse events A patient support apparatus includes a control system operable to gather physiological information about a patient supported on the patient support apparatus. The information may be gathered from sensors, a user interface, or a hospital information system. The control system also monitors operating parameters of the patient support apparatus and environmental conditions in the patient room. The control system utilizes the data gathered to identify a risk of an adverse event occurring to a patient supported on the patient support apparatus. The patient support apparatus is also operable to modify patient support apparatus parameters or environmental conditions to mitigate the risk of the adverse event.
US09213948B2	System and method for process data management and organization A system and method for process data management and organization is provided. An embodiment includes an apparatus for updating a process. The apparatus includes a storage device capable of storing a prospect database. The apparatus is operable to receive a prospect record from the stored prospect database. Once the prospect record is obtained, the apparatus can determine a process stage associated with the prospect record, and identify an available action associated with the stage which can be received from the storage device. The apparatus is operable to trigger the performance of the determined action and receive resulting data. Accordingly, the stage associated with the prospect record can be updated by the apparatus.
US09213944B1	Trio-based phasing using a dynamic Bayesian network Performing trio-based phasing includes: obtaining a set of preliminary phased haplotype data of an individual; establishing a dynamic Bayesian network based at least in part on the set of preliminary phased haplotype data of the individual and phased haplotype data of at least one parent of the individual; and determining, based on the dynamic Bayesian network, a set of refined haplotype data of the individual.
US09213943B2	Parameter inference method, calculation apparatus, and system based on latent dirichlet allocation model A parameter inference method to solve a problem that precision of a Latent Dirichlet Allocation model is poor is provided. The method includes: calculating a Latent Dirichlet Allocation model according to a preset initial first hyperparameter, a preset initial second hyperparameter, a preset initial number of topics, a preset initial count matrix of documents and topics, and a preset initial count matrix of topics and words to obtain probability distributions; obtaining the number of topics, a first hyperparameter, and a second hyperparameter that maximize log likelihood functions of the probability distributions; and determining whether the number of topics, the first hyperparameter, and the second hyperparameter converge, and if not, putting the number of topics, the first hyperparameter, and the second hyperparameter into the Latent Dirichlet Allocation model until the optimal number of topics, an optimal first hyperparameter, and an optimal second hyperparameter that maximize the log likelihood functions of the probability distributions.
US09213941B2	Automatic actions based on contextual replies A computing device includes at least one processor and at least one module, operable by the at least one processor to receive an communication, determine, based at least in part on the communication, one or more candidate responses to the communication, and receive an indication of user input that selects a candidate response from the one or more candidate responses. The at least one module may be further operable by the at least one processor, responsive to receiving the indication of user input that selects the candidate response, to send the candidate response, determine, based at least in part on at least one of the candidate response and the communication, an operation that is contextually related to the candidate response, and execute the operation.
US09213939B2	Dynamic determination of needed agent rules A method for updating rule statistics in an execution environment by an agent that utilizes a rule engine, comprising collecting an activation statistic when a rule is activated, collecting a firing statistic when a rule is fired; and storing the activation statistic and the firing statistic in a rule history once processing by the rule engine is complete.
US09213938B2	Systems and methods for estimating pose In one embodiment, a method for estimating pose includes generating hypotheses for a pose component under consideration, identifying a mode of a probability mass function associated with the hypotheses, extracting low-noise hypotheses, and averaging the low-noise hypotheses to obtain a pose component estimate.
US09213933B2	Secure value tokens The present invention provides value tokens having improved security while achieving enhanced decorative effects, contrasting edge “spots”, increased physical weight, and flexibility of construction and design. Stacked structures formed from pluralities of layers are featured.
US09213931B1	Matrix barcode enhancement through capture and use of neighboring environment image A method of enhancing a matrix barcode with environment image. The method comprises generating, by a server, an original matrix barcode based on source information, capturing, by a camera, an image of the original matrix barcode in a graphic environment comprising the matrix barcode and at least part of the graphic environment information, and parsing the image to obtain the source information and the at least part of the graphic environment information. The method further comprises generating a key based on the at least part of the graphic environment information, encrypting the source information with the key to obtain encrypted source information, encoding the encrypted source information into a first matrix barcode, and encoding the key into a key matrix barcode.
US09213929B2	Pattern printed sheet The pattern printed sheet 1 of the present invention includes a substrate 2 and a non-visible light-reflective transparent pattern 3 printed on a surface of the substrate, wherein an ink for forming the transparent pattern 3 contains a non-visible light-reflective material capable of selectively reflecting a light having a wavelength in a non-visible light range, and the transparent pattern 3 printed on the surface of the substrate 2 has a multilayer structure in section which is repeated at predetermined intervals as observed by a scanning electron microscope, and reflects only a circular polarization component in a predetermined rotation direction relative to an incident light applied thereto. The pattern printed sheet is usable as a coordinate detecting means which is applicable a data input system of a type capable of directly hand-writing input data on an image screen of a display device, and has a reduced weight and a low price, and is readily obtained in the form of a large area sheet and can be mass-produced.
US09213925B2	Information processing apparatus, control method, and computer-readable storage medium for instructing printing to a printing apparatus An information processing apparatus including a hot folder, comprises: a first determination unit configured to determine whether print processing of the job data stored in the hot folder is executable; a printing unit configured to print the job data determined to be executable; a second determination unit configured to determine whether the printing unit has normally ended the print processing of the job data; a specifying unit configured to specify outline information of a status of the print processing of the job data; an acquisition unit configured to acquire detailed information of the status of the print processing of the job data; and a creation unit configured to create a printing status notification file including the outline information of the status of the print processing of the job data specified and the detailed information of the status of the print processing of the job data acquired.
US09213922B2	Information processing apparatus, storage medium stored with information processing program, and information processing method An information processing apparatus comprises a first acquiring controller which acquires a first file; a second acquiring controller which acquires area information to indicate a storage area on a predetermined storage medium, the first file acquired by the first acquiring controller being stored in the storage area; a generating controller which generates a second file having an additional information area capable of storing additional information, from the first file acquired by the first acquiring controller; and a storing controller which stores the area information acquired by the second acquiring controller as the additional information in the additional information area of the second file generated by the generating controller.
US09213916B2	Compressive sensing with local geometric features Methods and apparatuses for compressive sensing that enable efficient recovery of features in an input signal based on acquiring a few measurements corresponding to the input signal. One method of compressive sensing includes folding an image to generate first and second folds, and recovering a feature of the image based on the first and second folds without reconstructing the image. One example of a compressive sensing apparatus includes a lens, a focal plane array coupled to the lens and configured to generate first and second folds based on the image, and a decoder configured to receive the first and second folds and to recover a feature of the image without reconstructing the image. The feature may be a local geometric feature or a corner. Compressive sensing methods and apparatuses for determining translation and rotation between two images are also disclosed.
US09213914B2	Image processing device and image processing method for processing images using memory-efficient principal component analysis A pixel set formation unit in an image analysis unit of an image processing device forms pixel sets from original images subject to analysis. A principal analysis unit of the image analysis unit performs principal component analysis in units of pixel sets. A synthesis unit synthesizes results of analysis in units of pixel sets so as to generate images of eigenvectors of a size of the original images. An image generation unit displays the images of the eigenvectors and stores data for an image generated by using the images of the eigenvectors in a generated image storage unit.
US09213911B2	Apparatus, method, and computer readable medium for recognizing text on a curved surface A device and method are provided for recognizing text on a curved surface. In one implementation, the device comprises an image sensor configured to capture from an environment of a user multiple images of text on a curved surface. The device also comprises at least one processor device. The at least one processor device is configured to receive a first image of a first perspective of text on the curved surface, receive a second image of a second perspective of the text on the curved surface, perform optical character recognition on at least parts of each of the first image and the second image, combine results of the optical character recognition on the first image and on the second image, and provide the user with a recognized representation of the text, including a recognized representation of the first portion of text.
US09213905B2	Automatic obstacle location mapping A method of automatic obstacle location mapping comprises receiving an indication of a feature to be identified in a defined area. An instance of the feature is found within an image. A report is then generated conveying the location of said feature.
US09213901B2	Robust and computationally efficient video-based object tracking in regularized motion environments A method and system for video-based object tracking includes detecting an initial instance of an object of interest in video captured of a scene being monitored and establishing a representation of a target object from the initial instance of the object. The dominant motion trajectory characteristic of the target object are then determined and a frame-by-frame location of the target object can be collected in order to track the target object in the video.
US09213897B2	Image processing device and method An image processing device that accesses a storage unit that stores a feature point of a recognition-target object, the device includes an obtaining unit mounted with a user and configured to obtain image data in a direction of a field of view of the user; a recognizing unit configured to recognize the recognition-target object included in the image data by extracting a feature point from the image data and associating the extracted feature point and the feature point of the recognition-target object stored in the storage unit with each other; a calculating unit configured to calculate a location change amount of the feature point corresponding to the recognition-target object recognized by the recognizing unit from a plurality of the image data obtained at different times and calculate a motion vector of the recognition-target object from the location change amount; and a determining unit configured to determine a movement.
US09213893B2	Extracting data from semi-structured electronic documents The disclosed embodiments provide a system that processes data. During operation, the system obtains a first electronic document associated with a user. Next, the system obtains one or more locations of data elements in the first electronic document from the user and uses the one or more locations to extract a first set of data from the first electronic document. Finally, the system enables, for the user, use of the first set of data with an application without requiring manual input of the first set of data into the application.
US09213890B2	Gesture recognition system for TV control A gesture recognition system using a skin-color based method combined with motion information to achieve real-time segmentation. A Kalman filter is used to track the centroid of the hand. The palm center, palm bottom, as well as the largest distance from the palm center to the contour from extracted hand mask are computed. The computed distance to a threshold is then compared to decide if the current posture is “open” or “closed.” In a preferred embodiment, the transition between the “open” and “closed” posture to decide if the current gesture is in “select” or “grab” state.
US09213888B2	Electronic devices in local interactions between users In one implementation, a method includes detecting, using a processor, user input through a camera lens. The method further includes determining, using the processor, that an identity of a user, selected from identities of at least two users, is associated with the user input. The method also includes tracking, using the processor, a local interaction between the at least two users based on at least the identity, the user input, and stored rules that govern the local interaction. The tracking can include determining whether the user has complied with the stored rules that govern the local interaction. Furthermore, the local interaction can include a multiplayer game.
US09213887B2	Processing information apparatus, control method and program for inputting and storing additional information according to contents The present invention aims to encourage the input of comment on content requiring the viewing user's input and prevent the comment from failing to be input in a case where the content is displayed and the viewing user inputs the comment on the content.Therefore, according to the present invention, when the content is displayed on a display apparatus, the viewing user of the content is photographed to capture photographed image data. A face image included in the displayed content and the face image of the viewing user included in the photographed image data are compared, and, if they are similar, a comment input area is displayed to encourage the viewing user to input a comment.
US09213884B2	Image processing apparatus, image processing method, and program An image processing apparatus includes an attention area detection unit, a luminance parallax conversion unit, and a parallax estimation unit. The attention area detection unit is configured to detect an attention area including a desired subject from a standard image. The luminance parallax conversion unit is configured to perform a luminance parallax conversion with respect to the attention area on the basis of a luminance parallax conversion characteristic estimated by using a past frame. The parallax estimation unit is configured to perform parallax estimation on the basis of the standard image and a reference image, a viewpoint position of which is different from that of the standard image, and perform, in the attention area, the parallax estimation by using a luminance parallax conversion result obtained by the luminance parallax conversion unit.
US09213878B1	Barcode reader which obtains formatting and routing instructions from a remote server A barcode reader for decoding and manipulating data from a barcode and providing the decoded and manipulated data to a remote computing system includes barcode reading hardware, including an image sensor which captures an image of a barcode within a field of view. The barcode reader also includes a processor executing executable code which generates decoded data representative of data encoded in the barcode, formats the decoded data, and sends the formatted decoded data to the remote computing system only when the processor executes formatting and routing instructions which the barcode reader obtains from a remote configuration server upon power up of the barcode reader.
US09213876B2	Optical information reader and illumination control method In a barcode reader, a sensor controller sets time of one frame of a line image sensor based on output time necessary for data output of one frame from the line image sensor and lighting time of an LED. A light source controller performs first lighting control to turn on the LED only for the lighting time after termination of the data output within the time of one frame, and second lighting control to turn on the LED only for the lighting time so as to include the entire period of the data output within the time of one frame.
US09213872B2	Method and apparatus for discrimination of RFID tags In one or more embodiments described herein, there is provided an apparatus that is configured to determine respective signal strengths of radio frequency identification signalling received from multiple sources by a directional antenna. The apparatus is also configured to discriminate the radio frequency identification signalling from a particular source based on the particular signal strength of the radio frequency identification signalling received from that source.
US09213865B2	Launching a secure kernel in a multiprocessor system In one embodiment of the present invention, a method includes verifying a master processor of a system; validating a trusted agent with the master processor if the master processor is verified; and launching the trusted agent on a plurality of processors of the system if the trusted agent is validated. After execution of such a trusted agent, a secure kernel may then be launched, in certain embodiments. The system may be a multiprocessor server system having a partially or fully connected topology with arbitrary point-to-point interconnects, for example.
US09213862B1	Systems, methods and articles for providing personalized web content based on portable personas Systems, methods and articles of manufacture for delivering website content to an internet user which is personalized to the user based on a persona associated with the user. A persona database system accesses personal and financial data for the user from any suitable source, such as from a tax return of the user or personal finance management application or even a questionnaire. The persona database system matches the user's data to a persona for the user from a predetermined, discrete set of personas, wherein each persona identifies a generalized profile of personal and financial characteristics of the user. Then, when a user access a website hosted by a website server, the website server accesses the persona for the user from the persona database system and the website server personalizes the website content delivered to the user based on the persona for the user.
US09213861B2	Mobile communication system The mobile communication device is for use as a cell phone, as a wireless identity authentication device with other electronic devices (with cell phones, computers, and ATM's), and as a headset in the form of an earphone, an eye-covering, or a head covering for audio communication with a central processor, another mobile terminal a cell phone, or a pda. The mobile communication device is hands-free being worn on or near the face, and only requires a finger touching for bimodal identity authentication. An audio receiver is compatible with the ear of the user and a microphone transmits words spoken by the user, electronically therethrough. A fingerprint sensor is mounted and positioned within the device. When user authentication is required, the user is prompted to touch the fingerprint sensor, and said fingerprint data is compared with fingerprint images of authorized users. In another aspect of the invention, mobile communication device is an eye-covering, a head covering, or an identification badge including a fingerprint sensor and a processor and is used for wireless authentication of the user.
US09213860B2	System, method, and database for personal information management with advanced access controls A database for online personal information management comprising: a first account; a first database user id; a second database user id, the second database user id being associated with the first account; a set of data nodes, the nodes being interlinked to form a graph; a data object having an associated node, the associated node being one node in the set of data nodes; an associated account; an object owner; at least one share right object associated with a node, the share right object having a parameter indicating whether the share right object is active when the owner is alive or when the object owner is deceased.
US09213858B2	Secure virtual file management system Virtual file management is disclosed. Managed content from multiple separate storage domains is organized into a virtual file system that maintains with respect to each of at least a subset of said separate storage domains information of storage domain specific file system primitives to perform primitive operations with respect to content stored in that storage domain. Policies are determined that apply to the managed content. Each policy indicates primitive operations permitted to be performed with respect to the managed content. Information comprising the virtual file system and the policies is provided to a client application on a mobile device. The client application is configured to provide access to the managed content in the virtual file system in a manner at least in part indicated in the policies, including by allowing the permitted primitive operations to be performed using said storage domain specific file system primitives.
US09213856B2	Role based access management for business object data structures A service request from a user is received to execute an operation on an instance of a business object. Thereafter, an access control check is performed to confirm whether the user is allowed to execute the requested operation on a type of business object corresponding to the business object specified and based on an access group associated with the user. Subsequently, the user is either provided with access to the instance of the business object to execute the operation if the access control check confirms that the user is allowed to execute the operation on the instance of the business object, or prevented from accessing the instance of the business object to execute the operation on the instance of the business object. Related apparatus, systems, techniques and articles are also described. Related apparatus, systems, techniques and articles are also described.
US09213853B2	Password-less login User profiles stored on a server control access to private data. Access control to the user profiles themselves is provided without a password. In more detail, the user profile is functionally handicapped by at least a portion of digital data (or a cryptographic key) associated with the user profile being removed and discarded after being sent to an enabling device. A human gesture from the user first provides a key to reconstitute the key or restore the missing data portion in the enabling device which is then transmitted to the server to reconstitute the key or restore the missing data portion in order to reconstitute the user profile for access.
US09213852B2	Limiting access to a digital item In a method for limiting access to a digital item, a count for the digital item is stored, wherein the count is a number of accesses permitted for the digital item. A password for accessing the digital item is received. A plurality of password hashes is generated by utilizing one-way hash functions based on the number of accesses of the count and the password to generate the plurality of password hashes based on the count. The plurality of password hashes is stored in a password hash file.
US09213851B2	Limiting access to a digital item In a method for limiting access to a digital item, a count for the digital item is stored, wherein the count is a number of accesses permitted for the digital item. A password for accessing the digital item is received. A one-way hash function is performed on the password based on the number of accesses of the count to generate a password hash based on the count. The password hash is stored as the stored password hash.
US09213848B2	Information management of data associated with multiple cloud services A method and system for providing information management of data from hosted services receives information management policies for a hosted account of a hosted service, requests data associated with the hosted account from the hosted service, receives data associated with the hosted account from the hosted service, and provides a preview version of the received data to a computing device. In some examples, the system indexes the received data to associate the received data with a user of an information management system, and/or provides index information related to the received data to the computing device.
US09213843B2	Analyzing access control configurations A facility is described for analyzing access control configurations. In various embodiments, the facility comprises an operating system having resources and identifications of principals, the principals having access control privileges relating to the resources, the access control privileges described by access control metadata; an access control scanner component that receives the access control metadata, determines relationships between principals and resources, and emits access control relations information; and an access control inference engine that receives the emitted access control relations information and an access control policy model, analyzes the received information and model, and emits a vulnerability report. In various embodiments, the facility generates an information flow based on access control relations, an access control mechanism model, and an access control policy model; determines, based on the generated information flow, whether privilege escalation is possible; and when privilege escalation is possible, indicates in a vulnerability report that privilege escalation is possible.
US09213840B2	Systems and methods involving features of hardware virtualization, hypervisor, APIs of interest, and/or other features Systems, methods, computer readable media and articles of manufacture consistent with innovations herein are directed to computer virtualization, computer security and/or memory access. According to some illustrative implementations, innovations herein may utilize and/or involve a separation kernel hypervisor which may include the use of a guest operating system virtual machine protection domain, a virtualization assistance layer, and/or a detection mechanism (which may be proximate in temporal and/or spatial locality to malicious code, but isolated from it), inter alia, for detection and/or notification of, and action by a monitoring guest upon access by a monitored guest to predetermined physical memory locations.
US09213839B2	Malicious code detection technologies An embodiment of the present application provides technologies for detecting malicious content embedded in a content downloaded from an external source. The downloaded content converted into an opcode sequence by a web browser in a computing device. The opcode sequence is compared with a pre-stored opcode signature. The opcode signature comprises multiple sentences, and each sentence has multiple clauses. Each clause may include a matching opcode, a condition, an instruction, and an identifier. When a matching opcode in a clause matches with an opcode of the opcode sequence, and the condition as specified in the clause is determined to be true, the instruction in the clause is taken and next sentence identified by the identifier is taken to match the opcode sequence. Eventually, the last taken clause in the opcode signature may instruct whether opcode sequence contains malicious code.
US09213837B2	System and method for detecting malware in documents In one embodiment, a method includes identifying, using one or more processors, a plurality of characteristics of a Portable Document Format (PDF) file. The method also includes determining, using the one or more processors, for each of the plurality of characteristics, a score corresponding to the characteristic. In addition, the method includes comparing, using the one or more processors, the determined scores to a first threshold. Based at least on the comparison of the determined scores to the first threshold, the method includes determining, using the one or more processors, that the PDF file is potential malware.
US09213835B2	Method and integrated circuit for secure encryption and decryption In one embodiment of the present invention, a secure cryptographic circuit arrangement is provided. The secure cryptographic circuit includes a cryptographic processing block, a spreading sequence generator, and a delay control circuit. The cryptographic processing block has a plurality of signal paths. One or more of the plurality of signal paths includes respective adjustable delay circuits. The spreading sequence generator is configured to output a sequence of pseudo-random numbers. The delay control circuit has an input coupled to an output of the spreading sequence number generator and one or more outputs coupled to respective delay adjustment inputs of the adjustable delay circuits. The delay control circuit is configured to adjust the adjustable delay circuits based on the pseudo-random numbers.
US09213833B2	Methods and systems for detecting an electronic intrusion Methods and systems for detecting an electronic intrusion are described. The system receives a notification, over a network, from a first application server that is hosting a first electronic service that is hosting a first user account. The notification reports the detection of a user activity associated with the first user account. The first user account is monitored for user activity. Next, the system may identify the notification reporting the detection of the user activity associated with the first user account as a possible electronic intrusion into the first account.
US09213829B2	Computing device including a port and a guest domain A first guest domain and an isolated peripheral related task. A peripheral related task to communicate with the peripheral and prevent the first guest domain from communicating with the peripheral.
US09213828B2	Data processing apparatus and method for protecting secure data and program code from non-secure access when switching between secure and less secure domains A data processing apparatus includes processing circuitry and a data store including a plurality of regions including a secure region and a less secure region. The secure region is configured to store sensitive data accessible by the circuitry when operating in a secure domain and not accessible by the circuitry when operating in a less secure domain. The data store includes a plurality of stacks with a secure stack in the secure region. Stack access circuitry is configured to store predetermined processing state to the secure stack. The processing circuitry further comprises fault checking circuitry configured to identify a first fault condition if the data stored in the predetermined relative location is the first value. This provides protection against attacks from the less secure domain, for example performing a function call return from an exception, or an exception return from a function call.
US09213822B2	Device, method, and graphical user interface for accessing an application in a locked device A device with a touch sensitive display and a plurality of applications, including a camera application, while the device is in a locked, passcode-protected state: displays a lock screen interface, the lock screen interface including a camera access indicia; detects a gesture; in response to a determination that the gesture starts on the camera access indicia: ceases to display the lock screen interface; starts a restricted session for the camera application; displays an interface for the camera application, without displaying a passcode entry interface; and maintains the device in the locked, passcode-protected state for the applications other than the camera application; and in response to a determination that the gesture starts at a location other than the camera access indicia: displays a passcode entry interface, wherein in response to entry of a correct passcode in the passcode entry interface, the device enters an unlocked state.
US09213821B2	System and method for monitoring human interaction A method & system for human interactive proof (HIP) is provided. A user is provided to respond a query linked to a logical captcha object or an analytical captcha object. Upon receiving inputs from the user, the correct information of the said captcha & the user's input is compared. If the user's input and the correct information of the captcha object matches then the user is authenticated as human, else the user is authenticated as not a human.
US09213820B2	Mobile authentication using a wearable device A method of providing a user with an option to access a protected system by satisfying a reduced security measure is disclosed. An attempt by the user to access the protected system is detected. It is detected that a first security token system is within a first proximity to the protected system. Based on the detecting of the attempt by the user to access the protected system and the detecting that the first security token system is within the first proximity, the user is provided with the option to access the protected system by satisfying the reduced security measure.
US09213819B2	Rhythm-based user authentication The present invention is directed to an apparatus, a method, and a computer program product for authenticating a user based on a sequence of rhythmic inputs. The user via a mobile device provides one or more inputs (e.g., pushing a button, tapping a touchscreen, a biometric, or the like) to one or more sensors associated with the mobile device as an attempt of authorization. The one or more inputs may be provided in a rhythmic manner (e.g., provided in time with music). The present invention then compares the provided one or more inputs to one or more predetermined sequences of inputs that are associated with positive authentication of the user (e.g., a known password). The phone determines that the one or more provided inputs match one or more predetermined rhythmic sequences associated with positive authentication of the user and authenticates the user.
US09213813B2	Authentication device, authentication method, and recording medium An authentication device includes an authentication unit configured to determine whether an input password input to a input unit matches a registered password registered in advance in a storage unit, count the number of times it is determined that the input password does not match the registered password, and stops authentication using a password if the number of times a mismatch is determined reaches a specified number, and a management unit configured to create an input error list supporting each of characters, digits, or other elements included in the registered password, on the basis of a history of errors of input to the input unit, and configured to cancel counting in a case where it is determined by the authentication unit that the input password does not match the registered password and a cause of the mismatch lies in an input error included in the input error list.
US09213809B2	System and method for protecting digital contents with digital rights management (DRM) An approach for protecting digital contents includes a content delivery phase wherein a client stores digital contents or retrieves them in streaming, transmits to a user device the digital content in a protected format along with an enabling code for enabling the user device to access or read the protected digital content. The approach includes a key generation phase in a DRM (Digital Right Management) server which derives at least one key for encrypting the digital contents. A key transmission phase involves the derived key being transmitted from the DRM server to the client. For decrypting the digital content, the user device requests the key from the DRM server, with the request including a key identification defined by the enabling code transmitted by the client to the user device which is used by the DRM server to derive the key for the user device.
US09213808B2	Controlling distribution of digital content A method of controlling distribution of digital content (116) is presented. A version (106) of a program (100) is needed to use the content. A plurality of versions of the program (100) is generated, each version being unique with respect to incorporated code fragments and/or associated locations thereof. The plurality of respective code fragments (118) each cause a processor to perform a respective test regarding a data characteristic on content to be processed by the program for restricting the processing of content for which the permission has not been granted. The respective code fragments (118) are incorporated at respective locations in the program (100) to obtain the version (106) of the program (100).
US09213807B2	Detection of code injection attacks A method for detecting foreign code injected into a computer system including a processor and memory, the processor being configured to execute instructions stored in the memory, includes: detecting, on the computer system, an illegal instruction error; recording the illegal instruction error; determining whether a threshold condition is met; and generating an alert if the threshold condition is met.
US09213800B1	Optical proximity correction verification system and verification method thereof The optical proximity correction verification method includes loading a layout data to be verified to a processor, loading a reference layout data to the processor. The processor performs a first stage Boolean operation on the layout data to be verified to generate first verified data. The processor performs a layout versus layout verification on the first verified data to generate second verified data by using the reference layout data. If the layout versus layout verification is successfully performed, the processor performs a second stage Boolean operation on the second verified data to generate third verified data. By using the reference layout data, the processor performs a Boolean check on the third verified data to generate fourth verified data.
US09213799B2	Systematic defect analysis method and machine readable media A systematic defect analyzing method, includes: partitioning physical sites into groups to obtain a plurality of groups of physical sites according to a plurality of physical features of a chip corresponding to different potential systematic defects; utilizing a processor to compute at least one defect probability of each group of physical sites; and deriving an analysis result according to the plurality of defect probabilities corresponding to the plurality of groups of physical sites.
US09213791B1	Method and apparatus for abutting p-cell layout based on position and orientation An electronic design automation (EDA) tool generates first and second instances, which are different in at least one aspect, of a cell representing a device, allowing a user to initiate an abutment of the first and second instances in a layout canvas, reads a position and orientation of each of the first and second instances to be abutted from the layout canvas, evaluates the respective positions and orientations of the first and second instances, altering a component of one of the first and second instances based on the evaluation, and then automatically abuts the first and second instances following the alteration of the component of the one of the first and second instances.
US09213785B2	Systems and methods for component-based architecture design Systems and methods are disclosed for performing component-based architecture design. In one example, a method includes accessing a database storing multiple pre-designed room components to automatically identify certain pre-designed room components that satisfy input criteria. Each of the pre-designed room components includes structural geometric data indicative of a three-dimensional (3D) model of a pre-designed room, embedded metadata indicative of at least one design policy associated with the pre-designed room, and construction drawing data that can be merged with that of other room components to create final construction drawings for a completed house design.
US09213784B2	System and process for optimization of dentures System and processes for optimal selection of teeth for dentures based on the anatomical measurements and bite impressions of the patient. This information is applied in an iterative manner to rules that balance the anatomical and aesthetic considerations to select the best teeth for a patient. The system may also use this information in an iterative manner to rules that balance the anatomical and aesthetic considerations to design the optimal denture base for the patient as well.
US09213779B2	Method for loading data element into wireless terminal A method, a terminal implementing the method and a software product for loading at least one data element into a wireless terminal including data on the web pages browsed by the user stored in a definition file. The definition file includes at least the address of one web page. The terminal includes a browser functionality that allows the user to browse web pages on his/her terminal. The terminal detects an appropriate data transmission connection that can be established, whereupon the appropriate data transmission connection is established to the web page, from where at least one data element is stored into the memory of the terminal.
US09213778B2	Social network posting analysis using degree of separation correlation A degree of social network separation of a social network user that generated expressive content of a social media posting is identified relative to a specified social network user for each of a group of social media postings. Social media postings with an equivalent identified degree of social network separation relative to the specified social network user are grouped. Differences between the expressive content of the grouped social media postings at different degrees of social network separation are determined. The determined differences between the expressive content of the grouped social media postings at the different degrees of social network separation are rendered.
US09213776B1	Method and system for searching network resources to locate content A process and system are directed to generating a medium without user involvement. A user makes a series of increasingly granular selections to specify the type of medium to be built, such as a webpage. A search engine conducts a search of networking resources to identify and collect content items that have a relationship to the user and that are relevant to the webpage selections made by the user. The content collection is performed automatically without any user involvement, beyond the user's initial webpage selections. The webpage is then constructed, using the collected content items to populate the components of the webpage. The webpage is customized to the user because its contents are developed based upon a search that reflects the targeting and collection of content items that are both related to the user and relevant to the user's webpage definition.
US09213770B1	De-biased estimated duplication rate A sample of product listings is selected from a product catalog. An audit process is performed to identify other product listings in the product catalog that are duplicates of product listings in the sample. The probability that the product listings would be included in a randomly selected sample of product listings is computed for each of the product listings in the sample and the duplicate product listings. A weight is assigned to each of the listings in the sample and the duplicate listings that is inversely proportional to the computed probability for each listing. The weights may then be utilized to compute a de-biased estimated duplication rate of product listings in the product catalog. The de-biased estimated duplication rate may be utilized to reduce an actual rate of duplication of product listings in the product database.
US09213766B2	Anticipatory and questionable fact checking method and system An efficient fact checking system analyzes and determines the factual accuracy of information and/or characterizes the information by comparing the information with source information. The efficient fact checking system automatically monitors information, processes the information, fact checks the information efficiently and/or provides a status of the information.
US09213765B2	Landing page search results Systems and methods for providing content are disclosed. In an embodiment, information encoding at least one keyword that is associated with first content accessed by a user is received. A search query based at least in part on at least one keyword is executed to identify items. In response to a request from the user to access second content, a response is generated to the request that includes item information associated with at least a subset of the identified items. The response is provided to the user.
US09213764B2	Encrypted in-memory column-store Embodiments relate to processing encrypted data, and in particular to identifying an appropriate layer of encryption useful for processing a query. Such identification (also known as the onion selection problem) is achieved utilizing an adjustable onion encryption procedure. Based upon defined requirements of policy configuration, alternative resolution, and conflict resolution, the adjustable onion encryption procedure entails translating a query comprising an expression in a database language (e.g. SQL) into an equivalent query on encrypted data. The onion may be configured in almost arbitrary ways directing the onion selection. An execution function introduces an execution split to allow local (e.g. client-side) query fulfillment that may otherwise not be possible in a secure manner on the server-side. A searchable encryption function may also be employed, and embodiments accommodate aggregation via homomorphic encryption. Embodiments may be implemented as an in-memory column store database system.
US09213759B2	System, apparatus, and method for executing a query including boolean and conditional expressions A DBMS is configured to identify a Boolean expression and conditional expressions from a search query, and to extract for each of the identified conditional expressions the value of a record ID conforming to a conditional expression. The DBMS is configured to change a conformity result value corresponding to the extracted record ID and conditional expression to a first value signifying conformity, in Boolean expression determination information, which is information that includes a determination set having a record ID value and a plurality of conformity result values respectively corresponding to a plurality of conditional expressions, and, on the basis of the Boolean expression, to perform logical operations on the plurality of conformity result values of a determination set, for each determination set in the Boolean expression determination information.
US09213755B2	Methods and systems for selecting and presenting content based on context sensitive user preferences A method of selecting and presenting content based on context-sensitive learned user preferences is provided. The method includes providing a set of content items having descriptive terms. The method includes receiving user input for identifying items and, in response thereto, presenting a subset of items. The method includes receiving user selections of said items and analyzing the descriptive terms of those items to learn the user's content preferences. The method includes determining the context in which the user performed the selections and associating those contexts with the user content preferences learned from the corresponding user selections. The method includes, in response to subsequent user input, determining a context of said subsequent input and selecting and ordering a collection of items based on comparing those items' descriptive terms with the user's learned content preferences associated with the determined context in which the user entered the subsequent input.
US09213754B1	Personalizing content items Methods, systems, and apparatus, including computer programs encoded on computer storage media, for personalizing content items. One of the methods includes identifying, by a computer system, a content item to be provided to a client device of a first user. The method includes determining that the content item is capable of including a contextually-related content item associated with a second user, the second user having a relationship of a first user in a social affinity graph. The method includes altering, by the computer system, the content item to include the contextually-related content item. The method includes providing the content item to the client device.
US09213753B2	Computer system The management system includes pair management information for managing pair groups and resource management information for managing resources allocated to the pair groups. The management system monitors data transfer latencies in asynchronous remote copy in the pair groups. In a case where data transfer latencies in a first pair group of the pair groups reach a threshold, the management system selects a first asynchronous remote copy pair from the first pair group with reference to the pair management information. The management system selects a second pair group allocated resources different from resources allocated to the first pair group as a candidate migration destination of the first asynchronous remote copy pair with reference to the resource management information.
US09213752B2	Asynchronous pausing of the formation of consistency groups Provided are a computer program product, system, and method for asynchronous pausing of the formation of consistency groups. A first copy operation is initiated to copy the source data from the first storage to the first data copy in the second storage. A second copy operation is initiated to copy the first data copy in the second storage to a second data copy in response to forming a consistency group of the source data at the first data copy forms consistent as of a point-in-time with respect to the source data. The first copy operation is suspended to allow for further processing of the first data copy in response to completing the second copy operation. The formation of a next consistency group is restarted between the source data and the first data copy in response to receiving a resume command.
US09213750B2	System for and method for data reflow in a stateless system Embodiments provide systems and methods having an engine that gives stateless applications attributes of a ‘stateful’ process. To accomplish this end, a ‘snapshot’ of a transaction at a given point is taken and persisted until receiving confirmation that the transaction is completed. The snapshot may be a snapshot of data flowing in a stateless messaging system. The snapshot is maintained until confirmation that all intended recipients to which the transaction relates to have completed the steps they need to for the given transaction. The snapshot may be formed into a message and reflowed to an intended recipient to ensure that the recipient receives the message in the event that the initial delivery is unsuccessful.
US09213748B1	Generating related questions for search queries Methods, systems, and apparatus, including computer programs encoded on computer storage media, for identifying related questions for a search query is described. One of the methods includes receiving a search query from a user device; obtaining a plurality of search results for the search query provided by a search engine, wherein each of the search results identifies a respective search result resource; determining one or more respective topic sets for each search result resource, wherein the topic sets for the search result resource are selected from previously submitted search queries that have resulted in users selecting search results identifying the search result resource; selecting related questions from a question database using the topic sets; and transmitting data identifying the related questions to the user device as part of a response to the search query.
US09213746B2	Method for searching for information using the web and method for voice conversation using same According to the present invention, a method for searching for information using the Web and a method for voice conversation using same involve generating a basic word vector for at least one of a provided user query and a language analysis result; using the basic word vector, searching a vector space database for a vector space corresponding to the basic word vector; searching, if a similarity between the basic word vector and the found vector space is lower than a preset reference, a vector space database for a vector space corresponding to an expanded word vector using the expanded word vector generated from the result of the Web search performed using at least one of the user query and the language analysis result; and searching for knowledge information on the basis of the vector space found in the basic searching step or the expanded searching step. Thus, improved research results may be provided in response to the user query.
US09213745B1	Methods, systems, and media for ranking content items using topics Methods, systems, and media for ranking content items using topics are provided. In some embodiments, a method for ranking video content is provided, comprising: receiving a search query; generating a plurality of search results in response to the search query; determining one or more entity types associated with a content class within the plurality of search results; determining whether the search query is a query for content belonging to the content class based on a plurality of criterion that includes: (i) determining whether at least one of the plurality of search results is associated with the one or more determined entity types and (ii) determining whether entities shared between the plurality of search results include the one or more determined entity types; and in response to determining that the plurality of criterion have been met, promoting at least one search result of the plurality of search results belonging to the content class.
US09213742B2	Time aligned transmission of concurrently coded data streams A method begins by a dispersed storage (DS) processing module receiving a first coded matrix that includes a first plurality of pairs of coded values corresponding to first data segments of a first data stream and a second data stream. The method continues with the DS processing module receiving a second coded matrix that includes a second plurality of pairs of coded values corresponding to first data segments of a third data stream and a fourth data stream. The method continues with the DS processing module generating a new coded matrix to include a plurality of groups of selected coded values. The method continues with the DS processing module outputting the plurality of groups of selected coded values to a requesting entity in a manner to maintain time alignment of the first data segments of the first, second, third, and fourth data streams.
US09213739B2	Consistent aggregation in a database A query is received by a database server from a remote application server. The query is associated with a calculation scenario that defines a data flow model that includes one or more calculation nodes and that includes a pre-defined aggregation property. Each calculation node defines one or more operations to execute on the database server. The database server can include a column-oriented database. Thereafter, the database server instantiates the calculation scenario such that, based on the aggregation property, at least one non-aggregating operation specified by a calculation node is transformed into a aggregating operation based on a root node aggregation of the calculation scenario. Subsequently, the database server executes the operations defined by the calculation nodes of the optimized calculation scenario to result in a responsive data set. The database server then provides the data set to the application server.
US09213731B2	Determining whether to relocate data to a different tier in a multi-tier storage system In general, a block of data in a data file is stored in a multi-tier storage system. The block of data includes multiple rows and multiple entry values per row, including values for a particular entry. The values of the particular entry in the data block can be used to determine whether to move the data block to a different tier of a multi-tier storage system. The block of data can then either be relocated in a different tier or kept in the current tier.
US09213729B2	Application recommendation system Systems and method for receiving mobile device usage data from mobile electronic devices using security applications with enhanced access privileges. The mobile device usage data includes user-specific and application usage data. Application classification databases are searched for application characteristics of applications available for download from multiple marketplaces. Using the application characteristics, a weighted application relationship graph that includes relationship scores for application pairs that describe the degree to which applications in each of the application pairs are related to, is generated. Based on the mobile device usage and the relationship scores, a list of recommended applications can be generated for a particular user. The list of recommended applications includes the applications determined to be associated with at least one of the applications installed on the user's mobile device with a relationship score greater than a threshold. The method then sends the list of recommended applications to the user's mobile device.
US09213727B1	Methods and apparatus for obtaining database performance snapshots Methods and apparatus are provided for obtaining database performance snapshots. Performance data for one or more databases on a host is obtained by obtaining a host burden rating based on one or more of processing, network and input/out statistics of the host; determining a spawn limit based on the host burden rating; and spawning one or more scripts within the spawn limit, wherein each of the scripts collect performance data for a given database and is selected based on a database type of the given database. The host burden rating is a quantitative measure based on a sum of the processing, network and input/out statistics of the host. The collected performance data can be presented to a user in a graphical user interface and/or stored in a repository. The presented collected performance data for a given database comprises, for example, a score and/or a health assessment indicator based on predefined thresholds.
US09213726B2	Database cost tracing and analysis Web services hosted at a data center may employ architectural patterns that tend to obfuscate the source of queries made against databases and other resources in the data center. The queries may be the source of performance, capacity or utilization problems, and may contribute to the cost of hosting the web service. Web service invocations may be associated with identifiers that can be included in modified queries sent to databases and other resources. Summarized cost information may be calculated based on recorded associations between the identifiers and query performance information.
US09213725B2	Systems and methods for generating automated social interactions in social networking environments Systems and methods of generating automated social interactions for users in a social networking environment are disclosed. In one aspect, embodiments of the present disclosure include a method, which may be implemented on a system, of receiving data items associated with users of a social network, identifying sets of data items associated with a user, and comparing a first set of data items to other sets of data items to identify commonalities between the first set of data items and the other sets of data items. The method further comprising automatically selecting a second user associated with a second set of data items and a first electronic social interaction for the first user to pursue with respect to the second user based on the identified commonalities between the first set of data items and the second set of data items.
US09213723B2	Image distribution apparatus and image distribution method The present invention enables image distribution while maintaining privacy, using a simple configuration. An image distribution apparatus which distributes image data to which location information has been added stores information specifying an inhibited area concerning the location information and determines whether or not a location indicated by the location information added to the image data to be distributed falls within the stored inhibited area. If it is determined that the location indicated by the location information falls within the inhibited area, the image distribution apparatus distributes the image data by deleting the location information from the image data to be distributed. On the other hand, if it is determined that the location indicated by the location information falls outside the inhibited area, the image distribution apparatus distributes the image data with the location information added.
US09213721B1	File server system having tiered storage including solid-state drive primary storage and magnetic disk drive secondary storage A file server system having solid-state drive primary storage and magnetic disk drive secondary storage aggressively moves newly created files from the primary storage to selected file systems in the secondary storage to match expected access patterns upon the files to different configurations of the file systems and for load balancing upon the file systems in the secondary storage. Upon read access to a file that has been moved to the secondary storage, or upon migration of a newly created file that was read in primary storage after creation, a corresponding stub file containing file mapping metadata is created in the primary storage. The file mapping metadata in the stub file maps the extent of the file to logical storage addresses in the secondary storage.
US09213716B2	Hierarchical indicies Data records of a data set can be stored in multiple main part fragments, each of which includes a subset of the set of data records. A relative age can be assigned to each main part fragment, and a fragment-specific index segment can be created for a newest of the main part fragments. The fragment-specific index segment can provide a lookup ability for logical identifiers of data records in just the newest of the main part fragments. A multi-fragment index segment can span two or more older main fragments. The multi-fragment index segment can provide a lookup ability for logical identifiers of data records in the two or more older main part fragments.
US09213711B2	Hardware contiguous memory region tracking Embodiments of the invention relate to performing a scan of a memory region associated with a virtual machine. The scan is performed by a hardware mechanism in response to a call. A data structure that includes information about substrings identified during the scan and a number of replications for each substring is constructed by the hardware mechanism. The data structure is stored by the hardware mechanism at a location determined by the call.
US09213707B2	Ordered access of interrelated data files A computer implemented method and system for interrelating and providing ordered access to source data files (SDFs) is provided. Each SDF contains one or more records. A parsing component compiles a configuration language (CL) and generates file descriptors usable by an interlinear sort component (ISC) and an interrelated data access component (IDAC). The CL defines adopt and order key fields, a lineage relationship between the SDFs, and one or more predetermined subprograms. The subprograms process an instance of a record from a SDF and a start point and an end point of a sequence or a subsequence of related records from the SDF. The ISC sorts each SDF into the order defined in the CL and attaches a parent position number (PPN) to each child file record. The IDAC uses the PPN to access the sorted SDFs in the order defined by the CL and execute the defined subprograms.
US09213706B2	Live restore for a data intelligent storage system A single system merges primary data storage, data protection, and intelligence. Intelligence is provided through in-line data analytics, and data intelligence and analytics are gathered on protected data and prior analytics, and stored in discovery points, all without impacting performance of primary storage. Real-time analysis is done in-line with the HA processing, enabling a variety of data analytics that are then used as part of a live restore operation. Data content can be live restored at an object or block level. Data recovery begins with metadata restoration, followed by near-instantaneous access to “hot” regions of data being restored, allowing site operation to continue or resume while a restore is ongoing.
US09213702B2	Method and system for recommending research information news A method and system for recommending research information news includes a processing unit, an inputting interface, a database group, a data collecting and analysis subsystem, and a recommending subsystem and includes steps of inputting at least one retrieval condition to collect correlative research documents including a publishing timing and linguistic units according to the retrieval condition on an internet, grouping the research documents into at least two groups comprising a group of early research documents and another group of new recent research documents according to the publishing timing and a judging timing, subjecting the linguistic units to computer term frequency statistics, a document measurement, and a data surveying to generate research keywords, and filtering out the research keywords of the new recent research documents repeating those of the early research documents for recommending a new recent research keyword.
US09213699B2	Super-object in administering system Method and system maintaining “super-objects” in a central administering system, where each super-object is associated with corresponding objects in target systems so that editing of that super-object or of one of its associated objects results in conforming edits for all of the associated objects.
US09213697B1	System and method for restoration of MS exchange server mail A system, method and computer program product for restoration of MS Exchange Server mail. MS Exchange Server mail is retrieved from a virtual copy of the MS Exchange database. Virtualization is implemented by a system filter. Logs are applied to a virtualized DB in order to synchronize it with a real DB of the MS Exchange. The data located in the remote archive does not need to be copied into the real folder, because the data is made available by virtualization means. After the logs are applied, the virtualized DB is opened (without being mounted) from files from the virtual folder. From this point on, the DB of MS Exchange can be viewed and the data can be queried and retrieved from the virtualized DB. Thus, a single message or a mailbox can be retrieved very fast, as if it were being retrieved from a real MS Exchange DB.
US09213692B2	System and method for the automatic validation of dialog run time systems A method, system and module for automatically validating dialogs associated with a spoken dialog service. The method comprises extracting key data from a dialog call detail record associated with a spoken dialog service, transmitting the key data as a dialog to a state-based representation (such as a finite-state machine) associated with a call-flow for the spoken dialog service and determining whether the dialog associated with the key data is a valid dialog for the call-flow.
US09213691B2	Refining hierarchies in object-oriented models Embodiments are directed to refining hierarchies in object-oriented models. A method includes providing a business object model in the form of an object-oriented model having one or more members with multiple distinct verbalizations and identifying distinct verbalizations of a given business object model member. The method also includes reviewing existing rules of the business object model to produce mappings of the distinct verbalizations and any attributes or operations used in conjunction with the distinct verbalizations of members of the business object model and analysing the mappings to identify patterns of use of the distinct verbalizations. The method further includes categorising a distinct verbalization as a superclass or subclass.
US09213690B2	Method, system, and appartus for selecting an acronym expansion According to one embodiment of the present invention, there is provided a method of selecting an expansion for an acronym in a document of a set of linked documents. The method comprises obtaining for each occurrence of the acronym in the set of linked documents one or more possible acronym expansions and an associated probability that the one or more possible acronym expansions is the correct acronym expansion. The further comprises identifying a sub-set of documents from the set of linked documents in which the acronym occurs. The method further comprises recalculating the associated probabilities for a first occurrence of an acronym in the sub-set of documents based, in part, on the associated probabilities of other occurrences of the acronym in the sub-set of documents and the distance between the first occurrence and the other occurrences.
US09213687B2	Compassion, variety and cohesion for methods of text analytics, writing, search, user interfaces The present invention is a computer implemented system for analyzing text, for computing aspects of sentiment via chord transitions, such as prissiness, bombast and sarcasm via underlying multiple dimensions of sentiment, computing compassionate rhetoric via successive areas of sentiment in text, for automatically computing normalization of polysemous dictionary entries to provide lookup of meanings for text analysis of words and phrases, and for automatically computing the degree of theme interweave in text via computation of conceptual crossings of paragraphs.
US09213677B2	Reconfigurable processor architecture A reconfigurable data processor architecture. The processor architecture includes: a first plurality of data processing elements, each having a respective synchronization unit, a data link structure adapted for dynamically interconnecting a number of the data processing elements, at least one configuration register, and at least one control unit in operative connection with the configuration register for controlling a contents thereof, wherein, based on the contents, the first plurality of data processing elements is adapted for temporarily constituting at runtime at least one group of one or more of said data processing elements from said first plurality of data processing elements dynamically via the data link structure. The synchronization units are adapted for synchronizing data processing by individual data processing elements within the group. The first plurality of data processing elements may be reconfigurably grouped and thus adapted to various data processing tasks at runtime. This increases data processing efficiency.
US09213676B2	Hardware device name resolution for deterministic configuration in a network appliance Inconsistencies between internal logical names assigned to hardware devices and physical labeling of the hardware device connectors are overcome by reassigning internal logical names in a network appliance hosting the hardware devices. The initial logical names that refer to the hardware devices are read from an operating system, along with hardware addresses for the hardware devices. The relationship between the initial logical names and the hardware device addresses is compared against a desired relationship, as may be provided in a configuration file. Undesired relationships between logical names and hardware devices are reassigned so that the logical names are consistent with the physical labeling for the hardware devices. The reassigned logical names can be committed to system resources to make the reassignment persistent.
US09213675B1	Consumer incentives using mobile devices with point of sale processing systems and methods Disclosed are systems and methods for responding to the arrival of a person within a defined geographic area after receiving a virtual presence by applying discounts at a point-of-sale are defined. A mobile electronic device stores user profile and consumer incentive data and periodically outputs a unique device identification number and position data. A host server monitors the position data and when it is within the defined geographic area, the user profile and consumer incentive data is received from the mobile electronic device and transmitted to a servers and a point-of-sale for enhanced customer services and savings. When the user leaves the defined geographic area, the profile data is removed.
US09213674B2	Sharing memory among mobile devices A method, system, and/or computer program product enables the sharing of memory among mobile devices. Copies of a same hard key holder are installed in multiple mobile devices. The hard key holder controls memory sharing between a master mobile device and a slave mobile device. A memory appropriation request is sent from the master mobile device to the slave mobile device. In response to the slave mobile device receiving the memory appropriation request, an unused sector of the memory in the slave mobile device is reserved for use by the master mobile device. Upon storing of data sent from the master mobile device, a message is sent from the slave mobile device to the master mobile device describing how much room is still available for the master mobile device to use.
US09213667B2	Systems and methods for signal detection Methods for detecting one or more signals at a PCI Express interface includes receiving, a signal by a receiver at the PCI Express interface. The methods further include identifying one or more data sampling points to set an amplitude threshold. Further, the method includes comparing an amplitude of the received signal with the amplitude threshold. The method also includes confirming that the received signal is a valid signal when the amplitude of the signal is at least one of greater than or equal to the amplitude threshold over a predefined period of time. The method also includes disabling a signal detector of the PCI Express interface to save power. The signal detector is configured to detect one or more low frequency signals; and testing whether the detected signal is correct.
US09213666B2	Providing a sideband message interface for system on a chip (SoC) According to one embodiment, a system on a chip includes multiple agents each corresponding to an intellectual property (IP) logic and a fabric to couple the agents. The fabric can include a primary message interface and a sideband message interface. The fabric further includes one or more routers to provide out-of-band communications between the agents via this sideband message interface. To effect such communication, the router can perform a subset of ordering rules of a personal computer (PC)-based specification for sideband messages. Other embodiments are described and claimed.
US09213665B2	Data processor for processing a decorated storage notify A data processing system having a processor and a target device processes decorated instructions (i.e. an instruction having a decoration value). A device of the data processing system such as the processor sends transactions to the target device over a system interconnect. A decorated storage notify (DSN) transaction includes an indication of an instruction operation, an address associated with the instruction operation, and a decoration value (i.e. a command to the target device to perform a function in addition to a store or a load). The transaction on the system interconnect includes an address phase and no data phase, thereby improving system bandwidth. In one form the target device (e.g. a memory with functionality in addition to storage functionality) performs a read-modify-write operation using information at a storage location of the target device.
US09213661B2	Enable/disable adapters of a computing environment An adapter is enabled for use. The enabling includes assigning one or more address spaces to the adapter, based on a request. For each address space assigned to the adapter, a corresponding device table entry is assigned. When the adapter is no longer needed, it is disabled and the assigned device table entries become available.
US09213660B2	Receiver based communication permission token allocation A data processing apparatus is provided with a master device and a slave device which communicate via communication circuitry. The slave device is associated with a predetermined number of permission tokens that is equal to a maximum number of currently pending messages that can be accepted for processing from the communication circuitry by that slave device. The slave device transmits these permission tokens to the master device. The master device takes exclusive temporary possession of the permission tokens that it receives such that the permission tokens are then no longer available to any other master device. A master device initiates a message to a slave device when the master device has exclusive temporary possession of a permission token for that slave device. When the master device has initiated its message, then it relinquishes the exclusive temporary possession of the permission token such that it is then available for other devices.
US09213659B2	Devices and methods to receive input at a first device and present output in response on a second device different from the first device An apparatus includes a processor and a memory accessible to the processor. The memory bears instructions executable by the processor to receive user input into the apparatus implicating an output in response, and present the response on a device separate and apart from the apparatus instead of presenting the response on the apparatus.
US09213657B2	Memory controller with fast reacquisition of read timing to support rank switching Techniques for performing fast timing reacquisition of read timing in a memory controller to support rank switching device are described. During operation, a memory controller receives read data for a read operation, wherein the read data includes a calibration preamble. The memory controller uses the calibration preamble to perform a fast timing reacquisition operation to compensate for a timing drift between a clock path and a data path for the read data. In particular, the memory controller performs the fast timing reacquisition by adjusting a data delay line coupled to a clock path associated with a control loop, wherein the control loop controls a data clock which is used to receive read data at the memory controller.
US09213656B2	Flexible arbitration scheme for multi endpoint atomic accesses in multicore systems The MSMC (Multicore Shared Memory Controller) described is a module designed to manage traffic between multiple processor cores, other mastering peripherals or DMA, and the EMIF (External Memory InterFace) in a multicore SoC. The invention unifies all transaction sizes belonging to a slave previous to arbitrating the transactions in order to reduce the complexity of the arbitration process and to provide optimum bandwidth management among all masters. Two consecutive slots are assigned per cache line access to automatically guarantee the atomicity of all transactions within a single cache line. The need for synchronization among all the banks of a particular SRAM is eliminated, as synchronization is accomplished by assigning back to back slots.
US09213655B2	Computing device to connect to a portable device A computing device receives, from a portable device, an application that is executable on the portable device. The computing device determines whether the received application is a static application or an interpreted application. In response to determining that the received application is a static application, the computing device executes the received application using a hardware virtualizer. In response to determining that the received application is an interpreted application, the computing device executes the received application using a dynamic translator.
US09213650B2	Memory management unit A data processing apparatus is provided comprising a plurality of master devices configured to issue memory access requests including virtual addresses. A memory management unit is configured to receive memory access requests and to translate a virtual address included in a memory access request from a requesting master device into a physical address indicating a storage location in memory. The memory management unit has an internal storage unit having a plurality of entries wherein indications of corresponding virtual address portions and physical address portions are stored. The memory management unit is configured to select an entry of the internal storage unit in dependence on the virtual address and an identifier of the requesting master device. Conflict between the master devices in their usage of the internal storage unit is thus avoided.
US09213648B1	System, apparatus, and method of securely erasing cache A computer-executable method, system, and computer program product for managing a data storage system, wherein the data storage system includes a cache and a data storage array, the computer-executable method comprising receiving a request to initialize a data storage system and initializing the data storage system by purging the cache.
US09213647B2	Least-recently-used (LRU) to first-dirty-member distance-maintaining cache cleaning scheduler A technique for scheduling cache cleaning operations maintains a clean distance between a set of least-recently-used (LRU) clean lines and the LRU dirty (modified) line for each congruence class in the cache. The technique is generally employed at a victim cache at the highest-order level of the cache memory hierarchy, so that write-backs to system memory are scheduled to avoid having to generate a write-back in response to a cache miss in the next lower-order level of the cache memory hierarchy. The clean distance can be determined by counting all of the LRU clean lines in each congruence class that have a reference count that is less than or equal to the reference count of the LRU dirty line.
US09213646B1	Cache data value tracking Systems and methods are disclosed for cache data value tracking. In an embodiment, a controller may be configured to select data; set a node weight for the data representing a cache hit potential for the data; store a first time stamp value for the data representing when the data was accessed; and store the data in a cache memory based on the node weight and the first time stamp value. In another embodiment, a method may comprise setting a node weight for data associated with a data access command, storing a first access counter value for the data representing a number of times new data has been stored to the cache memory when the data was accessed, and removing the data from the cache memory or maintaining the data in the cache memory based on the node weight and the first access counter value.
US09213645B2	Command aware partial page programming A method and system for partial page programming in a storage device is disclosed. An amount of data for partial page programming is determined. The amount may include host data (such as host data in a host command sent from a host device) and/or binary cache index data. The write step, used for partial page programming, is dynamically set based on the determined amount of data for partial page programming. In this way, the write step for partial page programming is dynamic rather than fixed. Further, dynamically setting the write step may reduce the number of programming steps for storing the host data in the host command and may reduce padding when partial page programming, thereby leaving less invalid data inside a block.
US09213634B2	Efficient reuse of segments in nonoverwrite storage systems A non-overwrite storage system, such as a log-structured file system, that includes a non-volatile storage having multiple storage segments, a volatile storage having an unsafe free segments list (UFSL), and a controller for managing storage resources of the non-volatile storage. The controller can be configured to copy page data from used segment(s) of the non-volatile storage, write the copied page data to free segment(s) of the non-volatile storage, index the UFSL with indications of the used segment(s), and thereafter prevent reuse of the used segment(s) while the indications of the used segment(s) remain indexed in the UFSL. In some implementations, the non-overwrite storage system may be associated with flash storage system, and a flash controller can be configured perform a flush track cache operation to clear the indications of the used segment(s) from the UFSL, to enable reuse of segment(s) that were previously indexed to the UFSL.
US09213633B2	Flash translation layer with lower write amplification A method of associating a logical block address with a physical location in a non-volatile memory includes (A) in response to a write request comprising a respective logical block address in a logical block address space and respective data to be written to the non-volatile memory, determining a physical location in the non-volatile memory to store the respective data of the write request, (B) adding an entry to a journal, such that the added entry trails any entries already in the journal and the added entry has a respective logical block address field set to the respective logical block address of the write request and a respective physical location field set to the determined physical location, and (C) updating one of a plurality of second-level map pages in a two-level map according to the respective logical block address of the write request with the determined physical location.
US09213628B2	Methods and systems for reducing churn in flash-based cache A storage device includes a flash memory-based cache for a hard disk-based storage device and a controller that is configured to limit the rate of cache updates through a variety of mechanisms, including determinations that the data is not likely to be read back from the storage device within a time period that justifies its storage in the cache, compressing data prior to its storage in the cache, precluding storage of sequentially-accessed data in the cache, and/or throttling storage of data to the cache within predetermined write periods and/or according to user instruction.
US09213627B2	Non-volatile memory with block erasable locations A main memory (10) comprises a plurality of physical blocks of memory locations. The main memory (10) supports erasing of at least a physical block at a time. Pointer information is stored in a subset (40, 42) of the blocks for use to identify respective ones of the physical blocks that are assigned to respective functions. Successive versions of the pointing information are stored at mutually different memory locations initially in a first block (40) in the subset (40, 42). A subsequent version of the pointing information that is more recent than the successive versions is stored in a second block (42) of the subset (40, 42) at least after the first block (40) has been filled. The first block (40) is erased after storing the subsequent version. On start up of the main memory the pointing information is recovered by testing which of the blocks of the subset (40, 42) contains a most recent version of the pointing information.
US09213619B2	Algorithm selection for collective operations in a parallel computer Algorithm selection for collective operations in a parallel computer that includes a plurality of compute nodes may include: profiling a plurality of algorithms for each of a set of collective operations, including for each collective operation: executing the operation a plurality times with each execution varying one or more of: geometry, message size, data type, and algorithm to effect the collective operation, thereby generating performance metrics for each execution; storing the performance metrics in a performance profile; at load time of a parallel application including a plurality of parallel processes configured in a particular geometry, filtering the performance profile in dependence upon the particular geometry; during run-time of the parallel application, selecting, for at least one collective operation, an algorithm to effect the operation in dependence upon characteristics of the parallel application and the performance profile; and executing the operation using the selected algorithm.
US09213614B2	Method for testing a software application To test a software application, a method submits an electronic board including a component implementing an application to a laser radiation generated in test equipment. The component is excited with laser pulses having very short durations distributed during complex operational phases of the component for running the application, and the reaction of the component and the application are observed.
US09213610B2	Configurable storage device and adaptive storage device array An array can include a controller and multiple storage devices of a first type. When a storage device of the first type is replaced by a replacement storage device of a second type, and other storage devices of the first type remain in the array, the controller instructs the replacement storage device to configure itself as a storage device of the first type. When the last storage device of the first type in the array is replaced by a replacement storage device of the second type, the controller instructs all the storage devices of the array to configure themselves as storage devices of the second type.
US09213609B2	Persistent memory device for backup process checkpoint states A system is described that includes a network interface attached to a persistent memory unit. The persistent memory unit is configured to receive checkpoint data from a primary process, and to provide access to the checkpoint data for use in a backup process, which provides recovery capability in the event of a failure of the primary process. The network interface is configured to provide address translation information between virtual and physical addresses in the persistent memory unit. In other embodiments, the persistent memory unit is capable of storing multiple updates to the checkpoint state. The checkpoint state and the updates to the checkpoint state, if any, can be retrieved by the backup process periodically, or all at once upon failure of the primary process.
US09213607B2	Systems, methods, and media for synthesizing views of file system backups Systems, methods, and media for synthesizing a view of a file system are provided herein. Methods may include receiving a request to obtain a view of at least a portion of a file system backup for a device, responsive to the request, mounting one or more backup files for the device on a backup node, generating a view of the at least a portion of a file system created from the one or more mounted backup files, the view being accessible via the intermediary node that is communicatively coupled with the backup node.
US09213604B2	Semiconductor memory controlling device which writes data and error correction codes into different semiconductor storage drives A semiconductor memory controlling device includes a write control unit that writes a predetermined number of pieces of first data and redundant information calculated by using the predetermined number of pieces of the first data and used for correcting an error in the first data into different semiconductor storage drives, respectively; a constructing unit that constructs a storage area for storing therein a table by using driver information, the table showing an association between a logical address and a physical address of the first data and identification information for associating the predetermined number of pieces of first data with the redundant information; and a table controlling unit that stores, into the storage area, the table associated with the identification information, the physical address and the logical address of the predetermined number of pieces of the first data, and a physical address of the redundant information.
US09213601B2	Adaptive data re-compaction after post-write read verification operations Approaches are presented for adaptively re-compacting data when errors are found during a post-write verify in a non-volatile memory system, such as flash NAND memory. In one example, user data along with corresponding parity data is written into a block of non-volatile memory. After writing in the user data, but prior to writing the corresponding parity data, the user data is checked. For any word lines that fail this post-write verify, the parity data for the block is adjusted to remove the contribution of any failed word lines before this modified parity data is written into the block. The data corresponding to the failed word lines can then be written elsewhere in the memory system.
US09213598B2	Nonvolatile memory device and method of operating the same A nonvolatile memory device includes a nonvolatile memory, a buffer memory configured to store a plurality of read data transmitted from the nonvolatile memory, an error detection and correction circuit configured to detect an error in partial data of each of the plurality of read data and judging whether the partial data is correctable or not on the basis of the detected error, and a controller configured to analyze the uncorrectable partial data with respect to the plurality of read data to determine a representative value, and to transmit the representative value to the error detection and correction circuit. The plurality of read data is read through a read operation with respect to a same page.
US09213593B2	Efficient memory architecture for low density parity check decoding A low density parity check (LDPC) decoder integrated on a single semiconductor substrate may comprise one or more arrays of first-type memory cells and one or more arrays of second-type memory cells. The LDPC decoder may be configured to store intrinsic messages in the array of first-type cells and to store extrinsic messages in the array of second-type cells. The first-type cells may be a first one of: static random access memory (SRAM) cells, refreshed dynamic random access memory (DRAM) cells, non-refreshed DRAM cells configured as a FIFO, and non-refreshed DRAM cells not configured as a FIFO. The second-type cells may be a second one of: static random access memory (SRAM) cells, refreshed dynamic random access memory (DRAM) cells, non-refreshed DRAM cells configured as a FIFO, and non-refreshed DRAM cells not configured as a FIFO.
US09213592B2	Semiconductor memory device and method of operating the same Semiconductor memory device and method of operating same includes reading data stored in memory cells of a page; performing an error correction loop (ECC loop) including performing an error checking and correcting operation (ECC) on the read data; determining a number of bit errors in the read data; and when the number of bit errors is greater than a maximum number of correctable bits, incrementing the number of ECC iterations (ECC count) and increasing the maximum number of correctable bits; storing the ECC count until the number of bit errors is less than the maximum number of correctable bits; and programming corrected data to the memory cells when the stored ECC count is more than preset number.
US09213591B1	Electrically erasable programmable memory device that generates a cyclic redundancy check (CRC) code A controller includes a link interface that is to couple to a first link to communicate bi-directional data and a second link to transmit unidirectional error-detection information. An encoder is to dynamically add first error-detection information to at least a portion of write data. A transmitter, coupled to the link interface, is to transmit the write data. A delay element is coupled to an output from the encoder. A receiver, coupled to the link interface, is to receive second error-detection information corresponding to at least the portion of the write data. Error-detection logic is coupled to an output from the delay element and an output from the receiver. The error-detection logic is to determine errors in at least the portion of the write data by comparing the first error-detection information and the second error-detection information, and, if an error is detected, is to assert an error condition.
US09213582B2	Differentiated service identification in a networked computing environment Embodiments of the present invention provide an approach for differentiated service identification/exposure in a networked computing environment (e.g., a cloud computing environment). In a typical embodiment, input model criteria will be generated. Such criteria may (among other things): identify service categories based on contextual bindings and domain centric functions; identify inter-service dependencies for a given business model (BPM); and/or provide dynamic validation of services to be exposed/identified. Embodiments of the present invention may further analyze service exposure criteria to provide efficient and accurate service exposure decisions as well as validation of the service exposure. This approach allows for consistent service exposure determinations based on decision histories of similarly (2-dimensional) aligned services in the past. This approach further allows for a validation assessment that is based on actual metrics of service usage verses an estimated usage at the time of service implementation.
US09213581B2	Method and system for a cloud frame architecture A cloud frame provides a framework comprising a monitoring and network services to support hardware nodes such as computing nodes and storage nodes. Cloud frames may be organized into a cluster of cloud frames. Hardware nodes in a cloud frame environment may conduct self-allocation of needed resources, which in turn may be provided by other hardware nodes in the cloud frame environment.
US09213580B2	Transportable private cloud computing platform and associated method of use The present invention is a transportable private cloud computing platform, having a rack, several servers, a system management server, an interface device, a network switch, a power supply circuit, and a transit case. The present invention also includes a method for initializing the transportable private cloud computing platform, and a method for migrating software applications to the transportable private cloud computing platform.
US09213579B2	Software component placement on execution platforms A method, system, and computer program product for improving software component placement on software execution platforms are provided in the illustrative embodiments. A computer determines whether a code corresponding to the software component includes business process logic. The computer determines a granularity level of the code. The granularity level of the code is a categorization of the code according to whether a number of external references in the code exceed a threshold value. The computer, responsive to determining the granularity level of the code, recommends placement of a first portion of the code on a first platform in the set of software execution platforms.
US09213574B2	Resources management in distributed computing environment A method, system and a computer program product for determining resources allocation in a distributed computing environment. An embodiment may include identifying resources in a distributed computing environment, computing provisioning parameters, computing configuration parameters and quantifying service parameters in response to a set of service level agreements (SLA). The embodiment may further include iteratively computing a completion time required for completion of the assigned task and a cost. Embodiments may further include computing an optimal resources configuration and computing at least one of an optimal completion time and an optimal cost corresponding to the optimal resources configuration. Embodiments may further include dynamically modifying the optimal resources configuration in response to at least one change in at least one of provisioning parameters, computing parameters and quantifying service parameters.
US09213573B2	Management of prioritizing virtual machines in an operating environment Embodiments directed toward a method, system, and computer program product for placement of a plurality of virtual machines on a hardware resource are provided. The method can also include generating a user location vector for each candidate virtual machine from the plurality of candidate virtual machines by aggregating a plurality of user location metrics for each candidate virtual machine. The method can also include ranking, in response to a performance resource demanded by the plurality of candidate virtual machines being at or above a threshold of the performance resource available on the hardware resource, the candidate virtual machines as a function of an aggregate user location vector for each candidate virtual machine. The method can include selecting a subset of the candidate virtual machines for migration based on the ranking.
US09213572B2	Interdependent virtual machine management Exemplary methods, apparatuses, and systems determine a list of virtual machines to be subject to a corrective action. When one or more of the listed virtual machines have dependencies upon other virtual machines, network connections, or storage devices, the determination of the list includes determining that the dependencies of the one or more virtual machines have been met. An attempt to restart or take another corrective action for the first virtual machine within the list is made. A second virtual machine that is currently deployed and running or powered off or paused in response to the corrective action for the first virtual machine is determined to be dependent upon the first virtual machine. In response to the second virtual machine's dependencies having been met by the attempt to restart or take corrective action for the first virtual machine, the second virtual machine is added to the list of virtual machines.
US09213571B2	System and method for changing abilities of a process A system and method wherein a set of privileges assigned to a process may be modified responsive to a request. The modification may apply to one or more abilities within the set of privileges and may be applied during execution of the process subsequent to the process creation time. Accordingly a process may be created with a default set of privileges and subsequently the privileges may be modified (e.g. to include a sub-set of the default privileges) thereby mitigating the risk of malicious exploitation of the process through attack.
US09213570B2	High-performance virtual machine networking A method for conveying a data packet received from a network to a virtual machine instantiated on a computer system coupled to the network, and a medium and system for carrying out the method, is described. In the method, a guest receive pointer queue of a component executing in the virtual machine is inspected in order to identify a location in a guest receive packet data buffer that is available to receive packet data. Data from the data packet received from the network is copied into the guest receive packet data buffer at the identified location, and a standard receive interrupt is raised in the virtual machine.
US09213567B2	System and method for controlling the input/output of a virtualized network In accordance with an embodiment a method of running a virtual machine on a server includes controlling data path resources allocated to the virtual machine using a first supervisory process running on the server, controlling data path resources comprising controlling a data path of a hardware interface device coupled to the server, and controlling control path and initialization resources of the hardware interface device using a second process running on the server, where the second process is separate from the first supervisory process.
US09213565B2	Methods and systems for mining datacenter telemetry data This disclosure is directed to systems and methods for mining streams of telemetry data in order to identify virtual machines (“VMs”), discover relationships between groups of VMs, and evaluate VM performance problems. The systems and methods transform streams of raw telemetry data consisting of resource usage and VM-related metrics into information that may be used to identify each VM, determine which VMs are similar based on their telemetry data patterns, and determine which VMs are similar based on their patterns of resource consumption. The similarity patterns can be used to group VMs that run the same applications and diagnose and debug VM performance.
US09213558B2	Method and apparatus for tailoring the output of an intelligent automated assistant to a user The present invention relates to a method and apparatus for tailoring the output of an intelligent automated assistant. One embodiment of a method for conducting an interaction with a human user includes collecting data about the user using a multimodal set of sensors positioned in a vicinity of the user, making a set of inferences about the user in accordance with the data, and tailoring an output to be delivered to the user in accordance with the set of inferences.
US09213557B2	Method and system for embedding user assistance in documents utilizing markup languages A document creation application, compound document format, and method for providing user assistance in a compound document are described. The compound documents are formed using a markup language and include both non-volatile text and user selected and/or input data. The compound documents also include embedded user assistance triggers, or links, at specific terms, concepts or user input areas which dynamically link a user to appropriate user assistance information in the document creation application. The method describes embedding user assistance links in compound documents to allow users to dynamically link to topic specific user assistance information.
US09213548B2	Code generation method and information processing apparatus An information processing apparatus generates first and second trees representing a dependency relationship among instructions from first code. The information processing apparatus then adjusts the height of the shorter one of the first and second trees by inserting pseudo instructions that do not cause any difference in data before and after operation in the shorter tree, and also shuffles the order of instructions existing at the same depth from the root, according to operation types in at least one of the first and second trees. The information processing apparatus compares the first and second trees subjected to the height adjustment and the order shuffling with each other to determine combinations of an instruction of the first tree and an instruction of the second tree.
US09213546B2	Implementation of instruction for direct memory copy Embodiments of the present invention relate to a method and system for performing a memory copy. In one embodiment of the present invention, there is provided a method for performing memory copy, including: decoding a memory copy instruction into at least one microcode in response to receipt of the memory copy instruction, transforming the at least one microcode into a ReadWrite Command for each of the at least one microcode, and notifying a memory controller to execute the ReadWrite Command, wherein the ReadWrite Command is executed by the memory controller and comprises at least a physical source address, a physical destination address and a ReadWrite length that are associated with the ReadWrite Command. In another embodiment of the present invention, there is provided a system for performing a memory copy.
US09213545B2	Storing data in any of a plurality of buffers in a memory controller A memory controller containing one or more ports coupled to a buffer selection logic and a plurality of buffers. Each buffer is configured to store write data associated with a write request and each buffer is also coupled to the buffer selection logic. The buffer selection logic is configured to store write data associated with a write request from at least one of the ports in any of the buffers based on a priority of the buffers for each one of the ports.
US09213542B2	Creating templates of offline resources Implementations of the present invention allow software resources to be duplicated efficiently and effectively while offline. In one implementation, a preparation program receives an identification of a software resource, such as a virtual machine installed on a different volume, an offline operating system, or an application program. The preparation program also receives an indication of customized indicia that are to be removed from the software resource. These indicia can include personalized information as well as the level of software updates, security settings, user settings or the like. Upon execution, the preparation program redirects the function calls of the preparation program to the software resource at the different volume (or even the same volume) while the software resource is not running. The preparation program thus can thus creates a template of the software resource in a safe manner without necessarily affecting the volume at which the preparation program runs.
US09213540B1	Automated workflow management system for application and data retirement Systems and methods are provided for retiring an application and any associated data, hardware assets, and software assets. A workflow management system creates and tracks the life cycle of a project for application retirement, data retirement, purge, or performance archiving. The workflow management system evaluates the cost of the project, the availability of resources for the project, and captures information about the application and associated assets. Upon deciding to initiate the project based on the evaluations, the workflow management system captures and tracks implementation of project requirements. The workflow management system further manages retirement of hardware and software assets by cancelling, repurposing, decommissioning, or bypassing the assets.
US09213539B2	System having a building control device with on-demand outside server functionality A system having a building control device with on-demand outside server functionality. It may have a building control device connected to a thin user interface client and/or a rich client user interface. The building control device may be connected to an external server from a computing cloud environment to extend the functionality, storage and processing, among other things, of the building control device.
US09213534B2	Method for restoring software applications on desktop computers An automated method is provided for restoring software applications installed on a desktop computer. Information identifying an inventory of software applications resident on the computer is stored locally in a file on the computer. In response to a request to restore applications, the inventory is compared to a master library of known software applications, and those applications in the inventory that are found in the library are selected and downloaded onto the computer to complete the restoration process.
US09213527B2	Model elements in software tools as automatons in a software customization system and method Presented is a system and method for the integration of existing software development tools into a software customization system, where each software development tool has its own model of its software artifacts. The invention allows models in an external software development tool to become software artifacts within a software customization system, and also allows the model elements of the existing tools to become automatons.
US09213518B2	System and image processing apparatus with a plurality of display devices An image processing apparatus includes display panels included in each of an operation unit 130 and a display unit 136, and a control unit causing the two display panels to successively make transitions to a power save mode if a prescribed time period has passed without any operation to the operation unit 130. If priority is given to the operation, the control unit first causes the display panel of display unit 136 to make a transition to the power save mode, and thereafter causes the display panel of the operation unit 130 to the power save mode. If the priority is given to the display, the control unit causes the display panel of operation unit 130 to make a transition to the power save mode, and thereafter causes the display panel of display unit 136 to make a transition to the power save mode. Thus, wasteful power consumption by the two display panels can be reduced.
US09213515B2	On-demand multi-screen computing Concepts and technologies disclosed herein are for on-demand multi-screen computing. According to one aspect disclosed herein, a method for multi-screen computing includes establishing a multi-screen computing session, establishing communication with a primary computing device and an auxiliary device to be included in the multi-screen computing session, creating a web container for the auxiliary device, and propagating the web container to the auxiliary device for presentation on a display of the auxiliary device.
US09213513B2	Maintaining synchronization of virtual machine image differences across server and host computers A virtual printer driver or proxy printer driver executed by a virtual machine communicates with a real printer driver executed by a host computer to enable application programs executed by the virtual machine to print data on printers that are accessible by the host computer.
US09213510B1	Print scheduling mechanism A method disclosed. The method includes receiving a plurality of jobs at a printing environment, collecting a first set of the plurality jobs at a first filter based on one or more job properties, generating a first batch of one or more jobs to be processed from the first set of jobs in the first filter that and displaying the first filter and the first batch at a graphical user interface (GUI).
US09213509B2	Electric equipment To provide an electric equipment which has a function in which parameter is set, and enables a user to appropriately adjust the parameters regardless of an ability level of user. A plurality of reception screens having different degrees of detail for received instructions for adjusting parameters are displayed depending on the ability level of user to adjust the appropriate parameters, such as maintenance ability, or presence or absence of the specialized knowledge for the apparatus, or the like, thus the user adjusts the parameter using the reception screen suitable for the user.
US09213508B2	Information processing apparatus, print setting method, and storage medium An information processing apparatus includes a printer driver, a reception unit, a first and second determination unit, a transmission unit, and a change unit to instruct, via the printer driver, a printer to execute printing. The reception unit receives print data including setting data having setting values for print setting items. The first determination unit determines whether setting values cause an inconsistency. The second determination unit determines whether the client apparatus or the information processing apparatus is to resolve an inconsistency. The transmission unit transmits, in response to determining that the setting values cause an inconsistency and that the client apparatus is to resolve the inconsistency, an instruction for resolving the inconsistency to the client apparatus. The change unit changes, in response to determining that the setting values cause an inconsistency and that the information processing apparatus is to resolve the inconsistency, the setting data to resolve the inconsistency.
US09213506B2	Collaborative method of creating, printing, distributing information tags A fully collaborative software management method allows creating, printing, delivering and hanging-in-stores a sequential arrangement of information tags. Customer and printer computers are operably connected to communicate during a design and assembly stage of developing the tags. Customer decision-makers and printer decision-makers collaborate on template authoring, content and template management, printing-event construction, staging and proofing, including integration of various elements such as stored data, timing, customer-driven controls, and event-driven controls. The method allows printer decision-makers to operate a publishing engine that permits viewing the customized information tags as a display prior to viewing as a printed product. The system includes a file transfer protocol (FTP) server connected to an information processing and printing system comprising designer workstation computers, a staging server, a load balancer, production distiller workstation computers, a database server, an SQL server, multiple print servers, and digital presses.
US09213503B2	Service provider management of virtual instances corresponding to hardware resources managed by other service providers A dynamic pool of virtual instances is managed. Each virtual instance corresponds to one or more hardware resources. Management includes tracking for each virtual instance: historical and current utilization, an operating cost, a capacity, and a characteristic associated with a capability of the hardware resources to which the virtual instance corresponds. A given virtual instance of the dynamic pool of virtual instances on which to schedule a workload for completion is selected, based on a characteristic of the workload matching the characteristic of the given virtual instance, and taking into account the capacity, the current utilization, and the operating cost of the given virtual instance. The hardware resources are managed by service providers different than a service provider managing computing devices on which the virtual instances are managed and the workload is scheduled, and the workload is received from a customer different than any of these service providers.
US09213500B2	Data processing method and device A data processing method, which includes: writing, by an application module, data to be written in a data buffer, and sending a write request command and an address of the data buffer to a Virtual Host Bus Adapter (VHBA); sending, by the VHBA, the write request command and the address of the data buffer to a storage array module; and acquiring, by the storage array module, the data to be written from the data buffer, and then writing, into the storage medium, the data to be written according to the address of the data to be written into the storage medium. In the embodiments, it is only required to transfer the address of the data buffer and the data to be written when writing the data, so memory copy is reduced and system performance is improved.
US09213495B2	Controller management of memory array of storage device using magnetic random access memory (MRAM) in a mobile device A mass storage device includes a controller configured to communicate with a host. The controller is coupled to a first memory and a second memory, the first and second memories being of different types. The mass storage device includes a storage media partitioned into a plurality of Logical Units (LUNs) based on capabilities and resources of the mass storage device. The mass storage device further includes the first memory and the second memories and a hybrid reserved area spanning at least a portion of the first and second memories.
US09213494B1	De-duplication in a virtualized storage environment In one example, a method for de-duplicating redundant data in a virtualized storage environment includes operating a data de-duplication application on a host system that is one of a plurality of host systems in a computer architecture, where the data de-duplication application is operable to globally de-duplicate data in a pooled storage capacity that comprises a virtualization of a plurality of storage devices.
US09213487B2	Receiver architecture for memory reads A receiver architecture for memory reads is described herein. In one embodiment, a memory interface comprises a plurality of transmitters, wherein each of the plurality of transmitters is configured to transmit data to a memory device over a respective one of a plurality of I/O channels. The memory interface also comprises a plurality of receivers, wherein each of the plurality of receivers is coupled to a respective one of the plurality of transmitters, and is configured to receive data from the memory device over the respective one of the plurality of I/O channels. The plurality of receivers are grouped together into a receiver subsystem that is located away from the plurality of transmitters.
US09213486B2	Writing new data of a first block size to a second block size using a write-write mode Apparatuses and methods to write new data of a first block size are provided. A particular method may include writing old data from a destination block of a second block size of a data drive to a first buffer of the second block size. The old data may be written according to address information of the old data and without overwriting the new data in the first buffer. The method may further include writing zeros to a second buffer of the second block size according to the address information of the old data. The zeros written in the second buffer may correspond with the old data written in the first buffer.
US09213485B1	Storage system architecture A storage system is provided. The storage system includes a plurality of storage units, each of the plurality of storage units having storage memory for user data and a plurality of storage nodes, each of the plurality of storage nodes configured to have ownership of a portion of the user data. The storage system includes a first pathway, coupling the plurality of storage units such that each of the plurality of storage units can communicate with at least one other of the plurality of storage units via the first pathway without assistance from the plurality of storage nodes.
US09213482B2	Touch control device and method A method for controlling a touch control device includes defining a first area and a second area on a touchpad, detecting whether a touched position on the touchpad that is touched by an operating object falls in the first area or the second area, and calculating the corresponding on-screen coordinates of the operating object with different sets of ratios depending on the touched position.
US09213475B2	Information processing apparatus, program, and information processing method for representing correlation of parameters within objects There is provided an information processing apparatus including a selection part selecting a parameter from graphic data, a display control part controlling an object corresponding to the parameter selected by the selection part to be displayed and an extraction part extracting a parameter having a correlation with the parameter selected by the selection part, wherein the display control part controls the object to be moved based on the correlation.
US09213466B2	Displaying recently used functions in context sensitive menu A computer implemented method displays an object. The method includes causing the display of a context specific shortcut menu in response to a user command. The menu can include a set of functions relating to the context of the displayed object and a set of a predetermined number of the most recently used functions relating to the context of the displayed object. The most recently used functions can be displayed above the other functions.
US09213463B2	Graphical object classification In one implementation, a graphical object classification system includes an acquisition module, a signature generation module, and a classification module. The acquisition module accesses a representation of a graphical object. The signature generation module generates an appearance-invariant signature of the graphical object based on the representation. The classification module classifies the graphical object based on the appearance-invariant signature.
US09213462B2	Unified communications application functionality in condensed views A unified communications application is described herein. The unified communications application is displayable in one of two views: a full view and a condensed view. When displayed in the condensed view, which consumes less than fifty percent of a display screen, the unified communications application is employable by a user thereof to participate in real-time conversations/meetings with contacts of the user.
US09213458B2	Hover position calculation in a touchscreen device A method is disclosed for calculating position of a conductive object hovering above a plurality of mutual capacitance sensors. The method begins by measuring capacitance on a plurality of mutual capacitance sensors, each mutual capacitance sensor represented as a unit cell in an array of unit cells. After measuring the capacitances, the method identifies a peak unit cell based on the measured capacitances and calculates an edge cutoff value from the measured capacitances. After the edge cutoff value is calculated, a plurality of unit cells with measured capacitance within a range defined by the edge cutoff value is selected and the position of the hovering conductive object calculated. A user interface device is disclosed that comprises a first plurality capacitance sensing electrodes disposed along a first axis of an array, a second plurality of capacitance sensing electrodes disposed along a second axis of an array, and a controller. The controller may be configured to calculate position of a conductive object hovering above a plurality of mutual capacitance sensors. The controller may measure capacitance on a plurality of mutual capacitance sensors, each mutual capacitance sensor represented as a unit cell in an array of unit cells. After measuring the capacitances, the controller may identify a peak unit cell based on the measured capacitances and calculate an edge cutoff value from the measured capacitances. After the controller calculates the edge cutoff value, it may calculate position based on unit cells within a range defined by the edge cutoff value.
US09213457B2	Driving method for touch panel and touch control system A driving method for touch panel includes providing a plurality of driving signals with a first voltage level to a plurality of sensing electrodes of a touch panel; receiving a plurality of sensing signals corresponding to the plurality of driving signals with the first voltage level from the plurality of sensing electrodes of the touch panel; obtaining a second voltage level according to the plurality of sensing signals, the second voltage level being different from the first voltage level; and providing a plurality of driving signals with the second voltage level to the plurality of sensing electrodes of the touch panel.
US09213453B2	Capacitance-type detecting device A capacitance-type detecting device according to an embodiment of the invention includes a plurality of detecting electrodes that are provided on a sensor substrate such that capacitance is formed between adjacent electrodes. Capacitance formed in a corner detection region in which the detection sensitivity of the sensor substrate is relatively low is more than that formed in a central detection region in which the detection sensitivity is relatively high.
US09213444B2	Touch device and touch projection system using the same A touch device including a light guide unit, a light emitting unit, an invisible light filter and an invisible light detector is provided. The light guide unit has at least one light incident surface and a first surface connected to the light incident surface. The light emitting unit is disposed beside the light incident surface and is capable of emitting an invisible light beam. The invisible light filter is contacted tightly with the first surface. The light guide unit is disposed between the invisible light filter and the invisible light detector. Moreover, a touch projection system including the touch device is also provided.
US09213443B2	Optical touch screen systems using reflected light A touch screen system, including a near-infrared transparent screen including a plurality of reflective elements embedded therein, a circuit board including circuitry for controlled selective activation of electronic components connected thereto, at least one light source connected to the circuit board, for emitting light, and at least one light detector connected to the circuit board, for detecting light emitted by the at least one light source and reflected by the reflective elements.
US09213437B2	Touch panel controller, integrated circuit, touch panel system, and electronic device A touch panel controller (3) includes: a drive section (4); a differential amplifier (5); variable integral capacitors (Cint1, Cint2); and a capacitance control section (6) that controls the variable integral capacitors (Cint1, Cint2) so as to correct line dependency of capacitors (C31 to C34, C41 to S44).
US09213436B2	Fingertip location for gesture input A user can use a finger, or other such object, to provide input to a computing device. The finger does not have to contact the device, but can be positioned and/or oriented in such a way that the device can determine an input that the user is attempting to provide, such as an element or icon that the user is intended to select. One or more cameras can capture image information, which can be analyzed to attempt to determine the location and/or orientation of the finger. If the finger is at least partially outside a field of view of the camera(s), the device can use a sensor (e.g., EMF) to attempt to determine a location of at least a portion of the finger, which can be used with the image information to determine the location and/or orientation of the finger. Other estimation processes can be used as well.
US09213435B2	Method and system for selecting items using touchscreen A method for selecting items using a touchscreen includes displaying a plurality of items as icons on the touchscreen, receiving a touch signal including information on a touch point on the touchscreen, and determining one or more selected items from among the plurality of items upon reception of the touch signal. A system for selecting items includes a touchscreen including a display unit for displaying a plurality of items as icons and an input unit displayed on the display unit and displaying coordinate data corresponding to a touch applied to the display unit, a storage unit storing content, and a controller for controlling the display unit of the touchscreen and the storage unit on the basis of a touch signal received through the input unit of the touchscreen.
US09213433B2	Display panel for display device The present disclosure provides a display panel for a display device including a touch electrode divided into first touch unit sensors having a first size and second touch unit sensors having a second size different from the first size. When a horizontal or vertical size of a second touch unit sensor is compared with a first touch unit sensor, the vertical size of the second touch unit sensor is smaller than that of the first touch unit sensor when the horizontal size of the second touch unit sensor is larger than that of the first touch unit sensor and the horizontal size of the second touch unit sensor is smaller than that of the first touch unit sensor when the vertical size of the second touch unit sensor is larger than that of the first touch unit sensor. Therefore, an area deviation of touch unit sensors forming a touch electrode is minimized and thus uniform and superior touch performance may be provided.
US09213431B2	Opening child windows in dual display communication devices The present disclosure is directed to methodologies and devices for handling maximizing and minimizing of hierarchically related windows.
US09213429B2	Touch display module and assembly method thereof A touch display module and an assembly method thereof are provided. The touch display module includes a backlight module, a cover plate, a display panel, a touch panel, a first adhesive layer, a second adhesive layer, a third adhesive layer and a fourth adhesive layer. The cover plate and the backlight module are disposed oppositely. The display panel is disposed between the backlight module and the cover plate. The touch panel is disposed between the display panel and the cover plate. The first adhesive layer covers around the backlight module, the display panel and the touch panel and a back portion of the backlight module. The second adhesive layer is disposed between the backlight module and the display panel. The third adhesive layer is disposed between the display panel and the touch panel. The fourth adhesive layer is disposed between the touch panel and the cover plate.
US09213428B2	Portable electronic device including flexible display A portable electronic device includes a first flexible display. The first flexible display includes a display area, a non-display area, and a first fold such that at least part of the non-display area is non-coplanar with the display area. Information is displayable near the first fold.
US09213423B2	Method and system for determining stylus tilt in relation to a touch-sensing device In one embodiment, a method includes receiving, at each of at least four receivers of a stylus, a signal from an electrode line oriented along a first axis of a touch-sensing device and determining, by a processor of the stylus, a signal strength of the signal at each of the at least four receivers of the stylus. The received signal has a different signal strength at each of the at least four receivers. The method includes determining, by the processor of the stylus, a tilt direction of the stylus based on the determined signal strength at a plurality of the at least four receivers, and providing, by a transmitter of the stylus, a response signal to the touch-sensing device. The tilt direction includes a direction of the stylus along a second axis of the touch-sensing device and the second axis is oriented in a different direction than the first axis.
US09213416B2	Illuminated keyboard An illuminated keyboard includes a key, a light guide plate, a sensing circuit layer, and a light-transmissible elastic element. The light-transmissible elastic element is disposed under the key. The light-transmissible elastic element has a light-diffusing part. The light guide plate and the sensing circuit layer are disposed under the light-transmissible elastic element. The sensing circuit layer is used for generating a non-contact key signal. After the light beam transferred within the light guide plate is transmitted upwardly through the light guide plate, the light beam is transmitted through the light-transmissible elastic element. Moreover, since the optical path of the light beam is changed by the light-diffusing part, the light beam can be projected onto the whole keycap more uniformly.
US09213410B2	Associated file A method for accessing a file on a computing machine including configuring a sensor to detect an object and a user interacting with the object, associating the object with at least one file on the computing machine, and configuring a display device to render an associated file being accessed in response to the user interacting with the object.
US09213409B2	Dual stiffness suspension system Devices disclosed herein include a housing component, a touch screen, a haptic actuator for moving the touch screen relative to the housing component, and at least one dual stiffness suspension system that couples the touch screen and housing component together such that the touch screen is movable relative to the housing component. The dual stiffness suspension system has a first element of a first stiffness and a second element of a second stiffness which is stiffer than the first stiffness. The dual stiffness suspension system is configured to limit movement between the touch screen and the housing component in a first direction due to the first element of the dual stiffness suspension system while also being configured to allow movement of the touch screen relative to the housing component in a second opposing direction due to the second element of the dual stiffness suspension system.
US09213407B2	Ring accessory In one embodiment, an apparatus is provided that includes a ring, a detector, a processor, and a transmitter. The ring is configured to be worn on a finger. The detector, disposed within the ring, is operable to detect a motion associated with the finger. The processor, communicatively coupled to the detector, is operable to determine, based at least upon the motion, that a command should be sent to a mobile device. The transmitter, communicatively coupled to the processor, is operable to communicate the command to the mobile device.
US09213405B2	Comprehension and intent-based content for augmented reality displays A method and system that enhances a user's experience when using a near eye display device, such as a see-through display device or a head mounted display device is provided. The user's intent to interact with one or more objects in the scene is determined. An optimized image is generated for the user based on the user's intent. The optimized image is displayed to the user, via the see-through display device. The optimized image visually enhances the appearance of objects that the user intends to interact with in the scene and diminishes the appearance of objects that the user does not intend to interact with in the scene. The optimized image can visually enhance the appearance of the objects that increase the user's comprehension. The optimized image is displayed to the user, via the see-through display device.
US09213404B2	Generation of graphical feedback in a computer system The present invention relates to control of a computer system, which includes a data processing unit, a display and an eye tracker adapted to register a user's gaze point with respect to the display. The data processing unit is adapted to present graphical information on the display, which includes feedback data reflecting the user's commands entered into the unit. The data processing unit is adapted to present the feedback data such that during an initial phase, the feedback data is generated based on an absolute position of the gaze point. An imaging device of the system is also adapted to register image data representing movements of a body part of the user, and to forward a representation of the image data to the data processing unit. Hence, during a phase subsequent to the initial phase, the data is instead generated based on the image data.
US09213400B2	Apparatus and method to provide near zero power DEVSLP in SATA drives Apparatus and methods of reducing power consumption in solid-state disks (SSDs) that can reduce power levels in SSDs below levels achievable in known SSD reduced power states. The apparatus is a power management subsystem operative to detect whether an SSD subsystem has been enabled to enter a reduced power state, and to receive a control signal from a host directing the power management subsystem to place the SSD subsystem in the reduced power state. In the event the SSD subsystem is enabled to enter the reduced power state and the host asserts the control signal, the power management subsystem effectively disconnects at least a portion of the SSD subsystem from the power rail. In the event power-up clear circuitry asserts a clear signal to the power management subsystem, or the host negates the control signal, the power management subsystem reestablishes the connection between the SSD subsystem and the power rail.
US09213390B2	Periodic activity alignment Methods and systems may provide for determining a latency constraint associated with a platform and determine an idle window based on the latency constraint. In addition, a plurality of devices on the platform may be instructed to cease one or more activities during the idle window. In one example, the platform is placed in a sleep state during the idle window.
US09213386B2	Apparatuses and methods and for providing power responsive to a power loss Apparatuses and methods for providing power responsive a power loss are disclosed herein. A power chip may comprise a power sensor, a write command control logic, and an array. The power sensor may be configured to detect a power loss of a power supply and provide a power loss control signal responsive, at least in part, to detecting the power loss of the power supply. The write command control logic may be coupled to the power sensor and may be configured to receive the power loss control signal. The write command control logic may be further configured to provide a write command responsive, at least in part, to receipt of the power loss control signal. The array may include a plurality of capacitors configured to store power and further configured to provide power during the power loss.
US09213385B2	Supplemental power system for power excursions A supplemental power system includes a powered component, a removable module interface with a plurality of pins, and a plurality of system connections. A system controller detects a first type removable module coupled to the removable module interface and allows signals from the system connections to be transmitted to the first type removable module through the plurality of pins. The system controller detects a second type removable module coupled to the removable module interface and allows power from the second type removable module that is received through the plurality of pins to be transmitted to the powered component while not allowing signals from the system connections to be transmitted to the second type removable module through the plurality of pins. Power that is stored in the second type removable module may be provided to the powered component in response to a detected power excursion by the powered component.
US09213379B2	Distributed fan control A device for processing graphics data may include a plurality of graphics processing units. The device may include a fan to dissipate thermal energy generated during the operation of the plurality of graphics processing units. Each of the plurality of graphics processing units may generate a pulse width modulated signal to control the speed of the fan. The device may include one or more monitoring units configured to monitor a signal controlling the speed of the fan. One or more of the plurality of pulse width modulated signals may be adjusted based on the monitored signal. One or more of the plurality of pulse width modulated signals may be adjusted such that a signal controlling the fan maintains a desired duty cycle.
US09213371B2	Portable electronic device with a liftable keyboard A portable electronic device includes a host module, a display module, a keyboard module and at least one pivoting module. The keyboard module is disposed on a cover of the host module. The keyboard module includes a supporting component, a frame disposed on the supporting component and a plurality of keycaps disposed on the frame. The at least one pivoting module is installed inside the host module and pivoted to the display module. The pivoting module includes a pivoting component pivoted to the display module, a linking component connected to the pivoting component and a driving device. The driving device is connected to the keyboard module and the linking component. When the display module rotates in a first rotating direction, the linking components moves with the pivoting component, so as to drive the driving device to drive the frame to press the plurality of the keycaps in a first direction.
US09213370B2	Housing, double-sided adhesive tape, and electronic apparatus A housing includes a first case and a second case configured to be joined together to make a housing space; and a double-sided adhesive member having a first surface and a second surface, the double-sided adhesive member including an impermeable, elastic base material, and a plurality of binder layers formed on either surface of the base material, the binder layers on the first and second surfaces being bonded to the first and second cases, respectively, wherein an adhesive force between the first case and the first surface of the double-sided adhesive member is greater on an outer side of the first case than on an inner side of the first case, and wherein an adhesive force between the second case and the second surface of the double-sided adhesive member is greater on an inner side of the second case than on an outer side of the second case.
US09213369B2	Power supply base for electronic payment terminal and electronic payment terminal A power supply base for a payment terminal is provided with a housing having an opening for receiving a memory card. The power supply base includes a guide for guiding the payment terminal towards a position wherein it can receive the power supply, the guide including at least one guiding part shaped in such a way as to enable the insertion thereof into the opening of the payment terminal.
US09213368B2	Expansion chassis for laptop computers with BUS multiplier and multifunction USB cable The present invention relates to an expansion chassis for a laptop computer. Specifically, the expansion chassis provides additional expansion bays for increased functionality, storage and/or battery power for the laptop computer. One or more BUS multipliers are integrated into a native SATA BUS, and one or more multifunction USB interconnect cables are integrated therein to integrate the expansion chassis into the existing laptop functions.
US09213366B2	Hinge mechanism with multiple rotating axes and electronic device therewith A hinge mechanism with multiple rotating axes is disclosed. The hinge mechanism includes a first bracket, a linking bracket, a first rotating shaft, a second bracket and a second rotating shaft. The first rotating shaft is used for pivoting the first bracket and the linking bracket, such that the linking bracket is connected to the first bracket in a rotable manner. The second rotating shaft is used for pivoting the linking bracket and the second bracket, such that the linking bracket is further connected to the second bracket in a rotable manner.
US09213364B2	Man/machine interface having a reinforced housing A man/machine interface including a touch-sensitive detection means and a housing is disclosed. The housing may include an edge which defines an opening. The touch-sensitive detection means may be placed into the housing at least in line with the opening, and the housing includes at least one reinforcement means.
US09213363B2	Communications bladed panel systems A fiber panel system includes a chassis including a backplane; and at least a first blade configured to mount to the chassis. The first blade is moveable relative to the chassis between a refracted (closed) position and at least one extended position. The first blade includes a coupler arrangement for connecting together media segments. Each blade includes a blade processor and a plurality of smart couplers. A chassis processor is electrically coupled to a processor port of the chassis backplane.
US09213361B1	Temperature sensor in flex circuit A computing device and method including a thermal sensor positioned on a flexible circuit located in close proximity to the device enclosure or hot-spot to most accurately track and control skin temperature of the electronic device. One or more flexible circuits may be implemented to include one or more low profile temperature sensors specifically located to detect temperature in close proximity to the enclosure and/or components of interest or hot spots which may be more accurately monitored by locating the low profile temperature sensor on the flexible circuit within the enclosure without substantially increasing the z-height of the existing flexible circuits or taking up additional room within the enclosure.
US09213356B2	Method and apparatus for synchrony group control via one or more independent controllers A tangible computer-readable memory having instructions stored thereon that when executed cause a zone player to: receive control information from any one of a plurality of user interface modules; based on the received control information enter into a synchrony group with a second zone player; and transmit status information to the plurality of user interface modules, wherein the status information provides an indication of an operational status of the synchrony group.
US09213350B2	Impedance transformation with transistor circuits In one implementation, an apparatus may include a first negative channel metal oxide semiconductor (NMOS) transistor circuit coupled to a first voltage source, a second NMOS transistor circuit coupled to the first voltage source, the second NMOS transistor circuit having a smaller channel width to channel length ratio than the first NMOS transistor circuit, a first positive channel metal oxide semiconductor (PMOS) transistor circuit coupled to a second voltage source and coupled to the second NMOS transistor circuit, and a second PMOS transistor circuit coupled to the second voltage source, the second PMOS transistor circuit having a larger channel width to channel length ratio than the first PMOS transistor circuit.
US09213348B2	Method and system for utilizing a broadband gateway for peer to peer communications A broadband gateway may be used to provide peer-to-peer communications with other broadband gateways. One or more peer-to-peer connections may be configured with each of the other broadband gateway, for use in peer-to-peer communications, which may be utilized to communicate shared content among the broadband gateways. Users may receive incentives for participating in peer-to-peer communications, comprising sharing credits and/or reduced charges. The broadband gateway may track and/or aggregate sharing credits based on communication of shared content. Peer-to-peer connections may be configured using at least one physical layer connection utilized by the broadband gateway in communicating with corresponding access network service provider. Peer-to-peer connections may also be configured using direct connections and/or links between the broadband gateways. The broadband gateway may generate a directory for use in conjunction with peer-to-peer operations. The directory may be presented via a user interface. The broadband gateway may generate and/or communicate peer-to-peer related alerts.
US09213347B2	Low-dropout regulator, power management system, and method of controlling low-dropout voltage A low-dropout regulator comprises an analog-to-digital converter that converts a feedback analog voltage signal into a digital signal, a phase synthesizing unit that generates a first control signal having a pulse width corresponding to error information in the digital signal by performing phase synthesis according to clock skew control, a charge pump circuit that selects a charge loop or a discharge loop based on polarity information in the digital signal, and generates an output control voltage according to current that flows during a period corresponding to the pulse width of the first control signal in the selected loop, and an output circuit that generates an output voltage based on an input voltage and the output control voltage, and generates the feedback analog voltage signal based on the output voltage.
US09213345B2	Digitally controlled AC protection and attenuation circuit A protection and attenuation circuit for sensitive AC loads is described. The circuit provides AC power protection and attenuation utilizing high-efficiency switch-mode techniques to attenuate an AC power signal by incorporating a bidirectional, transistorized switch driven from a pulse width modulation signal, PWM. The circuit monitors characteristics of the AC power signal driving a known load and characteristics of the load or other elements and determines the duty cycle of the pulse width modulated signal, PWM, based upon the duration and amplitude of the over-voltage, over-current, over-limit or other event.
US09213344B2	Ripple suppressor circuit and method therefor In one embodiment, a method of forming a ripple suppressor circuit includes a configuring the ripple suppressor circuit to receive a first signal that is representative of a requested voltage and a second signal that is a filtered value of the first signal. The method also includes configuring the ripple suppressor circuit to determine a peak value of the second signal responsively to the first signal and to determine a minimum value of the second signal responsively to the first signal. The method may also include configuring the ripple suppressor circuit to form an average value of the peak value and the minimum value.
US09213342B2	Wireless control of a heating or cooling unit A control system includes a remote temperature sensor configured to wirelessly communicate a signal indicative of a space temperature, and a return air temperature sensor configured to output a signal indicative of a temperature of return airflow within an air conditioning/heating unit. The system further includes a controller segregated from the space that is responsive to the signals from the sensors for determining a working sensed temperature based upon a temperature value associated with the return air sensor and at least one temperature value associated with at least one remote temperature sensor. The controller is configured to compare the working sensed temperature to a set-point temperature and responsively generate a command signal to activate the air conditioning or heating unit to control temperature relative to a set-point. The controller controls the air conditioning/heating unit at all times based upon the temperature value associated with the return air sensor.
US09213340B2	Selection of polishing parameters to generate removal or pressure profile Values are selected for a plurality of controllable parameters of a chemical mechanical polishing system that includes a carrier head with a plurality of zones to apply independently controllable pressures on a substrate. Data is stored relating variation in removal profile on a front surface of the substrate to variation in the controllable parameters, the data including removal at a plurality of positions on the front surface of the substrate, there being a greater number of positions than chambers. A value is determined for each parameter of the plurality of controllable parameters to minimize a difference between a target removal profile and an expected removal profile calculated from the data relating variation in removal profile on a front surface of the substrate to variation in the parameters. The value for each parameter of the plurality of controllable parameters is stored.

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