| Document | Document Title |
|---|---|
| US09166265B2 |
Signal transmission device, filter, and inter-substrate communication device
A signal transmission device includes substrates and resonance sections resonating at the predetermined resonance frequency. At least one of the substrates is formed with two or more resonators in the second direction, and the remaining one or two or more of the substrates are each formed with one or more resonators in the second direction, and at least one of the resonance sections is configured by a plurality of resonators opposing one another in the first direction between the substrates, the opposing resonators form a coupled resonator resonating as a whole at the predetermined resonance frequency through electromagnetic coupling in a hybrid resonance mode, and in a state that the substrates are separated away from one another to fail to establish electromagnetic coupling thereamong, the resonators forming the coupled resonator resonate at any other resonance frequency different from the predetermined resonance frequency on the substrate basis. |
| US09166262B2 |
Battery pack with cooling passage
A battery pack includes battery modules each having a battery cell and a battery case housing the battery cell therein. The battery modules are stacked in a stacking direction so that a cooling passage for allowing a cooling medium to flow is defined between opposed surfaces of adjacent battery cases. One of the opposed surfaces has first ribs projecting toward the other of the opposed surfaces and extending parallel to each other along the one. The other of the opposed surfaces has second ribs projecting toward the one of the opposed surfaces and extending parallel to each other along the other. In the cooling passage, the first ribs and the second ribs intersect each other and end portions of the first ribs and end portions of the second ribs are in contact with each other in the stacking direction. |
| US09166261B2 |
Method for reusing secondary battery
A method for reusing a secondary battery by reusing unit cells or battery modules constituting reclaimed assembled batteries (or battery packs) to reconstruct a new assembled battery is disclosed. Assembled batteries are reclaimed, and disassembled into battery modules. The battery modules are selected based on battery characteristics such as an open-circuit voltage (OCV) and the like using an absolute acceptable range and a relative acceptable range, and a new assembled battery is rebuilt. The relative acceptable range is an acceptable range which is set for each assembled battery, and is set to have its center at an average value of a battery characteristic distribution. |
| US09166258B2 |
Cooling apparatus for vehicle-mountable battery packs
A battery pack 10 has a built-in cooling fan to suction outside air through an air cleaner 16 and an air suction port. The battery pack 10 has a combination of the air suction port and a service plug 25 and a combination of the air cleaner 16 and a 12V terminal set 23 arranged at an upside. The air suction port and the service plug 25 are arrayed along a longer side of the battery pack 10, the air cleaner 16, a filter member in the air cleaner 16, and the 12V terminal set 23 being arrayed parallel thereto. |
| US09166248B2 |
Manufacturing method of battery pack
A manufacturing method of a battery pack includes a restraining process of restraining single cells at a maximum restraint contact pressure Pd of the battery pack in a complete state, after compressing the single cells at a maximum compression contact pressure Pc that satisfies 0.8≦Pd/Pc≦0.9, with respect to the maximum restraint contact pressure Pd; a standing process of then leaving the single cells to stand for a predetermined number of days in an electrically open state; and a short-circuit testing process of then testing for an internal short in the single cells. |
| US09166245B2 |
Distributor and fuel cell module having the same
A distributor and a fuel cell module including the distributor are disclosed. The distributor is for supplying a fuel or oxidant from a supply tube to a plurality of distribution portions. The distributor includes a buffer portion and a guide portion. The buffer portion has a center for receiving the fuel or oxidant from the supply tube, and a buffer surface extending away from the center. The guide portion defines a first space with a periphery of the buffer portion. The guide portion is radially connected to the plurality of distribution portions about a center axis of the distributor. |
| US09166243B2 |
Flow battery with interdigitated flow field
A flow battery includes a first liquid-porous electrode, a second liquid-porous electrode spaced apart from the first liquid-porous electrode, and an ion-exchange membrane arranged between the first liquid-porous electrode and the second liquid-porous electrode. First and second flow fields are adjacent to the respective first liquid-porous electrode and second liquid-porous electrode. Each of the flow fields includes first channels having at least partially blocked outlets and second channels having at least partially blocked inlets. The second channels are interdigitated with the first channels. The flow fields provide a configuration and method of operation for relatively thin electrodes with moderate pressure drops and forced convective flow through the liquid-porous electrodes. |
| US09166242B2 |
Multi-modal energy harvester
An energy harvester comprising: a microbial fuel cell comprising an anode; and a pump comprising a flexible diaphragm that is configured to be flexed by an ambient, renewable energy source such that with each flexing of the diaphragm nutrient-rich media is pumped past the anode. |
| US09166241B2 |
Enzyme electrode, and bio fuel cell equipped therewith
An enzyme electrode having an electroconductive base member, an oxidoreductase and an electron mediator has at least a portion (a) in which the oxidoreductase is immobilized on the electroconductive base member, and a portion (b) in which the electron mediator is immobilized on the electroconductive base member but the oxidoreductase is not immobilized on the electroconductive base member. A bio fuel cell having the enzyme electrode as at least one of an anode and a cathode allows optimization of a reaction condition of each one of a plurality of reaction steps, including an “enzymatic reaction”, an “electron transfer reaction”, etc. Thus, the bio fuel cell provides high output. |
| US09166238B2 |
Advanced controls algorithm for an electronic pressure regulator system with pulsed disturbances
A system and method for regulating the pressure within a volume between a pressure regulator and an injector that injects hydrogen gas into the anode side of a fuel cell stack. The method includes delaying a copy of the a pulsed signal that controls the opening and closing of the injector a predetermined period of time and provides a bias signal from a look-up table that is determined by a desired average mass flow of the hydrogen gas flow to the fuel cell stack and the pressure at an upstream location of the hydrogen gas flow from the pressure regulator. The method selects the bias signal as a pressure regulator control signal that controls the pressure regulator when the delayed pulse injector signal is high and selects an arbitrary value at or near zero as the pressure regulator control signal when a delayed pulse injector is low. |
| US09166234B2 |
Fuel cell system
Disclosed is a fuel cell system in which a hydrogen distribution system is configured in a compact size. High-pressure hydrogen gas from a hydrogen tank is decompressed in an injector and is then supplied to a cell stack manifold. A portion of a high-pressure supply system on the upstream side of the injector is formed as a first within-end-plate flow passage, and a portion of a low-pressure supply system on the downstream side of the injector is formed as a second within-end-plate flow passage. The second within-end-plate flow passage is a recess portion or a groove formed in the end plate and is formed as an open channel flow passage. |
| US09166225B2 |
Sodium vanadium oxide anode material for sodium ion secondary battery, preparation method thereof and sodium ion secondary battery having the same
There is provided a preparation method of a sodium vanadium oxide-based (Na1+xV1−xO2) anode material for a sodium ion secondary battery synthesized by mixing particles of precursors such as sodium carbonate (Na2CO3) and vanadium oxide (V2O3) and pyrolyzing a mixture in a mixed gas atmosphere composed of 90 mol % of nitrogen gas and 10 mol % of hydrogen gas through a solid-state reaction. The sodium vanadium oxide-based anode material prepared according to the present invention shows a small change in volume caused by an initial irreversible capacity and continuous charge/discharge reactions, and thus it is useful for providing a next-generation sodium ion secondary battery having stable charge/discharge characteristics and cycle performance. |
| US09166224B2 |
Lithium titanate, negative electrode including the lithium titanate, and secondary lithium battery containing the electrode
A negative electrode for a lithium secondary battery that includes, as a negative active material, a lithium titanate (Li4Ti5O12) compound containing 0.004 parts by weight or less of phosphorous (P) and 0.007 parts by weight or less of potassium (K) based on 100 parts by weight of lithium titanate, a binder, and a conductive agent, and a lithium secondary battery including the negative electrode. |
| US09166223B2 |
Negative electrode for lithium-ion secondary battery and lithium-ion secondary battery
The negative electrode for lithium-ion secondary battery is used in which a product of tensile strength and thickness of a negative electrode having a negative electrode active material layer containing silicon and silicon oxide as main components is 3.8 to 9.0 N/mm and a value obtained by dividing the product of the tensile strength and the thickness of the negative electrode by a product of tensile strength and thickness of a negative electrode current collector is 1.06 to 1.29. |
| US09166221B2 |
Anode and battery with improved charge-discharge efficiency and method manufacturing the same
An anode in which an anode active material layer is arranged on an anode current collector. The anode active material layer includes anode active material particles made of an anode active material including at least one of silicon and tin as an element. An oxide-containing film including an oxide of at least one kind selected from the group consisting of silicon, germanium and tin is formed in a region in contact with an electrolytic solution of the surface of each anode active material particle by a liquid-phase method such as a liquid-phase deposition method. The region in contact with the electrolytic solution of the surface of each anode active material particle is covered with the oxide-containing film, to thereby improve the chemical stability of the anode and the charge-discharge efficiency. The thickness of the oxide-containing film is preferably within a range from 0.1 nm to 500 nm both inclusive. |
| US09166218B2 |
Electrolyte replenishing system and method
A battery system includes a battery including an anode, a cathode, and a liquid electrolyte; and a conduit communicating to the battery an electrolyte liquid having an electrolyte salt density lower than an electrolyte salt density of the liquid electrolyte. The electrolyte may be non-aqueous. The electrolyte may be volatile. |
| US09166215B2 |
Battery pack
A battery pack of the type that may be used in an electrically-powered vehicle comprises first and second arrays of cells disposed adjacent one another, and a housing enclosing the two arrays. The housing defines a cooling chamber surrounding heat transfer surfaces of the cells, a first manifold sealed from the cooling chamber and collecting gasses generated by the first array, and a second manifold sealed from the cooling chamber and collecting gasses generated by the second array. A tunnel connects the first and the second manifolds to allow passage of any collected gasses from the first manifold into the second manifold, and a discharge opening in the second manifold allows the collected gasses to escape from the housing. An electrically conductive bridge bar extends through the tunnel and connects the first array with the second array. |
| US09166213B2 |
Battery cell assembly and method for manufacturing the battery cell assembly
A battery cell assembly is provided. The battery cell assembly includes a battery cell housing having first and second side members coupled together defining an interior region, and a battery cell disposed within the interior region. The battery cell assembly further includes a cable carrier assembly coupled to the battery cell housing. The cable carrier assembly includes a carrier member having a first aperture extending therethrough. The carrier member is disposed between first and second end portions of the first and second side members, respectively, and extends outwardly from the battery cell housing. The cable carrier assembly further includes a first cable fixedly held by the carrier member. |
| US09166205B2 |
Light-scattering substrate, method of manufacturing the same, organic light-emitting display device including the same, and method of manufacturing the organic light-emitting display device
A light-scattering substrate which can be thinned and has improved thermal resistance, a method of manufacturing the same, an organic light-emitting display device including the same, and a method of manufacturing the organic light-emitting display device are disclosed. The light-scattering substrate includes a light-scattering layer composed of a plurality of metal nanoparticles which are attached to at least a surface of a substrate. The metal nanoparticles are formed by agglomeration of a metal on the substrate, and show a surface plasmon phenomenon. |
| US09166201B2 |
Method for manufacturing organic light emitting diode display and method for manufacturing touch panel
A manufacturing method of an organic light emitting diode (“OLED”) display includes: forming a contact pattern on a panel region of a surface of a board glass, where the board glass includes the panel region, and a peripheral area which surrounds the panel region; contacting the paper glass with a surface of the contact pattern corresponding to the panel region and the surface of the board glass corresponding to the peripheral area; adhering the surface of the board glass corresponding to the peripheral area to a surface of the paper glass; forming an organic light emitting element on the paper glass corresponding to the panel region; and separating the paper glass from the board glass by cutting the paper glass at a position corresponding to an end portion of the panel region adjacent to the peripheral area. |
| US09166191B2 |
Display device, method of manufacturing the display device and carrier substrate for manufacturing display device
A method of manufacturing a display device includes: preparing a carrier substrate by forming an adhesive layer on a hard glass substrate; forming a flexible substrate on the adhesive layer; forming a thin film transistor and an organic light emitting element on the flexible substrate and encapsulating the organic light emitting element; and separating the carrier substrate and the flexible substrate by irradiating laser light. The adhesive layer is formed on the carrier substrate in such a state that tensile stress is applied. The display device and the carrier substrate are also disclosed. |
| US09166187B2 |
Organic light emitting device and power supply device thereof
An organic light emitting device including a first substrate, at least an organic light emitting unit, a plurality of first electrode contacts and a plurality of second electrode contacts. The organic light emitting unit is disposed on the first substrate. The first electrode contacts are disposed on the first substrate at a margin of the organic light emitting unit, wherein adjacent two first electrode contacts are spaced by a first interval, and an end of each first electrode contact is electrically connected to the organic light emitting unit. The second electrode contacts are disposed on the first substrate at a margin of the organic light emitting unit, wherein adjacent two second electrodes are spaced by a second interval, an end of each second electrode contact is electrically connected to the organic light emitting unit, and the second interval is different from the first interval. |
| US09166186B2 |
Methods of forming organic light emitting structures and methods of manufacturing organic light emitting display devices
In a method of forming an organic light emitting structure, a plurality of first electrodes spaced apart from each other is formed on a lower substrate. A first organic layer covering the first electrodes is formed on the lower substrate. A preliminary pixel defining layer is formed on the first organic layer. The preliminary pixel defining layer includes a photosensitive material, and is selectively exposed to light so that the preliminary pixel defining layer and a portion of the first organic layer beneath the preliminary pixel defining layer are transformed into a pixel defining layer and a first organic layer pattern, respectively. An emitting layer is formed on the first organic layer exposed by the pixel defining layer. A second organic layer is formed on the emitting layer. A second electrode is formed on the second organic layer. |
| US09166183B2 |
Organic solar cell and method for producing the same
An organic solar cell which includes an anode and a cathode that are arranged to face each other, a photoactive layer that is disposed between the anode and the cathode and contains a hole acceptor and an electron acceptor in mixture, and a metal oxide nano thin film layer that is disposed between the cathode and the photoactive layer and contains a metal oxide having an average particle size of 10 nm or less and having a particle size distribution such that 90% by number or more of the particles relative to the total number of the metal oxide particles has a particle size in the range of ±4 nm with respect to the average particle size, and a method for producing an organic solar cell. The organic solar cell has improved efficiency, and increased service life. |
| US09166180B2 |
Light emitting device having an organic light emitting diode that emits white light
The present invention has an object of providing a light-emitting device including an OLED formed on a plastic substrate, which prevents degradation due to penetration of moisture or oxygen. On a plastic substrate, a plurality of films for preventing oxygen or moisture from penetrating into an organic light-emitting layer in the OLED (“barrier films”) and a film having a smaller stress than the barrier films (“stress relaxing film”), the film being interposed between the barrier films, are provided. Owing to a laminate structure, if a crack occurs in one of the barrier films, the other barrier film(s) can prevent moisture or oxygen from penetrating into the organic light emitting layer. The stress relaxing film, which has a smaller stress than the barrier films, is interposed between the barrier films, making it possible to reduce stress of the entire sealing film. Therefore, a crack due to stress hardly occurs. |
| US09166178B2 |
Organic electronic device and dopant for doping an organic semiconducting matrix material
An organic electronic device includes a substrate, a first electrode arranged on the substrate, at least a first functional organic layer arranged on the first electrode and a second electrode arranged on the first functional organic layer. The first functional organic layer includes a matrix material and a p-dopant with regard to the matrix material, wherein the p-dopant includes a copper complex containing at least one ligand. |
| US09166177B2 |
Ditriphenylene derivative and organic electroluminescent device using the same
The present invention discloses a novel ditriphenylene derivative is represented by the following formula (I), the organic EL device employing the ditriphenylene derivative as host material or dopant material of emitting layer can lower driving voltage, prolong half-life time and increase the efficiency. Wherein m, n represent an integer of 0 to 10. X is a divalent bridge selected from the atom or group consisting from O, S, C(R3)(R4), NR5, Si(R6)(R7). Ar1, Ar2, R1 to R7 are substituents and the same definition as described in the present invention. |
| US09166175B2 |
Organic electroluminescent materials and devices
Novel compounds containing benzothiophene or benzofuran fused to a carbazoles moiety are disclosed. The compounds are substituted such that both an electron donor fragment and an electron acceptor fragment are present within the same molecule. The compounds are capable of exhibiting delayed fluorescence when used in the emissive layer of OLED devices. |
| US09166168B2 |
Organic semiconductor polymer, organic thin film transistor, and electronic device
An organic semiconductor polymer includes a moiety represented by the following Chemical Formula 1 and a heteroaromatic moiety having at least one of sulfur (S) and selenium (Se). In the Chemical Formula 1, R1, R2, R3a, R3b, R4a, R4b, R5a, and R5b, a1, a2, b1, and b2 are the same as described in the detailed description. |
| US09166167B2 |
P-type materials and organic electronic devices
There is presently provided compounds of formula (I), which are useful as p-type semiconductor materials and in devices comprising such p-type semiconductor materials. |
| US09166166B2 |
Deposition mask, method of manufacturing display apparatus by using the deposition mask, and display apparatus manufactured by the method
A deposition mask that prevents the occurrence of defects when forming an encapsulation film or securing a long lifespan of the encapsulation film, a method of manufacturing a display apparatus by using the deposition mask, and a display apparatus manufactured by the method. The deposition mask has a first portion and a second portion, the second portion being thicker that the first portion; at least one opening in the first portion, deposition materials being passed through the opening; and a plurality of through-holes in the first portion adjacent to and surrounding the opening, the through-holes extending from an upper surface to a lower surface of the first portion, light being passed through the opening and the plurality of through-holes to irradiate the deposition materials. |
| US09166164B2 |
Method for manufacturing nonvolatile semiconductor storage device and nonvolatile semiconductor storage device
A method for manufacturing a nonvolatile semiconductor storage device according to an embodiment includes laminating a first wire extending in a first direction, and a film made into a variable resistance element made of a metallic material, which are laminated in order on a semiconductor substrate, dividing, into a plurality of pieces, the film made into the variable resistance element, in the first direction and a second direction, forming an interlayer insulating film between the plurality of pieces formed by dividing the film made into the variable resistance element in the second direction, and oxidizing the metallic material of the film made into the variable resistance element, and laminating an upper electrode and a second wire extending in the second direction, which are laminated in order on the film made into the variable resistance element and the interlayer insulating film. |
| US09166162B2 |
Resistive memory device
A resistive memory device includes: a memory cell comprising first and second electrodes and a resistive layer formed therebetween, wherein the resistive layer is formed of a resistance change material; and a strained film formed adjacent to the resistive layer and configured to apply a strain to the resistive layer. |
| US09166160B1 |
Resistive random access memory and method of fabricating the same
Provided is a resistive random access memory including a first electrode layer, a second electrode layer, and a variable resistance layer disposed between the first electrode layer and the second electrode layer, wherein the second electrode layer includes a first sublayer, a second sublayer, and a conductive metal oxynitride layer disposed between the first sublayer and the second sublayer. |
| US09166158B2 |
Apparatuses including electrodes having a conductive barrier material and methods of forming same
Apparatuses and methods of manufacture are disclosed for phase change memory cell electrodes having a conductive barrier material. In one example, an apparatus includes a first chalcogenide structure and a second chalcogenide structure stacked together with the first chalcogenide structure. A first electrode portion is coupled to the first chalcogenide structure, and a second electrode portion is coupled to the second chalcogenide structure. An electrically conductive barrier material is disposed between the first and second electrode portions. |
| US09166154B2 |
MTJ stack and bottom electrode patterning process with ion beam etching using a single mask
Fabrication methods using Ion Beam Etching (IBE) for MRAM cell memory elements are described. In embodiments of the invention the top electrode and MTJ main body are etched with one mask using reactive etching such as RIE or magnetized inductively coupled plasma (MICP) for improved selectivity, then the bottom electrode is etched using IBE as specified in various alternative embodiments which include selection of incident angles, wafer rotational rate profiles and optional passivation layer deposited prior to the IBE. The IBE according to the invention etches the bottom electrode without the need for an additional mask by using the layer stack created by the first etching phase as the mask. This makes the bottom electrode self-aligned to MTJ. The IBE also achieves MTJ sidewall cleaning without the need for an additional step. |
| US09166152B2 |
Diffusionless transformations in MTJ stacks
A method and system provide a magnetic junction usable in a magnetic device. The magnetic junction includes a plurality of magnetic layers including a nonmagnetic spacer layer. The magnetic junction also includes at least one diffusionless transformation layer. The magnetic junction is configured to be switchable between a plurality of stable magnetic states when a write current is passed through the magnetic junction. |
| US09166150B2 |
Electric field enhanced spin transfer torque memory (STTM) device
Spin transfer torque memory (STTM) devices incorporating a field plate for application of an electric field to reduce a critical current required for transfer torque induced magnetization switching. Embodiments utilize not only current-induced magnetic filed or spin transfer torque, but also electric field induced manipulation of magnetic dipole orientation to set states in a magnetic device element (e.g., to write to a memory element). An electric field generated by a voltage differential between an MTJ electrode and the field plate applies an electric field to a free magnetic layer of a magnetic tunneling junction (MTJ) to modulate one or more magnetic properties over at least a portion of the free magnetic layer. |
| US09166144B2 |
Magnetic devices having perpendicular magnetic tunnel junction
Provided are magnetic memory devices with a perpendicular magnetic tunnel junction. The device includes a magnetic tunnel junction including a free layer structure, a pinned layer structure, and a tunnel barrier therebetween. The pinned layer structure may include a first magnetic layer having an intrinsic perpendicular magnetization property, a second magnetic layer having an intrinsic in-plane magnetization property, and an exchange coupling layer interposed between the first and second magnetic layers. The exchange coupling layer may have a thickness maximizing an antiferromagnetic exchange coupling between the first and second magnetic layers, and the second magnetic layer may exhibit a perpendicular magnetization direction, due at least in part to the antiferromagnetic exchange coupling with the first magnetic layer. |
| US09166143B1 |
Magnetic random access memory with multiple free layers
The present invention is directed to a magnetic random access memory element comprising a first magnetic reference layer, a first insulating tunnel junction layer, a first magnetic free layer, a first coupling layer, a second magnetic free layer, a second coupling layer, a third magnetic free layer, a second insulating tunnel junction layer, and a second magnetic reference layer formed in sequence. The first and second magnetic reference layers have respectively a first and second fixed magnetization directions that are substantially perpendicular to respective layer planes and are substantially opposite to each other. The first, second, and third magnetic free layers have respectively a first, second, and third variable magnetization directions that are substantially perpendicular to respective layer planes. The second variable magnetization direction may be parallel or anti-parallel to the first and third variable magnetization directions. |
| US09166140B2 |
Piezoelectric material, piezoelectric element, and electronic device
There is provided a piezoelectric material not containing any lead component, having stable piezoelectric characteristics in an operating temperature range, a high mechanical quality factor, and satisfactory piezoelectric characteristics. The piezoelectric material according to the present invention includes a main component containing a perovskite-type metal oxide that can be expressed using the following general formula (1), and subcomponents containing Mn, Li, and Bi. When the metal oxide is 100 parts by weight, the content of Mn on a metal basis is not less than 0.04 parts by weight and is not greater than 0.36 parts by weight, content α of Li on a metal basis is equal to or less than 0.0012 parts by weight (including 0 parts by weight), and content β of Bi on a metal basis is not less than 0.042 parts by weight and is not greater than 0.850 parts by weight (Ba1-xCax)a(Ti1-y-zZrySnz)O3 (1) (in the formula (1), 0.09≦x≦0.30, 0.025≦y≦0.085, 0≦z≦0.02, and 0.986≦a≦1.02). |
| US09166139B2 |
Method for thermally cycling an object including a polarizable material
A method of thermally cycling an object includes alternately contacting the object with vapor from each of a first liquid-vapor two-phase system and of a second liquid-vapor two-phase system of a working fluid, each of the systems two-phase including a liquid phase and a separate vapor phase. The first system two-phase is at a higher temperature and pressure than the second system two-phase. The object can include one or more layers of an electrically or magnetically polarizable material. The object can be housed in a chamber thermal and alternately contacted with vapor from the first liquid-vapor two-phase system and the second liquid-vapor two-phase system contained in a first reservoir and in a second reservoir, respectively. |
| US09166134B2 |
Light emitting element, backlight module, liquid crystal display device
A light emitting element comprises: a printed circuit board, a chip disposed on a first face of the printed circuit board, a first encapsulation body and a second encapsulation body. The first encapsulation body covers the chip, and the second encapsulation body covers a second face of the printed circuit board or a part of the second face of the printed circuit board. A first pipe and a second pipe are extended respectively from two positions of the first encapsulation body and are respectively connected to two positions of the second encapsulation body. Fluid is encapsulated within the first encapsulation body, the first pipe, the second encapsulation body and the second pipe. |
| US09166132B2 |
Light-emitting element mounting package having heat radiation route, manufacturing method of the same, and light-emitting element package
A light-emitting element mounting package including a first wiring forming a first light-emitting element mounting portion, which is provided on one surface of a substrate to mount a light-emitting element, and a first through wiring having one end and another end, the one end being electrically connected to the first light-emitting element mounting portion so as to be thermally transferable, and the other end protruding from another surface of the substrate. |
| US09166129B2 |
Batwing LED with remote phosphor configuration
A lens is formed over one or more light-emitting devices disposed over a substrate. The lens includes a trench that circumferentially surrounds the one or more light-emitting devices. The trench is filled with a phosphor-containing material. |
| US09166128B2 |
Light-emitting assembly and method for manufacturing the same
A light-emitting assembly and a method for manufacturing the same are provided. The light-emitting assembly includes a circuit board with a light-emitting element and a plurality of optical microstructures disposed thereon. The optical microstructures adjacent to the light-emitting element absorb or guide a portion of light emitted from the light-emitting element. |
| US09166127B2 |
Light source module
Disclosed is a light source module which does not require rigorous adjustments of the light direction and is free from luminance unevenness. Specifically disclosed is a light source module (1) which comprises a light-emitting element (40), and a light direction changing element (10) which is composed of a transparent resin and discharges the light emitted from the light-emitting element (40) toward the lateral direction. The light direction changing element (10) contains not less than 0.01% by weight but not more than 0.1% by weight of a light-diffusing agent (14) per 100% by weight of the transparent resin. |
| US09166120B2 |
LED device having improved luminous efficacy
There are provided a light emitting diode (LED) device including an LED chip emitting light within a specific wavelength region, a transparent resin layer covering a light emission surface of the LED chip, and a color conversion layer formed to be spaced apart from the LED chip by the transparent resin layer to cover the transparent resin layer and including at least one type of phosphor converting light emitted from the LED chip into light within a different wavelength region, wherein a mean free path of phosphor particles included in the color conversion layer is 0.8 mm or more at a temperature of 5500 K. |
| US09166117B2 |
Light emitting device and method for mixing light thereof
An exemplary light emitting device includes a blue-green light source and a orange-red light source. The blue-green light source emits blue-green light and the orange-red light source emits orange-red light when they are activated. The blue-green light and the orange-red light are mixed together to obtain white light. |
| US09166116B2 |
Light emitting device
The present invention relates to a light emitting device comprising a transparent substrate which light can pass through and at least one LED chip emitting light omni-directionally. Wherein the LED chip is disposed on one surface of the substrate and the light emitting angle of the LED chip is wider than 180°, and the light emitted by the LED chip will penetrate into the substrate and at least partially emerge from another surface of the substrate. According to the present invention, the light emitting device using LED chips can provide sufficient lighting intensity and uniform lighting performance. |
| US09166113B2 |
Light emitting device and method of manufacture
A light emitting device includes a conductive support layer, a light emitting structure layer on the conductive support layer, a first transparent conductive layer and a second transparent conductive layer disposed between the conductive support layer and the light emitting structure layer, and an electrode on the light emitting structure layer. |
| US09166108B2 |
Semiconductor light-emitting device and method of forming the same
A semiconductor light-emitting device has a first principal surface, a second principal surface formed on a side opposite to the first principal surface, and a light-emitting layer. A p-electrode on the second principal surface is in the region of the light-emitting layer and surrounds an n-electrode. An insulating layer on the side of the semiconductor layer surrounds the p-and the n-electrodes. A p-metal pillar creates an electrical connection for the p-electrode, and an n-metal pillar creates an electrical connection for the n-electrode. A resin layer surrounds the end portions of the p-and the n-metal pillars, and also covers the side surface of the semiconductor layer, the second principal surface, the p-electrode, the n-electrode, the insulating layer, the p-metal pillar and the n-metal pillar. |
| US09166105B2 |
Light emitting device
A light-emitting device includes: a substrate; a first semiconductor layer disposed on the substrate and having a first surface; a rough structure formed in the first semiconductor layer, the rough structure comprising porous structures formed therein and a portion of the porous structures having openings exposed on the first surface of the first semiconductor layer; and an active layer formed on the first semiconductor layer. |
| US09166102B2 |
Group III nitride semiconductor light-emitting device including a superlatice layer
A Group III nitride semiconductor light-emitting device includes at least an n-type-layer-side cladding layer, a light-emitting layer, and a p-type-layer-side cladding layer, each of the layers being formed of a Group III nitride semiconductor. The n-type-layer-side cladding layer is a superlattice layer having a periodic structure including an InyGa1-yN (0 |
| US09166100B2 |
Light emitting device
Disclosed is a semiconductor light emitting device. The semiconductor light emitting device includes a light emitting structure having a first conductive semiconductor layer, a second conductive semiconductor layer, and an active layer between the first and second conductive semiconductor layers. The active layer includes a plurality of well layers and barrier layers. An outermost barrier layer of the barrier layers includes a plurality of first layers; and a plurality of second layers. |
| US09166099B2 |
Graphene light-emitting device and method of manufacturing the same
A graphene light-emitting device and a method of manufacturing the same are provided. The graphene light-emitting device includes a p-type graphene doped with a p-type dopant; an n-type graphene doped with an n-type dopant; and an active graphene that is disposed between the type graphene and the n-type graphene and emits light, wherein the p-type graphene, the n-type graphene, and the active graphene are horizontally disposed. |
| US09166098B2 |
Nitride semiconductor light emitting device
There is provided a nitride semiconductor light emitting device including an active layer of a multi quantum well structure, the nitride semiconductor light emitting device including: a substrate; and a buffer layer, an n-type nitride semiconductor layer, an active layer and a p-type nitride semiconductor layer sequentially stacked on the substrate, wherein the active layer is formed of a multi quantum well structure where a plurality of barrier layers and a plurality of well layers are arranged alternately with each other, and at least one of the plurality of barrier layers includes a first barrier layer including a p-doped barrier layer doped with a p-dopant and an undoped barrier layer. |
| US09166087B2 |
Wind uplift-resistant photovoltaic roofing elements and photovoltaic roofing systems
The present invention relates generally to the photovoltaic generation of electrical energy. The present invention relates more particularly to photovoltaic arrays for use in photovoltaically generating electrical energy. Aspects of the present invention provide a variety of photovoltaic roofing elements and systems that include, for example, interlocking geometries to provide for water handling and integration with conventional roofing materials; wire management features that can protect wiring and associated electrical components from physical and/or environmental damage; and wind clip and ledge features configured to prevent against wind uplift of the photovoltaic roofing elements when installed. |
| US09166085B2 |
Method for manufacturing solar cell module provided with an edge space
The solar cell module having a preferable edge space that prevents characteristics of a solar cell such as conversion efficiency from being deteriorated without making processes complicated is provided. In a method for manufacturing a solar cell module including a substrate glass, a first layer formed on the substrate glass and a second layer formed on the first layer, the method includes a step of forming a first edge space having a first width by removing the first layer and the second layer by the first width from an end part of the glass substrate and a step of forming a second edge space by removing only the second layer by a second width from the end part of the glass substrate, and the width of the second edge space is larger than the width of the first edge space. |
| US09166080B2 |
Transparent electrode for thin film solar cell, substrate having transparent electrode for thin film solar cell and thin film solar cell using same, and production method for transparent electrode for thin film solar cell
Disclosed are: a transparent electrode having a zinc oxide film wherein initial characteristics and humidity resistance during long-time use coexist; and a thin film solar cell provided with said electrode. The transparent electrode contains a transparent conductive layer mainly made of zinc oxide. The transparent conductive film preferably has the following characteristics: having surface irregularities; a carrier concentration of 9×1019 cm−3 or less; a crystal structure having a (110) preferred orientation; a ratio of a (110) peak intensity to a (002) peak intensity I(110)/I(002) measured by X-ray diffraction being 50 or more; and a crystallite with a (110) orientation has a size of: 23 nm or more and 50 nm or less, in a planar direction parallel to a substrate; and 30 nm or more and 60 nm or less, in a planar direction perpendicular to the substrate. |
| US09166079B2 |
Method of forming contacts for a back-contact solar cell
Methods of forming contacts for solar cells are described. In one embodiment, a method includes forming a silicon layer above a substrate, forming and patterning a solid-state p-type dopant source on the silicon layer, forming an n-type dopant source layer over exposed regions of the silicon layer and over a plurality of regions of the solid-state p-type dopant source, and heating the substrate to provide a plurality of n-type doped silicon regions among a plurality of p-type doped silicon regions. |
| US09166075B2 |
Solar cell
A solar cell includes a silicon substrate, an aluminum electrode that collects electricity from the rear surface of the silicon substrate, and a silver electrode that extracts output from the aluminum electrode. The aluminum electrode includes an opening formed on the rear surface of the silicon substrate. On a side of the opening is formed a notch that recesses parallel to the direction in which principal stress acts in a plane of the silicon substrate. The silver electrode covers at least the opening and the notch of the aluminum electrode. |
| US09166072B2 |
Field-effect localized emitter photovoltaic device
Photovoltaic structures are provided with field-effect inversion/accumulation layers as emitter layers induced by work-function differences between gate conductor layers and substrates thereof. Localized contact regions are in electrical communication with the gate conductors of such structures for repelling minority carriers. Such localized contact regions may include doped crystalline or polycrystalline silicon regions between the gate conductor and silicon absorption layers. Fabrication of the structures can be conducted without alignment between metal contacts and the localized contact regions or high temperature processing. |
| US09166070B2 |
Semiconductor device and method of manufacturing semiconductor device
A semiconductor device includes: an organic substrate; an integrated circuit and a chip part provided on the organic substrate; a molded section including a central portion and a peripheral portion, and forming, as a whole, a concave shape, the central portion sealing the integrated circuit and the chip part on the organic substrate, and the peripheral portion standing around the central portion; and a solid-state image pickup element provided on the central portion of the molded section, the solid-state image pickup element having a top edge that is lower in position in a thickness direction than a top edge of the peripheral portion of the molded section. |
| US09166064B2 |
Junction field effect transistor
In a high voltage JFET, a p-floating region is provided in the surface layer of an n-drift region, thereby increasing the resistance R of the n-drift region and minimizing the voltage divided at a pn junction. This makes it possible to improve ESD capacity without increasing device size and without making the cutoff current smaller. |
| US09166061B2 |
Semiconductor device
Provided is a transistor which includes an oxide semiconductor film and has stable electrical characteristics. In the transistor, over an oxide film which can release oxygen by being heated, a first oxide semiconductor film which can suppress oxygen release at least from the oxide film is formed. Over the first oxide semiconductor film, a second oxide semiconductor film is formed. With such a structure in which the oxide semiconductor films are stacked, the oxygen release from the oxide film can be suppressed at the time of the formation of the second oxide semiconductor film, and oxygen can be released from the oxide film in later-performed heat treatment. Thus, oxygen can pass through the first oxide semiconductor film to be favorably supplied to the second oxide semiconductor film. Oxygen supplied to the second oxide semiconductor film can suppress the generation of oxygen deficiency, resulting in stable electrical characteristics. |
| US09166058B2 |
Method for manufacturing semiconductor device
To provide a method by which a semiconductor device including a thin film transistor with excellent electric characteristics and high reliability is manufactured with a small number of steps. After a channel protective layer is formed over an oxide semiconductor film containing In, Ga, and Zn, a film having n-type conductivity and a conductive film are formed, and a resist mask is formed over the conductive film. The conductive film, the film having n-type conductivity, and the oxide semiconductor film containing In, Ga, and Zn are etched using the channel protective layer and gate insulating films as etching stoppers with the resist mask, so that source and drain electrode layers, a buffer layer, and a semiconductor layer are formed. |
| US09166055B2 |
Semiconductor device and method for manufacturing the same
A transistor including an oxide semiconductor layer and having electric characteristics required depending on an intended use, and a semiconductor device including the transistor are provided. In a transistor in which a semiconductor layer, a source electrode layer and a drain electrode layer, a gate insulating film, and a gate electrode layer are stacked in this order over an oxide insulating film, an oxide semiconductor stack composed of at least two oxide semiconductor layers having different energy gaps is used as the semiconductor layer. Oxygen and/or a dopant may be introduced into the oxide semiconductor stack. |
| US09166053B2 |
FinFET device including a stepped profile structure
A FinFET device and a method for fabricating a FinFET device is disclosed. An exemplary FinFET device includes a substrate including a fin structure, the fin structure including a first and a second fin. The FinFET device further includes a shallow trench isolation (STI) feature disposed on the substrate and between the first and the second fins. The FinFET device further includes a gate dielectric disposed on the first and the second fins. The FinFET device further includes a gate structure disposed on the gate dielectric. The gate structure traverses the first fin, the second fin, and the STI feature between the first fin and the second fin and has a longitudinal stepped profile. |
| US09166049B2 |
Method to enhance strain in fully isolated finFET structures
Methods and structures for increasing strain in fully insulated finFETs are described. The finFET structures may be formed on an insulating layer and include source, channel, and drain regions that are insulated all around. During fabrication, the source and drain regions may be formed as suspended structures. A strain-inducing material may be formed around the source and drain regions on four contiguous sides so as to impart strain to the channel region of the finFET. |
| US09166048B2 |
Lateral/vertical semiconductor device
A lateral semiconductor device and/or design including a space-charge generating layer and electrode located on an opposite side of a device channel as contacts to the device channel is provided. The space-charge generating layer is configured to form a space-charge region to at least partially deplete the device channel in response to an operating voltage being applied to the contacts to the device channel. |
| US09166047B2 |
Switch circuit using LDMOS device
The present invention relates to a switch circuit, and more particularly, to a switch circuit that uses an LDMOS (lateral diffusion metal oxide semiconductor) device inside an IC (Integrated Circuit). In the switch circuit that uses the LDMOS device according to an embodiment of the present invention, a gate-source voltage (VGS) of the LDMOS device may be stably controlled through a current source and resistances, the characteristics of a switch may be maintained regardless of the voltages of both terminals (A and B) by using an N-type LDMOS and a P-type LDMOS in a complementary manner, and the current generated by the current source is offset inside the switch without flowing to the outside of the switch. |
| US09166044B2 |
Raised epitaxial LDD in MuGFETs
Embodiments include Multiple Gate Field-Effect Transistors (MuGFETs) and methods of forming them. In an embodiment, a structure includes a substrate, a fin, masking dielectric layer portions, and a raised epitaxial lightly doped source/drain (LDD) region. The substrate includes the fin. The masking dielectric layer portions are along sidewalls of the fin. An upper portion of the fin protrudes from the masking dielectric layer portions. A first spacer is along a sidewall of a gate structure over a channel region of the fin. A second spacer is along the first spacer. The raised epitaxial LDD region is on the upper portion of the fin, and the raised epitaxial LDD region adjoins a sidewall of the first spacer and is disposed under the second spacer. The raised epitaxial LDD region extends from the upper portion of the fin in at least two laterally opposed directions and a vertical direction. |
| US09166041B2 |
Semiconductor device and method of manufacturing the same
In an SOI substrate having a semiconductor layer formed on the semiconductor substrate via an insulating layer, a MISFET is formed in each of the semiconductor layer in an nMIS formation region and a pMIS formation region. In power feeding regions, the semiconductor layer and the insulating layer are removed. In the semiconductor substrate, a p-type semiconductor region is formed so as to include the nMIS formation region and one of the power feeding regions, and an n-type semiconductor region is formed so as to include a pMIS formation region and the other one of the power feeding regions. In the semiconductor substrate, a p-type well having lower impurity concentration than the p-type semiconductor region is formed so as to contain the p-type semiconductor region, and an n-type well having lower impurity concentration than the n-type semiconductor region is formed so as to contain the n-type semiconductor region. |
| US09166040B2 |
Semiconductor device
A semiconductor device disclosed herein is provided with: a source electrode; a gate electrode; a drain electrode; a first region of a first conductivity type formed in a range exposed at an upper surface of the semiconductor substrate a second region of a second conductivity type; a third region of the first conductivity type; and a fourth region of the first conductivity type. The fourth region includes: a first drift region formed in a range exposed at the upper surface; a second drift region having a first conductivity type impurity concentration higher than that of the first drift region, and adjacent to the first drift region; and a low concentration drift region having a first conductivity type impurity concentration lower than that of the first drift region. The first drift region is projected to a second region side than the second drift region. |
| US09166032B1 |
Non-volatile memory device
According to one embodiment, a non-volatile memory device includes a plurality of electrodes, at least one semiconductor layer, conductive layers, and first and second insulating films. The electrodes are arranged side by side in a first direction. The semiconductor layer extends into the electrodes in the first direction. The conductive layers are provided between each electrode and the semiconductor layer and separated from each other in the first direction. The first insulating film contacts the conductive layers, and extends in the first direction along the semiconductor layer between the conductive layers and the semiconductor layer. The second insulating film is provided between the first insulating film and the semiconductor layer. The first insulating film includes a first portion located between the conductive layers and the second insulating film, and a second portion located between the interlayer insulating film and the second insulating film. |
| US09166027B2 |
IGBT with reduced feedback capacitance
An IGBT includes at least one first type transistor cell, including a base region, a first emitter region, a body region, and a second emitter region. The body region is arranged between the first emitter region and the base region. The base region is arranged between the body region and the second emitter region. The IGBT further includes a gate electrode adjacent the body region and dielectrically insulated from the body region by a gate dielectric, and a base electrode adjacent the base region and dielectrically insulated from the base region by a base electrode dielectric. The base region has a first base region section adjoining the base electrode dielectric and a second base region section arranged between the second emitter region and the first base region section. A doping concentration of the first base region section is higher than a doping concentration of the second base region section. |
| US09166023B2 |
Bulk finFET semiconductor-on-nothing integration
Methods and structures for forming fully insulated finFETs beginning with a bulk semiconductor substrate are described. Fin structures for finFETs may be formed in two epitaxial layers that are grown over a bulk substrate. A first epitaxial layer may be sacrificial. A final gate structure may be formed around the fin structures, and the first epitaxial layer removed to form a void between a fin and the substrate. The void may be filled with an insulator to fully insulate the fin. |
| US09166022B2 |
Fin-like field effect transistor (FinFET) device and method of manufacturing same
A FinFET device and method for fabricating a FinFET device is disclosed. An exemplary method includes providing a semiconductor substrate; forming a first fin structure and a second fin structure over the semiconductor substrate; forming a gate structure over a portion of the first and second fin structures, such that the gate structure traverses the first and second fin structures; epitaxially growing a first semiconductor material on exposed portions of the first and second fin structures, such that the exposed portions of the first and second fin structures are merged together; and epitaxially growing a second semiconductor material over the first semiconductor material. |
| US09166017B2 |
Method of manufacturing semiconductor device and semiconductor device
Techniques capable of improving the yield of IGBTs capable of reducing steady loss, turn-off time, and turn-off loss are provided. Upon formation of openings in an interlayer insulting film formed on a main surface of a substrate, etching of a laminated insulating film of a PSG film and an SOG film and a silicon oxide film is once stopped at a silicon nitride film. Then, the silicon nitride film and the silicon oxide film are sequentially etched to form the openings. As a result, the openings are prevented from penetrating through an n-type source layer and a p+-type emitter layer having a thickness of 20 to 100 nm and reaching the substrate. |
| US09166016B1 |
Semiconductor device and method for fabricating the same
Provided is a method for fabricating a semiconductor device including the following steps. A silicon-containing conductive layer is formed on a substrate. Then, a dielectric layer is formed around the silicon-containing conductive layer. A portion of the dielectric layer is removed to expose a first sidewall of the silicon-containing conductive layer. A shielding structure is formed on a partial surface of the silicon-containing conductive layer, and the shielding structure exposes at least the first sidewall. A metal layer is formed on the substrate to cover the silicon-containing conductive layer not covered by the shielding structure. A salicide process is performed to form a silicide layer. |
| US09166013B2 |
Nonvolatile memory device and method for fabricating the same
A nonvolatile memory device having a plurality of unit cells, each of the plurality of unit cells includes a first transistor suitable for having a fixed threshold voltage, and a second transistor suitable for coupling to the first transistor in parallel and having a variable threshold voltage. |
| US09166012B2 |
Semiconductor memory devices including an air gap and methods of fabricating the same
Provided are a semiconductor memory device and a method of fabricating the same, the semiconductor memory device may include a semiconductor substrate with a first trench defining active regions in a first region and a second trench provided in a second region around the first region, a gate electrode provided on the first region to cross the active regions, a charge storing pattern disposed between the gate electrode and the active regions, a blocking insulating layer provided between the gate electrode and the charge storing pattern and extending over the first trench to define a first air gap in the first trench, and an insulating pattern provided spaced apart from a bottom surface of the second trench to define a second air gap in the second trench. |
| US09166009B2 |
Semiconductor apparatus and method for making semiconductor apparatus
A semiconductor apparatus invention includes a substrate (1), an epitaxial layer (2) formed on the substrate (1), a gate electrode (3), a source electrode (4), and a drain electrode (5) that are formed on the epitaxial layer. The source electrode (4) and the drain electrode (5) each include at least two first divided electrodes that are formed to extend in parallel to each other in a first direction, inter-electrode distances Ps and Pd between the first divided electrodes are greater than or equal to a radius of an abnormal growth portion formed on a surface of the epitaxial layer (2), and widths of the first divided electrodes are less than or equal to the radius of the abnormal growth portion. |
| US09166006B1 |
Methods to improve the performance of compound semiconductor devices and field effect transistors
Three methods will be described which may be used to improve the performance of compound semiconductor devices and Field Effect Transistors. In the first method, implementation of more than one sheet of 2DEG or high-density electrons in compound semiconductor devices will be described which may be used to improve the performance of compound semiconductor diodes, resistors and transistors. In the second method, implementation of at least one discontinuity in sheet or sheets of 2DEG or high-density electrons will be discussed which can be used to improve the performance of compound semiconductor diodes, resistors and transistors. In the third method, a way to form an electrical connection between an electrode and a sheet of 2DEG or high density electrons will be presented which may be implemented in compound semiconductor devices to reduce the contract resistance between an electrode and a sheet of 2DEG or high-density electrons. |
| US09166005B2 |
Semiconductor device with charge compensation structure
A semiconductor device is provided. The semiconductor device includes a semiconductor body having a main surface. In a vertical cross-section which is substantially orthogonal to the main surface the semiconductor body includes a vertical trench, an n-type silicon semiconductor region, and two p-type silicon semiconductor regions each of which adjoins the n-type silicon semiconductor region and is arranged between the n-type silicon semiconductor region and the main surface. The vertical trench extends from the main surface at least partially into the n-type silicon semiconductor region and includes a compound semiconductor region which includes silicon and germanium and is arranged between the two p-type silicon semiconductor regions. The compound semiconductor region and the two p-type silicon semiconductor regions include n-type dopants and p-type dopants. An integrated concentration of the n-type dopants of the compound semiconductor region is larger than an integrated concentration of the p-type dopants of the compound semiconductor region. |
| US09166002B2 |
N-doped single crystal diamond substrates and methods therefor
The disclosure relates to the formation of n-doped single crystal diamond (SCD). In general, a SCD substrate is preferentially anisotropically etched to provide one or more recesses in the SCD substrate, where the recesses are defined by (1 1 1) surface sidewalls resulting from the preferential anisotropic etching process. The recesses generally have a pyramidal shape. N-type doped SCD (e.g., using a phosphorous dopant) is then deposited into the preferentially anisotropically etched recesses. When the SCD substrate is a p-type diamond (e.g., using a boron dopant), the resulting structure can be used as a p-n junction, for example for use in various power electronic apparatus such as diodes, etc. |
| US09165996B2 |
Organic light emitting display device and manufacturing method thereof
An organic light emitting display device and a method of manufacturing the same are proposed. The organic light emitting display device includes a display unit having a plurality of sub-pixels, each of which includes a pixel electrode and a counter electrode facing each other and a light emitting layer interposed therebetween; an encapsulation substrate, which covers the display unit; and an auxiliary electrode, which is formed on a surface of the encapsulation substrate, which faces the display unit, and is connected to the counter electrode. Using the structure, voltage drop may be effectively reduced by connecting an auxiliary electrode formed on an encapsulation substrate to a counter electrode, thereby improving reliability of an organic light emitting display device employing the same. |
| US09165993B2 |
Capacitor device, organic light emitting display apparatus including the capacitor device, and method of manufacturing the organic light emitting display apparatus
A capacitor device includes two top capacitor electrodes separated from each other and symmetrical to each other, two intermediate capacitor electrodes symmetrical to each other and respectively overlapping the top capacitor electrodes, a bridge coupling the intermediate capacitor electrodes without overlapping the top capacitor electrodes, and a driving voltage line coupled to the bridge and configured to apply a common voltage to the intermediate capacitor electrodes. |
| US09165989B2 |
High-yield fabrication of large-format substrates with distributed, independent control elements
A large-format substrate with distributed control elements is formed by providing a substrate and a wafer, the wafer having a plurality of separate, independent chiplets formed thereon; imaging the wafer and analyzing the wafer image to determine which of the chiplets are defective; removing the defective chiplet(s) from the wafer leaving remaining chiplets in place on the wafer; printing the remaining chiplet(s) onto the substrate forming empty chiplet location(s); and printing additional chiplet(s) from the same or a different wafer into the empty chiplet location(s). |
| US09165988B2 |
Organic light-emitting display apparatus having dual insulating parts
An organic light-emitting display apparatus is disclosed. The organic light-emitting display apparatus includes a substrate; a thin film transistor (TFT) formed on the substrate and including an active layer, a gate electrode, a source electrode, and a drain electrode; a first insulating layer formed on the TFT; a pixel electrode; a second insulating layer formed on the first insulating layer; and an opposite electrode formed on the intermediate layer. |
| US09165985B2 |
Organic light-emitting display device
An organic light-emitting display device includes a first substrate having transmitting regions and pixel regions separated from each other by the transmitting regions, a plurality of thin film transistors on the first substrate in the pixel regions, a passivation layer covering the plurality of thin film transistors, a plurality of pixel electrodes on the passivation layer and electrically connected to the thin film transistors, the pixel electrodes being in the pixel regions and overlapping the thin film transistors, an opposite electrode in the transmitting regions and the pixel regions, the opposite electrode facing the plurality of pixel electrodes and being configured to transmit light, an organic emission layer interposed between the pixel electrodes and the opposite electrode, and a color filter in corresponding pixel regions. |
| US09165982B2 |
Optical films for reducing color shift and organic light-emitting display apparatuses employing the same
Optical films, and organic light-emitting display apparatuses employing the same, include a high refractive index pattern layer including a first surface and a second surface facing each other, wherein the first surface includes a pattern having a plurality of grooves. The plurality of grooves each have a curved surface and a depth greater than a width thereof. The high refractive index pattern layer is formed of a material having a refractive index greater than 1. The optical films, and the organic light-emitting display apparatuses, further include a low refractive index pattern layer formed of a material having a refractive index smaller than the refractive index of the material constituting the high refractive index pattern layer. The low refractive index pattern layer includes a filling material for filling the plurality of grooves. |
| US09165975B2 |
Solid-state imaging device, method for manufacturing solid-state imaging device, and imaging apparatus
A solid-state imaging device includes, in a semiconductor substrate, a pixel portion provided with a photoelectric conversion portion, which photoelectrically converts incident light to obtain an electric signal and a peripheral circuit portion disposed on the periphery of the pixel portion, wherein a gate insulating film of aMOS transistor in the peripheral circuit portion is composed of a silicon oxynitride film, a gate insulating film of aMOS transistor in the pixel portion is composed of a silicon oxynitride film, and an oxide film is disposed just above the photoelectric conversion portion in the pixel portion. |
| US09165967B2 |
Semiconductor structure able to receive electromagnetic radiation, semiconductor component and process for fabricating such a semiconductor structure
A semiconducting structure configured to receive electromagnetic radiation and transform the received electromagnetic radiation into an electric signal, the semiconductor structure including a semiconducting support within a first surface defining a longitudinal plane, a first zone with a first type of conductivity formed in the support with a second zone with a second type of conductivity that is opposite of the first type of conductivity to form a semiconducting junction. A mechanism limiting lateral current includes a third zone formed in the support in lateral contact with the second zone, the third zone having the second type of conductivity for which majority carriers are electrons. The third zone has a sufficient concentration of majority carriers to have an increase in an apparent gap due to a Moss-Burstein effect. |
| US09165964B2 |
Image sensor and image capture apparatus
An image sensor in which each pixel includes a first sub-pixel including a first semiconductor layer, a second sub-pixel including a second semiconductor layer having a polarity different from a polarity of the first semiconductor layer, a third semiconductor layer having a polarity equal to the polarity of the first semiconductor layer, and a microlens, and which includes a plurality of pixels in which the first semiconductor is included in the second semiconductor layer, and the second semiconductor layer is included in the third semiconductor layer, wherein a center of gravity position of a light-receiving surface defining the first semiconductor layer is different from a center of gravity position of a light-receiving surface defining both the first semiconductor layer and the second semiconductor layer. |
| US09165962B2 |
Solid state imaging device
A solid state imaging device includes a semiconductor layer, and a light shielding portion. The semiconductor layer has multiple photoelectric conversion elements. The light shielding portion is provided in the semiconductor layer, and has a light shielding member whose interface with the semiconductor layer is covered by an insulating film. The light shielding portion includes a light shielding region and an element isolation region. The light shielding region is provided in the semiconductor layer on the side close to the light receiving surface of the photoelectric conversion element for shielding light incident on the photoelectric conversion element from a specific direction. The element isolation region is formed to project in the depth direction of the semiconductor layer from the light shielding region toward a portion between the multiple photoelectric conversion elements in order to electrically and optically isolate the multiple photoelectric conversion elements from one another. |
| US09165960B2 |
Pixel circuit, active sensing array, sensing device and driving method thereof
A pixel circuit, an active sensing array, a sensing device, and a driving method thereof are provided. The pixel circuit includes a sensing transistor, a reset transistor, and a storage capacitor. The sensing transistor is electrically connected to a sensing element and a data line. The reset transistor is electrically connected to a first scan line and the sensing transistor. The storage capacitor is electrically connected to the sensing transistor and a second scan line. During a compensation period, the reset transistor is turned on in response to a first scanning pulse from the first scan line, so that the sensing transistor is connected into a diode configuration, and the storage capacitor charges and discharges to a threshold voltage of the sensing transistor through the sensing transistor having the diode configuration in response to switching of a level of the data line. |
| US09165955B2 |
Array substrate and method for manufacturing the same
Disclosed herein is a method for manufacturing an array substrate. The method includes forming a source electrode and a drain electrode on a substrate. A semiconductor layer, an organic insulating layer, and a gate electrode layer are sequentially formed to cover the substrate, the source electrode, and the drain electrode. A patterned photoresist layer is formed on the gate electrode layer. The exposed portion of the gate electrode layer, and a portion of the organic insulative layer and a portion of the semiconductor layer thereunder are removed to form a gate electrode. An organic passivation layer is formed on the gate electrode, the source electrode, and the drain electrode. The organic passivation layer has a contact window to expose a portion of the drain electrode. A pixel electrode is formed on the organic passivation layer and the exposed portion of the drain electrode. |
| US09165954B2 |
Array substrate and method for manufacturing the same, and display device
The present invention provides an array substrate and a method for manufacturing the same, and a display device. In the method for manufacturing the array substrate, a one-time patterning process is employed to form a channel region, a source electrode and a drain electrode of the array substrate. Specifically, a channel region, a source region and a drain region that are consisted of a metal oxide layer are formed via a one-time patterning process, and a heat treatment is carried out on the metal oxide layer of the source region and the drain region in hydrogen gas, thereby forming a conducting source electrode and a conducting drain electrode, respectively. By the technical solution of the invention, the manufacturing process of the array substrate can be simplified, and the manufacturing cost of the array substrate can be lowered. |
| US09165950B2 |
Anti-static structure of array substrate
The present invention provides an anti-static structure of an array substrate, which comprises: an effective region 20 of the array substrate, a gate line shorting bar 30 and a data line shorting bar 40, the effective region 20 of the array substrate is provided with a plurality of parallel gate lines 22 and data lines 24, the gate line shorting bar 30 is electrically connected with one side of the plurality of gate lines 22, the data line shorting bar 40 is electrically connected with one side of the plurality of data lines 24. The present invention only utilizes a gate line shorting bar to short all gate lines and utilizes a data line shorting bar to short all data lines, in order to greatly avoid the abnormal discharge of the plasma generated when the hole is formed cause static damage to the metal overlapping traces of the shorting bar. |
| US09165945B1 |
Method for fabricating semiconductor structures including transistor channels having different strain states, and related semiconductor structures
Methods of fabricating a semiconductor structure include implanting ion into a second region of a strained semiconductor layer on a multi-layer substrate to amorphize a portion of crystalline semiconductor material in the second region of the strained semiconductor layer without amorphizing a first region of the strained semiconductor layer. The amorphous region is recrystallized, and elements are diffused within the semiconductor layer to enrich a concentration of the diffused elements in a portion of the second region of the strained semiconductor layer and alter a strain state therein relative to a strain state of the first region of the strained semiconductor layer. A first plurality of transistor channel structures are formed that each comprise a portion of the first region of the semiconductor layer, and a second plurality of transistor channel structures are formed that each comprise a portion of the second region of the semiconductor layer. |
| US09165941B2 |
Semiconductor memory devices and methods for fabricating the same
A semiconductor memory device includes a substrate having a cell region and a peripheral region, a gate stack including a plurality of insulating layers and a plurality of gates alternately stacked on the cell region of the substrate, a stress buffer layer on the gate stack, a vertical channel that extends vertically through the gate stack and is electrically connected to the substrate, a memory layer wrapped around the vertical channel. A bit line electrically connected to the vertical channel may be provided on the gate stack. In a method of fabricating a semiconductor device, the buffer stress layer is formed directly on an upper insulating layer of a stack whose shape is altered to form the gate stack to inhibit warping of the substrate during fabrication of the device. |
| US09165939B2 |
Method for fabricating nonvolatile memory device
A method for fabricating a nonvolatile memory device includes forming a first insulation layer and a first conductive layer on a substrate including a first region and a second region, forming a first isolation trench in the first region by etching the first conductive layer, the first insulation layer, and the substrate, forming a first isolation layer filled in the first isolation trench, forming a second insulation layer and a conductive capping layer, etching the capping layer and the second insulation layer, forming a second conductive layer, and forming first gate patterns by etching the second conductive layer, the capping layer, the second insulation layer, the first conductive layer, and the first insulation layer of the first region, and forming a second isolation trench in the second region by etching the second conductive layer, the first conductive layer, the first insulation layer, and the substrate. |
| US09165935B2 |
Semiconductor devices and methods for manufacturing the same
A semiconductor device includes a semiconductor substrate including first trenches defining outer sidewalls of a pair of active pillars and a second trench defining opposing inner sidewalls of the pair of active pillars. The second trench may have a bottom surface located at a higher level than bottom surface of the first trench. Auxiliary conductive lines may be disposed in the first trenches to cover and cross the outer sidewalls of the pair of active pillars. A pair of main conductive lines may be disposed in a pair of recessed regions that are laterally recessed from lower portions of the inner sidewalls of the active pillars into the pair of active pillars. A common impurity region may be disposed in the semiconductor substrate under the second trench. Upper impurity regions may be disposed in upper portions of the active pillars. |
| US09165934B2 |
Semiconductor devices including insulating extension patterns between adjacent landing pads and methods of fabricating the same
A semiconductor memory device includes a plurality of pattern structures respectively including a bit line and insulating spacers on sidewalls thereof protruding from a substrate. A plurality of insulating extension patterns are provided on opposing sidewalls of the pattern structures, and respectively extend from upper portions of the opposing sidewalls toward the substrate along the insulating spacers such that lower portions of the opposing sidewalls are free of the extension patterns. A plurality of buried contact patterns are provided on the substrate between the lower portions of the opposing sidewalls of adjacent pattern structures. Related fabrication methods are also discussed. |
| US09165933B2 |
Vertical bit line TFT decoder for high voltage operation
A 3D memory array having a vertically oriented thin film transistor (TFT) selection device that has a channel extension, otherwise referred to as a gate/junction offset, is disclosed. The vertically oriented TFT selection device with channel extension serves as a vertical bit line selection device in the 3D memory array. A vertical TFT select device having a channel extension has a high breakdown voltage and low leakage current. The channel extension can be at the top junction or bottom junction of the TFT. Depending on whether the memory elements undergo a forward FORM or reverse FORM, either the bottom or top junction can have the channel extension. This provides for a high voltage junction where needed. |
| US09165931B1 |
Apparatus for field-programmable gate array with configurable architecture and associated methods
An integrated circuit (IC) includes a substrate that is common to the IC and variants of the IC. The IC also includes a first set of interconnect layers fabricated above the substrate. The first set of interconnect layers is used to couple programmable interconnect of the IC to a first circuit in the substrate. The IC further includes a second set of interconnect layers fabricated above the substrate. The second set of interconnect layers is used to differentiate features of the IC from variants of the IC by selectively coupling the programmable interconnect to a second circuit in the substrate. |
| US09165929B2 |
Complementarily strained FinFET structure
A complementary fin field-effect transistor (FinFET) includes a p-type device having a p-channel fin. The p-channel fin may include a first material that is lattice mismatched relative to a semiconductor substrate. The first material may have a compressive strain. The FinFET device also includes an n-type device having an re-channel fin. The n-channel fin may include a second material having a tensile strain that is lattice mismatched relative to the semiconductor substrate. The p-type device and the n-type device cooperate to form the complementary FinFET device. |
| US09165927B2 |
Semiconductor device
In a semiconductor device, each of a first connection metal member, a second connection metal member, a third connection metal member, and a fourth connection metal member electrically connects a corresponding line to a corresponding one of main electrodes formed on lower surfaces and upper surfaces of first and second semiconductor elements. A cross-sectional area of each of the first connection metal member, the second connection metal member, the third connection metal member, and the fourth connection metal member is larger than a cross-sectional area of a fifth connection metal member that is disposed at a region located outside regions of the first and second semiconductor elements in a plan view. |
| US09165926B2 |
Dynamic threshold MOS and methods of forming the same
A chip includes a semiconductor substrate, a well region in the semiconductor substrate, and a Dynamic Threshold Metal-Oxide Semiconductor (DTMOS) transistor formed at a front side of the semiconductor substrate. The DTMOS transistor includes a gate electrode, and a source/drain region adjacent to the gate electrode. The source/drain region is disposed in the well region. A well pickup region is in the well region, and the well pickup region is at a back side of the semiconductor substrate. The well pickup region is electrically connected to the gate electrode. |
| US09165925B2 |
Structures and methods for ring oscillator fabrication
Structures and methods are provided for fabricating a ring oscillator including a plurality of stages. An example multi-layer structure includes a first device layer, a second device layer, and an inter-level connection structure. The first device layer includes a first transistor structure associated with a first stage of a ring oscillator. The second device layer is formed on the first device layer and includes a second transistor structure associated with a second stage of the ring oscillator. Further, the first inter-level connection structure includes one or more first conductive materials and is configured to electrically connect to the first transistor structure and the second transistor structure. |
| US09165918B1 |
Composite semiconductor device with multiple threshold voltages
A device includes a semiconductor substrate, a first constituent transistor including a first plurality of transistor structures in the semiconductor substrate connected in parallel with one another, and a second constituent transistor including a second plurality of transistor structures in the semiconductor substrate connected in parallel with one another. The first and second constituent transistors are disposed laterally adjacent to one another and connected in parallel with one another. Each transistor structure of the first plurality of transistor structures includes a non-uniform channel such that the first constituent transistor has a higher threshold voltage level than the second constituent transistor. |
| US09165915B2 |
Flip-chip hybridization of microelectronic components using suspended fusible resistive connection elements
A method of forming a hybridized device comprising forming a first microelectronic component provided, on a surface, with metal balls, and a second microelectronic component provided, on a surface, with connection elements corresponding to said metal balls, and hybridizing the first and second components to attach the metal balls of the first component to the connection elements of the second component. The manufacturing of the second microelectronic component comprises forming a substrate provided with cavities at the locations provided for the connection elements, and forming resistive elements made of fusible metal respectively suspended above the cavities. The hybridizing of the first and second components comprises transferring the first component onto the second component to have the metal balls rest on the suspended resistive elements, and circulating an electric current through the resistive elements to melt said elements. |
| US09165908B2 |
On-SOI integrated circuit comprising a triac for protection against electrostatic discharges
An integrated circuit includes four electronic components, a buried UTBOX layer under and plumb with the electronic components, and two pairs of oppositely doped ground planes plumb with corresponding components under the layer. A first isolation trench mutually isolates the ground planes from corresponding wells made plumb and in contact with the ground planes and exhibiting the first doping type. Bias electrodes contact respective wells and ground planes. One pair of electrodes is for connecting to a first bias voltage and the other pair is for connecting to a second bias voltage. Also included are a semiconductor substrate exhibiting the first type of doping and a deeply buried well exhibiting the second type of doping. The deeply buried well contacts the other wells and separates them from the substrate. Finally, a control electrode couples to the deeply buried well. |
| US09165905B2 |
Method for connecting a plurality of unpackaged substrates
A plurality of unpackaged substrates connected to one another is disclosed. The stepped structures on and/or in a first main area of a first substrate include a plurality of integrated circuits. The stepped structures run between the integrated circuits. The first conductor tracks extend from at least some contact connections of the respective integrated circuits as far as the stepped structures. The first substrate is connected on the side of the first main area to a further substrate. The first substrate is severed from a second main area opposite to the first main area such that the first substrate is divided into a plurality of substrate pieces. Each substrate piece has one of the integrated circuits. The first conductor tracks are accessible in interspaces between the substrate pieces. The second conductor tracks are formed from the second main area. At least some of the second conductor tracks lead from the second main area over side walls of the substrate pieces as far as the first conductor tracks. |
| US09165898B2 |
Method of manufacturing semiconductor device with through hole
A semiconductor device with improved reliability and its manufacturing method is offered. The semiconductor device of this invention includes a pad electrode formed on a semiconductor substrate through a first insulation layer, and a via hole formed in the semiconductor substrate and extending from a back surface of the semiconductor substrate to the pad electrode, wherein the via hole includes a first opening of which a diameter in a portion close to the pad electrode is larger than a diameter in a portion close to the back surface of the semiconductor substrate, and a second opening formed in the first insulation layer and continuing from the first opening, of which a diameter in a portion close to the pad electrode is smaller than a diameter in a portion close to the front surface of the semiconductor substrate. |
| US09165894B2 |
Cascode cell having DC blocking capacitor
A cascode gain stage apparatus includes an input transistor having an RF input node and a transistor output node, an output transistor having a transistor input node and an RF output node, and a DC blocking capacitor connected between the transistor input and transistor output nodes. |
| US09165893B2 |
Semiconductor device including coupling conductive pattern
A semiconductor device is disclosed including a through electrode. The semiconductor device may include a first semiconductor chip including a transceiver circuit formed on a first surface, a first coupling conductive pattern which is formed on a second surface opposite the first surface, and a through electrode which connects the transceiver circuit and the first coupling conductive pattern. There may be a transceiver located on a second semiconductor chip and including a second coupling conductive pattern facing the first coupling conductive pattern which communicates wirelessly with the first coupling conductive pattern. |
| US09165892B2 |
Electronic component
According to one embodiment, an electronic component includes a device having a plurality of electrodes; a lead electrically connected to each of the plurality of electrodes; a first resin body sealing the device and a portion of the lead; and a first conductive body connected to the leads and contactable with a second conductive body. |
| US09165889B2 |
Alignment mark definer
An alignment mark definer is configured to provide a geometrical definition for an actual alignment structure to be formed at a temporary surface of a substrate based on a desired appearance of the alignment mark and on an expected alteration of an appearance of the actual alignment structure caused by a deposition material deposited on the temporary surface and the actual alignment structure. |
| US09165884B2 |
Method for fabricating a semiconductor device with formation of conductive lines
A substrate having a first region and second regions disposed on two sides of the first region; a first group of conductive lines extending from the first region to the second regions on the substrate; a second group of conductive lines alternating with the first group of times and extending from the first region to the second regions on the substrate; interlayer insulating layers formed over the substrate; insulating layers formed in first open regions of the interlayer insulating layers and the first group of conductive lines in the second region; and contact plugs contacting second group of conductive line formed in second open regions of the interlayer insulating layer in the second region. |
| US09165882B2 |
Power rail for preventing DC electromigration
A method is disclosed that includes the operations outlined below. A first criteria is determined to be met when directions of a first current and a second current around a first end and a second end of a metal segment respectively are opposite, in which the metal segment is a part of a power rail in at least one design file of a semiconductor device and is enclosed by only two terminal via arrays. A second criteria is determined to be met when a length of the metal segment is not larger than a electromigration critical length. The metal segment is included in the semiconductor device with a first current density limit depending on the length of the metal segment when the first and the second criteria are met. |
| US09165872B2 |
Chip scale diode package no containing outer lead pins and process for producing the same
A novel chip scale diode package due to no containing outer lead pins is miniaturized like a chip scale appearance to promote dimensional accuracy so that the diode package is so suitably produced by automation equipment to get automated mass production; the produced diode package may contain one or more diode chips to increase versatile functions more useful in applications, such as produced as a SMT diode package or an array-type SMT diode, and the present diode package due to made of no lead-containing material conforms to requirements for environmental protection. |
| US09165870B2 |
Semiconductor storage device and manufacturing method thereof
According to the embodiment, a semiconductor storage device includes an organic substrate, a semiconductor memory chip, a lead frame, and a resin mold section. The lead frame includes an adhering portion. The organic substrate is singulated to have a shape in which a portion in which the organic substrate does not overlap with the placing portion is larger than a portion in which the organic substrate overlaps with the placing portion, in plan view. The lead frame further includes a first extending portion in the adhering portion that extends to a surface different from a surface of the resin mold section on a side of an insertion direction. |
| US09165868B2 |
Semiconductor device
A semiconductor device includes: a semiconductor chip, and a lead frame. The semiconductor chip is mounted over a die pad. Four suspension leads are connected with the die pad and at least one of them is provided between first and second lead groups and is deformed to protrude toward the first lead group. At least one of the leads of the second lead group which is nearer to the deformed suspension lead is deformed to be apart from remaining leads of the second lead group. |
| US09165867B1 |
Semiconductor device with lead frame contact solder balls and related methods
A semiconductor device may include an integrated circuit (IC), and lead frame contact areas adjacent the IC. Each lead frame contact area may have an opening therein. The semiconductor device may include bond wires, each bond wire coupling a respective lead frame contact area with the IC. The semiconductor device may also include encapsulation material surrounding the IC, the lead frame contact areas, and the bond wires. Solder balls are within the respective opening. |
| US09165866B2 |
Stacked dual chip package having leveling projections
The present invention is directed to a lead-frame having a stack of semiconductor dies with interposed metalized clip structure. Level projections extend from the clip structure to ensure that the clip structure remains level during fabrication. |
| US09165865B2 |
Ultra-thin power transistor and synchronous buck converter having customized footprint
A packaged power transistor device (100) having a leadframe including a flat plate (110) and a coplanar flat strip (120) spaced from the plate, the plate having a first thickness (110a) and the strip having a second thickness (120a) smaller than the first thickness, the plate and the strip having terminals (212; 121a). A field-effect power transistor chip (210) having a third thickness (210a), a first and a second contact pad on one chip side, and a third contact pad (211) on the opposite chip side, the first pad being attached to the plate, the second pad being attached to the strip, and the third pad being coplanar with the terminals. Encapsulation compound (130) filling the thickness difference between plate and strip, and spaces between chip and terminals, wherein the compound has a surface (101) coplanar with the plate surface (111) and the opposite surface (102) coplanar with the third pad (211) and the terminals (212; 212a), the distance (104) between the surfaces being equal to the sum of the first (110a) and third (210a) thicknesses. |
| US09165858B2 |
Liquid-cooled arrangement having modular power semiconductor modules and at least one capacitor device, and power semiconductor module therefor
An arrangement having a cooling circulation, a plurality of modular power semiconductor modules and at least one capacitor, wherein a power semiconductor module has a power electronics switch and a cooling device, which is capable of carrying a flow of a cooling fluid, for cooling the switch, the cooling device having at least one cooling face, and four connection devices for the cooling fluid. The connection devices are arranged in pairs on main sides of the power semiconductor module. The power semiconductor modules have their main sides strung together modularly by connecting corresponding connection devices on successive power semiconductor modules. To this end, at least two successive power semiconductor modules have a capacitor arranged between them which, for its part, is cooled by means of the cooling circulation of the cooling fluid as provided by the arrangement. |
| US09165855B1 |
Semiconductor device with die attached heat spreader
A packaged semiconductor device has an integrated circuit (IC) die and a heat spreader. The heat spreader has a first portion with holes formed entirely therethrough. The first portion is attached to the die using thermally-conductive adhesive that fills the holes. The holes enable the heat spreader to be attached to the die without placing excess pressure on the IC die that could cause the die to crack. |
| US09165854B2 |
Heat dissipation features, electronic devices incorporating heat dissipation features, and methods of making heat dissipation features
Electronic devices incorporating a heat dissipation feature include an enclosure, and at least one heat-generating component positioned within the enclosure. The heat dissipation feature is sufficiently coupled to the at least one heat-generating component to facilitate conductive heat transfer from the heat-generating component. The heat dissipation feature includes a plurality of protrusions exposed externally to the enclosure. A thermally insulating material may be disposed on at least a tip portion of at least some of the protrusions. The thermally insulating material is selected to provide a touch temperature that is below a predetermined threshold. In some instances, the thermally insulating material can provide such a touch temperature by selecting the material to include properties for thermal conductivity (k), density (ρ), and specific heat (Cp) such that the product of k*ρ*Cp results in a value less than a product of k*ρ*Cp for human skin. |
| US09165853B2 |
Closed loop temperature controlled circuit to improve device stability
An integrated circuit is provided having an active circuit. A heating element is adjacent to the active circuit and configured to heat the active circuit. A temperature sensor is also adjacent to the active circuit and configured to measure a temperature of the active circuit. A temperature controller is coupled to the active circuit and configured to receive a temperature signal from the temperature sensor. The temperature controller operates the heating element to heat the active circuit to maintain the temperature of the active circuit in a selected temperature range. |
| US09165850B2 |
Compensating for warpage of a flip chip package by varying heights of a redistribution layer on an integrated circuit chip
Structures and methods of making a flip chip package that employ polyimide pads of varying heights at a radial distance from a center of an integrated circuit (IC) chip for a flip chip package. The polyimide pads may be formed under electrical connectors, which connect the IC chip to a chip carrier of the flip chip package, so that electrical connectors formed on polyimide pads of greater height are disposed at a greater radial distance from the center of the IC chip, while electrical connectors formed on polyimide pads of a lesser height are disposed more proximately to the center of the IC chip. Electrical connectors of a greater relative height to the IC chip's surface may compensate for a gap, produced by heat-induced warpage during the making of the flip chip package, that separates the electrical connectors on the IC chip from flip chip attaches on the chip carrier. |
| US09165849B2 |
Electronic device
An electronic device is provided wherein the characteristics thereof are prevented from deteriorating. The electronic device (1) is provided with: a chip component (2) having an electronic element (22); a wiring board (3) on which the chip component (2) is mounted with a space therebetween, the space for containing the electronic element (22); a resin layer (4) provided from the surface of the chip component (2) to the surface of the wiring board (3) so as to surround the space; and an inorganic insulating layer (5), which is provided at the resin layer (4) and is positioned at the side of the space. Since entry of water vapor into the space can be reduced not only by means of the resin layer (4) but also by means of the inorganic insulating layer (5), the electronic device (1) having high airtight sealing performance can be provided. |
| US09165843B2 |
Systems and methods of automatically detecting failure patterns for semiconductor wafer fabrication processes
A system and method of automatically detecting failure patterns for a semiconductor wafer process is provided. The method includes receiving a test data set collected from testing a plurality of semiconductor wafers, forming a respective wafer map for each of the wafers, determining whether each respective wafer map comprises one or more respective objects, selecting the wafer maps that are determined to comprise one or more respective objects, selecting one or more object indices for selecting a respective object in each respective selected wafer map, determining a plurality of object index values in each respective selected wafer map, selecting an object in each respective selected wafer map, determining a respective feature in each of the respective selected wafer, classifying a respective pattern for each of the respective selected wafer maps and using the respective wafer fingerprints to adjust one or more parameters of the semiconductor fabrication process. |
| US09165842B2 |
Short tail recovery techniques in wire bonding operations
A method of operating a wire bonding machine is provided. The method includes: detecting a short tail condition after formation of a wire bond formed using a wire bonding tool; providing a bond head assembly of a wire bonding machine at an xy location of the wire bonding machine, the bond head assembly carrying the wire bonding tool; lowering the bond head assembly toward a contact surface at the xy location with a wire clamp of the wire bonding machine closed; opening the wire clamp; decelerating the bond head assembly as it is lowered toward the contact surface such that a portion of a wire extends below a tip of the wire bonding tool; closing the wire clamp; and performing a test to determine if an end of the portion of the wire extending below the tip of the bonding tool is in contact with the contact surface. |
| US09165840B2 |
Semiconductor structure including a semiconductor-on-insulator region and a bulk region, and method for the formation thereof
A structure comprises a semiconductor substrate, a semiconductor-on-insulator region and a bulk region. The semiconductor-on-insulator region comprises a first semiconductor region, a dielectric layer provided between the semiconductor substrate and the first semiconductor region, and a first transistor comprising an active region provided in the first semiconductor region. The dielectric layer provides electrical isolation between the first semiconductor region and the semiconductor substrate. The bulk region comprises a second semiconductor region provided directly on the semiconductor substrate. |
| US09165839B2 |
Plasma protection diode for a HEMT device
The present disclosure provides a semiconductor device. The semiconductor device includes a silicon substrate. A first III-V compound layer is disposed over the silicon substrate. A second III-V compound layer is disposed over the first III-V compound layer. The semiconductor device includes a transistor disposed over the first III-V compound layer and partially in the second III-V compound layer. The semiconductor device includes a diode disposed in the silicon substrate. The semiconductor device includes a via coupled to the diode and extending through at least the first III-V compound layer. The via is electrically coupled to the transistor or disposed adjacent to the transistor. |
| US09165838B2 |
Methods of forming low resistance contacts
Methods for forming electrical contacts are provided. First and second FETs are formed over a semiconductor substrate. Openings are etched in a dielectric layer formed over the substrate, where the openings extend to source and drain regions of the FETs. A hard mask is formed over the source and drain regions of FETs. A first portion of the hard mask is removed, where the first portion is formed over the source and drain regions of the first FET. First silicide layers are formed over the source and drain regions of the first FET. A second portion of the hard mask is removed, where the second portion is formed over the source and drain regions of the second FET. Second silicide layers are formed over the source and drain regions of the second FET. A metal layer is deposited within the openings to fill the openings. |
| US09165837B1 |
Method to form defect free replacement fins by H2 anneal
Methods of forming a defect free heteroepitaxial replacement fin by annealing the sacrificial Si fin with H2 prior to STI formation are provided. Embodiments include forming a Si fin on a substrate; annealing the Si fin with H2; forming a STI layer around the annealed Si fin; annealing the STI layer; removing a portion of the annealed Si fin by etching, forming a recess; forming a replacement fin in the recess; and recessing the annealed STI layer to expose an active replacement fin. |
| US09165831B2 |
Dice before grind with backside metal
A method including forming a plurality of dicing channels in a front side of a wafer; the plurality of dicing channels including a depth at least greater than a desired final thickness of the wafer, filling the plurality of dicing channels with a fill material and removing a portion of the wafer from a back side of the wafer until the desired final thickness is achieved, where a portion of the fill material within the plurality of dicing channel is exposed. The method further including depositing a metal layer on the back side of the wafer; removing the fill material from within the plurality of dicing channels to expose the metal layer at a bottom of the plurality of dicing channels, and removing a portion of the metal layer located at the bottom of the plurality of dicing channels. |
| US09165830B1 |
Array substrate and method of fabricating the same, and liquid crystal display device
An array substrate, a method of fabricating the same, and a liquid crystal display device are disclosed. The method comprises: sequentially forming a first transparent conductive material layer, an insulation material layer, a semiconductor material layer and a photoresist layer on a substrate base and forming patterns including a gate line, a gate, a gate insulation layer, a semiconductor layer and a first transparent electrode by patterning process; forming a passivation layer and forming a source via and a drain via connected to the semiconductor layer in the passivation layer; sequentially forming a second transparent conductive material layer and a source-drain metal layer and forming patterns including a source, a drain and a second transparent electrode by patterning process, the gate insulation layer is formed only on the gate and the gate line, the source and the drain include stacked second transparent conductive material layer and source-drain metal layer. |
| US09165828B2 |
Semiconductor device comprising a fuse structure and a method for manufacturing such semiconductor device
A semiconductor device comprises a semiconductor substrate, an anorganic isolation layer on the semiconductor substrate and a metallization layer on the anorganic isolation layer. The metallization layer comprises a fuse structure. At least in an area of the fuse structure the metallization layer and the anorganic isolation layer have a common interface. |
| US09165819B2 |
High linearity SOI wafer for low-distortion circuit applications
According to a method herein, a first side of a substrate is implanted with a first material to change a crystalline structure of the first side of the substrate from a first crystalline state to a second crystalline state, after the first material is implanted. A second material is deposited on the first side of the substrate, after the first material is implanted. A first side of an insulator layer is bonded to the second material on the first side of the substrate. Integrated circuit devices are formed on a second side of the insulator layer, opposite the first side of the insulator layer, after the insulator layer is bonded to the second material. The integrated circuit devices are thermally annealed. The first material maintains the second crystalline state of the first side of the substrate during the annealing. |
| US09165816B2 |
Method for singulating a component composite assembly
A method relates to separating a component composite into a plurality of component regions, wherein the component composite is provided having a semiconductor layer sequence comprising a region for generating or for receiving electromagnetic radiation. The component composite is mounted on a rigid subcarrier. The component composite is separated into the plurality of component regions, wherein one semiconductor body is produced from the semiconductor layer sequence for each component region. The component regions are removed from the subcarrier. |
| US09165815B2 |
Wafer processing sheet
Provided is a sheet for processing a wafer. The sheet can exhibit excellent heat resistance and dimensional stability, prevent breakage of a wafer in response to residual stress due to excellent stress relaxation properties, inhibit damage to or dispersion of the wafer due to application of a non-uniform pressure, and also exhibit excellent cuttability. The sheet can effectively prevent a blocking phenomenon from occurring during wafer processing. For these reasons, the sheet can be useful for processing a wafer in various wafer preparation processes such as dicing, back-grinding and picking-up. |
| US09165814B2 |
Electrical connector, electrical connection system and lithographic apparatus
An electrical connector comprises a high voltage pad and a high voltage plate. When connected to another electrical connector, the two plates, which are at the same voltage as the pads, form a region of high voltage in which the field is low. The pads are positioned in that region. An electrostatic clamp of an EUV lithographic apparatus may have such a pad and plate, for connecting to the electrical connector. By placing the interconnection in a low field region, triple points (points of contact between a conductor, a solid insulator and a gas) may be present in that region. |
| US09165808B2 |
Metal organic chemical vapor deposition device and temperature control method therefor
The present invention provides a metal organic chemical vapor deposition device and a temperature control method therefor. The device comprises: a chamber; a susceptor which is installed inside the chamber to allow rotation therein, wherein at least one substrate is settled thereon; a plurality of heaters which heat the susceptor, wherein the temperature is independently controlled; a gas sprayer which is positioned in the upper part of the susceptor, and sprays gases of group III and V toward the susceptor; a plurality of temperature detection sensors which are positioned in the upper part of the susceptor, and measure the temperature of heating regions heated by each heater; and a controller which retains temperature setting values necessary for the heating regions, and controls the temperature of the heating regions by comparing sensing temperature values detected by each temperature detection sensor with the setting values necessary for the heating regions. According to the present invention, the metal organic chemical vapor deposition device and the temperature control method therefor can uniformly apply necessary temperature ramping to the entire substrates during process by effectively adjusting the temperature conditions essential for every epitaxial process in the metal organic chemical vapor deposition device, which carries out the process by changing the temperature up to 1200° C. from room temperature. Therefore, the invention improves process efficiency and deposition uniformity. |
| US09165807B2 |
Substrate treating apparatus with vertical treatment arrangement including vertical blowout and exhaust units
A substrate treating apparatus includes a treating block including a plurality of cells arranged one over another. Each cell has treating units for treating substrates and a single main transport mechanism for transporting the substrates to the treating units. Each cell also has a blowout unit for supplying a clean gas into a transporting space of the main transport mechanism and an exhaust unit for exhausting gas from the transporting space. The blowout unit and the exhaust unit are arranged one over the other in the transporting space to separate the transporting space of each cell from that of another cell. |
| US09165804B2 |
Methods of cooling process chamber components
Methods for cooling process chamber components are provided herein. In some embodiments, a method of cooling a process chamber component may include reducing a power provided to a heater disposed proximate a surface of the process chamber component to reduce an amount of heat provided to the component by the heater; providing a coolant to coolant channels disposed within the process chamber component using a pulsed flow having a duty cycle until the process chamber component reaches a temperature that is less than or equal to a predetermined magnitude above a temperature of the coolant; and after the process chamber component reaches the temperature less than or equal to the predetermined magnitude above a temperature of the coolant, reducing the duty cycle of the pulsed flow of the coolant to zero. |
| US09165802B2 |
Methods for cleaving a bonded wafer structure
Apparatus and methods for mechanically cleaving a bonded wafer structure are disclosed. The apparatus and methods involve clamps that grip the bonded wafer structure and are actuated to cause the bonded structure to cleave. |
| US09165800B2 |
Liquid processing method, liquid processing apparatus and storage medium
Disclosed is a liquid processing method which includes holding the substrate by a holding part, rotating the substrate held by the holding part through a rotation driving part, and supplying a chemical liquid to a holding part-side surface of the substrate by a chemical liquid supply part. After the supply of the chemical liquid, rinsing liquid droplets are generated and supplied between the holding part and the substrate by supplying gas toward the holding part-side surface of the substrate from a gas supply part and, at the same time, supplying a rinsing liquid toward the holding part-side surface of the substrate from a rinsing liquid supply part. After the supply of the rinsing liquid droplets, the gas supply is halted and a rinsing liquid is additionally supplied to the holding part-side surface of the substrate from the rinsing liquid supply part. |
| US09165794B1 |
Partial glob-top encapsulation technique
A electronic device includes: a circuit board; a semiconductor device, disposed on the circuit board; a cover material, disposed above the semiconductor device; a plurality of bonding wires, respectively connected between a plurality of first contact pads of the semiconductor device and a plurality of second contact pads of the circuit board; a first encapsulant, formed by a first material, arranged to encapsulate a plurality of second bonds formed by electrically connecting the bonding wires to the second contact pads; and a second encapsulant, formed by a second material that is different from the first material, arranged to encapsulate a plurality of first bonds formed by electrically connecting the bonding wires to the first contact pads. |
| US09165788B2 |
Post-deposition soft annealing
The methods and apparatus disclosed herein concern a process that may be referred to as a “soft anneal.” A soft anneal provides various benefits. Fundamentally, it reduces the internal stress in one or more silicon layers of a work piece. Typically, though not necessarily, the internal stress is a compressive stress. A particularly beneficial application of a soft anneal is in reduction of internal stress in a stack containing two or more layers of silicon. Often, the internal stress of a layer or group of layers in a stack is manifest as wafer bow. The soft anneal process can be used to reduce compressive bow in stacks containing silicon. The soft anneal process may be performed without causing the silicon in the stack to become activated. |
| US09165787B2 |
Electronic devices having semiconductor memory units and method for fabricating the same
The disclosed technology provides an electronic device and a fabrication method thereof. An electronic device according to an implementation of the disclosed technology may include: a first interlayer insulating layer formed over a substrate; first and second contact plugs passing through the first interlayer insulating layer to contact the substrate and alternately arranged to cross each other; a variable resistance element formed over the first interlayer insulating layer and coupled to the first contact plug; a second interlayer insulating layer formed over an entire structure including the first interlayer insulating layer; a third contact plug passing through the second interlayer insulating layer so as to be coupled to the variable resistance element, and a fourth contact plug passing through the second interlayer insulating layer so as to be contacted to the second contact plug; and conductive lines coupled to the third contact plug and the fourth contact plug, respectively. |
| US09165783B2 |
Method of patterning a low-k dielectric film
Methods of patterning low-k dielectric films are described. In an example, a method of patterning a low-k dielectric film involves forming and patterning a mask layer above a low-k dielectric layer, the low-k dielectric layer disposed above a substrate. The method also involves modifying exposed portions of the low-k dielectric layer with a nitrogen-free plasma process. The method also involves removing, with a remote plasma process, the modified portions of the low-k dielectric layer selective to the mask layer and unmodified portions of the low-k dielectric layer. |
| US09165781B2 |
Composition for forming pattern reversal film and method for forming reversal pattern
There is provided a silicon-containing composition for forming a pattern reversal film that can be reworked by an organic solvent that is normally used for the removal of resist patterns. A composition for forming a pattern reversal film, characterized by comprising: polysiloxane; an additive; and an organic solvent, wherein the polysiloxane has a structural unit of Formula (1) and a structural unit of Formula (2): (where R1 is a C1-8 alkyl group), and (where R2 is an acryloyloxy group or a methacryloyloxy group; and n is an integer of 2 to 4), and the additive is an organic acid having at least two of a carboxy group and/or a hydroxy group; and a pattern reversal film and a method for forming a reversal pattern by use of the composition. |
| US09165779B2 |
Flat SiC semiconductor substrate
Methods for manufacturing silicon carbide wafers having superior specifications for bow, warp, total thickness variation (TTV), local thickness variation (LTV), and site front side least squares focal plane range (SFQR). The resulting SiC wafer has a mirror-like surface that is fit for epitaxial deposition of SiC. The specifications for bow, warp, total thickness variation (TTV), local thickness variation (LTV), and site front side least squares focal plane range (SFQR) of the wafer are preserved following the addition of the epitaxy layer. |
| US09165778B2 |
Systems and methods for chemical mechanical planarization with photoluminescence quenching
Systems and methods are provided for performing chemical-mechanical planarization on an article. An example system for performing chemical-mechanical planarization includes: a polishing pad configured to support an article for chemical-mechanical planarization (CMP), wherein the article includes a CMP stop material, a polishing head configured to perform chemical-mechanical planarization on the article, a light source configured to provide an incident light, a polishing fluid including a plurality of luminescent particles capable of emitting a fluorescent light in response to the incident light, a fluorescence detector configured to detect the intensity of the fluorescent light, and at least one processor coupled to the fluorescent detector and the polishing head, wherein the at least one processor is configured to control the polishing head based on the detected fluorescent light. |
| US09165776B2 |
Dry etching method
There is provided according to the present invention a dry etching method for a laminated film, the laminated film being formed on a substrate and having a laminated structure in which silicon layers and insulating layers are laminated together with a hole or groove defined therein in a direction perpendicular to a surface of the substrate, the dry etching method comprising etching, with an etching gas, parts of the silicon layers appearing on an inner surface of the hole or groove, characterized in that the etching gas comprises: at least one kind of gas selected from the group consisting of ClF3, BrF5, BrF3, IF7 and IF5; and F2. It is possible by such a dry etching method to prevent non-uniformity of etching depth between the silicon layers. |
| US09165774B2 |
Semiconductor device and method of manufacturing the same
A semiconductor device includes a plurality of transistors formed over a substrate, a support body including a horizontal portion and protrusions, wherein the horizontal portion covers at least one of the transistors, and the protrusions are formed over the horizontal portion and located between the transistors, and conductive layers and insulating layers alternately stacked over the support body and protruding upwardly along the sidewalls of the protrusions. |
| US09165771B2 |
Pulsed gas plasma doping method and apparatus
A method and apparatus for doping a surface of a substrate with a dopant, with the dopant being for example phosphine or arsine. The doping is performed with a plasma formed primarily of an inert gas such as helium or argon, with a low concentration of the dopant. To provide conformal doping, preferably to form a monolayer of the dopant, the gas flow introduction location is switched during the doping process, with the gas mixture primarily introduced through a center top port in the process chamber during a first period of time followed by introduction of the gas mixture primarily through peripheral or edge injection ports for a second period of time, with the switching continuing in an alternating fashion as the plasma process. |
| US09165767B2 |
Semiconductor structure with increased space and volume between shaped epitaxial structures
A semiconductor structure includes a bulk silicon substrate and one or more silicon fins coupled to the bulk silicon substrate. Stress-inducing material(s), such as silicon, are epitaxially grown on the fins into naturally diamond-shaped structures using a controlled selective epitaxial growth. The diamond shaped structures are subjected to annealing at about 750° C. to about 850° C. to increase an area of (100) surface orientation by reshaping the shaped structures from the annealing. Additional epitaxy is grown on the increased (100) area. Multiple cycles of increasing the area of (100) surface orientation (e.g., by the annealing) and growing additional epitaxy on the increased area are performed to decrease the width of the shaped structures, increasing the space between them to prevent them from merging, while also increasing their volume. |
| US09165765B1 |
Method for patterning differing critical dimensions at sub-resolution scales
Techniques include a plasma oxidation treatment to modify a material to a predetermined thickness around a mandrel or spacer or other structure. This plasma oxidation is then followed by a chemical oxide removal treatment. With only a portion of the structures being oxidized, or by selective masking a portion of oxidized structures, the chemical oxide removal treatment essentially shrinks only a portion of the structures, thereby yielding structures having differing critical dimensions which can function as etch masks to transfer patterns into one or more underlying layers. Accordingly, structures having differing critical dimensions can be fabricated at sub-resolution scales. |
| US09165763B2 |
Coating treatment method
A substrate is rotated at a first rotation number (first step). The rotation of the substrate is decelerated to 1500 rpm that is a second rotation number and the substrate is rotated at the second rotation number for 0.5 seconds (second step). The rotation of the substrate is further decelerated to a third rotation number and the substrate is rotated at the third rotation number (third step). The rotation of the substrate is accelerated to a fourth rotation number and the substrate is rotated at the fourth rotation number (fourth step). A resist solution is continuously supplied to a center portion of the substrate from a middle of the first step to a middle of the third step. |
| US09165762B2 |
Method of depositing silicone dioxide films
A method of forming silicon dioxide films using plasma enhanced chemical vapor deposition (PECVD) uses tetraethyl orthosilicate (TEOS), oxygen or a source of oxygen, and hydrogen as precursors. The method can be carried out at low temperatures in a range of 125 to 175° C. which is useful for manufacturing wafers with through silicon vias. |
| US09165761B2 |
Method for manufacturing semiconductor device, method for processing substrate, substrate processing apparatus and recording medium
There is provided a method for manufacturing a semiconductor device, including forming a thin film containing a specific element and having a prescribed composition on a substrate by alternately performing the following steps prescribed number of times: forming a first layer containing the specific element, nitrogen, and carbon on the substrate by alternately performing prescribed number of times: supplying a first source gas containing the specific element and a halogen-group to the substrate, and supplying a second source gas containing the specific element and an amino-group to the substrate, and forming a second layer by modifying the first layer by supplying a reactive gas different from each of the source gases, to the substrate. |
| US09165760B2 |
Cleaning composition and cleaning method using the same
A cleaning composition is provided. The cleaning composition includes at least one polyamino-polycarboxylic acid or at least one salt thereof, at least one solvent, at least one substituted or non-substituted phenethylamine and water. The solvent is selected from a group consisting of glycols. |
| US09165757B2 |
Stroboscopic device with flash discharge tube having conductive film on outer periphery
A stroboscopic device includes a flash discharge tube with a conductive film on its outer periphery, a conductive reflector into which the flash discharge tube is inserted, and a heat-resistant conductive medium laminated on a part of the conductive film of the flash discharge tube. The reflector is electrically connected to the conductive film of the flash discharge tube via the conductive medium. This achieves the stroboscopic device with long service life and high reliability by preventing or suppressing occurrence of spark. |
| US09165756B2 |
Ultraviolet discharge lamp apparatuses with one or more reflectors
Apparatuses are disclosed which include a discharge lamp configured to emit ultraviolet light, a power circuit configured to operate the discharge lamp, and a reflector system configured to redirect ultraviolet light emitted from the discharge lamp. In some embodiments, the apparatuses include a support structure containing the power circuit and supporting the discharge lamp. In some of such embodiments, the reflector system is configured to redirect ultraviolet light propagating away from the support structure to a region exterior to the apparatus and which is between approximately 2 feet and approximately 4 feet from a floor of a room in which the apparatus is arranged. In other embodiments, the reflector system may be additionally or alternatively configured to redirect ultraviolet light propagating away from the support structure to encircle an exterior surface of the apparatus. In any case, the reflector system may, in some embodiments, include a repositionable reflector. |
| US09165751B1 |
Sample atomization with reduced clogging for analytical instruments
An aerosol is produced by flowing a liquid sample through a gas-assisted nebulizer. The liquid exits from an outlet into a coaxial flow of gas. The outlet includes a sharp edge that inhibits or prevents accumulation of precipitates from the liquid, thereby reducing or eliminating clogging, which is particularly useful for a samples containing high concentrations of dissolved particles. The aerosol may be introduced into a plasma such that molecules are broken into atoms. The atomization may be followed by an analysis such as by optical emission spectrometry or mass spectrometry. |
| US09165750B2 |
High purity copper—manganese alloy sputtering target
A high purity copper-manganese alloy sputtering target containing 0.05 to 20 wt % of Mn and, excluding additive elements, remainder being Cu and unavoidable impurities, wherein the target contains 0.001 to 0.06 wtppm of P and 0.005 to 5 wtppm of S, and further contains Ca and Si, and a total content of P, S, Ca, and Si is 0.01 to 20 wtppm. The incorporation of appropriate amounts of Mn as well as Ca, P, Si, and S in copper improves the machinability that is required in the stage of producing a target to facilitate the manufacture (workability) of the target, improves the smoothness of the target surface, and inhibits the generation of particles during sputtering. Thus, provided is a high purity copper-manganese alloy sputtering target which is particularly useful for improving the yield and reliability of semiconductor products that progress toward miniaturization and integration. |
| US09165749B2 |
Arc source and magnet configuration
The invention relates to an arc source with a target (1) having a target front face (2) for the vacuum vaporization of the target material, a target backside with a cooling plate (4), a central target region (Z) as well as a target margin. The arc source further comprises a magnet configuration (8, 9) with an inner magnet system (8) and/or an outer magnet system (9) for the generation of a magnetic field in the proximity of the target front face. At least one of the magnet systems (8) is herein radially poled and effects alone or in connection with the particular other magnet system that the field lines of the magnetic field extend here substantially parallel to the target front face (2). |
| US09165744B2 |
Apparatus for treating ion beam
An ion beam scanning assembly includes a set of scanning electrodes defining a gap to accept an ion beam and scan the ion beam in a first plane, and a multipole electrostatic lens system comprising a plurality of electrodes arranged along a portion of a path of travel of the ion beam bounded by the pair of scanning electrodes, the multipole electrostatic lens system configured to shape the ion beam in a direction perpendicular to the first plane. |
| US09165739B2 |
Method for manufacturing flat display
According to one embodiment, a method for manufacturing a flat display includes applying a dot-like adhesive coating pattern in a region to be bonded on the surface of one of a display panel and a protective plate after forming a wall pattern along the outer circumference of the region to be bonded. |
| US09165729B2 |
Keyboard device
A keyboard device is located in an accommodating space of a housing having first openings and a second opening. The keyboard device includes a flexible body and a transparent liquid. The flexible body is located in the accommodating space, and includes a main body, first pressing portions, patterns, and a second pressing portion. The first pressing portions are respectively located in the first openings. The patterns are located on the main body or the first pressing portions and are respectively exposed through the first openings. The second pressing portion is located in the second opening. The main body, and the first and second pressing portions have an enclosure space therein. The transparent liquid is located in the enclosure space. When the second pressing portion is pressed, the first pressing portions expand to protrude from the first openings, such that the patterns are enlarged. |
| US09165727B2 |
Power-down electrical locking protection device for underground explosion protection frequency converter
A power-down electrical locking protection device for an underground explosion protection frequency converter comprises a reversing control part and a locking control part. The reversing control part comprises a reversing handle (1), a sector plate (2) of a reversing switch, and an isolated reversing switch (3). The locking control part comprises a locking button (4), a locking positioning plate (5), and an auxiliary control point (6). The reversing handle (1) is fixedly connected to the sector plate (2). The reversing handle (1) is connected to the isolated reversing switch (3). The locking button (4) is fixedly connected to the locking positioning plate (5). The locking button (4) is connected to the auxiliary control point (6). A positioning stud (7) is fixed outside a cupboard door (8). The locking button (4) is electrically connected to a PLC module and a power supply. The isolated reversing switch (3) is connected to a discharge resistor. The power-down electrical locking protection device for an underground explosion protection frequency converter has the following advantages: the discharge time does not need to be calculated manually and the usage is stable and safe. |
| US09165724B2 |
Change-over structure between moving contact and static contact of tap selector
A change-over structure disposed between a moving contact and a static contact of a tap selector includes an insulation changer base plate, static contacts which are fixed on the insulation changer base plate in at least one column at intervals, the inner ends of the static contacts are electrically connected to respective tap windings of a transformer, rotation shafts, each comprising moving contacts that are evenly distributed on each of the rotation shafts and are electrically connected to each other, and arc-shaped conductors corresponding to the static contacts in at least one column. Each of the arc-shaped conductors and outer ends of the static contacts are disposed at the same circumference with a center of one of the rotation shafts as a circle center. When one of the moving contacts is changed over between the two static contacts, another moving contact is electrically connected to the arc-shaped conductor. |
| US09165721B2 |
Inkjet-printed flexible electronic components from graphene oxide
An electrical component includes an inkjet-printed graphene electrode. Graphene oxide flakes are deposited on a substrate in a graphene oxide ink using an inkjet printer. The deposited graphene oxide is thermally reduced to graphene. The electrical properties of the electrode are comparable to those of electrodes made using activated carbon, carbon nanotubes or graphene made by other methods. The electrical properties of the graphene electrodes may be tailored by adding nanoparticles of other materials to the ink to serve as conductivity enhancers, spacers, or to confer pseudocapacitance. Inkjet-printing can be used to make graphene electrodes of a desired thickness in preselected patterns. Inkjet printing can be used to make highly-transparent graphene electrodes. Inkjet-printed graphene electrodes may be used to fabricate double-layer capacitors that store energy by nanoscale charge separation at the electrode-electrolyte interface (i.e., “supercapacitors”). |
| US09165720B2 |
Conductive polymer/porous carbon material composite and electrode material using same
The purpose of the present invention is to provide: an electric double-layer capacitor, a lithium ion secondary battery, and a lithium ion capacitor, each of which has excellent cycle characteristics; an electrode material which is capable of providing the electric double-layer capacitor, the lithium ion secondary battery, and the lithium ion capacitor; and a composite which is used in the electrode material. The composite of the present invention is a composite produced by compositing from 0.5 to 5 parts by mass of nitrogen atom-containing conductive polymer per 100 parts by mass of porous carbon material. The composite of the present invention is a composite where the peak area ratio (nitrogen/carbon ratio) of peak area derived from nitrogen atoms to peak area derived from carbon atoms in the spectrum by X-ray photoelectron spectroscopy becomes 0.005 to 0.05. |
| US09165719B2 |
Method for sealing a liquid within a glass package and the resulting glass package
A method for sealing a liquid within a glass package and the resulting sealed glass package are described herein where the sealed glass package can be, for example, a dye solar cell, an electro-wetting display or an organic emitting light diode (OLED) display. |
| US09165716B2 |
High capacitance single layer capacitor
A high capacitance single layer ceramic capacitor having a ceramic dielectric body containing one or more internal electrodes electrically connected to a metallization layer applied to the side and a top or bottom surface and a metallization pad electrically isolated from the metallization side and the top or bottom surface by a castellation or a via or separated by a dielectric insulating band positioned between the electrodes around the perimeter of the ceramic body and separating the top and bottom surfaces. |
| US09165708B2 |
Thin film coil and electronic device having the same
A thin film coil and an electronic device having the same. The thin film coil includes a substrate; and a coil pattern including a first coil strand and a second coil strand formed respectively on opposite surfaces of the substrate, wherein the first coil strand formed on one surface of the substrate includes at least one path that passes through the other surface of the substrate. |
| US09165707B2 |
Multiphase power converters having shared magnetic core sections
A multiphase power converter includes a plurality of subconverters and a control circuit. Each subconverter has an input circuit, an output circuit, and a magnetic core coupling the input circuit to the output circuit. The magnetic core of at least one of the plurality of subconverters has a core section that is shared by the magnetic core of another one of the plurality of subconverters. The control circuit is configured to operate the input circuits of the plurality of subconverters with different phases. The magnetic cores may be cores of a transformer, a coupled inductor, etc. |
| US09165704B2 |
Superconducting magnet apparatus with cryogen vessel
In a superconducting magnet apparatus, at least one superconducting winding and an outer vacuum chamber are provided. A thermal radiation shield is located between the superconducting winding and the outer vacuum chamber. A cryogen vessel is positioned within the thermal radiation shield and within the outer vacuum chamber. The superconducting winding is positioned outside of the cryogen vessel. A refrigerator is operable to cool the cryogen vessel to a liquid cryogen temperature and to cool the at least one thermal radiation shield to an intermediate temperature between the liquid cryogen temperature and a temperature of the outer vacuum chamber. A substantial portion of an outer surface of the cryogen vessel has a thermal emissivity at the liquid cryogen temperature which is greater than an average surface emissivity of the superconducting winding by at least 0.1. |
| US09165697B2 |
Peroxide crosslinked resin composition and electric wire and cable using same
A peroxide crosslinked resin composition includes a base polymer (A) including 50 to 90% by mass of a first copolymer component (a1) including one of or a mixture of two or more first ethylene α-olefin copolymers having a density of 0.864 to 0.890 g/cm3, a melt flow rate (MFR) of 1 to 5 g/10 min, and a melting point of not higher than 90 degrees Celsius, and 10 to 50% by mass of a second copolymer component (a2) including one of or a mixture of two or more second ethylene α-olefin copolymers having a melt flow rate (MFR) of not smaller than 30 g/10 min, and a melting point of 55 to 80 degrees Celsius, an inorganic filler (B) added in a ratio of from 80 parts to 150 parts by mass with respect to 100 parts by mass of the base polymer (A), and a peroxide crosslinker (C). |
| US09165696B2 |
Transparent electrode laminate
According to one embodiment, the transparent electrode laminate includes a transparent substrate and an electrode layer which is formed on the transparent substrate and includes a three-dimensional network of metal nanowires. The electrode layer includes a first conductive region and a second conductive region adjacent to the first conductive region. Surfaces of the metal nanowires in the first conductive region are reacted to form reaction products. Surfaces of the metal nanowires in the second conductive region are unreacted. The second region has conductivity higher than that of the first conductive region and an optical transparency. |
| US09165695B2 |
Copper alloy wire and method for producing the same
The zirconium content of the alloy composition of a copper alloy wire is 3.0 to 7.0 atomic percent; and the copper alloy wire includes copper matrix phases and composite phases composed of copper-zirconium compound phases and copper phases. The copper matrix phases and the composite phases form a matrix phase-composite phase fibrous structure and are arranged alternately parallel to an axial direction as viewed in a cross-section parallel to the axial direction and including a central axis. The copper-zirconium compound phases and the copper phases in the composite phases also form a composite phase inner fibrous structure and are arranged alternately parallel to the axial direction at a phase pitch of 50 nm or less as viewed in the above cross-section. This double fibrous structure presumably makes the copper alloy wire densely fibrous to provide a strengthening mechanism similar to the rule of mixture for fiber-reinforced composite materials. |
| US09165694B2 |
Nanowire apparatuses and methods
Aspects of the present disclosure are directed to apparatuses and methods involving nanowires having junctions therebetween. As consistent with one or more embodiments, an apparatus includes first and second sets of nanowires, in which the second set overlaps the first set. The apparatus further includes a plurality of nanowire joining recrystallization junctions, each junction including material from a nanowire of the first set that is recrystallized into an overlapping nanowire of the second set. |
| US09165679B2 |
Post package repairing method, method of preventing multiple activation of spare word lines, and semiconductor memory device including fuse programming circuit
Provided is a method of preventing simultaneous activation of redundancy memory line or spare word lines, the method including: programming a fail address of a memory line determined to be defective; reprogramming the fail address if a first spare line for the memory line is determined to be defective; storing additional information with respect to the reprogrammed fail address; and activating a second spare line and inactivating the first spare line, referring to the additional information. |
| US09165676B2 |
Shift register, driving method thereof and flat panel display device
A shift register includes a plurality of stages each having a pull-up transistor, a pull-down transistor and a flip-flop, the plurality of stages outputting high level output voltages sequentially for one horizontal period in response to at least one clock signal and a start signal, and an AH control circuit connected to input terminals and output terminals of the plurality of stages to control output signals of all the stages into a high level for one frame. |
| US09165655B2 |
Nonvolatile semiconductor memory device
A nonvolatile semiconductor memory device comprises multiple memory strings each including a plurality of first and second groups of serially connected memory cells, and a back gate transistor serially connected between the first and second groups of memory cells, a plurality of word lines, each word line being connected to a control gate of a different memory cell in each of the memory strings, a voltage generating circuit configured to generate control voltages of different voltage levels, and a control circuit configured to control application of control voltages to the word lines and the back gate line. A control voltage applied to the back gate line may be varied depending on how far a selected word line is from the back gate line, and a control voltage applied to unselected word lines may be varied depending on how far the unselected word line is from the selected word line. |
| US09165653B2 |
Determining sector status in a memory device
The present disclosure includes methods, devices, modules, and systems for operating semiconductor memory. A number of method embodiments include reading data from memory cells corresponding to a sector of data, determining a number of the memory cells in a non-erased state, and, if the number of the memory cells in a non-erased state is less than or equal to a number of errors correctable by an ECC engine, determining the sector is erased. |
| US09165651B2 |
Nonvolatile semiconductor memory device and control method thereof
A nonvolatile semiconductor memory device includes a memory cell array having first and second groups of memory strings, each memory string including first and second memory cells connected between select transistors. The nonvolatile semiconductor memory device further includes a first word line connected to the first memory cells of the memory strings, a second word line connected to the second memory cells of the memory strings, and a control unit configured to control application of control voltages to the select transistors and the word lines, such that a select line voltage is applied to the first word line and a non-select line voltage is applied to the second word line and not discharged while select transistors of the first group of memory strings are turned off and select transistors of the second group of memory strings are turned on. |
| US09165649B2 |
Systems and methods of shaping data
A method of shaping data includes receiving data represented as a first set of bits, where each bit of the first set of bits corresponds to a logical value. A first write current to write a first logical value to a storage element is less than a second write current to write a second logical value to the storage element. The method also includes applying a shaping operation to generate a second set of bits, where a proportion of bits having the first logical value is larger for the second set of bits than for the first set of bits. The method also includes writing the second set of bits to the memory. |
| US09165648B1 |
Resistive memory devices, circuits and methods having read current limiting
A memory device, comprising: read circuits coupled to a plurality of memory elements programmable between at least two different resistance states, the read circuits generating output values based on resistance states of selected memory elements in a read operation; and current limit circuits that limit a current flow through each memory element to less than a program threshold current; wherein the program threshold current corresponds to a current that flows through a memory element being programmed to cause its resistance to change to a resistance between that of two different resistance states. |
| US09165637B2 |
Volatile memory device and a memory controller
A method of operating a volatile memory device includes storing address information of weak cell rows. According to some examples, after writing to a weak cell row, a refresh operation is performed on the weak cell row within a predetermined time. According to some examples, the writing operation to a weak cell row may be performed with a longer write recovery time than a write recovery time to normal cell rows. |
| US09165633B2 |
Carbon nanotube memory cell with enhanced current control
A desired current through a carbon nano tube (CNT) element of a CNT memory device can be controlled by a wordline voltage, and a voltage on the CNT common node can be held constant. The common node can be constant at a source voltage if a p-channel metal-oxide-semiconductor field-effect transistor (MOSFET) is used in the CNT memory device, or the common node can be constant at a supply voltage if an n-channel MOSFET is used in the CNT memory device. |
| US09165626B2 |
Self-reference magnetic random access memory (MRAM) cell comprising ferrimagnetic layers
MRAM cell comprising a magnetic tunnel junction comprising a storage layer having a net storage magnetization being adjustable when the magnetic tunnel junction is at a high temperature threshold and being pinned at a low temperature threshold; a sense layer having a reversible sense magnetization; and a tunnel barrier layer between the sense and storage layers; at least one of the storage and sense layer comprising a ferrimagnetic 3d-4f amorphous alloy material comprising a sub-lattice of 3d transition metals atoms providing a first magnetization and a sub-lattice of 4f rare-earth atoms providing a second magnetization, such that at a compensation temperature of said at least one of the storage layer and the sense layer, the first magnetization and the second magnetization are substantially equal. The disclosed MRAM cell can be written and read using a small writing and reading field, respectively. |
| US09165624B2 |
Semiconductor integrated circuit with switch to select single or multiple chips
A semiconductor integrated circuit includes: a first interface block configured to transmit and receive signals within the same chip; a second interface block configured to transmit and receive signals to and from different semiconductor chips; and a switching block configured to select a signal path in which the signal transmission and reception of the first interface block is not performed through the second interface block, in response to a chip structure signal. |
| US09165622B2 |
Address detection circuit and memory device including the same
An address detection circuit may include one or more address storage units, an initialization unit suitable for deleting an address stored in an address storage unit having a value greater than N, wherein the value is obtained by dividing a respective total input number that addresses have been inputted after the corresponding address is stored by a respective input number corresponding to the stored address, a detection unit suitable for detecting an address having an input number that is a reference number or more from the addresses stored in the one or more address storage units, and a selection unit suitable for selecting an address storage unit in which an address is not stored and storing an input address in the selected address storage unit. |
| US09165618B2 |
Semiconductor memory device for conducting monitoring operation to verify read and write operations
A semiconductor memory device includes, in part, a first data I/O block and a second data I/O block. During a write operation, the first data I/O block transmits input data supplied through a first pad to a first global I/O line, and further generates a write internal signal. The second data I/O block transmits the write internal signal to a second pad in response to a monitor enable signal. During a read operation, the first data I/O block supplies data from the first global I/O line to a first pad, and further generates a read internal signal. The second data I/O block transmits the read internal signal to the second pad in response to a monitor enable signal. |
| US09165613B2 |
Sample-and-hold current sense amplifier and related method
A device includes an amplifier and a first switched current sampler. The first switched current sampler includes a first transistor, a first capacitor, and first, second, and third switches. The first capacitor has a first terminal electrically connected to a gate electrode of the first transistor, and a second terminal electrically connected to a source electrode of the first transistor. The first switch has a first terminal electrically connected to a first current source, and a second terminal electrically connected to the gate electrode of the first transistor. The second switch has a first terminal electrically connected to the first current source, and a second terminal electrically connected to a drain electrode of the first transistor. The third switch has a first terminal electrically connected to the drain electrode of the first transistor, and a second terminal electrically connected to a first input terminal of the amplifier. |
| US09165611B2 |
Wiring structures for three-dimensional semiconductor devices
Wiring structures of three-dimensional semiconductor devices and methods of forming the same are provided. The wiring structures may include an upper wordline and a lower wordline, each of which extends in a longitudinal direction. The upper wordline may include a recessed portion that extends for only a portion of the upper wordline in a transverse direction and the lower wordline may include a wiring area exposed by the recessed portion of the upper wordline. The wiring structures may also include an upper contact plug contacting the upper wordline and a lower contact plug contacting the wiring area. The upper and lower contact plugs may extend in a vertical direction. |
| US09165607B2 |
Mounting structure for component of electronic device
A portable electronic device having an outer housing, a component, and a shock-absorption assembly is disclosed. A shock-absorption assembly located within the outer housing and coupled to the component can include one or more elements adapted to dampen a mechanical shock to the component. The shock-absorption assembly elements can be mounted to corners and/or edges of the component. Shock-absorption assembly elements can include a first portion comprising protrusions that provide initial damping of the mechanical shock and a second portion comprising an elastic block that provides final damping of the mechanical shock. |
| US09165606B2 |
Electronic device
An electronic device includes a housing with a carrier therein. The carrier includes a recess with a restricting portion therein. An access unit is disposed in the recess. An elastic member is connected to the access unit and engaged with the restricting portion to restrict the access unit in the recess. A fixed member is connected to the access unit. A movable member is movably disposed on the carrier, including a first contact portion and a second contact portion. When an external force is exerted on the movable member along a first direction, the first contact portion pushes the elastic member along the first direction to deform and separate from the restricting portion, and the second contact portion pushes the fixed member to move along a second direction perpendicular to the first direction, such that the access unit can be removed from the housing. |
| US09165605B1 |
System and method for personal floating video
Systems and methods for providing a user with a floating video of a subject are provided. The systems and methods generate a floating video by removing background pixels of a primary video using a background image/video, where the user records the primary video and the background image/video. The floating video may be generated on a recording device of the user and/or a remote server. Further, the user and/or the remote server may host the floating video. |
| US09165603B2 |
Method and apparatus for grouping video tracks in a video editing timeline
A method and apparatus for grouping video tracks in a video editing timeline comprises displaying a plurality of video tracks in a video editing timeline; receiving a selection of video tracks to be grouped from the plurality of video tracks that are displayed; displaying the video tracks selected for grouping as a single video track in the video editing timeline; and applying an indicator identifying the video tracks as grouped in the video editing timeline. |
| US09165602B2 |
Information storage medium storing multi-angle data and method and apparatus for reproducing the multi-angle data
An apparatus and method for reproducing multi-angle data in a seamless manner, even during a change of angle, and an information storage medium on which the multi-angle data is recorded. AV data divided into clips, which are recording units, is recorded on the information storage medium. Additional information regarding jump points is recorded on a space of the information storage medium other than where the clips are recorded. The apparatus for reproducing the multi-angle data includes a reading unit which reads data from the information storage medium, and a reproducing unit which reproduces the data read by the reading unit by searching for and reproducing clips corresponding to the read data when the read data is multi-angle data, and, if there is an angle change command, reproducing clips for a new angle from a jump point of the clip for the new angle. |
| US09165600B2 |
High density timing based servo format
A product according to one embodiment includes a magnetic recording tape having opposite ends and at least one servo track, a longitudinal axis of the magnetic recording tape being defined between the ends. The at least one servo track has a plurality of first magnetic bars and a plurality of second magnetic bars. A width of each of the at least one servo track is defined in a direction perpendicular to the longitudinal axis of the magnetic recording tape between sides of the servo track, the sides of each servo track extending along ends of the first magnetic bars. Lengths of the second magnetic bars between outermost ends thereof are less than the width of the associated servo track. |
| US09165596B1 |
Magnetic recording disk drive with multiple preamplifiers and common transmission line with impedance compensation
A disk drive has multiple preamplifiers (preamps) connected to the system-on-a-chip (SOC) by a common transmission line with resistors between the preamps and the SOC. Each preamp includes a read resistor at the output of each read amplifier, and a write resistor at the input of each write driver. The resistors may be programmable resistors located in the preamps. The read resistors are at the source of the signal to the transmission line and the write resistors are at the termination of the signal from the transmission line. The read and write resistors provide impendence matching with the transmission line and the SOC when one of the preamps is selected as active, which enables the SOC to operate seamlessly with a common transmission line connected to all preamps. |
| US09165594B2 |
Spindle motor and disk drive apparatus
A spindle motor includes a stationary portion with a shaft, a circular plate portion, a wall portion, and a plate portion. The plate portion has a flat plate portion and an annular convex portion. The sleeve includes an annular portion, an outer side cylindrical portion, and an inner side cylindrical portion. The inner side cylindrical portion and an upper radial dynamic pressure groove array are superimposed in a radial direction. The upper radial dynamic pressure groove array includes a plurality of upper spiral grooves that is inclined in one direction with respect to an axial direction and a plurality of lower spiral grooves that is inclined in another direction opposite to the one direction. A lower end of the upper spiral grooves is positioned farther on an upper side than an upper surface of the annular portion. |
| US09165589B1 |
Voice coil motor with lateral attraction force
A voice coil motor with a lateral attraction force comprising a magnetic device, a lens carrier, a base, a plurality of guide posts, a set of surface coil and a guiding magnetic plate. The first contact structure and the second contact structure of the magnetic device are contacted the plurality of guide posts respectively. There is at least one contacting point between the first contact structure and one of the plurality of guide posts, and there are at least two contacting point between the second contact structure and the other of the plurality of guide posts. |
| US09165587B2 |
System and method for dual-sided sputter etch of substrates
A system is provided for etching patterned media disks. A movable electrode is utilized to perform sputter etch. The electrode moves to near or at slight contact to the substrate so as to couple RF energy to the disk. The material to be etched may be metal, e.g., Co/Pt/Cr or similar metals. The substrate is held vertically in a carrier and both sides are etched serially. That is, one side is etched in one chamber and then in the next chamber the second side is etched. An isolation valve is disposed between the two chambers and the disk carrier moves the disks between the chambers. The carrier may be a linear drive carrier, using, e.g., magnetized wheels and linear motors. |
| US09165583B1 |
Data storage device adjusting seek profile based on seek length when ending track is near ramp
A data storage device is disclosed comprising a head actuated over a disk comprising a plurality of tracks, and a load/unload ramp. When seeking the head a seek length from a starting track to an ending track, control circuit is configured to adjust a seek profile when the seek length is greater than a first threshold and the ending track is within a second threshold of the load/unload ramp. |
| US09165582B1 |
Thermal assisted magnetic recording head utilizing uncoupled light
A thermal assisted magnetic recording head has a magnetic head slider having an air bearing surface that is opposite to a magnetic recording medium, a core that can propagate laser light as propagating light, a plasmon generator that includes a generator front end surface facing the air bearing surface, and a main pole facing the air bearing surface, and a laser light generator that supplies the laser light to the core. The plasmon generator generates near-field light (NF light) at the generator front end surface to heat the magnetic recording medium. The main pole includes a main pole end surface that faces the air bearing surface and that is positioned in the vicinity of the generator front end surface, and emits a magnetic flux to the magnetic recording medium from the main pole end surface. At least a portion of the laser light that is not coupled with the plasmon generator thermally deforms the air bearing surface so that a part of the air bearing surface positioned closer to the leading side than the generator front end surface and the main pole end surface in the down track direction protrudes toward the magnetic recording medium. |
| US09165580B2 |
Disk drive head suspension tail with stiffened edge alignment features
A head gimbal assembly for a disk drive includes a flexure tail terminal region having flexure bond pads in electrical communication with the head. Each of the flexure bond pads includes a widened region of a corresponding one of a plurality of electrical traces in a conductive layer, and a discontinuous bond pad backing island in a structural layer that overlaps the widened region. The flexure tail terminal region also includes a plurality of discontinuous edge stiffener islands in the structural layer that do not overlap the widened region of any flexure bond pad, and that are disposed no more than 50 microns from one of the two opposing longitudinal outer edges of the flexure tail terminal region. At least one of the plurality of discontinuous bond pad backing islands is disposed no more than 50 microns from one of the two opposing longitudinal outer edges. |
| US09165578B2 |
Swage mount for hard disk drives
A swage mount is provided for attaching a head suspension assembly to a head actuator arm for a hard disk drive. The swage mount has a flange body with a thickness for providing clearance from the underlying disk. The swage mount may have a tip for in-plane movement. The tip may be ‘T’ shaped. The tip has a thickness that is greater than the thickness of the flange body for withstanding out-of-plane loads and for enhancing performance of the hard disk drive, for example, during reading/writing of data using the head. Mass properties of the swage mount, the twisting/bending yield load, modal frequency responses, and other performance metrics are analyzed to design the dimensions of the swage mount having favorable in-plane compliance and superior out-of-plane robustness. |
| US09165575B2 |
Side shield reader with a shield exciting coil
In one embodiment, an apparatus includes at least one read head, each read head including a magnetoresistive (MR) read element, having a lower shield layer, an underlayer positioned above the lower shield layer, an antiferromagnetic (AFM) layer positioned above the underlayer, a magnetization pinned layer positioned above the AFM layer, an insulating layer positioned above the magnetization pinned layer, and a magnetization free layer positioned above the insulating layer, magnetic side shields positioned on both sides of the MR read element in a cross-track direction, and at least one shield excitation coil configured to excite magnetization of the side shields. In another embodiment, a method for forming a read sensor includes forming a MR read element, forming magnetic side shields on both sides of the MR read element in a cross-track direction, and forming at least one shield excitation coil configured to excite magnetization of the side shields. |
| US09165573B1 |
Method for controlling camber on air bearing surface of a slider
A method of a parting a slider from a slider bar is disclosed. The method includes receiving a slider bar comprising a plurality of sliders and having an air bearing surface (ABS) side and a back side opposite to the ABS side and parting at least one slider from the slider bar with a cutter, wherein the cutter enters the slider bar at least in part on the backside and exits the slider bar at least in part on the ABS side and the ABS side is facing away from the cutting direction by a predetermined acute angle. |
| US09165572B2 |
Head gimbals assembly, method for manufacturing thermal-assisted magnetic recording and manufacturing equipment of thermal-assisted magnetic recording
Embodiments of the present invention generally relate to a HAMR head. The HAMR head includes an anti-reflecting (AR) coating on a side opposite (e.g., a flex side) of the air bearing surface (ABS). The anti-reflective coating may include one or more anti-reflective layers. The anti-reflective coating reduces the amount of light reflected back towards a light source unit. A shading layer may be disposed on the anti-reflective coating and may function as a contact electrode as well as reducing stray light escaping from the laser, thus reducing the amount of stray light reaching the ABS. |
| US09165567B2 |
Systems, methods, and apparatus for speech feature detection
Implementations and applications are disclosed for detection of a transition in a voice activity state of an audio signal, based on a change in energy that is consistent in time across a range of frequencies of the signal. For example, such detection may be based on a time derivative of energy for each of a number of different frequency components of the signal. |
| US09165566B2 |
Indefinite speech inputs
Embodiments are disclosed that relate to the use of speech inputs including indefinite quantitative terms as computing device inputs. For example, one disclosed embodiment provides a method of operating a computing device, the method including receiving a speech input comprising an indefinite quantitative term, determining a definite quantity corresponding to the indefinite quantitative term, and applying the definite quantity to an action performed via the computing device in response to the speech input. |
| US09165560B2 |
Methods for watermarking media data
Methods are provided for encoding watermark information into media data containing a series of digital samples in a sample domain. The methods involves: dividing the series of digital samples into a plurality of sections in the sample domain, each section comprising a corresponding plurality of samples; processing the corresponding plurality of samples in each section to obtain a single energy value associated with each section; grouping the sections into groups, each group containing three or more sections; for each group, assigning a nominal bit value according to a bit assignment rule, assigning a watermark bit value and comparing the watermark bit value to the nominal bit value. If the nominal bit value and the watermark bit value do not match, modifying one or more energy values of one or more corresponding sections in the group where re-application of the bit assignment rule would assign the watermark bit value to the group. |
| US09165559B2 |
Method and apparatus for frequency domain watermark processing a multi-channel audio signal in real-time
Digital audio signal watermarking in real-time is difficult in an environment that has limited processing power. According to the invention, the channels in a data block-based audio multi-channel signal are prioritized with respect to watermarking importance, whereby the channel priority can change for different input signal data blocks. For a current input signal block, the most important channel is watermarked and the required processing time is determined. If this required processing time is shorter than a predefined application-dependent threshold, the next most important channel is marked and the additionally required processing time is determined, and so on. Due to the block-based nature of the audio watermarking including block overlap/add and due to the sensitivity of the resulting audio quality against blocking artifacts, several problems are solved in order to lead to acceptable performance and quality. |
| US09165554B2 |
System and method for robust access and entry to large structured data using voice form-filling
A method, apparatus and machine-readable medium are provided. A phonotactic grammar is utilized to perform speech recognition on received speech and to generate a phoneme lattice. A document shortlist is generated based on using the phoneme lattice to query an index. A grammar is generated from the document shortlist. Data for each of at least one input field is identified based on the received speech and the generated grammar. |
| US09165547B2 |
Localization of a wireless user equipment (UE) device based on audio masking
A scheme for localizing a wireless user equipment (UE) device's relative position with respect to a spatial configuration based on audio signatures received via a multi-channel audio system, e.g., an audio system of a vehicle or home entertainment system. The wireless UE device is configured to capture the audio signatures masked within a background audio signal received from a head unit. The wireless UE device includes a persistent memory module having program instructions for processing the background audio signal including the masked signatures, which may comprise either channel-specific pseudo-random noise (PN) sequences or single-frequency tones, in order to compute time delays or power levels associated with the speaker channels. A localization module is configured to estimate the wireless UE device's relative position based on the time delays or power levels. |
| US09165545B2 |
Pickup for stringed instrument
A pickup for engagement to the body of an instrument having metal strings, such as a guitar in position proximate to the strings. The pickup features a coil having loops of wire wound around a recess having a magnetic member therein which projects a magnetic field to magnetize the strings. The electrical current in said coil wire induced by a movement the strings generates a first electrical signal from said first end of the coil wire and corresponding AC second electric signal from said second end of the coil wire. One or a plurality of tap wires engaged to the coil wire at tap points, provide additional individual electronic signals which may be mixed, or may be communicated individually to an amplifier or mixing component. |
| US09165544B2 |
Electronic cymbal
An electronic cymbal, comprising: an annular portion in an annular shape having predetermined rigidity; a central portion having predetermined rigidity, located on an inner circumferential side of the annular portion and configured separately from the annular portion; a sensor portion comprising a first sensor that detects displacement of the central portion; a support supporting the sensor portion while swingably maintaining the central portion; and an interposed member formed of a film, installed between a lower surface of the central portion and the sensor portion while elastically deformably supported by the support, wherein by displacing the central portion from a motionless state, the sensor portion is pressed by an outer circumferential part of the central portion via the interposed member. |
| US09165539B2 |
Multiple contiguous closed-chambered monolithic structure guitar body
A chambered electric guitar body according to an illustrative embodiment of the present invention includes at least five contiguous closed chambers enclosed in the assembled monolithic top and bottom parts comprised of a generally solid material such as a metal. The autonomous dimensions of the chambers, cubic volumes, and thickness as well as the density of the material, allow customization of shape and guitar performance. This is accomplished by using the method provided to produce the monolithic structures using digital technology, CAD and CNC machining to achieve desired specifications. |
| US09165531B2 |
System for detecting display driver error when failing to receive a synchronization signal and method thereof
A system performs a method for detecting display driver error. The method includes sending a first command signal to a display driver to operate according to a first operating state that includes the display driver sending a synchronization signal, and monitoring for the synchronization signal during a first time period after sending the first command signal. The method further includes sending a second command signal to the display driver to operate according to a second operating state that includes the display driver withholding sending the synchronization signal, and monitoring for the synchronization signal during a second time period after sending the second command signal. In addition, the method includes detecting a display driver error based on results of the monitoring during at least one of the first or the second time periods. |
| US09165530B2 |
Three-dimensional image display apparatus
A signal processor converts an input 3D image signal into a signal in which a left-eye signal and right-eye signal are rearranged temporally alternately. A driver of a liquid crystal display element includes a sub-frame data generator configuring all the sub-frames with step bit pulses and generating sub-frame data by using a drive gradation table in which the last sub-frame reaches a drive state when a drive gradation is “1” and the number of sub-frames reaching the drive state is increased one by one toward ahead of a sub-frame which has already reached the drive state, every time the drive gradation is increased by one. The liquid crystal display element is driven by the driver. An illumination optical system causes illumination light to enter into the liquid crystal display element. A projection lens projects modulated light emitted from the liquid crystal display element. |
| US09165529B2 |
Stereoscopic image display apparatus and a stereoscopic image display system having the same
A stereoscopic image display system includes a three-dimensional (3D) image signal generator, a display panel, a timing controller, a data driver, and a gate driver. The 3D image signal generator generates left-eye data and right-eye data on the basis of an image signal outputs the left-eye data and the right-eye data to the timing controller. The timing controller outputs the left-eye data and the right-eye data having a first frequency to the data driver in a first mode and outputs left-eye frame data and right-eye frame data having a second frequency to the data driver in a second mode. Two pixels, which are respectively connected to an i-th gate line and an (i+1)th gate line among the gate lines and to a same data line among the data lines, are operated with the same driving time in the first and second modes. |
| US09165528B2 |
Display systems for reducing power consumption and methods for driving the same
A display system may include a system board configured to compare image signals of a current and previous frame and configured to output the image signals of the current frame and a comparison result; a display panel configured to receive data signals in response to gate signals and configured to include pixels for displaying images corresponding to the data signals; a timing controller configured to output image signals and control signals; a gate driving unit configured to provide the gate signals to the pixels in response to the control signals; and/or a data driving unit configured to store the image signals provided from the timing controller and configured to convert the image signals into the data signals in response to the control signals, the data signals being provided to the pixels. |
| US09165527B2 |
System for display of images using extended greyscale bit-depth on standard display devices
A system enhances reduced resolution grey scale luminance data for display on a monitor. An interface receives a pixel grey scale luminance value represented by a first number of bits exceeding a display monitor input bit length. A data processor indicates a difference comprising the number of bits. In response to the difference, the data processor derives R, G, B pixel luminance values by adjusting one or more of the R, G, B pixel luminance values to provide corrected R, G, B pixel luminance values representing the grey scale luminance value and at least one of the corrected R, G, B pixel luminance values is different from remaining ones of R, G, B pixel luminance values. The data processor outputs the corrected R, G, B pixel luminance values for display on R, G, B channels of the monitor. |
| US09165526B2 |
Subpixel arrangements of displays and method for rendering the same
An apparatus including a display and control logic is provided. In one example, the display includes an array of subpixels having a subpixel repeating group tiled across the display in a regular pattern. The subpixel repeating group comprises n rows of subpixels and n columns of subpixels. Each row of the subpixel repeating group comprises n types of subpixels. Each column of the subpixel repeating group comprises the n types of subpixels. Subpixels along each diagonal direction of the subpixel repeating group comprise at least two types of the n types of subpixels. The control logic is operatively coupled to the display and is configured to receive display data and render the display data into control signals for driving the array of subpixels of the display. |
| US09165524B2 |
Display device and driving method thereof
A display device prevents breakage due to overheating of a data driver and a signal controller. The display device includes a display panel including a plurality of gate lines, a plurality of data lines and pixels connected to the gate lines and the data lines. A gate driver supplies a gate signal to the gate lines. A data driver supplies a data signal to the data lines. A signal controller controls the gate signal and the data signal. The signal controller includes a data converter converting a gray value of image data when a difference in the gray value of the image data of two adjacent pixels connected to the same data line among the plurality of data lines is greater than or equal to a first threshold value. |
| US09165522B2 |
Method for pixel gradation extension, drive method and apparatus for charging time of pixel capacitance
The present invention relates to a method of extending a pixel gray scale. The secondary gray scale levels with different charging times and the same gray scale voltage are formed by controlling a charging time of the gray scale voltage of every primary gray scale level and refining the level, wherein, the gray scale voltage of the every secondary gray scale level is the same as that of the corresponding primary gray scale level, and its charging time corresponds to the secondary gray scale level. The primary gray scale level of the display pixel of the liquid crystal panel is extended by using this method and the disadvantage of the imperfect display brought forward by the control method using frame rate in the prior art is overcome. The present invention further provides a drive method of controlling the pixel charging time and a drive apparatus thereof, which realizes the pixel gray scale extension by controlling the charging time of the pixel capacitance. It overcomes the disadvantage that a grid strip may be formed visually using the characteristic of the visual retention and the visual inertia of the human eyes while largely increasing the number of colors that can be displayed. |
| US09165521B2 |
Field sequential liquid crystal display device and driving method thereof
To improve the image quality of a liquid crystal display device. In the liquid crystal display device, writing of an image signal and the turning on the backlights are not sequentially performed in the entire pixel portion but are sequentially performed per specific region of the pixel portion. Thus, it is possible to increase the frequency of input of an image signal to each pixel of the liquid crystal display device. Accordingly, deterioration of display such as color break generated in the liquid crystal display device can be suppressed, and the image quality can be improved. |
| US09165512B2 |
Method for reducing double images
A method for reducing double images of a frame is disclosed. The frame is divided into a plurality of regions. The method includes generating a plurality of output enable (OE) signals, which are utilized to respectively adjust a plurality of conduction durations of a plurality of gate lines of the corresponding regions. The OE signals are outputted to a gate driver for generating a plurality of scan signals of the corresponding regions. The gate lines, which correspond to the regions, are driven by the gate driver according to the scan signals. |
| US09165508B2 |
Display apparatus using reference voltage line for parasitic capacitance, electronic apparatus using the display apparatus and driving method of the display apparatus
A display apparatus includes: a plurality of pixel circuits 6; a reference voltage source for supplying a reference voltage to a reference voltage line 4; a first switch for connecting the reference voltage source to the reference voltage line 4; a data line 5 for supplying a data voltage to the pixel circuit, wherein the pixel circuit 6 includes a light emitting element, a driving transistor M1 having a source connected to an anode of the light emitting element, a holding capacitor CS having one end connected to a gate of the driving transistor M1 and having the other end connected to the source of the driving transistor M1, a second switch for connecting the gate of the driving transistor M1 to the data line 5, and a third switch for connecting the source of the driving transistor M1 to the reference voltage line 4. |
| US09165502B2 |
Display device and electronic device including display device
Objects are to provide a display device the power consumption of which is reduced, to provide a self-luminous display device the power consumption of which is reduced and which is capable of long-term use in a dark place. A circuit is formed using a thin film transistor in which a highly-purified oxide semiconductor is used and a pixel can keep a certain state (a state in which a video signal has been written). As a result, even in the case of displaying a still image, stable operation is easily performed. In addition, an operation interval of a driver circuit can be extended, which results in a reduction in power consumption of a display device. Moreover, a light-storing material is used in a pixel portion of a self-luminous display device to store light, whereby the display device can be used in a dark place for a long time. |
| US09165500B2 |
Pixel circuit, organic light emitting display device, and method of driving the pixel circuit
A pixel circuit includes an OLED having a cathode coupled to a power source voltage, a first transistor having a second electrode coupled to an anode of the OLED, and a gate electrode coupled to a gate control-line, a second transistor having a second electrode coupled to a first electrode of the first transistor, a third transistor having a first electrode coupled to another power source voltage, a second electrode coupled to a first electrode of the second transistor, and a gate electrode coupled to a gate control-line, a fourth transistor having a first electrode coupled to a gate electrode of the second transistor, a second electrode coupled to the anode of the OLED, and a gate electrode coupled to a scan-line, and a capacitor coupled between the gate electrode of the second transistor and the second electrode of the third transistor. |
| US09165498B2 |
Organic light emitting display and power supply for the same
An organic light emitting diode (OLED) display including: a display unit including pixels; and a power supply unit including: an output terminal; a reference terminal having an insulated output; and a bias circuit generating a first power source voltage from a received input voltage and supplying a second power source voltage to the reference terminal wherein the first power source voltage and the second power source voltage are voltages driving the plurality of pixels, wherein the bias circuit supplies the second power source voltage to the reference terminal and the plurality of pixels and is referenced to a ground voltage, and wherein a current flowing to the pixels flows to the reference terminal. In the OLED display, one power supply may be used as a power supply powering electroluminescence (EL), and thereby a cost of the OLED display may be reduced and a power efficiency may be improved. |
| US09165495B2 |
Crosstalk compensation method and display apparatus using the same
The present disclosure provides a crosstalk compensation method and a display apparatus using the same. The method includes: configuring a compensation range with the compensation range set between the maximum gray level and the minimum gray level; establishing a look-up table to record compensation values for each gray level in the compensation range; determining whether the gray level of a first color sub-pixel on the display panel is set within the compensating range. When it is determined that the gray level of the first color sub-pixel is set within the compensation range selects a compensating value for configuring an initial gray level of an adjacent second color sub-pixel to a correction gray level. When it is determined that the gray level of the first color sub-pixel is set outside the compensation range, maintains the gray level of the second color sub-pixel at the initial gray level. |
| US09165491B2 |
Display device having multiple viewing zones and converting horizontally-arranged RGB subpixel data for output on square-shaped vertically-arranged RGB subpixels
A display device having multiple viewing zones includes a display panel including a plurality of pixels in a matrix form, each pixel including red, green and blue sub-pixels arranged in a vertical direction; and a light guide panel guiding a first image emitted from the pixels in first columns among the plurality of pixels to a first viewing zone and a second image emitted from the pixels in second columns among the plurality of pixels to a second viewing zone, wherein the first column is adjacent to the second column. |
| US09165488B1 |
Support device for a post
A support device for a hollow traffic marker utilizing a base having a foot positioned at the ground surface. A boss extends from the base and includes a cavity. A first spacer is held within the boss cavity by a fastener. A flexible sleeve positioned over the outer surface of the boss a hollow traffic marker connected to a second spacer by a fastener lies within the flexible sleeve. A gap within the flexible sleeve separates the first and second spacers. |
| US09165487B2 |
LED backlight system for cabinet sign
A backlighting system for a cabinet sign may include a plurality of panels. Each panel includes a plurality of light emitting diodes (“LEDs”) attached to the panel. The diode has a box sign depth factor of less than about 1.4. An integrated circuit may also be located on the panel. A wire physically connects adjacent panels. |
| US09165486B2 |
Back plate for use with a backlight module, a backlight module using the same, and the manufacturing method thereof
A back plate for use with a backlight module, a backlight module using the same, and the manufacturing method thereof are provided. The back plate includes a plate body and a side wall. The side wall extends out from the edge of the plate body and includes a wall body and a bending part, wherein the thickness of the wall body is less or equal to 0.12 mm. The bending part is formed by bending a plurality of bending sheets outward from the top of the wall body, wherein the thickness of each bending sheet is less or equal to 0.12 mm. The backlight module includes the back plate and a light source module, wherein the light source module is disposed on the plate body and adjacent to the inner side of the side wall. |
| US09165484B2 |
Multi-symbol indication apparatus
A multi-symbol indication apparatus, may include a plurality of light sources, each of the light sources emitting light of a single color, a plurality of filter units, each of the filter units installed above the light sources with different height each other and reflecting light of the single color corresponding to the relevant light source, wherein a symbol may be carved on each of the filter units, and a display cover installed above the filter units. |
| US09165474B1 |
System and method for limiting computer usage
The present invention involves a system and method for limiting access to computers by an individual; and a system and method for rewarding an individual with computer access. |
| US09165470B2 |
Autonomous convoying technique for vehicles
A method of autonomously convoying vehicles traveling along a route with a leader vehicle being in communication with at least one follower vehicle. The at least one follower vehicle receives a communication relating to a target offset position and route data. Tracking data is generated and derived from on-board sensing devices of the at least one follower vehicle that includes a traveled path of the leader vehicle sensed by the at least one follower vehicle. The route data is compared to the tracking data for identifying accuracy between the route data relative to the tracking data. An adjusted target offset position and a set of trajectory points that provides a trajectory path of travel from a current position of the at least one follower vehicle to the adjusted target offset position are determined based on the accuracy between the route data and the tracking data. |
| US09165469B2 |
Systems and methods for coordinating sensor operation for collision detection
A collision detection system of a land vehicle may be configured to coordinate sensor operation with one or more other sensing systems of one or more other land vehicles. The coordination may comprise configuring the other sensing systems. In some embodiments, the coordination comprises forming a multistatic sensor comprising one or more emitters and/or one or more receivers. The collision detection system may be configured to receive detection signal(s) emitted by one or more of the other sensing systems. The coordination may further comprise directing detection signals of the multistatic sensor. The collision detection system may use sensor data acquired by use of the coordinated sensing system(s) to generate a collision detection model. |
| US09165459B2 |
Radio control transmitter
A transmitter for controlling a target to be controlled having a motor, the transmitter includes: a start-up manipulation member to control starting and stopping of the motor; a rotational speed control manipulation member to control a rotational speed of the motor according to an operation amount; a control unit to generate the steering signal such that the motor is rotated according to the operation amount of the rotational speed control manipulation member when the operation amount of the rotational speed control manipulation member is equal to or greater than a preset start position while the start-up manipulation member is in a start-up state; and a transmitting unit to transmit the steering signal. |
| US09165451B1 |
Alarm assembly
An alarm assembly includes a receiver that is positionable in a vehicle. The receiver emits an audible alarm if the temperature inside the vehicle exceeds a predetermined level when the vehicle is occupied. A temperature sensor is operationally coupled to the receiver. The temperature sensor senses ambient temperature of the receiver's environment so the receiver emits the audible alarm. An occupant sensor is operationally coupled to the receiver. The occupant sensor is positionable beneath a child seat in a vehicle to communicate occupancy of the vehicle to the receiver. A bracelet is operationally coupled to the receiver. The bracelet may be worn by a child inside the vehicle so the bracelet communicates occupancy of the vehicle to the receiver. A collar is operationally coupled to the receiver. The collar may be worn by a pet inside the vehicle so the collar communicates occupancy of the vehicle to the receiver. |
| US09165449B2 |
Occupant egress prediction systems, methods and devices
A method comprises determining a person's level of risk for developing an adverse condition; selecting a care protocol based on the level of risk; displaying a proposed configuration of a person support structure corresponding to the care protocol for a caregiver to approve; and upon approval by the caregiver, implementing the configuration. |
| US09165447B2 |
Smart charm anti-theft alarm system
An anti-theft system that has a first component that is an attractive and light-weight smart charm that uses an accessory attachment device to attach to a wearable accessory such as a bracelet or necklace, an item of clothing, or user. The system has a second component that is an object monitor for attaching or combining with a mobile object, such as a wallet or purse. The smart charm and object monitor communicate proximity information between each other, and set off a perceptible alarm through one or more sensory alert mechanisms when the separation distance between the smart charm and object monitor exceeds a threshold alert criterion. |
| US09165446B2 |
Anti-theft security device and perimeter detection system
A security tag in accordance with an embodiment of the present invention includes a housing, a membrane operable for attachment to merchandise, wherein the housing is connected the membrane, a monitoring device operable to monitor whether a party removes or attempts to remove the housing from the membrane and an alarm operable to emit a tamper signal when the monitoring device indicates that a party has removed or attempted to remove the housing from the membrane in an unauthorized condition. A security system in accordance with an embodiment of the present invention includes a security tag operable for connection to merchandise to be secured, a monitoring device operable to monitor whether a party removes or attempts to remove the security tag from the merchandise and an alarm operable to emit a tamper alarm signal when the monitoring device indicates that a party has removed or attempted to remove the security tag from the merchandise in an unauthorized condition. |
| US09165444B2 |
Light socket cameras
Security systems can be used to detect a visitor. The security system can include a camera that is configured to take a video of the visitor. As well, the security system can be configured to transmit the video of the visitor to a remote computing device. The video of the visitor can be displayed on the remote computing device. The security system can be attached to a light socket. |
| US09165435B2 |
Gaming device having advance game information analyzer
This concept is directed to methods of operating a gaming device to analyze game information that is part of a gaming event having a player interaction in advance of the player interaction to make a determination about the game play. These methods may be used for a variety of gaming devices such as slot machines, video keno devices, video poker machines, electronic table games, internet gaming terminals, etc. In each type of gaming device, these operation methods evaluate future game information during game play to determine one of multiple manners by which the game play will continue. These continuation manners may include changing the speed of game play, determining display characteristics of the game and outcome, providing tips or information to the player about the future game information, automatically initiating a subsequent game, or otherwise altering an aspect of the game play parameters in response to the evaluated game information. |
| US09165432B2 |
Fast action baccarat
A gaming station that includes a plurality of player gaming units is provided. Each player gaming unit may include a betting area on a surface of a trapdoor. Such a trapdoor may support one or more chips in the betting area when the trapdoor is closed. When the trapdoor opens, the chips fall into an internal chip collection area. The player gaming unit may further include an adjustable screen. When the screen is in the closed position, the screen serves to block a player at the player gaming unit from accessing the betting area. When the screen is in the open position, the player is allowed to access the betting area. The gaming station may further include a sliding float for holding a plurality of chips. Such a sliding float may be movable past the plurality of player stations. |
| US09165431B2 |
Gaming system player terminal adapted for hot swapping between remote live table games
Table game tournament systems can include player terminal(s), electronic gaming table(s), and/or a remote server. A player terminal can have an outer housing, a controller located therewithin or thereabout, input and output component(s), and a communications interface to an outside gaming network having other functionally similar gaming device(s), gaming table(s), and a remote server. The controller and/or server can facilitate providing tournament information to a player, which information can include whether the player would qualify for the next tournament round, who is the most serious opponent to the player, and/or the chip difference therebetween. A terminal can also facilitate asynchronous and individually paced tournament play, switching between different tournament tables on demand, and play of other non-tournament table games thereat simultaneously with the play of the table game tournament. Portable computing devices can be used as player terminals and can permit players to play in actual or practice play-along modes. |
| US09165429B2 |
Method and apparatus for gaming machines with a tournament play bonus feature
A gaming method and device includes a game, at least one non-qualifying outcome in the game, and at least one qualifying outcome in the game, wherein a player qualifies for a multi-player tournament to be held in the future when the player achieves the at least one qualifying outcome. |
| US09165427B2 |
Wagering game with multiple bonus triggering feature and bonus accrual feature
In one aspect, there is provided a method of conducting a wagering game which includes the steps of conducting a plurality of basic wagering games and enabling a bonus game in response to a bonus triggering outcome achieved in any of the basic wagering games. The method also includes deferring the enabled bonus game to permit play after completion of play of the plurality of basic wagering games. |
| US09165426B2 |
System and method for attending a recorded event in a metaverse application
A metaverse system and method for allowing a user to attend a recorded past event in a metaverse application. The metaverse system includes a client computer, a metaverse server, and a time travel engine. The client computer interfaces with the metaverse application. The metaverse server records an event environment of a past event in a metaverse application. The time travel engine serves, in response to a request from a user, a playback of the recorded event environment to the client computer to allow the user to attend and to observe the recorded event environment. |
| US09165424B2 |
Thin client support for a gaming machine
A gaming machine, such as a video slot or video poker machine, may be configured to request a thin client game from a game server for presentation within a thin client. The outcome of the thin client game is determined by the game server. The gaming machine is also configured to execute a thick client game determined by the gaming machine. Indications of the outcomes of the thin and thick client games may be provided to a data collection device. |
| US09165423B2 |
Integrating social networking and wagering systems
A wagering game system and its operations are described herein. In embodiments, the operations can include connecting a social network account with a wagering game player account, wherein the wagering game player account is associated with a wagering game session, and wherein the social network account is associated with a social networking session via a venue for a social network. The operations can further include detecting a first event from a first of the social networking session and the wagering game session; and after detecting the first event, causing a second event to occur for a second of the social network session and the wagering game session. |
| US09165417B2 |
Method and system for the protection of voting options for remote voting
The method includes using a voting computer to represent the user selected voting options gathered by a voting application running in the voting computer, using an element that has a machine readable format such as a barcode, recording then the element in a physical media using a printing device connected to the voting computer, so that it is suitable to be delivered by the user using a physical channel such as a postal service to the electoral officers. Once the delivered physical media is received by the intended destination (e.g., election officials), the method introduces the step of reading the element information contained in the physical media using a reading device connected to a retrieving computer. Finally, the method introduces a process for generating a physical ballot in the retrieving computer using the information delivered by the voter and a printing device. |
| US09165415B2 |
Method and apparatus for access authentication using mobile terminal
An access authentication method and apparatus in which access authentication is performed using positional data associated with access information data. |
| US09165414B2 |
Method and system for predicting performance of an aircraft
Methods and systems for operating an avionics system on-board an aircraft are provided. A plurality of signals representative of a current state of the aircraft are received. A future state of the aircraft is calculated based on the plurality of signals representative of the current state of the aircraft. An indication of the future state of the aircraft is generated with the avionics system on-board the aircraft. |
| US09165410B1 |
Building a three-dimensional composite scene
The capture and alignment of multiple 3D scenes is disclosed. Three dimensional capture device data from different locations is received thereby allowing for different perspectives of 3D scenes. An algorithm uses the data to determine potential alignments between different 3D scenes via coordinate transformations. Potential alignments are evaluated for quality and subsequently aligned subject to the existence of sufficiently high relative or absolute quality. A global alignment of all or most of the input 3D scenes into a single coordinate frame may be achieved. The presentation of areas around a particular hole or holes takes place thereby allowing the user to capture the requisite 3D scene containing areas within the hole or holes as well as part of the surrounding area using, for example, the 3D capture device. The new 3D captured scene is aligned with existing 3D scenes and/or 3D composite scenes. |
| US09165406B1 |
Providing overlays based on text in a live camera view
Approaches are described for rendering augmented reality overlays on an interface displaying the active field of view of a camera. The interface can display to a user an image or video, for example, and the overlay can be rendered over, near, or otherwise positioned with respect to any text or other such elements represented in the image. The overlay can have associated therewith at least one function or information, and when an input associated with the overlay is selected, the function can be performed (or caused to be performed) by the portable computing device. |
| US09165398B2 |
Analysis of food items captured in digital images
Data analysis of a food item based on one or more digital images of the food item is disclosed. In one embodiment, the method comprises displaying, on a display unit of the smart device, first and second digital images of a meal, where the first digital image is captured before the second digital image. The method also comprises determining a volume of each food item in the first digital image and a volume of each food item in the second digital image by analyzing the first digital image and the second digital image using a digital image processing technique. The method further comprises generating, on the display unit, an amount of intake for the meal based on a difference between the volume of each food item in the first digital image and the volume of each food item in the second digital image. |
| US09165393B1 |
Measuring stereoscopic quality in a three-dimensional computer-generated scene
A computer-implemented method for measuring the stereoscopic quality of a computer-generated object in a three-dimensional computer-generated scene. The computer-generated object is visible from at least one camera of a pair of cameras used for creating a stereoscopic view of the computer-generated scene. A set of surface vertices of the computer-generated object is obtained. A stereoscopic transformation on the set of surface vertices is computed to obtain a set of transformed vertices. A translation vector and a scale vector are computed and applied to the set of transformed vertices to obtain a ghosted set of vertices. The ghosted set of vertices is approximately translational and scale invariant with respect to the set of surface vertices. A sum of the differences between the set of surface vertices and the set of ghosted vertices is computed to obtain a first stereo-quality metric. |
| US09165387B2 |
Graphing device and method
To display patient information, a computing device receives a set of diagnostic values for a patient, a processor of the computing device compares the set of diagnostic values with a set of predetermined normal values, and a video image is displayed having a graphical depiction of the diagnostic values in comparison to the related normal values. The related set of normal values is displayed at a predetermined region of the video image and the set of diagnostic values is displayed on the video image in relation to the certain region of the normal values. Varying levels of relative health of the patient are indicated according the placement of an icon relative to areas of the graphical depiction of the diagnostic values. The video image is a plurality of concentric circles with the diagnostic values being displayed relatively closer to a center of the display in response to the diagnostic values being relatively closer to the values of the related normal values. |
| US09165386B2 |
Magnetic resonance imaging device, and method for generating magnetic susceptibility enhanced image
There is provided a technique for obtaining a magnetic susceptibility-weighted image in which contrast difference of a tissue of interest and a surrounding tissue can be emphasized regardless of the positional relationship of the B0 direction and the imaging slice. A phase image is converted into a susceptibility map not depending on the B0 direction, and then a weighting image used for weighting is generated by using the susceptibility map. The weighting image to be generated is for emphasizing contrast of a tissue of interest and a surrounding tissue depending on the purpose. Then, by multiplication of the weighting image and an absolute image, a magnetic susceptibility-weighted image in which the magnetic susceptibility difference is emphasized depending on the purpose is obtained. |
| US09165378B2 |
Acquisition of color calibration charts
The present disclosure related to acquisition of color calibration charts. In at least some examples herein, an image of a calibration color chart is processed. A lighting condition of the color calibration chart may be automatically determined. |
| US09165373B2 |
Statistics of nearest neighbor fields
In embodiments of statistics of nearest neighbor fields, matching patches of a nearest neighbor field can be determined at image grid locations of a first digital image and a second digital image. A motion field can then be determined based on motion data of the matching patches. Predominant motion components of the motion field can be determined based on statistics of the motion data to generate a final motion field. The predominant motion components correspond to a motion of objects as represented by a displacement between the first and second digital images. One of the predominant motion components can then be assigned to each of the matching patches to optimize the final motion field of the matching patches. |
| US09165370B2 |
Image processing apparatus, image processing method, and computer-readable recording device
An image processing apparatus includes a probability value calculator that calculates, based on color feature data of a pixel included in an image, respective probabilities that the pixel belongs to a specific area and a non-specific area; a weighted edge intensity calculator that calculates a weighted edge intensity between neighboring pixels based on pixel values and color feature data of the pixel included in the image and a neighboring pixel of the pixel; an energy function creator that uses the probabilities and the weighted edge intensity to create an energy function expressed by a result of an area determination of the pixel; and an area divider that divides the image into the plurality of areas based on the energy function. |
| US09165367B2 |
Depth estimation system for two-dimensional images and method of operation thereof
A method of operation of a depth estimation system includes: calculating focus measures for positions on a two-dimensional image; generating a depth map for the two-dimensional image based on fitting the focus measure through a Gaussian function; generating a three-dimensional image from the depth map and the two-dimensional image; and processing the three-dimensional image on a storage unit for displaying on a device. |
| US09165366B2 |
System and method for detecting and displaying airport approach lights
A vehicle display system displays approach lights acquired by a vision system overlaid on, and aligned with, a stored synthetic approach light symbol. A stored approach light type that corresponds to the target runway may be verified to match the acquired approach lights. A synthetic approach light symbol that corresponds to the approach light type is chosen and aligned with the approach lights for display. |
| US09165365B2 |
Method and system for estimating attitude of camera
In a method of estimating a camera attitude, based on the past-detected position of a marker and an appropriate camera attitude provided during current frame imaging, the position of the maker to the current frame is approximately predicted. Through extraction of points which are near the predicted marker position (marker neighboring points), a group of points are obtained. An attitude of the camera (rotation matrix and translation matrix) which optimizes an estimation function is obtained for re-estimating the camera attitude, where the estimation function needs, as its condition, a distance between the marker neighboring points included in the point groups and an estimation plane on which the marker is positioned. The point groups include many points extracted from the neighborhood of the marker, so that the preliminarily estimated approximate camera attitude can be corrected and estimated with higher accuracy even in an environment with occlusion. |
| US09165363B2 |
Image diagnostic device and image correction method
Provided is an image diagnostic device with which it is possible to correct location misalignment of an image capture subject, and to improve the reliability of the result of the correction, in time series image data. An image diagnostic device may include an input part (13) which receives image data input; a correction unit (14) which computes a correction vector which denotes location misalignment of an image capture subject, and selects image data used with an image correction unit; an image correction part (20) which carries out a correction process on the image data based on the correction vector and creates corrected image data; a control part (21) which controls the correction unit and the image correction part; a memory (22) which stores the corrected image data and measurement data as stored data; an output unit (23) which outputs the stored data externally; a display unit (24) which displays the stored data; and an external input device (30) where an operator makes an input operation. |
| US09165359B2 |
High-throughput single-cell imaging, sorting, and isolation
The invention provides a method and apparatus for isolating individual target cells. The apparatus includes a body structure comprising a main channel, a collection channel, and a waste channel fluidly coupled at a first fluid junction. A plurality of trapping channels intersect the collection channel, each trapping channel having a diameter at a location adjacent to the intersection of the trapping channel with the collection channel that is less than a diameter of an individual target cell. The apparatus also includes an imaging system configured to image individual target and non-target cells within the main channel, thereby producing imaging data; a processor configured to perform real-time, multivariate analyses of the imaging data; and a directing system configured to direct the individual target cells. A pressure source is in fluid communication with one or more of the collection channel, the waste channel, the first side channel, and the second side channel. |
| US09165356B2 |
Defect inspection method and defect inspection device
A defect inspection method for inspecting a defect on a semiconductor wafer, using plural inspection methods includes: merging hot-spot coordinates as coordinates on the semiconductor wafer, designated by a user, or coordinates where a systematic defect can occur, with detected defect coordinates on the semiconductor wafer, acquired from inspection information, after information indicating the type of coordinates are added thereto; deciding an inspection sequence of the coordinates merged with each other; and defect inspection for executing selection using the information indicating the respective types of the coordinates merged with each other, and executing an inspection by selecting an inspection method for every coordinates to be inspected. |
| US09165354B2 |
Method of analyzing photolithography processes
Methods of analyzing photolithography processes are provided. The methods may include obtaining an image from a pattern formed on a wafer and obtaining dimensions of the image. The methods may further include converting the dimensions into a profile graph and then dividing the profile graph into a low-frequency band profile graph and a high-frequency band profile graph. |
| US09165353B2 |
System and method for joint degradation estimation and image reconstruction in magnetic resonance imaging
A magnetic resonance imaging (MRT) method for jointly estimating an image degradation and reconstructing an image of a subject in which that image degradation is mitigated is provided. The MRI system is operated to acquire multiple different k-space data sets that are acquired with different acquisition parameters so as to modulate the image degradation to be estimated. Using an iterative process, the image degradation is estimated while jointly reconstructing an image in which the estimated image degradation is mitigated. |
| US09165350B2 |
Image sharpening method and image processing device
An image sharpening method and an image processing device are provided. The method includes: obtaining a plurality of pixels in an image; calculating a first weight of a high pass filter and a second weight of a first filter according to the pixels, and the first filter is a convolution of the high pass filter and a low pass filter; generating a sharpening filter according to the high pass filter, the first weight, the first filter and the second weight; and executing a sharpening operation on the pixels according to the sharpening filter. Accordingly, a sharpened image has better vision effects. |
| US09165349B2 |
Apparatus for generating diagnosis image, medical imaging system, and method for processing image
An apparatus for generating a diagnosis image includes a local contrast characteristic calculator configured to calculate local contrast characteristics of radiation image data of a low-energy sub-band from radiation image data generated by radiation having at least two energy bands passing through a subject; a local contrast characteristic applier configured to apply the calculated local contrast characteristics to radiation image data of a full-energy band generated by the radiation having at least two energy bands passing through the subject; and a diagnosis image generator configured to generate a diagnosis image of the subject based on the radiation image data of the full-energy band to which the local contrast characteristics have been applied. |
| US09165348B2 |
Stochastic rasterization with selective culling
Depth of field may be rasterized by culling half-space regions on a lens from which a triangle to be rendered is not visible. Then, inside tests are only performed on the remaining unculled half-space regions. Separating planes between the triangle to be rendered and the tile being processed can be used to define the half-space regions. |
| US09165346B2 |
Method and apparatus for reducing image noise
Embodiments of the present invention provide a method and an apparatus for reducing image noise. The method includes decomposing an original image into a luminance channel image and at least one chrominance channel image, and calculating a weighted average value of each pixel of the luminance channel image and the chrominance channel image by using luminance information, to correct each pixel of the luminance channel image and the chrominance channel image. By virtue of the embodiments of the present invention, it is possible to effectively avoid color dispersion at edges of images, to achieve easy implementation, and to effect low cost. |
| US09165345B2 |
Method and system for noise reduction in video systems
A system and method of image processing is provided, including implementing adaptive pixel replacement techniques or reducing noise. The method includes obtaining a data map of an image frame, wherein the data map comprises good pixels and bad pixels at locations associated with the data map. The method also includes assigning different techniques to the bad pixels, wherein a first technique is assigned to a first bad pixel and a second technique is assigned to a second bad pixel. The method further includes adjusting information associated with the bad pixels for a chosen technique for each of the bad pixels. |
| US09165342B2 |
Image data processing apparatus and method for writing an image data into a memory
An image data processing including a storage unit for storing a first pixel block and a second pixel block taken from image data in which pixels are arranged in a first direction and a second direction, and a writing module for writing the first pixel block and the second pixel block stored in the storage unit into a memory, wherein the first pixel block and the second pixel block are arranged one adjacent to the other along the first direction, and the number of pixels arranged in the first direction in each block is equal to an access unit data length of the memory multiplied by a natural number m1, and the writing module writes pixel data equal in length to the access unit data length, and representing pixels contiguously arranged along the first direction across the first and second pixel blocks, into the memory in a single access operation. |
| US09165340B2 |
Image display system, image display method, image display program, and computer-readable recording medium storing said program
The image display system includes a calculation unit, a specifying unit, a generation unit and a transmitting unit. Upon change of a zoom level of a current image not containing position information to a specified value on a user terminal, the calculation unit calculates a display range of an object represented by the current image after change in zoom level. The specifying unit refers to data of a different image of the object and specifies a part of the different image indicated by the display range calculated by the calculation unit. The different image has a different resolution from the current image. The generation unit generates a next image representing the part specified by the specifying unit using the data of the different image. The transmitting unit transmits the next image to the user terminal for switching from the current image to the next image. |
| US09165339B2 |
Blending map data with additional imagery
In one aspect, a map is provided for display by one or more computing devices. The map includes one or more polygons. The one or more computing devices receive a zoom request for viewing the map. The one or more computing devices then determines whether a visual threshold has been reached based at least in part on the zoom request. When the visual threshold has been reached, the one or more computing devices identify a polygon of the one or more polygons. The one or more computing devices then provide for display alternate imagery corresponding to the polygon on the map. |
| US09165338B2 |
Method, device and computer-readable storage medium for panoramic image completion
A method for panoramic image completion is disclosed. The method includes: acquiring a panoramic image; obtaining a projected image by mapping pixels of the panoramic image onto a polar coordinate system, wherein a long side component of the pixel coordinate of the pixels is corresponding to the polar angle of the polar coordinate system and a short side component of the pixel coordinate of the pixels is corresponding to a radial coordinate of the polar coordinate system; acquiring an incomplete region of the projected image, and obtaining a completed image by completing the incomplete region; and obtaining a completed panoramic image by inverse mapping the pixels of the completed image according to the polar coordinate system. Furthermore, a device for panoramic image completion is also disclosed. The above method and device for panoramic image completion take account of the perspective curvature of the panoramic image, to improve the degree of restoration. |
| US09165337B2 |
Command instruction management
Techniques are described for writing commands to memory units of a chain of memory units of a command buffer. The techniques may write the commands, and if during the writing, it is determined that there is not sufficient space in the chain of memory unit, the techniques may flush previously confirmed commands. If after the writing, the techniques determine that there is not sufficient space in an allocation list for the handles associated with the commands, the techniques may flush previously confirmed commands. |
| US09165336B2 |
Method and apparatus for checking a security feature of a value document
A method includes checking a specified security feature of a value document which is present in a specified security-feature region of the value document. The security feature includes captured pixel data which describe spatially resolved with a specified optical spatial resolution, an optical image at least of the security-feature region of the value document, and there are captured ultrasound data which describe an ultrasonic property of the value document at least in the security-feature region, spatially resolved with a specified ultrasonic spatial resolution. The ultrasonic spatial resolution is lower than the optical spatial resolution. From the pixel data there are established first reduced-resolution pixel data for reduced-resolution pixels of the first reduced-resolution image which describe a reduced-resolution optical image at least of the security-feature region of the value document, whose optical spatial resolution corresponds to the ultrasonic spatial resolution. |
| US09165323B1 |
Biometric transaction system and method
A system for enabling identity verification of an individual in a transaction between the individual and an entity that utilizes a data processing system, an entity device, and an individual device. The individual registers with the data processing system biometric data taken from the individual and data pertaining to an individual device. The entity registers with the data processing system entity identifying information. Once the individual and entity agree on a transaction, the entity notifies the data processing system of the pending transaction and requests verification of the individual's identity. The individual communicates to the data processing system individual biometric data. The data processing system compares the biometric data from the individual with registered biometric data. The data processing system forwards a result of the comparison to the entity and upon a successful comparison, may forward any requested information regarding the individual to the entity. |
| US09165322B2 |
Digital downloading jukebox system with user-tailored music management, communications, and other tools
A digital downloading jukebox system including a mechanism for delivering custom services to a recognized user, including services for creating playlists, communicating with others, accessing other features, etc. is provided. In some exemplary embodiments, after a user is recognized, the jukebox system allows users to access a special front-end via the Internet or on an actual jukebox. Then, the user may, for example, create playlists, share songs with friends, send messages to friends, and access other value-added content. Other exemplary embodiments allow users to become certified, charging them for services without requiring constant inputting of coinage or credit card information. Such a system preferably learns about networks of friends, and enables managers to send similar messages to regular customers and/or others known to the system. |
| US09165321B1 |
Optimistic receipt flow
An online electronic wallet system and method provide secure storage and transmission of payment instrument information for use in completing online purchases initiated from a client device. A payment instrument's verification code is stored in an encrypted form in local storage on a client device and retrieved and re-encrypted along with other payment instrument information stored on the system using a merchant-specific key. An API library is used to integrate the online electronic wallet system with a registered merchant's purchase flow, including the ability to ensure receipt of an electronic receipt prior to communicating payment instrument information to a merchant server. |
| US09165317B2 |
Methods, systems, and products for managing digital content
A dynamic repository (either storing digital data content or pointers to stored digital data content) works in conjunction with a plurality of interfaces to manage digital content and digital rights policies associated with one or more users. Digital rights policies are unique to each user and such policies define access to digital content in the repository. The user's digital rights policy indicates the level of access a user has to digital content in the repository (e.g., the policy could indicate that the user has authorized access to a particular file for a period of seven days). The interfaces linked with the content repository are used to access and manipulate the digital data content (based upon each user's digital rights policy) and the digital rights policies stored in the content repository. The interfaces include: (a) one or more authentication interfaces for authenticating users, (b) one or more digital rights management (DRM) interfaces allowing users to add, delete, or edit the digital rights policies, (c) one or more data access interfaces allowing users to selectively access digital data content as defined by their individual digital rights policy, (d) one or more browsing interfaces allowing users to selectively browse said digital data content, or a (e) one or more content manipulation interfaces allowing said users to add, delete, or edit said digital data content. |
| US09165310B2 |
Method and apparatus for intelligent street light advertisement delivery
A system includes a vehicle processor configured to communicate with an intelligent street light to receive advertisements pertaining to local businesses. The processor is also configured to store a plurality of received advertisements. The processor is further configured to sort the advertisements based on one or more user factors. Also, the processor is configured to determine an appropriate time for advertisement delivery and deliver the advertisements at the appropriate time. |
| US09165307B2 |
System, method and computer program product for templated export of content
Embodiments disclosed herein provide systems and methods for a templated export. In one embodiment, a method may include determining an export template responsive to a first user action, the first user action indicating a delivery endpoint. The method may further include preparing an asset for delivery to the delivery endpoint utilizing the export template. The asset may include zero or more files. The export template may include predetermined configuration and delivery parameters particular to the delivery endpoint. The prepared asset may be communicated to the delivery endpoint without any further user action. |
| US09165306B2 |
Method and system for generating and sharing customized portable consumer devices
A method for receiving and presenting user-generated designs and sets of terms for portable consumer devices. The method provides for allowing a first person to create a customized design for a portable consumer device, and share the design with other consumers via a host site. Similarly, the method provides for allowing a first person to create and share a customized set of terms for the portable consumer device. Methods for receiving and distributing feedback for customized designs and sets of terms are included. |
| US09165298B2 |
Remote synchronization of pin-pad records with a central transactions database
A method of remotely synchronizing pin-pad terminals involves a gateway receiving from an acquirer server an authorization code for a transaction authorized using one of a plurality of pin-pad terminals, and saving in a database particulars of the authorized transaction. Each terminal has a memory storing particulars of at least one authorized transaction authorized using the terminal, and a running total value of all transactions authorized using the pin-pad terminal. The gateway receives a request to close out all the saved transactions and receives from one of the terminals an authorization request message requesting authorization for an additional transaction. In response, the gateway closes in the database all the saved transactions authorized using the one terminal, and responds to the authorization request message by providing the one terminal with a remote synchronization command commanding the one terminal to clear the running total from the memory. |
| US09165295B2 |
Automated card information exchange pursuant to a commercial transaction
In general, embodiments of the present invention relate to a card and associated methods for automated information (static and dynamic) exchange pursuant to a commercial transaction. In a typical embodiment, the card (e.g., a credit card, a debit card and/or a smart card) comprises an energy component for providing power to the card and a back display (e.g., positioned on the back or magnetic strip side of the card) for displaying card information being used in the commercial transaction. Upon display, a terminal (e.g., a point of sale terminal) will scan/read the card information and generate a corresponding source validation code (SVC). An imager positioned on the back of the card will scan/read the SVC and card validation code (CVC) logic on the card will generate a CVC based on the SVC (e.g., based on a validation result of the SVC). A biometric reader positioned on a front side of the card will take a biometric reading from a user of the card and corresponding user validation code (UVC) logic will generate a UVC based on the biometric reading. The underlying commercial transaction can then be validated (e.g., by a server associated with the terminal or by validation logic on the card itself), a validation result can be displayed on a front display (e.g., positioned on the front side of the card). |
| US09165293B2 |
Systems and methods for waveform transmission of transaction card data
A device and method for waveform transmission of transaction card data to a merchant point-of-sale device are provided. The device includes a memory device for storing data, a processor, and a transmitter. The device is programmed to receive transaction card data that mimics data stored within a magnetic stripe associated with a transaction card, convert the transaction card data to a first data file for storage within the memory device, transmit the first data file to the transmitter, and transmit a first waveform from the transmitter to the POS device, wherein the first waveform includes changes in a magnetic field that represent the transaction card data. |
| US09165291B1 |
Payment transaction by email
Disclosed is a technology for seamless initiation of a financial service, such as a payment transaction, by sending a communication message. The disclosed technology can be used, for example, to send payment from a person (e.g., a consumer) to another over e-mail without requiring any sign-up or login procedure. In at least one embodiment, the technology includes receiving a service request email generated by a native email application on a consumer's device, verifying the email using information included in the email, and initiating the service as requested based on the information. Various embodiments of the disclosed technology enable a simplified payment transaction system for ordinary consumers without the hassle of having to sign up, to remember a user account and a password, and to login for sending or receiving every payment transaction, while not sacrificing the essential security feature of authenticating the user for every payment transaction. |
| US09165290B2 |
Sharing notes in online meetings
Notes may be shared in an online meeting with online meeting attendees through a software application associated with organizing an online meeting, for example, online meeting software, calendaring software, note-taking software, or the like. Notes may be created and/or shared before, during, and/or after the online meeting by meeting attendees. Meeting attendees may be notified when notes are shared for the online meeting. Notes may be shared with items of the software application associated with organizing the online meeting. For example, notes may be shared in online meeting software with the online meeting. Notes may be shared among items of different software applications, for example, notes shared in the online meeting software may be automatically shared with a calendar item in a calendaring software application. |
| US09165289B2 |
Electronic meeting management for mobile wireless devices with post meeting processing
A device management system includes a meeting support system that is configured to generate and transmit a plurality of electronic meeting invitations to a plurality of mobile wireless devices that correspond to a plurality of meeting participants and receive responses indicating whether the plurality of participants will attend the electronic meeting. The device management system receives identification data that identifies one or more documents or information that will be made available to the plurality of participants. The meeting support system determines whether the plurality of participants is authorized to access the one or more electronic documents or information. If any of the participants are not authorized to access any of the electronic documents or information, the meeting support system notifies the meeting organizer. The device management system may also include a meeting session management system that is configured to share information among the plurality of mobile wireless devices. |
| US09165287B2 |
Apparatus and method for augmenting digital educational content with social learning tools
A non-transitory computer readable storage medium includes executable instructions to display electronic content, associate a subset of the electronic content with a comment from a user and submit the subset of the electronic content and the comment to a forum accessible by a plurality of users. |
| US09165286B2 |
Electronic process-driven collaboration system
A business process-driven collaboration system embeds collaboration resources and tools directly into existing business processes and applications. The system provides a service layer connected to an existing business process management (BPM) service to embed collaboration resources into the process, and in particular, into the user interface of the existing business applications. The system provides an interface layer providing rapid enhancement of the existing business applications. |
| US09165285B2 |
Shared attachments
When an outgoing communication sent to one or more recipients contains a supported attachment type, a shared workspace that contains a shared version of the original attachment is provisioned. A modified version of the original outgoing communication is delivered to internal recipients including both a link to the shared document and the original attachment. |
| US09165283B2 |
Method and system to process a request to create a collaborative task
Embodiments include a system for providing an identification of a collaborative task. The system may include a communication unit and a processing unit. The communication unit may be configured to receive a request of a user to create the collaborative task and send task metadata to a further system. The processing unit may be configured to generate the task metadata. The task metadata may be a part of the collaborative task and identifying the collaborative task as a part of a process. |
| US09165281B2 |
System and method for enabling electronic presentations
A system and method is provided for enabling collaborative electronic presentations and annotation of graphic information. The method includes the operation of taking a snapshot of an active application. A snapshot can be initiated by a user accessible snapshot control. The snapshot of the active application can be transferred to the electronic whiteboard in response to activation of the snapshot control. A further operation is storing the snapshot in a whiteboard sheet of the electronic whiteboard. Each loaded snapshot may be stored in a separate whiteboard sheet in order to provide a plurality of whiteboard sheets. Another operation can be enabling graphical annotation of the plurality of whiteboard sheets in the whiteboard annotation area by the user. |
| US09165279B2 |
System and method for calibration and mapping of real-time location data
A method of mapping the location of at least one object in three dimensional space, relative to an initial point in three dimensional space by an EIR terminal which contains a microprocessor, memory, a scanning device, a motion sensing device, and a communication interface. The method includes scanning a signal of decodable indicia located at a pre-defined area of a physical object, locating the decodable indicia within this signal, decoding the decodable indicia into a decoded message. The decoded message is an identifier for said physical object, which is then displayed. After receiving an interface command, the EIR terminal is placed in mechanical contact with the pre-defined area of the physical object and a first spatial position is stored as a point of origin in the EIR terminal. |
| US09165275B2 |
Method and apparatus for identifying redeployed distributed generator components
A method and apparatus for identifying a redeployment of a distributed generator component, at least a portion of the method being performed by a controller comprising at least one processor. In one embodiment, the method comprises obtaining a first identification (ID) for a first component of a distributed generator (DG) and a second ID for a second component of the DG; generating an association between the first identifier and the second identifier, wherein the association identifies a relationship between the first and the second components; and comparing the association to a plurality of documented associations to determine whether the association has changed. |
| US09165273B2 |
Externalizing enterprise workspaces using content plug-in
The present disclosure describes methods, systems, and computer program products for externalizing an enterprise workspace to business applications. One computer-implemented method includes indicating data within an application to be included in a new module, initiating a command to create the new module using the indicated data, transmitting the command to create the new module to an external server, receiving from the external server a list of available enterprise workspaces for adding the new module, selecting at least one available enterprise workspace from the list of available enterprise workspaces, transmitting the selected enterprise workspace to the external server, and receiving a confirmation of the new module creation. |
| US09165272B1 |
System for monitoring a plurality of tagged assets on an offshore asset
A system for monitoring a plurality of tagged assets on at least one offshore asset, by creating a customer profile and a library of survey set ups and storing information from independent survey set ups mounted on or proximate to the offshore asset on the administrative data storage. The system includes creating a library of tagged assets for the offshore asset using at least one independent survey set up, wherein each tagged asset has an icon with a hyperlink to a library of images. The system includes identifying placement locations on offshore assets and forming an executive dashboard for display on at least one client device, wherein a virtually positioned icon positioned on an image of the tagged assets presents a hyperlink to the library of survey set ups for that tagged asset, thereby enabling toggling from the image to the library of survey set ups. |
| US09165270B2 |
Predicting likelihood of customer attrition and retention measures
The present invention relates to a system and method for customer retention. Historical transaction and customer data may be received from stores. Likewise, recent customer transaction data may be received from the stores. The transactions are linked to each customer. Attriters, historical customers who discontinued shopping, are identified. Next, risk factors for attrition may be identified by examining the attriters' transaction history for commonalities. From the risk factors a loss model may be generated. The loss model may be used, in conjunction with current transaction data, to generate the likelihood of loss for each of the current customers, which may then be reported. Retention measures may be generated for each customer by comparing the customer's transactions to the loss model and the risk factors. The retention measures may be outputted to the stores, and a price optimization system. Likewise, the retention measures may be validated by comparing actual customer loss to the loss model. |
| US09165262B2 |
Automatic generation of assent indication in a document approval function for collaborative document editing
A method for generating an assent indication in a document approval and review function can include loading a document for editing in a document editor and determining a set of authors for the document. The method also can include modifying a title of the document to include an identity of at least one of the authors in the set. Finally, the method can include changing a visual appearance in the title of an identity of the assenting author responsive to one of the authors in the set assenting to a publication of the document. |
| US09165261B2 |
Apparatus and method for performing accounting in wireless communication system
An apparatus and method for processing accounting in a wireless communication system are provided. The method includes creating an accounting data base (DB) for a mobile station (MS), determining whether a state transition of the MS occurs, if the state transition of the MS occurs, updating state information in the accounting DB, and transmitting the accounting information including the state information to an accounting server. |
| US09165259B2 |
Personalized activity stream discovery system, method, and device
A personalized activity stream system, method, and device delivers a recommendation that is contextualized basis a selected item in an activity stream and that is personalized for a recommendation recipient consistent with an inference of the recommendation recipient's interests. Contextualization and personalization may be based on an automatic analysis of usage behaviors and/or content. The recommendation may be informed by an inference of an expertise level, and an explanation for the recommendation may be delivered to the recommendation recipient. The recommendation may be in accordance with an automatically determined geographic location associated with a location-aware portable device, as well as environmental conditions proximal to the portable device. |
| US09165258B2 |
Generating training documents
A method of generating training documents for training a classifying device comprises, with a processor, sampling from a distribution of words in a number of original documents, and creating a number of pseudo-documents from the distribution of words, the pseudo-documents comprising a similar distribution of words as the original documents. A device for classifying textual documents comprises a processor; and a memory communicatively coupled to the processor, the memory comprising a sampling module to, when executed by the processor, determine the distribution of words in a number of original documents, a pseudo-document creation module to, when executed by the processor, create a number of pseudo-documents from the distribution of words, the pseudo-documents comprising a similar distribution of words as the original documents, and a training module to, when executed by the processor, train the device to classify textual documents based on the pseudo-documents. |
| US09165257B2 |
Typing assistance for editing
Apparatus and methods are disclosed for providing feedback and guidance to touch screen device users to improve the text entry user experience and performance. According to one embodiment, a method comprises receiving a text entry, receiving input on a touch screen in the form of a first single touch input located over a word of previously entered text, and presenting the user with one or more suggestion candidates indicated possible replacement words related to the selected word. The user can then select one of the suggestion candidates using a second single touch input to replace the selected word with a word associated with the selected suggestion candidate. |
| US09165255B1 |
Automatic sequencing of video playlists based on mood classification of each video and video cluster transitions
A given set of videos are sequenced in an aesthetically pleasing manner using models learned from human curated playlists. Semantic features associated with each video in the curated playlists are identified and a first order Markov chain model is learned from curated playlists. In one method, a directed graph using the Markov model is induced, wherein sequencing is obtained by finding the shortest path through the directed graph. In another method a sampling based approach is implemented to produce paths on the digraph. Multiple samples are generated and the best scoring sample is returned as the output. In a third method, a relevance based random walk sampling algorithm is modified to produce a reordering of the playlist. |
| US09165254B2 |
Method and system to predict the likelihood of topics
The present invention relate to a method and system to predict the likelihood of data topics that may occur from data sources. The likelihood of the data topics may be predicted over other dimensions of time or over other dimensions. In the present invention, a topic means a defining characteristic, usually represented as a data element, of a single feature, activity, subject, behavior, event or an aggregation of such defining characteristics. |
| US09165249B2 |
Information processing apparatus, information processing method, and program
Provided is an information processing apparatus including: a reward estimator generating unit using action history data, which includes state data expressing a state of an agent, action data expressing an agent's action, and a reward value expressing a reward of the action, as learning data to generate, through machine learning, a reward estimator estimating the reward value from inputted state data and action data; an action selecting unit preferentially selecting an action not included in the action history data but with a high estimated reward value; and an action history adding unit causing the agent to perform the selected action and adding to the action history data the state data and action data for the action and the action's reward value in association with each other. The reward estimator is regenerated when a set of state data, action data, and the reward value is added to the action history data. |
| US09165247B2 |
Using global and local catastrophes across sub-populations in parallel evolutionary computing
A parallel genetic algorithm computing process tracks forward progress of a first sub-population across generations thereof. The first sub-population is one of a plurality of sub-populations that form a population of candidate solutions to an optimization problem. At a current generation of the first sub-population, it is determined that forward progress of the first sub-population fails a set of one or more forward progress criteria. In response to determining that the forward progress of the first sub-population fails the set of one or more forward progress criteria at the current generation, a local catastrophe is invoked on the current generation of the first sub-population. The first sub-population is re-populated after the local catastrophe is invoked. The first sub-population is re-established after re-populating while constraining migration to the first sub-population. |
| US09165246B2 |
Neuristor-based reservoir computing devices
A neuristor-based reservoir computing device includes support circuitry formed in a complimentary metal oxide semiconductor (CMOS) layer, input nodes connected to the support circuitry and output nodes connected to the support circuitry. Thin film neuristor nodes are disposed over the CMOS layer with a first portion of the neuristor nodes connected to the input nodes and a second portion of the neuristor nodes connected to the output nodes. Interconnections between the neuristor nodes form a reservoir accepting input signals from the input nodes and outputting signals on the output nodes. A method for forming a neuristor-based reservoir computing device is also provided. |
| US09165244B2 |
Structural to functional synaptic conversion
Computer-implemented methods, software, and systems for determining functional synapses from given structural touches between cells in a neuronal circuit are described. One computer-implemented method for determining functional synapses from predetermined synapses of connections between two cells in a neuronal circuit, includes determining, from the predetermined synapses, the functional synapses by leaving a portion of the connections unused, e.g. for activation by plasticity mechanisms. |
| US09165243B2 |
Tensor deep stacked neural network
A tensor deep stacked neural (T-DSN) network for obtaining predictions for discriminative modeling problems. The T-DSN network and method use bilinear modeling with a tensor representation to map a hidden layer to the predication layer. The T-DSN network is constructed by stacking blocks of a single hidden layer tensor neural network (SHLTNN) on top of each other. The single hidden layer for each block then is separated or divided into a plurality of two or more sections. In some embodiments, the hidden layer is separated into a first hidden layer section and a second hidden layer section. These multiple sections of the hidden layer are combined using a product operator to obtain an implicit hidden layer having a single section. In some embodiments the product operator is a Khatri-Rao product. A prediction is made using the implicit hidden layer and weights, and the output prediction layer is consequently obtained. |
| US09165240B2 |
Coupling in and to RFID smart cards
A dual interface (DI) smart card (100) comprising a chip module (CM), a module antenna (MA), a card body (CB) and a card antenna (CA) having two windings (D,E) connected with reverse phase as a “quasi-dipole”. Capacitive stubs (B,C) connected with an antenna structure (A) of the module antenna (MA). The module antenna (MA) overlaps only one of the windings (D or E) of the card antenna (CA). The card antenna (CA) may be formed from one continuous wire. Ferrite (156) shielding the module antenna (MA) from contact pads (CP) and for enhancing coupling between the module antenna (MA) and the card antenna (CA). The card antenna (CA) may be disposed substantially only in a top half portion of the card body (CB). |
| US09165239B2 |
Electromagnetic-coupling-module-attached article
An electromagnetic-coupling module including a radio IC chip and a feeder circuit board on which the radio IC chip is mounted and a feeder circuit including a resonant circuit having a predetermined resonant frequency is attached to an article. The article has a radiation element that radiates a transmission signal supplied from the feeder circuit of the electromagnetic-coupling module via electromagnetic coupling and that supplies a received reception signal to the feeder circuit via the electromagnetic coupling. |
| US09165238B2 |
Methods for manufacturing RFID tags and structures formed therefrom
Radio frequency identification (RFID) tags and processes for manufacturing the same. The RFID device generally includes (1) a metal antenna and/or inductor; (2) a dielectric layer thereon, to support and insulate integrated circuitry from the metal antenna and/or inductor; (3) a plurality of diodes and a plurality of transistors on the dielectric layer, the diodes having at least one layer in common with the transistors; and (4) a plurality of capacitors in electrical communication with the metal antenna and/or inductor and at least some of the diodes, the plurality of capacitors having at least one layer in common with the plurality of diodes and/or with contacts to the diodes and transistors. The method preferably integrates liquid silicon-containing ink deposition into a cost effective, integrated manufacturing process for the manufacture of RFID circuits. Furthermore, the present RFID tags generally provide higher performance (e.g., improved electrical characteristics) as compared to tags containing organic electronic devices. |
| US09165236B2 |
Method for manufacturing smart cards
This invention relates to a smart card (1) manufacturing method that makes it possible to reduce the thickness of the said smart card and directly obtain a final 3FF or 4FF format. The smart card manufacturing method comprises steps for depositing resin forming a first protective coat (11) over the electronic element assembly with a surface greater than the required smart card format and depositing a second protective coat with a format larger than the required card format on the first protective coat. The second protective coat is fixed to the first protective coat by curing the first protective coat, and then the assembly obtained in that way is cut to the required format. |
| US09165235B2 |
Method and apparatus for protecting information in magnetic strip and RFID cards from fraudulent scanning
A device for preventing unwanted electromagnetic inquiry of an electronic card storing information thereon by the transmission of a rogue interrogating signal from an RFID skimmer proximate the electronic card. The device comprises a first and a second conductive material layer each operating to detune an antenna associated with the electronic card or to detune front end resonant circuits associated with the electronic card, and one or more third material layers having a greater thickness than the first and second layers and disposed between the first and second layers, the one or more third material layers providing electromagnetic shielding against radio frequency signals emitted from the electronic card. |
| US09165231B2 |
Image recognition in passive RFID devices
Passive RFID devices are disclosed that perform image recognition. The device includes an antenna, circuitry, and a camera. The antenna receives a radio frequency (RF) signal from a RFID reader. The circuitry stores image data for objects that is used for image recognition. To operate, the circuitry derives power from the RF signal. With the power derived from the RF signal, the camera captures an image. The circuitry then identifies an object in the captured image based on the image data for the objects, and outputs information for the identified object, such as to the RFID reader. |
| US09165223B2 |
Compensation for optical brighteners of print media to facilitate calibration of a printing system
Systems and methods are provided for compensating for optical brighteners found in print media while calibrating a printer. The system is able to determine reflectance values for a print medium, to determine reflectance values for a colorant applied to the print medium, and to alter the determined reflectance values for the colorant based on the reflectance values of the print medium. The system is further able to calibrate a printer that applied the colorant to the print medium based on the altered reflectance values. |
| US09165221B2 |
Image forming system, data processing apparatus, image forming apparatus, recording medium and display method
When an image formation instruction for created document data is received, image data for a preview image corresponding to the document data is generated, the preview image based on the image data is displayed on a display, and an image is formed using data for image formation based on the image data for the preview image. |
| US09165220B2 |
Image object recognition based on a feature vector with context information
Examples disclosed herein relate to image object recognition based on a feature vector with context information. A processor may create an expanded feature vector related to a first area of an image including context information related to the first area. The processor may determine the presence of an object in the image based on the feature vector and output information about the determined object. |
| US09165218B2 |
Distance-based image analysis
An image analyzer (120) aggregates image samples (140) into a cluster (170) based on the image samples (140) being classified from a subset of image metrics applied to a reference sample (130). The image analyzer (120) generates an image quality output (150) by analyzing a distance (180) from the cluster (180) relative to another cluster. |
| US09165217B2 |
Techniques for ground-level photo geolocation using digital elevation
Techniques for generating cross-modality semantic classifiers and using those cross-modality semantic classifiers for ground level photo geo-location using digital elevation are provided. In one aspect, a method for generating cross-modality semantic classifiers is provided. The method includes the steps of: (a) using Geographic Information Service (GIS) data to label satellite images; (b) using the satellite images labeled with the GIS data as training data to generate semantic classifiers for a satellite modality; (c) using the GIS data to label Global Positioning System (GPS) tagged ground level photos; (d) using the GPS tagged ground level photos labeled with the GIS data as training data to generate semantic classifiers for a ground level photo modality, wherein the semantic classifiers for the satellite modality and the ground level photo modality are the cross-modality semantic classifiers. |
| US09165212B1 |
Person counting device, person counting system, and person counting method
A person counting device according to embodiments of the present invention counts the number of persons passing through a doorway based on an imaged image in which the surroundings of the doorway are imaged. The person counting device includes a moving line acquirer that acquires a moving line for each person detected from the imaged image, a person counter that counts the persons that have passed through the doorway based on the moving line, and a display information generator that generates display information which represents the number of persons that have passed through the doorway based on the counting results of the person counter. The person counter detects an interruption of the moving line in the vicinity of the doorway, determines a similarity between the background image of the doorway and the person image, and includes a deemed counter that deems that the person has passed through the doorway. |
| US09165205B2 |
Image processing device generating character image and background image on the basis of connected pixel group
In an image processing device, an edge image generation part detects an edge in an original image and generates an edge image constituted from the detected edge. A connected pixel extraction part extracts connected pixel groups in the edge image. A binary image generation part classifies the connected pixel groups under respective colors of the connected pixel groups, and generates a character image for each color. A background image generation part generates a background image of the original image based on the character image so that a pixel value at the position of the character image in the original image is set by an average value of the pixel values in the original image with regard to at least a portion of pixels around a rectangle circumscribing the connected pixel groups. An image compression part compresses respective image data of the character image and background image by different compression manners. |
| US09165199B2 |
Controlled human pose estimation from depth image streams
A system, method, and computer program product for estimating human body pose are described. According to one aspect, anatomical features are detected in a depth image of a human actor. The method detects a head, neck, and trunk (H-N-T) template in the depth image, and detects limbs in the depth image based on the H-N-T template. The anatomical features are detected based on the H-N-T template and the limbs. An estimated pose of a human model is estimated based on the detected features and kinematic constraints of the human model. |
| US09165196B2 |
Augmenting ADAS features of a vehicle with image processing support in on-board vehicle platform
Systems and methods directed to augmenting advanced driver assistance systems (ADAS) features of a vehicle with image processing support in on-board vehicle platform are described herein. Images may be received from one or more image sensors associated with an ADAS of a vehicle. The received images may be processed. An action is determined based upon, at least in part, the processed images. A message is transmitted to an ADAS controller responsive to the determination. |
| US09165190B2 |
3D human pose and shape modeling
Methods, devices and systems for performing video content analysis to detect humans or other objects of interest a video image is disclosed. The detection of humans may be used to count a number of humans, to determine a location of each human and/or perform crowd analyses of monitored areas. |
| US09165188B2 |
Systems and methods for mobile image capture and processing
In various embodiments, methods, systems, and computer program products for processing digital images captured by a mobile device are disclosed. Myriad features enable and/or facilitate processing of such digital images using a mobile device that would otherwise be technically impossible or impractical, and furthermore address unique challenges presented by images captured using a camera rather than a traditional flat-bed scanner, paper-feed scanner or multifunction peripheral. |
| US09165185B2 |
Optical character recognition of text in an image according to a prioritized processing sequence
A computer-implemented method for providing a text-based representation of a region of interest of an image to first is provided that includes a step of identifying text zones within the image, each text zone including textual content and having a respective rank assigned thereto based on an arrangement of the text zones within the image. The method also includes determining a processing sequence for performing optical character recognition (OCR) on the text zones. The processing sequence is based, firstly, on an arrangement of the text zones with respect to the region of interest and, secondly, on the ranks assigned to the text zones. The method further includes performing an OCR process on the text zones according to the processing sequence to progressively obtain a machine-encoded representation of the region of interest, and concurrently present the machine-encoded representation to the user, via an output device, as the text-based representation. |
| US09165184B2 |
Identifying matching images
The disclosure concerns face recognition systems. The aim is to identify candidate matching images to a probe image. There is provided methods, software and computer system to select (22, 24) a method of matching images from two or more methods of matching images based on an underlying resolution (20) of the probe image (8). Comparing two images of differing resolutions is common in surveillance environments. To alleviate this degradation, the method advantageously dynamically selects the most appropriate matching method for a probe image. The disclosure also provided methods to determine the underlying resolution of a probe (8) or gallery image (14). |
| US09165183B2 |
Estimating apparatus, method thereof, and computer program product therefor
An estimating apparatus configured to estimate a correct attribute value is provided. The estimating apparatus extracts feature quantities from an image including a person, calculates a first likelihood of the feature quantity for respective attribute classes; calculating second likelihoods for the respective attribute classes from the first likelihoods for the respective attribute classes; specifies the attribute class having the highest second likelihood; calculates an estimated attribute value of the specific attribute class and estimated attribute values of selected classes by using the feature quantity; and applies the second likelihood on the estimated attribute value of the specific attribute class as a weight, applies the second likelihoods on the estimated attribute values of the selected classes as a weight and add the same, and calculates a corrected attribute value of the specific attribute class. |
| US09165180B2 |
Illumination sensitive face recognition
Systems and methods for face recognition are provided. In one example, a method for face recognition includes receiving a user image and detecting a user luminance of data representing the user's face. An adaptive low pass filter is selected that corresponds to the user luminance of the user's face. The filter is applied to the user image to create a filtered user image. The filtered user image is projected to create a filtered user image representation. A filtered reference image representation that has been filtered with the same low pass filter is selected from a reference image database. The method then determines whether the filtered reference image representation matches the filtered user image representation. |
| US09165179B1 |
Feature reduction based on local densities for bundle adjustment of images
Methods, systems, and computer program products are provided for determining camera parameters and three dimensional locations of features from a plurality of images of a geographic area. These include, detecting features in the plurality of images where each of the images cover at least a portion of the geographic area, comparing the detected features between respective ones of the images to determine a plurality of matched features, selecting a subset of the plurality of matched features and determining the camera parameters and the three dimensional positions of one or more of the detected features using the selected subset. The respective matched features are selected depending on a quantity of other matched features in proximity to the respective matched features. |
| US09165175B2 |
Finger sensing apparatus performing secure software update and associated methods
A finger sensing apparatus may include a finger sensor having an integrated circuit (IC) substrate, an array of finger sensing elements on the IC substrate, and secure software update circuitry on the IC substrate. In addition, the finger sensing apparatus may include a host platform external from the finger sensor and hosting software associated with the finger sensor. The host platform may cooperate with the secure software update circuitry to authorize an attempted software update. |
| US09165169B2 |
Method for data communication between a base station and a transponder
A method for data communication between a base station and at least one transponder by a high-frequency electromagnetic carrier signal is disclosed, onto which information packets are modulated, whereby each information packet has a header section, a middle section, and an end section and whereby the middle section has a data field for the transmission of data and/or address information and a protection field placed thereafter for the correction of errors in the transmission of the data and/or address information, whereby after the data field the base station inserts at least one control field, by which the protection field following the inserted control field can be changed in such a way that the duration of an information packet is set variably. The invention relates further to a base station for carrying out this method, to a data communication system containing a base station and at least one transponder in communicative wireless contact with the base station. |
| US09165168B2 |
Magnetic Card Reader
In order to perform processing of analyzing card data in an appropriate amount of time depending on the number of tracks actually present on a magnetic stripe with use of a single demodulation circuit, the single demodulation circuit produces, based on magnetic data read by a magnetic head, a single common card running signal obtained by ORing card running signals of tracks present on the magnetic stripe of the magnetic card, a clock signal of each track present on the magnetic stripe, and a data signal of each track present on the magnetic stripe. A card running signal generation circuit generates, based on the common card running signal and the clock signal of each track, an individual card running signal of each track present on the magnetic stripe. A data analysis processing unit determines, based on presence or absence of the individual card running signal, presence or absence of a track on the magnetic stripe to perform processing of analyzing the data signal only for the track determined to be present on the magnetic stripe. |
| US09165163B2 |
Secure delivery of processing code
An apparatus may comprise a secure portion of a chip and an external memory device. The secure portion of the chip may be configured to receive an encryption key, and the memory device may be configured to receive an encrypted processing code. The secure portion of the chip may be configured to verify the encrypted processing code by decrypting the encrypted processing code using the encryption key. A non-secure portion of the chip may be configured to write the encrypted processing code on the memory device while the memory device is coupled to the chip. The encryption key may be associated with an identifier of the chip. |
| US09165161B2 |
Setting options for publishing calendar
Selectively shared and filtered personal information collections are provided. Personal information collections include calendars, task lists, address books, and other collections of information that may be provided by personal information manager (PIM) software. Personal information collections published on a server may be limited on a user-by-user basis as to who may access the collections. Furthermore, collections may be automatically filtered based on a rolling window of dates, reducing file size and maintaining privacy of items outside the rolling window. |
| US09165158B2 |
Encryption key management using distributed storage of encryption-key fragments
An encryption key fragment is divided into a number of encryption key fragments. Requests to store different ones of the encryption key fragments are transmitted to different computer memory storage systems. An individual request to store an encryption key fragment includes one of the encryption key fragments and bears an access control hallmark for regulating access to the encryption key fragment. |
| US09165157B2 |
Methods and apparatus facilitating access to storage among multiple computers
Multiple computers in a cluster maintain respective sets of identifiers of neighbor computers in the cluster for each of multiple named resource. A combination of the respective sets of identifiers define a respective tree formed by the respective sets of identifiers for a respective named resource in the set of named resources. Upon origination and detection of a request at a given computer in the cluster, a given computer forwards the request from the given computer over a network to successive computers in the hierarchical tree leading to the computers relevant in handling the request based on use of identifiers of neighbor computers. Thus, a combination of identifiers of neighbor computers identify potential paths to related computers in the tree. |
| US09165156B2 |
Role-based access control modeling and auditing system
A role-based access control (RBAC) modeling and auditing system is described that enables a user to access and/or create security roles that can be applied to users of a first software application. When a security role having a particular set of permissions has been accessed or created, the system can present a simulated user interface (UI) that indicates information that can be viewed and/or actions that can be performed by a user to whom the security role has been assigned when interacting with the first software application. The system may further provide “run as” functionality that enables a simulated UI to be generated for a particular user and that can display the security role(s) associated with the particular user. The system may be embodied in a second software application, such as a tool that is associated with the first software application. |
| US09165155B2 |
Protecting the integrity and privacy of data with storage leases
Storage leases specify access restrictions and time periods, restricting access to their associated data during the storage lease time period. Storage leases may be assigned to individual data storage blocks or groups of data storage blocks in a data storage device. A data storage device may include any arbitrary number of different storage leases assigned to different portions of its data storage blocks. Storage lease-enabled devices may provide security certificates to verify that data access operations have been performed as requested and that their storage leases are being enforced. Storage lease-enabled devices compare storage lease information for data units with the current time using a clock isolated from access by storage clients or time certificates from one or more trusted time servers. Storage leases may be used in combination with backup applications, file systems, database systems, peer-to-peer data storage, and cloud storage systems. |
| US09165151B2 |
Systems, methods, and devices for encrypted data management
Key management for and automount of encrypted files, including recovering a master vault key file from an encoded vault key file, storing the vault key file within a previously mounted crypto key management virtual drive so as to provide a secure scratch pad area for temporary storage of the master vault key file. An open and mount module may then invoke a file mounting procedure by providing the vault key file name and a path corresponding to the crypto key management virtual drive to a virtual drive mounting module. The method of passing the vault key file to the file mounting utility module may comprise passing command line arguments equal to a pathname and filename to the file mounting utility. |
| US09165146B2 |
Content management device and content management method
Provided is a content management device for protecting a content of a provider. A content management device 800 deletes one or more contents shared with and held by a user of another device. The content management device 800 comprises: a sharing unit 801 configured to distribute the contents to the user and thereby share the contents with the user; and a switching unit 802 configured to switch a method of the deletion to another method according to a time elapsed from the distribution. |
| US09165143B1 |
Image file generation and loading
A method relating generally to loading a boot image is disclosed. In such a method, a header of a boot image file is read by boot code executed by a system-on-chip. It is determined whether the header read has an authentication certificate. If the header has the authentication certificate, authenticity of the header is verified with the first authentication certificate. It is determined whether the header is encrypted. If the header is encrypted, the header is decrypted. |
| US09165142B1 |
Malware family identification using profile signatures
Techniques for malware family identification using profile signatures are disclosed. In some embodiments, malware identification using profile signatures includes executing a potential malware sample in a virtual machine environment (e.g., a sandbox); and determining whether the potential malware sample is associated with a known malware family based on a profile signature. In some embodiments, the virtual machine environment is an instrumented virtual machine environment for monitoring potential malware samples during execution. |
| US09165134B2 |
Method for providing authorized access to a service application in order to use a protected resource of an end user
The protected resource, typically an API, is exposed by endpoints of a plurality of administrative domains. The endpoints are previously unknown by said service application and the method further comprises: i. using an intermediate or global entity for: a) selecting one of said administrative domains based on flexible criteria (i.e. at least on the identity of said end user but also considering varying user or service preferences); and b) performing, said selected administrative domain, a secure authorization to grant access to said end user by means of an open protocol; and ii. providing, said selected administrative domain to said service application, once performed said secure authorization, direct or proxy access to said user's protected resource via the endpoint established by said intermediate entity. |
| US09165132B2 |
Method of authenticating password and portable device thereof
A method of authenticating a password and a portable device thereof are provided. The method includes: displaying an input keyboard on which a plurality of objects are arranged; changing an object arranged on the input keyboard according to a manipulation of a user; and if an object pattern arranged in a designated position of the input keyboard corresponds to a preset password pattern, authenticating the user. Therefore, it is difficult to use artifacts on the display screen to trace a password after entry, and thus security is improved. As a result, a protection of personal information of a user is strengthened. |
| US09165129B2 |
Keyboard as biometric authentication device
Various embodiments are generally directed to use of a keyboard as a biometric authentication device. In one embodiment, for example, an apparatus comprises a processor circuit executing a sequence of instructions causing the processor circuit to receive a signal indicative of a keypress of at least one key of a keyboard communicatively coupled to the apparatus, and indicative of at least one physical characteristic associated with the keypress; compare the at least one physical characteristic to at least one stored physical characteristic associated with at least one authorized user of the apparatus; and determine if the keypress is associated with at least one authorized user of the apparatus based on the comparison. Other embodiments are described and claimed herein. |
| US09165128B1 |
System and method of securing content from public display on a mobile communication device
The present invention relates generally to a system and method of securing content from public display on mobile communication devices using an application program to categorize, encrypt and hide data providing added security in the event of loss or misuse, wherein the application program is configured for receiving a command to hide at least one content of a data category; storing and hiding the at least one content responsive to the command into a respective data category in a hidden directory by converting the content into concealed data, unavailable for display unless an alternate command is received and the user's identity is authenticated; displaying all content for the data category while excluding the concealed data from the display; and revealing the concealed data when the display area substantially adjacent to a corresponding icon for the data category is engaged on the display screen and the user's identity is verified. |
| US09165127B2 |
Working machine, data communcation system for working machine, operation system for working machine, and setting change system for working machine
A working machine is provided with a control device that can make wireless communication with a mobile terminal storing a mobile-use ID code and stores a working machine-use ID code, wherein the control device is provided with: ID code checking means adapted to check the mobile-use ID code obtained by ID code obtaining means and the working machine-use ID code with each other; data communication means adapted, in the case where as a result of the checking by the checking means, matching between the ID codes is established, to allow data communication between the mobile terminal and the control device, and in the case where the matching is not established, not to allow the data communication; and ID code registration means adapted to register the working machine-use ID code in the mobile terminal as the mobile-use ID code. |
| US09165124B1 |
Systems and methods for identifying a returning web client
Methods and systems are provided for identifying unique devices and/or unique users of a web-based system within constraints of an external application. In some embodiments the process comprises receiving request information from a client device at an application server, using such information to form a device fingerprint, and attempting to match the newly-formed fingerprint with exactly one fingerprint stored in a database of previously-formed fingerprints. Some embodiments utilize a two-stage Locality-Sensitive Hash query technique. The client device fingerprint may be converted into a series of LSH values which may be used to find a matching fingerprint. A first stage may query input LSH values against LSH values in a data store, and a second stage may query LSH values temporarily held in volatile memory, thereby minimizing network traffic and reducing a total process time. |
| US09165122B2 |
Content reproducing device, content reproducing method, and content reproducing system
According to one embodiment, a content reproducing device is provided with connection unit and reproducing unit. The connection unit connects a license server and removable medium to each other in such a manner that mutual authentication can be carried out between the license server and removable medium, and rights information can be downloaded from the license server to the removable medium. The reproducing unit carries out mutual authentication between itself and the removable medium and, when the authentication is successful, acquires rights information recorded on the removable medium to thereby decrypt the encrypted content item delivered by the content server on the basis of the rights information, and subject the decrypted content item to streaming reproduction. |
| US09165120B1 |
Service manifests
Generally described, aspects of the present disclosure relate to for managing the configuration and security policies of hosted virtual machine networks. Hosted virtual machine networks are configured in a manner such that a virtual machine manager component can establish service manifests that correspond to information required by the virtual machine network from a user/customer. The virtual machine manager component can also publish in the service manifests contractual information, such as security risk assessments, that are deemed to have been provided and accepted by the user/customer in instantiating virtual machine networks. If the processed service manifest information remains valid, a substrate network process requests or independently instantiate services or components in accordance with the configuration information and security risk information included in the processed service manifest. |
| US09165119B2 |
Power injector with keep vein open functionality
Disclosed are systems and methods for power injectors incorporating a keep vein open functionality that is operable when an injection protocol (112) is suspended. The injector includes control logic (110) configured to include the injection protocol (112), and a separate drip mode injection protocol (114) executable only during a suspension of the injection protocol (112). In one embodiment, the drip mode injection protocol (114) is automatically or manually initiated immediately after and in response to the suspension of the injection protocol (112). In another embodiment, the drip mode injection protocol (114) is automatically initiated after a predetermined delay from start of the suspension of the injection protocol (112). The configuration parameters for the drip mode injection protocol (114) may be programmable prior to the initiation of an injection procedure, immediately prior to the execution of the drip mode injection protocol (114), or hard-coded into the injector. |
| US09165116B2 |
Patient data mining
The present invention provides a data mining framework for mining high-quality structured clinical information. The data mining framework includes a data miner that mines medical information from a computerized patient record (CPR) based on domain-specific knowledge contained in a knowledge base. The data miner includes components for extracting information from the CPR, combining all available evidence in a principled fashion over time, and drawing inferences from this combination process. The mined medical information is stored in a structured CPR which can be a data warehouse. |
| US09165114B2 |
Method and system for characterizing and visualizing electromagnetic tracking errors
A calibration/surgical tool includes an electromagnetic sensor array of two or more electromagnetic sensors in a known geometrical configuration. Electromagnetic tracking errors are characterized by a mapping of pre-operative absolute and relative errors based on a movement of a calibrated calibration/surgical tool through a pre-operative electromagnetic field. Using statistical mapping, a desired absolute error field is measured either in the clinic as the part of daily quality control checks, or before the patient comes in or in vivo. A resulting error field may be displayed to the physician to provide clear visual feedback about measurement confidence or reliability of localization estimates of the absolute errors in electromagnetic tracking. |
| US09165110B2 |
Web-hosted engine for continuously improving the identification of safer products for administration
Genetic information relating to clinically significant attributes are generated as encrypted molecular signatures, which are provided to a subscriber to be carried as a card or in another form, including for display by a subscriber's computer or smart-phone or PDA. Different features of an individual's molecular attribute profile are preferably each represented by a particular shape, and the encryption can be by changing the color, or spatial orientation of the shapes. The signature is periodically updated as new clinically significant attributes become known. The process of updating the signature and using it to obtain suitable products (which don't have an unacceptable risk of generating an adverse reaction or outcome) is also described. |
| US09165109B2 |
Sequence assembly and consensus sequence determination
Computer implemented methods, and systems performing such methods for processing signal data from analytical operations and systems, and particularly in processing signal data from sequence-by-incorporation processes to identify nucleotide sequences of template nucleic acids and larger nucleic acid molecules, e.g., genomes or fragments thereof. In particularly preferred embodiments, nucleic acid sequences generated by such methods are subjected to de novo assembly and/or consensus sequence determination. |
| US09165100B2 |
Methods and apparatus to map schematic elements into a database
A method for mapping an element of an engineering schematic into a schematic element database is provided. The method electronically scans a schematic to recognize a plurality of elements visually represented in the schematic, wherein each of the plurality of elements is associated with predefined schematic element visual attributes; and maps each of the plurality of recognized elements to any one of a plurality of saved database elements, based on common visual attributes. |
| US09165098B1 |
Machine readable products for single pass parallel hierarchical timing closure of integrated circuit designs
In one embodiment of the invention, a method includes partitioning an integrated circuit design into a hierarchy of a top level and a plurality of partitions, wherein the top level includes a top level netlist and each partition includes a partition netlist; receiving data path timing budgets and clock path timing budgets for each of the plurality of partitions of the integrated circuit design; and generating a timing budget model of each partition in response to the respective data path timing budgets and clock path timing budgets, wherein each timing budget model includes an intra-partition clock timing constraint for each respective partition for independent implementation of the top level. |
| US09165095B2 |
Target point generation for optical proximity correction
A method performed by a computer processing system includes receiving a design pattern for an integrated circuit, applying a function to the design pattern to generate a model contour, generating a plurality of Optical Proximity Correction (OPC) target points along the model contour, adjusting the design pattern to create an adjusted pattern, and performing a simulation on the adjusted pattern to create a simulated contour. |
| US09165089B2 |
Presenting unique search result contexts
Presenting unique search result contexts, including: receiving, by a search result presentation module, a plurality of search results generated in response to a search query, wherein each search result includes context information associated with the search result; identifying, by the search result presentation module for each search result, a displayable portion of the context information associated with the search result; determining, by the search result presentation module for each search result, whether the displayable portion of the context information is a duplicate of the displayable portion of the context information for another search result; and responsive to determining that the displayable portion of the context information is a duplicate of the displayable portion of the context information for another search result, updating, by the search result presentation module, the displayable portion of the context information for the search result. |
| US09165080B2 |
Systems and methods for creating scalable presence subscriptions in federated presence environments
Systems and associated methods for providing scalable presence subscriptions in federated presence environments are described. Embodiments provide for intelligent addition of subscriptions to a presence system. Embodiments identify if a virtualized presentity (corresponding to a new query) can be composed from existing virtualized presentities, and if so, corresponding query processing cells (QPCs) (servicing existing queries) are reused to retrieve the presence information (partially or fully) for the new incoming query. Embodiments organize the existing QPCs into a hierarchy such that a QPC/virtual presentity at a higher layer fetches presence information of all or some presentities from QPCs/virtual presentities at lower layer(s) to service the new query. |
| US09165074B2 |
Systems and methods for performing geo-search and retrieval of electronic point-of-interest records using a big index
Methods and systems for providing a geo-search engine capability for large point-of-interest record datasets are disclosed. These methods and systems employ a Partition-by-Query index containing key-values pairs corresponding to keys reflecting concept-ordered geo-search phrases and values reflecting ordered lists of point-of-interest record references that are responsive to the concept-ordered geo-search phrase in a corresponding key. A large Partition-by-Query index may be partitioned across multiple servers depending on the size of the index, or the size of the index may be reduced by compressing query-references pairs into clusters. The methods and systems described herein may provide suggestions and spelling corrections to the user, thereby improving the user's geo-search engine experience while meeting user expectations for geo-search quality and responsiveness. |
| US09165070B2 |
System and method for visual search in a video media player
There is provided a system and method for visual search in a video media player. There is provided a computing device for performing a visual search in video files comprising a display, a memory, a video media player application in the memory, and a processor configured to store into the memory search terms by allowing a user to visually select objects as search terms using a user interface on the display, initiate a search using the search terms, obtain search results comprising time offsets and play durations within the video files, each play duration containing at least one frame corresponding to the search terms, and display navigational controls in the user interface for presenting the search results, including selectable graphical thumbnail images or preview videos. A user can select objects via outlined, highlighted, or otherwise visually identified objects in a video frame, the selecting enabled by associated search metadata. |
| US09165065B2 |
Terminology management database
Various methods and systems are provided to allow different users to search for company-specific terms in a terminology database maintained by a company or website. Information about the terminology provided to the user may include acceptability of use, details of acceptable or unacceptable use, description, synonyms, and related terms. Terms not found in the database may be added from a submission by the user. As a result, users may better understand terminology used by the company or website. In other embodiments, terminology can be searched for acceptable use in social networking sites or other areas or searched for plagiarism. |
| US09165063B2 |
Organising and storing documents
A data handling device has access to a store of existing metadata pertaining to existing documents having associated metadata terms. It analyses the metadata to generate statistical data as to the co-occurrence of pairs of terms in the metadata of one and the same document. When a fresh document is received, it is analysed to assign to it a set of terms and determine for each a measure of their strength of association with the document. Then, for each term of the set, a score is generated that is a monotonically increasing function of (a) the strength of association with the document and of (b) the relative frequency of co-occurrence of that term and another term that occurs in the set; metadata for the fresh document are then selected as the subset of the terms in the set having the highest scores. |
| US09165059B1 |
Flexible bit field search method
Systems, methods, and other embodiments associated with flexible bit field search are described. According to one embodiment, an apparatus includes a filter configured to receive data packets and a descriptor. The descriptor includes a header and at least one filter descriptor rule. The header identifies a filtering mode. The at least one filter descriptor rule includes instructions that identify a filtering operation in the filtering mode. The filter is also configured to filter the data packets based, at least in part, on the filtering operation identified in the at least one filter descriptor rule. |
| US09165057B1 |
Method and apparatus for extracting queries from webpages
Methods for extracting queries from webpages is provided. Methods may include receiving a plurality of queries. Each query in the plurality may be input into a search box located on a public-facing webpage. Methods may include receiving content associated with each of the public-facing webpages. Methods may include receiving identifying information associated with an inputter of each query. Methods may include selecting at least one query from the plurality of queries based at least in part on factors. The factors may include query length. The factors may include query rank. The query rank may be based in part on the magnitude of predetermined terminology included in the at least one query. The predetermined terminology may be stored on a computer-readable memory. The factors may include the grammatical relationship between query terms. The factors may include the identifying information about the inputter associated with the at least one query. |
| US09165056B2 |
Generation and use of an email frequent word list
Technologies are described herein for generating a mailbox specific frequent word list associated with a mailbox. In one method, an index scan is performed on catalogs to retrieve search data mapping words to emails containing the words. The search data is provided across multiple mailboxes. A universal frequent word list is generated based on the search data. The mailbox specific frequent word list is generated based on the universal frequent word list. |
| US09165046B2 |
Core data synchronization systems and methods
To synchronize data between a remote database and a local object-graph-and-persistence-framework, a synchronization framework receives messages from the local object-graph-and-persistence-framework indicating that a locally-managed object has been retrieved from a local datastore and instantiated or that the locally-managed object has been created, modified, or deleted. When the synchronization framework determines that the message was instigated by a local user's activity (as opposed to a background synchronization process), the synchronization framework synchronizes the locally-managed object with the remote database. |
| US09165041B2 |
Products information management assistance apparatus
The disclosed invention provides a technique that assists in selecting a proper standard part independently of production achievements of parts and information which is arbitrarily input by a user regarding specification items to decide on a similarity between parts. Disclosed is a products information management assistance apparatus that decides on standard part information based on past products information records. The apparatus includes a products information storing unit that stores information on parts registered in records such as required specifications in the past, parts organization, parts specifications, and cost; a similarity-between-parts calculating unit that calculates a similarity between parts registered in records from parts specifications, a parts standardization effect calculating unit that calculates an effect if the above parts have been standardized in a scope in which they are grouped by similarity; and a standardization analysis result display unit that displays the parts standardization scope and standardization effect together. |
| US09165038B1 |
Interpreting adjacent search terms based on a hierarchical relationship
A computer-implemented method may include receiving, from a device, a search query that includes search terms, parsing the search terms into combinations of search terms, where each of the combinations includes one or more adjacent search terms, determining whether a hierarchical relationship exists for the one or more adjacent search terms of each of the combinations, generating one or more interpretations for each of the combinations based on whether the hierarchical relationship exists for the one or more adjacent search terms, performing a search based on at least one of the one or more interpretations to identify search results, generating a search result document containing the search results, and providing, to the device, the search result document. |
| US09165036B2 |
Streaming transaction notifications
Methods and systems are provided for identifying data transactions satisfying a streaming query and providing data corresponding to those data transactions to subscribed client devices. One exemplary method involves a server initiating a data transaction for a database entry in a database in response to input data received from a client device, determining whether the data transaction satisfies a streaming query, and indicating an association between the database entry and the streaming query when the data transaction satisfies the streaming query. |
| US09165035B2 |
Differential dataflow
The techniques discussed herein efficiently perform data-parallel computations on collections of data by implementing a differential dataflow model that performs computations on differences in the collections of data. The techniques discussed herein describe defined operators for use in a data-parallel program that performs the computations on the determined differences between the collections of data by creating a lattice and indexing the differences in the collection of data according to the lattice. |
| US09165030B1 |
Showing prominent users for information retrieval requests
Implementations of the present disclosure include actions of receiving a search query from a searching user, in response to the search query matching a trigger query, receiving a first set of authoritative users, processing the first set of authoritative users to define a second set of authoritative users, and transmitting instructions to display data associated with authoritative users of the second set of authoritative users with search results responsive to the search query. |
| US09165027B2 |
Dynamic directory control registration
Systems and methods for extending the capability of a directory processor by, for example, registering a control are presented. This control can be a non-native control, or a modification to a native control. Further, this disclosure describes example of systems and methods for performing a directory operation, which may include one or more controls. At least some of the one or more controls may be non-native or dynamic controls. In some cases, some of the controls may be native controls. |
| US09165019B2 |
Self recovery
A method, article of manufacture, and apparatus for restoring data. In some embodiments, this includes receiving a request from a requestor to recover an object, determining segments of the object, identifying any segments of the object residing in the requestor, and processing the recovery request based on the identified segments residing in the requestor. In some embodiments, segments of the object includes hash values of the object. In some embodiments, processing the recovery request based on the determined segments includes using the identified segments residing in the requestor to reconstitute the object. |
| US09165017B2 |
Retrieving images
A system includes: receiving first information about a device, where the first information includes data corresponding to a location of the device and a time at which the device was at the location; identifying one or more images associated with second information that is within a range of the first information, where the second information for an image includes data corresponding to a location at which the image was captured and a time at which the image was captured, and where the location at which the image was captured and a time at which the image was captured are within a range of the location of the device and the time at which the device was at the location; and retrieving the one or more images associated with the second information. |
| US09165014B1 |
Methods and apparatus for multi-resolution replication of files in a parallel computing system using semantic information
Techniques are provided for storing files in a parallel computing system using different resolutions. A method is provided for storing at least one file generated by a distributed application in a parallel computing system. The file comprises one or more of a complete file and a sub-file. The method comprises the steps of obtaining semantic information related to the file; generating a plurality of replicas of the file with different resolutions based on the semantic information; and storing the file and the plurality of replicas of the file in one or more storage nodes of the parallel computing system. The different resolutions comprise, for example, a variable number of bits and/or a different sub-set of data elements from the file. A plurality of the sub-files can be merged to reproduce the file. |
| US09165012B2 |
Periodic file system checkpoint manager
A periodic checkpoint method for a file system replication source. The method comprises generating a first checkpoint at a first time on a file system replication source and identifying a set of data objects from the replication source that have been modified during a time period between the first time and a subsequent second time. A periodic checkpoint is then generated at the second time on the file system replication source by using the set of data objects. |
| US09165011B2 |
Concurrent calculation of resource qualification and availability using text search
A system, for concurrent calculation of resource qualifications (e.g., skills, educational degree, etc) and availability (e.g., availability to work on a project) using text search. The method commences by initiating a flow for requesting resources, the resource request comprising a qualification requirement indication and a time period requirement indication. The method further comprises retrieving candidate resource documents in a manner so as to calculate an overall match score that is based not only on qualifications, but also on availability. The scoring uses a recoded candidate resource document that comprises qualification attributes as well as time period availability to form an overall match score. The recoding can be performed in an administrative flow (e.g., a batch process, and/or a periodically executed update process), and the administrative flow creates recoded candidate resource document that are suited for use with a text search engine capable of processing an extensible markup language document. |
| US09165005B2 |
Method and apparatus utilizing non-uniform hash functions for placing records in non-uniform access memory
Method and apparatus for storing records in non-uniform access memory. In various embodiments, the placement of records is localized in one or more regions of the memory. This can be accomplished utilizing different ordered lists of hash functions to preferentially map records to different regions of the memory to achieve one or more performance characteristics or to account for differences in the underlying memory technologies. For example, one ordered list of hash functions may localize the data for more rapid access. Another list of hash functions may localize the data that is expected to have a relatively short lifetime. Localizing such data may significantly improve the erasure performance and/or memory lifetime, e.g., by concentrating the obsolete data elements in one location. Thus, the two or more lists of ordered hash functions may improve one or more of access latency, memory lifetime, and/or operation rate. |
| US09164999B2 |
Managing the storage of media content
A method for managing media storage. The method includes determining, by a computer, that storage space is needed on a storage device, wherein the storage device stores one or more media files. The method includes determining a likely viewing device for a media file selected from the one or more media files and converting the media file from a first format to a second format, based on the determined likely viewing device. |
| US09164997B2 |
Recognizing cloud content
Recognizing cloud content techniques are described herein. A designated storage location for cloud content corresponding to a service is registered locally at a device. Files stored in association with the registered storage location may be recognized as cloud content of the corresponding service. The recognized cloud content may be handled in various ways to customize the user experience and tailor interaction with cloud content. For example, icons or other visual identifiers may be used within device, operating system and/or application user interfaces to represent an association of files with a particular service based on recognition of the files as cloud content. Additionally, a registered storage location for a device may be employed to obtain relative paths to files that may be used to roam file activity lists between different devices. |
| US09164992B2 |
Application update system, method and computer program product
In accordance with embodiments, there are provided mechanisms and methods for storing documents that are being tracked in an on-demand service. These mechanisms and methods for storing documents in an on-demand service can enable embodiments to provide the sharing of documents and the storing of the documents in association with a tag. The ability of embodiments to provide the sharing of documents and the storing can enable an efficient searching for a shared document. In an embodiment, the shared document is categorized upon being stored. |
| US09164989B2 |
Translation processing device, non-transitory computer readable medium, and translation processing method
A translation processing device includes a setting unit classifying languages into categories and setting a typical language for each category, a first converter converting between a sentence in a first language and a sentence in a first typical language, a second converter converting between a sentence in the first typical language and a sentence in a second typical language, and an acquiring unit acquiring information of an input sentence, the first language, and a second language. If the first language is not the first typical language, the first converter converts the input sentence into a sentence in the first typical language. If the first and second languages belong to different categories, the second converter converts the sentence into a sentence in the second typical language. If the second language is not the second typical language, the first converter further converts the sentence into a sentence in the second language. |
| US09164983B2 |
Broad-coverage normalization system for social media language
A method for identification of a standard text token in a dictionary that corresponds to a non-standard token identified in text includes identification of a first standard token that is associated with the non-standard using a predetermined conditional random field (CRF) model and identification of a second standard token that is associated with the non-standard token using a spell checker. The method further includes identification of noisy channel scores using data from the CRF model and the spell checker for the first standard token and the second standard token, respectively. The method further includes presentation of one of the first and second standard tokens having the greatest identified noisy channel score to a user with a user interface device. |
| US09164982B1 |
Methods and apparatus for automatically generating text
Some embodiments relate to identifying grammatical errors in text that has been automatically generated from a template. The text may be scanned to identify, for example, errors in punctuation, spacing, and capitalization. When an error in the text is identified, it may be corrected. Some embodiments relate to automatically formatting lists in text that is generated from a template. For example, a template may include a tag that specifies a list of elements. A formatting parameter may be determined that specifies whether to format the list as an enumerated list or a textual sentence. Output text may then be generated that includes the list in the proper format. |
| US09164972B2 |
Managing objects in panorama display to navigate spreadsheet
A panorama display application shows objects from a spreadsheet such as charts in primary screen of a mobile device adjoined by left and right virtual screens. The application overlays interaction controls such as sort and filter functions on the object. The application also provides additional interaction controls for the object on the left virtual screen and associated objects links on the right virtual screen. The application may expose the additional interaction controls and the associated objects links by overlaying portions of the virtual screens on the primary screen. The application fluidly shifts content from virtual screens to the primary screen subsequent to detected user action on the overlaid portions. |
| US09164969B1 |
Method and system for implementing a stream reader for EDA tools
Disclosed is a method, system, and computer program product for implementing efficient access to stream data. The present approach implements a stream reader that supports either reading the entire layout (e.g., loading the contents of the user-specified top cell and all its progeny) into memory, or just a portion of it (e.g., loading only the contents of the user-specified top cell and its progeny that overlapped a user-specified bounding box). Some approaches provide a mechanism to implement parallelized or multithreaded reads of the stream data. |
| US09164966B1 |
Determining sizes of content items
Systems and methods of distributing content items to a resource via a computer network are described. A statistical distribution representing display sizes of content items with respect to a slot having a plurality of parameters may be generated. A request to provide a content item for display in a slot of the resource may be received. Content items for display in the slot of the resource may be selected based on the statistical distribution. Selecting content items for display in the slot may include optimizing an appearance of a content item in the slot or maximizing a number of a plurality of content items in the slot. |
| US09164965B2 |
Interactive topological views of combined hardware and software systems
A method and system for visualizing a system. The method includes obtaining a context managed entity from a client system, wherein the context managed entity corresponds to software executing on a computer system, querying a managed entity repository to obtain a plurality of managed entities linked to the context managed entity, wherein the plurality of managed entities comprises a software managed entity and a hardware managed entity, and generating a node in a topology model object for each of the plurality of managed entities. The method further includes generating a link object in the topology model object for each link between managed entities in the plurality of managed entities and rendering a topology graph comprising each node and each link object in the topology model object. |
| US09164964B2 |
Context-aware text document analysis
An analysis device for analyzing a text document is provided. The analysis device includes a context storage unit configured to store context information that shows a position of a character set of a predetermined context in the text document. The analysis device also includes an index storage unit configured to store index information that shows a position of a word in the text document, for each word of a plurality of words contained in the text document. An input unit is configured to input a target word. A position detection unit is configured to detect from the index information a position of the target word contained in the text document. A frequency detection unit is configured to detect an appearance frequency of the target word per each type of context in the text document based on the position of the target word and on the context information. |
| US09164958B2 |
Simulating method for kneaded state of fluid
Computerized analysis method for estimating a kneaded state of a fluid, comprises: a step of generating a finite element model of a kneading space within which the fluid is kneaded; a step of defining a model of the fluid; a step of defining the fluid model in the kneading space model at a filling rate of less than 100% and defining necessary kneading conditions; a particle tracking step in which, a flow calculation of the fluid model is made, and virtual particles disposed in the fluid model are tracked; an estimating step in which the positional data of the virtual particles are compared with those in an ideal kneaded state of the fluid model, and the degree of kneading of the fluid model is calculated. The ideal kneaded state is calculated in the estimating step, based on existence positions of the fluid model calculated in the particle tracking step. |
| US09164957B2 |
Systems and methods for telematics monitoring and communications
Certain example embodiments of the disclosed technology may include systems and methods for telematics monitoring. An example method is provided that includes receiving, at a mobile computing device, and from a Vehicle Identification Unit (VIU), identification (ID) data representing a first vehicle. The method further includes receiving, by the mobile computing device, sensor data from one or more sensors associated with the mobile computing device. Certain embodiments may further include receiving, at an Operational Measurement Unit (OMU), an operation indication associated with the first vehicle. The OMU may include an operational measurement component configured to advance an operational count in response to receiving the operation indication. Certain example embodiments may include transmitting telematics data by the mobile computing device. In certain embodiments, the telematics data may include least a portion of one or more of the ID data, the sensor data, and/or the operational count data. |
| US09164956B2 |
Vehicle control apparatus and method using private medical information, and mobile terminal
A vehicle control apparatus and method using private medical information, and a mobile terminal are provided. An optimized driving environment is provided by searching controllable vehicle control nodes in a vehicle, upon reception of a driver's private medical information; determining if there is vehicle control information for controlling the searched vehicle control node; and controlling the vehicle control nodes using vehicle control information that corresponds to the received driver's private medical information if there is the vehicle control information for controlling the searched control nodes. |
| US09164950B2 |
Use tag clouds to visualize components related to an event
A method, system, and computer program product for displaying components assigned to events produced by resources, includes: registering a new resource by generating a label to which is associated a system specific device identifier used by the new resource within a computing environment; storing in a mapping table the generated label identifying the registered new resource together with an associated system specific device identifier; and updating the mapping table by associating to the label any other system specific device identifier used by the new resource within the computing environment; receiving events produced by resources when being executed within the computing environment, each event being associated with a list of labels for the resources relevant for the generation of the event; and maintaining a tag cloud including different tags, the different tags including labels for the resources associated with the received events to be displayed as components. |
| US09164947B1 |
Method and system for inserting cookies in I/O commands
A system having an initiator adapter coupled to a computing system and communicating with a target adapter coupled to a target controller managing a plurality of storage devices is provided. The initiator adapter initiates an input/output (I/O) request for the target adapter; assigns an exchange identifier for processing the I/O request and embeds a cookie in the exchange identifier for performing a function. The target adapter then sends a response to the I/O request to the initiator adapter with the exchange identifier and the cookie; and the initiator adapter extracts the cookie from the exchange identifier received from the target adapter. |
| US09164945B2 |
Devices, systems, and methods to synchronize parallel processing of a single data stream
Disclosed are methods and devices, among which is a system that includes one or more pattern-recognition processors, such as in a pattern-recognition cluster. The pattern-recognition processors may be activated to perform a search of a data stream individually using a chip select or in parallel using a universal select signal. In this manner, the plurality of pattern-recognition processors may be enabled concurrently for synchronized processing of the data stream. |
| US09164943B2 |
Self correction logic for serial-to-parallel converters
Embodiments of the invention describe an apparatus, system and method for executing self-correction logic for serial-to-parallel data converters. Embodiments of the invention receive one of a plurality of serial data streams from a peripheral device, each of the serial data streams having one or more bits. In response to detecting that a shift register chain includes a register select value, embodiments of the invention may store the received serial data stream in one of a plurality of data registers, wherein the one data register is selected based, at least in part, on a position of the register select value in the shift register chain. In response to detecting the shift register chain does contain the register select value, embodiments of the invention may insert the register select value at a register of the shift register chain. |
| US09164941B2 |
Storage system group
A first storage system comprises a first logical volume, and a first controller that has a first memory. A second storage system comprises a second physical storage device that constitutes the basis of a second logical volume and a journal area, and a second controller that has a second memory. At least the first memory stores a write unit size, which is the size of a write data element. The journal area is a storage area in which is stored a journal data element, which is a data element that is stored in any block of a plurality of blocks configuring the first and/or second logical volume, or a data element that is written to this block. The size of the journal data element, and the size of the respective blocks that are managed as the respective components of the first and second logical volumes are the write unit size. |
| US09164940B2 |
Methods and systems to accomplish variable width data input
Disclosed are methods and systems for variable width data input to a pattern-recognition processor. A variable width data input method may include receiving bytes over a data bus having a first width and receiving one or more signals indicating the validity of each of the one or more bytes. The valid bytes may be sequentially provided to a pattern-recognition processor in an 8-bit wide data stream. In an embodiment, a system may include one or more address lines configured to provide the one or more signals indicating the validity of the bytes transferred over the data bus. The system may include a buffer and control logic to sequentially process the valid bytes. |
| US09164939B2 |
Circuitry and techniques for updating configuration data in an integrated circuit
A method of operating an integrated circuit may include receiving an update request via an input-output protocol, such as the Peripheral Interconnect Component Express (PCIe) protocol. The integrated circuit is placed in an update mode when the update request is received. State information is stored in predefined registers on the integrated circuit and configuration data on the integrated circuit may be subsequently updated. An asserted update mode signal is stored in a status register on the integrated circuit to indicate that the integrated circuit is in the update mode. The configuration data may include a core configuration portion and a peripheral configuration portion. When the integrated circuit is in the update mode, only the core configuration is updated while the peripheral configuration portion may be preserved. |
| US09164938B2 |
Method to integrate ARM ecosystem IPs into PCI-based interconnect
Methods and apparatus for integrating ARM-based IPs in computer system employing PCI-based fabrics. An PCI-based fabric is operatively coupled to an ARM-based ecosystem employing an ARM-based fabric such as OCP, AHB, or BVCI via a corresponding fabric-to-fabric bridge. Transactions between IP operatively coupled to the PCI-based fabric and IP in the ARM-based ecosystem are facilitated by applying applicable ordering and conversions operations via the fabric-to-fabric bridge and/or fabrics. For example, posted writes originating from IP coupled to the PCI-based fabric are converted to non-posted writes and serialized via the fabric-to-fabric bridge and forwarded to the ARM-based ecosystem. |
| US09164936B2 |
System and method for regulating direct memory access descriptor among multiple execution paths by using a link to define order of executions
An apparatus includes an integrated circuit that includes a processing core and a direct memory access (DMA) engine. The DMA engine is adapted to process descriptors to control DMA communications. The descriptors contain data indicating communication endpoints that are associated with the DMA communications. The DMA engine is adapted to use other data contained in at least one of the descriptors to control branching of descriptor execution among multiple execution paths. |
| US09164934B2 |
System and method for controlling bus-networked devices via an open field bus
A system for controlling bus-networked devices includes a gateway including a memory unit and having an interface to an open field bus. A power supply unit supplies primary power for the gateway and bus subscribers. An auxiliary power supply unit supplies auxiliary power for the bus subscribers independent of bus functionality. A pluggable connection cable is electrically connects the gateway to the bus subscribers and transmits the primary and the auxiliary power and control and/or status information between the gateway and the bus subscribers. An application bus networks the bus subscribers to each other and is operable by the connection cable. A bus controller writes a target bus configuration of the application bus and stores the target bus configuration in a non-volatile manner in the memory unit. The bus controller is also configured to overwrite the target bus configuration with a present, actual bus configuration. |
| US09164932B2 |
Protocol engine for processing data in a wireless transmit/receive unit
A protocol engine (PE) for processing data within a protocol stack in a wireless transmit/receive unit (WTRU) is disclosed. The protocol stack executes decision and control operations. The data processing and re-formatting which was performed in a conventional protocol stack is removed from the protocol stack and performed by the PE. The protocol stack issues a control word for processing data and the PE processes the data based on the control word. Preferably, the WTRU includes a shared memory and a second memory. The shared memory is used as a data block place holder to transfer the data amongst processing entities. For transmit processing, the PE retrieves source data from the second memory and processes the data while moving the data to the shared memory based on the control word. For receive processing, the PE retrieves received data from the shared memory and processes it while moving the data to the second memory. |
| US09164927B2 |
Integrated circuit and memory data protection apparatus and methods thereof
A memory data protection apparatus including a storage device, a cipher, and a validator is provided. The storage device is embedded in a chip electrically coupled to an external memory for storing an offset value, a signature and a key. The cipher electrically coupled to the storage device and the external memory to receive the key includes an encrypter and a decrypter. The encrypter is capable of executing an encryption to output an encrypted data and an encrypted certified data. The decrypter is capable of executing a decryption to output a decrypted data. The validator electrically coupled to the storage device receives the signature, the offset value and the certified data and determines an access limit of the external memory by validating the certified data with the signature and the offset value. The memory data protection apparatus accesses an original data in the external memory according to the access limit. |
| US09164921B2 |
Dynamic reuse and reconfiguration of logical data objects in a virtual tape system
A method according to one embodiment includes selecting, by a processor, one of a WORM logical data object and a read-write logical data object for reuse as a new WORM logical data object, said processor maintaining data attributes bound to said selected logical data object until it is determined that said selected logical data object is available for reuse. At least one temporary data attribute is assigned to said selected logical data object while maintaining said data attributes bound to said selected logical data object The selected logical data object is mounted and a write command to beginning of logical data object is received to bind at least one data attribute to said selected logical data object to replace data attributes and data associated with said selected logical data object to reuse said selected logical data object as said new WORM logical data object. |
| US09164918B2 |
Maintaining processor resources during architectural events
In one embodiment of the present invention, a method includes switching between a first address space and a second address space, determining if the second address space exists in a list of address spaces; and maintaining entries of the first address space in a translation buffer after the switching. In such manner, overhead associated with such a context switch may be reduced. |
| US09164912B2 |
Conflict resolution of cache store and fetch requests
According to an embodiment, a computer system for cache management includes a processor and a cache, the computer system configured to perform a method including receiving a first store request for a first address in the cache and receiving a first fetch request for the first address in the cache. The method also includes executing the first store request and the first fetch request, latching the first store request in a store write-back pipeline in the cache, detecting, in the processor, a conflict following execution of the first store request and the first fetch request and receiving the first store request from a recycle path including the store write-back pipeline and executing the first store request a second time. |
| US09164910B2 |
Managing the storage of data in coherent data stores
A data processing apparatus comprises: at least one processor; having a private cache, a shared cache for storing data processed by the processor and by a further device, and coherency control circuitry. The coherency control circuitry is responsive to a write request from the further device to determine if data related to an address targeted by the write request is stored in the private cache, and if it is, forcing an eviction of the stored data from the private cache to the shared cache prior to perform the write to the shared cache. The data is stored in the private cache in conjunction with an indicator indicating if the stored data is consistent with data stored in a corresponding address in a further data store, and the stored data is evicted whether the stored data is indicated as being consistent or inconsistent. |
| US09164909B1 |
Method for the use of process identifiers to invalidate cached data in environments that allow processes to migrate between physical machines
A method for utilizing process identifiers to invalidate cached data is disclosed herein. The invention is a method for associating persistently stored data with an identifier of the process which created it, such that when the process that created the data is no longer present on the machine where the data is stored the data may be marked as invalid to prevent the use of “stale” data. |
| US09164908B2 |
Managing out-of-order memory command execution from multiple queues while maintaining data coherency
Responsive to selecting a particular queue from among at least two queues to place an incoming event into within a particular entry from among multiple entries ordered upon arrival of the particular queue each comprising a separate collision vector, a memory address for the incoming event is compared with each queued memory address for each queued event in the other entries in the at least one other queue. Responsive to the memory address for the incoming event matching at least one particular queued memory address for at least one particular queued event in the at least one other queue, at least one particular bit is set in a particular collision vector for the particular entry in at least one bit position from among the bits corresponding with at least one row entry position of the at least one particular queued memory address within the other entries. |
| US09164897B2 |
NAND flash memory interface controller with GNSS receiver firmware booting capability
An architecture of a NAND Flash memory module interface controller (NAND-controller) provides access to data stored in an external NAND Flash memory module, and a method of booting firmware. NAND-controller automatically boots firmware from the NAND Flash memory into primary RAM of a system-on-a chip used for GNSS receivers. NAND-controller has a first external interface to connect NAND Flash memory, a second external interface to set parameters of booting firmware, and two internal interfaces: a high-speed one (system interface) and a low-speed one (control interface) to be connected to two types of SoC internal busses. Data exchange between the CPU and NAND Flash memory is implemented using a static RAM buffer which is a part of the NAND-controller and available for reading and writing via high-speed interface. Parameters of the first external interface are set and current state of data exchange process is controlled by the CPU. |
| US09164894B2 |
Staggered programming for resistive memories
Subject matter disclosed herein relates to a memory device and method of programming same. In some embodiments, a memory device can be programmed by partitioning information into a plurality of chunks. Partitioning can be performed by determining a pattern of logic ones and zeroes, and setting a size of an information chunk based on the pattern of logic ones and zeroes. |
| US09164893B2 |
Nonvolatile semiconductor memory device
A semiconductor memory device includes a plurality of memory strings each of which includes a series of memory cells that each store data having n bits (n≧3), word lines, each connected in common to memory cells of different memory strings, and a control circuit which controls a first write operation and a second write operation. The first write operation includes a first step where a middle threshold voltage distribution is formed in memory cells and a second step following the first step where threshold voltages of some of the memory cells are increased, and the second write operation includes a step where threshold voltage distributions which correspond to the data having n bits is formed in the memory cells, wherein a write verify operation is performed after the first step but not after the second step of the first write operation. |
| US09164887B2 |
Power-failure recovery device and method for flash memory
A memory storage system includes multiple flash memory storage devices, multiple transmission interfaces and a central control device. The central control device has a cache and respectively coupled to the flash memory storage devices through the transmission interfaces. The central control device is for maintaining a block map table (BMT) to record a mapping relationship between multiple logical blocks and the physical blocks of the flash memory storage devices and the BMT is temporarily stored in the cache. In addition, the central control device uses the communication commands to access the physical blocks of the flash memory storage devices, in which the communication commands are transmitted to multiple controllers in the flash memory storage devices through the transmission interfaces and the controllers access the physical blocks according to communication commands. In this way, the system can effectively manage multiple flash memory storage devices. |
| US09164881B2 |
Method of determining deterioration state of memory device and memory system using the same
A method is provided for determining a deterioration condition of a memory device. The method includes calculating first information corresponding to a number of bits having a first logic value from data obtained by performing a first read operation on target storage region of the memory device using a first reference voltage as a read voltage, and calculating second information corresponding to a number of bits having a second logic value from data obtained by performing a second read operation on the target storage region using a second reference voltage as the read voltage. A deterioration condition of the target storage region is determined based on the first and second information. The first reference voltage is less than a first read voltage by which an erase state of the memory device is distinguished from an adjacent program state, and the second reference voltage is higher than the first read voltage. |
| US09164875B2 |
Error detection method, information processing circuit, and error detection computer program product
An error detection method is to detect an error in a program to control hardware, which executes predetermined processing, via a register. The error detection method includes: outputting a signal indicating whether the predetermined processing is in execution; detecting that a change is made in a register value in the register, which register value is related to control of the predetermined processing, and outputting a detection signal; and detecting an error when it is detected, based on the signal indicating whether the predetermined processing is in execution and on the detection signal, that the change is made in the register value while the predetermined processing is in execution. |
| US09164873B2 |
Monitoring method and apparatus for ARINC 653-based operating system
Disclosed herein is a monitoring method and apparatus for an ARINC 653-based operating system. In the monitoring method for an ARINC 653-based operating system according to the present invention, a client system transfers information about a breakpoint to a target system. The breakpoint information is set in the target system. A Micro Controller Unit (MCU) reads a Program Counter (PC). If the breakpoint information matches the PC, an interrupt is caused. A function contained in the breakpoint information matching the PC is executed. |
| US09164871B2 |
Evaluation of statement-level breakpoints
A method for evaluating a breakpoint in a line of source code includes encountering the breakpoint and evaluating whether the breakpoint is at the start of the line. If the breakpoint is at the start of the line, then the debugger stops at the breakpoint and tracks the breakpoint. If the breakpoint is not at the start of the line, then the debugger evaluates whether the breakpoint is reached via a back branch. If the breakpoint is not at the start of the line and is reached via a back branch, then the debugger stops at the breakpoint and tracks the breakpoint. If the breakpoint is not at the start of the line and is not a back branch target, then the debugger passes the breakpoint and tracks the breakpoint. |
| US09164870B2 |
Integrated fuzzing
Integrated fuzzing techniques are described. A fuzzing system may employ a container configured as a separate component that can host different target pages to implement fuzzing for an application. A hosted target file is loaded as a subcomponent of the container and parsed to recognize functionality of the application invoked by the file. In at least some embodiments, this involves building a document object model (DOM) for a browser page and determining DOM interfaces of a browser to call based on the page DOM. The container then operates to systematically invoke the recognized functionality to cause and detect failures. Additionally, the container may operate to perform iterative fuzzing with multiple test files in an automation mode. Log files may be created to describe the testing and enable both self-contained replaying of failures and coverage analysis for multiple test runs. |
| US09164869B2 |
Scalable and precise string analysis using index-sensitive static string abstractions
A disclosed method includes accessing one or more seeding specifications and a program including computer-readable code and applying the one or more seeding specifications to the program to identify for analysis seeds including strings for corresponding identified string variables. The method includes tracking flows emanating from the identified seeds. The tracking includes computing an integral offset into a tracked string variable for any statements causing such a computation. The tracking also includes providing a string representation based on the computed integral offset, wherein the provided string representation comprises a value of the integral offset and an indication of the corresponding tracked string variable. The tracking further includes modeling string manipulations of the tracked string variables using the string representations. Apparatus and program products are also disclosed. |
| US09164863B2 |
Detecting relative crowd density via client devices
Detecting crowds is provided. A location is selected in a set of locations a user of a client device wants to go to based on data within a profile associated with the user. A set of data inputs is monitored to determine a number of people currently at the selected location. Then, in response to determining that the number of people currently at the selected location is not greater than a user-defined threshold level of people for the selected location, a mapped route to the selected location is sent to the client device of the user. |
| US09164862B2 |
System and method for dynamically detecting storage drive type
An information handling system includes a cable, a backplane, and a processor. The cable is connected to a storage controller of the information handling system. The backplane is configured to connect a drive to the information handling system. The processor is in communication with the cable and with the backplane. The processor is configured to detect a presence of the drive, to output a pulse in response to the detection of the presence of the drive, to determine a first storage technology of the drive in response to the output pulse, to determine a second storage technology of the storage controller, to determine whether there is a misconfiguration between the first storage technology and the second storage technology, and to generate a notification when the misconfiguration is determined. |
| US09164860B2 |
Method for representation of safety-relevant information on a display and apparatus for the application of the method
A method to ensure the dependable representation of a safety-related information includes: entry of at least one input parameter into a processor, computerized processing of the input parameter transforming it into a sequence of image data that represents the input parameter, transmittance of the sequence of image data on to a display and representing the sequence of image data on the display. It is proposed to fead the sequence of image data and to a test unit and to perform a safety test in the form of computerized generation of a test code for the sequence of image data, comparing the test code with several existing reference codes, assigning the identified reference code to a corresponding possible value of the input parameter and comparing it with the value of the input parameter to generate either a positive or negative test result to initiate a safety-focused reaction. |
| US09164857B2 |
Scalable structured data store operations
Scalable structured data store operations can include logging a number of detected corrupted records within a scalable structured data store, repairing the number of corrupted records within a number of nodes of the scalable structured data store, and predicting hardware failure based on the logged number of corrupted records. |
| US09164856B2 |
Persistent messaging mechanism
A method comprising managing persistent messaging data in a volatile memory of a primary instance of a multi-node server, wherein the persistent messaging data is stored in a Hard Disk Device (HDD) and a Fast Persistent Memory (FPM) of the primary instance, repeatedly replicating the persistent messaging data to a corresponding HDD and a corresponding FPM of at least one standby instance of the multi-node server, repeatedly copying the persistent messaging data stored in the FPM or the HDD of the at least one standby instance to a Recovery Memory Region (RMR) in a volatile memory of the at least one standby instance, and responsive to a failure of the primary instance, initiating a failover procedure by the standby instance, wherein the failover procedure comprises reading at least some of the persistent messaging data from the RMR in lieu of the HDD of the at least one standby instance. |
| US09164852B2 |
System on chip fault detection
The invention relates to a method for fault identification in a System-on-Chip (SoC) consisting of a number of IP cores, wherein each IP core is a fault containment unit, and where the IP cores communicate with one another by means of messages via a Network-on-Chip, and wherein an excellent IP core provides a TRM (Trusted Resource Monitor), wherein a faulty control message which is sent from one non-privileged IP core to another non-privileged IP core is identified and projected by an (independent) fault container unit, as a result of which this faulty control message cannot cause any failure of the message receiver. |
| US09164851B2 |
Keyboard, video and mouse switch identifying and displaying nodes experiencing a problem
A method includes a keyboard, video and mouse (KVM) switch communicating over a network with service processors of a plurality of compute nodes, the KVM switch identifying a compute node from among the plurality of compute nodes that is experiencing one or more predetermined problems, and the KVM switch automatically generating a graphical user interface including the identity of the identified compute node for display on a display device that is connected to the KVM switch. |
| US09164850B2 |
System and method for archiving objects in an information store
The invention relates generally to archiving data items in an information store. More particularly, the invention provides a computerized method for identifying, in a first information store, a first data item satisfying retention criteria; copying the first data item to a second information store; creating, in the first information store, a second data item containing a subset of the data of the first data item selected based on the data type of the first data item; and replacing the first data item, in the first information store, with the second data item. |
| US09164844B2 |
Method and apparatus for detecting anomalies within indoor information
Methods, systems, computer-readable media, and apparatuses for detection of anomalies within indoor map information are presented. In some embodiments, the method includes receiving a digital map. The method may further include identifying one or more anomalies within the digital map using a software-based anomaly detection tool. The method may also include displaying one or more suggested corrections to a user based on the one or more identified anomalies. The method may additionally include correcting the one or more identified anomalies within the digital map. |
| US09164843B1 |
System and method for hybrid kernel and user-space checkpointing using a character device
A system, method, and computer readable medium for hybrid kernel-mode and user-mode checkpointing of multi-process applications. The computer readable medium includes computer-executable instructions for execution by a processing system. A multi-process application runs on primary hosts and is checkpointed by a checkpointer comprised of a kernel-mode checkpointer module and one or more user-space interceptors providing barrier synchronization, checkpointing thread, resource flushing, and an application virtualization space. Checkpoints may be written to storage and the application restored from said stored checkpoint at a later time. Checkpointing is transparent to the application and requires no modification to the application, operating system, networking stack or libraries. In an alternate embodiment the kernel-mode checkpointer is built into the kernel. |
| US09164841B2 |
Resolution of a storage error in a dispersed storage network
A method begins by a dispersed storage (DS) processing module identifying an encoded data slice having an error, where a storage unit of a dispersed storage network (DSN) stores the encoded data slice. The method continues with the DS processing module sending a lock command to the storage unit. The method continues with the DS processing module determining resolution for the error of the encoded data slice, where the resolution includes one or more of: rebuilding the encoded data slice, issuing a set of delete requests to storage units of the DSN regarding a set of encoded data slices, issuing a set of undo write requests to the storage units of the DSN regarding the set of encoded data slices, and issuing a set of roll-back write requests to the storage units of the DSN regarding the set of encoded data slices. |
| US09164840B2 |
Managing a solid state drive (‘SSD’) in a redundant array of inexpensive drives (‘RAID’)
Managing a solid state drive (‘SSD’) in a Redundant Array of Inexpensive Drives (‘RAID’), including: detecting, by a RAID engine, a number of cell failures of the SSD exceeding a predetermined threshold; responsive to detecting the number of cell failures of the SSD exceeding the predetermined threshold: redirecting, by the RAID engine, a write of data not originally stored in the RAID to a drive in the RAID other than the SSD; and redirecting, by the RAID engine, writes originally directed to data stored on the SSD to another drive in the RAID, including unmapping the data stored on the SSD. |
| US09164837B2 |
Transfer unit management
Method and apparatus for managing data in a memory, such as a flash memory. In accordance with some embodiments, a non-volatile memory is arranged into a plurality of blocks, with each of the blocks constituting an integral plural number N of fixed-sized, multi-bit transfer units. A processing circuit retrieves at least a portion of the data stored in a selected block to a volatile memory buffer in response to a transfer unit (TU) bit map. The TU bit map is stored in a memory and provides a multi-bit sequence of bits corresponding to the N transfer units of the selected block. The values of the bits in the multi-bit sequence of bits indicate whether the corresponding transfer units are to be retrieved. |
| US09164836B2 |
Cycling endurance extending for memory cells of a non-volatile memory array
Examples are disclosed for cycling endurance extending for memory cells of a non-volatile memory array. The examples include implementing one or more endurance extending schemes based on program/erase cycle counts or a failure trigger. The one or more endurance extending schemes may include a gradual read window expansion, a gradual read window shift, an erase blank check algorithm, a dynamic soft-program or a dynamic pre-program. |
| US09164834B2 |
Semiconductor memory devices, memory systems including the same and method of writing data in the same
In one embodiment, the semiconductor device includes a memory array and a control architecture configured to control reading data from and writing data to the memory array. The control architecture is configured to receive data and a codeword location in the memory array, select one or more data units in the received data based on a data mask, read a codeword currently stored at the codeword location in the memory array, error correct the read codeword to generate a corrected read codeword, form a new codeword from the selected data units of the received data and data units in the corrected read codeword that do not correspond to the selected data units, and write the new codeword to the memory array. |
| US09164833B2 |
Data storage device, operating method thereof and data processing system including the same
A data storage device includes a nonvolatile memory device; and a controller suitable for controlling an operation of the nonvolatile memory device in response to a request from an external device, wherein the controller comprises a victim block setup unit suitable for setting a victim block for a merge operation based on an error count, which is detected when a read operation of the nonvolatile memory device is performed, and for storing information of the victim block for the merge operation, and wherein the controller converts the victim block into a free memory block during the merge operation and reuses the free memory block to store data. |
| US09164831B2 |
Memory controller, semiconductor storage device, and decoding method
According to an embodiment, a memory interface that includes n number of channels and writes data subjected to an error correction encoding process having capable of correcting t symbols, n number of first error correction decoding units that perform an error correction decoding process of correcting s (s |
| US09164828B2 |
Systems and methods for enhanced data recovery in a solid state memory system
Systems and method relating generally to data processing, and more particularly to systems and methods for accessing a data set from a solid state storage device, using a data decoding circuit to apply a data decoding algorithm to the data set to yield a decoded output, where the decoded output includes at least one error, identifying at least one critical location in the data set, estimating a voltage associated with the data in the data set corresponding to the critical location, calculating soft information corresponding to the critical location based at least in part on the estimated voltage, and re-applying the data decoding algorithm to the data set guided by the soft information to yield an updated decoded output. |
| US09164825B2 |
Computing unit, method of managing computing unit, and computing unit management program
A computing unit includes an operating system that is connected with another computing unit via an information transmitting medium in a mutually communicable manner, wherein availability management middleware is interposed between a software component and the operating system and launches the software component as a child process, thus serving as a parent process of the software component. The operating system monitors a running status of the software component and reports abnormality information for the software component to the availability management middleware in the case in which an abnormality is detected in the software component. Upon acquiring the abnormality information, the availability management middleware reports the abnormality information for the software component to the other computing unit. |
| US09164823B2 |
Resetting a peripheral driver and prohibiting writing into a register retaining data to be written into a peripheral on exceeding a predetermined time period
An access method is executed by a multi-core processor system. The access method includes activating a driver that corresponds to a first CPU, based on a start of execution of a first application; starting measurement of an access time period, based on access of a peripheral device; outputting, when the access time period exceeds a predetermined time period, a detection signal to reset the driver; and prohibiting, when the access time period exceeds a predetermined time period, writing into a register retaining data to be written into the peripheral device from the first CPU. |
| US09164822B2 |
Method and system for key performance indicators elicitation with incremental data decycling for database management system
A method for processing signals from a data server system including generating, by a monitoring module on a monitoring facility, a plurality of frequency data items, where the monitoring facility comprises a central processing unit, obtaining, by the monitoring module, a first signal value from the data server system, where the signal value is a measurement of an element of the data server system, and calculating a plurality of fit errors for the plurality of frequency data items using the first signal value. The method further includes selecting a frequency data item of the plurality of frequency data items with a lowest fit error to obtain a selected frequency data item, removing a cyclic component of the first signal value using the selected frequency data item to obtain a first processed signal value, and displaying the first processed signal value on a graph. |
| US09164815B2 |
Method for calling application module and mobile terminal
A method for calling an application module and a mobile terminal thereof are provided in the present document, which can call the application module quickly during text editing. The method includes that: during the text editing, after the mobile terminal detects an identifier for calling an application, it determines that conditions for calling the application module are satisfied and calls the application module. The conditions include receiving a command from user to confirm calling the application. The mobile terminal includes a detecting module, a condition judging module and a calling module. The embodiments of the present invention call each application module instantly during the text inputting, and in addition, the final required data are inserted directly into the text editing position to reduce users' operation procedures, thus greatly improving friendliness of man-machine interaction, the overall efficiency, speed and convenience of input, and making users' input experience improved dramatically. |
| US09164814B2 |
Acceleration prediction in hybrid systems
Predicting acceleration in a hybrid system may comprise determining a number of cross system calls in a first host-accelerator computer architecture running a workload. Host machine overhead and accelerator overhead in the first host-accelerator computer architecture associated with each of the cross system calls may be determined. Communication delay associated with each of the cross system calls in the first host-accelerator computer architecture running a workload may be determined. An application response time may be predicted for a candidate application to be run in a second host-accelerator computer architecture, based at least on the determined host machine overhead, the accelerator overhead, and the communication delay associated with each of the cross system calls in the first host-accelerator computer architecture running a workload. |
| US09164811B1 |
Synchronize multipart jobs through automation workflow
Methods and systems herein determine the relative order in which tasks of a workflow are performed based on verified directional processing links of the tasks. This determines the relative processing order of collection tasks based on the directional processing links. These methods and systems further identify which of the collection tasks to perform in parallel based on which of the collection tasks do not use output from other collection tasks. Additionally, these methods and systems determine the relative processing order of each group of tasks. Tasks in the same group provide output to the same collection task. Also, such methods and systems identify which tasks to perform in parallel based on which tasks do not use output from other the tasks within the same group. |
| US09164809B2 |
Virtual processor provisioning in virtualized computer systems
A system and method for allocating additional virtual processors to virtual machines (referred to as “automatic processor hotplug”) are disclosed. In accordance with one embodiment, a guest operating system of a virtual machine detects when a measure of system load exceeds a threshold. In response, the guest operating system transmits a request to a hypervisor for an additional virtual processor for the virtual machine. |
| US09164807B2 |
Statically allocating set of tasks to particular cluster and dynamically allocating each task to different processing units within cluster
A system including a plurality of processing units for executing tasks in parallel and a communication network. The processing units are organized into clusters of units, each cluster comprising a local memory. The system includes means for statically allocating tasks to each cluster of units, so that a task of an application is processed by the same cluster of units from one execution to another. Each cluster includes cluster management means for allocating tasks to each of its processing units and space in the local memory for executing them, so that a given task of an application may not be processed by the same processing unit from one execution to another. The cluster management means includes means for managing the tasks, means for managing the processing units, means for managing the local memory and means for managing the communications involving its processing units. The management means operate simultaneously and cooperatively. |
| US09164803B2 |
Background task resource control
Among other things, one or more techniques and/or systems are provided for controlling resource access for background tasks. For example, a background task created by an application may utilize a resource (e.g., CPU cycles, bandwidth usage, etc.) by consuming resource allotment units from an application resource pool. Once the application resource pool is exhausted, the background task is generally restricted from utilizing the resource. However, the background task may also utilize global resource allotment units from a global resource pool shared by a plurality of applications to access the resource. Once the global resource pool is exhausted, unless the background task is a guaranteed background task which can consume resources regardless of resource allotment states of resource pools, the background task may be restricted from utilizing the resource until global resource allotment units within the global resource pool and/or resource allotment units within the application resource pool are replenished. |
| US09164802B2 |
System, method and program product for allocating resources and services
A shared resource system, method of sharing resources and services and a computer program product therefor. Client computers communicate with at least one provider computer that selectively makes resource capacity available to the client computers. The client computers and provider computer pass messages to each other negotiating access to provider resources and services. The provider computer(s) notifies each requesting client computer of any potential conflicts with any portion of the requested capacity in confirmation qualification messages. |
| US09164801B2 |
Probabilistic optimization of resource discovery, reservation and assignment
A processor-implemented method, system and/or computer program product allocates multiple resources from multiple organizations. A series of requests for multiple resources from multiple organizations is received. The multiple resources are required to accomplish a specific task, and each of the multiple resources is assigned a probability of consumption. Probabilities of availability of the multiple resources are then determined and transmitted to the organizations. |
| US09164795B1 |
Secure tunnel infrastructure between hosts in a hybrid network environment
Technologies are described herein for establishing a secure tunnel infrastructure between host computers in a hybrid network environment. A first network tunnel is established between a border device in a first network and a border device in a second network. A second network tunnel is established between a first host computer in the first network and the border device in the first network. Similarly, a third network tunnel is established between the border device in the second network and a second host computer in the second network. The networking infrastructures of the first and second networks are then configured so that network packets from the first host computer arriving at the border device in the first network through the second network tunnel are sent through the first network tunnel to the border device in the second network, and then through the third network tunnel to the second host computer. |
| US09164794B2 |
Hardware prefix reduction circuit
A hardware prefix reduction circuit includes a plurality of levels. Each level includes an input conductor, an output conductor, and a plurality of nodes. Each node includes a buffer and a storage device that stores a digital logic level. One node further includes an inverter. Another node further includes an AND gate with two non-inverting inputs. Another node further includes an AND gate with an inverting input and a non-inverting input. One bit of an input value, such as an internet protocol address, is communicated on the input conductor. The first level of the prefix reduction circuit includes two nodes and each subsequent level includes twice as many nodes as is included in the preceding level. A digital logic level is individually programmed into each storage device. The digital logic levels stored in the storage devices determines the prefix reduction algorithm implemented by the hardware prefix reduction circuit. |
| US09164793B2 |
Prioritized lock requests to reduce blocking
A method includes requesting a lock on a resource. The request for the lock on the resource is specified as a low priority non-blocking request that does not block one or more other requests such that one or more other requests can request a lock on the resource and obtain the lock on the resource in priority to the low priority non-blocking request. Based on the low priority request, the method includes maintaining the low priority request in a non-blocking fashion until a predetermined condition occurs. As a result of the predetermined condition occurring, the method includes handling the low priority request such that it is no longer treated as a low priority non-blocking request. Embodiments may further include a kill request which kills any operations on the resource, aborts any transactions having a lock on the resource, and locks the resource. |
| US09164790B2 |
Live virtual machine template creation
A system and method are disclosed for creating a virtual machine template from a live virtual machine. In accordance with one embodiment, a computer system creates a live snapshot of a virtual machine, and creates a clone of the virtual machine based on the live snapshot. The computer system then initiates execution of the clone, shuts down the clone, and creates a virtual machine template based on the clone, where the virtual machine template enables the creation of another virtual machine that corresponds to the live snapshot of the original virtual machine. |
| US09164789B2 |
Multiple queue management and adaptive CPU matching in a virtual computing system
A method and system for managing multiple queues providing a communication path between a virtual machine and a hypervisor in a virtual machine system. The multiple queues are bundled together and identified on a polled list. When one of the queues on the polled list is used to communicate a request from the virtual machine to the hypervisor, a virtual machine exit is performed and a virtual machine exit is disabled for all of the queues on the polled list. The queues on the polled list are assigned to an initial host CPU to service requests from the virtual machine. If a particular queue on the polled list experiences a load that exceeds a load threshold, the particular queue is removed from the polled list and assigned to a different host CPU. |
| US09164787B2 |
Methods and systems for running multiple operating systems in a single mobile device
Methods and systems for running multiple operating systems in a single embedded or mobile device (include PDA, cellular phone and other devices) are disclosed. The invention allows a mobile device that normally can only run a single operating system to run another operating system while preserving the state and data of the original operating system. Guest OS is packaged into special format recognizable by the host OS that still can be executed in place by the system. The Methods include: •Change the memory protection bits for the original OS; •Fake a reduced physical memory space for guest OS; •Use special memory device driver to claim memories of host OS; •Backup whole image of the current OS and data to external memory card. |
| US09164786B2 |
Determining performance states of parent components in a virtual-machine environment based on performance states of related child components during a time period
Techniques promote monitoring of hypervisor systems by presenting dynamic representations of hypervisor architectures that include performance indicators. A reviewer can interact with the representation to progressively view select lower-level performance indicators. Higher level performance indicators can be determined based on tower level state assessments. A reviewer can also view historical performance metrics and indicators, which can aid in understanding which configuration changes or system usages may have led to sub-optimal performance. |
| US09164783B2 |
Load time resolution for dynamic binding languages
Embodiments of the present invention address deficiencies of the art in respect to load time resolutions and provide a method, system and computer program product for load time resolution of AOT compiled class references in a dynamic binding executing environment. In one embodiment of the invention, a method of resolving class references in AOT compiled code can be provided. The method can include updating AOT code at loading time for already resolved class references in the AOT code, and executing the updated AOT code to resolve remaining unresolved class references in the updated AOT code. |
| US09164779B2 |
Apparatus and method for providing for remote user interaction
An apparatus, method, and computer program product are described that provide for a replicated user interface, including a replicated active display area and a replicated boundary area, such that the replicated user interface can recognize the same types of user inputs that are recognized by a remote user interface, and the same operations may be executed upon receipt of such inputs. The apparatus can establish a communications link with the remote user interface and determine whether the remote user interface is configured to detect a user input at least partially received in a boundary area outside an active display area of the remote user interface. A replicated active display area and a replicated boundary area may then be provided for in response to a determination that the remote user interface is configured to detect a user input at least partially received in the boundary area of the remote user interface. |
| US09164774B2 |
Driver controlling device, and computer-readable recording medium storing driver controlling program
A driver controlling device includes a processor, a supporting function storing unit which stores information of supportable functions of a driver in a function table, and a function obtaining unit which obtains information of functions of a new driver to be used described in model dependent data of the new driver. The driver controlling device also includes a determining unit which determines whether the information of the functions of the new driver has been stored in the function table, an un-supporting function storage unit that stores information of a function determined not to be stored in the support function storing unit, and a display unit that displays functions stored in the un-supporting function storage unit as a list of un-supporting functions. |
| US09164768B2 |
Executing an instruction set using a prefix to interpret an operator field as either a first or a second operator field
A method of executing an instruction set having a first instruction and a second instruction, includes: reading the first instruction; determining whether the first instruction is integral with the second instruction; reading the second instruction; when the first instruction is integral with the second instruction, interpreting a first operator field of the second instruction to represent a first operator; and when the first instruction is not integral with the second instruction, interpreting the first operator field of the second instruction to represent a second operator, wherein the first operator is different to the second operator. |
| US09164765B2 |
Method for managing a processor, lock contention management apparatus, and computer system
A method for managing a processor includes: obtaining an online request of a processor of a computer system; collecting lock contention information of the computer system if a lock contention status flag indicates a non-lock thrashing status; determining whether the computer system is in a lock thrashing status according to the lock contention information; and accepting the online request if it is determined that the computer system is in a non-lock thrashing status. By using the management method according to embodiments of the present application, processor performance degradation and a waste of idle processor resources that are caused by the case that the computer system is in a lock thrashing status are prevented, thereby improving utilization efficiency of processor resources and promoting overall performance of the computer system. |
| US09164762B2 |
Rotate instructions that complete execution without reading carry flag
A method of one aspect may include receiving a rotate instruction. The rotate instruction may indicate a source operand and a rotate amount. A result may be stored in a destination operand indicated by the rotate instruction. The result may have the source operand rotated by the rotate amount. Execution of the rotate instruction may complete without reading a carry flag. |
| US09164760B2 |
Method and system for virtualization of software applications
A method of virtualizing an application to execute on a plurality of operating systems without installation. The method includes creating an input configuration file for each operating system. The templates each include a collection of configurations that were made by the application during installation on a computing device executing the operating system. The templates are combined into a single application template having a layer including the collection of configurations for each operating system. The collection of configurations includes files and registry entries. The collections also identifies and configures environmental variables, systems, and the like. Files in the collection of configurations and references to those files may be replaced with references to files stored on installation media. The application template is used to build an executable of the virtualized application. The application template may be incorporated into a manifest listing other application templates and made available to users from a website. |
| US09164756B2 |
Software updating process for an embedded device
The invention relates to a method for updating software in an embedded device (1), said software being stored in an EEPROM memory (12) of the embedded device, the method comprising the steps of: c) executing an update management program code, this execution step comprising:—erasing the memory area storing the former software and storing at least an update instruction at the beginning of the memory area, the execution of this update instruction leading to an access to the update management program code;—the writing of the updated software in the erased memory area; d) deleting the update instruction so that the updated software is executed at startup. |
| US09164754B1 |
Runtime patching of native-code programs
During execution of a program, a code patching component may insert a redirection patch into a native-code representation of the program. The code patching component may identify a patch area in the native-code representation, copy existing code from the patch area to another location for subsequent emulation by a trap handler, determine the number of instructions and type of native-code elements within the patch area, and replace native-code elements in the patch area with native-code elements representing a jump type instruction and a target address argument for the jump type instruction (directly or indirectly indicating the location of new code that replaces the code in the patch area). The target address argument may be determined by the code patching component based on the program's characteristics, and may include a collection of elements representing existing code, trap type instructions, NOP type instructions, or arbitrary values. |
| US09164751B2 |
System and method of rolling upgrades of data traits
A method, article of manufacture, and apparatus for managing a computing environment, such as a cloud data repository. In some embodiments, this includes modifying an object or a component of an object at runtime and storing the modified object or modified component of an object in a storage device. In some embodiments, the component of an object modified may include traits. In some embodiments, objects or traits may have more than one version. |
| US09164747B2 |
Information processing system, device, and information processing method
A system, where a device and at least one information processing apparatus are connected via a network to each other, includes a configuration unit that, when receiving a request to use a service together with a device identifier of the device, stores configuration information in a relationship information storage, wherein the configuration information associates the device identifier with at least one program identifier that is stored in a service information storage in association with the service; and a transmitting unit that sends an installation request to install a program corresponding to the program identifier to the device corresponding to the device identifier that is associated by the configuration information with the program identifier. |
| US09164746B2 |
Automatic topology extraction and plotting with correlation to real time analytic data
Systems and methods are disclosed for extracting a topology for an installation of a plurality of software components. The topology may be extracted from instantiating instructions for the components of the installation such as an application manifest, manifest tree, configuration scripts, source code, and the like. One of a plurality of rendering engines generates one of a plurality of representations of the topology. Status data for the components may be collected and visually represented on the graphical representation of the topology. Examples of representations include a network topology, a release pipeline graph, a service architecture, and a state machine graph. The status of the topology may be updated in realtime as status information is output by the installation. |
| US09164744B2 |
Method and system for program building
An improved method for program building uses predefined source files and predefined build scripts comprising a sequence of build commands; wherein each build command comprises an origin command line interpretable by an operating system and addressed to at least one compiling tool. |
| US09164743B2 |
Strength reduction compiler optimizations for operations with unknown strides
An optimizing compiler includes a strength reduction mechanism that optimizes a computer program that includes operations that have an unknown stride by analyzing the instructions in the computer program in a single pass, determining whether instruction substitution is profitable for original instructions in the code, and performing instruction substitution for one or more original instructions for which instruction substitution is deemed profitable, including operations with unknown strides. The substituted instructions result in strength reduction in the computer program. |
| US09164735B2 |
Enabling polymorphic objects across devices in a heterogeneous platform
In accordance with disclosed embodiments, there are provided methods, systems, and apparatuses enabling polymorphic objects across devices in a heterogeneous platform. According to the disclosed embodiments, such means include, for example, receiving, at a device aware compiler, source code for a computer program as input; compiling the source code for the computer program, in which the compiling includes at least: generating two distinct sets of executable binary instructions for a method of an object; in which a first of the two distinct sets of executable binary instructions for the method of the object provides first binary instructions for the method executable by a first computing device and not executable by a second computing device; and in which a second of the two distinct sets of executable binary instructions for the method of the object provides second binary instructions for the method executable by the second computing device and not executable by the first computing device. Other related embodiments are disclosed. |