最新美国发明专利第2015-10-20期 - 专利汇|PatentHub专利检索|专利查询网|发明专利查询分析

Document	Document Title
US09166494B2	Power converter A power supplying section is an operation power supply for a switching element for an inverter, and one end on a low potential side is connected to one end of the switching element on a DC power supply line side. A boot capacitor is connected to one end of the switching element on a DC power supply line side, where the other end is electrically connected to one end of the power supply section on the high potential side. A diode is provided in a path extending from one end of the power supply section on the high potential side to the DC power supply line via the boot capacitor. The diode makes only the current, which is flowing from the power supply section to the boot capacitor, flow.
US09166493B2	Power converter circuit A power converter circuit includes a diode group, a relay, a DC section and an inverter. The diode group includes a plurality of diodes arranged to rectify an output voltage of an alternating-current power supply. The relay is provided at a point located closer to the alternating-current power supply than the diode group. The DC section is where an output voltage of the diode group is applied. The inverter is arranged to output a three-phase alternating-electric current to a three-phase load. The DC section has a maximum pulse voltage twice as great as a minimum pulse voltage of the DC section. The DC section includes an energy-absorbing circuit having an electrolytic capacitor. The DC section further has a pathway arranged to apply the output voltage of the alternating-current power supply from the alternating-current power supply to the electrolytic capacitor via a rectifying circuit, not via the relay.
US09166491B2	Converter system for limiting circulating current A converter system includes a first converter, a second converter, and a first inter-phase transformer. The first converter is electrically connected to the second converter in parallel between a first input terminal parallel end and a first output terminal parallel end. The first inter-phase transformer is disposed at the first input side parallel terminal or the first output side parallel terminal, and the first inter-phase transformer is operable to restrain a circulating current generated by the first converter and the second converter.
US09166488B2	Method and apparatus for resetting a resonant converter An approach is provided for limiting or eliminating residual energy in a resonant network before restarting a resonant converter including the resonant network. An energy resetting module is configured to the resonant converter for limiting a peak current occurring in a switching circuit of the resonant converter by resetting energy remaining in a resonant circuit of the resonant converter after the resonant converter is turned off.
US09166487B2	Package structure integrating a start-up component, a controller, and a power switch A package structure integrating a start-up component, a controller, and a power switch for a power converter, wherein the power converter has a coil having a first end and a second end, and the first end is coupled to a rectifier, the package structure including: a first die pad for carrying a chip of the controller; a second die pad for carrying a chip of the start-up component and a chip of the power switch, wherein the chip of the start-up component has a bottom surface providing a first drain contact; and the chip of the power switch has a bottom surface providing a second drain contact; and a plurality of external connection leads, of which one is connected with the second die pad via a wire and is used to couple with the second end of the coil.
US09166485B2	Quantization error reduction in constant output current control drivers An electronic system and method includes a controller to control a switching power converter in at least two different modes of operation, a normal mode and an error reduction mode. The controller controls an amount of charge pushed (i.e. delivered) by the switching power converter to a load to reduce a charge quantization error. The charge quantization error represents an amount of charge pushed to the load beyond a target charge amount. The controller determines an amount of charge to be pushed to the load. Based on the amount of charge to be pushed to the load, the controller generates a current control signal that controls a current control switch in the switching power converter. Determination of the control signal depends on whether the controller is operating in normal mode or error reduction mode. The controller attempts to reduce the charge quantization error to avoid power fluctuations.
US09166483B2	Single stage AC-DC power converter with flyback PFC and improved THD A single-stage AC-DC power converter for powering a load at a substantially constant current, and related methods and systems. The AC-DC power converter includes a high power factor correction (PFC) circuit configured in a flyback topology and operating in transition mode. The flyback PFC circuit has a PFC controller and is configured to draw an input AC current from an AC power supply. The input AC current has a first total harmonic distortion (THD). The flyback PFC circuit outputs a DC current to the load. The PFC controller is configured to sense a rectified input voltage. By multiplying the rectified input voltage sensed by the PFC controller, the input AC current drawn by the flyback PFC circuit has a second, much improved THD, which is achievable without the need of an expensive PFC controller. The rectified input voltage sensed by the PFC controller is multiplied using a Zener diode ladder.
US09166479B2	Method and apparatus for sensing multiple voltage values from a single terminal of a power converter controller A controller for use in a power converter includes a switching control and a sensor. The switching control generates a first signal to control switching of a power switch between a first state and a second state. The sensor receives a second signal from a single terminal of the controller during at least a portion of the time that the power switch is in the first state and during at least a portion of the time that the power switch is in the second state. The second signal is representative of a line input voltage during at least the portion of time that the power switch is in the first state and is representative of an output voltage during at least the portion of time that the power switch is in the second state. The sensor is coupled to be responsive to the first signal.
US09166478B2	Power supply device, method for managing power supply thereof and wireless communication terminal In the patent document, the wireless communication terminal includes a baseband working unit, a RF working unit and a DC power converter connected with the baseband working unit and the RF working unit, further including a power supply device, a CPU and an envelope detection device; the power supply device is configured to receive a voltage supplied by the DC power converter, supplying an output voltage to a PA in the RF working unit, receiving a control signal sent from CPU, adjusting the output voltage according to the control signal; the envelope detection device is configured to detect the envelope signal of output signal of the PA in real time and send the envelope signal to the CPU; the CPU is configured to receive the voltage supplied by the DC power converter, convert the envelope signal into a control signal and send the control signal to the power supply device.
US09166475B2	Voltage regulator with fast and slow switching control Techniques are provided that can extend the efficiency of a switching regulator further into the low current region by making use of the available knowledge on predictable load variations and voltage ripple tolerance across different states, providing improved efficiency and reducing total current consumption. The load current requirement in low power states is provided using switch mode rather than linear regulation, the switch mode operation being controlled by a mode dependent control circuit so as to minimize the energy cost of the switching operation in each mode and thus obtain improved efficiency from the power source.
US09166473B2	DC/DC power converter with feedback control operable in linear and non-linear modes A current mode power conversion system and method operates in cycles. Each cycle includes an on time and an off time. The system includes an inductor connected to store energy during the on time of each cycle and use the energy during the off time of each cycle. The system provides a stable output voltage and a maximum-limited output current to a load during constant load conditions. The system comprises a feedback control linearly operable so as to control the output voltage across the load during constant load conditions, and non-linearly operable so as to control the output voltage across the load during certain detected changes in load conditions as a function of the derivative of the current in the inductor so as to speed up the transient response of the power conversion system when a fault condition exists.
US09166467B2	Flicker-free converter for driving light-emitting diodes A spike-free converter for driving light-emitting diodes includes a closed loop direct current-direct current (dc-dc) converting unit, a switch, a first inductor, and a first diode. The closed loop dc-dc converting unit is used for generating a driving voltage to drive at least one light-emitting diode strings according to a dc voltage, and generating a switch control signal. The switch is used for receiving the switch control signal and being turned on and turned off according to the switch control signal.
US09166460B2	Rotary electric machine Provided is a rotary electric machine including housings, a stator, a rotor, bearings, a slip ring, a power assembly, a control assembly, a rotation sensor, and a brush holder, in which a switching element mounting surface of the power assembly and a surface of the control assembly, on which a control element of a control circuit is mounted, are placed in parallel to a rotation shaft, and the rotation sensor is placed between the rear bearing and the slip ring.
US09166455B2	Rotating electrical machine According to one embodiment, a rotating electrical machine has a vibrating-element. The vibrating-element has spring bars and circular members which cover spring bars while a part is connected to spring bars. The spring bars are connected to first stator core connection portions, which are formed so as to be spaced out in a circumferential direction from each other at two locations on a side surface of the stator core. The stator frame is connected by the second stator core connection portions, which are formed by two locations which are different from the first stator core connection portions, of the stator core. The second stator core connection portions contain a position adjacent to a node portion of a circular mode of vibration of the stator core, in which antinodes and nodes of vibration alternately appear in the circumferential direction as the vibrating-element is attached to the stator core.
US09166454B2	Electric motor with end winding support An electric motor includes a stator, a case surrounding the stator, and a rotor rotatably disposed with respect to the stator. The rotor includes a rotor core having a plurality of poles and slots, a shaft coupled to a central portion of the rotor core, a rotor coil wound on the rotor core, and coil supporting members provided at the rotor core. The coil supporting members are configured to support the rotor coil such that the rotor coil is prevented from being separated from the rotor core in a radial direction when the rotor rotates. Under such a configuration, a short-circuit of the rotor coil due to a centrifugal force when the rotor rotates, can be prevented.
US09166449B2	Rotor and motor A rotor includes a field member arranged between a first core base of a first rotor core and a second core base of a second rotor core in the axial direction. When magnetized in the axial direction, the field member causes primary claw-shaped magnetic poles to function as primary magnetic poles and secondary claw-shaped magnetic poles to function as secondary magnetic poles. The field member is formed by placing a plurality of members one over another in the axial direction.
US09166447B2	Wireless electric power transmission apparatus A wireless electric power transmission apparatus as an embodiment of the present disclosure includes: two antennas having the ability to transmit electric power by a non-contact method via resonant magnetic coupling, one of the two antennas being a series resonant circuit, of which the resonant frequency is fs, the other antenna being a parallel resonant circuit, of which the resonant frequency is fp; an oscillator which is connected to one of the two antennas that transmits RF power; and a control section which controls a transmission frequency according to the magnitude of the electric power to be transmitted from one of the two antennas to the other. If a coupling coefficient between the two antennas is k, then fs and fp are set so as to satisfy the inequality fs/fp<−0.6074×k2+0.0466×k+0.9955.
US09166446B2	Method and apparatus for controlling wireless power transmission A wireless power transmission controlling apparatus and method are provided. The apparatus includes a power amplifier that receives a source power, amplifies the received source power, and outputs a wireless power transmission signal from the amplified received source power, a band pass filter that filters the wireless power transmission signal, and passes a harmonic wave corresponding to a communication frequency band, and a communication unit that transmits a wireless power transmission control signal using the harmonic wave corresponding to the communication frequency band.
US09166440B2	System for transferring power inductively to items within a container An inductive power transfer system includes an inductive power transmitter in the shape of a container that is capable of holding one or more electrical devices. The system is operable to transfer power inductively to devices stowed within the container via inductive power receivers. The inductive power transmitter includes at least one primary inductor configured to couple inductively with at least one secondary inductor and at least one driver configured to provide a variable electric potential at a driving frequency across said primary inductor. The inductive power receiver may comprise at least one secondary inductor connectable to a receiving circuit and an electric load, said secondary inductor configured to couple inductively with said at least one primary inductor such that power is transferred to said electric load.
US09166438B2	System and method for providing wireless power in a removable wireless charging module A wireless charging module includes an antenna and a wireless charger module. An enclosure is configured to fit at least partially within an optical drive bay of an information handling system. The antenna is disposed within a plastic lower portion of the enclosure. The plastic lower portion of the enclosure is configured to enable the antenna to wirelessly receive power from a wireless charging pad. The wireless charger module is disposed within the enclosure, and is configured to provide power to the information handling system.
US09166434B2	Universal charger A charging apparatus may be provided that includes a first charger part and a second charger part. The first charger part to receive first power from a first power source and second power from a second power source. The first charger part to determine a type of the second power source and to provide a first output power based on the determined type of the second power source. The second charger part to receive the first output power from the first charger part and to provide power to a load and/or a battery.
US09166431B2	Battery charge circuit Provided is a battery charge circuit including a charging power supply unit configured to generate an internal voltage using an external power supply; a charging unit configured to measure voltages of first to fourth batteries, output measurement signals, and selectively charge at least one among the first to fourth batteries in response to charge control signals; and a control unit configured to select charging methods corresponding to the measurement signals among a plurality of charging methods stored therein, and generate the control signals corresponding to the charging methods.
US09166427B2	Recharging jacket assembly for a mobile communication device A jacket device is configured to be used with a mobile communication device. The jacket device includes a sidewall and a baseplate, wherein the sidewall and the baseplate cooperate to form a receiving chamber for receiving the mobile communication device. The jacket device also includes a rocker bar having a pressing portion connected to a rack portion, wherein the rack portion extends through the sidewall. A transmission is disposed on the baseplate and connected with the rocker bar. An electric generator is disposed on the baseplate. An electric generator includes a rotor coupled with the transmission and a stator fixed on the baseplate. When the pressing portion is pressed, the rack portion drives the rotor to rotate via the transmission so that electric power is generated by the electric generator.
US09166425B1	Battery charging storage device A battery charging storage device charges and stores batteries in a compact lockable case. The device includes a housing having a bottom wall and a perimeter wall defining an interior space. A medial wall extends through the interior space of the housing. Straight interior walls extend upwardly from the medial wall defining a plurality of rows in the interior space. A top surface of the medial wall conforms to an exterior shape of a plurality batteries positioned end to end within each row in the interior space. Charging walls extend across associated rows defining a plurality of individual compartments. Contact sets are coupled to the charging walls with each contact set corresponding to an associated one of the compartments in the interior space. Wiring couples each contact set to a plug electrically wherein each contact sets is configured to provide electrical current to a battery positioned in the associated compartment.
US09166419B2	Intelligent charging and discharging system for parallel configuration of series cells with semiconductor switching A battery pack for an electric vehicle includes a first battery, a second battery, and a load arranged in parallel. A first semiconductor switching module is arranged in series with the first battery, and to selectively allow current flow from the first battery to the load and from the load to the first battery. A second semiconductor switching module is arranged in series with the second battery, and to selectively allow current flow from the second battery to the load and from the load to the second battery. A battery control module stores at least one of charge data and usage data corresponding to the first battery and the second battery, and selectively turns on and off the first semiconductor switching module and the second semiconductor switching module based on at least one of the charge data and the usage data.
US09166418B2	Battery system and control method thereof The first battery is configured to be charged and discharged with a larger current than the second battery. The second battery has a higher storage capacity than the first battery. When the voltage of the second battery is lower than the voltage of the first battery, the controller allows charging of the second battery through the second relay while prohibiting charging of the first battery through the first relay until the voltage of the second battery reaches the voltage of the first battery.
US09166413B2	Wireless power supplying system Disclosed herein is a wireless power supplying system, including a power transmission device adapted to transmit power supplied thereto, a repeater device adapted to repeat the transmission power of the power transmission device, and a power reception device adapted to receive the power repeated by said repeater device.
US09166412B2	Power managers for an integrated circuit A system for an integrated circuit comprising a plurality of power islands includes a first power manager and a second power manager. The first power manager manages a first power consumption for the integrated circuit based on needs and operation of the integrated circuit. The second power manager communicates with the first power manager and manages a second power consumption for one of the power islands.
US09166411B2	Systems configured to transmit optical power signals transdermally out of a living subject, and devices and methods In an embodiment, a system includes an internal optical power transmitter configured to be disposed within a living subject. The internal optical power transmitter includes a power source configured to provide electrical energy and an electrical-optical converter operably coupled to the power source. The electrical-optical converter may be configured to convert at least a portion of the electrical energy into one or more optical power signals transdermally transmittable out of the living subject. The system further includes an external optical-electrical converter configured to convert the one or more optical power signals into one or more electrical power signals and at least one external device configured to be operably coupled to the external optical-electrical converter and powered by the one or more electrical power signals. Embodiments of methods, biocompatible electrical-optical converters, and internal optical power transmitters are also disclosed.
US09166409B2	System and method to perform automatic phase reversal detection A system and method to perform automatic phase reversal detection are described. The system includes a first subsystem and a second subsystem configured to be synchronized with the first subsystem. A controller is configured to receive a first input from the first subsystem or the second subsystem and a second input from the first subsystem or the second subsystem and perform phase reversal detection based on the first input and the second input.
US09166407B2	Implementing substation automation load transfer function A process of implementing, or engineering, topology-dependent functions based on a formal description of the Substation Automation system, includes performing a topology analysis of the current single line state. A topology interpreting implementation replacing complex topology analysis logics can include the project specific static single line topology and the connection to the real process state data. All information can be delivered in an IEC 61850 conforming SCD file. The interface description for controlling and monitoring the load transfer application can be generated automatically from the SCD file.
US09166405B2	Energy harvesting load control switch A method, device, and system for controlling power delivered to a power-consuming device. The device can harvest power from a conductor carrying a high voltage using a power harvesting device. The device can include a power storage device to power a hardware processor and a communication component when there is no voltage flowing through the conductor. The device can determine when a control event is to occur. At such time, the device terminates control power delivered to the power-consuming device and continues to withhold the control power until the control event expires. When the control event has ended, the device allows control power to flow to the power-consuming device. The device uses a timer and the communication component to send and receives signals associated with a control event to a user. The device can also operate in a limited mode to conserve power when the device is not in use.
US09166400B2	Electric circuit and sensor for detecting arcing and a transparency having the circuit and sensor An electrical system responsive to overheating and/or electric arcing of an electrically conductive member, e.g. a heating member of an aircraft windshield, includes a first switch in a first current path, and a second switch in a second current path. The first current path is from an electrical power supply through the first switch, through an arc sensor to the heating member to the power supply. The second current path is from a temperature sensor monitoring the temperature of the heating member through the second switch to a temperature controller. When the temperature of the heating member is at or above a predetermined value, the temperature controller causes the first switch to open. When there is arcing, the second switch is moved to the open position. The temperature controller senses that the second switch is open and causes the first switch to open.
US09166395B2	Dimmer control with soft start over-current protection This document discloses, among other things, apparatus and methods for dimmer control. In an apparatus example, a circuit can include an input configured to receive a control signal, a controller configured to modulate a pulse width of a pulse train using the control signal when the controller is enabled, an output configured to provide the pulse train to a driver, and first and second current limit detectors configured to receive load current information of the driver and to terminate an active pulse of the controller when a value of the load current information exceeds a threshold.
US09166391B1	Early streamer emission terminal An early streamer emission terminal is disclosed. According to some embodiments, the early streamer emission terminal can create an upward propagating streamer earlier than conventional lightning protection systems and/or devices. In particular, the early streamer emission terminal can collect ground charges during an initial phase of thunderstorm development. When a thunderstorm begins to generate downward step leaders, the ambient electric field around a grounded lightning protection system can induce a current into the grounded lightning protection system. The induced current can include a flow of negative charge toward the ground, while a positive charge can be released to form an upward streamer. The construction of the early streamer emission terminal can trigger the flow of positive upward charge microseconds earlier than traditional lightning rods or other similar devices.
US09166389B2	Assembly comprising a raceway and a branching device, and associated branching device The invention essentially relates to an assembly (11) comprising: a raceway (12) comprising one or more channels (13) intended to receive a harness or harnesses (16) comprising bundles of electrical cables, and a branching device (14) routing a branch (15) that extends outside the raceway (12) and comes from a bundle located in a channel (13) of the raceway (12), characterized in that the branching device (14) comprises: a system for fastening (17) said branching device on the channel (13) containing the bundle from which the branch (15) comes, and a retention system (18) immobilizing the branch (15) relative to the branching device; this retention system (18) is laterally clear so that, in a top view, it is located outside the channel to which the fastening system is attached.
US09166385B2	Portable cable management device A portable cable management device that includes various attachment mechanisms adapted for securing the device to various surfaces and structures including an I-beam flange attachment mechanism, a 2″×4″ attachment mechanism, one or more drywall attachment mechanisms, a metal framing stud attachment mechanism, and one or more hooks including a throat for holding cables.
US09166383B2	Load center and switchgear mounting assembly therefor A switchgear mounting assembly for a load center includes a base assembly, an electrical bus assembly, and a bracket. The base assembly includes a base and a central protrusion extending outwardly from the base. Bus bars are electrically connected and mechanically coupled to the central protrusion and include stabs, which extend radially outwardly from the central protrusion. The bracket is coupled to the central protrusion and includes supporting elements. Each supporting element maintains a corresponding electrical switching apparatus in electrical communication with a corresponding one of the stabs. The switchgear mounting assembly is therefore structured to mount the electrical switching apparatus in a radial array extending around the central protrusion.
US09166381B2	Ignition device with ignition coil An ignition device includes an ignition coil with a primary coil and a secondary coil, a spark plug with center and ground electrodes for discharge therebetween, and a voltage limiting circuit. The voltage limiting circuit limits voltage applied between the electrodes of the spark plug such that the voltage has an absolute value limited within a predetermined voltage limiting value. The voltage limiting value is differentiated from each other in first and second stages. The first stage is defined as a period in which an initial discharge peak ends, the initial discharge peak being initially generated by electric energy. The second stage is defined as a period after the end of the initial discharge peak. The voltage limiting value in the first stage is lower than the voltage limiting value in the second stage.
US09166378B2	Spark plug, in particular swirl chamber spark plug A spark plug includes: a center electrode having at least one first spark surface and extending along a longitudinal axis of the spark plug; and a ground electrode having at least one second spark surface, the first spark surface being situated diametrically opposed to the second spark surface, so that an ignition spark may be generated between the first and second spark surfaces, the center electrode being rotatable coaxially to the longitudinal axis with respect to the ground electrode, and the first and second spark surfaces being inclined in such a way that rotating the center electrode with respect to the ground electrode makes it possible to set a distance between the first and second spark surfaces.
US09166377B2	Spark plug for internal combustion engine The spark plug for an internal combustion engine has a cylindrical housing, a center electrode held inside the housing, a ground electrode connected to the housing and forming a spark discharge gap between itself and the center electrode, and, an end projection projected from the end portion of the housing toward the head end side of the spark plug. The center electrode and ground electrode are arranged so that most of the spark discharge gap is disposed over the open areas and the electrode area in which the end projection is arranged.
US09166375B2	Vertical surface emitting semiconductor device A semiconductor light emitting device includes a pump light source, a gain structure, and an out-coupling mirror. The gain structure is comprised of InGaN layers that have resonant excitation absorption at the pump wavelength. Light from the pump light source causes the gain structure to emit light, which is reflected by the out-coupling mirror back to the gain structure. A distributed Bragg reflector causes internal reflection within the gain structure. The out-coupling mirror permits light having sufficient energy to pass therethrough for use external to the device. A frequency doubling structure may be disposed between the gain structure and the out-coupling mirror. Output wavelengths in the deep-UV spectrum may be achieved.
US09166372B1	Gallium nitride containing laser device configured on a patterned substrate A gallium and nitrogen containing laser diode device. The device has a gallium and nitrogen containing substrate material comprising a surface region. The surface region is configured on either a non-polar crystal orientation or a semi-polar crystal orientation. The device has a recessed region formed within a second region of the substrate material, the second region being between a first region and a third region. The recessed region is configured to block a plurality of defects from migrating from the first region to the third region. The device has an epitaxially formed gallium and nitrogen containing region formed overlying the third region. The epitaxially formed gallium and nitrogen containing region is substantially free from defects migrating from the first region and an active region formed overlying the third region.
US09166369B2	Flared laser oscillator waveguide A broad area semiconductor diode laser device includes a multimode high reflector facet, a partial reflector facet spaced from said multimode high reflector facet, and a flared current injection region extending and widening between the multimode high reflector facet and the partial reflector facet, wherein the ratio of a partial reflector facet width to a high reflector facet width is n:1, where n>1. The broad area semiconductor laser device is a flared laser oscillator waveguide delivering improved beam brightness and beam parameter product over conventional straight waveguide configurations.
US09166367B2	Operating vertical-cavity surface-emitting lasers Methods, systems, and computer-readable media are provided for operating a vertical-cavity surface-emitting laser. Operating a vertical-cavity surface-emitting laser can include sending a signal to a driver to decrease an optical power of a vertical cavity surface emitting laser transmitter, and sending a signal to the driver associated with increasing the optical power by a particular amount in response to determining that the optical power is insufficient for reception by a receiver.
US09166366B2	Optical semiconductor device and method for manufacturing the same An optical semiconductor device has: a semiconductor structure; a mesa structure including the semiconductor structure, a p-type semiconductor layer formed on a plane portion, a first side face and a second side face of the mesa structure, and a high-resistance semiconductor layer burying the mesa structure and the p-type semiconductor layer. The first side face is inclined toward a principal surface of the substrate more than the second side face. The p-type semiconductor layer has a carrier concentration in a portion related to the first side face lower than that of a portion related to the plane portion and the second side face. A distance between a lower end of the active layer and a boundary between the first side face and the second face in a vertical direction to the plane portion is not less than 0.1 μm and not more than 0.5 μm.
US09166365B2	Homogenization of far field fiber coupled radiation Optical systems and components thereof are disclosed which may be used for efficiently coupling laser energy into an optical conduit while maintaining a homogenous beam output from the optical conduit. Some embodiments are directed more specifically to far field beam homogenization of optical fiber coupled radiation.
US09166363B2	Enhanced optical gain and lasing in indirect gap semiconductor thin films and nanostructures Structures and methodologies to obtain lasing in indirect gap semiconductors such as Ge and Si are provided and involves excitonic transitions in the active layer comprising of at least one indirect gap layer. Excitonic density is increased at a given injection current level by increasing their binding energy by the use of quantum wells, wires, and dots with and without strain. Excitons are formed by holes and electrons in two different layers that are either adjacent or separated by a thin barrier layer, where at least one layer confining electrons and holes is comprised of indirect gap semiconductor such as Si and Ge, resulting in high optical gain and lasing using optical and electrical injection pumping.
US09166361B2	Laser based frequency standards and their applications Frequency standards based on mode-locked fiber lasers, fiber amplifiers and fiber-based ultra-broad bandwidth light sources, and applications of the same.
US09166342B1	Electrical connector An electrical connector includes an insulating body, a terminal set, a wire, and a shielding housing having an upper shell body and a lower shell body. A support part of the first buckling sheet which is penetrated through a first buckle hole of the lower shell body is rivetedly pressed on an outer peripheral edge of the first buckle hole of the lower shell body. An upper side and a lower side of the wire are pressed by a top plate of the upper shell body and the bottom plate of the lower shell body so that the upper and lower shell bodies of the shielding housing can be integrally formed, thereby promoting the bulk intensity of the produced electrical connector, preventing the internal mechanism of the electrical connector from damage due to the oscillation of the wire, and promoting the reliability of the produced electrical connector.
US09166336B1	Power cord male end having an irregular octogonal body with hourglass-shaped slots with concave sidewalls A power cord male end alignment aid providing visual and tactile cues for accurate alignment of and insertion of each of a prong disposed on a male end of the power cord with and into an electrical connector of an electrical energy source by including an irregular octagonal adapter body having an aperture disposed proximal a bottom edge of a continuous perimeter thereof and at least a single one of and not more than a pair of an hourglass-shaped slot disposed between a pair of outer side edges of the perimeter. Each slot has a pair of mirror image concave side walls that securingly receive and retain the respective prong of the power cord male end. The aperture is configured to align with a ground prong receptacle of the three-hole wall outlet or a center of the charging port of a personal electronic device.
US09166335B1	Connector mechanism with a guide hole structure, connector mechanism with a guide pin structure and related electronic device assembly A connector mechanism is utilized to connect with a portable electronic device with a receptacle connector and a guide pin structure. The guide pin structure includes a first portion and a second portion. The connector mechanism includes a base, a plug connector and a guide hole structure. The plug connector and the guide hole structure are disposed on the base. A length of the guide hole structure is greater than a length of the plug connector. The guide hole structure includes a first area and a second area. A width of the first area is greater than a width of the second area. Width difference between the plug connector and the receptacle connector is greater than width difference between the second portion and the second area, and is greater than width difference between the first portion and the second area and between the second portion and the first area.
US09166334B1	Slide connector, slide socket and electronic device for electrical connecting with slide connector An electronic device comprises includes a housing, a slide socket and a slide connector. The slide socket has a sliding slot and a plural of conductive pads. The slide connector includes a main body, a slider and a plural of elastic conductive terminals. The elastic conductive terminals are combined in the main body and partially exposed out of a surface of the slider, wherein the elastic conductive terminals slide into the sliding slot for electrical connecting with the conductive pads through the slider. Thus the slide connector electrically connects with the electronic device through a simple method of sliding. Therefore a gap caused from vibration will be avoided and an electrical connection failure will be decreased.
US09166332B2	Connector The present invention provides a connector that has a function of enabling and facilitating a secure connection of an inserted substrate. A connector includes a housing, a contact point member, and a position determining member. The housing includes an insertion recessed portion into which a substrate is inserted. The contact point member includes a contact point portion connected electrically to a conductive portion of the substrate. The position determining member determines a position of the contact point member. The position is determined to connect the contact point portion to the conductive portion of the substrate and is driven by moving the contact point member to retract the contact point portion from the insertion recessed portion and inserting the substrate into the insertion recessed portion.
US09166330B2	Thermoplastic gel sealants Provided according to embodiments of the invention are thermoplastic gel compositions that include a block copolymer; a hydrocarbon tackifier resin; and a hydrocarbon oil. Further, in some embodiments, such compositions may include at least one antioxidant. Also provided are connectors that include a composition according to an embodiment of the invention.
US09166321B2	Thin profile stacked layer contact A connector is described herein that includes a plurality of layers patterned in two dimensions and joined in a stack with a bore there through. At least a subset of the plurality of layers are contact layers that include deflectable members (e.g., springs) that deflect in plane or out of plane upon insertion of a lead into the bore through the connector. The deflectable members form redundant electrical connections with the lead when the lead is inserted into the bore. For example, the connector can be incorporated into an implantable medical device (e.g., IPG). Moreover, methods of manufacturing a connector are set forth herein.
US09166319B2	Flexible circuit board connector A flexible circuit board connector includes a contact having a separable mating interface mounted to a contact pad of a flexible circuit board and a terminating end terminated to a wire. A housing holds the contact and has a main body including a wire barrel configured to receive the wire. A clip is coupled to the housing with an intermediate space between the clip and the main body. The clip is movable between an open position and a closed position. The intermediate space is configured to receive the flexible circuit board when the clip is in the open position, and the clip and housing are configured to capture the flexible circuit board when the clip is in the closed position. The spring beam is configured to be electrically connected to the contact pad when the clip is in the closed position.
US09166317B2	High-speed connector assembly A receptacle connector includes a housing having a socket configured to receive a plug connector. The housing includes a cavity having datum surfaces therein. The receptacle connector includes a contact assembly received in the cavity and located in a fixed location relative to the datum surfaces. The contact assembly has a dielectric base holding a plurality of contacts configured to mate with the plug connector received in the socket. The dielectric base has datum surfaces. At least one of the housing or the dielectric base comprising crush ribs forcing the datum surfaces of the dielectric base to engage corresponding datum surfaces of the housing.
US09166315B1	Straddle mount connector and pluggable transceiver module having the same Straddle mount connector including first and second plug members each having a member housing and electrical contacts held by the member housing. Each of the member housings has a base portion and a mating segment that projects away from the base portion to a distal edge. Each of the mating segments has an inner plug side and an outer plug side that face in respective opposite directions. The mating segments of the first and second plug members are coupled to each other along the inner plug sides and form a common straddle plug that is configured to be inserted in a mating direction into an edge connector. The common straddle plug projects away from a board edge of the circuit board in the mating direction. The electrical contacts of the first and second plug members extend along the outer plug sides of the corresponding mating segments for communicatively engaging the edge connector.
US09166312B2	Terminal block assemblies and printed circuit board assemblies including same A printed circuit board (PCB) assembly for use with first and second cables terminated with first and second cable lugs, respectively, wherein each of the first and second cable lugs includes two lug holes defined therein, the includes a PCB and a terminal block. The terminal block includes an electrically insulating base mounted on the PCB, and at least one electrically conductive conductor member mounted on the base and electrically connected to the PCB. The at least one conductor member is configured to engage each of the first and second cable lugs through the four lug holes thereof to electrically in-line terminate the first and second cables at the terminal block.
US09166311B2	Fixing bracket for fixing a signal connector to a printed circuit board A fixing bracket for signal connector adapted to fix a signal connector to a circuit board is provided. The fixing bracket includes a base, a fixing member protruding from a bottom surface of the base and at least two engaging sets protruding from a top surface of the base. The fixing member is adapted to pass through and interfere with the circuit board. Each engaging set includes a first restricting surface and a second restricting surface which are adjacent to each other and perpendicular to the top surface, and a third restricting surface parallel to the top surface. The two first restricting surfaces, the two second restricting surfaces and the two third restricting surfaces of the two engaging sets are used for respectively contacting two first surfaces, two second surfaces and two third surfaces of the signal connector so as to fix the signal connector.
US09166310B2	Press-in contact having a base, a contact pin and a second pin A press-in contact having a base, a contact pin and a second pin which extends parallel to the contact pin. The second pin projects beyond the contact pin and has a greatest circumference at the same level as a tip of the contact pin. Simple and accurate positioning between a circuit board and a contact pin disposed in a housing is made possible by the second pin which acts as a pre-centering pin.
US09166305B2	Coaxial electric connector Good signal transmission characteristics can be stably obtained by a simple structure. A pressure-contact surface of a cover inner surface of a shell cover part 13b, which is openably/closably coupled to a cylindrical opening of an external conductor shell 13a, and an insulative pressing plate 11d is provided with a void part 14, which separates at least one of them from the other one. By virtue of this, it is configured that the characteristic impedance about the cable-shaped signal transmission medium SC can be adjusted by the void part 14, and the matching degree (VSWR) of the characteristic impedance with respect to transmission signals can be easily and appropriately matched.
US09166302B2	Wideband electromagnetic cloaking systems Arrangement of resonators in an aperiodic configurations are described, which can be used for electromagnetic cloaking of objects. The overall assembly of resonators, as structures, do not all repeat periodically and at least some of the resonators are spaced such that their phase centers are separated by more than a wavelength. The arrangements can include resonators of several different sizes and/or geometries arranged so that each size or geometry corresponds to a moderate or high “Q” response that resonates within a specific frequency range, and that arrangement within that specific grouping of akin elements is periodic in the overall structure. The relative spacing and arrangement of groupings can be defined by self similarity and origin symmetry. Fractal based scatters are described. Further described are bondary condition layer structures that can activate and deactive cloaking/lensing structures.
US09166298B2	Wireless device, and information processing apparatus and storage device including the wireless device According to one embodiment, a wireless device includes a circuit board, a semiconductor chip, a nonconductive layer, and a conductive film. The semiconductor chip includes a transmitting/receiving circuit and is mounted on the circuit board. The nonconductive layer is to seal the semiconductor chip. The conductive film is to cover a surface of the nonconductive layer, the conductive film being provided with a plurality of apertures serving as radiating elements. At least one aperture of the plurality of apertures is fed with power.
US09166296B2	Loop-type antenna An antenna interacting with a signal having a frequency is provided. The antenna includes a radiation element having a hollow portion having an angle corner related to the frequency, and including a first inner edge; a second inner edge, wherein the angle corner is formed by the first inner edge and the second inner edge; a third inner edge connected to the second inner edge; a first outer edge; and a second outer edge, wherein the first outer edge and the second outer edge form a first included angle.
US09166295B2	Antenna A bowtie antenna is presented. The antenna includes a substrate with a metal layer. The bowtie-shaped dipole antenna is formed in the metal layer with two triangle elements and a gap between the two triangle elements. The bowtie-shaped antenna is shaped to receive signals in a lower portion of the UHF band. A pair of transmission lines is formed in the metal extending from the gap. At least one pair of tuning stubs is formed in the metal. The pair of tuning stubs extends from the transmission lines and is tuned to a frequency band that is different than the lower portion of the UHF band.
US09166291B2	Antenna device and communication terminal apparatus An antenna device includes an antenna coil including a first conductive pattern disposed on a first major surface of a magnetic sheet, a second conductive pattern disposed on a first major surface of a non-magnetic sheet, and an interlayer conductor connecting the first conductive pattern and second conductive pattern. The antenna coil including the first conductive pattern and second conductive pattern defines a spiral or substantially spiral pattern. The antenna device is a resin multilayer structure in which its base body is a laminate of the magnetic layer and non-magnetic layer and the predetermined patterns are disposed inside and outside the laminate.
US09166290B2	Dual-polarized optically controlled microwave antenna An optically controlled microwave antenna that reduces the optical power consumed by the antenna and to enable polarimetric detection an optically controlled microwave antenna comprises an antenna array and a feed for illuminating said antenna array with and/or receiving microwave radiation. The antenna array comprises a plurality of antenna elements each including a waveguide, two optically controllable semiconductor elements arranged within the waveguide in front of the light transmissive portion of the second end portion, a controllable light source arranged at or close to the light transmissive portion of the second end portion for projecting a controlled light beam onto said semiconductor element for controlling its material properties, and a septum arranged within the waveguide in front of the light transmissive portion of the second end portion and separating said waveguide into two waveguide portions.
US09166289B2	Apparatus and method for determining relative direction of a wireless peer device from another device Systems, apparatuses, devices, and methods for wireless communications. An antenna in which nulls or directions of reduced performance can be selectively introduced is provided, and the performance of a communication link to a wireless communication device is monitored. By correlating the selectively reduced sensitivity of the antenna with reductions in the communication link performance, the direction of the wireless communication device may be estimated. Embodiments of the present invention may be used in numerous applications, such as cell phones, PDA's, and laptops.
US09166286B2	Communication device A communication device includes a housing, an opening, an NFC antenna and a contactless charging coil. The NFC antenna is arranged to surround the opening. The communication device further includes a first magnetic sheet which is arranged between the NFC antenna and a main board and between the opening and the main board, and a second magnetic sheet which is arranged between the contactless charging coil and the main board.
US09166274B2	Standardised monopole strengthening A monopole hollow strengthening tower is provided comprising stages that each comprise a pair of half-pipe sections that fit around the monopole. Each pair of sections is connected to the stage below and to each other. A first stage is connected to the footing of the monopole, a second stage is connected to the top of the first stage and includes cable ports. Subsequent stages extend above the second stage, finally there is a top stage which incorporates a clamping system to grip the monopole. This stage is the only stage above the footing where the monopole and the strengthening tower are in contact with each other. This results in minimisation of outages and disturbances, shortest timeframe, minimum strengthening and avoids significant enlargement of the monopole footprint
US09166273B2	Configurations for antennas Embodiments are provided for antenna configurations. An example playback device includes a housing having a metallic face, the metallic face including an opening; a first antenna oriented in a first direction on a plate, the plate forming a ground plane for the first antenna, the first antenna having a first slot aligned with the opening, the first antenna being associated with a first frequency; and a second antenna positioned proximate to the first antenna on the plate and oriented in a second direction opposing the first direction, the second antenna having a second slot aligned with the opening, the second antenna being associated with at least the first frequency, and the second antenna having at least a first portion located at a distance from at least a second portion of the first antenna of one quarter wavelength of the first frequency.
US09166270B2	Balun with integrated decoupling as ground shield An apparatus is provided. Transmission line cells are formed in a first region. A first metallization layer is formed over the transmission line cells within a portion of the first region. At least a portion of the first metallization layer is electrically coupled to the plurality of transmission line cells. A second metallization layer is formed over the first metallization layer with an interconnect portion, and overlay portion, and a first balun. The interconnect portion at least partially extends into the first region, and the overlay portion is within the first region. The first balun winding is electrically coupled to the overlay portion and partially extends into a second region. The first region partially surrounds the second region. A third metallization layer is formed over the second metallization layer having a second balun winding within the second region, where the second winding is generally coaxial with the first balun winding.
US09166268B2	Radio frequency (RF) conductive medium Embodiments of the present disclosure provide a radio frequency (RF) conductive medium for reducing the undesirable insertion loss of all RF hardware components and improving the Q factor or “quality factor” of RF resonant cavities. The RF conductive medium decreases the insertion loss of the RF device by including one or more conductive pathways in a transverse electromagnetic axis that are immune to skin effect loss and, by extension, are substantially free from resistance to the conduction of RF energy.
US09166264B2	Dual mode filter A dual mode filter (200, 500, 900) comprising an input (Pin) and an output port (Pout) and a non-conducting substrate (205, 505), and first (215, 510, 902) and second (210, 540, 901) conductors which connect the input port to the output port. The conductors are arranged on or in the substrate, and the first conductor is longer than the second conductor by 50%. Either the first or the second conductor comprises a perturbation element (208, 530, 915) at a central position. The first conductor is arranged between the input port and the output port with a number of sections (216-222; 511-519; 931-933, 936-938), at least some of which are parallel to each other, and arranged so that the current in a section which has one or more other sections in parallel to it always flows in the same direction as the current in the most adjacent of said other sections.
US09166263B2	Anode for lithium air battery and lithium air battery including the anode An anode for a lithium air battery including an anode active material layer including an anode active material; a first protective layer disposed on the anode active material layer; and a second protective layer disposed on the first protective layer, wherein the first protective layer includes a liquid electrolyte having a viscosity of 5 centipoise or less at a temperature of 20° C., and the second protective layer includes an ion conductive solid electrolyte membrane.
US09166260B2	Battery module A battery module including a plurality of battery cells; and a barrier including a body portion, and a partition wall protruding from a first side of the body portion, first adjacent battery cells of the plurality of battery cells being arranged at the first side of the body portion, the partition wall extending between the first adjacent battery cells.
US09166259B2	Battery cooling apparatus for electric vehicle A battery pack apparatus has a plurality of battery cell units that are stacked together in generally parallel relation. The battery cell units are configured to define converging air flow spaces therebetween. An air inlet header provides a converging air inlet plenum that is situated adjacent one side of the battery cell units and an air outlet header provides a diverging air outlet plenum that is situated adjacent an opposite side of the battery cell units. A blower or fan forces air into the air inlet plenum. The air flows through the air flow spaces between the battery cell units to cool the battery cell units. The speed of the air increases as it advances through the air inlet plenum and the plurality of air flow spaces.
US09166257B2	Method for charging and method for determining an end-of-charge criterion of a nickel-based battery The method for charging an electrochemical nickel-based battery having a predetermined nominal capacity, including at least one measurement of the voltage of the battery and one measurement of the temperature representative of the battery. The battery is connected to an intermittent source of energy. The charging of the battery is stopped when the voltage measured at the terminals of the battery reaches a voltage threshold, depending on the measured temperature and representative of a capacity charged in the battery corresponding to a charging efficiency equal to or higher than 90% of the maximum charging efficiency.
US09166255B2	Lithium-sulphur (Li-S)-type electrochemical battery and production method thereof The invention relates to a novel lithium-sulphur type electrochemical battery A.According to the invention, the positive electrode (1) is made solely from a porous electronic conductor substrate forming a current collector and the electrolyte contains lithium polysulphides (Li2Sn) as sources of lithium and sulphur ions, said lithium polysulphides being formed ex-situ and not in the battery.The invention also relates to a method for the production of said device.
US09166254B2	Gel polymer electrolyte and lithium polymer battery The application relates to a gel polymer electrolyte and/or polymer modified electrode materials for lithium batteries. The gel polymer electrolyte or the polymer modified electrode material includes at least a polymer represented by the following formula (I):
US09166246B2	Increasing thermal dissipation of fuel cell stacks under partial electrical load A method of operating a high temperature fuel cell system containing a plurality of fuel cell stacks includes operating one or more of the plurality of fuel cell stacks at a first output power while operating another one or more of the plurality of the fuel cell stacks at a second output power different from the first output power.
US09166244B2	Fuel cell A fuel cell includes separators. A second plate of the separator includes a second circular disk section, a second elongated plate section, and a second rectangular section. A fuel gas supply passage extends through the second circular disk section. The second rectangular section has a fuel gas inlet for supplying a fuel gas to a fuel gas channel, an outer ridge, and a fuel gas outlet for discharging the fuel gas, and a detour path forming wall bent in a V-shape toward the fuel gas inlet. A fuel gas inlet is formed in the V-shaped inner area of the detour path forming wall.
US09166235B2	Fuel cell system A fuel cell system includes: a fuel cell stack in which end plates are respectively disposed at two ends of a unit-cell stack of unit cells in the stacking direction, and in which a fuel gas channel for conveying a fuel gas along surfaces of one of the end plates in a direction parallel to the surfaces of the one end plate is formed within the one end plate; an injector that is integrally provided in one of the surfaces of the one end plate and that injects the fuel gas into the fuel gas channel; and a relief valve that is integrally provided in the other of the surfaces of the one end plate and that prevents overpressure in the fuel gas channel. The relief valve is disposed at a position offset from an injection axis of the injector.
US09166231B2	Lead acid battery electrode comprising a porous carbon material layer and a lead acid battery Disclosed is an electrode for a lead storage battery that has good initial output characteristics and causes little or no reduction in output characteristics after charge-discharge cycle. The electrode comprises an electrode active material layer and a current collector. The electrode active material layer comprises a layer containing a lead-containing material as an electrode active material and a layer containing a porous carbonaceous material as an electrode active material. The electrode satisfies a requirement represented by the following equation: B/(A+B)×100=1.0 to 90.0% wherein A represents the weight of lead atoms contained in the electrode active material layer; and B represents the weight of the porous carbonaceous material contained in the electrode active material layer. The density of the layer containing the porous carbonaceous material is 0.40 to 0.80 g/cm3. Also disclosed is a lead storage battery using the electrode in at least one of a positive electrode and a negative electrode.
US09166228B2	Method of exploiting particle morphology to optimize granular structure and charge/discharge performance of lithium ion battery cathodes A method is provided for forming a high-capacity, high-rate lithium ion battery cathode material. The method includes providing a synthesized material of electrochemically active plate-shaped nanoparticles and adding a plurality of appropriately sized diluent particles to the plate-shaped nanoparticles to form a suspension. Any liquid is removed from the solution to form a composite material. The method also includes processing the composite material to form a high-capacity, high-rate lithium ion battery cathode material.
US09166222B2	Lithium ion batteries with supplemental lithium Supplemental lithium can be used to stabilize lithium ion batteries with lithium rich metal oxides as the positive electrode active material. Dramatic improvements in the specific capacity at long cycling have been obtained. The supplemental lithium can be provided with the negative electrode, or alternatively as a sacrificial material that is subsequently driven into the negative electrode active material. The supplemental lithium can be provided to the negative electrode active material prior to assembly of the battery using electrochemical deposition. The positive electrode active materials can comprise a layered-layered structure comprising manganese as well as nickel and/or cobalt.
US09166220B2	Negative active material for rechargeable lithium battery, method of preparing the same and rechargeable lithium battery including the same According to an embodiment of the present invention, a negative active material for a rechargeable lithium battery includes silicon oxide particles represented by SiOx (where 0
US09166219B2	Electric storage device An electric storage device includes: an external terminal having an exposed face exposed outside from an outer covering; a current collector disposed inside the outer covering and connected to the external terminal; and an electrode assembly disposed inside the outer covering and connected to the current collector. The electrode assembly is formed by winding sheet-shaped positive electrode and negative electrode into a flat shape with a separator interposed therebetween and housed in the outer covering so that curved portions obtained by the winding are positioned on a lid body side and a bottom face side. A lid body has an electrolyte solution filling portion that opens to a clearance formed between the curved portion of the electrode assembly and the outer covering.
US09166216B2	Rechargeable battery and module thereof A rechargeable battery, and a module thereof, including a case accommodating an electrode assembly therein; a cap plate covering an opening of the case and having terminal holes; and electrode terminals installed in the terminal holes and electrically connected to the electrode assembly, the electrode terminals being protruded from lateral surfaces of the case adjacent the opening.
US09166214B2	Seal ring and associated method An article includes a seal ring for an energy storage device. The seal ring has a weldable first portion and a weldable second portion. The first and second portions are electrically isolatable from each other by an electrically insulating third portion.
US09166212B2	Metal-resin complex and process for production thereof A metal-resin composite having high gas sealing properties is provided. An aluminum alloy structure having a shape surrounding the copper 63 is firstly formed, and the attached aluminum alloy is made closely contact with the copper electrode 63 and further made engaged into the copper electrode 63 by pressing or forging. It is then machined into a predetermined shape so as to prepare the copper alloy 63 attached with an aluminum alloy part 61a. Subsequently, the surface treatment of the NMT or NMT 2 is given to three members of an aluminum electrode 62, the copper electrode 63 attached with the aluminum alloy part 61a and an aluminum alloy lid 61. These three members are inserted into an injection mold, and a thermoplastic resin composition 64 of PPS resin is injected. The lithium-ion battery lid 60 having a structure as shown in FIG. 11 is thus obtained.
US09166210B2	Case for secondary battery and method of manufacturing case A case for a secondary battery and a method of manufacturing the case. The case has improved hardness and insulating properties and can be colored or patterned according to customers' preferences without having to perform an additional painting process, and a method of manufacturing the case. The case includes a body configured to accommodate an electrode assembly and formed of a conductive material; an oxide film formed on the body; and a colored sealing layer formed on the oxide film.
US09166207B2	Secondary battery module with water cooling jacket A secondary battery module includes a plurality of plate shaped secondary cells; and a casing that is formed with a plurality of grooves extending in its depth direction, with at least one of the secondary cells being housed in a space defined between neighboring grooves, wherein: the plurality of grooves each extends from a lower portion of the casing towards an upper portion of the casing; and the plurality of secondary cells are electrically connected together in a space defined above the grooves and internal to the casing.
US09166199B2	Organic electroluminescence device An organic electroluminescence device comprises a plurality of Pixel Defining Layers (PDLs) formed on a substrate, first electrodes formed in a space that is defined by the substrate and the PDLs, white light emitting layers formed in a space that is defined by the first electrodes and the PDLs, a second electrode formed on the white light emitting layers, first black matrices formed on the second electrode, and a color filter layer located adjacent to the first black matrices and spaced apart from the first black matrices.
US09166198B2	Optical film and light emitting device An optical film and a light emitting device are provided. The optical film includes a substrate, a resin layer, and a plurality of porous particles. The resin layer is located on the substrate. The porous particles are distributed in the resin layer, and each of the porous particles includes a particle body and a plurality of holes. A refractive index of the particle body is different from a refractive index of the resin layer, and the refractive index of the particle body is different from a refractive index of air in the holes. The light emitting device includes a light emitting element and an optical film. The light emitting element has a light emitting surface, and the optical film is located on the light emitting surface of the light emitting element.
US09166197B2	Metallic anode treated by carbon tetrafluoride plasma for organic light emitting device The invention provides an organic light emitting diode (OLED), having a substrate, an anode layer of silver or gold, wherein the anode layer is treated with CF4 plasma to enhance the hole injection of the semitransparent anode layer.
US09166195B2	Organic light emitting display An organic light emitting display is discussed. The organic light emitting display includes a substrate, an organic light emitting diode positioned on the substrate, and a bather covering the organic light emitting diode. The organic light emitting diode includes a first electrode, an organic layer, and a second electrode. The barrier includes at least one first block monomer layer and at least one second block monomer layer including inorganic precursors. The at least one first block monomer layer and the at least one second block monomer layer are alternately stacked in a vertical direction.
US09166192B2	Display device having plural sealants at periphery of pixel portion A highly reliable display device is provided. Alternatively, a display device with a narrow frame is provided. The display device includes: a first substrate and a second substrate facing each other; a pixel portion including a display element, between the first substrate and the second substrate; a first sealant provided around a periphery of the pixel portion; a second sealant which is in contact with at least one of a side surface of the first substrate and a side surface of the second substrate and with which a gap between the first substrate and the second substrate is filled; and a third sealant overlapping with a side surface of the first sealant and at least one of the side surface of the first substrate and the side surface of the second substrate with the second sealant interposed therebetween.
US09166189B2	Fabrication method for organic light emitting device and organic light emitting device fabricated by the same method An organic light emitting device includes a cathode made of metal, at least one organic material layer including a light emitting layer, and an anode in the sequentially layered form. The organic light emitting device also includes a thin metal film that is interposed between the cathode and the organic material layer.
US09166188B1	Organic light emitting diode device An OLED device includes: a first insulator sheet; a light-emitting stack stacked with the first insulator sheet and including a transparent anode layer, a cathode layer, and a functional layer; a metallic mesh stacked with the anode layer in a vertical direction, the metallic mesh contacting the anode layer and being covered by the anode layer; a second insulator sheet stacked with the cathode layer in the vertical direction; a plurality of cathode-connecting vias extending through the second insulator sheet; and a cathode-connecting metallic layer stacked with the second insulator sheet in the vertical direction and connected electrically to the cathode layer through the cathode-connecting vias.
US09166182B2	Organic transistor and method for producing the same The object of the present invention is to provide an organic transistor using an organic semiconductor having excellent transistor properties, and a method for producing the organic transistor, the present invention providing, first, an organic transistor including a gate electrode (b), an insulating layer (c), an organic semiconductor layer (d) which contacts the insulating layer (c) and has a channel formation area, and source/drain electrodes (e), which are formed on (a) a substrate, wherein the organic semiconductor layer (d) contains a fluorine-based compound (surfactant), and, secondly, a method for producing an organic transistor comprising a gate electrode (b), an insulating layer (c), an organic semiconductor layer (d) which contacts the insulating layer (c) and has a channel formation area, and source/drain electrodes (e), which are formed on (a) a substrate, the method comprising: a step in which the organic semiconductor layer (d) is formed on the insulating layer (c) by printing or coating an organic semiconductor solution containing a fluorine-based surfactant; or a step in which the insulating layer (d) is formed on the organic semiconductor layer (d) containing a fluorine-based surfactant by printing or coating.
US09166181B2	Hybrid junction field-effect transistor and active matrix structure Junction field-effect transistors including inorganic channels and organic gate junctions are used in some applications for forming high resolution active matrix displays. Arrays of such junction field-effect transistors are electrically connected to thin film switching transistors and provide high drive currents for passive devices such as organic light emitting diodes.
US09166179B2	Aromatic amine derivative, and organic electroluminescent element comprising the same An aromatic amine derivative represented by the following formula (1)wherein at least one of Ar1 to Ar4 is a heterocyclic group represented by the following formula (2) wherein X1 is an oxygen atom or a sulfur atom.
US09166176B2	Polycyclic aromatic compound The invention provides a polycyclic aromatic compound or a salt thereof having a partial structure represented by the following general formula (I): wherein X, ring A, ring B, ring C, and ring D are as defined in the specification.
US09166171B2	Methanofullerene derivatives and photoelectric conversion devices using same The present invention provides a novel methanofullerene derivative applicable as an organic semiconductor material in electronics devices such as organic FETs and electroluminescence devices and solar cells, represented by formula (I) wherein the average value of 13C-NMR chemical shift values of carbons C2 and C2′ on FL, bonded to C1 is 80.10 ppm or greater, wherein FL represents fullerenes, X1 and X2 are each an aromatic hydrocarbon, an alkyl group or the like, C2 and C2′ are carbon atoms on FL, bonded to C1, and n is an integer of 1 to 10.
US09166170B1	Apparatus for producing carbon-coated nanoparticles and carbon nanospheres An apparatus for producing carbon-coated nano- or micron-scale particles comprising a container for entraining particles in an aerosol gas, providing an inlet for carbon-containing gas, providing an inlet for plasma gas, a proximate torch for mixing the aerosol gas, the carbon-containing gas, and the plasma gas, bombarding the mixed gases with microwaves, and providing a collection device for gathering the resulting carbon-coated nano- or micron-scale particles. Also disclosed is a method and apparatus for making hollow carbon nano- or micro-scale spheres.
US09166163B2	Sub-oxide interface layer for two-terminal memory Provision of fabrication, construction, and/or assembly of a two-terminal memory device is described herein. The two-terminal memory device can include an active region with a silicon bearing layer, an interface layer, and an active metal layer. The interface layer can created comprising a non-stoichimetric sub-oxide that can be a combination of multiple silicon and/or silicon oxide layers with an aggregate chemical formula of SiOX, where X can be a non-integer greater than zero and less than 2. The sub-oxide can be created in a variety of ways, including various techniques related to growing the sub-oxide, depositing the sub-oxide, or transforming an extant film into the sub-oxide.
US09166161B2	Phase change memory cell with large electrode contact area A phase change memory cell and a method for fabricating the phase change memory cell. The phase change memory cell includes a bottom electrode and a first non-conductive layer. The first non-conductive layer defines a first well, a first electrically conductive liner lines the first well, and the first well is filled with a phase change material in the phase change memory cell. A second non-conductive layer is deposited above the first non-conductive layer. A second well is defined by the second non-conductive layer and positioned directly above the first well. A second electrically conductive liner lines at least one wall of the second well such that the second electrically conductive liner is not in physical contact with the first electrically conductive liner. Furthermore, the phase change material is deposited in the second well.
US09166157B2	Conductive bridging memory device and method for manufacturing same According to one embodiment, a conductive bridging memory device includes a first wiring layer having a plurality of first wiring portions extending in a first direction, a second wiring layer having a plurality of second wiring portions extending in a second direction crossing the first direction, and a resistance change layer provided continuously along a plane having the first direction and the second direction between the first wiring layer and the second wiring layer. Each of the first wiring portions includes a first wiring extending in the first direction. Each of the second wiring portions includes a second wiring extending in the second direction, and an ion metal layer provided between the second wiring and the resistance change layer and extending in the second direction.
US09166155B2	Method of manufacturing a magnetoresistive-based device A method of manufacturing a magnetoresistive-based device having magnetic material layers formed between a first electrically conductive layer and a second electrically conductive layer, the magnetic materials layers including a tunnel barrier layer formed between a first magnetic materials layer and a second magnetic materials layer, including removing the first electrically conductive layer and the first magnetic materials layer unprotected by a first hard mask, to form a first electrode and a first magnetic materials, respectively; and removing the tunnel barrier layer, second magnetic materials layer, and second electrically conductive layer unprotected by the second hard mask to form a tunnel barrier, second magnetic materials, and a second electrode.
US09166153B2	System and process to remove film from semiconductor devices Embodiments of the present disclosure are a method of forming a semiconductor device, a method of forming a magnetic tunnel junction (MTJ) device, and a process tool. An embodiment is a process tool comprising an ion beam etch (IBE) chamber, an encapsulation chamber, a transfer module interconnecting the IBE chamber and the encapsulation chamber, the transfer module being capable of transferring a workpiece from the IBE chamber to the encapsulation chamber without exposing the workpiece to an external environment.
US09166147B2	Tunable and metastable ferroelectric materials and magneto-electric devices A ferroelectric device includes a first electrode, a second electrode spaced apart from the first electrode, and a ferroelectric element arranged between the first and second electrodes. The ferroelectric element has a plurality of quasistatic strain configurations that are selectable by the application of an electric field and the device has selectable electromechanical displacement by the application of the electric field.
US09166146B2	Electric field assisted MRAM and method for using the same The present invention is directed to a spin transfer torque magnetic random access memory (STT-MRAM) device having a plurality of memory elements. Each of the plurality of memory elements comprises a magnetic reference layer with a first invariable magnetization direction substantially perpendicular to layer plane thereof; a magnetic free layer separated from the magnetic reference layer by an insulating tunnel junction layer with the magnetic free layer having a variable magnetization direction substantially perpendicular to layer plane thereof; a dielectric layer formed in contact with the magnetic free layer opposite the insulating tunnel junction layer; and a first conductive layer formed in contact with the dielectric layer opposite the magnetic free layer.
US09166141B2	Process of manufacturing a piezopolymer transducer with matching layer Matching layers improve the performance of ultrasonic transducers. Such layers have traditionally required significant effort and expense to be added to ultrasonic transducers. The present invention discloses a method of producing ultrasonic transducers with a matching layer, specifically for ultrasonic transducers utilizing piezopolymer transducer materials. Rather than the conventional method of forming the piezopolymer on a substrate and then attaching a matching layer through which the transducer emits its ultrasound energy, we teach depositing the piezopolymer on a substrate that also serves as a matching layer through which the ultrasound is emitted. We also teach depositing an additional shield layer for reducing electromagnetic interference. Methods of how to select materials and modify their ultrasonic characteristics are also discussed.
US09166137B2	Structure of thermoelectric film A structure of a thermoelectric film including a thermoelectric substrate and a pair of first diamond-like carbon (DLC) layers is provided. The first DLC layers are respectively located on two opposite surfaces of the thermoelectric substrate and have electrical conductivity.
US09166135B2	Optical/electrical transducer using semiconductor nanowire wicking structure in a thermal conductivity and phase transition heat transfer mechanism An optical/electrical transducer device has housing, formed of a thermally conductive section and an optically transmissive member. The section and member are connected together to form a seal for a vapor tight chamber. Pressure within the chamber configures a working fluid to absorb heat during operation of the device, to vaporize at a relatively hot location as it absorbs heat, to transfer heat to and condense at a relatively cold location, and to return as a liquid to the relatively hot location. The transducer device also includes a wicking structure mounted within the chamber to facilitate flow of condensed liquid of the working fluid from the cold location to the hot location. At least a portion of the wicking structure comprises semiconductor nanowires, configured as part of an optical/electrical transducer within the chamber for emitting light through and/or driven by light received via the transmissive member.
US09166130B2	Solderless mounting for semiconductor lasers A first contact surface of a semiconductor laser chip can be formed to a first target surface roughness and a second contact surface of a carrier mounting can be formed to a second target surface roughness. A first bond preparation layer comprising a first metal can optionally be applied to the formed first contact surface, and a second bond preparation layer comprising a second metal can optionally be applied to the formed second contact surface. The first contact surface can be contacted with the second contact surface, and a solderless securing process can secure the semiconductor laser chip to the carrier mounting. Related systems, methods, articles of manufacture, and the like are also described.
US09166123B2	Light emitting device package and method for manufacturing the same A light emitting device package capable of emitting uniform white light and a method for manufacturing the same are disclosed. The light emitting device package includes a package body, an electrode formed on at least one surface of the package body, a light emitting device mounted on the package body, and a phosphor layer enclosing the light emitting device while having a uniform thickness around the light emitting device.
US09166122B2	Light emitting device A light emitting device includes: a support substrate; at least one light emitting laminate having a structure in which semiconductor layers are laminated and formed on the support substrate; a wall unit formed on the support substrate and surrounding the at least one light emitting laminate; and a wavelength conversion layer disposed above the at least one light emitting laminate.
US09166118B2	Semiconductor light emitting apparatus A light emitting apparatus with a combination of a plurality of LED chips and a phosphor layer is provided and can be configured to significantly reduce variations in chromaticity and luminance. The plurality of semiconductor light emitting devices (LED chips) are disposed with a gap therebetween, and the phosphor layer is formed on the upper surface thereof to bridge over the gaps between the LED chips. The phosphor layer may be uniform in thickness, but can be less in thickness over the gaps between the LED chips than on the upper surface of the LED chips. The phosphor layer can be continuously formed on the upper surface of the array of the chips with no phosphor layer present in between the chips. This configuration allows for reducing variations in luminance and chromaticity which may result from the gaps or the phosphor layer present in between the gaps.
US09166115B2	Semiconductor light emitting device package A semiconductor light emitting device package including a main body including a supporting member and an outside member on the supporting member; at least one semiconductor light emitting device disposed on the supporting member in which the outside member at least partially surrounds the at least one semiconductor light emitting device; first and second electrodes, at least one electrode of the first and second electrodes at least partially extending under the at least one semiconductor light emitting device; a metallic member disposed under the at least one semiconductor light emitting device and extending beyond outside edges of the at least one semiconductor light emitting device; a first molding part surrounded by the outside member and covering the at least one semiconductor light emitting device; and a second molding part disposed on the first molding part, the second molding part formed in a domed shape.
US09166112B2	Light emitting module, method of manufacturing the light emitting module, and lamp unit In a light emitting module 40, a light wavelength conversation ceramic 52 converts the wavelength of the light emitted by a semiconductor light emitting element 48 then emits the light. An optical filter 50 transmits the blue light Lb mainly emitted by the semiconductor light emitting element 48 and reflects the yellow light Ly whose wavelength has been mainly converted by the light wavelength conversion ceramic 52. The optical filter 50 is provided on the surface of the light wavelength conversion ceramic 52. The light emitting module 40 is manufactured by: the process where the optical filter 50 is provided on at least one surface of the light wavelength conversion ceramic 52; and the process where the semiconductor light emitting element 48 and the light wavelength conversion ceramic 52 are arranged such that the light emitted by the semiconductor light emitting element 48 is incident into the light wavelength conversion ceramic 52.
US09166110B2	Light-emitting diode and method of manufacturing the same A light-emitting diode and method of manufacturing the same, including a flat portion and a mesa structure including an inclined side surface formed by wet etching and a top surface. A protective film and an electrode film sequentially cover a part of the flat portion and at least a part of the mesa structure, the protective film including an electrical conduction window arranged around a light emission hole and from which a compound semiconductor layer is exposed. The electrode film is a continuous film that contacts the surface of the exposed compound semiconductor layer, covers a portion of the protective film formed on the flat portion, and has the light emission hole on the top surface. A transparent film is formed between a reflecting layer and a compound semiconductor layer. A through-electrode is provided in a range of the transparent film which overlaps the light emission hole.
US09166107B2	Solid state lighting devices with selected thermal expansion and/or surface characteristics, and associated methods Solid state lighting devices with selected thermal expansion and/or surface characteristics, and associated methods are disclosed. A method in accordance with a particular embodiment includes forming an SSL (solid state lighting) formation structure having a formation structure coefficient of thermal expansion (CTE), selecting a first material of an interlayer structure to have a first material CTE greater than the substrate CTE, and selecting a second material of the interlayer structure based at least in part on the second material having a second material CTE less than the first material CTE. The method can further include forming the interlayer structure over the SSL formation structure by disposing (at least) a first layer of the first material over the SSL formation structure, a portion of the second material over the first material, and a second layer of the first material over the second material. The SSL formation structure supports an SSL emitter material, and the method further includes counteracting a force placed on the formation structure by the first material, by virtue of the difference between the second material CTE and the first material CTE. In other embodiments, the SSL formation structure can have an off-cut angle with a non-zero value of up to about 4.5 degrees.
US09166106B2	Nanowire sized opto-electronic structure and method for modifying selected portions of same A LED structure includes a support and a plurality of nanowires located on the support, where each nanowire includes a tip and a sidewall. A method of making the LED structure includes reducing or eliminating the conductivity of the tips of the nanowires compared to the conductivity of the sidewalls during or after creation of the nanowires.
US09166101B2	Light-emitting element and method for manufacturing same The present invention provides a light-emitting element comprising: a carbon layer comprising a graphene; a plurality of fine structures having grown toward the upper side of the carbon layer; a thin film layer for coating the fine structures; and a light-emitting structure layer formed on the thin film layer.
US09166097B2	Thin film transistor substrate and manufacturing method thereof, display An embodiment of the invention provides a thin film transistor substrate includes: a substrate; a plurality of transistors on the substrate, wherein each of the transistors includes: a light-blocking layer on the substrate; an active layer on the light-blocking layer; a gate insulating layer on the substrate and covering the active layer; a gate electrode on the gate insulating layer and over the active layer; a source electrode on the substrate and electrically connected to the active layer; and a drain electrode on the substrate and electrically connected to the active layer.
US09166094B2	Method for forming solar cells A method for forming a thin film solar cell that includes one or more moisture barrier layer made of a water-insoluble material for protection against water and oxygen damage to the top electrode layer material is disclosed.
US09166091B2	PIN structure semiconductor optical receiver A PIN structure semiconductor optical receiver includes first and second electrical contact layers and an intrinsic layer disposed between them. The intrinsic layer includes a stud having a stud axis and a stud cross-section. The first and second contact layers have dimensions in a plane perpendicular to the stud axis that are greater than the stud's cross-section. These layers are also elongated and have longitudinal axes offset angularly relative to each other to minimize facing areas of said electrical contact layers.
US09166088B2	Solar module A solar module is provided with improved photoelectric conversion efficiency. A first electrode and a second electrode (21, 22) each contain a plated film. Each plated film has a feed point (50). The feed points (50) are positioned in bus bar portions (21b, 22b). A wiring member (30) is connected electrically to the first electrode or the second electrode (21, 22) in the finger portions (21a, 22a).
US09166084B2	Interband cascade (IC) photovoltaic (PV) architecture for PV devices A photovoltaic (PV) device, comprising a PV interband cascade (IC) stage, wherein the IC PV stage comprises an absorption region with a band gap, the absorption region configured to absorb photons, an intraband transport region configured to act as a hole barrier, and an interband tunneling region configured to act as an electron barrier. An IC PV architecture for a photovoltaic device, the IC PV architecture comprising an absorption region, an intraband transport region coupled to the absorption region, and an interband tunneling region coupled to the intraband transport region and to the adjacent absorption region, wherein the absorption region, the intraband transport region, and the interband tunneling region are positioned such that electrons will flow from the absorption region to the intraband transport region to the interband tunneling region.
US09166082B2	Solar cell A solar cell includes a substrate of a first conductive type, an emitter region of a second conductive type opposite the first conductive type and which forms a p-n junction along with the substrate, an anti-reflection layer positioned on the emitter region, a front electrode part electrically connected to the emitter region, and a back electrode part electrically connected to the substrate. The substrate includes a first area formed of single crystal silicon and a second area formed of polycrystalline silicon. A thickness of the anti-reflection layer positioned in the first area is less than a thickness of the anti-reflection layer positioned in the second area.
US09166081B2	Optical sensor An optical sensor includes a light receiving portion, a definition portion, and a selection portion. The definition portion defines an incident angle of an incident light that enters the light receiving portion. The selection portion selects a wavelength of the incident light that enters the light receiving portion. The definition portion has a light shielding film disposed above the light receiving portion, and an opening formed in the light shielding film. The selection portion has a slit formed in the light shielding film disposed within a region surrounded by the opening.
US09166078B2	Solar cell apparatus and method for manufacturing the same Disclosed are a solar cell apparatus and a method for manufacturing the same. The solar cell apparatus includes a substrate including a cell region and an outer peripheral region surrounding the cell region, a cell in the cell region, and a connection electrode connected to the cell and provided in the outer peripheral region. The cell includes a back electrode on the substrate, a light absorbing part on the back electrode, and a front electrode on the light absorbing part. The connection electrode extends from the back electrode.
US09166077B2	Thin film solar cell Disclosed is a thin-film solar cell which has a high photoelectric conversion efficiency and is provided with a substrate (1), a backside surface electrode layer (2) formed on the substrate (1), a p-type light-absorbing layer (3) formed on the backside surface electrode layer (2), and an n-type transparent conductive film (5) formed on the p-type light-absorbing layer (3). Voids (6) are formed at the interface of the backside surface electrode layer (2) and the p-type light-absorbing layer (3).
US09166074B2	Metal silicide nanowire arrays for anti-reflective electrodes in photovoltaics A method of fabricating single-crystalline metal silicide nanowires for anti-reflective electrodes for photovoltaics is provided that includes exposing a surface of a metal foil to oxygen or hydrogen at an elevated temperature, and growing metal silicide nanowires on the metal foil surface by flowing a silane gas mixture over the metal foil surface at the elevated temperature, where spontaneous growth of the metal silicide nanowires occur on the metal foil surface, where the metal silicide nanowires are post treated for use as an electrode in a photovoltaic cell or used directly as the electrode in the photovoltaic cell.
US09166068B2	Semiconductor heterobarrier electron device and method of making An electronic device comprising a substrate; a pair of stacks of polar semiconductor materials which create a charge by spontaneous and/or piezoelectric polarization; one of the pair of stacks having a spontaneous and/or piezoelectric polarity which is in a direction opposite to the other of the pair of stacks; whereby due to the opposing polarities, the polarization is balanced. A method of substantially eliminating the bias required to offset polarization charges in an electronic device having a heterobarrier comprising providing a substrate; growing at least one pair of stacks of semiconductor materials; one of the pair of stacks having a spontaneous and/or piezoelectric polarity which is opposite to the other of the pair of stacks; whereby due to the opposing polarities, the polarization is balanced to substantially eliminate the need for a voltage bias.
US09166067B2	Device layout for reference and sensor circuits A band gap reference circuit includes an error-amplifier-based current mirror coupled between a first supply node and a pair of intermediate voltage nodes, and a matched diode pair for providing a proportional-to-absolute temperature (PTAT) current. The matched diode pair includes a first diode connected between a first intermediate voltage node from the pair of intermediate voltage nodes and a second supply node, and a second diode connected in series with a resistor between a second intermediate voltage node from the pair of intermediate voltage nodes and the second supply node. Each diode has a P-N diode junction that is a homojunction.
US09166062B2	Field effect transistor using graphene According to example embodiments, a field effect transistor includes a graphene channel layer on a substrate. The graphene channel layer defines a slit. A source electrode and a drain electrode are spaced apart from each other and arranged to apply voltages to the graphene channel layer. A gate insulation layer is between the graphene channel layer and a gate electrode.
US09166060B2	Semiconductor device To provide a semiconductor device having a structure capable of suppressing deterioration of its electrical characteristics which becomes apparent with miniaturization. The semiconductor device includes a first oxide semiconductor film over an insulating surface; a second oxide semiconductor film over the first oxide semiconductor film; a source electrode and a drain electrode in contact with the second oxide semiconductor film; a third oxide semiconductor film over the second oxide semiconductor film, the source electrode, and the drain electrode; a gate insulating film over the third oxide semiconductor film; and a gate electrode over the gate insulating film. A first interface between the gate electrode and the gate insulating film has a region closer to the insulating surface than a second interface between the first oxide semiconductor film and the second oxide semiconductor film.
US09166059B2	Thin film transistor, array substrate and manufacturing method thereof, and display panel Embodiments of the invention provide a thin film transistor, an array substrate and a manufacturing method thereof, and a display panel. The thin film transistor comprises: an active layer pattern, a source electrode, a drain electrode and a gate electrode. The gate electrode is positioned above the active layer pattern, the source electrode is connected with the active layer pattern, the drain electrode is connected with the active layer pattern, and the source electrode and the drain electrode are disposed in an adjacent layer of the active layer pattern.
US09166056B2	Thin-film semiconductor device and method of manufacturing the same In a thin-film semiconductor device, a semiconductor layer has a bandgap energy of 1.6 eV or less, an insulating layer formed above the semiconductor layer includes: a first insulating layer region placed outside of a first contact opening and above one end of a gate electrode; a second insulating layer region placed outside of a second contact opening and above the other end of the gate electrode which opposes the one end; and a third insulating layer region being rectangular and placed between the first contact opening and the second contact opening.
US09166054B2	Semiconductor device and manufacturing method thereof A semiconductor device is provided in which ESD is less likely to occur in a manufacturing process thereof. In manufacture of a semiconductor device including a long lead wiring A, during steps with direct exposure to a plasma atmosphere, a plurality of island-shaped wirings is formed for the wiring A and then electrically connected to one another in series. Specifically, a plurality of island-shaped wirings is formed, covered with an insulating layer, and electrically connected to one another in series by a wiring formed over the insulating layer. The island-shaped wiring and the wiring formed over the insulating layer are electrically connected to each other through an opening formed in the insulating layer.
US09166051B2	RAM memory cell comprising a transistor The invention relates to a memory cell consisting of an isolated MOS transistor having a drain (8), a source (7) and a body region covered with an insulated gate (12), in which the body region is divided through its thickness into two separate regions (13, 14) of opposite conductivity types extending parallel to the plane of the gate, the body region closest to the gate having the opposite conductivity type to that of the drain/source.
US09166046B2	Semiconductor device and method of manufacturing A semiconductor device includes a gate structure, and a source region and a drain region on opposite sides of the gate structure. The source region comprises a first region of a first conductivity type, and a second region of a second conductivity type, the second conductivity type opposite to the first conductivity type. The first region is arranged between the second region and the gate structure. The second region comprises at least one projection protruding into the first region and toward the gate structure.
US09166045B1	High-k dielectric device and process In an illustrative embodiment, holes are formed in an insulating layer where the gates of NMOS and PMOS transistors are to be formed; and a hard mask spacer layer is formed on the exposed surfaces. Next, spacers are formed on the sidewalls of the holes by anisotropically etching the spacer layer to remove the portion of the spacer layer exposed at the bottom of each hole while leaving some of the spacer layer formed on the sidewalls of the holes. A high-k dielectric layer is then formed between the spacers; and a metal layer is formed on the high-k dielectric layer. Bulk metal layer is then formed on the metal layer. Chemical mechanical polishing is performed to remove the bulk gate metal down to the insulating layer, thereby isolating individual NMOS and PMOS gate structures.
US09166042B2	High voltage MOSFET diode reverse recovery by minimizing P-body charges This invention discloses a method for manufacturing a semiconductor power device in a semiconductor substrate comprises an active cell area and a termination area. The method comprises the steps of a) growing and patterning a field oxide layer in the termination area and also in the active cell area on a top surface of the semiconductor substrate b) depositing and patterning a polysilicon layer on the top surface of the semiconductor substrate at a gap distance away from the field oxide layer; c) performing a blank body dopant implant to form body dopant regions in the semiconductor substrate substantially aligned with the gap area followed by diffusing the body dopant regions into body regions in the semiconductor substrate; d) implanting high concentration body-dopant regions encompassed in and having a higher dopant concentration than the body regions e) applying a source mask to implant source regions having a conductivity opposite to the body region with the source regions encompassed in the body regions and surrounded by the high concentration body-dopant regions; and f) etching contact trenches into the source, body contact, and body regions.
US09166035B2	Delta doping layer in MOSFET source/drain region A transistor includes a gate terminal, a source terminal and a drain terminal. At least one of the source and drain terminals has a layered configuration that includes a terminal layer and an intervening layer. The terminal layer has a top surface and a bottom surface. The intervening layer is located within the terminal layer, between and spaced from the top and bottom surfaces, is oriented to be perpendicular to current flow, and is less than one tenth the thickness of the terminal layer. The terminal layer and the intervening layer include a common semiconductive compound and a common dopant, with a concentration of the dopant in the intervening layer being over ten times an average concentration of the dopant in the terminal layer.
US09166034B2	Semiconductor devices and methods of fabricating the same A semiconductor device, and a method of fabricating the same, include a substrate including two-dimensionally arranged active portions, device isolation patterns extending along sidewalls of the active portions, each of the device isolation patterns including first and second device isolation patterns, gate patterns extending across the active portions and the device isolation patterns, each of the gate patterns including a gate insulating layer, a gate line and a gate capping pattern, and ohmic patterns on the active portions, respectively. Top surfaces of the first device isolation pattern and the gate insulating layer may be lower than those of the second device isolation pattern and the gate capping pattern, respectively, and the ohmic patterns may include an extending portion on the first insulating layer.
US09166025B1	Methods of forming a nanowire device with a gate-all-around-channel configuration and the resulting nanowire device One illustrative method includes forming at least one layer of epi semiconductor cladding material around a fin and patterning the cladding material and the fin, thereby resulting in the patterned fin being positioned under the patterned cladding material, wherein the patterned cladding material has an upper portion and a plurality of substantially vertically oriented legs extending downward from the upper portion. The method also includes selectively removing the patterned fin relative to the patterned cladding material, forming a sacrificial gate structure all around at least a portion of the cladding material, forming an epi semiconductor source/drain region on each of the substantially vertically oriented legs, and forming a final gate structure around at least a portion of the cladding material.
US09166021B2	Semiconductor device and method for manufacturing the same Stable electrical characteristics and high reliability are provided for a miniaturized semiconductor device including an oxide semiconductor, and the semiconductor device is manufactured. The semiconductor device includes a base insulating layer; an oxide stack which is over the base insulating layer and includes an oxide semiconductor layer; a source electrode layer and a drain electrode layer over the oxide stack; a gate insulating layer over the oxide stack, the source electrode layer, and the drain electrode layer; a gate electrode layer over the gate insulating layer; and an interlayer insulating layer over the gate electrode layer. In the semiconductor device, the defect density in the oxide semiconductor layer is reduced.
US09166019B2	Semiconductor device and method of manufacturing the same A miniaturized transistor is provided with high yield. Further, a semiconductor device which has high on-state characteristics and which is capable of high-speed response and high-speed operation is provided. In the semiconductor device, an oxide semiconductor layer, a gate insulating layer, a gate electrode layer, an insulating layer, a conductive film, and an interlayer insulating layer are stacked in this order. A source electrode layer and a drain electrode layer are formed in a self-aligned manner by cutting the conductive film so that the conductive film over the gate electrode layer and the conductive layer is removed and the conductive film is divided. An electrode layer which is in contact with the oxide semiconductor layer and overlaps with a region in contact with the source electrode layer and the drain electrode layer is provided.
US09166018B2	Method of manufacturing semiconductor device When forming a p+ area and n+ area on the same surface of an n− semiconductor wafer, a first ion implantation forms the p+ area on the entire rear surface of the n− semiconductor wafer. Next, a resist mask selectively covering the rear surface of the n− semiconductor wafer is formed. With this resist mask as the mask, an n-type impurity is injected into the rear surface of the n− semiconductor wafer through a second ion implantation to form the n+ area on a portion deeper from the rear surface of the n− semiconductor wafer than the p+ type area. Thereafter, the n− semiconductor wafer is exposed to an oxygen (O2) gas atmosphere with fluorine (F) gas added to remove the resist mask and a silicon part between the rear surface of the n− semiconductor wafer in an FWD area not covered by the resist mask and the n+ area.
US09166015B1	Three dimensional semiconductor integrated circuit having gate pick-up line and method of manufacturing the same A 3D semiconductor integrated circuit having a gate pick-up line and a method of manufacturing the same, wherein the semiconductor integrated circuit includes a plurality of active pillars formed in a gate pick-up region, buffer layers formed on the respective active pillars in the gate pick-up region, gates each surrounding an outer circumference of the corresponding active pillar and the corresponding buffer layer, and a gate pick-up line electrically coupled to the gates.
US09166011B2	Semiconductor device having stable gate structure and method of manufacturing the same Disclosed are a semiconductor device having a stable gate structure, and a manufacturing method thereof, in which a gate structure is stabilized by additionally including a plurality of gate feet under a gate head in a width direction of the gate head so as to serve as supporters in a gate structure including a fine gate foot having a length of 0.2 μm or smaller, and the gate head having a predetermined size. Accordingly, it is possible to prevent the gate electrode of the semiconductor device from collapsing, and improve reliability of the semiconductor device during or after the process of the semiconductor device.
US09166010B2	FinFET device with epitaxial structure A FinFET device includes a substrate, a fin, and isolation regions on either side of the fin. The device also includes sidewall spacers above the isolation regions and formed along the fin structure. A recessing trench is formed by the sidewall spacers and the fin, and an epitaxially-grown semiconductor material is formed in and above the recessing trench, forming an epitaxial structure.
US09166008B2	SiC single crystal, SiC wafer, and semiconductor device An SiC single crystal having at least one orientation region where a basal plane dislocation has a high linearity and is oriented to three crystallographically-equivalent <11-20> directions, and an SiC wafer and a semiconductor device which are manufactured from the SiC single crystal. The SiC single crystal can be manufactured by using a seed crystal in which the offset angle on a {0001} plane uppermost part side is small and the offset angle on an offset direction downstream side is large and growing another crystal on the seed crystal.
US09166001B2	Vertical structure and method of forming semiconductor device According to an exemplary embodiment, a method of forming a semiconductor device is provided. The method includes: providing a vertical structure over a substrate; forming an etch stop layer over the vertical structure; forming an oxide layer over the etch stop layer; performing chemical mechanical polishing on the oxide layer and stopping on the etch stop layer; etching back the oxide layer and the etch stop layer to expose a sidewall of the vertical structure and to form an isolation layer; oxidizing the sidewall of the vertical structure and doping oxygen into the isolation layer by using a cluster oxygen doping treatment.
US09165999B2	Nitride semiconductor device According to one embodiment, a nitride semiconductor device including a device region and a guard ring formation region surrounding the device region, the nitride semiconductor device includes a first nitride semiconductor layer provided in the device region and the guard ring formation region; a second nitride semiconductor layer provided on the first nitride semiconductor layer and forming a hetero-junction with the first nitride semiconductor layer; and a shielding layer provided on the second nitride semiconductor layer in the guard ring formation region and electrically protecting the device region. A two-dimensional electron gas is present near an interface between the first nitride semiconductor layer and the second nitride semiconductor layer within the first nitride semiconductor layer below the shielding layer, and the shielding layer is in ohmic contact with the two-dimensional electron gas.
US09165998B2	Adhesion layer to minimize dielectric constant increase with good adhesion strength in a PECVD process Embodiments of the present invention provide a film stack and method for depositing an adhesive layer for a low dielectric constant bulk layer without the need for an initiation layer. A film stack for use in a semiconductor device comprises of a dual layer low-K dielectric deposited directly on an underlying layer. The dual low-K dielectric consists of an adhesive layer deposited without a carbon free initiation layer.
US09165997B2	Semiconductor process A semiconductor structure includes a substrate, a resist layer, a dielectric material, two U-shaped metal layers and two metals. The substrate has an isolation structure. The resist layer is located on the isolation structure. The dielectric material is located on the resist layer. Two U-shaped metal layers are located at the two sides of the dielectric material and on the resist layer. Two metals are respectively located on the two U-shaped metal layers. This way a semiconductor process for forming said semiconductor structure is provided.
US09165992B2	Array substrate and display panel using the same An array substrate having a first area and a second area is disclosed. The array substrate comprises a first substrate, a TFT element, an insulating layer, a first electrode layer, an organic emitting layer, a first touching electrode and a second electrode layer. The TFT element is disposed above the first substrate, and comprises a gate layer, a drain layer and a semiconductor layer. The insulating layer is disposed above the TFT element. The first electrode layer is disposed above the insulating layer. The first touch electrode is composed of one of the gate layer, the drain layer, the first electrode layer and an additional electrode layer, and transfers or receives a touch signal. The second electrode layer has a step in the boundary between the first and second areas, hence breaking off into first and second parts. The first part is electrically insulated from the second part.
US09165987B2	Semiconductor device and method of manufacturing same A FET is formed on a semiconductor substrate, a curved surface having a radius of curvature is formed on an upper end of an insulation, a portion of a first electrode is exposed corresponding to the curved surface to form an inclined surface, and a region defining a luminescent region is subjected to etching to expose the first electrode. Luminescence emitted from an organic chemical compound layer is reflected by the inclined surface of the first electrode to increase a total quantity of luminescence taken out in a certain direction.
US09165984B2	OLEDs for use in NVIS capable devices A device is provided with a first OLED having a peak wavelength in the range 500-600 nm and a second OLED having a peak wavelength in the range 400-500 nm. Less than 2% of the light emitted by the first OLED has a wavelength of 650 nm or longer and less than 2% of the light emitted by the second OLED has a wavelength of 650 nm or longer.
US09165978B2	Light emitting apparatus and method for fabricating the same A light emitting apparatus includes a substrate having a first substrate portion, a second substrate portion arranged parallel to the first substrate portion, and a connection portion connecting the first substrate portion and the second substrate portion to each other. A plurality of first light emitting elements is formed on the first substrate portion; and a plurality of second light emitting elements is formed on the second substrate portion.
US09165974B2	Electronic devices including multiple semiconductor layers An electronic device may include a first semiconductor layer, a first electrode layer on the semiconductor layer, an adhesive insulating layer on the first electrode layer, a second electrode layer on the adhesive insulating layer, a second semiconductor layer. The first electrode layer may include a first plurality of electrodes, the first electrode layer may be between the adhesive insulating layer and the first semiconductor layer, and the adhesive insulating layer may include at least one of SiOCN, SiBN, and/or BN. The second electrode layer may include a second plurality of electrodes, the adhesive insulating layer may be between the first and second electrode layers, and the second electrode layer may be between the adhesive insulating layer and the second semiconductor layer.
US09165973B2	Solid state imaging device, method of producing solid state imaging device, and electronic apparatus A solid state imaging device includes: a substrate; a photoelectric conversion unit that is formed on the substrate to generate and accumulate signal charges according to light quantity of incident light; a vertical transmission gate electrode that is formed to be embedded in a groove portion formed in a depth direction from one side face of the substrate according to a depth of the photoelectric conversion unit; and an overflow path that is formed on a bottom portion of the transmission gate to overflow the signal charges accumulated in the photoelectric conversion unit.
US09165970B2	Back side illuminated image sensor having isolated bonding pads Provided is an image sensor device. The image sensor device includes having a front side, a back side, and a sidewall connecting the front and back sides. The image sensor device includes a plurality of radiation-sensing regions disposed in the substrate. Each of the radiation-sensing regions is operable to sense radiation projected toward the radiation-sensing region through the back side. The image sensor device includes an interconnect structure that is coupled to the front side of the substrate. The interconnect structure includes a plurality of interconnect layers and extends beyond the sidewall of the substrate. The image sensor device includes a bonding pad that is spaced apart from the sidewall of the substrate. The bonding pad is electrically coupled to one of the interconnect layers of the interconnect structure.
US09165966B2	CMOS image sensors including an isolation region adjacent a light-receiving region CMOS image sensors are provided. A CMOS image sensor may include a semiconductor substrate including a light-receiving region and a logic region adjacent the light-receiving region. The CMOS image sensor may include a photoelectric conversion region in the light-receiving region. Moreover, the CMOS image sensor may include an isolation region including an interface with a sidewall of the photoelectric conversion region. The isolation region may include a first refractive index that is smaller than a second refractive index of the semiconductor substrate, and the isolation region may be between the logic region and the sidewall of the photoelectric conversion region.
US09165963B2	Non-retro-reflective imaging using tilted image planes A non-retro-reflective imaging system and methods in which tilted image plane imaging is combined with selective Fourier filtering to substantially eliminate retro-reflection from the system. In certain examples, tilted image plane imaging is achieved using sliced source imaging. Through rotation of the image plane, the majority of incident light is reflected off-axis, rather than being retro-reflected. The Fourier filter is used to block incoming light from a particular angle that would otherwise be normally incident on the rotated image plane and retro-reflected. One example of a non-retro-reflective imaging system includes an optical element that focuses electromagnetic radiation onto a tilted image plane, an imaging sensor co-aligned with the tilted image plane, and a Fourier filter positioned in a Fourier plane of the optical element, a position of the Fourier filter in the Fourier plane determined by the tilt angle of the tilted image plane.
US09165961B2	Solid-state imaging device A solid-state imaging device includes a dielectric substrate, a solid-state imaging element disposed on the dielectric substrate, and including a photosensitive unit at a portion of a front surface thereof, an adhesive between the dielectric substrate and the solid-state imaging element, connection conductors, a sealant, and an upper package part. The solid-state imaging element includes a photosensitive unit at a portion of a front surface thereof, and is bonded to the dielectric substrate by the adhesive such that the adhesive is in contact with a portion of a rear surface of the solid-state imaging element so as to permit air flow along other portions of the rear surface of the solid-state image element. The connection conductors electrically connect the solid-state imaging element and the dielectric substrate. The upper package part is provided on the front surface of the solid-state imaging element so as to hermetically seal the photosensitive unit.
US09165956B2	Array substrate and manufacturing method thereof Embodiments of the present invention relate to an array substrate and a manufacturing method thereof. The manufacturing method comprises: step 1: forming a gate line, a gate electrode, a first insulating layer, an active layer and ohmic contact layers on a base substrate by a first patterning process using a gray-tone or half-tone mask, in which the active layer between the ohmic contact layers corresponds to a channel region; step 2: forming a second insulating layer and a pixel electrode film on the base substrate obtained after the step 1 by a second patterning process using a gray-tone or half-tone mask; and step 3: forming a drain electrode, a source electrode, a data line and a passivation layer on the base substrate obtained after the step 2 by a third patterning process using a gray-tone or half-tone mask.
US09165953B2	Flat panel display device with oxide thin film transistors and method for fabricating the same A flat panel display device with oxide thin film transistors and a fabricating method thereof are disclosed. The flat panel display device includes: a substrate; gate lines and data lines formed to cross each other and define a plurality of pixel regions on the substrate; the thin film transistors each including an oxide channel layer which is formed at an intersection of the gate and data lines; a pixel electrode and a common electrode formed in the pixel region with having a passivation layer therebetween; and step coverage compensation patterns formed at a step portion formed by the gate line and a gate electrode of the thin film transistor.
US09165947B2	Semiconductor device, TFT, capacitor and method of manufacturing the same A semiconductor device includes a gate, a first electrode, a first insulating layer, an active layer, an etching stop layer, a second insulating layer, a source, a drain and a second electrode. The first insulating layer covers the gate and the first electrode. The active layer and the etching stop layer are disposed on the first insulating layer above the gate and the first electrode respectively. The second insulating layer covers the active layer and the etching stop layer and has a first opening and a second opening exposing the active layer and a third opening exposing the etching stop layer. The source and the drain are disposed on the second insulating layer and contact with the active layer through the first opening and the second opening respectively. The second electrode is located on the second insulating layer and contacts with the etching stop layer through the third opening.
US09165944B2	Semiconductor device including SOI butted junction to reduce short-channel penalty A semiconductor device comprises first and second gate stacks formed on a semiconductor-on-insulator (SOI) substrate. The SOI substrate includes a dielectric layer interposed between a bulk substrate layer and an active semiconductor layer. A first extension implant portion is disposed adjacent to the first gate stack and a second extension implant portion is disposed adjacent to the second gate stack. A halo implant extends continuously about the trench. A butting implant extends between the trench and the dielectric layer. An epitaxial layer is formed at the exposed region such that the butting implant is interposed between the epitaxial layer and the dielectric layer.
US09165943B2	ON-SOI integrated circuit comprising a thyristor (SCR) for protection against electrostatic discharges An integrated circuit includes an UTBOX insulating layer under and plumb with first and second electronic components, and corresponding ground planes and oppositely-doped wells made plumb with them. The wells contact with corresponding ground planes. A pair of oppositely doped bias electrodes, suitable for connecting corresponding bias voltages, contacts respective wells and ground planes. A third electrode contacts the first well. A first trench isolates one bias electrode from the third electrode and extends through the layer and into the first well. A second trench isolates the first bias electrode from one component. This trench has an extent that falls short of reaching an interface between the first ground plane and the first well.
US09165942B2	Programmable logic device An object of the present invention is to provide a programmable logic device which has short start-up time after supply of power is stopped, is highly integrated, and operates with low power. In a programmable logic device including an input/output block, a plurality of logic blocks each including a logic element, and a wiring connecting the plurality of logic blocks, the logic element has a configuration memory for holding configuration data and a look-up table including a selection circuit. The configuration memory includes a plurality of memory elements each of which includes a transistor whose channel region is in an oxide semiconductor film and an arithmetic circuit provided between the transistor and the selection circuit. Configuration data is selectively changed and output by the selection circuit in accordance with an input signal.
US09165940B2	Three dimensional NAND device with silicide containing floating gates and method of making thereof A method of making a monolithic three dimensional NAND string, including providing a stack of alternating first material layers and second material layers different from the first material layer over a substrate, the stack comprising at least one opening containing a charge storage material comprising a silicide layer, a tunnel dielectric on the charge storage material in the at least one opening, and a semiconductor channel on the tunnel dielectric in the at least one opening, selectively removing the second material layers without removing the first material layers from the stack and forming control gates between the first material layers.
US09165937B2	Semiconductor devices including stair step structures, and related methods Semiconductor devices, such as three-dimensional memory devices, include a memory array including a stack of conductive tiers and a stair step structure. The stair step structure is positioned between first and second portions of the memory array and includes contact regions for respective conductive tiers of the stack of conductive tiers. The first portion of the memory array includes a first plurality of select gates extending in a particular direction over the stack. The second portion of the memory array includes a second plurality of select gates also extending in the particular direction over the stack of conductive tiers. Methods of forming and methods of operating such semiconductor devices, including vertical memory devices, are also disclosed.
US09165936B2	Dummy end-gate based anti-fuse device for finFET technologies An anti-fuse device for fin field-effect transistor (finFET) technology includes a dummy gate, an electrically conductive contact, and a diffusion contact. The dummy gate is formed over an end-corner of a fin. The electrically conductive contact is disposed on a portion of the dummy gate and can be used as a first electrode of the device. The diffusion contact is disposed over the fin and can be used as a second electrode of the device.
US09165930B2	Semiconductor device and method for fabricating the same A semiconductor device includes a memory block including a transistor region and a memory region. A variable resistance layer of the memory region acts as a gate insulating layer in the transistor region.
US09165928B2	Methods of forming gate structures for CMOS based integrated circuit products and the resulting devices One illustrative method disclosed herein includes forming gate insulation layers and a first metal layer for NMOS and PMOS devices from the same material, selectively forming a first metal layer only for the PMOS device, and forming different shaped metal silicide regions within the NMOS and PMOS gate cavities. A novel integrated circuit product disclosed herein includes an NMOS transistor with an NMOS gate insulation layer, an NMOS metal silicide having a generally rectangular cross-sectional configuration and an NMOS metal layer positioned on the NMOS metal silicide region. The product also includes a PMOS transistor with the same gate insulation material, a first PMOS metal and a PMOS metal silicide region, wherein the NMOS and PMOS metal silicide regions are comprised of the same metal silicide.
US09165924B2	Vertical channel type nonvolatile memory device and method for fabricating the same A method for fabricating a vertical channel type nonvolatile memory device includes: alternately forming a plurality of sacrificial layers and a plurality of interlayer dielectric layers over a semiconductor substrate; etching the sacrificial layers and the interlayer dielectric layers to form a plurality of first openings for channel each of which exposes the substrate; filling the first openings to form a plurality of channels protruding from the semiconductor substrate; etching the sacrificial layers and the interlayer dielectric layers to form second openings for removal of the sacrificial layers between the channels; exposing side walls of the channels by removing the sacrificial layers exposed by the second openings; and forming a tunnel insulation layer, a charge trap layer, a charge blocking layer, and a conductive layer for gate electrode on the exposed sidewalls of the channels.
US09165922B2	Semiconductor device According to an embodiment, a semiconductor device includes a conductive substrate, a Schottky barrier diode, and a field-effect transistor. The Schottky barrier diode is mounted on the conductive substrate and includes an anode electrode and a cathode electrode. The anode electrode is electrically connected to the conductive substrate. The field-effect transistor is mounted on the conductive substrate and includes a source electrode, a drain electrode, and a gate electrode. The source electrode of the field-effect transistor is electrically connected to the cathode electrode of the Schottky barrier diode. The gate electrode of the field-effect transistor is electrically connected to the anode electrode of the Schottky barrier diode.
US09165921B2	Transistor cell array including semiconductor diode One embodiment of a semiconductor device includes a dense trench transistor cell array. The dense trench transistor cell array includes a plurality of transistor cells in a semiconductor body. A width w3 of a transistor mesa region of each of the plurality of transistor cells and a width w1 of a first trench of each of the plurality of transistor cells satisfy the following relationship: w3<1.5×w1. The semiconductor device further includes semiconductor diodes. At least one of the semiconductor diodes is arranged between first and second parts of the plurality of transistor cells and includes a diode mesa region adjoining opposing walls of second trenches. A depth d1 of the first trench and a depth d2 of the second trenches differ by at least 20%.
US09165917B2	In-line stacking of transistors for soft error rate hardening Each one of a pair of CMOS transistors is formed in its own island and a gate terminal for each transistor is formed by a single, in-line conductor connecting both gate terminals together. This type of “in-line” connection achieves nearly a five-time improvement in the reduction of the ability of ionizing radiation particles to strike both transistors at the same time as compared to prior art “side-by-side” transistor stacking through use of a relatively smaller solid angle spanning the two transistors. This results in “hardening” of the transistors and improving their resistance to single event upsets and, thus, improving the soft error rate (SER) of the transistors.
US09165916B2	Semiconductor package and method of fabricating the same A semiconductor package and a method of fabricating the same. The method may include mounting a lower stack including a plurality of lower semiconductor chips on a substrate and mounting an upper stack including a plurality of upper semiconductor chips on the lower stack. According to example embodiments of the inventive concept, the semiconductor package can be easily fabricated.
US09165914B2	Forming die backside coating structures with coreless packages Methods of forming a microelectronic packaging structure and associated structures formed thereby are described. Those methods may include attaching a patterned die backside film (DBF) on a backside of a die, wherein the patterned DBF comprises an opening surrounding at least one through silicon via (TSV) pad disposed on the backside of the die.
US09165911B2	Microelectronic package with stacked microelectronic units and method for manufacture thereof A microelectronic package may include a first microelectronic unit including a semiconductor chip having first chip contacts, an encapsulant contacting an edge of the semiconductor chip, and first unit contacts exposed at a surface of the encapsulant and electrically connected with the first chip contacts. The package may include a second microelectronic unit including a semiconductor chip having second chip contacts at a surface thereof, and an encapsulant contacting an edge of the chip of the second unit and having a surface extending away from the edge. The surfaces of the chip and the encapsulant of the second unit define a face of the second unit. Package terminals at the face may be electrically connected with the first unit contacts through bond wires electrically connected with the first unit contacts, and the second chip contacts through metalized vias and traces formed in contact with the second chip contacts.
US09165907B2	Method and a system for producing a semi-conductor module In a method for producing a semi-conductor module (10) comprising at least two semi-conductor chips (12, 14) and an interposer (20) which has electrically conductive structures (28) connecting the semi-conductor chips (12, 14) to one another, the interposer (20) is printed directly onto a first (12) of the semi-conductor chips. When the interposer (20) is printed on, the electrically conductive structures (28) are produced by means of electrically conductive ink (68). The second semi-conductor chip (14) is mounted on the interposer (20) such that the two semi-conductor chips (12, 14) are arranged one above the other and that the interposer (20) forms an intermediate layer between the two semi-conductor chips (12, 14).
US09165906B2	High performance package on package A microelectronic assembly can include a first package comprising a processor and a second package electrically connected to the first package. The second package can include two or more microelectronic elements each having memory storage array function and contacts at a respective element face, upper and lower opposite package faces, upper and lower terminals at the respective upper and lower package faces, and electrically conductive structure extending through the second package. At least portions of edges of respective microelectronic elements of the two or more microelectronic elements can be spaced apart from one another, so as to define a central region between the edges that does not overlie any of the element faces of the microelectronic elements of the second package. The electrically conductive structure can be aligned with the central region and can electrically connect the lower terminals with at least one of: the upper terminals or the contacts.
US09165901B2	Semiconductor device A semiconductor device includes a header, a semiconductor chip fixed to the header constituting a MOSFET, and a sealing body of insulating resin which covers the semiconductor chip, the header and the like, and further includes a drain lead contiguously formed with the header and projects from one side surface of the sealing body, and a source lead and a gate lead which project in parallel from one side surface of the sealing body, and wires which are positioned in the inside of the sealing body and connect electrodes on an upper surface of the semiconductor chip and the source lead and the gate lead, with a gate electrode pad arranged at a position from the gate lead and the source lead farther than a source electrode pad.
US09165900B2	Semiconductor package and process for fabricating same A package carrier includes: (a) a dielectric layer defining a plurality of openings; (b) a patterned electrically conductive layer, embedded in the dielectric layer and disposed adjacent to a first surface of the dielectric layer; (c) a plurality of electrically conductive posts, disposed in respective ones of the openings, wherein the openings extend between a second surface of the dielectric layer to the patterned electrically conductive layer, the electrically conductive posts are connected to the patterned electrically conductive layer, and an end of each of the electrically conductive posts has a curved profile and is faced away from the patterned electrically conductive layer; and (d) a patterned solder resist layer, disposed adjacent to the first surface of the dielectric layer and exposing portions of the patterned electrically conductive layer corresponding to contact pads. A semiconductor package includes the package carrier, a chip, and an encapsulant covering the chip and the package carrier.
US09165899B2	Stacked package and method for manufacturing the same The disclosure relates to a stacked package and a method for manufacturing the same. The stacked package includes: a lower package including a substrate formed with ball lands in a periphery of an upper surface thereof, a semiconductor chip mounted over the upper surface, first solder balls formed over the ball lands and each having a side surface cut along an edge of the substrate and a polished upper surface, and a mold part for molding the upper surface including the semiconductor chip and the first solder balls, the cutted side surfaces and polished upper surfaces being exposed by the mold part; and an upper package stacked over the lower package and provided with second solder balls bonded to the first solder balls.
US09165891B2	ESD protection circuit One embodiment of the disclosure provides an electrostatic discharge protection circuit. The electrostatic discharge protection circuit includes a p-type field effect transistor, a capacitance device and an n-type field effect transistor. The p-type field effect transistor has a source coupled to an input/output terminal, a gate coupled to a first node and a drain coupled to a second node. The capacitance device has a first terminal coupled to a first rail and a second terminal coupled to the first node. The n-type field effect transistor has a source coupled to the first rail, a gate coupled to the second node and a drain coupled to the first node.
US09165890B2	Chip package comprising alignment mark and method for forming the same An embodiment of the invention provides a chip package which includes: a semiconductor substrate having a first surface and an opposite second surface; a device region disposed in the substrate; a dielectric layer located on the first surface of the semiconductor substrate; a plurality of conducting pads located in the dielectric layer and electrically connected to the device region; at least one alignment mark disposed in the semiconductor substrate and extending from the second surface towards the first surface.
US09165888B2	Interconnect structures for stacked dies, including penetrating structures for through-silicon vias, and associated systems and methods Interconnect structures for stacked dies, including penetrating structures for through-silicon vias, and associated systems and methods are disclosed. A system in accordance with a particular embodiment includes a first semiconductor substrate having a first substrate material, and a penetrating structure carried by the first semiconductor substrate. The system further includes a second semiconductor substrate having a second substrate material with a preformed recess. The penetrating structure of the first semiconductor substrate is received in the recess of the second semiconductor substrate and is mechanically engaged with the recess and secured to the second semiconductor substrate.
US09165886B2	Sensor packaging method and sensor packages A method (80) entails providing (82) a structure (117), providing (100) a controller element (102, 24), and bonding (116) the controller element to an outer surface (52, 64) of the structure. The structure includes a sensor wafer (92) and a cap wafer (94) Inner surfaces (34, 36) of the wafers (92, 94) are coupled together, with sensors (30) interposed between the wafers. One wafer (94, 92) includes a substrate portion (40, 76) with bond pads (42) formed on its inner surface (34, 36). The other wafer (94, 92) conceals the substrate portion (40, 76). After bonding, methodology (80) entails forming (120) conductive elements (60) on the element (102, 24), removing (126) material sections (96, 98, 107) from the wafers to expose the bond pads, forming (130) electrical interconnects (56), applying (134) packaging material (64), and singulating (138) to produce sensor packages (20, 70).
US09165883B2	Interconnection structure for an integrated circuit The disclosure relates to a method of fabricating an interconnection structure of an integrated circuit, comprising the steps of: forming a first conductive element within a first dielectric layer; depositing a first etch stop layer above the first conductive element and the first dielectric layer; forming an opening in the first etch stop layer above the first conductive element, to form a first connection area; depositing a second dielectric layer above the etch stop layer and above the first conductive element in the connection area; etching the second dielectric layer to form at least one hole which is at least partially aligned with the connection area; and filling the hole with a conductive material to form a second conductive element in electrical contact with the first conductive element.
US09165880B2	Process control methods for CMP (chemical mechanical polishing) and other polishing methods used to form semiconductor devices A method for controlling device feature sizes produced by polishing operations such as chemical mechanical polishing (CMP) is provided. The method includes instituting process controls to control the processing operations used in combination to produce features of a metal layer with a desired thickness, based on the thickness of the previous metal layer or layers. A target thickness for first and second metal layers is established. After the first metal layer is produced and the difference between the first metal target thickness and the actual first metal thickness is determined, the target thickness for the second metal features is adjusted. Once the target thickness for the second metal features is adjusted, each of the processing operations used to produce the second metal layer is controlled in combination to produce the second metal features with the adjusted target thickness.
US09165878B2	Semiconductor packages and methods of packaging semiconductor devices Semiconductor packages and methods for forming a semiconductor package are presented. The method includes providing a package substrate having first and second major surfaces. The package substrate includes at least one substrate layer having at least one cavity. Interconnect structure is formed. At least one conductive stud is formed within the cavity and a conductive trace and a connection pad are formed over the first major surface of the package substrate and are coupled to top surface of the conductive stud. A package pad is formed and is directly coupled to the conductive stud. A die having conductive contacts on its first or second surface is provided. The conductive contacts of the die are electrically coupled to the interconnect structure. A cap is formed over the package substrate to encapsulate the die.
US09165877B2	Fan-out semiconductor package with copper pillar bumps A system-in-package includes a package carrier; a first semiconductor die having a die face and a die edge, the first semiconductor die being assembled face-down to a chip side of the package carrier, wherein a plurality of contact pads are situated on the die face; a second semiconductor die mounted on the package carrier and adjacent to the first semiconductor die; a rewiring laminate structure between the first semiconductor die and the package carrier, the rewiring laminate structure comprising a re-routed metal layer, wherein at least a portion of the re-routed metal layer projects beyond the die edge; and a plurality of copper pillar bumps arranged on the rewiring laminate structure for electrically connecting the first semiconductor die with the package carrier.
US09165874B2	Semiconductor device, method of manufacturing semiconductor device, and electronic apparatus A semiconductor device includes a base substrate and first and second semiconductor wires which are arranged side by side on the base substrate, and the base substrate is provided with an opening (inter-wire grove, slit) in an extending direction of the first and second semiconductor wires between the first semiconductor wire and the second semiconductor wire.
US09165873B1	Semiconductor package having etched foil capacitor integrated into leadframe A packaged semiconductor device including a leadframe made of a first metal, the leadframe including structures with surfaces and sidewalls; capacitors attached to surface portions of the leadframe structures, the capacitors having sidewalls coplanar with structure sidewalls; the capacitors including a foil of conductive material attached to the structure surface, the conductive material having pores covered by oxide and filled with conductive polymer, the capacitors topped by electrodes made of a second metal.
US09165869B1	Semiconductor device with twisted leads A lead frame for a semiconductor device has a die flag and leads that surround the die flag. In order to decrease the distance or spacing between inner lead ends and the die flag, which allows for short bond wires for connecting the inner lead ends to a die mounted on the die flag, at least some of the leads are twisted along their lengths to be angled with respect to a die-flag plane. The pitch between such twisted leads can be reduced without resulting in physical contact between adjacent leads, enabling the leads to extend further towards the die flag.
US09165864B2	Power overlay structure with leadframe connections A power overlay (POL) packaging structure that incorporates a leadframe connection is disclosed. The a POL structure includes a POL sub-module having a dielectric layer, at least one semiconductor device attached to the dielectric layer and that includes a substrate composed of a semiconductor material and a plurality of connection pads formed on the substrate, and a metal interconnect structure electrically coupled to the plurality of connection pads of the at least one semiconductor device, with the metal interconnect structure extending through vias formed through the dielectric layer so as to be connected to the plurality of connection pads. The POL structure also includes a leadframe electrically coupled to the POL sub-module, with the leadframe comprising leads configured to make an interconnection to an external circuit structure.
US09165857B2	Heat dissipation lid having direct liquid contact conduits A heat dissipation lid that includes a plate having a first surface, an opposing second surface, and at least one sidewall extending from the plate second surface. The heat dissipation lid also includes at least one fluid delivery conduit and at least one fluid removal conduit, each extending between the plate first and second surface, and at least one spacing projection extending from the plate second surface to establish and maintain a desired distance between the plate second surface and a microelectronic device, when the heat dissipation lid is positioned to remove heat from the microelectronic device.
US09165852B2	Mounting structure for printed circuit board, and semiconductor device using such structure A mounting structure for a printed circuit board, includes a printed circuit board to which a heavy material is fixed; a fixing member fixed to the printed circuit board immediately below the heavy material; and a receiving member fixed to a main body. A bottom portion of the fixing member is disposed in the receiving member, and fixed to the receiving member by a resin adhesive.
US09165851B2	Semiconductor device, method for manufacturing the same, power supply apparatus and high-frequency amplification unit A semiconductor device includes a compound semiconductor multilayer structure, a fluorine-containing barrier film that covers a surface of the compound semiconductor multilayer structure, and a gate electrode that is arranged over the compound semiconductor multilayer structure with the fluorine-containing barrier film placed the gate and the compound semiconductor multilayer structure.
US09165847B2	Semiconductor device including a material to absorb thermal energy A semiconductor device includes a semiconductor chip and a first material including molecules that are configured to absorb thermal energy by reversibly changing a spatial molecular structure of the molecules.
US09165845B2	Semiconductor device Provided is a semiconductor device having a pad on a semiconductor chip, a first passivation film formed over the semiconductor chip and having an opening portion on the pad of a probe region and a coupling region, a second passivation film formed over the pad and the first passivation film and having an opening portion on the pad of the coupling region, and a rewiring layer formed over the coupling region and the second passivation film and electrically coupled to the pad. The pad of the probe region placed on the periphery side of the semiconductor chip relative to the coupling region has a probe mark and the rewiring layer extends from the coupling region to the center side of the semiconductor chip. The present invention provides a technology capable of achieving size reduction, particularly pitch narrowing, of a semiconductor device.
US09165836B1	Methods of forming replacement gate structures using a gate height register process to improve gate height uniformity and the resulting integrated circuit products One method disclosed includes, among other things, forming a gate registration structure above an isolation region, wherein the gate registration structure comprises a plurality of layers of material, the uppermost layer of which is a polish-stop layer, forming first and second sacrificial gate structures above first and second active regions, respectively, wherein the first and second sacrificial gate structures abut and engage opposite sides of the gate registration structure, and performing at least one first chemical mechanical polishing (CMP) process to remove the gate cap layer so as to thereby expose a sacrificial gate electrode in each of the first and second sacrificial gate structures, wherein the uppermost layer of the gate registration structure serves as a polish-stop layer during the at least one first CMP process.
US09165835B2	Method and structure for advanced semiconductor channel substrate materials Provided is a method and structure for utilizing advance channel substrate materials in semiconductor manufacturing. Advanced channel substrate materials such as germanium and Group III-V channel substrate materials, are advantageously utilized. One or more capping films including at least a nitride layer are formed over the channel substrate prior to patterning, ion implantation and the subsequent stripping and wet cleaning operations. With the capping layers intact during these operations, attack of the channel substrate material is prevented and the protective films are easily removed subsequently. The films are dimensioned in conjunction with the ion implantation operation to enable the desired dopant profile and concentration to be formed in the channel substrate material.
US09165834B2	Integrated native device without a halo implanted channel region and method for its fabrication According to one embodiment, a semiconductor structure including an integrated native device without a halo implanted channel region comprises an arrangement of semiconductor devices formed over a common substrate, the arrangement includes native devices disposed substantially perpendicular to non-native devices, wherein each of the native and non-native devices includes a respective channel region. The arrangement is configured to prevent formation of halo implants in the native device channel regions during halo implantation of the non-native device channel regions. In one embodiment, the disclosed native devices comprise native transistors capable of avoiding threshold voltage roll-up for channel lengths less than approximately 0.5 um.
US09165833B2	Method of forming a semiconductor die In one embodiment, semiconductor die having non-rectangular shapes and die having various different shapes are formed and singulated from a semiconductor wafer.
US09165832B1	Method of die singulation using laser ablation and induction of internal defects with a laser A method and system of hybrid laser dicing are described. In one embodiment, a method includes focusing a laser beam inside a substrate in regions between integrated circuits, inducing defects inside the substrate in the regions. The method involves patterning a surface of the substrate with a laser scribing process in the regions after inducing the defects in the substrate. The method further involves singulating the integrated circuits at the regions with the induced defects. In another embodiment, a system includes a first laser module configured to focus a laser beam inside a substrate in regions between integrated circuits, inducing defects inside the substrate in the regions. A second laser module is configured to pattern a surface of the substrate with a laser scribing process in the regions after inducing the defects. A tape extender is configured to stretch tape over which the substrate is mounted, singulating the integrated circuits.
US09165829B2	Double sided NMOS/PMOS structure and methods of forming the same A chip includes a dielectric layer having a top surface and a bottom surface, a first semiconductor layer overlying and bonded to the top surface of the dielectric layer, and a first Metal Oxide-Semiconductor (MOS) transistor of a first conductivity type. The first MOS transistor includes a first gate dielectric overlying and contacting the first semiconductor layer, and a first gate electrode overlying the first gate dielectric. A second semiconductor layer is underlying and bonded to the bottom surface of the dielectric layer. A second MOS transistor of a second conductivity type opposite to the first conductivity type includes a second gate dielectric underlying and contacting the second semiconductor layer, and a second gate electrode underlying the second gate dielectric.
US09165827B2	Semiconductor device and method of manufacturing semiconductor device The semiconductor device includes a capacitor including a plurality of interconnection layers stacked over each other, the plurality of interconnection layers each including a plurality of electrode patterns extended in a first direction, a plurality of via parts provided between the plurality of interconnection layers and electrically interconnecting the plurality of the electrode patterns between the interconnection layers adjacent to each other, and an insulating films formed between the plurality of interconnection layers and the plurality of via parts. Each of the plurality of via parts is laid out, offset from a center of the electrode pattern in a second direction intersecting the first direction, and the plurality of electrode patterns has a larger line width at parts where the via parts are connected to, and a distance between the electrode patterns and the adjacent electrode patterns is reduced at the parts.
US09165824B2	Interconnects with fully clad lines A metallization layer including a fully clad interconnect and a method of forming a fully clad interconnect. An opening is formed in a dielectric layer, wherein the dielectric layer has a surface and the opening includes walls and a bottom. A diffusion barrier layer and an adhesion layer are deposited on the dielectric layer. An interconnect material is deposited on the dielectric layer and reflowed into the opening forming an interconnect. An adhesion capping layer and diffusion barrier capping layer are deposited over the interconnect. The interconnect is surrounded by the adhesion layer and the adhesion capping layer and the adhesion layer and the adhesion capping layer are surrounded by the diffusion barrier layer and the diffusion capping layer.
US09165818B2	Method for forming insulating film [Problem] To provide a method capable of forming an insulating film having homogeneous and high bulk density and less suffering defects.[Means for solving] A substrate surface is coated with a silicon dioxide dispersion containing silicon dioxide fine particles, a polymer, a surfactant and a dispersion medium; and then further coated with a polysilazane composition; and thereafter heated to form an insulating film.
US09165811B2	Automated warehouse An automated warehouse includes an apparatus main body a transfer device. The apparatus main body includes a plurality of stationary shelves arranged horizontally and vertically, and having upper surfaces on which cassettes can be placed. The transfer device transfers the cassette by holding a flange of the cassette. The transfer device includes a vertical rail and a transfer head. The vertical rail includes an upper end adjacent to a supporting surface of a top stationary shelf. The transfer head is a member vertically movable along the vertical rail. The transfer head includes a vertical arm having a length such that the vertical arm can hold the flange of the cassette placed on the top stationary shelf.
US09165810B2	Conveyance device and substrate processing system A conveyance device, which conveys wafers in a casing 30, includes a primary blowing fan 17 that generates airflow within the casing 30 in a first direction; a discharge opening 26 that is located at a downstream side of the airflow generated by the primary blowing fan 17, is interconnected with the interior of the casing 30, and discharges gases at the interior of the casing 30 outside of the casing 30; a base 18d that is supported by a gate-shaped conveyance arm 22 disposed within the casing 30 and moves within the casing 30 at the upstream side of the discharge opening 26 and at the downstream side of the primary blowing fan 17; an end effector 21 that is located at the base 18d and that carries wafers; and a blowing fan 19 that is located at the base and that generates airflow in the first direction.
US09165809B2	Side roller and substrate transport device including the same A side roller moves up and down and a substrate transport device including the same prevents a substrate from being broken due to a foreign material decreasing wear of the side roller by transportation of the substrate. The side roller improves a yield of a transportation process.
US09165806B2	Substrate treatment apparatus A substrate treatment apparatus includes: a treatment chamber in which a substrate is treated; a substrate holding unit which holds the substrate in the treatment chamber; a shield member disposed above the substrate holding unit and having an opposing surface to be brought into opposed relation to the substrate holding unit; and a gas supply portion which has a downward gas supply port having an annular shape to surround the shield member as seen in plan and is disposed on an upper portion of the treatment chamber for supplying a gas into the treatment chamber.
US09165805B2	Tape-based epitaxial lift off apparatuses and methods An apparatus or method for forming a tape-based, epitaxial lift-off film. The epitaxial lift-off film can be for at least one of a solar device, a semiconductor device, and an electronic device. The apparatus can comprise: a tape supply section, the tape supply section providing an unloaded support tape; a lamination section for receiving the unloaded support tape and a plurality of substrates, each substrate containing an epitaxial film thereon, the lamination section adhering the substrates to the unloaded support tape to form a loaded support tape; and an ELO etch section comprising a pressure system for applying pressure on said loaded support tape such that pressure is applied progressively downward and progressively towards a center-line of said loaded support tape when passing through said ELO etch section, the ELO etch section removing the substrates from the loaded support tape, while leaving the epitaxial film on the loaded support tape.
US09165803B2	Bonding method, bonding apparatus and bonding system A bonding method according to an exemplary embodiment of the present disclosure includes a first holding processing, a second holding processing, a temporary bonding processing, a temperature increasing processing and a main bonding processing. In the first holding processing, a target substrate is held. In the second holding processing, a glass substrate held by electrostatic adsorption. In the temporary bonding processing, the target substrate and the glass substrate are temporarily bonded with a pressing force lower than a predetermined pressing force at a temperature lower than a predetermined temperature. In the temperature increasing processing, while releasing the electrostatic adsorption of the glass substrate at the same time as or after the temporary bonding, the temperature is increased to the predetermined temperature. In the main bonding processing, a main bonding of the target substrate and the glass substrate is performed with the predetermined pressing force.
US09165795B2	High performance low profile QFN/LGA A method for manufacturing a semiconductor device is disclosed. In one embodiment a semiconductor die is formed overlying a substrate. The semiconductor die is flip chip mounted to the substrate, wherein the substrate comprises a plurality of conductive traces. The semiconductor die and substrate are encapsulated with an encapsulating material. A top side of the encapsulating material is subjected to one of polishing, etching, and grinding to expose a top side of the semiconductor die. Finally, the bottom side of the substrate is subjected to one of polishing, etching, and grinding to remove the substrate and to reduce a thickness of the plurality of conductive traces.
US09165793B1	Making electrical components in handle wafers of integrated circuit packages A method for making an integrated circuit package includes providing a handle wafer having a first region defining a cavity. A capacitor is formed in the first region. The capacitor has a pair of electrodes, each coupled to one of a pair of conductive pads, at least one of which is disposed on a lower surface of the handle wafer. An interposer having an upper surface with a conductive pad and at least one semiconductor die disposed thereon is also provided. The die has an integrated circuit that is electroconductively coupled to a redistribution layer (RDL) of the interposer. The lower surface of the handle wafer is bonded to the upper surface of the interposer such that the die is disposed below or within the cavity and the electroconductive pad of the handle wafer is bonded to the electroconductive pad of the interposer in a metal-to-metal bond.
US09165792B2	Integrated circuit, a chip package and a method for manufacturing an integrated circuit An integrated circuit is provided, the integrated circuit including: a carrier including at least one electronic component and at least one contact area disposed on a first side of the carrier, wherein the at least one electronic component is electrically connected to the at least one contact area; an inorganic material layer wafer bonded to the first side of the carrier, wherein the carrier has a first coefficient of thermal expansion, and wherein the inorganic material layer has a second coefficient of thermal expansion, wherein the second coefficient of thermal expansion has a difference of less than 100% compared with the first coefficient of thermal expansion; and at least one contact via formed through the inorganic material layer, wherein the at least one contact via contacts the at least one contact area.
US09165790B2	Packaging substrate, method for manufacturing same, and chip packaging body having same A packaging substrate includes a base layer, a first wiring layer, a second wiring layer, a first solder mask layer, a second solder mask layer and copper portions. The first second wiring layers are arranged on opposite sides of the base layer. The first solder mask layer covers the first wiring layer, and defines plenty of first openings. The first wiring layer exposed through the first openings serves as first contact pads. The second solder mask layer covers the second wiring layer. The second solder mask layer defines plenty of second openings. The second wiring layer exposed through the second openings serves as second contact pads. The copper portions are formed on the second contact pads. The copper portions protrude beyond the second solder mask layer. This disclosure further relates to a method of manufacturing the packaging substrate and a chip packaging body.
US09165789B2	Fabrication method of packaging substrate A fabrication method of a packaging substrate includes: providing a metal board having a first surface and a second surface opposite to the first surface, wherein the first surface has a plurality of first openings for defining a first core circuit layer therebetween, the second surface has a plurality of second openings for defining a second core circuit layer therebetween, each of the first and second openings has a wide outer portion and a narrow inner portion, and the inner portion of each of the second openings is in communication with the inner portion of a corresponding one of the first openings; forming a first encapsulant in the first openings; forming a second encapsulant in the second openings; and forming a surface circuit layer on the first encapsulant and the first core circuit layer.
US09165784B2	Substrate processing method and storage medium Disclosed is a substrate processing method capable of preventing an etching rate from being deteriorated when a high aspect ratio hole or trench is formed on an oxide film. When a high aspect ratio hole or trench is formed on an oxide film by etching the oxide film formed on a wafer using a hard mask layer having an opening and made of silicon, the oxide film corresponding to the opening is etched using plasma generated from a processing gas containing a C4F6 gas and a methane gas. Subsequently, a reactive product generated by the etching and deposited on an inner surface of the hole of the oxide film is ashed with plasma generated from a processing gas containing an oxygen gas, and the etching and the ashing processes are repeated in sequence.
US09165777B2	Polishing agent and method for polishing substrate using the polishing agent Disclosed is a polishing agent comprising: water; tetravalent metal hydroxide particles; and an additive, wherein the additive contains at least one of a cationic polymer and a cationic polysaccharide. The present invention can provide a polishing agent which is capable of polishing an insulating film at a high speed with less polishing flaws, and having a high polishing rate ratio of a silicon oxide film and a stopper film, in the CMP technology of flattening insulating film. The present invention can also provide a polishing agent set for storing the polishing agent, and a method for polishing a substrate using this polishing agent.
US09165773B2	Aluminum dopant compositions, delivery package and method of use A novel method and system for using aluminum dopant compositions is provided. A composition of the aluminum dopant compositions is selected with sufficient vapor pressure and minimal carbon content, thereby enabling ease of delivery to an ion implant process and substantial reduction of carbon deposition during Al ion implantation. The source material is preferably stored and delivered from a sub-atmospheric storage and delivery device to enhance safety and reliability during the Al ion implantation process.
US09165772B2	Ion implantation method and ion implantation apparatus An ion implantation method includes reciprocally scanning an ion beam, mechanically scanning a wafer in a direction perpendicular to the ion beam scanning direction, implanting ions into the wafer, and generating an ion implantation amount distribution in a wafer surface of an isotropic concentric circle shape for correcting non-uniformity in the wafer surface in other semiconductor manufacturing processes, by controlling a beam scanning speed in the ion beam scanning direction and a wafer scanning speed in the mechanical scanning direction at the same time and independently using the respective control functions defining speed correction amounts.
US09165764B2	Plasma treatment method and plasma treatment device A plasma treatment device includes a dielectric window containing SiO2. The insulating film to be etched comprises silicon carbonitride. In a first plasma treatment step, a processing gas which contains no oxygen gas and contains CH2F2, etc, is used to deposit a protective film. In a second plasma treatment step, a processing gas which contains oxygen gas and contains CH3F, etc. is used to etch away the top and other portions of a part having a convex cross-sectional shape.
US09165758B2	Peeling system, peeling method, and computer storage medium A peeling system includes: a carry-in/carry-out station that loads/unloads substrates to be processed, support substrates, or stacked substrates in which these are made to adhere; a peeling process station that carries out prescribed processing on substrates to be processed, support substrates and stacked substrates; and a transport station provided between the carry-in/carry-out station and the peeling process station. The peeling process station has a peeling device that peels the stacked substrates, a first washing apparatus that washes peeled substrates to be processed, and a second washing apparatus that washes the peeled support substrates. The pressure inside the transport station is a positive pressure in relation to the pressure inside the peeling device, the pressure inside the first washing apparatus, and the pressure inside the second washing apparatus. The pressure inside a transport apparatus is a positive pressure in relation to the pressure inside the peeling device and the pressure inside the first washing apparatus.
US09165748B2	Plasma CVD method A plasma CVD method uses an electrode array in a reaction chamber, the electrode array including a plurality of inductively coupled electrodes, each electrode being folded back at the center so that each electrode is substantially U-shaped with two parallel straight portions, the electrodes are arranged such that all of the parallel straight portions are arranged parallel to each other in a common plane, each of the electrodes having at least a portion with a diameter of 10 mm or less, and a phase controlled power supply for feeding high frequency power to the feeding portions so as to establish a standing wave of a half wavelength or natural number multiple of a half wavelength between a feeding portion and a folded back portion and between a grounded portion and the folded back portion, and is controlled to have a phase difference between adjacent two feeding portions.
US09165747B2	Charged particle beam drawing apparatus and drawing chamber A charged particle beam drawing apparatus includes: a stage configured to support a specimen as a drawing target; and an airtight drawing chamber formed into a box shape provided with a side wall and a bottom plate, and configured to house the stage. The bottom plate includes: multiple support portions connected to the side wall and configured to support the stage; and a curved portion connected to the support portions and having a convex shape curved outward.
US09165746B2	Electron beam drift detection device and method for detecting electron beam drift An electron beam drift detection device and a method for detecting electron beam drift are provided in which the method includes placing a predetermined characteristic identification pattern on a surface of a workpiece; emitting an electron beam, and focusing and deflecting the electron beam such that the focused and deflected electron beam scans the surface of the workpiece and the characteristic identification pattern; detecting backscattered electrons and secondary electrons; and receiving detection signals and performing an image process on the detection signals to obtain an electronic image of the characteristic identification pattern, and measuring a drift degree by comparing the electronic image with the predetermined shape of the characteristic identification pattern.
US09165742B1	Inspection site preparation Embodiments of the present disclosure are directed to an electron beam imaging/inspection apparatus having an electron source device to direct flood electrons on a sample immediately before image acquisition or inspection. The apparatus comprises a first device configured to charge a sample in a first mode, wherein the first device includes an electron source configured to provide a flood beam of charged particles to a first area of the sample. The apparatus also comprises a second device configured to generate a primary beam of electrons and characterize an interaction between the primary beam and a second area of the sample within the first area in a second mode. The apparatus is configured to switch from the first mode to the second mode less than 1 second.
US09165740B2	Ionization probe assemblies The invention relates generally to sample ionization, and provides ionization probe assemblies, systems, computer program products, and methods useful for this purpose.
US09165737B2	High-brightness, long life thermionic cathode and methods of its fabrication An improved cathode comprises a cone-shaped emitter with a carbon-based coating applied to the emitter cone surface, in which there is a narrow annular gap between the emitter body and the carbon coating. The gap prevents direct contact between the carbon coating and the crystalline emitting material, thereby preventing damaging interactions and extending the useful lifetime of the cathode.
US09165735B2	High reliability, high voltage switch A high reliability, high voltage electronically controllable switch is created from a combination of relays of different types, with different characteristics, such as an electromechanical relay and an optoelectronic relay. The relays are closed and/or opened in accordance with a sequence that avoids actuating an electromechanical relay of such a compound switch to close or open under conditions that degrade the operating life of the electromechanical relay, even if the compound switch is hot switched under high voltage conditions. The switching sequence ends with the relays in a state that provides low on resistance, low crosstalk, low capacitance and/or low leakage. The switch can be relatively compact, enabling construction of an instrument serving as a switch matrix for an automatic test system.
US09165731B2	Protective door assembly for electrical devices A protective door having push switches, access to racking unit and viewing windows is assembled with the electrical device such that the protective door encloses the electrical device with a flame proof sealing. The push switches and cutout to access racking unit are made aligned with the electrical device such that the switches of the electrical device are actuated through the push switches, racking in and out the device is possible through the cutout to access racking unit and it allows reading the rating plate, display of the electrical device through the viewing windows in the protective door even if the protective door is closed. The push switch has a push rod and a spring loaded push button assembled inside a cylinder and the push button is clamped from the front of the protective door. The push switches are arranged such that a reset switch contact with the position reset switch of the electrical device, push switches to respectively switch ON and Switch OFF the electrical device.
US09165730B2	Switching apparatus A switching apparatus for an electric switch, in particular an electric circuit breaker, including a switching head with a grip section, and a switching frame connected to the switching head. In an embodiment, a bearing end of at least one spring element is mounted on the switching frame on at least one bearing device. The switching head for the bearing end of at least one spring element includes at least one positioning depression on the side of the switching head opposite to the grip section, which is embodied for a lateral positioning of the bearing end.
US09165728B2	On/off switch with contacts for electrical circuits and appliances A switch with contacts includes a housing formed by snap-fit connection of an upper cover and a base, an operating lever and a movable contact holder, the operating lever and the moveable contact holder being movably-fit to one other. A stop device with a lock mechanism is provided in the housing, the lock mechanism being disposed between the stop device and the movable contact holder. An unlock mechanism is arranged between the stop device and the operating lever. The movable contact holder has positions at each of its two ends with the movable contact holder located in the positions of the two ends. The stop device and the movable contact holder are locked and stopped by the unlock mechanism.
US09165726B2	Tap changer and vacuum switching tube for such a tap changer A tap changer for uninterrupted switching over between winding taps of a tapped transformer has two load branches each for a respective phase to be switched. Each load branch has a vacuum switching contact acting as main contact and parallel thereto at least one series connection of a switch-over resistance and a respective further vacuum switching contact. The two load branches are connected with a common load shunt or connectable by mechanical switching elements. Two respective vacuum switching contacts of each load branch are constructionally combined to form a single vacuum switching tube with two separate movable contacts actuatable independently of one another and a common fixed contact. The common fixed contact is connected with the common load shunt or connectable mechanical switching contacts.
US09165718B2	Wet electrolytic capacitor containing a hydrogen protection layer A wet electrolytic capacitor that contains a casing within which is positioned an anode formed from an anodically oxidized sintered porous body and a fluidic working electrolyte is provided. The casing contains a metal substrate over which is disposed a hydrogen protection layer that contains a plurality of sintered agglomerates formed from a valve metal composition. The present inventors have discovered that through careful selection of the relative particle size and distribution of the agglomerates, the resulting protection layer can effectively absorb and dissipate hydrogen radicals generated during use and/or production of the capacitor, which could otherwise lead to embrittlement and cracking of the metal substrate.
US09165715B2	Multilayer ceramic capacitor with electrodes having lead-out parts and method of manufacturing the same There is provided a multilayer ceramic capacitor including: a ceramic body in which a plurality of dielectric layers are stacked; a plurality of first and second internal electrodes alternately formed on the plurality of dielectric layers and including first and second lead-out parts having an overlap area exposed to one surface of the ceramic body, respectively; first and second external electrodes formed on one surface of the ceramic body and electrically connected to the first and second lead-out parts, respectively; and a first insulating layer formed on one surface of the ceramic body to cover exposed portions of the first and second lead-out parts, wherein the first and second lead-out parts are formed to have concave-convex portions alternating with each other in the overlap area therebetween.
US09165714B2	Electronic component An electronic component, preferably in the form of a laminated ceramic capacitor, which suppresses the growth of whiskers and has excellent solderability, includes an electronic component element in the shape of, for example, a rectangular parallelepiped. External electrodes of terminal electrodes are located on first and second end surfaces of the electronic component element. First plated films including plated Ni are located on the surfaces of the external electrodes. Second plated films are located on the surfaces of the first plated films. The second plated films have stacked structures including first plated layers and second plated layers. The second plated layers have lower degrees of densification than the first plated layers.
US09165713B2	Multilayer ceramic electronic component and board for mounting the same A multilayer ceramic electronic component includes a ceramic main body including dielectric layers and satisfying T/W>1.0 when W and T are width and thickness, respectively; and first and second internal electrodes stacked in the ceramic main body and facing each other with the dielectric layer interposed therebetween, the ceramic main body including an active layer corresponding to a capacitance forming portion contributing to capacitance formation and a cover layer corresponding to a non-capacitance forming portion provided on at least one of uppermost and lowermost surfaces of the active layer, and when the active layer is divided into three regions in a direction in which the first and second internal electrodes are stacked, an average width of internal electrodes in a central region of the three regions is Wa, and an average width of internal electrodes in upper and lower regions of the three regions is Wb, 0.920≦Wb/Wa≦0.998 is satisfied.
US09165712B2	Multilayer ceramic electronic component and fabrication method thereof There is provided a multilayer ceramic electronic component including: a ceramic main body; a plurality of internal electrodes; and external electrodes formed on outer surfaces of the ceramic main body and electrically connected to the internal electrodes, wherein an average thickness of the external electrodes is 10 μm or less, and when a thickness of the external electrodes in a central portion of the ceramic main body in a thickness direction is Tc and a thickness of the external electrodes at a point spaced apart from a central portion of a capacitance formation region in a thickness direction by a distance equal to 25% of a thickness (S) of the capacitance formation region is T1, 0.8≦\|T1/Tc\|≦1.0 is satisfied.
US09165711B2	Method of manufacturing a multilayered chip power inductor Disclosed is a method of manufacturing a multilayered chip power inductor by forming a laminate body having upper and lower sides by laminating magnetic sheets, forming an inner hollow by punching out a middle part of said laminate body, inserting a magnetic core into the inner hollow, where an electrical conductive coil is wound into said inner hollow, laminating a first copper clad magnetic sheet onto the upper and lower sides of said laminate body having the magnetic core in the inner hollow as a land layer having upper and lower sides, forming a land by etching said land layer, forming a hole by drilling the land, plating the hole formed in the land, laminating a second copper clad magnetic sheet as a terminal layer onto upper and lower sides of the land layer having the land, forming a terminal by etching the terminal layer, forming a hole by drilling the terminal, and plating the hole.
US09165706B2	Coil component A coil component is provided with a first magnetic substrate, a laminate body, and a second magnetic substrate. A coil is formed inside the laminate body. In the coil, a plurality of coil patterns provided on one surface of an insulation layer and a plurality of coil patterns provided on the other surface of the insulation layer are connected at multiple locations through vias. The coil patterns are configured in such a manner that a portion which is in contact with each via has a wider width widened with equal size from the center of a coil pattern to both sides thereof in the width direction, and a portion which is adjacent to the portion having the wider width across a gap has a narrower width(s) narrowed with equal size from the center of the coil pattern to both sides thereof in the width direction.
US09165705B2	Laminated inductor A laminated inductor having an internal conductor forming region, as well as a top cover region and bottom cover region formed in a manner sandwiching the internal conductor forming region between top and bottom; wherein the internal conductor forming region has a magnetic part formed with soft magnetic alloy grains, as well as helical internal conductor embedded in the magnetic part; and at least one of the top cover region and bottom cover region (or preferably both) is/are formed with soft magnetic alloy grains whose average grain size is greater than that of grains in the internal conductor forming region including the soft magnetic alloy grains constituting the magnetic part.
US09165703B2	Methods and systems for prolonged localization of drug delivery An effective method for prolonging localization of therapeutics within the rat gastrointestinal tract of at least about 12 hours is provided. The method includes localization of therapeutic agents that are nanoparticulated or nanoencapsulated. Attractive forces between an orally administered magnetic dose and an external magnet were monitored and internal dose motion in real time using biplanar videofluoroscopy was visualized. Tissue elasticity was quantified as a measure of tissue health by combining data streams. The methods address safety, efficacy, and monitoring capacity of magnetically localized doses and show a platform for testing the benefits of localized drug delivery.
US09165693B2	Multi-electrode cooling arrangement The invention relates to a collimator electrode, comprising an electrode body (81) that is provided with a central electrode aperture (82), wherein the electrode body defines an electrode height between two opposite main surfaces, and wherein the electrode body accommodates a cooling conduit (105) inside the electrode body for transferring a cooling liquid (102). The electrode body preferably has a disk shape or an oblate ring shape.The invention further relates to a collimator electrode stack for use in a charged particle beam generator, comprising a first collimator electrode and a second collimator electrode that are each provided with a cooling conduit (105) for transferring the cooling liquid (102), and a connecting conduit (110) for a liquid connection between the cooling conduits of the first and second collimator electrodes.
US09165692B2	Radioactive glass source A glass radiation-source with customized geometries to maximize receipt of radiation into treatment areas that is formed from either neutron-activated glass, radioisotopes molecularly bonded to glass, or radioisotopes encased within glass.
US09165688B2	Apparatuses, systems, devices, and methods of replacing at least partially non-functional portions of memory Subject matter disclosed herein relates to determining that a portion of a memory is at least partially non-functional, replacing the portion of at least partially non-functional memory; and adjusting an error detection and/or correction process responsive to determining that the portion of the memory is at least partially non-functional and/or replacing the portion of at least partially non-functional memory.
US09165685B2	Semiconductor memory device According to one embodiment, a semiconductor memory device includes semiconductor memory chips in which data requested to be written. The data has one or more pieces of first data in a predetermined unit. The device includes a write controller that writes the first data and redundancy information calculated by using a predetermined number of pieces of the first data and used for correcting an error in the predetermined number of pieces of the first data into different semiconductor memory chips; and a storage unit that stores identification information and region specifying information so as to be associated with each other. The identification information associates the first data and the redundancy information, and the region specifying information specifies a plurality of storage regions in the semiconductor memory chips to which the pieces of the first data and the redundancy information associated with each other are written.
US09165683B2	Multi-word line erratic programming detection Techniques are presented to detect word line failures (such as word line to word line shorts, control gate to substrate shorts, broken word lines, and so on) in non-volatile memory arrays. A first simultaneous read of multiple word lines is performed, followed by a second simultaneous read of the same word lines, where the read conditions of the two reads are shifted by a margin. For example, one of the read could use a standard read voltage on the word lines, while the other read could shift these levels slightly higher. The results of the two reads can then be compared on a bit line by bit line basis, XOR-ing the results to determine is the set of word lines may include any defective members.
US09165680B2	Memory integrated circuit with a page register/status memory capable of storing only a subset of row blocks of main column blocks An integrated circuit includes an array of memory cells that is arranged into rows, main columns, and redundant columns that perform repairs in the array. The main columns and the redundant columns are divided into row blocks. Bit lines couple the main columns to status memory indicating repair statuses of the repairs by the redundant columns. The integrated circuit receives a command, and performs an update on the status memory with the repair statuses specific to particular ones of the row blocks in a portion of the memory accessed by the command. Alternatively or in combination, the status memory has insufficient size to store the repair statuses of multiple ones of the row blocks of the main columns.
US09165677B2	Method and apparatus for memory fault tolerance A plurality of data lines and a plurality of bit lines may be used to write to and/or read from an array of memory cells. A switching element may select among different mappings between the plurality of data lines and the plurality of bit lines. The array may, for example, consist of N memory cells, the plurality of bit lines may consist of N bit lines, and the plurality of data lines may consist of N data lines, where N is an integer greater than 1. For a write operation in which a data block is to be written to the array, a configuration of the switching element may be controlled based, at least in part, on how sensitive the data block is to a faulty memory cell among the array of memory cells.
US09165673B2	Semiconductor memory device including sensing verification unit A semiconductor memory device includes a memory cell array configured to store data including a verification code; a sensing unit configured to sense the stored data including the verification code; and a verification unit configured to determine whether the sensing unit is able to sense the stored data based on a sensing condition, wherein the verification unit is configured to determine whether the sensing unit is able to sense the stored data based on the sensing condition and a value of the verification code sensed by the sensing unit.
US09165672B2	Nonvolatile memory device comprising page buffer and operation method thereof A nonvolatile memory device is provided which includes a cell array including a plurality of memory cells; a page buffer unit including a plurality of page buffers and configured to sense whether programming of selected memory cells is completed, at a program verification operation; and a control logic configured to provide a set pulse for setting data latches of each of the page buffers to a program inhibit state according to the sensing result, wherein the control logic provides the set pulse to at least two different page buffers such that data latches of the at least two different page buffers are set.
US09165671B2	Semiconductor memory device and method of operating the same The semiconductor memory device includes a memory cell array including a plurality of memory cells, a peripheral circuit unit configured to perform a program voltage applying operation, a first verifying operation, and a detrap voltage applying operation with respect to the plurality of memory cells, and a control logic unit configured to issue at least one command to the peripheral circuit unit to determine whether to perform the detrap voltage applying operation based on a result of the first verifying operation performed following the performance of the program voltage applying operation.
US09165670B2	Data retention detection techniques for a data storage device A data storage device includes a non-volatile memory and a controller. A method includes writing an indication of a first error rate of a first set of bits to the non-volatile memory. The first set of bits is sensed from a word line of the non-volatile memory. The word line is sensed to generate a second set of bits in response to a first power-on event being initiated at the data storage device after writing the indication of the first error rate to the non-volatile memory. The method further includes setting a data retention flag in response to a difference between the first error rate and a second error rate associated with the second set of bits satisfying a threshold.
US09165668B1	Data retention monitoring using temperature history in solid state drives Systems and methods for data retention manager in a solid state storage system utilizing temperature measurement mechanisms are disclosed. Background data scanning can provide an efficient way to monitor data health and can be used to determine whether data refreshing is needed or to prevent data retention from degrading beyond error correction capabilities. In certain embodiments, data scanning may be performed as a background process regularly, for example, every month. However, effects of temperature on data retention may not be adequately accounted for using such methods. Certain embodiments disclosed herein provide a numerical integral method for taking account the system temperature by using the acceleration factor for data retention. Embodiments disclosed herein may provide for accurate handling of data retention in view of complex device temperature history.
US09165666B2	Charge pump apparatus, a memory integrated circuit and methods of power supply A power supply, and a method of controlling the power supply, in which more or less power capacity of the power supply is activated depending on the state of a digital data signal on a data bus. The power supply has a control circuit which detects the number of “zero” bits present on the data bus, and responsively activates one or more of a plurality of power supply circuits such as charge pump circuits. The outputs of the charge pump circuits are mutually connected to a driver adapted to program memory cells of a flash memory circuit. A charge pump apparatus and a memory integrated circuit are also described.
US09165663B2	Secure non-volatile memory device and method of protecting data therein The invention relates to a non-volatile memory device comprising: an input for providing external data to be stored on the non-volatile memory device; a first non-volatile memory block and a second non-volatile memory block, the first non-volatile memory block and the second non-volatile memory block being provided on a single die, wherein the first non-volatile memory block and second non-volatile memory block are of a different type such that the first non-volatile memory block and the second non-volatile memory block require incompatible external attack techniques in order to retrieve data there from; and—an encryption circuit for encrypting the external data forming encrypted data using unique data from at least the first non-volatile memory block as an encryption key, the encrypted data at least being stored into the second non-volatile memory block. The invention further relates to method of protecting data in a non-volatile memory device.
US09165662B2	Semiconductor memory device and programming method thereof A programming method of a semiconductor memory device includes, in an n-th program loop, applying a first program pulse to a first memory cell group, applying a second program pulse to a second memory cell group, and determining first fast cells and first slow cells in the first memory cell group, and in an n+1-th program loop, applying a third program pulse, which is increased by a step voltage from the first program pulse, to the first fast cells in the first memory cell group, and applying a fourth program pulse, which is increased by the step voltage from the second program pulse, to the first slow cells in the first memory cell group and the second memory cell group.
US09165660B2	Non-volatile memory devices and related operating methods Non-volatile memory devices and related methods are provided. The non-volatile memory devices include a memory cell array having a plurality of cell strings, each cell string including: a plurality of memory cells stacked in a direction perpendicular to a substrate, a ground selection transistor between the plurality of memory cells and the substrate, and a string selection transistor between the plurality of memory cells and a bit line; an address decoder coupled to the plurality of memory cells in the plurality of cell strings through word lines, to the string selection transistors in the plurality of cell strings through string selection lines, and to the ground selection transistors in the plurality of cell strings through a ground selection line; a read/write circuit coupled to the string selection transistors in the plurality of cell strings through the bit lines; and control logic configured to adjust a substrate voltage applied to the substrate such that threshold voltages of the ground selection transistors are higher than a predetermined level during read operations for at least one of the plurality of memory cells in the plurality of cell strings.
US09165658B2	Disturb verify for programming memory cells Apparatuses and methods for disturb verify for programming operations are described. Programming memory cells can include applying a number of programming pulses to a first memory cell, performing a disturb verify operation on a second memory cell adjacent to the first memory cell, and inhibiting the first memory cell from further programming in response to the second memory cell failing the disturb verify operation. Other apparatuses and methods are also disclosed.
US09165654B1	Nonvolatile memory device having page buffer units under a cell A nonvolatile memory device includes a cell array, a distributed page buffer including a plurality of page buffer units disposed below the cell array, the plurality of page buffer units having a certain size; and a distributed page buffer control circuit including a plurality of page buffer control circuit units, each page buffer control circuit unit being arranged at one side of a corresponding page buffer unit, and configured to control operations of the corresponding page buffer unit, the plurality of page buffer control circuit units each having a predetermined size.
US09165652B2	Split-gate memory cells having select-gate sidewall metal silicide regions and related manufacturing methods Split-gate non-volatile memory (NVM) cells having select-gate sidewall metal silicide regions are disclosed along with related manufacturing methods. Spacer etch processing steps are used to expose sidewall portions of select gates. Metal silicide regions are then formed within these sidewall portions of the select gates. Further, metal silicide regions can also be formed in top portions of the select gates. Further, the select gates can also be formed with one or more notches. By expanding the size of the metal silicide region to include the sidewall portion of the select gate, the select gate wordline (e.g., polysilicon) resistance is reduced for split-gate NVM arrays, the electrical contact to the select gate is improved, and performance of the select-gate NVN cell is improved.
US09165647B1	Multistage memory cell read A multistage read can dynamically change wordline capacitance as a function of threshold voltage of a memory cell being read. The multistage read can reduce current spikes and reduce the heating up of a memory cell during a read. A memory device includes a global wordline driver to connect a wordline of a selected memory cell to the sensing circuit, and a local wordline driver local to the memory cell. After the wordline is charged to a read voltage, control logic can selectively enable and disable a portion or all of the global wordline driver and the local wordline driver in conjunction with applying different discrete voltage levels to the bitline to perform a multistage read.
US09165645B2	High-reliability high-speed memristor A memristor has a first electrode, a second electrode parallel to the first electrode, and a switching layer disposing between the first and second electrodes. The switching layer contains a conduction channel and a reservoir zone. The conduction channel has a Fermi glass material with a variable concentration of mobile ions. The reservoir zone is laterally disposed relative to the conduction channel, and functions as a source/sink of mobile ions for the conduction channel. In the switching operation, under the cooperative driving force of both electric field and thermal effects, the mobile ions are moved into or out of the laterally disposed reservoir zone to vary the concentration of the mobile ions in the conduction channel to change the conductivity of the Fermi glass material.
US09165641B2	Process tolerant current leakage reduction in static random access memory (SRAM) A memory device biasing circuit is disclosed, the circuit having a pair of semiconductor devices coupled to receive a supply voltage having a supply voltage level suitable for operating a memory device in an active mode and operable for providing an adjustable biased voltage to the memory device that is greater than a minimal voltage level for operating the memory device in a data retention mode. The pair of semiconductor devices includes a first semiconductor device; and, a second semiconductor device that includes an opposite type of semiconductor device than the first semiconductor device such that the pair of semiconductor devices includes each of an N-type semiconductor device and a P-type semiconductor device. The memory device biasing circuit further includes a bias adjustment circuit coupled to the second semiconductor device and configured to adjust the operation of the second semiconductor device based on the supply voltage.
US09165640B1	Method of using a PMOS pass gate A method that includes using a PMOS pass gate to couple a first line to a second line, where a gate terminal of the PMOS pass gate is coupled to an output terminal of a memory cell, is described. In one implementation, the PMOS pass gate has a negative threshold voltage. In one implementation, the first line and the second line are respectively first and second interconnect lines of an IC.
US09165639B2	High capacity memory system using standard controller component The embodiments described herein describe technologies for using the memory modules in different modes of operation, such as in a standard multi-drop mode or as in a dynamic point-to-point (DPP) mode (also referred to herein as an enhanced mode). The memory modules can also be inserted in the sockets of the memory system in different configurations.
US09165638B2	Method and apparatus for calibrating write timing in a memory system A system that calibrates timing relationships between signals involved in performing write operations is described. This system includes a memory controller which is coupled to a set of memory chips, wherein each memory chip includes a phase detector configured to calibrate a phase relationship between a data-strobe signal and a clock signal received at the memory chip from the memory controller during a write operation. Furthermore, the memory controller is configured to perform one or more write-read-validate operations to calibrate a clock-cycle relationship between the data-strobe signal and the clock signal, wherein the write-read-validate operations involve varying a delay on the data-strobe signal relative to the clock signal by a multiple of a clock period.
US09165636B2	Memory management unit for managing a state of memory, image processing device, and integrated circuit A memory management unit manages a state of a memory which is to be accessed by bank interleaving. The memory includes p banks (where p is an integer of 2 or greater). The memory management unit includes a control unit that dynamically determines a bank to be accessed from among the p banks. When predetermined conditions for a reserving state of the memory are satisfied and there is any unused bank in the p banks, the control unit performs power consumption reduction to control the memory to cause power consumption of the unused bank(s) to be less than power consumption of other banks in the p banks except the unused bank(s).
US09165634B2	Semiconductor memory device and refresh control system A semiconductor memory device includes an address latch unit suitable for consecutively latching first refresh addresses, which correspond to successively-activated word lines, from consecutively received addresses for word lines to be activated in response to word line hit signals identifying the successively-activated word lines; an address comparison unit suitable for generating a comparison result signal by comparing the previously latched first address with the currently latched first address; a refresh control unit suitable for selecting a first refresh operation corresponding to the currently latched first address, and a second refresh operation corresponding to a second address in response to the comparison result signal, and a refresh command signal; and a refresh operation unit suitable for performing the first and second refresh operations on memory cells therein according to the selection of the refresh control unit.
US09165632B2	Memory device and semiconductor device Provided is a memory device with reduced overhead power. A memory device includes a first circuit retaining data in a first period during which a power supply voltage is supplied; a second circuit saving the data retained in the first circuit in the first period and retaining the data saved from the first circuit in a second period during which the power supply voltage is not supplied; and a third circuit saving the data retained in the second circuit in the second period and retaining the data saved from the second circuit in a third period during which the power supply voltage is not supplied. The third circuit includes a transistor in which a channel formation region is provided in an oxide semiconductor film and a capacitor to which a potential corresponding to the data is supplied through the transistor.
US09165631B2	OTP scheme with multiple magnetic tunnel junction devices in a cell A one time programming (OTP) apparatus unit cell includes multiple magnetic tunnel junctions (MTJs) and a shared access transistor coupled between the multiple MTJs and a fixed potential. Each of the multiple MTJs in a unit cell can be coupled to separate programming circuitry and/or separate sense amplifier circuitry so that they can be individually programmed and/or individually sensed. A logical combination from the separate sense amplifiers can be generated as an output of the unit cell.
US09165630B2	Offset canceling dual stage sensing circuit An offset canceling dual stage sensing method includes sensing a data value of a resistive memory data cell using a first load PMOS gate voltage generated by a reference value of a resistive memory reference cell in a first stage operation. The method also includes sensing the reference value of the resistive memory reference cell using a second load PMOS gate voltage generated by the data value of the resistive memory data cell in a second stage operation of the resistive memory sensing circuit. By adjusting the operating point of the reference cell sensing, an offset canceling dual stage sensing circuit increases the sense margin significantly compared to that of a conventional sensing circuit.
US09165629B2	Method and apparatus for MRAM sense reference trimming A trimming process for setting a reference current used in operating an MRAM module comprising an operational MRAM cell coupled to a bit line, multiple reference MRAM cells coupled to a reference bit line, and a sense amplifier coupled to the bit line and the reference bit line is disclosed in some embodiments. The process includes applying a bit line reference voltage to the reference bit line to provide a reference cell current formed by a sum of respective currents through the plurality of reference MRAM cells. The reference cell current is detected. A determination is made as to whether the detected reference cell current differs from a target reference cell current. The bit line reference voltage is varied, or a sensing ratio of the sense amplifier is varied, if it is determined that the detected reference cell current differs from the target reference cell current.
US09165628B2	Semiconductor memory device A semiconductor memory device includes: a plurality of word lines extending in a first direction; first to third bit lines extending in a second direction that intersects with the first direction; a plurality of variable resistance elements each having a first terminal connected to either one of the first and third bit lines; a plurality of active areas extending in a direction oblique to the first direction while intersecting with the first to third bit lines; a plurality of select transistors provided on the active areas and each having a gate connected to a corresponding one of the word lines, and a current path whose one end is connected to a second terminal of a corresponding one of the variable resistance elements; and a plurality of contact plugs each connecting the other end of the current path of a corresponding one of the select transistors to the second bit line, wherein each of the active areas includes two select transistors sharing a diffusion region, the variable resistance elements includes a first variable resistance element group and a second variable resistance element group, the first variable resistance element group including variable resistance elements aligned in the second direction below the first bit line, and each disposed between adjacent two of the word lines, the second variable resistance element group including variable resistance elements aligned in the second direction below the third bit line, and each disposed between adjacent two of the word lines, and the contact plugs are aligned in the second direction below the second bit line, and are each disposed between adjacent two of the word lines.
US09165627B2	Spin torque transfer memory cell structures and methods Spin Torque Transfer (STT) memory cell structures and methods are described herein. One or more STT memory cell structures comprise an annular STT stack including a nonmagnetic material between a first ferromagnetic material and a second ferromagnetic material and a soft magnetic material surrounding at least a portion of the annular STT stack.
US09165625B2	ST-RAM cells with perpendicular anisotropy Magnetic spin-torque memory cells, often referred to as magnetic tunnel junction cells, which have magnetic anisotropies (i.e., magnetization orientation at zero field and zero current) of the associated ferromagnetic layers aligned perpendicular to the wafer plane, or “out-of-plane”. A memory cell may have a ferromagnetic free layer, a first pinned reference layer and a second pinned reference layer, each having a magnetic anisotropy perpendicular to the substrate. The free layer has a magnetization orientation perpendicular to the substrate that is switchable by spin torque from a first orientation to an opposite second orientation.
US09165623B2	Memory arrangement Among other things, techniques and systems are provided for activating a memory cell of a memory arrangement in preparation for at least one of a read operation or write operation. The memory arrangement comprises a word-line driver comprising at least a first input terminal and a second input terminal. The first input terminal is operably coupled to a first decoder and the second input terminal is operably coupled to a second decoder. When the word-line driver senses a first voltage at the first input terminal and a second voltage at the second input terminal, the word-line driver outputs a gate voltage signal which activates the memory cell.
US09165620B2	Memory system and operating method thereof A memory system includes one or more memory chips, and a repair information storage chip including a nonvolatile memory configured to store a repair information of the one or more memory chips, wherein during an initial operation of the memory system, the repair information stored in the repair information storage chip is transmitted to the one or more memory chips.
US09165617B2	Memory controller with staggered request signal output A memory controller having a time-staggered request signal output. A first timing signal is generated while a second timing signal is generated having a first phase difference relative to the first timing signal. An address value is transmitted in response to the first timing signal and a control value is transmitted in response to the second timing signal, the address value and control value constituting portions of a first memory access request.
US09165615B2	Coded differential intersymbol interference reduction Encoder and decoder circuits that encode and decode a series of data words to/from a series of code words. The data words include L symbols. The code words include M symbols, where M is larger than L. A set of tightly coupled M links to convey respective symbols in each of the series of code words. The code words are selected such that between every two consecutive code words in a series of code words, an equal number of transitions from low to high and high to low occur on a subset of the M-links.
US09165610B1	Non-volatile memory cell arrays and methods of fabricating semiconductor devices Disclosed herein are memory cell arrays, semiconductor devices, and methods for fabricating semiconductor devices. In one embodiment, a memory cell array includes first, second, third, and fourth memory cells each having a first transistor and a second transistor. First and second word-lines are coupled with the gates of the first transistors of the first and second memory cells. The second and a third word-line are coupled with the gates of the second transistors of the third and fourth memory cells.
US09165604B2	Alternative advertising in prerecorded media Presenting viewers with an alternative brief version of a recorded advertisement when they choose to fast-forward through or skip (or any other trick play event) the recorded advertisement. The alternative advertisement may be displayed instead of or in conjunction with the recorded advertisement (i.e., fast-forwarding advertisement is displayed in one portion of the screen (i.e., background or portion of a split screen) and the alternative brief version is displayed in another portion). The alternative brief version of the advertisement (trick play advertisement) may be a marketing message that is a static screen presenting a logo or a portion of the recorded advertisement, or may be a condensed version of the actual advertisement. The trick play advertisements may be targeted. An alternate or entirely unrelated advertisement can also be displayed as the trick play advertisement.
US09165601B2	Method and apparatus for decoding and correcting a first byte based on a status of a second byte adjacent to the first byte and in response to a failure to decode the first byte A decoder including a decode module, a matrix module, and a marking module. The decode module receives data and performs a first decoding iteration to decode the data. The first decoding iteration includes generating a first matrix having a first byte. The matrix module generates a second matrix based on the first matrix. The second matrix includes the first and second bytes. The second byte is adjacent and sequentially prior or subsequent to the first byte. The marking module: determines whether the first byte has been correctly decoded; based on determining whether the first byte has been correctly decoded, determines a status of the second byte; and based on the status of the second byte, marks the first byte as an erasure. The decode module, based on the second byte being marked as an erasure, corrects the second byte during the second decoding iteration.
US09165598B2	Pre-compensated optical tape wobble patterns Amplitude or phase modulated un-compensated wobble patterns representing address patterns for track addresses of optical media are generated. A filter is applied to the un-compensated wobble patterns to pre-compensate the un-compensated wobble patterns. When an inverse of the filter is applied to a signal representing the pre-compensated wobble patterns in the presence of noise, the noise is suppressed and the un-compensated wobble patterns are substantially recovered.
US09165597B2	Time-multiplexed single input single output (SISO) data recovery channel Apparatus and method for recovering data from a multi-channel input signal, such as but not limited to a readback signal from a bit patterned medium (BPM) having a plurality of subtracks. In accordance with some embodiments, a single input single output (SISO) equalizer is adapted to generate equalized outputs responsive to alternating subchannels of the multi-channel input signal. A detector is adapted to generate estimates of data symbols represented by the input signal responsive to the equalized outputs. A switching circuit is adapted to switch in different equalizer coefficients for use by the SISO equalizer for each of the alternating subchannels in the input signal.
US09165595B2	Information recording device, information recording medium and information recording method User convenience of data whose duplication is restricted and data created by utilizing the data is improved. An information recording device (10) is capable of recoding information onto an RE layer (22) of an optical disk (1), and includes a recording and replay control section (54) for recording, onto the RE layer (32), duplication-restricted information utilization information (32) created by utilizing duplication-restricted information (31) whose duplication onto a different optical disk is restricted.
US09165593B2	Vehicle remote control interface for controlling multiple electronic devices Systems and methods for controlling both an existing entertainment device and an aftermarket entertainment device in a vehicle with a user interface are provided. A method comprises adapting the user interface to selectively send control signals to the aftermarket entertainment device, sending control signals from the user interface to the existing entertainment device in response to user manipulation of the user interface, detecting whether the user has selected the aftermarket entertainment device; and sending control signals from the user interface to the aftermarket entertainment device in response to user selection of the aftermarket entertainment device and user manipulation of the user interface. The user interface may store output signals corresponding to the aftermarket entertainment device. Subsequent activation of the user interface may recall an output signal corresponding to the aftermarket entertainment device. The user interface can be adapted for use with a plurality of different types of aftermarket entertainment devices.
US09165592B2	Disc device A disc device according to the present disclosure includes a plurality of magazines each having a tray that stores a plurality of discs, a plurality of disc drives that performs recording or reproducing of information on or from a disc, respectively, a picker that draws out the magazine tray from one magazine selected from the plurality of magazines and that conveys the magazine tray to a position near the plurality of disc drives, and a disc separating and supplying device that, at the position near the disc drives, holds the plurality of discs stored in the magazine tray, that separates at least one disc from the held plurality of discs, and that supplies the separated disc to the disc drive.
US09165591B2	Grating based laser and power monitor for a heat-assisted magnetic recording device A head assembly includes a submount, a body with a first surface, an optical path, a near field transducer (NFT), a sensor, and a laser. The optical path is disposed in the body and is adapted to receive light and convey the light to a distal end of the waveguide. The near field transducer (NFT) is disposed adjacent the distal end of the waveguide and has an output end proximate the first surface of the body. The sensor interfaces with the submount and the laser is attached to the submount along a non-primary lasing surface. The laser is adapted to inject light into the waveguide and includes a grating adapted to diffract a portion of the light through the non-primary lasing surface to the sensor.
US09165584B2	Air bearing surface having temperature/humidity compensation feature A slider for a head to read data from or write data to a magnetic media is disclosed. The slider includes an air bearing surface including raised bearing surface(s) elevated above recessed bearing surface(s) to pressurize air flow along the air bearing surface to provide a fly height for the slider above the media. The raised bearing surfaces are formed along one or more raised substrate structures etched from a substrate body. The slider includes one or more insets inset into the one or more raised substrate structures formed of an inset material having a different coefficient of expansion than a substrate material of the slider to compensate for temperature and/or humidity changes.
US09165581B2	Thermally assisted magnetic recording head with main magnetic pole apart from near field light generator A thermally assisted magnetic recording head has a generator end surface facing an air bearing surface (ABS), and includes: a near-field light (NF light) generator that generates an NF light on the generator end surface and irradiates a magnetic recording medium with the NF light, and a main magnetic pole end surface positioned in the vicinity of the generator end surface; a main magnetic pole that emits a magnetic flux from the main magnetic pole end surface to the magnetic recording medium and a shield end surface positioned in the vicinity of the generator end surface; and a return shield that is magnetically linked to the main magnetic pole, and that absorbs the magnetic flux returning from the magnetic recording medium at the shield end surface. The main magnetic pole and the return shield are positioned to be on the same side with respect to the NF light generator in the down track direction, and the NF light generator does not overlap with the main magnetic pole either in the down track direction or in the cross track direction.
US09165579B1	Air bearing area configuration for reducing flying height hump across a stroke A disk drive is provided having a dynamic flying height or touch down power profile that is substantially flat across its stroke along the radius of a recording medium. At least two air-channeling elements are provided in a slider of the disk drive, that with the read/write head, flies above a surface of the recording medium. At an inner diameter and an outer diameter of the recording medium, the at least two air-channeling elements direct incoming air flow to an air bearing space defined by a bottom surface of the slider and the surface of the recording medium, increasing the flying height of the slider/read/write head at the inner diameter and outer diameter of the recording medium, thereby negating the effect of a middle diameter flying height hump of the recording medium.
US09165576B2	Devices including a gas barrier layer Devices that include a near field transducer (NFT); a gas barrier layer positioned on at least a portion of the NFT; and a wear resistance layer positioned on at least a portion of the gas barrier layer wherein the gas barrier layer includes tantalum oxide (TaO), titanium oxide (TiO), chromium oxide (CrO), silicon oxide (SiO), aluminum oxide (AlO), titanium oxide (TiO), zirconium oxide (ZrO), yttrium oxide (YO), magnesium oxide (MgO), beryllium oxide (BeO), niobium oxide (NbO), hafnium oxide (HfO), vanadium oxide (VO), strontium oxide (SrO), or combinations thereof; silicon nitride (SiN), aluminum nitride (Al), boron nitride (BN), titanium nitride (TiN), zirconium nitride (ZrN), niobioum nitride (NbN), hafnium nitride (HfN), chromium nitride (CrN), or combinations thereof silicon carbide (SiC), titanium carbide (TiC), zirconium carbide (ZrC), niobioum carbide (NbC), chromium carbide (CrC), vanadium carbide (VC), boron carbide (BC), or combinations thereof or combinations thereof.
US09165571B2	Magnetic stack coupling buffer layer A data storage system may be configured at least with a seed lamination that is disposed between a magnetic stack and a magnetic shield. The seed lamination may be constructed and operated with a coupling buffer layer and a seed layer with the coupling buffer layer fabricated of an alloy of cobalt and a transition metal.
US09165570B2	Data reader with magnetic seed lamination A magnetic element capable of reading data may generally be configured at least with a magnetic seed lamination disposed between a data reader stack and a magnetic shield. The magnetic seed lamination may be constructed at least with one magnetic layer coupled to the bottom shield and at least one non-magnetic layer decoupling the data reader stack from the at least one magnetic layer.
US09165569B1	Thermally-assisted magnetic recording head Thermally-assisted magnetic recording head, includes: a magnetic pole having an end exposed on an air-bearing surface; a waveguide; a plasmon generator having a first and second region, first region extending backward from the air-bearing surface to a first position, second region being coupled with the first region at the first position, extending backward from first position, and having a width in a track-width direction, and width in the track-width direction of second region being larger than a width in the track-width direction of first region; an adhesion layer having an end exposed on the air-bearing surface and a first adhesion region, the first adhesion region being in close contact with an end face in the track-width direction of first region; and a cladding layer located around plasmon generator and adhesion layer. Adhesion force between adhesion layer and plasmon generator is greater than adhesion force between cladding layer and plasmon generator.
US09165564B2	Method and apparatus for frame-based buffer control in a communication system A digital audio broadcasting (DAB) communication system with a decoder buffer specified by a maximum number of encoded frames is disclosed. A predicted number of encoded frames, Fpred, in the decoder is sent to a receiver with audio data. If the decoder buffer level becomes too high, additional bits are allocated to each frame for each of N programs. If the decoder buffer level becomes too low, fewer bits are allocated to each frame for each of the N programs. Fpred can also be employed to (i) enable the decoder; and (ii) synchronize the transmitter and the receiver. The receiver fills the decoder buffer with Fpred frames before commencing decoding frames. The transmitter and receiver clocks may be synchronized with a feedback loop that compares the actual level of the decoder buffer to the predicted value, Fpred, received from the transmitter.
US09165563B2	Coding device, coding method, decoding device, decoding method, and storage medium For respective sampling data of waveform data of sounds to be coded, a prediction residual value is calculated as sampling residual data, and an effective bit length is calculated from this residual waveform data. Then, for the effective bit length data, a maximum effective bit length among processing targets is generated as common effective actual data, and coded data in which this common effective actual data and information indicating the common effective bit length are arranged in a predetermined configuration format are generated. The information included in the coded data is analyzed and each of the plurality of the common effective bit information is extracted. Then, waveform data of the sounds are decoded by performing inverse linear prediction processing from an analysis result on the residual waveform data decompressed by performing bit extension which adds a portion other than the common effective bit length.
US09165562B1	Processing audio signals with adaptive time or frequency resolution In one aspect, an audio processing apparatus is disclosed. The apparatus includes an audio decoder, a filterbank, and a processor. The audio decoder decodes an encoded audio signal to obtain a time-domain audio signal, the encoded audio signal including a plurality of spectral components. The filterbank splits the time-domain audio signal to obtain a plurality of complex-valued subband samples in a first frequency region. The processor generates a plurality of subband samples in a second frequency region based at least in part on the complex-valued subband samples in the first frequency region, adaptively groups at least some of the plurality of subband samples in the second frequency region with an adaptive time resolution or an adaptive frequency resolution, and determines a spectral profile of at least some of the subband samples in the second frequency region based on the groups.
US09165557B2	Voice recognizing apparatus, voice recognizing method, and program for recognizing voice In a voice recognizing apparatus, a voice recognizing method, and a program for recognizing voice are provided to carry out voice recognition with high precision. When a call receiving unit in which a plurality of telephone numbers for receiving are assigned to respective contents of calls receives a call from a caller, a calling voice signal input device inputs a calling voice signal of the call, and a receiving telephone number input device inputs the receiving telephone number of the call. A voice correction device then carries out voice correction processing for the calling voice signal in accordance with the receiving telephone number and a voice recognizing device executes voice recognition processing for the calling voice signal in accordance with the receiving telephone number.
US09165552B2	Ultrasonic imaging apparatus and method of controlling delay The present invention enables ultrasonic propagation time values after correction of refraction to be calculated in parallel for each receive channel, by using a recurrence relation in the depth direction. Moreover, accumulation of errors can be avoided by using an accurate propagation time value obtained in advance at a reference depth to correct the propagation time value each time the reference depth is reached. For this error correction, the recurrence relation to calculate the propagation time value can be an approximate expression. For example, the propagation time value can be calculated using the inclination of reference propagation time values between reference depths. In an actual circuit, received signals are sequentially stored in a memory, and a receive beam is formed by calculating an address position corresponding to the propagation time value of the ultrasonic wave, and adding the received signals stored in the calculated addresses.
US09165551B2	Sound reflector and electronic device with speaker, including sound reflector A reflector for use with an electronic device having a loudspeaker for enhancing the sound emitted from the loudspeaker, said reflector comprising components for attaching said reflector to an edge of the electronic device, at the location of the loudspeaker, a flat portion located to be adjacent a surface of the electronic device, and a concave portion adjacent to the flat portion and presenting a concave surface to the loudspeaker.
US09165550B2	Acoustic isolation mechanism with membrane A removable case for an electronic device may have an acoustic isolation mechanism between the removable case and an acoustic component on the electronic device. The acoustic isolation mechanism may be a compressible component that may provide an acoustic seal between an inner surface of the removable case and an exterior surface of the electronic device, and may include a waterproof acoustic membrane. The waterproof membrane prevents the entry of water while reacting to sound pressure changes to acoustically couple the electronic device with sounds outside the case. The acoustic isolation mechanism may be constructed of several different materials and several different manufacturing processes.
US09165549B2	Audio noise cancelling A noise canceling system comprises a microphone (103) for generating a captured signal representing sound in an audio environment and a sound transducer (101) for radiating a sound canceling audio signal in the audio environment. A feedback path (105, 107, 109, 111, 113) exists from the microphone (103) to the sound transducer (101) and comprises a feedback filter (109). A tone processor (119) determines a tone component characteristic for a tone component of a feedback signal of the feedback path (105, 107, 109, 111, 113) and an adaptation processor (121) adapts the feedback path in response to the tone component characteristic. The invention allows detection of the onset of instability and dynamic compensation to mitigate or prevent such instability. Accordingly increased design freedom for the feedback filter is achieved resulting in improved noise cancellation.
US09165548B2	System and method for attenuating noise from a fluid machine or a turbulent noise source A noise cancellation system for transporting a fluid (M) from an inlet in one space (RM1) to an outlet in another space (RM2). A noisy element(VF, HA), e.g. a ventilation fan (VF)or a turbulent noise source (HA),generates acoustic noise. A loudspeaker (L) with a diaphragm (D) is arranged such that a first side (S1) of the diaphragm (D) is in contact with the fluid (M) on a first side (P1) of the noisy element(VF), and a second side (S2) of the diaphragm (D) is in contact with the fluid (M) on a second side (P2) of the noisy element (VF). The loudspeaker diaphragm (D) is arranged to move substantially in anti-phase with at least a part of the noise generated by the noisy element (VF), hereby cancelling the noise from the noisy element (VF). The noisy element may be placed inside a duct system. Especially, the system may be a decentral ventilation system with a noisy ventilation fan (VF) for transporting air between two spaces, e.g. two rooms, or between one room and “free air”.
US09165546B2	Recording and playback device capable of repeated playback, computer-readable storage medium, and recording and playback method In a recording and playback device of the present invention, when input data exceeding a threshold value is supplied, the CPU records input data for an amount of time corresponding to a single beat in an area specified by syllable number SPLIT in an input buffer IB of the RAM, and after incrementing the syllable number SPLIT, waits until the recorded data becomes silent. The CPU repeats this series of processing until the value of the incremented syllable number SPLIT reaches “4”, and thereby stores input data recorded for an amount of time corresponding to a single beat in each input buffer IB(1) to IB(4) corresponding to syllable numbers SPLIT1 to SPLIT4. Then, the CPU copies the input data to the recording area of the RAM such that these input data are sequentially connected and formed into loop data for an amount of time corresponding to a single bar.
US09165540B1	Device for removing moisture from a woodwind instrument Device for removing moisture from a woodwind instrument are disclosed. The woodwind cleaner is comprised of a semi-rigid inner wire, encased in absorbent material, then enclosed in a soft, absorbent outer covering. When not in use, the device can be coiled or wrapped around itself for easy storage, then easily returns to full length for use. The device can be used to clean the moisture from an instrument without disassembling it. The device is intended to be stored outside the case and to be easily portable.
US09165538B2	Image generation A method of generating an image comprises receiving a signal over a USB interface comprising encoded display data for one or more rectangular group of pixel tiles within an image and position data for the or each group of pixel tiles. The coefficients are obtained from the encoded display data, maybe by converting variable bit length fields into AC coefficients and an inverse Haar transform performed on them to generate pixel data for each rectangular group of pixel tiles. A frame buffer, which may be part of the display, is then updated with the generated pixel data ready for output to the display device. Copy protection may also be incorporated using AES negotiated over HDPC.
US09165534B2	Information processing apparatus, method for controlling information processing apparatus, and storage medium An information processing apparatus for improving operability when a content is scroll-displayed by an operation for scrolling such as a flick operation. The information processing apparatus displays a plurality of contents in a predetermined display area, and scroll-displays the contents according to an instruction to perform the scroll display. When a press of a button displayed outside the display area has been detected, processing corresponding to the pressed button is performed if the scroll display is not being performed, and is not performed if the scroll display is being performed.
US09165532B2	Display device Each of image-signal-line drive circuits includes a timing controller that generates a control signal controlling itself and other image-signal-line drive circuit, and a master/slave selection circuit that sets itself as a master mode image-signal-line drive circuit or a slave mode image-signal-line drive circuit based on a selection signal to be given from outside. From among the plurality of image-signal-line drive circuits, the master mode image-signal-line drive circuit gives the control signal to the slave mode image-signal-line drive circuit.
US09165523B2	Driver circuit for image lines of a display device with arrangement to improve multi-level grayscale display A driver circuit including a DA converting circuit that converts video data input from the outside to a grayscale voltage; an amplifying circuit that amplifies the grayscale voltage; and a switch circuit that selects the grayscale voltage output from the amplifying circuit and a predetermined voltage as a voltage that is output to the image line. When video data indicating a minimum grayscale, the switch circuit outputs the predetermined voltage to the image line, and when video data indicating a grayscale other than the minimum grayscale is input, the switch circuit outputs the grayscale voltage output from the amplifying circuit to the image line. The predetermined voltage allows a voltage of the pixel electrode and a voltage of the counter electrode after passage of the writing of the image voltage to be coincident with each other.
US09165519B1	Display panel and driving method thereof A display panel and a driving method thereof are provided. The display panel includes a plurality of scan lines, a plurality of first data lines, a plurality of second data lines and a plurality of pixels. The scan lines receive a plurality of scan signals. The pixels are arranged in an array and respectively have a first sub-pixel and a second sub-pixel. In each column, the first sub-pixel of i-th odd pixel electronically connects (2i−1)-th scan line and a corresponding first data line, the second sub-pixel of i-th odd pixel electronically connects (2i−1)-th and (2i)-th scan line and the corresponding first data line, the first sub-pixel of i-th even pixel electronically connects (2i)-th scan line and a corresponding second data line, and the second sub-pixel of i-th even pixel electronically connects (2i)-th and (2i+1)-th scan line and the corresponding second data line, wherein the i is a positive integer.
US09165515B2	Liquid crystal display device and driving method thereof A liquid crystal display (LCD) device and method of driving an LCD device are provided. The LCD device includes: a panel, including: a plurality of gate lines, and a plurality of data lines, an image-sticking removal apparatus configured to, when an interlaced input video is received from an external system: generate an FRC pattern to be added into the input video and a polarity pattern used to output the input video to form one group, and generate at least two or more the groups formed in parallel to the gate lines during one frame, and a data driver configured to: convert image data inputted from the image-sticking removal apparatus into data voltages, invert a polarity of each of the data voltages on the basis of the polarity pattern, and output the polarity-inverted data voltages to the respective data lines.
US09165511B2	Backlight driving circuit, LCD device, and driving method The present disclosure provides a backlight driving circuit, a liquid crystal display (LCD) device, and a driving method. The backlight driving circuit includes a monitoring device and a conversion device, the conversion device includes a microcontroller (MCU) and a switch module. A control end of the switch module is coupled to the monitoring device, and the monitoring device outputs a monitoring signal to turn on or turn off the switch module. An input end of a power source of the MCU is coupled to a power end of the backlight driving circuit through the switch module.
US09165507B2	Lighting system having interlaced driving mechanism A lighting system includes a first lighting unit for generating output light according to a first current, a second lighting unit for generating output light according to a second current, a third lighting unit for generating output light according to a third current, a fourth lighting unit for generating output light according to a fourth current, a first power driving unit electrically connected to the first and third lighting units, and a second power driving unit electrically connected to the second and fourth lighting units. The second lighting unit is disposed between the first and third lighting units. The third lighting unit is disposed between the second and fourth lighting units. The first power driving unit is employed to drive the first and third currents. The second power driving unit is employed to drive the second and fourth currents.
US09165506B2	Organic light emitting display device and method of driving an organic light emitting display device In a method of driving an organic light emitting display device, a first data signal constituting an image frame is sequentially written into first pixel circuits coupled to first scan-lines by sequentially performing a scanning operation on the first scan-lines in a first direction, a second data signal constituting the image frame is sequentially written into second pixel circuits coupled to second scan-lines by sequentially performing the scanning operation on the second scan-lines in a second direction, and the image frame is displayed by controlling the first and second pixel circuits to simultaneously emit light.
US09165504B2	Method of controlling a dimming operation and organic light emitting display device performing the same A method of controlling a dimming operation of an organic light emitting display device that includes an organic light emitting element, a first transistor connected to a data line and a gate line, and a second transistor connected to the first transistor and the organic light emitting element, is provided. By the method, image data is compensated using a plurality of look-up tables respectively corresponding to a plurality of dimming modes, to be outputted compensation data. The compensation data are converted to a data voltage to be provided the organic light emitting element with the data voltage. A level of a current applied to the organic light emitting element is adjusted according to the dimming.
US09165503B2	Pixel structure with compensation function, and driving method thereof A pixel structure and a driving method thereof are disclosed. The pixel structure includes a first capacitor, an input unit, a compensation unit, a pixel driving unit, a resetting unit, a light-emitting diode, a light-emitting activation unit and a coupling unit. The input unit controls a voltage on a first terminal of the first capacitor according to a first scanning signal and a data signal. The compensation unit coupled to the first capacitor is configured to control voltages on the terminals of the first capacitor according to a second scanning signal. The pixel driving unit is configured to provide a driving current to the light-emitting diode according to a first reference voltage and the voltage on a second terminal of the first capacitor. The coupling unit is coupled to the light-emitting activation unit, the first terminal of the first capacitor, the input unit and the compensation unit.
US09165489B2	CMP compositions selective for oxide over polysilicon and nitride with high removal rate and low defectivity The invention provides a chemical-mechanical polishing composition containing a ceria abrasive and a polymer of formula I: wherein X1 and X2, Y1 and Y2, Z1 and Z2, R1, R2, R3, and R4, and m are as defined herein, and water, wherein the polishing composition has a pH of about 1 to about 4.5. The invention further provides a method of chemically-mechanically polishing a substrate with the inventive chemical-mechanical polishing composition. Typically, the substrate contains silicon oxide, silicon nitride, and/or polysilicon.
US09165485B2	Display apparatus A display apparatus includes a backlight part including a backlight unit and a panel part including a display panel. The panel part is operated in a first state in which the display panel is substantially aligned with the backlight part or in a second state in which the display panel is not substantially aligned with the backlight part. The display panel receives the light from the backlight unit in the first state and receives an external light in the second state.
US09165483B2	Apparatus for displaying and illuminating a flag An apparatus comprises a main pole being configured to be operable to display at least one flag. At least one illumination source is disposed in a longitudinal length of the main pole. The illumination source is configured to at least illuminate a facing surface of the displayed flag. A switch mechanism is configured to be operable for activating and deactivating the illumination source.
US09165482B2	Display device and method for manufacturing the same A flexible display device includes a wire embedded layer that has flexibility and has a first principal surface, a thick wire embedded in the wire embedded layer so as to be substantially flush with the first principal surface of the wire embedded layer, an extraction lower electrode electrically connected to the thick wire and disposed on the first principal surface of the wire embedded layer, an emitting layer disposed on the extraction lower electrode, and an upper electrode disposed on the emitting layer. The flexible display device is suitable for large-screen devices and offers high productivity.
US09165480B2	Shipping document and method and apparatus for applying a shipping document to a surface A shipping document comprises a first printable portion and a second printable portion attached together by a connecting strip comprising at least one detachable chad, and at least one detachable border strip removably attached to at least one free edge of the first printable portion. When the second printable portion is folded against the first printable portion the border strip extends beyond the second printable portion. When an adhesive is applied to the removable chad and the border strip, the shipping label can be secured to a surface by the adhesive and subsequently removed from the surface by detaching the border strip and the chad from the sheet, while the first and second printable portions remain attached along the connecting strip. The invention includes a method and apparatus for applying the shipping document to a surface.
US09165475B2	Hazardous material detector simulator and training system A system and method for simulating hazardous environments provides simulated detector readings of hazardous environment for training first responder entry teams by controlling a simulated display provided to hazardous material portable detection simulator clients, such as via a wireless interface. Each simulator client provides detector reading displays for selected environments and allows for two-way interactive response with a master control unit. Simulator clients are configured as modular units comprising a smartphone or similar mass-produced wireless computing device removably integrated with a detector simulator housing and/or keypad interface. The master control unit allows direct control of individual detector displays and scenarios representing various hazardous environments.
US09165472B2	Electrophysiology measurement and training and remote databased and data analysis measurement method and system A method and system provides for electrophysiological data analysis in a networked processing environment. The method and system includes receiving, via a networked connection, electrophysiological data of a patient and electronically performing, via at least one network processing device, a data analysis on the electrophysiological data. The method and system includes generating at least one report based on the data analysis, wherein the at least one report includes determination of one or more intervention options for the patient and therein transmitting the report to a recipient device across the network connection for utilization with the patient. The results of the report direct the user to apply from within the same system non-invasive brain stimulation, neurofeedback, and biofeedback modalities. Re-assessment can occur from within the same system following the training or modulation of electrophysiology and thereby generate a comparison report showing functional changes from the provided intervention or combined interventions.
US09165471B1	System and method for determining aircraft payloads to enhance profitability A method for managing aircraft operations includes determining, via a trajectory predictor, an expected fuel usage for a flight along a desired route, and determining, via at least one processor, an available cargo capacity for the flight along the desired route based at least in part on the expected fuel usage. In addition, the method includes determining, via the at least one processor and the trajectory predictor, a passenger ticket price, a cargo price, and a fuel quantity based at least in part on an available seating capacity, an expected passenger demand, the available cargo capacity, and an expected cargo demand to enhance profitability of a flight network. The method also includes outputting the passenger ticket price, the cargo price, and the fuel quantity to a user interface, to a storage device, and/or to a network.
US09165467B2	Defining a handoff zone for tracking a vehicle between cameras Defining a handoff zone for tracking a vehicle between cameras is disclosed. Initially, a first image stream is received from a first camera having a first field of view. A second image stream is also received from a second camera having a second field of view, where the second field of view is different from and at least partially overlapping with the first field of view. Next, an overlap area that defines the overlap between the first image stream and the second image stream is determined. A handoff zone within the overlap area is then determined, where tracking of the vehicle is passed from the first camera to the second camera after the vehicle enters the handoff zone. Finally, boundaries of the handoff zone are stored.
US09165458B2	Electronic systems, slave electronic devices and signal transmission methods A slave electronic device is provided, including a capture unit, at least one low-speed unit and an embedded control unit. The capture unit is coupled to a host electronic device through a transmission lane to filter out a high-frequency signal part from a control signal outputted by the host electronic device to generate a low-frequency control signal, wherein the control signal has a plurality of periods and the control signal respectively has a low-frequency signal part and the high-frequency signal part during odd periods and even periods of the periods. The low-speed unit is coupled to the capture unit to operate according to the low-frequency control signal. The embedded control unit is coupled to the transmission lane for communicating with the host electronic device using a predetermined communications protocol via the high-frequency signal part.
US09165455B1	Aberration engine An aberration engine that collects data sensed by a monitoring system that monitors a property of a user and aggregates the collected data over a period of a time. The aberration engine detects, within the aggregated data, patterns of recurring events and, based on detecting the patterns of recurring events within the aggregated data, takes action related to the monitoring system based on the detected patterns of recurring events within the aggregated data.
US09165453B2	Rip current sensor and warning system with anchor A rip current can include a dangerous flow of water from an area proximate to a beach out to deeper water. An apparatus for generating a rip current warning indication includes an anchor device situated in the water, a flow sensor affixed to the anchor device and monitoring a water current speed, and a warning device in signal communication with the flow sensor. The warning device includes a control module comparing the monitored water current speed to a water current speed threshold. The warning device generates the rip current warning indication based upon the comparing.
US09165452B2	Driver drowsiness prediction system and method thereof A driver drowsiness prediction system includes a vital signal detection unit, a control unit and a network bridge module. The vital signal detection unit detects vital signals of a driver. The control unit receives the driver's vital signs, and stores at least a feature signal. The feature signal represents the vital signal pattern of losing consciousness. The control unit continuously compares the detected vital signal with the feature signal. When the vital signal is similar to the feature signal, the control unit issues a pre-alarming command. The network bridge module receives the pre-alarming command and is triggered to perform a network connection process. The network bridge module logs into a pre-determined social website according to a login script, and then sends a pre-alarming message thereon, wherein the pre-alarming message includes an event indicating the driver is near unconsciousness.
US09165450B1	Vehicle with movement sensor A vehicle comprises at least one wheel supporting the vehicle and an engine. At least one axially rotating member operatively connects the engine with the wheel such that the wheel moves responsive to operation of the engine. At least one tag is disposed on the axially rotating member. At least one sensor is disposed on the vehicle so that the sensor can detect movement of the tag. A computer disposed on the vehicle is operatively connected with the sensor. The sensor sends a signal to the computer when the sensor detects movement of the tag. Means on the vehicle provides an operator of the vehicle with feedback indicative of movement of the vehicle.
US09165445B2	Omnibus camera The invention relates to a camera arrangement having at least one wide-angle camera for monitoring an elongated space, and to a mount for the camera. It is provided in this case that the mount is designed for directing the wide-angle camera with a field of view of low distortion onto distant parts of space, and for directing the wide-angle camera with a field of view of higher distortion onto closer parts of space.
US09165443B2	Detector A detector includes a housing with at least one window for allowing radiation to enter, at least one sensor for sensing entered radiation, a unit for processing sensor signals, and mirrors that are shaped and mounted in the housing for reflecting radiation from outside detection zones better than radiation from elsewhere, onto the sensor. Linked mirrors reflect radiation from a detection zone consecutively and each mirror in at least one linked pair is shaped and mounted in the housing so as to prevent it from reflecting radiation from another detection zone in sequence with other mirrors onto the sensor, thus optically isolating the pair from other mirrors.
US09165442B2	Asset retention device for an asset retention system The present invention provides an asset retention device, including: a housing including a base portion and an end portion, wherein the base portion and the end portion each include electrical contacts; and an asset attachment structure securely coupled to the end portion and the associated electrical contacts of the housing, thereby completing an electrical circuit through the asset attachment structure and the housing; wherein, if the continuity of the asset attachment structure is broken, the electrical circuit through the asset attachment structure and the housing is broken. The base portion of the housing is configured to be selectively coupled to a main console, such that the electrical circuit is present through the asset attachment structure, the housing, the base portion of the housing, and the main console. The main console includes a controller/processor operable for detecting a break in the continuity of the asset attachment structure and the associated electrical circuit.
US09165441B2	Anti-theft device for objects on display An anti-theft device for objects on display is provided. The anti-theft device includes a containment body which accommodates internally at least one electric circuit provided with elements for closing the electric circuit. At least one cable is also provided, which has a first end accommodated in a corresponding seat defined in the containment body and a second end which can be inserted in an opening defined by the containment body in order to form a loop which can be associated with an object to be alarmed in such a manner that the object to be alarmed is in contact with the containment body. The anti-theft device includes elements for preventing the intrusion of foreign objects in the containment body in order to prevent the jamming of the cable in the containment body.
US09165440B1	Multi-sensory warning device A panel-mountable audible and visual warning device comprising a main housing and a cap thereon, the device configured to have the main housing fit into a hole in the face of a mounting panel and to have the front wall and side wall of the cap external to the panel when the device is operably mounted therein, with the cap containing a piezoelectric transducer and at least one LED as a modular subassembly which is attached to the main housing. The cap and transducer together define an audio-frequency resonant cavity, and the cap has the LED(s) mounted therein in a position in front of the panel face in use and behind and radially outward of the transducer so as to emit light directly forward past the transducer.
US09165436B2	Gaming device having a designated activator symbol therein and method thereof Embodiments of the present invention relate to a slot machine gaming device providing players additional opportunities to obtain awards in a game. In one embodiment, a game comprises: a plurality of reels, each of the reels including a plurality of symbol positions; a first plurality of symbols at the plurality of symbol positions on the reel, the first plurality of symbols comprising at least one predetermined activator symbol; a second plurality of symbols activated by the activator symbol, the second plurality of symbols replacing a subset of the first plurality of symbols, the second plurality of symbols comprising a plurality of replicator symbols, wherein each replicator symbol includes at least two of the same symbols at one of the symbol positions; at least one predetermined winning symbol combination of a plurality of winning symbol combinations; and an award associated with the predetermined winning symbol combination.
US09165434B2	Slot machine systems, methods, and apparatus Systems, methods and/or apparatus for slot machine eye-strain reduction are disclosed. Systems, methods and/or apparatus for slot machine back lighting are further provided. Systems, methods and/or apparatus for a slot machine back lighting effect are also disclosed. Systems, methods and/or apparatus for reel line lights are disclosed. Systems, methods and/or apparatus for reel tilt and motion detection are disclosed. Systems, methods and/or apparatus for reel wins display for an electromechanical slot machine and/or gaming machine viewing window configurable lines are disclosed. Systems, methods and/or apparatus for a configurable shelf system for an electromechanical slot machine are disclosed. Systems, methods, and apparatus are also disclosed for reel tilt minimization. Systems, methods and/or apparatus for slot machine controlled lighting. Further embodiments of the present disclosure can provide slot machine reel stop systems, methods, and apparatus useful for electromechanical slot machines.
US09165433B2	Gaming system, gaming device, and method for providing a cascading symbol game including shifting symbols according to directional indicators The disclosed gaming system displays an arrangement of symbols including a plurality of symbol positions. For a play of the game, the gaming system displays a randomly generated symbol in each symbol position. One or more of the symbols are displayed as associated with a directional indicator indicating a shift direction for that symbol. If any winning symbol combination is displayed, the gaming system shifts at least one symbol within the symbol matrix according to the directional indicator associated with that symbol, such as by shifting the symbol as designated distance in the shift direction indicated by the symbol's directional indicator. In one embodiment, the gaming system removes one or more symbols in the shift path of a shifting symbol. In one embodiment, the gaming system generates and displays new symbols in the then-empty symbol positions of the symbol matrix and repeats the determination, shifting, and generation.
US09165425B2	Method and apparatus for configuring a computing environment A method that incorporates teachings of the present disclosure may include receiving, by a system comprising a processor, a request from a mobile communication device to configure a computing environment for executing a software application, identifying a deficiency in an availability of a resource of the computing environment responsive to receiving the request, adjusting an operation of the computing environment to change the availability of the resource responsive to identifying the resource deficiency, and providing an action of a plurality of associable actions to the computer environment for use in the software application, where the action replaces a received stimulation of a user input that is associated with the executing of the software application. Other embodiments are disclosed.
US09165421B2	System and method for augmented maintenance of a gaming system Disclosed is a method for enabling a user in an augmented reality gaming venue to use an augmented reality system and a mobile device to display augmented reality by overlaying a virtual 3D object over a physical 3D object. The method includes: enabling a user to capture a live camera image of a 3D object via camera on the mobile device; determining if there are image tags on the 3D object in the live camera image; using the one or more image tags to access information used by the augmented reality system; and overlaying virtual 3D objects onto a live camera image of the virtual 3D object on a display of the mobile device to produce augmented reality effects, wherein the virtual 3D objects deliver targeted content a user that assist in performing maintenance on the 3D object.
US09165420B1	Bet spot indicator on a gaming table The invention generally pertains to a system and method for determining if a player has placed a bet in a bet spot on a gaming table, such as, for example, a main bet spot or a progressive or proposition bet spot. By way of example, the tabletop of a gaming table has a plurality of player positions having one or more bet spots positioned in proximity to each player position on the top surface. The tabletop has a light sensor associated with each bet spot and positioned beneath the gaming table layout to detect light intensity through the layout. A plurality of light emitting diodes (LEDs) are associated with each light sensor. The plurality of LEDs are located beneath the gaming table layout so as to illuminate through the material of the gaming table layout. More specifically, the LEDs are configured to illuminate through the layout when a gaming chip is detected in the bet spot, which causes a change in the light intensity detected by the light sensor associated with the bet spot because the bet spot is covered by a gaming chip.
US09165418B2	Authentication device with temporary enabling target An authentication device includes a photodetector, a processor, a memory storing a first predetermined expected value and a first predetermined enablement time, a timer, a control, and an information display. The processor includes a program for measuring one or more attributes of a first enabling target at a first time, comparing at least one measured attribute of the first enabling target with the stored first predetermined expected value, and enabling the authentication device to authenticate when operated by the control for only the first predetermined enablement time when the at least one measured attribute of the first enabling target matches the first predetermined expected value.
US09165413B2	Diagnostic assistance Embodiments of techniques or systems for customization of, diagnostic assistance, and driving analytics related to snapshot data of a vehicle are provided herein. For example, a snapshot can be taken. The snapshot can be based on a snapshot package customized according to symptoms experienced by a driver of a vehicle, and analyzed individually or in conjunction with other snapshots to determine a trend. Additionally, the snapshot can be based on a configuration of a vehicle. In this scenario, the snapshot and the configuration of the vehicle can be used to provide an enhanced troubleshooting guide by removing non-suspect areas from consideration, thereby mitigating troubleshooting time. The snapshot can be setup to record parameters related to wear and tear on components of the vehicle. Suggestions can be made to a driver of the vehicle to reduce or mitigate actions that negatively impact wear and tear.
US09165412B2	Remotely located database for managing a vehicle fleet A method and system of managing a vehicle fleet is provided. The method includes providing an electronic device, a computing device, and a vehicle that is associated with the vehicle fleet. The electronic device is located within a proximate distance from the vehicle and the computing device is located remotely from the vehicle. The electronic device is associated with a driver identifier. The method includes sending a data signal from the electronic device to the computing device indicating the driver identifier. The method further includes matching the driver identifier with a specific driver profile that is saved on a database of the computing device. The specific driver profile includes information associating the vehicle with the driver identifier. The method includes sending information regarding the specific driver profile from the database to a vehicle control module, where the vehicle control module associated with the vehicle.
US09165411B2	Method and system for embedding mailer specified mailing instructions on a mail piece to automate mail processing Methods and systems that allow a sender of a mail piece to easily specify delivery instructions and/or services for a mail piece and that allows mail processing systems to identify and account for the specified delivery instructions and/or services without the need for any pre-sorting or input of information prior to processing the mail piece. The sender of a mail piece provides a marking on the mail piece representing instructions desired for delivering the mail piece. A mail processing system utilized to process the mail piece reads the marking provided on the mail piece, and based on the type/color of the marking, interprets the delivery instructions requested by the sender. The mail processing system processes the mail piece according to the instructions requested by the sender based on the marking provided on the mail piece by the sender.
US09165409B2	System and method for creating a database for generating product visualizations This disclosure includes a method for creating a database stored on a computer-readable medium, comprising: receiving a first plurality of images of variations of a first consumer product layer, each of the first plurality of images depicting a variation of the first consumer product layer, each of the variations comprising at least one surface. The method also includes receiving a second plurality of images of variations of a second consumer product layer, each of the second plurality of images depicting a variation of the first consumer product layer, each of the variations comprising at least one surface. The method further includes providing a first depth attribute to the first consumer product layer and a second depth attribute to the second consumer product layer. The method also includes storing the first plurality of images, the second plurality of images, the texture maps, and the plurality of textures in the database.
US09165408B2	Method and system for browsing visual content displayed in a virtual three-dimensional space The invention provides a method for constructing a zoom path between a predetermined viewing point Pn+1 in a three-dimensional (3D) virtual space and a target point P0 in the 3D space, and for zooming in or zooming out along the zoom path. The target point is assigned control points in the 3D space, and the zoom path of the invention is nonlinear and passes through at least one of the control points. During zooming, the viewing direction is continuously selected to provide an aesthetically acceptable zooming effect.
US09165402B2	3D modeling user interface method The 3D modeling user interface (UI) method provides a 2D scalable grid on a computer screen that allows a user to extrude a 3D shape therefrom. The 3D shape is then presented on the display screen, which also shows the grid that the shape was extruded from. In addition to 2D grids, the UI allows the user to define 2D concentric circular patterns on a surface of the 3D shape, from which the user can extrude a 3D projection of the concentric circular patterns. A previously defined grid can be extended or bent into an arcuate or curvy grid according to manipulations by the user. Moreover a grid can be folded back on itself by the user. Additionally the UI provides groups of user-defined wavy splines that can be extruded from a displayed surface.
US09165401B1	Multi-perspective stereoscopy from light fields Methods and systems for generating stereoscopic content with granular control over binocular disparity based on multi-perspective imaging from representations of light fields are provided. A reference image, a three-dimensional (“3D”) representation of a light field corresponding to the reference image, and a goal disparity image that indicates a goal binocular disparity for one or more pixels of the reference image may be received. For each pixel of an output image corresponding to the reference image, a point within the light field that is a closest match for the goal binocular disparity of a corresponding pixel of the goal disparity image may be determined. A stereoscopic image pair including the reference image and the output image may be generated.
US09165400B2	Image generation apparatus, image generation method, image generation program, and integrated circuit for rendering a target pixel in a target scene by using Z-buffering An image generation apparatus that renders a target pixel in a target scene by using Z-buffering, comprising: a unit that calculates a statistical value indicating distribution characteristics of Z depth values in a predetermined scene; a unit that, by using the statistical value, converts a Z depth value for the target pixel into a converted Z depth value; a unit that generates a first Z depth value for the target pixel by using the converted Z depth value and generates a second Z depth value for the target pixel by using the converted Z depth value or the Z depth value for the target pixel; and a unit that performs a first comparison using the first Z depth value as one comparison subject and, only when the first comparison cannot be successfully performed, performs a second comparison using the second Z depth value as one comparison subject.
US09165399B2	System, method, and computer program product for inputting modified coverage data into a pixel shader A system, method, and computer program product are provided for inputting modified coverage data into a pixel shader. In use, coverage data modified by a depth/stencil test is input into a pixel shader. Additionally, one or more actions are performed at the pixel shader, utilizing the modified coverage data.
US09165397B2	Texture blending between view-dependent texture and base texture in a geographic information system Systems and methods for rendering a view-dependent texture in conjunction with a three-dimensional model of a geographic area are provided. A view-dependent texture can be rendered in conjunction with at least portions of the three-dimensional model. A base texture can be rendered for portions of the three-dimensional model in the same field of view that are viewed from a slightly different perspective than a reference direction associated with the view-dependent texture. For instance, a stretching factor can be determined for each portion of the three-dimensional model based on the reference direction and a viewpoint direction associated with the portion of the three-dimensional model. A base texture, a view-dependent texture, or a blended texture can be selected for rendering at the portion of the three-dimensional model based on the stretching factor.
US09165396B2	Graphics processing unit with a texture return buffer and a texture queue A processor and a system are provided for performing texturing operations. The processor includes a texture return buffer having a plurality of slots for storing texture values and one or more texture units coupled to the texture return buffer. Each of the slots of the texture return buffer are addressable by a thread. Each texture unit is configured to allocate a slot of the texture return buffer when the texture unit generates a texture value.
US09165391B2	Receipts scanner and financial organizer A portable device is configured to obtain an image of a document, the document being of no predefined format and containing numerical data. The numerical data is extracted and automatically organized into a report in a predefined or customized format and stored into a database. The database is accessible and searchable by a user to obtain either the numerical data of the image or the report.
US09165390B2	Object detection frame display device and object detection frame display method Provided is an object frame display device (100) in which: an object detection frame computation unit (102) derives a first object detection frame which denotes a region of an object to be detected by carrying out a pattern recognition process on an inputted image, and derives a second object detection frame by integrating first object detection frames which are inferred to be object detection frames relating to the same object to be detected; a containment frame computation unit (103) derives, for each second object detection frame, a third object detection frame which contains the first object detection frame upon which the second object detection frame is based; and a display frame forming unit (105) forms an object detection frame which is displayed on the basis of a relation between the size of the second object detection frame and the size of the third object detection frame.
US09165385B2	Imaging procedure planning A method includes generating with a processor (122) a three-dimensional subject specific model of structure of interest of a subject to be scanned based on a general three-dimensional model and pre-scan image data acquired by an imaging system (100) generating with the processor (122) an imaging plan for the subject based on the three-dimensional subject specific model.
US09165383B1	Point cloud visualization using bi-modal color schemes based on 4D lidar datasets A system is provided for alerting a crew in an airborne platform. The system includes a module for receiving point cloud data from a LIDAR system, including range data between the LIDAR system and multiple points in the point cloud. The system also includes a module for placing the multiple points into first and second zones, wherein the first zone has range data of points in the point cloud located within a first distance from the airborne platform, and the second zone has range data of points located further than the first distance. The first distance is predetermined by an operational environment of the airborne platform. The system further includes a color module for coloring the points in the first zone with a first color composition and coloring the points in the second zone with a second color composition. A color display is provided for displaying the colored points in the first and second zones.
US09165381B2	Augmented books in a mixed reality environment A system and method are disclosed for augmenting a reading experience in a mixed reality environment. In response to predefined verbal or physical gestures, the mixed reality system is able to answer a user's questions or provide additional information relating to what the user is reading. Responses may be displayed to the user on virtual display slates in a border or around the reading material without obscuring text or interfering with the user's reading experience.
US09165379B2	Method for encoding and decoding video, and apparatus using same The present invention combines an inter-prediction method using an AMVP mode and an inter-prediction method using a merge mode so as to use the same candidates. The method for decoding video data proposed by the present invention comprises receiving mode information on an inter-prediction method of a current block, determining, on the basis of the received mode information, whether the inter-prediction method to be applied to the current block is an AMVP mode or a merge mode, and selecting a candidate to derive motion information of the current block.
US09165376B2	System, method and computer readable medium for detecting edges of a pattern A system, a non-transitory computer readable medium and a method for detecting a parameter of a pattern, the method comprises: obtaining an image of the pattern; wherein the image is generated by scanning the pattern with a charged particle beam; processing the image to provide an edge enhanced image; wherein the processing comprises computing an aggregate energy of first n spectral components of the image, wherein n exceeds two; and further processing the edge enhanced image and determining a parameter of the pattern.
US09165375B2	Automatically determining field of view overlap among multiple cameras Field of view overlap among multiple cameras are automatically determined as a function of the temporal overlap of object tracks determined within their fields-of-view. Object tracks with the highest similarity value are assigned into pairs, and portions of the assigned object track pairs having a temporally overlapping period of time are determined. Scene entry points are determined from object locations on the tracks at a beginning of the temporally overlapping period of time, and scene exit points from object locations at an ending of the temporally overlapping period of time. Boundary lines for the overlapping fields-of-view portions within the corresponding camera fields-of-view are defined as a function of the determined entry and exit points in their respective fields-of-view.
US09165371B2	User location system A user location system (ULS) can use images, such as video or still images, captured from at least one camera of an electronic device, such as a mobile device, to determine, via at least edge detection and image uniformity analysis, location of a user in an environment, such as in a cabin of a vehicle. The determined location of the user can then be used as an input to control at least one aspect of the environment. In the case of a vehicle, such input may be used to facilitate control of speed, safety features, climate, and/or audio playback, for example.
US09165368B2	Method and system to segment depth images and to detect shapes in three-dimensionally acquired data A method and system analyzes data acquired by image systems to more rapidly identify objects of interest in the data. In one embodiment, z-depth data are segmented such that neighboring image pixels having similar z-depths are given a common label. Blobs, or groups of pixels with a same label, may be defined to correspond to different objects. Blobs preferably are modeled as primitives to more rapidly identify objects in the acquired image. In some embodiments, a modified connected component analysis is carried out where image pixels are pre-grouped into regions of different depth values preferably using a depth value histogram. The histogram is divided into regions and image cluster centers are determined. A depth group value image containing blobs is obtained, with each pixel being assigned to one of the depth groups.
US09165362B2	3D-2D image registration for medical imaging A method of 3D-2D registration for medical imaging includes the following steps: providing a first input interface for acquiring a three-dimensional image; providing a second input interface for acquiring a fixed two-dimensional image using an imaging system that includes a source and a detector and that has an unknown source-detector geometry; initializing image transformation parameters and source-detector geometry parameters; generating a reconstructed two-dimensional image from the three-dimensional image using the image transformation parameters and the source-detector geometry parameters; determining an image similarity metric between the fixed two-dimensional image and the reconstructed two-dimensional image; and updating the image transformation parameters and the source-detector geometry parameters using the image similarity metric, and a corresponding non-transitory computer-readable medium and apparatus.
US09165360B1	Methods, systems, and devices for automated analysis of medical scans The disclosure herein provides methods, systems, and devices for automated reorientation and/or analysis of medical scans and/or images. The methods, systems, and devices for automated analysis of medical scans can be configured to mark, score, grade, and/other otherwise classify medical scans that are more time-sensitive, severe, and/or the like to allow a medical professional reviewing and/or analyzing medical scans to view and/or analyze such scans more efficiently by using a common image orientation and/or taking into account knowledge of the risk of severity, time-sensitiveness, and/or other priority.
US09165357B2	Methods for determining a wavefront position on a test strip The present disclosure relates to methods for determining a wavefront position of a liquid on a surface of an assay test strip placing a liquid on the surface of the test strip; and acquiring one or more signals from the surface of the test strip at one or more times, comparing the one or more acquired signals to a threshold, wherein the wavefront position is a position on the surface of the test strip where a signal is greater than or less than a threshold (e.g., fixed or dynamic threshold). Such methods may be used to determine the wavefront velocity of a liquid on a surface of an assay test strip and the transit time of a liquid sample to traverse the one or more positions on the surface of the assay test strip.
US09165347B2	Method of and apparatus for local optimization texture synthesis 3-D inpainting An apparatus, system, method, and article to continue border lines into an unknown region of an image from a known background; determine segments, based on the continued borders, for the unknown region of the image; and propagate pixels from a known area of the image to the unknown area based on the determined segments and continued borders.
US09165343B2	Image processing apparatus and image processing method An image processing apparatus includes a calculation section configured to calculate filtering coefficients of a filter with a first area in an image that is partitioned into multiple first areas including the first area, the image being partitioned differently into multiple second areas, each one of which being covered by several first areas, to calculate a convoluted image of a second area using the filtering coefficients calculated with the first areas covering a part of the second area, the calculation being executed for the several first areas covering distinct parts of the second area, respectively; and an interpolation section configured to interpolate a pixel in the second area using pixels at the same position in the convoluted images of the second area which are convoluted with the respective filtering coefficients.
US09165341B2	Method for generating super-resolution images having improved image resolution and measuring device In the case of a measuring device for recording a sequence of individual images (6, 7, 8) in a non-visible spectral range, a method for generating an SR image (11) having an image resolution that is higher than an image resolution of the individual images (6, 7, 8) is provided, wherein, for the individual images (6, 7, 8), a displacement vector field (11, 12) is determined with a calculation of the optical flow and the individual images (6, 7, 8) are segmented into segments (20, 21, 22, 23, 24, 25) with regard to the values of the displacement vector field (11, 12), and an optimization method is carried out for calculating the SR image (11) from the individual images (6, 7, 8) with variation parameters individually assigned to the segments (20, 21, 22, 23, 24, 25).
US09165334B2	Pet and people care management system A pet or human care management system and method are provided. In one embodiment, the system includes a portable electronic device carried by a care service provider to scan a care customer bar code at the location of a care visit to indicate the start and/or end of the care visit. The portable electronic device also includes a GPS component and transmits its location at a plurality of times during the care visit, such as to indicate the path of a scheduled walk. A website is employed to administrate the care management system, including scheduling walks, licensing care providers, and creating customer and care provider accounts.
US09165332B2	Application licensing using multiple forms of licensing A method, system, and computer-readable storage media for licensing an application using multiple forms of licensing are provided herein. The method includes providing a first form of a license to a first computing device via a licensing service and providing a second form of the license to a second computing device via the licensing service. The method also includes determining a first state of the first form of the license and a second state of the second form of the license, synchronizing the first state and the second state to form a combined license state, and adjusting conditions of the license based on the combined license state.
US09165330B2	Management system of mining machine and management method of mining machine In a management system of the mining machine, a management device collects operation information about the dump truck via a management-side wireless communication device. Routes along which the dump truck travels are identified based on position information, included in the operation information about the dump truck, about at least four locations included in a route along which the dump truck moves to a location where the dump truck unloads a load, to a location where the dump truck loads a load, and to a location where the dump truck unloads the load again.
US09165327B1	Method and apparatus for managing business and social contacts A handheld electronic device includes one or more networking applications that enables the handheld electronic devices to be used as a networking device. The networking application monitors the types of contact that the user has with individuals, the frequency of contact, and type of contact, to infer the closeness of the relationships between the user and the contact. The networking application may monitor not only network based contact, but also physical contact between the two individuals. Knowledge of the closeness level may enable the handheld electronic device to classify contacts, so that different contacts may be handled differently by the handheld electronic device. The closeness level may also be used to alert the user to the presence of people that are close contacts. An anonymizing service may be provided to enable communications between people without requiring them to exchange sensitive personal information until the closeness level reaches a particular threshold.
US09165326B1	System and method to adjust insurance rate based on real-time data about potential vehicle operator impairment A method includes receiving data about potential impairment of a vehicle operator, wherein the data about potential impairment is generated by: (i) a first optical sensor monitoring a vehicle operator, and (ii) a second optical sensor monitoring an environment ahead of a vehicle operated by the vehicle operator. The computer-implemented method further includes assigning a plurality of scores based on the data about potential vehicle operator impairment, wherein each of the plurality of scores corresponds to a respective impairment indicator, determining an impairment score by performing a mathematical operation on the plurality of scores, and providing the impairment score to a remote device configured to alert the vehicle operator based on the impairment score.
US09165324B1	Systems and methods for facilitating an insurance marketplace for negotiations among brokers and insurance carriers Methods are disclosed for providing leads for insurance market participants. A method may include a broker providing for consideration, their clients' insurance risk to be considered by multiple insurance capital providers. The broker can be provided with potential carrier matches based on analysis of broker and carrier insurance preferences, and previous transactions. Similarly, methods may include carriers disclosing their risk appetites, in the form of insurance products and services for consideration. The carrier may also be provided with potential broker and/or client matches based on analysis of the broker and carrier insurance preferences and previous transactions. Systems and apparatuses are also disclosed to implement the disclosed methods.
US09165318B1	Augmented reality presentation Described are methods and systems of providing an augmented experience on a user device to facilitate user interaction with one or more virtual items. An augmented image comprising an actual object and a virtual item is generated and presented in a user interface. The user interface allows the user to lock a relative position of the virtual item as presented, such that the user may appear to “move” the virtual item. The user interface may also provide sizing information of the virtual item relative item to the actual object.
US09165314B2	Interactions for sharing content items in a digital magazine A digital magazine server user may identify a content item presented by the digital magazine server to save or present to other digital magazine server users by interacting with a client device presenting the content item. For example, providing a gesture to the client device identifies a content item for presentation to other digital magazine server users. The gesture may begin by the user interacting with a portion of a display device that displays a portion of the content item and continue as the user interacts with the display device along a path from the portion to an additional portion. When the gesture is completed, the user may be presented with options to present the content item to additional digital magazine server users, or the content item may be presented to other digital magazine server users.
US09165313B2	Commercially subsidized mobile communication devices and services Mobile communication devices, such as mobile phones, may be capable of recommending to a user various providers of one or more solicited services, e.g., by identifying a user location and identifying providers near the user location that provide the services, and by initiating a call between the user and a selected provider. However, the equipment and service costs of such devices may be prohibitive, particularly for mid-range mobile communication devices that may appeal to cost-conscious users. The prohibitive costs may be diminished by redirecting part or all of the cost of providing the recommendation service from the providers, e.g., by charging the provider a service cost upon initiating a call from the user to the provider, or upon representing the provider in a provider database. In one such embodiment, all service costs may be borne by providers, providing to the user a free recommendation service via the mobile communication device.
US09165308B2	System and method for loading of web page assets The present solution is directed to methods and systems for asynchronously loading tag management code and vendor tags on a web page while remaining portions of the web page load. An application executing on a device may receive a web page comprising a configuration object configured to asynchronously load tag management code. The configuration object may load asynchronously, upon execution by the application, the tag management code into memory of the application while the application continues to load a remainder of the web page. The tag management code may request, while the application continues to load the remainder of the web page, one or more vendor tags from a server over a network. The tag management code may receive, while the application continues to load the remainder of the web page, a vendor tag from the server.
US09165305B1	Generating models based on user behavior A system and method for generating a model based on the user's interests and activities by receiving with a logging unit user activities from heterogeneous data sources, generating a log of user activities for a content item by joining the user activities for the content item, expanding attributes of the log by at least one of content and by the user to form an expanded log and generating a user model based on the expanded log. A feature extractor extracts features from content items and assigns weights to the features. A scoring engine receives the model and the content items with their associated weighted features and scores the content items based on the user model. The scoring engine generates a stream of content based on the scored content items.
US09165304B2	Analyzing consumer behavior using electronically-captured consumer location data In embodiments, methods and systems for consumer behavior analysis using electronically-captured consumer location data may be provided. The location data may be gathered for one or more consumers. The gathered data may be analyzed to determine behavior patterns or other characteristics of the one or more consumers. Further, inferences or predictions about consumers may be derived based on the characteristics. The inferences and predictions may be the basis of consumer analytics supplied to a business or other entity.
US09165303B2	Fresh product system A method is used for enabling fresh products related information to be sent to potential customers, where fresh products become available at one or more locations at different times during the day. The method comprises receiving at a server from said locations information regarding freshness of the fresh products that are or will become available at said locations; and presenting the information and said locations on a webpage by means of a server. A storage may be used to store information regarding one or more locations where fresh products are or will become available, and regarding freshness of the fresh products at the locations. A processor may be used to present the webpage that displays the stored information. Fresh products may include cookies, fresh produce and flowers.
US09165301B2	Network devices for replacing an advertisement with another advertisement Techniques for replacing an advertisement in a webpage from a website with another advertisement are disclosed. A response including the webpage is intercepted in a network device deployed in an in-line fashion, preferably at a data traffic point along a network. When it is determined that the webpage includes an advertisement that is replaceable, a preferable advertisement more correlated to the interests of a user is embedded in data packets to replace those for the original advertisement. Subsequently, the preferable advertisement is served when the webpage is displayed.
US09165300B2	Generating a recommendation A method and an apparatus for communicating a recommended item to a user of a network-based transaction facility are described. The method comprises determining that the user has been unsuccessful in concluding a transaction pertaining to an item offered for sale via the network-based transaction facility, and in response to this determination, communicating information concerning a recommended item to the user over a network. The recommended item is available for purchase via the network-based transaction facility.
US09165296B2	Wireless devices for storing a financial account card and methods for storing card data in a wireless device A wireless device is enabled to receive a financial account card that is inserted into a card slot of the wireless device. The wireless device reads card data from the financial account card when it is inserted into the slot and programs an RFID (radio frequency identification) tag or a memory included in the wireless device. The wireless device may then be used to provide payment by transmitting the card data via radio frequency to a nearby RFID reader using the RFID tag. The financial account card may also be ejected from the wireless device and swiped by a magnetic card reader.
US09165292B2	Systems and methods for a network-to-network interface A method and system for processing raw address data using a computer device coupled to a database are provided. The method includes receiving, at the network interface device, a first network message containing financial transaction data from a first one of a plurality of multiprotocol label switching networks, determining a destination of the financial transaction data from the network message, transmitting the financial transaction data to a second one of the plurality of multiprotocol label switching networks using a second network containing the financial transaction data, where at least one of the first one and the second one of the plurality of multiprotocol label switching networks is a satellite-based network.
US09165288B2	Inferring relationships based on geo-temporal data other than telecommunications An illustrative geo-temporal analysis system analyzes telecommunications-event records and other records associated with wireless terminals to infer a collaborative relationship between users who do not telecommunicate with each other, based on how precisely a first geo-temporal pattern matches a second geo-temporal pattern. When a collaborative relationship is inferred, the system transmits an indication thereof and a request for an estimated location of the respective wireless terminals.
US09165282B2	Shared playlist management for open overlay for social networks and online services Embodiments of the present invention provide methods and systems that allow users to share information about their recent activities with other users. In particular, as users receive and/or share multimedia content with other users, information that indicates the locations of this content, such as a website, playlist, or file, is passively tracked and logged. This information may be formatted into a viewable form, such as a web site or web log, and cooperatively shared with other users. Users may then incorporate the multimedia content played by other users into their own library. Users may also elect to synchronize their multimedia content with other users. For convenience, multiple locations for the same multimedia content may be determined when it is logged and tracked. Users may obtain the multimedia content using one or more of their existing accounts with a provider at their own discretion.
US09165271B2	Method and system for tracking and reporting environmental impact and agricultural-producer information Various embodiments of the present disclosure include methods and systems for tracking and reporting environmental impact and agricultural-producer information. In an example embodiment, a method comprises receiving first data associated with an impact on groundwater pollution or surface water pollution, the impact on the groundwater pollution or the surface water pollution resulting from a production of an agricultural product, the first data being received from a single representative sampling location; receiving second data associated with the impact on the groundwater pollution or surface water pollution, the second data being received from at least one of a plurality of representative sampling locations; generating a benchmark percentage-based result based on the first or second data; calculating comparative data using the benchmark percentage-based result and at least some of the first or second data; and reporting the benchmark percentage-based result and the comparative data to a user.
US09165268B2	System and method for estimating marking material usage for a printing system A method for determining a marking material usage estimate for a print job to be performed by a printing system is provided. The method is implemented in a computer system having one or more processors configured to execute one or more computer program modules. The method includes receiving compressed data of an image of the print job, wherein the image has a plurality of image pixels each having an image pixel intensity value, wherein the image pixels are transformed into the compressed data using a compression scheme; obtaining marking material usage statistics by partially decompressing the compressed data so as to obtain average pixel intensity values of the image pixels in the image; and determining the marking material usage estimate for the print job using the obtained marking material usage statistics.
US09165267B2	Scheduling and decision system The inventive subject matter herein is directed toward an improved scheduling and planning system in which a workflow scheduling system automatically detects a problematic workflow event. The system then selects a primary human contact and a secondary human contact from a hierarchical selection list and automatically attempts to notify the primary human contact by escalating through the primary human contact's contact methods. When the primary human contact fails to respond within a threshold of time, the system automatically attempts to notify the secondary human contact by escalating through the secondary human contact's contact methods.
US09165264B2	Reservation system, navigation device, battery charger and server Reservation system realizing more efficient reservation of charging. The reservation system comprises a navigation device and a battery charger. The navigation device generates reservation information of a charge, and sends the reservation information to the battery charger. The battery charger makes a schedule by using the reservation information, and performs charging according to the schedule. Further, the battery charger makes again a schedule according to an arrival time of a booked vehicle.
US09165260B1	Method and apparatus for using estimated travel time to schedule an event and event reminders A method, apparatus and computer program product for using estimated travel time to schedule an event and/or an event reminder is presented. At least one scheduled event participant is determined, as is a location of the at least one scheduled event participant. A travel time of at least one scheduled event participant to travel to the scheduled event is computed. An event is scheduled for the at least one scheduled event participant, the scheduled event taking into account the computed travel time of the at least one scheduled event participant.
US09165252B2	Utilizing failures in question and answer system responses to enhance the accuracy of question and answer systems A computerized device for enhancing the accuracy of a question-answer system is disclosed. The computerized device comprises a question-answer system comprising software for performing a plurality of question answering processes. A receiver receives a question into the question-answer system. A processor that generates a plurality of candidate answers to the question is connected to the question-answer system. The processor determines a confidence score for each of the plurality of candidate answers. The processor evaluates sources of evidence used to generate the plurality of candidate answers. The processor identifies missing information from a corpus of data. The missing information comprises any information that improves a confidence score for a candidate answer. The processor generates at least one follow-on inquiry based on the missing information. A network interface outputs the at least one follow-on inquiry to external sources separate from the question-answer system.
US09165250B2	Dynamic incident response Methods, systems, computer-readable media, and apparatuses for providing dynamic incident response using advanced analytics are presented. In some embodiments, a computing device may determine that an incident has occurred. The computing device then may load a predefined response template that includes parameters for responding to the incident. Subsequently, the computing device may utilize a big data platform to identify one or more potential responders for the incident based on the predefined response template. In some additional embodiments, the computing device also may contact the identified potential responders and subsequently monitor communications by the identified potential responders that are responsive to the contact. The computing device may also update historical interaction data based on the monitoring, and this historical interaction data may be used to subsequently determine the likelihood that at least one potential responder will respond to a future incident.
US09165245B2	Apparatus and method for partial evaluation of synaptic updates based on system events Apparatus and methods for partial evaluation of synaptic updates in neural networks. In one embodiment, a pre-synaptic unit is connected to a several post synaptic units via communication channels. Information related to a plurality of post-synaptic pulses generated by the post-synaptic units is stored by the network in response to a system event. Synaptic channel updates are performed by the network using the time intervals between a pre-synaptic pulse, which is being generated prior to the system event, and at least a portion of the plurality of the post synaptic pulses. The system event enables removal of the information related to the portion of the post-synaptic pulses from the storage device. A shared memory block within the storage device is used to store data related to post-synaptic pulses generated by different post-synaptic nodes. This configuration enables memory use optimization of post-synaptic units with different firing rates.
US09165242B2	Synaptic semiconductor device and operation method thereof Disclosed is a semiconductor device used to embody a neuromorphic computation system and operation method thereof. By comprising a floating body as a short-term memory means electrically isolated from the surroundings and a long-term memory means formed at one side of the floating body not formed of a source, a drain and a gate, a low power synaptic semiconductor device is provided, which can be mimic not only the short-term memory in a nervous system of a living body by an impact ionization, but also the short- and long-term memory transition property and the causal inference property of a living body due to the time difference of signals of the pre- and post-synaptic neurons.
US09165234B2	Radio frequency identification tag assembly with a first tag identity and a second tag identity that are stored in a second tag memory portion According to one embodiment of the present invention, a method for determining the location of a subject is provided. The method includes receiving, by a first set of receivers out of a plurality of receivers, a first signal from a radio frequency identification tag being assigned to the subject, wherein the radio frequency identification tag has assigned a radio frequency identification tag identity; receiving, by a second set of receivers out of a plurality of receivers, a second signal from the radio frequency identification tag, the second signal being different from the first signal, wherein the second set of receivers is different from the first set of receivers; computing a location score based on an information about the first signal, wherein the information about the first signal is included in the first signal and on the first set of receivers, and further based on an information about the second signal, wherein the information about the second signal is included in the second signal and on the second set of receivers; and determining the location of the subject based on the location score. A system for determining the location of a subject is also provided. A radio frequency identification tag assembly is also provided.
US09165233B2	Method, system and apparatus for automatically linking digital content to a device A method, system and apparatus for automatically linking technical information to a near field communication (NFC) tag comprises programming and/or encoding the NFC tag with a network address of a data source containing technical information, such as maintenance and servicing information, of an object, and then adhering a NFC tag body to that object. When the object is being serviced or maintained by an end user, the end user only needs to tap the NFC tag with a NFC enabled device in order to automatically access the technical information. In some embodiments, the NFC tag body is a tag that typically would otherwise be adhered to the object.
US09165232B2	Radio-frequency identification (RFID) tag-to-tag autoconnect discovery, and related methods, circuits, and systems Methods, circuits, and systems are disclosed for automatically detecting connections between RFID tags. In one embodiment, a method is provided that includes periodically placing a charge on a node shared between a first RFID tag and a second RFID tag. The method also comprises sensing a voltage at the node at a time subsequent to the placing of the charge. The method also comprises automatically determining whether a connection exists between the first RFID tag and the second RFID tag based on the sensing of the voltage at the node. The first RFID tag and/or the second RFID tag may include circuitry configured to perform the method.
US09165229B2	Print control apparatus and method for printing images on a continuous sheet A print control apparatus and method for determining a sheet size specified by a first print job and a sheet size specified by a second print job, deciding on a sheet width usable by the first print job and a sheet width usable by the second print job based on determined respective sheet sizes, deciding on a sheet width of a continuous sheet to be used by the first print job and the second print job based on the decided respective sheet widths, and printing an image based on the first print job and an image based on the second print job on a continuous sheet supplied from a sheet supplying unit that supplies a continuous sheet having the decided sheet width.
US09165228B2	Printing apparatus allowing user change of operational control of job, control method thereof, and storage medium A printing apparatus includes an accepting unit configured to accept a print job, a first determination unit configured to determine whether the accepted print job is of a first type or a second type, a second determination unit configured to, if the first determination unit determines the accepted print job as the first type and if a job control code included in the accepted print job indicates hold, determine that data of the accepted print job is to be held, if the first determination unit determines that the accepted print job as the first type and if the job control code indicates print, determine that the data of the accepted print job is to be printed, and if the first determination unit determines that the accepted print job as the second type, determine that the data of the accepted print job is to be held.
US09165226B2	Image processing apparatus, method, and storage medium for executing image processing and performing decoration processing An image processing apparatus which decorates color data contained in color image data with different decoration patterns for respective colors of the color data to output the color data includes a determination unit which determines a combination of a color of color data having a highest number of pixels among colors of color data contained in the color image data and a decoration pattern having a lowest number of pixels among the decoration patterns and a monochrome decoration output unit which decorates color data contained in the color image data in accordance with a combination of a color and a decoration pattern corresponding to the color determined by the determination unit for monochrome decoration output of the color image data.
US09165224B2	Image forming apparatus that starts feeding sheet upon detecting an image An image forming apparatus may include a scanner configured to read a document, a feeder configured to feed a sheet, a printer configured to print an image on the sheet, a processor, and memory storing instructions. The instructions, when executed by the processor, may cause the image forming apparatus to control the scanner to read the document to generate read data, determine whether the read data provides an image while the scanner is reading the document, and control the feeder to start feeding the sheet to the printer in response to determining that the read data provides the image. Determining whether the read data provides the image may include determining whether a substantially blank sheet would be printed based on the read data.
US09165222B2	Forming system, apparatus and storage medium executing a job based on a preview log image and a log image is generated as a history image An image forming system includes a job executing portion, a preview executing portion, and a log image obtaining portion. The job executing portion executes a job based on an image. The preview executing portion executes displaying a preview of the image before the job is executed. The log image obtaining portion obtains a log image as a history of the image and store the log image in a storage portion. The log image obtaining portion obtains a log image of the preview.
US09165215B2	Method of fast image matching Disclosed herein is a method of fast image matching that includes the steps as follows. A template image with a predetermined angular orientation is compared with template images in the range from 0 to 360 degrees to create an angle prediction table. Next, a testing image is acquired and compared with the template image with the predetermined angular orientation to record the similarity at each position, and a plurality of angles corresponding to the similarity is found from the angle prediction table. Afterwards, the template images of the plurality of angles are respectively compared with the testing image to obtain the highest similarity as a comparison result of the position.
US09165210B1	Systems and methods for localized contrast enhancement Systems and methods for improving the contrast of image frames are disclosed. In one embodiment, a system for improving the contrast of image frames includes a control module configured to create an intensity histogram for an image frame, define a set of markers on an intensity range of the histogram, assign a blend factor to each marker, calculate a blend factor for each original pixel of the image, obtain a first equalized pixel output value, calculate a final equalized pixel output value using the blend factor, the first equalized pixel output value, and an original pixel value, and output new pixel values that constitute the output image.
US09165209B2	Apparatus and method for calculating cumulative histogram of image An apparatus and method for calculating a cumulative histogram of an image are provided. A cumulative histogram calculation apparatus may include a cumulative value selecting unit to select cumulative data obtained by accumulating input data, based on a number of combinations of the input data, and a loading unit to load the selected cumulative value in a corresponding bin of a histogram.
US09165208B1	Robust ground-plane homography estimation using adaptive feature selection Described is system and method for robust ground-plane homography estimation using adaptive feature selection. The system determines feature correspondences of an image that correspond with at least one moving object in each image in a set of images. Additionally, feature correspondences of the image that correspond with at least one above-ground object are determined in each image. Feature correspondences that correspond with each moving object in each image are excluded, and feature correspondences that correspond with each above-ground object in each image are excluded. Each image is divided into a plurality of sub-regions comprising features correspondences. The number of feature correspondences in each sub-region is limited to a predetermined threshold to ensure that feature correspondences are evenly distributed over each image. Finally, a ground-plane homography estimation between the set of images is generated.
US09165207B2	Screenshot orientation detection A method and/or system for screenshot orientation detection may include performing an initial optical character recognition (OCR) and/or an initial face recognition technique on a screenshot of an application. A determination of whether the screenshot orientation is correct may be made based on, for example, the initial OCR and/or the initial face recognition technique. In an event when the screenshot orientation is not correct, a determination of a correct screenshot orientation may be made. In this regard, the screenshot may be rotated (e.g., by a predetermined number of degrees). A subsequent OCR and/or a subsequent face recognition technique may be performed on the rotated screenshot. A determination may be made whether the screenshot orientation of the rotated screenshot is correct based on, for example, the subsequent OCR and/or the subsequent face recognition technique.
US09165206B2	Updating point of interest data based on an image Various aspects of the subject technology relate to systems, methods, and machine-readable media for updating a point of interest (POI) data repository. A system may be configured to receive a communication comprising an image associated with a point of interest, extract textual data from the image, identify a portion of the textual data that corresponds to a point of interest (POI) field in a point of interest listing, and update the point of interest (POI) data repository based on the portion of the textual data that corresponds to the POI field.
US09165204B2	Methods and systems for semantic label propagation A method (100) and system (300) is described for processing video data comprising a plurality of images. The method and apparatus is for obtaining for labeling of a plurality of objects or regions in an image of a sequence of images followed by label propagation to other images in the sequence based on an inference step and a model.
US09165203B2	Legibility enhancement for a logo, text or other region of interest in video A video processing system enhances quality of an overlay image, such as a logo, text, game scores, or other areas forming a region of interest (ROI) in a video stream. The system separately enhances the video quality of the ROI, particularly when screen size is reduced. The data enhancement can be accomplished at decoding with metadata provided with the video data for decoding so that the ROI that can be separately enhanced from the video. In improve legibility, the ROI enhancer can increase contrast, brightness, hue, saturation, and bit density of the ROI. The ROI enhancer can operate down to a pixel-by-pixel level. The ROI enhancer may use stored reference picture templates to enhance a current ROI based on a comparison. When the ROI includes text, a minimum reduction size for the ROI relative to the remaining video can be identified so that the ROI is not reduced below human perceptibility.
US09165200B2	Image processing for prioritizing potential objects of interest in a field of view An image-processing method comprising convolving a selected feature of interest (FOI) within the image with a mask of a first size, repeating the convolution with a mask of a second size, and calculating the ratio of the convolution responses, as an indication of the size of the FOI. Preferably the convolution masks are Laplacian of Gaussian. The method can be useful for prioritizing potential targets in a field of view for presentation to an operator.
US09165198B2	Method for identifying a vehicle during vehicle-to-vehicle communication A method identifies a first vehicle during vehicle-to-vehicle communication by the first vehicle emitting vehicle data. A second vehicle receives the emitted vehicle data. The first vehicle is detected by environment data detected with an environment sensor of the second vehicle, and identification of the first vehicle with the second vehicle by the vehicle data and the environment data. The vehicle data comprises at least one information item which relates to a visual property of the first vehicle which can be detected from the outside, and the visual property of the first vehicle which can be detected from the outside is checked by the second vehicle by the environment data for identifying the first vehicle.
US09165195B2	Thronging determination device and thronging determination method A thronging determination device for determining occurrence of a thronging state in which persons are gathered locally, includes an image receiving unit that receives a moving image, an image dividing unit that divides an input image received by the image receiving unit into local regions, and a degree-of-congestion estimating unit that judges the degree of congestion in plural ones of the local regions. If the degree-of-congestion estimating unit judges that the degree of congestion in the plural ones of the local regions is lower than a prescribed value, a thronging determination is performed using local regions that are smaller in number than the local regions that have been used in estimating the degree of congestion.
US09165193B2	Video processing apparatus and method for managing tracking object A video processing apparatus includes a first detection unit configured to detect that a tracking target moving in a video has split into a plurality of objects, and a determination unit configured to, when the first detection unit detects that the tracking target has split into the plurality of objects, determine a number of objects included in the tracking target before splitting of the tracking target based on a number of the plurality of objects after splitting of the tracking target.
US09165192B2	Apparatus and method for separating foreground from background Provided are apparatuses and methods for separating an image into a foreground and a background. The apparatus includes: an edge image generating unit which generates an edge image for an original image, wherein the original image includes the background and the foreground; a background edge model renewing unit which renews a background edge model based on the generated edge image; and a foreground edge extracting unit which generates a foreground edge image based on the generated edge image and the renewed background edge model.
US09165187B2	Systems and methods for mobile image capture and processing In various embodiments, methods, systems, and computer program products for processing digital images captured by a mobile device are disclosed. Myriad features enable and/or facilitate processing of such digital images using a mobile device that would otherwise be technically impossible or impractical, and furthermore address unique challenges presented by images captured using a camera rather than a traditional flat-bed scanner, paper-feed scanner or multifunction peripheral.
US09165186B1	Providing additional information for text in an image Disclosed are techniques for providing additional information for text in an image. In some implementations, a computing device receives an image including text. Optical character recognition (OCR) is performed on the image to produce recognized text. One or more topics corresponding to the recognized text is determined. A word or a phrase is selected from the recognized text for providing additional information. One or more potential meanings of the selected word or phrase are determined. One of the potential meanings is selected using the one or more topics. A source of additional information corresponding to the selected meaning is selected for providing the additional information to a user's device.
US09165182B2	Method and apparatus for using face detection information to improve speaker segmentation In one embodiment, a method includes obtaining media that includes a video stream and an audio stream. The method also includes detecting a number of faces visible in the video stream, and performing a speaker segmentation on the media. Performing the speaker segmentation on the media includes utilizing the number of faces visible in the video stream to augment the speaker segmentation.
US09165174B2	Indicia reader An illuminating, indicia-reading device includes a hand-held indicia reader and a charging-and-communication base. The charging-and-communication base's communication button places the hand-held indicia reader in presentation mode when the hand-held indicia reader is seated in the charging-and-communication base, thereby facilitating hands-free scanning and providing work lamp functionality via activation of the hand-held indicia reader's light source. When the hand-held indicia reader is not seated, the communication button pages the hand-held-indicia reader.
US09165173B2	Security method using an imaging barcode reader A security method using an imaging barcode reader which captures image data for security purposes. An example method includes receiving an unauthorized activity signal by the barcode reader, and capturing image data by a camera in the barcode reader in response to the unauthorized activity signal.
US09165172B2	Receiving device with RFID detection of built-in components held therein, and RFID detection method The invention relates to a receiving device, in particular a cabinet or rack, having a receiving space (12) for receiving built-in components (14) provided with RFID transponders (34), and having a detection device for detecting built-in components (14) accommodated, which is or can be connected to an evaluation device, and has at least one RFID antenna (32) for communication with the RFID transponders (34) of the incorporated built-in components (14). According to the invention, the receiving device (10) has a plurality of RFID transponders (36) arranged distributed along the receiving space (12), the transponder action of said RFID transponders can be changed as a function of a presence or absence of a built-in component (14) in the vicinity of the respective device-specific RFID transponder (36).
US09165171B2	Identification device and identification system A preferred embodiment of the invention includes: an identification device (1) for receiving a first signal and transmitting a second signal, the device including: a receiving means (35) for receiving the first signal to generate a voltage; an integrated circuit (37) having a state selection means (41) for selecting whether the device (1) is in a first state or a second state; a connection (39) between the receiving means (35) and the integrated circuit (37); a transmission means (45) for generating the second signal. The invention also includes a system (50) that includes an interrogator (43) for interrogating a plurality of the identification devices (1).
US09165166B2	Interpolation circuit and receiving circuit An interpolation circuit includes: a plurality of holding circuits configured to each hold a corresponding input data input chronologically; and a generating circuit configured to generate interpolation data by giving weights, based on an interpolation code, to input data that are chronologically adjacent to each other and are held by the plurality of holding circuits and combining the weighted data together.
US09165160B1	System for and methods of controlling user access and/or visibility to directories and files of a computer A system includes a file access manager driver and a kernel file system driver stack in a kernel-mode address space of an operating system (OS). The system also includes session processes, a public file whitelist; a public file whitelist manager; a user/group file whitelist, which is a private whitelist; and a user/group file whitelist manager in a user-mode address space of the OS. A method includes receiving a request for access and/or visibility to a directory and/or file and then determining whether the request is allowed to execute based on whether the file access manager driver identifies that the directory and/or file is allowed in either public or private whitelists.
US09165159B1	Encryption based on touch gesture Some of the embodiments of the present disclosure provide a method comprising receiving an input from a touch input device. The input corresponds to a gesture produced by a user swiping a pattern on a surface of the touch input device. The method further comprises decomposing the gesture into segments, using a look-up table to determine alphanumeric elements that correspond to each of the segments, and assembling the alphanumeric elements into an encryption password.
US09165154B2	Trusted cloud computing and services framework A digital escrow pattern is provided for network data services including searchable encryption techniques for data stored in a cloud, distributing trust across multiple entities to avoid a single point of data compromise. In one embodiment, a key generator, a cryptographic technology provider and a cloud services provider are each provided as separate entities, enabling a publisher of data to publish data confidentially (encrypted) to a cloud services provider, and then expose the encrypted data selectively to subscribers requesting that data based on subscriber identity information encoded in key information generated in response to the subscriber requests, e.g., a role of the subscriber.
US09165148B2	Generating secure device secret key Methods, devices, systems and computer program products are provided to facilitate cryptographically secure retrieval of secret information that is embedded in a device. The embedded secret information can include a random number that is not custom-designed for any specific requestor of the secret information. Upon receiving a request for the embedded secret information, an encrypted secret is provided to the requestor that enables the recovery of the embedded secret information by only the requestor. Moreover, a need for maintenance of a database of the embedded secret information and the associated requestors is eliminated.
US09165147B2	Apparatus and method for generating digital images An apparatus and a method are arranged for generating a digital image. The apparatus comprises an image generation unit for generating the digital image having a first security module adapted for cryptographically linking a first secret unambiguously identifying the first security module, and securely deposited therein, with the digital image such that the integrity of the digital image can be ascertained using the result of this cryptographic linkage. Further, the apparatus comprises a portable data carrier which can be introduced into the apparatus. The portable data carrier is furnished with a second security module which is adapted for cryptographically linking a second secret unambiguously identifying the portable data carrier, and securely deposited therein, with the digital image such that the identity of the portable data carrier can be ascertained using the result of this cryptographic linkage.
US09165144B1	Detecting a person who does not satisfy a threshold age within a predetermined area A system is provided that during a presentation of digital media content on a media presentation device automatically determines that a person within a predetermined area does not satisfy a threshold age. Based on the determination, the system applies one or more content rules to the presentation of the digital media content on the media presentation device. The content rules cause an alteration of the presentation of the digital media content. The system can also scan the digital media content of a content data store and estimate an age threshold value of the files of the digital media content. Based on the estimated age threshold value of the files, the system can determine that the device is used by a person who does not satisfy a threshold age and applies one or more content rules to a presentation of the digital media content.
US09165141B2	Systems and methods for providing anti-malware protection and malware forensics on storage devices Systems and methods for providing features that enable anti-malware protection on storage devices are described. In one embodiment, a storage device includes a controller, firmware, and memory. The controller manages input/output operations for the storage device. The firmware provides features for protection against malware. The memory includes secure storage that is configured to provide a set of storage operations.
US09165136B1	Supervising execution of untrusted code Disclosed are various embodiments for supervising execution of untrusted code. Untrusted code that is to be executed in a computing device is obtained. A virtual machine in the computing device is configured to execute the untrusted code, with one or more resource access restrictions being placed on the untrusted code. Periodic updates are obtained from the virtual machine relating to one or more resources of the computing device that are consumed by the virtual machine. Execution of the untrusted code in the virtual machine is interrupted in response to a value indicated by one or more of the periodic updates.
US09165135B2	Systems and methods using cryptography to protect secure computing environments Secure computation environments are protected from bogus or rogue load modules, executables and other data elements through use of digital signatures, seals and certificates issued by a verifying authority. A verifying authority—which may be a trusted independent third party—tests the load modules or other executables to verify that their corresponding specifications are accurate and complete, and then digitally signs the load module or other executable based on tamper resistance work factor classification. Secure computation environments with different tamper resistance work factors use different verification digital signature authentication techniques (e.g., different signature algorithms and/or signature verification keys)—allowing one tamper resistance work factor environment to protect itself against load modules from another, different tamper resistance work factor environment. Several dissimilar digital signature algorithms may be used to reduce vulnerability from algorithm compromise, and subsets of multiple digital signatures may be used to reduce the scope of any specific compromise.
US09165130B2	Mapping biometrics to a unique key A technique for mapping a biometric credential of a user to a data value such as a key or password. A database stores multiple entries of biometric templates and associated data values for different users. One of the entries is a match for a particular user, and the remaining entries are randomly selected. The number of entries is reasonably large to provide a desired degree of randomness for a given entry, but smaller than a key space of the data values. Based on an input of a biometric sample of the user, a best match is selected from the entries of biometric templates, and the associated data value is used to authenticate the user. Two- or three-factor authentication can be provided. Additional factors can include a password provided by the user and a key which is encrypted by the data value of the matching entry.
US09165118B2	Medicine dispensing system An information display integrating a display portion, a built-in electronic circuit, and a wireless receiver is attached to a container. Medicine dispensers are provided face a conveying path of a container conveying mechanism. The medicine dispensers put a medicine into the container when the medicine is in stock, and issues information on stockout medicine rather than dispensing a medicine when the medicine is out of stock. A write command is wirelessly transmitted to the information display so as to cause the stockout information to be displayed on the display portion in a visibly recognizable manner. In addition, partition information on the planar arrangement of sub containers that allows partitioning the internal space of the container is displayed on the display portion in a visually recognizable manner.
US09165117B2	Method and apparatus for identifying and reporting a physiological condition of an individual utilizing physiological and contextual parameters Various methods and apparatuses for measuring a state parameter of an individual using signals based on one or more sensors are disclosed. In one embodiment, a first set of signals is used in a first function to determine how a second set of signals is used in one or more second functions to predict the state parameter. In another embodiment, first and second functions are used where the state parameter or an indicator of the state parameter may be obtained from a relationship between the first function and the second function. The state parameter may, for example, include calories consumed or calories burned by the individual. Various methods for making such apparatuses are also disclosed.
US09165115B2	Finding time-dependent associations between comparative effectiveness variables Embodiments of the invention relate to arrangements for ascertaining time-dependent associations between inputted comparative effectiveness research (CER) variables from patient data are. Each CER variable is represented via at least one unit time series, and a similarity metric with respect to pairs of CER variables is determined. The determining includes comparing at least one unit time series from each of at least two CER variables.
US09165113B2	System and method for quantitative assessment of frailty Methods, systems, and apparatus for quantifying an individual's frailty level based on inertial sensor data collected from the individual. The quantified frailty level may correspond to and approximate clinical metrics of frailty, such as the Fried frailty index. A linear regression model may be used to output the quantitative frailty value based on input parameters from the inertial sensor data. The linear regression model may be initially generated from the clinically-measured frailty index values of individuals and inertial sensor data collected from them. The inertial sensor data may be collected during, for example, a timed up and go (TUG) test. Two logistic regression models may be used to output a frailty class based on input parameters from the inertial sensor data. A first logistic regression model may distinguish between robust and frail individuals. A second logistic regression model may distinguish between robust and pre-frail individuals.
US09165111B1	Secure patient data recorder for recording monitored vital sign data A monitor and recorder system having a monitor unit for gathering vital sign data from a patient and a memory module for automatically recording the data. Means are provided for protecting the data from accidental or intentional deletion of the data or corruption or damage to the memory module without proper authorization. The data is recorded in a circular memory such that when data must be deleted, the last-recorded data is deleted first. A procedure is disclosed for preserving all data for at least a minimal period of time in case an event such as a patient death occurs.
US09165104B1	Method and apparatus for identifying double patterning color-seeding violations A method for automatically performing a double patterning (DP) color-seeding check in order to discover color-seeding violations in an IC design layout. The method of some embodiments receives a layer of the IC design layout and performs an analysis on the layer of the design layout to determine several error paths. Each error path connects two color-seeding shapes that have a color-seeding violation. For each pair of shapes that has a color-seeding violation, the method of some embodiments displays a DP color-seeding violation marker on a graphical user interface (GUI) to visually assist a user to resolve the color-seeding violation.
US09165103B1	Methods, systems, and articles of manufacture for tessellating and labeling routing space for routing electronic designs Various aspects described herein create tessellated regions by identifying tessellation lines in one or more directions based at least on fixed shape(s) or route(s). New cells or shapes are added to the design by aligning at least some of the boundary segments of the new cells or shapes with existing tessellation lines. Tessellation lines are dynamically adjustable. At least some tessellated regions are associated with initial or tentative track pattern labels some of which are iteratively updated during implementation of the design. Multiple candidate track patterns may be ranked based on consistency costs to determine a tentative track pattern. Designs may be implemented with a trackless approach in trackless region(s) followed by a tracked approach based at least in part upon the initial or tentative labels that are dynamically adjusted during implementation. Capacities and demands are assessed at boundary segments of cells by using the tracked or trackless approach.
US09165102B1	Routing standard cell-based integrated circuits This disclosure describes a multi-height routing cell and utilization of the multi-height routing in an integrated circuit to reduce routing congestion in a standard cell design floorplan. The multi-height routing cell includes a bypass connection, or “tunnel,” that routes a signal through a non-routing layer and under an impeding power rail. The multi-height routing cell includes bypass connectors on both sides of the bypass connection that provide connection points for which to connect standard cells on opposite sides of the impeding power rail. As such, the multi-height routing cell provides a route underneath the impeding power rail and, in turn, reducing routing congestion in the standard cell design floorplan.
US09165099B2	Adaptive clock management in emulation Aspects of the invention relate to techniques for adaptive clock management in emulation. A clock suspension request signal, indicating when a suspension of design clock signals in an emulator is needed, is generated based on activity status information of the emulator with one or more emulator resources such as software environment. A clock suspension allowance signal, indicating whether a suspension of design clock signals is permitted considering dynamic targets in the emulator, is generated based on slack information related to one or more clock signals associated with one or more dynamic targets of the emulator. Based on the clock suspension request signal and the clock suspension allowance signal, a clock suspension signal is generated for enabling temporary design clock suspensions.
US09165093B2	Simulation method for tire A computerized simulation method for evaluating a tire performance is disclosed. Firstly, a simulation of a rolling tire is made by contacting a tire model with a road surface model, and chronological data about node points of the tire model which node points appear in the outer surface of the tire model during rotating are stored. Then, a domain of a fluid is defined, and a simulation of the fluid is made by the use of the chronological data, wherein a small gap is formed between the tire model and the road surface model, and the fluid domain is also defined in the gap.
US09165092B2	Wind farm layout in consideration of three-dimensional wake Methods and arrangements for determining a layout and dimensions of a wind farm. A three-dimensional wake model for a wind farm is generated, and a positioning and dimensioning model for turbines of the wind farm is developed based on the three-dimensional wake model.
US09165088B2	Apparatus and method for multi-mode storage According to an example, multi-mode storage may include operating a first array including a first memory and a second array including a second memory in one or more modes of operation. The first memory may be a relatively denser memory compared to the second memory and the second memory may be a relatively faster memory compared to the first memory. The modes of operation may include a first mode of operation where the first array functions as the relatively denser memory compared to the second memory and the second array functions as the relatively faster memory compared to the first memory, a second mode of operation where the second array is operated as an automatic cache of a portion of a dataset, and a third mode of operation where a cache-tag functionality used to support the second mode of operation is instead used to provide a CAM.
US09165087B2	Validity path node pattern for structure evaluation of time-dependent acyclic graphs Systems and processes may access data using a generic graph framework or other graph interface upon request from a business application. Some data retrieved by the interface may be organized as an acyclic graph structure that includes some temporal, time-based, or otherwise time-dependent nodes. In some cases, the acyclic graph may include one or more time-dependent relations. As the datasets are time-dependent, the parents/children can be processed based on their identifiers in combination with the corresponding validities. Additionally, the actual validities during evaluation of the graph may yet to be computed for each element out of the validities of its predecessors. This accessed data, with at least some time-dependent data, can be compared to a validity period provided by the business application to generate a graph valid for the validity period.
US09165086B2	Hybrid binary XML storage model for efficient XML processing A method for storing XML documents a hybrid navigation/streaming format is provided to allow efficient storage and processing of queries on the XML data that provides the benefits of both navigation and streaming and ameliorates the disadvantages of each. Each XML document to be stored is independently analyzed to determine a combination of navigable and streamable storage format that optimizes the processing of the data for anticipated access patterns.
US09165085B2	System and method for publishing aggregated content on mobile devices A system and method are provided for publishing aggregated content. A syndication server is connected and in communication with one or more online information sources through a network. The syndication server extracts the aggregated content from the online information sources. The syndication server then re-structures the content, followed by enriching the semantics of the content. The modified content is then republished and made available on structured folders. A transfer protocol transfers the modified content to one or more mobile devices in communication with the syndication server.
US09165083B2	Dynamic web portal page A method for providing a dynamic web portal page in a web portal environment by modifying the web portal page, the method comprising, with a server, providing a content with one or more portlets of the web portal page to a user; entering code from the server for identifying user-interface elements in the content of the web portal page; entering code from the server into the provided content of the web portal page for monitoring user actions related to the identified user-interface elements in the content of the web portal page; re-configuring automatically the content of the web portal page according to a user-specific preference extracted from the monitored user actions for the user at a later stage.
US09165081B2	Hovercard pivoting for mobile devices Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for invoking execution of web based applications. In one aspect, a method includes receiving user input at a computing device, displaying a contact hovercard on a display of the computing device in response to the user input, the contact hovercard including first contact data and second contact data, the first contact data corresponding to a first web application and the second contact data corresponding to a second web application, the first web application and the second web application being executed on one or more servers, receiving user input selecting the first contact data, generating a user interface and accessing the first web application over a network in response to receiving the user input selecting the first contact data, and providing the first contact data as input to the first web application.
US09165079B1	Access controls in a search index Techniques include: identifying a first group that has a specified number of entities or more; associating a first group restrict with the first group, where a group restrict comprises data associated with two or more members of a group; assigning the first group restrict to one or more items of content in a search index that the members of the group can access; identifying a second group associated with a second group restrict, where the second group has fewer than the specified number of entities; and assigning searcher restricts for entities in the second group to one or more items of content in the search index, where the searcher restricts include data associated with a searcher.
US09165076B2	System and method to store and retrieve indentifier associated information content In one embodiment, information content files, such as text files, image files, XML files and the like, that provide information related to an identifier bearing item, such as a consumer item with a barcode, are stored on a data storage device such as network server. Identifier data entries, such as UPC data, are associated with file data entries, such as file names, in a database. General file access information that is used in accessing the information content files is stored on a terminal. In operation an identifier is read by the terminal and is used to extract one of the file data entries from the database based on database communication information stored on the terminal. The file data entry in combination with the general file access information is used to establish communication with the data storage device and to extract one of the information content files.
US09165075B2	Managing user ratings in a web services environment Systems and methods for managing user ratings in a web services environment. A method includes storing a comment associated with a web service and storing an influence rating associated with an author of the comment. The method also includes transmitting information associated with the web service, the comment, and the influence rating to a user. Additionally, the method includes receiving feedback from the user, and determining an updated influence rating based upon the feedback and the influence rating.
US09165073B2	Apparatus, system and method for a web-based interactive video platform An apparatus, a system, a method and a computer program product are provided. The system includes a controller configured to broadcast a web-based meeting between a first user and a second user. The system further includes a graphical user interface configured to display the broadcasted web-based meeting. The controller is configured to receive a request from the first user through the graphical user interface. The request includes one of a text question, a recorded video question and a request from the first user to present a live video question to the second user. The controller is further configured to broadcast the request through the graphical user interface. When the received request includes the request from the first user to present the live video question, the controller is further configured to broadcast the request as a real time video feed of the first user, so that the first user can ask the question in real time and the second user can respond to the first user's question in real time.
US09165071B2	Method and system for indicating a validity rating of an entity A fact checking system verifies the correctness of information and/or characterizes the information by comparing the information with one or more sources. The fact checking system automatically monitors, processes, fact checks information and indicates a status of the information.
US09165068B2	Techniques for cloud-based similarity searches Techniques for facilitating a similarity search of digital assets (e.g., audio files, image files, video files, etc.) are described. Consistent with some embodiments, a cloud-based search service manages one or more search tree data structures for use in organizing digital assets to make the digital assets searchable. Each digital asset is associated with a feature vector based on the various attributes and/or characteristics of the digital asset. The digital assets are then assigned to leaf nodes in one or more search tree data structures based on a measure of the distance between the feature vector of the digital asset and a virtual feature vector associated with a leaf node. When a search for similar digital assets is invoked, a prioritized breadth first search of a search tree is performed to identify the digital assets having the feature vectors closest in distance to the reference digital asset.
US09165067B2	Computer system, audio matching method, and non-transitory computer-readable recording medium thereof A computer system is configured for performing audio matching. The computer system includes a client terminal and a server. The client terminal includes a classifier, a first landmark extraction module, a first encoder module and an integration module. The classifier is configured for estimating an identification difficulty. The first landmark extraction module is configured for determining the number of times for landmark extraction, and for extracting first landmarks. The first encoder module is configured for encoding the first landmarks. The server includes a second landmark extraction module, a second encoder module, a hash table, a table-lookup module, an analysis module and a decision module. The second landmark extraction module is configured for extracting second landmarks. The second encoder module is configured for encoding the second landmarks. The table-lookup module is configured for performing a table lookup. The decision module is configured for determining an audio matching result.
US09165064B2	Context-aware prompts and alerts in a note-sharing system A semantic note taking system and method for collecting information, enriching the information, and binding the information to services is provided. User-created notes are enriched with labels, context traits, and relevant data to minimize friction in the note-taking process. Context aware prompts and alerts are generated and send to users associated with the note. Users associated with the note could respond to the alerts and prompt by adding or further enriching the note with contextual traits. The prompts, alerts and responses could be shared among the group of users associated with the note.
US09165062B2	Computer-implemented system and method for visual document classification A computer-implemented system and method for visual document classification are provided. One or more uncoded documents, each associated with a visual representation, are obtained. Reference documents, each associated with a classification code and a visual representation of that classification code, are obtained. At least one of the uncoded documents is compared to the reference documents and the reference documents similar to the uncoded document are identified based on the comparison. A suggestion for assigning one of the classification codes to the uncoded document based on the classification codes of the similar reference documents is provided, including displaying the visual representation of the suggested classification code placed on a portion of the visual representation associated with the at least one uncoded document. An acceptance of the suggested classification code is received and a size of the displayed visual representation of the accepted classification code is increased.
US09165053B2	Multi-source contextual information item grouping for document analysis A method and system for processing informational items originating from a plurality of information sources into a derived document for topical analysis thereof. Informational items are collated from a one of the sources in accordance with a predetermined plurality of relevant attributes and a key property value of common to select ones of the relevant attributes. Informational items are then grouped from the plurality of sources associated with the key common property value to form a document, wherein the informational items therein are marked on the informational source thereof. The document is then analyzed for topical identification.
US09165051B2	Systems and methods for detecting a novel data class Systems and methods for data classification and novel data class detection are provided. In one illustrative embodiment, a system or method for detecting a novel class includes receiving a data stream comprising a plurality of data points, and identifying a set of filtered outliers, in the plurality of data points, that are outside of a decision boundary. A cohesion and a separation for the set of filtered outliers may be determined. A novel class may be detected using the cohesion and the separation of the set of filtered outliers, and the novel class may include the set of filtered outliers.
US09165049B2	Translating business scenario definitions into corresponding database artifacts The present disclosure involves systems, software, and computer-implemented methods for providing process intelligence by translating a business scenario definition into one or more corresponding data storage system artifacts. One example method includes identifying a process intelligence scenario associated with one or more business processes and including one or more definitions defining an observable behavior of the one or more business processes, processing the one or more definitions to produce an executable description including one or more artifacts associated with a data storage system, the one or more artifacts associated with the one or more definitions, storing the executable description in the data storage system, and processing one or more flow events associated with the one or more business processes using the executable description in the data storage system to expose the observable behavior of the business process defined in the process intelligence scenario.
US09165044B2	Enhanced user interface and data handling in business intelligence software A business intelligence and reporting solution can include a databook interface that acts as both as a reporting mechanism and an interface for providing data visualization parameters. In some embodiments, the databook includes a plurality of palettes whereby visualization parameters can be specified through a drag-and-drop interaction with the databook. The databook can include a tab interface to select between data views, graphic visualizations of data currently in the databook, and a composite visualization mechanism that provides output to place one or more rows in context to other data in the databook and/or to forecast trends for one or more databook values. The databook may rely on an underlying dataset collected from multiple distinct sources, such as different databases. The solution may include a security policy restricting access to certain fields, records, and/or columns based on a user's role in an organization, data content, and/or a defined access hierarchy for different data items.
US09165031B2	Retrieving stored data using a web service Retrieving stored data using a web service is provided. An access request from a user account may be received at a web service via a proxy. The web service may decode information received in the access request. The web service may then authorize the user account utilizing the decoded information. The web service may then determine a request type based on the access request. The web service may then send a response based on the determined request type, which is based on data retrieved from a data store.
US09165029B2	Navigating performance data from different subsystems Performance data can be collected from different runtime environment subsystems of a computer system while the computer system is running a program in the runtime environment. A visualization model can be displayed, and a visual query of the integrated data can be received at the visualization model. Queried data can be compiled and displayed in response to the visual query. The queried data can be drilled into in response to user input. In response to a navigation request, navigation can lead to a programming element related to a portion of the queried data.
US09165028B1	Ranking modifications of a previous query Methods and apparatus related to ranking modifications of a previous query. For example, modifications of a previous query may be generated based on a current query issued subsequent to the previous query by substituting one or more n-grams of the previous query with one or more n-grams of the current query. One or more measures of each of the modifications may be identified and, based on such measures, a ranking of each of the modifications may be determined. One of the modifications may be selected as a submission query based on the rankings of the modifications. The submission query may be selected for submission in lieu of, or in addition to, the current query.
US09165025B2	Transaction recovery in a transaction processing computer system employing multiple transaction managers A technique for transaction recovery by one transaction manager of another transaction manager's transactions in which each transaction manager is adapted to manage two phase commit transactional operations on transactional resources and to record commit or rollback decisions in a transaction recovery log. The recovery transaction manager detects apparent unavailability of the another transaction manager for transaction processing and initiates a transaction recovery process for the another transaction manager's transactions. This process also determines whether any of the transactions of the another transaction manager have all respective resources prepared to commit without there yet being a pending commit decision record in the another transaction manager's recovery log. If so, the recovery transaction manager writes a rollback record indicating an intention to roll back the identified transaction, in the another transaction manager's recovery log provided no commit decision record has been recorded.
US09165022B2	Maintaining a data structure with data set names and pointers to a plurality of catalogs A plurality of catalogs are maintained, and wherein each catalog of the plurality of catalogs includes data sets and attributes of the data sets. An indication that a new data set is to be defined is received. A selected catalog is determined from the plurality of catalogs, wherein the selected catalog is suitable for including the new data set and attributes of the new data set. An entry that indicates a data set name corresponding to the new data set and an index to the selected catalog is inserted in a group table.
US09165018B2	Managing a distributed database Concepts and technologies are disclosed herein for managing a distributed database. A data management application can obtain a query. The data management application can analyze the query to determine a number of data structures relevant to the query. The data management application also can analyze data stores storing the data structures and move or assign data structures to other data stores within a distributed database. The movement of the data structures within the distributed database can be based upon greedy algorithms for moving data and/or executing queries.
US09165016B2	Techniques for automatic data placement with compression and columnar storage For automatic data placement of database data, a plurality of access-tracking data is maintained. The plurality of access-tracking data respectively corresponds to a plurality of data rows that are managed by a database server. While the database server is executing normally, it is automatically determined whether a data row, which is stored in first one or more data blocks, has been recently accessed based on the access-tracking data that corresponds to that data row. After determining that the data row has been recently accessed, the data row is automatically moved from the first one or more data blocks to one or more hot data blocks that are designated for storing those data rows, from the plurality of data rows, that have been recently accessed.
US09165015B2	Scalable and user friendly file virtualization for hierarchical storage In one embodiment, a method includes storing files in at least one directory in a first storage tier on at least one random access storage medium, creating an index file which includes entries for each file stored in the directory in the first storage tier on the at least one random access storage medium, aggregating in binary large objects (BLOBs) the files stored in the directory in the first storage tier on the at least one random access storage medium, writing out the aggregated BLOBs of files to a second storage tier on at least one sequential access storage medium, adding location information for each aggregated BLOB of files written to the second storage tier on the at least one sequential access storage medium to the index file, and copying the index file to the second storage tier on the at least one sequential access storage medium.
US09165010B2	Logless atomic data movement A system and method of logless atomic data movement. An internal transaction is started within a multi-level storage architecture, the internal transaction to merge data from the first level storage structure to the second level storage structure. Committed data is read from a first level storage structure of the multi-level storage architecture as specified by the internal transaction. The committed data from the first level storage structure is inserted into a second level storage structure in a bulk insertion process, and the committed data is marked as being deleted from the first level storage. The internal transaction is then committed to the multi-level storage architecture when the committed data has been inserted into the second level storage structure.
US09165009B1	Lightweight appliance for content storage A method, article of manufacture, and apparatus for lightweight storage of content is disclosed. In some embodiments, a request to store a photograph is received from a user. The content of the photograph is then compressed. A list of multi-image container files associated with the user and with sufficient storage space available to store the compressed content of the photograph is then retrieved. The compressed content of the photograph is stored in a multi-image container file. Finally, the modified multi-image file is stored in a storage device.
US09165003B1	Technique for permitting multiple virtual file systems having the same identifier to be served by a single storage system A technique for permitting multiple virtual file system having the same VFS identifier to be served by a single storage system. A data frame descriptor data structure is modified to include a storage pool index value that indexes into a storage pool array to identify a storage pool descriptor. The storage pool (SP) descriptor includes a SP ID, which is used in conjunction with a VFS ID to uniquely identify the VFS to which dirtied data is to be written.
US09165001B1	Multi stream deduplicated backup of collaboration server data Techniques to backup collaboration server data are disclosed. An indication to begin backup of a collaboration server dataset is received. An associated directory is walked in a prescribed order to divide the dataset into a prescribe number of approximately equal-sized subsets. A separate subset-specific thread is used to back up the subsets in parallel. In some embodiments in which the collaboration data is stored in multiple volumes, a volume-based approach is used to back up the volumes in parallel, e.g., one volume per thread. In some embodiments, transaction logs are backed up in parallel with volumes of collaboration data.
US09164998B2	Archive-system-independent archive-type objects This disclosure provides various embodiments for archiving a business object. At least one particular business object is identified for archiving. The particular business object has associated data including type data corresponding to a business object type of the at least one particular business object, structured business data, and unstructured attachment data. At least one archive-type object is created corresponding to the particular business object by enriching the unstructured attachment data with type-specific metadata including data identifying at least one attribute of the business object type. The archive-type object is archive-system-independent. The at least one archive-type object is exported to at least one archiving system for storage in at least one memory device of the archiving system.
US09164996B2	Rules based playlist generation A playlist can be generated based on a chart or list including ranked media items, e.g. songs, videos, etc., by automatically including the highest ranked media items to the playlist, but only adding some of the lower ranked media items to the playlist. A particular lower-ranked media item can be pseudo-randomly excluded from the playlist if that media item has a ranking in a current version of the chart that is lower than its ranking in a previous version. Once the desired number of media items has been added to an intermediate list, the intermediate list can be inverted, and station identifiers can be interspersed between the media items.
US09164994B2	Intelligent default weighting process for criteria utilized to score media content items A system and device are provided for intelligently, or programmatically, assigning weights for one or more criterion utilized to score media content items based on an analysis of a group of media content items. In general, scoring criteria to be used to score media content items for a user are defined. A group of media content items associated with the user is then analyzed with respect to the criteria to provide results such as a number or percentage of media content items from the group of media content items that satisfy each of the scoring criteria. Based on the results of the analysis, a weight is assigned to each of the scoring criteria. Thereafter, media content items are scored as a function of the weights assigned to the scoring criteria.

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