最新美国发明专利第2015-08-11期 - 专利汇|PatentHub专利检索|专利查询网|发明专利查询分析

Document	Document Title
US09106024B2	Electrical connector with a metal plate for preventing electromagnetic interference An electrical connector (100) includes an insulative housing (1), a number of contact terminals (2), a metal plate (3), and a metallic shell (4) enclosing the insulative housing (1). The terminals and the metal plate (3) are retained in the insulative housing (1). The insulative housing (1) includes a base portion (11) and a tongue portion (12) extending forward from the base portion (11). The contact terminal includes a contacting portion (21), a tail (22), and a connecting portion (23) connecting the contacting portion (21) and the tail (22). The tails (22) are positioned out of the insulative housing (1). The metal plate (3) has a number of positioning end portions (33). The positioning end portions (33) are soldered on a printed circuit board for grounding. The electrical connector (100) has improved electromagnetic interference effect.
US09106022B2	Electrical connector An electrical connector includes an insulating body having multiple signal receiving slots and at least one grounding receiving slot, multiple signal terminals and at least one grounding terminal respectively received in the signal receiving slots and the grounding receiving slot, a first conducting layer disposed in the grounding receiving slot for shielding the signal terminals, and a solder located in the grounding receiving slot and contacts the first conducting layer and the grounding terminal. The electrical connector may further includes an upper conducting layer and a lower conducting layer, respectively disposed on an upper surface and a lower surface of the insulating body, and multiple through holes surrounding each signal receiving slot. Each through hole has an internally disposed second conducting layer. The upper conducting layer, the lower conducting layer, the first conducting layer and the second conducting layer are conducted.
US09106019B2	Input/output devices having re-configurable functionality Systems and methods provide re-configurable functionality within components of I/O devices without the need of disconnecting the components from each other. For example, in certain embodiments, when certain types of components are connected to each other, certain functionality sets within the components may be activated to provide combined functionality sets between the components. The combined functionality sets may, for example, be preferred functionality sets to be used when the particular types of components are connected to each other. Furthermore, in certain embodiments, functionality activation keys may be physically inserted into (or electronically communicated to) the components of the I/O device to activate certain functionality sets within the component into which the functionality activation key is inserted (or electronically communicated to), as well as within the other components of the I/O device to which the component is connected.
US09106018B2	Half fitting prevention connector A half fitting prevention connector includes a cylindrical case, a connector body for supplying electric power that is slidably accommodated in a front half part of the cylindrical case, a lever rotatably attached to the cylindrical case, and a holder that has a lever receiving portion for receiving an end portion of the lever. The connector body is moved in the cylindrical case in accordance with a rotational operation of the lever. The holder is provided on a rotation locus of the lever. The end portion of the lever is received in the lever receiving portion of the holder in a state that the connector body is completely fitted with a mating connector by the rotational operation of the lever.
US09106014B2	Electrical connector In an electrical connector, a latch claw is provided at a nearer side than a lock claw in a fitting direction of a connector fitting portion to a power receiving connector. While the latch claw is retracted into the connector fitting portion, the latch arm swings to release the latching between a latch piece and a second latch groove portion. The latch arm includes a protrusion 131A that releases the latching between the second latch groove portion and a hold latch piece of the lock-release hold portion when the second latch groove portion and the latch piece latch together.
US09106009B2	Electrical contact and electrical connector assembly including the same Electrical contact having a body portion and a compliant contact tail that is coupled to the body portion and configured to be inserted into a plated thru-hole (PTH). The contact tail extends from the body portion along a central axis to a leading end. The contact tail includes first and second compliant regions that are located between the leading end and the body portion. The contact tail has a joint region that joins the first and second compliant regions. Each of the first and second compliant regions is dimensioned to mechanically engage the PTH when inserted therein. The joint region is dimensioned smaller than the first and second compliant regions such that the joint region moves freely through the PTH.
US09106008B2	Electric line wiring structure of plug An electric line wiring structure of a plug includes a plurality of terminals to be inserted into a power supply and electric lines connected to the terminals. The plurality of terminals protrudes on a front side of a plug main body. The electric lines are connected on a rear side of the plug main body. An electric line wiring section for wiring the electric lines connected to the terminals is provided in the plug main body. An electric line holding section for holding the electric lines in a deformed state is provided on a wiring path for wiring the electric lines, which are set in the electric line wiring section. The electric lines are deformed in a direction perpendicular to the wiring path.
US09106001B2	Contact mechanisms for electrical receptacle assemblies An electrical receptacle assembly having an outer body and an inner body. The inner body can include at least one first wall forming a first cavity and at least one resilient element disposed within the cavity proximate to the at least one first wall, where the at least one resilient element has an electrically conductive material. The outer body can be movably disposed within the first cavity, where the outer body can include at least one extension, at least one home slot, and at least one detent positioned between the at least one extension and the at least one home slot, where the at least one extension has the electrically conductive material, and where the at least one detent and the at least one home slot are electrically non-conductive.
US09105992B2	Connector and the method for assembling A connector used for connecting to substrates and including bases and a shaft is provided. The bases are disposed on the substrates individually and include terminals embedded the base. The shaft is pivoted to the bases and includes a first element, a second element stacking with the first element and conductive rings. The second element includes first and second conductive circuits. The first conductive circuits are connected to the second conductive circuit, and each first and each second conductive circuit has a first pad and a second pad on the second element. The conductive rings are sleeved to the shaft, and connected to the first pad and the second pad electrically and individually. When the shaft is rotatably assembled to the bases, the first pads and the second pads are contact with the terminals electrically via the conductive rings and the conductive rings are capable of contacting with the terminals.
US09105987B2	Connection structure A connection structure that includes a region where at least a Cu—Sn intermetallic compound, a M-Sn intermetallic compound and a Cu-M-Sn intermetallic compound (where M is Ni and/or Mn) exist in a cross-section of a connecting part when the cross-section of the connecting part is analyzed with a WDX. Further, the connection structure is configured so that when the cross-section of the connecting part is evenly divided into ten sections in a vertical direction and a lateral direction, respectively, to form 100 segmentalized squares in total, a ratio of the number of squares in which two or more kinds of intermetallic compounds having different constituent elements exist to the number of all the squares, except for squares in which only a Sn-based metal component exists, is 70% or more.
US09105983B2	Method for producing an antenna, operating in a given frequency band, from a dual-band antenna The present invention relates to a method for producing an antenna operating in a given frequency band, from a dual-band antenna. According to the method, the dual-band antenna is a broadband slot antenna that receives and/or transmits electromagnetic signals at a first frequency and at a second higher frequency. The antenna is powered by a single power supply line, and the free end of the power supply line is connected, by a connection means that can be opened or closed, to at least one means for rejecting one of the frequencies. This invention can be used in producing generic electronic boards.
US09105979B2	Metamaterial surfaces An apparatus to modify an incident free space electromagnetic wave includes a block of an artificially structured material having an adjustable spatial distribution of electromagnetic parameters (e.g., ∈, μ, η, σ, and n). A controller applies control signals to dynamically adjust the spatial distribution of electromagnetic parameters in the material to introduce a time-varying path delay d(t) in the modified electromagnetic wave relative to the incident electromagnetic wave.)
US09105978B2	Metamaterial surfaces An apparatus to modify an incident free space electromagnetic wave includes a block of an artificially structured material having an adjustable spatial distribution of electromagnetic parameters (e.g., ∈, μ, η, σ, and n). A controller applies control signals to dynamically adjust the spatial distribution of electromagnetic parameters in the material to introduce a time-varying path delay d (t) in the modified electromagnetic wave relative to the incident electromagnetic wave.
US09105964B2	Airborne satellite communications system A system is provided to establish and maintain a data path between a Local Area Network (LAN) that is mounted on a moving vehicle and a satellite. In combination, an antenna assembly, an Antenna Control Unit (ACU), an Inertial reference Unit (IRU), and a modem are mounted together on the moving vehicle, under the overall control of a services platform. Operationally, the IRU generates parametric values indicative of the spatial attitude and location of the moving vehicle. The ACU then uses the parametric values to aim the antenna in a direction toward the satellite. In this combination, the modem is connected with the antenna to transmit and receive data between the system and the satellite. Individually or collectively, operationally compatible components of the system (IRU, ACU, antenna and modem) can be appropriately substituted to thereby customize the system.
US09105956B2	Laminated waveguide diplexer with shielded signal-coupling structure A laminated waveguide diplexer includes an upper conductive layer having a first slot and a second slot; a first line crossing over the first slot; a first shielding conductor disposed over the first line; a plurality of first conductive pillars connecting the upper conductive layer and the first shielding conductor; a second line crossing over the second slot; a second shielding conductor disposed over the second line; and a plurality of second conductive pillars connecting the upper conductive layer and the second shielding conductor.
US09105955B2	Adjustable resonator filter and method for adjusting coupling between resonator cavities The invention relates to an adjustable resonator filter, which has a casing made up of a bottom, walls and a lid, which casing functions as a ground for a transmission path, which is divided with conductive partitions into resonator cavities, and on the transmission path of the resonator filter there is a coupling opening in the partitions separating subsequent cavities. In the casing there is by at least one partition a coupling space, which is open into both resonator cavities separated by the partition, which resonator filter has an inductive coupling member. This is arranged to extend through said coupling space into both resonator cavities. The inductive coupling member is in electric contact with the casing at least in one of the resonator cavities. In the coupling space there is a moveable conductive adjustment piece, which has a minimum position for the coupling and a maximum position for the coupling.
US09105954B2	Broadband directional coupler The broadband directional coupler is used for measuring the power of a forward and/or a returning high-frequency signal on a line. For this purpose, the broadband directional coupler provides a voltage splitter which is connected to an inner conductor (1) of the line. This voltage splitter provides a first resistor (8) which is connected to an outer conductor of the line. The voltage splitter comprises ohmic resistors, and a first connection of a second resistor (4) is connected to the inner conductor (1) of the line, and a second connection of the second resistor (4) is connected to a first connection of a third resistor (6). A second connection of the third resistor (6) is connected directly or indirectly to a first connection of the first resistor (8) and at the same time to the outer conductor of the line. In this context, a measured voltage is picked up at the second connection of the second resistor (4) or at the first connection of the third resistor (6).
US09105952B2	Waveguide-configuration adapters A waveguide-configuration adapter is provided. The waveguide-configuration adapter includes a horizontal waveguide and a vertical waveguide. The horizontal waveguide includes a first-interface port spanning a first X-Y plane and a first-coupling port spanning a Y-Z plane with a first-coupling-port width parallel to the y axis. The vertical waveguide includes a second-interface port spanning a second X-Y plane and a second-coupling port spanning a third X-Y plane with a second-coupling-port width parallel to the x axis. When an E-field is input at the first/second coupling port in the plane of the first/second coupling port, respectively, and oriented perpendicular to the first/second coupling-port width, respectively, the E-field is output from the second/first coupling port, respectively, in the plane of second/first coupling port, respectively, and oriented perpendicular to the second/first coupling-port width, respectively.
US09105951B2	Thermal management system using a phase-change material for vehicle with electric traction motor A phase-change material is used as part of the thermal management system to assist in maintaining a thermal load, such as a battery pack, within a selected temperature range, thereby reducing the consumption of battery power. The phase-change material may be conditioned to an initial state when the vehicle is on-plug and may be used to heat or cool the battery pack directly or indirectly, thereby reducing the use of an electric battery heater. The phase-change material may be used to heat coolant that flows to the thermal load. In another embodiment the phase-change material may be directly within the battery pack in contact with the cells. The phase-change material may be conditioned via the battery circuit heater when the vehicle is on-plug. The phase-change material may also be recharged during vehicle use off-plug using waste heat from the motor circuit thermal load.
US09105950B2	Battery system having an evaporative cooling member with a plate portion and a method for cooling the battery system A battery system and a method for cooling the battery system are provided. The system includes an evaporative cooling member, and a battery module having a housing, a battery cell, and a solid cooling fin. The housing holds the battery cell therein. The solid cooling fin has first and second panel portions. The first panel portion is disposed against the battery cell. The second panel portion extends through the housing and is disposed on the evaporative cooling member. The solid cooling fin conducts heat energy from the battery cell to the evaporative cooling member. The evaporative cooling member receives a gaseous-liquid refrigerant and transitions the gaseous-liquid refrigerant into a gaseous refrigerant utilizing the heat energy received from the solid cooling fin.
US09105948B2	Battery pack A pouch-type battery pack that includes a bare cell, a protection circuit module and a top case. The bare cell has a plurality of electrode leads extending to the exterior of the bare cell. The protection circuit module is provided with electrode terminals that come in contact with the electrode leads, respectively. The top case is coupled to the bare cell while surrounding the protection circuit module.
US09105947B2	Hydrogen storage alloy for alkaline storage battery, and alkaline storage battery and alkaline storage battery system each including negative electrode having the alloy To provide a hydrogen storage alloy for an alkaline storage battery that improves output power by pulverization of the alloy in the initial stage of partial charge and discharge cycles and that maintains its surface condition to improve the amount of lifetime work (Wh), and an alkaline storage battery and battery system. A hydrogen storage alloy for an alkaline storage battery includes a composition expressed by LaxReyMg1-x-yNin-m-vAlmTv (Re: rare earth element(s) including Y; T: Co, Mn, Zn; 0.17≦x≦0.64, 3.5≦n≦3.8, 0.06≦m≦0.22, v≧0), and a main phase of an A5B19 type crystal structure. A ratio of X/Y of the concentration ratio X of Al to Ni in a surface layer and the concentration ratio Y of Al to Ni in a bulk layer is 0.36≦X/Y≦0.85. An alkaline storage battery includes the hydrogen storage alloy in its negative electrode. An alkaline storage battery system performs partial charge and discharge control.
US09105945B2	Lithium-ion solid battery, and synthesis method and synthesis device thereof The present disclosure relates to a lithium-ion solid battery, and a synthesis method and a synthesis device thereof. The synthesis method comprises a synthesis step for a current collector, a synthesis step for a cathode, a synthesis step for a diaphragm and a synthesis step for an anodee, wherein at least one of the steps is accomplished through on-site spray synthesis, and the on-site spray synthesis comprises a process of spraying a molten lithium metal. In the aforesaid way, the manufacturing process flow of the lithium-ion solid battery can be simplified.
US09105944B2	Nonaqueous electrolyte secondary battery According to one embodiment, a nonaqueous electrolyte secondary battery includes a nonaqueous electrolytic solution, a positive electrode and a negative electrode is provided. The nonaqueous electrolytic solution comprises a nonaqueous solvent. The nonaqueous solvent comprises from 50 to 95% by volume of a sulfone-based compound represented by the following formula 1: wherein R1 and R2 are each an alkyl group having 1 to 6 carbon atoms and satisfy R1≠R2. The positive electrode comprises a composite oxide represented by Li1-xMn1.5-yNi0.5-zMy+zO4. The negative electrode comprises a negative electrode active material being capable of absorbing and releasing lithium at 1 V or more based on a metallic lithium potential.
US09105941B2	Lithium ion conducting material and lithium battery A lithium ion conducting material includes a sulfide-based solid electrolyte material that contains Li, an element that belongs to group 13 to group 15 and S, and that contains an MSx unit, wherein M is an element that belongs to group 13 to group 15, S is a sulfur element, and x is the maximum number of S atoms that can be bonded with M, and an inhibitor that is in contact with the sulfide-based solid electrolyte material and that contains a metal element having an ionization tendency lower than that of hydrogen.
US09105940B2	Electrolyte membrane for lithium battery, lithium battery using the electrolyte membrane, and method of preparing the electrolyte membrane An electrolyte membrane for a lithium battery, the electrolyte membrane including: a matrix including a polymerization product of a (meth)acrylate monomer composition; and a porous metal-organic framework dispersed in the matrix, wherein the metal-organic framework includes a crystalline compound including a metal ion or metal ion cluster which is chemically bound to an organic ligand, and a liquid electrolyte including a lithium salt and a nonaqueous organic solvent.
US09105939B2	Battery with battery electrode and method of manufacturing same The invention provides a battery electrode capable of improving a lifespan characteristic (cycle characteristic at the time of high temperature endurance). The battery electrode has a collector and an active material layer formed on a surface of the collector. The active material layer includes a plurality of binders having different specific gravities. The binders are more present at the collector side of the active material layer.
US09105937B2	Electrode materials for electrical cells The present invention relates to electrode materials for charged electrical cells, comprising at least one polymer comprising polysulfide bridges, and carbon in a polymorph comprising at least 60% sp2-hybridized carbon atoms. The present invention further relates to electrical cells comprising the inventive electrode material, to specific polymers comprising polysulfide bridges, to processes for preparation thereof and to the use of the inventive cells.
US09105936B2	Fuel cell catalyst, method of preparing same, and membrane-electrode assembly for fuel cell and fuel cell system including same A fuel cell catalyst includes a platinum-iron (Pt—Fe) alloy having an ordered or disordered face-centered cubic structure or face-centered tetragonal structure. The face-centered cubic structure has a lattice constant ranging from about 3.820 Å to about 3.899 Å (or from about 3.862 Å to about 3.880 Å), and the face-centered tetragonal structure has a first lattice constant ranging from about 3.800 Å to about 3.880 Å (or from about 3.810 Å to about 3.870 Å) and a second lattice constant ranging from about 3.700 Å to about 3.810 Å (or from about 3.710 Å to about 3.800 Å). A membrane-electrode assembly can improve cell performance by including the above catalyst having the relatively high activity and selectivity for an oxidant reduction in at least one of an anode or a cathode, and can increase lifespan by inhibiting catalyst poisoning.
US09105930B2	Electricity supply system and electricity supply element thereof An electricity supply system and electricity supply element thereof is provided. The electricity supply system is made of a plurality of electricity supply elements by stacking or rolling. Each electricity supply element includes a substrate, two current collector layers and two active material layers. The substrate has a plurality of holes and the current collector layers, the active material layers are disposed on two sides respectively. Therefore, the ion migration is permitted by the holes and the electricity is outputted by the current collector layers. Hence, by this new structure of the electricity supply element, the resistance is decreased.
US09105927B2	Method for preparing cathode active material of lithium battery A method for preparing a spinel type lithium manganese oxide cathode active material, includes providing a number of manganese dioxide hollow spheres and a lithium source powder, mixing the manganese dioxide hollow spheres and the lithium source powder in a liquid medium to achieve a mixture, drying the mixture to remove the liquid medium to achieve a precursor, and sintering the precursor at a sintering temperature of about 600° C. to about 800° C. for about 3 hours to about 10 hours, to achieve a number of spinel type lithium manganese oxide hollow spheres.
US09105925B2	Anode active material comprising a porous transition metal oxide, anode comprising the anode active material, lithium battery comprising the anode, and method of preparing the anode active material An anode active material including a porous transition metal oxide; an anode including the anode active material; a lithium battery including the anode; and a method of preparing the anode active material.
US09105923B2	Zinc anode alkaline electrochemical cells containing bismuth A negative electrode active material for a zinc anode alkaline electrochemical cell includes (i) particles, comprising bismuth, and (ii) powder, comprising zinc. The particles have an average particle size of at most 135 nm.
US09105921B2	Porous amorphous silicon—carbon nanotube composite based electrodes for battery applications Embodiments of the present invention generally relate to methods and apparatus for forming an energy storage device. More particularly, embodiments described herein relate to methods of forming electric batteries and electrochemical capacitors. In one embodiment a method of forming a high surface area electrode for use in an energy storage device is provided. The method comprises forming an amorphous silicon layer on a current collector having a conductive surface, immersing the amorphous silicon layer in an electrolytic solution to form a series of interconnected pores in the amorphous silicon layer, and forming carbon nanotubes within the series of interconnected pores of the amorphous silicon layer.
US09105920B2	Composite anode active material, anode and lithium battery containing the same, and method of preparing the composite anode active material In an aspect, a composite anode active material including: a porous particles, said porous particles including: a plurality of composite nanostructures; and a first carbonaceous material binding the composite nanostructures, wherein the porous particles have pores within the particle, and wherein the composite nanostructures include a crystalline second carbonaceous material substrate including at least one carbon nano-sheet, and a plurality of metal nanowires arranged at intervals on the crystalline second carbonaceous material substrate is disclosed.
US09105918B2	Safety element assembly A safety element assembly is disclosed. The safety element assembly comprises a first thin metal sheet coupled to the secondary battery; a safety element coupled to the first thin metal sheet; and a second thin metal sheet coupled to the safety element, wherein the first thin metal sheet comprises a first region on which the safety element and the second thin metal sheet are stacked, and a second region on which the safety element and the second thin metal sheet are not stacked.
US09105917B2	Fuel cell stack The present invention relates to a fuel cell system, in particular solid oxide fuel cell system (SOFC-System), with several tubular fuel cells, whereby several of these fuel cells respectively have at least one inner electrode, an electrolyte surrounding this/these inner electrode(s) at least in sections and at least one outer electrode surrounding the electrolyte at least in sections, so that the electrolyte spatially separates the inner and the outer electrode(s) from each other, at least two of these fuel cells are located or fixated in or on an electrically conducting carrier and/or contact, which connects—electrically conducting—the inner electrode(s) and/or one/several electrical contact(s) of one/several inner electrode(s) of a first tubular fuel cell or a part of such with the outer electrode(s) and/or one/several electrical contact(s) of one/several outer electrode(s) of a second tubular fuel cell or a part of such, whereby the second tubular fuel cell is preferably located directly adjacent to the first tubular fuel cell or to the part of this fuel cell.
US09105910B2	Electrochemical cell system with shunt current interrupt An electrochemical cell system is configured to utilize an ionically conductive medium flowing through a plurality of electrochemical cells. One or more disperser chambers are provided to disrupt or minimize electrical current flowing between the electrochemical cells, such as between the cathode of one cell and the anode of a subsequent cell by dispersing the ionically conductive medium. Air is introduced into the disperser chamber to prevent the formation of foamed ionically conductive medium, which may reconnect the dispersed ionically conductive medium, allowing the current to again flow therethrough.
US09105909B2	Separator, lithium battery including the separator, and method of preparing the separator A separator for a battery having a porous base material layer and a polymer coating layer formed on at least a surface of the base material layer. The polymer coating layer includes a first fluorinated copolymer and a non-fluorinated polymer. A weight ratio of the first fluorinated copolymer to the non-fluorinated polymer is in a range of 3:1 to 1:3.
US09105907B2	Material for an electrochemical device The present invention relates to a material for an electrochemical device, especially a fuel cell, an electrolyzer or a storage battery, comprising a matrix and activated boron nitride contained in the matrix.
US09105906B2	Separator for rechargeable lithium battery and rechargeable lithium battery including same Disclosed is a separator having surface energy of about 45 mN to about 50 mN/m which can be prepared by radiating plasma on a polymer film under a current of from about 1800 mA to about 2000 mA and electric power of from about 2750 W to about 3000 W. Further disclosed is a rechargeable battery comprising the separator having a surface energy of about 45 mN to about 50 mN/m.
US09105902B2	Device for aiding in the fracture of a vent of an electrochemical cell A device for aiding in the fracture of a vent of an electrochemical cell includes a main body having a first surface and a plurality of lobes extending out from the first surface of the main body such that an open space is provided between adjacent lobes. Each of the plurality of lobes are configured to make contact with the vent during deployment of the vent such that the vent completely separates from a bottom of the electrochemical cell. The open space provided between adjacent lobes is configured to allow gases from inside the electrochemical cell to pass through during deployment of the vent.
US09105891B2	Fuel cell system and control method for fuel cell system A fuel cell system includes a fuel cell of a solid polymer type that generates power by using a hydrogen-containing gas as a fuel gas, a reformer that generates the fuel gas by reforming ammonia, and a supply amount ratio control unit that controls a supply amount ratio of oxygen and ammonia to be supplied the reformer.
US09105888B2	Anode purge and drain valve strategy for fuel cell system A combined water drain and diluent gas purge valve routes fluid from the anode side of a fuel cell to the cathode inlet. When a purge of diluent gas is requested, the valve opens, draining any liquid present in the sump of a water separation device, for example. After the liquid has drained, the diluent gas is purged. An anode bleed model using fuel injector feedback can determine the amount of gas exiting the valve, and can request the valve to close once the required amount of diluent is purged. During operation, an amount of hydrogen may exit the valve. Hydrogen passing through the valve can be catalytically consumed once it reaches the cathode electrode, causing the cathode exhaust, and the fuel cell exhaust to have a reduced hydrogen content.
US09105883B2	Assembling bipolar plates for fuel cells using microencapsulated adhesives The flow field plates in a bipolar plate assembly for a fuel cell can be both bonded and sealed appropriately using microencapsulated adhesives. This offers several advantages over using other adhesives which may have limited pot life and/or require lengthy curing periods at elevated temperature during which time the plates must be stably positioned and under compression.
US09105880B2	Fuel cell system with interconnect The present invention includes a fuel cell system having a plurality of adjacent electrochemical cells formed of an anode layer, a cathode layer spaced apart from the anode layer, and an electrolyte layer disposed between the anode layer and the cathode layer. The fuel cell system also includes at least one interconnect, the interconnect being structured to conduct free electrons between adjacent electrochemical cells. Each interconnect includes a primary conductor embedded within the electrolyte layer and structured to conduct the free electrons.
US09105879B2	Light-emitting element, light-emitting device, and manufacturing method of light-emitting element Provided is a highly reliable light-emitting element in which damage to an EL layer is reduced even when an auxiliary electrode for an upper electrode is provided. Further, a highly reliable light-emitting device in which luminance unevenness is suppressed is provided. The light-emitting element includes a first electrode; an insulating layer over the first electrode; an auxiliary electrode having a projection and a depression on a surface, over the insulating layer; a layer containing a light-emitting organic compound over the first electrode and the auxiliary electrode; and a second electrode over the layer containing the light-emitting organic compound. At least part of the auxiliary electrode is electrically connected to the second electrode.
US09105877B2	Organic light-emitting diode display and method of manufacturing the same An organic light-emitting diode display includes a substrate, a first electrode which is disposed on the substrate, a trench defined in a top surface of the first electrode, and a hole injection layer which is disposed in the trench.
US09105876B2	Method for fabricating organic light emitting diode display device having improved effective emitting area A method of fabricating an organic light emitting diode display device having improved effective emitting area includes forming a first electrode over a substrate including a display region, which includes a plurality of pixel regions; forming the first bank on edges of the first electrode having a first width, and the second bank formed on the first bank having a second width smaller than the first width; forming an organic emitting layer on the first electrode and a portion of the first bank; and forming a second electrode on a organic emitting layer; patterning the second bank material layer to form a bank pattern; patterning the first bank using the bank pattern as an etching mask to form the first bank; and partially etching the bank pattern to form the second bank such that the first bank protrudes from the second bank by a third width.
US09105869B2	Light-emitting device and manufacturing method thereof A light-emitting device which is thin and lightweight and has high flexibility, impact resistance, and reliability is provided. Further, a light-emitting device which is thin and lightweight and has high flexibility, impact resistance, and hermeticity is provided. In the light-emitting device in which a light-emitting region including a transistor and a light-emitting element is sealed between a first flexible substrate and a second flexible substrate, an opening is provided in the second flexible substrate around a region overlapping with the light-emitting region, the opening is filled with frit glass containing low-melting glass and bonding the first flexible substrate and the second flexible substrate, and the fit glass is provided so as to be in contact with an insulating layer provided over the first flexible substrate. The second flexible substrate may include an opening in a region overlapping with the light-emitting region.
US09105862B2	Organic light-emitting display device An organic light-emitting display device, which may be configured to prevent moisture or oxygen from penetrating the organic light-emitting display device from the outside is disclosed. An organic light-emitting display device, which is easily applied to a large display device and/or may be easily mass produced is further disclosed. An organic light-emitting display device may include, for example, a thin-film transistor (TFT) including a gate electrode, an active layer insulated from the gate electrode, source and drain electrodes insulated from the gate electrode and contacting the active layer and an insulating layer disposed between the source and drain electrodes and the active layer; and an organic light-emitting diode electrically connected to the TFT. The insulating layer may include, for example, a first insulating layer contacting the active layer; and a second insulating layer formed of a metal oxide and disposed on the first insulating layer.
US09105859B2	Device material for hole injection transport layer, ink for forming hole injection transport layer, device comprising hole injection transport layer, and method for producing the device Disclosed is a device material for a hole injection transport layer. A fluorine-containing organic compound is attached to an organic-transition metal oxide composite which is a reaction product of an organotransition metal complex. Also disclosed are a device and an ink for a hole injection transport layer, the device and ink including the device material each, and a method for producing the device.
US09105857B2	Organic electroluminescent element, lighting fixture, and food storage device The object of the present invention is to provide an organic electroluminescent element suitable for both food lighting at a high temperature and indoor lighting at room temperature. The organic electroluminescent element according to the present invention has such characteristics that: an element temperature at which a general color rendering index Ra has its maximum in an element temperature range of 5° C. to 60° C. is present in a range of 15° C. to 35° C.; and an element temperature at which at least one of a color rendering index R8 a special color rendering index R9, a special color rendering index R14, and a special color rendering index R15 has its maximum in the element temperature range of 5° C. to 60° C. is in a range of temperatures higher than the element temperature at which the general color rendering index Ra has its maximum.
US09105849B2	Deposition mask and mask assembly having the same A deposition mask assembly having a plurality of deposition masks consecutively arranged in parallel is discussed. The deposition mask has a frame coupled with the plurality of deposition masks, wherein cross section of one end of each deposition mask having first and second sectors which are asymmetric and meet each other at a first contact point, wherein the first sector has a first radius and a first center angle, and connected to an upper surface of the deposition mask, the second sector has a second radius different from the first radius and a second center angle different from the first center angle, and connected to a lower surface of the deposition mask, and the contact point is asymmetric, pointed and protruded horn-shaped or arrow-shaped.
US09105848B2	Composite organic materials and applications thereof The present invention provides composite organics and optoelectronic devices, including photovoltaic devices, comprising the same. In one embodiment, the present invention provides a photovoltaic cell comprising a radiation transmissive first electrode, a photosensitive layer electrically connected to the first electrode, the photosensitive layer comprising a plurality of composite organic layers, wherein each of the plurality of composite organic layers comprises a polymeric phase and a nanoparticle phase, the nanoparticle phase comprising at least one exaggerated nanocrystalline grain.
US09105847B2	Organic EL display and method of manufacturing the same An organic EL display includes: lower electrodes arranged on a substrate to correspond to first organic EL elements of blue and second organic EL elements of any other color, respectively; hole injection/transport layers arranged on the lower electrodes; second organic light-emitting layers of the other color arranged on the hole injection/transport layers for the second organic EL elements; a first organic light-emitting layer of blue arranged on whole surfaces of the second organic light-emitting layers and the hole injection/transport layers for the first organic EL elements; an electron injection/transport layer arranged on a whole surface of the first light-emitting layer, the electron injection/transport layer made of a nitrogen-containing heterocyclic compound with an electron mobility of 1.0×10−6 cm2/Vs to 1.0×10−1 cm2/Vs both inclusive and having one or both of electron injection properties and electron transport properties; and an upper electrode arranged on the electron injection/transport layer.
US09105845B2	Piezoelectric ceramic comprising an oxide and piezoelectric device A piezoelectric ceramic with environmental friendliness including a composition as the main component composed of a composite oxide free from lead (Pb) as a constituent element, and with excellent piezoelectric characteristics such as the relative dielectric constant, the electromechanical coupling factor, and the piezoelectric constant, and a piezoelectric device using the piezoelectric ceramic, are provided. A piezoelectric ceramic including a composition represented by the following general formula as the main component: (K1-x-y-w-vNaxLiyBawSrv)m(Nb1-z-uTaz-Zru)O3 (wherein, x, y, z, w, v, u and m in the formula satisfy the following conditions respectively: 0.4
US09105843B2	Multilevel mixed valence oxide (MVO) memory Various embodiments include a memory device and methods of forming the same. The memory device can include an electrode coupled to one or more memory elements, to store information. The electrode may comprise a number of metals, where a first one of the metals has a Gibbs free energy for oxide formation lower than the Gibbs free energy of oxidation of a second one of the metals.
US09105840B2	Electronic device and method for fabricating the same According to embodiments, a semiconductor memory may include: a variable resistance pattern disposed over a substrate and extended in a first direction; first and second structures including a plurality of interlayer dielectric layers and a plurality of conductive layers which are alternately stacked over the substrate, and contacted with one side surface and the other side surface of the variable resistance pattern, respectively, wherein the first stacked structure has a line shape extended in a first direction and the second stacked structure has a pillar shape; and a pillar-shaped conductive pattern contacted with one side surface of the second stacked structure, which is not contacted with the variable resistance pattern.
US09105836B2	Enhanced bandwidth transducer for well integrity measurement A single critically damped acoustic stack yields a wide frequency range as an acoustic transmitter or as an acoustic transducer having particular use in well integrity determination. The critically damped present acoustic stack utilizes a plurality of stacked acoustic elements such as piezoelectric ceramics that are energized in two manners, providing different center frequencies; each producing a respective center frequency of 100% bandwidth to yield an acoustic stack having a total bandwidth exceeding the bandwidth of an acoustic element or the bandwidth of the plurality of acoustic elements. One manner of energizing is to pulse only one of the acoustic elements. The other manner is to pulse a first acoustic element the pulse a second acoustic element after a delay equal to the amount of time it takes for the first pulse to reach the face of the second acoustic element. The acoustic elements are bonded together and onto a critically damped backing of tungsten. The assembly is retained in a housing that is preferably made of PEEK. The acoustic stack is primarily used in pulse-echo analysis of metal casing wall thickness and cement bond quality detection of wells.
US09105835B2	Air-coupled ultrasonic sensor An air-coupled ultrasonic sensor capable of changing setting of an output sound pressure or an ultrasonic wave propagation distance depending on a use application, an installation site, or the like, with a simple structure. An air-coupled ultrasonic sensor includes: a closed-end cylindrical case including an opening portion at one end in its axial direction and a bottom surface at another end; a piezoelectric oscillator firmly fixed onto an inner bottom surface of the closed-end cylindrical case; an open-end cylindrical case including opening portions at both ends in its axial direction; and a thin film firmly fixed on one of the opening portions at one end of the open-end cylindrical case. The open-end cylindrical case is fitted to the closed-end cylindrical case, and includes a structure capable of moving along a side wall of the closed-end cylindrical case.
US09105834B2	Piezoelectric actuated device, method and system A piezoelectric actuated device includes one or more areas of piezoelectric material coupled to a substrate. The piezoelectric material may be placed on regions of the substrate that exhibit the greatest curvature and stress when the device is vibrating according to a desired structural Eigenmode of vibration. The piezoelectric material may have a non-uniform density.
US09105817B2	Molded chip fabrication method and apparatus A method and apparatus for coating a plurality of semiconductor devices that is particularly adapted to coating LEDs with a coating material containing conversion particles. One method according to the invention comprises providing a mold with a formation cavity. A plurality of semiconductor devices are mounted within the mold formation cavity and a curable coating material is injected or otherwise introduced into the mold to fill the mold formation cavity and at least partially cover the semiconductor devices. The coating material is cured so that the semiconductor devices are at least partially embedded in the cured coating material. The cured coating material with the embedded semiconductor devices is removed from the formation cavity. The semiconductor devices are separated so that each is at least partially covered by a layer of the cured coating material. One embodiment of an apparatus according to the invention for coating a plurality of semiconductor devices comprises a mold housing having a formation cavity arranged to hold semiconductor devices. The formation cavity is also arranged so that a curable coating material can be injected into and fills the formation cavity to at least partially covering the semiconductor devices.
US09105815B2	LEDs with efficient electrode structures Aspects include Light Emitting Diodes that have a GaN-based light emitting region and a metallic electrode. The metallic electrode can be physically separated from the GaN-based light emitted region by a layer of porous dielectric, which provides a reflecting region between at least a portion of the metallic electrode and the GaN-based light emitting region.
US09105814B2	Light emitting diode and method of the same A light emitting diode and a method of the same are provided. The light emitting diode includes a substrate with a first region and a second region, a first semiconductor layer, a light-emitting layer, and a second semiconductor layer. The light emitting diode further includes a plurality of vias, a first metal layer, a second metal layer, and a patterned passivation layer interposed between the second semiconductor layer and the first metal layer. The plurality of vias are located in the first region and penetrate through the second semiconductor layer and the light-emitting layer to expose part of the first semiconductor layer. The first metal layer is located in the first region, and electrically contacted with the first semiconductor layer through the plurality of vias. The second metal layer is located in the second region, and electrically contacted with the second semiconductor layer and electrically insulated from the first metal layer. The patterned passivation layer is configured to electrically isolate the first metal layer from the second semiconductor layer and the light-emitting layer.
US09105813B1	Micro-light-emitting diode A micro-light-emitting diode (micro-LED) includes a first type semiconductor layer, a second type semiconductor, a first dielectric layer, and a first electrode. The second type semiconductor layer is disposed on or above the first type semiconductor layer. The first dielectric layer is disposed on the second type semiconductor layer. The first dielectric layer has at least one opening therein to expose at least one part of the second type semiconductor layer. A first shortest distance between an edge of the opening of the first dielectric layer and a side surface of the second type semiconductor layer is greater than or equal to 1 μm. The first electrode is partially disposed on the first dielectric layer and is electrically coupled with the exposed part of the second type semiconductor layer through the opening of the first dielectric layer.
US09105810B2	Semiconductor light emitting device According to one embodiment, a semiconductor light emitting device includes a first semiconductor layer, a light emitting unit, a second semiconductor layer, a reflecting electrode, an oxide layer and a nitrogen-containing layer. The first semiconductor layer is of a first conductivity type. The light emitting unit is provided on the first semiconductor layer. The second semiconductor layer is provided on the light emitting unit and is of a second conductivity type. The reflecting electrode is provided on the second semiconductor layer and includes Ag. The oxide layer is provided on the reflecting electrode. The oxide layer is insulative and has a first opening. The nitrogen-containing layer is provided on the oxide layer. The nitrogen-containing layer is insulative and has a second opening communicating with the first opening.
US09105807B2	Semiconductor optical emitting device with grooved substrate providing multiple angled light emission paths A semiconductor optical emitting device comprises an at least partially transparent substrate and an active semiconductor structure arranged on a first side of the substrate. A first portion of light generated by the active semiconductor structure is emitted through the substrate from the first side of the substrate to a second side of the substrate along a primary light emission path. The second side of the substrate has a groove formed therein with at least first and second surfaces configured to reflect respective additional portions of the light generated by the active semiconductor structure along respective first and second angled light emission paths. The first and second angled light emission paths may be in opposite directions to one another and substantially perpendicular to the primary light emission path, although numerous other light emission path arrangements are possible.
US09105804B2	Method for manufacturing light-receiving device and light-receiving device A method for manufacturing a light-receiving device includes the steps of forming a stacked semiconductor layer including a non-doped light-receiving layer, the light-receiving layer having an n-type conductivity; forming a selective growth mask made of an insulating film on the stacked semiconductor layer, the selective growth mask having a pattern including a plurality of openings; selectively growing a selective growth layer doped with a p-type impurity on each portion of the stacked semiconductor layer by using the selective growth mask; and forming a p-n junction in each of plural regions of the light-receiving layer by diffusing the p-type impurity doped in each selective growth layer into the light-receiving layer during growing the selective growth layers. Each of the regions including one of the p-n junctions corresponds to one of the selective growth layers. The p-n junction in one of the regions is formed separately from the p-n junctions in the other regions.
US09105802B2	Methods of making photovoltaic devices A method of making a photovoltaic device is presented. The method includes disposing an absorber layer on a window layer. The method further includes treating at least a portion of the absorber layer with a first solution including a first metal salt to form a first component, wherein the first metal salt comprises a first metal selected from the group consisting of manganese, cobalt, chromium, zinc, indium, tungsten, molybdenum, and combinations thereof. The method further includes treating at least a portion of the first component with cadmium chloride to form a second component. The method further includes treating at least a portion of the second component with a second solution including a second metal salt to form an interfacial layer on the second component, wherein the second metal salt comprises a second metal selected from the group consisting of manganese, cobalt, nickel, zinc, and combinations thereof.
US09105798B2	Preparation of CIGS absorber layers using coated semiconductor nanoparticle and nanowire networks A method of preparing Cu(In,Ga)SSe2 Cu(In,Ga) (S,Se)2 (CIGSS) absorber layers uses coated semiconductor nanoparticle and nanowire networks. The nanoparticles and nanowires containing one or more elements from group IB and/or IIIA and/or VIA are prepared from metal salts such as metal chloride and acetate at room temperature without inert gas protection. A uniform and non-aggregation CIGS precursor layer is fabricated with the formation of nanoparticle and nanowire networks utilizing ultrasonic spaying technique. High quality CIGSS film is obtained by cleaning the residue salts and carbon agents at an increased temperature and selenizing the pretreated precursor layer.
US09105797B2	Liquid precursor inks for deposition of In—Se, Ga—Se and In—Ga—Se An ink includes a solution of selenium in ethylene diamine solvent and a solution of at least one metal salt selected from the group consisting of an indium salt or a gallium salt in at least one solvent including an organic amide. The organic amide can include dimethylformamide. The organic amide can include N-methylpyrrolidone.
US09105793B2	Graphene device and method of using graphene device An embodiment of a graphene device includes a layered structure, first and second electrodes, and a dopant island. The layered structure includes a conductive layer, an insulating layer, and a graphene layer. The electrodes are coupled to the graphene layer. The dopant island is coupled to an exposed surface of the graphene layer between the electrodes. An embodiment of a method of using a graphene device includes providing the graphene device. A voltage is applied to the conductive layer of the graphene device. Another embodiment of a method of using a graphene device includes providing the graphene device without the dopant island. A dopant island is placed on an exposed surface of the graphene layer between the electrodes. A voltage is applied to the conductive layer of the graphene device. A response of the dopant island to the voltage is observed.
US09105789B2	Geiger-mode avalanche photodiode with high signal-to-noise ratio, and corresponding manufacturing process An embodiment of a geiger-mode avalanche photodiode includes: a body of semiconductor material, having a first surface and a second surface; a cathode region of a first type of conductivity, which extends within the body; and an anode region of a second type of conductivity, which extends within the cathode region and faces the first surface, the anode and cathode regions defining a junction. The anode region includes at least two subregions, which extend at a distance apart within the cathode region starting from the first surface, and delimit at least one gap housing a portion of the cathode region, the maximum width of the gap and the levels of doping of the two subregions and of the cathode region being such that, by biasing the junction at a breakdown voltage, a first depleted region occupies completely the portion of the cathode region within the gap.
US09105787B2	Techniques for enhancing efficiency of photovoltaic devices using high-aspect-ratio nanostructures Photovoltaic devices and techniques for enhancing efficiency thereof are provided. In one aspect, a photovoltaic device is provided. The photovoltaic device comprises a photocell having a photoactive layer and a non-photoactive layer adjacent to the photoactive layer so as to form a heterojunction between the photoactive layer and the non-photoactive layer; and a plurality of high-aspect-ratio nanostructures on one or more surfaces of the photoactive layer. The plurality of high-aspect-ratio nanostructures are configured to act as a scattering media for incident light. The plurality of high-aspect-ratio nanostructures can also be configured to create an optical resonance effect in the incident light.
US09105786B2	Thermal treatment of silicon wafers useful for photovoltaic applications Efficiency of silicon photovoltaic solar cells is increased by an annealing process for immobilizing oxygen formed in Czochralski-grown silicon. The annealing process includes a short anneal in a rapid thermal annealing chamber at a high temperature, for example, greater than 1150° C. in an oxygen-containing ambient. More preferably, the wafer is rapidly cooled to less than 950° C. without an intermediate temperature hold, at which temperature oxygen does not nucleate and/or precipitate. Subsequent processing to form a photovoltaic structure is typically performed at relatively low temperatures of less than 1000° C. or even 875° C.
US09105775B2	Textured multi-junction solar cell and fabrication method A multi-junction photovoltaic device includes a germanium layer having pyramidal shapes with (111) facets exposed to form a textured surface. A first p-n junction is formed on or over the textured surface. Another p-n junction is formed over the first p-n junction and following the textured surface.
US09105774B2	Manufacturing method of solid-state imaging device and solid-state imaging device A manufacturing method of a solid-state imaging device includes: preparing a photoelectric conversion device; forming an insulating layer on a surface of the photoelectric conversion device; forming a wire-grid polarizer on a support base; bonding a forming surface of the wire-grid polarizer on the support base to the insulating layer on the surface of the photoelectric conversion device and removing the support base from the wire-grid polarizer.
US09105773B2	Photo-detector with wavelength converter The invention relates to a photo-detector comprising a light sensitive element (101) and a wavelength converter (103) arranged in front of the light sensitive element, the wavelength converter being configured to convert light of a first wavelength into light of a second wavelength and to direct the light of the second wavelength to the light sensitive element. The advantage is that a stable reading across the entire visible spectrum may be provided.
US09105772B2	In-line germanium avalanche photodetector A method for manufacturing a photodetector including growing a quantity of germanium within an optical pathway of a waveguide. The detection of a current caused by an interaction between the optical signal and the germanium is used to indicate the presence of an optical signal passing through the waveguide.
US09105768B2	Lead free solar cell contacts Formulations and methods of making solar cells are disclosed. In general, the invention presents a solar cell contact made from a mixture wherein the mixture comprises a solids portion and an organics portion, wherein the solids portion comprises from about 85 to about 99 wt % of a metal component, and from about 1 to about 15 wt % of a lead-free glass component. Both front contacts and back contacts arc disclosed.
US09105765B2	Smart junction box for a photovoltaic system A method and apparatus for a smart junction box including: a first set of switches connected across input terminals adapted for connection to output terminals of a plurality of photovoltaic (PV) modules, a plurality of diodes connected across input terminals of each respective switch in the first set of switches, at least one reverse current detection device on at least one output terminal of the smart junction box, a second set of switches to selectively disconnect and short circuit output terminals of the smart junction box when a reverse current is detected, and wherein at least one switch of the second set of switches is located across the output terminals, a controller for controlling the first and second set of switches.
US09105764B2	Light emitting device and projector A light emitting device includes a first layer that generates light by injection current and forms a waveguide for the light, and an electrode that injects the current into the first layer, wherein the waveguide has a first region, a second region, and a third region, the first region and the second region connect at a first reflection part, the first region and the third region connect at a second reflection part, the second region and the third region extend to an output surface, a longitudinal direction of the first region is parallel to the output surface, and a first light output from the second region at the output surface and a second light output from the third region at the output surface are output in parallel to one another.
US09105763B2	Light emitting diode chip and manufacturing method thereof A light emitting diode (LED) chip includes an N-type semiconductor layer, a compensation layer arranged on the N-type semiconductor layer, an active layer arranged on the compensation layer; and a P-type semiconductor layer arranged on the active layer. During growth of the compensation layer, atoms of an element (i.e., Al) of the compensation layer move to fill epitaxial defects in the N-type semiconductor layer, wherein the epitaxial defects are formed due to lattice mismatch when growing the N-type semiconductor. A method for manufacturing the chip is also disclosed. The compensation layer is made of a compound having a composition of AlxGa1-xN.
US09105759B2	Capacitive device and method of making the same A capacitive device includes a well, a first dielectric layer, a first conductive layer, a cap dielectric layer, and a first electrode. The well includes a first shoulder portion having an upper surface, a second shoulder portion having an upper surface, and a first trench, sandwiched between the first and second shoulder portions, having sidewalls and a bottom surfaces. The first dielectric layer is lined along at least a portion of the upper surfaces of the first and second shoulder portions, the sidewalls of the first trench, and the bottom surface of the first trench. The first conductive layer is lined along the first dielectric layer. The cap dielectric layer is over the well, the first dielectric layer, and the first conductive layer. The first electrode is in contact with the first shoulder portion.
US09105756B2	Silicon carbide substrate, semiconductor device, and methods for manufacturing them A silicon carbide substrate capable of reducing on-resistance and improving yield of semiconductor devices is made of single-crystal silicon carbide, and sulfur atoms are present in one main surface at a ratio of not less than 60×1010 atoms/cm2 and not more than 2000×1010 atoms/cm2, and oxygen atoms are present in the one main surface at a ratio of not less than 3 at % and not more than 30 at %.
US09105753B2	Semiconductor physical quantity sensor and method for manufacturing the same A semiconductor physical quantity sensor includes (i) a semiconductor substrate having a first conductive type, (ii) a diaphragm portion disposed in the semiconductor substrate, (iii) a sensing portion disposed in the diaphragm portion, (iv) a well layer having a second conductive type, and (v) a back flow prevention element. The well layer is disposed in a surface portion of the semiconductor substrate, and corresponds to the diaphragm portion. The back flow prevention element is provided by a MOSFET, a JFET, a MESFET, or a HEMT. The back flow prevention element includes two second conductive diffused portions and a gate electrode. The back flow prevention element is arranged on a first electrical wiring, which provides a passage for applying a predetermined voltage to the well layer from an external circuit. The back flow prevention element turns on based on a voltage applied to the gate electrode.
US09105751B2	Integrated semiconductor devices with single crystalline beam, methods of manufacture and design structure Bulk acoustic wave filters and/or bulk acoustic resonators integrated with CMOS devices, methods of manufacture and design structure are provided. The method includes forming a single crystalline beam from a silicon layer on an insulator. The method further includes providing a coating of insulator material over the single crystalline beam. The method further includes forming a via through the insulator material exposing a wafer underlying the insulator. The insulator material remains over the single crystalline beam. The method further includes providing a sacrificial material in the via and over the insulator material. The method further includes providing a lid on the sacrificial material. The method further includes venting, through the lid, the sacrificial material and a portion of the wafer under the single crystalline beam to form an upper cavity above the single crystalline beam and a lower cavity in the wafer, below the single crystalline beam.
US09105746B2	Method for manufacturing a field effect transistor of a non-planar type A method for manufacturing a field effect transistor of a non-planar type, comprising providing a substrate having an initially planar front main surface, and providing shallow trench isolation structures in the substrate on the front surface, thereby defining a plurality of fin structures in the substrate between the shallow trench isolation structures. Top surfaces of the shallow trench isolation structures and the fin structures abut on a common planar surface, and sidewalls of the fin structures are fully concealed by the shallow trench isolation structures. The method also includes forming a dummy gate structure over a central portion of the plurality of fin structures on the common planar surface, forming dielectric spacer structures around the dummy gate structure, and removing the dummy gate structure, thereby leaving a gate trench defined by the dielectric spacer structures. Further, the method includes removing an upper portion of at least two shallow trench isolation structures to expose at least a portion of the sidewalls of the fin structures within the gate trench, and forming a final gate stack in the gate trench.
US09105740B2	SONOS type stacks for nonvolatile changetrap memory devices and methods to form the same A method for fabricating a nonvolatile charge trap memory device is described. The method includes forming a first oxide layer on a surface of a substrate. The first oxide layer is exposed to a first decoupled plasma nitridation process having a first bias. Subsequently, a charge-trapping layer is formed on the first oxide layer. The charge-trapping layer is exposed to an oxidation process and then to a second decoupled plasma nitridation process having a second, different, bias.
US09105736B2	Three-dimensional nonvolatile memory devices including interposed floating gates Provided are three-dimensional nonvolatile memory devices and methods of fabricating the same. The memory devices include semiconductor pillars penetrating interlayer insulating layers and conductive layers alternately stacked on a substrate and electrically connected to the substrate and floating gates selectively interposed between the semiconductor pillars and the conductive layers. The floating gates are formed in recesses in the conductive layers.
US09105730B2	Thin film transistor and fabrication method thereof A thin film transistor and a fabrication method thereof are provided. A metal patterning layer is formed on the metal oxide semiconductor layer of a thin film transistor to shield the metal oxide semiconductor layer from the water, oxygen and light in the environment.
US09105724B2	Field effect transistor structure having one or more fins A field effect transistor (FET) having one or more fins provides an extended current path as compared to conventional finFETs. A raised source terminal is disposed on a fin adjacent to a sidewall spacer of a gate structure. The drain terminal and a first portion of the gate structure overlie a first well of a first conductivity type. A raised drain terminal is disposed such that it is spaced apart from the gate structure sidewalls. In some embodiments the drain terminal is disposed on a second, separate fin. the drain terminal and a second portion of the gate structure overlie a second well of a second conductivity type.
US09105716B2	Semiconductor device A semiconductor device includes: a first semiconductor layer of a first conductivity type; a second semiconductor layer of the first conductivity type provided on a main surface of the first semiconductor layer and having a lower impurity concentration than that of the first semiconductor layer; a third semiconductor layer of a second conductivity type provided on the second semiconductor layer; a fourth semiconductor layer of the first conductivity type selectively provided on the third semiconductor layer; a gate electrode provided in a trench passing through the third semiconductor layer and reaching the second semiconductor layer; a first main electrode contacting the fourth semiconductor layer and contacting the third semiconductor layer through a contact groove provided to pass through the fourth semiconductor layer between the contiguous gate electrodes; a second main electrode provided on an opposite surface to the main surface of the first semiconductor layer; and a fifth semiconductor layer of the second conductivity type provided in an interior portion of the second semiconductor layer corresponding to a part under the contact groove. An uppermost portion of the fifth semiconductor layer contacts the third semiconductor layer, a lowermost portion of the fifth semiconductor layer has a higher impurity concentration than that of the other portion in the fifth semiconductor layer and is located in the second semiconductor layer and not contacting the first semiconductor layer, and the fifth semiconductor layer is narrower from the uppermost portion to the lower most portion.
US09105710B2	Wafer dicing method for improving die packaging quality In embodiments, a hybrid wafer or substrate dicing process involving an initial laser scribe and subsequent plasma etch is implemented for die singulation while also removing an oxidation layer from metal bumps on the wafer. In one embodiment, a method includes forming a mask over the semiconductor wafer covering the plurality of ICs, the plurality of ICs including metal bumps or pads with an oxidation layer. The method includes patterning the mask with a laser scribing process to provide a patterned mask with gaps, exposing regions of the semiconductor wafer between the ICs. The method includes plasma etching the semiconductor wafer through the gaps in the patterned mask to singulate the plurality of ICs and remove the oxidation layer from the metal bumps or pads.
US09105709B2	Semiconductor device and method for manufacturing the same A semiconductor device according to the present embodiment includes a semiconductor substrate having a first n-type silicon carbide layer and a second n-type silicon carbide layer, a first p-type impurity region formed in the n-type silicon carbide layer, a first n-type impurity region of 4H-SiC structure formed in the n-type silicon carbide layer, a second n-type impurity region of 3C-SiC structure formed in the n-type silicon carbide layer having a depth shallower than the first n-type impurity region, a gate insulating film, a gate electrode formed on the gate insulating film, and a metallic silicide layer formed above the first n-type impurity region and having a bottom portion and a side surface portion such that the second n-type impurity region is sandwiched between the first n-type impurity region and at least the side surface portion.
US09105701B2	Semiconductor devices having compact footprints Semiconductor devices and methods for making semiconductor devices are disclosed herein. A semiconductor device configured in accordance with a particular embodiment includes a substrate having a source/drain region, an interconnect, and first and second electrodes extending between first and second sides of the substrate. The first electrode includes a first contact pad and a via extending through the substrate that connects the first contact pad with the interconnect. The second electrode includes a second contact pad and a conductive feature in the substrate that connects the second contact pad with the interconnect.
US09105697B2	Trench formation using rounded hard mask A method embodiment includes forming a hard mask over a dielectric layer, patterning the hard mask to form an opening, forming a passivation layer on sidewalls of the opening, and forming a trench in the dielectric layer by extending the opening into the dielectric layer using an etching process. The sidewalls of the opening are etched to form a rounded profile in the hard mask and a substantially perpendicular profile in the dielectric layer.
US09105694B2	Method for fabricating semiconductor device A method for making a semiconductor device includes forming a trench in a first layer on a substrate. A conductive layer having a pattern is formed in the trench. A first metal gate electrode is formed on the conductive layer, and a second metal gate electrode is formed on the first metal gate electrode. The first and second metal gate electrodes at least partially conform to the pattern of the conductive layer. Widths of first surfaces of the first and second metal gate electrodes are different from respective widths of second surfaces of the first and second metal gate electrodes as a result of the pattern.
US09105692B2	Method of fabricating an interconnection structure in a CMOS comprising a step of forming a dummy electrode A method for fabricating an interconnection structure in a complementary metal-oxide-semiconductor (CMOS) includes forming an opening in a dielectric layer over a substrate and forming a dummy electrode in a first portion of the opening in the dielectric layer. The method further includes filling a second portion of the opening with a second work-function metal layer, wherein a top surface of the second work-function metal layer is below a top surface of the opening and removing the dummy electrode. The method further includes depositing a first work-function metal layer in the first and second portions, whereby the first work-function metal layer is over the second work-function metal layer in the opening and depositing a signal metal layer over the first work-function metal layer in the first and second portions.
US09105690B2	Process for manufacturing a semiconductor wafer having SOI-insulated wells and semiconductor wafer thereby manufactured A process for manufacturing a semiconductor wafer including SOI-insulation wells includes forming, in a die region of a semiconductor body, buried cavities and semiconductor structural elements, which traverse the buried cavities and are distributed in the die region. The process moreover includes the step of oxidizing selectively first adjacent semiconductor structural elements, arranged inside a closed region, and preventing oxidation of second semiconductor structural elements outside the closed region, so as to form a die buried dielectric layer selectively inside the closed region.
US09105688B2	Process for forming a crack in a material A process for forming a layer (26) of semiconductor material from a substrate (20), or donor substrate, made of the same semiconductor material is described, comprising: formation in said donor substrate of a high lithium concentration zone (22), with a concentration between 5×1018 atoms/cm3 and 5×1020 atoms/cm3, then a hydrogen implantation (24) in the donor substrate, in, or in the vicinity of, the high lithium concentration zone, application of a stiffener (19) with the donor substrate, application of a thermal budget to result in the detachment of the layer (34) defined by the implantation.
US09105685B2	Method of forming shallow trench isolation structure A method of forming a shallow trench isolation structure is disclosed. Hard mask patterns are formed on a substrate. A portion of the substrate is removed, using the hard mask patterns as a mask, to form first trenches in the substrate, wherein a fin is disposed between the neighboring first trenches. A filling layer is formed in the first trenches. A patterned mask layer is formed on the filling layer. A portion of the filling layer and a portion of the fins are removed, using the patterned mask layer as a mask, to form second trenches in the substrate. A first insulating layer is formed on the substrate filling in the second trenches.
US09105682B2	Semiconductor component with improved dynamic behavior Disclosed is a semiconductor component that includes a semiconductor body, a first emitter region of a first conductivity type in the semiconductor body, a second emitter region of a second conductivity type spaced apart from the first emitter region in a vertical direction of the semiconductor body, a base region of one conductivity type arranged between the first emitter region and the second emitter region, and at least two higher doped regions of the same conductivity type as the base region and arranged in the base region. The at least two higher doped regions are spaced apart from one another in a lateral direction of the semiconductor body and separated from one another only by sections of the base region.
US09105677B2	Base profile of self-aligned bipolar transistors for power amplifier applications According to a bipolar transistor structure having a transistor top and a transistor bottom herein, a silicon substrate located at the transistor bottom has a collector region of a first conductivity type. An epitaxial base layer of a second conductivity type overlies, relative to the transistor top and bottom, a portion of the collector region. The epitaxial base layer has a bottom surface on the silicon substrate and a top surface opposite the bottom surface. A top region, relative to the transistor top and bottom, of the epitaxial base layer comprises a concentration of germanium having atomic compositions sufficient to avoid impacting transistor parameters, and sufficient to be resistant to selective chemical etching. A silicon emitter layer of the first conductivity type overlies, relative to the transistor top and bottom, a portion of the epitaxial base layer adjacent to the top surface of the epitaxial base layer.
US09105673B2	Side opening unified pod A substrate processing system including a processing section arranged to hold a processing atmosphere therein, a carrier having a shell forming an internal volume for holding at least one substrate for transport to the processing section, the shell being configured to allow the internal volume to be pumped down to a predetermined vacuum pressure that is different than an exterior atmosphere outside the substrate processing system, and a load port communicably connected to the processing section to isolate the processing atmosphere from the exterior atmosphere, the load port being configured to couple with the carrier to pump down the internal volume of the carrier and to communicably connect the carrier to the processing section, for loading the substrate into the processing section through the load port.
US09105672B2	Heat treatment apparatus A heat treatment apparatus for performing heat treatment of processing objects at a time without changing the interior configuration of a conventional clean room even when the processing objects are large-sized. The heat treatment apparatus is installed in a clean room. The heat treatment apparatus includes: a heat treatment furnace including a vertical processing chamber having a furnace opening at the top and adapted to house and heat-treat processing objects, a heat insulator that surrounds the circumference of the processing chamber, and a heater provided on the inner peripheral surface of the heat insulator; a lid for closing the furnace opening of the processing chamber; and a holding tool, hung via a heat-retaining cylinder from the lid, for holding the processing objects in multiple stages. The heat treatment furnace of the heat treatment apparatus, for the most part in the height direction, lies beneath the floor of the clean room.
US09105670B2	Magnetic tunnel junction structure A method comprises forming a trench in a substrate. The method also comprises depositing a magnetic tunnel junction (MTJ) structure within the trench. The method further comprises planarizing the MTJ.
US09105667B2	Semiconductor device having polysilicon mask layer A semiconductor device includes a first semiconductor layer, a second semiconductor layer and a third semiconductor layer. The second semiconductor layer is formed over the first semiconductor layer and includes a recess in a vertical direction towards the first semiconductor layer. The third semiconductor layer is formed in the recess of the second semiconductor layer and includes a seam or void in the recess.
US09105663B1	FinFET with silicon germanium stressor and method of forming The present disclosure generally provides for a method of forming a FinFET with a silicon germanium (SiGe) stressor, in addition to a FinFET structure obtained from embodiments of the method. The method can include forming a semiconductor fin on a buried insulator layer; forming a gate structure on the semiconductor fin; forming a silicon germanium (SiGe) layer on the buried insulator layer, wherein the SiGe layer contacts the semiconductor fin; and heating the SiGe layer, wherein the heating diffuses germanium (Ge) into the semiconductor fin.
US09105661B2	Fin field effect transistor gate oxide The present disclosure provides for methods of fabricating a semiconductor device and such a device. A method includes providing a substrate including at least two isolation features, forming a fin substrate above the substrate and between the at least two isolation features, forming a silicon liner over the fin substrate, and oxidizing the silicon liner to form a silicon oxide liner over the fin substrate.
US09105656B2	High voltage device and manufacturing method thereof The present invention discloses a high voltage device and a manufacturing method thereof. The high voltage device includes: a first conductive type substrate in which isolation regions are formed for defining a device region; agate formed on the first conductive type substrate; a source and a drain formed in the device region and located at both sides of the gate respectively, and doped with second conductive type impurities; a second conductive type well, which is formed in the first conductive type substrate, and surrounds the drain from top view; and a first deep trench isolation structure, which is formed in the first conductive type substrate, and is located in the second conductive type well between the source and the drain from top view, wherein the depth of the first deep trench isolation structure is deeper than the second conductive type well from the cross-sectional view.
US09105654B2	Source/drain profile for FinFET An embodiment is a FinFET device. The FinFET device comprises a fin, a first source/drain region, a second source/drain region, and a channel region. The fin is raised above a substrate. The first source/drain region and the second source/drain region are in the fin. The channel region is laterally between the first and second source/drain regions. The channel region has facets that are not parallel and not perpendicular to a top surface of the substrate.
US09105648B2	Adhesive and method of encapsulating organic electronic device using the same An adhesive, and an encapsulated product and method of encapsulating an organic electronic device (OED) using the same are provided. The adhesive film serves to encapsulate the OED and includes a curable resin and a moisture absorbent, and the adhesive includes a first region coming in contact with the OED upon encapsulation of the OED and a second region not coming in contact with the OED. Also, the moisture absorbent is present at contents of 0 to 20% and 80 to 100% in the first and second regions, respectively, based on the total weight of the moisture absorbent in the adhesive.
US09105647B2	Method of forming perforated opening in bottom substrate of flipchip pop assembly to reduce bleeding of underfill material A semiconductor device has a flipchip semiconductor die mounted to a first substrate using a plurality of first bumps. An opening or plurality of openings is formed in the first substrate in a location central to placement of the flipchip semiconductor die to the first substrate. A plurality of semiconductor die is mounted to a second substrate. The semiconductor die are electrically connected with bond wires. An encapsulant is over the plurality of semiconductor die and second substrate. The second substrate is mounted to the first substrate with a plurality of second bumps. An underfill material is dispensed through the opening in the first substrate between the flipchip semiconductor die and first substrate. The dispensing of the underfill material is discontinued as the underfill material approaches or reaches a perimeter of the flipchip semiconductor die to reduce bleeding of the underfill material. The underfill material is cured.
US09105645B2	Method for producing thin semiconductor components A semiconductor substrate (1) is provided with a structure (3) on an upper side (2), and an additional substrate (4) provided for handling the semiconductor substrate is likewise structured on an upper side (5). The structuring of the additional substrate takes place in at least partial correspondence with the structure of the semiconductor substrate. The structured upper sides of the semiconductor substrate and the additional substrate are positioned such that they face one another and are permanently connected to one another. Subsequently, the semiconductor substrate is thinned from the rear side (6), and the additional substrate is removed at least to such a degree that the structure of the semiconductor substrate is exposed to the extent required for the further use.
US09105643B2	Bit cell with double patterned metal layer structures An approach for providing SRAM bit cells with double patterned metal layer structures is disclosed. Embodiments include: providing, via a first patterning process, a word line structure, a ground line structure, a power line structure, or a combination thereof; and providing, via a second patterning process, a bit line structure proximate the word line structure, the ground line structure, the power line structure, or a combination thereof. Embodiments include: providing a first landing pad as the word line structure, and a second landing pad as the ground line structure; and providing the first landing pad to have a first tip edge and a first side edge, and the second landing pad to have a second tip edge and a second side edge, wherein the first side edge faces the second side edge.
US09105642B2	Interlevel dielectric stack for interconnect structures A dielectric stack and method of depositing the stack to a substrate using a single step deposition process. The dielectric stack includes a dense layer and a porous layer of the same elemental compound with different compositional atomic percentage, density, and porosity. The stack enhances mechanical modulus strength and enhances oxidation and copper diffusion barrier properties. The dielectric stack has inorganic or hybrid inorganic-organic random three-dimensional covalent bonding throughout the network, which contain different regions of different chemical compositions such as a cap component adjacent to a low-k component of the same type of material but with higher porosity.
US09105641B2	Profile control in interconnect structures The profile of a via can be controlled by forming a profile control liner within each via opening that is formed into a dielectric material prior to forming a line opening within the dielectric material. The presence of the profile control liner within each via opening during the formation of the line opening prevents rounding of the corners of a dielectric material portion that is present beneath the line opening and adjacent the via opening.
US09105639B2	Semiconductor device channels A semiconductor device and a method of manufacture are provided. The semiconductor device includes one or more layers having channels adapted to carry signals or deliver power. The semiconductor device may include a signal channel and a power channel. The power channel may include power channel cross-sectional portions. A first conductor in the power channel may have a first cross-sectional area. A second conductor in the signal channel may have a second cross-sectional area. The second cross-sectional area may be smaller than the first cross-sectional area. The method of manufacture includes establishing a signal conductor layer including a signal channel and a power channel, introducing a first conductor in the power channel having a first cross-sectional area, and introducing a second conductor in the signal channel having a second cross-sectional area where the second cross-sectional area is smaller than the first cross-sectional area.
US09105638B2	Via-fuse with low dielectric constant In an embodiment of the present invention, a semiconductor device comprises a non-fuse area that has a non-fuse via, a non-fuse line, and a non-fuse dielectric stack. The semiconductor device further comprises a fuse area that has a fuse via, a fuse line, and a fuse dielectric stack. The fuse dielectric stack comprises at least a first dielectric and a second dielectric material. The fuse via is at least partially embedded in the first dielectric material and the fuse line is embedded in the second dielectric material.
US09105635B2	Stubby pads for channel cross-talk reduction A metal surface feature, such as a pad, terminating a vertical transition through a substrate, such as an IC package substrate, includes one or more stubs providing high edge surface area to couple with one or more complementary stubs on an adjacent metal surface feature to provide a desired amount of mutual capacitance that may at least partially cancel crosstalk for an overall channel crosstalk (e.g., FEXT) reduction. In embodiments, capacitive coupling of adjacent pads is provided for more than two pads to achieve crosstalk reduction of more than one victim-aggressor pair and/or to achieve crosstalk reduction of more than two aggressors. In embodiments, the pads have a large pitch (e.g., 1000 μm) suitable for interfacing to an interposer or PCB socket, while the gap between the stubs is small (e.g., 15 μm), as limited only by the minimum spacing allowed for metal features on the opposite side of the package employed for interfacing to the IC.
US09105632B2	Semiconductor structures A method is provided for fabricating a semiconductor structure. The method includes providing a semiconductor substrate having a plurality of first doped regions and second doped regions; and forming a first dielectric layer on the semiconductor substrate. The method also includes forming a first gate dielectric layer and a second gate dielectric layer; and forming a first metal gate and a second metal gate on the first gate dielectric layer and the second gate dielectric layer, respectively. Further, the method includes forming a third dielectric layer on the second metal gate; and forming a second dielectric layer on the first dielectric layer. Further, the method also includes forming at least one opening exposing at least one first metal gate and one first doped region; and forming a contact layer contacting with the first metal gate and the first doped region to be used as a share contact structure.
US09105631B2	Carrier tape for tab-package and manufacturing method thereof The present invention relates to a carrier tape for TAB-package and a manufacturing method thereof, wherein a TAB tape including a base film having a central area and edge areas at both directions of the central area, a wiring pattern formed at the central area of the base film, a transfer area formed at the edge area of the base film and exposed by the base film, a plurality of sprocket holes arranged in a row on the transfer area and a metal pattern discretely formed from the wiring pattern, and formed at the edge areas of the base film, wherein the metal pattern is formed with a paired structure formed at both sides of the plurality of sprocket holes, such that the present invention has an advantageous effect in that no Cu layer or a metal layer exists at a portion of the sprocket holes from which friction is generated by a driving roller during assembly work between a drive IC and chips/drive IC and panel to dispense with generation of foreign objects such as Cu particles, thereby enhancing reliability of the product.
US09105630B2	Semiconductor memory apparatus for improving characteristics of power distribution network A semiconductor memory apparatus includes: a power distribution line disposed over a circumferential portion of a device formation region; a guard ring formed to surround the device formation region outside of the power distribution line; and one or more power reinforcement parts configured to electrically couple an edge part of the power distribution line to the guard ring.
US09105626B2	High-density package-on-package structure A bare-die first package includes a patterned insulating layer that exposes first package balls in vias. The vias enable a second package to be positioned on the first package in a proper ball-to-ball alignment without the need for flattening or coining.
US09105625B2	Semiconductor apparatus, method of manufacturing semiconductor apparatus, and electronic apparatus A semiconductor apparatus, including: a semiconductor component; a Cu stud bump that is formed on the semiconductor component; and a solder bump configured to electrically connect to the Cu stud bump.
US09105623B2	Semiconductor device having metal gate and manufacturing method thereof A manufacturing method for semiconductor device having metal gate includes providing a substrate having a first semiconductor device and a second semiconductor device formed thereon, the first semiconductor device having a first gate trench and the second semiconductor device having a second gate trench, forming a first work function metal layer and an etch stop layer in the first gate trench and the second gate trench, forming a metal layer having a material the same with the first work function metal layer in the second gate trench, and forming a filling metal layer in the first gate trench and the second gate trench to form a second work function metal layer in the first gate trench.
US09105620B1	Integrated circuit packaging system with routable traces and method of manufacture thereof A system and method of manufacture of an integrated circuit packaging system includes: a leadframe with a conductive layer on a leadframe active side for protecting a lead pad and a routable trace, the leadframe having an overmold recess at a leadframe inactive side; an overmold layer in the overmold recess, the overmold layer exposed between the lead pad and the routable trace for forming the lead pad and routable trace; an encapsulation directly on the conductive layer, the lead pad, the routable trace, and the overmold layer; and an external interconnect at the leadframe inactive side.
US09105618B2	Semiconductor device A semiconductor device according to an embodiment includes a gate wire including a laminated film in which a polysilicon film, a barrier conductive film, and a metal film are laminated in this order; a first contact plug/upper layer wire arranged above the source or the drain; a second upper layer wire arranged above an element isolation region; a second contact plug arranged apart from the second upper layer wire and connecting the metal film and the polysilicon film above a channel region; and a third contact plug formed apart from the polysilicon film in the element isolation region and connecting the second upper layer wire and the metal film. The second contact plug includes a barrier metal in contact with the polysilicon film and the barrier conductive film is made of WN, TaN, or Ta and the barrier metal is made of Ti or TiN.
US09105615B1	Substrate vias for a display device An electronic device comprises a display stack that includes an active matrix display operable using thin film transistor (TFT) circuitry. The display stack also includes a light guide layer capable of illuminating the active matrix display. A glass substrate of the active matrix display has a first side and a second side opposite the first side, wherein the glass substrate includes the TFT circuitry disposed on the first side and one or more through-glass vias that electronically connect portions of the TFT circuitry disposed on the first side of the glass substrate to one or more electronic connectors or electronic circuitry disposed on the second side of the glass substrate.
US09105609B2	Oxide-based semiconductor non-linear element having gate electrode electrically connected to source or drain electrode A non-linear element (e.g., a diode) with small reverse saturation current is provided. A non-linear element includes a first electrode provided over a substrate, an oxide semiconductor film provided on and in contact with the first electrode, a second electrode provided on and in contact with the oxide semiconductor film, a gate insulating film covering the first electrode, the oxide semiconductor film, and the second electrode, and a third electrode provided in contact with the gate insulating film and adjacent to a side surface of the oxide semiconductor film with the gate insulating film interposed therebetween or a third electrode provided in contact with the gate insulating film and surrounding the second electrode. The third electrode is connected to the first electrode or the second electrode.
US09105608B2	Semiconductor device and method for manufacturing the same A miniaturized transistor having favorable electric characteristics is provided. The transistor includes an oxide semiconductor layer which is in contact with a source electrode layer on one of side surfaces in a channel length direction and in contact with a drain electrode layer on the other of the side surfaces in the channel length direction. With this structure, an electric field between the source electrode layer and the drain electrode layer is relaxed and a short-channel effect is suppressed. Further, a sidewall layer having conductivity is provided on a side surface of a gate electrode layer in the channel length direction, so that the sidewall layer having conductivity overlaps with the source electrode layer or the drain electrode layer with a gate insulating layer provided therebetween, which enables the transistor to substantially have an Lov region.
US09105607B2	Semiconductor device A semiconductor device includes a semiconductor substrate of a first conductivity type, a mesh-type gate electrode including first portions extending in a first direction and second portions extending in a second direction crossing the first direction over the substrate. The mesh-type gate structure may have a plurality of openings, and source regions and drain regions of second conductivity type alternately arranged in the first direction and the second direction in the substrate at locations corresponding to the openings.
US09105606B2	Self aligned contact with improved robustness A semiconductor device is provided that includes a gate structure that is present on a channel portion of a semiconductor substrate that is present between a source region and a drain region. The gate structure includes at least a gate conductor and a gate sidewall spacer that is adjacent to the at least one gate conductor. An upper surface of the gate conductor is recessed relative to an upper surface of the gate sidewall spacer. A multi-layered cap is present on the upper surface of the gate conductor. The multi-layered cap includes a high-k dielectric material and a dielectric cap spacer that is present on a portion of the high-k dielectric material that is present on the sidewall of the gate sidewall spacer.
US09105605B2	Semiconductor device There is provided a semiconductor device. The semiconductor device includes a plurality of trench transistors in an active region, and an interconnection disposed in an edge region, the interconnection configured to transfer a voltage to the plurality of trench transistors, in which the edge region comprises a substrate, a first insulating layer, a first electrode, a second insulating layer, and a second electrode, disposed in that order.
US09105598B2	Package/heatsink system for electronic device An insulating body embeds an integrated circuit and has a mounting surface, an opposite free surface, and at least one pin exposed along an edge of the mounting surface and electrically connected to a terminal of the integrated circuit. A heatsink configured to dissipate heat produced by the integrated circuit is provided in correspondence of the free surface. The heatsink includes at least one protruding element including a connection portion partly extending in contact with the free surface and partly protruding beyond a boundary of the free surface (the connection portion having a free end being distal from the insulating body), and a mounting portion extending from the free end at least up to a plane of the mounting surface. The heatsink is further electrically connected to a terminal of the integrated circuit chip. The protruding element is placed in correspondence of the at least one pin.
US09105596B2	Motor controller A motor controller, including: a control box (1), the control box (1) including a bottom, the bottom including a plurality of first bosses (11); a control panel (2); a plurality of IGBT modules (3); and a heat dissipation boss (12), the heat dissipation boss (12) including an end surface. The control panel (2) is disposed and fixed on the first bosses (11) by screws. The IGBT modules (3) are disposed on the control panel (2). The heat dissipation boss (12) is disposed on the bottom of the control box (1) outside the control panel (2). The IGBT modules (3) are attached to and fixed on the end surface of the heat dissipation boss (12) by a locking device.
US09105594B2	Display device In a display device having driving circuits formed on the same substrate where pixels are formed, the lateral frame area of the display device is reduced. A gate signal line driving circuit is placed in parallel with a source signal line driving circuit, so that no driving circuits are provided in at least two opposing directions out of four directions with respect to a pixel region. With the above-described structure, the area the gate signal line driving circuit occupies in prior art is removed to reduce the width (side to side) of the display device. Therefore a display device that has a small frame area in the lateral direction can be provided.
US09105591B2	Rotatable and tunable heaters for semiconductor furnace A method for forming a layer of material on a semiconductor wafer using a semiconductor furnace that includes a thermal reaction chamber having a heating system having a plurality of rotatable heaters for providing a heating zone with uniform temperature profile is provided. The method minimizes temperature variations within the thermal reaction chamber and promotes uniform thickness of the film deposited on the wafers.
US09105589B2	Organic light emitting diode display An organic light emitting diode display includes a substrate, a scan line and a previous scan line formed on the substrate, a data line and a driving voltage line crossing the scan line and the previous scan line, a switching transistor coupled to the scan line and the data line, a driving transistor coupled to the switching transistor, a compensation transistor coupled to one end of the driving transistor and configured to compensate a threshold voltage of the driving transistor, a connecting member configured to couple a compensation semiconductor layer of the compensation transistor to a driving gate electrode of the driving transistor, a first electrode coupled to another end of the driving transistor, an organic emission layer on the first electrode, and a second electrode on the organic emission layer. The connecting member and the first electrode are spaced from each other on a planar surface of the substrate.
US09105583B2	Catalytic etch with magnetic direction control A material can be locally etched with arbitrary changes in the direction of the etch. A ferromagnetic-material-including catalytic particle is employed to etch the material. A wet etch chemical or a plasma condition can be employed in conjunction with the ferromagnetic-material-including catalytic particle to etch a material through a catalytic reaction between the catalytic particle and the material. During a catalytic etch process, a magnetic field is applied to the ferromagnetic-material-including catalytic particle to direct the movement of the particle to any direction, which is chosen so as to form a contiguous cavity having at least two cavity portions having different directions. The direction of the magnetic field can be controlled so as to form the contiguous cavity in a preplanned pattern, and each segment of the contiguous cavity can extend along an arbitrary direction.
US09105582B2	Spatial semiconductor structure and method of fabricating the same A method of fabricating a spatial semiconductor structure includes steps as follows. Firstly, a semiconductor substrate is provided. Then, a first mask layer is formed above the semiconductor substrate. Then, at least a first opening is formed in the first mask layer and exposes a portion of a surface of the semiconductor substrate. Then, a first semiconductor pattern is formed in the first opening. Then, a second mask layer is formed over the first semiconductor pattern and the first mask layer. Then, at least a second opening is formed through the second mask layer to the first mask layer and exposes another portion of the surface of the semiconductor substrate. And, a second semiconductor pattern is formed in the second opening.
US09105581B2	Method of processing a substrate and apparatus for performing the same In a method of processing a substrate, a first plasma may be generated from a first reaction gas. A second plasma may be generated from a second reaction gas. The first plasma and the second plasma may be individually applied to the substrate. Thus, each of the at least two remote plasma sources may generate at least two plasmas under different process recipes, which may be optimized for processing the substrate. As a result, the substrate processed using the optimal plasmas may have a desired shape.
US09105576B2	Multi-level memory arrays with memory cells that employ bipolar storage elements and methods of forming the same In some embodiments, a memory array is provided that includes (1) a first memory cell having (a) a first conductive line; (b) a first bipolar storage element formed above the first conductive line; and (c) a second conductive line formed above the first bipolar storage element; and (2) a second memory cell formed above the first memory cell and having (a) a second bipolar storage element formed above the second conductive line; and (b) a third conductive line formed above the second bipolar storage element. The first and second memory cells share the second conductive line; the first bipolar storage element has a first storage element polarity orientation within the first memory cell; the second bipolar storage element has a second storage element polarity orientation within the second memory cell; and the second storage element polarity orientation is opposite the first storage element polarity orientation. Numerous other aspects are provided.
US09105573B2	Visually detecting electrostatic discharge events Methods and structures provide an electrostatic discharge (ESD) indicator including an electric field sensitive material configured to undergo a specific color change in response to an electric field. An exposure of the structure to an ESD can be visually determined via the specific color change of the ESD indicator.
US09105572B2	Magnetic memory and manufacturing method thereof According to one embodiment, a magnetic memory includes a cell transistor including a first source/drain diffusion layer and a second source/drain diffusion layer, a first contact on the first source/drain diffusion layer, a memory element on the first contact, and a second contact on the second source/drain diffusion layer, the second contact including a first plug on the second source/drain diffusion layer, and a second plug on the first plug.
US09105561B2	Layered bonded structures formed from reactive bonding of zinc metal and zinc peroxide A system, method, and apparatus for layered bonded structures formed from reactive bonding between zinc metal and zinc peroxide are disclosed herein. In particular, the present disclosure teaches a layered bonded structure wherein two structures are bonded together with a layer including zinc oxide. The zinc oxide is formed through a method that includes processing the two structures by contacting the structures under pressure and applying heat to the structures to promote a reaction with zinc peroxide and zinc metal on one or both of the two structures.
US09105559B2	Conformal doping for FinFET devices A conformal doping process for FinFET devices on a semiconductor substrate which includes NFET fins and PFET fins. In a first exemplary embodiment, an N-type dopant composition is conformally deposited over the NFET fins and the PFET fins. The semiconductor substrate is annealed to drive in an N-type dopant from the N-type dopant composition into the NFET fins. A P-type dopant composition is conformally deposited over the NFET fins and the PFET fins. The semiconductor substrate is annealed to drive in a P-type dopant from the P-type dopant composition into the PFET fins. In a second exemplary embodiment, one of the NFET fins and PFET fins may be covered with a first dopant composition and then a second dopant composition may cover both the NFET fins and the PFET fins followed by an anneal to drive in both dopants.
US09105557B2	Schottky-barrier device with locally planarized surface and related semiconductor product The present disclosure is related to alleviation of at least some of the drawbacks of the previously known implementations and to provide an improved alternative. Generally, at least some of the embodiments are related to a high voltage power conversion semiconductor device, in particular a SiC Schottky-barrier power rectifier device, having a planarized surface.
US09105553B2	Solid-state imaging apparatus with plural current source circuits There is provided a solid-state imaging apparatus that can prevent degradation of image quality. The solid-state imaging apparatus includes a plurality of pixels (1) including a photoelectric conversion element that performs photoelectric conversion; a signal line (6) to which the plurality of pixels output signals; and a first constant current circuit configured to supply a constant current to the signal line, wherein the first constant current circuit has a first transistor (5) having a drain or collector node connected to the signal line, and a first resistor (101) connected between a reference voltage node and a source or emitter node of the first transistor.
US09105548B2	Sparsely-bonded CMOS hybrid imager A method and device for imaging or detecting electromagnetic radiation is provided. A device structure includes a first chip interconnected with a second chip. The first chip includes a detector array, wherein the detector array comprises a plurality of light sensors and one or more transistors. The second chip includes a Read Out Integrated Circuit (ROIC) that reads out, via the transistors, a signal produced by the light sensors. A number of interconnects between the ROIC and the detector array can be less than one per light sensor or pixel.
US09105541B2	Solid-state imaging apparatus A solid-state imaging apparatus includes: a solid-state imaging device photoelectrically converting light taken by a lens; and a light shielding member shielding part of light incident on the solid-state imaging device from the lens, wherein an angle made between an edge surface of the light shielding member and an optical axis direction of the lens is larger than an incident angle of light to be incident on an edge portion of the light shielding member.
US09105536B2	Solid-state imaging device for analog-to-digital conversion A solid-state imaging device is capable of suppressing as much as possible an increase in power consumption of a low-frequency noise removing process. A pixel unit includes pixels outputting pixel signals corresponding to an amount of incident light and correction pixels outputting correction pixel signals corresponding to a correction reference voltage. An AD conversion circuit includes a delay circuit, to which a plurality of delay elements are connected, and outputs a digital signal corresponding to the number of delay elements through which a pulse signal passes when the pulse signal passes through the number of delay elements corresponding to a level of the pixel signal or the correction pixel signal.
US09105534B2	Semiconductor device, method of manufacturing thereof, circuit board and electronic apparatus A semiconductor device is provided comprising: a semiconductor element including a plurality of electrodes; first wirings coupled to the electrodes and directed toward a center of the semiconductor element from a portion coupled to the electrodes; second wirings coupled between the first wirings and external terminals, the second wirings being directed to an outer area of the semiconductor element relative to the center; and at least one resin layer formed between the first wirings and the second wirings.
US09105532B2	Semiconductor device and method of forming interconnect structure over seed layer on contact pad of semiconductor die without undercutting seed layer beneath interconnect structure A semiconductor device has a semiconductor die with a first conductive layer formed over the die. A first insulating layer is formed over the die with a first opening in the first insulating layer disposed over the first conductive layer. A second conductive layer is formed over the first insulating layer and into the first opening over the first conductive layer. An interconnect structure is constructed by forming a second insulating layer over the first insulating layer with a second opening having a width less than the first opening and depositing a conductive material into the second opening. The interconnect structure can be a conductive pillar or conductive pad. The interconnect structure has a width less than a width of the first opening. The second conductive layer over the first insulating layer outside the first opening is removed while leaving the second conductive layer under the interconnect structure.
US09105528B2	Display panel structure of electrophoretic display device with flat protection layer over active region and protection circuit region A display device structure includes a substrate having an active region and an electrostatic protection circuit region. The first metal layer, the first insulation layer, and an amorphous silicon layer are sequentially disposed on the substrate; the first opening passes through the first insulation layer for exposing part of the first metal layer. The second metal layer, disposed on the first insulation layer or the amorphous silicon layer, fills the first opening to contact with the first metal layer; the second insulation layer and the flat layer are disposed on the second metal layer, in which the region of the flat layer overlaps the electrostatic protection circuit region. The second opening passes through the second insulation layer and the flat layer for exposing the second metal layer, in which the third metal layer fills the second opening to contact with the second metal layer.
US09105526B2	High productivity combinatorial material screening for metal oxide films Methods for HPC techniques are applied to the processing of site-isolated regions (SIR) on a substrate to form at least a portion of a TFT device used in display applications. The processing may be applied to at least one of gate dielectric deposition, gate dielectric patterning, metal-based semiconductor (e.g. ZnOx, ZnSnOx, ZnInOx, or ZnGaOx) deposition, metal-based semiconductor (e.g. ZnOx, ZnSnOx, ZnInOx, or ZnGaOx) patterning, etch stop deposition, etch stop patterning, source/drain deposition, or source/drain patterning. The SIRs may be defined during the deposition process with uniform deposition within each SIR or the SIRs may be defined subsequent to the deposition of layers wherein the layers are deposited with a gradient in one or more properties across the substrate.
US09105518B2	Method of large-area circuit layout recognition Methods for detecting the physical layout of an integrated circuit are provided. The methods of the present disclosure allow large area imaging of the circuit layout without requiring tedious sample preparation techniques. The imaging can be performed utilizing low-energy beam techniques such as scanning electron microscopy; however, more sophisticated imaging techniques can also be employed. In the methods of the present disclosure, spalling is used to remove a portion of a semiconductor layer including at least one semiconductor device formed thereon or therein from a base substrate. In some cases, a buried insulator layer that is located beneath a semiconductor layer including the at least one semiconductor device can be completely or partially removed. In some cases, the semiconductor layer including the at least one semiconductor device can be thinned. The methods improve the detection quality that the buried insulator layer and a thick semiconductor layer can reduce.
US09105516B2	Polishing apparatus and polishing method A polishing apparatus includes: a polishing table for supporting a polishing pad; a substrate holder having a substrate holding surface and a pressure chamber formed by a flexible membrane, the substrate holder being configured to hold a substrate on the substrate holding surface and press the substrate against the polishing pad via pressure in the pressure chamber; a substrate separation assisting device configured to eject a fluid to a contact portion between the substrate and the flexible membrane so as to release the substrate from the substrate holding surface; and a vertically-moving mechanism configured to vertically move the substrate holder. The substrate holder is moved vertically in accordance with an amount of descent of the contact portion and then the substrate separation assisting device ejects the fluid to the contact portion.
US09105513B2	Transistor including sub-gate and semiconductor device including the same Provided is a semiconductor device including a pillar, a gate electrode having a first conductive pattern surrounding the pillar and a plurality of second conductive patterns which protrude from the first conductive pattern and are arranged to be spaced apart from each other, and an insulating pattern interposed between the pillar and the first conductive pattern.
US09105508B2	Transistor of semiconductor device and method for fabricating the same Provided is a transistor of a semiconductor device and a method for fabricating the same. A transistor of a semiconductor device may include: a semiconductor substrate having an active region defined by an isolation layer; a recess trench formed in the active region and disposed to cross the semiconductor substrate in one direction; and a gate line formed in a straight line pattern, overlapping the recess trench and disposed to cross the recess trench at approximately right angles.
US09105506B2	Dynamic memory structure A dynamic memory structure includes a strip semiconductor material disposed on a substrate, a gate standing astride the strip semiconductor material and dividing the strip semiconductor material into a source terminal, a drain terminal and a channel region wherein a source width of the source terminal is larger than or equal to a channel width, a dielectric layer sandwiched between the gate and the strip semiconductor material, and a capacitor unit disposed on the substrate and including the source terminal serving as a lower electrode.
US09105504B2	Semiconductor device and method for forming the same A semiconductor device and a method for forming the same are disclosed, which relate to a reservoir capacitor. The semiconductor device includes: an active region defined by forming a device isolation region over a semiconductor substrate of peripheral region; gate electrodes formed over the active region; a plurality of metal lines over the gate electrodes; a plurality of contact slits elongated into the gate electrode at a position between the plurality of metal lines, a plurality of the first capacitors respectively formed over the plurality of metal lines, and a plurality of the second capacitors respectively formed over the plurality of contact slits.
US09105502B2	Integrated circuit comprising on-chip resistors with plurality of first and second terminals coupled to the resistor body An integrated circuit (IC) is disclosed. The IC includes a substrate with a resistor region and a resistor body disposed on the resistor region. A plurality of first resistor contact strips and a plurality of second resistor contact strips are disposed on the resistor body along a first direction. Two adjacent first and second resistor contact strips are separated by a respective one of contact strip spaces. The IC includes a plurality of first terminals and a plurality of second terminals. Each of the first terminals is coupled to a respective one of the first resistor contact strips while each of the second terminals is coupled to a respective one of the second resistor contact strips. A set of the first terminal and the second terminal forms first and second terminals of an on-chip resistor.
US09105501B2	Semiconductor device, method of manufacturing thereof, signal transmission/reception method using such semiconductor device, and tester apparatus A semiconductor device includes a substrate, an internal circuit including a plurality of transistors provided over the substrate, an insulating film provided over the substrate, a bonding pad provided over the insulating film, an inductor being formed in the insulating film, the inductor carrying out a signal transmission/reception to/from an external device in a non-contact manner by an electromagnetic induction and being electrically coupled to the internal circuit. The inductor includes a first conducting layer, and the bonding pad includes a second conducting layer. The first conducting layer includes a lower level layer than the second conducting layer in a thickness direction of the substrate. In a plan view, the inductor includes a first portion overlapping the bonding pad and a second portion not overlapping the bonding pad.
US09105496B2	Complementary metal oxide semiconductor device, optical apparatus including the same, and method of manufacturing the same A complementary metal oxide semiconductor (CMOS) device includes an n-type first transistor on a silicon substrate, the n-type first transistor including a Group III-V compound semiconductor substrate, and a p-type second transistor on the silicon substrate, the p-type second transistor including a germanium based substrate.
US09105491B2	Semiconductor structure and semiconductor device having the same The invention provides a semiconductor structure and a semiconductor device having such semiconductor structure. The semiconductor structure includes: a substrate; a first well having a first conductivity type, which is provided on the substrate; a second well having a second conductivity type and contacting the first well at a boundary in between in a lateral direction; and a plurality of mitigation regions having the first conductivity type or the second conductivity type, provided in the first well and being close to the boundary in a lateral direction and penetrating the first well in a vertical direction.
US09105490B2	Contact structure of semiconductor device The invention relates to a contact structure of a semiconductor device. An exemplary structure for a contact structure for a semiconductor device comprises a substrate comprising a major surface and a trench below the major surface; a strained material filling the trench, wherein a lattice constant of the strained material is different from a lattice constant of the substrate; an inter-layer dielectric (ILD) layer having an opening over the strained material, wherein the opening comprises dielectric sidewalls and a strained material bottom; a dielectric layer coating the sidewalls and bottom of the opening, wherein the dielectric layer has a thickness ranging from 1 nm to 10 nm; and a metal layer filling a coated opening of the dielectric layer.
US09105489B2	Power semiconductor module A power semiconductor module includes a base plate and at least one pair of substrates mounted on the base plate. Multiple power semiconductors are mounted on each substrate. The power semiconductors are arranged on each substrate with a different number of power semiconductors along opposite edges thereof. The at least one pair of substrates is arranged on the base plate with the respective edges of the substrates provided with a lower number of power semiconductors facing towards each other.
US09105488B2	Devices and methodologies related to structures having HBT and FET A semiconductor structure includes a heterojunction bipolar transistor (HBT) including a collector layer located over a substrate, the collector layer including a semiconductor material, and a field effect transistor (FET) located over the substrate, the FET having a channel formed in the semiconductor material that forms the collector layer of the HBT. In some implementations, a second FET can be provided so as to be located over the substrate and configured to include a channel formed in a semiconductor material that forms an emitter of the HBT. One or more of the foregoing features can be implemented in devices such as a die, a packaged module, and a wireless device.
US09105487B2	Super junction semiconductor device A super junction semiconductor device includes a substrate layer of a first conductivity type and an epitaxial layer adjoining the substrate layer and including first columns of the first conductivity type and second columns of a second conductivity type. The first and second columns extend along a main crystal direction into the epitaxial layer and have vertical dopant profiles perpendicular to the first surface. The vertical dopant profile of at least one of the first and second columns includes first portions separated by second portions. In each of the first portions a dopant concentration varies by at most 30% of a maximum value within the respective first portion. In the second portions the dopant concentration is lower than in the adjoining first portions. A ratio of a total length of the first portions to a total length of the first and second portions is at least 50%.
US09105484B2	Epitaxial stucture An epitaxial structure includes a patterned epitaxial growth surface defining a plurality of grooves. A graphene layer covers the patterned epitaxial growth surface. An epitaxial layer is formed on the patterned epitaxial growth surface, wherein a first part of the graphene layer is sandwiched between the substrate, and a second part of the graphene layer is embedded into the epitaxial layer.
US09105480B2	Methods for the fabrication of graphene nanoribbon arrays using block copolymer lithography Methods of fabricating patterned substrates, including patterned graphene substrates, using etch masks formed from self-assembled block copolymer films are provided. Some embodiments of the methods are based on block copolymer (BCP) lithography in combination with graphoepitaxy. Some embodiments of the methods are based on BCP lithography techniques that utilize hybrid organic/inorganic etch masks derived from BCP templates. Also provided are field effect transistors incorporating graphene nanoribbon arrays as the conducting channel and methods for fabricating such transistors.
US09105476B2	Manufacturing method of semiconductor device To improve the manufacturing yield of semiconductor devices. Over a semiconductor wafer, a film to be processed is formed; over that film, an antireflection film is formed; and, over the antireflection film, a resist layer is formed. Then, the resist layer is subjected to liquid immersion exposure, and a development and rinsing process to form a resist pattern. After that, the antireflection film and the film to be processed are etched sequentially using the resist pattern as an etching mask. In the development process of the resist layer, the antireflection film is exposed from parts from which the resist layer has been removed by the development process. When performing a rinsing process after the development, the water repellent property of the surface of the antireflection film exposed from the resist layer is not lower than the water repellent property of the surface of the resist layer.
US09105475B1	Method for forming fin field effect transistor A method for forming a fin field effect transistor is provided. The method includes: providing a substrate; forming a fin structure with a material Ge or GeSi on the substrate; implanting atoms, molecules, ions or plasmas containing an element Sn into the fin structure with the material Ge or GeSi to form a Ge-based GeSn layer or a Ge-based GeSnSi layer; and forming a gate stack on the Ge-based GeSn layer or the Ge-based GeSnSi layer, the gate stack being oriented transversely to the fin structure.
US09105474B2	Semiconductor device and manufacturing method thereof A semiconductor device having favorable electric characteristics and a manufacturing method thereof are provided. A transistor includes an oxide semiconductor layer formed over an insulating layer, a source electrode layer and a drain electrode layer which overlap with part of the oxide semiconductor layer, a gate insulating layer in contact with part of the oxide semiconductor layer, and a gate electrode layer over the gate insulating layer. In the transistor, a buffer layer having n-type conductivity is formed between the source electrode layer and the oxide semiconductor layer and between the drain electrode layer and the oxide semiconductor layer. Thus, parasitic resistance is reduced, resulting in improvement of on-state characteristics of the transistor.
US09105470B2	Semiconductor device A switching component includes a control element and an integrated circuit. The integrated circuit includes a first transistor element and a second transistor element electrically connected in parallel to the first transistor element. The first transistor element includes first transistors, gate electrodes of which are disposed in first trenches in a first main surface of a semiconductor substrate. The second transistor element includes second transistors, gate electrodes of which are disposed in second trenches in the first main surface, and a second gate conductive line in contact with the gate electrodes in the second trenches. The control element is configured to control a potential applied to the second gate conductive line.
US09105464B2	Semiconductor structure with rare earth oxide A semiconductor structure with a rare earth oxide is provided. The semiconductor structure comprises: a semiconductor substrate (100); and a plurality of insulation oxide layers (201, 202 . . . 20x) and a plurality of single crystal semiconductor layers (301, 302 . . . 30x) alternately stacked on the semiconductor substrate (100). A material of the insulation oxide layer (201) contacted with the semiconductor substrate (100) is any one of a rare earth oxide, SiO2, SiOxNy and a combination thereof, a material of other insulation oxide layers (202 . . . 20x) is a single crystal rare earth oxide.
US09105463B2	Semiconductor device A semiconductor device includes an extended semiconductor chip including a first semiconductor chip and an extension outwardly extending from a side surface of the first semiconductor chip; and a second semiconductor chip connected to the extended semiconductor chip through a plurality of bumps and electrically connected to the first semiconductor chip. The first semiconductor chip is smaller than the second semiconductor chip. At least one external terminal is provided on the extension.
US09105456B2	Tandem mass spectrum analysis device and mass spectrum analysis method A tandem mass spectrometer is provided in the present invention. The mass spectrometer includes an ion source, a quadrupole mass filter located at downstream side of the ion source, a linear ion trap disposed at downstream side of the mass filter and an ion detector placed on the side of the ion trap, all of which are placed in a vacuum environment. The instrument can obtain MS meeting the standard spectral library search criteria by the quadrupole mass filter cooperating with linear ion trap, realize any multi-stage MS under two modes of axial collision and resonance excitation, and predict and optimize the inflow amount and types of samples under the ion trap analysis mode by the quadrupole. A tandem MS analysis method is also provided, which can repeatedly provide precursor ion selection, ion acceleration, achieve high-energy collision dissociation, low product ion mass discrimination effect.
US09105452B2	Etching apparatus and etching method An apparatus for an etching process includes a chamber, a plasma generator disposed in the chamber, a stacked structure disposed in the chamber to support a substrate thereon and including an electrode plate and an insulation coating layer on the electrode plate, electrode rods inserted into through holes of the stacked structure to penetrate through the stacked structure, directly contacting the substrate and spaced apart from sidewalls of the through holes of the stacked structure, at least one DC pulse generator generating a DC pulse to the electrode plate and the electrode rods, first connection lines connecting the DC pulse generator to the electrode rods, and at least one second connection line connecting the DC pulse generator to a lower portion of the electrode plate.
US09105444B2	Electro-optical inspection apparatus and method with dust or particle collection function An electro-optical inspection apparatus is provided that is capable of preventing adhesion of dust or particles to the sample surface as much as possible. A stage (100) on which a sample (200) is placed is disposed inside a vacuum chamber (112) that can be evacuated to vacuum, and a dust collecting electrode (122) is disposed to surround a periphery of the sample (200). The dust collecting electrode (122) is applied with a voltage having the same polarity as a voltage applied to the sample (200) and an absolute value that is the same or larger than an absolute value of the voltage. Thus, because dust or particles such as particles adhere to the dust collecting electrode (122), adhesion of the dust or particles to the sample surface can be reduced. Instead of using the dust collecting electrode, it is possible to form a recess on a wall of the vacuum chamber containing the stage, or to dispose on the wall a metal plate having a mesh structure to which a predetermined voltage is applied. In addition, adhesion of dust or particles can be further reduced by disposing a gap control plate (124) having a through hole (124a) at the center above the sample (200) and the dust collecting electrode (122).
US09105439B2	Projection lens arrangement The invention relates to a charged particle optical system comprising a beamlet generator for generating a plurality of charged particle beamlets, an electrostatic deflection system for deflecting the beamlets, and a projection lens system for directing the beamlets from the beamlet generator towards the target. The electrostatic deflection system comprises a first electrostatic deflector and a second electrostatic deflector for scanning charged particle beamlets over the target. The second electrostatic deflector is located behind the first electrostatic deflector so that, during operation of the system, a beamlet generated by the beamlet generator passes both of the electrostatic deflectors. During operation of the first and second electrostatic deflectors the system is adapted to apply voltages on the first electrostatic deflector and the second electrostatic deflector of opposite sign.
US09105432B2	Apparatus and method for generating digital value Provided is an apparatus for generating a digital value that may generate a random digital value, and guarantee time invariance of the generated digital value. The apparatus may include a digital value generator to generate a random digital value using semiconductor process variation, and a digital value freezing unit that may be connected to the digital value generator and fixed to one of a first state and a second state based on the generated digital value, to freeze the digital value.
US09105431B2	Electromagnetic relay The present invention is provided with a fixed contact, a movable contact which selectively contacts with or separates from the fixed contact and a drive means which has at least an electromagnetic coil and drives the movable contact so that the movable contact comes into contact with the fixed contact. The drive means generates a first driving force for bringing the movable contact into contact with the fixed contact, and a second driving force larger than the first driving force for maintaining the contact state between the movable contact and the fixed contact.
US09105430B1	Low voltage reset for water cooled air conditioner A method and device for automatically resetting a water-cooled air conditioner system at least once during a 24 hour period. The device included a tamper resistant housing having a micro-controller electrically coupled to a 24 volt external power source. A normally closed relay is coupled to the micro-controller, the relay having an input and output receptacle for selectively coupling to a low voltage input power line of an air conditioner system. The micro-controller is programmed to randomly open the relay input and output receptacle at least once every 24 hour period to stop the operation of the air conditioning system for timed sequence of about 4 minutes for purposes of resetting the air conditioner system.
US09105429B2	Thermal protection device A thermal protection device includes a heating circuit that develops a first heat magnitude when exposed to a temperature below a threshold and further develops a second heat magnitude greater than the first heat magnitude when exposed to a temperature above the threshold. A thermal circuit breaker is disposed in heat communication with the heating circuit and has component having a holding temperature greater than the threshold and a trip temperature greater than the holding temperature.
US09105426B2	Wiring device with contact dampening An electrical wiring device includes dampening member placed in contact with a stationary contact. The dampening member absorbs and thus decreases at least a portion of the vibration that occurs in the stationary contact when it is impacted by a movable contact in the electrical wiring device. Thus, the noise associated with the impact is lessened. In certain exemplary embodiments, the dampening member is a bumper cap which partially encases a portion of the stationary contact. In certain exemplary embodiments, the dampening member is a bumper pad intimately disposed between an edge of the stationary contact and a wall of the housing, such that movement or vibration of the stationary contact is lessened.
US09105424B2	Rocker switch unit A removable rocker switch unit (1) has a housing (7) and an ON- and an OFF-position removably fixed to the first end of the housing (2). The rocker switch (3) has two pairs of vertically and horizontally aligned connector elements (4). The housing (7) provides two chambers, each chamber for each phase of the rocker switch (7) including a first and a second connecting elements (5, 8) in each chamber arranged to be connected by a fuse (9), a current limiter (9) or both in a series connection and/or by a varistor (9) between connecting elements (5, 8) of the two different phases.
US09105422B2	Thin key structure A thin key structure includes a supporting module, a circuit module disposed on the supporting module, a frame and a metal dome disposed on the circuit module, a pressable module, and a guiding portion. The supporting module has a supporting plate and a protrusion disposed on the supporting plate. The supporting plate has a plane defined therein, the plane defines a perpendicular central axis, and the protrusion is arranged on the central axis. The circuit module has a protruding segment formed by the protrusion. The metal dome is arranged in the frame, and has a contact portion arranged on the central axis. The guiding portion arranged on the central axis and is disposed between the contact portion and the pressable module. The metal dome is pressed by the guiding portion to move the contact portion along the central axis and selectively abuts the circuit module.
US09105421B2	Input device and method for detecting switch of input device An input device includes a resistor group, an input terminal, a plurality of switches, and a control unit. The resistor group includes a plurality of resistors connected in series. The input terminal is connected to one end of the resistor group. Each switch of the plurality of switches has one end connected to each resistor of the plurality of resistors at an opposite side viewed from the input terminal and the other end grounded. The control unit detects an applied voltage to the input terminal when the plurality of switches are all turned off. Furthermore, the control unit detects an output voltage from the input terminal when any of the plurality of switches is turned on, and detects a switch that is turned on among the plurality of switches based on a voltage ratio of the output voltage to the applied voltage.
US09105419B2	Plunger mechanism for switch applications A plunger mechanism (100) is formed of a plunger (102) having a cylindrical body with a half-spherical tip (104). The plunger mechanism (100) is overmolded (108) such that half-spherical tip (104) is exposed. The plunger mechanism provides a drop-in component for a housing (404) having a rotary control (402) with one or more detents (408). The exposed half-spherical tip (104) makes contact with the detents (408) as a rotary control knob (406) is rotated thereby providing improved torque and tactility without the use of springs and without captivation issues.
US09105418B2	Rotary operation type switch A rotary operation type switch includes a holder, a rotary control, a shaft, a press-fitting portion, an outer wall part, and a stopper. The holder is provided in a state of immobility in the rotational direction. The rotary control rotates relatively with respect to the holder when a rotational force is imparted. The shaft transmits the rotational force imparted to the rotary control. The press-fitting portion is provided to The rotary control, and an end of the shaft is inserted into it. The outer wall part is provided along a direction perpendicular to the rotational direction of the rotary control. The stopper is provided to the holder, and comes into contact with the outer wall part and restricts the limit position of the rotation range when the rotary control and the shaft rotate relatively with respect to the holder.
US09105416B2	Push switch A rotor on which a moving contact is attached is received and rotatably held in a body, and a knob is received and held in the body side by side with the rotor and is movable. A plurality of first and second teeth are circumferentially staggered with each other on an outer perimeter surface of the rotor near one end and near the other end, respectively, in the direction of the axis of the rotor to project from the surface. An inclined surface is formed in each of the first and second teeth. A projecting part is formed on the knob to project toward the rotor. In response to a depression of the knob, the projecting part pushes the inclined surface of the second teeth to rotate the rotor and, in response to a return of the knob, pushes the inclined surface of the first teeth to rotate the rotor.
US09105415B2	Retaining insert for an electrical protection system and method A retaining insert coupleable to a base assembly configured to operatively support a primary circuit breaker and a pair of opposing circuit breakers that define a recess is provided. The retaining insert includes a base portion configured to be disposed between the primary circuit breaker and the pair of opposing circuit breakers, the base portion configured to be operatively coupled to the base assembly. The retaining insert also includes retaining portion extending from the base portion into the recess, the retaining portion configured to retain the pair of opposing circuit breakers.
US09105414B2	Plug-type power supply connector for a power input selector switch A transfer switch mountable in a standard electrical panel connects either a utility supply or an auxiliary supply to an electrical system. An internal mechanical interlock prevents both the utility supply and the auxiliary supply from simultaneously being connected to the system. The transfer switch may utilize either a rocker-style or a blade style switch. A light-emitting diode provides an indication of whether the utility supply is connected to and a voltage is present at the utility supply terminal. A power meter provides an indication of the magnitude of power drawn from the auxiliary supply when the auxiliary supply is connected to the load.
US09105406B2	Graphene electrolytic capacitor The disclosure describes an improved electrolytic capacitor, more specifically, an electrolytic capacitor with a graphene-based energy storage layer and dielectric, and a method of making the improved electrolytic capacitor. The electrode with layered graphene energy storage and dielectric layers may be used in a variety of electrolytic capacitor configurations.
US09105401B2	Wet electrolytic capacitor containing a gelled working electrolyte A wet electrolytic capacitor is provided. The capacitor contains an anode comprising an anodically oxidized pellet formed from a pressed and sintered powder, a cathode that contains a metal substrate coated with a conductive polymer, and a working electrolyte in communication with the anode and the cathode. The working electrolyte is in the form of a gel and comprises an ammonium salt of an organic acid, inorganic oxide particles, an acid, and a solvent system that comprises water. The working electrolyte has a pH value of from about 5.0 to about 8.0.
US09105399B2	Method of manufacturing a solid electrolytic capacitor having solid electrolytic layers and an amine compound layer A solid electrolytic capacitor according to an aspect of the present invention includes an anode conductor including a porous valve metal body, a dielectric layer formed on a surface of the anode conductor, and a solid electrolyte layer including a conductive polymer layer formed on a surface of the dielectric layer, in which the solid electrolyte layer includes a first solid electrolyte layer formed on a surface of the dielectric layer, and a second solid electrolyte layer formed on a surface of the first solid electrolyte layer, and at least one continuous or discontinuous layer containing an amine compound exists between the first and second solid electrolyte layers, and inside the second solid electrolyte layer.
US09105396B2	Superconducting flat tape cable magnet A method for winding a coil magnet with the stacked tape cables, and a coil so wound. The winding process is controlled and various shape coils can be wound by twisting about the longitudinal axis of the cable and bending following the easy bend direction during winding, so that sharp local bending can be obtained by adjusting the twist pitch. Stack-tape cable is twisted while being wound, instead of being twisted in a straight configuration and then wound. In certain embodiments, the straight length should be half of the cable twist-pitch or a multiple of it.
US09105393B2	Amorphous core transformer An amorphous core transformer is provided which is capable of effectively suppressing influences, fluctuation, displacement or the like of a coil caused by an electromagnetic mechanical force or the like. In an amorphous core transformer 100 including an amorphous core 101, a plurality of coils 102 in which the amorphous core 101 is inserted and a fixing metal frame 110 that assembles the coils 102 and the amorphous core 101, the inter-coil member 106 is interposed between the neighboring coils 102 and the inter-coil member 106 is positioned and held by a positioning member 107. Thus, it is possible to prevent the coils 102 from being deformed or displaced beyond the inter-coil member 106 and maintain the shape of the coils 102.
US09105391B2	High voltage hold-off coil transducer Disclosed herein are various embodiments of coil transducers configured to provide high voltage isolation and high voltage breakdown performance characteristics in small packages. A coil transducer is provided through and across which data or power signals may be transmitted and received by primary and secondary coils disposed on opposing sides thereof without high voltage breakdowns occurring therebetween. A central core layer separates the transmitting and receiving coils, and has no vias disposed therethrough. At least portions of the coil transducer are formed of an electrically insulating, non-metallic, non-semiconductor, low dielectric loss material.
US09105386B2	Electro-mechanical device and associated method of assembly A method of setting an air gap between an electromagnetic coil and an armature of an electro-mechanical device to be within a desired range includes applying a sensing signal to the electromagnetic coil and monitoring at least one electrical characteristic of the electromagnetic coil. The at least one electrical characteristic is related to a size of the air gap and the sensing signal. The method further includes moving the armature towards the electromagnetic coil to reduce the size of the air gap and stopping movement of the armature towards the electromagnetic coil when the at least one electrical characteristic indicates the size of the air gap is within the desired range.
US09105385B2	Superconductive electromagnet apparatus Provided is a superconductive electromagnet apparatus including a thermal anchor, a plurality of wires and a cryogenic cooling device which cools the thermal anchor. The thermal anchor includes a body part, at least one connecting part disposed on a surface of the body part and made up of a conductive material. The plurality of wires is connected to the connecting part.
US09105382B2	Magnetic composite The invention relates to a polymer composite having magnetic properties that are enhanced or increased in the composite. Such properties include color, thermal conductivity, electrical conductivity, density, improved malleability and ductility viscoelastic and thermoplastic or injection molding properties.
US09105380B2	Magnetic attachment system An improved magnetic attachment system involves a female component that is associated with a first object and a male component that is associated with a second object. The female component includes a hole and a first magnetic structure having a first plurality of magnetic source regions having a first polarity pattern. The male component includes a peg that can be inserted into the hole and a second magnetic structure having a second plurality of magnetic source regions having a second polarity pattern complementary to said first polarity pattern. The male and female component are configured such that when the peg is inserted into the hole the first and second magnetic structures face each other across an interface boundary enabling magnetic attachment of the first object to the second object, where while the peg remains inserted within the hole the male component can be rotated relative to the female component but translational movement of the male component relative to the female component is constrained.
US09105373B2	Safe method for manufacturing silver nanoparticle inks In an embodiment, there is a method of preparing a conductive ink formulation. The method can include dissolving a stabilizer in a first solvent, adding a reducing agent to the first solvent, adding a metal salt to the first solvent and forming a slurry by precipitating stabilized metal nanoparticles in the first solvent. The method can also include forming a wet cake of the stabilized metal nanoparticles and adding the wet cake to a second solvent. The second solvent can include at least one of a polyvinyl alcohol derivative. The wet cake may not be actively dried prior to being added to the second solvent.
US09105371B2	Cathode active material and lithium secondary battery comprising the same Disclosed is a cathode active material (and secondary battery comprising the same) comprising a combination of a lithium manganese composite oxide having a spinel structure represented by the following Formula 1 with a lithium nickel composite oxide represented by the following Formula 2, the cathode active material having a broad potential region at 3.0 to 4.8V upon initial charge: LixMyMn2−yO4−zAz (1) wherein 0.9≦x≦1.2, 0
US09105369B2	Differential phase-contrast imaging with improved sampling The present invention relates to differential phase-contrast imaging of an object. For increasing spatial resolution of an X-ray imaging system (2) the size of a detector pixel element (8) may be considered a limiting factor. Accordingly, it may be beneficial to increase the resolution of an apparatus (38) for phase-contrast imaging without further reducing the area of an individual pixel element (8). Accordingly, an apparatus (38) for phase-contrast imaging with improved sampling is provided, comprising an X-ray source (4), a first grating element G1 (24), a second grating element G2 (26) and an X-ray detector element (6) comprising a plurality of detector pixel elements (8), each detector pixel element (8) having a pixel area A. An object to be imagined (14) is arrangeable between the X-ray source (4) and the X-ray detector element (6). The first grating element G1 (24) as well as the second grating element G2 (26) are arrangeable between the X-ray source (4) and the X-ray detector element (6). The X-ray source (4), the first grating element G1 (24), the second grating element G2 (26) and the X-ray detector (6) are operatively coupled for acquisition of a phase-contrast image of the object (14). At least one of the first grating element G1 (24) and the second grating element G2 (26) comprise a first area A1 having a first grating pitch p1 and a second area A2 having a second grating pitch p2 different from the first grating pitch.
US09105368B2	Infrared radiation element An infrared radiation element includes: a first insulating layer having heat insulating properties and electrically insulating properties; a heating element layer provided on the first insulating layer and configured to radiate infrared radiation when energized; and a second insulating layer provided on an opposite side of the heating element layer from the first insulating layer and having heat insulating properties and electrically insulating properties. The second insulating layer transmits the infrared radiation radiated from the heating element layer. The heating element layer has such a sheet resistance that impedance of the heating element layer matches impedance of space which is in contact with the second insulating layer.
US09105364B2	Apparatuses for stabilizing fuel containing reactive sodium metal A method of stabilizing a fuel containing a reactive sodium metal may include puncturing a cladding of a fuel pin enclosing the fuel containing the reactive sodium metal to form an injection passage and an extraction passage. A reaction gas may be injected into the fuel pin through the injection passage to react with the reactive sodium metal to form a stable sodium compound. A ratio of a product gas and a remaining quantity of the reaction gas exiting the fuel pin through the extraction passage is subsequently measured, wherein the product gas is a reaction product of the reaction gas and the reactive sodium metal within the fuel pin. Once the measured ratio indicates that a reaction between the reaction gas and the reactive sodium metal is complete, the injection passage and the extraction passage are sealed so as to confine the stable sodium compound within the fuel pin.
US09105362B2	Apparatus and a method for cleaning of a nuclear fuel element The present invention relates to an apparatus and a method for cleaning a nuclear fuel element in a liquid filled space. The fuel element comprises an inner space with an opening. The apparatus comprises a connecting element, which is adapted to be connected to a portion of the fuel element, which comprises said opening and flow means, which is adapted to create, at least during a part of a cleaning process of the fuel element, a liquid flow through inner space of the fuel element via said opening.
US09105361B2	Fault tolerant control line configuration A fault tolerant control line configuration useful in a variety of solid state memories such as but not limited to a flash memory. In accordance with some embodiments, an apparatus includes a plurality of memory cells, and a fault tolerant control line. The control line has an elongated first conductive path connected to each of the plurality of memory cells. An elongated second conductive path is disposed in a parallel, spaced apart relation to the first conductive path. A plurality of conductive support members are interposed between the first and second conductive paths to support the second conductive path above the first conductive path.
US09105342B2	Read circuit for memory Embodiments are directed to detecting a state of a memory element in a memory device, comprising: applying a pulse of a predetermined magnitude and duration to the memory element to induce a transition in the state of the memory element when a polarity of the pulse is opposite to the state, monitoring, by a device, a signal associated with the memory element to detect a presence or absence of a transition in the signal in an amount greater than a threshold, and determining the state of the memory element based on said monitoring.
US09105340B2	Reducing source loading effect in spin torque transfer magnetoresistive random access memory (STT-MRAM) A memory cell comprises a magnetic tunnel junction (MTJ) structure that includes a free layer coupled to a bit line and a pinned layer. A magnetic moment of the free layer is substantially parallel to a magnetic moment of the pinned layer in a first state and substantially antiparallel to the magnetic moment of the pinned layer in a second state. The pinned layer has a physical dimension to produce an offset magnetic field corresponding to a first switching current of the MTJ structure to enable switching between the first state and the second state when a first voltage is applied from the bit line to a source line coupled to an access transistor and a second switching current to enable switching between the second state and the first state when the first voltage is applied from the source line to the bit line.
US09105335B2	Semiconductor memory device According to one embodiment, a semiconductor memory device includes a memory cells, a selection transistor, a memory string, a block, and a transfer circuit. The memory cells are stacked on a semiconductor substrate. In the memory string, the memory cells and the selection transistor are connected in series. The block includes a plurality of memory strings. In data write and read, the transfer circuit transfers a positive voltage to a select gate line associated with a selected memory string in a selected block, and a negative voltage to a select gate line associated with an unselected memory string in the selected block, and to a select gate line associated with an unselected block.
US09105332B2	Variable resistance nonvolatile memory device Provided is a variable resistance element (Rij) the resistance state of which is reversibly changed by applying electrical signals of different polarities; and a current steering element (Dij) in which a first current is larger than a second current, the first current being a current which flows when a voltage of the first polarity having a first value is applied, the first value being less than a predetermined voltage value and having an absolute value greater than zero, the second current being a current which flows when a voltage of the second polarity having an absolute value which is the first value is applied, the second polarity being different from the first polarity, in which Rij and Dij are connected in series such that the polarity of a voltage to be applied to Dij is the second polarity when the resistance state of Rij is changed to high resistance state.
US09105331B2	Semiconductor memory apparatus and method of operating using the same A semiconductor memory apparatus includes a resistive memory cell coupled between a bit line and a bit line bar; a control unit configured to couple the bit line to a first node and apply a reference voltage to a second node in response to a first sense amplifier enable signal and a second sense amplifier enable signal; a data output sense amplifier configured to sense and amplify a voltage of the first node and a voltage of the second node; a data transfer unit configured to couple the first and second nodes to a data line and a data line bar in response to a column select signal; and a data input unit configured to drive the bit line and the bit line bar according to voltage levels of the first and second nodes in response to a write enable signal.
US09105329B2	Gate driving circuit and display device using the same An embodiments herein relate to a gate driving circuit and display device which include a plurality of shift registers. The gate driving circuit comprises: a plurality of shift registers, wherein each of the shift registers includes a plurality of stages which sequentially output a gate signal, wherein the stages of a kth shift register are activated when a kth SR selection signal generated as a first logic level voltage is input, and the stages of the kth shift register are not activated when the kth SR selection signal generated as a second logic level voltage is input, wherein k is a natural number equal to or less than the number of the shift registers.
US09105328B2	Tracking signals in memory write or read operation A signal generating circuit includes a first circuit, a tracking circuit, and a delay circuit coupled with the first circuit and the tracking circuit. The first circuit is configured to receive a first clock signal and an output signal from an output of the delay circuit and to generate a second clock signal and at least one first tracking signal. The tracking circuit is configured to receive the at least one first tracking signal and to generate a second tracking signal. The delay circuit is configured to receive the second clock signal and the second tracking signal and to generate the output signal.
US09105323B2	Memory device power managers and methods Memory devices and methods are described that include a stack of memory dies and an attached logic die. Method and devices described provide for power management of portions of a stack of memory dies. Additional devices, systems, and methods are disclosed.
US09105321B1	Memory device and driving circuit adopted by the memory device A memory device and a driving circuit adopted by the memory device are disclosed. The driving circuit includes a power line, a ground line, and first and second data lines coupled between the power line and the ground line. Each data line comprises 4 driver groups. For the first data line, the first driver group contains an even-stage inverter driver, the second driver group contains the even-stage inverter driver, the third driver group contains an odd-stage inverter driver, and the fourth driver group contains the odd-stage inverter driver. For the second data line, the first driver group contains the odd-stage inverter driver, the second driver group contains the even-stage inverter driver, the third driver group contains the even-stage inverter driver, and the fourth driver group contains the odd-stage inverter driver. The even-stage inverter driver comprises an even number of inverters. The odd-stage inverter driver comprises an odd number of inverters.
US09105316B2	Integrated circuit package with multiple dies and a multiplexed communications interface A package includes a first die and a second die. An interface connects the first die and the second die. At least one of the first and second dies includes a memory. The interface is configured to transport both control signals and memory transactions. A multiplexing circuit multiplexes the control signals and the memory transactions onto the interface such that connections of the interface are shared by the control signals and the memory transactions.
US09105315B2	Controlling the voltage level on the word line to maintain performance and reduce access disturbs A semiconductor memory storage device for storing data including: a plurality of storage cells, each storage cell including an access control device configured to provide the storage cell with access to or isolation from a data access port in response to an access control signal. Access control circuitry includes: access switching circuitry configured to connect a selected access control line to a voltage source; and feedback circuitry configured to feedback a change in voltage on the access control line to the access switching circuitry. The access control circuitry is configured to respond to a data access request signal to access a selected storage cell connected to a corresponding selected access control line in response to the feedback circuitry providing a feedback signal indicating that the access control line voltage has attained a predetermined value.
US09105313B2	Memory device A memory cell includes a first transistor controlling writing of the first date by being in an on state, and holding of the first data by being in an off state, a second transistor in which a potential of one of a source and a drain is a potential of the second data and a potential of a gate is a potential of the first data, and a third transistor which has a conductivity type opposite to that of the second transistor, which has one of a source and a drain electrically connected to the other of the source and the drain of the second transistor, and in which a potential of a gate is a potential of the first data.
US09105311B2	Inter-word-line programming in arrays of analog memory cells A method includes selecting a word line for programming in an array of analog memory cells that are arranged in rows associated with respective word lines and columns associated with respective bit lines. Word-line voltages, which program the memory cells in the selected word line, are applied to the respective word lines. Bit-line voltages, which cause one or more additional memory cells outside the selected word line to be programmed as a result of programming the selected word line, are applied to the respective bit lines. Using the applied word-line and bit-line voltages, data is stored in the memory cells in the selected word line and the additional memory cells are simultaneously programmed.
US09105302B1	Reading narrow data tracks with multiple wide readers Technologies are described herein for utilizing multiple, wide readers to read narrow data tracks on a magnetic recording media in a storage device. A system for reading a data track on a magnetic recording media comprises a plurality of reader elements and a multi-reader decoder module operably connected to the plurality of reader elements. Each of the reader elements is configured to read a magnetic signal from the magnetic recording media. Each reader element may be wider than a width of the data track on the recording media. The multi-reader decoder module is configured to receive a read signal from each of the reader elements, and decode the data on the data track based on the read signals from the reader elements.
US09105301B2	Signal processing apparatus, signal processing method, and magnetic disk apparatus According to at least one embodiment, a signal processor apparatus includes a Viterbi decoder, a processor, and an adjustment module. The Viterbi decoder calculates a branch metric based on an input signal. The processor outputs a processing result correlated with a processing result of the Viterbi decoder. A latency of the processor for the input signal is lower than a latency of the Viterbi decoder. The adjustment module adjusts a first parameter for calculating the branch metric based on the processing result of the processor.
US09105299B2	Media data encoding apparatus and method A method and apparatus for encoding media content. In the field of video compression, temporal compression generates I-frames and dependent P-frames and B-frames. The placement of I-frames is determined by the presence of scene switches in the video. In order to improve the ability of a user to seek to interesting parts of the video, a video encoder considers semantic data identifying narrative points of interest within the video. The encoding process generates encoded video data having I-frames present at scene transitions and also at narratively interesting parts of the video.
US09105296B2	Electronic apparatus A slide cover is curved such that a central portion thereof in a front and rear direction is positioned higher than a front edge and a rear edge thereof. A disk accommodation section in which an optical disk is to be disposed is covered with the slide cover which is positioned at a closed position. A rotational driving portion configured to be fitted in a center hole of the optical disk to rotate the optical disk is provided on the disk accommodation section. With this electronic apparatus, the cost can be reduced, and an installation operation of an optical disk by a user can be facilitated.
US09105295B2	Pattern tone reversal A method for patterning a substrate is disclosed. Depressions are patterned into a resist layer over a substrate. A mask layer is deposited over the resist layer at least partially filling the depressions. The mask layer is etched to expose a top surface of the resist layer and leaving at least a portion of the mask layer in the depressions of the resist layer, wherein the mask layer over said top surface of the resist layer is etched at a faster rate than said mask layer in the depressions of the resist layer. Exposed portions of the resist layer are removed to expose portions of the substrate. Exposed portions of the substrate are etched.
US09105291B1	Tape recording head having non-parallel gaps and dissimilar transducer pitches An apparatus according to one embodiment includes a first array of transducers having a longitudinal axis defined between outermost transducers thereof, and a second array of transducers having a longitudinal axis defined between outermost transducers thereof. The longitudinal axes of the arrays are not parallel to one another. A method according to another embodiment includes determining an extent of tape dimensional instability. A tilt angle of a first array of transducers is adjusted to perform a readback operation based on the determined extent. The readback operation is performed. The first array of transducers has a longitudinal axis defined between outermost transducers thereof. A second array of transducers has a longitudinal axis defined between outermost transducers thereof. The longitudinal axes of the arrays are not parallel to one another.
US09105290B2	Discontinuous charge/discharge power source for retract application In accordance with one embodiment of the described technology, a retract controller capacitor is charged using a back electromagnetic force voltage to produce a backup power source voltage, the retract controller capacitor is discharged to power a retract controller circuit, and an actuator arm of a storage drive is driven toward a desired location concurrently with the discharging operation.
US09105289B1	Integrated servo field for memory device A pattern of features of a storage medium includes first features having a first logical state and second features having a second logical state, wherein a cross track dimension of the first features is different from a cross track dimension of the second features. A transducer of a memory device senses the pattern of features and generates a transducer signal. Read circuitry samples the transducer signal at a frequency of a sampling clock signal and generates a read signal from the sampled transducer signal. Servo electronics includes a demodulator that demodulates at least first and second orthogonal frequency components of the read signal. Timing circuitry synchronizes a phase of the sampling clock signal with a phase of the pattern of features using the first orthogonal frequency component. Position error circuitry generates a signal indicating a cross track positional offset of the transducer relative to the features using the first and second orthogonal frequency components.
US09105285B2	Waveguide having a metal alignment mark A waveguide structure includes a metal layer of a predetermined size on a substrate, a lower clad layer on the structure completely covering the metal layer, a core layer of a predetermined size on the lower clad layer at the location corresponding to the metal layer, and an upper clad layer thereon completely covering the core layer.
US09105283B2	Optical information recording medium An optical information recording medium is provided which comprises a laminate of unit structure sheets, each including an adhesive layer configured as an intermediate layer and at least one recording layer. The unit structure sheets are each made with the recording layer and the adhesive layer formed by applying materials in one specific application direction, and the unit structure sheets in one optical information recording medium are classifiable into pairs such that application directions therefor in each pair are shifted 180 degrees from each other.
US09105282B1	Head gimbal assembly carrier with adjustable protective bar A method, related to manufacturing of head gimbal assembly (HGA) including the steps of soldering a first component on a HGA, while the HGA is mounted on an HGA mounting member and while a protective carrier bar of the HGA carrier is in a first position. The method further includes the steps of moving the protective carrier bar to a second position, and soldering a second component on the HGA while the protective carrier bar is in the second position.
US09105281B2	Servo processor receiving photodetector signals A servo processor for an optical disk drive is provided that includes: an analog-to-digital converter for converting versions of photodetector output signals into digital signals; and a digital signal processor configured to receive the digital signals, the digital signal processor being further configured to determine a focus error signal (FES) and a tracking error signal (TES) from the digital signals, the digital signal processor being further configured to process TES and FES through servo algorithms to produce tracking and focus control signals.
US09105280B2	Reproduction apparatus and reproduction method In a holographic memory of an angle multiple recording system, when a hologram is reproduced, a light beam of a different polarizing direction is irradiated as reference light to a hologram recording medium and diffracted light is detected from the hologram recording medium.
US09105277B1	Controller, disk drive, and read processing method According to one embodiment, an equalizer is configured to obtain a noise included in a first correction signal by using a noise component of a first track and a noise interference component from a second track. The equalizer is configured to correct the first correction signal by using the obtained noise. The equalizer is configured to equalize the corrected first correction signal. The noise component of the first track is calculated based on a noise component of the first track at a first timing and a noise component of the first track at a second timing earlier than the first timing. The noise interference component from the second track is calculated based on a noise interference component from the second track at the first timing and a noise interference component from the second track at the second timing. The decoder is configured to decode the equalized first correction signal.
US09105276B2	System and method for providing controllable steady state current waveshaping in a hard disk drive (HDD) preamplifier Aspects of the disclosure pertain to a system and method for providing controllable steady state current waveshaping in a preamplifier of a data storage system (e.g., hard disk drive). The preamplifier provides an output including a write current waveform having a steady state current level that is controllable via the write block circuitry of the preamplifier. This enhances the ability of the waveform to promote improved on-track and off-track write performance.
US09105274B2	Optical disc inspection method in optical disc library apparatus and optical disc library apparatus An optical disc library apparatus, on which plural optical discs and plural optical drives are mounted, has the ability to reduce the degradation of recording/reproduction capability owing to the variation of temperature. In the optical disc library apparatus, causes for the quality degradation of the optical discs are analyzed; temperature inside the optical disc library apparatus is measured in order to make recoveries in accordance with the causes; an inspection cycle for inspecting the optical discs is determined on the basis of the measured temperature; and the inspection of recording qualities of optical discs on which data have already been recorded and that are stored in the optical disc library apparatus is performed by the optical drives on the basis of the measured temperature.
US09105272B2	Vocal source extraction by maximum phase detection Methods, apparatus and computer program products implement embodiments of the present invention that include receiving a time domain voice signal, and extracting a single pitch cycle from the received signal. The extracted single pitch cycle is transformed to a frequency domain, and the misclassified roots of the frequency domain are identified and corrected. Using the corrected roots, an indication of a maximum phase of the frequency domain is generated.
US09105270B2	Method and apparatus for audio signal enhancement in reverberant environment The present disclosure proposes a method and an apparatus to enhance reverberated speech by applying reverberation detection in conjunction with reverberation cancellation. The reverberation detection is based on Kurtosis of cross correlation of LPC residue and outputs the result of the reverberation detection to the reverberation cancelling system. The reverberation cancellation receives the result from the reverberation detection, and the cancellation is based on dual adaptive filtering in LP residue and time domain.
US09105263B2	Audio signal coding and decoding method and device Embodiments of the present invention provide an audio signal coding and decoding method and device. The coding method includes: dividing a frequency band of an audio signal into a plurality of sub-bands, and quantifying a sub-band normalization factor of each sub-band; determining signal bandwidth of bit allocation according to the quantized sub-band normalization factor, or according to the quantized sub-band normalization factor and bit rate information; allocating bits for a sub-band within the determined signal bandwidth; and coding a spectrum coefficient of the audio signal according to the bits allocated for each sub-band. According to embodiments of the present invention, during coding and decoding, signal bandwidth of bit allocation is determined according to the quantized sub-band normalization factor and bit rate information. In this manner, the determined signal bandwidth is effectively coded and decoded by centralizing the bits, and audio quality is improved.
US09105261B2	Sound outputting device According to an aspect, a sound outputting device includes a front unit, a first side unit, a second side unit, a sound transmitting portion, and a piezoelectric speaker. The first side unit is coupled to one end portion of the front unit. The second side unit is coupled to another end portion of the front unit. The sound transmitting portion is provided in the first side unit for transmitting a sound via cartilage conduction. The piezoelectric speaker vibrates the sound transmitting portion.
US09105258B2	Musical instrument A musical instrument is disclosed which comprises a first tubular member having an inlet end and an outlet end, an interior surface, and an exterior surface, and a second tubular member having an inlet end and a closed end, the second tubular member adapted for receiving the first tubular member for moving the first tubular member relative to the second tubular member, and the second tubular member for receiving and holding a liquid.
US09105257B2	Magnetic guitar slide holder The present invention is a slide holder for use with a guitar having a headstock and a plurality of strings to support a slide. The slide holder comprises a housing comprising a top surface, a bottom surface, and first and second cavities extending inward from the top surface. The slide holder further comprises a first magnet disposed in the first cavity and a second magnet disposed in the second cavity. The slide holder can be placed upon the headstock and under the strings of the guitar to magnetically secure the slide to the strings thereby providing a support for the slide when not used.
US09105251B2	Method for driving display device An object is to provide a convenient display device which consumes sufficiently small amount of power and a method for driving such a display device. The display device can be in an off state with a still image displayed in a still image display mode in which a pixel electrode and a common electrode which are for applying a voltage to the display element are brought into a floating state so that a voltage applied to the display element is held, and a still image is displayed without further supply of a potential. The display device is put to an off state with a desired image displayed in the still image display mode, whereby the display device can have a higher level of security and can be more convenient.
US09105250B2	Coverage compaction A method for compressing graphics data, the method comprising sorting a plurality of coverage masks into an order of descending number of samples covered by the plurality of coverage masks. A first coverage mask is identified. The first coverage mask comprises a greatest number of covered samples. Additional coverage masks of the plurality of coverage masks are compacted in the order of descending number of samples covered. Compacting additional coverage masks comprises removing samples from the coverage mask that are covered by any other compacted coverage mask.
US09105249B2	Energy conservation in a controller using dynamic frequency selection Systems and methods of adjusting a frequency of a graphics controller may include a logic to determine a metric associated with an input/output (I/O) queue. The metric may be used to determine whether an I/O limited condition exists. The I/O limited condition may be associated with a graphics controller. There may be a logic to cause a frequency of the graphics controller to be decreased when the I/O limited condition exists, and a logic to cause the frequency of the graphics controller to be increased when the I/O limited condition does not exist. The I/O limited condition may exist when a magnitude of the metric is equal to or greater than a first threshold. The I/O limited condition may not exist when the magnitude of the metric is equal to or less than a second threshold.
US09105243B2	Control device for liquid crystal display device, liquid crystal display device, method for controlling liquid crystal display device, program, and storage medium for program A liquid crystal driving circuit controls operations of display areas in a liquid crystal display panel based on a plural pieces of divided image data which are prepared by dividing image data for a single screen in accordance with the display areas in the liquid crystal display panel. In response to an luminance signal corresponding to an LED resolution generated by an LED resolution signal generating circuit based on image data for a single screen which is not divided, the LED driving circuit controls operations of LEDs provided in a backlight unit. With the configuration of at least one embodiment, according to a liquid crystal display device including a backlight, in a case where display image data for a single screen is divided into a plural pieces of divided image data for a plurality of areas of a display screen and images to be displayed in the plurality of areas are controlled based on the plural pieces of divided image data, display quality in a border area of the plurality of areas can be improved.
US09105240B2	Structure of light emitting device array and drive method for display light source Array of light emitting device is provided as the backlight for a display apparatus. A control means and drive method are provided utilizing a multiple scan selection drive scheme and a relaxation operation to eliminate the flicker and to enhance the speed of LC response and contrast ratio.
US09105237B2	Organic light emitting display and driving method thereof An organic light emitting display including a plurality of pixel circuits and a data driver, the organic light emitting display including a power supplier electrically coupled to the organic light emitting display panel, a voltage detecting unit electrically coupled to the organic light emitting display panel and adapted to detect a voltage supplied from the power supplier, and a controller electrically coupled to the voltage detecting unit and adapted to output a control signal to at least one of the power supplier and the data driver based on the detected voltage.
US09105234B2	Array substrate row driving unit, array substrate row driving circuit and display device An array substrate row driving unit, an array substrate row driving circuit and a display device. The array substrate row driving unit comprises an emission control module (12) and an gate driving module (11) for generating an gate driving signal. The emission control module (12), connected to the output for the gate driving signal of the gate driving module (11), for generating an emission control signal for controlling the switching of OLED under control of the gate driving signal. The gate driving signal having an opposite phase to that of the emission control signal.
US09105231B2	Display device A display device includes: a power supplying unit which outputs at least one of a high-side output potential and a low-side output potential; a display unit in which pixels are arranged in a matrix and which receives power supply from the power supplying unit; a monitor wire arranged along a column direction of the pixels in the matrix, which has one end connected to at least one pixel inside the display unit, and is for transmitting the high-side potential to be applied to the pixel; and a voltage regulating unit connected to the other end of the monitor wire, which regulates at least one of the high-side output potential and the low-side output potential to be outputted by the power supplying unit, to set a potential difference between the high-side potential and the low-side potential to a predetermined potential difference.
US09105220B2	Projector and control method A projector includes a light source, a light source control section adapted to control a luminance of light emitted from the light source, an acquisition section adapted to obtain an image signal, a projection section adapted to project image light obtained by modulating the light emitted from the light source based on the image signal obtained by the acquisition section, and the correction section adapted to correct the image signal, when the luminance of the light emitted from the light source changes under control of the light source control section, so that a variation in an output luminance of the image light projected by the projection section is increased to a level greater than the variation in the luminance of the light emitted by the light source.
US09105216B2	Color signal generating device An object of the present invention is to provide a color signal generating device where the size of the operational circuit is small and the speed of signal processing is fast. The color signal generating device for converting signals from a first color signal for forming a number of input pixels to a second color signal for forming a number of output pixels is provided with: a signal gradient detecting means for detecting a gradient of color signals in a reference pixel within the number of input pixels; a signal distributing means for comparing the first color signal for the reference pixel where the gradient is detected and the second color signal for the reference pixel of the number of output pixels corresponding to the reference pixel and stored in advance in the case where the gradient is detected, and distributing a color signal to a periphery pixel adjacent to the reference pixel having the second color signal in the case where the first color signal has a color which the second color signal does not; and a signal modifying means for converting the first color signal for forming a number of input pixels to a second color signal on the basis of the distributed color signal.
US09105214B2	Flat panel display and method for driving the same with multiple driving power modes Disclosed herein are a flat panel display which is capable of reducing consumption of standby power, and a method for driving the same. The flat panel display includes a display unit for displaying an image, a driving circuit for controlling driving of the display unit, a receiver for receiving a user command, and a power supply unit for setting a power mode to a driving mode or a standby mode according to a predefined power setting or the user command, and supplying driving power to the display unit, driving circuit and receiver in the driving mode and only to the receiver in the standby mode. When the power mode is set to the standby mode, the power supply unit generates the driving power using a battery contained therein and supplies the generated driving power to the receiver, and cuts off input of external power.
US09105211B2	Portable projector and image projecting method thereof A portable projector includes a projector module for projecting image data, an infrared ray output unit which outputs an infrared ray to a projected image data area, a camera unit which photographs the projected image data area, a coordinate value calculator which calculates a coordinate value corresponding to each coordinate value of the photographed projected image data area, and a controller which determines whether there is a pen or a finger input in the projected image data area according to the calculated coordinate value and performing a control for updating the image data by using an input coordinate value corresponding to the input when there is input by the one of the pen and the finger.
US09105210B2	Multi-node poster location A system for identifying an AR tag and determining a location for a virtual object within an augmented reality environment corresponding with the AR tag is described. In some environments, including those with viewing obstructions, the identity of the AR tag and the location of a corresponding virtual object may be determined by aggregating individual identity and location determinations from a plurality of head-mounted display devices (HMDs). The virtual object may comprise a shared virtual object that is viewable from each of the plurality of HMDs as existing at a shared location within the augmented reality environment. The shared location may comprise a weighted average of individual location determinations from each of the plurality of HMDs. By aggregating and analyzing individual identity and location determinations, a particular HMD of the plurality of HMDs may display a virtual object without having to identify a corresponding AR tag directly.
US09105208B2	Method and apparatus for graphic processing using multi-threading A method and apparatus for graphic processing using multi-threading includes at least one context task, mediation task, and control task executed by a processor. The at least one context task sequentially generates graphic commands. The mediation task mediates processing of the graphic commands. The mediation task may process a particular graphic command on behalf of the at least one context task, and change a processing order of the graphic commands. The control task transmits the graphic commands to a graphic hardware.
US09105207B2	Four dimensional image registration using dynamical model for augmented reality in medical applications Technologies described herein generally provide for an improved augmented reality system for providing augmented reality images comprising a pre-operative image superimposed on a patient image. The accuracy of registering the pre-operative image on the patient image, and hence the quality of the augmented reality image, may be impacted by the periodic movement of an organ. Registration of the pre-operative image on the patient image can be improved by accounting for motion of the organ. That is, the organ motion, which can be described by a dynamical model, can be used to correct registration errors that do not match the dynamical model. The technologies may generate a sequence of 3-D patient images in real-time for guided surgery.
US09105205B2	Merchandise labeling A unitary sheet-like merchandise labeling article that has a labeling tag flatly conjoined along a unifying flat bond zone with a flexible elastic layer that extends away from the tag and includes an elastic fastening loop. The loop sides that define the loop are wider than the thickness of the elastic layer. Further, the flexible elastic layer that extends away from the tag has a thickness greater than the thickness of the tag and has a dispersion zone adjacent the unifying flat bond zone. The dispersion zone allows dissipation of elastic loop in-line stretching forces sufficiently to reduce transmission of such forces into the bond zone.
US09105204B2	Labeling tag with expandable loop and pocket, and method of manufacture A labeling tag (10, 210, 410, 510, 610, 710), comprising a tag portion (12, 212, 412, 512, 612, 712), and a film (28, 228, 428, 528, 628, 728) disposed over the tag portion (12, 212, 412, 512, 612, 712) and bonded to the tag portion (12, 212, 412, 512, 612, 712) at multiple locations to define a pocket (16, 216, 416, 516, 616, 716) between the film and the tag portion (12, 212, 412, 512, 612, 712). The labeling tag (10, 210, 410, 510, 610, 710) further comprising an elastomer portion (14, 214, 414, 514, 614, 714) secured to the tag portion (12, 212, 412, 512, 612, 712), and having an expandable loop (34, 234, 434, 534, 634, 734).
US09105203B2	Methods and systems for identifying product A method and system for identifying product is disclosed. A product identifier having product identifying information for one of a plurality of consumable products is provided. The product identifier is selected for a consumable product. The product identifier is displayed at or near a location on a dispensing system, or where access to the consumable product is provided. The system uses a product identifier having product and/or brand information for one or more consumable products. A window is provided in a body of a dispenser or dispensing system for viewing the product identifier associated with the consumable product therein.
US09105201B1	Behavior modification apparatus and method of use A behavioral modification system including an apparatus and a method of use thereof. The behavioral modification system further includes a locket and a plurality of milestone elements that are operable to be releasably secured to the locket. The locket further includes a central processing unit and an electromagnet disposed therein. A timing chip is circumferentially mounted to the plurality of milestone elements and is operably coupled with the central processing unit. A reward element is further included wherein the reward element is operable to provide access to the interior volume of the locket. The milestone elements and the reward elements are formed in the shape of keys and function to provide physical representations of achieved goals directed toward a behavior change.
US09105197B2	Toothbrush monitoring device The invention relates to a toothbrushing monitoring device (18). In order to obtain an efficient monitoring device, the monitoring device comprises: an input device (21), an acceleration sensor, a signal conditioner, a memory, a comparator which compares the numbers of brushing cycles registered by each teeth surface specific counter during brushing with corresponding reference values maintained in said memory, and an output device (27) which indicates that the brushing of the teeth region (L-U) in question is accepted.
US09105190B2	Driving support system for a vehicle When a solid object is recognized in the direction of movement of an own vehicle, in a system which carries out driving support of a vehicle, turning control of the own vehicle is performed by a support control unit in order to avoid a collision with the solid object. Then, the turning control by the support control unit is stopped by a turning control stop unit, in cases where a correlation between a vehicle state related to turning of the own vehicle and a value of a predetermined parameter related to the turning control does not belong to a range of normal state set in advance, after the turning control by the support control unit has been started. This stops excessive steering of a steering resulting from a low friction of a traveling road surface, so that a strange or uncomfortable feeling of a driver can be eliminated.
US09105189B2	Route guidance system and method Device, system and method, in a vehicle communication system, of providing guidance, route and safety information to a driver. Embodiments use the observation and storage of signal light timing information to make recommendations. Embodiments include computation of future times of signal light changes. Embodiments use information relating to the number of vehicles, location of vehicles, and speed of vehicles in a plurality of lanes approaching a signal to recommend lane changes to a driver. Embodiments include receiving timing information wirelessly about signal timing. Embodiments include using historical information to compute a risk value for a location and then generating a recommendation to a driver responsive to that risk value. Embodiments include using speed of travel on route options to compute an expected travel time, and then generating a recommendation to a driver responsive to those computed travel times.
US09105186B2	Method for aiding the taxiing of an aircraft The invention relates to a method for aiding the taxiing of an aircraft comprising a plurality of onboard propulsion means and which is able to move over an airport zone according to at least one specific taxiing procedure making it possible to reduce fuel consumption, the method being characterized in that it implements the following steps during the phase of taxiing of the aircraft on an airport:Checking of the taxiing conditions for the implementation of the said taxiing procedure and calculation of the implementation parameters of the procedure, Calculation of the taxiing performance data resulting from the implementation of the taxiing procedure, Display of the taxiing directives and performance related to the taxiing procedure, Monitoring of the parameters of the avionics systems during the implementation of the taxiing procedure.The invention applies to taxiing plan formulation systems and/or aircraft monitoring systems.
US09105182B2	Communication system and portable machine A communication system includes a portable machine having an identification code registered in a controlled object, the portable machine being capable of conducting wireless communications with the controlled object, and a portable terminal being capable of conducting noncontact wireless communications with the portable machine, wherein after noncontact wireless communications start between the portable machine and the portable terminal, the noncontact wireless communications are inhibited when a predetermined condition is satisfied, and then do not resume unless a specified instruction is given.
US09105172B2	Drowsiness-estimating device and drowsiness-estimating method A drowsiness-estimating device capable of improving the precision of drowsiness estimation by eliminating the effect of individual differences. In the device, a recurrence required time-calculating part (103) calculates the recurrence required time, which is the time needed, after a detection time when an action is detected, for a drowsiness estimation parameter value acquired after the detection time to return to the value of the drowsiness estimation parameter acquired before the detection time. A drowsiness-estimating part (104) estimates the level of drowsiness of the drowsiness-estimation subject on the basis of the calculated recurrence required time. To be specific, the drowsiness-estimating part (104) maintains a drowsiness level-estimating table in which each of multiple time ranges is correlated with a possible drowsiness level, and specifies a possible drowsiness level that corresponds to the time range, among the multiple time ranges, with which the recurrence required time is associated.
US09105163B2	Methods, apparatuses, and computer program products for associating notifications with alert functions of remote devices Methods, apparatuses, and computer program products are herein provided for associating notifications with alert functions of remote devices. A method may include causing transmission of an alert configuration signal to each of a plurality of remote devices. The alert configuration signal instructs each of the plurality of remote devices to perform an alert function. The method may further include receiving user input indicating the user's desire to associate a notification corresponding to an event with the alert function of at least one of the plurality of remote devices. The method may further include associating the notification with the alert function of the at least one of the plurality of remote devices such that the at least one of the plurality of remote devices performs the alert function when the event occurs. Corresponding apparatuses and computer program products are also provided.
US09105156B2	Gaming device method and apparatus employing modified payouts The invention includes a system and method for a gaming device to determine when to offer a player an opportunity to play using a “jackpot only” pay table. The player may choose to accept the gaming device's offer to switch from using a conventional pay table to using a pay table that only pays top payout amounts. Play with a jackpot only pay table may only require a small wager amount as compared to play with a conventional pay table. Play with a jackpot only pay table may be automated to generate outcomes quickly to allow a player to relatively inexpensively avoid spending time playing a gaming device perceived to be in a “cold period.”
US09105154B2	Gift exchange and trading game This game is a method performed by a processor for playing this item exchange game at a party or other gathering, for the purpose of enhancing the enjoyment and interaction of the participants while exchanging gifts or trading items. The game is played with virtual Turn Cards, Trader Cards, and Block Cards. The computer establishes the order of play to be displayed on the turn cards, and the trader cards instruct a player to select an unclaimed item, which concludes the turn. The trader card may instruct the player to take a turn card or claimed item from a Targeted Player. The Targeted Player may give up the turn card or claimed item, or may request a block card with instructions to prevent the player from taking the Targeted Player's turn card or claimed item. A turn is completed when a player selects an unclaimed item. The game ends when no unclaimed items remain.
US09105153B2	Gaming system and gaming machines utilizing cash tickets having a feature trigger A casino gaming system includes gaming machines which are configured to accept and read tickets. The ticket may comprise cash-value tickets or non-cash value tickets. The tickets may also include secondary feature triggering indicia. A player may obtain a ticket from a system kiosk. The player may then present that ticket to a gaming machine, such as by inserting it into a media reader such as a bill acceptor. Associated monetary value or non-monetary credits may be credited to the machine. In addition, if the ticket includes a feature triggering indicia, when such an indicia is detected, the gaming machine preferably triggers or initiates the feature.
US09105145B2	Commercial currency handling and servicing management Aspects of the invention provide for an end-to-end currency handling, and servicing apparatus. The apparatus may be used in any cash-centric business or enterprise for cash register till set up and balancing, back office reconciliation, and other cash payment handling activities. Further aspects of the invention provide real-time access to cash receipts for enterprise use in making financial and planning decisions.
US09105143B1	Persistent authentication Techniques for supporting a mobile financial service that enables a customers to enroll the customer's mobile phone number and register accounts are disclosed. A persistent authentication request is received from a customer, and the customer is authenticated based on authentication information provided by the customer. The customer enters a device identification of the communication device so that the device identification is registered and linked to the customer's profile. When the customer requests non-actionable information (e.g., account balance and transaction history information) by calling a customer service center with a registered communication device, the calling identification is provided to the customer service center by the incoming call. The customer service determines whether the calling identification corresponds to a registered number. If so, the customer service center provides the requested non-actionable information to the communication device without further authentication.
US09105141B2	Game system A game system is provided which is capable of continuing a game without a player feeling inconvenience even in a case where a basic currency at hand is lost.This game system includes: a bill identifying apparatus for identifying bills of different currencies and an amount of the bills and then outputting data representing the identified result; a player tracking device which is integrated with each of gaming machines, for converting data outputted from the bill identifying apparatus to credit data for executing a game, based on an exchange rate; and an information card device which is integrated with the player tracking device, the information card device causing an information card to store data equivalent to an amount awarded to a player in accordance with a game result of the gaming machines and sending out the credit data for executing the game to the gaming machines, based on the data equivalent to the amount read from the information card.
US09105132B2	Real time three-dimensional menu/icon shading An image display apparatus, comprising: a two-dimensional display for displaying three-dimensional object images; an imaging unit for capturing an image of a user who is in the state of viewing the display screen; a processing unit for determining a face direction orientation of the user from the captured image; a tilt sensor for determining an angle of the image display apparatus; wherein the processing unit determines a virtual light direction by subtracting the angle of the image display apparatus from the face direction; and a projection image generator for projecting the three-dimensional objects onto the display, wherein lighting and shading is applied to the three-dimensional objects based on the virtual light direction is disclosed. A method for displaying three-dimensional images and a computer program for implementing the method are also disclosed.
US09105128B2	Adaptive image acquisition and processing with image analysis feedback Described are systems, methods, computer programs, and user interfaces for image location, acquisition, analysis, and data correlation that uses human-in-the-loop processing, Human Intelligence Tasks (HIT), and/or or automated image processing. Results obtained using image analysis are correlated to non-spatial information useful for commerce and trade. For example, images of regions of interest of the earth are used to count items (e.g., cars in a store parking lot to predict store revenues), detect events (e.g., unloading of a container ship, or evaluating the completion of a construction project), or quantify items (e.g., the water level in a reservoir, the area of a farming plot).
US09105127B2	Apparatus for generating volumetric image and matching color textured external surface Embodiments of the invention provide systems and methods for generating combined image data representing a volumetric image of a subject and a color textured external surface of the subject. According to one embodiment, two-dimensional image data and volumetric data of a subject is obtained using it two-dimensional imager and a volumetric scanner, respectively. The two-dimensional image data represent color texture of the subject, and the volumetric data represents both an internal and external structure of the subject. An opacity threshold of the volumetric data is set to render an external surface of the subject without generating external surface mesh data. An array ray is extended from a view point of the two-dimensional image data to the external surface of the subject such that the external surface of the subject has an opacity level higher than the opacity threshold. The two-dimensional image data is mapped to the external surface of the subject based on the extended array ray, and combined image data comprising the two-dimensional image data and the volumetric data is generated.
US09105126B2	Systems and methods for sharing augmentation data Computationally implemented methods and systems include acquiring one or more first augmentations for inclusion in a first augmented view of a first scene, displaying the first augmented view including the one or more first augmentations, and transmitting augmentation data associated with the one or more first augmentations to facilitate remote display of one or more second augmentations in a second augmented view of a second scene, the second scene having one or more visual items that are also included in the first scene. In addition to the foregoing, other aspects are described in the claims, drawings, and text.
US09105125B2	Load balancing for optimal tessellation performance A system, method and a computer-readable medium for load balancing patch processing pre-tessellation are provided. The patches for drawing objects on a display screen are distributed to shader engines for parallel processing. Each shader engine generates tessellation factors for a patch, wherein a value of generated tessellation factors for the patch is unknown prior to distribution. The patches are redistributed to the shader engines pre-tessellation to load balance the shader engines for processing the patches based on the value of tessellation factors in each patch.
US09105121B2	Image editing with user interface controls overlaid on image A non-transitory machine readable medium that has a computer program for adjusting color values of an image represented in a color space. The image includes several pixels. Each pixel includes a set of color values. The computer program receives a selection of a location on the image. The computer program determines a type of content that is associated with the selected location on the image. From several different image editing operations, the computer program selects a set of image editing operations based on the determined type of content. The computer program displays a set of user interface controls that is associated with the selected set of image editing operations.
US09105116B2	System and method employing variable size binding elements in virtual rendering of a print production piece A system and method for a pre-print, three-dimensional virtual rendering of a print piece are disclosed. A plurality of modular/pipelined architectural layers are managed, operated, and organized by a controller. A product definition is provided to a job ticket adaptation layer where it is transformed into a physical model. The physical model is then transformed into a display model via the product model layer. The display model is transformed into a scene that can be displayed on a graphical user interface as a three dimensional virtual rendering by a rendering layer, where the rendering includes one or more binding elements to satisfy the product definition. The binding elements may include 3D binding models as well as 2D textures on 3D surfaces to simulate 3D models.
US09105113B1	Method and system for efficiently rendering circles A graphics processor method and system for rendering a circle. The method includes the step of accessing an instruction to render a circle. A square is defined using at least one graphics primitive, and a circle is defined within the square, wherein a center of the circle corresponds to a center of the square and wherein a radius of the circle is defined by a width of the square. The circle is rasterized into at least one pixel and a coverage value is determined for each pixel of the circle by comparing a distance from the pixel to the center of the circle with the radius of the circle. Each pixel is then shaded in accordance with the coverage value.
US09105112B2	Power management for image scaling circuitry Techniques are disclosed relating to power management within an integrated circuit. In one embodiment, a display buffer receives image data through a data transfer interconnect. A data transfer interconnect is powered down based on the received image data being greater than a threshold amount of data. The display buffer transmits at least a portion of the image data to one or more outputs, and in response to the transmitting, the data transfer interconnect is powered up. In some embodiments, the display buffer includes a plurality of line buffers, each configured to store a respective image source line. In such an embodiment, a display pipe configured to render images to be displayed includes the display buffer, and the powering down is performed in response to the received image data including two or more image source lines.
US09105106B2	Two-dimensional super resolution scaling For scaling an input image into an output image, the method comprises, for a point of the output sampling grid which is not in the input sampling grid: calculating a plurality of interpolated pixel values by applying respective interpolators; determining respective loss values associated with the interpolated pixel values; and providing a pixel value of the output image using at least one of the interpolated pixel values selected by minimizing the loss value. The set of interpolators includes two-dimensional interpolators In of the form (I) for values of a parameter n such that \|n\|≧1 and two-dimensional interpolators I′m of the form (II) for values of a parameter m such that \|m\|≧1, where x and y are spatial indices identifying the point of the output sampling grid, j and k are integer spatial indices identifying points of the input sampling grid, f and g are one-dimensional interpolation functions, at least one of f and g having a support]−p; p[ with p>1, and I(j, k) is the value of the pixel at coordinates (j, k) in the input grid.
US09105105B2	Imaging device, imaging system, and imaging method utilizing white balance correction An imaging device includes a histogram unit that extracts luminance information from video signals obtained by image capture and generates a histogram, a white balance detector unit that detects the deviation in the white balance of the video signal, and a white balance processor unit that corrects the white balance of the video signal; and along with selecting the imaging conditions of the imaging unit based on the deviations detected by the white balance detector unit, also controls the white balance processor unit. When there is a large deviation in the white balance, the imaging device decides whether or not to correct the white balance according for example to the hue.
US09105102B1	Method for processing radiographic images of rapidly moving objects such as shaped charge jet particles According to exemplary inventive practice, a region containing an object of interest, such as a jet particle of a shaped charge, is extracted from a raw radiographic image. This regional image is filtered, and its pixel intensity range is rescaled to increase contrast. The filtered, re-contrasted image is converted to a binary image by setting a threshold pixel intensity, and assigning a binary pixel intensity of either 1 or 0 to each pixel, depending on its scaled pixel intensity versus the threshold pixel intensity. The binary image is inverted and filtered. Contiguities of binary-one pixels to binary-zero pixels in the inverted, filtered binary image provide the basis for delineating the outline of the object. The object's outline is superimposed on the object's portrayal in the original regional image, to assess the degree of match. Various threshold pixel intensities can be applied in plural iterations until a sufficient match is obtained.
US09105098B2	Detection and tracking of moving objects A system and computer program product for performing visual surveillance of one or more moving objects include registering one or more images captured by one or more cameras, wherein registering the one or more images comprises region-based registration of the one or more images in two or more adjacent frames, performing motion segmentation of the one or more images to detect one or more moving objects and one or more background regions in the one or more images, and tracking the one or more moving objects to facilitate visual surveillance of the one or more moving objects.
US09105097B2	Method for determining relative motion with the aid of an HDR camera In a method for detecting a motion of an object with the aid of an image recording system (e.g., HDR camera) which includes an image sensor, a first reset and a second reset are performed at a time interval during the exposure of the image sensor, an extent of a region of constant brightness is measured from the image of an object, and the motion (direction, velocity, and optionally acceleration) of the object is ascertained from the relationship between the measured extent and the time interval between the first and second resets. This motion determination is achieved with the aid of a single image.
US09105095B2	Method and device for image processing, notably to process medical images A method to transmit a label between two images, characterized in that the method includes the following steps: providing a first image, the first image comprising several sets of connected points, each set being characterized by a label, providing a second image, from the second image, determining several sets of connected points, superimposing the two images to determine the common parts and non-common parts of the sets in the first and second image, giving each common part of the second image, the label of the set in the first image with which said part is common, giving each non-common part of the second image in contact with a single set of connected points in the first image, the label of said set, giving a new label to each non-common part of the second image not in contact with any set in the first image.
US09105090B2	Wide-angle lens image correction A system for correcting distortion effects in a distorted image includes a memory controller for reading pixels (corresponding to a subset region in a destination image) of the distorted image from a system memory to local memory. A look-up table stores an offset and interpolation weight for each pixel, and an ALU computes, using stored values only in the local memory, values of each of the pixels in the region in the destination image.
US09105089B2	Image processor, image pickup apparatus, image pickup system and data processing method An image processor includes an extracting unit and a synthesizer. The extracting unit extracts partial image data corresponding to a set color from pickup image data of first to (N−1)-th frames of the first to N-th frames output from an image pickup unit within one video recording cycle. The extracting unit estimates a region-to-be-extracted based on a color of a pixel from pixels constituting the first to (N−1)-th frames, stores pixel values of pixels included in the estimated region-to-be-extracted, determines validity of the estimated region-to-be-extracted, and stores, in a storage unit, region information of the region-to-be-extracted that is determined as being validated. The synthesizer synthesizes the pixels of the region-to-be-extracted and the pickup image data of the N-th frame based on the region information to generate and output an output frame.
US09105087B2	System for uncollimated digital radiography The inversion algorithm based on the maximum entropy method (MEM) removes unwanted effects in high energy imaging resulting from an uncollimated source interacting with a finitely thick scintillator. The algorithm takes as input the image from the thick scintillator (TS) and the radiography setup geometry. The algorithm then outputs a restored image which appears as if taken with an infinitesimally thin scintillator (ITS). Inversion is accomplished by numerically generating a probabilistic model relating the ITS image to the TS image and then inverting this model on the TS image through MEM. This reconstruction technique can reduce the exposure time or the required source intensity without undesirable object blurring on the image by allowing the use of both thicker scintillators with higher efficiencies and closer source-to-detector distances to maximize incident radiation flux. The technique is applicable in radiographic applications including fast neutron, high-energy gamma and x-ray radiography using thick scintillators.
US09105078B2	Systems and methods for local tone mapping Systems and methods for local tone mapping are provided. In one example, an electronic device includes an electronic display, an imaging device, and an image signal processor. The electronic display may display images of a first bit depth, and the imaging device may include an image sensor that obtains image data of a higher bit depth than the first bit depth. The image signal processor may process the image data, and may include local tone mapping logic that may apply a spatially varying local tone curve to a pixel of the image data to preserve local contrast when displayed on the display. The local tone mapping logic may smooth the local tone curve applied to the intensity difference between the pixel and another nearby pixel exceeds a threshold.
US09105075B1	Enhancing seismic features using an optical filter array Seismic stratigraphic features may be enhanced using orientation vectors. In one example, a process includes converting a seismic attribute section from a spatial domain to a spatial-frequency domain using a Fourier transform. For each filter in an orientation filter array, the seismic attribute section is convolved with a filter in the spatial-frequency domain. The convolution result is converted back to the spatial domain by inverse Fourier transform. For each point in the seismic section an orientation filter having a response with a maximum energy is found and the orientation is associated with the corresponding energy and the corresponding point.
US09105073B2	Method and system of producing an interactive version of a plan or the like A method of producing an interactive plan of a location from an optical image of a plan of the same location, wherein the location includes a plurality of features of different types such as cabins and corridors, the method comprising the steps of applying a complex geometry and character recognition (COGCR) process to the optical image to determine a plurality of functional data representative of the plurality of features of different types; converting the plurality of functional data into a plurality of object models; combining the object models to construct the interactive plan for display to an end user.
US09105071B2	System management of clinical procedures scheduling based on environmental thresholds An approach for scheduling clinical procedures based on defined environmental thresholds of medical units in healthcare facilities. In one embodiment, a computer system monitors environmental conditions of the medical unit in which clinical procedures will be performed utilizing a measurement system that includes an environmental device for monitoring the environmental conditions. The computer system further receives a schedule of the clinical procedures of the medical unit. The computer system further identifies environmental thresholds for the medical unit to be used for comparison against the environmental conditions of the medical unit. The computer system further compares environmental conditions to the environmental threshold to determine if the environmental thresholds are violated. In another embodiment, the computer system modifies the schedule of clinical procedures of the medical unit responsive to the determination.
US09105070B2	Systems and methods for tracking parcel data acquisition In some embodiments, scripts may be used to perform parcel data acquisition, conversion, and clean-up/repair in an automated manner and/or through graphical user interfaces. The scripts may be used, for example, to repair geometries of new parcel data, convert multi-part parcel geometries to single part parcel geometries (explode), eliminate duplicate parcel geometries, append columns, create feature classes, and append feature classes. These scripts may be executed in a predetermined manner to increase efficiency. In some embodiments, different combinations of attributes may be appended to stored parcel data. In some embodiments, a tracking application may be used to track information about sources of data. In some embodiments, a tracking application may be used to track which system users are assigned to specific tasks (e.g., in a data acquisition project).
US09105067B2	Network resource pre-booking A base station associated with a cellular network may receive a request for a service from a user device. The base station may determine a current location of the user device. The base station may determine, based on the current location, a set of future locations for the user device. The base station may generate a set of schedules for the current location and the set of future locations. The set of schedules may allocate network resources to the user device at the current location and at each future location of the set of future locations. The base station may transmit the set of schedules to the user device.
US09105064B2	Transaction effects A method comprising creating and storing, in computer memory, a financial graph having nodes and edges, wherein the nodes include first nodes representing assets and second nodes representing any one or more of accounts in which one or more of the assets are held, individuals who own one or more of the assets, or legal entities who own one or more of the assets; obtaining, from an asset custodian data source, asset transaction data representing a plurality of financial transaction events; identifying a financial transaction type represented by one or more of the plurality of financial transaction events; generating, based on the identified financial transaction type, a plurality of transaction effect objects; wherein each of the plurality of transaction effect objects is associated with a particular edge in the financial graph and represents one of a credit to an account type associated with the particular edge and a debit from an account type associated with the particular edge.
US09105063B2	Systems and methods for providing a benefit product with periodic guaranteed minimum income The invention provides systems, and methods of using the systems, implementing a benefit product with a guaranteed minimum income, wherein payment into the benefit product securing the guaranteed minimum income. The system comprises an income recordkeeper interfacing with a plurality of savings recordkeepers, the income recordkeeper including (1) an income recordkeeper interface portion that inputs attributes to the benefit product funded by payments from a plan associated with the benefit product; and (2) an income recordkeeper record keeping system that implements the benefit product, the income recordkeeper record keeping system being in communication with the income recordkeeper interface portion, the income recordkeeper record keeping system: (a) monitoring transactions to the benefit product; and (b) determining, based on the transactions, a guaranteed minimum income associated with participation in the benefit product.
US09105057B2	System and method for correlating user call response to electronic messages A method of correlating voice calls with received electronic messages includes sending an electronic message associated with a second party to a first party; subsequently receiving a voice call from the first party by the second party; automatically determining whether the voice call resulted from the electronic message, based on electronically stored information about the sending of the electronic message and about the subsequently received voice call; and if it is determined that the voice call resulted from the electronic message, flagging the voice call to have a different status from voice calls not determined to have resulted from an electronic message.
US09105056B2	Methods and systems for communicating expense management information Methods and systems for communicating expense management information between an expense management system and a mobile device are provided. The methods and systems include one or more applications for a mobile device, such as mobile phone, that enable a user, such as an expense manager for an entity such as a business entity or other organization, to use their mobile device to communicate and exchange data with an expense management system, such as a telecommunications expense management system. The methods and systems enable an expense manager to review and approve invoices, generate graphics to review usage or other data, and conduct data searches relative to the expenses being managed.
US09105054B2	Method and system for automated online calendar-based donations In one example, we describe methods and systems for automated online merchant charity donations. In one embodiment, a donation agent interacting with a merchant website can offer an online user an option to allocate at least a portion of a payment for or price of a purchase, associated with a transaction made by the user via the merchant website, to be donated by a merchant corresponding to the merchant website on behalf of the user to a charity of the user's choosing. If the online user exercises the option, the donation agent can calculate an amount of the donation to be made and store the calculated donation amount in a database. The donation agent can disburse the calculated donation amount to the charity selected by the customer. The method also works for the off-line model. The system and method describe authentication and the way the charity funding is distributed, with respect to a calendar date and a specific event.
US09105053B2	Method and apparatus for determining a user age range An approach is provided for determining a user age range. An age estimator causes, at least in part, acquisition of voice data. Next, the age estimator calculates a first set of probability values, wherein each of the probability values represents a probability that the voice data is in a respective one of a plurality of predefined age ranges, and the predefined age ranges are segments of a lifespan. Then, the age estimator derives a second set of probability values by applying a correlation matrix to the first set of probability values, wherein the correlation matrix associates the first set of probability values with probabilities of the voice data matching individual ages over the lifespan. Then, the age estimator, for each of the predefined age ranges, calculates a sum of the probabilities in the second set of probability values corresponding to the individual ages within the respective predefined age ranges. Further, the age estimator determines the predefined age range to associate with the voice data based, at least in part, on the calculated sums of the probabilities.
US09105047B1	System, method, and computer program for providing content to a user utilizing a mood of the user A system, method, and computer program product are provided for providing content to a user utilizing a mood of the user. In use, data associated with a mood of a user is identified. Additionally, the mood of the user is determined, based on the data. Further, content is provided to the user, utilizing the mood of the user.
US09105044B2	Gamification for online social communities A computer server system provides an online community for customers of a business entity. A first level feedback module provides visual feedback to each user in a user interface for the online community, which quantifies each user's interaction with the community. A notification module sends an electronic message to a user when the user's interaction is below a predefined threshold rate. A second level feedback module calculates second level metrics that quantify other users' evaluations of postings to the online community by a first user. Visual feedback of the second level metrics is provided. A third level feedback module awards a designated achievement badge to users whose interaction metrics exceed predefined threshold values, and displays the achievement badge in the user interface. The system promotes a high level of user participation in the online community and thereby contributes to a low cost of technical support provided by the business entity.
US09105038B2	Methods, systems, devices and computer program products for presenting information related to celebrities The life history of a person or entity can be presented in a graphical representation of a highway. Life events may be represented by simple data strings, or by files such as photographs, dissertations, job offers, and love-letters, among others. For ease in viewing, the information representing the life history is categorized according to type (medical, educational, photographic, etc.) and placed in lanes corresponding to the type of information. The information is also organized by date, being placed between miles corresponding to temporal periods, for instance, years. Other graphical arrangements of stored information are also included.
US09105036B2	Visualization of user sentiment for product features Method, system, and computer program product are provided for visualization of user sentiment for one or more product features. The method may include: providing one or more product image templates, a product image template having a location representing a product feature; obtaining an aggregated sentiment score for a product feature from user generated content; mapping the aggregated sentiment score to a score visualization on a visualization scale; and representing the location in the product image template relating to the product feature with the score visualization for the aggregated sentiment score to provide a visualization of the product. The method may also include: collecting one or more text expressions from user generated content relating to a product feature; representing one or more text expressions in relation to the product feature in the product image template.
US09105035B2	Method and apparatus for customer experience segmentation based on a web session event variation Web session events are captured during different web sessions. A segmentation model is generated based on a number of occurrences of the web session events for different time stamp periods. The segmentation model plots a segmentation graph that may identify differences between the web session events with respect to time factors. The segmentation model may use the whole dataset of event occurrences as an input without any preliminary data segmentation or discrimination. The model can associate the web session events with the different geographic locations, reveal possible reasons for customer experience difference for the users from different locations and provide statistically sound explanation of this difference. The model is scalable and may work with big data acquired by web-based commerce sites with wide international customer base.
US09105032B2	Systems and methods to provide advertisements for real time communications Systems and methods to provide advertisements based on the content of documents in which the advertisements are presented. One embodiment includes: a web server to receive a request for an advertisement in reference to a document provided to a user by a content provider; a backend server to identify the advertisement based on relevancy of the advertisement to the content of the document and to associate a communication reference with the advertisement and the content provider, the web server to provide the advertisement and the reference for inclusion in the document; and a telecommunication server coupled to a session border controller and the backend server to receive a connection request via the reference, to determine contact information of the advertiser and identify the content provider based on the reference, and to establish the connection between the user and the advertiser using the determined contact information.
US09105030B2	System for selecting and purchasing products at a fixed price A gift system for selecting and purchasing products or services at a fixed price, including: a box containing a plurality of samples for presentation of a product or service of a single type, each product or service for which a sample is contained having an identical fixed price paid by the acquirer of the system; and a voucher for ordering a product or service chosen from among those for which a sample is contained in the box.
US09105026B1	Rolling interface transition for mobile display A method of implementing a rolling interface transition on a mobile device is disclosed. The method in one embodiment includes generating a first interface instance and a second interface instance on the mobile device; displaying the first interface instance on a display screen of the mobile device; detecting a motion of the mobile device through a sensor mechanically coupled to the mobile device; and rendering an interface transition visual effect such that the second interface instance replaces the first interface instance in an area of the display screen, and the area increases according to a progression of the motion.
US09105025B2	Enhanced near field communications attachment A secure fob that enables a user to pay for an item or items without needing to present a mobile device. A secure fob may include a proximity capability to ensure that a mobile device is within a particular range, thereby eliminating the risk of fraudulent charges on a stolen fob. In such an embodiment, a fob may be disabled if the fob is not paired with the mobile device by virtue of being disconnected and/or physically separated from the mobile device. The secure fob also may include enhanced features to authorize transactions and locate the mobile device and/or the secure fob.
US09105024B2	Method and system for the automated management of objects provided with RFID tags An automated method is provided for managing objects each provided with an RFID tag having at least one item of identification data associated with the object, the method including a step of reading at least one item of identification data stored in at least one RFID tag arranged on at least one object positioned at the reading site, and further including a deactivation of at least one RFID tag the item of identification data of which has been read so that it is not detected during a fraud detection step.A system implementing such a method is also provided.
US09105023B2	Methods and devices for transmitting and receiving data used to activate a device to operate with a server Embodiments of the systems, devices, and methods described herein generally facilitate transmission and reception of activation data for use in activating a mobile device to operate with a server. In accordance with one example embodiment, an activation barcode is received from a server by reading an image comprising the activation barcode via a computing device, wherein the image is displayed on a display associated with the computing device, and wherein the activation barcode encodes activation data comprising an activation password. The activation barcode is decoded at the mobile device to obtain the activation password, and an authentication is performed using the activation password after a device activation request is transmitted to the server, wherein the mobile device is activated to operate with the server if the authentication is successful.
US09105019B1	Method and system for depositing funds at a point of sale terminal A method for depositing funds into a financial account. The method includes obtaining a deposit request by a point of sale (POS) terminal, where the deposit request includes a virtual account number and a deposit amount, where the deposit amount matches an amount of funds received; identifying a financial account number associated with the virtual account number; and depositing funds matching the deposit amount into a financial account corresponding to the financial account number.
US09105013B2	Agent and customer avatar presentation in a contact center virtual reality environment A system and method are provided. A virtual reality environment rendering module provides a virtual reality environment representative of one or more of a contact center, a predictive dialer, and a media collaboration session. The virtual reality environment includes avatars representative of resources and entities to be serviced by the resources. Characteristic(s) of the avatars are selected based on collected information of various types.
US09105012B2	Providing customized information for mobile devices and efficiently searching the same Account information associated with a mobile device is obtained through a mobile wireless communication network from a database of subscriber account records for mobile wireless communication service subscribers. The account information may identify the previous mobile device, the mobile device, and/or length of usage of the mobile device. Advice information is selected from a database of advice regarding operation of the mobile devices such that the selected advice information is adapted for the account, and the selected advice information is then provided via a user interface element of the mobile device. Additionally, multiple levels of search related phrases, in which the phrases at each level correspond to a user-selected phrase at the previous level, are presented via a user element of a mobile device.
US09105006B2	Generating floating desktop representation of extracted model object Embodiments relate to systems and methods for generating a floating desktop representation of an extracted model object. Aspects relate to object-based modeling using modeling objects that can be extracted from spreadsheet cells, database entries, or other sources. A modeling client can host modeling logic and an application programming interface (API) to create, access, manipulate, and import/export modeling objects used in modeling applications, such as engineering, medical, financial, and other modeling platforms. In aspects, the source data can be accepted into the modeling client from consumer or business-level applications, whose cell, database, or other data content can be extracted and encapsulated in object-oriented format, such as extensible markup language (XML) format. An icon or other desktop representation can be generated to present the extracted model object for selection and use in the local environment of the modeling client. The extracted model object can also be exchanged with other applications or platforms.
US09105002B2	System and method for providing information to a recipient of a physical mail object A system and method is provided for transmitting information over a wide area network, such as the Internet, in response to receiving at least a portion of mail data. In one embodiment of the present invention, information is stored in a memory. Mail data is then affixed to a mail object. The mail object is then manually delivered to a recipient. The mail data is then provided to a reception device. The reception device then uses the mail data to retrieve the information from a mail device in communication with the memory. In a preferred embodiment, the mail data includes data corresponding to the recipient of the mail object, and the information includes data that identifies the recipient of the mail object and data that corresponds to a content of the mail object.
US09105000B1	Aggregating data from a plurality of data sources According to certain aspects, a computer system may be configured to aggregate and analyze data from a plurality of data sources. The system may obtain data from a plurality of data sources, each of which can include various types of data, including email data, system logon data, system logoff data, badge swipe data, employee data, job processing data, etc. associated with a plurality of individuals. The system may also transform data from each of the plurality of data sources into a format that is compatible for combining the data from the plurality of data sources. The system can resolve the data from each of the plurality of data sources to unique individuals of the plurality of individuals. The system can also determine an efficiency indicator based at least in part on a comparison of individuals of the unique individuals that have at least one common characteristic.
US09104998B2	Integrated production loss managment Current monitoring systems often provide the operating condition of a specific component and do not consider the impact of a specific failure upon an entire system or a business. Nor do the current systems provide an avenue for the business to predict the loss, as well as its impact, and make an educated decision of mitigating the loss based upon economic, environmental, and health and safety considerations. Methods and systems are provided for predicting loss events, impacts of loss events, and providing potential corrective measures to reduce or eliminate the occurrence or impact of the loss events. One aspect relates to the use of system-wide information to predict variables that are directly linked to business impact, such as production loss. Extraneous and transactional data are also utilized according to other aspects of the invention.
US09104997B1	Expert exchange during UML design updates A system, methods and computer program product to enable software architects to optimally select resources to enhance reused or previously developed components of a UML model. During a UML design phase, if a component is detected to be an enhancement of a previously developed component, the methods determine if the resource who developed the component previously is available for assignment. If available, the resource is selected as the optimal candidate. If unavailable, the system and methods look at several factors to determine if reassignment of resource is possible. These factors implement: a Keyword/Requirement Assignment; a Component History Detection or a Component Update History detection where a keyword triggers a search for developers who worked on a previous version; a Repository History where absence of a keyword triggers a search in component repositories for a component development history, and associated developers. After component developers are identified, their current availability is determined.
US09104994B2	Organization attribute estimation device, non-transitory computer readable medium, and organization attribute estimation method An organization attribute estimation device includes a software information acquisition unit that acquires software information indicating, for each information processing apparatus used in a certain department of an organization, software used in the information processing apparatus, and a department estimation unit that specifies an estimated class of the certain department on the basis of the software information acquired by the software information acquisition unit.
US09104992B2	Business application publication A data marketplace infrastructure provides a crowd sourcing solution to development, discovery and publication of decision applications. Applications can be submitted from a user to a data warehouse in association with a data feed. One or more discovery properties are determined with regard to each application. The applications are made available to other client systems in association with the data feed. A relevant data feed and a relevant application can be identified based on satisfaction of a discovery request by the one or more determined discovery properties of the application. The application can be selected and downloaded to the user for evaluation and customization. The customized application can then be submitted to the data warehouse for publication with the other applications associated with the data feed.
US09104984B2	Method and device relating to information management A method and an arrangement for use in a device, such as a communication device, may be configured to generate an assembly based on one or more images. The system may include an image retrieval portion for retrieving the one or more images from an image source, an arrangement for fetching data corresponding to the one or more images, and converting the data to presentable information, and an arrangement for generating the assembly including the one or more images and the presentable information provided with description.
US09104983B2	Site flow optimization A method and system to present an optimum action in response to a flow of actions in a computer network from a user are provided. For each of a plurality of possible presented actions corresponding to a particular flow of actions in a computer network, and for each of one or more possible performed actions for each possible presented action, a likelihood that a user will perform the possible performed action is determined. Then each of the determined likelihoods is weighted by applying a weight assigned to a corresponding possible presented action. An optimum presented action is identified determining a presented action having a weighted maximum determined likelihood, based on the weighted determined likelihood.
US09104981B2	Robot teaching system and method using imaging based on training position This robot teaching system includes a teaching tool including an operation portion operated by a user to specify teaching positions and specifying the teaching positions, a measuring portion measuring positions and postures of the teaching tool, and a control portion determining the teaching positions for a robot. The robot teaching system is configured to specify the teaching positions continuously while the user operates the operation portion of the teaching tool.
US09104980B2	Information processing device, information processing method, and program An information processing device includes a learning unit that performs, using an action performed by an object and an observation value of an image as learning data, learning of a separation learning model that includes a background model that is a model of the background of the image and one or more foreground model(s) that is a model of a foreground of the image, which can move on the background, in which the background model includes a background appearance model indicating the appearance of the background, and at least one among the one or more foreground model(s) includes a transition probability, with which a state corresponding to the position of the foreground on the background is transitioned by an action performed by the object corresponding to the foreground, for each action, and a foreground appearance model indicating the appearance of the foreground.
US09104979B2	Entity recognition using probabilities for out-of-collection data A classifier that disambiguates among entities based on a dictionary, such as corpus of documents about those entities, is built by incorporating probabilities that an entity exists that is not in the dictionary. Given a document it is associated by the classifier with an entity. By incorporating out of collection probabilities into the classifier, a higher level of confidence in the match between an entity and a document is achieved.
US09104970B2	Method and system for creating a predictive model for targeting web-page to a surfer Systems and methods for determining predictive model types are provided. A method may include generating a predictive model for a web page of a website, wherein the web page includes a configuration defining one or more objects presented with the web page, and wherein each object is associated with a predictive model. The method may include determining one or more predictive model types that are associated with the predictive model, determining one or more performance indicators that correspond to each determined predictive model type, wherein performance indicators represent one or more benefits to a website, selecting a predictive model type of the predictive model out of the one or more predictive model types, wherein the predictive model type is selected based on a performance indicator corresponding to the selected predictive model type, and determining a configuration of the web page using the selected predictive model type of the predictive model.
US09104966B2	Self configuring knowledge base representation A self configuring knowledge representation system and method is presented which self configures based on the external stimuli in order to answer the query in a way best suited to the user. The domain knowledge representation here is by way of graphs that allows the knowledge to self configure based on the query intent to give “specific” to the query answers.
US09104963B2	Self organizing maps for visualizing an objective space A method of visualizing a plurality of designs which comply with a plurality of objectives. The method comprises acquiring a plurality of designs each represented by sequential multivariate data indicative of a compliance with a plurality of objectives, generating an objective anchored based self-organizing map (SOM) having a plurality of objective anchors and maps the plurality of designs in an objective space, and outputting the objective anchored based SOM. Each objective anchor is associated with one of the plurality of objectives, each the design is visualized in the objective anchored based SOM by an indicator which the distance thereof from each the objective anchors is indicative of a compliance thereof with a respective the associated objective in relation to other of the plurality of objectives.
US09104960B2	Click prediction using bin counting Methods, systems, and computer-storage media having computer-usable instructions embodied thereon for calculating event probabilities are provided. The event may be a click probability. Event probabilities are calculated using a system optimized for runtime model accuracy with an operable learning algorithm. Bin counting techniques are used to calculate event probabilities based on a count of event occurrences and non-event occurrences. Linear parameters, such and counts of clicks and non-clicks, may also be used in the system to allow for runtime adjustments.
US09104959B2	Image forming apparatus with continuous paper feeding, and image forming method An image forming apparatus continuously performs primary paper feeding in which paper is transported from a paper feeding roller to a resist position roller and secondary paper feeding in which the paper is transported from the resist position roller to an ejection roller while not stopping the resist position roller. The image forming apparatus divides image data into pieces of band data, stores the pieces of band data, calculates the number of specific bands corresponding to an in-advance paper feeding timing corresponding to the paper size and the paper orientation, and outputs an in-advance paper feeding timing notice when image process is completed up to the number of specific bands.
US09104956B2	Image processing apparatus and image processing method that selectively stores data in preferred storage places An image processing apparatus includes a first storage device, a second storage device, a rendering unit, and a data handling unit. The rendering unit is configured (a) to generate intermediate data from image data, store the intermediate data in at least one of the first storage device and the second storage device, and (b) to generate bitmap image data on the basis of the intermediate data. The data handling unit is configured to select one of the first storage device and the second storage device as a storing place of the intermediate data on the basis of free area sizes of the first storage device and the second storage device and data transfer rates of the first storage device and the second storage device.
US09104955B2	Sonotrode with cutting mechanism During mounting to an inlay substrate, at least one end portion (including end) of an antenna wire is positioned directly over a terminal of the chip module for subsequent connecting thereto. A sonotrode is disclosed with a cutter above the capillary for cutting or nicking the wire. Insulation may be removed from a portion of the wire. The antenna may comprise two separate stubs, each having an end portion (including end) positioned over a terminal of the chip module. Additional techniques for mounting the antenna wire are disclosed.
US09104951B2	Man/machine dialogue system A man/machine dialogue system including: an RFID read/write station including a data processor; an antenna that is magnetically connected or coupled with the read/write station; and a man/machine dialogue member including a man/machine dialogue interface and an electronic tag. The electronic tag includes an internal memory and a processor and is positioned so as to be supplied with power, via magnetic coupling, by the read/write station and so as to be in contactless communication, via magnetic coupling, with the read/write station.
US09104950B2	Antenna and wireless IC device An antenna for a wireless IC device having improved energy transfer efficiency with a wireless IC, and a wireless IC device equipped with the antenna are constructed such that the antenna includes a coil pattern and spiral coupling patterns provided at the ends of the coil pattern and disposed so as to face each other. A coupling module including a wireless IC chip and a feeder circuit substrate including a feeder circuit arranged to be coupled to the wireless IC chip is mounted on the coupling pattern so as to define a wireless IC device. The coil pattern is an open type coil pattern. The coupling patterns are arranged close to each other to define a single LC resonator. Thus, energy is concentrated in the coupling patterns, thereby improving the energy transfer efficiency between the antenna and the wireless IC chip.
US09104949B2	Card and card manufacturing method Provided are a card and card manufacturing method that enable clear visual recognition of a display in a display portion even if the card surface has been provided with a matte finish, and enable an improvement in texture related to position drift between a display device and a window portion, as well as an improvement in workability during manufacture. The card (1) has: a display portion (10); an electronic component that controls a display to the display portion (10); a surface layer (20) placed as the topmost layer of the card (1) and formed from a clear material; a mirror-surface portion (21) provided on a portion that overlaps the display portion (10); and a matte portion (22) provided on a portion outside the mirror-surface portion (21), said matte portion (22) having a coarser grain than the mirror-surface portion (21).
US09104946B2	Systems and methods for comparing images Systems and methods for scoring similarity count a number of matching visual words between a query image and a candidate image, generate an image similarity score for the query image and the candidate image based at least in part on the number of matching visual words, and generate a normalized image similarity score based at least in part on the image similarity score and one or more of a complexity of the query image and a complexity of the candidate image.
US09104944B2	Object recognition method, descriptor generating method for object recognition, and descriptor for object recognition An object recognition method, a descriptor generating method for object recognition, and a descriptor for object recognition capable of extracting feature points using the position relationship and color information relationship between points in a group that are sampled from an image of an object, and capable of recognizing the object using the feature points, the object recognition method including extracting feature components of a point cloud using the position information and the color information of the points that compose the point cloud of the three-dimensional (3D) image of an object, generating a descriptor configured to recognize the object using the extracted feature components; and performing the object recognition based on the descriptor.
US09104943B2	Information processor, information processing method, and program An information processor includes a detection unit detecting a photographic subject region of an image, a characteristic amount generation unit generating a characteristic amount including at least positional information of the photographic subject region for each of the detected photographic subject region, a combined characteristic amount generation unit generating a combined characteristic amount corresponding to the image by combining the characteristic amount generated for each of the photographic subject region, and an identification unit identifying a label corresponding to a combination of a photographic subject appearing in the image based on the generated combined characteristic amount.
US09104934B2	Document decoding system and method for improved decoding performance of indicia reading terminal Embodiments of the present invention comprise an indicia reading terminal including operatively configured to interact with a storage module to store data, including location data, of a decodable indicia found in a captured document image. In one embodiment, the indicia reading terminal can be provided with one or more pre-stored information about the decodable indicia and/or the document. In another embodiment the indicia reading terminal can be provided with instructions and similarly operatively configured components that can identify information about the decodable indicia, store such information in a table, and utilize the tabulated data to process captured image data of subsequent documents.
US09104929B2	Code symbol reading system having adaptive autofocus A system for reading code symbols includes an imaging subsystem that includes a focusing module and an image processor. The image processor selects an initial, predicted focal distance for the imaging subsystem's focusing module with respect to a code symbol. The focal distance for each successfully decoded code symbol is stored in memory, and a weighted average of a pre-selected number of memorized focal distances is used to calculate the next initial, predicted focal distance.
US09104926B2	Systems and methods for performing secure financial transactions An RFID system includes an RFID tag, an RFID reader, and a server. The RFID tag communicates to the server via encrypted information. The information may be encrypted with synchronized encryption keys. In this manner, the reader need not decrypt the information from the RFID tag. The effectiveness of malicious readers is thereby reduced, resulting in improved RFID tag security.
US09104916B2	Object information derived from object images Search terms are derived automatically from images captured by a camera equipped cell phone, PDA, or other image capturing device, submitted to a search engine to obtain information of interest, and at least a portion of the resulting information is transmitted back locally to, or nearby, the device that captured the image.
US09104915B2	Methods and systems for content processing Portable devices are equipped with a variety of technologies by which existing functionality can be improved, and new functionality can be provided. One claim recites a method comprising: receiving data representing imagery that depicts an object, the imagery captured by a portable device, the portable device comprising a camera and a microphone; determining one or more descriptors relating to the object in the imagery, the determining including collecting descriptors associated with other imagery or audio; processing the descriptors in discerning whether the imagery depicts an object that is likely of a first class or a second class or a third class, the processing being performed by one or more electronic processors configured to perform such act; and taking an action dependent on whether the imagery depicts an object that is likely of a first class or a second class or a third class. Of course, other claims and combinations are provided as well.
US09104904B2	Disparity estimation method of stereoscopic image A disparity estimation method of stereoscopic image is provided. A matching cost computation is executed for a first image and a second image, and one extreme value is selected from cost values corresponding to estimating disparities for each pixel to obtain a matching point corresponding to each pixel. And a matching disparity corresponding to each matching point is adjusted based on edge detection according to a scan order.
US09104903B2	Microscopy visualization A method is described for correlating microscopy images from a number of modalities in a sub diffraction resolution environment. The method may include receiving a number of datasets that may represent microscopy captures from a number of different modalities. The microscopy captures may contain feature markers that may be used to register a number of data points contained in a dataset with data points from another dataset. Upon registering the data points of the datasets, a combined dataset may be produced and a visual image of the combined dataset may be provided.
US09104902B2	Instrument-based image registration for fusing images with tubular structures A system and method for registering three-dimensional images with two-dimensional intra-operative images includes segmenting (24) a tubular structured organ in a three-dimensional image of the organ, and projecting (26) the three-dimensional image of the organ into two-dimensional space to provide a projected image. A medical instrument depicted in a two-dimensional image of the medical instrument is segmented (28). A similarity score is computed between the projected image and a shape of the medical instrument depicted in the two-dimensional image to determine a best match. The projected image is registered (30) to the two-dimensional image based on the best match.
US09104900B2	Ridge pattern recording system Disclose a system for recording ridge patterns comprising a light source, a component which determines the position of a scanning surface, an optical system, a multi-element image sensor, an electronic memory and a processing device, wherein the output electronic image from the system is linked by means of merging in the processing device to at least two intermediate images which are linked to the optical image from the scanning surface.
US09104898B2	Utilizing force information to improve fingerprint reading For utilizing force information to improve fingerprint reading, a fingerprint scanner generates a digital representation of a fingerprint for a finger in contact with the fingerprint scanner. A pressure sensor is in physical communication with the fingerprint scanner and measures a finger force of the finger.
US09104894B2	Hardware enablement using an interface A hardware enablement apparatus includes a processor, and a communications interface configured for writing license data to one or more data registers and for using the license data to selectively enable, under control of the processor, hardware features associated with the data registers, at least one of the data registers being implemented in non-volatile memory.
US09104886B1	Automated privacy control Systems and approaches are provided for automating privacy control for a computing device based on a privacy or security context of the device. The privacy or security context of the computing device can be determined by analyzing sensor data or other input data captured by the device. The sensor and other input data can provide information such as a location of the computing device or the presence of other persons within the vicinity of the device to indicate whether the user is situated within a private or secure setting or a public or unsecure setting. A privacy or security control can be updated based on the determined privacy or security context, such as modifying a manner of displaying a pin or password during entry, elements of a home screen of the computing device, or preview content of user applications.
US09104878B1	Automated source code scanner for backdoors and other pre-defined patterns A method and computer program product for an automated source code scanner that focuses on a custom-written code and business processes. A core scanning module receives source code as a plaintext from a pre-determined port and compares the source code against a pre-created pattern database. The results of the comparison are exported for further use and analysis in a form that indicates a location of the found match and a short description of the pattern that matched the source code. The source code scanner can work with multiple programming languages. The source code scanner can be easily adjusted for any additional languages. The scanner core also contains a tool for pattern database maintenance that allows the user to remove or edit current patterns as needed.
US09104877B1	Detecting penetration attempts using log-sensitive fuzzing Techniques and systems are provided for detecting penetration attempts with fuzzing techniques utilizing historical log data of target system. The techniques may, for example, include comparing logs captured in response to fuzzed inputs with large numbers of historical logs and then modifying how the inputs are fuzzed based on how the fuzzed inputs resulting in a high similarity score were fuzzed. In some implementations, historical logs and captured logs with high similarity scores may cause an alarm condition to be triggered to alert a human operator.
US09104875B2	Policy-driven administration of mobile applications Policy-driven administration of mobile applications includes receiving a policy defined by a client system. The policy is defined by rules configured for implementation by a scanner and a compliance definition indicative of a threshold acceptability value for output of the implementation of the scanner on a mobile application. The policy-driven administration also includes executing the scanner for the mobile application and identifying an association between a mobile device and the client system. The policy-driven administration of mobile applications further includes controlling access to the mobile application by the mobile device based on results of executing the scanner using the compliance definition.
US09104865B2	Threat condition management Methods, products, apparatuses, and systems may manage a threat condition. A plurality of triggers may be identified over a period of time. Each of the triggers may be associated with a threat risk value. An accumulation value may be determined based on an aggregation of each threat risk value over the period of time. A set of progressive threshold values associated with a set of progressive threat conditions may be defined. A threat condition from the set of threat conditions may be established for the device based on the accumulation value. The threat condition may be managed, for example by defining an operational mode for the device, in response to the threat condition.
US09104864B2	Threat detection through the accumulated detection of threat characteristics Embodiments of the present disclosure provide for improved capabilities in the detection of malware, where malware threats are detected through the accumulated identification of threat characteristics for targeted computer objects. Methods and systems include dynamic threat detection providing a first database that correlates a plurality of threat characteristics to a threat, wherein a presence of the plurality of the threat characteristics confirms a presence of the threat; detecting a change event in a computer run-time process; testing the change event for a presence of one or more of the plurality of characteristics upon detection of the change event; storing a detection of one of the plurality of characteristics in a second database that accumulates detected characteristics for the computer run-time process; and identifying the threat when each one of the plurality of characteristics appears in the second database.
US09104862B2	Secure computing device using new software versions A computing device includes a central processing resource, memory, a network interface, and a security control module. The security control module is operable to determine to change at least a portion of a program of the computing device. When the program, or portion thereof, is to be changed, the security control module sends a request to a software generation module for a new version of the program, or portion thereof. The security control module then receives the new version of the program, or portion thereof, and replaces, within the memory, the program, or portion thereof, with the new version of the program, or portion thereof. When the program is evoked, the central processing resource uses the new version of the program, or portion thereof, such that execution of the program is changed, which changes internal operation of the computing device thereby reducing adverse impact of malicious software.
US09104861B1	Virtual security appliance Security from malicious attack is provided for a user environment running in a virtualized environment by a virtual security appliance (VSA) running outside of the user environment, but on the same computer system as the user environment. For example, a VSA running in a virtual machine can provide security for a user environment running in a second virtual machine. The separation of the VSA from the user environment enhances the robustness of the VSA against malicious attacks seeking to disable/bypass the protections of the VSA, while avoiding the costs and complexities of a physical security appliance.
US09104858B1	Protecting user identity at a cloud using a distributed user identity system A computing system assigns an anonymous cloud account to a user in response to a determination that identity information of the user is validated for a request to access a cloud. The anonymous cloud account does not reveal an identity of the user to the cloud. The computing system creates mapping data that associates the user with the anonymous cloud account. The cloud does not have access to the mapping data. The computing system facilitates user access to the cloud based on the anonymous cloud account. The cloud generates cloud access pattern data for the anonymous cloud account without determining the identity of the user.
US09104856B2	System and method for computer authentication with user modification of an image using a shared secret Computers can be authenticated using a shared secret. During an authentication process, a server transmits an image to a client. A mobile device captures and analyzes the image. If the image contains the shared secret known only to the authentic server and the authentic mobile communication device, the mobile device can authenticate the server. The secret in the image can be readily analyzed. A single image may contain multiple shared secrets. Once the server has been authenticated, the user must modify the image in accordance with a shared modification secret to thereby authentic the user. The modified image is transmitted back to the authenticated server. If the image was properly modified, the user is authenticated.
US09104855B2	Dynamic secure login authentication A system for performing a secured transaction using a network including a server in communication with the network is provided. The server has a processor and a memory to store private account information from registered users and store commands that when executed by the processor cause the server to perform a method including: providing a login configuration to a user, including a matrix of dynamic symbols; determining an expected password for the user based on a trace pattern from the user and the symbols in the matrix; receiving a password from the user; and determining whether the password matches the expected password. A non-transitory machine-readable medium including a plurality of machine-readable instructions which when executed by one or more processors of a server controlled by a service provider are adapted to cause the server to perform a method as above is also provided.
US09104854B2	Method and apparatus using a CAPTCHA having visual information related to the CAPTCHA's source Disclosed is a method for visual verification a Captcha's source. In the method, a Captcha is served to a user. The Captcha includes visual information related to a characteristic of a source of the Captcha and related to a puzzle question of the Captcha. The visual information is for visual verification by the user of the Captcha's source. A response is received from the user based on the served Captcha. A determination is made as to whether the received response is a solution of the puzzle question of the served Captcha.
US09104848B2	Cross-platform authentication from within a rich client An un-authenticated user attempts to access a protected resource at a Web- or cloud-based application from within a rich client. The client has an associated local HTTP server. Upon being refused access, a browser-based login dialog is opened automatically within an embedded browser panel. After receipt of the user's login credential in the panel, the browser passes the credential server application. If the user is authenticated, the browser-based dialog receives a cookie establishing that the user is authenticated for a session. The browser then automatically makes a request to the HTTP server, passing the cookie. Upon receipt of the request at the rich client HTTP server, the rich client saves the cookie in an associated data store, shuts down the login dialog, and re-issues the original request to the server, this time passing the cookie. The rich client, having provided the cookie, is then permitted to access the resource.
US09104846B2	Access provisioning via communication applications Described herein is technology for, among other things, provisioning access to shared resources. It involves various techniques for creating accounts for recipients of communications with shared resources. Further, the resources may available by an easy to find permanent location (e.g., URL). Such a provisioning process facilitates the growth of the network as recipients are given fully featured accounts. Therefore, the technology avoids the sign up process that users would otherwise have to go through in order to access the shared resource.
US09104845B2	Digital content management system, verification device, programs thereof, and data processing method A digital content management system (1) includes: a digital watermark embedding device (100) which generates embedding information uniquely determined from identification information for tracking use, and embeds a digital watermark into a digital content to be managed, based on the thus-generated embedding information; a digital watermark detection device (200) which generates the tracking information uniquely determined from identification information for verification use, and detects the digital watermark in a digital content to be verified based on the thus-generated tracking information; and a verification device (300) which verifies the identification information for verification use supposed to be used for verifying the digital content to be verified in which the digital watermark was detected.
US09104839B2	De-duplication aware secure delete A mechanism is provided in a data processing system for de-duplication aware secure delete. Responsive to receiving a secure delete request for a file, the mechanism identifies a list of file blocks to be securely deleted from a physical disk device. Responsive to determining at least one virtual block of another file refers to a given disk block corresponding to a file block in the list, the mechanism copies the given disk block to generate a copied disk block in the physical disk device and updates a pointer of the at least one virtual block to refer to the copied disk block. The mechanism writes a secure delete pattern for each file block in the list of file blocks to a disk block in the physical disk device without performing de-duplication processing.
US09104837B1	Exposing subset of host file systems to restricted virtual machines based on upon performing user-initiated actions against host files Approaches for securing resources of a virtual machine. An application executes on a host operating system. A user instructs the application to display a file. In response, a host module executing on the host operating system instructs a guest module, executing within a virtual machine, to render the file within the virtual machine. The application displays the file using screen data which was created within the virtual machine and defines a rendered representation of the file. The user is prevented from accessing any resource of the virtual machine unrelated to the file. The virtual machine may consult policy data to determine how to perform certain user-initiated actions within the virtual machine. Examples of the file include image, a document, an email, and a web page.
US09104836B2	Dynamically mapping network trust relationships In an embodiment, the method is comprising, receiving an access request, from an authenticator device, to grant a supplicant device access to a data network; transmitting the access request to an authentication server; after sending a response that the access request was granted, updating a trust topology map by including in the trust topology map information that has been obtained from the response and that indicates a secure link between the authenticator device and the supplicant device, and causing displaying the updated trust topology map as a logical map depicting one or more network devices and roles assigned to the one or more network devices; wherein the method is performed by one or more computing device.
US09104833B2	Mask set for double exposure process and method of using the mask set A mask set for double exposure process and method of using said mask set. The mask set is provided with a first mask pattern having a first base and a plurality of first teeth and protruding portions, and a second mask pattern having a second base and a plurality of second teeth, wherein the second base may at least partially overlap the first base such that each of the protruding portions at least partially overlaps one of the second teeth.
US09104829B2	Method of validating timing issues in gate-level simulation A method of validating timing issues in a gate-level simulation (GLS) of an integrated circuit design including multiple cells includes running a simulation routine of a behavioral model of the design and obtaining a first simulation result. If there is a possible timing violation at a cell corresponding to a forcing indeterminate value, the simulated output of the cell is forced to a first value and a second simulation result obtained. If this result is negative, a report of apparent timing violations at the cell is generated. If the second simulation result is positive, the output of the cell is then forced to a second value and a third simulation result is obtained. If this result is negative, a report of apparent timing violations at the cell is generated but, if it is positive, a report of no apparent timing violation is generated.
US09104827B2	Method and system for automatic generation of processor datapaths Systems and method for automatically generating a set of shared processor datapaths from the description of the behavior of one or more ISA operations is presented. The operations may include, for example, the standard operations of a processor necessary to support an application language such as C or C++ on the ISA. Such operations, for example, may represent a configurable processor ISA. The operations may also include one or more extension operations defined by one or more designers. Thus, a description of the behaviors of the various standard and/or extension operations that compose the ISA of an instance of a standard or configurable processor is used to automatically generate a set of shared processor datapaths that implement the behavior of those operations.
US09104823B2	Optimization with a control mechanism using a mixed-integer nonlinear formulation A method of optimizing production of wells using choke control includes generating, for each well, an intermediate solution to optimize the production of each well. The generating includes using an offline model that includes a mixed-integer nonlinear program solver and includes using production curves based on a choke state and a given wellhead pressure. The method further includes calculating, using a network model and the intermediate solution of each well, a current online wellhead pressure for each well. The method further includes setting the intermediate solution as a final solution based on determining that a difference between the current online wellhead pressure of each well and a prior online wellhead pressure of each well is less than a tolerance amount. The method further includes adjusting, using the final solution of each well, at least one operating parameter of the wells.
US09104821B2	Universal serial bus host to host communications In some embodiments a detector detects a host or device coupled via a link. A port negotiates with a port of the detected host or device and determines whether to operate as a host and/or as a device. Other embodiments are described and claimed.
US09104813B2	Software installation method, apparatus and program product A software preload arrangement uses a central server to store the software repository(ries) for various computer instruction files offered for preload into a system being manufactured. To execute the preload, a client workstation is used to execute the actual preload steps for a system under test (SUT). When the SUT needs a given piece of the software release, data is moved down to the client from the server and cached there for delivery to the system under test. In accordance with an important characteristic of this invention, the caching is predictive. That is, data is held in or moved to the client workstation based upon recent activity, so that the time needed to prepare a preload for a system under test is shortened.
US09104803B2	On-demand software test environment generation A method and a system to create a software test environment on demand are described. An example system includes a dependency module to, upon receiving a command identifying a primary function to be created in a test environment, identify one or more dependencies of the primary function. The dependencies are other functions or databases that the primary function depends upon. The dependency module generates a topology of the test environment that indicates the relationship of the dependencies to the primary function. A provisioning module provisions a plurality of pools based on the topology. An enterprise service bus (ESB) routing module updates ESB routing of the primary function to route to the plurality of pools in the test environment. A credentials module provides credentials of the pools in the test environment.
US09104799B2	Debugging a graphical user interface code script with non-intrusive overlays An embodiment of the present invention manages window focus non-intrusive over-lays while debugging a graphical user interface program. In an example, the computer displays in a first graphical user interface, wherein the computer program is designed to manipulate a second graphical user interface of another computer program. The computer receives a command to debug the second graphical interface computer program and converts the first graphical user interface into a focus-less graphical user interface so the focus does not transfer from the second graphical user interface. The computer debugs the computer program and upon completing debugging, the computer restores the first graphical user interface into focus.
US09104796B2	Correlation of source code with system dump information The present arrangements relate to analyzing a software error. At least one dump file created in response to a crash of software executing on a processing system can be accessed. Based on the dump file, a base version of at least one software module that was loaded when the crash occurred can be identified. Based on the dump file, maintenance that has been applied to the at least one software module also can be identified. A report recommending new corrective maintenance to be applied to the at least one software module can be generated.
US09104794B2	Automatic incremental application dependency discovery through code instrumentation Disclosed is a method allowing the automatic discovery of application component dependencies by tracing application calls to dependant resources. The call tracing is embedded dynamically in an application at runtime using Common Intermediate Language (“CIL”) code instrumentation at compile time or runtime. Such a method reads an instrumentation configuration file to determine an address extraction code portion that is to be instrumented to an application method code, locates the CIL method body for the application method that is to be instrumented, instruments the application method by inserting the address extraction code portion into the appropriate .NET Application or .NET library at either compile time or at run time, extracts the address of one or more external service providers from the designated .NET library methods responsible for communication during execution of the application method that was instrumented, publishes any newly discovered dependencies to a management system in the form of the discovery event, and causes the management system to build an application dependency map based on the resource address information obtained.
US09104792B2	Modular refrigeration unit health monitoring A modular refrigeration unit (MRU) health monitor includes a log data input configured to receive log data from an MRU, the log data comprising a plurality of datapoints, each of the plurality of datapoints comprising a position of a control valve of the MRU and a corresponding time; and MRU health monitoring logic configured to determine a plurality of MRU parameters from log data received on the log data input; determine a plurality of MRU health flags based on the MRU parameters; add the plurality of MRU health flags to determine an MRU health score; determine whether the MRU health score is higher than a replacement threshold; and indicate replacement of the MRU in the event the MRU health score is higher than the replacement threshold.
US09104791B2	Systems and methods for editing a model of a physical system for a simulation Systems and methods for simulating a medical procedure are disclosed. For example, one described system for simulating a medical procedure includes a physics module configured to model at least one physical property of a user-defined organic object associated with a patient; a display module configured to cause a display of the user-defined organic object; a script module configured to execute a user-defined medical procedure script; a simulation module in communication with the physics module, the display module, and the script module, the simulation module configured to execute a simulation of the medical procedure based at least in part on the user-defined model of the organic object and the user-defined medical procedure script.
US09104788B2	System and method of using location technology to aid patient recovery A system for telemetrically monitoring a patient includes a remote monitoring device associated with the patient. A location services system tracks a location of the remote monitoring device. A patient tracking computer calculates a distance and a duration of patient ambulation from the tracked location. A method of monitoring an ambulatory patient monitors the location of a remote monitoring device and derives ambulatory event data from the monitored location.
US09104785B2	Presenting unique search result contexts Presenting unique search result contexts, including: receiving, by a search result presentation module, a plurality of search results generated in response to a search query, wherein each search result includes context information associated with the search result; identifying, by the search result presentation module for each search result, a displayable portion of the context information associated with the search result; determining, by the search result presentation module for each search result, whether the displayable portion of the context information is a duplicate of the displayable portion of the context information for another search result; and responsive to determining that the displayable portion of the context information is a duplicate of the displayable portion of the context information for another search result, updating, by the search result presentation module, the displayable portion of the context information for the search result.
US09104781B2	Obtaining metadata set by imperative statement Aspects of the subject matter described herein relate to imperative attribution. In aspects, metadata of a managed runtime environment may be set by imperative statements included in code of a program executing in the managed runtime environment. A metadata consumer may request the metadata. A metadata identifier of the metadata requested may be provided implicitly or explicitly. A parameter that indicates how to obtain the metadata may also be provided. In response, the metadata may be obtained and provided. The metadata may be computed at parse time, run time, or another time and may be computed based on state available to a managed runtime environment at the time the metadata is computed.
US09104779B2	Systems and methods for analyzing and synthesizing complex knowledge representations Techniques for analyzing and synthesizing complex knowledge representations (KRs) may utilize an atomic knowledge representation model including both an elemental data structure and knowledge processing rules stored as machine-readable data and/or programming instructions. One or more of the knowledge processing rules may be applied to analyze an input complex KR to deconstruct its complex concepts and/or concept relationships to elemental concepts and/or concept relationships to be included in the elemental data structure. One or more of the knowledge processing rules may be applied to synthesize an output complex KR from the stored elemental data structure in accordance with an input context. Multiple input complex KRs of various types may be analyzed and deconstructed to populate the elemental data structure, and input complex KRs may be transformed through the elemental data structure to output complex KRs of different types, providing semantic interoperability to KRs of different types and/or KR models.
US09104776B2	Efficient identity mapping with self-correction for cascaded server systems A computer-implemented method, computer program product, and apparatus for identity mapping with self-correction for cascaded server systems is provided. A request to perform a business transaction is received. Responsive to performing a first server process of the business transaction, the servers necessary to perform the business transaction are identified, forming a set of identified servers. A user identity is retrieved for each server in the set of identified servers, wherein the user identity for each server in the set of identified servers is linked to a user registry of a server, forming a set of linked user identities. A data structure comprising the set of linked user identities is created. A user identity for a next server in the set of identified servers is retrieved from the data structure. In addition, the data structure is forwarded to a next server in the set of identified servers.
US09104775B2	Method for presenting a web page The present invention provides a method for presenting a web page which presents a preview of a web page when loading the web page. The preview may be a smaller version of the web page, which is fitted to be completely contained in one screen. The preview may include a smaller version of each module on the web page, and may be expanded to a web page in full size when the loading is finished. If a user expresses interests in one module, that module may be loaded and displayed first.
US09104772B2	System and method for providing tag-based relevance recommendations of bookmarks in a bookmark and tag database A method comprises identifying a first user having stored in a database a set of first bookmarks associated with a topic of interest; determining a level of relatedness of a second user to the first user by comparing a first number of overlapping bookmarks that were stored in the database by the second user and that overlap the set of first bookmarks; determining a level of value of the second user to the first user by comparing a second number of related nonoverlapping bookmarks that were stored in the database by the second user that, relate to the topic of interest, and that do not overlap the set of first bookmarks; and presenting at least a portion of the related nonoverlapping bookmarks to the first user.
US09104769B2	Metasearch infrastructure with incremental updates Techniques are provided for a metasearch infrastructure. The metasearch infrastructure supports one or more of the following: hotel matching, backend support of user queries, frontend support for user queries, a cache layer that groups or organizes cached data in storage based on hotel location, scoring and ranking on the client side, experiments and rankers, duplicate booking prevention, blacklisting hotels, and indexing that utilizes a document-independent data structure to store index values.
US09104768B2	Person-based information aggregation Techniques are described for aggregating person-based information on a computing device. The computing device includes a display device and one or more processors. The processors are configured to determine a context of the computing device, and identify a contact associated with the currently-executing application and a plurality of contact identifiers associated with the contact. The processors are configured to receive, from two or more different sources and based on at least one contact, information associated with the contact that includes a respective portion of information received from each of the different sources, determine, based on the context of the computing device, a respective priority value for each of the portions of the information, select, based on the respective priority value, one or more portions of the information, and output, for display, a graphical user interface including at least the selected one or more portions of the information.
US09104761B2	Document analysis device, document analysis method, and computer readable recording medium A document analysis device (1) comprises a common assessment information selection unit (90) and an event impact analysis unit (100). The common assessment information selection unit (90) identifies information that matches second assessment information that appears in event-related documents which include descriptions concerning a designated specific event, from among first assessment information that appears in documents for analysis which include descriptions relating to items for analysis, and classifies the information thus identified as common assessment information. The event impact analysis unit (100) counts the number of times the common assessment information appears in the documents that are generated prior to the event occurring, and the number of times the common assessment information appears in the documents for analysis that are generated subsequent to the event occurring, and derives an index that denotes the impact of the specific event upon the documents for analysis, on the basis of the results of the counts thereupon.
US09104760B2	Panoptic visualization document database management A system includes a database management system engine, data manipulation subsystem and layout engine. The management system engine is configured to manage a database having stored therein a panoptic visualization document collection of document components each of which has associated metadata providing information about the respective document component, with the document components and metadata being stored in respective records of the database. The data manipulation subsystem includes a query language engine configured to receive a request for the respective records of document components and associated metadata, and the management system engine is configured to retrieve the requested, respective records from the database. The layout engine is configured to generate a layout of panoptically-arranged visual representations of the document components. And the query language engine is configured to communicate the layout and retrieved, respective records of the associated metadata.
US09104758B2	Methods, systems, and products for searching social networks Methods, systems, and products are disclosed for searching social networks. A device is encountered that sends a query. The query comprises a search packet. A content search is performed according to a query parameter described by the search packet. The content search is then repeatedly performed according to a duration parameter described by the search packet.
US09104750B1	Using concepts as contexts for query term substitutions Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for collecting query term substitution data based on one or more identified concepts. According to one implementation, a method includes receiving a query that includes at least three sequential query terms; determining that the sequential query terms represent a concept; and in response to determining that the sequential query terms represent a concept, collecting query term substitution data for one or more query terms that occur in queries that include the concept.
US09104749B2	Semantically aggregated index in an indexer-agnostic index building system A computer program product for an indexer-agnostic index building system includes a computer readable storage medium to store a computer readable program, wherein the computer readable program, when executed on a computer, causes the computer to perform operations for creating a semantically aggregated index. The operations include: extracting documents from a data source, wherein each document includes a data object; distributing the documents to a plurality of processing nodes within the system; for each node: indexing the data objects for each document into fields using semantic rules; and grouping indexed data objects for related fields by: classifying the documents into logical groups based on the semantic rules; and creating a searchable index shard for related logical groups.
US09104748B2	Providing a search service including updating aspects of a document using a configurable schema Embodiments provide indexing and searching features including the use of a configurable schema as part of providing partial update support of one or more aspects of an electronic document or documents, but are not so limited. In an embodiment, a system is configured to provide search services including partial update functionality based in part on use of a configurable schema to manage partial document updates and/or query processing operations. A method of one embodiment operates to use a configurable schema to define a number of merge sets that group various document attributes based in part on data source, update, and/or usage parameters to provide an efficient partial update mechanism. Other embodiments are included.
US09104743B1	System and method for file differencing with importance ranking A system and method determines the differences between versions of an object, such as a file. The object versions are compared using a differencing tool to identify the differences between the versions. A scoring algorithm may be selected for the object based on one or more attributes of the object. The scoring algorithm is used to compute a difference score for the object. The difference score may be a function of the differences between the object versions and the characteristics or qualities of those differences. The difference score provides an indication of the relative importance of the changes made to the object. The difference scores from multiple objects may be presented in an interactive report, and sorted to identify those objects that underwent the most significant or noteworthy changes.
US09104740B2	Enhanced attribute synchronization in a content management system Embodiments of the invention provide a method, system, and article of manufacture for enhanced attribute synchronization in a content management system (CMS). One-way synchronization rules associated with objects stored in the CMS may be applied to synchronize both the substantive content and/or metadata included in a particular data object (e.g., an XML document) with attributes maintained by the CMS. The one-way synchronization rules may synchronize information stored in the data object with information stored in the CMS attributes. Alternatively, the one-way synchronization rule may synchronize information stored in the CMS attributes with information stored in the data object.
US09104734B2	Systems and methods of detecting, measuring, and extracting signatures of signals embedded in social media data streams A system for scoring micro-blogging messages is provided, including an extractor, and evaluator, a calculator, and a publisher. The extractor may be configured to receive micro-blogging messages, to detect messages containing terms of interest, to extract raw data, and to store the data in a database. The evaluator may be configured to access and parse the stored data into tokenized data, and to store the tokenized data in a database. The evaluator may also be configured to identify relevant micro-blogging messages; to tag message as indicative; and to filter messages from low-volume or malicious sources before being tagged as indicative. The calculator may be configured to access a sentiment dictionary; to calculate a sentiment score of the tokenized data, and to calculate a sentiment signature for a term of interest. The publisher may be configured to provide access to clients of the system.
US09104730B2	Indexing and retrieval of structured documents Facilitating the searching of structured documents by identifying multiple element paths corresponding to multiple elements included in multiple structured documents, and for each of the element paths providing, for inclusion in a first searchable data structure, the element path exclusive of a value of the element corresponding to the element path and exclusive of an identifier of the structured document including the element corresponding to the element path, and providing, for inclusion in a second searchable data structure, the element path in association with a value of the element corresponding to the element path and in association with an identifier of the structured document including the element corresponding to the element path.
US09104727B2	Search apparatus and method for controlling search apparatus A method for controlling a search apparatus that searches a plurality of data each having an attribute value for each attribute item according to a search condition defined by the attribute value, the method includes detecting a change of the attribute value of one or more data of the plurality of data, changing the search condition including the changed attribute value according to the detected change of the attribute value, and performing a search according to the changed search condition.
US09104717B2	Distributed storage object delete System and methods for storage object distribution using dynamic policy controls are provided. An embodiment method deleting an object in a distributed storage system includes receiving, from a client, a delete request for an object, retrieving, by a primary datacenter, an object metadata list corresponding to the object to be deleted, and inserting, by the primary datacenter, a delete marker on a top of a stack data structure in an object metadata list.
US09104712B2	Parallelizing I/O processing of index insertions during insertion of data into a database Database elements are inserted into a database object by processing each of a plurality of operations in a sequential order within a first processing round to insert the database elements into the database objects, where processing for at least one operation in the order becomes suspended due to a resource request, and where at least one successive operation is initiated in response to suspension of one or more prior operations to enable prefetching of information for processing the operations. Each suspended operation is re-processed with the prefetched information in one or more additional processing rounds until processing of the operations is completed.
US09104711B2	Database system, method of managing database, and computer-readable storage medium Disclosed is a database system capable of effectively updating data in a database at a high speed. The database system includes: a storage unit that stores a database including an entity data group and at least one identifier table having only a plurality of fixed-length data; and a data processing unit that receives a query and performs data processing on the database on the basis of the received query. The identifier table has a plurality of data identifiers that uniquely indicates the plurality of entity data as the fixed-length data.
US09104710B2	Method for cross-domain feature correlation A method for correlating information across distinct domains without requiring feature co-occurrence. The disparate information collections are broken down into features, and a correlation index with correlation score is created. To determine the correlation between distinct domains, an information artifact collection is reduced to a representational set of features, these features are replaced with correlated features using the correlation index, and the new set of features is matched against the second information artifact collection using an appropriate comparison technique. The correlation method allows a single input artifact to be matched against an existing collection, resulting in a set of correlated artifacts from the disparate collection, each ranked by correlation score.
US09104709B2	Cleansing a database system to improve data quality According to one embodiment of the present invention, a system controls cleansing of data within a database system, and comprises a computer system including at least one processor. The system receives a data set from the database system, and one or more features of the data set are selected for determining values for one or more characteristics of the selected features. The determined values are applied to a data quality estimation model to determine data quality estimates for the data set. Problematic data within the data set are identified based on the data quality estimates, where the cleansing is adjusted to accommodate the identified problematic data. Embodiments of the present invention further include a method and computer program product for controlling cleansing of data within a database system in substantially the same manner described above.
US09104708B2	Managing activities over time in an activity graph Systems and processes for managing a data warehouse using an activity graph are disclosed. One example process may include selectively tracking new versions of an entity based on a tracking type, removing entities based on data retention rules, removing entities based on data decay rules, and summarizing decayed data.
US09104706B2	Meta-directory control and evaluation of events Techniques for meta-directory control and evaluation of events are provided. Disparate events from heterogeneous processing environments are collected as the events are produced by resources within the processing environments. The events are filtered and organized into taxonomies. Next the filtered and organized events are assigned to nodes of a Meta directory, each node defining a relationship between two or more of the resources and policy is applied. Finally, additional policy is evaluated in view of the events and their node assignments with other events, and one or more automated actions are then taken.
US09104704B2	Imaging systems and related methods Imaging systems and related methods are provided. A representative system includes: a network identification system operative to identify image capturing devices operating within a vicinity of each other; an image cataloging system operative to receive image data, via a communication network, from at least a first image capturing device and a second image capturing device identified as operating within the vicinity of each other, the image cataloging system being further operative to automatically catalog the received image data; and a content feed system operative to receive, via the communication network, a request for a compilation of image data and, responsive thereto, create the compilation of image data such that the compilation of image data includes at least a portion of the image data received from each of the first image capturing device and the second image capturing device.
US09104703B2	Converged personal area network service method and system A converged personal area network service system uses information provided by personal network elements (PNEs) to generate an event report file to store along with a data file to commemorate an event. When the data file is created, such as taking a picture, an event recording device sends requests to PNEs, sensors and other devices within the network to provide information corresponding to a timestamp based on the event. The information, if available, is sent to the event recording device, where it is aggregated. The event recording device generates an event report file that includes fields storing the information pertaining to the data file. The event report file is stored along with the data file for retrieval or use at a later time.
US09104696B2	Shared image database with geographic navigation There is disclosed a method and device for operating an image database shared by a plurality of users. In an embodiment, each image captured by a user and stored in a shared image database is associating with the geographic coordinates of the location at which the image was captured. A search engine for the image database is configured to accept geographic coordinates as a search criterion for locating at least one captured image stored in the shared image database. The images having location coordinates within a predefined range of geographic coordinates is displayed to the user.
US09104684B2	Cache handling in a database system Embodiments relate to cache handling in a database system. An aspect includes controlling operations of a set of caches in the database system and determining whether a value of a cache quality parameter of a first cache out of the set of caches meets a cache image creation criterion relating to the first cache. Moreover, an aspect includes selecting at least one cache entry from the first cache, if a value of a related cache entry parameter meets a cache entry criterion, and if the value of the cache quality parameter of the first cache exceeds the predefined value of the cache image creation criterion, and creating a cache image based on the selected at least one cache entry and storing the cache image for further use.
US09104683B2	Enabling intelligent media naming and icon generation utilizing semantic metadata A set of media files are identified within a data store. Each of the media files lack user established file names, lack user established icons, or lack user established file names and icons. The media files are analyzed to determine semantic metadata. For at least a subset of the media files, the semantic metadata is utilized to automatically generate unique and meaningful file names, file icons, or both file names and file icons for each of the media files in the subset.
US09104679B2	Reference count propagation Methods and systems are provided for tracking object instances stored on a plurality of network nodes, which tracking enables a global determination of when an object has no references across the networked nodes and can be safely de-allocated. According to one aspect of the invention, each node has a local object store for tracking and optionally storing objects on the node, and the local object stores collectively share the locally stored instances of the objects across the network. One or more applications, e.g., a file system and/or a storage system, use the local object stores for storing all persistent data of the application as objects.
US09104677B2	Comprehensive pipeline management system and method using information recognition means Provided is a comprehensive pipeline management system using an information recognition means, the system including an integrated management server configured to generate an information recognition code using a serial number of a product related to water and sewer pipelines, and process storage and transmission of information related to the product and mapped to the information recognition code, an information recognition code printing terminal configured to print the information recognition code in a form attachable to the product, a user terminal configured to recognize the information recognition code from the product to which the information recognition code is attached, receive the product-related information mapped to the information recognition code from the integrated management server, output the received product-related information, generate location information and time information on the product received through a Global Positioning System (GPS) satellite, and transmit the generated location information and time information to the integrated management server, an authentication server configured to, when there is a request for information related to water and sewer pipelines from the user terminal to the integrated management server, authenticate authority of the user terminal, and a database (D/B) server configured to map and store the information recognition code and the product-related information, provide the stored information in response to the request for information on the product from the user terminal, and update and store the product-related information when the location information and the time information on the product is received from the integrated management server.
US09104673B2	Method for supporting multiple filesystem implementations A data structure used by an operating system to refer to a filesystem object includes information that permits the structure to be associated with filesystem objects having different filesystem implementations. The data structure is associated with a filesystem object that is linked into different directories that have different filesystem implementations. Therefore, the data structure includes respective information within it about each different link. As a result, a filesystem object, such as a directory, having one filesystem implementation may be created in or moved to another directory having a different filesystem implementation; or, a file may be linked in multiple directories having different implementations.
US09104672B2	Virtual security zones for data processing environments A method, apparatus, and computer program product for providing security and network isolation for service instances comprising data processing resources provided as a service by a provider of data processing resources. Individual service instances may be associated as members of one or more security zones. The security zones comprise security policies that define access of each service instance that is a member of a security zone.
US09104667B2	Social media event detection and content-based retrieval Techniques for detecting an event via social media content. A method includes obtaining multiple images from at least one social media source, extracting at least one visual semantic concept from the multiple images, differentiating an event semantic concept signal from a background semantic concept signal to detect an event in the multiple images, and retrieving one or more images associated with the event semantic concept signal for presentation as a visual description of the detected event.
US09104666B2	Controlling access to a large number of electronic resources An aspect of the present invention facilitates users/administrators to control access to electronic resources. In one embodiment, a tag data indicating the corresponding tags associated with each of a set of electronics resources is maintained. In response to receiving from an administrator, a search query indicating a search tag, the tag data is examined and a result set of electronic resources having tags matching the received search tag is identified. The administrator is thereafter enabled to specify an access policy for each of the result set of electronic resources. Thus, administrators are enabled to search for specific resources from a large number of resources and then specify the desired access policies for controlling access to the specific resources.
US09104664B1	Access to search results A method and system for improving access to search results are described. Aspects of the disclosure minimize the delay between a search query and display of results responsive to the query by prerendering the search engine result page and passing a query to the search engine result page as soon as the query is entered. The search query may be provided to the search engine result page using a search application programming interface provided by scripts executing on the prerendered web page. Non-search-result content may be requested, downloaded, and rendered in the background prior to receiving the search query in order to minimize delay in the displaying of search results.
US09104663B1	Dynamic allocation of memory for memory intensive operators A method, article of manufacture, and apparatus for processing queries, comprising performing a query with a first memory intensive allocation, receiving an indication that a memory intensive operator spilled to a first storage device, adjusting a resource queue memory allocation based on the indication, computing a second memory intensive allocation based on the adjusted resource queue memory allocation, and storing the second memory intensive allocation in a second storage device.
US09104662B2	Method and system for implementing parallel transformations of records An improved approach is described for implementing transformations of data records in high concurrency environments. Each transformation is performed in parallel at the source when the data record is first generated. According to one approach for data integrity validation, record generators compute an integrity checksum for a newly generated record before copying into a data unit in shared memory. Subsequent generators may aggregate integrity checksums for data records into checksums for data units incrementally. This approach achieves end-to-end protection of data records against corruption using an efficient method of maintaining verifiable data integrity. In another approach, compression and encryption data transformations may be performed by themselves, or in combination with an integrity checksum transformation.
US09104657B2	Using lexical analysis and parsing in genome research Provided are techniques for locating one or more genome patterns. One or more lexical annotators that each identifies a sequence of nucleotides are created. One or more parsing rule annotators are created using at least one of (1) one or more of the lexical annotators, (2) one or more dictionary entries, and (3) one or more previously-defined parsing rule annotators. The one or more parsing rule annotators are used to discover the one or more genome patterns comprising a combination of the lexical annotators and the parsing rule annotators.
US09104654B2	Method and device for efficient trace analysis A data storage device includes a memory and a controller coupled to the non-volatile memory. The controller is coupled to a communication interface that is configured to enable communication with a host device. The controller is configured to send a signal via a first connection of the communication interface and to send a corresponding clock signal via a second connection of the communication interface. The signal is compliant with a communication protocol that specifies that the first connection of the communication interface carries the signal while the second connection of the communication interface carries the clock signal. The first connection is testable to measure the signal to generate data indicating transitions of the signal. The data excludes measurements of the clock signal. The data is analyzable to detect an indication defined by the communication protocol and to determine an estimated bit sequence of the signal.
US09104646B2	Memory disturbance recovery mechanism Components of a memory system, such as a memory controller and memory device, which detect accumulated memory read disturbances and correct such disturbances before they reach a level that causes errors. The memory device includes a memory array and a disturbance control circuit. The memory array includes a plurality of memory rows. Each memory row is associated with a disturbance warning circuit having a state that corresponds to an accumulated disturbance in the memory row. The disturbance control circuit determines, responsive to an activation of a memory row of the plurality of memory rows specified by a row access command, whether the disturbance condition is present in the memory row based on the state of the disturbance warning circuit associated with the memory row. If a disturbance condition is present, the disturbance control circuit causes a recovery operation to be performed on the memory row to reduce the accumulated disturbances.
US09104640B2	Methods for auto-configuring a router on an IP subnet An autoconfiguring data router is connected to a communications network subnet having a second network data router. The autoconfiguring data router includes a configuration determination module that determines configuration attributes for operably connecting the autoconfiguring data router to the subnet, and an autoconfiguration module that configures the autoconfiguring data router according to the configuration attributes so that the autoconfiguring data router is operably connected to the subnet.
US09104636B2	Processor, multiprocessor system, and method for causing memory managing apparatus to manage shared memory A memory managing apparatus manages a memory shared by processors. The apparatus includes an allocator, an updater and a releaser. The allocator secures a memory area in the memory allocated to each processor based on a request of each processor and registers reference counters corresponding one-to-one to the processors. The updater adds 1 to a value of the reference counter corresponding to the processor managing the memory area when the memory area is allocated to each processor and subtracts 1 from the value of the reference counter corresponding to the processor managing the memory area when the memory area is released from the processor to which the memory area is allocated. The releaser releases the memory area from the processor to which the memory area is allocated when a sum of the values of the reference counters in the memory area updated by the updater is 0.
US09104635B2	Memory timing optimization using pattern based signaling modulation According to some embodiments, a method and apparatus are provided to determine a worst-case setup and hold bit pattern stream associated with a load on a bus, and determine a time shift to apply to an incoming bit pattern being conveyed relative to a DLL associated with the load.
US09104634B2	Usage of snapshots prepared by a different host A system and method are disclosed for preparing and using snapshots in a virtualized environment. In accordance with one example, a first computer system prepares, in an area of a storage device, a snapshot of a virtual disk of a virtual machine that is hosted by a second computer system. The first computer system then provides to the second computer system a reference to the prepared snapshot.
US09104632B2	Enhanced failover mechanism in a network virtualized environment An embodiment of the invention is associated with a virtualized environment that includes a hypervisor, client LPARs, and virtual servers that each has a SEA, wherein one SEA is selected to be primary SEA for connecting an LPAR and specified physical resources. A first SEA of a virtual server sends a call to the hypervisor, and in response the hypervisor enters physical adapter capability information, contained in the call and pertaining to the first SEA, into a table. Further in response to receiving the call, the hypervisor decides whether or not the first SEA of the virtual server should then be the primary SEA. The hypervisor sends a return call indicating its decision to the first SEA.
US09104618B2	Managing access to an address range in a storage device Enhanced configuration of security and access control for data in a storage device is disclosed. A request is received to access an addressable memory location in a storage media within the storage device. A set of addressable memory locations with contiguous addresses identified by an address range is associated with first and second characteristics. The first characteristic is applied if the addressable memory location is within the set of addressable memory locations, and an entity is currently authenticated to and authorized to access the set of addressable memory locations. The second characteristic is applied if the addressable memory location is within the set of addressable memory locations, and no entity is currently authenticated to and authorized to access the set of addressable memory locations. The set of addressable memory locations can also be a logical partition, where the first and second characteristics are stored in a logical partition table.
US09104617B2	Using accelerators in a hybrid architecture for system checkpointing A hybrid node of a High Performance Computing (HPC) cluster uses accelerator nodes for checkpointing to increase overall efficiency of the multi-node computing system. The host node or processor node reads/writes checkpoint data to the accelerators. After offloading the checkpoint data to the accelerators, the host processor can continue processing while the accelerators communicate the checkpoint data with the host or wait for the next checkpoint. The accelerators may also perform dynamic compression and decompression of the checkpoint data to reduce the checkpoint size and reduce network loading. The accelerators may also communicate with other node accelerators to compare checkpoint data to reduce the amount of checkpoint data stored to the host.
US09104615B2	Processor for processing digital data with pipelined butterfly operator for the execution of an FFT/IFFT and telecommunication device A processor for processing digital data includes at least one butterfly operator for execution of a fast Fourier transform computation, the butterfly operator having a pipeline architecture for synchronized receiving and processing of input data according to a clock signal. This pipeline architecture includes a plurality of elements including addition, subtraction, and multiplication hardware modules and links for synchronized transmission of data between the modules. At least one element of this pipeline architecture is configurable by at least one programmable parameter, between a first configuration wherein the butterfly operator performs the fast Fourier transform computation and a second configuration wherein the butterfly operator performs a metric computation of an implementation of a channel decoding algorithm.
US09104614B2	Handling unclean shutdowns for a system having non-volatile memory Systems and methods are disclosed for handling unclean shutdowns for a system having non-volatile memory (“NVM”). In some embodiments, the system can leverage from information obtained from index pages in order to efficiently reconstruct logical-to-physical mappings after an unclean shutdown event. In other embodiments, the system can reconstruct logical-to-physical mappings by leveraging from context information stored in a NVM. In further embodiments, context information can be used in conjunction with index pages to reconstruct logical-to-physical mappings after an unclean shutdown.
US09104613B2	Disaster recovery in a networked computing environment In general, embodiments of the present invention provide a DR solution for a networked computing environment such as a cloud computing environment. Specifically, a customer or the like can select a disaster recovery provider from a pool (at least one) of disaster recovery providers using a customer interface to a DR portal. Similarly, using the interface and DR portal, the customer can then submit a request for DR to be performed for a set (at least one) of applications. The customer will then also submit (via the interface and DR portal) DR information. This information can include, among other things, a set of application images, a set of application files, a set of recovery requirements, a designation of one or more specific (e.g., application) components for which DR is desired, dump file(s), database file(s), etc. Using the DR information, the DR provider will then generate and conduct a set of DR tests and provide the results to the customer via the DR portal and interface. In one embodiment, a temporary DR environment can be created (e.g., by the DR provider or the customer) in which the DR tests are conducted.
US09104599B2	Apparatus, system, and method for destaging cached data Apparatuses, systems, methods, and computer program products are disclosed for destaging cached data. A method includes caching write in a nonvolatile solid-state cache by appending the data to a log of the nonvolatile solid-state cache. The log includes a sequential, log-based structure preserved in the nonvolatile solid-state cache. A method includes destaging at least a portion of the data from the nonvolatile solid-state cache to the backing store in a cache log order. The cache log order comprises an order in which the data was appended to the log of the nonvolatile solid-state cache.
US09104589B1	Decoding vectors encoded with a linear block forward error correction code having a parity check matrix with multiple distinct pattern regions A decoder for decoding received vectors r encoded in accordance with a forward error correction code having a parity check matrix H with multiple regions at least two of which have patterns of ones with different pattern characteristics. The decoder can include a permuted decode module configured to decode in accordance with a permuted version of the parity check matrix H in which the ones in one of the regions are permuted into a permuted pattern that has a pattern characteristic of the other region. The decoder can also include a reorder module that permutes probabilities of a received vector r to be decoded to correspond with the permuted parity check matrix H.
US09104586B2	Address space management while switching optically-connected memory A remote processor is signaled for receiving a remote machine memory address (RMMA) space that contains data to be transferred. The RMMA space is mapped to a free portion of a system memory address (SMA) space of the remote processor. The entries of a page table corresponding to the address space are created.
US09104585B2	Coupled pipe network—reservoir modeling for multi-branch oil wells A convergent solution is provided for a coupled system where oil flow from a subsurface reservoir formation enters a number of pipes of a multi-branch well in the formation. An iterative linear system solver computer implemented methodology is developed, capable of handling a large number of unknowns which are present when modeling a multi-branch well. A systematic approach which defines proper boundary conditions at the reservoir level and at the wellhead is provided and utilized.
US09104582B1	Optimized data storage A device is configured to receive first data of a media file. The first data is in a first type of format. The device is further configured to extract media data and metadata from the first data, to store the media data in a first cache, and to store the metadata in a second cache. The device is also configured to determine a second type of format that is supported by a client device. The second type of format is different from the first type of format. The device is configured to retrieve the media data from the first cache, to retrieve the metadata from the second cache, to construct second data that is in the second type of format based on the media data and the metadata, and to provide the second data to the client device.
US09104581B2	eDRAM refresh in a high performance cache architecture A memory refresh requestor, a memory request interpreter, a cache memory, and a cache controller on a single chip. The cache controller configured to receive a memory access request, the memory access request for a memory address range in the cache memory, detect that the cache memory located at the memory address range is available, and send the memory access request to the memory request interpreter when the memory address range is available. The memory request interpreter configured to receive the memory access request from the cache controller, determine if the memory access request is a request to refresh a contents of the memory address range, and refresh data in the memory address range when the memory access request is a request to refresh memory.
US09104575B2	Reduced-impact error recovery in multi-core storage-system components A method for recovering from an error in a multi-core storage-system component is disclosed. In one embodiment, such a method includes detecting an error in a first core of a multi-core component. The method determines whether the error was one of (1) detected by the first core; and (2) detected by a core other than the first core. In the event the error was detected by the first core and the error is recoverable, the first core recovers from the error without substantially impacting operation of other cores in the multi-core component. In the event the error was detected by a core other than the first core and the error is recoverable, a core other than the first core recovers from the error without substantially impacting operation of other cores in the multi-core component. A corresponding apparatus and computer program product are also disclosed.
US09104571B2	Monitoring device of integrated circuit A semiconductor memory device includes a plurality of data input/output pads configured to transmit and receive data to and from memory cells, an alert pad configured to output data error information while the data is transmitted and received, and a monitoring device configured to output the data error information to the alert pad in a first mode and to output monitoring information to the alert pad in a second mode.
US09104570B2	Method for monitoring at least two microcontrollers A method for monitoring at least two microcontrollers using a watchdog is described. The watchdog is associated with a first microcontroller and monitors the communication of a message from the first microcontroller within a time interval of a predefined duration. The message communicated to the watchdog by the first microcontroller contains a contribution which is formed on account of communication between the first microcontroller and a second microcontroller connected to the latter and on the basis of which the watchdog checks the proper method of operation of the second microcontroller. The disclosure also describes a circuit arrangement and a battery with a battery management unit which are configured to carry out the method according to the disclosure.
US09104568B2	Detection of memory cells that are stuck in a physical state A method for detecting memory cells that are stuck in a physical state. The method includes performing a diagnostic read of a memory cell in a memory system. The memory system is configured to utilize at least one read threshold value to determine a read data value stored in the memory cell when performing a data read operation on the memory cell. Performing the diagnostic read includes: comparing a measurement property of the memory cell to at least one diagnostic threshold value, where at least one of the diagnostic threshold values is different from all of the read threshold values; and identifying the memory cell as being stuck in a physical state based on the comparing. Based on identifying the memory cell as being stuck in a physical state, an indication that memory cell is stuck is output along with a diagnostic data value associated with the physical state.
US09104565B2	Fault tracing system and method for remote maintenance Provided is a fault tracing system and method for remote maintenance. The fault tracing method includes detecting faults by receiving error events or fault diagnosis request messages, generating transactions for the detected faults, tracing the faults according to the transactions, and notifying a client terminal or user of the fault diagnosis results. Accordingly, it is possible to accurately trace a fault even in a home/building network environment complicatedly consisting of various resources.
US09104557B2	Encoded chip select for supporting more memory ranks Method and systems are disclosed for increasing the number of ranks supported in a memory system. In one embodiment, a plurality of predefined subsets of memory chips on a memory module is selected. A chip select signal uniquely identifying the selected subset of memory chips is generated. The chip select signal is encoded as a multi-bit word having a bit width that is less than the number of predefined subsets of memory chips. Each bit of the encoded chip select signal is transmitted along a separate chip select line. The transmitted chip select signal is decoded to determine the identity of the selected subset of memory chips. The selected subset of memory chips identified by the decoded chip select signal are read or written.
US09104554B2	Storage apparatus, storage controller and method for relocating data in solid state drive According to one embodiment, a storage controller comprises an access statistic collection unit, a selection unit and a rewrite unit. The access statistic collection unit collects write frequencies of a plurality of small logical address areas having a predetermined size which configure a logical area of a logical unit defined using a solid state drive. The selection unit selects a set of first small logical address areas having low write frequencies from the logical unit. The rewrite unit collectively rewrites data of the set of the first small logical address areas to the solid state drive, and collectively rewrites data of a set of remaining second small logical address areas to the solid state drive.
US09104553B2	Extending cache for an external storage system into individual servers Mechanisms are provided for extending cache for an external storage system into individual servers. Certain servers may have cards with cache in the form of dynamic random access memory (DRAM) and non-volatile storage, such as flash memory or solid-state drives (SSDs), which may be viewed as actual extensions of the external storage system. In this way, the storage system is distributed across the storage area network (SAN) into various servers. Several new semantics are used in communication between the cards and the storage system to keep the read caches coherent.
US09104552B1	Method for the use of shadow ghost lists to prevent excessive wear on FLASH based cache devices The present invention is a system and method for utilizing shadow/ghost list to prevent excessive wear on FLASH based cache devices. The method determines when data is highly likely to be accessed again, and avoids writes to a FLASH based caching device when data is unlikely to be accessed again through the use of “shadow” or “ghost” lists that are also used to perform adaptive caching.
US09104550B2	Physical levels deterioration based determination of thresholds useful for converting cell physical levels into cell logical values in an array of digital memory cells A method for converting a measured physical level of a cell into a logical value, in an array of memory cells storing physical levels which diminish over time, the method may include: determining extent of deterioration of the physical levels and determining thresholds accordingly for at least an individual cell in the array; and reading the individual cell including reading a physical level in said cell and converting said physical level into a logical value using at least some of said thresholds, wherein said determining extent of deterioration comprises storing predefined physical levels rather than data-determined physical levels in each of a plurality of cells and determining extent of deterioration by computing deterioration of said predefined physical levels.
US09104548B2	Method and apparatus for memory management One or more circuits of a device may comprise a memory. A first portion of a first block of the memory may store program code and/or program data, a second portion of the first block may store an index associated with a second block of the memory, and a third portion of the first block may store an indication of a write status of the first portion. Each bit of the third portion of the first block may indicate whether an attempt to write data to a corresponding one or more words of the first portion of the first block has failed since the last erase of the corresponding one or more words of the first portion of the first block. Whether data to be written to a particular virtual address is written to the first block or the second block may depend on the write status of the first block and the second block.
US09104547B2	Wear leveling for a memory device Memory devices and methods to facilitate wear leveling operations in a memory device. In one such method, particular blocks of memory cells are excluded from experiencing wear leveling operations performed on the memory device. In at least one method, a user selects blocks of memory to be excluded from wear leveling operations performed on the remainder of blocks of the memory device. Selected blocks of memory are excluded from wear leveling operations responsive to a command initiated by a user identifying, either directly or indirectly, the selected blocks to be excluded.
US09104538B2	Assessment of electronic sensor data to remotely identify a motor vehicle and monitor driver behavior A computing device is connected to a motor vehicle's diagnostic port or communication port to acquire vehicle sensor data, for example from various pressure, temperature, oxygen, fuel and other sensors typically installed on a motor vehicle for other reasons. Acquired sensor data is wirelessly transmitted to a remote server where the acquired sensor data can be compared to a database of stored sensor data to identify the motor vehicle. Additional functionality is described that leverages uploaded sensor data. Sensor data may be uploaded to the server in near-real time, and/or buffered locally and uploaded by periodic or episodic, push or pull communication protocols.
US09104536B2	Method for sampling monitoring data of construction equipment A method of sampling monitoring data of construction equipment according to the present disclosure includes: setting a sampling cycle of the monitoring data of the construction equipment when the construction equipment enters into an operation; sampling the monitoring data of the construction equipment according to the sampling cycle when a sampling start is input; and storing the sampled data and transmitting consecutive sampling data to a remote management server when a total sampling time elapses.
US09104535B1	Traffic based driving analysis A driving analysis server may be configured to receive vehicle operation data from vehicle sensors and telematics devices of a first vehicle, and may use the data to identify a potentially high-risk or unsafe driving behavior by the first vehicle. The driving analysis server also may retrieve corresponding vehicle operation data from one or more other vehicles, and may compare the potentially high-risk or unsafe driving behavior of the first vehicle to corresponding driving behaviors in the other vehicles. A driver score for the first vehicle may be calculated or adjusted based on the comparison of the driving behavior in the first vehicle to the corresponding driving behaviors in the other vehicles.
US09104534B2	Abstracting programmatic representation of data storage systems Providing for a paradigm shift in block-level abstraction for storage devices is described herein. At a block-level, storage is characterized as a variable size data record, rather than a fixed size sector. In some aspects, the variable size data record can comprise a variable binary key-data pair, for addressing and identifying a variable size block of data, and for dynamically specifying the size of such block in terms of data storage. By changing the key or data values, the location, identity or size of block-level storage can be modified. Data records can be passed to and from the storage device to facilitate operational commands over ranges of such records. Block-level data compression, space management and transactional operations are provided, mitigating a need of higher level systems to characterize underlying data storage for implementation of such operations.
US09104527B2	Automatically generated style rules for page design The automated derivation of style rules based on authored style rules. Style rules are used to apply styles to certain elements of a markup language document. Authored style rules are style rules that are created by a designer. However, the derived style rules are automatically created by evaluating an authored style rule set. Then authored style rules are displayed with derived style rules. The user interface in which the combined style rules appear may also provide interactivity such that at least one of the properties of a derived style rule is bound to a property of an authored style rule from which the property of the derived style rule was derived. In some embodiments, the derived style rules may be style rules that are helpful to the design of a document, but are not interpreted after the document is deployed.
US09104517B2	System for downloading and executing a virtual application A virtual process manager for use with a client application. Both the virtual process manager and the client application are installed on a client computing device. The client application is configured to receive a user command to execute a virtual application at least partially implemented by a virtualized application file stored on a remote computing device. In response to the user command, the client application commands to the virtual process manager to execute the virtualized application file. Without additional user input, the virtual process manager downloads the virtualized application file from the remote computing device and executes the virtual application at least partially implemented by the downloaded virtualized application file on the client computing device. The client application may comprise a conventional web browser or operating system shell process.
US09104512B2	Fencing data transfers in a parallel active messaging interface of a parallel computer Fencing data transfers in a parallel active messaging interface (‘PAMI’) of a parallel computer, the PAMI including data communications endpoints, each endpoint comprising a specification of data communications parameters for a thread of execution on a compute node, including specifications of a client, a context, and a task, the compute nodes coupled for data communications through the PAMI and through data communications resources including a deterministic data communications network, including initiating execution through the PAMI of an ordered sequence of active SEND instructions for SEND data transfers between two endpoints, effecting deterministic SEND data transfers; and executing through the PAMI, with no FENCE accounting for SEND data transfers, an active FENCE instruction, the FENCE instruction completing execution only after completion of all SEND instructions initiated prior to execution of the FENCE instruction for SEND data transfers between the two endpoints.
US09104504B2	Systems and methods for embedded shared libraries in an executable image Systems and methods are provided for deploying new software application features as a dynamically-loadable executable package including one or more dynamically-linked shared dependent libraries. The dynamically-loadable executable package may be capable of being loaded into volatile memory and executed in an information handling system environment with or without the dependent shared libraries, and without duplicating the presence or use of redundant shared libraries that may be already present on the existing software stack.
US09104503B2	Processing a unit of work A client computer group is created at a server computer by selecting a subset of a group of client computers, where each of the group of client computers has a separate communication channel with the server computer. A message from at least one of the subset of the group of client computers is received at the server computer. In response to receiving messages from at least two of the subset of the group of client computers within the client computer group, the messages are grouped under a single unit of work. A single decision associated with the single unit of work for the client computer group is computed. Each of the at least two of the subset of the group of client computers is operable to accept the single decision.
US09104502B2	Managing resource pools for deadlock avoidance In an illustrative embodiment of a method for managing a resource pool for deadlock avoidance, a computer receives a request from a thread for a connection from the resource pool, and determines whether the thread currently has at least one connection from the resource pool. Responsive to a determination that the thread currently has at least one connection from the resource pool, a new concurrent connection from one of a reserved partition of the resource pool is allocated and the connection is returned to the thread.
US09104499B2	System for minimizing resource latency between processor application states in a portable computing device by scheduling resource state set transitions Resource state sets corresponding to the application states are maintained in memory. A request may be issued for a processor operating in a first application state corresponding to the first resource state set to transition to a second application state corresponding to the second resource state set. A start time to begin transitioning resources to states indicated in the second resource state set is scheduled based upon an estimated amount of processing time to complete transitioning. A process is begun by which the states of resources are switched from states indicated by the first resource state set to states indicated by the second resource state set. Scheduling the process to begin at a time that allows the process to be completed just in time for the resource states to be immediately available to the processor upon entering the second application state helps minimize adverse effects of resource latency.
US09104496B2	Submitting operations to a shared resource based on busy-to-success ratios In an embodiment, an average busy-to-success ratio is calculated for partitions that submitted operations to a shared resource during a first time period. A first busy-to-success ratio for a first partition during the first time period is calculated. If the first busy-to-success ratio is greater than the average busy-to-success ratio and a difference between the first busy-to-success ratio and the average busy-to-success ratio is greater than a threshold amount, a throttle amount for the first partition is increased. A first operation from the first partition during a first time subdivision of a second time period is received. If a number of operations received from the first partition during the first time subdivision of the second time period is greater than the throttle amount for the first partition, a busy indication is returned to the first partition and the first operation is not submitted to the shared resource.
US09104493B2	System and method for cluster management A system and method of managing a cluster of distributed machines is described. A cluster manager receives status updates regarding tasks running on each machine in the cluster from a task tracker running on the machine. The cluster manager receives resource requests from a job tracker created by a client wishing to run a job in the cluster. The cluster manager is responsible for implementing push-based fair scheduling of resources to the job trackers. The job tracker is responsible for running tasks for one job in the resource identified by the cluster manager. In one embodiment, the job tracker can run in the client for small jobs and in the cluster for larger jobs. The cluster manager can also be restarted, for example, for software updates without restraining the cluster.
US09104491B2	Batch scheduler management of speculative and non-speculative tasks based on conditions of tasks and compute resources A request from a client to perform a task is received. The client has a predetermined limit of compute resources. The task is dispatched from a batch scheduler to a compute node as a non-speculative task if a quantity of compute resources is available at the compute node to process the task, and the quantity of compute resources in addition to a total quantity of compute resources being utilized by the client is less than or equal to the predetermined limit, such that the non-speculative task is processed without being preempted by an additional task requested by an additional client. The task is dispatched, from the batch scheduler to the compute node, as a speculative task if the quantity of compute resources is available to process the task, and the quantity of compute resources in addition to the total quantity of compute resources is greater than the predetermined limit.
US09104490B2	Methods, systems and apparatuses for processor selection in multi-processor systems Methods, systems and apparatuses for processor selection in multi-processor systems are disclosed. An example method includes, for each of a plurality of processors, retrieving a list of interrupt instances for a plurality of interrupt types; calculating an interrupt instance count value for each of the plurality of interrupt types; multiplying a corresponding weighting factor by the interrupt instance count value for each one of the plurality of interrupt types to generate a plurality of weighted interrupt values; calculating an overall weighted vector value based on the sum of the plurality of weighted interrupt values; and designating one of the plurality of processors as a selected processor based on the lowest overall weighted vector value.
US09104489B2	Dynamic run time allocation of distributed jobs with application specific metrics A job optimizer dynamically changes the allocation of processing units on a multi-nodal computer system. A distributed application is organized as a set of connected processing units. The arrangement of the processing units is dynamically changed at run time to optimize system resources and interprocess communication. A collector collects application specific metrics determined by application plug-ins. A job optimizer analyzes the collected metrics and determines how to dynamically arrange the processing units within the jobs. The job optimizer may determine to combine multiple processing units into a job on a single node when there is an overutilization of an interprocess communication between processing units. Alternatively, the job optimizer may determine to split a job's processing units into multiple jobs on different nodes where one or more of the processing units are over utilizing the resources on the node.
US09104487B2	Reducing response time variance of virtual processors A capability is provided for reducing response variance of virtual processors. A controller receives a processing request. The controller may propagate the processing request toward multiple virtual processors hosted on multiple hardware devices contemporaneously. The controller may propagate the processing request toward a first virtual processor hosted on a first hardware device and propagate the processing request toward a second virtual processor hosted on a second hardware device based on a determination that a timeout period expires before a processing response is received from the first virtual processor. The timeout period may be determined based on one or more response time statistics of the virtual processor and one or more response time statistics of a physical processor.
US09104486B2	Apparatuses, systems, and methods for distributed workload serialization Apparatuses, systems, methods, and computer program products are provided for processing workload requests in a distributed computing system. In general, a cooperative workload serialization system is provided that includes a Message Queue that is configured to receive and hold workload requests from a number of requestors and a Request Manager that is in communication with the Message Queue and is configured to direct the processing of the workload requests. The system may include a Culler in communication with the Request Manager, where the Culler is configured to monitor the validity of the workload requests. The Request Manager, in turn, may be configured to remove an indicated workload request from the Message Queue based on information from the Culler that the indicated workload request is not valid.
US09104484B2	Methods and systems for evaluating bytecode in an on-demand service environment including translation of apex to bytecode Techniques and mechanisms for conversion of code of a first type to bytecode. Apex provides various unique characteristics. When converting to bytecode, these characteristics are handled to provide bytecode functionality. Some of the unique characteristics of Apex include Autoboxing, SOQL, Properties, Comparisons, Modifiers, Code coverage mechanisms and Sharing mechanisms.
US09104482B2	Differentiated storage QoS A system includes disk storage to provide differentiated storage QoS for a plurality of IO classes. Each IO class has a plurality of applications to it. A QoS controller collects IO statistics for each application and each class. The QoS controller adaptively determines an IO class assignment for each application based at least in part on the collected IO statistics.
US09104481B2	Resource allocation based on revalidation and invalidation rates Embodiments of the invention relate to visiting, by a computing device comprising a processor, each guest of a plurality of guests, obtaining, by the computing device, a list of invalidation counts and revalidation counts associated with resources based on the visiting each guest, and calculating, by the computing device, a target size for invalidating resources for each guest based on the list of invalidation counts and revalidation counts.
US09104480B2	Monitoring and managing memory thresholds for application request threads A memory management system is implemented at an application server. The management system includes a configuration file including configuration settings for the application server and applications. The configuration settings include multiple memory management rules. The management system also includes a memory management framework configured to manage settings of resources allocated to the applications based on the memory management rules. The applications requests for the resources through one or more independently operable request threads. The management system also includes multiple application programming interfaces (APIs) configured to facilitate communication between the applications and the memory management framework. The management system further includes a monitoring engine configured to monitor an execution of the request threads and perform actions based upon the configuration settings. The actions include notifying the applications about memory related issues and taking at least one preventive action to avoid the memory related issues.
US09104478B2	System and method for improved job processing of a number of jobs belonging to communication streams within a data processor A method of processing a job is presented. A packet selector determines a candidate job list including an ordered listing of candidate jobs. Each candidate job in the ordered listing belongs to a communication stream. Jobs in the candidate job list that are eligible for execution are identified by determining whether a preceding job belonging to the same communication stream as the candidate job is present in the candidate job list, and, for each candidate job in the candidate job list, determining whether a preceding job belonging to the same communication stream as the candidate job is being prepared for execution. The packet selector determines a priority for each eligible candidate job in the candidate job list by at least comparing the communication stream of each candidate job to a communication stream of a first job executing within the data processor.
US09104475B2	Methods and apparatus for managing operations of a web browser by predicting time period of subsequent script execution activity A computing device and methods of operating the same are disclosed. The computing device may include a network interface that receives web content and a display that displays a displayable format of the web content. In addition, a plurality of browser processing components are included that carry out browser processing activity to generate a displayable format of the web content, and the computing device includes a browser management component that monitors at least one browser processing activity of a corresponding browser processing component and coordinates at least one browser management activity to either reduce the likelihood that the at least one browser management activity adversely affects performance of the plurality of browser processing components, or allow the at least one browser management activity to perform activities that leads to overall improvement of the browsing experience.
US09104474B2	Variable precision floating point multiply-add circuit Embodiments of the present invention may provide methods and circuits for energy efficient floating point multiply and/or add operations. A variable precision floating point circuit may determine the certainty of the result of a multiply-add floating point calculation in parallel with the floating-point calculation. The variable precision floating point circuit may use the certainty of the inputs in combination with information from the computation, such as, binary digits that cancel, normalization shifts, and rounding, to perform a calculation of the certainty of the result. A floating point multiplication circuit may determine whether a lowest portion of a multiplication result could affect the final result and may induce a replay of the multiplication operation when it is determined that the result could affect the final result.
US09104473B2	Conversion and compression of floating-point and integer data Compression and decompression of numerical data can apply to floating-point or integer samples. Floating-point samples are converted to integer samples and the integer samples are compressed and encoded to produce compressed data for compressed data packets. For decompression, the compressed data retrieved from compressed data packets are decompressed to produce decompressed integer samples. The decompressed integer samples may be converted to reconstruct floating-point samples. Adaptive architectures can be applied for integer compression and decompression using one or two FIFO buffers and one or two configurable adder/subtractors. Various parameters can adapt the operations of adaptive architectures as appropriate for different data characteristics. The parameters can be encoded for the compressed data packet. This abstract does not limit the scope of the invention as described in the claims.
US09104472B2	Write transaction interpretation for interrupt assertion A method and circuit for a data processing system (12) provide a virtualized programmable interrupt control system (70) which processes interrupt event reports from interrupt sources (e.g., 14, 40) which generate write transactions to an address for an interrupt event register (80) which is authenticated and then interpreted based on the current state of the targeted interrupt to generate the next state using an interpretation table (306) and predetermined configuration/state bits (310-314).
US09104468B2	Terminal apparatus and method of controlling terminal apparatus with multi-tasking features A terminal apparatus, and associated method, stores in memory a plurality of application programs. A controller executes the plurality of application programs in a multi-tasking arrangement. When one of the application programs is replaced in the foreground with another application program, an image of the former application program while in an active state is stored in memory. That image is then used as part of a graphical user interface to provide an indication to a user of the other applications that are presently running, and the state of execution of the other application programs when last operating in the foreground.
US09104465B2	Main processor support of tasks performed in memory According to one embodiment of the present invention, a computer system for executing a task includes a main processor, a processing element and memory. The computer system is configured to perform a method including receiving, at the processing element, the task from the main processor, performing, by the processing element, an instruction specified by the task, determining, by the processing element, that a function is to be executed on the main processor, the function being part of the task, sending, by the processing element, a request to the main processor for execution, the request including execution of the function and receiving, at the processing element, an indication that the main processor has completed execution of the function specified by the request.
US09104463B2	Automated and optimal deactivation of service to enable effective resource reusability Automated deactivation of service to enable effective resource reusability in a computing system, may include receiving a request to destroy a virtual machine, the virtual machine running in a virtual data center comprising one or more software components allocated for servicing a customer. In response, a provisioning module may be notified to remove the virtual machine. Based on the number of resources determined to be left as available, deactivation of pending actions on the virtual machine may be performed at the time the virtual machine is being removed or as an automatic scheduled job to be performed at a scheduled time.
US09104461B2	Hypervisor-based management and migration of services executing within virtual environments based on service dependencies and hardware requirements A system for migrating services including a primary virtual environment (VE) with a service manager and a VE manager, and a secondary VE, where both VEs execute a plurality of services, a set of physical hardware, and a hypervisor including a service module for storing extended service attributes for each service. The hypervisor manages migration one of the plurality of services executing on a source VE, obtain hardware requirements of the source VE, obtain extended service attributes associated with the one of the plurality of services to be migrated, and select a target VE for migration of the service. The target VE is selected based on the source VE data and the extended service attributes of the one service. The hypervisor migrates the one service by configuring the target VE and installing the service on the target VE using install scripts that execute on the target VE.
US09104454B2	Virtual image overloading for solution deployment An instantiable virtual machine part definition and part configuration metadata of an instantiable virtual machine capable of deployment as at least a portion of a service solution is received from a master overloaded virtual image. A determination is made as to whether to configure the instantiable virtual machine to reuse, using virtual image sharing, at least one portion of the master overloaded virtual image during deployment of the instantiable virtual machine within a service solution. A minimal executable virtual machine part core of the instantiable virtual machine that reuses, using the virtual image sharing, the at least one portion of the master overloaded virtual image during execution is identified. A minimal executable virtual machine part instantiable from the identified minimal executable virtual machine part core as the instantiable virtual machine is configured to utilize, using the virtual image sharing, a shared resource within the master overloaded virtual image during execution.
US09104450B2	Graphical user interface component classification Systems, methods, and other embodiments associated with graphical user interface (GUI) component classification are described. One example method includes generating a first vector. The first vector may be generated based on image data describing a GUI component. The example method may also include assigning a GUI component classifier to the GUI component. Assigning the GUI component classifier may comprise comparing the first vector to members of a vector set. Members of the vector set may describe GUI elements. The example method may also include providing the GUI component classifier.
US09104445B2	Apparatus and method for scalable application service There are one or more pre-parsers for extracting one or more components from integrated document in a network system comprised of at least one terminal, a server, and at least one repeater, where the pre-parsers are installed in one or more of the terminal, the server, and the repeater. The server may create a primary SADL integrated document and transmit it to the terminal or the repeater. And, the repeater may transmit secondary SADL integrated document or the application, created by applying delivery context to the primary SADL integrated document to the terminal. The terminal may also apply delivery context to the primary SADL integrated document or the secondary SADL integrated document, thereby creating an application optimized for the terminal.
US09104438B2	Mapping computer desktop objects to cloud services within a cloud computing environment The present invention describes an approach for general management of a client desktop with respect to accessing Cloud services. Included are means for dynamically determining, viewing, organizing, and linking desktop objects to associated server side Cloud resources and services. Specifically, the present invention provides a mechanism whereby Cloud services can be automatically represented on a plurality of client systems (for example, laptops, desktops, PDAs, etc) complete with the ability for the underlying provider of those services to be dynamically mapped based on a user's profile. The user will see standard available services regardless of the provider.
US09104437B2	Efficient serialization of mutable objects A method of serialization in a data processing system includes serializing a mutable object utilizing a full serialization process, caching primitive data and metadata regarding the mutable object in binary format in cache and then checking whether primitive fields of the mutable object are modified. Thereafter, the mutable object is again serialized utilizing an abbreviated serialization process by reference to the cached primitive data and metadata if the primitive fields of the object are not modified. In the event that primitive fields of the object are modified, the full serialization process is utilized. Thereafter, the serialized mutable object is communicated to a distributed code element.
US09104435B2	Program and data annotation for hardware customization and energy optimization Technologies are generally described herein for supporting program and data annotation for hardware customization and energy optimization. A code block to be annotated may be examined and a hardware customization may be determined to support a specified quality of service level for executing the code block with reduced energy expenditure. Annotations may be determined as associated with the determined hardware customization. An annotation may be provided to indicate using the hardware customization while executing the code block. Examining the code block may include one or more of performing a symbolic analysis, performing an empirical observation of an execution of the code block, performing a statistical analysis, or any combination thereof. A data block to be annotated may also be examined. One or more additional annotations to be associated with the data block may be determined.

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