最新美国发明专利第2015-08-11期 - 专利汇|PatentHub专利检索|专利查询网|发明专利查询分析

Document	Document Title
US09106201B1	Systems and methods for DC-to-DC converter control A regulated, power supply system is described using multiphase DC-DC converters with dynamic fast-turnon, slow-turnoff phase shedding, early phase turn-on, and both load-voltage and drive-transistor feedback to pulsewidth modulators to provide fast response to load transients. In an embodiment, a system master can automatically determine whether all, or only some, slave phase units are fully populated. The programmable system includes fault detection with current and voltage sensing, telemetry capability, and automatic shutdown capability. In an embodiment, these are buck-type converters with or without coupled inductors, however some of the embodiments illustrated include boost configurations.
US09106198B2	High power tunable capacitor A high power tunable capacitor is disclosed. In an exemplary embodiment, an apparatus includes a capacitor coupled to an input signal, a body contacted switch coupled to the capacitor, the body contacted switch coupled to a body bias signal, and a floating body switch coupled between the body contacted switch and a ground, the floating body switch configured to decouple the body bias signal from the ground.
US09106196B2	Sound field spatial stabilizer with echo spectral coherence compensation In a system and method for maintaining the spatial stability of a sound field a balance gain may be calculated for two or more microphone signals. The balance gain may be associated with a spatial image in the sound field. Signal values may be calculated for each of the microphone. The signal values may be signal estimates or signal gains calculated to improve a characteristic of the microphone signals. The differences between the signal values associated with each microphone signal may be limited although some difference between signal values may be allowable. One or more microphone signals are adjusted responsive to the two or more balance gains and the signal gains to maintain the spatial stability of the sound field. The adjustments of one or more microphone signals may include mixing of two or more microphone. The signal gains are applied to the two or more microphone signals.
US09106194B2	Regulation of audio volume and/or rate responsive to user applied pressure and related methods An electronic device includes a force sensor that is configured to generate a force signal that indicates an amount of force being exerted thereon by a user, and a controller circuit that is configured to control a volume and/or rate that an audio signal is broadcast by a speaker responsive to the force signal.
US09106185B2	Amplifiers with inductive degeneration and configurable gain and input matching Amplifiers with inductive degeneration and configurable gain and input matching are disclosed. In an exemplary design, an apparatus includes a gain transistor, an inductor, and an input matching circuit for an amplifier. The gain transistor has a variable gain determined based on its bias current. The inductor is coupled between the gain transistor and circuit ground. The input matching circuit is selectively coupled to the gain transistor based on the variable gain of the gain transistor. For example, the input matching circuit may be coupled to the gain transistor in a low-gain mode and decoupled from the gain transistor in the high-gain mode. In an exemplary design, the input matching circuit includes a resistor, a capacitor, and a second transistor coupled in series. The resistor is used for input matching of the amplifier. The second transistor couples or decouples the resistor to or from the gain transistor.
US09106184B2	High-frequency amplifier, and high-frequency module and wireless transceiver using same There are provided a high-frequency amplifier and a high-frequency module having a high efficiency for an extensive input modulated signal power, and base station/mobile wireless machines using the amplifier or the module.The high-frequency amplifier includes a circuit that detects an envelope of an input modulated signal; a control signal generator circuit (a voltage controlled circuit or a current controlled circuit) that can change a voltage or a current according to a given function on the basis of a magnitude of the detected envelope signal; and a diode clamped variable power circuit that connects a plurality of diode clamped circuits each including a diode, a transistor, and a DC power supply to one another.
US09106177B2	Method and system for sensorless control of an electric motor Methods and systems for controlling an electric motor are provided. An estimated rotor flux angular position error is generated based on estimated back electromotive force (EMF) values, and based on the estimated rotor flux angular position error, an estimated rotor flux angular position, an estimated electrical synchronous frequency and/or an estimated rotor frequency can be generated.
US09106176B2	Apparatus for motor control system and associated methods A motor control apparatus to control a motor external to the motor control apparatus includes a microcontroller unit (MCU). The MCU includes mixed signal motor control circuitry adapted to perform back electromotive force (EMF) motor control in a first mode of operation. The mixed signal motor control circuitry is further adapted to perform field oriented control (FOC) in a second mode of operation.
US09106175B2	Diagnostic system and method for an electric power steering system A diagnostic system and method for an electric power steering system are provided. The diagnostic system includes a first microprocessor that determines a first relative position value indicating the relative rotational position of the rotatable shaft at the first time based on the signals from first and second position sensors. A second microprocessor determines a second relative position value indicating the relative rotational position of the rotatable shaft at the first time based on the signals from third and fourth position sensors. The first microprocessor determines whether the first relative position value is an acceptable value based on a difference between the first relative position value and the second relative position value.
US09106169B2	Controller structure for multiple mechanically coupled drive units A controller structure for more than two drive units coupled mechanically to a movable element includes a position measuring device for determining an actual position of the movable element and a position controller for calculating a setpoint speed from a setpoint position and the actual position, the position measuring device and the position controller jointly serving all drive units. Each drive unit, however, has a speed controller of its own. The drive units are configured either as master or as slave, individual drive units also being able to assume both functions. A torque-master-slave controller ensures a compensation of the torques between the drive units.
US09106168B2	Method for re-powering a star-connected stator A method for re-powering a star-connected stator having a plurality of parallel stator slots, wherein a plurality of stator winding bars having external winding connections are disposed in stator slots includes bridging the external winding connections so as to connect the stator winding bars in series and to form a polygonal stator capable of producing a polyphase alternating current.
US09106157B2	Method for generating switching signals for a three phase six pulse inverter This invention relates to a method for generating switching signals for inverters using wavelet basis functions as a means to determine switching times, pulse duration, shifting and scale; and to a three phase, six pulse wavelet modulated inverter employing the method as a switching technique.
US09106156B2	Power semiconductor device Among first IGBTs and first MOSFETs, a transistor arranged near a first gate control circuit gives, through a gate thereof, a gate control signal supplied from the first gate control circuit to a gate of a transistor arranged at a position farther from the first gate control circuit. Among second IGBTs and second MOSFETs, a transistor arranged near a second gate control circuit gives, through a gate thereof, a gate control signal supplied from the second gate control circuit to a gate of a transistor arranged at a position farther from the second gate control circuit.
US09106152B2	Method for stabilizing an electric grid A method for grid support by means of an inverter is disclosed, wherein the grid is supported by feeding in compensation currents. The method includes measuring a prevailing grid state, and breaking down voltages measured for measuring the prevailing grid state into symmetrical components of the grid state including positive sequence system components and negative sequence system components. The method further includes determining symmetrical components of a compensation current including positive sequence system components and negative sequence system components of the compensation current as functions of deviations of the positive sequence system components and negative sequence system components of the grid state from reference values, and feeding-in a compensation current as the vector sum of the determined symmetrical components of the compensation current.
US09106151B2	Power-factor-improving circuit and method for an offline converter A power-factor-improving circuit and method for an offline converter block the DC component and obtain the AC component of an input voltage of the offline converter. The AC component is superpositioned onto a DC bias signal to generate a dimming signal for the offline converter to adjust an output current of the offline converter. The offline converter has a high power factor due to the dimming signal with the AC component of the input voltage. In addition, the average of the dimming signal is determined by the DC bias signal, hence the output current can be precisely controlled according to the DC bias signal.
US09106143B2	AC/DC converter with galvanic insulation and signal corrector An AC/DC converter comprising an input rectifier circuit connected in series with a primary winding (5) of an isolating transformer (6) and to a chopper switch (T1) driven by a control circuit (10) using pulse width modulation on the basis of a signal representative of a primary current, the isolating transformer having a first secondary winding (7) that is wound in the same direction as the primary winding and that is connected to an output line (8) of the converter via a diode (D4) and a filter coil (L1), and a second secondary winding (9) that is wound in the opposite direction to the primary winding and that is connected directly to the output line via a diode (D2), the output line being connected to an output capacitor (Cout). The converter includes an analog correction circuit for correcting the primary current, which circuit is connected to the control circuit and to a measurement element (30) delivering a signal representative of the primary current, and is arranged to transform said signal into a triangular signal suitable for driving the control circuit.
US09106139B2	Low forward voltage rectifier A Low Forward Voltage Rectifier (LFVR) includes a bipolar transistor, a parallel diode, and a base current injection circuit disposed in an easy-to-employ two-terminal package. In one example, the transistor is a Reverse Bipolar Junction Transistor (RBJT), the diode is a distributed diode, and the base current injection circuit is a current transformer. Under forward bias conditions (when the voltage from the first package terminal to the second package terminal is positive), the LFVR conducts current at a rated current level with a low forward voltage drop (for example, approximately 0.1 volts). In reverse bias conditions, the LFVR blocks current flow. Using the LFVR in place of a conventional silicon diode rectifier in the secondary of a flyback converter reduces average power dissipation and increases power supply efficiency.
US09106138B1	Active parasite power circuit A circuit is provided that includes a parasitic power circuit that powers a parasitic circuit. The parasitic power circuit derives a supply voltage from an external AC or other signal suitable for use as a communications signal. A PMOS transistor or transistors is utilized to enable a supply voltage capacitor to charge substantially to the same voltage as the channel voltage of the communications signal.
US09106135B2	Voltage boosting/lowering circuit and voltage boosting/lowering circuit control method A voltage boosting/lowering circuit according to an aspect of the present invention includes an output voltage generation circuit 15 that includes a switch element 2 connected between an input terminal 1 and a choke coil 3 and a switch element 7 connected between the choke coil 3 and a ground, and generates an output voltage by switching the switch elements 2 and 7 between an on-state and an off-state and thereby boosting/lowering an input voltage input to the input terminal 1, a first switch control unit that outputs a first pulse signal to the switch element 2, a duty detection circuit 32 that detects a duty of the first pulse signal, and a second switch control unit that outputs a second pulse signal to the switch element 7 according to the detected duty.
US09106133B2	Arrangements of current conduction for SIMO converters A system includes a single-inductor-multiple-out (SIMO) converter that includes storage circuitry in communication with a plurality of output channels, and a controller that is configured to output one or more signals to alternatingly conduct current through the output channels over a plurality of switching cycles. The controller may determine fixed ratios of channel conduction periods between the plurality of output channels and set channel conduction periods for each switching cycle based on the fixed ratios. In addition or alternatively, the controller may determine an arrangement of orders in which to conduct current over the switching cycles. The arrangement may include an order for a current switching cycle that is a reverse order of an order for a previously switching cycle.
US09106131B2	High side buck converters and control methods thereof A high side buck converter includes a high side transistor, a low side transistor, a sensor, a sensing window generator, an error amplifier, a first comparator and an on-time signal generator. The high side and low side transistors are coupled together to form a switch node which is used as the reference ground of the controller. The sensor senses the output voltage and generates a sensing signal. The sensing window generator generates a sensing window signal. The error amplifier amplifies the error between a feedback signal of the sensing signal and a reference signal during the sensing window, and generates an error signal. The first comparator compares the feedback signal with the error signal and generates a first comparison signal. The on-time signal generator generates an on-time signal based on the first comparison signal, so as to control the high side and low side transistors.
US09106130B2	Magnetic device and power converter employing the same A magnetic device and power converter employing the same. In one embodiment, the magnetic device includes a first L-core segment including a first leg and a second leg extending therefrom, and an opposing second L-core segment including a first leg and a second leg extending therefrom. The magnetic device also includes a winding formed around at least one of the first leg and the second leg of the first L-core segment or the second L-core segment.
US09106125B1	Augmented power converter An augmented power converter may include a motor drive circuit. The motor drive circuit may include a motor drive transformer to convert a two-phase DC voltage to a three-phase output voltage for operating an electrical device. The motor drive circuit may also include a power control component for each phase of the two-phase voltage.
US09106123B2	Method for producing a cage rotor for an asynchronous machine A method for producing a cage rotor for an asynchronous machine is provided. The method includes providing a rotor body having a conductor bar segment in which conductor bars are provided, producing conductor bar slots in the conductor bar segment, wherein one conductor bar slot is provided for each of the conductor bars and producing short circuit ring recesses for short circuit rings, wherein the conductor bar slots each open into the short circuit ring recesses, pressure die casting cage material in the conductor bar slots, in situ, so that the conductor bars are formed of the conductor bar material in the conductor bar slots and the short circuit rings are formed in the short circuit ring recesses, and generating an area in the conductor bar material and the rotor body material including a metallurgical bond between the conductor bar material and the rotor body material at interfaces between the conductor bars and the rotor body.
US09106122B2	Single phase switched reluctance machine with short flux path A reluctance machine includes a stator having N stator poles and a rotor having N rotor poles. Each stator pole has a stator winding, and the windings of the N stator poles are configured for excitation in a single phase. The current flow in the windings is controlled to support a constrained flux path across two air gaps provided by circumferentially adjacent rotor/stator pole pairs. The rotor may further be structurally configured to support that constrained flux path and preclude diagonal flux across the rotor.
US09106120B2	Method for twisting an armature A method of fabricating an armature for a motor includes providing a laminated assembly having a length, a central axis, and a plurality of open slots each extending the length and each configured to locate one conductor at a first greater radial distance from the central axis and another conductor at a second lesser radial distance from the central axis. A first conductor is inserted into a first one of the slots at the greater radial distance such that the first conductor extends out of the first one of the slots. A free end of the inserted first conductor is bent in each of a first direction and a second direction orthogonal to the first direction. A second conductor is inserted into a second one of the slots at the lesser radial distance such that the second conductor extends out of the second one of the slots. A free end of the inserted second conductor is bent in each of the two orthogonal directions.
US09106119B2	Support ring for electric machine rotors A support ring for a rotor having a core and a plurality of windings. The support ring includes an annular base, a plurality of fingers, and a plurality of loaded edges. The plurality of fingers extend radially outward from the annular base, and each generally corresponds to one of the windings. The plurality of loaded edges extend axially from the fingers and are disposed radially outward of the windings.
US09106116B2	Rotor of rotating electrical machine A rotor of a rotating electrical machine includes a rotor core which includes an annular core plate formed by coupling a plurality of arc shaped core plate pieces. Multiple core plates are stacked together. A circumferential position of a seam formed by coupling the core plate pieces is alternately displaced for every predetermined number of core plates in a stacking direction of the core plates. A bar-shaped member is inserted in a plurality of through holes formed in the respective core plate pieces and aligned in the stacking direction. Both side surfaces of the rotor core in the stacking direction are interposed between end plates, the end plates contact the core plates, and the end plates do not contact the bar-shaped member at least on a radially outside of the bar-shaped member, which is a side in a direction of a centrifugal force that acts on the bar-shaped member.
US09106114B2	Drive component for a motor vehicle unit A drive component for a motor vehicle unit, in particular a motor vehicle door unit, especially a closing/opening device (1) in or on a motor vehicle door lock (2), comprising at least one motor (3) and at least one rubber-elastic bearing (4) for fixing the motor (3) on a base (5), wherein the bearing (4) has different spring rates (D1, D2) in the axial direction (A) and/or the radial direction (R).
US09106113B2	Components for generators, their use and stator mounting Disclosed herein are stator components designed to facilitate stator mounting as part of a generator. Also disclosed are generators suitable for use, for example, as part of a wind turbine, their components, as well as methods for their production.
US09106110B2	Power generating device and switch A power generating device includes a power generating part, a sliding member, first, second and third elastic parts, and a connecting member. When the sliding member is caused to move to a first storage completion position by an operation that causes the connecting member to rotate, the connecting member and the sliding member are disconnected so that the sliding member is caused to move in a first direction by an elastic force stored in the second elastic part. The connecting member is caused to rotate by an elastic force stored in the third elastic part. When the sliding member is caused to move to a second storage completion position by the third elastic part, the connecting member and the sliding member are disconnected so that the sliding member is caused to move in a second direction by an elastic force stored in the first elastic part.
US09106108B2	Smart feed line automation system based on 10KV carrier communication An embodiment of the present invention provides a smart feed line automation system based on 10 kV carrier communication. The system monitors smart switches of the line via 10 kV carrier communication, detects smart transformers, and calls up and returns centralized meter-reading information of smart transformer region. Furthermore, the detection of the state of a 10 kV power line may realize real-time monitoring of the temperature, insulating level and change of voltage and current of a 10 kV aerial line and cable line, and realize alarm for an abnormal state and fault information report, so as to rapidly identify, position, isolate and recover the fault.
US09106107B2	Contactless power transmission device provided in a vehicle for charging an electronic device A contactless power transmission device which transmits electric power in a contactless way includes: a power transmission section which transmits electric power using a primary coil; a power receiving section which is provided in a radio communication device and receives electric power using a secondary coil that is electromagnetically coupled with the primary coil; a housing which shields an electromagnetic wave, in which the power transmission section is provided, and which forms a closed space where the radio communication device is housed; and a housing antenna section which is provided in the housing and transmits a first communication signal to the outside of the housing, or transmits a second communication signal to the inside of the housing, the first communication signal being emitted from the radio communication device housed inside the housing, the second communication signal being emitted from the radio communication device housed outside the housing.
US09106102B2	Battery charge control apparatus A battery charge control apparatus for a vehicle, where the vehicle is provided with a prime mover driven by using fuel stored in the vehicle, power generation means for converting energy generated by the prime mover using the fuel into electrical energy, and a secondary battery that stores the electrical energy generated by the power generation means. The apparatus includes temperature detection means for detecting a temperature of the battery, and battery-charge limiting means for limiting storing of the electrical energy generated by the power generation means into the battery when the temperature of the battery detected by the temperature detection means is low. This leads to enhancement of fuel usage efficiency of the engine.
US09106094B2	Wireless charging system method of controlling wireless charging of a rechargeable battery An object of the present invention is to provide a wireless charging system and a control method thereof, as well as a portable electronic device and a charging device, all of which are capable of performing charging at an appropriate charging level. The wireless charging system includes: a battery charger 100; and a cellular telephone device 1. The cellular telephone device 1 includes: a plurality of power receiving units 10; a charging state monitoring unit 21; and a cellular telephone device side communication unit 14. The battery charger 100 includes: a plurality of power transmitting units 110 that transmit power to the cellular telephone device 1; a battery charger side communication unit 140; and a power transmission control unit 121 that controls transmission of power by the power transmitting units 110, based on a result of monitoring by the charging state monitoring unit 21.
US09106079B2	Power supply apparatus, method, and recording medium A power supply apparatus includes a power supply unit that wirelessly supplies power to an electronic apparatus, and a control unit that controls, if power output from the power supply unit to the electronic apparatus is lower than a first predetermined value, the communication unit so that a predetermined speed for transmitting the predetermined data is higher than a second predetermined value.
US09106069B2	Cable retaining apparatus A cable retaining apparatus for holding high voltage cables is disclosed. The apparatus has a pair of cable retaining members that are hingedly connected to each other and engage around one or more cables. A clamping device connects the ends of the retaining members that are not hinged together thereby clamping the apparatus around the cables. The hinge that connects the retaining members together is adjustable to vary the position of the hinging axis allowing the apparatus to be used over a variety of sizes of cables.
US09106067B1	Ground bushing with three way lay and lag A ground bushing with a multi position lay and lag includes a lay and lag having several mounting surfaces for attachment of the lay and lag to the ground bushing in different positions. The bushing includes at least one mounting surface including indexing and the lay and lag includes at least two cooperating mounting surfaces to hold and position on the bushing. In one embodiment, the bushing includes one mounting surface with parallel grooves, and the lay and lag includes three cooperating mounting surfaces with cooperating parallel grooves. The lay and lag may include a smooth hole and the bushing may include a threaded hole for attaching the lay and lag to the bushing.
US09106065B1	Metallic floor box with non-metallic riser with flange An in-floor electrical floor-box assembly includes a rectangular metallic housing and a non-metallic riser with integral flange assembly having a rectangular flange that mates with the rectangular housing and an integral cylindrical riser for providing access to the electrical components through a round cover and finish flange. A low-voltage divider assembly separates cables carrying different voltages within the riser to reduce interference between the cables and any one of a variety of sub-plates having different configurations for accommodating a variety of multi-service or single service electrical functionality can be incorporated with the box.
US09106063B2	Electric hardware mounting-bracket The present disclosure includes an electric-box-assembly mountable on a first wall of a double wall structure for use in conjunction with the second wall of the double wall structure, a method of mounting the electric-box-assembly and wiring of the same. The electric-box-assembly includes a mounting-bracket including one or more mounting units, wherein each of said mounting units comprises a mounting panel; and an electric box. The mounting panel is configured to be directly attached onto the inner side of the first wall of the double wall structure, adjacently thereto, the first wall being erected. The electric box is configured to be mounted onto the inner side of the first wall of the double wall structure before the second wall of the double wall structure is securely attached to the beam-infrastructure.
US09106057B2	White-emitting monomolecular compound using excited-state intramolecular proton transfer, organic electroluminescent element and laser device using the same Provided are a white-emitting monomolecular compound using excited-state intramolecular proton transfer (ESIPT) characteristics, and an organic electroluminescence device and a laser device comprising same. The white-emitting monomolecular compound according to the present invention is prepared by covalently bonding at least two types of molecules which produce different colors and have excited-state intramolecular proton transfer (ESIPT) characteristics. The white-emitting monomolecular compound according to the present invention achieves white luminescence irrespective of the concentration thereof and of the state of the materials thereof, and therefore can be used in a variety of fields including an organic electroluminescence device and a laser device.
US09106056B1	Phase-coupled arrays of nanowire laser devices and method of controlling an array of such devices According to various embodiments, the present teachings include an array of nanowire devices. The array of nanowire devices comprises a readout integrated circuit (ROIC). An LED array is disposed on the ROIC. The LED array comprises a plurality of LED core-shell structures, with each LED core-shell structure comprising a layered shell enveloping a nanowire core, wherein the layered shell comprises a multi-quantum-well (MQW) active region. The LED array further comprises a p-side electrode enveloping the layered core-shell structure and electrically connecting the ROIC, wherein each p-side electrode has an average thickness ranging from about 100 nm to about 500 nm. A dielectric layer is disposed on the plurality of LED core-shell structures, with each nanowire core disposed through the dielectric to connect with an n-side semiconductor that is situated on the dielectric.
US09106055B2	Gas filled hollow fiber laser Apparatus, systems, and methods using an optically pumped gas filled hollow fiber laser can be implemented in a variety of applications. In various embodiments, operation of an optically pumped gas filled hollow fiber laser is based on population inversion in the gas. Additional apparatus, systems, and methods are disclosed.
US09106052B2	Dual channel pumping method laser with metal vapor and noble gas medium A laser pumping method pumps a primary amount of energy into the near red satellite band of a metal vapor and noble gas mixture laser medium and a lesser amount of energy is pumped into a highly excited level to stimulate laser output. The medium is can be a Rb vapor and Xe gas mixture. The lesser amount of energy is pumped into the laser medium to populate an excited level that lies above the upper laser level and transfers atomic or molecular population to the upper laser level by a nonradiative process. In preferred embodiments, the intermediate level is within a few kT of the upper laser level and the primary amount of energy is a large majority of the total energy. A laser device includes metal vapor and noble gas mixture laser medium to populate an intermediate level near an upper laser level, and pumping a lesser amount of energy into a highly excited level to stimulate laser output. The medium can be an Rb vapor and Xe gas mixture in preferred embodiments. A primary energy pump pumps population in a near red satellite band. A second energy pump having substantially less energy than the primary energy pump pumps population to a highly excited level.
US09106041B2	Electrical power connector fabrication method An electrical power connector fabrication method includes employing a cold drawing technique by using a series of dies to repeatedly draw a metal round rod into a thin thickness conducting contact bar, processing one end of the thin thickness conducting contact bar into a mating contact portion, stamping a part of the thin thickness conducting contact to form a mounting portion, cutting off the thin thickness conducting contact bar to obtain a finished metal contact formed of the mounting portion and the mating contact portion, repeating the aforesaid steps to obtain a large amount of metal contacts, attaching individual metal contacts to respective locating notches of a contact material strip, using an injection molding technique to mold electrically insulative housings on the metal contacts to form a number of electrical power connectors at a time, and then removing the contact material strip from the metal contacts.
US09106039B2	Process for producing a charge path When a hobby enthusiast has recharged the battery for a remote controlled vehicle, such as a scale facsimile automobile, boat, helicopter or airplane, the battery must be connected again to the vehicle drive system, to provide power. This operation is typically performed by connecting each lead of an electronic speed controller to each corresponding lead of the battery, through a removable barrel receptacle lead and a mating barrel plug lead respectively, attached to each corresponding lead. An improved connector lead is described herein that protects components that may be attached to either lead in a connection. The charge dissipates in a resistive member that is physically coupled to a conductive member to form at least in part a first lead. When an improved lead is connected to a mating lead, the connection initially provides a charge dissipation path through the resistive member, but subsequently provides a bypass, current carrying conductive path around the resistive member from one component to another. By making use of an improved connector, electrical components are protected, not only from hot-swap current, but also from electrostatic discharge in general.
US09106035B2	RF connector with push-on connection A radio frequency (RF) connector is provided. The connector includes a first socket member. The first socket member includes a conductive sleeve comprising a top portion, a bottom portion, and a plurality of springs connecting the top portion and the bottom portion. The first socket member also includes a base inside the conductive sleeve comprising a first matching hole configured to match to a first conductive pin of a first plug member. The connector also includes a second socket member. The second socket member includes a second matching hole configured to match to a second conductive pin of a second plug member, and a conductive body having outer threads configured to match to inner threads of the second plug member. The connector further includes a middle portion connected between the first socket member and the second socket member, the middle portion extending radically outwardly from a periphery of the middle portion.
US09106033B2	Busbar adapter The invention relates to a busbar adapter comprising a housing for receiving at least one installation device for contacting the installation device with at least one busbar that can be held in the busbar adapter, characterized in that the busbar adapter comprises at least one symmetrically configured contact terminal for receiving and contacting a contact of the installation device with an associated busbar, and at least one symmetrically configured attachment device for attaching the installation device to the busbar adapter.
US09106026B2	Connector The invention provides a connector including a body of insulating material and first, second, and third signal terminals. The terminals are arranged in a line along a first direction in the body. The third signal terminal is located between the first and second signal terminals. A frequency of a signal transmitted by the third signal terminal is about one hundredth or lower of a frequency of each signal transmitted by the first and second signal terminals.
US09106023B2	Adjustable roof mounting system An adjustable mounting system for mounting solar panels on roofs is disclosed. The system allows a user to mount the solar panels either with or without rails. The mounting assemblies are adjustable to allow the user to mount a base plate in a chosen location (either on a roof joist or other structural member or not) and to adjust the mounting location for the panel in as many as three axis of adjustment from the location of the base plate. A system for mounting and grounding the panels at the same time is also disclosed.
US09106021B2	Communication connector with a plurality of plug interface contacts A communication jack which includes a housing with an aperture for receiving a communication plug, and a circuit board at least partially within the housing. The circuit board includes crosstalk compensation elements. A plurality of plug interface contacts are connected to the circuit board. At least one of the plurality of plug interface contacts includes a contact element layered with at least one spring element.
US09106013B2	Externally latching I/O cable An external latching mechanism for an Input/Output (I/O) connection between devices is provided. In one embodiment, an external latching mechanism for an Input/Output (I/O) cable is provided. The external latching mechanism includes a housing coupled to an I/O cable at a first end and having an I/O connector extending a second end. An external latch is coupled by a mounting portion to the housing. The external latch has a first end and a second end. The second end of the arm extends beyond the second end of the housing to a barb. In another embodiment, an external latching Input/Output (I/O) connection is provided that includes a I/O card latching bracket configured to mate with an I/O cable assembly.
US09106010B2	Connector A connector includes a busbar, a housing and a cover. The busbar includes a first connection part extending in a first direction, a second connection part extending in a second direction opposite to the first direction at a position displaced from the first connection part in a direction orthogonal to the first direction, and a coupling part extending in a direction orthogonal to the first direction and the second direction and coupling the first connection part and the second connection part. The housing includes at least one accommodation groove accommodating the coupling part, and a slit through which one of the first connection part and the second connection part is inserted. The cover covers the accommodation groove.
US09106006B2	Connector having an anisotropic conductive film A connector, the connector comprises a tabulate main body and a plurality of tabulate conductors provided on the main body, nested with a pairing connector. Each conductor includes a tabulate terminal located in the main body and engaged with a pairing terminal of the pairing connector, and a rear end outwardly extended to the main body and connected to a terminal connecting part provided on the surface of a mounting part. A face of the rear end on the side of the mounting part is more distant to the surface of the mounting part than a face of the main body on the side of the mounting part. The rear end is connected to the terminal connecting part through an anisotropic conductive film provided between its face on the side of the mounting part and the terminal connecting part.
US09106004B2	Implantable medical electrical leads and connector assemblies thereof A connector assembly of an implantable medical electrical lead includes insulation and conductor segments, which may be formed together in a molded subassembly. The insulation segment includes at least one sealing surface, and the conductor segment includes at least one contact surface and a shank electrically common therewith. The shank has a smaller diameter than a uniform outer diameter of the assembly, which is defined by the sealing and contact surfaces, and the smaller diameter is sized to receive a coiled proximal end of a lead conductor mounted thereabout. The connector assembly may include another conductor segment that has a third contact surface, active or inactive, extending between third and fourth sealing surfaces of another insulation segment of the assembly; if active, a distal shank of the segment is electrically common with the third contact surface, and sized to receive a coiled proximal end of another lead conductor mounted thereabout.
US09106003B2	Cover for cable connectors A cover for a cable connector includes, in one embodiment, a unitary cover body extending along an axis. The cover defines a cavity and has a plurality of regions. The regions have different diameters for receiving a cable connector and establishing one or more seals.
US09105998B2	Connector A device-side connector (10) is connected to a wire-side connector (50) by being mounted into a shield case (14) of a device (11) including a base member (12) and the shield case (14) fixed to the base member (12), and includes first terminals (21), a first housing (25) fixed in position with respect to the base member (12) and configured to hold the first terminals (21), second terminals (22) connected to the first terminals (21) via flexible conductive members (23), and a second housing (33) configured to hold the second terminals (22) and engageable with the first housing (25) with a predetermined clearance (CL) defined therebetween by the engagement of engaging frames (30) of the first housing (25) and engaging protrusions (40A) of the second housing (33).
US09105997B2	Connector A connector which can absorb thermal expansion and contraction of a substrate, or positional deviation of the substrate, and which enables the male and female connectors thereof to be fitted to each other where the male and female connectors are inclined to each other. A male terminal of a male connector, and a female terminal of a female connector are slidable relative to each other when in contact with each other. The male terminal and the female terminal are rotatable relative to each other about a contact point when in contact with each other, and hence the male terminal and the female terminal can be attached and detached to and from each other at an arbitrary rotating position.
US09105996B2	Electronic circuit comprising electrical connections resistant to a severe environment The invention relates to an electromagnetic actuator comprising a housing (9) having several faces (20, 21) and an electronic control circuit (14) split into at least two parts (14a, 14b) distributed over at least two adjacent faces (20, 21) of the housing (9), each part (14a) of the circuit comprising at least one metallic connector (25a) arranged so as to be connected electrically and mechanically with a metallic connector (25b) of another part of the circuit (14b) so as to form an electrical connection (24).
US09105995B2	Terminal fitting A terminal fitting (10) includes a tubular connecting portion (11) and a resilient contact (14) in the form of a plate that is deflectably arranged in the connecting portion (11) and that resiliently contacts a male tab (90) inserted into the connecting portion (11). A contact (35) is provided in a range from a contact start position (37) with the male tab (90) to a contact end position (38) inside the resilient contact (14) in a plate width direction. Curved portions (31) recessed toward a center in the plate width direction are provided on outer edges of the resilient contact (14) in the plate width direction. Parts of the curved portions (31) most recessed toward the center in the plate width direction are arranged to face the contact start position (37) of the contact (35) in the plate width direction.
US09105994B2	Contact probe and semiconductor device socket including contact probe A contact probe having a plunger; a top contacting member which is provided at a tip end of the plunger and is brought into contact with an electrode of a semiconductor device; a bottom contacting member which is brought into contact with an electrode of a testing board; and an elastic member for urging the top contacting member and the bottom contacting member in opposite directions away from each other. The plunger is formed into a cylindrical shape and includes a through-hole which penetrates through the plunger in an axial direction thereof. The top contacting member includes a plurality of mountain-shaped sharp portions at a tip end thereof, and each of the sharp portions is asymmetrical with respect to a straight line that passes through a peak of the sharp portion and extends along an axial direction of the plunger, and is bent toward a center line of the plunger.
US09105993B2	Terminal testing adapter and device A terminal testing device provides an adapter customized to a port of a connector being tested so that force applied to the adapter identifies loose and fixed terminals in the connector. The adapter includes springs and push pins that correspond in number to the number of terminals being tested and has a face plate that corresponds to the type of connector being tested. The push pins provide force against the terminal end. Specifically, the device seats the adapter and connector to align both and permit force to be in line with terminal ends. The force applied to the terminal ends is uniform and controlled by means of the adapter and is obtained by a single driving means.
US09105989B2	Connection structure, wiring substrate unit, electronic circuit part unit, and electronic apparatus A connection structure includes a column electrode; a first connecting portion connected to one end of the column electrode; and a second connecting portion connected to another end of the column electrode via solder, wherein a height of the column electrode is a width of the first connecting portion or greater.
US09105988B2	Coaxial cable connector with continuity bus A coaxial cable connector including a continuity bus extending a ground circuit between a coaxial cable outer conductor and a coaxial cable connector part such as a coaxial cable connector fastener.
US09105986B2	Closely spaced antennas isolated through different modes Multi-antenna systems, including mobile devices having multiple antennas, are provided herein. A first antenna and a second antenna are operable at two or more of the same non-overlapping communication frequency bands. The first antenna and the second antenna are closely spaced and have different fundamental modes of operation such that the first antenna and second antenna are substantially isolated at the two or more non-overlapping communication frequency bands. The first antenna and second antenna having different fundamental modes can be a linear antenna, such as a monopole, dipole, PIFA, or PILA, and an aperture antenna, such as a slot or loop antenna.
US09105982B2	Transmitting and/or receiving device for installation in elastic structures An apparatus transmits and/or receives radio waves in the UHF band and is configured for installation in an elastic structure. The apparatus includes at least one electronic component and an antenna embedded in the elastic structure. The antenna is connected to the electronic component and includes at least one filament configured to be plastically deformable and/or elastically deformable. The filament is helically wound to a predetermined antenna length (L) and defines an antenna winding turns density per cm of the antenna length. The antenna length (L) is between 4 cm and 10 cm and the antenna winding turns density lies in a range of 5 to 15 winding turns per cm of the antenna length.
US09105980B2	Radio communication apparatus A radio communication apparatus (100) includes an antenna device (40) that faces at least a part of a conductor plate of a conductor surface (second casing) or a conductor layer of an interconnect substrate (30); and a plurality of conductor components (36) that are located between the antenna device (40) and the conductor surface and are arranged in a repetitive manner so as to intersect in a surface-normal direction of the conductor surface. The radio communication apparatus is, for example, a slide opening and closing type cellular phone and includes a first casing (10), a second casing (20), and a flexible interconnect substrate (30). The first casing (10) and the second casing (20) are slid relatively so that the radio communication apparatus (100) is switched between first and second states. In the first state, the interconnect substrate (30) is folded. The interconnect substrate (30) is extended further in the second state than in the first state.
US09105976B2	Linear radio frequency identification antenna and method for manufacturing the same A linear radio frequency identification antenna is provided and includes an insulating material, a shielding material, and a conductive wire. The shielding material connects with the insulating material to form a closed body. The conductive wire is covered by the closed body such that the conductive wire, the insulating material, and the shielding material together form a linear-shaped body.
US09105973B2	Optically scannable code antenna An optically scannable code antenna is provided. Encoded matrix codes are printed with electrically conductive material on a substrate. An antenna pattern is generated on the substrate from the electrically conductive material. Enclosed information in the matrix code and accessible via the antenna pattern is provided. At least a portion of the antenna pattern is also a portion of the matrix code. Signals are transmitted and received from the antenna pattern made up of a portion of the matrix code formed on the substrate by electrically conductive materials. Authentication and security measures using the matrix code and signal from the antenna pattern are also provided.
US09105972B2	Directional planar spiral antenna Directional wide band antenna that may be utilized to enhance cell phone coverage within a building, and/or for signals intelligence collection (SIGINT). Includes a spiral antenna with feed-point configured to transfer energy to/from the antenna. Includes an energy absorbent backing and an energy absorbent siding coupled with the spiral antenna. Includes a cavity behind the log-spiral slot antenna and in front of the energy absorbent backing. Includes a cable connector coupled to a tapered microstrip line coupled to the feed-point wherein the tapered microstrip line is configured to transform the input impedance to the antenna impedance. Housed in a container configured to hold the above listed components. Energy absorbent siding, cavity and energy absorbent backing greatly reduces back lobes. Another embodiment has log-spiral shaped slots at an outer portion of the log-spiral slot antenna overlap with the energy absorbent siding and wherein the feed-point overlaps the cavity.
US09105971B2	Single external antenna for FM phase diversity for a vehicle radio unit Systems, apparatuses and methods for providing FM phase diversity capabilities are provide. In some aspects, a vehicle system includes a first FM antenna positioned externally of a vehicle and adapted to receive a first FM signal, a radio unit positioned internally of the vehicle and including a display and at least one user control, a cable electrically coupled to the first FM antenna and the radio unit to communicate the first FM signal to the radio unit, and a second FM antenna positioned internally of the vehicle and adapted to receive a second FM signal that is communicated to the radio unit. In another aspect, a radio unit positioned internally of the vehicle may include a printed wire board and a second FM antenna may be positioned on the printed wire board internally of the vehicle and adapted to receive a second FM signal.
US09105969B2	Mechanism to avoid interference and improve communication latency in mmWave WPANs Briefly, a mechanism to avoid interference and improve channel efficiency in mmWave Wireless Personal Area Networks (WPANs) is disclosed. In particular, interference information during various time periods is tracked and used to optimize transmission scheduling. Further, a mechanism is provided to improve communication latency by distributing responsibility for coordination of slots amongst multiple transmitting devices.
US09105967B2	Mobile terminal A mobile terminal including a case that forms at least a portion of a terminal body of the mobile terminal. The case may include a case body, a different material portion attached to the case body and composed of a plateable material that is different from a material composing the case body, and an antenna coil formed on the different material portion via plating and configured to detect a change in magnetic flux occurring at a periphery of the terminal body.
US09105966B1	Antenna with an exciter A user device having a non-radiating exciter operatively coupled to feed a multi-band aperture antenna is described.
US09105958B2	Pseudo-antenna and system and method for manufacture of the same A pseudo-antenna and system and method for manufacturing the same are disclosed. In one embodiment of the pseudo-antenna, a substrate is provided including a surface layer selected from the group consisting of tetrel-based and metal materials. The surface layer is annealed by application of a static pulse from a Tesla emitter at ambient conditions. The surface layer presents a normalized unit structure having at least one phonon representing a micro-crystal surface effect and absorption band. Further, the surface layer presents imperfect harmonic interaction with the carrier wave.
US09105953B2	High frequency line to waveguide converter comprising first and second dielectric layers sandwiching an antenna with an adhesion layer A high frequency line-waveguide converter is provided which includes a first substrate including a first dielectric layer, a first conductive layer formed on a surface of the first dielectric layer, and a conductive pattern formed on the surface of the first dielectric layer that surrounds the second conductive layer. An antenna formed on a bottom surface of the first dielectric layer at a fixed interval from the second conductive layer. The high frequency line-waveguide converter also includes a second substrate including a third conductive layer and a fourth conductive layer separated by a second dielectric layer. An adhesion layer formed between the first substrate and second substrate, a shield conductive part formed by multiple vias between the conductive pattern and the fourth conductive layer, and a conductive waveguide in contact with the fourth conductive layer.
US09105949B2	Cell connector In order to enable the temperature in the region of at least one of the cell terminals that are connected to one another in an electrically conductive manner by a cell connector to be determined in a simple and reliable manner, there is proposed a cell connector for connecting a first cell terminal of a first electro-chemical cell and a second cell terminal of a second electro-chemical cell of an electro-chemical device in an electrically conductive manner which comprises a base body and a temperature sensing element that is fixed to the base body.
US09105942B2	Non-aqueous electrolyte solution and use thereof The present invention provides a non-aqueous electrolyte solution that can be used as an electrolyte solution of a non-aqueous secondary battery to improve the discharge rate performance of the battery. The non-aqueous electrolyte solution comprises a non-aqueous solvent and a BF3-cyclic ether complex. The BF3-cyclic ether complex content is greater than zero part by mass, but less than 1 part by mass relative to 100 parts by mass of the total amount of other electrolyte solution components. Preferable examples of the BF3-cyclic ether complex include BF3-tetrahydropyran complex and BF3-dioxane complex.
US09105938B2	Application of force in electrochemical cells The present invention relates to the application of a force to enhance the performance of an electrochemical cell. The force may comprise, in some instances, an anisotropic force with a component normal to an active surface of the anode of the electrochemical cell. In the embodiments described herein, electrochemical cells (e.g., rechargeable batteries) may undergo a charge/discharge cycle involving deposition of metal (e.g., lithium metal) on a surface of the anode upon charging and reaction of the metal on the anode surface, wherein the metal diffuses from the anode surface, upon discharging. The uniformity with which the metal is deposited on the anode may affect cell performance. For example, when lithium metal is redeposited on an anode, it may, in some cases, deposit unevenly forming a rough surface. The roughened surface may increase the amount of lithium metal available for undesired chemical reactions which may result in decreased cycling lifetime and/or poor cell performance. The application of force to the electrochemical cell has been found, in accordance with the invention, to reduce such behavior and to improve the cycling lifetime and/or performance of the cell.
US09105935B2	Method for making fuel cell membrane electrode assembly A method for making fuel cell membrane electrode assembly is provided. In the method, a porous template having a number of holes and a proton exchange membrane is provided. A number of tube carriers having electron conductibility are formed. Each tube carrier is formed in one hole of the porous template. A number of catalyst particles are uniformly adsorbed on inner walls of the tube carriers. Proton conductor is filled in the tube carriers having catalyst particles adsorbing thereon. The proton exchange membrane is sandwiched between the two porous templates to form a laminated structure. The laminated structure is hot pressed. The porous templates are removed from the hot pressed laminated structure.
US09105934B2	Platinum adlayered ruthenium nanoparticles, method for preparing, and uses thereof A superior, industrially scalable one-pot ethylene glycol-based wet chemistry method to prepare platinum-adlayered ruthenium nanoparticles has been developed that offers an exquisite control of the platinum packing density of the adlayers and effectively prevents sintering of the nanoparticles during the deposition process. The wet chemistry based method for the controlled deposition of submonolayer platinum is advantageous in terms of processing and maximizing the use of platinum and can, in principle, be scaled up straightforwardly to an industrial level. The reactivity of the Pt(31)-Ru sample was about 150% higher than that of the industrial benchmark PtRu (1:1) alloy sample but with 3.5 times less platinum loading. Using the Pt(31)-Ru nanoparticles would lower the electrode material cost compared to using the industrial benchmark alloy nanoparticles for direct methanol fuel cell applications.
US09105932B2	Lithium ion battery A lithium ion battery includes at least one battery cell. The battery cell includes a cathode electrode, an anode electrode, and a separator. The separator is sandwiched between the cathode electrode and the anode electrode. At least one of the cathode electrode and the anode electrode includes a current collector. The current collector is a carbon nanotube layer consisting of a plurality of carbon nanotubes.
US09105931B2	Positive electrode plate for use in lithium ion secondary battery, lithium ion secondary battery, vehicle, device with battery mounted thereon, and method for producing positive electrode plate for lithium ion secondary battery A positive electrode plate for a lithium ion secondary battery is made of aluminum and includes a positive current collecting foil made of aluminum, in which at least a main surface portion constituting a main surface is porous, a positive active material layer formed on the main surface portion of the positive current collecting foil, and a coating layer, having electrical conductivity and corrosion resistance, formed between the positive current collecting foil and the positive active material layer to directly coat the main surface of the positive current collecting foil.
US09105928B2	Positive active material for rechargeable lithium battery, method of preparing same, and rechargeable lithium battery including same A positive active material for a rechargeable lithium battery may include a solid solution represented by Chemical Formula 1. xLi2MnO3.(1−x)LiMO2 [Chemical Formula 1] In Chemical Formula 1, 0.1≦x≦0.6, and M and may be a metal composite compound represented by Chemical Formula 2. MnaCobNic. [Chemical Formula 2] In Chemical Formula 2, 0.3≦a≦0.5, 0.05≦b≦0.3, 0.3≦c≦0.55, and a+b+c=1.
US09105924B2	Positive active material for lithium secondary battery, precursor of positive active material, electrode for lithium secondary battery and lithium secondary battery Provided is a positive active material for a lithium secondary battery includes a lithium transition metal composite oxide having an α-NaFeO2-type crystal structure and represented by the composition formula of Li1+αMe1−αO2 (Me is a transition metal including Co, Ni and Mn and α>0). The positive active material contains Na in an amount of 900 ppm or more and 16000 ppm or less, or K in an amount of 1200 ppm or more and 18000 ppm or less.
US09105922B2	Negative active material, and negative electrode and lithium battery each including the negative active material A negative active material and a lithium battery are provided. The negative active material includes a composite core, and a coating layer formed on at least part of the composite core. The composite core includes a carbonaceous base and a metal/metalloid nanostructure disposed on the carbonaceous base. The coating layer includes a metal oxide coating layer and an amorphous carbonaceous coating layer.
US09105919B2	Chemical synthesis route for lithium ion battery applications An exemplary embodiment of a synthesis method includes the following acts or steps: providing LiMn2O4 material as a precursor; leaching Mn from the LiMn2O4 material using an acid to form a synthesized solution; adding carbonaceous material to the synthesized solution; adding phosphoric acid to the synthesized solution with carbonaceous material to form MnPO4 composite material; and adding Li containing compound to the MnPO4 composite material to form LiMnPO4 composite material.
US09105914B2	Battery pack including electrode tabs with load absorbing parts Disclosed herein is a battery pack including: a plurality of cylindrical battery cells arranged in at least two rows and a plurality of layers; and a partition member for partitioning the battery cells; wherein the partition member includes a partition plate and support plates; the battery cells in the state of being partitioned by the support plates have terminals on one side being fixed substantially in parallel to the partition plate by an electrode tab or tabs, and have terminals on the other side in at least one layer being fixed substantially in parallel to the partition plate by an electrode tab or tabs; and the support plates for clamping the battery cell of which the terminal on the other side is fixed by the electrode tab are formed respectively with projected pieces.
US09105913B2	Device and method for performing a biologically catalyzed electrochemical reaction A device includes a first electrode compartment, the anode compartment, and a second electrode compartment, the cathode compartment, with a quantity of an anode fluid including an electrochemically oxidizable substrate and optional further compounds in the anode compartment, a quantity of a cathode fluid including an electrochemically reducible substrate and optional further compounds in the cathode compartment, and further an anode at least partially in contact with the anode fluid in the anode compartment and a cathode at least partially in contact with the cathode fluid in the cathode compartment. In at least one embodiment, the anode and cathode are electrically connected and on the surface of the anode and the cathode a catalyst is present for respective catalysis of the electrochemical conversion of the electrochemically oxidizable substrate via an electrochemical oxidation reaction and for catalysis of the electrochemical conversion of the electrochemically reducible substrate via an electrochemical reduction reaction, the catalyst including electrochemically active micro-organisms on at least one of the anode or cathode.
US09105912B2	Boltless battery cell connection A battery pack includes a plurality of battery cells each having positive and negative cell terminals and a carrier mounted over and spanning across the plurality of battery cells. The carrier has trays with openings therethrough exposing the positive and negative cell terminals. A plurality of buss bars are received in corresponding trays. The buss bars each have a positive plate laser welded to the positive cell terminal of a corresponding battery cell through the corresponding opening and a negative plate laser welded to the negative cell terminal of a different battery cell through the corresponding opening. The buss bars may be bimetal buss bars.
US09105911B2	Battery module A battery module includes a plurality of battery units, each including an electrode assembly and an electrode terminal electrically connected to the electrode assembly; a bus bar connecting the electrode terminal of a first battery unit of the plurality of battery units and the electrode terminal of a second battery unit of the plurality of battery units; and a position arrangement unit configured to maintain a position of the bus bar relative to the electrode terminals of the first and second battery units.
US09105908B2	Components for battery cells with inorganic constituents of low thermal conductivity A lithium-ion battery cell is provided that includes at least one inorganic, multi-functional constituent that has a low thermal conductivity and is suitable for reducing or restricting thermal anomalies at least locally.
US09105905B2	Anode material having a uniform metal-semiconductor alloy layer The present invention relates to methods for producing anode materials for use in nonaqueous electrolyte secondary batteries. In the present invention, a metal-semiconductor alloy layer is formed on an anode material by contacting a portion of the anode material with a solution containing metals ions and a dissolution component. When the anode material is contacted with the solution, the dissolution component dissolves a part of the semiconductor material in the anode material and deposit the metal on the anode material. After deposition, the anode material and metal are annealed to form a uniform metal-semiconductor alloy layer. The anode material of the present invention can be in a monolithic form or a particle form. When the anode material is in a particle form, the particulate anode material can be further shaped and sintered to agglomerate the particulate anode material.
US09105904B2	Composite anode active material, anode and lithium battery including the same, and method of preparing composite anode active material In an aspect, a composite anode active material including particles, wherein the particles include: a first carbonaceous material that is substantially crystalline and includes at least one carbon nano-sheet; a non-carbonaceous material capable of intercalating and deintercalating lithium; and a second carbonaceous material that binds the first carbonaceous material and the non-carbonaceous material, wherein the particles have pores having a size of 50 nm or more is disclosed.
US09105900B2	Battery pack, electricity accumulation system, electronic instrument, electric vehicle, and electric power system Provided is a battery pack including: an exterior case formed with one or more hole sections; a battery cell in which a positive electrode terminal section is formed on one end surface thereof and a negative electrode terminal section is formed on the other end surface thereof; a battery holder having a plurality of battery cell receiving sections receiving the battery cell; and a metal plate joined to the battery holder and formed with a terminal contact section.
US09105897B2	Cylindrical AAA alkaline dry battery The invention relates to a cylindrical AAA alkaline dry battery including: a positive terminal protruding from one end face of the alkaline dry battery; a negative terminal protruding from the other end face; and an external label covering the alkaline dry battery. The diameter Dp (mm) and protruding height Hp (mm) of the positive terminal and the diameter Dn (mm) and protruding height Hn (mm) of the negative terminal satisfy the relation (1): 2.5≦Dn−Dp≦4.1 (1), and the relation (2): 0.8≦Hp−Hn≦1.1 (2). This permits easy and reliable identification of the polarities of the terminals, making it possible to provide a cylindrical AAA alkaline dry battery which is unlikely to be installed reversely.
US09105893B2	Electrically powered vehicle having a fuel cell comprising a sodium chlorate decomposition reactor for supplying the cell with oxygen An electrically powered vehicle includes a fuel cell with a decomposition reactor for decomposing sodium chlorate (NaClO3). Reaction products produced by the decomposition reactor include oxygen and sodium chloride (NaCl). Gaseous hydrogen is stored onboard the vehicle, such as in a hydrogen tank at a low pressure, using metal hydrides. The hydrogen from the hydrogen tank and the oxygen produced by the decomposition reactor are consumed by the fuel cell in order to produce electricity. The vehicle further includes a storage tank for storing the NaCl produced by decomposition of the NaClO3.
US09105892B2	Adaptive method for conversion of external power request to current setpoint to a fuel cell system based on stack performance A system and method for converting a fuel cell stack power request signal to a stack current set-point that considers stack performance parameters. The method includes obtaining a power-current relationship curve of the fuel cell stack to provide stack parameters including exchange current density and mass transfer coefficient. The method then calculates a slope for the stack using the parameters from the power-current relationship curve estimation that includes calculating a cell voltage at two predetermined stack current densities. The method then calculates a change in current in response to the power request signal, the stack voltage, the stack current and the calculated slope, and uses the change in current to update the current set-point for the stack.
US09105890B2	Cylindrical type secondary battery with upper and lower battery assemblies and fabrication method thereof A secondary battery having an upper battery assembly including an upper can housing a cap unit having an electrode terminal adapted to electrically connect to an external device and a gasket inserted between the cap unit and one end portion of the upper can for sealing and insulating the cap unit and the upper can. The secondary battery also has a lower battery assembly including a lower can housing an electrode assembly, the electrode assembly having a first electrode, a second electrode, and a separator interposed between the first electrode for preventing a short circuit between the two electrodes. A first electrode tap connects the first electrode to the cap unit and a second electrode tap connects the second electrode to the lower can.
US09105889B2	Method and apparatus for determining humidity states of individual cells in a fuel cell, method and apparatus for controlling humidity states of individual cells in a fuel cell, and a fuel cell system In order to cause a plurality of cells in a fuel cell to be recovered to a desired humidity state, it is configured to determine that the cells present a mixture of dry and overly humid states in the case where a predetermined condition is satisfied, and in the case where it is determined that the cells present the mixture, humidifying control is carried out to cause all the cells to attain the overly humid state, and thereafter, drying control is carried out to dry all the cells, to thereby cause the plurality of cells to be recovered to a predetermined humidity state.
US09105885B2	Apparatus for conditioning temperature of a fluid stream A system and method for conditioning the temperature of at least one fluid stream that is passed through a fuel cell stack is provided. The system comprises a system module, at least one inlet and a conditioning device. The system module is operable to humidify the fluid stream to a reach a predetermined humidity level that corresponds to a predetermined temperature. The one inlet of the fuel cell stack receives the fluid stream at a first temperature that is different from the predetermined temperature. The fuel cell stack includes at least one outlet operable to present coolant having a temperature that is different from the first temperature of the fluid stream. The conditioning device is operable to receive the fluid stream and the coolant and present the fluid stream to the coolant to change the first temperature of the fluid stream to be equal to the predetermined temperature.
US09105884B2	Method of controlling thickness of form-in-place sealing for PEM fuel cell stacks A sealed assembly is made using sealant including a deformable spacer to control thickness without adversely impacting elasticity and sealing force. Deformable spacers (e.g., elastomer, polyolefin, etc.) are mixed with an elastomeric precursor material and dispensed onto an assembly component, such as a fuel cell bipolar plate, and the remaining component(s) are assembled by pressing against the deformable spacer to ensure a defined seal thickness. The precursor is cured to form a seal that is further compressed to provide an effective sealing force. The deformable spacers control the thickness of a sealed area and allow use of form-in-place sealing processes.
US09105882B2	Energy storage cell An energy storage cell has a cell body with an areal expansion in an extension plane, with four side faces bounding a circumference of the area of extent and having each two of the side faces parallel to one another. A conductor electrode and a second electrode are disposed on one of the side faces symmetrically in the direction of the circumference of the extension plane relative to a center of the corresponding side face. A line from a contact point between an inward facing edge of the electrodes to a center point of the extension plane encloses an angle λ of 10°<λ<36° with the corresponding side face. The center of the side face and/or a contact point of an outward facing edge of the electrodes forms an angle β about the center point of the extension plane of 8°<β<45° with the corresponding side face with said center.
US09105881B2	Energy storage element A non-aqueous electrolyte secondary battery including: a container; an electrode assembly housed in the container; an electrode terminal provided at the container; and a current collector which electrically connects the electrode terminal and the electrode assembly, wherein the container includes a wall having (i) an outer surface with a protrusion part formed to be protrude outward and (ii) an inner surface with a recess part formed corresponding in position to the protrusion part when the protrusion parts is formed, and the current collector includes a base part connected to the electrode terminal in the recess part and an arm part which extends from the base part in the direction opposite to the protrusion direction of the protrusion part, and is connected to the electrode assembly.
US09105878B2	Organic light-emitting diode manufacturing method, organic light-emitting diode, image display device, illumination device, and substrate A method of manufacturing an organic light-emitting diode including preparing, by a dry etching method using a particle single layer film as an etching mask, a substrate provided with an uneven structure in which a plurality of unevenness is arranged in two dimensions on the surface of the substrate, and stacking, on the uneven structure, at least an anode conductive layer, an EL layer including a light-emitting layer containing an organic light-emitting material, and a cathode conductive layer containing a metal layer, such that the uneven structure is reproduced on the surface of the metal layer on the side of the EL layer, wherein the particle single layer film is formed using a mixture of a plurality of particles having different particle sizes, and an uneven structure is provided which satisfies particular requirements.
US09105875B2	Organic light-emitting display apparatus An organic light-emitting display apparatus including a substrate; an insulating layer disposed on the substrate; a first pixel electrode disposed on the insulating layer and including a reflecting layer; a pixel defining layer disposed around one end of the first pixel electrode and extending away from the first pixel electrode; a first intermediate layer disposed on the first pixel electrode and including an organic emission layer; an opposite electrode disposed on the first intermediate layer and the pixel defining layer and including a reflecting layer; and a first refractive layer disposed between the insulating layer and the pixel defining layer and having a refractivity greater than that of the insulating layer and the pixel defining layer. A first end of the first refractive layer is disposed to contact the first intermediate layer, and a second end of the refractive layer is disposed to face a portion of the opposite electrode.
US09105874B2	Light-emitting components and method for producing a light-emitting component A light-emitting component may include: a first electrode; an organic electroluminescent layer structure on or over the first electrode; a second translucent electrode on or over the organic electroluminescent layer structure; and a mirror layer structure on or over the second electrode, wherein the mirror layer structure has a lateral thermal conductance of at least 1*10−3 W/K.
US09105872B2	Display device and method of manufacturing the same A display device includes a display substrate, an encapsulation substrate facing the display substrate, a filling material between the display substrate and the encapsulation substrate, the filling material including a norbornene-based resin, and a sealing material joining the display substrate with the encapsulation substrate.
US09105870B2	Organic light-emitting apparatus and method of manufacturing the same An organic light-emitting apparatus and a method of manufacturing the same are provided.
US09105868B2	Organic EL element including a hole injection layer with a proportion of sulphur atoms relative to metal atoms An organic EL element has an anode and a cathode a light-emitting layer including an organic material provided between the anode and the cathode, a hole injection layer provided between the anode and the light-emitting layer, and a electron injection layer provided between the light-emitting layer and the cathode 7. The hole injection layer and the electron injection layer include metal atoms and sulphur atoms. The sulphur concentration in the hole injection layer and the electron injection layer is no less than 96 ppm and no more than 439 ppm in terms of numerical ratio of sulphur atoms to metal atoms in the hole injection layer.
US09105866B2	Organic light-emitting diode (OLED) display An organic light emitting-diode (OLED) display is disclosed. In one aspect, the OLED includes a first substrate, a first electrode provided on the first substrate, a pixel defining layer provided on the first electrode and including a first opening exposing at least a portion of the first electrode, and an organic emission layer provided on the first electrode corresponding to the first opening. The OLED display also includes a second electrode provided on the pixel defining layer and the organic emission layer, a second substrate provided on the second electrode, and a first auxiliary electrode provided below the second substrate facing the second electrode and welded to a portion of the second electrode corresponding to the pixel defining layer.
US09105865B2	Organic light emitting display apparatus, method of manufacturing the same, and mask used in the method A method of manufacturing an organic light emitting display apparatus is provided. A plurality of first electrodes is formed on a substrate. An intermediate layer including an emission layer is formed on the plurality of first electrodes. A deposition mold including a plurality of auxiliary patterning lines is formed by performing a deposition process twice using a mask. The mask includes a plurality of aperture sets, each of the plurality of aperture sets corresponding to part of each of the plurality of auxiliary patterning lines. A plurality of second electrodes is formed on the intermediate layer by depositing a conductive material into the deposition mold.
US09105864B2	Organic light-emitting display device and method of manufacturing the same An organic light-emitting display device may include a plurality of scan lines, a plurality of data lines, and a plurality of pixels located at an intersection region of the scan line and the data line, wherein the organic light-emitting display device includes a thin film transistor including a gate electrode on a different layer than a scan line, an active layer on the gate electrode, and source and drain electrodes that are in contact with source and drain regions of the active layer, and a capacitor including a first capacitor electrode on the same layer as the scan line, a second capacitor electrode on the gate electrode, and a third electrode on the same layer as the source and drain electrodes.
US09105863B2	Organic light emitting diode, method for producing an organic light emitting diode and module comprising at least two organic light emitting diodes An organic light emitting diode includes a substrate and an organic layer sequence, which generates electromagnetic radiation during operation. The organic layer sequence is arranged in a central region of the substrate A metallization is arranged in an edge region of the substrate and is designed for making electrical contact with the organic layer sequence. A separately produced metallic contact structure is cohesively and electrically conductively connected to the metallization by a joining process based on ultrasonic technology.
US09105858B2	Organic electroluminescent device and display apparatus An organic electroluminescent device includes an anode; a cathode; an organic layer including a light-emitting layer and disposed between the anode and the cathode; and an electron transport layer constituting the organic layer, disposed between the cathode and the light-emitting layer, and having a stacked structure including a layer containing a benzimidazole derivative and a layer containing a dibenzimidazole derivative represented by general formula (1): wherein Y1 to Y8 each represent a substituted or unsubstituted aryl group having 6 to 60 carbon atoms, a substituted or unsubstituted alkenyl group, a substituted or unsubstituted pyridyl group, a substituted or unsubstituted quinolyl group, a substituted or unsubstituted alkyl group having 1 to 20 carbon atoms, a substituted or unsubstituted alkoxy group having 1 to 20 carbon atoms, or a substituted or unsubstituted aliphatic cyclic group, and Y7 and Y8 may form a ring through a linking group.
US09105856B2	Organic luminescent materials, coating solution using same for organic It is an object of the present invention to provide an organic light-emitting device which can emit white light by easily controlling dopant concentrations. The organic light-emitting device has a first electrode (112) and second electrode (111) which hold a light-emitting layer (113) in-between, wherein the light-emitting layer contains a host material (104), red-light-emitting dopant (105), green-light-emitting dopant (106) and blue-light-emitting dopant (107), the red-light-emitting dopant containing a first functional group for transferring the dopant toward the first electrode and the green-light-emitting dopant containing a second functional group for transferring the dopant toward the second electrode.
US09105854B2	Transferable transparent conductive oxide A method for fabricating a photovoltaic device includes forming an adhesion layer on a substrate, forming a material layer on the adhesion layer and applying release tape to the material layer. The substrate is removed at a weakest interface between the adhesion layer and the substrate by mechanically pulling the release tape to form a transfer substrate including the adhesion layer, the material layer and the release tape. The transfer substrate is transferred to a target substrate to contact the adhesion layer to the target substrate. The transfer substrate includes a material sensitive to formation processes of the transfer substrate such that exposure to the formation processes of the transfer substrate is avoided by the target substrate.
US09105851B2	Composite material of hole-blocking polymer and electron-injection/electron-transport conjugated polymer grafted with crown ether into which metal ion is intercalated, and uses thereof in OLED and organic solar cell An water/alcohol soluble electron-injection/hole-blocking composite layer contains a conjugated polymer grafted with a side chain crown ether and with pseudo-metallic state of metal-ion stabilized by the crown ether (to reduce electron-injection barrier and facilitate electron transport), and a polymer with hole-blocking function. This composite layer is able to improve the performance of an organic light emitting diode with oxygen- and moisture-stable cathode (such as Al and Au), and the performance of an organic solar cell.
US09105850B2	Photo-patterned carbon electronics A system is provided for the manufacture of carbon based electrical components including, an ultraviolet light source; a substrate receiving unit whereby a substrate bearing a first layer of carbon based semiconductor is received and disposed beneath the ultraviolet light source; a mask disposed between the ultraviolet light source and the carbon based semiconductor layer; a doping agent precursor source; and environmental chemical controls, configured such that light from the ultraviolet light source irradiates a doping agent precursor and the first carbon layer.
US09105846B2	Method of manufacturing a boundary acoustic wave device A manufacturing method for a boundary acoustic wave device is provided which includes, an IDT electrode, a first dielectric layer, and a second dielectric layer on a piezoelectric substrate. The first dielectric layer is made of a deposited film. A thickness of the IDT electrode is about 10% or more of λ. A difference between a height of the first dielectric layer, measured from an upper surface of the piezoelectric substrate, above a center of an electrode finger of the IDT electrode and a height of the first dielectric layer, measured from the upper surface of the piezoelectric substrate, above a center of a gap between adjacent electrode fingers, i.e., a magnitude of unevenness in an upper surface of the first dielectric layer, is about 5% or less of λ.
US09105841B2	Forming magnetic microelectromechanical inductive components A micro-electromechanical device and method of manufacture are disclosed. A sacrificial layer is formed on a silicon substrate. A metal layer is formed on a top surface of the sacrificial layer. Soft magnetic material is electrolessly deposited on the metal layer to manufacture the micro-electromechanical device. The sacrificial layer is removed to produce a metal beam separated from the silicon substrate by a space.
US09105838B2	Nonvolatile variable resistive device According to one embodiment, a first electrode includes a metal element. A second electrode includes a semiconductor element. A third electrode includes a metal element. A first variable resistive layer is arranged between the first electrode and the second electrode and is capable of reversibly changing a resistance by filament formation and dissolution of the metal element of the first electrode. A second variable resistive layer is arranged between the second electrode and the third electrode and is capable of reversibly changing a resistance by filament formation and dissolution of the metal element of the third electrode.
US09105828B2	Method for manufacturing semiconductor light emitting device According to one embodiment, a semiconductor light emitting device includes a semiconductor layer including a first surface, a second surface opposite to the first surface, and a light emitting layer; a p-side electrode provided on the second surface of the semiconductor layer in a region including the light emitting layer; an n-side electrode provided on the second surface of the semiconductor layer in a region not including the light emitting layer; an insulating film being more flexible than the semiconductor layer, the insulating film provided on the second surface and a side surface of the semiconductor layer, and the insulating film having a first opening reaching the p-side electrode and a second opening reaching the n-side electrode; a p-side interconnection layer provided on the insulating film and connected to the p-side electrode; and an n-side interconnection layer provided on the insulating film and connected to the n-side electrode.
US09105826B2	Frame structure for light emitting diodes The invention relates to a frame structure for light emitting diodes comprises plastic stand having a containing room with a conical opening and at least two metal frames being not connected, relatively arranged in the containing room of the plastic stand and one of the metal frames having a concave chip bearing stand for bearing light emitting diodes wherein the conical opening of the plastic stand is greater than the concave chip bearing stand and the concave chip bearing stand has a bottom edge revealed at a bottom of the plastic stand; the area of the concave chip bearing stand is greater than 40% of the area of the conical opening of the plastic stand to increase the cooling area of the metal frames for the light-emitting diodes with the different wattage sharing the same specification frame structure to reduce the cost of metal frames molding.
US09105824B2	High reflective board or substrate for LEDs Light emitting devices and methods are disclosed that provide improved light output. The devices have an LED mounted to a substrate, board or submount characterized by improved reflectivity, which reduces the absorption of LED light. This increases the amount of light that can emit from the LED device. The LED devices also exhibit improved emission characteristics by having a reflective coating on the submount that is substantially non-yellowing. One embodiment of a light emitting device according to the present invention comprises a submount having a circuit layer. A reflective coating is included between at least some of the elements of the circuit layer. A light emitting diode mounted to the circuit layer, the reflective coating being reflective to the light emitted by the light emitting diode. In some embodiments, the reflective coating comprises a carrier with scattering particles having a different index of refraction than said carrier material.
US09105822B2	Material for a molded resin for use in a semiconductor light-emitting device The present invention provides a material for a molded resin as a material for a semiconductor light-emitting device that can yield a highly durable (light resistance and heat resistance) molded resin and can also improve the LED output through an excellent reflectivity. The present invention also provides an easily moldable material for a molded resin for a semiconductor light-emitting device. The material for a molded resin for a semiconductor light-emitting device is a resin composition, comprising (A) a polyorganosiloxane, (B) a white pigment, and (C) a curing catalyst, wherein the white pigment (B) has the following characteristics (a) and (b): (a) an aspect ratio 1.2 or more and 4.0 or less, and (b) a primary particle diameter 0.1 μm or more and 2.0 μm or less.
US09105819B2	Method for making an electronic apparatus having an encapsulating layer within and outside of a molded frame overlying a connection arrangement on a circuit board In an electronic apparatus comprising a circuit board supporting semiconductor components and traces or conductors for supplying electrical energy to the semiconductor components, and a connection arrangement by which the conductors are connected to a power supply cable, the circuit board being covered by an electrically insulating encapsulating layer, a molded frame part is mounted on the circuit board so as to cover the connection arrangement, the molded frame part having a circumferential edge structure which extends on one end into the encapsulating layer and at the other end projects above the encapsulating layer so as to create an interior space which, when the encapsulating layer is at least partially cured, is filled with additional encapsulating compound to form, after curing, a relatively thick protective layer over the wire or cable and conductor connecting area.
US09105808B2	Thermoelectric device A thermoelectric system includes a pair of substrates, a plurality of semiconductor elements, and first, second, and third terminals. The semiconductor elements are positioned between the opposing faces of the substrates, and the semiconductor elements include at least two groups of dissimilar semiconductor elements. The semiconductor elements are electrically coupled in series by conductor elements arranged so the two groups of dissimilar semiconductor elements are connected in an alternating pattern. The first, second and third terminals are connected to the conductor elements with the third terminal positioned between the first and second terminals. The electrically coupled semiconductor elements include first nodes and second nodes. The first and second nodes emit or absorb heat according to electric current flowing through the semiconductor elements, and impedance of the thermoelectric system is controlled by switching the switch.
US09105806B2	Polarization direction of optical devices using selected spatial configurations A GaN based light emitting diode device which emits polarized light or light of various degrees of polarization for use in the creation of optical devices. The die are cut to different shapes, or contain some indicia that are used to represent the configuration of the weak dipole plane and the strong dipole plane. This allows for the more efficient manufacturing of such light emitting diode based optical devices.
US09105805B2	Enhancing efficiency in solar cells by adjusting deposition power Methods for forming a photovoltaic device include adjusting a deposition power for depositing a buffer layer including germanium on a transparent electrode. The deposition power is configured to improve device efficiency. A p-type layer is formed on the buffer layer. An intrinsic layer and an n-type layer are formed over the p-type layer.
US09105803B2	Polycrystalline-type solar cell panel and process for production thereof Disclosed is a polycrystalline-type silicon solar cell which can be produced at low cost by forming a polycrystalline silicon film having a PN junction in a simple manner. Specifically, an amorphous silicon film produced by sputtering using a dopant-containing silicon target is polycrystallized with plasma, and a PN junction is formed in the amorphous silicon film, thereby producing a polycrystalline silicon film having a PN junction. The polycrystalline silicon film having a PN junction is used as a silicon substrate for a polycrystalline-type silicon solar cell. Also disclosed is a technique for producing a dopant-containing silicon target from a silicon ingot.
US09105801B2	Method for fabricating Cu—In—Ga—Se film solar cell A method for fabricating a Cu—In—Ga—Se film solar cell is provided. The method comprises: a) fabricating a molybdenum back electrode on a substrate; b) fabricating a Cu—In—Ga—Se absorbing layer on the back electrode by fractional sputtering in a plurality of sputter chambers; c) performing an annealing; d) fabricating an In2Se3 or ZnS buffer layer on the Cu—In—Ga—Se absorbing layer; e) fabricating an intrinsic zinc oxide high impedance layer on the In2Se3 or ZnS buffer layer; f) fabricating an indium tin oxide film low impedance layer on the intrinsic zinc oxide high impedance layer; g) fabricating an aluminum electrode on the indium tin oxide film low impedance layer.
US09105799B2	Apparatus and method for producing solar cells using light treatment An light apparatus used in forming a solar cell includes a housing separate from other processing in a deposition processing system, a transport mechanism for carrying a solar cell into the housing after deposition of a front contact layer in the deposition processing system, and one or more light source elements arranged to apply light on the solar cell after deposition of the front contact layer. A method of making a solar cell includes forming a back contact layer on a glass substrate, forming an absorber layer on the back contact layer, forming a buffer layer on the absorber layer, and forming a front contact layer above the buffer layer, the glass substrate, back contact layer, absorber layer, buffer layer, and front contact layer forming a first module. The method includes applying a light source to the first module after forming the front contact layer separate from other processing.
US09105794B2	Oxide superconductor thin film, superconducting fault current limiter, and method for manufacturing oxide superconductor thin film An oxide superconducting thin film includes a substrate having a single crystal structure, the main face of the substrate and a crystal face of the single crystal structure having an angle therebetween; an intermediate layer formed on the main face of the substrate and having an axis oriented in a direction perpendicular to the crystal face; and a superconducting layer formed on the intermediate layer and containing, as a main component, an oxide superconductor having a c-axis oriented in a direction perpendicular to the surface of the intermediate layer. A superconducting fault current limiter and a method of manufacturing an oxide superconducting thin film are also provided.
US09105792B2	Patterned layer design for group III nitride layer growth A method of fabricating a device using a layer with a patterned surface for improving the growth of semiconductor layers, such as group III nitride-based semiconductor layers with a high concentration of aluminum, is provided. The patterned surface can include a substantially flat top surface and a plurality of stress reducing regions, such as openings. The substantially flat top surface can have a root mean square roughness less than approximately 0.5 nanometers, and the stress reducing regions can have a characteristic size between approximately 0.1 microns and approximately five microns and a depth of at least 0.2 microns. A layer of group-III nitride material can be grown on the first layer and have a thickness at least twice the characteristic size of the stress reducing regions.
US09105791B1	Tunable plasmonic crystal A tunable plasmonic crystal comprises several periods in a two-dimensional electron or hole gas plasmonic medium that is both extremely subwavelength (˜λ/100) and tunable through the application of voltages to metal electrodes. Tuning of the plasmonic crystal band edges can be realized in materials such as semiconductors and graphene to actively control the plasmonic crystal dispersion in the terahertz and infrared spectral regions. The tunable plasmonic crystal provides a useful degree of freedom for applications in slow light devices, voltage-tunable waveguides, filters, ultra-sensitive direct and heterodyne THz detectors, and THz oscillators.
US09105790B2	Detector for plastic optical fiber networks An apparatus comprises a substrate having a type of conductivity, an intrinsic region above the substrate, and a metal layer on a portion of the surface of the intrinsic region. The intrinsic region has a surface. The metal layer may have a thickness that is configured to allow a plurality of photons to pass through the metal layer into the intrinsic region and form a rectifying contact with the intrinsic region.
US09105788B2	Silicon photoelectric multiplier A cell for a silicon-based photoelectric multiplier may comprise a first layer of a first conductivity type and a second layer of a second conductivity type formed on the first layer. The first layer and the second layer may form a first p-n junction. The cell may be processed by an ion implantation act wherein parameters of the ion implantation are selected such that due to an implantation-induced damage of the crystal lattice, an absorption length of infrared light of a wavelength in a range of ˜800 nm to 1000 nm is decreased.
US09105783B2	Holographic solar concentrator A solar concentrator receives sunlight for generating solar power with the concentrator including holographic optical element (HOE) separators for separating sunlight into separated bands, including HOE concentrators for concentrating the separated bands into concentrated bands, including HOE reflectors for reflecting the concentrated bands as reflected bands onto a multiple junction photovoltaic solar cell for generating the solar power with reduced aberrations of the bands for improved conversion of the solar light into the generator solar power, all of which can be constructed in an integrated structure using spacers, waveguides, and a substrate, where the HOEs use chirp Bragg gratings for reducing optical aberrations of the separated, concentrated, and reflected optical bands, with the option of multiple HOE separators for receiving sunlight from various angles of incidence.
US09105781B2	Thermocouple and method of production A method for the low-cost production of sheet-like thermocouples comprises the following steps: —providing an electrically and thermally conductive substrate having at least one clearance, which subdivides the substrate into substrate regions, —fitting thermolegs onto the substrate, wherein each thermoleg is connected to a region of the substrate on a hot side and on a cold side, —applying an encapsulation, so that at least each thermoleg is enclosed and the encapsulation enters into a material bond with the regions of the substrate, —separating parts of the substrate in such a way as to prevent a flow of electric current between the regions of the substrate through the at least one clearance. The invention also relates to a substrate that is suitable for carrying out the method and to a thermocouple that can be produced by the method.
US09105780B2	Method of fabricating graphene quantum dots and high quality graphene quantum dots using the method A simple and easy method for fabricating graphene quantum dots with uniformed size and high quality of emission property comprises steps of, mixing graphite powders with metallic hydrate salts, forming an intercalation compound of graphite wherein metal ions are inserted by heating the mixed solution, and removing the metal ions from the intercalation compound of graphite. The graphene quantum dots is applicable to the development of electronic products in next generation such as display devices, recording devices, various sensors and nanocomputers and is applicable to biological and medicinal field as well.
US09105779B2	Method of fabricating a flexible photovoltaic film cell with an iron diffusion barrier layer A method of fabricating a flexible photovoltaic film cell with an iron diffusion barrier layer. The method includes: providing a foil substrate including iron; forming an iron diffusion barrier layer on the foil substrate, where the iron diffusion barrier layer prevents the iron from diffusing; forming an electrode layer on the iron diffusion barrier layer; and forming at least one light absorber layer on the electrode layer. A flexible photovoltaic film cell is also provided, which cell includes: a foil substrate including iron; an iron diffusion barrier layer formed on the foil substrate to prevent the iron from diffusing; an electrode layer formed on the iron diffusion barrier layer; and at least one light absorber layer formed on the electrode layer.
US09105770B2	Shallow junction photovoltaic devices A method for fabricating a photovoltaic device includes forming a first contact on a crystalline substrate, by epitaxially growing a first doped layer having a doping concentration of 1019 cm−3 or greater, a dislocation density of 105 cm−2 or smaller, a hydrogen content of 0.1 atomic percent or smaller, and a thickness configured to reduce Auger recombination in the epitaxially grown doped layer. A first passivation layer is formed on the first doped layer. A second contact is formed on the crystalline substrate on a side opposite the first contact by epitaxially growing a second doped layer having a doping concentration of 1019 cm−3 or greater, a dislocation density of 105 cm−2 or smaller, a hydrogen content of 0.1 atomic percent or smaller and a thickness configured to reduce Auger recombination in the second epitaxially grown doped layer. A second passivation layer is formed on the second doped layer.
US09105769B2	Shallow junction photovoltaic devices A method for fabricating a photovoltaic device includes forming a first contact on a crystalline substrate, by epitaxially growing a first doped layer having a doping concentration of 1019 cm−3 or greater, a dislocation density of 105 cm−2 or smaller, a hydrogen content of 0.1 atomic percent or smaller, and a thickness configured to reduce Auger recombination in the epitaxially grown doped layer. A first passivation layer is formed on the first doped layer. A second contact is formed on the crystalline substrate on a side opposite the first contact by epitaxially growing a second doped layer having a doping concentration of 1019 cm−3 or greater, a dislocation density of 105 cm−2 or smaller, a hydrogen content of 0.1 atomic percent or smaller and a thickness configured to reduce Auger recombination in the second epitaxially grown doped layer. A second passivation layer is formed on the second doped layer.
US09105767B2	Negatively charged layer to reduce image memory effect An image sensor pixel includes a photodiode region having a first polarity doping type disposed in a semiconductor layer. A pinning surface layer having a second polarity doping type is disposed over the photodiode region in the semiconductor layer. A first polarity charge layer is disposed proximate to the pinning surface layer over the photodiode region. A contact etch stop layer is disposed over the photodiode region proximate to the first polarity charge layer. The first polarity charge layer is disposed between the pinning surface layer and the contact etch stop layer such that first polarity charge layer cancels out charge having a second polarity that is induced in the contact etch stop layer. The first polarity charge layer is disposed between a first one of a plurality of passivation layers and a second one of the plurality of passivation layers disposed over the photodiode region.
US09105762B2	Semiconductor light emitting device and manufacturing method thereof A semiconductor light emitting device includes: a light emission structure in which a first conductive semiconductor layer, an active layer and a second conductive semiconductor layer are sequentially stacked; a first electrode formed on the first conductive semiconductor layer; an insulating layer formed on the second conductive semiconductor layer and made of a transparent material; a reflection unit formed on the insulating layer and reflecting light emitted from the active layer; a second electrode formed on the reflection unit; and a transparent electrode formed on the second conductive semiconductor layer, the transparent electrode being in contact with the insulating layer and the second electrode.
US09105761B2	Light emitting diode and method for manufacturing the same A light emitting device is provided, including a substrate and a light emitting structure on the substrate, comprising a first semiconductor layer, a second semiconductor layer on the first semiconductor layer, and an active layer between the first and second semiconductor layers. The substrate has at least one side surface extending outwardly. The at least one side surface includes a first portion, a transition portion connected to the first portion, and a second portion connected to the transition portion, the first portion provides a first obtuse inclination angle with reference to the bottom surface of the substrate and the transition portion provides a second obtuse inclination angle with reference to the bottom surface of the substrate, the second obtuse inclination angle is larger than the first obtuse inclination angle. The second portion includes a vertical side surface with reference to the bottom surface of the substrate.
US09105758B2	Semiconductor device including a capacitor A semiconductor device is disclosed, which reduces the depth of a metal contact so that an etching margin is increased in forming a contact hole. In addition, the semiconductor device and the method for forming the same increase a contact area between a plate electrode and a metal contact so that a power source can be more easily provided to the plate electrode. Thus, a sensing noise is reduced and a process margin is improved, resulting in improvement of device operation characteristics.
US09105757B2	Junction barrier Schottky diode and manufacturing method thereof The present invention discloses a junction barrier Schottky (JBS) diode and a manufacturing method thereof. The JBS diode includes: an N-type gallium nitride (GaN) substrate; an aluminum gallium nitride (AlGaN) barrier layer, which is formed on the N-type GaN substrate; a P-type gallium nitride (GaN) layer, which is formed on or above the N-type GaN substrate; an anode conductive layer, which is formed at least partially on the AlGaN barrier layer, wherein a Schottky contact is formed between part of the anode conductive layer and the AlGaN barrier layer; and a cathode conductive layer, which is formed on the N-type GaN substrate, wherein an ohmic contact is formed between the cathode conductive layer and the N-type GaN substrate, and the cathode conductive layer is not directly connected to the anode conductive layer.
US09105754B2	Adhesive film, method of manufacturing semiconductor device, and semiconductor device Provided is an adhesive film that enables manufacturing of a high quality semiconductor device with good yield ratio, and related methods of manufacturing a semiconductor device, and semiconductor devices. Provided is an adhesive film for embedding a first semiconductor element fixed to an adherend and fixing a second semiconductor element that is different from the first semiconductor element to the adherend, wherein the adhesive film has a thickness T that is larger than a thickness T1 of the first semiconductor element, and the adherend and the first semiconductor element are connected by wire bonding and a difference between the thickness T and the thickness T1 is 40 μm or more and 260 μm or less, or the adherend and the first semiconductor element are connected by flip-chip bonding and a difference between the thickness T and the thickness T1 is 10 μm or more and 200 μm or less.
US09105752B2	High temperature transducer using SOI, silicon carbide or gallium nitride electronics There is disclosed a high temperature pressure sensing system which includes a SOI, silicon carbide, or gallium nitride Wheatstone bridge including piezoresistors. The bridge provides an output which is applied to an analog to digital converter also fabricated using SOI, silicon carbide, or gallium nitride materials. The output of the analog to digital converter is applied to microprocessor, which microprocessor processes the data or output of the bridge to produce a digital output indicative of bridge value. The microprocessor also receives an output from another analog to digital converter indicative of the temperature of the bridge as monitored by a span resistor coupled to the bridge. The microprocessor has a separate memory coupled thereto which is also fabricated from SOI, silicon carbide, or gallium nitride materials and which memory stores various data indicative of the microprocessor also enabling the microprocessor test and system test to be performed.
US09105750B1	Semiconductor device having a through-substrate via Semiconductor devices are described that have a through-substrate via formed therein. In one or more implementations, the semiconductor devices include a top wafer and a bottom wafer bonded together with a patterned adhesive material. The top wafer and the bottom wafer include one or more integrated circuits formed therein. The integrated circuits are connected to one or more conductive layers deployed over the surfaces of the top and bottom wafers. A via is formed through the top wafer and the patterned adhesive material so that an electrical interconnection can be formed between the integrated circuits formed in the top wafer and the integrated circuits formed in the bottom wafer. The via includes a conductive material that furnishes the electrical interconnection between the top and bottom wafers.
US09105747B2	Tunable stressed polycrystalline silicon on dielectrics in an integrated circuit A method of forming an integrated circuit device is disclosed. A polycrystalline silicon layer is formed in direct contact with a dielectric material so that the dielectric material induces a stress in the polycrystalline silicon layer as the polycrystalline silicon layer is formed. A MOS transistor that includes a gate including the polycrystalline silicon is then completed.
US09105745B2	Fabrication of low threshold voltage and inversion oxide thickness scaling for a high-k metal gate p-type MOSFET A method of forming a semiconductor structure. The semiconductor structure has a semiconductor substrate and an nFET and a pFET disposed upon the substrate. The pFET has a semiconductor SiGe channel region formed upon or within a surface of the semiconductor substrate and a gate dielectric having an oxide layer overlying the channel region and a high-k dielectric layer overlying the oxide layer. A gate electrode overlies the gate dielectric and has a lower metal layer abutting the high-k layer, a scavenging metal layer abutting the lower metal layer, and an upper metal layer abutting the scavenging metal layer. The metal layer scavenges oxygen from the substrate (nFET) and SiGe (pFET) interface with the oxide layer resulting in an effective reduction in Tinv and Vt of the pFET, while scaling Tinv and maintaining Vt for the nFET, resulting in the Vt of the pFET becoming closer to the Vt of a similarly constructed nFET with scaled Tinv values.
US09105743B2	Semiconductor device and method of manufacturing semiconductor device The semiconductor device includes a first transistor including a first impurity layer containing boron or phosphorus, a first epitaxial layer formed above the first impurity layer, a first gate electrode formed above the first epitaxial layer with a first gate insulating film formed therebetween and first source/drain regions, and a second transistor including a second impurity layer containing boron and carbon, or arsenic or antimony, a second epitaxial layer formed above the second impurity layer, a second gate electrode formed above the second epitaxial layer with a second gate insulating film thinner than the first gate insulating film formed therebetween, and second source/drain regions.
US09105739B2	Semiconductor device and manufacturing method thereof A semiconductor device with a nonvolatile memory is provided which has improved electric performance. A memory gate electrode is formed over a semiconductor substrate via an insulating film. The insulating film is an insulating film having a charge storage portion therein, and includes a first silicon oxide film, a silicon nitride film over the first silicon oxide film, and a second silicon oxide film over the silicon nitride film. Metal elements exist between the silicon nitride film and the second silicon oxide film, or in the silicon nitride film at a surface density of 1×1013 to 2×1014 atoms/cm2.
US09105738B2	Semiconductor device and method of manufacturing the same A semiconductor device includes a multilayered interelectrode insulating film formed between a charge storage layer and a control electrode layer. The interelectrode insulating film is formed in a first region above an upper surface portion of the element isolation insulating film, a second region along a sidewall portion of the charge storage layer, and a third region above an upper surface portion of the charge storage layer. The interelectrode insulating film includes a stack of first silicon oxide film, a silicon nitride film, and a second silicon oxide film. The silicon nitride film is relatively thicker in the third region compared to the first region and compared to at least a portion of the second region.
US09105737B2	Semiconductor constructions Some embodiments include methods of forming vertical memory strings. A trench is formed to extend through a stack of alternating electrically conductive levels and electrically insulative levels. An electrically insulative panel is formed within the trench. Some sections of the panel are removed to form openings. Each opening has a first pair of opposing sides along the stack, and has a second pair of opposing sides along remaining sections of the panel. Cavities are formed to extend into the electrically conductive levels along the first pair of opposing sides of the openings. Charge blocking material and charge-storage material is formed within the cavities. Channel material is formed within the openings and is spaced from the charge-storage material by gate dielectric material. Some embodiments include semiconductor constructions, and some embodiments include methods of forming vertically-stacked structures.
US09105733B2	Thin film transistor array substrate and manufacturing method thereof A thin film transistor (TFT) array substrate and a manufacturing method thereof are provided. The TFT array substrate may include a gate line disposed on a substrate and including a gate line and a gate electrode, an oxide semiconductor layer pattern disposed on the gate electrode, a data line disposed on the oxide semiconductor layer pattern and including a source electrode and a drain electrode of a thin film transistor (TFT) together with the gate electrode, and a data line extending in a direction intersecting the gate line, and etch stop patterns disposed at an area where the TFT is formed between the source/drain electrodes and the oxide semiconductor layer pattern and at an area where the gate line and the data line overlap each other between the gate line and the data line.
US09105728B2	Multi-gate thin-film transistor This disclosure provides implementations of multi-gate transistors, structures, devices, apparatus, systems, and related processes. In one aspect, a device includes a thin-film semiconducting layer arranged over a substrate. A drain and source are coupled to the semiconducting layer. The device also includes first, second and third gates all arranged adjacent the semiconducting layer and configured to receive first, second, and third control signals, respectively. Dielectric layers insulate the gates from the semiconducting layer and from one another. In a first mode, the first, second, and third gates are configured such that charge is stored in a potential well in a region of the semiconducting layer adjacent the second gate. In a second mode, the first, second and third gate electrodes are configured such that the stored charge is transferred through the region of the semiconducting layer adjacent the third gate electrode and through the source to a load.
US09105726B2	Transistor and method of fabricating the same Provided is a transistor. The transistor includes: a substrate; a semiconductor layer provided on the substrate and having one side vertical to the substrate and the other side facing the one side; a first electrode extending along the substrate and contacting the one side of the semiconductor layer; a second electrode extending along the substrate and contacting the other side of the semiconductor layer; a conductive wire disposed on the first electrode and spaced from the second electrode; a gate electrode provided on the semiconductor layer; and a gate insulating layer disposed between the semiconductor layer and the gate electrode, wherein the semiconductor layer, the first electrode, and the second electrode have a coplanar.
US09105723B2	Multi-height FinFETs with coplanar topography A semiconductor structure is provided that has semiconductor fins having variable heights without any undue topography. The semiconductor structure includes a semiconductor substrate having a first semiconductor surface and a second semiconductor surface, wherein the first semiconductor surface is vertically offset and located above the second semiconductor surface. An oxide region is located directly on the first semiconductor surface and/or the second semiconductor surface. A first set of first semiconductor fins having a first height is located above the first semiconductor surface of the semiconductor substrate. A second set of second semiconductor fins having a second height is located above the second semiconductor surface, wherein the second height is different than the first height and wherein each first semiconductor fin and each second semiconductor fin have topmost surfaces which are coplanar with each other.
US09105721B2	Semiconductor device and manufacturing method thereof A high voltage/power semiconductor device using a low voltage logic well is provided. The semiconductor device includes a substrate, a first well region formed by being doped in a first location on a surface of the substrate, a second well region formed by being doped with impurity different from the first well region's in a second location on a surface of the substrate, an overlapping region between the first well region and the second well region where the first well region and the second well region substantially coexist, a gate insulating layer formed on the surface of the first and the second well regions and the surface of the overlapping region, a gate electrode formed on the gate insulating layer, a source region formed on an upper portion of the first well region, and a drain region formed on an upper portion of the second well region. The semiconductor device may also include a separating unit, which is formed in the second well region on the drain side and may be formed as a shallow trench isolation (STI) region having a lower depth than the second well region.
US09105720B2	Semiconductor device having metal gate and manufacturing method thereof A method for manufacturing a semiconductor device having metal gate includes following steps. A substrate having at least a first semiconductor device formed thereon is provided. The first semiconductor device includes a first gate trench formed therein. Next, an n-typed work function metal layer is formed in the first gate trench. After forming the n-typed work function metal layer, a nitridation process is performed to form a first protecting layer on the n-typed work function metal layer. After forming the first protecting layer, an oxidation process is performed to the first protecting layer to form a second protecting layer on the n-typed work function metal layer. Then, a gap filling metal layer is formed to fill up the first gate trench.
US09105719B2	Multigate metal oxide semiconductor devices and fabrication methods A semiconductor device includes a first well and a second well implanted in a semiconductor substrate. The semiconductor device further includes a gate structure above the first and second wells between a raised source structure and a raised drain structure. The raised source structure above is in contact with the first well and connected with the gate structure through a first semiconductor fin structure. The raised drain structure above and in contact with the second well and connected with a second semiconductor fin structure. The second semiconductor fin structure includes at least a gap and a lightly doped portion.
US09105718B2	Butted SOI junction isolation structures and devices and method of fabrication A structure, a FET, a method of making the structure and of making the FET. The structure including: a silicon layer on a buried oxide (BOX) layer of a silicon-on-insulator substrate; a trench in the silicon layer extending from a top surface of the silicon layer into the silicon layer, the trench not extending to the BOX layer, a doped region in the silicon layer between and abutting the BOX layer and a bottom of the trench, the first doped region doped to a first dopant concentration; a first epitaxial layer, doped to a second dopant concentration, in a bottom of the trench; a second epitaxial layer, doped to a third dopant concentration, on the first epitaxial layer in the trench; and wherein the third dopant concentration is greater than the first and second dopant concentrations and the first dopant concentration is greater than the second dopant concentration.
US09105717B2	Manufacturing a semiconductor device using electrochemical etching, semiconductor device and super junction semiconductor device A trench is formed in a semiconductor substrate between mesas of a first conductivity type. The trench extends from a process surface down to a bottom plane. A semiconductor layer of a second, complementary conductivity type is formed on sidewalls of the trench. At least in the mesas a vertical impurity concentration profile vertical to the process surface is non-constant between the process surface and the bottom plane. A portion of the semiconductor layer in the trench is removed by electrochemical etching. Thereafter, the thickness of the recessed semiconductor layer images the vertical impurity concentration profile in the mesa.
US09105715B2	Semiconductor device and method for manufacturing the same In a cell region of a first major surface of a semiconductor substrate of a first conductivity type, a first well of a second conductivity type is in an upper surface. A diffusion region of a first conductivity type is in the upper surface in the first well. A first gate insulating film is on the first well, and a first gate electrode on the first gate insulating film. A second well of a second conductivity type is in the upper surface of the first major surface on a peripheral portion of the cell region. A second gate insulating film is on the second well, and a thick field oxide film is on the peripheral side than the second gate insulating film. A second gate electrode is sequentially on the second gate insulating film and the field oxide film and electrically connected to the first gate electrode. A first electrode is connected to the first, second well and the diffusion region. A second electrode is connected on a second major surface of the semiconductor substrate. A gate wiring is on the field oxide film, going around a periphery of the cell region, and electrically connected to the second gate electrode. The gate wiring is a silicide of a constituting substance of the second gate electrode.
US09105714B2	Stabilization structure including sacrificial release layer and staging bollards A method and structure for stabilizing an array of micro devices is disclosed. The array of micro devices is within an array of staging cavities on a carrier substrate. Each micro device is laterally retained between a plurality of staging bollards of a corresponding staging cavity.
US09105713B2	Semiconductor device with metal-filled groove in polysilicon gate electrode A semiconductor device includes a semiconductor substrate, a body region of a first conductivity type in the substrate, a source region of a second conductivity type opposite the first conductivity type adjacent the body region, and a trench extending into the substrate adjacent the source and body regions. The trench contains a polysilicon gate electrode insulated from the substrate. The device further includes a dielectric layer on the substrate, a gate metallization on the dielectric layer and covering part of the substrate and a source metallization on the dielectric layer and electrically connected to the source region. The source metallization is spaced apart from the gate metallization and covers a different part of the substrate than the gate metallization. A metal-filled groove in the polysilicon gate electrode is electrically connected to the gate metallization, and extends along a length of the trench underneath at least part of the source metallization.
US09105712B1	Double RESURF LDMOS with separately patterned P+ and N+ buried layers formed by shared mask A double-RESURF LDMOS fabrication method utilizes a shared mask to form separately patterned N+ buried layer (NBL) and P+ buried layer (PBL) regions. The mask includes two opening types (e.g., large and small), and the P-type and N-type implant materials are separately directed onto the mask at different implant angles, such that the N-type implant passes through both opening types to form a first pattered implant region in both a first region and a surrounding second region, and such that the P-type implant material passes only through the larger openings and forms a second pattered implant region only in the first substrate portion. An optional epitaxial layer is deposited over the substrate and annealed to form the separately patterned PBL and NBL in the epitaxial layer, where a portion of the PBL diffuses above the NBL and forms a P-surf region below the LDMOS's N-drift region.
US09105708B2	Wafer processing method A wafer processing method divides a wafer along a plurality of crossing streets formed on the front side of the wafer to thereby partition a plurality of regions where a plurality of devices are respectively formed. The method includes a division groove forming step of cutting the back side of the wafer along each street by using a cutting blade to thereby form a division groove along each street with a predetermined thickness left between the bottom of the division groove and the front side of the wafer, a wafer supporting step of attaching the back side of the wafer to a dicing tape supported by an annular frame, and a wafer dividing step of applying an external force to the wafer attached to the dicing tape to thereby divide the wafer into the individual devices along the streets where the division grooves are respectively formed.
US09105707B2	ZRAM heterochannel memory Approaches for zero capacitance memory cells are provided. A method of manufacturing a semiconductor structure includes forming a channel region by doping a first material with a first type of impurity. The method includes forming source/drain regions by doping a second material with a second type of impurity different than the first type of impurity, wherein the second material has a smaller bandgap than the first material. The method includes forming lightly doped regions between the channel region and the source/drain regions, wherein the lightly doped regions include the second material. The method includes forming a gate over the channel region, wherein the second material extends under edges of the gate.
US09105706B2	Semiconductor device fabrication method capable of scribing chips with high yield A semiconductor device fabrication method includes preparing a semiconductor wafer having a plurality of chip areas formed with semiconductor elements and a scribe area having a dicing area in said scribe area for separating said plurality of chip areas, wherein in said scribe area a groove forming area is defined to surround each chip area at a position outside of the dicing area, disposing a multilayer wiring structure including dummy wirings above said semiconductor wafer, said multilayer wiring structure having interlayer insulating films and wiring layers alternately formed, forming a cover layer including a passivation layer, said cover layer covering said multilayer wiring structure, and forming a groove in each said groove forming area, said groove surrounding each of said plurality of chip areas and extending from a surface of said semiconductor wafer and at least through said passivation layer.
US09105703B2	Programmable III-nitride transistor with aluminum-doped gate Disclosed is a III-nitride heterojunction device that includes a conduction channel having a two dimensional electron gas formed at an interface between a first III-nitride material and a second III-nitride material. A modification including a contact insulator, for example, a gate insulator formed under a gate contact, is disposed over the conduction channel, wherein the contact insulator includes aluminum to alter formation of the two dimensional electron gas at the interface. The contact insulator can include AlSiN, or can be SiN doped with aluminum. The modification results in programming the threshold voltage of the III-nitride heterojunction device to, for example, make the device an enhancement mode device. The modification can further include a recess, an ion implanted region, a diffused region, an oxidation region, and/or a nitridation region. In one embodiment, the first III-nitride material comprises GaN and the second III-nitride material comprises AlGaN.
US09105700B2	Method for forming self-aligned contacts/vias with high corner selectivity A method of etching self-aligned contact/via features in a low-k dielectric layer disposed below a hardmask, which is disposed below a planarization layer. At least one cycle is provided, where each cycle comprises thinning the planarization layer, forming a deposition layer on the hardmask and planarization layer; and etching the low-k dielectric layer masked by the deposition layer.
US09105699B2	Method of forming interconnection lines The invention concerns a method comprising: forming a plurality of parallel lines (502, 504, 506) of a sacrificial material over a layer of conductive material (510) of an integrated circuit, said parallel lines being separated by trenches, at least one of said lines being interrupted along its length by an opening (516) dividing it into first and second line portions (504A, 504B) separated by a space (S); forming spacers (522, 524, 526, 528, 530) in said trenches on lateral sides of said line portions and filling at least a bottom part of said opening between the line portions; removing the sacrificial material by etching; and forming interconnection lines (302, 304A, 304B, 306A, 306B, 308, 310) of said conductive material based on a pattern defined by said spacers.
US09105695B2	Cobalt selectivity improvement in selective cobalt process sequence Embodiments of the invention provide processes to selectively form a cobalt layer on a copper surface over exposed dielectric surfaces. Embodiments described herein control selectivity of deposition by preventing damage to the dielectric surface, repairing damage to the dielectric surface, such as damage which can occur during the cobalt deposition process, and controlling deposition parameters for the cobalt layer.
US09105693B2	Microelectronic structure including air gap A microelectronic structure and a method for fabricating the microelectronic structure provide a plurality of voids interposed between a plurality of conductor layers. The plurality of voids is also located between a liner layer and an inter-level dielectric layer. The voids provide for enhanced electrical performance of the microelectronic structure.
US09105687B1	Method for reducing defects in shallow trench isolation A method of manufacturing a semiconductor device includes forming a trench that includes a needle defect, depositing a high density plasma oxide over the trench including the needle defect, removing the part of the high density oxide and the liner oxide over the needle defect by applying an oxide etch, and after the step of applying the oxide etch, etching back the needle defect by applying a polysilicon etch.
US09105680B2	Insulated gate bipolar transistor An IGBT has layers between emitter and collector sides. The layers include a collector layer on the collector side, a drift layer, a base layer of a second conductivity type, a first source region arranged on the base layer towards the emitter side, a trench gate electrode arranged lateral to the base layer and extending deeper into the drift layer than the base layer, a well arranged lateral to the base layer and extending deeper into the drift layer than the base layer, an enhancement layer surrounding the base layer so as to completely separate the base layer from the drift layer and the well, an electrically conducting layer covering the well and separated from the well by a second electrically insulating layer, and a third insulating layer having a recess on top of the electrically conducting layer such that the electrically conducting layer electrically contacts a emitter electrode.
US09105678B2	Semiconductor devices with recessed base electrode High frequency performance of (e.g., silicon) bipolar devices is improved by reducing the extrinsic base resistance Rbx. An emitter, an intrinsic base, and a collector are formed in a semiconductor body. An emitter contact has a region that overlaps a portion of an extrinsic base contact. A sidewall is formed in the extrinsic base contact proximate a lateral edge of the overlap region of the emitter contact. The sidewall is amorphized during or after formation so that when the emitter contact and the extrinsic base contact are, e.g., silicided, some of the metal atoms forming the silicide penetrate into the sidewall so that part of the highly conductive silicided extrinsic base contact extends under the edge of the overlap region of the emitter contact closer to the intrinsic base, thereby reducing Rbx. Smaller Rbx provides transistors with higher fMAX.
US09105676B2	Method of removing damaged epoxy from electrostatic chuck A method of removing an epoxy band from an electrostatic chuck includes securing the electrostatic chuck in a servicing fixture, applying a thermal source to the epoxy band to breakdown a plurality of adhesive bonds securing the epoxy band to the electrostatic chuck, forming a hole in the epoxy band and pulling the epoxy band from the electrostatic chuck. A system for removing an epoxy band from an electrostatic chuck is also described.
US09105674B2	Stepped elastic positioning structure for a semiconductor carrier A stepped elastic positioning structure for a semiconductor carrier includes a plurality of transversely and longitudinally arranged walls and a plurality of recesses defined by the walls. On the walls of the semiconductor carrier is formed a plurality of L-shaped stop blocks, each of the stop blocks has an elastically deformable free end which is capable of elastically restricting the semiconductor in the recess, and improving the easiness for putting in or taking out the semiconductor. The end of each of the stop blocks is a stepped structure, plus the elastic deformability of the stop blocks, which makes the recess capable of holding different sized semiconductors.
US09105669B2	MOS transistor on the basis of quantum interferance effect A new type of Metal Oxide Semiconductor (MOS) transistor that works on the basis of the Quantum Interference Depression (QID) effect is disclosed. QID occurs inside an n-type semiconductor source-drain electrode of special geometry. Due to QID the Fermi level of said semiconductor increases locally inside the source drain electrode, thereby creating a localized potential energy barrier in the path of electrons moving from source to drain regions. The height of the barrier depends on the degree of QID. QID is in turn regulated by the gate voltage via the charge depletion and hence change in effective dimensions of the special geometry of the semiconductor electrode. A gate voltage modulated potential energy barrier and is thus formed whereby current in said MOS transistor is controlled.
US09105668B2	Method for manufacturing semiconductor device An object is to manufacture a semiconductor device including an oxide semiconductor film, which has stable electric characteristics and high reliability. A crystalline oxide semiconductor film is formed, without performing a plurality of steps, as follows: by utilizing a difference in atomic weight of plural kinds of atoms included in an oxide semiconductor target, zinc with low atomic weight is preferentially deposited on an oxide insulating film to form a seed crystal including zinc; and tin, indium, or the like with high atomic weight is deposited on the seed crystal while causing crystal growth. Further, a crystalline oxide semiconductor film is formed by causing crystal growth using a seed crystal with a hexagonal crystal structure including zinc as a nucleus, whereby a single crystal oxide semiconductor film or a substantially single crystal oxide semiconductor film is formed.
US09105664B2	Method for enhancing channel strain An apparatus includes a substrate having a strained channel region, a dielectric layer over the channel region, first and second conductive layers over the dielectric layer having a characteristic with a first value, and a strain-inducing conductive layer between the conductive layers having the characteristic with a second value different from the first value. A different aspect involves an apparatus that includes a substrate, first and second projections extending from the substrate, the first projection having a tensile-strained first channel region and the second projection having a compression-strained second channel region, and first and second gate structures engaging the first and second projections, respectively. The first gate structure includes a dielectric layer, first and second conductive layers over the dielectric layer, and a strain-inducing conductive layer between the conductive layers. The second gate structure includes a high-k dielectric layer adjacent the second channel region, and a metal layer.
US09105660B2	Fin-FET and method of forming the same A method of forming a Fin-FET is provided. A substrate is provided, then a mask layer is formed thereabove. A first trench is formed in the substrate and the mask layer. A semiconductor layer is formed in the first trench. Next, the mask layer is removed such that the semi-conductive layer becomes a fin structure embedded in the substrate and protruded above the substrate. Finally, a gate layer is formed on the fin structure.
US09105659B2	Semiconductor device and method for manufacturing the same An embodiment is to include a staggered (top gate structure) thin film transistor in which an oxide semiconductor film containing In, Ga, and Zn is used as a semiconductor layer and a buffer layer is provided between the semiconductor layer and a source and drain electrode layers. The buffer layer having higher carrier concentration than the semiconductor layer is provided intentionally between the source and drain electrode layers and the semiconductor layer, whereby an ohmic contact is formed.
US09105650B2	Lateral bipolar transistor and CMOS hybrid technology A method of forming a lateral bipolar transistor includes forming a silicon on insulator (SOI) substrate having a bottom substrate layer, a buried oxide layer (BOX) on top of the substrate layer, and a silicon on insulator (SOI) layer on top of the BOX layer, forming a dummy gate and spacer on top of the silicon on insulator layer, doping the SOI layer with positive or negative ions, depositing an inter layer dielectric (ILD), using chemical mechanical planarization (CMP) to planarize the ILD, removing the dummy gate creating a gate trench which reveals the base of the dummy gate, doping the dummy gate base, depositing a layer of polysilicon on top of the SOI layer and into the gate trench, etching the layer of polysilicon so that it only covers the dummy gate base, and applying a self-aligned silicide process.
US09105649B2	Semiconductor component and corresponding production method A semiconductor component includes a substrate, a molded package, and a semiconductor chip. The semiconductor chip is suspended on the molding compound above the substrate in the molded package in such a way that a cavity mechanically decouples the semiconductor chip from the substrate. The cavity extends along an underside facing the substrate.
US09105644B2	Apparatus and method for forming alignment features for back side processing of a wafer A method for forming an alignment feature for back side wafer processing in a wafer fabrication process involves forming a trench into but not entirely through a wafer from a top side of the wafer; forming a contrasting material on surfaces of the trench; and grinding a bottom side of the wafer to expose the trench using the handling wafer to handle the wafer during such grinding, wherein the contrasting material lining the exposed trench provides an alignment reference for precise alignment of the wafer for back side processing the wafer.
US09105636B2	Semiconductor constructions and methods of forming electrically conductive contacts Some embodiments include methods of forming electrically conductive contacts. An opening is formed through an insulative material to a conductive structure. A conductive plug is formed within a bottom region of the opening. A spacer is formed to line a lateral periphery of an upper region of the opening, and to leave an inner portion of an upper surface of the plug exposed. A conductive material is formed against the inner portion of the upper surface of the plug. Some embodiments include semiconductor constructions having a conductive plug within an insulative stack and against a copper-containing material. A spacer is over an outer portion of an upper surface of the plug and not directly above an inner portion of the upper surface. A conductive material is over the inner portion of the upper surface of the plug and against an inner lateral surface of the spacer.
US09105629B2	Selective area heating for 3D chip stack A method of forming a 3D package including joining an interposer to a laminate chip carrier with the solid state diffusion of a first plurality of solder bumps by applying a first selective non-uniform heat, a first selective non-uniform cooling, and first uniform pressure, joining a top chip to the interposer with the solid state diffusion of a second plurality of solder bumps by applying a second selective non-uniform heat and second uniform pressure, heating the 3D package and the first and second pluralities of solder bumps to a temperature greater than the reflow temperature of the first and second pluralities of solder bumps, where the second plurality of solder bumps achieves the reflow temperature before the first plurality of solder bumps, where a temperature of the first and second selective non-uniform heat is less than the reflow temperature of the first and second pluralities of solder bumps, respectively.
US09105628B1	Through substrate via (TSuV) structures and method of making the same Through substrate via (TSuV) structures and method of making the same are disclosed herein. In embodiments, TSuV structures are metal filled selectively to avoid forming significant metal overburden on non-via surfaces of the substrate. In certain embodiments, post-fill metal removal/planarization operations are eliminated for reduced process complexity and manufacturing cost. In embodiments, selective metal fill entails selective electroless or electrolytic deposition. Both front side and back side selective deposition methods are described along with features of through substrate via structures made with such methods.
US09105621B2	Method for bonding of group III-nitride device-on-silicon and devices obtained thereof A method for flip chip bonding a GaN device formed on a silicon substrate is described. The method includes providing a silicon substrate having a GaN device thereon, the GaN device comprising at least one gallium-nitride layer near the silicon substrate and remote from the silicon substrate a dielectric layer comprising at least one via configured to electrically contact the at least one gallium-nitride layer, forming a stiffener layer over the GaN device leaving the at least one via exposed, flip chip bonding the GaN device to a submount, wherein the stiffener layer physically contacts the submount and the submount is electrically connected to the at least gallium-nitride layer through the via, and completely removing the silicon substrate exposing the GaN device. Preferably, the material of the stiffener layer comprises silicon, such as silicon, silicon-germanium, or silicon-carbide.
US09105619B2	Semiconductor package with conductive heat spreader A semiconductor package that includes a semiconductor die and a heat spreader thermally coupled to the semiconductor and disposed at least partially within the molded housing of the package.
US09105614B2	Local interconnects compatible with replacement gate structures After forming replacement gate structures that are embedded in a planarized dielectric layer on a semiconductor substrate, a contact-level dielectric layer is deposited over a planar surface of the planarized dielectric layer and the replacement gate structures. Substrate contact via holes are formed through the contact-level dielectric layer and the planarized dielectric layer, and metal semiconductor alloy portions are formed on exposed semiconductor materials. Gate contact via holes are subsequently formed through the contact-level dielectric layer. The substrate contact via holes and the gate contact via holes are simultaneously filled with a conductive material to form substrate contact structures and gate contact structures. The substrate contact structures and gate contact structures can be employed to provide local interconnect structures that provide electrical connections between two components that are laterally spaced on the semiconductor substrate.
US09105611B2	Power module package Disclosed herein is a power module package including: a substrate having a ceramic layer formed in one surface thereof; a circuit pattern formed on the ceramic layer; a first lead frame having one side contacting the circuit pattern and the other side protruding toward the outside; and a first semiconductor chip mounted on one side of the first lead frame.
US09105604B2	HBT cascode cell A cascode gain stage apparatus includes a common-emitter connected transistor having a first base metal contact, first emitter metal contact, a first collector metal contact and a u-shaped first collector interface metal; and a common-base connected transistor having a second emitter metal contact, a second base metal contact, and a second collector metal contact, the second emitter metal contact in communication with the first collector metal contact through a transistor interconnect metallic strap, the second emitter metal contact disposed between the first collector metal contact and the second base metal contact. With this configuration, the first collector metal contact and second emitter metal contact are connected by the transistor interconnect metallic strap without high-aspect ratio traces to reduce crossover coupling.
US09105602B2	Embedded three-dimensional capacitor An embedded capacitor is provided that includes a substrate having a dielectric-filled window. A metal-insulator-metal structure lines a plurality of vias extending through the dielectric-filled window and covers at least partially opposing sides of the dielectric-filled window.
US09105600B2	Sheet structure, method of manufacturing sheet structure, and electronic device A sheet structure has: a bundle structure including a plurality of linear structures made of carbon which are oriented in a predetermined direction; a covering layer covering the plurality of linear structures made of carbon; and a filling layer provided between the plurality of linear structures made of carbon covered with the covering layer. The thickness of the covering layer is not uniform in a direction crossing the predetermined direction.
US09105599B2	Semiconductor devices that include a die bonded to a substrate with a gold interface layer Embodiments of a semiconductor device include a primary portion of a substrate, a die, and a die attach layer between the die and the primary portion of the substrate. The die attach layer includes a gold interface layer that includes gold and a plurality of first precipitates in the gold. Each of the first precipitates includes a combination of nickel, cobalt, palladium, gold, and silicon.
US09105593B2	Method and apparatus for controlling breakage by static electricity A display device includes a first insulation layer on a substrate, gate wires on the first insulation layer, the gate wires extending in a first direction, a second insulation layer on the gate wires, data wires on the second insulation layer, the data wires extending in a second direction crossing the first direction, pixels at intersection regions of gate wires and data wires, respectively, the pixels being connected to respective gate wires and data wires, and data leading diodes having an island form and connected to the data wires, the data leading diodes being configured to induce breakage of the first insulation layer when external static electricity passes through the data wires.
US09105592B2	Organic electronic light emitting device and method of fabricating the same An organic electronic light emitting device includes a substrate; a first gate electrode formed on a top surface of the substrate; a first insulating layer formed on the top surface of the substrate and covering the first gate electrode; an organic layer formed on a top surface of the first insulating layer and comprising at least two organic layers with different conductivity type; a second insulating layer formed on a top surface of the organic layer; a second gate electrode formed on a top surface of the second insulating layer; and a source electrode and a drain electrode formed between the first and second insulating layers, and the source and drain electrodes located on both sides of the organic layer respectively.
US09105586B2	Etching of silicon oxide film An etching method includes preparing a target object such that a first oxide film made of silicon oxide containing at least one of B and P is formed on a substrate, a second oxide film made of silicon oxide containing neither of B and P is formed on the first oxide film, and a contact portion is present below an interface between the first oxide film and the second oxide film. The etching method further includes etching the second oxide film and the first oxide film, thereby forming a hole reaching the contact portion, and etching the first oxide film by a dry process using a gas containing HF, thereby expanding a portion of the hole adjacent to an upper side of the contact portion and inside the first oxide film.
US09105585B2	Etching method An etching method can selectively etch a second region formed of silicon oxide in a target object with respect to a first region formed of silicon in the target object. The etching method includes (a) processing the target object with plasma of a first processing gas containing fluorocarbon and fluorohydrocarbon by generating the plasma of the first processing gas with a microwave, and (b) after the processing of the target object with the plasma of the first processing gas, processing the target object with plasma of a second processing gas containing fluorocarbon by generating the plasma of the second processing gas with the microwave.
US09105584B2	Method of manufacturing a semiconductor device According to one embodiment, a method of manufacturing a semiconductor device includes forming a first line pattern comprising a first film above an underlying layer, depositing a second film on a sidewall and a top surface of the first line pattern of the first film, etching the second film to eliminate the second film on the top surface of the first line pattern of the first film and leave the second film on the sidewall of the first line pattern of the first film, and removing the first line pattern to form a second line pattern of the second film above the underlying layer. The depositing the second film, etching the second film, and removing the first line pattern are sequentially performed within the same plasma processing device.
US09105579B2	GaN power device with solderable back metal A method for fabricating a vertical gallium nitride (GaN) power device can include providing a GaN substrate with a top surface and a bottom surface, forming a device layer coupled to the top surface of the GaN substrate, and forming a metal contact on a top surface of the vertical GaN power device. The method can further include forming a backside metal by forming an adhesion layer coupled to the bottom surface of the GaN substrate, forming a diffusion barrier coupled to the adhesion layer, and forming a protection layer coupled to the diffusion barrier. The vertical GaN power device can be configured to conduct electricity between the metal contact and the backside metal.
US09105575B2	Method for fabricating a semiconductor device A method for fabricating a semiconductor device includes: forming first lines having a hydrophobic surface extending parallel to each other in a direction between first insulation layers having a hydrophilic surface; self-aligning hydrophilic particles over the first insulation layers to expose portions of the first lines at predetermined intervals; forming a plurality of variable resistance elements over the exposed portions of the first lines; and removing the particles.
US09105574B2	Electronic device comprising a semiconductor memory unit Devices and methods based on disclosed technology include, among others, an electronic device capable of improving a signal transfer characteristic and a method for fabricating the same. Specifically, an electronic device in one implementation includes a plurality of buried gates formed in a substrate, open parts formed in the substrate on both sides of the buried gate, isolation layers each formed between a sidewall of the open part and a sidewall of the buried gate, source/drain regions formed in the substrate under the respective open parts, and contact plugs buried in the respective open parts.
US09105571B2	Interface engineering to optimize metal-III-V contacts Techniques for fabricating self-aligned contacts in III-V FET devices are provided. In one aspect, a method for fabricating a self-aligned contact to III-V materials includes the following steps. At least one metal is deposited on a surface of the III-V material. The at least one metal is reacted with an upper portion of the III-V material to form a metal-III-V alloy layer which is the self-aligned contact. An etch is used to remove any unreacted portions of the at least one metal. At least one impurity is implanted into the metal-III-V alloy layer. The at least one impurity implanted into the metal-III-V alloy layer is diffused to an interface between the metal-III-V alloy layer and the III-V material thereunder to reduce a contact resistance of the self-aligned contact.
US09105570B2	Methods for introducing carbon to a semiconductor structure An embodiment is a method comprising diffusing carbon through a surface of a substrate, implanting carbon through the surface of the substrate, and annealing the substrate after the diffusing the carbon and implanting the carbon through the surface of the substrate. The substrate comprises a first gate, a gate spacer, an etch stop layer, and an inter-layer dielectric. The first gate is over a semiconductor substrate. The gate spacer is along a sidewall of the first gate. The etch stop layer is on a surface of the gate spacer and over a surface of the semiconductor substrate. The inter-layer dielectric is over the etch stop layer. The surface of the substrate comprises a surface of the inter-layer dielectric.
US09105569B2	Method of etching MTJ using CO process chemistries A method for fabricating a magnetic film structure is provided. The method comprises forming a magnetic structure on a bottom electrode layer, the magnetic structure comprising at least one pinned bottom magnetic film layer having a fixed magnetic orientation; at least one top magnetic film layer whose magnetic orientation can be manipulated by a current; and a tunneling layer between the bottom magnetic film layer and the top magnetic film layer; forming a metallic hard mask atop the magnetic structure; patterning and etching the metallic hard mask to define exposed areas of the magnetic structure; selectively etching the exposed areas of the magnetic structure by a chemical etch process based on a CO etch chemistry to form discrete magnetic bits.
US09105568B2	Semiconductor device with integrated magnetic element provided with a barrier structure against metal contamination, and manufacturing A semiconductor device including: a semiconductor body having a first side and a second side opposite to one another; a first barrier element, which extends over the first side of the semiconductor body and is made of a first material configured to act as barrier against metal ions, for example chosen from among titanium, tantalum, titanium alloys or compounds, tantalum alloy; a magnetic element, which extends over the first barrier layer and is made of a second material having magnetic properties, for example a ferromagnetic material; a second barrier element, which extends over the magnetic layer and is made of a third material configured to act as barrier against metal ions, for example chosen from among titanium, tantalum, titanium alloys or compounds, tantalum alloys or compounds. The first and second barrier elements form a top encapsulating structure and a bottom encapsulating structure for the magnetic element.
US09105566B2	Monolithic integrated composite group III-V and group IV device According to one disclosed embodiment, a method for fabricating a monolithic integrated composite device comprises forming a group III-V semiconductor body over a group IV semiconductor substrate, forming a trench in the group III-V semiconductor body, and forming a group IV semiconductor body in the trench. The method also comprises fabricating at least one group IV semiconductor device in the group IV semiconductor body, and fabricating at least one group III-V semiconductor device in the group III-V semiconductor body. In one embodiment, the method further comprises planarizing an upper surface of the III-V semiconductor body and an upper surface of the group IV semiconductor body to render those respective upper surfaces substantially co-planar. In one embodiment, the method further comprises fabricating at least one passive device in a defective region of said group IV semiconductor body adjacent to a sidewall of the trench.
US09105565B2	Nitride semiconductor device According to one embodiment, a nitride semiconductor device includes semiconductor stacked layers provided on a substrate and including a nitride semiconductor; a source electrode and a drain electrode provided on the layers and being in contact with the layers; and a gate electrode provided on the layers and provided between the source electrode and the drain electrode. The layers have a first barrier layer, a second barrier layer, and a carrier running layer interposed between the first barrier layer and the second barrier layer. The second barrier layer and the carrier running layer are removed in a region in which the source electrode on the layers is provided. A part of the source electrode is in contact with the first barrier layer. And another part of the source electrode other than the part of the source electrode is in contact with the second barrier layer.
US09105562B2	Integrated circuit package and packaging methods An integrated circuit packaging method includes fabricating a package module from successive build-up layers which define circuit interconnections, forming a cavity on a top-side of the package module, attaching a metalized back-side of a chip onto a metallic layer, the chip having a front-side with at least one forward contact, disposing the chip in the cavity such that at least one forward contact is electrically connected to at least one of the circuit interconnections of the package module, and coupling the metallic layer that is attached to the chip onto the top-side of the package module.
US09105560B2	Devices and systems for power conversion circuits Devices and systems comprising driver circuits are disclosed for MOSFET driven, normally-on gallium nitride (GaN) power transistors. Preferably, a low power, high speed CMOS driver circuit with an integrated low voltage, lateral MOSFET driver is series coupled, in a hybrid cascode arrangement to a high voltage GaN HEMT, for improved control of noise and voltage transients. Co-packaging of a GaN transistor die and a CMOS driver die using island topology contacts, through substrate vias, and a flip-chip, stacked configuration provides interconnections with low inductance and resistance, and provides effective thermal management. Co-packaging of a CMOS input interface circuit with the CMOS driver and GaN transistor allows for a compact, integrated CMOS driver with enhanced functionality including shut-down and start-up conditioning for safer operation, particularly for high voltage and high current switching. Preferred embodiments also provide isolated, self-powered, high speed driver devices, with reduced input losses.
US09105558B2	Silicon carbide semiconductor device and manufacturing method of the same A silicon carbide semiconductor device includes: a semiconductor substrate made of silicon carbide single crystal and having a principal surface and a backside; and an ohmic electrode contacting one of the principal surface and the backside of the semiconductor substrate in an ohmic manner. A boundary between the ohmic electrode and the one of the principal surface and the backside of the semiconductor substrate is terminated with an element, which has a Pauling electronegativity larger than silicon and a binding energy with silicon larger than a binding energy of Si—H.
US09105552B2	Package on package devices and methods of packaging semiconductor dies Package on package (PoP) devices and methods of packaging semiconductor dies are disclosed. A PoP device includes a first packaged die and a second packaged die coupled to the first packaged die. Metal stud bumps are disposed between the first packaged die and the second packaged die. The metal stud bumps include a bump region and a tail region coupled to the bump region. The metal stud bumps are embedded in solder joints.
US09105550B2	Next generation imaging methods and systems Novel imaging arrangements are detailed. One comprises an optical array sensor with plural photo-electron generating regions dispersed at two or more layers in the structure. Two of these photo-electron generating regions are vertically separated by at least 10 microns—making the sensor useful for sensing objects at focal distances ranging from less than ten inches, out to infinity. The photosites may be spectrally selective. One such arrangement includes a top CMOS sensor array that passes 25% or more of the visible incident light into the structure. A second CMOS sensor array can be provided at a bottom of the structure, for receiving light that was not transduced to photo-electrons elsewhere in the sensor. Another arrangement involves movement of a camera sensor, in a repetitive tracking/pop-back motion, to reduce motion blur in individual frames of a video sequence. A great number of other arrangements are also detailed.
US09105549B2	Semiconductor sensor structures with reduced dislocation defect densities Non-silicon based semiconductor devices are integrated into silicon fabrication processes by using aspect-ratio-trapping materials. Non-silicon light-sensing devices in a least a portion of a crystalline material can output electrons generated by light absorption therein. Exemplary light-sensing devices can have relatively large micron dimensions. As an exemplary application, complementary-metal-oxide-semiconductor photodetectors are formed on a silicon substrate by incorporating an aspect-ratio-trapping technique.
US09105545B2	Imaging device to capture images of subjects in plurality of directions An imaging device includes a silicon substrate having a photoelectric conversion element therein, and a wiring layer on a front-surface side of the silicon substrate. The photoelectric conversion element performs photoelectric conversion on light which enters the photoelectric conversion element from the front-surface side through the wiring layer, and performs photoelectric conversion on light which enters the photoelectric conversion element from a back-surface side of the silicon substrate without going through the wiring layer.
US09105543B2	Solid-state image pickup device, method for manufacturing the same, and electronic apparatus A solid-state image pickup device is provided. The first pixel isolation member includes impurity ions implanted in a first region of the semiconductor substrate so that at least two pixels are disposed between portions of the first region when viewed from a surface of the substrate. A second isolation member includes a trench having an electrocondcutive material disposed therein. The trench is formed in a second region of the substrate different from the first pixel isolation member so that the at least two pixels are disposed between portions of the second region when viewed from the surface of the semiconductor substrate.
US09105540B2	Solid-state imaging device having main waveguide with first and second sub waveguides Provided is a solid-state imaging device capable of ranging with high precision even when the pixel size is small. The solid-state imaging device includes: an optical waveguide having multiple regions with different refractive indices; and a photoelectric conversion unit for converting light guided through the optical waveguide into an electrical signal. The optical waveguide includes a main waveguide located on a light incident side, and a first sub waveguide and a second sub waveguide connected to the main waveguide and located on the photoelectric conversion unit side. The main waveguide guides light which enters from a first direction and light which enters from a second direction. The first sub waveguide and the second sub waveguide guide light which has entered from the first direction and has passed through the main waveguide and light which has entered from the second direction and has passed through the main waveguide, respectively.
US09105539B2	Solid-state imaging device and manufacturing method of the same, and electronic apparatus The present disclosure relates to a solid-state imaging device and a manufacturing method of the same, and an electronic apparatus, capable of more reliably suppressing occurrence of color mixing.A trench is formed between PDs so as to be opened to a light receiving surface side of a semiconductor substrate on which a plurality of the PDs, each of which receives light to generate charges, are formed, an insulating film is embedded in the trench and the insulating film is laminated on a back surface side of the semiconductor substrate. Then, a light shielding portion is formed so as to be laminated on the insulating film and to have a convex shape protruding to the semiconductor substrate at a location corresponding to the trench. The present technology can be applied to a back surface irradiation type CMOS solid-state imaging device.
US09105538B2	Dynamically configurable photovoltaic cell array Embodiments of the present invention relate to photovoltaic cells. Specifically, the present invention relates to photovoltaic (PV) cells configurable for energy conversion and imaging. In a typical embodiment, each photovoltaic cell (PV) in the photovoltaic array is divided into a pixel-based array. Each photovoltaic cell is coupled to a set of switches and the photovoltaic cell is dynamically configured for energy conversion or imaging based on the settings of at least one of the switches.
US09105537B2	Multi-junction photodiode in application of molecular detection and discrimination, and method for fabricating the same A multi-junction photodiode for molecular detection and discrimination and fabrication methods thereof. The multi junction photodiode includes a substrate having first conductive type dopants, an epitaxial layer having the first conductive type dopants, a deep well having second conductive type dopants, a first well having the first conductive type dopants, a second well having the second conductive type dopants, a third well having the first conductive type dopants, and a first doped region having the second conductive type dopants. The epitaxial layer is disposed on the substrate. The deep well is disposed in the epitaxial layer. The first well having three sides connected to the epitaxial layer is disposed in the deep well. The second well is disposed in the first well. The third well having three sides connected to the epitaxial layer is disposed in the second well. The first doped region is disposed in the third well.
US09105530B2	Conductive contacts having varying widths and method of manufacturing same A bump structure includes a contact element formed on a substrate and a passivation layer overlying the substrate. The passivation layer includes a passivation opening exposing the contact element. The bump structure also includes a polyimide layer overlying the passivation layer and an under bump metallurgy (UBM) feature electrically coupled to the contact element. The polyimide layer has a polyimide opening exposing the contact element, and the under bump metallurgy feature has a UBM width. The bump structure further includes a copper pillar on the under bump metallurgy feature. A distal end of the copper pillar width, and the UBM width is greater than the pillar width.
US09105523B2	Semiconductor device and a method of manufacturing the same A reduction in contaminating impurities in a TFT, and a TFT which is reliable, is obtained in a semiconductor device which uses the TFT. By removing contaminating impurities residing in a film interface of the TFT using a solution containing fluorine, a reliable TFT can be obtained.
US09105520B2	Pulse output circuit, shift register and display device A pulse is inputted to TFTs 101 and 104 so that the TFTs would turn ON and then potential of a node α rises. When the potential of the node α reaches (VDD−VthN), the node α became in a floating state. Accordingly, a TFT 105 then turns ON, and potential of an output node rises as a clock signal reaches the level H. On the other hand, potential of a gate electrode of the TFT 105 further rises due to an operation of capacitance 107 as the potential of the output node rises, so that the potential of the output node would be higher than (VDD+VthN). Thus, the potential of the output node rises to VDD without voltage drop caused by a threshold of the TFT 105.
US09105517B2	Wafer to wafer alignment by LED/LSD devices A method for wafer alignment includes forming a first alignment circuit within a first semiconductor wafer; the first alignment circuit is configured to emit an optical signal. Next, the first alignment circuit is activated upon receiving a first activation signal from a wafer bonding tool then the optical signal is sent to a second alignment circuit in a second semiconductor wafer in overlapping relation to the first semiconductor wafer. The second alignment circuit transmits a second activation signal to the wafer bonding tool and consequently the wafer bonding tool initiates an alignment technique between the first and second semiconductor wafers. The alignment technique uses the first and second alignment circuits for optical alignment.
US09105515B2	3D non-volatile memory device, memory system including the same, and method of manufacturing the same A three-dimensional 3D nonvolatile memory device includes vertical channel layers protruding from a substrate; interlayer insulating layers and conductive layer patterns alternately deposited along the vertical channel layers; a barrier metal pattern surrounding each of the conductive layer patterns; a charge blocking layer interposed between the vertical channel layers and the barrier metal patterns; and a diffusion barrier layer interposed between the barrier metal patterns and the charge blocking layer.
US09105511B2	Semiconductor device comprising oxide semiconductor An object is to provide a semiconductor device with a novel structure. The semiconductor device includes a first wiring; a second wiring; a third wiring; a fourth wiring; a first transistor having a first gate electrode, a first source electrode, and a first drain electrode; and a second transistor having a second gate electrode, a second source electrode, and a second drain electrode. The first transistor is provided in a substrate including a semiconductor material. The second transistor includes an oxide semiconductor layer.
US09105507B2	Methods of forming a FinFET semiconductor device with undoped fins A FinFET device includes a plurality of fin structures positioned in and above a semiconducting substrate, wherein each of the fin structures includes a first portion of the semiconducting substrate, an undoped layer of semiconducting material positioned above the first portion of the semiconducting substrate, and a dopant-containing layer of semiconducting material positioned between the first portion of the semiconducting substrate and the undoped semiconducting material, wherein the dopant material is adapted to retard diffusion of one of boron and phosphorous. A gate electrode is positioned around at least the undoped layer of semiconducting material of each of the plurality of fin structures, wherein a height level of a bottom surface of the gate electrode is positioned approximately level with or lower than a height level of a bottom of the undoped layer of semiconducting material of each of the plurality of fin structures.
US09105505B2	Memory cell having a recessed gate and manufacturing method thereof A memory cell with a recessed gate includes a semiconductor substrate, a shallow trench isolation, an active region, a gate electrode, a halogen-doped dielectric layer and at least a capacitor. The shallow trench isolation is disposed in the semiconductor substrate in order to define the active region. A source region and a drain region are respectively disposed on each end of the active region along a first direction. A gate trench is formed in the semiconductor substrate between the source region and the drain region, wherein the gate trench includes a sidewall portion and a curved-bottom surface. The curved-bottom surface has a convex profile when viewed from a cross-sectional view taken along a second direction perpendicular to the first direction. The gate electrode is disposed in the gate trench and the halogen-doped dielectric layer is disposed between the gate electrode and the semiconductor substrate.
US09105500B2	Non-hermetic sealed multi-chip module package A multi-chip module (MCM) package is provided and includes a substrate and a hat assembly. The substrate includes a surface on which chips of the MCM are re-workable. The hat assembly is configured to be non-hermetically sealed to the substrate. The hat assembly and the substrate are configured for tension-type disassembly in a dimension oriented substantially normally with respect to a plane of the substrate surface.
US09105499B1	Complementary field effect transistors using gallium polar and nitrogen polar III-nitride material A device with complementary non-inverted N-channel and inverted P-channel field effect transistors comprising a layer grown epitaxially on a substrate, a barrier layer, a two-dimensional electron gas in the first III-Nitride epitaxial layer, a second III-Nitride material layer, and a two-dimensional hole gas in the second III-Nitride epitaxial layer. A device with complementary inverted N-channel and non-inverted P-channel field effect transistors comprising a nitrogen-polar III-Nitride layer grown epitaxially, a barrier material layer, a two-dimensional hole gas, and a two-dimensional electron gas in the second III-Nitride epitaxial layer. A method of making complementary inverted P-channel and non-inverted N-channel III-Nitride field effect transistors. A method of making a complementary non-inverted P-channel field effect transistor and inverted N-channel III-Nitride field effect transistor on a substrate.
US09105498B2	Gate strain induced work function engineering A stack of a gate dielectric layer and a workfunction material layer are deposited over a plurality of semiconductor material portions, which can be a plurality of semiconductor fins or a plurality of active regions in a semiconductor substrate. A first gate conductor material applying a first stress is formed on a first portion of the workfunction material layer located on a first semiconductor material portion, and a second gate conductor material applying a second stress is formed on a second portion of the workfunction material layer located on a second semiconductor material portion. The first and second stresses are different in at least one of polarity and magnitude, thereby inducing different strains in the first and second portions of the workfunction material layer. The different strains cause the workfunction shift differently in the first and second portions of the workfunction material layer, thereby providing devices having multiple different workfunctions.
US09105497B2	Methods of forming gate structures for transistor devices for CMOS applications One method for forming replacement gate structures for NMOS and PMOS transistors includes performing an etching process to remove a sacrificial gate structure for the NMOS and PMOS transistors to thereby define NMOS and PMOS gate cavities, depositing a gate insulation layer in the gate cavities, depositing a first metal layer on the gate insulation layer in the gate cavities, performing at least one process operation to form (1) an NMOS metal silicide material above the first metal layer within the NMOS gate cavity, the NMOS metal silicide material having a first amount of atomic silicon, and (2) a PMOS metal silicide material above the first metal layer within the PMOS gate cavity, the PMOS metal silicide material having a second amount of atomic silicon, and wherein the first and second amounts of atomic silicon are different, and forming gate cap layers within the NMOS and PMOS gate cavities.
US09105495B2	Semiconductor device and related fabrication methods Semiconductor device structures and related fabrication methods are provided. An exemplary semiconductor device structure (100) includes a trench gate structure (114), a lateral gate structure (118), a body region (124) having a first conductivity type, a drain region (125) and first and second source regions (128, 130) having a second conductivity type. The first and second source regions (128, 130) are formed within the body region (124). The drain region (125) is adjacent to the body region (124) and the first source region (128) is adjacent to the trench gate structure (114), wherein a first portion of the body region (124) disposed between the first source region (128) and the drain region (125) is adjacent to the trench gate structure (114). A second portion of the body region (124) is disposed between the second source region (130) and the drain region (125), and the lateral gate structure (118) is disposed overlying the second portion of the body region (124).
US09105494B2	Termination trench for power MOSFET applications Aspects of the present disclosure describe a termination structure for a power MOSFET device. A termination trench may be formed into a semiconductor material and may encircle an active area of the MOSFET. The termination trench may comprise a first and second portion of conductive material. The first and second portions of conductive material are electrically isolated from each other. It is emphasized that this abstract is provided to comply with rules requiring an abstract that will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims.
US09105493B2	High voltage metal-oxide-semiconductor transistor device and layout pattern thereof A layout pattern of a high voltage metal-oxide-semiconductor transistor device includes a first doped region having a first conductivity type, a second doped region having the first conductivity type, and an non-continuous doped region formed in between the first doped region and the second doped region. The non-continuous doped region further includes a plurality of third doped regions, a plurality of gaps, and a plurality of fourth doped regions. The gaps and the third doped regions s are alternately arranged, and the fourth doped regions are formed in the gaps. The third doped regions include a second conductivity type complementary to the first conductivity type, and the fourth doped regions include the first conductivity type.
US09105482B2	Nanowire PIN tunnel field effect devices A nanowire tunnel device includes a nanowire suspended above a semiconductor substrate by a first pad region and a second pad region, the nanowire having a channel portion surrounded by a gate structure disposed circumferentially around the nanowire, an n-type doped region including a first portion of the nanowire adjacent to the channel portion, and a p-type doped region including a second portion of the nanowire adjacent to the channel portion.
US09105481B2	Semiconductor structure A semiconductor structure is provided. The semiconductor structure includes a substrate, at least a first N-type germanium (Ge) structure and at least a first P-type Ge structure. The first N-type Ge structure is formed on the substrate and has two end parts and at least a first central part bonded between the two end parts thereof. The first central part is floated over the substrate, and a side surface of the first central part is a {111} Ge crystallographic surface. The first P-type Ge structure is formed on the substrate and has two end parts and at least a second central part bonded between the two end parts thereof. The side surface of the second central part is a {110} Ge crystallographic surface.
US09105479B2	Integrated circuit including an environmental sensor An integrated circuit and a method of making the same. The integrated circuit includes a semiconductor substrate including at least one environmental sensor. The integrated circuit also includes a cap layer located on a major surface of the substrate. The integrated circuit further includes at least one elongate channel for allowing access of said sensor to an environment surrounding the integrated circuit.
US09105478B2	Devices and methods of forming fins at tight fin pitches Devices and methods for forming semiconductor devices with fins at tight fin pitches are provided. One method includes, for instance: obtaining an intermediate semiconductor device; growing an epi layer over the substrate; forming a doped layer below the epi layer; depositing a first oxide layer on the epi layer; applying a dielectric material on the first oxide layer; and depositing a lithography stack on the dielectric material. One intermediate semiconductor device includes, for instance: a substrate with at least one n-well region and at least one p-well region; a doped layer over the substrate; an epi layer over the doped layer; a first oxide layer over the epi layer; a dielectric layer over the first oxide layer; and a lithography stack over the dielectric layer.
US09105473B2	Field effect transistor, display element, image display device, and system A disclosed field effect transistor includes a gate electrode to which a gate voltage is applied, a source electrode and a drain electrode for acquiring a current in response to the gate voltage, an active layer provided adjacent to the source electrode and the drain electrode, the active layer being formed of an n-type oxide semiconductor, and a gate insulator layer provided between the gate electrode and the active layer. In the field effect transistor, the n-type oxide semiconductor is formed of an n-type doped compound having a chemical composition of a crystal phase obtained by introducing at least one of a trivalent cation, a tetravalent cation, a pentavalent cation and a hexavalent cation.
US09105471B2	Rare earth oxy-nitride buffered III-N on silicon Rare earth oxy-nitride buffered III-N on silicon includes a silicon substrate with a rare earth oxide (REO) structure, including several REO layers, is deposited on the silicon substrate. A layer of single crystal rare earth oxy-nitride is deposited on the REO structure. The REO structure is stress engineered to approximately crystal lattice match the layer of rare earth oxy-nitride so as to provide a predetermined amount of stress in the layer of rare earth oxy-nitride. A III oxy-nitride structure, including several layers of single crystal rare earth oxy-nitride, is deposited on the layer of rare earth oxy-nitride. A layer of single crystal III-N nitride is deposited on the III oxy-nitride structure. The III oxy-nitride structure is chemically engineered to approximately crystal lattice match the layer of III-N nitride and to transfer the predetermined amount of stress in the layer of rare earth oxy-nitride to the layer of III-N nitride.
US09105466B2	Integrated circuit An integrated circuit includes a first standard cell over a substrate, a power rail, and a first connection plug. The first standard cell includes an active area, at least one gate electrode overlapping the active area of the first standard cell, and at least one metallic line structure overlapping the active area of the first standard cell. The at least one metallic line structure is substantially parallel to the gate electrode. The power rail is substantially orthogonal to the at least one metallic line structure of the first standard cell. The power rail overlaps the at least one metallic line structure of the first standard cell, and the power rail has a flat edge extending through the first standard cell. The first connection plug is at a region where the power rail overlaps the at least one metallic line structure of the first standard cell.
US09105461B2	Flash lamp with gas fill for suppressing self-starting A flash lamp with a gas fill for suppressing self-starting includes an elongate discharge tube having two electrodes arranged in the discharge tube at opposite ends of the discharge tube. A starting electrode for applying a starting voltage is arranged outside the discharge tube, and the discharge tube has a length of at least 1000 mm and is filled with a gas fill. In order to suppress undesired self-starting, the discharge tube is filled with a gas mixture which contains at least one inert gas and at least one gas suppressing self-starting.
US09105458B2	System and methods for ionizing compounds using matrix-assistance for mass spectrometry and ion mobility spectrometry An ionization method for use with mass spectrometry or ion mobility spectrometry is a small molecule compound(s) as a matrix into which is incorporated analyte. The matrix has attributes of sublimation or evaporation when placed in vacuum at or near room temperature and produces both positive and negative charges. Placing the sample into a region of sub-atmospheric pressure, the region being in fluid communication with the vacuum of the mass spectrometer or ion mobility spectrometer, produces gas-phase ions of the analyte for mass-to-charge or drift-time analysis without use of a laser, high voltage, particle bombardment, or a heated ion transfer region. This matrix and vacuum assisted ionization process can operate from atmosphere or vacuum and produces ions from large (e.g. proteins) and small molecules (e.g. drugs) with charge states similar to those observed in electrospray ionization.
US09105454B2	Plasma-based electron capture dissociation (ECD) apparatus and related systems and methods An electron capture dissociation (ECD) apparatus includes a plasma source for generating plasma. Analyte ions are exposed to the plasma in an ECD interaction region, either inside or outside the plasma source. The apparatus may include one or more devices for refining the plasma in preparation for interaction with the analyte ions. Refining may entail removing unwanted species from the plasma, such as photons, metastable particles, neutral particles, and/or high-energy electrons unsuitable for ECD, and/or controlling a density of low-energy electrons in the plasma.
US09105453B2	Mass spectrometer and mass spectrometry A portable mass spectrometer that is carried to a sampling site to conduct analysis incorporates measures against erroneous operation. To prevent erroneous operation, when a measurement sample cannot be accurately analyzed because of contamination in the measurement sample, a criterion for aborting the sample measurement is provided and mass spectrometer control maintenance is performed. When urine is measured, the mass spectrometer detects the substances contained in the urine and automatically determines whether the sample is urine. The mass spectrometer then automatically selects an analysis condition specific to urine samples to make a measurement. Also with respect to sweat and saliva, the mass spectrometer similarly selects a specific analysis condition. The mass spectrometer automatically determines whether a sample, which is an internal standard sample contained in a sample case, is being measured on a measurement-by-measurement basis and automatically displays any error, interrupts the measurement, or carries out other processing.
US09105449B2	Distributed power arrangements for localizing power delivery A distributed power arrangement to provide local power delivery in a plasma processing system during substrate processing is provided. The distributed power arrangement includes a set of direct current (DC) power supply units. The distributed power arrangement also includes a plurality of power generators, which is configured to receive power from the set of DC power supply units. Each power generator of the plurality of power generators is coupled to a set of electrical elements, thereby enabling the each power generator of the plurality of power generators to control the local power delivery.
US09105448B2	Electron beam diagnostic system using computed tomography and an annular sensor A system for analyzing an electron beam including a circular electron beam diagnostic sensor adapted to receive the electron beam, the circular electron beam diagnostic sensor having a central axis; an annular sensor structure operatively connected to the circular electron beam diagnostic sensor, wherein the sensor structure receives the electron beam; a system for sweeping the electron beam radially outward from the central axis of the circular electron beam diagnostic sensor to the annular sensor structure wherein the electron beam is intercepted by the annular sensor structure; and a device for measuring the electron beam that is intercepted by the annular sensor structure.
US09105447B2	Wide dynamic range ion energy bias control; fast ion energy switching; ion energy control and a pulsed bias supply; and a virtual front panel This disclosure describes systems, methods, and apparatus for operating a plasma processing chamber. In particular, a periodic voltage function combined with an ion current compensation can be provided as a bias to a substrate support as a modified periodic voltage function. This in turn effects a DC bias on the surface of the substrate that controls an ion energy of ions incident on a surface of the substrate. A peak-to-peak voltage of the periodic voltage function can control the ion energy, while the ion current compensation can control a width of an ion energy distribution function of the ions. Measuring the modified periodic voltage function can provide a means to calculate an ion current in the plasma and a sheath capacitance of the plasma sheath. The ion energy distribution function can be tailored and multiple ion energy peaks can be generated, both via control of the modified periodic voltage function.
US09105441B2	Mobile X-ray image capturing apparatus A mobile X-ray capturing apparatus includes an X-ray tube for irradiating an object with X ray, an arm for holding the X-ray tube, and a support pillar for holding the arm so as to facilitate arrangement of units. Further, the mobile X-ray capturing apparatus includes an arm energizing unit provided with an electrode incorporated in the arm for supplying power or a signal necessary for the X-ray tube, and a support pillar energizing unit provided with an electrode incorporated in the support pillar for supplying the power or the signal to the arm.
US09105440B2	Apparatus of plural charged particle beams with multi-axis magnetic lens An apparatus of plural charged particle beams with multi-axis magnetic lens is provided to perform multi-functions of observing a specimen surface, such as high-throughput inspection and high-resolution review of interested features thereof and charge-up control for enhancing image contrast and image resolution. In the apparatus, two or more sub-columns are formed and each of the sub-columns performs one of the multi-functions. Basically the sub-columns take normal illumination to get high image resolutions, but one or more may take oblique illuminations to get high image contrasts.
US09105438B2	Imaging and processing for plasma ion source Applicants have found that energetic neutral particles created by a charged exchange interaction between high energy ions and neutral gas molecules reach the sample in a ion beam system using a plasma source. The energetic neutral create secondary electrons away from the beam impact point. Methods to solve the problem include differentially pumped chambers below the plasma source to reduce the opportunity for the ions to interact with gas.
US09105437B2	Field emission X-ray tube and method of focusing electron beam using the same Provided is a field emission X-ray tube. The field emission X-ray tube includes a cathode electrode provided on one end of a vacuum container, including a field emission emitter; a gate electrode provided inside the vacuum container to be adjacent to the cathode electrode, including a first opening; a focusing electrode electrically connected to the gate electrode and provided on one surface of the gate electrode to be farther from the cathode electrode than the gate electrode while including a second opening with a greater width than that of the first opening; and an anode electrode provided inside the vacuum container on another end thereof in a direction where the vacuum container is extended. A height of the focusing electrode is identical to the width of the second opening, and wherein the width of the first opening is ⅓ or less of the second opening.
US09105434B2	High current, high energy beam focusing element Methods and systems for electron emission are disclosed. An example system can comprise a cup-rod-needle assembly that can collect a source of electrons and allow internal space charge build-up and generation of an internal self-electric field build-up. The system can provide self-emission at a predetermined location of the needle in the system. An example system can comprise a cup-rod-needle assembly, an annular dielectric insulator as a plug, a source of electrons to provide electrons into a cup, and a beam drift tube.
US09105428B2	Method of extinguishing an electric arc in a low or high voltage switchgear by pulse discharge The present invention relates to a method of extinguishing an electric arc, which occurs in low or high voltage switchgears, by pulse discharge. The electric arc is cut like a “fuse” by connecting a condenser (201) to both ends of the electric arc at the moment when it occurs and discharging the condenser (201) through the electric arc. The condenser is charged using a resistor (202) and a diode (203), and its discharge is adjusted by some auxiliary contacts.
US09105425B2	Electronic apparatus According to one embodiment, an electronic apparatus includes a housing, a switch, a button member and a supporting portion. The housing has an opening. The button member includes an operating portion, a rocker shaft and an acting portion. The operating portion is exposed through the opening. The shaft is coupled to the operating portion and pivotable. The acting portion is coupled to the shaft, configured to face the switch and to pivot about the shaft, thereby pressing the switch. The supporting portion is configured to support the button member, the supporting portion being configured to be elastically deformed by part of the button member and to return the button member.
US09105408B2	Dielectric resin composition for film capacitor and film capacitor A resin composition constituting dielectric resin films of a film capacitor includes a first atom group including at least one functional group selected from among a methylene group, an aromatic ring and an ether group and having a relatively small molar polarizability, and a second atom group including at least one functional group selected from among a hydroxyl group, an amino group and a carbonyl group and having a relatively large molar polarizability. The resin composition satisfies the condition that a value calculated from the formula (sum of absorption band intensities of first atom group)/(sum of absorption band intensities of second atom group) is 1.0 or more. Herein, as absorption band intensities of the functional groups, peak intensities detected in specific wavenumber ranges are employed.
US09105407B2	Multi-layer ceramic capacitor and method of manufacturing the same A multi-layer ceramic capacitor is constituted by ceramic dielectric layers alternately laminated with conductive layers, wherein the ceramic dielectric layers are sintered in such a way that core-shell grains having a core-shell structure are mixed with uniform solid-solution grains resulting from uniform progression of the solid solution process. Such multi-layer ceramic capacitor is characterized in that the area ratio of the core-shell grains to all sintered grains constituting the ceramic dielectric layer is 5 to 15% and that the average grain size of all sintered grains including the core-shell grains and uniform solid-solution grains is 0.3 to 0.5 μm.
US09105405B2	Ceramic electronic component with metal terminals A ceramic electronic component with metal terminals comprising a chip component formed with terminal electrodes at both ends, and a pair of metal terminals comprising a flat plate portion having a flat plate portion facing face provided so that it faces an end face of said chip component and connected to said terminal electrodes via a joining portion , and a mounting portion connected to one end portion of said flat plate portion and extending approximately perpendicular to said flat plate portion, wherein said mounting portion has a mounting portion bottom face forming an angle of approximately 270 degrees with respect to said flat plate portion, and a mounting portion upper face forming an angle of approximately 90 degrees with respect to said flat plate portion, and a solder adhering prevention area having lower wettability than said mounting portion bottom face is formed.
US09105403B2	High-throughput solution processing of large scale graphene and device applications A method of producing carbon macro-molecular structures includes dissolving a graphitic material in a solvent to provide a suspension of carbon-based macro-molecular structures in the solvent, and obtaining a plurality of the carbon macro-molecular structures from the suspension. The plurality of carbon macro-molecular structures obtained from the suspension each consists essentially of carbon. A material according to some embodiments of the current invention is produced according to the method of producing carbon macro-molecular structures. An electrical, electronic or electro-optic device includes material produced according to the methods of the current invention. A composite material according to some embodiments of the current invention has carbon macro-molecular structures produced according to methods of producing carbon macro-molecular structures according to some embodiments of the current invention. A hydrogen storage device according to some embodiments of the current invention has carbon macro-molecular structures produced according to methods of producing carbon macro-molecular structures according to some embodiments of the current invention. An electrode according to some embodiments of the current invention has carbon macro-molecular structures produced according to methods of producing carbon macro-molecular structures according to some embodiments of the current invention.
US09105397B2	Capacitor embedded between busbars, electric power device and electric power conversion device The present invention provides an inter-bus-bar built-in capacitor capable of reducing the size of a capacitor used in an inverter or the like or downsizing the capacitor, and provides power equipment as well as a power converting apparatus. The inter-bus-bar built-in capacitor is provided between a pair of opposing bus bars and includes a high-dielectric-constant material which has a relative dielectric constant of at least 50 when a voltage of 1,000 V is applied at a temperature of 25° C. Thus, it is possible to provide the inter-bus-bar built-in capacitor capable of reducing the size of a capacitor used in an inverter or the like or downsizing the capacitor and provide the power equipment as well as the power converting apparatus.
US09105392B2	Structure of transformer's lead frame An improved structure of transformer's lead frame includes at least a lead frame module consisting of a lead frame main body and a lead frame cover, the lead frame main body has a through hole furnished at the center thereof; a bobbin formed at the side of the circumference of the through hole, and a pair of oppositely configured and reversely salient extension parts furnished at sides of the circumference of the through hole, each of the extension parts is combined to the mid-section of the wire connecting seats that have a plurality of wire connecting posts, a plurality of clip indentations are furnished at intervals and at the mid-section of the edge of the two sides of the corresponding extension parts and at the positions covered by the width of the corresponding extension parts.
US09105388B2	Inductor and manufacturing method therefor An inductor that has the following: an inductor core comprising a plurality of core members arranged in a ring with gaps therebetween; primary insert-molded resin parts comprising a thermoplastic resin covering the outside surface of the inductor core, excluding the surfaces of the core members that face each other; coils disposed around the aforementioned gaps and the primary insert-molded resin parts on the inductor core; and secondary insert-molded resin parts comprising a thermoplastic resin insert-molded around the coils to affix said coils to the inductor core. This allows high-cycle manufacturing of inductors without a thermosetting-resin potting step in a vacuum furnace or a heat curing treatment in a heating furnace.
US09105387B2	Retainer and noise current absorber A retainer includes a pair of housings having opening surfaces; a connecting portion connecting outer peripheral surfaces of the pair of housings. The retainer is configured to be at a closed state with the opening surfaces of the pair of housing put together and to be at an open state with the opening surfaces of the pair housings separated. Parts of wall surfaces, constituting the housings, are structured as flexible walls capable of deforming, and the connecting portion is connected to the flexible walls.
US09105384B2	Apparatus and method for printing maxels Magnetic structure production may relate, by way of example but not limitation, to methods, systems, etc. for producing magnetic structures by printing magnetic pixels (aka maxels) into a magnetizable material. Disclosed herein is production of magnetic structures having, for example: maxels of varying shapes, maxels with different positioning, individual maxels with different properties, maxel patterns having different magnetic field characteristics, combinations thereof, and so forth. In certain example implementations disclosed herein, a second maxel may be printed such that it partially overwrites a first maxel to produce a magnetic structure having overlapping maxels. In certain example implementations disclosed herein, a magnetic printer may include a print head comprising multiple parts and having various properties. In certain example implementations disclosed herein, various techniques for using a magnetic printer may be employed to produce different magnetic structures. Furthermore, description of additional magnet-related technology and example implementations thereof is included herein.
US09105383B2	Ferrite particle and production method thereof A ferrite powder according to the present invention includes a laminar structure exhibiting a state where W-type ferrite phases are laminated in an easy direction of magnetization, the W-type ferrite phases including a compound expressed by AM2Fe16O27, where A, M, Fe, and O represent a first metal element (Sr, Ba, Ca, Pb, etc), a second metal element (Fe, Zn, Cu, Co, Mn, Ni, etc), iron, and oxygen, respectively. This ferrite particle is obtained through: a shape forming step that shapes a mixed powder in a magnetic field to obtain a compact, the mixed powder including for example an M-type ferrite particle including a compound expressed by AFe12O19 and a spinel-type ferrite particle (S-type ferrite particle) including a compound expressed by MFe2O4; a calcination step that calcines the compact to obtain a calcined substance; and a milling step that mills the calcined substance.
US09105381B2	High frequency inductor structure having increased inductance density and quality factor Disclosed is an inductor structure. The inductor structure includes a base material, a plurality of bottom spiral conductors disposed on the base material, and at least one top spiral conductor disposed on the at least one bottom spiral conductor, and dielectric material separating the bottom, middle and top spiral conductors. A current path for high frequency operation is disclosed. Also disclosed is a method for determining the number of turns in the at least one top spiral conductor and the at least one bottom spiral conductor.
US09105378B2	Graphene transparent electrode and method for manufacturing the same Disclosed herein are a method for manufacturing a graphene transparent electrode and a graphene transparent electrode manufactured by the method. The method includes: providing a graphene oxide solution: forming a metal thin film on a glass substrate; coating the graphene oxide solution on the metal thin film, followed by drying; primarily reducing the thus obtained graphene oxide by using a reducing agent, to obtain reduced graphene oxide; secondarily reducing the reduced graphene oxide by heat treatment under the inert atmosphere, to form a reduced layer; compressing a transparent film on the reduced layer; and etching the metal film by an etching solution. The method enables a graphene transparent electrode having economical feasibility and excellent electric conductivity to be manufactured.
US09105377B2	System and method for enhanced auto-negotiation for NGBASE-T A system and method for enhanced auto-negotiation for NGBASE-T. Link partners can be configured to exchange advanced NGBASE-T configuration information such as type, profile, capability and mode information of the PHY in one or more next page messages. Determined cabling parameters that are reflective of communication channel characteristics can be used in the auto-negotiation selection of a configuration for NGBASE-T operation.
US09105375B2	Cable assembly and method of manufacturing the same Outer-conductor-exposed portions are positioned in respective second body portions of a cable holder, and solder is supplied into solder pools provided in the respective second body portions, whereby outer conductors and ground contacts are connected to each other. Hence, even if the solder is in a molten state, a heated soldering bit does not touch the outer conductors. Therefore, the occurrence of any deformation or melting of insulators is suppressed. Furthermore, since there is no need to caulk any shield connection terminals in such a manner as to conform to the shapes of the outer conductors as in the known art, there is no chance of the insulators undergoing elastic deformation. Hence, the insulators are protected from any factors for thermal deformation and elastic deformation, and electric characteristics of differential signal transmission cables for individual finished products are thus stabilized. Consequently, the reliability of the cable assembly is improved.
US09105374B2	Flame retardant polymer composition comprising an ethylene copolymer with maleic anhydride units as coupling agent The present invention relates to a flame retardant polymer composition comprising (A) an ethylene copolymer comprising alkyl acrylate comonomer units, (B) uncoated aluminum hydroxide as inorganic filler, and (C) an ethylene copolymer comprising maleic anhydride units in an amount of 0.6 to 5 wt. %, an article comprising such a composition, the use of such a composition for producing a layer in a wire or cable and the use of an ethylene copolymer comprising maleic anhydride units for producing a wire or cable fulfilling the requirements of class D of the FIPEC test according to prEN 50399:2007./.
US09105372B2	Aqueous suspensions of calcium carbonate-comprising materials with low deposit built up The present invention concerns an anti-deposit additive and a deposit and/or corrosion reducing aqueous slurry containing a calcium carbonate containing material. In particular, the present invention is directed to the use of at least one anionically charged comb polymer as an anti-deposit agent in an aqueous slurry comprising a calcium carbonate containing material.
US09105367B2	Dual elliptical reflector with a co-located foci for curing optical fibers A device for UV curing a coating or printed ink on a workpiece such as an optical fiber comprises dual elliptical reflectors arranged to have a co-located focus. The workpiece is centered at the co-located focus such that the dual elliptical reflectors are disposed on opposing sides of the workpiece. Two separate light sources are positioned at a second focus of each elliptical reflector, wherein light irradiated from the light sources is substantially concentrated onto the surface of the workpiece at the co-located focus.
US09105365B2	Method for controlling temperature of a portion of a radioactive waste storage system and for implementing the same A system and method for storing radioactive waste, such as spent nuclear fuel, in one embodiment, the invention is a method of controlling temperature of a portion of a storage system comprising a container loaded with radioactive waste and a ventilated module in which the container is positioned, the ventilated module configured so that heat generated by the radioactive waste causes a natural convective flow of air through, a ventilation passageway of the ventilated module, the method comprising; throttling the natural convective flow of the air through the ventilated module to alter a heat rejection rate of the storage system to compensate for a decreasing heat generation rate of the radioactive waste to maintain the portion of the storage system within a predetermined temperature range.
US09105360B2	Forming a characterization parameter of a resistive memory element An incremental signal is defined that includes at least one of a duration and a peak voltage that is less than a respective minimum programming time or minimum programming voltage step of a resistive memory element. A characterization procedure is repeatedly performed that at least involves: applying a signal to the memory element, the signal being incremented by the incremental signal during each subsequent application; measuring a first resistance of the memory element in response to the signal; and c) measuring a second resistance of the memory element after a time period has elapsed from the measurement of the first resistance with no programming signal applied. In response to the first and second resistance measurements of the characterization procedure, a characterization parameter of the memory element is formed.
US09105357B2	Semiconductor memory device and defective judging method thereof A semiconductor memory device is provided with a plurality of memory cells connected to a plurality of word lines, a word-line leakage detector configured to detect a leakage current generated on at least one of the plurality of word lines, and a controller configured, when a leakage current is detected by the word-line leakage detector, to determine that a block including a memory cell connected to a word line through which the leakage current is flowing is defective. The word-line leakage detector has a detection voltage generator configured to generate a detection voltage in accordance with the leakage current, a comparator configured to generate a flag signal having output logic that is inverted depending on whether the detection voltage exceeds a predetermined threshold voltage, and an adjuster configured to adjust a current amount by diverting part of the leakage current in accordance with an ambient temperature.
US09105355B2	Memory cell array operated with multiple operation voltage A memory cell array includes a bit line, a complementary bit line, a first operation voltage supply circuit, a second operation voltage supply circuit, a first memory cell and a second memory cell. The first operation voltage supply circuit is electrically coupled to the bit line and the complementary bit line and used for supplying a first operation voltage. The second operation voltage supply circuit is electrically coupled to the bit line and the complementary bit line and used for supplying a second operation voltage. The first memory cell is electrically coupled to the bit line and the complementary bit line and used for receiving the first operation voltage. The second memory cell is electrically coupled to the bit line and the complementary bit line and used for receiving the second operation voltage. The first and second memory cells are located in a same column in the memory cell array.
US09105348B2	Electronic device with a power supply circuit for controlling the operations of a non-volatile memory and a volatile memory therein An electronic device according to the present technique includes a non-volatile memory in which a program is stored, a volatile memory in which the program read from the non-volatile memory is stored, a controller part for controlling operations of the non-volatile memory and the volatile memory, and a power supply controller for controlling power to the controller part and the volatile memory. The controller part includes a power supply part and a signal fixing part. The power supply part is separated from another power supply line, and power for an interface signal of the volatile memory is supplied from the power supply part thereto. A voltage is supplied from the power supply part to the signal fixing part, and the signal fixing part fixes an output logic of the signal supplied to the volatile memory according to the signal from the power supply controller.
US09105346B2	Semiconductor device and method for operating the same A semiconductor device comprises a memory cell array comprising memory cells coupled to word lines and bit lines, a voltage generator suitable for generating a drive voltage to be applied to a selected word line, and a control logic suitable for detecting the number of pulses of a program voltage received from the memory cell array in a program operation, storing bias information corresponding to the detected number of pulses in a register, and controlling a level of the program voltage for a subsequent program operation based on the bias information.
US09105344B2	Shut-off mechanism in an integrated circuit device Described herein are technologies related to self-disabling feature of a integrated circuit device to avoid unauthorized access to stored data information.
US09105343B2	Multi-level cells and method for using the same The present invention is directed to a method for reading and writing an STT-MRAM multi-level cell (MLC), which includes a plurality of memory elements coupled in series. The method detects the resistance states of individual memory elements in an MLC by sequentially writing at least one of the plurality of memory element to the low resistance state in order of ascending write current threshold. If a written element switches the resistance state thereof after the write step, then the written element was in the high resistance state prior to the write step. Otherwise, the written element was in the low resistance state prior to the write step. The switching of the resistance state can be ascertained by comparing the resistance or voltage values of the plurality of memory elements before and after writing each of the plurality of memory elements in accordance with the embodiments of the present invention.
US09105339B2	Methods of driving a memory Methods of driving a memory include erasing a plurality of memory cells of a memory device, testing whether the memory cells have been erased, and programming the memory cells without erasing the memory cells again if more than a predetermined percentage of the memory cells, but less than all of the memory cells, were successfully erased.
US09105338B2	OTP memory The present invention provides an OTP memory having higher confidentiality. A memory cell has a memory transistor forming a current path between first and second nodes, a selection transistor forming a current path between third and fourth nodes, the third node being coupled to the gate of the memory transistor via a line, and a capacitor coupled to the first node. By applying high voltage which does not break but deteriorates a gate oxide film and increases gate leak current to a memory transistor, data is written. Data can be read by the presence/absence of leak of charges accumulated in the capacitor. Since the position of deterioration in the gate oxide film cannot be discriminated by a physical analysis, confidentiality is high.
US09105333B1	On-chip copying of data between NAND flash memory and ReRAM of a memory die A data storage device includes a memory die, where the memory die includes a NAND flash memory and a resistive random access memory (ReRAM). The memory die also includes an interface coupled to the ReRAM and the NAND flash memory. The interface is configured to support on-chip copying of data between the NAND flash memory and the ReRAM.
US09105327B2	Memory controller using a data strobe signal and method of calibrating data strobe signal in a memory controller A memory controller and a method of calibrating the memory controller are provided. Input circuitry in the memory controller receives a differential pair of data strobe signals from a memory and generates a logical data strobe signal in dependence on a voltage difference between the differential pair of data strobe signals. Hysteresis circuitry, when active, increases by a predetermined offset a threshold voltage difference at which the input circuitry changes a logical state of the logical data strobe signal. Gate signal generation circuitry generates a data strobe gating signal, wherein the memory controller interprets the logical data strobe signal as valid when the data strobe gating signal is asserted. The memory controller performs a training process to determine a timing offset for the data strobe gating signal with respect to said logical data strobe signal, wherein the training process provides a first phase in which the hysteresis circuitry is active and a second phase in which the hysteresis circuitry is inactive.
US09105326B2	Memory device and method for writing therefor A method of writing a memory cell includes, during a write cycle, causing a voltage level at a power terminal of the memory cell to change from a supply voltage level toward a first voltage level. The voltage level at the power terminal of the memory cell is maintained at the first voltage level for a first predetermined duration. The voltage level at the power terminal of the memory cell is maintained at a second voltage level for a second predetermined duration, where the second voltage level is between the first voltage level and the supply voltage level. During the write cycle, the voltage level at the power terminal of the memory cell is caused to change from the first voltage level toward the supply voltage level.
US09105324B2	Channel skewing Methods and systems for channel skewing are described. One or more methods for channel skewing includes providing a number of groups of data signals to a memory component, each of the number of groups corresponding to a respective channel, and adjusting a phase of a group of data signals corresponding to at least one of the number of channels such that the group of data signals are skewed with respect to a group of data signals corresponding to at least one of the other respective channels.
US09105322B2	Solid state drive Provided is a solid state drive suitable for an increase in capacity. The solid state drive includes a flash memory, and a capacitor electrically connected to the flash memory. The capacitor is composed of an electric double layer capacitor including an electrolyte solution containing propylene carbonate.
US09105320B2	Memory devices and methods of operating the same The present disclosure includes memory devices and methods of operating the same. One such device includes an array of groups of memory cells, a group selector configured to select a particular group of memory cells from within the array, and a cell selector configured to select a particular memory cell from within the selected particular group of memory cells.
US09105318B2	Memory device and method operable to provide multi-port functionality thereof A memory device operable to provide multi-port functionality, which may comprise a single-port memory having a first operating frequency that is at least twice of a second operation frequency of a multi-port memory, a read synchronization module that synchronizes a set of read signals from the second operation frequency to the first operating frequency, a write synchronization module that synchronizes a set of write signals from the second operation frequency to the first operating frequency, a read/write signal selector that integrates a set of synchronized read signals and a set of synchronized write signals into a set of input control signals of the single-port memory, and a read out data synchronization module configured to synchronize a set of read out data from the single-port memory with the second operation frequency of the multi-port memory.
US09105317B2	Memory system capable of calibrating output voltage level of semiconductor memory device and method of calibrating output voltage level of semiconductor memory device Provided are a semiconductor memory device and a memory system including the same, which may calibrate a level of an output voltage in consideration of channel environment and a mismatch in on-die termination (ODT) resistance of a memory controller. The memory system includes a memory controller and a semiconductor memory device. The semiconductor memory device is configured to generate a reference voltage based on driving information of the memory controller, and calibrate an output voltage level based on a reference voltage when the semiconductor memory device is electrically connected to the memory controller.
US09105310B2	System and method of programming a memory cell A method includes creating a breakdown condition at a semiconductor transistor structure that includes an overlap region and a channel region. The breakdown condition is created by causing a first voltage difference between a gate of the semiconductor transistor structure and the overlap region to exceed a breakdown voltage of the semiconductor transistor structure while maintaining a second voltage difference between the gate and the channel region at less than the breakdown voltage.
US09105306B2	Identifying objects in images using object identity probabilities based on interframe distances The invention makes it possible to determine whether or not objects appearing in various temporal positions in an input video are identical to each other. Identity between a plurality of objects detected from an input video is determined by using an object identity probability determined based on an interframe distance, the interframe distance being a distance between frames from which the respective objects are detected.
US09105305B2	Dynamic higher-level redundancy mode management with independent silicon elements A Solid-State Disk (SSD) controller enables dynamic higher-level redundancy mode management with independent silicon elements to provide graceful degradation as non-volatile (e.g. flash) memory elements fail during operation of an SSD implemented by the controller. Higher-level error correction provides correction of lower-level uncorrectable errors. If a failure of one of the non-volatile memory elements is detected, then the higher-level error correction is dynamically transitioned from operating in a current mode to operating in a new mode. The transition includes one or more of reducing free space available on the SSD, rearranging data storage of the SSD, recovering/storing failed user data (if possible), and determining/storing revised higher-level error correction information. Operation then continues in the new mode. If another failure of the non-volatile memory elements is detected, then another transition is made to another new mode.
US09105304B2	Margining decoding utilizing soft-inputs Determining a parameter associated with whether a portion of a storage device is defective is disclosed. Determining comprises: obtaining known data associated with the portion; reading back from the portion to produce a read-back waveform; decoding the read-back waveform, including producing statistical information; and determining a parameter associated with whether the portion is defective based at least in part on the statistical information.
US09105303B2	Variable bit aspect ratios in magnetic media An apparatus comprises a write transducer, an energy source, and a controller. The write transducer is configured to write data to a magnetic recording medium, and the energy source is configured to heat the magnetic recording medium while it is being written to by the write transducer. The controller is coupled to the write transducer and configured to adjust at least an operating power of the energy source to selectably cause bits having variable bit aspect ratios to be written to the magnetic media.
US09105293B2	Glass substrate for a magnetic disk, magnetic disk and method of manufacturing a magnetic disk A glass substrate for a magnetic disk, wherein, in regions with respect to two places arbitrarily selected on a surface of the glass substrate on its central portion side relative to its outer peripheral end, a surface shape with a shape wavelength in a band of 60 to 500 μm is extracted from surface shapes in each of the regions and, assuming that a root mean square roughness Rq of the surface shape is given as a microwaviness Rq, the difference between the microwavinesses Rq of the regions is 0.02 nm or less or the difference between standard deviations of the microwavinesses Rq of the regions is 0.04 nm or less.
US09105292B2	Magnetic recording medium and method of manufacturing same A magnetic recording medium and related method of manufacturing a magnetic recording medium that has a protective layer for the magnetic recording medium and that exhibits excellent corrosion resistance in the protective layer. The magnetic recording medium includes on a nonmagnetic substrate a magnetic layer and a protective layer formed on the magnetic layer. The protective layer is formed of a lower layer in contact with the magnetic layer and an upper layer formed on the lower layer. The material used in the lower layer is a metal having a standard electrode potential of −0.8 to 0.3 V.
US09105288B1	Formed electrical contact pad for use in a dual stage actuated suspension A flexible electrical circuit such as for use in a hard disk drive dual stage actuated (DSA) suspension has a dimple or other raised feature such as a jog formed in an electrical contact pad. The dimple raises up at least part of the contact pad in height so as to reduce the distance that an electrical bridging component or material such conductive epoxy, solder paste, or jet dispensed solder must traverse in order to complete an electrical connection from the contact pad to an adjacent piezoelectric microactuator or other electrical component for which the electrical circuit carries an electrical signal or electrical power. The reduced distance improves the cleanliness and reliability of the electrical and physical bond, and can allow for electrical connection types that would otherwise be impractical.
US09105286B2	Method using epitaxial transfer to integrate HAMR photonic integrated circuit (PIC) into recording head wafer Embodiments of the present invention generally relate to a method for forming a HAMR device having a photonic integrated circuit that includes an optical detector, an optical emitter, and an optical element distinct from the optical detector and the optical emitter, where the elements of the photonic integrated circuit are aligned with a near field transducer. The method includes forming one or more layers on a substrate, bonding the layers to a partially fabricated recording head, removing the substrate using epitaxial lift-off, and forming the optical elements on the partially fabricated recording head.
US09105284B2	Magnetic media having graphene wear protection layers An optical or magnetic storage medium is disclosed that includes a disc having layers of graphene on one or both sides of the disc to provide wear protection against scratches and mechanical abrasion.
US09105271B2	Complex-transform channel coding with extended-band frequency coding An audio encoder receives multi-channel audio data comprising a group of plural source channels and performs channel extension coding, which comprises encoding a combined channel for the group and determining plural parameters for representing individual source channels of the group as modified versions of the encoded combined channel. The encoder also performs frequency extension coding. The frequency extension coding can comprise, for example, partitioning frequency bands in the multi-channel audio data into a baseband group and an extended band group, and coding audio coefficients in the extended band group based on audio coefficients in the baseband group. The encoder also can perform other kinds of transforms. An audio decoder performs corresponding decoding and/or additional processing tasks, such as a forward complex transform.
US09105268B2	Method and apparatus for predicting intent in IVR using natural language queries An IVR system is disclosed in which customer experience is enhanced by improving the accuracy and intent prediction capabilities of an interactive voice response system. Customers are allowed to make a natural language queries to specify their intent, while the accuracy of traditional IVR systems is maintained by using key features in language along with the customer's past transactions, CRM attributes, and customer segment attributes to identify customer intent.
US09105267B2	Speech recognition apparatus A speech recognition apparatus includes a first recognition dictionary, a speech input unit, a speech recognition unit, a speech transmission unit, a recognition result receipt unit, and a control unit. The speech recognition unit recognizes a speech based on a first recognition dictionary, and outputs a first recognition result. A server recognizes the speech based on a second recognition dictionary, and outputs a second recognition result. The control unit determines a likelihood level of a selected candidate obtained based on the first recognition result, and accordingly controls an output unit to output at least one of the first recognition result and the second recognition result. When the likelihood level of the selected candidate is equal to or higher than a threshold level, the control unit controls the output unit to output the first recognition result irrespective of whether the second recognition result is received from the server.
US09105265B2	Stereo coding method and apparatus A stereo coding method includes transforming a stereo left channel signal and a stereo right channel signal in a time domain to a frequency domain to form a left channel signal and a right channel signal in the frequency domain; down-mixing the left channel signal and the right channel signal in the frequency domain to generate a monophonic down-mix signal, and transmitting bits obtained after quantization coding is performed on the down-mix signal; extracting spatial parameters of the left channel signal and the right channel signal in the frequency domain; estimating a group delay and a group phase between stereo left and right channels by using the left channel signal and the right channel signal in the frequency domain; and performing quantization coding on the group delay, the group phase and the spatial parameters, so as to obtain a high-quality stereo coding performance at a low bit rate.
US09105259B2	Music information display control method and music information display control apparatus A music information display control apparatus includes one or more processors configured to display, on a display device, a musical note sequence image in which a musical note iconic image of each musical note is disposed in a musical score area where a time axis is set. The display controller disposes an operation iconic image which accepts an instruction from a user in a vicinity of the musical note iconic image, and changes a display length or a display position of the musical note iconic image in a direction of the time axis according to an instruction to move the operation iconic image.
US09105255B2	Discriminative capacitive touch panel A mutual capacitance touch sensor includes a substrate, and an array of electrode elements formed on the substrate. Each electrode element includes at least one of a first electrode group having at least two drive electrodes and at least one sense electrode, or a second electrode group having at least two sense electrodes and at least one drive electrode. The respective electrodes of the first or second group are arranged to form multiple capacitances over different coupling distances. A controller is operatively coupled to the array of electrode elements, the controller configured to assign an input object as a conductive object when measurements of the multiple capacitances decrease as the input object approaches the touch sensor, and assign the input object as non-conductive object when measurements of at least one of the multiple capacitances increase as the input object approaches the touch sensor.
US09105254B2	Liquid crystal display device that suppresses deterioration of image quality A data line driving section (6) outputs a video signal voltage for each pixel to a data line (DL) for each predetermined period in order. In outputting a video signal voltage for a pixel, the data line driving section (6) outputs a gradation signal voltage having a voltage corresponding to a gradation value of the pixel as the video signal voltage during a second part of the predetermined period, and outputs a correction gradation signal voltage different from the gradation signal voltage as the video signal voltage during a first part of the predetermined period. A control section (4) changes a relationship between the correction gradation signal voltage and the gradation signal voltage based on a combination of the gradation value of the pixel and a gradation value of a pixel preceding the pixel.
US09105248B2	Array substrate, display device and method for driving pixels within each pixel region of the array substrate Embodiments of the present disclosure provide an array substrate comprising a plurality of gate lines, a plurality of data lines, and pixel regions each of which is defined by intersecting one gate line and two neighboring data lines among the plurality of gate lines and the plurality of data lines wherein two thin film transistors (TFTs) are formed at the intersections between the gate line and the two neighboring data lines in each pixel region, a first pixel electrode and a second pixel electrode are alternately arranged in each pixel region. A first thin film transistor of the two thin film transistors is coupled to the first pixel electrode, a second thin film transistor of the two thin film transistors is coupled to the second pixel electrode. The two neighboring data lines participating in defining a pixel region comprise a first data line coupling to the first thin film transistor and a second data line coupling to the second thin film transistor. Voltages having the same absolute value and opposite polarities are applied to the first pixel electrode and the second pixel electrode respectively via the first thin film transistor and the second thin film transistor.
US09105247B2	Display device, display device driving method and source driving circuit A display device includes multiple first data lines, multiple second data lines, multiple pixel columns, at least a first charge sharing switch circuit and at least a second charge sharing switch circuit. The second data lines are alternately arranged with the first data lines. Each of the pixel columns includes multiple first pixels and multiple second pixels. The first pixels of each of the pixel columns are coupled to one of the first data lines, and the second pixels of each of the pixel columns are coupled to one of the second data lines. The first charge sharing switch circuit each is electrically coupled to at least a part of the first data lines. The second charge sharing switch circuit each is electrically coupled to at least a part of the second data lines. A display device driving method and a source driving circuit also are provided.
US09105246B2	Computer display driving system An image display system includes an LCD (liquid crystal display) or other display driven by alternating current and driven in an inverted manner by a predetermined driving method on a pixel basis, and an LCD driving device for generating a Frame Rate Control (FRC) pattern which is the same as the pattern utilized by the predetermined driving method. The display is thereby driven so as to allow the display to make an expression in gradations higher (for example, 256 gradations) than gradations (for example, 64 gradations) natively supported by the display.
US09105245B2	Spliced liquid crystal display (SLCD), method for checking the SLCD, and LCD device A spiked liquid crystal display (SLCD) includes a plurality of LCD devices. Each LCD device includes an LCD panel, and a drive circuit controlling a display of the LCD panel. The drive circuit includes an adjusting equipment storing a display parameter, and the display parameters of the adjusting equipments of at least two LCD devices of the plurality of LCD devices are different.
US09105235B2	Methods of driving active display device A method of driving an active display device. The method including recovering a threshold voltage of a switching transistor connected to a pixel. The recovering including applying a negative bias voltage to the switching transistor prior to charging each pixel during a charging period. The negative bias voltage is applied to a drain of the switching transistor.
US09105229B2	Display apparatus having luminance reduction controller A display apparatus comprises: a display unit in which each pixel is formed from a self-luminous element, and a controller that reduces a luminance of a pixel which has not changed for a predetermined period of time or more.
US09105228B2	Organic light emitting diode display device for improving display quality and method for driving organic light emitting diode display panel An organic light emitting diode (OLED) display device and a method for driving an OLED display panel are provided. The method includes the following steps. In a reset period, a plurality of scanning signals received by a plurality of pixels of the OLED display panel is simultaneously enabled, and a plurality of data-voltages received by the pixels are set to a reference-voltage. In a threshold voltage cancelling period, a system-high-voltage received by the pixels and the scanning signals are simultaneously enabled, and the data-voltages are set to the reference-voltage. In a scanning period, the scanning signals are sequentially enabled, and the data-voltages are set according to the corresponded displaying data within a plurality of displaying data.
US09105227B2	Electro-optical device and electronic apparatus A plurality of pixels are arranged at each intersection of a plurality of scanning lines and a plurality of signal lines, and respectively includes a liquid crystal element displaying grayscales according to a grayscale potential of each signal line during the selection of each scanning line. To two pixels which are adjacent to each other in an extending direction of a signal line and correspond to two scanning lines selected by a scanning line driving circuit in each selection period, a signal line driving circuit supplies a grayscale potential according to a grayscale computed as the weighted average of grayscales designated by display data supplied to a display control circuit for each of the two pixels.
US09105226B2	Spatio-temporal error diffusion for imaging devices A method for reducing bit-depth of image data for an imaging device includes receiving an image frame for display to the imaging device. The method additionally includes applying temporal error diffusion for the image frame to produce a plurality of image subframes, wherein temporal errors generated in one subframe of the image frame are passed to a next subframe of the image frame for temporal error diffusion. The method also includes applying spatial error diffusion to remaining temporal errors from the temporal error diffusion of the image frame.
US09105225B2	Display device with modulated gate-on gate-off voltages and driving method thereof A display panel includes a plurality of gate lines and a plurality of pixels disposed thereon, a gate driver which applies a gate signal to the gate lines, and a controller which controls the gate driver, where the controller includes a signal controller which generates a scanning start signal and a gate clock signal comprising a plurality of pulses, where the scanning start signal instructs to start a scanning of the gate signal, and a driving voltage modulator which generates a modulated gate-on voltage and a modulated gate-off voltage based on a basic gate-on voltage and a basic gate-off voltage, where the driving voltage modulator adds an overshoot voltage corresponding to a rising edge of a pulse of the gate clock signal to the basic gate-on voltage or adds an undershoot voltage corresponding to a falling edge of the pulse of the gate clock signal to the basic gate-off voltage.
US09105223B2	Display device and display method Provided is a display device and a display method for the display device with which a three-dimensional stereoscopic image with reduced crosstalk and a two-dimensional planar image with high brightness can be displayed. In a display device that is capable of displaying an stereoscopic image by displaying an image for the right eye and an image for the left eye, pixel lines for the right eye for displaying the image for the right eye and pixel lines for the right eye for displaying the image for the left eye are alternately arranged in the vertical direction with black pixel lines for displaying a black image therebetween.
US09105221B2	Multimedia interaction system and related computer program product capable of blocking multimedia interaction commands that against interactive rules A multimedia interaction system is disclosed, including: a plurality of member electronic devices; a plurality of displays respectively arranged on the member electronic devices; a forwarding electronic device configured as a command transmission intermedium between the member electronic devices; and a location detection circuit configured to operably detect respective member electronic device's spatial position and orientation dynamically and to transmit detection results to at least one of the member electronic devices. When an user instructs a source electronic device of the member electronic devices to transmit a target image object toward a target direct, the forwarding electronic device transmits a target command corresponding to the target image object to a candidate electronic device of the member electronic devices to perform corresponding multimedia interaction operations only if a relative position between the candidate electronic and the target direct satisfies a predetermined condition.
US09105218B2	Display device capable of controlling external light and method for controlling external light A display device capable of controlling an external light and a control method are provided. Image display of the display device and the external light are synchronously controlled through a synchronization signal generated by a control module in the display device. The control module generates a first and a second light source control signal during first cycles and second cycles of the synchronization signal. The first and the second light source control signal are used to control the external light to operate at a first operation state and at a second operation state respectively. Through the techniques of controlling the external light by the display device, i.e. turning off or reducing illumination intensity of the external light every other specific period, both influence of the external light on contrast ratio and light reflection from the display device are reduced. Power of the external light is also saved.
US09105215B2	Image signal supply apparatus, image display apparatus, and control method of image signal supply apparatus An image signal supply apparatus which is connected to an image display apparatus including an input source switching unit and outputs an image signal as an input source to the image display apparatus, includes: a communication unit carrying out communication with the image display apparatus; and a switching instruction output unit outputting an instruction signal instructing to switch the input source to the image display apparatus via the communication unit.
US09105212B2	Method for gradually adjusting screen brightness when switching operating system A method for gradually adjusting screen brightness when switching an operating system is provided. The method is used for gradually adjusting the brightness of a screen of an electronic device by a controller thereof when the electronic device is switched from to first operating system to a second operating system. First, an operating system switching signal is received. Then, a first brightness value of the first operating system is obtained. The screen brightness is gradually adjusted from the first brightness value to a predetermined second brightness value. Afterwards, the first operating system is switched to the second operating system, and the screen brightness is further adjusted from the second brightness value back to the first brightness value. Accordingly, a user can sense the switching of the operating system more intuitively and has enough time to get used to the change of the screen brightness and the displayed frame.
US09105209B2	Display device In a liquid crystal display device, a data signal generation unit generates a data signal for controlling the orientation of liquid crystal. A plurality of transistors supply the data signal output from a source IC unit to a plurality of data signal lines of a liquid crystal display panel in a time sharing manner. A gate signal line controls each of the plurality of transistors. A fluctuation suppression unit is connected to the gate signal line that controls any one of the plurality of transistors, and suppresses, in accordance with a gate signal of the connected gate signal line, a voltage fluctuation in the data signal which occurs when another transistor changes from the ON state to the OFF state.
US09105199B2	Device for simulating an alternator, method of controlling such a device and simulation system comprising such a device A device (10) for simulating an alternator is connected to an alternator control circuit (20) and supplies a voltage on an electrical network (30). This device comprises: a circuit for receiving an excitation current (Iexc) generated by the control circuit (20); a switch (15) able to apply voltage to the network (30) and controlled on the basis of the excitation current (Iexc). A method of controlling such a device and a simulation system comprising such a device also are described.
US09105198B2	Visual and tactile display The present invention relates to a device, system and apparatus for a visual and tactile display and in particular, to a tactile and visual display device system capable of displaying both alphanumeric and Braille characters in a manner suitable for individuals that are visually impaired, blind or having normal range vision.
US09105191B2	Group monitoring and collision avoidance system and method which is mounted on a vehicle A group or solo monitoring system and method for collision avoidance that uses a transceiver circuitry mounted on a vehicle. The circuitry can include a microprocessor, a memory having stored therein non-transitory instructions for programming the microprocessor, a visual indicator, an audio indicator, a user interface including a display screen and navigation buttons, an RF transceiver with antenna, and a power supply. Non-transitory instructions stored in memory configure and control the microprocessor to enable a user to enter data into the memory via the user interface via the display screen and navigation buttons. A vehicle group can be formed and a proximity perimeter created about the group. Visual and audio alerts are issued to avoid a collision in the event that a non-group vehicle has been detected as having penetrated the proximity perimeter and is closing in on at least one vehicle of the group.
US09105188B2	Controlling vehicular traffic on a one-way roadway A method controls vehicular traffic on a one-way roadway. A hardware sensor detects vehicular traffic on a roadway. A hardware traffic control device determines whether the vehicular traffic on the roadway has been moving exclusively in a first direction during a preceding period of time, such that the roadway is a one-way roadway on which current vehicular traffic is authorized to travel only in the first direction. The hardware sensor detects an errant vehicle that is traveling on the one-way roadway in a second direction that is opposite the first direction. In response to determining that the errant vehicle is traveling in the second direction on the one-way roadway, a warning signal is transmitted to vehicles, other than the errant vehicle, on the one-way roadway.
US09105187B2	Method and apparatus for providing information about the source of a sound via an audio device A method and apparatus for providing information about the source of a sound via an audio device is described. An ambient sound is detected (200) and specific sounds are identified in the detected ambient sound (202). Information about the source of the identified specific sounds is determined (204). An operational control characteristic of a generated audio stream rendered by an audio device is changed (206) and information about the source is provided to the audio device upon detection of said identified specific sounds (208).
US09105185B2	Managing traffic flow A method for tracking and routing traffic to avoid congestion via a plurality of user devices including providing a traffic reservation user interface for receiving a plurality of path selections from the plurality of user devices; responsive to predicting a traffic congestion from the plurality of user devices taking into account real-time and predicted conditions, presenting a first set of users with a first set of route selection recommendations via the user interface; and responsive to receiving a plurality of actual routing selections from the first set of users from the user interface, adjusting the traffic prediction, and presenting a second set of users with a second set of route selection recommendations via the user interface to reduce expected traffic congestion.
US09105184B2	Systems and methods for real-time data communications and messaging with operators of small unmanned aircraft systems (sUAS) A system and method are provided to support safe integration of small unmanned aircraft systems (sUASs) into the National Airspace Structure in the United States. Substantially real-time data communication provides interested parties with an ability to communicate directly with an operator of the sUAS during system operations. Individual interactive user interfaces are used to implement two way text-like messaging directly with the sUAS control console to enhance safety and reduce conflicts with operations of the sUAS. When an instance arises in which an air traffic controller needs to advise an sUAS operator regarding an unauthorized sUAS mission or a requirement to keep an sUAS clear of a specific block of airspace or specific geographic location due to an immediate, emergent and/or unforeseen event, a means is provided by which to more effectively and more quickly communicate directly with the sUAS operator.
US09105180B2	Touch-sensitive wireless device and on screen display for remotely controlling a system A touch-sensitive wireless device, such as a wireless telephone or wireless multimedia player, in conjunction with an interactive on screen display, effectively remotely controls a programmable multimedia controller or other system. User gestures, button presses or other touches to or movements of the touch-sensitive wireless device are effectively converted to information that is wirelessly transmitted to the programmable multimedia controller. Once received by the programmable multimedia controller, such information is processed and effectively translated so as to control the operation of the controller.
US09105179B2	Communication method in a home-automation installation The communication method applies to a home-automation installation comprising at least one sending element, a self-powered receiving element and an element for substituting for the receiving element. The method is such that, when the receiving element is in a sleep mode, the substitution element receives and records information sent by the sending element for the attention of the receiving element and such that, when the receiving element is no longer in sleep mode, the substitution element sends the information for the attention of the receiving element.
US09105176B2	Search device, electronic system and operation method This disclosure provides a search device, a person loss prevention system and an operation method. The person loss prevention system comprises an electronic device and the search device. The search device includes a receiver and a transmitter electrically connected with the electronic device. The person loss prevention system instructs the transmitter to transmit a predetermined signal to the receiver by the operation method. After the receiver receives the predetermined signal, the receiver sends a feedback signal to the electronic device. The electronic device adjusts a waveform of a sound signal according to the feedback signal and transmits the sound signal to the search device. The search device plays the sound signal through a speaker unit. Thereby, the user of the electronic device immediately determines the position, the distance and the direction of the receiver.
US09105171B2	Critical parameter monitoring system for improving the safety of personnel operating in hazardous areas A critical parameter monitoring system for improving the safety of personnel working in a remotely located hazardous location possibly containing combustible materials include an oxygen and a temperature sensor carried by the personnel. The sensors are connected to a centrally located processor which displays the oxygen level and temperature present at the sensors and issues a warning when the measured parameters exceed preset levels. The monitoring system may be a part of a breathing apparatus which supplies air and voice communications from the centralized location to personnel working in a vessel purged with an inert gas. The measured oxygen level may also be used to conserve the quantity of inert gas used in the purging process while preserving the safety of the workers.
US09105169B2	Alarm system for passageways An improved alarm system for monitoring movement through a passageway defined by opposing sidewalls comprises a lower passage indicator disposed toward the lower ends of the sidewalls, an upper passage indicator disposed toward the upper ends of the sidewalls and a control mechanism configured to sound an alarm if one of the passage indicators indicates passage through the passageway and the other passage indicator does not. In a preferred embodiment, the alarm system is configured as a pool alarm and each passage indicator comprises an emitter/receiver that emits an infrared beam toward an opposing reflector to provide a lower beam and an upper beam. If only the lower beam is interrupted, indicating a child passing through the passageway, the control mechanism will generate an alarm signal. If both beams are interrupted, indicating an adult passing through the passageway, the control mechanism will not generate the alarm signal.
US09105168B2	Method and apparatus for securing related products This invention relates to a tether device for use in a retail environment in conjunction with a cable lock security device. The cable lock device includes a cable having a free end which extends outwardly away therefrom after the cable lock is secured onto an article of goods. The tether is configured to receive the free end inside a lock channel alternatively lock and unlock this free end with the tether. The tether is intended to be secured onto a separable portion of an article of goods, while the cable lock is intended to be secured onto another separable portion. Thus, in locking the cable lock and the tether together, the two separable portions of the article of goods are thereby rendered generally inseparable.
US09105166B1	Adjustable anti-theft bracket for displaying electronic gadgets An anti-theft bracket for interactively displaying electronic gadgets. An electronic sensor is attached to the back of the gadget. An annular base surmounts the sensor. A circumferential channel is disposed on a lateral surface of the annular base. At least one arm is slidingly received within the circumferential channel, whereby the arm can move radially about the annular base. A clamp is in sliding communication with the arm forming an arm-clamp assembly. The overall length of the assembly is adjustable by sliding the clamp along the arm. A clamping member is attached to the clamp. A corner of the gadget is received within the space between the clamping member and the clamp, thereby securing the gadget within anti-theft device. The distance between the clamping member and the clamp may be adjustable to accommodate the thickness of the gadget.
US09105164B2	Remote control having indicia and a locator bump A remote control includes a plurality of actuators and plurality of similarly-shaped icons for indicating the function of actuators. At least one of the actuators includes a locator bump that is positioned inside the icon on the actuator and extends above the surface of the actuator to provide tactile feedback to assist a user's finger in locating the actuator (for example, to turn on a lighting load when the control device is being operated in the dark space). The icon that has the locator bump inside of it is bigger than the second icon, such that the icons appear to be the same size to the human eye. In addition, the line weight of the first icon may be smaller than the line weight of the second icon, and there may be a gap between the first icon and the locator bump. For example, the first and second icons may be triangularly shaped or circularly shaped.
US09105162B2	Electronic gaming device with scrape away feature Examples disclosed herein relate to systems and methods, which may receive wagers. The systems and methods may include scrape away functionality. The system, device, and/or method may include a plurality of reels with one or more paylines formed on at least a portion of the plurality of reels. The system, device, and/or method may include a memory which may include a plurality of scrape away structures. The system, device, and/or method may include a processor which may generate one or more areas where each area may cover one or more symbols. Further, the processor may remove the one or more areas to reveal one or more covered symbols based on a selected tool and a selected area.
US09105161B2	Gaming system, gaming device, and method for providing a poker game with a bonus gaming session having re-draw option A gaming system provides a bonus gaming session that is activated during a play of a five-card draw poker base game when a predetermined plurality of the first set of five cards dealt meets a predetermined criteria, for example at least four of the five cards dealt and held by the player share a common suit. When activated, the gaming system repeats plays of the game in the bonus gaming session until a winning draw poker outcome has been generated. In the bonus gaming session, the card that is not co-suited with the plurality of the held first set of cards is discarded and randomly replaced until a winning five-card hand is generated, upon which the gaming device provides an award. The gaming system provides a correspondingly larger award for a winning flush hand for each additional re-drawn fifth card required to achieve a winning five-card flush hand.
US09105159B2	Multi-player bingo game with multiple cards per player The invention is directed to methods and gaming units for conducting a multi-player wagering game in which at least one of the players may win the occurrence of the wagering game by matching a game-winning pattern of game indicia on one or more game arrays having unique combinations of game indicia based on matching the game indicia on the game arrays to game indicia randomly selected for the occurrence of the wagering game. Each player matching a game-winning pattern may receive game-winning award, and may receive a game-winning award for each game array on which a game-winning pattern is matched. The method and gaming unit may further include an alternate outcome display wherein an outcome of a second wagering game may be displayed that corresponds to the outcome for the player on the one or more game arrays for the occurrence of the multi-player wagering game.
US09105158B2	Electronic video poker games A video poker machine configured to allow a player to play a card game includes at least one display device, at least one input device, and at least one computer configured to display at least a first hand and a second hand of at least five cards all face up, each hand including the same five cards. A player is provided an option to play a hand by selecting none, one or more than one of the face up cards from the first hand and the second hand and any additional hands as cards to be held. Each of the cards not selected to be held are discarded from each hand and replaced with a face up card. The player is provided a pre-established amount based on the amount of a wager made on the hand if the resulting cards of the hand comprise a predetermined poker hand ranking.
US09105157B2	Gaming system and method of gaming A gaming machine is provided that provides games in which a plurality of symbols are selected from a group of symbols and displayed on a display and, if a winning combination occurs, the gaming machine awards an award. The gaming machine comprises a user interface in communication with a game controller. The game controller is configured to provide a first game in which an event counter is maintained by the game controller and modified by the game controller each time a counter event occurs, and to provide a second game in which the game controller modifies the group of symbols to include a number of specific symbols. The number of specific symbols is dependent on the value of the event counter.
US09105155B1	Promotional gaming events and awards Wagering games include promotional events and promotional awards, such as the award of free or reduced cost goods and services. Promotional awards may be reward by the receipt of property logo symbols during game play. Promotional awards rewarded at one casino may be redeemable only at a second casino. Promotional awards may be rewarded based upon game play metrics of identified or anonymous players.
US09105151B2	Multigame selection A gaming system comprises a gaming server, a plurality of gaming machines, and a communications system connecting each of the plurality of gaming machines to the gaming server. The gaming machines each have a display, player controls, a player tracking device, and a game processor which displays sequential game images of a game being played. Each game processor plays a game initiated by the player, where the game is one of a plurality of games available on the gaming machine and selectable by the player. Each gaming machine includes game selection means which displays a selection of games available on the machine for the player to play. The games offered for selection are ordered according to a ranking determined as a function of the player's past history of playing games and a history of games played by other players.
US09105149B2	Reel for gaming machine and gaming machine including the same A cylindrical reel for a slot machine, which includes a plurality of symbols having different patterns is provided. A reel according to an embodiment includes: a reel frame configured to receive rotational force from a rotational axis of a motor; a reel stripe disposed on an entire circumference of the reel frame and having a front surface including a group of the symbols thereon; a symbol piece including: a first surface having a flange shape; and a second surface protruding from the first surface and including one of the plurality of symbols thereon, wherein the reel stripe has at a least one opening exposing the second surface of the symbol piece, and the first surface of the symbol piece is attached to a rear surface of the reel stripe.
US09105148B2	System gaming A method of operating a gaming system is disclosed. The method includes: enabling, using one or more processors, play of a first game on a gaming machine; enabling, using one or more processors, play of a second game on a user interface that is operatively coupled to the gaming machine, wherein the gaming system enables a player to choose which bonus game to play out of a plurality of bonus games independent of player ranking and bonus level, wherein each of the plurality of bonus games may be initiated on demand, wherein once the player chooses the bonus game to play on demand, the chosen bonus game is presented to the player via the player tracking user interface; and enabling, using one or more processors, wherein the gaming system enables a player to activate the second game displayed on the user interface.
US09105147B2	Gaming system having large display and plural gaming machines The gaming system of the present invention comprises: a plurality of gaming machines; a control device; a single pedestal having an installation surface for installing the gaming machines, and having a hollow space communicated with external air; a supporting member provided such that a first end thereof is supported by the pedestal and the second end thereof is oriented upwardly; a common image display being supported by the second end side of the supporting member, and communication cables for communication between the plurality of gaming machines and the control device.
US09105144B2	Multiple-sided vending machine A vending machine has a housing with a first side and a second side opposite the first side. A first dispensing slot is located at the first side of the housing, and a second dispensing slot is located at the second side of the housing. A central product storage stores product to be dispensed from the vending machine. A product delivery system selectively delivers product from said product storage to the first dispensing slot and said second dispensing slot.
US09105140B2	Coin hopper Coins in a storing chamber are stirred and dropped into through holes by the rotation of a sorting board, become a surface contact state on a coin holding plate, and are held in coin holding space. The coin in the coin holding space is rotated together with the rotation of the sorting board. At a specified phase, the coin is pushed out to a circumferential-direction passage, which is continued to the coin holding space and extending in the circumferential direction of the sorting board, by a pusher, which moves to the coin holding space. The coin is pushed against a coin receiver, which is arranged to be adjacent to the sorting board, by a pusher constituting an end part of the circumferential-direction passage. In this state, pushing is switched to that by a rotating pushing piece, and the coin is finally fed out by the pushing piece.
US09105139B2	System and method for reporting election results A system for reporting election results from a plurality of ballot tabulation devices to a central server is provided. Each ballot tabulation device is operable to generate a machine-readable code that encodes the election results for the ballot tabulation device and present the machine-readable code by either displaying the machine-readable code on a display screen or printing the machine-readable code on a printable medium. The system also includes a plurality of reading devices each of which is used to read the machine-readable code presented by the ballot tabulation device and transmit the election results for the ballot tabulation device to the central server.
US09105138B2	Vehicle behavior data storage control system and electronic control unit A vehicle behavior data storage control system including a storage control device and an ECU is disclosed. Upon determining occurrence of an unexpected behavior, the storage control device stores an unexpected behavior data in a memory and transmits the unexpected behavior data. The ECU determines whether or not the unexpected behavior data matches an estimated behavior data indicative of a behavior estimated to occur due to control processing of the ECU. When both data match each other, the ECU transmits the matching information. The storage control device, upon receipt of the matching information, deletes or permits overwriting the unexpected behavior data stored in the memory.
US09105136B2	Display controller, display control method and computer-readable medium To improve the visibility of a sequence of a plurality of images corresponding to a sequence of a plurality of pieces of information. According to the contents of a scroll operation, a display controller (1) displays to move each of a sequence of a plurality of card images (81 to 87) along a first direction and displays to move back and forth along a second direction. Furthermore, the display controller (1) determines a superimposing order for displaying each of a sequence of a plurality of the card images (81 to 87) according to a displacement of a display position of each of the sequence of the plurality of card images (81 to 87) in the second direction, and displays on a display unit (17) each of the sequence of a plurality of card images to be superimposed in accordance with the order.
US09105120B2	Display system of electronic manual A display system of electronic manual which allows easy identification of wirings. The display system of electronic manual is provided with a storage device in which stored is an electronic manual provided with a wiring diagram described in a vector image description language and constituted so as to allow reading by a browser program. In response to user's selection of a component on the wiring diagram displayed on a display, a wiring display system highlights the selected component. In response to user's operation of selecting the highlight, the wiring display system highlights wirings extending from the selected component. Moreover, while the wiring is highlighted, in response to user's operation of selecting gray display, the wiring display system switches the elements other than the selected component and the wirings extending from the component on the wiring diagram displayed on the display to be displayed in weak gray.
US09105119B2	Anonymization of facial expressions A method facilitates training of an automatic facial expression recognition system through distributed anonymization of facial images, thereby allowing people to submit their own facial images without divulging their identities. Original facial images are accessed and perturbed to generate synthesized facial images. Personal identities contained in the original facial images are no longer discernable from the synthesized facial images. At the same time, each synthesized facial image preserves at least part of the emotional expression contained in the corresponding original facial image.
US09105118B2	Galaxy views for visualizing large numbers of nodes A system and method for illustrating data. An example method includes organizing the data into objects; assigning a transparency value to each object; and graphically depicting the data by distributing nodes representing the objects in a region of a visualization in accordance with a distribution method or function. Each node is displayed as partially transparent in accordance with the transparency value. In a more specific embodiment, the visualization includes a galaxy visualization with nodes that are randomly or pseudo randomly distributed about a center point or region of the visualization.
US09105115B2	Display systems and methods for displaying enhanced vision and synthetic images A vehicle display system displays enhanced vision (EV) and captured images, for example synthetic vision (SV) images, to an operator of a vehicle. The display system includes an EV vision system for generating EV images, an SV database containing information regarding terrain and objects of interest for a travel path of a vehicle, an SV system for generating SV images based on travel of the vehicle and information from the SV database, a processor for filtering the EV images and merging the filtered EV image with the SV image, and a display for displaying the merged SV and filtered EV images.
US09105110B2	Method of simulating an imaging effect on a digital image using a computing device A method of digitally simulating an imaging effect on a base digital image being displayed by a computing device, which is representative of a print or document including the image effect, is provided. In one aspect, the imaging effect is displayed in association with the base digital image as a function of the position of the display of the computing device relative to a first or normalized position of the display. In another aspect, the imaging effect is displayed in association with the base digital image as a function of the position of an object being captured by a camera of the computing device. In both instances, the imaging effect becomes more visible as the display of the device moves further from its first position, or the object captured by the camera moves from its original position.
US09105109B2	Method for superpixel life cycle management A method and an apparatus for life cycle management for superpixels associated to frames of a sequence of frames are described. An area occupied by a superpixel in a frame of the sequence of frames is monitored. In case the area of the superpixel becomes smaller than a specified first value, the superpixel is terminated in the later frame. In case the area of the superpixel becomes larger than a specified second value, the superpixel is split in the later frame.
US09105101B2	Image tracking device and image tracking method thereof An image tracking device and an image tracking method thereof are provided. The image tracking device includes an image capture interface, a storage means, and a processor means. The storage means has a multi-dimensional storage space for storing a plurality of first images, each dimension of the multi-dimensional storage space being corresponding to a feature-related variance of a multi-dimensional variance. The processor means is configured to execute the following operations: marking a second image in the picture frame; calculating a multi-dimensional variance between the second image and each of the first images separately; determining whether the second image contains the object according to the multi-dimensional variance calculated; and if the second image is determined as one containing the object, storing the second image as one of the first images, in a specific subspace of the multi-dimensional storage space according to the multi-dimensional variance calculated.
US09105100B2	Motion estimation device and motion estimation method A motion estimation method includes grouping row blocks of a first frame into a first plurality of banks and grouping row blocks of a second frame into a corresponding second plurality of banks, respectively; calculating the normalized cross correlation (NCC) or the sum of absolute difference (SAD) between the banks of the first frame and the banks of the second frame; detecting the local maxima from the NCC or the local minima from the SAD; estimating a first relative displacement between corresponding reference row blocks of the first frame and of the second frame; calculating motion coefficients using first relative displacements; and estimating second relative displacements using the motion coefficients.
US09105096B2	Scribble segmentation method and apparatus An apparatus and method of segmenting an image using scribble segmentation is provided. An image is segmented by constraining the membership value of a subset of image elements, solving a weighted biharmonic equation subject to the constrained membership values wherein the weights are determined from similarities between image elements, and determining the final segmentation based on the membership value of each image element. An image may also be segmented by constraining a membership value of a subset of image elements, determining the unknown membership values given the constraints by solving a linear equation system using a multigrid technique, and updating a coarser level of the multigrid hierarchy to account for additional constraints using patch matrices.
US09105094B2	Image layers navigation In embodiments of image layers navigation, a canvas interface displays image segments of an image in different layers of the image. An image layers application is implemented to receive a position input of a canvas viewer control that encompasses one or more of the image segments of the image, and then determine the layers of the image that correspond to the image segments encompassed by the canvas viewer control. The position input of the canvas viewer control is effective to select the layers of the image that correspond to the one or more image segments encompassed by the canvas viewer control. Thumbnail images are then displayed that each represent one of the layers encompassed by the canvas viewer control, where each of the layers represented by a thumbnail image are displayed to include the image segments associated with a respective layer of the image.
US09105085B2	Methods and apparatus for aligning sets of medical imaging data In a method and apparatus for aligning two sets of medical imaging data, first and second sets of image data are obtained respectively, using first and second different medical imaging modalities, of an anatomical feature of a subject. For each set, an axis of the anatomical feature and a landmark point for the anatomical feature is determined, and the first and second sets are aligned by comparing the respective axes and landmark points.
US09105084B2	Hazard detection for asset management An approach that detects locations of hazardous conditions within an infrastructure is provided. This approach uses satellite imagery, GIS data, automatic image processing, and predictive modeling to determine the location of the hazards automatically, thus optimizing infrastructure management. Specifically, a hazard detection tool provides this capability. The hazard detection tool comprises a detection component configured to: receive visual media containing asset location data about a set of physical assets, and hazard location data about potential hazards within a vicinity of each of the set of physical assets. The detection component further receives graphical information system (GIS) data containing asset location data about each of the set of physical assets. The hazard detection tool further comprises an analysis component configured to: analyze the visual media to determine if a hazardous condition exists for each of the set of physical assets; and apply the GIS data to the visual media to determine a location of hazardous conditions within the infrastructure.
US09105082B2	Filtering apparatus and method for high precision restoration of depth image A high speed filtering apparatus and a method for high precision restoration of a depth image are provided. The high speed filtering apparatus for high precision restoration of the depth image may include a block setting unit to set a first block including a target pixel, and to set a second block with respect to a central pixel distributed around the target pixel based on a size of the first block, a weight determining unit to determine a pixel weight with respect to each pixel in the second block, and to determine a block weight with respect to the second block by applying the pixel weight, and a processor to filter the target pixel based on the block weight, thereby accurately filtering the target pixel.
US09105080B2	Method and a system for calibrating an image capture device A system (1) for calibrating an image capture device (2) mounted on a motor vehicle for offset from an ideal position and an ideal angular orientation while the vehicle is moving comprises selecting an image (12) in a captured image frame (10) of a stationary object relative to the motor vehicle, which is capable of being tracked through a plurality of successively captured image frames (14a,14d), predicting the locations at which the target image (12b) should appear in the respective successively captured image frames (14a,14d), comparing the actual location of the target image (12a) in the respective successively captured image frames (14a,14d) with the respective predicted locations (12b) and determining calibration values for the camera (2) from the results of the comparison, in the event that the actual (12a) and predicted locations (12b) of the target image in the respective image frames (14a,14d) do not coincide.
US09105076B2	Image processing apparatus, image processing method, and program The present technology relates to an image processing apparatus, an image processing method, and a program capable of improving the image quality of decoded images of images from multiple viewpoints. A warping unit 461 warps a picture of an image of a viewpoint #1 between the image of the viewpoint #1 and an image of a viewpoint #2 different of the viewpoint #1 to generate a picture of a warped image obtained by converting the picture of the image of the viewpoint #1 into an image obtainable in the viewpoint #2. A disparity prediction unit 463 acquires, from header information, a reference index indicating a reference picture that is referred to generate a predicted image of an object block to be decoded of a picture of the image of the viewpoint #2, and selects the reference picture from among reference picture candidates including at least the picture of the warped image based on the reference index. The present technology is applicable, for example, to coding and decoding of images from multiple viewpoints.
US09105072B2	Method and apparatus for automated multi-user multi-duration access to emergency medical records This invention is designed to offer ready access to an athlete's contact and health information for emergency responders at sporting events while providing improved security constraints to preserve the confidentiality of the athlete's information. The system offers new flexibility in the types of data fields that are collected, the duration of data availability, as well as to whom the data access privileges are granted.
US09105069B2	User characteristics-based sponsored company postings A system may include a network interface, a user interface, and a recommendation engine. The user interface may be configured to receive a company characteristic of a company profile of a company posted to the social network and a company bid from an entity related to company to the social network. The recommendation engine may be configured to determine an aggregate company score for the user based on a relevance of the company characteristic to a user characteristic and the company bid. The network interface may be configured to transmit a message related to the company to the user based, at least in part, on the aggregate company score.
US09105065B2	Systems and methods for providing a benefit product with periodic guaranteed income A computer implemented method and system that implements a benefit product that provides a guaranteed income amount for a participant, the benefit product generates the guaranteed income amount by participating in a plurality of guaranteed income products (GI products). The system may comprise: (1) an income aggregator portion; (2) a savings recordkeeper portion that maintains an investment account associated with the benefit product, the investment account into which the payments to the benefit product pass; and (3) at least one income recordkeeper portion, each income recordkeeper portion administering one or more GI products, each income recordkeeper portion: determining, based on an attributable allocation to a particular GI product, a guaranteed income associated with such particular GI product, each guaranteed income being an amount, attributable to the particular GI product, that is payable to a participant. The income aggregator performs allocation processing, the allocation processing being performed based on funds transfer data, the funds transfer data including (1) first funds transfer data that reflects activity of the investment account and benefit product associated therewith, and (2) second funds transfer data that reflects activity of a respective GI product.
US09105062B2	Transaction effects A method comprising creating and storing, in computer memory, a financial graph having nodes and edges, wherein the nodes include first nodes representing assets and second nodes representing any one or more of accounts in which one or more of the assets are held, individuals who own one or more of the assets, or legal entities who own one or more of the assets; obtaining, from an asset custodian data source, asset transaction data associated with one or more of the assets represented by the first nodes of the financial graph; transforming the asset transaction data into one or more stored transaction objects, wherein each transaction object is associated with a plurality of transaction effect objects; wherein each of the plurality of transaction effect objects is associated with a particular edge in the financial graph and represents one of a credit to an account type associated with the particular edge and a debit from an account type associated with the particular edge.
US09105061B2	Online marketplace for real estate transactions Under an embodiment of the invention, a web site system maintains a real estate web page. The web page has an aerial image map of a geographic region that can be navigated by a user. The web site system facilitates online collaboration for real estate transactions. When the user registers, the system creates a user account for real estate information. Real estate agents and/or other real estate service providers selected by the user are granted shared access to the user's account by the web site system.
US09105060B2	System and method for collecting and accessing product information in a database A database system is disclosed. The database system includes a matching module configured to query a database for users which have data matching an interest of another user and to selectively grant to one or more of the users access to data of the other user based at least in part on a result of the query and on an access control list.
US09105059B2	Electronic commerce system utilizing custom merchant calculations A customer interacts with merchants to identify items to purchase, and the merchants provide virtual shopping carts identifying the items to a broker. The cart requests that the broker utilize custom merchant calculations for the transaction, such as for determining shipping costs. The customer interacts with the broker to identify customer information, such as a shipping address, and to purchase the items. The broker sends the customer information to the merchant and requests that the merchant perform the custom calculations. If the merchant provides a valid response to the request, the broker uses the merchant calculations to calculate the total price for the transaction. If the merchant provides an invalid response, the broker utilizes backup calculations specified in the cart to calculate the price.
US09105058B2	Receipt data processing device and method for processing receipt data According to one embodiment, a receipt data processing device includes a data generating section, an output section, and a converting section. The data generating section is configured to generate receipt data of a first data format including information about an item purchased by a customer. The output section is configured to output the receipt data to at least one of a printing device and an external device that is different from the printing device. The converting section is configured to convert a data format of the receipt data from the first data format to a second data format that is different from the first data format when the receipt data is output to the external device.
US09105055B2	Method and system for automated online allocation of donations In one example, we describe methods and systems for automated online merchant charity donations. In one embodiment, a donation agent interacting with a merchant website can offer an online user an option to allocate at least a portion of a payment for or price of a purchase, associated with a transaction made by the user via the merchant website, to be donated by a merchant corresponding to the merchant website on behalf of the user to a charity of the user's choosing. If the online user exercises the option, the donation agent can calculate an amount of the donation to be made and store the calculated donation amount in a database. The donation agent can disburse the calculated donation amount to the charity selected by the customer. The method also works for the off-line model. The system and method include authentication and the way the charity funding is distributed, with respect to multiple preference lists and forbidden lists.
US09105052B2	Advertisement based on application-created social content In one embodiment, a social-networking system accesses a social graph, identifies a first set of concept nodes associated with an application, connected to friends of a user, selects a second set of concept nodes from the first set of concept nodes based on edges connected to the concept nodes, and generates an advertisement for the application, where the advertisement includes information representing the concept nodes in the second set of concept nodes.
US09105051B2	Car location Methods and systems for a complete vehicle ecosystem are provided. Specifically, systems that when taken alone, or together, provide an individual or group of individuals with an intuitive and comfortable vehicular environment. The present disclosure builds on integrating existing technology with new devices, methods, and systems to provide a complete vehicle ecosystem.
US09105045B1	System, method, and computer program product for altering an experience of a user, based on information associated with a party to a communication associated with the user A system, method, and computer program product are provided for altering an experience of a user, based on information associated with a party to a communication associated with the user. In use, a communication associated with a user is identified. Additionally, at least one other party to the communication is identified. Further, information associated with the at least one other party is collected. Further still, an experience of the user is altered, based on the information.
US09105040B2	System and method for publishing advertising on distributed media delivery systems A system for publishing advertising media on a plurality of media delivery systems, each configured to render media and gather environmental data while rendering the media. The system includes a front-end system in communication with the plurality of media delivery systems. The front-end system is configured to permit an advertiser to select at least one of the plurality of media delivery systems on which to render advertising media and is further configured to accept advertising media uploaded by the advertiser. The system further includes a back-end system in communication with the front-end system and the plurality of media delivery systems. The back-end system is configured to upload the advertising media to the selected media delivery systems for rendering and is further configured to upload the environmental data from the plurality of media delivery systems.
US09105028B2	Monitoring clickstream behavior of viewers of online advertisements and search results An aspect of the present invention relates to tracking and analyzing a computer user's behavior after viewing a particular search result or a particular advertisement to assess the impact of having viewed the search result or advertisement.
US09105022B1	Methods and systems for providing a best price guarantee A financial institution can provide a best price guarantee to debit or credit card account holders. By providing a consolidated system including automatic price monitoring of purchased products and automatic claim form generation upon identifying a lower price, the consumer is relieved of the burden typically associated with conventional price matching. An exemplary method comprises receiving, by a server, purchase information from a financial customer, wherein the purchase information comprises a purchase price and purchased product description and wherein the customer has a credit or debit card issued by the financial institution; storing, by the server, the purchase information in a first database; locating, by the server, from a second database, stored product information corresponding to the received purchased product description, wherein the stored product information comprises a lowest price datum; comparing, by the server, the lowest price datum to the purchase price; and, if the lowest price datum is less than the purchase price, generating a claim form for the financial customer.
US09105021B2	Systems, methods, and computer program products for using proxy accounts An electronic device including an input/output interface operable to receive an input from a user and communicate an output to the user, a transceiver operable to electronically communicate with a computer network, a computer processor operable to execute instructions, and a memory storage operable to store the instructions, the memory storage further comprising a program module that is operable to: receive credentials for a proxy payment account, where the proxy payment account is linked to a primary payment account and not linked directly to a method of payment underlying the primary payment account, and make payment at a Point of Sale (POS) using the received credentials.
US09105020B2	Transaction device and processing system According to some embodiments, a transaction processing system for evaluating transactions between a customer and a merchant comprises a transaction tracker, an account selection engine, and a performance module. The transaction tracker is operable to identify a transaction executed by a customer using a transaction device, the transaction device being operable to execute a transaction with a point of sale receiver associated with the merchant by providing an account number for a first account of the plurality of accounts. The account selection engine is operable to receive information identifying at least one characteristic of the transaction and select a recommended account based on the at least one characteristic. The performance module is operable to compare the first account with the recommended account to determine whether the customer would have received a financial benefit by executing the transaction using the recommended account instead of the first account.
US09105015B2	Scheduling events for multiple invitees Scheduling events with multiple invitees includes: identifying a plurality of invitees for an event in a calendar system having at least one processor; searching an availability associated with each of the invitees to determine a number of periods of availability in the calendar system, at least some of the invitees being available during each period of availability; creating a separate instance of the event in the calendar system for each identified period of availability; and for each invitee available during at least one of the periods of availability, assigning the invitee to one said instance of the event for which that invitee is available with the calendar system.
US09105011B2	Prepopulating application forms using real-time video analysis of identified objects Embodiments of the invention are directed to methods and apparatuses for populating documents based on identification of objects in an augmented reality environment. The method includes capturing a video stream using a mobile computing device; determining, using a computing device processor, the object; identifying a document associated with the object; populating at least a portion of the document; and submitting the document. The method may also include presenting indicators associated with the user, the identified document, or a financial transaction associated with the document. The method may also include providing recommendations or suggestions to the user related to alternative offers associated with the document. Systems and computer program products for populating forms using video analysis of identified objects are also provided.
US09105010B2	Effective sharing of content with a group of users Techniques for sharing user interactions are disclosed. A user can effectively share content with a group of users in as little as one action by using a sharing control associated with the content. The sharing control can be implemented using links or voice activated commands. Other users can specify interest in user particular events and be automatically alerted to the occurrence of the events. The shared content may include many types of content such as news, alerts, messages, tables and/or charts. The sharing control can be displayed as a part of a web page, or in a display of a local application that is not a browser. The local application can be installed on a wireless PDA.
US09105009B2	Email-based automated recovery action in a hosted environment Email-based recovery actions may be provided. A request from a user to perform an action may be received. If the user is determined not to have permission to perform the action, a message may be sent to a second user to approve the requested action. If the second user approves the requested action, the requested action may be performed.
US09105007B2	Collaborative hierarchical document development and review system A computer software product for allowing simultaneous multi-level collaboration, including in real time between an author and a group of reviewers invited by the author to comment on a document stored in a computer file. The computer software enables each reviewer to view the document and make changes thereto which are stored in a secondary data file without modifying the contents of the original document. The author receives and views the secondary data files from the reviewers and selectively incorporates the changes into the document. Each reviewer may invite an unlimited number of sub-reviewers to review the document, the comments of each sub-reviewer similarly being stored in a secondary data file wherein only the author may edit the document directly.
US09104999B2	Outage schedule management apparatus and method in EMS An outage schedule management apparatus and a method are provided, wherein a topology change is executed in response to an outage schedule set up by a user input, and a validity determination is executed to system operation standard to approve an outage.
US09104996B2	Task management for changes to shared artifacts A method of task management for shared artifacts can include detecting a change tag associated with a software artifact and determining, via a processor, each software artifact that is dependent upon the software artifact. A task associated with each dependent software artifact can be generated. Each task can specify a need for a modification to the associated software artifact. A responsible party for each dependent software artifact can be determined. Each task can be automatically assigned to the responsible party for the software artifact associated with the task.
US09104995B1	Subject and audience oriented instant collaborative development Techniques to facilitate software development are disclosed. In various embodiments, an indication is received that a software development project event has occurred. One or more rules are applied to determine one of more of a notification to be sent in response to the event, a recipient to receive the notification, and a communication channel to be used to send the communication. The notification is generated and sent to the recipient via the communication channel.
US09104993B2	Asset management via virtual tunnels An asset management system is presented. The management system includes monitoring devices able to provide asset data across firewalls without requiring reconfiguration of the firewalls. The asset data pass through a forwarding service that instantiates a virtual tunnel comprising a communication channel between the monitoring devices and remote asset management engines. The asset management engines can also be located behind firewalls. As the management engines aggregate asset data, the engines can present one or more alerts via a management interface.
US09104990B2	Article vending machine and method for exchanging an inoperable article for an operable article An article vending machine in a network of article vending machines capable of exchanging an inoperable rental article received from a user for an operable replacement article. The article dispensing machine checks customer identification information against one or more customer rental criteria to determine if the customer is eligible to exchange an inoperable article for an operable one. The article vending machine searches for an identical replacement article within an inventory of the machine itself and within inventories of the networked article vending machines. Alternatively, the article vending machine may provide a refund for the inoperable article.
US09104989B2	Priority and cost based deadlock victim selection via static wait-for graph Systems and methods that enable resolving deadlock cycles by victim selection based on cost and/or priority of strongly connected components in a static wait-for graph. As such, victims can be selected by iteratively estimating total deadlock resolution cost (based on cost of strongly connected components) for remaining deadlock participants, selecting the participant with the least estimated total cost as the next victim, and reducing the wait-for graph after removing the victim vertex. The victim selection algorithm can be a cost-based greedy algorithm, wherein during each victim selection iteration, a single optimal victim is selected based on estimated remaining cost.
US09104985B2	Processing system using metadata for administering a business transaction Administering a business transaction, including: receiving a request for a business transaction, the request containing data to be processed by the business transaction and metadata describing the data and the request; creating, in dependence upon classification rules, the data to be processed by the business transaction, and the metadata describing the data and the request, a business object representing the business transaction; selecting, in dependence upon workflow selection rules and attributes of the business object, one or more workflows to process the data to be processed by the business transaction; processing the data to be processed by the business transaction with the workflows, thereby creating a resultant business object and resultant data; and routing, in dependence upon content routing rules and the attributes of the resultant business object, the resultant data to a destination.
US09104982B2	Prevention of invalid selections based on machine learning of user-specific latency The specification relates to a client device utilizing an unintentional-selection module that disambiguates selection events for temporally proximate content. The client device records time stamps indicating a time a dynamic list is first presented and instances when the dynamic list is updated. An input selection indicating that a suggested search query has been chosen from the dynamic list of search suggestions is received and a time stamp for the input selection is recorded. A determination is made to see if the input selection is an unintentional selection. The input selection is determined as the unintentional selection when a difference between a time stamp for presenting a most recent dynamic list update and the time stamp of the input selection satisfies a user-specific threshold. The user-specific threshold is calculated with a machine learning system using user-specific latency times as training data.
US09104975B2	Memristor apparatus A memristor apparatus comprising a plurality of meta-stable switching elements.
US09104973B2	Elementary network description for neuromorphic systems with plurality of doublets wherein doublet events rules are executed in parallel A simple format is disclosed and referred to as Elementary Network Description (END). The format can fully describe a large-scale neuronal model and embodiments of software or hardware engines to simulate such a model efficiently. The architecture of such neuromorphic engines is optimal for high-performance parallel processing of spiking networks with spike-timing dependent plasticity. Neuronal network and methods for operating neuronal networks comprise a plurality of units, where each unit has a memory and a plurality of doublets, each doublet being connected to a pair of the plurality of units. Execution of unit update rules for the plurality of units is order-independent and execution of doublet event rules for the plurality of doublets is order-independent.
US09104972B1	Classifying documents using multiple classifiers Methods, systems, and apparatus, including computer programs encoded on computer storage media, for classifying resources using scores from multiple classifiers. In general, one aspect of the subject matter described in this specification can be embodied in methods that include the actions of receiving identifying a collection of documents to classify; receiving a plurality of classifiers for scoring a document with respect to a specified property; for each document in the collection, applying each of the plurality of classifiers, each classifier generating a score associated with a likelihood that the document has the specified property, combining the scores from each classifier including applying a multiple classifier model that uses monotonic regression to combine the plurality of classifiers, and classifying the document as having the specified property based on the combined score.
US09104971B1	Automated end-to-end sales process of storage appliances of storage systems using predictive modeling Techniques for generating end-to-end sales leads based on storage capacity forecast using predictive modeling are described herein. According to one embodiment, diagnostic data is received from a data collector that periodically collects the diagnostic data from a storage system having one or more storage units to store data objects. A capacity forecaster coupled to the data collector forecasts a full capacity date using predictive modeling based on the diagnostic data, where the full capacity date estimates a date in which the one or more storage units reach a full storage capacity. A context generator coupled to the capacity forecaster generates a context having information identifying the one or more storage units of the storage system and an operator operating the storage system, wherein the context is used to communicate with the operator for acquiring an additional storage unit to increase storage capacity prior to the full capacity date.
US09104968B2	Identifying categorized misplacement The present disclosure provides methods and devices for identifying category misplacement. In one embodiment, an example device obtains a word frequency of each respective word in a product title under a current category, calculates an overall word frequency of the product title under the current category based on the word frequency of each respective word under the current category, and compares the overall word frequency of the product title with a threshold of the current category to determine an existence of category misplacement. The techniques can accurately identify category misplacement and reduce the probability of missing identifying category misplacement. The techniques also require less system resources and improve calculation efficiency.
US09104964B1	Data estimation of historical data that identifies fine grained time period data and coarse grained time period data and applies correlated slopes to time periods A method is provided for estimating past data by identifying a high frequency data set for a defined time period. A pattern is calculated for the high frequency data set and then the pattern is applied to a low frequency data set in a past time period to estimate a high frequency query point.
US09104962B2	Distributed network architecture for introducing dynamic content into a synthetic environment Embodiments of the invention relate generally to computer-based simulations and synthetic environment generation, and more particularly, to a system, a computer-readable medium, a method and an apparatus for generating synthetic environments in a distributed architecture to, among other things, introduce dynamic content.
US09104954B2	Radiofrequency transponder device with optimized passive resonant circuit The invention relates to a radiofrequency device comprising a passive antenna tuned or intended to be tuned in frequency with at least one transponder, said transponder comprising an integrated circuit chip linked to an antenna interface defining an electromagnetic coupling surface periphery, said passive antenna comprising a main loop formed of turns comprising at least one portion of surface (B) inside the loop, at least one recess of the main loop, oriented from the interior to the exterior of the main loop, said portion of surface (B) being located in said recess so as to effect an electromagnetic coupling with a transponder circuit; the device is distinguished in that it comprises two recesses receiving or intended to receive a transponder each.
US09104953B2	RFID tag antenna with compensation structure, RFID tag and RFID system The invention claims a Radio Frequency Identification (RFID) tag antenna with a compensation structure, an RFID tag and an RFID system. The RFID tag antenna comprises: a dielectric substrate (3); a conductor grounding part (2) which is arranged in the way of covering the whole surface of one main surface of the dielectric substrate (3); a conductor radiation part (4) which is arranged in the way of covering the whole surface of the other main surface of the dielectric substrate (3); a feeding part (5) which is arranged on one end face in the length direction of the dielectric substrate (3) and provided with a first feed line (51) and a second feed line (52), wherein the first feed line (51) and the second feed line (52) are respectively electrically connected with the conductor grounding part (2) and the conductor radiation part (4); and a conductor compensation part (7) which is arranged on at least one of the two side faces in parallel with the length direction of the dielectric substrate (3), wherein the conductor grounding part (2) and the conductor radiation part (4) are electrically connected through the conductor compensation part (7).
US09104952B2	Electromagnetic radiation decoupler An electromagnetic radiation decoupler for decoupling radiation in the wavelength range λmin to λmax. The decoupler has a first conductor layer in contact with a dielectric layer which comprises at least one area of absence and the thickness of the decoupler is less than λmin/4n, where n is the refractive index of the dielectric. The dielectric layer may be sandwiched between two conductor layers, one of which has the structure described above. The invention is also directed to methods of using and various articles comprising such a decoupler.
US09104948B2	System and a method for nano imprinting A method for creating a highly accurate nanostructure is provided, the method includes: (i) creating a highly accurate nanostructure prototype, wherein the highly accurate nanostructure prototype, when illuminated with a predefined illumination, provides a unique optical pattern; (ii) creating at least one highly accurate nanostructure mold from the highly accurate nanostructure prototype, wherein each highly accurate nanostructure mold enables a creation of a highly accurate nanostructure that is substantially similar to the highly accurate nano structure prototype and which, when illuminated with the predefined illumination, provides the unique optical pattern; and (iii) molding the highly accurate nano structure using the highly accurate nano structure mold, wherein the highly accurate nanostructure, when illuminated with the predefined illumination, provides the unique optical pattern.
US09104947B2	Image forming apparatus According to the present invention, an image forming apparatus which performs a printing job and an erasing job is provided. Included is a control unit which, in a case of performing the other job after any one of the printing job and the erasing job, controls a transporting unit of the sheet so that the sheet for the other job is transported to a predetermined standby position from a sheet feeding unit while the one job is performed.
US09104945B2	Method and apparatus for specific image detection Detecting a specific image applicable at a website includes detecting an existence of a frame of the specific image. The specific image applicable at the website is obtained. An edge characteristic value of each pixel of the image is calculated. A pixel whose edge characteristic value is a local maximum value is found along a slope direction of each pixel. When the edge characteristic value of the found pixel is larger than a preset characteristic value threshold, a preset color is used to fill the pixel. The specific image is scanned. An amount of pixels whose color is the preset color at each scanning line of the specific image is counted. When the amount of such pixels at a scanning line is larger than a preset number threshold, a line where the scanning line locates is determined as an edge line of the frame.
US09104942B2	Perceptual bias level estimation for hand-drawn sketches in sketch-photo matching This invention, which relates to retrieving an object from a video or a photo where the object matches a hand-drawn sketch, discloses a method for automatically estimating a perceptual bias level with respect to a feature of the sketch. The method allows estimation based on the sketch alone without involving an extra database. In one embodiment, the method comprises using an expectation-maximization tensor voting (EMTV) method to analyze a statistical distribution of the feature. The statistical distribution is analyzed by forming an objective function having the statistical distribution's information parameterized by the perceptual bias level, and then maximizing the objective function according to a set of iterative update rules. In another embodiment, the method for automatically estimating a perceptual bias level is incorporated into a method for retrieving one or more objects from an image or video database where the one or more objects match a hand-drawn sketch.
US09104939B2	Emergency rescue vehicle video based violation enforcement method and system Disclosed are methods and systems for monitoring and reporting road violations of vehicles sharing roads with responding emergency vehicles. According to an exemplary method video is captured from a forward and/or rear facing camera mounted to an emergency vehicle, and the video is processed to identify any vehicles in violation within a prescribed distance from the emergency vehicle. A license plate id of a vehicle determined to be in violation is identified and communicated to the appropriate authorities.
US09104938B2	Registration of separations Separations or images relating to film or other fields may be registered using a variety of features, such as, for example: (1) correcting one or more film distortions; (2) automatically determining a transformation to reduce a film distortion; (3) applying multiple criteria of merit to a set of features to determine a set of features to use in determining a transformation; (4) determining transformations for areas in an image or a separation in a radial order; (5) comparing areas in images or separations by weighting feature pixels differently than non-feature pixels; (6) determining distortion values for transformations by applying a partial distortion measure and/or using a spiral search configuration; (7) determining transformations by using different sets of features to determine corresponding transformation parameters in an iterative manner; and (8) applying a feathering technique to neighboring areas within an image or separation.
US09104935B1	Mark reader configured to prioritize images Systems and methods for use with a mark reader that reduce the trigger-to-decode response time by prioritizing images to be decoded based on the likelihood of a successful decode are provided. A reader attempts to decode a priority image(s) first to avoid attempting to decode images that are less likely than other images to be successfully decoded. Images are rated based on feature attributes, and then prioritized for decoding. Image feature attributes are correlated with parameter groups, and the parameter groups are prioritized for use in subsequent image acquisitions.
US09104933B2	Covert bar code pattern design and decoding Devices, methods, and systems for covert bar code pattern design and decoding are described herein. One covert bar code includes detector code and decoder code. The detector code includes a combination of responsive absorptive material and responsive reflective material, and the decoder code includes a combination of responsive absorptive material and responsive reflective material.
US09104928B2	Method and apparatus for generating a synchronization signal in a scanning system A scanning system includes a synchronizing arrangement including a light guide and a photosensor. The light guide directs a light beam to a photosensor, wherein light is deflected by one or more moving elements in the scanning system into a scanning region. The light guide has a light entry region, a reflecting region for reflecting light entering the light entry region and one or more light exit faces, so that light entering the light guide through the light entry region is at least partly reflected in the reflecting region and exits through one of the exit faces. The shape and the properties of the light guide are such that for two pencils of light rays, a first pencil of light rays is spaced from the second pencil and is non-overlapping with said second pencil of light rays.
US09104924B2	Temperature tracking device and method using same A device for monitoring conditions within an environment in which an item is disposed includes a environment monitoring tag operably disposed adjacent an article to sense environment surrounding said article and store environmental data sensed, wherein said tag is equipped with software and hardware to communicate said data using Near Field Communication and a hand held communication device equipped with software and hardware to communicate using Near Field Communication to receive environmental data sensed by said tag and analyze said data.
US09104923B1	Encapsulating commands for RFID tags and RFID readers Radio Frequency Identification (RFID) tags may receive one or more encapsulated commands within the payload of an encapsulating command from an RFID reader. An encapsulated command includes at least a command code and an instruction. A tag may store the encapsulated command(s) or the instruction portion of the encapsulated command(s) for later execution. A sequence of encapsulated commands may be contained within one encapsulating command or spread across multiple encapsulating commands. The sequence of encapsulated commands, or the sequence of instructions associated with the encapsulated commands, may form a program. The tag may execute the instructions or program upon receipt, upon a trigger event, serially or in parallel, and/or may modify the instructions or program by adjusting parameters. The tag may later be told by a reader to execute the instructions or program via another command which, in some cases, may be sent prior to tag singulation.
US09104919B2	Multi-cue object association Multiple discrete objects within a scene image captured by a single camera track are distinguished as un-labeled from a background model within a first frame of a video data input. Object position, object appearance and/or object size attributes are determined for each of the blobs, and costs determined to assign to existing blobs of existing object tracks as a function of the determined attributes. The un-labeled object blob that has a lowest cost of association with any of the existing object tracks is labeled with the label of that track having the lowest cost, said track is removed from consideration for labeling remaining un-labeled object blobs, and the process iteratively repeated until each of the track labels have been used to label one of the un-labeled blobs.
US09104918B2	Method and system for detecting sea-surface oil A behavioral recognition system may include both a computer vision engine and a machine learning engine configured to observe and learn patterns of behavior in video data. Certain embodiments may be configured to detect and evaluate the presence of sea-surface oil on the water surrounding an offshore oil platform. The computer vision engine may be configured to segment image data into detected patches or blobs of surface oil (foreground) present in the field of view of an infrared camera (or cameras). A machine learning engine may evaluate the detected patches of surface oil to learn to distinguish between sea-surface oil incident to the operation of an offshore platform and the appearance of surface oil that should be investigated by platform personnel.
US09104917B2	Metering information collection A computing device configured to gather utility metering information. In embodiments, the computing device may comprise a transceiver and an image processing module. The image processing module may be coupled to the transceiver and configured to receive an image utilizing the transceiver. The image may include one or more utility meters. The image processing module may be further configured to extract metering information from the one or more utility meters of the image and transmit this metering information to a utility provider associated with the utility meter Other embodiments may be described and/or claimed.
US09104906B2	Image analysis for determining characteristics of animals Systems and methods are disclosed for predicting one or more characteristics of a animal by applying computational methods to image(s) of the animal to generate one or more metrics indicative of the characteristics. Embodiments determine predictors of characteristics by creating a sample library of animals of a particular type, determining facial descriptor measurements for each animal, determining relationships between facial descriptor measurements and additional library data, and selecting predictors from these relationships. Other embodiments predict characteristics of animals not in the library and, optionally, categorize animals for particular discipline, training, management, care, etc. based on the characteristics. Other embodiments predict characteristics and determine strategies for group(s) of animals using predicted characteristics of individual animals. Embodiments are broadly applicable to domesticated animals including dogs, cats, cattle, oxen, llamas, sheep, goats, camels, geese, horses, chickens, turkeys, and pigs. Other embodiments predict certain characteristics of humans, including certain cognitive or developmental disorders.
US09104905B2	Automatic analysis of individual preferences for attractiveness A method facilitates selection of candidate matches for an individual from a database of potential applicants. A filter is calculated for the individual by processing images of people in conjunction with the individual's preferences with respect to those images. Feature sets are calculated for the potential applicants by processing images of the potential applicants. The filter is then applied to the feature sets to select candidate matches for the individual.
US09104901B2	Electronic device including interleaved biometric spoof detection data acquisition and related methods An electronic device may include an array of finger sensing pixels and data acquisition circuitry coupled to the array. The data acquisition circuitry may be capable of acquiring finger biometric data from each sub-array of the array, and acquiring spoof detection data from at least one of the sub-arrays in an interleaved fashion with the finger biometric data.
US09104897B2	Transceiver locking assembly A transceiver locking assembly includes at least one processor device, a network device, in a network environment, in communication with the least one processor device, a transceiver in communication with the network device; a transceiver port, coupled to the network device, defining a first slot opening in at least one of a variety of positions of the transceiver port and configured for selectively receiving the transceiver, and a dynamically controlled locking mechanism coupled to the transceiver port. The dynamically controlled locking mechanism is selectively positioned into the first slot opening to lock the transceiver into the network device or selectively removed away from the first slot opening to unlock the transceiver from the network device.
US09104895B2	Method for accessing a portable data storage medium with auxiliary module and portable data storage medium The invention describes a method for accessing a portable storage data carrier (10) having a controller (12) for managing a standardized storage element (14) and having an additional module (16), wherein a data block is transferred to the storage data carrier (10) in a first transmission protocol. The data block comprises routing information and application data, whereby the routing information contains an identifier which can be detected by the controller (12). Furthermore, it is determined whether a data block received on the storage data carrier (10) contains routing information. The data block is relayed to a storage area (18) of the storage element (14), said storage area being hidden to a terminal (50), when the data block comprises routing information and the routing information comprises, besides the identifier contained therein, at least one further, predetermined parameter indicating the access to the hidden storage area (18).
US09104893B2	Rule based access for removable storage Various techniques and solutions are described for rule-based access to removable storage devices. For example, a request can be received to perform a file system operation using a removable storage device that is formatted with a file system that does not support access controls. A rules-based check of the received request can be performed by a service by checking the request against a plurality of rules. Based on results of the rules-based check, the request can be allowed or denied.
US09104891B2	Recovering from unexpected flash drive removal Techniques for recovering from unexpected removal of (or other unexpected power loss) a flash memory device from a computer system. An interpolated device driver notes whenever the flash memory device is unexpectedly removed, or otherwise unexpectedly powers off or enters a locked state. If the flash memory device is reinserted, the interpolated device driver reinitializes the flash memory device, and satisfies any flash memory device security protocol, so the flash memory device and the computer system can be restored to their status just before unexpected removal. The interpolated device driver caches requests to the flash memory device, and when status is restored to just before removal, replays those requests to the flash memory device, so the flash memory device responds to those requests as if it had ever been removed. The computer system does not notice any break in service by the flash memory device due to removal and reinsertion.
US09104889B1	Encryption on computing device A first component of a cryptographic key is received from a user via a user interface of a user computing device. A second component of the cryptographic key is received via a short-range communication interface that communicatively couples the user computing device to a physically separate storage device. The cryptographic key is generated based at least on the first component and the second component. The cryptographic key is then used to encrypt and/or decrypt data.
US09104888B2	Secure data storage Methods and systems for obscuring the location of critical system files are provided. In particular, the locations of files stored within a file system are selected by applying various inputs to a hash algorithm. For system files, the inputs applied to the hash algorithm can include a user name and password. For data files, the information provided to the hash algorithm can include the file name. In addition to providing random file locations, a file system in accordance with embodiments of the present invention can homogenize other information, including file names, sizes and creation dates.
US09104884B2	Implementing role based security in an enterprise content management system A method of implementing role based security in an enterprise content management system is provided and may include creating a role object; creating a role adapter object that is communicatively coupled to the created role object; creating a security adapter object that is communicatively coupled to the created role adapter object; and associating the security adapter object to a content class.
US09104879B1	System and method for detecting security exposures of VOIP devices Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for detecting security exposures of Voice over Internet Protocol (VOIP) devices. One of the methods includes obtaining data identifying a source Internet Protocol (IP) address associated with a communication device that has been provisioned with configuration files for VOIP services; determining that a VOIP phone configuration interface is exposed over an untrusted network at the source IP address; and determining that the communication device associated with the source IP address has a security exposure based at least in part on determining that the VOIP phone configuration interface is exposed over the untrusted network at the source IP address.
US09104876B1	Virtual file-based tamper resistant repository A technique adds virtual file anchoring functionality to a platform by mounting a virtual file system (“system”) to store an anchor file. Binary code to create and run the system is embedded into a trusted application's binary code. Thus, whenever the trusted application executes, the embedded code ensures the system is validated and started or restarted as required. To interrogate the existence of the anchor, it can be read like any other file. To modify the status of the anchor, the name of the associated file is decorated such that instead of modifying the file, foo, the trusted application modifies a pseudo-file, foo#decoration. The decoration varies for each modification operation. To generate the decoration, the algorithm takes as input a time component, e.g. in the form of the last accessed time field of the parent directory where the secure file anchors files reside, and the name of the anchor.
US09104874B2	Method for detecting the hijacking of computer resources An exemplary technique is provided for detecting a hijacking of computer resources, located in an internal network implementing security criteria and confidentiality criteria specific to the internal network, connected to an external network with no security criteria and confidentiality criteria, through a connection managed by a service provider. The technique includes storing, at the internal network, a connection parameter implemented by the computer resources to communicate with the external network; processing, at the internal network, the stored connection parameter based on an irreversible function to generate a unique code that corresponds to the stored connection parameter but which does not allow the identification of the stored connection parameter from the corresponding generated unique code; and sending, at the internal network, the generated unique code to a server located on the external network so that the server can analyze an activity of the computer resources from the unique code and detect any hijacking of the computer resources.
US09104872B2	Memory whitelisting An enhanced whitelisting module associated within a system whitelists unknown files for execution on the system. The whitelisting module may oversee the computation of a hash of a file loaded into the memory and comparison of the hash to hashes within a hash table generated from clean files located on a clean system. The whitelisting module may communicate to a device internal and/or external to the system to retrieve the hash table of clean files. In certain embodiments, a rolling hash (or other piecewise hash) may be used to determine the location and/or extent of the differences between a modified file and a clean file.
US09104870B1	Detecting malware An example of candidate malware is data that potentially includes one or more malicious elements. Candidate malware is received. The received candidate malware is analyzed using a virtual machine. A determination is made that the candidate malware has attempted to perform an anti-virtual machine action. Output that indicates that the candidate malware is malicious is generated.
US09104867B1	Malicious content analysis using simulated user interaction without user involvement Techniques for detecting malicious content using simulated user interactions are described herein. In one embodiment, a monitoring module monitors activities of a malicious content suspect executed within a sandboxed operating environment. In response to detection of a predetermined event triggered by the malicious content suspect requesting a user action on a graphical user interface (GUI) presented by the malicious content suspect, simulating, a user interaction module simulates a user interaction with the GUI without user intervention. An analysis module analyzes activities of the malicious content suspect in response to the simulated user interaction to determine whether the malicious content suspect should be declared as malicious.
US09104863B2	Method and apparatus to harden a software execution in random access memory Example embodiments of the present invention relate to a system, apparatus and methods for preserving the integrity of a code to prevent it from being modified, maliciously or inadvertently, while it is in execution in the RAM of a computer platform. This method also may be referred to as code hardening. Code to be hardened in example embodiments of the present invention may be referred to as protected code. Example embodiments of the present invention are able to externally detect unauthorized stoppage of the hypervisor by employing (1) a launch-time metric of the protected code; (2) a run-time metric of the protected code; and (3) a liveliness indicator of the protected code.
US09104860B2	Systems, methods and media for managing process image hijacks Disclosed is a method of checking the authenticity of an executable process including at least one section. The method includes, when an initial thread of the executable process is created in a suspended state, mapping from storage a copy of the executable process into a spare memory area, where it will not be executed. The method also includes comparing a header of a first section of the executable process with a header of a first section of the copy. The method further includes terminating the executable process when the header of the first section of the executable process and the header of the first section of the copy are not identical.
US09104857B2	Gesture-based authentication without retained credentialing gestures This document describes techniques and apparatuses enabling gesture-based authentication without retained credentialing gestures. The techniques are capable of determining an identifier for a credentialing gesture where the identifier can be reproduced on receiving a similar authentication gesture at a later time. The identifier for the credentialing gesture can be encrypted, sent to a secure authentication entity, and then, when an authentication gesture is received, an identifier for the authentication gesture can also be determined, encrypted, and sent to the secure authentication entity. If the secure authentication entity determines that the encrypted identifiers match, the user is authenticated.
US09104853B2	Supporting proximity based security code transfer from mobile/tablet application to access device Techniques are disclosed for authenticating users to a computing application. A mobile or tablet device is used to generate a security code. Near field communication (NFC) hardware on the mobile device is used to transfer the security code from the mobile device to a computer. To transfer the one-time value, a user simply taps an NFC enabled mobile device on an NFC enabled computing device (e.g. a laptop running a web browser used to access a web service). In one embodiment, doing so triggers a connection between the two devices and an application running on the mobile device transfers the security code to an NFC receiver application running on the computer. The receiving computer may be configured to auto-fill the received security code in the appropriate form field of the application authentication interface.
US09104851B2	Methods and systems for enabling, tracking, and correlating anonymous user activity Methods are disclosed for identity key management in networked application execution. In one embodiment, an identifier request is transmitted from a client system to a server system, in which an identity key value in the identifier request is blank. Upon detecting the blank identity key value at the server system, the server system operates to generate a new identity key value and an identifier for the new identity key value. The new identity key value and the identifier for the new identity key value are transmitted from the server system to the client system. The new identity key value is stored in a local store of the client system. The local store of the client system is secured by a passcode and persists data through power cycling of the client system. The identifier is used to track execution of a networked application in an anonymous execution mode.
US09104850B1	Differentiated access for mobile device Mobile devices and methods are disclosed for providing privacy and confidentiality of information through the provision of multiple profiles that control access to the information, and operation of the mobile device in accordance with a profile chosen by entry of an associated access code.
US09104847B2	Method for generating an identifier The invention relates to a method for generating an identifier for identifying a pair, wherein the pair comprises a cryptographic device (100) and a computer system (1, 2, . . . , i, . . . I), wherein the cryptographic device has a first secret key (102), wherein a second secret key (118.i) is associated with the computer system, wherein a blocking system (120) for accessing the second secret key of the computer system is provided, wherein the blocking system has a third secret key (126), and wherein the following steps are carried out for generating the identifier: Generating a second public key (116.i) from the second secret key and a third public key (128) associated with the third secret key by means of the blocking system, Transmitting the second public key (116.i) to the computer system (i), and Generating the identifier from the first secret key and the second public key, using the cryptographic device.
US09104843B2	Providing content items from alternate sources Systems and methods for providing content items to users. A computer system may provide to a first user an indication of a plurality of available content items. The computer system may receive from the first user an indication of a first content item selected from the plurality of content items. The computer system may determine whether a content provider service associated with the computer system is authorized to stream the first content item to the first user. When the content provider service is not authorized to stream the first content item to the first user, the computer system may identify an alternate source for the first content item. The computer system may initiate playback of the first content item to the first user from the alternate source.
US09104840B1	Trusted security zone watermark Embodiments relate generally to methods and systems for creating and using a watermark for verification of operation in a trusted security zone of a mobile device. The watermark may be created or chosen by a user and may be unique to the user. The watermark may be stored in a trusted security zone of the mobile device and may not be accessible from any other area of the mobile device. The watermark may comprise one or more of an image, an audio file, a video, a shape, a signature, a word, a phrase, or a number. The watermark may be verified by a user before operation of a secure application executed in the trusted security zone of the mobile device, and the watermark may also be present throughout the use of a secure application.
US09104838B2	Client token storage for cross-site request forgery protection Systems and methods can secure against cross-site request forgery using client-side token storage. A client browser can initiate an action associated with a first web service and generate a token. The token may be stored in client-side storage at the computing device. An indicator of the action may also be stored within the client-side storage. A return link, associated with a passed copy of the token, may be generated. The client may perform the redirect and return to the first web service according to the return link. The passed copy of the token can be extracted from the return link. The indicator of the action and the stored token may be loaded from the client storage. The passed copy of the token and the stored token may be compared. The action according to the indicator of the action may be performed in response to the comparison matching.
US09104832B1	Identifying and mitigating electromigration failures in signal nets of an integrated circuit chip design A method of characterizing an electromigration (EM) parameter for use in an integrated circuit (IC) chip design including, inputting a layout of a wire layer and identifying a signal gate-circuit including electrically parallel paths, connected to an output of the signal gate from the layout. Based on widths for each of the paths, determining a maximum possible current for each of the paths, and calculating an average current for each of the paths. Identifying a path that is most limited in its current carrying capacity by possible EM failure mechanisms, and storing in a design library, a possible maximum current output to the identified limiting path, as the EM parameter.
US09104831B2	Semiconductor overlay production system and method Disclosed herein is a system and method for producing semiconductor devices using overlays, the method comprising associating one or more patterned overlays with respective ones of reserved regions in a layer template, receiving a layer design based on the layer template, identifying the reserved regions in the layer design, generating a production layer design based on the layer design, the production layer design describing at least one production overlay in one of the reserved regions, and fabricating one or more devices based on the production layer design.
US09104822B2	Signal transmission method for USB interface and apparatus thereof A signal transmission method for a USB interface and an apparatus thereof are provided. The method includes: receiving a first USB signal sent from a sending terminal, processing the first USB signal into a USB-like signal, and transmitting the USB-like signal via a networking cable; receiving the USB-like signal, processing the USB-like signal into a second USB signal, and sending the second USB signal to a receiving terminal. According to the embodiments of the present invention, the first USB signal is processed into a USB-like signal which is similar to the USB signal, the USB-like signal is transmitted via a networking cable, and the USB-like signal is processed into a second USB signal. The transmission process does not require converting the USB signal into a networking-cable signal which is to be transmitted via a networking cable, thereby avoiding conversion between protocols, and simplifying the entire transmission process.
US09104820B2	Semiconductor device and data processing system selectively operating as one of a big endian or little endian system The present invention is to provide a semiconductor device that can correctly switch endians on the outside even if the endian of a parallel interface is not recognized on the outside. The semiconductor device includes a switching circuit and a first register. The switching circuit switches between whether a parallel interface with the outside is to be used as a big endian or a little endian. A first register holds control data of the switching circuit. The switching circuit regards the parallel interface as the little endian when first predetermined control information, that is unchanged in the values of specific bit positions even if its high-order and low-order bit positions are transposed, is supplied to the first register, and regards the parallel interface as the big endian when second predetermined control information, that is unchanged in the values of specific bit positions even if its high-order and low-order bit positions are transposed, is supplied to the first register. Whatever the endian setting status, the control information can be correctly inputted without being influenced by the endian setting status.
US09104818B2	Accelerator management device, accelerator management method, and input-output device An accelerator management device includes an accelerator link DB that stores an accelerator identifier in association with an application identifier. The accelerator management device includes the accelerator mounting information DB that stores the accelerator identifier of an accelerator mounted in a slot in association with each slot identifier used to identify each slot of an expansion I/O box. The accelerator management device specifies an accelerator identifier corresponding to an application by referring to the accelerator link DB when an execution request of an application is received from a host. The accelerator management device specifies a slot identifier corresponding to the specified accelerator identifier by referring to the accelerator mounting information DB. The accelerator management device assigns the slot that is identified through the slot identifier which is specified by the second specifying unit to the host.
US09104817B2	Explicit control message signaling A method for explicit control message signaling includes sending a single ended 1 signal on a pair of data lines, wherein the pair of data lines includes a first data line and a second data line. A voltage of the first data line is driven to a logic 1, while pulsing the voltage of the second data line between a logic 1 and a logic 0, wherein the pulses represent a control message.
US09104816B2	Memory card having plurality of interface ports, memory card system, and data communication method for the memory card A memory card is disclosed including first and second host interfaces facilitating the communication of data between the memory card and a host using, respectively, first and second protocols, wherein the first protocol defines low-speed operations and the second protocol defines high-speed operations for the memory card. The second host interface is only enabled in response to an indication by the host device of a high-speed memory card operation.
US09104815B1	Ranking runs of test scenarios based on unessential executed test steps System, method, and non-transitory medium for ranking similar runs of test scenarios based on unessential test steps in the runs. Runs of test scenarios run by users on software systems that belong to different organizations are clustered to clusters of similar runs. Analysis of a certain selected cluster identifies occurrences of potentially unessential test steps in the similar runs belonging to the cluster. By counting, for each potentially unessential test step, the number of different users that ran a test scenario that includes the potentially unessential test step, it is possible to label certain test steps as verified unessential test steps. A potentially unessential test step may be labeled a verified unessential test step when its corresponding number of different users is below a predetermined threshold. A ranking module utilizes the number of occurrences of verified unessential test steps in runs in order to rank the runs.
US09104812B2	Injection of data into a software application One embodiment is a method for injecting data into a software application. The method displays a plurality of different controls of a software application and receives a single selection of data stored in a data source. In response to this selection, the method injects the data from the data source into the plurality of different controls of the software application.
US09104809B2	Facilitating automated validation of a web application In one embodiment, a method includes accessing one or more document object model (DOM) representations of one or more pages of a Web application that comprises one or more instances of a web-application artifact. For each of one or more of the instances, the method also includes identifying a first set of one or more DOM elements in one of the DOM representations of one of the pages that collectively correspond to the instance. The method additionally includes identifying a second set of one or more particular values of one or more particular attributes of one or more particular ones of the DOM elements in the first sets. The second set may then be mapped to the web-application artifact to provide a DOM definition of the web-application artifact.
US09104807B2	Testing systems and methods for a resource constrained device Systems and methods for providing symbolic information about fields, methods, and/or classes for a target device. A system and method may be used where the runtime processing is split between a host system and a target system. At the target device a test program uses a symbol not defined on the target device. A query is sent from the target device to a symbolic information source. The symbolic information source then provides the target device with information about the undefined symbol. The target device uses the information from the symbolic information source to complete the test program.
US09104804B2	Method and system for invoking just-in-time debugger A method and system for invoking Just-In-Time debugger is described, which can provide more efficient JIT debugging for complex code mixed applications. A method for invoking a Just-In-Time (JIT) debugger according to one embodiment includes checking a code type of a code address where a JIT debugging request is triggered from a process of a code-mixed application in response to the JIT debugging request from the process; acquiring corresponding JIT debugging information for different code types of the code-mixed application; and invoking a JIT debugger corresponding to the code type in response to the checked code type of the code address in the process and the acquired corresponding JIT debugging information.
US09104798B2	Enabling remote debugging of virtual machines running in a cloud environment Enabling remote debugging of virtual machines, in one aspect, may comprise attaching a debug virtual machine to a target virtual machine deployed in a virtualized environment. Interactions and/or access to the target virtual machine may be performed via the attached debug virtual machine. The debug virtual machine may be created and attached to the target virtual machine in response to receiving a request to debug the target machine, for example, from a remote user of the target virtual machine.
US09104797B1	Efficient cloud-based annotation of crash reports One embodiment of the present invention relates to a system for efficiently annotating numerous crash reports originating from multiple instances of an application. Prior to deploying a version of the application, a service receives a file that stores debugging information associated with the version. Next, the service parses the debugging information from the file. The service then converts the debugging information into an object representation in memory and stores the object representation in a database. Next, in response to an instance of the version crashing on a client device, the service receives a crash report from the client device. Then, for each item in the crash report, the service determines whether that item needs to be annotated and, if so, annotates the item.
US09104795B2	Integrating compiler warnings into a debug session Integrating compiler warnings into a debug session including: receiving, by a debugger for a debug session of a debuggee from a compiler, compiled source code for execution and compiler warning data describing one or more compiler warnings generated at compile time of the debuggee, each compiler warning resulting from a source code variable statement in the debuggee source code; receiving, by the debugger, a request to evaluate a variable; determining, from the compiler warning data, whether evaluating the variable is dependent upon a source code variable statement resulting in a compiler warning; and, if evaluating the variable is dependent upon a source code variable statement resulting in a compiler warning, returning, by the debugger responsive to the request along with a result of the evaluation, a compiler warning indicator.
US09104793B2	Method and system of adapting communication links to link conditions on a platform A method and system to adapt communication links statically and/or dynamically to their individual link conditions on a platform. The communicatively coupled devices have logic to adapt one or more settings of a respective one or more communication links with another device based at least in part on a respective metric of received data patterns from the respective one or more communication links. The communicatively coupled devices in the platform have a back channel to allow feedback or information to be sent from one receiving device to a transmitting device in one embodiment of the invention.
US09104790B2	Arranging data handling in a computer-implemented system in accordance with reliability ratings based on reverse predictive failure analysis in response to changes Re-arranging data handling in a computer-implemented system that comprises a plurality of existing physical entities. At least one reliability rating is assigned to each of various existing physical entities of the computer-implemented system; and in response to change. Reverse predictive failure analysis uses the assigned reliability ratings to determine cumulative reliability rating(s) for at least one arrangement of the system. Data handling is re-arranged with respect to at least a portion of the existing computer-implemented system to provide a designated cumulative reliability rating.
US09104786B2	Iterative refinement of cohorts using visual exploration and data analytics Methods and apparatus are provided for iterative refinement of cohorts using visual exploration and data analytics. A cohort comprised of multiple data objects is defined by obtaining an initial cohort seeding; visualizing the initial cohort using a selected view to present a current cohort; reducing the current cohort using one or more visual filters; visualizing the current cohort using a selected view; expanding the current cohort using one or more selected analytics; and determining whether the current cohort should be further modified using one or more of additional reductions and additional expansions. Cohorts can be passed between views and analytics via drag-and-drop interactions as an analysis unfolds.
US09104784B2	Detecting multi-column composite key column sets An aspect includes a computer-implemented method for detecting one or more multi-column composite key column sets. The method includes accessing a plurality of first columns, each first column representing a parameter, each first column including a set of distinct parameter values of its respective parameter, each distinct parameter value being stored in association with one or more object identifiers. Two or more of the first columns are selected for use as a current candidate column set, the current candidate column set including at least a first and a second candidate column, the current candidate column set being of a current cardinality. The method also includes determining, by comparing object-identifiers, whether for the current candidate column set at least one tuple of parameter values exists with parameter values respectively stored in association with two or more shared ones of the object identifiers to identify a multi-column composite key column set.
US09104783B2	Association of information entities along a time line The invention relates to the field of man-machine interfacing. In particular, it relates to a user interface allowing a unified approach for organizing and navigating data on a computing device, such as a work station, a desktop computer, a tablet PC, a laptop computer and/or a mobile device. A user interface method executed on a processor for displaying, on a screen, indicia for a set of entities along a time line represented by a linear indicia is described, wherein an entity of the set of entities is associated with a time instant on the time line. The method comprises the steps of: displaying on the screen a first indicia for a first entity associated with a first set of entities; displaying on the screen a second indicia for a second entity associated with a second set of entities; determining the distance on the screen between the first indicia and a set operation area associated with a set operation; determining the distance on the screen between the second indicia and the set operation area; determining a third set of entities based on the determined distances and based on the set operation performed on the first and second set of entities; and displaying on the screen indicia for the third set of entities along the time line at time instants associated with the third set of entities.
US09104782B2	System and method for searching real estate listings using imagery A system and method for searching real estate uses non-traditional techniques. A selection of suggestive imagery may be rated by a user in order to indicate that user's subjective tastes. The suggestive images may relate to particular keywords which also may be related to real estate listings. This way, properties which appeal to a user's tastes may be identified and sorted accordingly.
US09104774B2	Consistent web application presentation A request for a web page is received from a client device at a web server. At least a source web application and a target web application relating to the requested web page is identified. An output from the source web application and an output from the target web application are requested. A source style of the source web application is requested. The source style is combined with the output of the source web application and the output of the target web application into the requested web page. The requested web page is sent to the client device.
US09104773B2	Finding and consuming web subscriptions in a web browser A content syndication platform, such as a web content syndication platform, manages, organizes and makes available for consumption content that is acquired from the Internet. In at least some embodiments, the platform can acquire and organize web content, and make such content available for consumption by many different types of applications. These applications may or may not necessarily understand the particular syndication format. An application program interface (API) exposes an object model which allows applications and users to easily accomplish many different tasks such as creating, reading, updating, deleting feeds and the like. Further, in at least some embodiments, a user can subscribe to a particular web feed, be provided with a user interface that contains distinct indicia to identify new feeds, and can efficiently consume or read RSS feeds using both an RSS reader and a web browser.
US09104771B2	Providing relevant product reviews to the user to aid in purchasing decision A method, system and computer program product for providing relevant product reviews to a user. A user's session on a website is monitored to gather information related to reviewing and writing product reviews as well as to buying and browsing habits. The actions performed by the user in connection with the monitored user session are populated in a database. Once populating the database is completed, the personality report of the user, which includes personality traits, is generated using the populated database. Also, a list of reviewers that are favored by the user is generated. By using the personality traits of the user to match reviews of interest as well as providing reviews from those reviewers favored by the user, the user can have more confidence in the usefulness or relevance of these reviews.
US09104767B2	Identifying web pages that are likely to guide browsing viewers to improve conversion rate A method and system for extracting from a web log for a given entity information comprising web page events. The information gain in the sequence of navigating from a given web page to a subsequent web page is computed for at least some of the web page events. The information gain is used to determine a set of web pages from which users can decide to navigate to a first web page or a second web page, wherein navigating to the first web page is more likely to lead to a conversion than navigating to the second web page. A list of at least a subset of the set of web pages is transmitted to the entity, which can use the list to determine web pages at which the entity can place advertising material to motivate a user to navigate to the first web page. The computing may be performed by MapReduce processing.
US09104766B2	Implicit or explicit subscriptions and automatic user preference profiling in collaboration systems Systems, methods, and other embodiments associated with event processing are described. In one embodiment, a method includes detecting an event. The example method may also include analyzing the event to extract information about the user and processing a subsequent event in accordance with the extracted information about the user.
US09104765B2	Automatic webpage characterization and search results annotation A system and method for automatically analyzing and characterizing Internet search results and annotating a search results page according to specific characteristics of each webpage located at a URL corresponding to a search result. Such characteristics include the composition of each search results webpage as well as which search term elements are present in a webpage located at a URL corresponding to a search result out of those search term elements that were submitted to a search engine to produce the search results webpage. Further, search results are annotated to indicate which search term elements are present in a descendent webpage of a webpage located at a URL corresponding to a search result. Search results may also be optionally filtered according to specific characteristics of a webpage located at a search results URL such that certain categories of webpage are excluded from being referenced in the displayed search results.
US09104762B1	Universal database management Database messages, such as queries, may be managed to process data based at least in part on performance characteristics. For example, a database query associated with a first database format may be received. The first database format may be one of a plurality of database formats. A second database format may be determined based at least in part on a performance characteristic of the second database format being above a threshold. The second database format may be determined as a result of the received database query. Additionally, the second database format may also be one of the plurality of different database formats. Data communicated by the received database query may be processed according to the second database format.
US09104759B1	Identifying stem variants of search query terms The subject matter of this specification can be implemented in, among other things, a computer-implemented method for identifying and storing stem variants of search query terms. The method includes receiving a first query and a user selection of a first search result from the first query. The method further includes receiving a second query and a user selection of a second search result from the second query. The method further includes determining that the first search result and the second search result have the same category. The method further includes identifying a first term in the first query and a second term in the second query as stem variants of one another by determining that the first term is within a threshold edit distance of the second term. The method further includes storing the first term and the second term in a stem-variant repository.
US09104755B2	Ontology enhancement method and system An exemplary embodiment of the present disclosure provides an ontology enhancement method. Firstly, at least an input information request is received. Then, based on an ontology, each input information request is expanded to produce at least an expanded information request of each corresponding input information request. Based on a searching model, according to each expanded information request, a file collection is searched to obtain searching results of each corresponding expanded information request. Then, according to each searching result, a plurality of candidate knowledge concepts of each corresponding searching result are extracted. Next, the candidate knowledge concepts of each searching result are selectively added into the ontology.
US09104753B2	Identifying an incident-addressing step Relationships among incident-addressing steps, applications, and incidents are determined, based on information relating to the applications and the incidents. For addressing a given incident that occurred with respect to a particular application, at least one incident-addressing step is identified using the determined relationships.
US09104747B2	System and method for signature-based unsupervised clustering of data elements A method and system for signature-based unsupervised clustering of data elements. The method comprises receiving a plurality of clusters; generating a triangular matrix respective of the clusters; generating a signature for each of the clusters; generating a match score between each of two different clusters; storing the match score in a cell of the triangular matrix corresponding to the two clusters; determining whether any of the match scores is above a predefined threshold value; clustering every two clusters that are determined to have a score above a predetermined threshold; and repeating the generation of a triangular matrix respective of the clusters until a single cluster is reached. The system comprises an interface; a processor; a memory for storing at least one cluster; and a memory coupled to the processor, the memory containing instructions that, when executed by the processor, configure the system to perform the steps of the method.
US09104746B1	Identifying contrarian terms based on website content A system and method for identifying contrarian terms is disclosed. The system and method includes identifying a plurality of websites describing a product or service, analyzing content in the plurality of websites, the content relating to the described product or service, identifying contrarian terms based on the website content using a processing circuit, wherein the contrarian terms comprise descriptions of a product or service, associating the identified contrarian terms with a category, within which the product or service has been categorized in at least one of the plurality of websites, and storing the contrarian terms and the associated category in a memory.
US09104745B1	Distributed log collector and report generation A distributed log collector and report generation architecture is disclosed. In some embodiments, a received query to generate a log report is forwarded to each of a plurality of log collector clusters, and responses to the query received from each of at least a subset of the plurality of log collector clusters are aggregated to generate the log report.
US09104742B1	Method and system for optimized parallel queuing A method and system for sharing and synchronizing content between a content repository and file sharing service. An application server includes a connector engine and a connector agent. The connector engine with is configured with a plurality of threads and queues designed to listen for changes at either the file sharing service or the repository, to process those changes in parallel, and to coordinate synchronization of uploads to the file sharing service and downloads to the content repository.
US09104735B2	Scalable search system using human searchers A system allowing a query to be submitted to a server that locates a human searcher to perform a search. The searcher performs a search including using conventional tools, browser, and provides results to the user. A searcher who produces result(s) accepted by the user is rewarded and the results can be used when a similar query is submitted by another user. The searcher is located by comparing keywords of the query to keywords for which the searcher has registered and a high ranking searcher may be chosen by the system based on various factor(s). While the search is performed, information including videos, games, advertisements, etc., may be provided to the user based on keywords of the query and selection by the searcher. The reward for the searchers can be based on revenue from advertisements.
US09104733B2	Web search ranking A computer-implemented method and system for Web search ranking are provided herein. The method includes generating a number of training samples from clickthrough data, wherein the training samples include positive query-document pairs and negative query-document pairs. The method also includes discriminatively training a translation model based on the training samples and ranking a number of documents for a Web search based on the translation model.
US09104732B2	Internet presence scoring For scoring Internet presence, a search module retrieves a plurality of search results for a search phrase from a specified data source. A scoring module calculates an Internet score as a function of a sentiment value for each of the plurality of search results.
US09104729B2	Querying spatial events in a vehicle network, and optimized querier A method of querying spatial events in a vehicle network includes receiving, by a processing device, a query condition of a user; in response to reception of the query condition of the user, determining context information of a position where the user locates; and according to the query condition of the user and the context information of the position where the user locates, querying an index table recording correspondence between terminal nodes of roads in a road map and spatial events to obtain spatial events meeting the query condition of the user.
US09104728B2	Query language to traverse a path in a graph A query language used to traverse a path in a graph-based model is provided. The system comprises a parsing module to parse a query comprising query phrases. The respective query phrases composed of an object-type identifier and a filter where the object-type identifier corresponds to respective repositories and the filter is used to identify at least a portion of the objects associated with the object-type in the respective repositories. A planning module identifies the respective repositories corresponding to the object-type identifier within each of the one or more query phrases and generates an execution plan describing data to be retrieved according to the respective repositories and results of a preceding query phrase within the query. A translation module translates the respective query phrases into respective translated queries that are readable by the respective repositories and including the filter. An execution module implements the execution plan using the translated queries.
US09104726B2	Columnar databases A method of searching for sets of data in a very large columnar database is described. The method comprises carrying out a first query by querying the very large columnar database for a first desired set of data, the database having a range of possible data storage locations; creating a compressed columnar representation of the locations within the very large columnar database of members of the first desired set of data; wherein the compressed columnar representation comprises a plurality of representations covering the entire range of the very large database, wherein each representation provides a descriptor describing a distribution of the desired data results within the sub-range of the entire range; storing the compressed columnar representation in a data cache; and applying a logical operation on first desired set of data stored within the very large columnar database by using the compressed columnar representation stored in the data cache in preference to data stored within the very large columnar database.
US09104725B2	Automatic tuning of database queries A database query is modified to improve performance by identifying portions of database tables that are likely to be reused and modifying the database query accordingly. According to certain embodiments, the degree of selectivity with which a table is accessed is used to identify tables that are likely to be reused in subsequent database operations.

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