最新美国发明专利第2014-10-28期 - 专利汇|PatentHub专利检索|专利查询网|发明专利查询分析

Document	Document Title
US08873704B2	Filter for an X-ray device, and X-ray device embodying such a filter A filter for an x-ray device to shape an intensity profile of x-ray radiation emanating from an x-ray source of the device has a filter body made of a material that attenuates x-ray radiation. The filter body is designed with a propeller shape and has two blades connected by an axle of the filter. The filter body is rotatable around the axle, which is permeable to the x-ray radiation. The x-ray device embodies at least one such filter.
US08873701B2	Method for determining spatial distribution and concentration of a component in a pore volume of a porous material A water-soluble salt of a metal with a high atomic weight is selected as an X-ray contrast substance providing a selective ion-exchange reaction with a component. The salt has a general formula R+M−, where R+ is selected from a group consisting of Ba2+; Sr2+; Tl+; Rb+ . . . , and M− is selected from a group consisting of Cln; NOn; OHn; CH3COO, SO4; . . . in accordance with a standard table of inorganic substances' water solubility. The X-ray contrast substance is injected into a sample of a porous material. Upon completion of the selective ion exchange reaction a non-contrast displacing agent is injected into the sample. The sample is scanned by computer X-ray microtomography and spatial distribution and concentration of the component in question is estimated by analysis of the obtained computer tomographic image of the sample.
US08873698B2	Computer-implemented method and system for designing a nuclear reactor core which satisfies licensing criteria In a computer-implemented method of designing a nuclear reactor of a given reactor plant, an initial, test reactor core design is generated for the given plant based on a plurality of limits input by a user. The limits include a plurality of transient licensing constraints to be satisfied for operating the given plant. The method includes selecting, from a set of automated tools, one or more automated tools to evaluate the test core design, and operating one of more of selected automated tools to output data for display to the user. The displayed data is related to a core design that satisfies the limits inclusive of the transient licensing constraints.
US08873695B2	Reactor pressure vessel head vents and methods of using the same Internal head vents are usable in nuclear reactors and include piping inside of the reactor pressure vessel with a vent in the reactor upper head. Piping extends downward from the upper head and passes outside of the reactor to permit the gas to escape or be forcibly vented outside of the reactor without external piping on the upper head. The piping may include upper and lowers section that removably mate where the upper head joins to the reactor pressure vessel. The removable mating may include a compressible bellows and corresponding funnel. The piping is fabricated of nuclear-reactor-safe materials, including carbon steel, stainless steel, and/or a Ni—Cr—Fe alloy. Methods install an internal head vent in a nuclear reactor by securing piping to an internal surface of an upper head of the nuclear reactor and/or securing piping to an internal surface of a reactor pressure vessel.
US08873687B2	Digital front end receiver using DC offset compensation scheme The present invention relates to a digital front end receiver using a DC offset compensation scheme. The digital front end receiver includes a DC offset compensation filter configured to remove DC offset components from signals received from a digital mixer and a Cascaded Integrator-Comb (CIC) decimation filter configured to reduce a sampling rate of the signals received from the DC offset compensation block.
US08873684B2	BICM decoding in the presence of co-channel interference Systems and methods are provided for computing soft information for digital information based on a received signal, where the received signal suffers from noise and interference. A receiver that decodes the received signal may estimate channel information, such as the channel gain, associated with the interfering source. The receiver may also obtain modulation information through a backbone network or by decoding control information transmitted by the interfering source. Using the modulation information and the channel information, the receiver may estimate the effect that interference has on the received signal, and may compute soft information (e.g., a log-likelihood ratio) for the digital information.
US08873681B2	Process for suppressing intercarrier interference in a OFDM receiver Process for canceling Intercarrier Interference in a OFDM receiver receiving OFDM blocks in presence of Doppler, comprising the steps of: receiving a OFDM block comprising N samples; applying a FFT for the purpose of generating N frequency domain representations composing the received signal (R); multiplying said received signal (R) by the hermitian value of the channel (HH), with H being the channel estimate; applying on said received signal a preconditioned conjugate gradient algorithm based on a N×N P preconditioner matrix; Characterized in that said preconditioner matrix is computed at follows: Formula (19) and formula (20), where formula (I) is a LFIR×PN selection matrix obtained by extracting a predetermined number (LFIR) of rows from the identity matrix IPN, LFIR being a predetermined integer inferior to PN, with p corresponding to the basis expansion order chosen and N is the FFT size; formula (II) is equal to HFH, with H being the frequency-domain channel matrix and F being the N×N discrete-Fourier transform unitary matrix F; formula (III) is the N×N identity matrix; formula (IV) is the varience of the noise; formula (V) is being the 1×N vector containing 1 in n-th position and 0 elsewhere. S n ( I ) ℋ ( II ) I ( III ) σ ( IV ) 1 n ⁢ ( V ) f n T = 1 n ⁢ ℋ H ⁢ ℋ ⁢ ⁢ S n T ⁡ [ S n ⁢ ℋ H ⁡ ( ℋℋ H + σ z 2 ⁢ I ) ⁢ ℋ ⁢ ⁢ S n T ] - 1 ( 19 ) G ˘ = [ f 0 T ⁢ S 0 f 1 T ⁢ S 1 ⋮ f N - 1 T ⁢ S N - 1 ] ( 20 )
US08873678B2	Method for processing data A method and transmitter are disclosed. The method includes encoding data according to a space time transmit diversity scheme and spatial-multiplexing the encoded data. The transmitter includes first and second units. The first unit is configured to encode data according to a space time transmit diversity scheme and the second unit is configured to spatial-multiplex encoded data. The transmitter is configured to operate in an operating mode in which data is processed by the first unit and the second unit.
US08873673B2	Method and apparatus for information transmission in a radio communication system A method of transmitting, by a transmitter, information in a wireless communication system, the method includes generating first and second symbols; generating first and second transmit vectors on the basis of an Alamouti code from the first and second symbols; and transmitting the first transmit vector through a first antenna and transmitting the second transmit vector through a second antenna. The first transmit vector consists of a first transmit symbol and a second transmit symbol. The second transmit vector consists of a third transmit symbol and a fourth transmit symbol. The first, second, third, and fourth transmit symbols are transmitted based on first and second resource indexes. The first symbol is a first modulation symbol for first information, and the second symbol is a second modulation symbol for second information.
US08873671B2	Method and system for LLR buffer reduction in a wireless communication modem A system involves a transmitting device (for example, a first wireless communication device) and a receiving device (for example, a second wireless communication device). In the receiving device, LLR (Log-Likelihood Ratio) values are stored into an LLR buffer. LLR bit width is adjusted as a function of packet size of an incoming transmission to reduce the LLR buffer size required and/or to prevent LLR buffer capacity from being exceeded. The receiver may use a higher performance demodulator in order to maintain performance despite smaller LLR bit width. In the transmitting device, encoder code rate is adjusted as a function of receiver LLR buffer capacity and packet size of the outgoing transmission such that receiver LLR buffer capacity is not exceeded. Any combination of receiver LLR bit width adjustment, demodulator selection, and encoder code rate adjustment can be practiced to reduce LLR buffer size required while maintaining performance.
US08873668B2	Communications arrangement for a system in package A circuit includes a first n-bit communications block and a second m-bit communications block. A controller is configured to control mode of operation for the first and second communications blocks. In a first mode, the first and second communications blocks function as a single communications block for n+m bit communications. In a second mode, the first and second communications blocks operate as substantially independent communications block for n bit communications and m bit communications.
US08873659B2	Reduced pair Ethernet transmission system A system for reduced pair Ethernet transmission. The system includes an interleaver that is operable to receive sets of four code symbols from a physical channel sub-layer (PCS) encoder, wherein each code symbol of each set of four code symbols is associated with one of four channels, and interleave the sets of four code symbols to generate a plurality of interleaved code symbols. The system further includes a serializer that is operable to serialize the plurality of interleaved code symbols to generate a plurality of interleaved and serialized code symbols. The system further includes a transmitter that is operable to transmit the plurality of interleaved and serialized code symbols over an Ethernet medium comprising a single twisted pair of wires.
US08873658B2	Apparatus and method for transmitting data using a plurality of carriers An apparatus for receiving signals includes a receiver for receiving a time domain signal from a transmitter, wherein at least one first information bit is mapped, resulting in at least one first mapped symbol; at least one second information bit is mapped, resulting in at least one second mapped symbol; the at least one second mapped symbol is multiplied by at least one third information bit; and the time domain signal is generated from the at least one first mapped symbol and the at least one second mapped symbol.
US08873655B2	Sending information at a band edge within an orthogonal frequency-division multiplexing (OFDM) symbol Technology is discussed for increasing the spectral efficiency of an Orthogonal Frequency-Division Multiplexing (OFDM) symbol. Spectral efficiency can be increased by adding information to a band edge of the OFDM symbol in connection with measures taken to reduce OOB spectral leakage from the OFDM symbol. Spectral leakage reduction measures can include application of a tapering window to at least a portion of OFDM data in the time domain to reduce power in side-lobes in the frequency domain. In some examples, such measures can comprise reducing transmission power at certain frequencies for a set of adjacent sub-carriers within the OFDM symbol at or near the band edge of the OFDM symbol. The additional bandwidth at the OFDM symbol can be used for many different applications, such as, without limitation, Device-to-Device (D2D) communication and/or Machine-to-Machine (M2M) communication.
US08873654B2	Method for improving channel estimation performance in dynamic spectrum access multicarrier systems A method for improving channel estimation performance in dynamic spectrum access multicarrier systems is disclosed. The method includes determining a pattern of pilot symbols to be included in transmitted signals sent from a sender to a receiver through an interference-affected propagation environment by deriving a covariance matrix of interference and white Gaussian noise (Rww) based on external measurements for the propagation environment, determining the placement of a predetermined number of equally powered pilot symbols by computing a placement that results in the minimum sum of square errors of a maximum likelihood channel estimation performed based on the covariance matrix, and with the pilot symbols in their placed positions, determining a relative power distribution between the placed pilot symbols by computing the power distribution that results in the minimum sum of square errors of a maximum likelihood channel estimation performed based on the covariance matrix.
US08873651B2	OFDM generation apparatus in a multi-carrier data transmission system An OFDM generation apparatus and methods for generating OFDM transmission signals from OFDM symbols, each including a plurality of OFDM subcarriers, for transmission in a multi-carrier data transmission system, is provided. The provided apparatus and method may use a selected mixing frequency for mixing complex time-domain samples of OFDM symbols from a baseband frequency up to a passband frequency to obtain OFDM transmission signals, wherein the mixing frequency is selected such that common phase rotations of the OFDM subcarriers of OFDM symbols with respect to adjacent OFDM symbols of the OFDM transmission signals are avoided or compensated after the mixing. Additional apparatuses and methods for avoidance or compensation of such common phase rotations are also provided.
US08873650B2	Configurable spatial channel information feedback in wireless communication system A method for configurable spatial channel information feedback in wireless communication systems is disclosed including receiving, at the wireless communication device, transmission from a plurality of antennas, receiving an indication of a feedback mode for feeding back spatial channel information that is based on correlations among at least some of the plurality of antennas, decomposing a correlation matrix representative of the correlations among at least some of the plurality of antennas into at least two Kronecker components, and feeding back parameters representative of the Kronecker components according to the feedback mode indicated.
US08873649B2	Method and apparatus for generating code sequence in a communication system Disclosed are a method for generating a code sequence that can be used for acquisition of initial synchronization, cell detection, channel estimation, etc. in a mobile communication system, and a transmitter. A method for generating a code sequence in a transmitting side of a mobile communication system includes combining at least two code sequences with each other, and converting a code sequence generated by the combining step into a time domain signal.
US08873647B2	Multi-reference clock synchronization techniques Efficient synchronization techniques that support multiple reference clocks in an EQAM device. Consider a plurality of different modulators in the EQAM device receiving data from a corresponding plurality of different sources having corresponding different timing references (i.e., different source reference clocks). To accommodate this, the modulators all operate using a common system clock, and each modulator is provided with a phase synchronizer. The phase synchronizer synchronizes the modulated symbol phases to the corresponding reference clock.
US08873642B2	Video content analysis methods and systems An exemplary method includes a video content analysis system capturing a first set of video frames representative of a first video content instance and a second set of video frames representative of a second video content instance, applying a morphing heuristic to at least one of the first and second sets of video frames to result in the first and second sets of video frames having a common aspect ratio, a common resolution, and a common container, frame synchronizing, subsequent to the applying of the morphing heuristic, the first and second sets of video frames, and performing a comparative analysis of the frame synchronized first and second sets of video frames. Corresponding methods and systems are also disclosed.
US08873640B2	Wide-band multi-format audio/video production system with frame rate conversion A multi-format digital video production system enables a user to process an input video program to produce an output version of the program in a final format which may have a different frame rate, pixel dimensions, or both. An internal production format of 24 fps is preferably chosen to provide the greatest compatibility with existing and planned formats associated with HDTV standard 4:3 or widescreen 16:9 high-definition television, and film. Images are re-sized horizontally and vertically by pixel interpolation, thereby producing larger or smaller image dimensions so as to fill the particular needs of individual applications. Frame rates are adapted by inter-frame interpolation or by traditional schemes, including “3:2 pull-down” for 24-to-30 fps conversions. Simple speed-up (for 24-to-25 conversions) or slow-down (for 25-to-24 conversions) for playback, or by manipulating the frame rate itself using a program storage facility with asynchronous reading and writing capabilities. The step of converting the signal to a HDTV format is preferably performed using a modified upconversion process for wideband signals (utilizing a higher sampling clock frequency) and a resizing to HDTV format frame dimensions in pixels.
US08873639B2	System and method for demultiplexing an MPEG-2 transport stream A system and method for demultiplexing an MPEG-2 Transport Stream (TS), is disclosed. In one embodiment, a method of demultiplexing an MPEG-2 TS includes receiving the TS via a system interface, managing the TS via a TS manager, and managing parsing of the TS via a parser manager. Further, the method includes creating a media data stream by parsing the TS via one or more parsers within the parser subsystem, and creating a plurality of decodable units from the media data stream via a framer.
US08873637B2	Hardware pixel processing pipeline and video processing instructions A hardware pixel processing pipeline and a video processing instruction set accelerate image processing and/or video decompression. The pixel processing pipeline uses hardware components to more efficiently perform color space conversion and horizontal upscaling. Additionally, the pixel processing pipeline also reduces the size of its output data to conserve bandwidth. A specialized video processing instruction set allows further acceleration of video processing or video decoding by allowing receipt of a single instruction to cause multiple addition operation or interpolation of multiple pairs of pixels in parallel.
US08873635B2	Image coding method, image decoding method, image coding apparatus, and image decoding apparatus An image coding method includes: deriving a candidate for a motion vector predictor from a neighboring motion vector; adding the candidate to a list; selecting a motion vector predictor from the list; coding a current block; and coding a current motion vector. In the deriving, the candidate is derived according to a first derivation scheme when each of a current reference picture and a neighboring reference picture is determined to be a long-term reference picture, and the candidate is derived according to a second derivation scheme when each of a current reference picture and a neighboring reference picture is determined to be a short-term reference picture.
US08873633B2	Method and apparatus for video encoding and decoding A method and apparatus for encoding a skip macroblock by dividing the skip macroblock into smaller skip sub blocks and using predictive motion vectors predicted from motion vectors of blocks adjacent to the skip sub blocks, and a method and apparatus for decoding the skip macroblock is provided. Accordingly, by adding predetermined binary information indicating whether the skip macroblock is divided to the skip macroblock that generally transmits only prediction mode information, division of the skip macroblock can be adaptively applied, or all skip macroblocks can be divided into sub-blocks to be processed, so that pixel values in the skip macroblock can be predicted by using motion vectors of spatially adjacent blocks. Therefore, prediction efficiency increases.
US08873632B2	Interpolation of video compression frames Coding techniques for a video image compression system involve improving an image quality of a sequence of two or more bi-directionally predicted intermediate frames, where each of the frames includes multiple pixels. One method involves determining a brightness value of at least one pixel of each bi-directionally predicted intermediate frame in the sequence as an equal average of brightness values of pixels in non-bidirectionally predicted frames bracketing the sequence of bi-directionally predicted intermediate frames. The brightness values of the pixels in at least one of the non-bidirectionally predicted frames is converted from a non-linear representation.
US08873628B2	Electronic device and method of operating the same An electronic device and a method of operating the electronic device are provided. The method includes obtaining a first image including an interesting object and at least one peripheral object, obtaining relevance of the at least one peripheral object with respect to the interesting object based on at least one of attributes including a state, a motion, and a location of the interesting object, and replacing an area of the whole area of the first image, which is occupied by the interesting object and the other remaining peripheral objects than a specific peripheral object determined based on the relevance, with a second image. According to the embodiments of the present invention, the electronic device and method may provide a vivid video conference.
US08873625B2	Enhanced compression in representing non-frame-edge blocks of image frames Using fewer bits to indicate the prediction mode used for encoding some of the non-frame-edge blocks of a frame. In an embodiment, fewer bits are used in case of boundary blocks of a slice, or slice group. In another embodiment, fewer bits are used when adjacent blocks are encoded using inter-frame coding or switchable intra-frame coding and such adjacent block cannot be used in predicting a block.
US08873620B2	Apparatus and method for encoding and decoding signals New capabilities will allow conventional broadcast transmission to be available to mobile devices. A method is described including the steps of receiving data, encoding the data using a first encoding process, inserting training data into the encoded data, and encoding the encoded data and the training data using a second encoding process. An apparatus is also described including a first encoder receiving at least a portion of data and encoding the portion of data using a first encoding process, a training data inserter inserting training data into the first encoded data, and a second encoder encoding the first encoded data and the training data using a second encoding process.
US08873614B1	Method and apparatus for using dual-viterbi algorithms to estimate data stored in a storage medium A system including a storage medium, a demodulator, and a decoder. The demodulator is configured to receive an input signal from the storage medium and demodulate the input signal. The decoder is configured to estimate data stored in the storage medium by decoding the demodulated input signal to provide an output signal. The decoder includes a filter and first and second processors. The filter is configured to generate a first equalized signal based on the output signal. The first processor is configured to, based on the first equalized signal and a first Viterbi algorithm, generate a first estimate of the data and an estimate of noise. The second processor is configured to generate a second estimate of the data based on the first estimate of the data, the estimate of the noise, and a second Viterbi algorithm. The output signal includes the second estimate of the data.
US08873610B2	IQ baseband matching calibration technique The first and second outputs of a signal generation system are coupled to the first and second inputs of a signal digitizing system via respective electrical conductors. A controller directs the generation system to generate a first calibration signal, and the digitizing system responsively captures a first set of vector samples. The conductors are then reconfigured so they connect the first and second outputs of the generation system respectively to the second and first inputs of the digitization system. The controller then directs the generation system to generate a second calibration signal, and the digitizing system responsively captures a second set of vector samples. The controller or other processing agent computes gain and/or phase impairments using the first and second vector sample sets. Digital filter parameters may be computed based on the computed impairment(s), and used to correct the impairment(s) of the generation system and/or the digitizing system.
US08873602B2	Method and device for transmitting sounding reference signal in multi-antenna system The present invention discloses a method and a device for transmitting sounding reference signal in a multi-antenna system, wherein the method includes acquiring antenna grouping information, and grouping antennas according to the antenna grouping information; and transmitting SRS on the respective antennas, wherein different antenna groups transmit the SRS in different frequency bands at a same moment. With the present invention, the interference with a base station of an adjacent cell in a certain frequency band is enabled to be reduced.
US08873601B2	Laser with non-linear optical loop mirror A laser (12, 18) with a laser resonator (13), the laser resonator (13) having a non-linear optical loop mirror (1, 1′), NOLM, which is adapted to guide counter-propagating portions of laser pulses, and to bring the counter-propagating portions of laser pulses into interference with each other at an exit point (4) of the NOLM (1, 1′). The non-linear optical loop mirror (1, 1′) has a non-reciprocal optical element (7, 7′).
US08873599B2	Gas laser device A tri-axially orthogonal gas laser device in which an optical axis of an optical resonator, a direction in which a laser gas is supplied into the optical resonator, and a direction of discharge for exciting the laser gas are mutually orthogonal to one another, the device including: an exciting unit including a blower supplying the laser gas in −X direction to the optical axis of the optical resonator, and a discharge electrode pair which is shifted on a gas upstream side with respect to the optical axis; and an exciting unit including a blower for supplying the laser gas in +X direction to the optical axis of the optical resonator, and a discharge electrode pair which is shifted on a gas upstream side with respect to the optical axis
US08873598B2	Waveguide-type optical semiconductor device A waveguide-type optical semiconductor device includes a substrate with a main surface; a structure including a stacked semiconductor layer including a core layer provided on the main surface of the substrate, a stripe-shaped mesa portion protruding in a first direction orthogonal to the main surface and extending in a second direction parallel to the main surface, and a pair of stripe-shaped grooves defining the stripe-shaped mesa portion and extending in the second direction; a protrusion provided in the pair of stripe-shaped grooves, the protrusion protruding from the structure in the first direction; and a resin portion covering a side face of the protrusion, the resin portion being buried in the stripe-shaped grooves. The relative position of the protrusion with respect to the structure is fixed. In addition, the side face of the protrusion intersects with the second direction when viewed from the first direction.
US08873592B1	System and method for adding a low data rate data channel to a 100Base-T ethernet link A system and method is disclosed for adding a low data rate data channel to a 100Base-T Ethernet link without significantly impacting an IEEE defined 100Base-T protocol for the Ethernet link. A dual data channel transmitter encodes a high data rate data stream in an MLT-3 encoder and encodes a low data rate data stream using bit representations that are not valid bit representations in the MLT-3 encoder. The dual data channel transmitter transmits both of the encoded bit streams in a dual data stream. A dual data channel receiver receives the dual data stream and separates and decodes the two bit streams. A low data rate data channel is provided in conjunction with a high data rate data channel without significantly impacting the operation of the high data rate data channel.
US08873586B2	Network combining wired and non-wired segments A local area network (60) within a residence or other building, including both wired (5) and non-wired segments (53). The wired segments are based on new or existing wires (5a, 5b, 5c, 5d, 5e) in the building, wherein access to the wires is provided by means of outlets (61a, 61d), such as a telephone system, electrical power distribution system, or cable television wiring system. The non-wired segments are based on communication using propagated waves such as radio, sound, or light (e.g. infrared). The wired and non-wired segments interface in the outlet, using a module (50) that serves as mediator between the segments. The module can be integrated into the outlet, partially housed in the outlet, or attached externally to the outlet. Such a network allows for integrated communication of data units (24b) connected by wires and data units (24a, 24d) connected without wires.
US08873582B2	Method for transmitting PPDU in wireless local area network and apparatus for the same A method of transmitting a data block in a wireless communication system is provided. The method includes generating a data block used for multi-user transmission, the data block comprising a first control field and a data field for a plurality of users, the first control field indicating multi-user transmission of the data block, the data field comprising a plurality of data units, each data unit comprising a PSDU(PLCP(Physical Layer Convergence Procedure) Service Data Unit) for each user and padding bits which are appended to the PSDU for each user; and transmitting the data block to the plurality of users; wherein the number of the padding bits in each data unit is determined so that lengths of the plurality of data units are same and the number of the padding bits in each data unit is determined by Nsym, NDBPS,k, NPSDU,k, where Nsym denotes the number of OFDM symbols of the data field, NDBPS,k denotes the number of data bits per OFDM symbol for k-th user, and the NPSDU,k denotes the length of the PSDU for k-th user.
US08873575B2	Network combining wired and non-wired segments A local area network (60) within a residence or other building, including both wired (5) and non-wired segments (53). The wired segments are based on new or existing wires (5a, 5b, 5c, 5d, 5e) in the building, wherein access to the wires is provided by means of outlets (61a, 61d), such as a telephone system, electrical power distribution system, or cable television wiring system. The non-wired segments are based on communication using propagated waves such as radio, sound, or light (e.g. infrared). The wired and non-wired segments interface in the outlet, using a module (50) that serves as mediator between the segments. The module can be integrated into the outlet, partially housed in the outlet, or attached externally to the outlet. Such a network allows for integrated communication of data units (24b) connected by wires and data units (24a, 24d) connected without wires.
US08873573B2	Transmission scheduling apparatus and method in wireless multi-hop network In a wireless multi-hop network, a transmission scheduling apparatus calculates a transmission demand of every node within the wireless multi-hop network, and allocates a time slot to each node by using the transmission demand of each node.
US08873572B2	Association update message and method for updating associations in a mesh network An association update message for mesh networks according to the IEEE 802.11s standard provides the ability to include a plurality of associations in an association update message and thus ensure simultaneous updating of a plurality of associations of representative nodes with respect to the proxy nodes (proxy mesh stations) thereof. A threatened inconsistency in an association update in conventional systems, which provides for only one transmission of an association update message per association update, is thereby eliminated. The proxy information field has an identification field with a plurality of identification fields. The identification fields advantageously allow variable structuring of the proxy information fields, that is, dependent on the information transmitted, which also provides the ability to prevent redundant information in the proxy information fields.
US08873571B2	Distributing information Information related to a set of networks from a first node to a second node of a communication system can be distributed. A set of identifiers which belong to the set of networks can be stored at the first node. Hash values are generated at the first node for the identifiers in the set of identifiers using a hash function. The generated hash values are transmitted from the first node to the second node. The second node determines an identifier of a particular network available for communicating with the second node. The second node generates a hash value for the identifier using the hash function. The second node compares the hash value of the identifier with the hash values received at the second node from the first node to determine whether the particular network belongs to said set of networks.
US08873569B2	User centric virtual network and method of establishing the same Provided is a method of establishing a user centric virtual network. The method includes: performing a first tunneling operation between a first tunnel end and an address translation device, which are connected to a first private network, and a tunnel relay device; performing a second tunneling operation between a second tunnel end and an address translation device, which are connected to a second private network, and the tunnel relay device; and performing a third tunneling operation between the tunnel relay device and an end client, wherein a virtual IP is allocated to each of the first and second tunnel ends, the address translation devices, the end client, and the tunnel relay device; and each of the first to third tunneling operations connects routing information on the virtual IP to a corresponding tunnel.
US08873567B1	Providing routing information to support routing by port groups via corresponding network paths Techniques for providing routing information of a first router device supporting multi-path routing from a second router device to a destination node. In an embodiment, multiple egress ports of the first router device are coupled to a second router device, where port groups of the second router device correspond to multiple network paths to the destination node. A routing engine of the first router device may forward packets to the destination node based on a set of entries in a routing table. In another embodiment, the set of entries defines for each of the multiple egress ports of the first router device a correspondence to only a respective one of the port groups of the second router device.
US08873566B2	Specifying priority on a virtual station interface discovery and configuration protocol response An apparatus comprising an Edge Virtual Bridging (EVB) bridge coupled with an EVB station wherein the EVB bridge is configured to communicate to the EVB station a Filter Information (Info) field of a virtual station interface (VSI) discovery and configuration protocol (VDP) Associate Response message, and wherein the Filter Info field specifies a default Priority Code Point (PCP) value associated with at least one or all of a plurality of VID values carried by that VDP TLV Response.
US08873565B2	Method and apparatus of delivering upstream data in ethernet passive optical network over coaxial network An apparatus for interconnecting a fiber-optic network and a coax network comprising a coax line terminal (CLT) configured to couple to an optical line terminal (OLT) at the fiber-optic network and a plurality of coax network units (CNUs) at the coax network and to cache data received from the CNUs and forward the cached data to the OLT upon receiving a message from the OLT that assigns a transmission cycle for a specified CNU, wherein the CLT forwards the cached data to the OLT upon receiving the message regardless of whether the cached data corresponds to the specified CNU.
US08873562B2	Apparatus and method for media data classification in mobile communication system A media data classification is provided. A Serving GPRS Supporting Node (SGSN) for indicating an IP Multimedia Subsystem (IMS) data flow in a mobile communication system includes a communication module for communicating with other nodes; and a media flow manager for communicating with the other nodes through the communication module, receiving a Packet Data Protocol (PDP) context activation message, and transmitting a PDP context generation message by including information indicative of IMS data when there is the information indicative of the IMS data.
US08873561B2	Supporting enhanced media communications using a packet-based communication link A method for supporting communications includes establishing a packet-based audio communication link with a remote device and informing a local computing device of the audio communication link. A message requesting identification of enhanced media capabilities associated with the remote device is received from the local computing device and tunneled in the audio communication link to the remote device. A tunneled response in the audio communication link is received from the remote device and forwarded to the local computing device. The response identifies the enhanced media capabilities associated with the remote device.
US08873560B2	Multipath video streaming over a wireless network The method and system as disclosed relates to streaming of large quantities of time critical data over multiple distinct channels from a wireless communications device to a central receiver. More specifically the disclosure deals with the challenges and problems of maintaining consistent data reception quality when faced with the anomalies of a moving sender that is sending data using a relatively unstable radio frequency (RF) method. This is achieved by converting single source data into multiple data streams, placing them in transport buffers and storing them for forwarding. A plurality of radio frequency modules provide wireless connectivity to a plurality of wireless network. Links are maintained to provide feedback on network connections to allow for the transfer of data from one network to another and to adjust the amount of data being transmitted.
US08873550B2	Task queuing in a multi-flow network processor architecture Described embodiments generate tasks corresponding to each packet received by a network processor. A destination processing module receives a task and determines, based on the task size, a queue in which to store the task, and whether the task is larger than space available within a current memory block of the queue. If the task is larger, an address of a next memory block in a memory is determined, and the address is provided to a source processing module of the task. The source processing module writes the task to the memory based on a provided offset address and the address of the next memory block, if provided. If a task is written to more than one memory block, the destination processing module preloads the address of the next memory block to a local memory to process queued tasks without stalling to retrieve the address of the next memory block.
US08873547B2	Method for performing gate coordination on a per-call basis Network resources for a call between a calling party and a called party are allocated. The network resources for the call are reserved based on a reservation request. The network resources are reserved before any one network resource from the reserved network resources is committed. The reserved network resources for the call are committed when a called party indicates acceptance for the call.
US08873545B2	Gateway apparatus, system and method A gateway apparatus receives a call control signal and/or a packet that has voice data stored therein in a predetermined protocol or payload format from an access point, converts a protocol of the call control signal and/or a protocol or payload format of the packet into a circuit switched protocol used when an RNC connects to the circuit switching equipment for output to the circuit switching equipment, receives a call processing signal that uses the protocol as that used when the circuit switching equipment outputs to the RNC and a voice signal that uses the same protocol, converts protocol of the call processing signal and/or the voice signal for output to the access point.
US08873535B2	Systems, methods and apparatus for retransmitting protocol data units in wireless communications Systems, devices, and methods for retransmitting protocol data units in wireless communication are provided. In one aspect, a device configured to communicate via a wireless communication link includes a processor. The processor is configured to transmit a plurality of protocol data units (PDUs) to a receiving device, select a first PDU from a set of PDUs that has not been acknowledged by the receiving device, retransmit the first selected PDU with a first poll indicator, select a second PDU from the set, and retransmit the second selected PDU with a second poll indicator. The second PDU is different than the first PDU. In some aspects, the PDUs are selected based on the PDUs' original transmission time. In other aspects, the PDUs may be selected based on the PDU's most recent transmission time.
US08873534B2	Enhanced channel interleaving for optimized data throughput In a transmission scheme wherein multi-slot packet transmissions to a remote station can be terminated by an acknowledgment signal from the remote station, code symbols can be efficiently packed over the multi-slot packet so that the remote station can easily decode the data payload of the multi-slot packet by decoding only a portion of the multi-slot packet. Hence, the remote station can signal for the early termination of the multi-slot packet transmission, which thereby increases the data throughput of the system.
US08873530B2	System and method for universal wireless distribution Systems and methods are disclosed to provide a bridge for a wireless distribution system compatible with legacy equipment, including the use of a bridge device having two WLAN modules, with the first WLAN module associating with one or more stations and the second WLAN module configured to associating with a legacy access point. Frames received by the first WLAN module are forwarded to the second WLAN module for transmission and frames received by the second WLAN module are forwarded to the first WLAN module for transmission on the basis of address information in the frames.
US08873525B2	Method and apparatus for sounding multiple stations One or more stations to provide sounding feedback in response to a training signal sequence are determined, and a schedule for the one or more stations to provide sounding feedback is determined based on capabilities of the one or more stations to transmit sounding feedback at a defined time period after an end of the training signal sequence. A communication frame is generated that includes i) an indication of a request for the plurality of stations to provide sounding feedback corresponding to the training signal sequence, and ii) an indication of when the one or more stations are to transmit sounding feedback. The communication frame is transmitted along with the training sequence.
US08873524B2	Method and apparatus for providing channel sharing among white space networks A method and an apparatus for providing channel sharing are disclosed. For example, the method receives a request for a white space channel assignment, and identifies one or more white space channels in accordance with the request. The method sends a response to the request comprising a white space channel assignment, wherein the white space channel assignment assigns one of the identified one or more white space channels.
US08873516B2	Communication system using OFDM for one direction and DSSS for another direction A method and apparatus for wireless communication are described. In one embodiment, a method for communicating with a subscriber comprises transmitting orthogonal frequency domain multiplexing (OFDM) signals to the subscriber, and receiving direct-sequence spread spectrum (DSSS) signals from the subscriber.
US08873510B2	Gateway selection method, apparatus and system during heterogeneous network handover Embodiments of the present invention disclose a gateway selection method for heterogeneous networks, where the method includes: accessing, by a terminal, an access network 1; obtaining, by the terminal, an equipment identity of a core network element 1; accessing, by the terminal, an access network 2, where the access network 2 and the access network 1 are heterogeneous networks; and sending, by the terminal, the obtained equipment identity of the core network element 1 to a core network element 2, and if an equipment identity of the core network element 2 is different from the equipment identity of the core network element 1, selecting the core network element 1 as a target gateway. Accordingly, the embodiments of the present invention further provide a terminal, a core network element, and a communication system.
US08873507B2	Distributed local mobility anchors for achieving optimized mobility routing A method and system for optimizing mobility routing are disclosed. A preferred embodiment comprises a home local mobility anchor and two or more distributed local mobility anchors, wherein the distributed local mobility anchors have a reduced functionality from the home local mobility anchor. A first distributed local mobility anchor may send an initial data packet from a correspondent node to the home local mobility anchor, which may route the initial data packet to a second distributed local mobility anchor where a mobile node is anchored while also sending the location of the mobile node back to the first distributed local mobility anchor. Subsequent packets can be sent by the first distributed local mobility anchor directly to the second distributed local mobility anchor and bypassing the home local mobility anchor.
US08873499B2	User apparatus, base station apparatus, and method A user apparatus generates an uplink control channel including at least one of acknowledgement information and channel condition information on an downlink, and transmits the uplink control channel in a predefined dedicated band if no resource is assigned to transmit an uplink data channel. The uplink control channel includes multiple unit block sequences resulting from multiplication of the same factor with all chips of a CAZAC code sequence for the user apparatus.
US08873493B2	Method and apparatus of transmitting uplink signal A method and apparatus for transmitting an uplink signal are disclosed. The method for transmitting an uplink signal by a communication apparatus in a wireless communication system includes channel encoding control information, and multiplexing the channel encoded control information with a plurality of data blocks by performing channel interleaving, wherein the number of channel encoded symbols for the control information is determined using an inverse number of the sum of a plurality of spectral efficiencies (SEs) for initial transmission of the plurality of data blocks.
US08873492B2	Method for selecting an A-interface resource in a mobile communication system A preferred A-interface resource on a first connection leg is determined by a mobile switching center server based on information on capabilities of a base station subsystem and on characteristics of second connection leg of a connection. A request message is transmitted to the base station subsystem, which requests a connection according to the preferred A-interface resource. The request message is processed by the base station subsystem and an A-interface resource is selected for the user plane connection.
US08873490B2	Uplink control channel resource allocation for semi-persistent scheduling of user equipment A method includes determining semi-persistent scheduling acknowledge/negative acknowledge (SPS AN) resources; configuring as a first metric for each SPS AN resource a number of user equipments (UEs) for which the SPS AN resource has been configured but is not activated; configuring as a second SPS AN resource a count of a number of sub-frames in which the SPS AN resource has been activated for a UE; configuring as a third metric for each SPS AN resource a number of UEs for which the resource is configured but some other SPS AN resource is allocated; forming a fourth metric using the first, second and third metrics; selecting N SPS AN resources from the SPS AN resources based at least on the fourth metric; and selecting one of the N SPS AN resources based at least on the fourth metric when the UE is activated for SPS operation.
US08873489B2	Signaling methods for UE-specific dynamic downlink scheduler in OFDMA systems Signaling methods for UE-specific downlink control channels in OFDMA systems are provided. In a first method, a dynamic downlink signaling in cell-specific radio resources is used to signal UE-specific downlink control channel in UE-specific radio resources. In LTE, a specific DCI format in PDCCH is used to dynamically signal the UE-specific downlink control channel X-PDCCH that resides in legacy PDSCH region. In a second method, a semi-static higher-layer signaling is used to signal UE-specific downlink control channel in UE-specific radio resources. In LTE, RRC signaling is used to semi-statically signal the UE-specific downlink control channel X-PDCCH that resides in legacy PDSCH region. By using UE-specific downlink control channels, significant control overhead reduction can be achieved.
US08873488B2	Method and apparatus for transmitting synchronization signals in an OFDM based cellular communications system Provided is a method and apparatus for transmitting a synchronization signal for cell search in an Orthogonal Frequency Division Multiplexing (OFDM) communications system. The method includes acquiring Primary Synchronization CHannel (P-SCH) sequence and Secondary Synchronization CHannel (S-SCH) sequence; mapping the P-SCH sequence and the S-SCH sequence onto subcarriers; generating OFDM symbols including the P-SCH sequence and the S-SCH sequence mapped onto subcarriers; and transmitting the OFDM symbols, wherein a frame comprising a plurality of OFDM symbols, a part of the plurality of OFDM symbols in the frame is used for transmitting Synchronization CHannel (SCH) comprising P-SCH and S-SCH, and wherein the P-SCH and the S-SCH are mapped to adjacent OFDM symbols and the S-SCH is mapped to subcarriers with a predetermined interval in a frequency domain within an OFDM symbol.
US08873487B2	Communications device and method in a high-capacity wireless communication system The present invention relate to a wireless communication system; and, more particularly, to a communicating apparatus and method in a high rate wireless communication system.A transmitting method of data in accordance with an embodiment of the present invention, as a transmitting method of data in a high rate wireless communication system, includes: allocating one or more bands among two or more multi-bands to each of users; and simultaneously transmitting data through the allocated bands to two or more users by using the multiple antennas for the allocated respective bands.
US08873486B2	Method for communicating in a mobile network The present invention relates to a method for communicating between a primary station and a plurality of secondary stations, comprising (a) the primary station configuring a secondary station to search on a first channel at least one of a plurality of search spaces having a first structure, said first structure consisting of at least a first number of resource sets, where at least one resource set might be used to transmit a message to a secondary station, (b) the primary station setting a characteristic of the first channel to a first value. (c) the primary station changing the characteristic of the first channel to a second value upon detection of a capacity event in the search spaces.
US08873482B2	Method and system for virtualizing a cellular basestation A network virtualization method in a wireless communication system includes aggregating sets of uplink and downlink flows on a cellular basestation into groups; allocating wireless resources to each of the sets as a respective basestation slice; and enabling each of the sets of flows to be under a distinct administrative entity.
US08873476B2	Method for network entry in a wireless communication system A method for network entry in a wireless communication system is disclosed. The method includes receiving an Advanced Air Interface Ranging Response (AAI_RNG-RSP) message including an unsolicited bandwidth indicator from a Base Station (BS), the unsolicited bandwidth indicator indicating that the BS will allocate an uplink bandwidth to the MS, for transmission of a Medium Access Control (MAC) message, without solicitation from the MS, and monitoring an Advanced MAP Information Element (A-A-MAP IE) for a predefined time after the reception of the AAI_RNG-REQ message.
US08873472B2	System and method for allocating resources in a communication system A method and system for allocating resources in a communication system are provided. The system includes a Base Station (BS) for allocating persistent resources included in a persistent resource area to one or more a Mobile Stations (MS) using the persistent resource area, for allocating an Identifier (ID) indicating an allocation order of the persistent resources to each of the one or more the MS using the persistent resource area, for transmitting resource allocation information including the ID and the number of slots included in the persistent resources to each of the one or more MSs using the persistent resource area, and for allocating dynamic resources to one or more MSs using a dynamic resource area, after the persistent resource allocation is completed for all of the one or more MSs using the persistent resource area. The persistent resource area includes successive persistent resources along a time axis and along a frequency axis.
US08873469B2	Method and apparatus for reducing access latency in a wireless communication system To reduce latency in accessing a wireless communication system, which is highly desirable for time sensitive applications such as push-to-talk call, a wireless device performs an overhead update procedure and a transmit clock synchronization procedure in parallel. The overhead update procedure obtains up-to-date overhead information from the system, such as access parameters used to access the system. The transmit clock synchronization procedure updates transmit timing to current system time, e.g., resets a long or scrambling code and pseudo-random number (PN) sequences used to transmit signaling to the system. After the overhead information has been updated and the transmit clock synchronization procedure has been completed, the wireless device performs an access probe procedure to send signaling (or access probes) to the system to attempt to access the system.
US08873468B1	Embedded access point A device includes a first processing unit and an interface configured to communicate with an embedded access point including a wireless communication module configured to establish (i) a first wireless connection with a first station, and (ii) a second wireless connection with a separate access point. The device further includes a second processing unit configured to control a first wireless network including the device and the first station to operate the embedded access point as an access point for the first wireless network, and operate the embedded access point as a station in a second wireless network that includes the embedded access point and the separate access point. The separate access point provides access point functionality for the second wireless network, and the embedded access point is configured to be powered via the interface.
US08873460B2	Packet sniffer for ad hoc network A sniffer for an ad-hoc network including an RF transceiver for receiving network packets from the ad-hoc network, the RF transceiver being operable to receive the network packets without the sniffer being connected to the ad-hoc network; a microprocessor connected to the RF transceiver for processing the network packets to create associated FIFO packets; a memory connected to the microprocessor for storing the associated FIFO packets, and a communications interface for receiving the associated FIFO packets from the memory and for transmitting the associated FIFO packets to a computer.
US08873458B2	Receiver for interleave division multiplexing cooperative diversity and power allocation algorithm thereof Disclosed is a receiver in a cooperative diversity system including one or a plurality of relays. The receiver includes: a detection unit configured to detect each of signals transmitted from the one or more relays, the one or more signals being generated by the one or more relays and by interleaving a signal from a transmitter; a deinterleaver configured to deinterleave each of the detected signals; a decoder configured to decode and each of the deinterleaved signals thereby to output one or more decoded signals; and an interleaver configured to interleave each of the one or more decoded signals thereby to output one or more interleaved signals, wherein the detection unit receives the one or more interleaved signals and compares them with the respective detected signals to discriminate the original signal transmitted by the transmitter.
US08873451B2	Resource allocation method for dynamic multiplexing of multimedia broadcast multicast service A resource allocation method for dynamic multiplexing of Multimedia Broadcast Multicast Service (MBMS) can be used to improve resource utilization efficiency when multimedia multicast services share a channel. A network side device configures a Modulation and Coding Scheme (MCS) for said logical channels or the Multicast/Broadcast over Single Frequency Network (MBSFN) subframes bearing said logical channels according to the transmission requirements of logical channels, and implements modulation and coding processing for the data of Physical Multicast Channel (PMCH) borne by MBSFN subframes bearing said logical channels by using said MCS. The network side device can employ different modulation and coding in the physical layer according to different Quality of Service (QoS) requirements of different logical channels of MBMS services, thereby achieving the purpose of improving resource utilization efficiency and satisfying different service requirements.
US08873449B2	Methods and apparatus to maintain call continuity Example methods and apparatus to maintain call continuity are disclosed. A disclosed example method to authorize a request with service information (SI), including detecting whether the SI pertains to an existing Internet Packet (IP) flow, when the SI pertains to an existing IP flow, detecting whether the existing IP flow includes circuit switched (CS) media, and when the existing IP flow includes CS media, determining a response to the request independent of a CS media indicator.
US08873447B2	Method for content synchronization when broadcasting data in a wireless network The present invention relates to an arrangement and method for content synchronization when broadcasting data from an infrastructure node in a communication network. The arrangement comprises a receiver receiving data sequences and a transmitter for transmitting data sequences. Each data sequence has a data size and comprises a sequence number (SN). The arrangement further comprises a processing arrangement configured to add byte numbered sequence numbers to said data sequences passed between layers in a protocol stack for transmission to a transceiver station.
US08873446B2	Method and apparatus for supporting multicast of AV data in a network The present invention relates to a multicast supporting method for AV data in a network such as UPnP AV network. In the present invention, it is checked based on protocol information of an object containing media data whether multicasting of the object is supported and, if supported, a multicast address is assigned to the object to which an IP address has not been allocated.
US08873445B2	Processing of a mobile terminated data over signaling message Systems and methods for processing a data over signaling (DoS) message at an access terminal are disclosed. A message is received at an access terminal. The message is decoded to determine if it is a DoS message. Upon detecting the DoS message a sleep delay timer is set to prevent the access terminal from entering a sleep state for a predetermined time.
US08873441B2	Method for LTE downlink scheduling with MIMO A method for LTE or WiMAX scheduling includes collecting, by a basestation BS, channel feedback from multiple mobiles with downlink traffic. The channel feedback enables the BS to determine an achievable rate or block error probability if transmitting to a mobile with a given modulation and coding scheme MCS and multiple-input multiple-output MIMO mode. The method includes determining, by the BS, which of the mobiles is scheduled on each resource block RB and what the MCS and MIMO mode is selected for each scheduled mobile, and allocating bits on the set of the RBs assigned to each scheduled mobile.
US08873440B2	Maintaining different virtual active sets for different cell types To facilitate inbound mobility for an access terminal, different virtual active sets are employed for different types of access points or cells (e.g., HNBs versus macro cells). In addition, different lists of permitted cells are maintained for these different types of access points or cells. Also, a frequency quality estimate for inter-frequency event triggering may be based on measurement of a single cell present in a virtual active set (e.g., a dedicated HNB virtual active set).
US08873434B2	Wireless local area network (LAN) system A situation is circumvented where wireless communication becomes impossible in a wireless LAN system under the influence of a blocking object, noise caused by an electromagnetic wave, or the like. A wireless LAN system comprises: a relay which can communicate with an external system; a master which can communicate with the relay; and a plurality of slaves which can wirelessly communicate with the master, the plurality of slaves including a first group and a second group, the first group comprising an alternative slave having a function of transmitting, when a portion of the slaves cannot receive a synchronization signal from the master, an information signal received from the master to the portion of slaves, and the second group comprising non-alternative slaves and not having the function of transmitting the information signal to the portion of slaves.
US08873433B2	Method of determining immediate topology of a network connection A network test tool can determine if it is linked to directly to an indicated managed device or an intermediate unmanaged device. Discovery protocols and spanning tree are designed to map network topology and eliminate closed loops in networks. As such these management packets are among the first emerging from managed switches immediately upon acquiring a new link. By analyzing the first few packets, with timeouts, the tool can determine with a high degree of accuracy if it is really connected to the advertised nearest switch. If an unmanaged switch exists between the managed switch and tool, the managed switch will not detect the link event therefore not immediately send discovery packets. Once the tool determines it is not linked to the managed switch, further packet analysis can indicated if the intermediate device is a Layer 2 switch or Hub.
US08873432B2	Systems for distributing data over a computer network and methods for arranging nodes for distribution of data over a computer network Various embodiments of the present invention relate to a system for distributing data (e.g., content data) over a computer network and a method of arranging receiver nodes in a computer network such that the capacity of a server is effectively increased (e.g., the capacity of a server may be effectively multiplied many times over; the capacity of the server may be effectively increased exponentially). In one embodiment the present invention may take advantage of the excess capacity many receiver nodes possess, and may use such receiver nodes as repeaters. The distribution system may include node(s) having database(s) which indicate ancestor(s) and/or descendant(s) of the node so that reconfiguration of the distribution network may be accomplished without burdening the system's primary server. An embodiment of the present invention may include a process for configuring a computer information distribution network having a primary server node and user nodes docked in a cascaded relationship, and reconfiguring the network in the event that a user node departs from the network. In one example (which example is intended to be illustrative and not restrictive), the process may include the steps of providing a new user node (or connection requesting user node) with a connection address list of nodes within the network, having the new user node (or connection requesting user node) go to (or attempt to go to) the node at the top of the connection address list, determine whether that node is still part of the distribution network, and connect thereto if it is, and if it is not, to go to (or attempt to go to) the next node on the connection address list. In another example (which example is intended to be illustrative and not restrictive), when a user node departs from the distribution network, a propagation signal may be transmitted to the nodes below it in the network, causing them to move up in the network in a predetermined order.
US08873430B1	System and methods for presenting storage A machine implemented method is provided. The method comprises configuring a target port of a target storage array as a plurality of virtual ports; wherein an application executed by a computing system uses the target port to access storage space at the storage array; presenting the plurality of virtual ports to an operating system instance executed by a computing system processor; and using the plurality of virtual ports to read and write information to the storage space of the target storage array.
US08873429B2	Method and system to dynamically detect and form a master slave network This invention describes a system and method for dynamically establish and maintain a MASTER SLAVE Network among the devices with wireless and wired connectivity. It also provides system and method for maintaining a MASTER SLAVE network in the event where the SLAVE or the MASTER or the server is dead. More importantly, it supports automatic network discovery, establishment and maintenance to provide end to end connectivity by using minimum resources of an enterprise network.
US08873427B2	Method for establishing topology structure of switching equipment, switching equipment and stacking system In the invention, a method for establishing topology structure of switching equipments, a switching equipment and a stacking system are provided. The invention relates to the field of stacking systems in data communication, and the problem of a topology discovery error caused by different starting times of switching equipments is solved. The method comprises the following steps: Step 1, when any one of the following two requirements is met, the switching equipment turns to Step 2, otherwise, the switching equipment executes the Step 1 again, wherein the first one of the two requirements is that the current time exceeds a predetermined time, which is the time for the initialization of all the switching equipments in the stacking system; and the second one of the two requirements is that the switching equipment receives a topology discovery message from another switching equipment in the stacking system; Step 2, the switching equipment sends topology discovery messages to all the other switching equipments in the stacking system; and Step 3, the switching equipment performs a topology discovery. The invention can be applied to a stacking system where switching equipments have different starting times.
US08873425B2	Automatic device detection and configuration in a network-aware print fulfillment engine Disclosed is a system and method for automatically detecting the topology of output devices present in a network, and for automatically configuring those output devices for outputting a specific media type. One or more network devices are present in a computer network environment configured for processing orders for physical and/or electronic photographic prints. Such network devices may have one or more output devices attached thereto for fulfilling consumer orders for photographic prints. In accordance with a particularly preferred embodiment of the invention, the system and method described herein query the network devices to determine the numbers and characteristics of output devices that are attached to and active on each network device, update a listing of such available output devices on an administrative management unit attached to the network, and configure each such output device for outputting specific media types.
US08873421B2	Integrated test packet generation and diagnostics Systems, methods, and apparatus for generating data packets and testing a packet switching system are provided. For example, a data packet diagnostic system includes an input queuing subsystem comprising a set of data queues, an injecting unit, and a diagnostic unit. Each data queue is coupled with a separate functional read/write path and debug read/write path. The injecting unit injects test data packets into at least one of the data queues via its respective debug read/write path. The test packets can then be processed (e.g., routed) through a data packet processing environment. In some implementations, packets are communicated via the data packet processing environment back to the input queuing subsystem, where the diagnostic unit can read present contents of at least one of the data queues to determine whether the present contents satisfy a predetermined test profile according to the injected data packets.
US08873411B2	Provisioning of e-mail settings for a mobile terminal Method and apparatus for provisioning an e-mail service to a mobile terminal in an e-mail system that uses e-mail addresses comprising a domain part. The apparatus maintains a list of good setting parameter sets versus e-mail domain parts. It receives an e-mail address and user authentication information from a user and compares the domain part of the received address with domain parts in the list of good parameter sets. If a match is found, e-mail service is provisioned with the matching parameter set. If no match is found, the apparatus requests and receives further parameters from the user, including an e-mail server address, and provisions the e-mail service with the further parameters. If the provisioning with the further parameters is successful, the domain part and the further parameters are used to generate a new setting parameter set in the list of good setting parameter sets.
US08873410B2	Apparatus and method for collecting and analyzing communications data A method of monitoring data on a first communication line. Data is received from the first communication line (402) and a plurality of packets (406) are extracted (416) from the data. Statistics are then recursively generated (408), the statistics corresponding to the plurality of packets.
US08873405B2	Automated session initiation protocol (SIP) device A device includes a Session Initiation Protocol (SIP) phone, an audio interface for receiving or transmitting audio information with the SIP phone to test a SIP-based network, and a controller for controlling the SIP phone and the audio interface.
US08873404B2	Node device, communication method, storage medium, and network system Anode device includes a transmitter and a processor. The transmitter transmits an inspection frame used in inspecting a status of a route from a source node device to a destination node device. The processor generates a first inspection frame and selects a first node device to which the transmitter transmits the first inspection frame from among candidates for a node device to which a frame addressed to the destination node device is to be forwarded. The processor judges whether a transmission of the first inspection frame has been successfully performed. When the transmission of the first inspection frame has failed, the processor generates a second inspection frame which records a failure in a communication with the first node device. The processor selects a second node device to which the transmitter transmits the second inspection frame from among the candidates.
US08873402B2	Service monitoring and service problem diagnosing in communications network User equipment uses traces of service primitives of one or multiple service sessions to automatically discover a service sequence. Service sequences are refined by analyzing sequences captured during multiple sessions of the same service. A daemon receives from a plurality of user equipment the observed service sequences. The sequences from different user equipment are aggregated. The daemon sends back the refined service sequences to user equipment. User equipment sends a problem report to the daemon and/or a service monitor in the case of a service failure. The daemon or the service monitor aggregates such problem reports and discovers the causes of service degradations.
US08873401B2	Service prioritization in link state controlled layer two networks An apparatus comprising a node configured to maintain a plurality of downloaded forwarding states for a plurality of link state based services that are associated with the node and a plurality of other nodes in a network comprising the node, and a plurality of advertised service identifiers (IDs) that correspond to the link state based services, wherein the service IDs are ordered in sequence from higher priority to lower priority link state based services, and wherein work is instantiated at the node according to the ordered sequence from higher priority to lower priority link state based services.
US08873384B2	Bandwidth indication in RTS/CTS frames Disclosed in an example embodiment is an apparatus comprising a transmitter and processing logic coupled with the transmitter. The processing logic is configured to send data via the transmitter. The processing logic generates a request to send frame. The processing logic encodes data representative of a bandwidth parameter set in the request to send frame. The processing logic transmits the request to send frame via the transmitter.
US08873376B2	Method of obtaining information representative of an availability, a device for obtaining information, and a corresponding computer program A method is provided of obtaining information representative of an availability of a communications network, which includes a plurality of equipment exchanging routing data in accordance with a routing protocol. The method includes a stage of storing in chronological order at least some of the routing data exchanged between at least one first equipment and at least one second equipment; a stage of totaling unavailability times as a function of the routing data stored in chronological order for a predetermined time period; a stage of obtaining the information representative of an availability for the time period as a function of the totaled unavailability times.
US08873375B2	Method and system for fault tolerance and resilience for virtualized machines in a network Hypervisor functions, which may control operations of one or more virtual machines, may be distributed across a plurality of network devices. State information may be stored for the virtual machines on network devices for fault tolerance and resilience. The virtual machines may retrieve stored state information to recover from a fault. The hypervisor may control the storage of the state information. Resources of the network devices may be allocated for fault tolerance and resilience of the virtual machines based on network device parameters, which may include storage capacity, processor usage, access time, communication bandwidth, and/or latency. The state information may include program content, cache content, memory content, and/or register content information, may be stored on a continuous, periodic, or an aperiodic basis, and may be shared among the network devices to enable the processing of data by the virtual machines when a fault occurs, and may be incrementally updated.
US08873371B2	User equipment optimization for multimedia broadcast multicast service A technique to receive a Multimedia Broadcast Multicast Service (MBMS) broadcast, in which a plurality of source symbols and repair symbols of a broadcast from a broadcast source are received at a User Equipment or User Device (UE). The source symbols and repair symbols are based on fountain codes, so that not all of the repair symbols are used to recover the originally sourced data. An application layer of the UE recovers the sourced data and places the receiver in a power-save mode following the last repair symbol used to recover the sourced data, so that remaining repair symbols are not received by the receiver and subsequently processed.
US08873365B2	Transmit diversity processing for a multi-antenna communication system For transmit diversity in a multi-antenna OFDM system, a transmitter encodes, interleaves, and symbol maps traffic data to obtain data symbols. The transmitter processes each pair of data symbols to obtain two pairs of transmit symbols for transmission from a pair of antennas either (1) in two OFDM symbol periods for space-time transmit diversity or (2) on two subbands for space-frequency transmit diversity. NT·(NT−1)/2 different antenna pairs are used for data transmission, with different antenna pairs being used for adjacent subbands, where NT is the number of antennas. The system may support multiple OFDM symbol sizes. The same coding, interleaving, and modulation schemes are used for different OFDM symbol sizes to simplify the transmitter and receiver processing. The transmitter performs OFDM modulation on the transmit symbol stream for each antenna in accordance with the selected OFDM symbol size. The receiver performs the complementary processing.
US08873361B2	Optical information recording/reproducing apparatus and method There is disclosed an optical information recording/reproducing apparatus for optically recording and/or reproducing information in and from an optical recording medium. The apparatus has an oscillator light generator for generating oscillator light that is made to overlap and interfere with reproduced light from the optical recording medium, an oscillator light modulator for producing a given phase difference between the oscillator light and the reproduced light, a light detector for detecting interference light in which the oscillator light and the reproduced light overlap each other, a wavefront deviation detector for detecting an amount of wavefront deviation between the oscillator light and the reproduced light from an output from the light detector, and a compensation amount calculation unit for calculating a wavefront compensation amount from the amount of wavefront deviation. The phase difference produced by the oscillator light modulator is controlled based on the wavefront compensation amount.
US08873359B2	Optical disc and optical disc device In a multilayer optical disc having information layers conforming to a plurality of different optical disc standards, because the type of each information layer is not recorded in the other information layers, in read and write operations by a compatible optical disc device conforming to a plurality of optical disc standards, every time the information layer being accessed changes, it has been necessary to read the type of the information layer and select a method of generating a tracking error signal adapted to the type of information layer, so access has taken time. In order to solve the above problem, in the optical multilayer disc according to the present invention, having information layers conforming to a plurality of different optical disc standards, in an area in one of the information layers, information about the other information layers is recorded. The time required to access the other information layers can be reduced by using this information to select a tracking error signal generating method.
US08873358B2	Skew detection method and optical disc device There is provided a skew detection method including supplying reproduction signals, which are respectively reproduced approximately simultaneously from at least two tracks including a first adjacent track and a second adjacent track located on both sides of a main track, to first and second filters, causing a combining unit to combine output signals of the first and second filters with a reproduction signal which is reproduced from the main track approximately simultaneously with the first adjacent track and the second adjacent track so as to cancel crosstalk, causing a coefficient control unit to obtain an error with a target value of the output signal of the combining unit and control coefficients of the first and second filters so as to reduce the error, and detecting a skew of an optical disc from values of coefficients of predetermined taps of the first and second filters.
US08873354B2	Polarization rotator for thermally assisted magnetic recording A waveguide structure with a light polarization rotator section for converting transverse electric light from a TE light source to transverse magnetic light which is subsequently coupled to a plasmon generator (PG) is disclosed. Wavelengths above 800 nm are advantageously used to reduce resistive heating in the PG, and in adjacent cladding and write pole layers to improve the thermally assisted magnetic recording head lifetime. The light polarization rotator section has a length determined by TE LD light wavelength, and the effective mode index of the two orthogonal fundamental modes, and has curved portions to enable a greater length to accommodate longer TE light wavelengths without increasing the waveguide distance between the air bearing surface and back end of the device.
US08873350B2	Heat assisted media recording apparatus with compensating heater An apparatus includes an optical pathway configured to deliver energy to heat a magnetic recording medium via a slider body. The optical pathway generates heat in the slider body when delivering energy to the magnetic recording medium. The apparatus includes a compensating heater with a thermal characteristic that matches a thermal characteristic of the optical pathway. The compensating heater is activated at least part of the time when the optical pathway is not delivering the energy to the magnetic recording medium.
US08873349B2	Optical devices including assistant layers A waveguide including a top cladding layer, the top cladding layer including a material having an index of refraction, n1; an assistant layer, the assistant layer positioned adjacent the top cladding layer, the assistant layer including a material having an index of refraction, n2; a core layer, the core layer positioned adjacent the assistant layer, the core layer including a material having an index of refraction, n3; and a bottom cladding layer, the bottom cladding layer positioned adjacent the core layer, the bottom cladding layer including a material having an index of refraction, n4, wherein n1 is less than both n2 and n3, n3 is greater than n1 and n4, and n4 is less than n3 and n2.
US08873347B2	Mechanism for isolating timepiece mechanisms which release various acoustic signals A timepiece includes a movement, a main striking mechanism, a secondary strike release mechanism, and a mode selecting mechanism. The main striking mechanism is controlled by a main strike control mechanism, arranged to release strikes, at times programmed by the movement, or on demand, and a sequence of each strike is determined by information gathered by feeler spindles on snails or time references driven by the movement. A coupling mechanism of the secondary strike release mechanism actuates a control rod linkage of an isolating mechanism arranged to isolate various different release mechanisms for different strikes using the main striking mechanism to play strikes. The isolating mechanism includes at least a first isolator which, in a first winding position, takes a stop position preventing the spindles from gathering information from the snails, and, in a second let down position, allows the spindles to pass to come into contact with the snails.
US08873342B1	Local-time aware multi-display wristwatch A wristwatch includes a face having a first area, in which the hour of the time associated with a first time zone is displayable; a second area, in which the hour of the time associated with a second time zone is displayable; and a third area, in which the minutes past the respective hours of the first and second time zones is displayable. The first area includes an analog display of an hour hand without a minute hand; the second area includes an analog display of an hour hand without a minute hand; and the third area includes an analog display of a minute hand without an hour hand. Each of the displays alternatively could be digital. Each of the areas preferably is compartmentalized and physically separated from the other areas on the face of the wristwatch.
US08873331B2	Command decoders Command decoders are provided. The command decoder includes an input buffer configured for buffering and receiving command address signals having address information and command information at first, second, third, and fourth edges of a clock pulse signal according to a reference voltage, a latch circuit configured for latching the command address signals output from the input buffer at the first and third edges of the clock pulse signal to generate and output latched signals, a first command generator configured for decoding the latched signals output from the latch circuit at the first edge of the clock pulse signal to generate and output a first internal command, and a second command generator configured for decoding the latched signals output from the latch circuit at the third edge of the clock pulse signal to generate and output a second internal command.
US08873330B2	Semiconductor memory device A plurality of address conversion circuits are provided for memory cores respectively, and convert logical address data supplied from outside to physical address data. In an interleave operation, the address conversion circuits output the logical address data as the physical address data without converting the logical address data when a first memory core is to be accessed earlier than a second memory core, whereas output address data obtained by adding a certain value to the logical address data as the physical address data when the second memory core is to be accessed earlier than the first memory core.
US08873327B2	Semiconductor device and operating method thereof An operating method of a semiconductor device may comprise monitoring error handling information corresponding to an address of a semiconductor memory device, setting a refresh period for the address considering the error handling information and requesting a refresh request for the address.
US08873326B2	Memory device A memory device includes a plurality of memory blocks configured to be refreshed in response to respective refresh signals; a command decoder configured to decode an external input command to generate an internal refresh command; a refresh control unit configured to activate a first number of refresh signals corresponding to the first number of memory blocks when the internal refresh command is activated and a first mode is set, and to activate a second number of refresh signals corresponding to the second number of memory blocks when the internal refresh command is activated and a second mode is set, the second number being smaller than the first number; and an address counter configured to change the row address transferred to the memory blocks when a predetermined one of the refresh signals is activated.
US08873322B2	Nonvolatile memory apparatus A nonvolatile memory apparatus includes a memory cell configured to receive a first current and a second current through a bit line which is connected to a sensing node; a sensing node level control unit configured to be driven in response to a control signal, compare a reference voltage and a voltage of the sensing node, and output a driving signal to a driving node; a first current driving unit configured to output the first current to the driving node by using a first driving voltage in response to the driving signal; and a current control unit configured to perform a discharge operation of the bit line or electrically connect the driving node and the sensing node, in response to the control signal.
US08873321B2	Boosting supply voltage A data split between a first data line and a second data line is caused to develop. At least one of the following sets of steps is performed: 1) a first power supply line of a sense amplifier is caused to rise towards a first power supply voltage value, and when the first power supply line reaches a first predetermined voltage value, the first power supply is caused to rise above the first power supply voltage value; and 2) a second power supply line of the sense amplifier is caused to fall towards a second power supply voltage value, and when the second power supply line reaches a second predetermined voltage value, the second power supply line is caused to fall below the second power supply voltage value.
US08873316B2	Methods and systems for adjusting NVM cell bias conditions based upon operating temperature to reduce performance degradation Methods and systems are disclosed for making temperature-based adjustments to bias conditions for non-volatile memory (NVM) cells to improve performance and product lifetime of NVM systems. System embodiments include integrated NVM systems having an NVM controller, a bias voltage generator, and an NVM cell array. Further, the NVM systems can store temperature-based bias condition information in storage circuitry. The disclosed embodiments select and apply bias conditions for the NVM cells based upon temperature measurements.
US08873315B2	Semiconductor memory device and method of operating the same The present disclosure relates to a semiconductor memory device and a method of operation the semiconductor memory device, which sets an encoding value by sequentially defining ranges used for recognizing distribution of memory cells based on a middle range and then performing a read operation in an order from the middle ranges to an outermost range, thereby capable of using infinite ranges for recognizing the distribution of the memory cells without addition of a circuit to an inside of the semiconductor memory device.
US08873314B2	Circuits and methods for providing data to and from arrays of memory cells A memory device uses a global input/output line or a pair of complementary global input/output lines to couple write data signals and read data signals to and from a memory array. The same input/output line or pairs of complementary global input/output lines may be used for coupling both write data signals and read data signals.
US08873313B2	Semiconductor apparatus A semiconductor apparatus includes: a memory cell block configured to store data; a fuse block including a plurality of fuses configured to store fuse information; an I/O driver configured to output the data transmitted through a global line to a pad; and a fuse driver configured to output the fuse information transmitted through a test global line to the pad during a test mode.
US08873309B2	Apparatus and method for repairing resistive memories and increasing overall read sensitivity of sense amplifiers A memory includes a module and a demultiplexer. The module is configured to monitor outputs of sense amplifiers. Each of the outputs of the sense amplifiers is configured to be in a first state or a second state. The module is configured to determine that two or more of the outputs of the sense amplifiers are in a same state. The same state is the first state or the second state. The module is configured to output the state of the two or more outputs of the sense amplifiers. The demultiplexer is configured to provide the state of the two or more outputs of the sense amplifiers to a latch.
US08873308B2	Signal processing circuit A signal processing circuit that consumes less power by stop of supply of power for a short time. In a storage element, before supply of power is stopped, data in a first storage circuit is stored to a second storage circuit, and the data is read from the second storage circuit and a verification circuit can determine whether or not the data in the second storage circuit matches the data in the first storage circuit. After supply of power is restarted, the data in the second storage circuit is stored to the first storage circuit, and the verification circuit can determine whether or not the data in the second storage circuit matches the data in the first storage circuit. In such a manner, verification can be performed without requiring a time for verification.
US08873307B2	Semiconductor device A semiconductor device includes a sense amplifier, transistors selectively establishing electrical connection between the sense amplifier and a data bus, depending on address; a write amplifier connected to the data bus, an external terminal outputting data from a memory cell to outside via the sense amplifier, the transistors, and the data bus in a first operation mode and supplying data from outside to the sense amplifier via the write amplifier, the data bus, and the transistors in a second operation mode, and a control circuit supplying an electric potential to gate electrodes of first transistors that establish the electrical connection depending on the address.
US08873305B2	Semiconductor memory device having data compression test circuit A semiconductor memory device includes a data transmission unit configured to transmit first input data to only a first global line driver or to the first global line driver and a second global line driver in response to a test signal, and a transmission element configured to transmit second input data only to the second global line driver in response to the test signal.
US08873299B2	Semiconductor memory device A semiconductor memory device includes memory cells and a voltage generating circuit for generating a voltage for memory cells. The first voltage generating circuit includes a first diode connected between first and second nodes, a first transistor connected between the output terminal and a third node and having a gate connected to the second node, a second transistor connected between the third node and a fourth node and having a gate connected to the second node, a third transistor connected between the output terminal and the first node and having a gate connected to the fourth node, a second diode connected between the first and fourth nodes, and a charge pump circuit configured to supply a voltage to the fourth node. The first voltage generating circuit functions to adjust the generated voltage when it overshoots a desired value which may be caused by capacitive coupling with adjacent wirings.
US08873296B2	Nonvolatile semiconductor memory device A control circuit is configured to execute an erasing operation on a selected cell unit in a selected memory block. In the erasing operation, the control circuit raises the voltage of the bodies of the first memory transistors included in the selected cell unit to a first voltage, sets the voltage of the bodies of the first memory transistors included in the non-selected cell unit to a second voltage lower than the first voltage, and applies a third voltage equal to or lower than the second voltage to the gates of the first memory transistors included in the selected cell unit and the non-selected cell unit.
US08873295B2	Memory and operation method thereof An operation method of a memory includes the following steps: determining the number of memory units required to update the content stored therein when the memory is performing a program operation based on the N-bit input data and accordingly generate a first determination result; and providing (N−M) number of loads to a source line decoder of the memory if the first determination result indicates that there are M number of memory units required to update the content stored therein, and thereby coupling the (N−M) number of the provided loads to a transmission path of a power supply voltage in parallel, wherein N and M are natural numbers. A memory is also provided.
US08873287B2	Nonvolatile programmable logic switch A nonvolatile programmable logic switch according to an embodiment includes first and second cells, each of the first and second cells including: a first memory having a first to third terminals, the third terminal being receiving a control signal; a first transistor connected at one of source/drain to the second terminal; and a second transistor connected at a gate to the other of the source/drain of the first transistor, the third terminal of the first memory in the first cell and the third terminal of the first memory in the second cell being connected in common. When conducting writing into the first memory in the first cell, the third terminal is connected to a write power supply generating a write voltage, the first terminals in the first and second cells are connected to a ground power supply and a write inhibit power supply generating a write inhibit voltage respectively.
US08873286B2	Managing non-volatile media Apparatuses, systems, and methods are disclosed to manage non-volatile media. A method includes determining a configuration parameter for a set of storage cells of a non-volatile recording medium. A method includes reading data from a set of storage cells using a determined configuration parameter. A method includes adjusting a configuration parameter based on read data.
US08873285B2	Simultaneous multi-level binary search in non-volatile storage Methods and devices for simultaneously verifying or reading multiple states in non-volatile storage are disclosed. Methods and devices for efficiently reducing or eliminating cross-coupling effects in non-volatile storage are disclosed. Methods and devices for efficiently performing reads at a number of voltages to search for the threshold voltage of a memory cell are disclosed. Memory cells on different NAND strings that are read at the same time may be tested for different threshold voltage levels. Memory cells may be tested for different threshold voltages by applying different gate-to-source voltages to memory cells being tested for different threshold voltages. Memory cells may be tested for different threshold voltages by applying different drain to source voltages to the memory cells. Different amounts of compensation for cross-coupling affects may be applied to memory cells on different NAND strings that are read or programmed at the same time. A binary search may be performed.
US08873283B2	Memory cell and memory cell array having an electrically floating body transistor, and methods of operating same A technique of writing, programming, holding, maintaining, sampling, sensing, reading and/or determining the data state of a memory cell of a memory cell array (for example, a memory cell array having a plurality of memory cells which consist of an electrically floating body transistor). In one aspect, the present inventions are directed to techniques to control and/or operate a semiconductor memory cell (and memory cell array having a plurality of such memory cells as well as an integrated circuit device including a memory cell array) having one or more electrically floating body transistors in which an electrical charge is stored in the body region of the electrically floating body transistor. The techniques of the present inventions may employ bipolar transistor currents to control, write and/or read a data state in such a memory cell. In this regard, the present inventions may employ a bipolar transistor current to control, write and/or read a data state in/of the electrically floating body transistor of the memory cell.
US08873277B2	Semiconductor memory device having balancing capacitors A semiconductor memory device includes a plurality of memory cell blocks including a first memory cell block having bit lines, an edge sense amplifier block including edge sense amplifiers coupled to a portion of the bit lines of the first memory cell block, and a balancing capacitor unit coupled to the edge sense amplifiers.
US08873270B2	Pulse generator and ferroelectric memory circuit A pulse generator circuit with ferroelectric memory element is disclosed that is optimized for printed, solution-processed thin film transistor processing. In certain embodiments, the circuit comprises dual thin film transistors that operate as a diode and resistor, respectively. Optionally, a third thin film transistor may be provided to operate as a pass transistor in response to an enable signal. The elements of the circuit are configured such that a rising pulse on an input node triggers an output pulse on an output node in the manner of a monostable multivibrator. The ferroelectric memory element is coupled to the output node such that a pulse on the output node may change a state of the ferroelectric memory element.
US08873262B2	Inverter driving system Provided is an efficient inverter driving method. A pulse with very short pulse width is supplied as a primary driving pulse of a transformer, and the secondary output voltage of the transformer caused by a transient phenomenon can be enlarged several times while keeping the power source voltage for input current constant by shortening the time interval of the primary driving pulse.
US08873261B1	Current source rectifier modulation in discontinuous modes of operation Systems and methods disclosed herein include a controller for a current source rectifier that is configured to facilitate operation in both continuous and discontinuous conduction modes. The controller comprises a discontinuous mode detection unit configured to determine when input current of the current source rectifier becomes discontinuous and a duty cycle calculation unit adapted to calculate duty cycles for the current source rectifier differently for operation in continuous or discontinuous mode. The controller is adapted to transition to a mode of operation to provide an input current that approximates a sinusoidal current during both the continuous and discontinuous modes of operation. The controller outputs control signals to turn on one or more of the electrical switches in the current source rectifier based on the calculated duty cycles.
US08873258B2	Method for inhibiting a converter with distributed energy stores A method for inhibiting a converter having at least two phase modules is disclosed. Each phase module has an upper and a lower valve branch, with each upper and lower valve branch having a plurality of two-pole submodules which are electrically connected in series and each have a unipolar energy storage capacitor, with a series connection of two turn-off semiconductor switches each being connected in parallel with an antiparallel connected diode. With the method, the submodules in an upper and a lower valve branch in each phase module in the converter are controlled to a switching state III, staggered in time. This considerably reduces the voltage load for the converter and a connected polyphase motor, or a connected power supply system.
US08873256B2	Wind turbine with a controller configured to manage resonant effects A method and apparatus of operating a controller usable for operating a wind turbine is provided. The wind turbine includes a voltage converter being connectable to a power grid via a filter arrangement. The method includes determining a line voltage and adding the determined line voltage to the output of the voltage converter with a time delay. The time delay is adjusted such that resonant effects occurring at the filter arrangement are decreased.
US08873252B2	Method and apparatus for extending zero-voltage switching range in a DC to DC converter Apparatus for extending a zero voltage switching (ZVS) range during DC/DC power conversion. The apparatus comprises a DC/DC converter, operated in a quasi-resonant mode, comprising (i) a transformer, (ii) a primary switch, coupled to a primary winding of the transformer, for controlling current flow through the primary winding, and (iii) a varactor, coupled to the transformer, for accelerating a downswing in a voltage across the primary switch.
US08873246B2	Electronic device, wiring board, and method of shielding noise A wiring board includes a metal cap pad that is arranged so as to surround a mounting position of an electronic component and is connected to an end portion of a metal cap, a power source plane that is connected to the electronic component through a connection member and has a gap, a ground plane that is connected to the electronic component through a connection member, and a plurality of conductive body elements that are repeatedly arranged so as to surround the connection members and the gap. The power source plane and the ground plane extend so as to include at least a part of an area that is surrounded by the plurality of conductive body elements and at least a part of an area facing the plurality of conductive body elements.
US08873243B2	Electronic device In an electronic device, a circuit substrate is provided with at least one electronic circuit, and a case accommodates the circuit substrate. The case has a pair of groove portions and a side opening portion. The groove portions are provided, such that edge portions of the circuit substrate are slidable and inserted into the groove portions from the side opening portion. A box-shaped cover is disposed to close a bottom opening portion of the case. The cover includes a pair of side walls having top end portions, and a plurality of protrusion portions projecting from the top end portions of the side walls. The protrusion portions are inserted into a space between the edge portions of the circuit substrate and the groove portions, at a bottom side of the circuit substrate, to fix the circuit substrate.
US08873233B2	Vehicle dock for ruggedized tablet A system and apparatus for robustly transferring power and data between a portable computing device, such as a ruggedized tablet, and a docking station is provided. The tablet and the docking station may each have a docking connector and a wireless communication device. In some embodiments, the docking station may transfer power to the tablet through electrical contacts of the docking connectors and may communicate data through the wireless communication devices. The docking station's docking connector may mount electrical contacts for transferring power and may mount few or no electrical contacts for transferring data. The tablet's docking connector may retain electrical contacts for transferring power and electrical contacts for transferring data. In some embodiments, all the electrical contacts for transferring data may be unused.
US08873232B2	Supporting frame for hard disk drive A supporting frame is used to mount a hard disk drive to a storage rack. The storage rack forms two protrusions protruding inwards from opposite sides of the storage rack. The supporting frame includes a handle and two side brackets resiliently connected to the handle. The side brackets are fixedly attached to opposite sides of the hard disk drive. The handle defines two locking holes. The protrusions of the storage rack are respectively engaged in the locking holes. When the handle is moved away from the hard disk drive, the handle is deformed to disengage the protrusions of the storage rack from the locking holes of the handle.
US08873226B1	Electronic device housing having a low-density component and a high-stiffness component An electronic device housing including a relatively thin and stiff support plate and including a relatively thick and low-density edge frame is described. The support plate may be composed of a composite material, such as carbon-fiber reinforced polymer or aluminum metal matrix composite, and the edge frame may be composed of a foam material, such as closed-cell aluminum foam.
US08873221B2	Solid electrolytic capacitor Provided is a solid electrolytic capacitor having reduced manufacturing man-hour, low leak current, low initial ESR, low ESR after long year use, and long life. The solid electrolytic capacitor includes a anode member made of a valve action metal, a dielectric coating layer formed on a surface of the anode member, a solid electrolytic layer formed on the dielectric coating layer, and a conductive solid layer covering the solid electrolytic layer, in which the conductive solid layer contains silver and nickel, and the weight ratio of nickel to silver is set to 3 to 30%.
US08873212B2	Protection circuit, battery control device, and battery pack A protective circuit capable of coping with broad voltage variations of a battery unit to interrupt its charging/discharging current path as damages to the heating unit are prevented from occurrence is disclosed. The protective circuit includes fuses, connected to a charging/discharging current path in series between a battery unit and a charging/discharging control circuit, and a heating unit composed by a series connection of resistors. One of two ends of the resistor which is not connected to the peer resistor is connected to a current path of the fuses. The ends of the resistors not connected to the fuses, are provided with a plurality of terminals selected for connection to a current control element that controls the current flowing through the heating unit, as a range of voltage variations of the battery unit is taken into account.
US08873208B2	Electric safety circuit for use with an electric receptacle An electric safety circuit for use with an electric receptacle includes a relay and contacts in which power from a mains is supplied through the contacts to the receptacle only when the contacts are closed; a transistor for controlling the relay to open or close the contacts; an enabling device for supplying an enabling signal to the transistor to close the contacts when a plug of an electrically connected device is inserted into the receptacle, the electrically connected device is turned on, and there is no electrical contact by a person with the power supplied to the electrically connected device; and a disabling device for supplying a disabling signal to the transistor to open the contacts when there is electrical contact by a person with the power supplied to the electrically connected device.
US08873207B2	Method for operating a ground fault interrupter as well as ground fault interrupter for a frequency converter A conventional ground fault interrupter in an arrangement with a frequency converter and electrical machines may be accidentally tripped due to operation-related leakage currents. This can be prevented by operating a ground fault interrupter for a frequency converter receiving a mains current in the following manner: receiving switching information about switching operations in the frequency converter, measuring a signal associated with a common mode current in a power line device which conducts the mains current to the frequency converter, determining, based on the switching information, an expected signal expected for the common mode current produced by the switching operations, identifying, based on the measured signal and the expected signal, a fault current, and interrupting the mains power depending on the identified fault current. A ground fault interrupter is hereby provided with an evaluation unit configured to carry out the method.
US08873199B2	Recording head coil structure A recording head comprising a write pole and a coil structure asymmetric with respect to the write pole and configured to generate more magnetic flux on a trailing side of the main pole than the magnetic flux on a front side of the main pole.
US08873198B1	Motor and disk drive apparatus A motor includes a rotating portion including a sleeve portion and a stationary portion. The stationary portion includes a shaft component which includes an inner shaft portion and an outer shaft portion. A radial dynamic pressure generating groove array is provided on at least one surface of an inner circumferential surface of the sleeve portion and an outer circumferential surface of the outer shaft portion, which define the radial gap. The radial dynamic pressure generating groove array includes an upper radial dynamic pressure generating groove array and a lower radial dynamic pressure generating groove array. A range of a fixing region in an axial direction between the inner shaft portion and the outer shaft portion in an interference fit state is included in a range between the upper radial dynamic pressure generating groove array and the lower radial dynamic pressure generating groove array.
US08873195B2	Library device, accessor, and method of positioning for library device A library device including the magazine which provides with a plurality of cells for storing the recording medium and the accessor which is positioned at a position facing a target cell in the magazine to pick up the recording medium from the cell or store the recording medium in the cell, the accessor includes a first position correction unit and a second position correction unit which positions the accessor at the position facing the target cell and when the first position correction unit fail to position the accessor at the position facing the target cell, the second position correction unit position the accessor at the position facing the target cell.
US08873194B1	Touchdown detection in magnetic disk storage devices Touchdown detection in magnetic storage devices is provided to detect contact between a storage medium and a magnetic head having an embedded contact sensor. A sample stream is obtained, which includes samples of a sensor signal output from the embedded contact sensor. The sample stream is segmented into multiple segments. A modulation depth is determined for each of the segments. A combined modulation depth is determined by combining the modulation depths of the segments using a weighting function. The combined modulation depth is compared with a threshold. A determination is made as to whether the magnetic head makes contact with the storage medium based on a result of the comparing.
US08873193B2	Circuitry for controlling a voice coil motor A control circuit of a voice coil motor is configured to move at least one read/write head of an hard disk into a parking position. The control circuit compares a received supply signal with a reference signal having a minimum value and a maximum value and a frequency. When the value of the supply signal is between the minimum value and the maximum value of the reference signal, the controller causes alternation of a working condition of the voice coil motor, when the value of said supply signal is higher than the value of the reference signal, and of a stop condition of the voice coil motor, when the value of said supply signal is lower than the value of the reference signal, with a frequency equal to the frequency of said reference signal.
US08873192B1	Magnetic tape heads Techniques for operating tape heads are provided. In an example, a method includes detecting a potential at a sensor region, determining a target potential using a transfer function, and applying the target potential to an effector region.
US08873190B1	Disk drive generating fly height measurement from servo burst and adjusting by position error signal A disk drive is disclosed comprising a head actuated over a disk comprising a plurality of servo tracks defined by servo sectors, wherein each servo sector comprises a plurality of servo bursts. The servo bursts in a servo sector are read to generate a read signal, and a position error signal (PES) is generated in response to the read signal, wherein the PES represents a position of the head over the disk. A fly height measurement (FHM) is generated in response to the read signal, and the FHM is adjusted based on an adjustment value generated in response to the PES.
US08873187B1	Systems and methods for data processor marginalization based upon bit error rate Systems, methods, devices, circuits for data processing, and more particularly to data processing including operational marginalization capability, and/or operational improvement capability.
US08873185B2	Thermally-assisted magnetic recording head The thermally-assisted magnetic recording head includes: a magnetic pole having an end exposed on an air-bearing surface; a waveguide; a plasmon generator formed essentially of a first metallic material, and having a first region and a second region, the first region extending backward from the air-bearing surface to a first position, and the second region being coupled with the first region at the first position and extending backward from the first position; and a metallic layer filling a part in the second region, and formed essentially of a second metallic material that has a higher melting temperature than a melting temperature of the first metallic material.
US08873182B2	Multi-path data processing system Various embodiments of the present invention provide apparatuses and methods for processing data in a multi-path data processing circuit. For example, an apparatus is disclosed that includes a first filter operable to process a first digital data stream to yield a first filtered digital data stream, a second filter operable to process a second digital data stream to yield a second filtered digital data stream, wherein the first and second digital data stream are representative of a same data set and wherein the first and second digital data stream have a different phase, a combining circuit operable to combine the first filtered digital data stream and the second filtered digital data stream to yield a combined data stream, and a data detector operable to detect a data sequence in the combined data stream.
US08873180B2	Sampling-phase acquisition based on channel-impulse-response estimation Embodiments of the invention can be manifested as methods for converting analog waveforms into digital sampled signals. In at least one such embodiment, the method includes (i) sampling, based on a sampling-clock signal, an analog waveform received from a transmission channel to generate a digital sampled signal, (ii) generating a digital target signal by applying a specified reference data pattern to a model of the transmission channel, and (iii) adjusting the sampling-clock signal by comparing the digital sampled signal to the digital target signal. Embodiments of the invention can also be manifested as apparatuses that convert analog waveforms into digital sampled signals.
US08873172B2	Linear motor and lens unit Provided is a linear motor comprising a magnet including a first region polarized to have a magnetic pattern for driving and a second region polarized to have a magnetic pattern for position detection, the first and second regions being arranged linearly in a direction of the driving; a drive coil that is provided opposite the first region and generates a drive force exerted on the magnet in the direction of the driving; a magnetic sensor arranged opposite the second region; and a base member that supports the magnet, the drive coil, and the magnetic sensor such that the magnet can be moved relative to the drive coil and the magnetic sensor in the driving direction.
US08873171B2	Lens barrel and lens unit A lens barrel and a lens unit each include a lens drive operation member that drives a lens holding member holding a movable lens group, in an axial direction by a rotation operation of a rotating member. This lens drive operation member has a body disposed so as to be rotatable about an axis of a fixed barrel and so as not to be movable in the axial direction and connected to the rotating member by a connecting portion, and the connecting portion includes at least two connecting members, that is, a first connecting member formed integrally with the body, and a second connecting member formed separately from the body.
US08873168B2	System and method of solar flux concentration for orbital debris remediation A system for concentrating solar radiation onto a space debris object to vaporize includes a focusing system, an object tracking system and a positioning system. The focusing system has a total focal length fT, and includes a first focusing device and a second focusing device. The first focusing devices change from a compact state to a deployed state, and the compact surface area is less than the deployed surface area. The object tracking system determines the location of the object. The positioning system orients the focusing system such that solar radiation focuses on the space debris object.
US08873164B2	Photographic lens optical system A lens optical system includes first, second, third, fourth, and fifth lenses that are arranged between an object and an image sensor where an image of the object is formed, in order from an object side, wherein the first lens has a positive (+) refractive power and an incident surface that is convex toward the object, the second lens has a negative (−) refractive power and a meniscus shape that is convex toward the object, the third lens has a positive (+) refractive power and both convex surfaces, the fourth lens has a positive (+) refractive power and a meniscus shape that is convex toward the image sensor, and the fifth lens has a negative (−) refractive power and an incident surface and an exit surface, at least one of the incident surface and the exit surface is an aspherical surface.
US08873162B2	Optical system An optical system for imaging an object on an image acquisition unit has a variable focal length for zooming. The optical system has precisely three lens units from the object in the direction of an image acquisition unit, namely a first lens unit, a second lens unit, and a third lens unit. The second lens unit and the third lens unit are movably situated along an optical axis of the optical system for a change of the focal length. The first lens unit includes a first lens group and a second lens group. The first lens group of the first lens unit is fixedly situated on the optical axis of the optical system. The second lens group of the first lens unit is movably situated along the optical axis of the optical system for focusing. The second lens group includes at least two lenses.
US08873161B2	Zoom lens, camera apparatus, information device and mobile information terminal apparatus A zoom lens includes a first lens group having a positive refractive power, a second lens group having a negative refractive power, an aperture stop, a third lens group having a positive refractive power, and a fourth lens group having a positive refractive power, which are disposed in order from an object side. The first lens group has a negative lens and a positive lens having a convex surface at an object side, which are disposed in order from the object side. An interval between the first lens group and the second lens group is increased and an interval between the second lens group and the third lens group is decreased when changing a magnification of the zoom lens from a wide angle end to a telephoto end. The first lens group and the third lens group are moved from positions at the wide angle end toward positions, which are at object sides thereof, at the telephoto end, respectively. Parameters are set so as to successfully correct chromatic aberration while achieving compact size, wide half field angle at the wide angle end, good performance, and a high magnification ratio.
US08873160B2	Taking lens system and image pickup apparatus using the same A taking lens system comprises a frontmost lens unit, a rearmost lens unit, and a plurality of lens units arranged between the frontmost lens unit and the rearmost lens unit. One of the plurality of lens units is a first focusing lens unit. During focusing from an infinite object distance to a close object distance, only the first focusing lens unit moves toward the image side in a first shooting mode, and at least two lens units in the taking lens system move in a second shooting mode. In the state in which the taking lens system is focused on an object at infinity, the positions of the first focusing lens unit and at least one lens unit in the taking lens system in the first shooting mode are different from those in the second shooting mode. The taking lens system satisfies the condition Mn1>Mn2.
US08873155B2	Zoom lens and image pickup apparatus having the same A zoom lens includes first to third lens units having positive, negative, and positive refractive power, respectively, and a rear lens group having positive refractive power. An aperture stop is arranged between a lens surface of the second lens unit closest to the image side and a lens surface of the third lens unit closest to the image side. The third lens unit includes first and second positive lenses each including an aspheric surface, and a negative lens. In the third lens unit, a refractive index of the first positive lens, and an Abbe number and relative partial dispersion of the second positive lens are appropriately set.
US08873154B2	Tele-side converter lens and image pickup apparatus including the same A tele-side converter lens including a first unit having a positive refractive power and a second unit having a negative refractive power, in which: the first unit includes one or two positive lenses; the second unit includes one negative lens and one or two positive lenses; and average Abbe constant and partial dispersion ratio of materials of positive lenses constituting the first unit, average Abbe constant and partial dispersion ratio of materials of positive lenses constituting the second unit, an Abbe constant and a partial dispersion ratio of materials of the negative lenses constituting the second unit, combined Abbe constants of materials of the lenses constituting the respective first and second units, focal lengths of the first and second units, a refractive index of a material of a positive lens disposed closest to the object side, and a magnification of the tele-side converter lens are appropriately set, respectively.
US08873149B2	Projection optical system for coupling image light to a near-eye display Technology is described for a projection optical system which optically couples image light from an image source to a near-eye display (NED) of a wearable near-eye display device. The projection optical system and the image source make up a projection light engine. Light from the image source is directed to a birdbath reflective optical element which is immersed in high index glass. The image light is reflected and collimated by the birdbath element and travels outside a housing of the projection light engine forming an external exit pupil, meaning the exit pupil is external to the projection light engine. A waveguide optically couples the image light of the external exit pupil. An example of a waveguide which can be used is a surface relief grating waveguide.
US08873148B1	Eyepiece having total internal reflection based light folding An eyepiece for a head mounted display includes a light relay body, a total internal reflection (“TIR”) interface, and a focusing lens. The light relay body has a first end coupled to receive CGI light from an image source and a second end including a viewing region from which the CGI light is emitted. The TIR interface is disposed in the viewing region at an oblique angle relative to an eye-ward side of the light relay body through which the CGI light is emitted from the eyepiece. The TIR interface is oriented to redirect the light towards the eye-ward side of the light relay body. The focusing lens is disposed along the eye-ward side of the light relay body in alignment with the TIR interface to bring the CGI light into focus for a near-to-eye arrangement.
US08873145B2	Zoom lens system, interchangeable lens apparatus and camera system A zoom lens system, in order from an object side to an image side, comprising a first lens unit having negative optical power, a second lens unit having positive optical power, a third lens unit having negative optical power, and a fourth lens unit having positive optical power, wherein the second lens unit is, in order from the object side to the image side, composed of an object-side second lens unit and an image-side second lens unit, the image-side second lens unit moves in a direction perpendicular to an optical axis to optically compensate image blur, and the condition: 1<\|f2I/fW\|<10 (f2I: a composite focal length of the image-side second lens unit, fW: a focal length of the entire system at a wide-angle limit) is satisfied.
US08873144B2	Wire grid polarizer with multiple functionality sections A wire grid polarizer with multiple functionality sections. Separate and discrete sections can include a difference in pitch p, a difference in wire width w, a difference in wire height h, a difference in wire material, a difference in coating on top of the wires, a difference in thin film between the wires and the substrate, a difference in substrate between the wires, a difference in number of layers of separate wires, and/or a difference in wire cross-sectional shape.
US08873143B2	Three-dimensional image display apparatus A three-dimensional image display apparatus is described. The three-dimensional image display apparatus includes a display panel and a film-type patterned retarder. The three-dimensional image display apparatus allows the phase retarding regions of the film-type patterned retarder to be deviated from the pixel regions of the display panel so that the line of vision the viewer along the extension of the phase retarding direction corresponds to the pixel regions of the display panel. In other words, the phase retarding regions of the film-type patterned retarder deviate from the pixel of the display panel to avoid the image crosstalk when the viewer looks on the three-dimensional image display apparatus.
US08873136B2	High-gain face-pumped slab-amplifier An optical amplifier for use as a final amplification stage for a fiber-MOPA has a gain-element including a thin wafer or chip of ytterbium-doped YAG. An elongated gain-region is formed in gain-element by multiple incidences of radiation from a diode-laser bar.
US08873135B2	Extended dynamic range optical amplifier An extended dynamic range optical amplifier, a method of operation, and a line amplifier configuration include an optical amplifier that can be optimized for high or low span loss conditions by switching an internal stage in or out of an internal light path within the amplifier. The extended dynamic range optical amplifier can include a low gain mode and a high gain mode with an internal switch to switch out a gain mid-stage in a low gain mode to extend the useful dynamic range of the amplifier. Further, the extended dynamic range optical amplifier can use residual pump power from an initial stage to pump the gain mid-stage in the high gain mode. Additionally, the extended dynamic range optical amplifier includes remapping of gain in the initial stage and the gain mid-stage to optimize the amplifier noise performance based on the maximum output power of the amplifier.
US08873134B2	Hybrid laser amplifier system including active taper Hybrid laser systems include fiber amplifiers using tapered waveguides and solid-state amplifiers. Typically, such systems represent a technically simple and low cost approach to high peak power pulsed laser systems. The tapered waveguides generally are provided with an active dopant such as a rare earth element that is pumped with one or more semiconductor lasers. The active waveguide taper is selected to taper from a single or few mode section to a multimode section. A seed beam in a fundamental mode is provided to a section of the waveguide taper associated with a smaller optical mode, and an amplified beam exits the waveguide taper at a section associated with a larger optical mode. The waveguide taper permits amplification to higher peak power values than comparable small mode area fibers. The fiber amplified beam is then directed to a solid state amplifier, such as a thin disk or rod-type laser amplifier.
US08873133B2	Bent structures and resonators with quasi-phase-matched four-wave-mixing and methods for converting or amplifying light A system for conversion or amplification using quasi-phase matched four-wave-mixing includes a first radiation source for providing a pump radiation beam, a second radiation source for providing a signal radiation beam, and a bent structure for receiving the pump radiation beam and the signal radiation beam. The radiation propagation portion of the bent structure is made of a uniform Raman-active or uniform Kerr-nonlinear material and the radiation propagation portion comprises a dimension taking into account the spatial variation of the Raman susceptibility or Kerr susceptibility along the radiation propagation portion as experienced by radiation travelling along the bent structure for obtaining quasi-phase-matched four-wave-mixing in the radiation propagation portion. The dimension thereby is substantially inverse proportional with the linear phase mismatch for four-wave-mixing. The system also includes an outcoupling radiation propagation portion for coupling out an idler radiation beam generated in the bent structure.
US08873132B2	Method and apparatus for generation and detection of rogue waves Methods and systems are provided for generation and detection of rogue waves, including hydrodynamic rogue waves and optical rogue waves. A method for generating an optical rogue wave comprises the steps of generating an input pulse into a nonlinear optical medium, and perturbing the input pulse by directing a narrow-band seed radiation into the input pulse. The seed radiation has a frequency and timing to generate broadband radiation within the nonlinear optical medium.
US08873129B2	Tetrachromatic color filter array for reflective display A tetrachromatic color filter array comprises multiple pixels, each of which comprises first, second, third and fourth sub-pixels having first, second, third and fourth hues, P1, P2, P3 and P4 respectively, these first, second, third and fourth hues having first, second and third hue angles, h1, h2, h3 and h4 respectively. The hues of the sub-pixels such that h3 equals h1+(180°±10°) and h4 equals h2+(180°±10°) in the ab plane of the Lab color space.
US08873128B2	Reduction of the dynamic deformation of translational mirrors using inertial masses A micromechanical mirror arrangement comprising a mirror plate (1) which forms a translation mirror, which is connected via at least one holding element (2), preferably two or more holding elements, to a frame structure (3) and is movable in translation relative to this frame structure, characterized in that the connection region (4) of at least one holding element (2), preferably of all holding elements, with the mirror plate (1) is arranged inwardly offset, viewed from the outer margin (5) of the mirror plate toward to the center (6) of the mirror plate.
US08873125B2	Technique to determine mirror position in optical interferometers A Micro Electro-Mechanical System (MEMS) interferometer system utilizes a capacitive sensing circuit to determine the position of a moveable mirror. An electrostatic MEMS actuator is coupled to the moveable mirror to cause a displacement thereof. The capacitive sensing circuit senses the current capacitance of the MEMS actuator and determines the position of the moveable mirror based on the current capacitance of the MEMS actuator.
US08873123B2	Microscope apparatus having a modulation-region adjusting unit that moves a wavefront modulation region in response to pivoting of mirrors Illuminating light is two-dimensionally scanned without changing the ability to focus illuminating light on a specimen. A microscope has a spatial light modulator for the wavefront of illuminating light from a light source; a scanner having two mirrors independently pivoted about two non-parallel axes; a relay optical system guiding the illuminating light, whose traveling direction has been changed by the scanner, to an objective optical system; and an adjusting unit that moves a wavefront modulation region of the modulator, in which an image is formed, in response to pivoting of the mirrors, such that an image at the pupil position of the objective optical system assuming that the mirrors are stopped is moved opposite to the direction of movement of the image relayed to the pupil position of the objective optical system assuming that the mirrors are pivoting while the image on the spatial light modulator is fixed.
US08873122B2	Microlithographic imaging optical system including multiple mirrors An imaging optical system includes a plurality of mirrors configured to image an object field in an object plane of the imaging optical system into an image field in an image plane of the imaging optical system. An illumination system includes such an imaging optical system. The transmission losses of the illumination system are relatively low.
US08873114B2	Lens array, imaging apparatus, and image reading apparatus A lens array including: a plurality of imaging portions arrayed in a first direction; wherein each of the plurality of imaging portions includes a first optical system configured to form an intermediate image of an object and a second optical system configured to re-form the intermediate image of the object in a first cross section parallel to the first direction and a direction of optical axes of the imaging portions, and wherein in each of the plurality of imaging portions, an optical flux from an object height at which a light available efficiency becomes 90% is restricted by at least one of a first aperture surface of the first optical system and a second aperture surface of the second optical system, and the optical flux from an object height at which the light available efficiency becomes 10% is restricted by the aperture surface which restricts the optical flux from the object height at which the light available efficiency becomes 90%.
US08873112B2	Image processing apparatus and determination method A signal value representing at least one of a plurality of types of optical characteristics are calculated for each pixel from the read signal obtained and output by reading light reflected by a document placed on a document table and a document table cover while the document is covered with the cover. It is determined, based on the signal value calculated, whether or not a target pixel is a pixel in a document region. A document region is detected from the determination result.
US08873111B2	Image reading device, image processing method and computer readable medium There is provided an image reading device comprising: a image capturing unit that captures a manuscript; a predetermined image pattern displayed in a region that is captured by the image capturing unit and provides a background of the manuscript; and a region determination unit that determines an image region corresponding to the manuscript, based on an image element corresponding to the image pattern and another image element corresponding to a shadow of the manuscript in an image captured by the image capturing unit.
US08873108B2	Image processing apparatus and image processing method An image processing apparatus and an image processing method are provided, which are useful for faithfully reproducing luster even if a luminance reproduction range of an output apparatus is brighter than the luminance reproduction range of an input apparatus. The image processing apparatus includes a luster region determination unit configured to determine a luster region included in an input image based on a luminance value of the input image, a luminance correction value calculation unit configured to calculate a luminance correction value of the luster region, and a corrected image generation unit configured to generate an output image by adding the luminance correction value to the luminance value of the input image.
US08873107B2	Image processing apparatus, medium, and method generating foreground image expressing color in specific region based on input image and determined image attributes An image processing apparatus includes a first attribute image generation unit; a second attribute image generation unit; and a foreground image generation unit. The first attribute image generation unit is configured to determine a first attribute value from an input image to generate a first attribute image. The second attribute image generation unit is configured to determine a second attribute value from the input image to generate a second attribute image. The foreground image generation unit is configured to generate a foreground image expressing color information in the specific region according to the input image, the first attribute image, and the second attribute image. Further, the foreground image generation unit is configured to switch a method of determining a pixel value of a target pixel of the foreground image according to contents of the first attribute image and the second attribute image in a reference region.
US08873098B2	Information processing apparatus, information processing method and program for determining suitability of printing content data displayed on a display apparatus An image processing apparatus according to the present invention includes a detection unit configured to detect approach or contact of a printing apparatus relative to a display apparatus, a first acquisition unit configured to acquire information about a print attribute of the printing apparatus detected by the detection unit, a second acquisition unit configured to acquire attribute information about content data to be displayed on the display apparatus, and a determination unit configured to determine suitability of printing the content data in the printing apparatus, based on the information about the print attribute of the printing apparatus and the attribute information about the content data.
US08873096B2	Media processing device and POS system A multifunction device 100 has a roll paper print unit 120; a first interface 110 that receives text data from a POS terminal 20; a second interface 115 connected to a printer 200; a data interpreter 155 that determines if a predetermined string is contained in the received text data; and a control unit 150 that, based on the result from the data interpreter 155, switches to a first operating mode for executing processes with the roll paper print unit 120, or a second operating mode that passes the received text data through the second interface 115 to the printer 200.
US08873094B2	Methods and systems for print document release via mobile device A system and method for print document release via mobile device by receiving one or more text messages from the mobile device, wherein the one more text messages includes a mobile print command and a document identification number, parsing the one or more text messages, and releasing a document to a printer, wherein the document is associated with the document identification number.
US08873088B2	Printing control device extracting data for constituting duplication objects, printing control method extracting data for constituting duplication objects, and non-transitory computer readable medium A printing control device includes a web page data acquiring portion configured to acquire web page data of a prescribed web page from the web server and a display configured to display the prescribed web page. The printing control device further includes an extraction portion configured to extract data for constituting a duplication object. The printing control device still further includes a print data creation portion configured to create print data for forming at least two duplicated images of the duplication object based on the extracted data. Moreover, the printing control device includes a printing instruction portion configured to instruct the printing unit to form an image on the recording medium based on the created print data.
US08873086B2	Methods and system for consumable validity verification in prepaid document processing devices Document processing devices and account manager systems are presented which verify validity of pairings of installed consumables and document processing devices for permissive enablement of document processing functionality based on validity of the pairings.
US08873085B2	Image forming apparatus, control method for the same, and storage medium When attribute information for a user has been acquired by authentication using an authentication apparatus, a restriction on a useable function is imposed according to the attribute information. When a fee has been collected by a fee collection apparatus, a restriction is imposed on preset functions. In either of these cases, use of the image forming apparatus by another user is prohibited until use by the first user in the useable state is finished.
US08873084B2	Image forming apparatus and print controlling method for prohibiting copying of copied documents with an image A copier that includes a reading unit to read a document to obtain an image and a printing unit configured to print the obtained image to obtain a copied document. The copier further includes a setting unit to set a setting for adding an image indicating that copying the copied document is inhibited and a controlling unit to control the printing unit so in a case where a document having an image indicating that copying the document is permitted subject to an input of authentication information is read to obtain an image and the setting is not set, the obtained image is printed subject to an input of the authentication information, and in a case where a document having an image indicating that copying the document is permitted subject to an input of authentication information is read to obtain an image and the setting is set, not printed the image.
US08873083B2	User centric print usage Enabling web management of print usage for a user(s) and/or printer device(s). A central management unit can interact with a plurality of accounts (e.g., prepaid accounts; and/or postpaid accounts), which are associated with users and/or printers—to predict printing activities and regulate printer supplies.
US08873078B2	Image forming apparatus, print method, and recording medium involving a comparison between the number of sheets of e-paper and number of copies specified by user An image forming apparatus comprising: an e-paper storage that loads one or more sheets of e-paper; a first transmitter that transmits a target image to the one or more sheets of e-paper loaded on the e-paper storage; a detector that detects when the target image is seen via any of the one or more sheets of e-paper; a judgment portion that judges whether or not the number of sheets of e-paper via which the target image has been seen reaches the number of copies specified; and a request transmitter that, if the number of sheets of e-paper via which the target image has been seen reaches the number of copies specified while any of the one or more sheets of e-paper still remains in the e-paper storage without being seen, transmits a request to delete the target image to the remaining sheet of e-paper.
US08873070B2	Image processing apparatus and method of starting image processing apparatus An image processing apparatus has a plurality of functions and is adapted to make one or more functions operable by activating programs corresponding to functions. The image processing apparatus includes a selection unit adapted to select a function to be enabled in advance to the other functions when power of the image processing apparatus is turned on or when operation of the image processing apparatus is resumed from a low-power standby state, and a control unit adapted to perform control such that a program corresponding to the function selected by the selection unit is made executable in advance to the other programs.
US08873064B2	Fiber-optic disturbance detection using combined Michelson and Mach-Zehnder interferometers A fiber-optic sensor can have a Michelson sensor portion and a Mach-Zehnder sensor portion. A first splitter-coupler can be configured to split incoming light between a first fiber portion and a second fiber portion. A first polarization-phase conjugation device can be configured to conjugate a polarization phase of incident light corresponding to the first fiber portion, and a second polarization-phase conjugation device can be configured to conjugate a polarization phase of incident light corresponding to the second fiber portion. Each of the first and second polarization-phase conjugation devices can be configured to reflect light toward a detector and through the respective first and second fiber portions. A coupler can be configured to join light in the first fiber portion with light in the second fiber portion, and a third fiber portion can be configured to receive light from the coupler and to illuminate a second detector.
US08873062B2	Reflective material sensor Described herein is a sensor for sensing reflective material. The sensor includes a housing with a transparent window and a sensor mount located in the housing and angled away from a housing wall. A radiation emitter is mounted in the sensor mount and emits radiation along an axis through the transparent window which has an amount of the reflective material located thereon. A radiation detector is mounted in the sensor mount and located adjacent the radiation emitter. The radiation detector is located to receive reflected radiation from the reflective material along another axis. The first axis is angled towards the second axis.
US08873058B2	Optical sensor The invention relates to an optical sensor for monitoring a monitored zone having a detection device for observing a detection zone including the monitored zone, said detection device including a transmission device for transmitting transmission light into the detection zone and a receiver for receiving light reflected back or remitted back from the detection zone or transmitted through the detection zone and having at least one test object within the detection zone of the optical sensor. In accordance with the invention, the optical sensor has a device for avoiding and/or eliminating the contamination of the at least on test object.
US08873050B1	Selective diffraction with in-series gratings Systems and methods for determining information for a wafer are provided. One system includes a first grating that diffracts light from a wafer having wavelengths in a first portion of a broadband range and does not diffract the light from the wafer having wavelengths in a second portion of the broadband range. The system also includes a second grating positioned in the path of the light that is not diffracted by the first grating. The second grating diffracts the light from the wafer having the wavelengths in the second portion of the broadband range. The system further includes a first detector configured to generate first output responsive to the light diffracted by the first grating and a second detector configured to generate second output responsive to the light diffracted by the second grating.
US08873049B2	Broad band Czerny-Turner spectrometer, methods, and applications A low-cost optics, broadband, astigmatism-corrected practical spectrometer. An off-the-shelf cylindrical lens is used to remove astigmatism over the full bandwidth, providing better than 0.1 nm spectral resolution and more than 50% throughput over a bandwidth of 400 nm centered at 800 nm. The spectrometer includes a first spherical mirror disposed along an optical path in an off-axis (tilted) orientation; a diffraction grating disposed along the optical axis in a location optically downstream from the first mirror; a second spherical mirror disposed along the optical path in an off-axis orientation in a location optically downstream from the diffraction grating; a cylindrical optic disposed in the optical path; and a detector disposed in the optical path in a location optically downstream from the second spherical mirror.
US08873047B2	Dispersive element, spectrometer and method to spectrally separate wavelengths of light incident on a dispersive element A dispersive element is disclosed which is designed to receive incident light (1) and disperse the incident light (1) into multiple spatially separated wavelengths of light. The dispersive body (DB) comprises a collimation cavity (COLL) to collimate the incident light (1), at least two optical interfaces (PRIS) to receive and disperse the collimated light (2) and a collection cavity (CLCT) to collect the dispersed light (3) from the at least two dispersive interfaces (op1, op2) and to focus the collected light (4).
US08873045B2	Spectrocolorimeter and image forming apparatus A spectrocolorimeter comprises: a calculation unit configured to calculate wavelengths of dispersing light rays respectively received by a plurality of pixels included in a light detection unit using a correspondence relationship between pixels and wavelengths of a plurality of extremal value points in a profile of dispersing light rays detected by the light detection unit upon execution of colorimetry of a reference object to be measured, wherein when the calculation unit calculates the wavelengths of the dispersing light rays respectively received by the plurality of pixels, the calculation unit adjusts a colorimetry condition for respective extremal value points so that signals to be output from pixels corresponding to the plurality of extremal value points have output levels which are not less than a reference and are not saturated.
US08873044B2	Apparatus and methods for optical emission spectroscopy The invention provides a spark generator for generating a spark for optical emission spectroscopy (OES), wherein the spark has a current waveform comprising a first modulated portion which comprises a plurality of relatively high current and high gradient peaks of variable amplitude and/or inter-peak duration and a second modulated portion of relatively low current and low gradient which is substantially without modulated peaks. The spark is preferably generated from two or more programmable current sources. The invention also provides an optical emission spectrometer comprising the spark generator and a method of optical emission spectroscopy using the spark generator.
US08873042B2	Method for automatically calibrating a Raman spectrum detection system and Raman spectrum detection system A Raman spectrum detection system including a light source for emitting excitation light that excites a detected object to emit Raman light; an external light path system for irradiating light emitted from the light source on the detected object and collecting the Raman light emitted by the detected object; a light detection device for receiving the Raman light collected by the external light path system and detecting the Raman light to obtain spectrum data thereof; a control device for controlling the excitation light source to provide the excitation light, controlling the light detection device to detect the Raman light, receiving the spectrum data output from the light detection device, and analyzing said spectrum data to identify the detected object; and an automatic calibration device for holding the standard sample and for automatically calibrating the system.
US08873038B2	Tailored raman spectrocopic probes for ultrasensitive and highly multiplexed assays Embodiments of nanostructured, multilayered metal-dielectric particles suitable for use as Raman spectroscopic probes are disclosed, as well as methods of designing, making and using such multilayered nanoparticles, and kits including the multilayered nanoparticles. The multilayered nanoparticles include alternating metal and dielectric layers and an outer dielectric shell. One or more of the dielectric layers may include a plurality of reporter molecules. Embodiments of the multilayered nanoparticles are suitable for detecting target analytes in a sample. Some embodiments of the multilayered nanoparticles are suitable for use in multiplexed assays, including assays for multiple target analytes having differing concentrations.
US08873031B2	Method and apparatus for inspecting surface of a disk A disk surface inspection method for detecting a circle scratch defect, separately from sporadically existing scratch defects. In the method, the sample is irradiated with light, regular reflection light reflected from the sample is detected, scattered light in the vicinity of the regular reflection light is detected separately from the regular reflection light, scattered light, scattered in a high angle direction greater than the direction of the regular reflection light is detected, and the defects on the surface of the sample are detected by processing a regular reflection light detection signal, a low-angle scattered light detection signal and a high-angle scattered light detection signal to extract defect candidates, and regarding the extracted defect candidates, a circumferential defect is extracted based on the ratio of defect candidates in a circumferential direction within a predetermined width in a radial direction from the center of the sample.
US08873027B2	Cell observation device and cell observation method A cell observation device is provided with a reflection interference shutter 106A which adjusts a light quantity of light emitted from a reflection interference measurement light source 106, a quantitative phase shutter 105A which adjusts a light quantity of light emitted from a quantitative phase measurement light source, a camera 110 which images reflected light from the reflection interference measurement light source 106 to generate a reflection interference image and which images transmitted light from a quantitative phase measurement light source 105 to generate a quantitative phase image, and a first extraction unit 204 and a second extraction unit 205 which extract first and second parameters from the reflection interference image generated by the camera 110. During generation of the reflection interference image, the quantitative phase shutter 105A blocks the light from the quantitative phase measurement light source 105. During generation of the quantitative phase image, the reflection interference shutter 106A blocks the light from the reflection interference measurement light source 106.
US08873023B2	Illumination system for microlithography An illumination system for microlithography serves to illuminate an illumination field with illumination light of a primary light source. A first raster arrangement has bundle-forming first raster elements which are arranged in a first plane of the illumination system or adjacent to the plane. The first raster arrangement serves to generate a raster arrangement of secondary light sources. A transmission optics serves for superimposed transmission of the illumination light of the secondary light sources into the illumination field. The transmission optics has a second raster arrangement with bundle-forming second raster elements. In each case one of the raster elements of the first raster arrangement is allocated to one of the raster elements of the second raster arrangement for guiding a partial bundle of an entire bundle of illumination light. The first raster arrangement for example has at least two types (I, II, III) of the first raster elements which have different bundle-influencing effects. The raster elements of the two raster arrangements are arranged relative to one another in such a way that to each raster element type (I to III) is allocated at least one individual distance (ΔI, ΔII, ΔIII) between the first raster element of this type (I to III) and the allocated second raster element of the second raster arrangement. As a result, an illumination system is obtained which allows particular illumination parameters to be influenced in such a way that undesirable influences on other illumination parameters are avoided to the greatest extent possible.
US08873022B2	Projection exposure method, system and objective A projection exposure method is disclosed which includes exposing an exposure area of a radiation-sensitive substrate, arranged in an image surface of a projection objective, with at least one image of a pattern of a mask arranged in an object surface of the projection objective in a scanning operation. The scanning operation includes moving the mask relative to an effective object field of the projection objective and simultaneously moving the substrate relative to an effective image field of the projection objective in respective scanning directions. The projection exposure method also includes changing imaging properties of the projection objective actively during the scanning operation according to a given time profile to change dynamically at least one aberration of the projection objective between a beginning and an end of the scanning operation. Changing at least one imaging property of the projection objective includes changing optical properties of a mirror arranged in the projection beam path optically close to a field surface by changing a surface profile of the reflective surface of the mirror in an optically used area.
US08873018B2	Display substrate and display device including the same comprising first and second column spacers that protrude directly from a black matrix pattern A display substrate includes a substrate on which a first pixel area including a first light-blocking region, and a second pixel area adjacent to the first pixel area and including a second light-blocking region are defined, an insulating layer in the first and second light-blocking regions, a black matrix pattern layer on the insulating layer, a first column spacer in the first light-blocking region and protruding from the black matrix pattern layer, and a second column spacer in the second light-blocking region and protruding from the black matrix pattern layer. A height of a top surface of the first column spacer is different from a height of a top surface of the second column spacer, where the heights are taken with respect to the substrate.
US08873015B2	Display device and timepiece comprising a wiring board layered on a back surface of a back substrate A display device that has a display panel having a front substrate, an image forming unit, and a back substrate rendered together in layers, and a wiring board layered on the back surface of the back substrate. A plurality of input/output pins are formed on the front surface of the back substrate, and a plurality of connection pins that are electrically connected to the input/output pins by respective conductor members are formed on the back surface of the wiring board.
US08873014B2	Display device The present invention relates to a display device including a substrate, a display signal line disposed on the substrate, a contact assistant disposed on the pad region of the substrate as a draw-out terminal of the display signal line, a driver IC chip disposed on the substrate and connected to the display signal line through the contact assistant, and a testing thin film transistor disposed between the substrate and the driver IC chip. The testing thin film transistor and the display signal line are connected to each other.
US08873013B2	Liquid crystal display panel A liquid crystal display (LCD) panel divided into a first area and a second area is provided. The first and second areas both include first sub-pixels and second sub-pixels. Each first sub-pixel provides a first main alignment vector; each second sub-pixel provides a second main alignment vector having a direction opposite to that of the first main alignment vector. The LCD panel has first sub-pixel units and second sub-pixel units arranged in arrays. Each first sub-pixel unit includes one first sub-pixel and one second sub-pixel sequentially arranged from top to bottom in a column direction. Each second sub-pixel unit includes one first sub-pixel and one second sub-pixel sequentially arranged from bottom to top in the column direction. In any one of the first area and the second area, multiple first sub-pixel units and multiple second sub-pixel units are arranged together in a same row.
US08873005B2	Method for manufacturing alignment layer A method for manufacturing an alignment layer is provided. An alignment material having an ultraviolet reactive functional group is formed on a substrate. A pre-baking process is performed on the alignment material located on the substrate. An ultraviolet polarizer is provided on the substrate. An aligning process is performed on the pre-baked alignment material, so as to irradiate an ultraviolet light to the substrate. The ultraviolet light passes through the ultraviolet polarizer and irradiates to the pre-baked alignment material. A post-baking process is performed on the alignment material after being aligned, so as to fully cure the alignment material.
US08873004B2	2D/3D switchable image display device A two-dimensional (2D)/three-dimensional (3D) switchable image display device is provided. The 2D/3D switchable image display device forms gradation of an image in a light modulation panel, provides color to light beams that penetrate a plurality of electro-wetting prisms arranged in correspondence to the plurality of pixels of the image, and adjusts the direction of the light beam such that the light beams of the pixels of the image are directed towards at least two different view zones in a 3D mode and such that the light beams maintain their paths in a 2D mode.
US08873003B2	Liquid crystal display device and manufacture method thereof The present invention provides a liquid crystal display device, including an array substrate, a color film substrate and a liquid crystal layer. The color film substrate includes a black matrix and the black matrix is formed by a black electrical conductive adhesive. The present invention also provides a manufacture method of a liquid crystal display device. The present invention adopts the liquid crystal display device and the manufacture method thereof to efficiently eliminate the static electricity and reduce the manufacture cost thereby solving the technical problems of the prior liquid crystal display device having a high cost and being not capable of efficiently eliminating the static electricity.
US08873002B2	Liquid crystal display A liquid crystal display includes first and second insulating substrates facing each other, and a plurality of pixels comprising a plurality of rows and a plurality of columns and divided into a first pixel group comprising only the pixels on a first row and a second pixel group comprising each of the remaining pixels on second to last rows. The pixels of the first pixel group have a first opening ratio, and the pixels of the second pixel group have a second opening ratio different from the first opening ratio. The first opening ratio is smaller than the second opening ratio, and the first opening ratio is about 60% to about 80% of the second opening ratio; and the pixels of the first pixel group but not the pixels of the second pixel group have a light interception pattern in an opening portion.
US08873000B2	Color filter substrate, display panel, and method for producing color filter substrate Disclosed is a color filter substrate that includes: a first colored layer (22r), a second colored layer (22g), and a third colored layer (22b) that are arranged on a transparent substrate (10b) and that have mutually different hues; and a common electrode (25) that is provided so as to cover the colored layers. The common electrode (25) includes: a first transparent electrode (23a) and a second transparent electrode (23b) that are formed of a first transparent conductive film and that are arranged so as to overlap the first colored layer (22r) and the second colored layer (22g), respectively; a third transparent electrode (24b) that is formed of a second transparent conductive film, which is different from the first transparent conductive film, and that is arranged so as to overlap the third colored layer (22b); and a fourth transparent electrode (24a) that is formed of the second transparent conductive film and that is arranged so as to overlap the first colored layer (22r).
US08872997B2	Display assembly A display assembly includes at least a protective cover layer, a display stack that includes a plurality of display components arranged in a plurality of interconnected layers, the display stack providing an imaging service, and a flat support chassis arranged to provide support for the display stack. In the described embodiment, the display stack is positioned between the protective cover layer and the flat support chassis. The display assembly can be disposed within a housing with sides sloping inwards where a portion the display assembly is proximate to the inward sloping sides. To allow the display assembly to fit closer to the edges of the housing, material can be removed from the flat support chassis. For example, edges of the flat support chassis can be chamfered.
US08872994B2	Backplane of liquid crystal display device, back light module, and liquid crystal display device The present invention discloses a backplane of liquid crystal display (LCD) device, back light module and LCD device. A backplane of LCD device comprises a mainboard; wherein, the side of the mainboard is provided with a shield on the rubber frame corresponding to the LCD device. The present invention extends the backplane of LCD device and covers exposed part of rubber frames. Because the backplane of LCD device has an intensity which is significantly higher than that of rubber frames and is not easily damaged during handling, the aim of protecting rubber frames and source pcbs is achieved. However, because the backplane of LCD device is adjacent to rubber frames, shields can be added directly in the backplane of LCD device. The process is simple and can minimize use of material for covering.
US08872991B2	Display device and display array substrate A display device comprises a display array substrate, a common substrate and a display layer. The display array substrate comprises a display region and a periphery region, and at least one chip-bonding area is formed in the periphery region. The display layer is sandwiched between the display array substrate and the common-electrode substrate. A conductive loop is disposed in the periphery region of the display array substrate, and passes through the chip-bonding area.
US08872989B2	Electro-optical device and electronic apparatus A driving circuit applies a voltage according to an assigned grayscale during each unit period of each display period, in such a manner that the applied voltage to a liquid crystal element during one of the unit periods and the applied voltage to the liquid crystal element during the other of the unit periods are opposite in polarity during each of the display periods, and an overdrive control unit enables the drive circuit to perform overdrive of a compensation grayscale according to a display image during the corresponding display period and to a display image during the immediately preceding display period during each of the first and second unit periods of each of the display periods, during each of the display periods.
US08872985B2	Video projector system Some embodiments provide for a modular video projector system having a light engine module and an optical engine module. The light engine module can provide narrow-band laser light to the optical engine module which modulates the laser light according to video signals received from a video processing engine. Some embodiments provide for an optical engine module having a sub-pixel generator configured to display video or images at a resolution of at least four times greater than a resolution of modulating elements within the optical engine module. Systems and methods for reducing speckle are presented in conjunction with the modular video projector system.
US08872984B2	Tuner module, and mobile communication terminal Provided is an LTE-system mobile communication terminal in which a reduction in terminal size and a reduction in the number of components is desired when a terrestrial digital television broadcast is to be received. Two antennas from among terrestrial digital television broadcast receiving antennas are switched and controlled so as to also be used as transmitting/receiving antennas from LTE communication, and the reception diversity is switched to either a 2-system combination or 4-system combination in accordance with whether the television broadcast is in the VHF band or UHF band. As a result, the number of antennas for example can be reduced and the terminal costs and size can be reduced.
US08872982B2	Transmission device and reception device for baseband video data, and transmission/reception system In a transmission device: a controller performs a control of reading, from information regarding video specification, information regarding a horizontal resolution and a vertical resolution that are supported by a reception device and information regarding frame rate that is supported by the reception device, and multiplexing, to the video signal during a blanking period of the video signal, information indicating a reduce frame rate that is selectable from a range supported by the reception device; and a transmitter transmits baseband video data at the reduced frame rate.
US08872978B2	Cable equalization and monitoring for degradation and potential tampering Provided herein are methods and systems that provide automatic compensation for frequency attenuation of a video signal transmitted over a cable. In accordance with an embodiment, a system includes an equalizer and a compensation controller. The equalizer receives a video signal that was transmitted over a cable, provides compensation for frequency attenuation that occurred during the transmission over the cable, and outputs a compensated video signal. The compensation controller automatically adjusts the compensation provided by the equalizer based on comparisons of one or more portions of the compensated video signal to one or more reference voltage levels. One or more values indicative of one or more levels of compensation provided by the equalizer are stored in memory and/or registers for each time, of a plurality of times. A monitor monitors for changes in the cable and/or the video signal transmitted over the cable based on the stored values. Additionally, the monitor can selectively trigger an alert based on changes in the one or more stored values.
US08872977B2	Method and apparatus for content adaptive spatial-temporal motion adaptive noise reduction According to one embodiment, a method is disclosed. The method includes performing a local content analysis on video data to classify pixels into singular pixels, motion pixels and static pixels.
US08872975B2	Receiving device, display controlling method, and program The present invention relates to a receiving device, a display controlling method, and a program that can make effective use of captions included in programs.In a TV receiver 1, tuners 11A to 11C are each a tuner for receiving a program. A display section 16 displays caption related information related to caption data included in an object program received by the digital tuner 11B together with an image of a main program received by the digital tuner 11A. The present invention is, for example, applicable to TV receivers having a plurality of tuners for receiving a broadcast program, and the like.
US08872964B2	Long-range motion detection for illumination control An illumination system and methods to control a light source are provided. An illumination system includes a light source, a two-dimensional non-Passive Infrared (non-PIR) imager, and a controller. The light source provides at least two levels of illumination. The non-PIR imager images an area and to produce image data representative of images across at least part of a visible portion of an electromagnetic spectrum. The controller is communicatively coupled to receive the image data from the non-PIR imager and process the received image data to detect at least one ambient environmental characteristic of the area in the part of the visible portion of the electromagnetic spectrum, where the ambient environmental characteristic is indicative of a presence or imminent presence of a body in the area. The controller is also coupled to control operation of the light source based on, at least in part, detection of the ambient characteristic of the environment.
US08872962B2	Focus detection apparatus and image pickup apparatus The focus detection apparatus includes an image pickup part (101-107) including first and second pixels photoelectrically converting first and second images formed by light fluxes passing through different pupil area of an image-forming optical system to produce first and second image signals, a first signal processor (121) performing a first process to smooth the first and second image signals by using mutually different filters, a second signal processor (121) performing a second process to sharpen the first and second image signals by using mutually different filters. A calculating part (121) calculates a defocus amount by using the first and second image signals subjected to the first process when a contrast value is higher than a predetermined value, and calculates the defocus amount by using the first and second image signals subjected to the second process when the contrast value is lower than the predetermined value.
US08872961B2	Focusing image verifying device An autofocus system is provided that includes a focus-verification image-recapturing processor and a focus-verification image display processor. The focus-verification image-recapturing processor sets ISO sensitivity to a value lower than a predetermined value and increases an exposure value by adjusting at least one of an aperture value and an exposure time to carry out a focus-verification image-recapturing operation under focusing conditions applied in an antecedent autofocus operation when ISO sensitivity that is set in said auto focus operation exceeds the predetermined value. The focus-verification image display processor displays a focus-verification image obtained by the focus-verification image-recapturing operation when the ISO sensitivity that is set in the auto focus operation exceeds the predetermined value.
US08872958B2	Image display device, image pickup apparatus, image display control method, and program An image display device includes a display unit configured to display at least an image and an icon relating to a predetermined setting, a touch panel which allows input of operations, and on which a predetermined inhibited area is set, and a control unit configured to perform control so that, after the control unit sets the predetermined inhibited area, when an operation has been input by the touch panel, the control unit determines whether or not the operation has been input within the predetermined inhibited area, and, in a case where the operation has been input within the predetermined inhibited area, by erasing the icon displayed by the display unit, a user is allowed to recognize that an unintended operation has been input within the predetermined inhibited area.
US08872956B2	Electronic camera with self-explanation/diagnosis mode An electronic camera having a plurality of functions including capturing and recording images is provided. The electronic camera includes an operation input unit for inputting external operations that designate corresponding functions of the camera to be performed, an image pickup unit for capturing the image of an object, and a recorder for recording the image captured by the image pickup unit. The electronic camera further includes a playback unit for at least playing back image information that is recorded on the recording medium and a mode selector for selecting one operation mode of the camera from a plurality of available operation modes that include an operation explanation mode. If the operation explanation mode is selected at the mode selector, the playback unit plays back an operation guide that is pre-stored in a memory, the operation guide explaining at least one of the camera operations and functions thereof.
US08872954B2	Image processing apparatus having feature extraction and stored image selection capability, method of controlling the apparatus, program thereof, and storage medium An image processing apparatus for retrieving and displaying image data related to an object included in image data, and a method of controlling the apparatus, whereby the image processing apparatus obtains image data, extracts feature data of an object in the image data, retrieves, from image data stored in a storage medium, image data having feature data similar to the extracted feature data, selects image data to be displayed from a plurality of items of retrieved image data, based on additional data of each of the plurality of retrieved image data, and displays the selected image data together with the obtained image data.
US08872952B2	Image capture and processing integrated circuit for a camera An image capture and processing (ICP) integrated circuit (IC) is provided for a camera. The ICP IC includes an imaging array which, in turn, includes image pixel capture sensors arranged in rows and columns. A row decoder extends along a first edge of the imaging array and is configured to enable sensor rows in the imaging array. An analog signal processor (ASP) system extends along a second edge of the imaging array and is configured to amplify signals from enabled sensors in columns of the imaging array. A control circuit is configured to sequentially enable the rows so that the ASP can amplify signals from all of the sensors in the imaging array, one row at a time.
US08872950B2	Image sensor and image-capturing apparatus with imaging pixel and focusing pixel having light shield layers including openings The capacitance of a charge-accumulating layer of an imaging pixel is made different from that of a charge-accumulating layer of a focusing pixel, thereby reducing the difference in saturation capacitance due to the difference between the light-reception efficiencies of the imaging pixel and the focusing pixel. The ratio between the capacitance of the charge-accumulating layer of the imaging pixel and that of the charge-accumulating layer of the focusing pixel is determined in consideration of a variation in ratio between the light-reception efficiencies of the imaging pixel and the focusing pixel with a change in at least one of the exit pupil distance and the aperture value.
US08872949B2	Solid-state image pickup device, image pickup system including the same, and method for manufacturing the same A solid-state image pickup device including a photoelectric conversion element, a floating diffusion, and an element isolation region that are disposed above a first semiconductor region has a second semiconductor region of a first conductivity type disposed on the first semiconductor region. An interface between the first semiconductor region and a portion of the second semiconductor region corresponding to the photoelectric conversion element is located at a first depth, whereas the interface between the first semiconductor region and a portion of the second semiconductor region disposed under the element isolation region and the floating diffusion is located at a second depth smaller than the first depth.
US08872947B2	Frame to frame persistent shadow reduction within an image An apparatus, computer program product, and method for reducing persistent shadows within an image. The apparatus includes a camera configured to generate frames of the image. The apparatus also includes a computer processor. The computer processor calculates the average normalized brightness for each pixel in the image and adjusts the brightness of each pixel with the average normalized brightness.
US08872946B2	Systems and methods for raw image processing Systems and methods for processing raw image data are provided. One example of such a system may include memory to store image data in raw format from a digital imaging device and an image signal processor to process the image data. The image signal processor may include data conversion logic and a raw image processing pipeline. The data conversion logic may convert the image data into a signed format to preserve negative noise from the digital imaging device. The raw image processing pipeline may at least partly process the image data in the signed format. The raw image processing pipeline may also include, among other things, black level compensation logic, fixed pattern noise reduction logic, temporal filtering logic, defective pixel correction logic, spatial noise filtering logic, lens shading correction logic, and highlight recovery logic.
US08872944B2	Method and system for image centering during zooming The methods and systems described herein are directed to image processing. More specifically, the image processing described herein may include centering an object in the field of view during zooming. The image processing methods and systems may further include setting a magnification factor, positioning the camera in a first field of view, capturing a first image, setting a second magnification factor, and capturing a second image. Additionally, the described techniques may include altering the first image to determine an offset and adjusting the camera based on the offset.
US08872934B2	Image capturing device which inhibits incorrect detection of subject movement during automatic image capturing A control unit monitors a state of captured image sequentially outputted by an image capturing unit. The control unit carries out a first determination that determines whether or not the state of a captured image satisfies a prescribed condition. When the result is that the prescribed condition is satisfied, the captured image is recorded in a recording unit. The control unit also carries out a second determination that determines whether or not the state of the captured image is appropriate for being subjected to the first determination. When the result is that the state is not appropriate for being subjected to the first determination, a warning is issued to the user to this effect.
US08872933B2	Video camera A video camera can be configured to highly compress video data in a visually lossless manner. The camera can be configured to transform blue and red image data in a manner that enhances the compressibility of the data. The data can then be compressed and stored in this form. This allows a user to reconstruct the red and blue data to obtain the original raw data for a modified version of the original raw data that is visually lossless when demosaiced. Additionally, the data can be processed in a manner in which the green image elements are demosaiced first and then the red and blue elements are reconstructed based on values of the demosaiced green image elements.
US08872930B1	Digital video camera with internal data sample compression An apparatus generally comprising a first encoder, a decoder and a second encoder is disclosed. The first encoder may be configured to generate a plurality of first compressed samples from a plurality of data samples of a picture. The data samples generally include a plurality of luminance samples and chrominance samples created internal to a digital video camera. The decoder may be configured to generate a plurality of reconstructed samples from the first compressed samples. The second encoder may be configured to generate a plurality of second compressed samples based on the reconstructed samples.
US08872929B2	Picture imaging apparatus and imaging control method A picture imaging apparatus includes: an imaging means for imaging a subject picture to acquire taken picture data; a storage processing means for performing a storage process of taken picture data acquired by the imaging means; a motion detecting means for detecting motion of the picture imaging apparatus itself; a manipulating means for manipulating a shutter; and a control means for instructing the imaging means to perform a process in accordance with a shutter manipulation at a timing based on a result detected in the motion detecting means during a period during which the shutter is being manipulated by the manipulating means.
US08872927B2	Fast zero recovery with alpha blending in gyroscopic image stabilization Systems and methods for performing fast zero recovery with alpha blending with digital image stabilization implemented in a digital camera. The digital camera includes a gyroscope to measure motion of the digital camera and processes the signals from the gyroscope to track the total displacement of an image sensor over a series of frames of video. If the motion is a sustained motion in a substantially uniform direction, then the digital camera recognizes the motion as a panning-type motion and activates a fast-zero recovery with alpha blending operation to retrace the displacement of active pixel locations to the center of the image sensor. Alpha blending is performed to smooth the transition from a normal image stabilization operation to the fast-zero recovery with alpha blending operation.
US08872926B2	Flashless motion invariant image acquisition system A flashless image acquisition system that includes a tandem imaging device having a tandem field of view and comprising a velocity vector estimate imaging device coupled to an object imaging device; and a peripheral imaging device having a peripheral field of view wider than the tandem field of view and configured to acquire real-time information related to positions of a moving object, wherein the real-time information is provided to the tandem imaging device, further wherein the velocity vector estimate imaging device is configured to provide in-exposure velocity vector estimates to control the object imaging device is described.
US08872923B2	Color calibration chart acquisition The present disclosure relates to color calibration chart acquisition. In an example, a video acquired by an imaging device may be processed. The video may be analyzed to automatically detect a reproduction of a color calibration chart. Upon detection of a reproduction of the color calibration chart, it may be determined whether color calibration chart reproduction quality is within a selected quality threshold. Upon determining that color calibration chart reproduction quality is not within a selected threshold, user feedback may be provided, via the imaging device, to dynamically guide the user to make adjustments in the video acquisition in order to obtain a color calibration chart reproduction within the selected quality threshold.
US08872922B2	System and method for capturing, storing, analyzing and displaying data related to the movements of objects A system and method for the capture and storage of data relating to the movements of objects, in a specified area and enables this data to be displayed in a graphically meaningful and useful manner. Video data is collected and video metadata is generated relating to objects (persons) appearing in the video data and their movements over time. The movements of the objects are then analyzed to detect the movements within a region of interest. This detection of movement allows a user, such as a manager of a store, to make informed decisions as to the infrastructure and operation of the store. One detection method relates to the number of people that are present in a region of interest for a specified time period. A second detection method relates to the number of people that remain or dwell in a particular area for a particular time period. A third detection method determines the flow of people and the direction they take within a region of interest. A fourth detection method relates to the number of people that enter a certain area by crossing a virtual line, a tripwire.
US08872919B2	Vehicle surrounding monitoring device A vehicle surrounding monitoring device includes a first capturing device provided at a side of a vehicle in order to capture a first image, a second capturing device provided at front relative to the first capturing device in order to capture a second image, a displaying device for displaying the first image and the second image and for monitoring a vehicle surrounding, an image process device by which a borderline between the first image and the second image is defined in a combined image of the first image and the second image so as to be identical with a straight line connecting a position of the first capturing device and a position of the second capturing device.
US08872917B1	Tamper-resistant video surveillance network A network of surveillance digital video cameras is provided. Each camera records video data and provides the video recordings to other networked cameras as well as to a central video storage. The instantly created plurality of copies of surveillance video recordings adds a great degree of difficulty for attempts to eliminate all of the individual camera's recordings during a security breach. Each networked camera is equipped with its own integrated storage device capable of holding several hours of recorded video footage. The networked cameras can exchange copies video data and store it locally on integrated storages.
US08872916B2	Method for collecting media associated with a mobile device A media collection system (102) uses media collection devices (107) to record media in the vicinity of a mobile device (104). A method (300) for collecting media associated with a user of a mobile device (104) includes the mobile device detecting (304) a broadcast signal from a communication node of the media collection system (102) at a radio interface of the mobile device. Then the mobile device requests (308) a media collection service of the media collection system. In response, the mobile device receives (314) an access identifier from the media collection system. The access identifier can be used to access media collected by the media collection system. The mobile device can then cease a self-collection activity while in the vicinity of the media collection system.
US08872911B1	Line scan calibration method and apparatus A method and apparatus for assessing at least one of motion linearity of a motion stage, stage motion straightness of a motion stage, image capture repeatability of a motion stage and camera and accuracy of a calibration plate used to assess motion stage characteristics, the method including using a line scan camera to generate two dimensional images of a calibration plate having a plurality imageable features thereon, examining the images to identify actual coordinates of the imageable features and using the actual coordinates to assess linearity, straightness, repeatability and/or plate accuracy.
US08872906B2	Endoscope assembly with a polarizing filter An endoscope includes an imaging device, a first polarizing filter disposed in front of the imaging device, a light source, and a second polarizing filter disposed in front of the light source. The planes of polarization of the first and second polarizing filters are at a substantially 90° angle.
US08872904B1	Display apparatus and method of displaying multi-view images A display apparatus is provided. The display apparatus includes: a display panel configured to include a plurality of pixels including a plurality of sub pixels and display an image frame; a visual field divider configured to be disposed on a front surface of the display panel; and a controller configured to render and display a first image frame to display a first view image in at least some of the plurality of sub pixels and a second image frame so that a second view image is shifted and displayed based on a position in which the first view image is displayed in the at least some of the sub pixels based on a distance between the display panel and the visual field divider.
US08872901B2	Stereoscopic glasses and display apparatus including the same Stereoscopic glasses and a display apparatus including the same, which can reduce a user's eyestrain, are provided. The display apparatus includes: a signal processor which processes a three-dimensional (3D) video signal to have a predetermined depth effect; a display unit which displays a 3D image based on the video signal processed by the signal processor; and a controller which controls the signal processor to process a first area determined viewed by a user and a second area that is not determined to be viewed by the user, of the 3D image displayed by the display unit, such that the first area is different in level of a depth effect than the second area. Accordingly, a user's eyestrain is remarkably reduced to thereby increase convenience.
US08872900B2	Image display apparatus and method for operating the same An image display apparatus and a method for operating the same are disclosed. The method for operating an image display apparatus includes receiving an image including at least one three-dimensional (3D) object, calculating a depth value of the at least one 3D object, changing at least one of sharpness and brightness of pixels corresponding to the at least one 3D object according to the depth value and generating an output image including the changed at least one 3D object, and displaying the output image.
US08872899B2	Method circuit and system for human to machine interfacing by hand gestures Disclosed are systems, methods and circuits for human to machine interfacing using one or more 3D hand skeleton models, comprising an image acquisition circuit to acquire a 2D image of a hand, a hand feature identifier module to identify hand features in an acquired image and an image skeleton builder module to generate a 2D skeleton dataset of the hand using identified features. A 3D skeleton builder module is adapted to generate a 3D hand skeleton dataset by determining a configuration of some or all of the one or more 3D hand skeleton models whose 2D projection substantially corresponds to the generated 2D skeleton dataset.
US08872898B2	Mobile device capture and display of multiple-angle imagery of physical objects Methods and systems for capturing and displaying multiple-angle imagery of physical objects are presented. With respect to capturing, multiple images of an object are captured from varying angles in response to user input. The images are analyzed to determine whether at least one additional image is desirable to allow generation of a visual presentation of the object. The user is informed to initiate capturing of the at least one more image based on the analysis. The additional image is captured in response to second user input. The presentation is generated based on the multiple images and the additional image. For displaying, a visual presentation of an object is accessed, the presentation having multiple images of the object from varying angles. The presentation is presented to the user of a mobile device according to user movement of the device. The user input determines a presentation speed and order of the images.
US08872897B2	Camera calibration using an easily produced 3D calibration pattern A system for computing one or more calibration parameters of a camera is disclosed. The system includes a processor and a memory. The processor is configured to provide a first object either marked with or displaying three or more fiducial points. The fiducial points have known 3D positions in a first object reference frame. The processor is further configured to provide a second object either marked with or displaying three or more fiducial points. The fiducial points had known 3D positions in a second object reference frame. The processor is further configured to place the first object and the second object in a fixed position such that the fiducial point positions of the first and second objects are non-planar. The processor is further configured to compute one or more calibration parameters of the second camera using computations based on images taken of the fiducials.
US08872896B1	Hardware-based system, method, and computer program product for synchronizing stereo signals A system, method, and computer program product are provided for synchronizing stereo signals. In use, stereo signals are synchronized amongst a plurality of display devices utilizing hardware.
US08872892B2	Image processing apparatus and image processing method as well as image processing system for processing viewpoint images with parallax to synthesize a 3D image An image processing apparatus includes a monitor that displays an image based on a right viewpoint image and left viewpoint image, or multi-viewpoint images. The displayed image is used by a user for specifying an indispensable output area which the user wants to be included in a 3D image. The apparatus further includes an input device inputting information on the indispensable output area as specified by the user referring to the image as displayed on the monitor, a control unit causing the indispensable output area to be indicated in the image, and an output device outputting the right viewpoint image and left viewpoint image, or multi-viewpoint images, and information on the indispensable output area.
US08872890B2	Method and receiver for enabling switching involving a 3D video signal A transmitter according to the present invention includes a decoder that decodes a video signal received from outside and acquires identification information including a format concerning 2D or 3D of video from a layer corresponding to each frame of the video signal and a backend processor that performs spatial or temporal scaling of video data by the video data based on the identification information and, when the format of the video is switched, switches parameters for the scaling adjusting to switching timing.
US08872885B2	System and method for a conference server architecture for low delay and distributed conferencing applications Systems and methods for conducting a multi-endpoint video signal conference are provided. Conferencing endpoints are linked by pairs of a reliable and a less reliable communication channel. Conference video signals are scaleable coded in base layer and enhancement layers format. Video signal base layers, which correspond to a minimum picture quality, are communicated over reliable channels. The video signal enhancements layers may be communicated over the less reliable channels. A conference server mediates the switching of video layer information from transmitting endpoints to receiving endpoints without any intermediate coding or re-coding operations. The video conference can be integrated with an audio conference using either scalable coded audio signals or non-scaleable coded audio signals.
US08872873B2	Light scanning unit and image forming apparatus using the same An image forming apparatus having a light scanning unit including a light source to emit a light beam; a deflector to deflect the light beam in a main scanning direction; an imaging lens to focus the light beam deflected by the deflector onto a photoconductor; at least one reflecting element to reflect the light beam that has passed through the imaging lens; and a bow control apparatus to correct a bow of a scanning line of the light beam, the bow control apparatus comprising first and second support units to support the reflecting element, first and second pressure units to pressure an inside and an outside of the reflecting element, respectively, and first and second adjusting elements to adjust the amount of pressure of the first and second pressure units, the bow control apparatus convexly or concavely bows the reflecting element to correct an image bow of a scanning line of the light beam.
US08872858B2	Method of driving display panel and display apparatus for performing the same A method of driving a display panel includes generating a high pixel gamma voltage and a low pixel gamma voltage. At least one of the high pixel gamma voltage and the low pixel gamma voltage includes a positive gamma voltage and a negative gamma voltage having different values. The positive gamma voltage is a difference between a first gamma voltage higher than a common voltage and the common voltage. The negative gamma voltage is a difference between the common voltage and a second gamma voltage lower than the common voltage. A high pixel data voltage is generated based on the high pixel gamma voltage and the high pixel data voltage output to a high pixel. A low pixel data voltage is generated based on the low pixel gamma voltage and the low pixel data voltage is output to a low pixel.
US08872855B2	Adjusting orientation of content regions in a page layout When the device is rotated from a portrait orientation to landscape orientation, or vice versa, the display device rotates the content items within distinct respective content regions of a page template (“slots”) that each appear to stay in their same position with respect to a frame of reference of the display device. While the content regions stay in their same positions, the content within each content region counter-rotates in place to offset the rotation of the display device. Thus, the content within the content regions maintains an orientation with respect to a constant (non-rotating) frame of reference, regardless of the orientation or rotation of the display device. In one embodiment, a slot's position, height, and width in a template in a second orientation are determined from the slot's position, height, and width in the template in a first orientation.
US08872853B2	Virtual light in augmented reality A head-mounted display system includes a see-through display that is configured to visually augment an appearance of a physical environment to a user viewing the physical environment through the see-through display. Graphical content presented via the see-through display is created by modeling the ambient lighting conditions of the physical environment.
US08872851B2	Augmenting image data based on related 3D point cloud data Embodiments of the invention describe processing a first image data and 3D point cloud data to extract a first planar segment from the 3D point cloud data. This first planar segment is associated with an object included in the first image data. A second image data is received, the second image data including the object captured in the first image data. A second planar segment related to the object is generated, where the second planar segment is geometrically consistent with the object as captured in the second image data. This planar segment is generated based, at least in part, on the second image data, the first image data and the first planar segment. Embodiments of the invention may further augment the second image data with content associated with the object. This augmented image may be displayed such that the content is displayed geometrically consistent with the second planar segment.
US08872849B2	Relational rendering of multi-faceted data Technology for rendering representations of multi-faceted data are disclosed. As one example, the technology includes organizing and rendering multiple subsets of a dataset according to temporal or other linear attributes, e.g., for visual comparison and/or other visualization. A collection of subsets may be determined in response to a selection of a facet having multiple facet attributes. Each subset may include the entries of the dataset that have the facet attribute corresponding to that subset. Optionally, the multiple subsets may be rendered in alignment with corresponding portions of a hierarchical depiction, e.g., to visually represent the parameters of the subsets.
US08872845B2	Information display apparatus and computer-readable storage medium A information display apparatus includes a content storage module, a controller, a specification module, and a marker information storage module. The controller controls a text to be displayed. The specification module specifies, based on a user's operation, a character string, as a marker display character string in the displayed text. The marker information storage module stores position information of the marker display character string within a storage region of the content storage module, and stores a stored time where the position information is stored as being related to the position information. The controller allows the text in an identifiable manner based on the position information, wherein a mode of the identifiable display is differed in accordance with time elapsed since the stored time for the marker display character string.
US08872841B2	Generating and merging two halftoned images A method of producing a bit-map including rendering a bit-map of a first image using a first stochastic half-tone screen set, rendering a bit-map of a second image using a second stochastic half-tone screen set, wherein the first half-tone screen set and the second half-tone screen set have respectively associated stochastic half-tone screens, and wherein each half-tone screen of the second half-tone screen set is less than 100 percent correlated with, and not an inverse of, the associated half-tone screen of the first half-tone screen set; and merging the bit-map of the first image with the bit-map of the second image.
US08872839B2	Real-time atlasing of graphics data Performing real-time atlasing of graphics data and creation and maintenance of texture atlases for applications having dynamic graphics content. Embodiments include allocating a texture atlas configured to store textural elements for use in rendering graphical elements, and providing a graphics processing unit (GPU) access to the texture atlas. During subsequent execution of an application, when a graphical element of the application is to be rendered by the GPU, a block of space can be allocated within the texture atlas and a textural element corresponding to the graphical element can be stored within the allocated block. The GPU therefore has access to the textural element when rendering the graphical element.
US08872838B2	Primitive composition Performing primitive composition within a user interface thread, enhancing the ability to scale a user interface framework to computing devices having limited resources. In one or more embodiments, a user interface thread walks a user interface hierarchy that describes elements of a program's user interface and directly generates static Graphics Processing Unit (GPU) data structures representing at least a portion of the user interface hierarchy. The user interface thread passes the static GPU data structures to a composition thread, which uses these static GPU data structures during generation of a plurality of video frames. This includes the composition thread, based on the static GPU data structures, sending GPU data and GPU commands for the plurality of video frames to a GPU for rendering.
US08872837B2	Device and method for providing application arrangement display rule, and application execution terminal device, and display method therefor To make it possible to display an application that is suitable for specific circumstances of a specific user, from among a large number of applications, without complicating a rule file and without increasing its capacity. An application execution terminal acquires context information from received sensor information, acquires an arrangement display rule file that matches the acquired context information from among arrangement display rule files in which a category indicating a type of an application and a display position of the application are defined, analyzes a category defined by the acquired arrangement display rule file, acquires a list of applications that match the category, links the applications indicated by the list of the applications to the acquired arrangement display rule file, and arranges and displays the applications in accordance with a description of the arrangement display rule file.
US08872830B2	Method for generating a graph lattice from a corpus of one or more data graphs A document recognition system and method, where images are represented as a collection of primitive features whose spatial relations are represented as a graph. Useful subsets of all the possible subgraphs representing different portions of images are represented over a corpus of many images. The data structure is a lattice of subgraphs, and algorithms are provided means to build and use the graph lattice efficiently and effectively.
US08872825B2	Method of representing a material A method is provided for representing a material by approximating an original function modeling the interaction of the material and of light emitted by a light source, which function is defined as a function of pixels, of viewpoints, and of light directions, the method comprising: for each viewpoint, the steps of performing a polynomial approximation of the original modeling function and a geometric approximation of a residue resulting from the difference between the original modeling function and the polynomial approximation of said function; and a step of simplification by decomposing the results obtained from the two approximations into wavelet packets.
US08872821B2	Information display device and display image control method Disclosed herein is an information display device, including: an image display section adapted to display binocular parallax images; a display image control section adapted to control the binocular parallax images displayed on the image display section; and a position information acquisition section adapted to acquire position information representing the three-dimensional position of a target existing in the three-dimensional space on the display surface of the image display section, wherein the display image control section controls the binocular parallax images displayed on the image display section according to the three-dimensional position of the target represented by the position information acquired by the position information acquisition section.
US08872819B2	Computational geometry design for sheet metal machinery corner One or more embodiments of the presently preferred invention provides a method and a computer-program product for creating a parametric corner on a sheet metal design. The parametric corner is a machinery corner that can be constructed in the formed or unformed state and successfully handles a bend corner with different radii and bend angles. Further, the machinery corner allows placing features thereon, as well as producing unformed geometrical representations of said placement.
US08872818B2	Methods and systems for capturing the condition of a physical structure In a computer-implemented method and system for capturing the condition of a structure, the structure is scanned with a three-dimensional (3D) scanner. The 3D scanner generates 3D data. A point cloud or 3D model is constructed from the 3D data. The point cloud or 3D model is then analyzed to determine the condition of the structure.
US08872814B1	System and method for converting media from a lower dimension representation to a higher dimension representation The system includes a module to receive data representing media content, such as a video image, a photograph, and an audio or video file, each being of a first dimension. An encoding module encoded the received data using a parametric number representation system, such a Multiple Base Number System, which includes a combination of fused numerical representation system. A decomposing module decomposes the encoded data into a plurality of signals or slices. A generating module to take the decomposed data and generates data representing the media content in a second dimension that is of a higher order that the first dimension. An output module to output a media representation of the generated higher order data. The media, by way of example could be a 3D image of a received 2D image.
US08872813B2	Parallax image authoring and viewing in digital media An authoring tool assigns a first depth value to a first image layer and a second depth value to a second image layer. The first depth value is a first simulated distance from a user. The second depth value is a second simulated distance from the user. The authoring tool composes an image based on the first image layer and the second image layer such that the image is displayed within a page in a scrollable area on a viewing device. The first depth value is utilized to generate a first offset value from a first static position of the first image layer and the second depth value is utilized to generate a second offset value from a second static position of the second image layer based upon a scroll position of the page with respect to a target location in the scrollable area to create a parallax effect.
US08872811B1	Visualization method The present invention provides a method of digitally generating, via the use of a computer, data indicative of a synthesized appearance of a simulated material having physically plausible appearance attributes. The method includes determining a set of data indicative of the synthesized appearance of the simulated material based at least in part on data associated with the physically tangible source material and at least in part on data of measured attributes of the physically tangible reference material.
US08872810B2	Combined digital modulation and current dimming control for light emitting diodes A method includes providing an input signal identifying a desired brightness for one or more LEDs to first and second parallel control paths. The method also includes generating a digital modulation control signal using the first control path, generating a current control signal using the second control path, and driving the one or more LEDs using the control signals. The method further includes performing compensation in at least one of the control paths to compensate for an increased efficiency of the one or more LEDs. Generating the control signals could include (i) adjusting the digital modulation control signal while maintaining the current control signal at a substantially constant value for a range of lower LED brightness values and (ii) adjusting the current control signal while maintaining the digital modulation control signal at a maximum value or within a range of maximum values for a range of higher LED brightness values.
US08872809B2	Liquid crystal display apparatus, drive circuit therefor, and drive method therefor A liquid crystal display apparatus is disclosed, which is capable of suppressing sound emission caused by the AC drive of liquid crystal while suppressing an increase in power consumption. A non-active period during which polarity reversal of a common electrode signal (VCOM) is repeated at predetermined intervals is provided in each horizontal scanning period. During an active period, a common electrode drive circuit provides a common electrode signal (VCOM) indicating either one of potentials LV1 and LV2 to a common electrode, based on a polarity instruction signal (POL). During the non-active period, the common electrode drive circuit provides a common electrode signal (VCOM) whose potential changes between LV3 and LV4 to the common electrode, based on a reversal timing control signal (CTRL). Here, the amplitude of the common electrode signal (VCOM) for the non-active period is made smaller than the amplitude of the common electrode signal (VCOM) for the active period.
US08872808B2	Driving integrated circuit and electronic apparatus A first receiver receives a clock. A second receiver receives a differential type image signal. An image signal receiving unit performs sampling the differential type image signal by the clock, and generates an image signal driving an electro-optic device. A third receiver receives a time multiplexed control signal. A reception buffer performs sampling of the time multiplexed control signal by the clock and the stores the time multiplexed control signal. A driving control unit performs a driving control of the electro-optic device on the basis of the stored time multiplexed control signal.
US08872805B2	Handwriting data generating system, handwriting data generating method, and computer program product A handwriting data generating system includes: a handwriting device that is used to handwrite information on a display surface on which an image is displayed; and a handwriting data generating device that generates handwriting data for displaying the handwriting of the handwritten information on the display surface, wherein the handwriting device includes a signal transmitting unit that transmits a signal indicating at least one of a position and a condition of the handwriting device, and the handwriting data generating device includes: a handwriting data generating unit that generates the handwriting data; and a handwriting data changing unit that changes the handwriting data so as to display the handwriting on the display surface in a different display format depending on details of the signal.
US08872803B2	Optical touch system and touch object separating method thereof An optical touch system and a touch object separating method thereof are provided. First, touch object images in a first and a second captured image of a first and a second lens are recognized. When the first captured image includes two touch object images and the second captured image includes a single touch object image, a first distance between a leftmost end and a rightmost end of the two touch object images in the first captured image, a second distance between centers of the two touch object images, and a third distance between a leftmost end and a rightmost end of the single touch object image in the second captured image are calculated. A fourth distance corresponds to the third distance is calculated according to a ratio of the first distance to the second distance and used to separate the single touch object images into two touch object images.
US08872798B2	Method and apparatus for receiving user inputs Methods and apparatus for processing user events are provided. In particular, one or more sensor modules and processor modules are provided that can be operated to detect user events, such as the pressing of an otherwise mechanical switch. In many electronic devices, touch display screens are provided to the user for interfacing with the device. These displays often must also include one or more mechanical switches to provide necessary functionality. The functionality, however, comes at the cost of reduced aesthetics, and potentially increased manufacturing costs related to fabricating one or more holes in the display substrate. The sensor module disclosed herein can be configured such that collected pressure data can be focused, such as linear expansion data or deflection data. By collecting two different types of focused data, the apparatus can more accurately determine whether a user event has occurred. Additional types of sensors may also be utilized to provide even more reliable results.
US08872795B2	Resistive touch panel with improved termination A resistive sensing touch panel may include row receiver tracks and column drive tracks. A controller may send and receive control signals and sense signals, respectively, to and from the resistive touch panel. The resistive touch panel may provide sense signals when a touch of the panel is detected. The sense signals may be sampled on a number of rows. When sampling a given row, the controller may change the termination of that row by coupling the end of the sampled row to a resistor having a higher value then terminating resistors coupled to the end of non-sampled rows that are adjacent to the sampled row. The controller may further pull the terminating resistors coupled to the end of the non-sampled adjacent rows to a supply rail voltage while the sampled row is being sampled.
US08872793B2	Sensor module and display device According to one embodiment, a sensor module includes a first sensor circuit, a second sensor circuit and a differential circuit. The first sensor circuit includes a first detection electrode, a first amplifier formed of a thin-film transistor and a first coupling capacitor. The second sensor circuit includes a second detection electrode, a second amplifier formed of a thin-film transistor and a second coupling capacitor. The differential circuit is connected to the drain electrode of the first amplifier and the drain electrode of the second amplifier.
US08872789B2	Method and apparatus controlling touch sensing system and touch sensing system employing same A method of calibrating a touch sensing system includes connecting an impedance load to a touch sensing signal path in a gain adjustment mode, adjusting a gain of an amplifier that amplifies a signal input to the touch sensing signal path in the gain adjustment mode by evaluating an output signal of the amplifier, and disconnecting the impedance load from the touch sensing signal path after adjusting the amplifier gain.
US08872787B2	Handheld apparatus A handheld apparatus is provided. The handheld apparatus includes a first touch pad, a second touch pad, an impedance unit, and a microprocessor. When an input tool touches the first touch pad and the second touch pad simultaneously, a touch voltage signal is generated on a common contact of the second touch pad and the impedance unit, wherein the resistance of the impedance unit is greater than that of the input tool. The microprocessor executes a specific function according to the touch voltage signal.
US08872786B2	Capacitive input device, display device with input function, and electronic apparatus A capacitive input device includes a light-transmitting substrate, a multilayer film formed on one of the surfaces of the light-transmitting substrate and including a plurality of light-transmitting thin films which have different refractive indexes and one of which is a niobium oxide film, a plurality of first light-transmitting electrodes formed on the multilayer film in an input region of the light-transmitting substrate to extend in a first direction, and a plurality of second light-transmitting electrodes formed on the multilayer film in the input region of the light-transmitting substrate to extend in a second direction crossing the first direction.
US08872783B2	Display device, method for driving display device, and electronic equipment A display device; a method for driving the display device; and electronic equipment, each enabling a detection device to perform detection with a frequency higher than a refresh frequency of the display device and with improved accuracy are provided. The display device has a screen including pixels and repeatedly alternates between a scanning frame during which the pixels are scanned to be sequentially brought into a selected state and a pause frame during which the pixels are not scanned, and includes a detection instructing circuit configured to output detection operation control signals corresponding to touch panel detection periods to the detection device in at least one pause frame. The detection instruction signal instructs the detection device to detect at least one of detection targets which are input by touching or approaching the screen and a radio wave coming from outside the display device.
US08872777B2	Computer keyboard and control method thereof A computer keyboard and a control method thereof are provided. The computer keyboard for using in an information processing system includes a housing, a number of physical keys, and a touchscreen. The housing has a first key area and a second key area. The physical keys are disposed within the first key area. The touchscreen is disposed within the second key area for displaying at least one virtual key.
US08872775B2	Information processing apparatus An information processing apparatus of the present invention includes a touch panel for displaying predetermined information and accepting a touch operation input; and a control section for controlling operation of the information processing apparatus itself having the touch panel installed therein. The control section includes a processing occurrence detection means for detecting occurrence of a predetermined processing executed by the control section; and a panel control means for nullifying a touch operation input against the touch panel when the occurrence of the predetermined processing is detected by the processing occurrence detection means. The panel control means cancels nullification of the touch operation input against the touch panel after an elapse of a preset time from the occurrence of the predetermined processing, and sets, in association with the occurred predetermined processing, a touch operation input acceptable range allowing the touch panel to accept the touch operation input with respect to the predetermined processing.
US08872772B2	Interactive input system and pen tool therefor A pen tool for use with a machine vision interactive input system comprises an elongate body and a tip arrangement at one end of the body, an end surface of the body at least partially about the tip arrangement carrying light reflective material that is visible to at least one imaging assembly of the interactive input system when the pen tool is angled.
US08872770B2	Terminal emulator and controlling method therefor A terminal emulator 2 includes a memory 206, main controlling unit 202, data forming unit 203, and video data outputting unit 204. The memory 206 stores real-time data received from computer 1 as log data. The main controlling unit 202 sets real-time data display area and plural log data display areas arranged in display screen of monitor 4. The data forming unit 203 fits the real-time data and plural pieces of log data into the real-time data display area and the plural data display areas, and rearranges both of the real-time data and the plural pieces of log data in the form of a two-dimensional array. The video data outputting unit 204 converts the real-time data and the plural pieces of log data into the plural pieces of video data, and outputs the plural pieces of converted video data to the monitor 4.
US08872767B2	System and method for converting gestures into digital graffiti The subject disclosure provides a device, computer readable storage medium, and method for converting gestures undergone by a device into digital graffiti. The disclosure includes ascertaining an orientation of the device and a path traversed by the device. Gestures undergone by the device are identified as a function of the orientation and the path. Digital graffiti corresponding to the gestures are then superimposed onto a digital canvas.
US08872766B2	System and method for operating a helmet mounted display A display system comprises a transparent display device mountable on the head of a user. A scene of an environment is visible to the user through the transparent display device. The system further comprises a user interface image adapted for display on the display device. The user interface image remains fixed relative to the scene as the user and the display device move within the environment. The display system also comprises an indicator image adapted for display on the display device. The indicator is movable relative to the user interface image in response to movement of the user's head.
US08872762B2	Three dimensional user interface cursor control A method, including receiving, by a computer executing a non-tactile three dimensional (3D) user interface, a first set of multiple 3D coordinates representing a gesture performed by a user positioned within a field of view of a sensing device coupled to the computer, the first set of 3D coordinates comprising multiple points in a fixed 3D coordinate system local to the sensing device. The first set of multiple 3D coordinates are transformed to a second set of corresponding multiple 3D coordinates in a subjective 3D coordinate system local to the user.
US08872758B2	Electro-wetting display substrate and method of manufacturing the same An electro-wetting display substrate includes a base substrate including a gate line extending in a first direction and a data line extending in a second direction, where the first direction is different from the second direction, a switching element electrically connected to the gate line and the data line, a pixel electrode electrically connected to the switching element, a notch electrode disposed adjacent to the switching element and overlapping the pixel electrode, and a water-repellent layer disposed over the pixel electrode.
US08872755B2	Mobile electronic device with luminance control according to surrounding brightness and contact A luminance control device and method are disclosed. A surrounding brightness of a touch panel is measured to obtain a measured surrounding brightness. A luminance of the touch panel is controlled during a first time period starting from when the measured surrounding brightness changes from a first condition to a second condition, during which the measured surrounding brightness decreases by an amount equal to or greater than a threshold value. The luminance of the touch panel is maintained at a first luminance corresponding to the first condition when the measured surrounding brightness changes from the second condition to the first condition. The luminance of the touch panel is controlled to change to a second luminance corresponding to the second condition, when the measured surrounding brightness has not changed from the second condition to the first condition.
US08872750B2	Shift register circuit, driving circuit of display device, and display device using the driving circuit There is provided a driving circuit which is simple and has a small occupied area. A shift register circuit of the present invention includes a plurality of register circuits. Each of the register circuits includes a clocked inverter circuit and an inverter circuit. Both are connected in series with each other so that an output signal of the clocked inverter circuit becomes an input signal of the inverter circuit. Further, the register circuit includes a signal line by which an output signal of the inverter circuit is transmitted. Since a number of elements are connected to the signal line and parasitic capacitance is large, it has a high load. The shift register circuit of the present invention uses the fact that since the parasitic capacitance of the signal line is large, it has a high load.
US08872748B2	Liquid crystal display device and driving method thereof A liquid crystal display device and a driving method thereof capable of simplifying of a hardware construction of the liquid crystal display device driven by the impulsive driving method and minimizing capacitance of memory for storing data are provided.
US08872745B2	Electronic circuit, display device, electronic device, and method for driving electronic circuit To control the state of an input signal and output signal of a sequential circuit in order to prevent a malfunction of an electronic circuit. An electronic circuit includes a sequential circuit and a control circuit. A first signal, a second signal, and a third signal are input to the sequential circuit as a start signal, a clock signal, and a reset signal, respectively. The sequential circuit outputs, as an output signal, a fourth signal whose state is set in accordance with the state of the inputted first signal, second signal, and third signal. The control circuit controls the state of the third signal input to the sequential circuit.
US08872741B2	Organic light emitting display and method of driving the same An organic light emitting display includes a first pixel region including pixels coupled to odd scan lines and odd data lines, a second pixel region including pixels coupled to even scan lines and the odd data lines, a third pixel region including pixels coupled to the odd scan lines and even data lines, a fourth pixel region including pixels coupled to the even scan lines and the even data lines, a data analyzing unit for dividing input screen data of one frame into the pixel regions, a scan driver for sequentially supplying scan signals to the odd scan lines twice and for sequentially supplying scan signals to the even scan lines twice in one frame, and a data driver for supplying data signals corresponding to the screen data divided by the data analyzing unit to the pixel regions through the data lines.
US08872738B2	Display device According to one embodiment, a display device includes an insulating layer, a display unit, and an organic EL layer. The display unit is provided on a major surface of the insulating layer and includes a plurality of gate lines, a plurality of signal lines, a plurality of power source lines and a plurality of pixel units arranged in a matrix configuration. The EL layer is provided on the display unit. Each pixel unit includes a drive transistor and a resistor. The drive transistor includes a drive gate electrode, a drive source electrode, and a drive drain electrode. The drive source electrode or the drive drain electrode is connected to one of the power source lines. An end of the resistor is connected to the drive gate electrode. An other end of the resistor is connected to one of the gate line, the signal line, and the power source line.
US08872736B2	AMOLED display and driving method thereof An emission control circuit for controlling emission of R, G, B EL elements and method for driving an organic light emitting diode display using the same. An emission control signal generating circuit of a flat panel display includes a plurality of pixels. Each pixel includes a plurality of EL elements, and emission of the elements is controlled by emission control signals. The circuit includes a first signal generating device for generating one of the emission control signals, and a plurality of second signal generating devices for generating other ones of the emission control signals using an output signal of the first signal generating device and an external control signal. The first signal generating device may include a shift register. Each of the plurality of second signal generating devices may include a NAND gate using the external signal and the external control signal, or an inverted signal thereof, as two inputs.
US08872729B2	Multi-segment wearable accessory A method, apparatus and computer program product are provided to facilitate the use of a multi-segment wearable accessory. In this regard, methods, apparatus and computer program products are provided for controlling and, in some instances, interacting with a multi-segment wearable accessory. In the context of a method, an orientation of each of a plurality of segments of a multi-segment wearable accessory is determined relative to an axis through the multi-segment wearable accessory, such as by determining an angle of each of the plurality of segments relative to the axis through the multi-segment wearable accessory. A relative ordering of the plurality of segments of the multi-segment wearable accessory may then be determined based upon the orientation of each of the plurality of segments relative to the axis.
US08872722B2	Receiver cover An apparatus and method for a receiver cover to partially envelope a receiver, wherein the receiver has a non-symmetrical outer edge portion. The receiver cover includes a flexible panel having a peripheral margin portion with the peripheral margin portion being adjacent to the receiver non-symmetrical outer edge portion. The receiver cover also including structure for removably engaging the panel to the non-symmetrical outer edge portion of the receiver.
US08872715B2	Backhaul radio with a substrate tab-fed antenna assembly Directive gain antenna elements implemented with an aperture-fed patch array antenna assembly are described. A feed network for the aperture-fed patch array may include offset apertures and may also include meandering feed lines. Scalable aperture shapes and orientations that can be used with antennas operating at any frequency and with dual orthogonal polarizations are also disclosed. Directive gain antenna elements implemented with arrays of orthogonal reflected dipoles are also described with optimal feed networks and parasitic elements to achieve desired directive gain characteristics. Such arrayed dipole antennas feature dual orthogonal polarizations with assembly tabs that lower cost and improve reliability. Backhaul radios that incorporate said antennas are also disclosed.
US08872714B2	Wide beam antenna A wide beam radio frequency (RF) antenna includes a waveguide and one or more electrically conductive protrusions. The waveguide has at least one electrically conductive interior wall surface, a boresight defined by a longitudinal axis, and an aperture plane, transverse to the longitudinal axis, disposed at a distal end of the waveguide. A first proximal portion of each protrusion is electrically coupled to the electrically conductive interior wall surface, a distal portion of the protrusion being outside the aperture plane.
US08872713B1	Dual-polarized environmentally-hardened low profile radiating element The present invention is directed to a radiating element assembly including radiating element integrated with a radome. The radiating element assembly may be dual-polarized. Further, the radiating element assembly may operate over a frequency band of 10.9 GHz-14.5 GHz and may be configured for minimizing polarization cross-talk at Array Normal Scan of well below −30 decibels over the entire frequency band. Still further, the radiating element assembly may provide return loss at Array Normal Scan of less than or equal to −10 dB.
US08872711B2	Electronic device including a patch antenna and photovoltaic layer and related methods An electronic device may include a substrate and a stacked arrangement of layers thereon. The stacked arrangement of layers may include a photovoltaic layer above the substrate, and an antenna ground plane above the photovoltaic layer. The antenna ground plane may include a first electrically conductive mesh layer being optically transmissive. The stacked arrangement of layers may further include a patch antenna above the photovoltaic layer and may include a second electrically conductive mesh layer being optically transmissive.
US08872709B2	Ice and snow accretion-preventive antenna, electric wire, and insulator having water-repellent, oil-repellent, and antifouling surface and method for manufacturing the same A representative embodiment prevents breakage of antennas and accidents due to breakage of electric wires caused by ice and snow accretion by realizing a surface with a surface energy of 2 mN/m or less and providing an antenna and electric wire having an extremely great effect of preventing ice and snow accretion at midwinter.Another representative embodiment provides an ice and snow accretion-preventive antenna and electric wire wherein a surface thereof is compositely fabricated to have large roughness and small roughness, and the surface of each of the roughness is coated with a water-repellent, oil-repellent, and antifouling thin film.
US08872703B2	Transparent, flat antenna, suitable for transmitting and receiving electromagnetic waves, method for the production thereof, and use thereof A transparent, flat antenna for transmitting and receiving electromagnetic waves is described. The transparent, flat antenna comprises a transparent, electrically insulating substrate with a transparent, electrically conductive coating. Methods to produce such a transparent, flat antenna are also described.
US08872690B1	Superconductor analog to digital converter Superconductor analog-to-digital converters (ADC) offer high sensitivity and large dynamic range. One approach to increasing the dynamic range further is with a subranging architecture, whereby the output of a coarse ADC is converted back to analog and subtracted from the input signal, and the residue signal fed to a fine ADC for generation of additional significant bits. This also requires a high-gain broadband linear amplifier, which is not generally available within superconductor technology. In a preferred embodiment, a distributed digital fluxon amplifier is presented, which also integrates the functions of integration, filtering, and flux subtraction. A subranging ADC design provides two ADCs connected with the fluxon amplifier and subtractor circuitry that would provide a dynamic range extension by about 30-35 dB.
US08872688B2	Methods and systems for compressed sensing analog to digital conversion Disclosed herein are example methods, systems, and devices for compressed sensing analog to digital conversion. In an example embodiment, a multiplication circuit is configured to multiply an input signal with a measurement signal to produce a multiplied signal, where the measurement signal includes data from a column of a measurement matrix. The measurement matrix may be generated by a linear feedback shift register (LFSR)-based measurement-matrix generator. An integration circuit may be coupled to the multiplication circuit and configured to integrate the multiplied signal for a predefined amount of time to produce an integrated signal. An analog to digital converter (ADC) circuit may be coupled to the integration circuit and configured to (i) sample the integrated signal and (ii) produce an output signal comprising at least one sample of the integrated signal. A column-wise multiplication of the input signal with the measurement signal enables an efficient compressed-sensing analog-to-digital conversion architecture.
US08872684B2	Resonant filter, delta-sigma A/D converter, and semiconductor device A delta-sigma A/D converter includes a loop filter including a resonant filter, a quantizer, and a feedback D/A converter. The resonant filter includes a resonator including a resistor and a capacitor, and a feedback path through which an output of the resonator is positively fed back to an input of the resonator. The resonant filter operates as an oscillator or a filter under the on/off control of a first switch. At least one of the resistor and the capacitor of the resonator is configured to allow a resistance value or a capacitance value thereof to be adjusted based on a third external signal.
US08872683B2	Electronic compensation of capacitive micro-machined sensors parasitic modes in force-feedback interface systems Operating capacitive sensors in force feedback mode has many benefits, such as improved bandwidth, and lower sensitivity to process and temperature variation. To overcome, the non-linearity of the voltage-to-force relation in capacitive feedback, a two-level feedback signal is often used. Therefore, a single-bit Σ-Δ modulator represents a practical way to implement capacitive sensors interface circuits. However, high-Q parasitic modes that exist in high-Q sensors (operating in vacuum) cause a stability problem for the Σ-Δ loop, and hence, limit the applicability of Σ-Δ technique to such sensors. A solution is provided that allows stabilizing the Σ-Δ loop, in the presence of high-Q parasitic modes. The solution is applicable to low or high order Σ-Δ based interfaces for capacitive sensors.
US08872680B2	Calibrating timing, gain and bandwidth mismatch in interleaved ADCs using injection of random pulses A method and a corresponding device for calibrating an interleaved analog-to-digital converter (ADC) involve injecting a pulsed, substantially-random signal into a plurality of channels in the ADC. After the substantially-random signal is injected, a gain correlation value is determined for each channel, which value indicates a degree of correlation between the injected substantially-random signal and an output of the respective channel. The gain correlation values are then compared to determine a degree of mismatch between the channels. At least one of the channels is calibrated as a function of the determined degree of mismatch.
US08872679B1	System and method for data compression using multiple small encoding tables A system and method for compressing and decompressing multiple types of character data. The system and method employ multiple encoding tables, each designed for encoding a subset of character data, such as numeric data, uppercase letters, lowercase letters, Latin, or UNICODE data, to perform compressions and decompression of character data, and. The compression solution also provides for the creation of new encoding tables on the fly, and accommodates the compression of lengthy character streams using multiple different general compression algorithms, automatically choosing a suitable general compression algorithm for specific input data.
US08872676B2	Systems and methods for switching In one embodiment, a capacitive switching system may include a plurality of capacitive switches and at least one processor. Each of the capacitive switches may include an activation surface offset from an energized conductor by a dielectric region and a capacitance that is dependent upon an electric field generated by the energized conductor. The at least one processor may execute machine readable instructions to transform a change in the capacitance of one of the capacitive switches into a first control signal indicative of a first active state. A rejection delay may be activated by the at least one processor after the change in the capacitance of the one of the capacitive switches. The rejection delay can remain activated for a predetermined time period. A second control signal may be prevented from indicating a second active state while the rejection delay is activated.
US08872675B2	Vehicular travel guidance device, vehicular travel guidance method, and computer program A vehicular travel guidance apparatus and method are provided. The apparatus includes a map image display unit that displays a map image on a display device and a maximum energy amount acquisition unit that acquires a maximum charging energy amount of an in-vehicle battery. The apparatus further includes a charging facility information acquisition unit that acquires information regarding a charging facility capable of charging the in-vehicle battery. Also included is a travelable area acquisition unit that acquires a travelable area, within which the vehicle is able to travel from the charging facility by consuming an energy amount corresponding to a predetermined percentage of the maximum charging energy amount. The apparatus also includes a display mode change unit that varies a display mode of the map image based on the acquired travelable area.
US08872671B2	Apparatus outputting sound in specified direction A sound output apparatus for a vehicle includes a sound input device, a sound signal generation section, a sound output device, a road-information acquisition section, and a specified-direction determination section. The sound input device collects sounds outside of the vehicle. The sound signal generation section generates an output signal based on the sounds outside of the vehicle collected. The sound output device outputs a sound to a vehicle interior of the vehicle based on the output signal generated. The road-information acquisition section acquires road information in proximity of the vehicle. The specified-direction determination section determines a specified direction which is previously associated with the road information. The sound signal generation section generates the output signal such that a direction of sound-image localization of a sound outputted by the sound output device accords with the specified direction determined by the specified-direction determination section.
US08872670B2	Compliance telemetry A communication system for communicating information with a compliant medium is disclosed, the communication device includes a constrained fluid, a valve, a modulator, a sensor and a demodulator. The constrained is fluid distributed along a length. The valve is configured to operatively engage a second point relative to the length. The modulator configured to actuate the valve according to information. The sensor configured to measure pressure at a first point relative to the length, where the first point is distant from the second point. The demodulator is coupled to the sensor to recover the information.
US08872668B2	System and method for loose nut detection One illustrative embodiment includes an apparatus for detecting if a fastener moves from a first position to a different second position. The apparatus includes a first connector for connecting a first side of a contact bridge to the fastener for movement in response to movement of the fastener, and a second connector for connecting a second side of the contact bridge to an object to remain stationary relative to the object. One of the first and second sides of the contact bridge includes first and second spaced apart electrical conductors; the other side includes a third electrical conductor. The third electrical conductor is positionable to contact the first and second electrical conductors when the fastener is in the first position, and the third electrical conductor may be spaced apart from at least one of the first and second electrical conductors when the fastener is in the second position.
US08872663B2	Medication regimen compliance monitoring systems and methods A system for monitoring compliance with a medication regimen comprises a patch. The patch includes an RFID apparatus and a sensor. The patch is configured to be removably securable to a body of a biological organism. The sensor is in electrical communication with the RFID apparatus and is configured to inspect a biological material of a biological organism for the presence of a detectable agent. The RFID apparatus is configured to communicate a result of the inspection to an RFID transceiver and/or a communication device. Methods are also provided.
US08872662B2	Antenna, apparatus and method for identifying and tracking multiple items A flat identification antenna for receiving signals from multiple tag-carrying items placed on the antenna and a system for identifying and tracking multiple tag-carrying items including the same. The antenna comprises a first planar array of partially overlapping first planar loops, a second planar array of partially overlapping second planar loops and an insulating board positioned between the first and second arrays. The loops in the first array are arranged to partially overlap each other in one direction and the loops in the second array are arranged to partially overlap each other in another direction.
US08872659B2	Merchandise display security device for headphones A merchandise display security device for an article of merchandise having an audio cord includes an electrical control circuit for producing a sense loop in the audio cord, monitoring a non-alarming state and an alarming state of the sense loop, and activating an alarm in the event that the sense loop changes from the non-alarming state to the alarming state. In one embodiment, the device includes a security sensor adapted for being attached to a media player. The security sensor has an audio jack for receiving an audio plug on the audio cord and includes an audio connector cord having an audio plug for engaging an audio jack on the media player. The security sensor may be electrically connected to an alarming base by a sense cord and include a power adapter cord for providing power to the media player through the sense cord and the power adapter cord.
US08872658B2	Service method of gas appliances A service method of gas appliances includes: Detecting the gas appliances at the client ends to generate detecting signals. Transmitting the detecting signals to a service end. Identifying which client end the detecting signals come from. Examining the detecting signals to find whether the gas appliance has an abnormal condition; and informing the client end when the abnormal condition is found. After all, the service end may monitor the gas appliances at the client end, and inform the client for repair when the gas appliance has detected an abnormal signal or has damaged parts.
US08872653B2	Display control device An air purifier includes a detection apparatus, calculates a relative value of the number of microorganisms detected from airborne particles by the detection apparatus to a prescribed total value, and determines a central angle α corresponding to the relative value. Further, regarding the number of airborne particles other than microorganisms detected by the detection apparatus as the number of dusts, relative value of dust particles to a prescribed total value is calculated, and the central angle β corresponding to the relative value is determined. On a display panel, the amount of microorganisms is displayed as a bacteria meter by the area from the start position to the angle α, and by the following area to the angle β, the number of dusts is displayed as a dust meter, in a circle graph.
US08872650B2	Equipment maintenance and monitoring for container yards A processor is disclosed that may be configured to receive a status report for a vehicle in a container yard and/or a status reporting device configured to monitor the vehicle. The processor may respond to the received status report by creating a system action request and/or a system log. The system action request may include a fault condition problem report and/or a maintenance schedule request for the vehicle and/or the status reporting device. The processor automates generating responses to the received status reports, providing a fundamental tool to reduce down time for vehicles and improve their support of container transfer operations in the container yard. The system action request, system log and/or system action may be products of the processor's operation. A computer readable memory and/or a server may be configured to deliver a report, program system and/or an installation package to the end user.
US08872635B2	Systems and methods for verifying a chip Disclosed is a system and method for verifying a chip having a memory. Remanufacturers of imaging devices, such as inkjet printers or electrostatic printers, often have to use a replacement chip in order to reuse an imaging cartridge. It is desirable to have a system and method for determining if the replacement chip is suitable for use with a specific imaging cartridge. Also, it may be desirable to confirm that the chip was manufactured by a specific manufacturer. The disclosed system and method allow the remanufacturer a reliable and efficient way to verify chips.
US08872634B2	Integrated detection point passive RFID tag reader and event timing system and method A tag reader system, method and timing system for determining a time of detection of a passive RFID tag relative to a detection line located along a route traveled by the RFID tag.
US08872633B2	Ramped interrogation power levels A method for communicating with a plurality of radio frequency (RF) devices includes transmitting a first signal at a first power level, interrogating RF devices responding to the first signal, instructing the responding RF devices to change state, and transmitting a second signal at a second power level higher than the first power level. The RF devices responding to the first signal do not respond to the second signal upon changing state.
US08872632B2	Collision resolution protocol for mobile RFID tag identification The performance of a radio frequency identification (RFID) system is improved by a protocol that eliminates collisions between signals generated by a) RFID tags that the RFID reader has already identified as being in its interrogation zone and b) RFID tags that are newly arrived and thus that the reader has not yet identified. This is illustratively accomplished by the use of separate identification and access frames. It is during the identification frame that newly arrived tags become identified by the reader. Although there may be collisions during the identification frame, those collisions are only among newly arrived tags. The already-identified tags communicate with the reader during respective time slots of the access frame, so that they neither collide with each other nor with the newly arrived tags.
US08872629B2	Passive transponder with a charging circuit In one embodiment, a passive transponder comprising a first circuit comprising a first attenuator, the first circuit configured to receive a first signal from at least one base station and coupled to a first node, a first rectifier coupled to the first node, the first rectifier configured in a forward direction to charge a first capacitor, and the first capacitor coupled to the first rectifier, the first capacitor configured to receive a charge from the attenuator sufficient for powering the passive transponder.
US08872628B2	Document with inductive charging and data storage and transmission Illustrated is a system and method to inductively receive electrical power. Additionally, the system and method includes a non-volatile memory that includes data relating to the system and method, the non-volatile memory supplied with the electrical power. Further, the system and method includes a document into which the coil and the non-volatile memory are embedded.
US08872626B2	Detection of buried assets using current location and known buffer zones A method on a mobile computing device for locating a buried asset is provided. The method includes receiving a data structure that represents a two dimensional area comprising a buffer zone at an above-surface location, wherein the buffer zone corresponds to a particular buried asset sought by an operator of the device and iteratively executing the following steps: a) calculating an above-surface location of the device; b) determining whether the above-surface location of the device is located within the two dimensional area; c) if the above-surface location is not located within the two dimensional area, determining whether a locating function of a component coupled with the mobile computing device is enabled, and if so, disabling the locating function; d) if the above-surface location is located within the area, determining whether the locating function of the component is disabled, and if so, enabling the locating function.
US08872624B2	Programmable communicator A programmable communicator device is disclosed having a wireless communications circuit, including an antenna, configured to receive a transmission, and an identity module having a unique identifier. The programmable communicator further includes a processing module including program code configured to determine if the transmission is from an authenticated caller by determining whether a received transmission contains the unique identifier, and memory configured to store telephone numbers or IP addresses received in transmissions from an authenticated caller.
US08872623B2	Voice alarm An alarm device configured with a power supply, a processing unit, speakers and an activator for emitting a voice alarm to alert passersby that the alarm holder is in danger. A handheld alarm device for alerting people more effectively than a mere tonal alarm.
US08872621B2	Capacitance type detection device, sensor unit, and control system for detecting approach of object, and method for same A capacitance type detection device may include a sensor electrode forming a capacitor with respect to a peripheral conductor; a measurement unit measuring the floating capacitance of the sensor electrode, which changes correspondingly to a positional relation between the sensor electrode and the detection object; and a judgment unit judging the approach of the detection object in a case in which there is satisfied an approach detection condition including a fact that a magnitude correlation between a time rate-of-change of the floating capacitance measured by the measurement unit and a predetermined time rate-of-change which is defined correspondingly to a combination of the detection object and an object to be discriminated so as to be different from the detection object lies in a predetermined relation.
US08872618B2	Unlocking method for electronic device An unlocking method for an electronic device which has a plurality of light-sensors thereon and stores an application program therein first executes the application program when the electronic device works in a locking mode. When the application program is executed, the method continually computes a covering order of user's covering action performed on the light-sensors via the application program. Therefore, the method controls the electronic device to switch from the locking mode to an unlocking mode when the covering order of the covering action is matched with an unlocking condition.
US08872617B2	Data-processing device and data-processing program with bio-authorization function A data processing device comprising: a storage unit storing therein a correspondence table in which biometric data pieces are associated one-to-one with different jobs, the biometric data pieces pertaining to respective fingers of a user; a display unit; a designation unit operable to, in accordance with a user operation, designate a target data piece from among data pieces being displayed on the display unit; a generation unit operable to generate a biometric data piece by reading a biometric information piece of a finger of the user; and an execution unit operable to execute one of the different jobs that is associated with one of the stored biometric data pieces that matches the generated biometric data piece by using the target data piece as data input by the user with respect to the one of the different jobs.
US08872614B2	Transformer A transformer includes a leg iron core including a plurality of magnetic sheets stacked in one direction (Z axis direction), and a coil wound around the leg iron core. A slit is formed in at least a magnetic sheet which faces an inner peripheral surface of the coil in a stacking direction of the plurality of magnetic sheets, of the plurality of magnetic sheets. Since eddy current is divided by the slit, eddy current density can be reduced. By reducing the eddy current density, loss density in an iron core can be reduced. By reducing the loss density in the iron core, loss in the transformer can be reduced.
US08872610B2	Reactor, and coil component Provided are a coil component capable of contributing to improving productivity of a reactor, and a reactor exhibiting good productivity. A reactor 1A includes one coil 2 formed by spirally winding a wire 2w, and a magnetic core 3, which is disposed inside and outside the coil 2 and which forms a closed magnetic circuit. The magnetic core 3 includes an inner core portion 31 disposed inside the coil 2, and an outer core portion 32 disposed around the coil 2. The coil 2 and the inner core portion 31 constitute a coil component 2A held as an integral unit by a resin molded portion 20. A shape of the coil 2 is maintained by the resin molded portion 20. Since the coil component 2A includes a portion of the magnetic core 3, the number of components can be reduced, and the coil 2 and the inner core portion 31 can be easily placed into a case 4A when they are housed therein. The coil 2 is easier to handle because the coil shape is constantly maintained without expanding or contracting. Workability in assembly of the reactor 1A is improved by employing the coil component 2A.
US08872606B1	Bimetal and magnetic armature providing an arc splatter resistant offset therebetween, and circuit breaker including the same A trip mechanism includes a bimetal having a first side and an opposite second side, a magnetic yoke disposed proximate the first side of the bimetal, and a magnetic armature pivotally connected to the bimetal and disposed proximate the opposite second side thereof. The armature has a first side with a surface, an opposite second side, and an opening extending from the first side to the opposite second side of the magnetic armature. The opening has a latch surface structured to engage the latch surface of an operating mechanism. The first side of the magnetic armature is structured to engage the opposite second side of the bimetal. At least one of the bimetal and the magnetic armature is structured to provide an offset between the bimetal and the surface of the first side of the magnetic armature at the opening of the magnetic armature.
US08872605B2	Cavity filter The invention relates to an improved HF cavity filter characterized by the following features: the housing cover (17) is made of a circuit board (21); the at least one additional hole (29) is made in the circuit board (21), in which a tuning bushing soldered at the outer circumference to an electrically conductive layer (25) on the circuit board is inserted; the tuning element (37) can be threaded to a varying depth into the tuning bushing (31); at least one electrically conductive structure is implemented on the circuit board (21); and the dielectric conductive structure comprises at least one conductor and/or at least one SMT component and/or at least one HF overcoupling device.
US08872603B2	Resonator and resonator array [Subject] An object of the present invention is to provide a resonator readily achieving a high resonance frequency without extreme downsizing and allowing for a high Q factor.[Solving means] A resonator includes: a substrate serving as a base; a first beam having opposite ends fixed to the substrate via fixed connection portions, and having a vibration receiving location for providing linear reciprocating motion in a direction perpendicular to the longitudinal direction thereof; and second beams, branching toward one side from a plurality of branching locations different from the vibration receiving location in the first beam, for generating torsional vibration in accordance with the linear reciprocating motion. The resonator further includes a plurality of third beam, extending from the plurality of branching locations to a side opposite to the plurality of second beams, for generating torsional vibration.
US08872602B2	Filter module In a filter module having excellent phase balance characteristics, a length of a signal path between a first balanced mount electrode and a first balanced terminal electrode is different from a length of a signal path between a second balanced mount electrode and a second balanced terminal electrode. When viewing a mount board from a side on which a filter component is mounted, an area along which the first balanced mount electrode and a first internal ground electrode oppose each other is different from an area along which the second balanced mount electrode and the first internal ground electrode oppose each other.
US08872593B2	On-chip R and C calibration using on-board supply bypass capacitance A technique for calibration of on-chip resistance (R) and capacitance (C) values using an on-board bypass capacitor may include configuring an on-chip switch to selectively couple an on-chip calibration circuit to an on-chip port. The on-chip calibration circuit may include an RC oscillator having an RC time constant (RCTC). The on-board bypass capacitor may be coupled to the on-chip calibration circuit, by using the on-chip port. The on-chip R and C values may be calibrated using the on-chip calibration circuit and the on-board bypass capacitor.
US08872589B2	System and method for a programmable gain amplifier In accordance with an embodiment, a system includes a programmable gain amplifier having a switchable feedback capacitor coupled in parallel with a first capacitor and a controller. The controller is configured to couple the feedback capacitor between an input node of the programmable gain amplifier and an output node of the programmable gain amplifier in a first gain setting, and switch a first terminal of the feedback capacitor from the output of the programmable gain amplifier to a reference node while a second terminal of the feedback capacitor remains coupled to the input node of the programmable gain amplifier for a first time period when transitioning from the first gain setting to a second gain setting.
US08872584B2	Versatile audio power amplifier An audio power amplifier includes a first and a second amplification unit, each including a switching voltage amplifier, an output filter, a current compensator, an inner current feedback loop feeding a measurement of current measured at the output inductor back to a summing input of the current compensator, a voltage compensator coupled to the summing input of the current compensator, and an outer voltage feedback loop. A controlled signal path provides the output of the voltage compensator of the first amplification unit to the current compensator of the second amplification unit. The first and second amplification units are operable with separate loads, in parallel driving a common load, or across a bridge-tied-load. A second pair of amplification units may be added and operated together with the first pair to drive a single speaker with a parallel pair of amplifiers on each side of a bridge-tied-load.
US08872583B2	Power amplifier with advanced linearity An amplifier is provided. The amplifier includes an input matching unit suppressing harmonic components of an input signal; a high power amplification unit amplifying a signal suppressed by the input matching unit; and an output matching unit suppressing harmonic components of an output signal amplified by the high power amplification unit.
US08872582B2	Amplifier circuit An amplifier circuit includes: a first filter that receives input of amplitude information of an input signal, and performs filtering so that a gain of a frequency component higher than a first cutoff frequency becomes greater than a gain of a frequency component lower than the first cutoff frequency; a power supply circuit that has a low-pass filter characteristic that a gain of a frequency component lower than a second cutoff frequency is greater than a gain of a frequency component higher than the second cutoff frequency, and receives input of amplitude information outputted from the first filter and generates a power supply voltage corresponding to the amplitude information outputted from the first filter; and an amplifier that receives supply of the power supply voltage generated by the power supply circuit, and amplifies a signal based on the input signal.
US08872581B2	Class-D power amplifier capable of reducing electromagnetic interference and triangular wave generator thereof A class-D power amplifier capable of reducing electromagnetic interference includes an integrator, a triangular wave generator, a comparator, a gate driver, a feedback circuit, and an output stage circuit. The integrator is used for receiving an input signal and potential of ground, and outputting a first voltage. The comparator is used for comparing the first voltage with a triangular wave generated by the triangular wave generator to output a pulse-width modulation signal. The gate driver is used for driving the output stage circuit to output an output voltage according to the pulse-width modulation signal. Therefore, the class-D power amplifier reduces the electromagnetic interference by the triangular wave.
US08872580B2	Reconfigurable high-order integrated circuit filters Voltage and current mode reconfigurable nth-order filters (RNOFs) fabricated in a 0.18 μm CMOS process are disclosed. The RNOFs utilize an inverse-follow-the-leader-feedback (IFLF) signal path with summed outputs, resulting in a follow-the-leader-feedback-summed-outputs (FLF-SO) filter topology. The FLF-SO filter uses multi-output current amplifiers (CAs). Inverse-follow-the-leader-feedback-summed-outputs (IFLF-SO) and inverse-follow-the-leader-feedback-distributed-outputs (IFLF-DI) structures are realized by employing 3n+4 transconductance amplifiers (TCAs) for voltage mode processing and two TCAs for current mode signals. A plurality of programmable current division networks (CDNs) tune a digitally controlled current follower (DCCF). A multi-output Digitally Controlled Current Amplifier (MDCCA) controls gain by providing independent filter coefficient control. Forward path output gains are set to unity. Alternatively, a multi-output digitally controlled CCII block (MDCCCII) uses CCII in the first stage. Such filters provide independent tuning of both numerator as well as denominator coefficients and are reconfigurable without the need of switches due to CDNs setting undesired output current to zero.
US08872579B2	Method and apparatus for current sensing in power over Ethernet (PoE) systems Systems and methods are provided for power control. In some implementations, a power control system includes a first transistor having a drain coupled to a first conductor (e.g., first pair of wires of an Ethernet cable), a second transistor having a drain coupled to a second conductor (e.g., second pair of wires of the Ethernet cable), a current sensor coupled to sources of the first and second transistors, and a current management circuit. The current management circuit may detect drain voltages of the first transistor and the second transistor, and adjust gate voltages of the first transistor and the second transistor to keep the drain voltages of the first transistor and the second transistor approximately equal. The current management circuit may detect a current through the current sensor, and adjust the gate voltages of the first transistor and the second transistor to limit the detected current to a current limit.
US08872578B1	Self adjusting reference for input buffer A self adjusting reference for an input buffer including an adjustable voltage shifter, a comparator, and a comparator and adjust circuit. The voltage shifter provides adjustable reference voltages based on a primary reference voltage, including upper, midway, and lower reference voltages. The comparator compares the midway reference voltage with the input voltage to provide an input sense signal indicative of a voltage state of the input voltage. The comparator and adjust circuit increases voltage levels of the reference voltages when the input voltage is in a low voltage state and has a voltage level that is greater than the lower reference voltage, and decreases the voltage levels of the reference voltages when the input voltage is in a high voltage state and has a voltage level that is less than the upper reference voltage.
US08872562B2	Semiconductor device According to one embodiment, a semiconductor device includes a first differential amplifier and a second differential amplifier. The first differential amplifier charges the first output terminal with a second voltage different from a first voltage. The first differential amplifier uses a first clock signal, stopping the charging at the first output terminal, receives first complementary data of the first voltage at the rising edge of a second clock signal, and outputs the first complementary data at the second voltage. The second differential amplifier charges the second output terminal with the second voltage. The second differential amplifier uses a third clock signal, stopping the charging at the second output terminal, receives second complementary data of the first voltage at the rising edge of a fourth clock signal, and outputs the second complementary data at the second voltage.
US08872557B2	Data output timing control circuit for semiconductor apparatus A data output timing control circuit for a semiconductor apparatus includes a phase adjustment unit. The phase adjustment unit is configured to shift a phase of a read command as large as a code value of the delay control code in sequential synchronization with a plurality of delayed clocks obtained by delaying the external clock as large as predetermined delay amounts, respectively, delay the shifted read command as large as the variable delay amount, and output the result of delay as an output enable flag signal.
US08872556B1	PLL frequency synthesizer with multi-curve VCO implementing closed loop curve searching using charge pump current modulation A phase-locked loop circuit using a multi-curve voltage-controlled oscillator (VCO) having a set of operating curves, each operating curve corresponding to a different frequency range over a control voltage range. The phase-locked loop circuit includes a phase and frequency detector driving a charge pump and a digital control circuit configured to generate a curve select signal using a closed loop curve search operation to select one of the operating curves in the multi-curve VCO, the selected operating curve being used by the VCO to generate an output signal with an output frequency being equal or close to a target frequency of the phase-locked loop. In one embodiment, the digital control circuit increases the charge pump current above a nominal current value during the closed loop curve search operation and set the charge pump current to the nominal current value after an operating curve is selected.
US08872555B2	Power-on reset circuit A power-on reset circuit has a first impedance device, a first switch device, a first capacitor, a second switch device, a third switch device, a fourth switch device, a second impedance device, a second capacitor, and a control circuit coupled to a reset input terminal of a circuit device. When the power-on reset circuit is supplied with electric power, the first switch device and the third switch device are turned on and the second switch device and the fourth switch device are turned off. When the electric power is removed from the power-on reset circuit, the first switch device and the third switch device are turned off and the second switch device and the fourth switch device are turned on. The second capacitor is discharged through the fourth switch to a voltage level being close to a ground voltage.
US08872554B2	Externally configurable power-on-reset systems and methods for integrated circuits Externally configurable power-on-reset systems and methods for integrated circuits are disclosed that utilize internal power-on-reset circuitry and reset control circuitry to provide operational configurations determined by external connections. In one configuration where no dedicated external reset signal is desired, the reset control circuitry relies upon the internal power-one-reset circuitry to generate the internal reset control signal. In another configuration where an external reset signal is utilized, the reset control circuitry relies upon the external reset signal, which overrides the internal power-on-reset circuitry, to generate the internal reset control signal. In further configurations, the reset control circuitry utilizes logic circuitry controlled through a digital interface to determine when the internal reset control signal can be de-asserted.
US08872552B2	High-side semiconductor-switch low-power driving circuit and method A high-side semiconductor-switch driving method includes generating power for controlling a high side semiconductor switch. The high side semiconductor switch has a control terminal and the power allows a current to flow into the control terminal of the high side semiconductor switch to switch the high side semiconductor switch. The voltage at the control terminal of the high side semiconductor switch is quantified. The power dependent on the voltage at the control terminal of the high side semiconductor switch is controlled so that the current provided is increased when the voltage at the control terminal indicates that the current is not sufficient to switch the high side semiconductor switch.
US08872549B2	Analog minimum or maximum voltage selector circuit A circuit includes multiple input sub-circuits coupled to a common output node. Each input sub-circuit includes a transconductance cell. A diode is coupled between the output of the transconductance cell and a common output node. A feedback circuit is coupled between the common output node and a second input of the transconductance cell. A voltage follower is coupled between the common output node and a reference voltage, with an input coupled to the output of the transconductance cell.
US08872548B2	Method and apparatus for calibrating low frequency clock A method and an apparatus for calibrating a low frequency clock are disclosed. The method includes: calculating a frequency of a low frequency clock in a current low frequency clock calibration; and calculating an average value of low frequency clock frequencies in n clock calibrations before the current calibration, where n is greater than 1 and is an integer; judging whether a difference between the frequency of the low frequency clock in the current low frequency clock calibration and the average value is smaller than a preset threshold for the difference; and if the difference between the frequency of the low frequency clock in the current low frequency clock calibration and the average value is smaller than the preset threshold for the difference, calculating the number of sleep cycles according to the calculated and obtained frequency of the low frequency clock in the current low frequency clock calibration.
US08872546B2	Interface circuitry for a test apparatus In one embodiment, a test apparatus includes a field programmable gate array (FPGA) including a first transmitter to communicate first signals according to current mode logic (CML) signaling and a first receiver to receive second signals according to the CML signaling, and an interface circuit to couple the FPGA to a device that is to communicate according to voltage mode signaling. The interface circuit may adapt the first signals communicated by the first transmitter according to the CML signaling to voltage mode signaling signals for receipt by the device. Other embodiments are described and claimed.
US08872541B2	Dynamic adaptation of continuous time linear equalization circuits An embodiment of the invention includes dynamically adjusting gain peaking of circuit logic such that error rates are acceptable across various process/voltage/temperature (PVT) ranges. An embodiment uses PVT dependant programming, such as but not limited to resistance compensation (RCOMP) codes, to control impedance compensation logic, such as but not limited to a Continuous Time Linear Equalization (CTLE) circuit. The PVT programming may be used to control gain peaking amplitude and gain peaking frequency across ranges of different PVTs. As a result, error performance is not impaired across different PVT corners and gain peaking is more consistent across different PVT corners. Other embodiments are included herein.
US08872535B2	Connector attaching/detaching apparatus and test head The connector attaching/detaching apparatus includes a plurality of fitting members that causes connectors to fit with or separate from one another by sliding, guiding members that sequentially causes the plurality of fitting members to slide by moving in an arrangement direction of the fitting means, and a moving apparatus that causes the guiding members to move in the arrangement direction of the fitting members.
US08872534B2	Method and apparatus for testing devices using serially controlled intelligent switches Methods and apparatus for testing devices using serially controlled intelligent switches have been described. In some embodiments, a probe card assembly can be provided that includes a plurality of integrated circuits (ICs) serially coupled to form a chain, the chain coupled to at least one serial control line, the plurality of ICs including switches coupled to test probes, each of the switches being programmable responsive to a control signal on the at least one serial control line.
US08872533B2	Wafer testing system and associated methods of use and manufacture A wafer testing system and associated methods of use an manufacture are disclosed herein. In one embodiment, the wafer testing system includes an assembly for releaseably attaching a wafer to a wafer translator and the wafer translator to an interposer by means of separately operable vacuums, or pressure differentials. The assembly includes a wafer translator support ring coupled to the wafer translator, wherein a first flexible material extends from the wafer translator support ring so as to enclose the space between the wafer translator and the interposer so that the space may be evacuated by a first vacuum through one or more first evacuation paths. The assembly can further include a wafer support ring coupled to the wafer and the chuck, wherein a second flexible material extends from wafer support ring so as to enclose the space between the wafer and the wafer translator so that the space may be evacuated by a second vacuum through one or more second evacuation pathways.
US08872528B2	Capacitive physical quantity detector A capacitive physical quantity detector includes: a capacitor having an electrostatic capacitance changeable with physical quantity; a converter converting a capacitance change to a voltage; and a selector having a comparator and a switching element. The converter includes a C-V converting circuit having an operational amplifier for amplifying a first signal from the capacitor, a main switch between input and output terminals of the operational amplifier, feedback capacitors and feedback switches. Each feedback switch connects a feedback capacitor to the main switch when the feedback switch is closed. The selector closes the feedback switches based on a second signal of the converter. The comparator compares the second signal with a threshold voltage. The switching element switches the feedback switches according to a third signal from the comparator to set the second signal smaller than a saturated voltage and larger than the threshold voltage.
US08872526B1	Interleaving sense elements of a capacitive-sense array Apparatuses and methods of sense arrays with interleaving sense elements are described. One capacitive-sense array includes a first electrode and a second electrode disposed adjacent to the first electrode in a first axis. The capacitive-sense array comprises a sensor pitch in the first axis. The first electrode includes a first sense element including a first shape and a first interleaving sense element that interleaves with a first portion and a second portion of the second electrode to extend a first dimension of the first electrode to be greater than the sensor pitch in the first axis. The second electrode includes a second sense element including the first shape and a second interleaving sense element that interleaves with a first portion and a second portion of the first electrode to extend a second dimension of the second electrode to be greater than the sensor pitch in the first axis.
US08872525B2	System, method and apparatus for detecting DC bias in a plasma processing chamber A system and method of measuring a self bias DC voltage on a semiconductor wafer in a plasma chamber includes generating a plasma between a top electrode and a top surface of an electrostatic chuck in a plasma chamber including applying one or more RF signals to one or both of the top electrode and electrostatic chuck. The wafer is supported on the top surface of an electrostatic chuck. The self bias DC voltage is developed on the wafer. A vibrating electrode is oscillated to produce a variable capacitance, the vibrating electrode is located in the electrostatic chuck. An electrical current is developed in a sensor circuit. An output voltage is measured across a sampling resistor in the sensor circuit, a second DC potential is applied to the vibrating electrode to nullify the output voltage. The second DC potential is equal to the self bias DC voltage on the wafer.
US08872524B2	Switching apparatus, switching apparatus manufacturing method, transmission line switching apparatus, and test apparatus A package of a switching apparatus that houses an actuator having a movable contact point and in which a fixed contact point, which is electrically connected to or disconnected form the movable contact point, is accurately formed. Provided is a switching apparatus comprising a first substrate provided with a via that electrically connects a top surface thereof and a bottom surface thereof, while maintaining an air-tight state between the top surface and the bottom surface; a second substrate provided on the first substrate and in which is formed a through-hole that houses an actuator; and a third substrate provided on the second substrate and supporting the actuator, which has a moveable contact point.
US08872522B2	Frequency based fault detection A electrical circuit includes an excitation voltage connected via a first circuit path to an output, a switching device having a control terminal and first and second controlled terminals connected to the first circuit path, and a controller that generates a control signal provided to the control terminal of the switching device to selectively supply the excitation voltage to the output. Faults in the electrical circuit are detected by monitoring the switching device voltage at one of the controlled terminals of the switching device.
US08872520B2	Sensor and measurement method The present invention relates to a sensor comprising a substrate (10) carrying a field effect transistor (30) having a gate electrode (32), the sensor further comprising a measurement electrode (36) spatially separated from the gate electrode; and a reference electrode (40), said measurement electrode being in configurable conductive contact with said gate electrode, the sensor further comprising a charge storage element (60) comprising a first electrode connected to a node (38) between the measurement electrode and the gate electrode; and a second electrode configurably connected to a known potential source (80). The present invention further relates to a method of performing a measurement with such a sensor.
US08872519B2	System and method to determine the state of charge of a battery using magnetostriction to detect magnetic response of battery material One exemplary embodiment includes a method including providing a battery, producing a first magnetic field so that a second magnetic field is induced in the battery, sensing a magnetic field resulting from the interaction of the first magnetic field and the second magnetic field, utilizing the sensed net magnetic field to determine the state of charge of the battery.
US08872517B2	Electronic battery tester with battery age input An electronic battery tester for testing a storage battery, includes connections configured to couple to terminals of the battery. Measurement circuitry is coupled to the connections and configured to measure a parameter of the battery. An input is configured to receive a battery age input variable. Computation circuitry is configured to provide a test output related to a condition of the battery based upon the measured parameter and the battery age input variable.
US08872515B2	System and method for diffusion-modulated relaxation magnetic resonance imaging A system and method for applying an RF excitation pulse to the region of interest (ROI) and a plurality of selective gradients to the ROI to elicit MR data pertaining to at least a first MR parameter from the ROI. The system and method also apply at least one diffusion gradient to the ROI to modulate the first MR parameter with a second MR parameter, acquire MR data from the ROI, and reconstruct a parametric map of the ROI using the MR data, wherein the parametric map is weighted based on the first MR parameter and modulated by the second MR parameter.
US08872511B2	Angle of rotation detection device An angle of rotation detection device includes an electrical angle detector (resolver and R/D converter) having the electrical angle of 360° set smaller than the mechanical angle of 360°, and providing a two-phase encoder signal corresponding to the electrical angle of a rotor; a two-phase encoder counter counting a two-phase encoder signal, and providing a digital value corresponding to the electrical angle, and a multiplication factor detector detecting which position of the mechanical angle the electrical angle indicated by the signal output from the detector corresponds to, based on a change of the count value from the two-phase encoder counter. Thus, there can be provided an angle of rotation detection device that can identify the position of the mechanical angle while using the two-phase encoder output.
US08872508B2	Method and apparatus for a half-bridge variable differential transformer position sensing system A half-bridge variable differential transformer position sensing system that includes a transducer having a stator with an inductive coil having a center tap configured to provide an output signal. The transducer also has an armature with a magnetically permeable core configured to move within the inductive coil, such that movement of the magnetically permeable core causes a change in the output signal. The position sensing system includes a first circuit configured to provide an excitation signal at one terminal of the inductive coil. The system includes no more than three electrical interface wires, and a microcontroller configured to calculate the degree of change in the position of the magnetically permeable core, and is configured to correct for variations in the voltage of the output signal due to the temperature of the transducer and due to non-linear effects on the output signal caused by movement of the magnetically permeable core.
US08872503B2	Electromagnetic wave resonator and its fabrication process as well as electromagnetic wave generator The main object of the invention is to provide an electromagnetic wave resonator making use of surface waves: an electromagnetic wave resonator structure capable of being achieved with existing technologies yet without much difficulty and applying voltage to a positive dielectric area, thereby overcoming a variety of problems arising from the fact that only thermal excitation is available.The contact structure of negative dielectric/positive dielectric/negative dielectric necessary for this type of electromagnetic wave resonator is provided on the surface of the negative dielectric material 1 just as the coaxial structure of the positive dielectric thin film 3 extending in the Y-axis direction and the negative dielectric material 2 received therein is cut in the axial direction. This makes sure both negative dielectric materials 1 and 2 with the positive dielectric thin film 3 sandwiched between them are electrically insulated so that voltage can be applied to the positive dielectric thin film 3, and ensures that an area provided in the negative dielectric material 1 to receive the positive dielectric thin film 3 has an aspect ratio D/P1 of about 1.9, a figure well achievable in the state of the art.
US08872500B2	Method and apparatus for controlling the maximum output power of a power converter An example control circuit for use in a power converter includes an input voltage sensor, a current sensor, and a drive signal generator. The input voltage sensor generates a first signal representative of an input voltage (Vin) of the power converter. The current sensor generates a second signal representative of a switch current through a power switch of the power converter. The drive signal generator generates a drive signal to control switching of the power switch in response to the first and second signals. The drive signal generator sets a switching frequency of the drive signal based on a product K×Vin×t to control a maximum output power of the power converter, where K is a fixed number and t is a time it takes the second signal to change between two values of the switch current when the power switch is in an on state.
US08872499B2	Power supply apparatus There is provided a power supply apparatus supplying driving power. The power supply apparatus includes: a first power converter bypassing input power when a voltage level of the input power having a predetermined voltage level is within a reference voltage level range, and converting the input power to DC power having a preset voltage level when the voltage level of the input power is outside of the reference voltage level range; and a second power converter converting the power inputted from the first power converter to driving power having a preset voltage level.
US08872494B2	Semiconductor integrated circuit device, DC-DC converter, and voltage conversion method A semiconductor integrated circuit device is employed in a DC-DC converter that switches the voltage fed to the load depending on the PWM signal. The semiconductor integrated circuit device has an error voltage generating part, a mode setting part, an oscillation signal generating part, a pulse generating part, and a control part. The oscillation signal generating part generates an oscillation signal with a prescribed period when in the non-light-load mode, and it turns off the oscillation signal when in the light-load mode. The pulse generating part generates a pulse signal before the oscillation signal generating part generates the oscillation signal when the pulse generating part switches from the light-load to the non-light-load mode.
US08872491B2	Regulator and DC/DC converter A regulator and a DC/DC converter are provided in which a soft start is carried out even when an output is short-circuited by abnormality. Regulator includes soft start circuit that gradually starts up a reference voltage that is input into error amplifier from 0 V to the reference voltage and soft start reset circuit that monitors an input of error amplifier and performs soft start of soft start circuit again when an output of output terminal Vo is short-circuited. Soft start reset circuit includes comparator that is disposed in parallel with an input of error amplifier, offset voltage that gives an offset to the input of comparator, and NPN transistor that is turned on or off in accordance with a result of comparison of comparator and discharges capacitor C by being turned on when the output is short-circuited.
US08872484B2	Power factor correction circuitry and methodology to compensate for leading power factor Aspects relate to utilizing power factor correction to compensate for a leading power factor produced mainly due to electromagnetic interference (EMI) capacitors in front of a power factor correction stage. Provided is a power supply that includes a power factor correction circuit that includes a second harmonic generator component. The harmonic generator component includes a filter component and an integrator component. The filter component is configured to receive a rectified voltage and a power factor correction current and block a direct current component. The integrator component is configured to receive an alternating current component from the filter component and produce a harmonic that causes an angle of the power factor correction current to change from a leading power factor to a unity power factor or to a lagging power factor.
US08872481B2	Systems and methods for predicting battery power-delivery performance Battery management systems and methods related to predicting power-delivery performance are provided. In one embodiment, a method for predicting power-delivery performance for a battery includes retrieving a plurality of battery operating parameters for a selected discharge cycle, calculating an offset indicative of a difference between a modeled internal resistance of the battery and an observed internal resistance generated from a calibration discharge cycle of the battery prior to the selected discharge cycle, and outputting a battery power-delivery performance prediction based on an offset-corrected internal resistance indicative of a difference between a modeled internal resistance based on the plurality of battery operating parameters for the selected discharge cycle and the offset.
US08872480B2	Current monitoring and limiting apparatus, system and method for electric vehicle supply equipment An electric vehicle charging system is disclosed. More particularly, the system encompasses a load center having one or more electrical loads coupled thereto, electric vehicle supply equipment (EVSE) to charge an electric vehicle (EV), and a monitoring and limiting device (MLD) to monitor power or current usage of at least the one or more loads coupled to the load center, and adjust a charging level setting of the EVSE based upon the level of the usage. MLD apparatus and methods of charging a vehicle with electric vehicle supply equipment (EVSE) are provided, as are other aspects.
US08872472B2	System and method for inductively charging a battery An inductive charging system for recharging a battery. The system includes a charger circuit and a secondary circuit. The secondary circuit includes a feedback mechanism to provide feedback to the charger circuit through the inductive coupling of the primary coil and the secondary coil. The charger circuit includes a frequency control mechanism for controlling the frequency of the power applied to the primary coil at least partly in response to the feedback from the feedback mechanism.
US08872470B2	Electric drive vehicle An electric drive vehicle is equipped with a battery usable for traveling and chargeable by an external power supply and a vehicle-side ECU that permits the battery to be charged by a power generating unit capable of charging the battery in a case where power supplied from the external power supply is smaller than a predetermined threshold value α that is defined with regard to an acceptable power of the battery. More specifically, the vehicle-side ECU permits the battery to be charged by the power generating unit in a case where power supplied from the external power supply is smaller than the predetermined threshold value α and a parallel charging request switch is operated so as to execute parallel charging.
US08872467B2	Method and system for start and operation of an electrically driven load A method and system for starting and operating an electrically driven load, e.g. a compressor or pump, by power supply from a mechanical driver, e.g. a turbine or combustion engine, whereby the load is mechanically connected to a first electrical machine, and the mechanical driver is mechanically connected to a second electrical machine. The first electrical machine is electrically interconnected to the second electrical machine at a standstill or when the first and or second machine have low speed. In an acceleration phase, the first electrical machine is accelerated by accelerating the second electrical machine with the mechanical driver. When the first electrical machine has reached a predefined rotational speed, the first machine is synchronized with a local electrical power network and connected it to that network.
US08872465B2	Synchronous motor with soft start element formed between the motor rotor and motor output shaft to successfully synchronize loads that have high inertia and/or high torque A line-start synchronous motor has a housing, a rotor shaft, and an output shaft. A soft-start coupling portion is operatively coupled to the output shaft and the rotor shaft. The soft-start coupling portion is configurable to enable the synchronous motor to obtain synchronous operation and to drive, at least near synchronous speed during normal steady state operation of the motor, a load having characteristics sufficient to prevent obtaining normal synchronous operation of the motor when the motor is operatively connected to the load in the absence of the soft-start coupling. The synchronous motor is sufficiently rated to obtain synchronous operation and to drive, at least near synchronous speed during normal steady state operation of the motor, a load having characteristics sufficient to prevent obtaining normal synchronous operation of the motor when the motor is operatively connected to the load in the absence of the soft-start coupling.
US08872464B2	Motor control method A motor control method comprises: inputting a PWM signal into a control unit for the control unit to obtain a direction command and a speed command by an identification rule, and generating a control signal according to the direction and speed commands by the control unit; and generating a driving signal according to the control signal by the driving unit for driving a motor to operate according to the direction and speed commands.
US08872463B2	Electric motor controller comprising function for simultaneously estimating inertia, friction, and spring A sinusoidal command is added to a torque command of a controller to acquire a velocity and a current value of an electric motor. An estimated coupling torque value is calculated by calculating an input torque value from the current value and a torque constant of the electric motor and further calculating a coupling torque value from a velocity difference, motor inertia, and the input torque. An estimated torque error is then calculated from the estimated coupling torque value and the coupling torque value, and inertia, friction, and a spring constant are estimated from the estimated torque error, the velocity, and the coupling torque value.
US08872459B2	Trash cans with variable gearing assemblies A trash can with a power operated lid can include a lifting mechanism with a motor, a lifting member, and a variable gear. In some embodiments, the motor is operably connected with the variable gear such that the motor can drive the variable gear and/or the lifting member. In certain implementations, the variable gear includes one or more teeth with varying tooth radii. In some variants, the variable gear and a clutch member are engageable and are configured to allow manual operation of the lid.
US08872457B2	Method and apparatus for driving a polyphase electronically commutated electric machine and a motor system The invention relates to a method for operating an electronically commutated electric machine (2). Alternating phase voltage potentials are applied to the phase conductors of the electric machine (2) for commutation, said phase voltage potentials being generated by a pulse-width modulation so that the height of the applied phase voltage potential is determined by a duty cycle (TV) of the pulse width modulation. In order to determine an instant of a zero crossing of a current induced in a phase conductor, a blanking interval (AT) which represents a time slot, is provided, when no phase current potential is applied to the corresponding phase conductor. A first transition time slot (ÜT1) is provided prior to and/or after the blanking interval (AT) during which the progression of the applied phase voltage potential has a defined first gradient during.
US08872449B2	Distributed-arrangement linear motor and control method of distributed-arrangement linear motor A distributed-arrangement linear motor in which stators are arranged in a distributed manner and a method of controlling the distributed-arrangement linear motor are provided. The linear motor 1 is a linear motor in which a stator and a movable member are relatively movable, wherein the stator and the movable member respectively have periodic structures in which plural kinds of poles of the stator and the movable member (12a, 12b, 12c) (22a, 22b, 22c) which magnetically act each other and arranged periodically subsequently in an order according to the arrangement in a direction of the relative motion therebetween; a plurality of stators are arranged in a distributed manner in the direction of the relative motion; a distance D1, D2 between adjacent stators is not more than a length Lmv of the movable member; the pole of the stator is formed of a coil 11; and a current control unit that controls current to be supplied to the coil based on the distance between the stators is provided.
US08872447B2	Dual function power door A system and method for controlling an operation of a power door of a vehicle are presented. An activation of a user interface device associated with the power door is detected. A cue is provided using a notification device after detecting the activation of the user interface device. In one implementation, the notification device includes an audible alarm. When the user interface device is activated for greater than a predetermined time period, the power door is caused to be in a power mode of operation, and the notification device is used to indicate a current operational mode of the power door. In one implementation, when the user interface device is deactivated within the predetermined time period, the power door is caused to be in a manual mode of operation.
US08872445B2	LED driving circuit The invention is directed to the provision of an LED driving circuit that switches the connection of LED blocks in accordance with the supply voltage and the Vf's specific to individual LEDs contained in each LED block. The LED driving circuit includes a rectifier; a first circuit, a first current detection unit for detecting current flowing from the first LED array to the negative output of the rectifier, and a first current limiting unit for limiting the current flowing from the first LED array to the negative output of the rectifier in accordance with the current detected by the first current detection unit, and a second circuit which includes a second LED array and a current path passing through the second LED array and leading to the negative output of the rectifier, and wherein a current path in which only the first LED array is connected to the rectifier and a current path are formed in accordance with an output voltage of the rectifier, and the first current detection unit, upon detecting current flowing through the first and second LED arrays, operates the first current limiting unit to perform current path switching.
US08872440B2	Open LED bypass circuit and associated methods of operation The embodiments of the present circuit and method disclose a circuit to bypass a target circuit when an open status is detected. The present circuit may comprise a sample circuit, a monitoring circuit and a bypass circuit. The sample circuit may comprise a capacitor coupled to the target circuit. The monitoring circuit may be coupled to the capacitor and may have an output configured to generate an output signal selectively indicating the open status. The bypass circuit may comprise a switch, wherein the switch has a control terminal coupled to the output of the monitoring circuit and wherein the switch may be configured to be selectively turned ON to bypass the target circuit in accordance with the output of the monitoring circuit.
US08872438B2	LED light dimming with a target brightness A system and method for dimming an LED lighting installation using an AC power source are disclosed. The disclosed LED lighting system includes an LED light having one or more LEDs, a dimming control module for controlling and adjusting brightness level of the LED light toward a desired target brightness, and a user-operated lighting control device including a power on/off switch and a dimmer. The power on/off switch passes or interrupts the AC power fed into the dimming control module. A series of turned-off operations of the power on/off switch of transitory duration causes LED light target brightness levels to be progressively increasing or decreasing leading to a desired target brightness. Operations of the dimmer result in a target brightness setting signal being generated for the dimming control module, representative of a desired target brightness as well.
US08872437B2	Lighting apparatus and illuminating fixture with the same The lighting apparatus in accordance with the present invention includes: a switching regulator including a switching element; and a control circuit configured to adjust a switching frequency and on-duration of the switching element in accordance with a dimming ratio. The control circuit is configured to, when the dimming ratio falls within a first dimming range, adjust the switching frequency to a frequency associated with the first dimming range and adjust the on-duration to duration corresponding to the dimming ratio. The control circuit is configured to, when the dimming ratio falls within a second dimming range, adjust the on-duration to duration associated with the second dimming range and adjust the switching frequency to a frequency corresponding to the dimming ratio.
US08872436B2	Power supply device for charge pumping A power supply device includes; first/second boost circuits that boost voltages applied to a first/second boost nodes in response to a first/second main signals, and respectively operated first/second transmission unit that control provision of boosted voltages to an output node. The power supply device also includes a bulk voltage controller connected between the boosted nodes and controlling a connection between the output node and a bulk node in response to a bulk control signal. Voltages respectively applied to the first and second transmission units are determined in response to an output node voltage, as well as the first/second main signals.
US08872428B2	Plasma source with vertical gradient A plasma source includes upper and lower portions. In a first aspect, an electrical power source supplies greater power to the upper portion than to the lower portion. In a second aspect, the plasma source includes three or more power couplers that are spaced apart vertically, wherein the number of plasma power couplers in the upper portion is greater than the number of plasma power couplers in the lower portion. The upper and lower portions of the plasma source can be defined as respectively above and below a horizontal geometric plane that bisects the vertical height of the plasma source. Alternatively, the upper and lower portions can be defined as respectively above and below a horizontal geometric plane that bisects the combined area of first and second workpiece positions.
US08872425B2	Light distribution control system for vehicle Provided is a light distribution control system for vehicle in which each of left and right head lamp housings is provided with camera that picks up image of the forward area of vehicle, main lamp unit that forms basic light distribution pattern which is symmetric at the forward area of the vehicle, first sub lamp unit that forms first additional light distribution pattern at lateral side of the vehicle as compared to the basic light distribution pattern, second sub lamp unit that forms second additional light distribution pattern at lateral side of the vehicle, and control unit that controls the turning-ON/OFF of the first and second sub lamp units based on the image data of the camera. The control unit may form non-symmetric light distribution pattern as a whole at the forward area of the vehicle according to road environment.
US08872424B2	Lamp device and light source module with coil connecting tube A lamp device and a light source module are provided. The lamp device includes a lamp body and a coil connecting tube. The lamp body has an end portion and a lead wire extends from the end portion. The coil connecting tube is disposed corresponding to the end portion of the lamp body and electrically connecting to the lead wire for power supply purpose. The coil connecting tube winds about an axial direction of the lamp body and is capable of stretching or compressing along the axial direction. The light source module includes the lamp device and a lamp connector which has a power source portion being coupled to the coil connecting tube for power supply.
US08872420B2	Volumetric three-dimensional display with evenly-spaced elements A volumetric three-dimensional light-emitting display, comprising an array of elements arranged, as defined by the relative positions of the elements' centerpoints, in a close-packed relationship; and an array of conductors in electrical contact with the array of elements. The array of elements comprises voxels consisting of four elements and capable of producing full-color.
US08872407B2	Electric motor arrangement with improved brush and spring elements An electric motor arrangement, comprising a brush holder housing which has a plurality of brush elements which are coupled with a respective spring element, the spring element being configured to press the respectively associated brush element against a commutator of the electric motor arrangement, and the spring element having a first portion with a barbed hook for hooking or catching into a recess in the brush holder housing.
US08872403B2	Electrical system and method for sustaining an external load An electrical power system capable of sustaining an electrical load, the system including at least one rechargeable battery, a charger configured to recharge the at least one rechargeable battery, an electric motor configured to receive electrical power from the at least one rechargeable battery to operate the electric motor, a generator configured to provide power for use by an external load and to the charger, the generator further including a dual core generation system with a first magnet core operating in an opposite direction of a second magnet core to increase output generated by the generator and a torque conversion system configured to connect the electric motor and the generator for rotating a magnet rotor in the generator at a rate in agreement with a rotation of the motor.
US08872401B2	Securing structure for fan sensing element A securing structure for fan sensing element includes a substrate and a stator. The substrate has a first face and at least one electronic element plug-in connected to the first face. The stator is correspondingly disposed on the substrate. The stator has a silicon steel sheet assembly, a first insulation support and a second insulation support. Two sides of the silicon steel sheet assembly are respectively connected to the first and second insulation supports. The second insulation support is formed with a cavity in a position where the electronic element is positioned, whereby the electronic element is received in the cavity. Accordingly, when assembling the stator and the electronic element, the displacement of the stator and the electronic element can be avoided. In addition, the windings are prevented from being damaged.
US08872400B2	Systems and methods for regulating fluid flow for internal cooling and lubrication of electric machines Systems and methods are provided for cooling and lubrication of high power density electric machines with an enhanced fluid injection system. Multiple fluid flow passages are within the electric machine, which include a bearing fluid flow pathway and a rotor fluid flow pathway. The bearing fluid flow pathway comprises a passage which directs fluid to contact a bearing for lubrication and cooling. The rotor fluid flow pathway comprises a passage which directs fluid along the rotatable shaft toward the rotor and stator for cooling. A fluid flow passage may lead to a junction, and may split between the bearing fluid flow pathway and the rotor fluid flow pathway. Additionally, a fluid flow metering device at the junction between the bearing fluid flow pathway and the rotor fluid flow pathway, may determine the relative amount of fluid that flows to the bearing and that flows toward the rotor and stator.
US08872399B2	Stator winding assembly and method An electrical device includes a plurality of stacked laminates that form a tubular stator portion, a cooling passage partially defined by orifices formed in the plurality of stacked laminates, a housing including a cavity further defining the cooling passage, the cooling passage defining a fluid flow path parallel to a rotational axis of the stator portion, a sump portion communicative with the cooling passage, the sump portion including a cavity defined by the stator portion and the housing member.
US08872396B2	Electric motor and rotor including a permanent magnet holding member A rotor of an electric motor is provided in which a permanent magnet holding member can be assuredly fixed to a rotor main body and the rotor main body can be easily worked and inexpensively manufactured. In the rotor, a plurality of permanent magnets 21 are held in a permanent magnet holding member 29 made of a synthetic resin and fixed to an outer peripheral part of a cylindrical rotor main body 28. An outer peripheral surface of the rotor main body 28 is a cylindrical surface. Rotation prevention recessed parts 30 are formed at a plurality of parts in the circumferential direction of the outer peripheral part in both end parts of the rotor main body 28. The permanent magnet holding member 29 includes annular parts 31 which come into close contact with the outer peripheral parts of both end faces of the rotor main body 28 and connecting parts 32 which connect both the annular parts 31 on the outer peripheral surface of the rotor main body 28 and hold the permanent magnets 21. A plurality of rotation prevention protruding parts 33 fitted to the rotation prevention recessed parts 30 of the rotor main body 28 are formed integrally with the permanent magnet holding member 29.
US08872395B2	Rotary single-phase electromagnetic actuator A single phase, rotary electromagnetic actuator comprising first and second stator assemblies, located in oppositely facing spaced apart positions along a common central axis, permits a magnetized disc magnet rotor to rotate about the common axis free of any magnetic attractive forces normally tending to move the disc magnet longitudinally along the axis, or alternatively to be located in a position to create a desired longitudinal attractive force. The entire assembly is maintained in operative positions by a circular belt which provides an inward facing lip on each side of which the stator assemblies are seated and which determines the magnetic airgap spacing for the disc. The invention may be implemented as a servo-actuator by the inclusion of an angular position sensor that uses the actuator rotor as the magnetic field emitter, and a receiver for the magnetic field and its contacts, located in the belt lip.
US08872390B2	Wireless communication-enabled energy consumption monitor and mobile application for same A device and method including: an energy consumption sensor; a wireless communications component adapted for wireless communication; a processing unit, adapted to receive energy consumption data from the energy consumption sensor and transmit the energy consumption data via the wireless communications component; and a switch having: a closed state coupling the input end of the device to the output end of the device, and an open state, disconnecting the input end of the device from the output end of the device.
US08872387B2	Non-contact selection switch The present invention relates to a non-contact switch which is used for an elevator or general automatic doors, and comprises: buttons B including a push button or an optical sensor button for selecting an elevator movement or opening an automatic door; a pair of long sensor blocks 10, which are installed adjacent to or above the push button and arranged so as to face each other with a gap 12 equivalent to the width of one to two human fingers therebetween; and a plurality of sensors S which are installed in a single file on the surfaces of the sensor blocks that face each other, wherein a sensor detects movement of a human finger moving with the gap 12 at or above a predetermined length or at or above a predetermined speed and selects an upward or downward movement for a destination floor for the elevator or opens the automatic door.
US08872385B2	Wireless power transmission system A wireless power transmission system transmits power wirelessly from a power transmitter to a power receiver. The power transmitter includes a class E amplifier, a transmitting-end resonant circuit, a detector that detects a voltage or current waveform at a predetermined position in the class E amplifier in accordance with the impedance of the transmitting-end resonant circuit as viewed from the class E amplifier, and a signal extractor that extracts a signal according to the waveform. The power receiver includes a receiving-end resonant circuit, a rectifier circuit, a power reproducing section, and an impedance changer connected between the rectifier circuit and the power reproducing section to change its impedance. When the impedance is changed, the detector detects the waveform variation and the signal extractor extracts and outputs a signal corresponding to the waveform detected by the detector.
US08872381B2	Utility interconnection and inverter device A utility interconnection inverter device (7) includes an inverter circuit (21) that converts DC power generated by a solar panel (3) to AC power by switching a plurality of switching elements, and a controller (39) that controls the plurality of switching elements.Moreover, fans (43, 45) are provided for cooling the plurality of switching elements.Furthermore, a power supply circuit (a terminal 38, a transformer 40, and a power circuit 41) is provided, and supplies power from a control power supply (10) to the controller (39) and the fans (43, 45).
US08872378B2	Method for operating a control circuit, particularly for use in a motor vehicle A method for operating a control circuit having a first output and a second output and having an allocated first switching arrangement and an allocated second switching arrangement, in which a control voltage present between the outputs for operating a load, in particular of a motor vehicle, is formed in that the first output is optionally connected by a switching arrangement to a first potential or to a second potential, and the second output is optionally connected by a switching arrangement to the first potential or to the second potential, a state in which the control voltage is intended to be at least briefly and at least approximately zero being brought about in a first case in that the two outputs are simultaneously connected by the two switching arrangements to the first potential, and being brought about in a second case in that the two outputs are simultaneously connected by the two switching arrangements to the second potential, both cases being brought about at least once during operation of the control circuit, and, both in the first case and in the second case, a difference between two output potentials that characterizes the control voltage present at the outputs, or that characterizes a current flowing through at least one shunt resistor situated in series to the outputs and/or in series to switches, being acquired and being subjected to a comparison.
US08872374B2	Underwater power plant having removable nacelle Presented is an underwater power plant including a support structure, a nacelle, the support structure and the nacelle being detachably connectable to one another via a coupling device, a water turbine, the water turbine at least indirectly drives an electrical generator that is received in the nacelle, and an inductive transmission device, where inductive transmission device transmits power generated by the electrical generator from the nacelle in a contactless manner to the support structure, and where the inductive transmission device includes a transformer with a primary side and a secondary side, the primary side is assigned to the nacelle and the secondary side is assigned to the support structure.
US08872370B2	Tool having integrated electricity generator with external stator and power conditioner A tool cover for receiving a tool housing of a pneumatic tool is disclosed. The tool cover supports and aligns an inductor element of a stator with magnets of a rotor within the tool housing. The tool cover also supports a circuit to which the inductor element is electrically connected, where the circuit comprises a power conditioner for receiving current from the inductor element and conditioning the current to be acceptable for supply to a load that comprises one or more logic processing devices.
US08872367B2	Lifting system that generates electrical power A system for generating electrical power includes a weight assembly coupled to a drive chain that is coupled to a drive mechanism, which is coupled to a rotational mechanism. When the weight assembly is lowered from an elevated position by the force of gravity, the drive chain rotates the drive mechanism, which rotates the rotational mechanism, which rotates the shafts of a power generator mechanism to produce electrical power. After the weight assembly is lowered, a lifting mechanism raises the weight assembly to the elevated position, resetting the system for generating electrical power.
US08872363B2	Vehicle movement activated electrical power generator, and method for providing electrical power for roadside applications Electrical power generation from vehicle movement where there is limited or no access to a power grid. A turbine disposed alongside, above, or under the road, harnesses the wind currents generated by a vehicle to drive an electrical power generator connected to a local electrical power system providing electrical power for roadside devices on the road ahead. Alternatively, pedals may be disposed on the road such that when a vehicle runs over them, the vertical motion of the pedals is translated into a rotational motion to drive an electrical power generator. The local electrical power system is used to supply power for roadside LEDs placed along the road ahead of the vehicle to illuminate the boundaries and perimeter, or for a roadside sign, camera, or deer whistle. The activation of the roadside devices is controlled based on whether it is day or night and the remaining charge of a battery.
US08872358B2	Sealant laminated composite, sealed semiconductor devices mounting substrate, sealed semiconductor devices forming wafer, semiconductor apparatus, and method for manufacturing semiconductor apparatus Described herein is a sealant laminated composite for collectively sealing a semiconductor device's mounting surface of a substrate on which semiconductor devices are mounted or a semiconductor device's forming surface of a wafer on which semiconductor devices are formed. The composite can include a support wafer and an uncured resin layer constituted of an uncured thermosetting resin formed on one side of the support wafer. In certain aspects, the sealant laminated composite is very versatile, even when a large diameter or thin substrate or wafer is sealed. In certain aspects, this can prevent the substrate or wafer from warping and the semiconductor devices from peeling; can collectively seal a semiconductor device's mounting surface of a substrate on which semiconductor devices are mounted or a semiconductor device's forming surface of a wafer on which semiconductor devices are formed on a wafer level; and can provide a sealant laminated composite that is excellent in the heat resistance and humidity resistance after sealing.
US08872355B2	Semiconductor device with pre-molding chip bonding This disclosure relates generally to a semiconductor device and method of making the semiconductor device by pressing an electrical contact of a chip into a bonding layer on a carrier. The bonding layer is cured and coupled, at least in part, to the electrical contact. A molding layer is applied in contact with the chip and a first major surface of the bonding layer. Distribution circuitry is coupled to the electrical contact.
US08872353B2	Semiconductor device having groove-shaped via-hole The semiconductor device has insulating films 40, 42 formed over a substrate 10; an interconnection 58 buried in at least a surface side of the insulating films 40, 42; insulating films 60, 62 formed on the insulating film 42 and including a hole-shaped via-hole 60 and a groove-shaped via-hole 66a having a pattern bent at a right angle; and buried conductors 70, 72a buried in the hole-shaped via-hole 60 and the groove-shaped via-hole 66a. A groove-shaped via-hole 66a is formed to have a width which is smaller than a width of the hole-shaped via-hole 66. Defective filling of the buried conductor and the cracking of the inter-layer insulating film can be prevented. Steps on the conductor plug can be reduced. Accordingly, defective contact with the upper interconnection layer and the problems taking place in forming films can be prevented.
US08872352B2	Semiconductor device having groove-shaped via-hole The semiconductor device has insulating films 40, 42 formed over a substrate 10; an interconnection 58 buried in at least a surface side of the insulating films 40, 42; insulating films 60, 62 formed on the insulating film 42 and including a hole-shaped via-hole 60 and a groove-shaped via-hole 66a having a pattern bent at a right angle; and buried conductors 70, 72a buried in the hole-shaped via-hole 60 and the groove-shaped via-hole 66a. A groove-shaped via-hole 66a is formed to have a width which is smaller than a width of the hole-shaped via-hole 66. Defective filling of the buried conductor and the cracking of the inter-layer insulating film can be prevented. Steps on the conductor plug can be reduced. Accordingly, defective contact with the upper interconnection layer and the problems taking place in forming films can be prevented.
US08872349B2	Bridge interconnect with air gap in package assembly Embodiments of the present disclosure are directed towards techniques and configurations for a bridge interconnect assembly that can be embedded in a package assembly. In one embodiment, a package assembly includes a package substrate configured to route electrical signals between a first die and a second die and a bridge embedded in the package substrate and configured to route the electrical signals between the first die and the second die, the bridge including a bridge substrate, one or more through-hole vias (THVs) formed through the bridge substrate, and one or more traces disposed on a surface of the bridge substrate to route the electrical signals between the first die and the second die. Routing features including traces and a ground plane of the bridge interconnect assembly may be separated by an air gap. Other embodiments may be described and/or claimed.
US08872342B2	Barrier layer for copper interconnect A device including a dielectric layer overlying a substrate, a conductive line with a sidewall in the dielectric layer, a Ta layer adjoining the sidewall of the conductive line, and a metal oxide formed between the Ta layer and the dielectric layer.
US08872341B2	Semiconductor structure having metal oxide or nirtride passivation layer on fill layer and method for making same One or more embodiments relate to a method of forming a semiconductor device, comprising: forming a structure, the structure including at least a first element and a second element; and forming a passivation layer over the structure, the passivation layer including at least the first element and the second element, the first element and the second element of the passivation layer coming from the structure.
US08872340B2	Substrate for semiconductor package which can prevent the snapping of a circuit trace despite physical deformation of a semiconductor package and semiconductor package having the same A substrate for a semiconductor package includes: a first dielectric having a first surface and a second surface which faces away from the first surface and possesses waveform shaped portions, and formed with first holes penetrating the first and second surfaces; and circuit traces formed over the second surface of the first dielectric and having waveform shaped portions disposed over the waveform shaped portions of the second surface of the first dielectric. The waveform shaped portions of the second surface of the first dielectric and the waveform shaped portions of the circuit traces form a stress-resistant structure.
US08872334B2	Method for manufacturing semiconductor device In a manufacturing method of a semiconductor device incorporating a semiconductor element in a multilayered wiring structure including a plurality of wiring layers and insulating layers, a semiconductor element is mounted on a silicon support body whose thickness is reduced to a desired thickness and which are equipped with a plurality of through-vias running through in the thickness direction; an insulating layer is formed to embed the semiconductor element; then, a plurality of wiring layers is formed on the opposite surfaces of the silicon support body in connection with the semiconductor element. Thus, it is possible to reduce warping which occurs in proximity to the semiconductor element in manufacturing, thus improving a warping profile in the entirety of a semiconductor device. Additionally, it is possible to prevent semiconductor elements from becoming useless, improve a yield rate, and produce a thin-type semiconductor device with high-density packaging property.
US08872331B2	Semiconductor device and method for manufacturing the same A semiconductor device capable of wireless communication, which has high reliability in terms of resistance to external force, in particular, pressing force and can prevent electrostatic discharge in an integrated circuit without preventing reception of an electric wave. The semiconductor device includes an on-chip antenna connected to the integrated circuit and a booster antenna which transmits a signal or power included in a received electric wave to the on-chip antenna without contact. In the semiconductor device, the integrated circuit and the on-chip antenna are interposed between a pair of structure bodies formed by impregnating a fiber body with a resin. One of the structure bodies is provided between the on-chip antenna and the booster antenna. A conductive film having a surface resistance value of approximately 106 to 1014 Ω/cm2 is formed on at least one surface of each structure body.
US08872329B1	Extended landing pad substrate package structure and method An extended landing pad substrate package includes a dielectric layer having an upper surface and an opposite lower surface. A lower circuit pattern is embedded in the lower surface of the dielectric layer. The lower circuit pattern includes traces having a first thickness and extended landing pads having a second thickness greater than the first thickness. Blind via apertures are formed through an upper circuit pattern embedded into the upper surface of the dielectric layer, through the dielectric layer and to the extended landing pads. The length of the blind via apertures is minimized due to the increase second thickness of the extended landing pads as compared to the first thickness of traces. Accordingly, the width of the blind via apertures at the upper surface of the dielectric layer is minimized.
US08872327B2	Semiconductor device According to one embodiment, a semiconductor device includes a first electrical conductor, a second electrical conductor, first and second semiconductors between the first and second electrical conductors, a first power terminal, a second power terminal, a signal terminal, and an insulator which covers the components. The insulator includes a flat bottom surface in which the first and second electrical conductors are exposed, a ceiling surface, a first end surface, and a second end surface. The power terminals and the signal terminal extend outwardly from the first and second end surfaces, and the ceiling surface, respectively. The first end surface, the ceiling surface, and the second end surface are formed with a parting line.
US08872318B2	Through interposer wire bond using low CTE interposer with coarse slot apertures A microelectronic package includes a subassembly, a second substrate, and a monolithic encapsulant. The subassembly includes a first substrate that has at least one aperture, a coefficient of thermal expansion (CTE) of eight parts per million per degree Celsius or less, and first and second contacts arranged so as to have a pitch of 200 microns or less. First and second microelectronic elements are respectively electrically connected to the first and second contacts. Wire bonds may be used to connect the second element contacts with the second contacts. A second substrate may underlie either the first or the second microelectronic elements and be electrically interconnected with the first substrate. The second substrate may have terminals configured for electrical connection to a component external to the microelectronic package. A monolithic encapsulant may contact the first and second microelectronic elements and the first and second substrates.
US08872316B2	Manufacturing method of semiconductor device and semiconductor device To enhance the reliability of a semiconductor device. The semiconductor device includes die pads, over which a first semiconductor chip and a second semiconductor chip are mounted respectively, a plurality of support pins that support each of the die pads, a plurality of inner leads and outer leads arranged around the die pads, a plurality of wires that electrically couple the semiconductor chips to the inner leads, and a sealing body that seals the semiconductor chips, the inner leads, and the wires. Each of the die pads is supported by three support pins integrally formed together with the die pad, and each of second support pins of each pair of the three support pins is arranged between the inner leads adjacent to each other.
US08872313B2	Package apparatus of power semiconductor device A package apparatus is for packaging a power semiconductor device that includes a substrate formed, a mold part molded on the substrate, and electrode terminals extended from the mold part to a side opposite from the substrate by a predetermined length; includes: a holding unit that has insertion slots and is to holding the power semiconductor device, the insertion slots each being an opening into which the power semiconductor device is insertable in a direction perpendicular to extending direction of the electrode, edges of the opening being formed to make contact with the mold part and the substrate; and a container box that contains the holding unit. The insertion slots are provided to the holding unit so that an interval between the insertion slots in an extending direction of the electrode terminals of the power semiconductor device inserted is greater than the extending length of the electrode terminals.
US08872312B2	EMI package and method for making same An integrated circuit structure includes a substrate, a photosensitive molding on a first side of the substrate, a via formed in the molding, and a conformable metallic layer deposited over the first side of the substrate and in the via. A through via may be formed through the substrate aligned with the via in the molding with an electrically conductive liner deposited in the through via in electrical contact with the conformable metallic layer. The integrated circuit structure may further include a connector element such as a solder ball on an end of the through via on a second side of the substrate opposite the first side. The integrated circuit structure may further include a die on the first side of the substrate in electrical contact with another through via or with a redistribution layer.
US08872311B2	Semiconductor device and a method of manufacture therefor The present invention provides a semiconductor device, a method of manufacture therefor, and an integrated circuit including the semiconductor device. The semiconductor device, in one particularly advantageous embodiment, includes a multi layer etch stop located over a substrate, wherein the multi layer etch stop has a first insulative layer and a second silicon-rich nitride layer located over the first insulative layer. Located over the multi layer etch stop is a dielectric layer having an opening formed therein that extends through at least a portion of the multi layer etch stop. A conductive plug is typically located within the opening, wherein an insulative spacer is located between the conductive plug and the second silicon-rich nitride layer.
US08872310B2	Semiconductor device structures and electronic devices including hybrid conductive vias, and methods of fabrication A conductive via of a semiconductor device includes a relatively small diameter portion extending into an active surface of a fabrication substrate and a corresponding, relatively large diameter portion that extends into a back side of the fabrication substrate. This type of conductive via may be fabricated by forming the relatively small diameter portion before or during BEOL processing, while the large diameter portion of each conductive via may be fabricated after BEOL processing is complete. Electronic devices that include one or more semiconductor devices with such conductive vias are also disclosed.
US08872308B2	AlN cap grown on GaN/REO/silicon substrate structure III-N material grown on a silicon substrate includes a single crystal rare earth oxide layer positioned on a silicon substrate. The rare earth oxide is substantially crystal lattice matched to the surface of the silicon substrate. A first layer of III-N material is positioned on the surface of the rare earth oxide layer. An inter-layer of aluminum nitride (AlN) is positioned on the surface of the first layer of III-N material and an additional layer of III-N material is positioned on the surface of the inter-layer of aluminum nitride. The inter-layer of aluminum nitride and the additional layer of III-N material are repeated n-times to reduce or engineer strain in a final III-N layer. A cap layer of AlN is grown on the final III-N layer and a III-N layer of material with one of an LED structure and an HEMT structure is grown on the AlN cap layer.
US08872302B2	Electronic apparatus Disclosed is an electronic apparatus in which a thermoelectric conversion element and at least one of a photoelectric conversion element and a transistor or a diode are monolithically integrated, or which prevents interference between a p-type thermoelectric conversion unit and an n-type thermoelectric conversion unit. This electronic apparatus includes a thermoelectric conversion element (100) including a semiconductor layer of stacked heterostructure (38) which performs thermoelectric conversion using Seebeck effect and at least one of a photoelectric conversion element (102) in which at least a portion of the semiconductor layer of stacked heterostructure (38) performs photoelectric conversion and a transistor (104) or a diode having at least a portion of the semiconductor layer of stacked heterostructure (38) as an operating layer.
US08872299B2	Semiconductor device A semiconductor device capable of high-speed operation. The semiconductor device includes a first transistor, a second transistor, and a capacitor. One of a source and a drain of the first transistor is supplied with a first signal. One of a source and a drain of the second transistor is supplied with a first potential. A gate of the second transistor is supplied with a second signal. A first electrode of the capacitor is electrically connected to the other of the source and the drain of the first transistor. A second electrode of the capacitor is electrically connected to the other of the source and the drain of the second transistor. In a first period, the first signal is low and the second signal is high. In a second period, the first signal is high and the second signal is either low or high.
US08872296B2	Chip module structure for particles protection The present invention provides a chip module structure for particles protection. The structure includes a substrate. A chip is configured on the substrate, with a sensing area. A holder is disposed on the substrate, wherein the holder has a first rib. A transparent material is disposed on the holder, substantially aligning to the sensing area. A lens holder is disposed on the holder, and a lens is configured on the lens holder, substantially aligning to the transparent material and the sensing area. The lens has a second rib, wherein the second rib is disposed corresponding to the first rib for blocking particles entering into the chip module structure.
US08872288B2	Apparatus comprising and a method for manufacturing an embedded MEMS device A system and a method for forming a packaged MEMS device are disclosed. In one embodiment a packaged MEMS device includes a MEMS device having a first main surface with a first area along a first direction and a second direction, a membrane disposed on the first main surface of the MEMS device and a backplate adjacent to the membrane. The packaged MEMS device further includes an encapsulation material that encapsulates the MEMS device and that defines a back volume, the back volume having a second area along the first direction and the second direction, wherein the first area is smaller than the second area.
US08872286B2	Metal gate structure and fabrication method thereof A metal gate structure located on a substrate includes a gate dielectric layer, a metal layer and a titanium aluminum nitride metal layer. The gate dielectric layer is located on the substrate. The metal layer is located on the gate dielectric layer. The titanium aluminum nitride metal layer is located on the metal layer.
US08872284B2	FinFET with metal gate stressor A gate stressor for a fin field effect transistor (FinFET) device is provided. The gate stressor includes a floor, a first stressor sidewall, and a second stressor sidewall. The floor is formed on a first portion of a gate layer. The gate layer is disposed above a shallow trench isolation (STI) region. The first stressor sidewall formed on a second portion of the gate layer. The second portion of the gate layer is disposed on sidewalls of a fin. The second stressor sidewall formed on the third portion of the gate layer. The third portion of the gate layer is disposed on sidewalls of a structure spaced apart from the fin. The first stressor side wall and the second stressor sidewall do not exceed a height of the fin.
US08872282B2	Semiconductor device A semiconductor device is implementated that includes a source region, multiple elongated drain regions, a channel region, a source electrode, a drain electrode, and a gate electrode. The source region is a flat planar region formed on a compound semiconductor layer. The multiple elongated drain regions are formed so that they are each electrically isolated from each other on the compound semiconductor layer. The channel region is formed so that it contacts one side of the source region and is electrically isolated from the source region and the multiple elongated drain regions. The source electrode is formed at least in a portion on top of the source region. The drain electrode is formed so that it is connected electrically to the multiple elongated drain regions. The gate electrode is formed so that it is connected electrically to the multiple channel regions.
US08872279B2	Transistor structure having an electrical contact structure with multiple metal interconnect levels staggering one another An electrical contact structure distributes current along a length thereof. The electrical contact structure includes a plurality of n metal rectangles on n levels of metal. The rectangle on one metal level is at least as wide in width and vertically covers in width the rectangle on the metal level immediately below. The rectangle on one metal level is shorter in length than and substantially aligned at a first end with the rectangle on the metal level immediately below. Rectangle first ends are substantially aligned. Features of an exemplary FET transistor of this invention are a source and drain terminal electrical contact structure, a multi-level metal ring connecting gate rectangles on both ends, and a wider-than-minimum gate-to-gate spacing. The invention is useful, for example, in an electromigration-compliant, high performance transistor.
US08872278B2	Integrated gate runner and field implant termination for trench devices In one general aspect, an apparatus can include a plurality of trench metal-oxide-semiconductor field effect transistors (MOSFET) devices formed within an epitaxial layer of a substrate, and a gate-runner trench disposed around the plurality of trench MOSFET devices and disposed within the epitaxial layer. The apparatus can also include a floating-field implant defined by a well implant and disposed around the gate-runner trench.
US08872274B2	Structure for self-aligned silicide contacts to an upside-down FET by epitaxial source and drain An upside-down p-FET is provided on a donor substrate. The upside-down p-FET includes: self-terminating e-SiGe source and drain regions; a cap of self-aligning silicide/germanide over the e-SiGe source and drain regions; a silicon channel region connecting the e-SiGe source and drain regions; buried oxide above the silicon channel region; and a gate controlling current flow from the e-SiGe source region to the e-SiGe drain region.
US08872270B2	Memory devices Memory devices and methods of fabricating the same include a substrate including a cell region and a peripheral circuit region, data storages on the cell region, first bit lines on and coupled to the data storages, first contacts coupled to peripheral transistors on the peripheral circuit region, and second bit lines on and coupled to the first contacts. The second bit lines may each have a lowermost surface lower than a lowermost surface of the data storages.
US08872266B1	Trench power MOSFET structure and fabrication method thereof A trench power MOSFET structure and fabrication method thereof is provided. The fabrication method comprises following process. First, form an isolating trench. Then, form at least two doped regions around the isolating trench. The doped regions are adjacent and the doping concentrations of two doped regions are different. Form an isolating structure in the isolating trench. Wherein, the junction profiles of the two doped regions are made by ion implantation method for moderate the electric field distribution and decreasing the conduction loss.
US08872264B2	Semiconductor device having a floating semiconductor zone A semiconductor device includes a first trench and a second trench extending into a semiconductor body from a surface. A body region of a first conductivity type adjoins a first sidewall of the first trench and a first sidewall of the second trench, the body region including a channel portion adjoining to a source structure and being configured to be controlled in its conductivity by a gate structure. The channel portion is formed at the first sidewall of the second trench and is not formed at the first sidewall of the first trench. An electrically floating semiconductor zone of the first conductivity type adjoins the first trench and has a bottom side located deeper within the semiconductor body than the bottom side of the body region.
US08872260B2	Semiconductor device formation An apparatus of and method for making a semiconductor structure having a shallow trench isolation (STI) trench with a substantially v-shaped profile, that is the distance between top portions is greater than the distance between bottom portions of shallow trench isolation (STI) structure sidewalls adjacent to the trench, provides for substantially seamless and substantially void-free gate structures. The semiconductor structures are formed by implanting an implantation species into the sidewalls, which allows for the top portions of the sidewalls to be etched away at a greater rate than that of the bottom portions, resulting in the substantially v-shaped profile. And the substantially v-shaped profile allows for subsequent device layers to more easily and smoothly fill in the v-shaped trenches, due to a wider opening toward the tops of the trenches.
US08872254B2	Semiconductor device and method of manufacturing the same A semiconductor device includes word lines and interlayer insulating layers alternately stacked, a channel layer penetrating the word lines and the interlayer insulating layers, a tunnel insulating layer surrounding the channel layer, and first charge trap layers surrounding the tunnel insulating layer, interposed between the word lines and the tunnel insulating layer, respectively, and doped with first impurities.
US08872253B2	Semiconductor memory devices Methods of fabricating a semiconductor device are provided. The method includes alternately stacking first material layers and second material layers on a substrate to form a stacked structure, forming a through hole penetrating the stacked structure, forming a data storage layer on a sidewall of the through hole, forming a semiconductor pattern electrically connected to the substrate on an inner sidewall of the data storage layer, etching an upper portion of the data storage layer to form a first recessed region exposing an outer sidewall of the semiconductor pattern, and forming a first conductive layer in the first recessed region. Related devices are also disclosed.
US08872246B1	Memristor using a transition metal nitride insulator Apparatus is disclosed in which at least one resistive switching element is interposed between at least a first and a second conducting electrode element. The resistive switching element comprises a metal oxynitride. A method for making such a resistive switching element is also disclosed.
US08872245B2	Semiconductor device A semiconductor device includes element active portion X and element peripheral portion Y. An interlayer insulating film is formed on upper surfaces of portions X and Y. A source electrode connected to a p base region and n-type source region and a gate metal wiring formed annularly surrounding the source electrode are formed on element active portion X side upper surface of the interlayer insulating film. The gate metal wiring connects to a gate electrode. An organic protective film with openings is formed on a first main surface side upper surface of the semiconductor substrate, and the openings serve as a gate electrode pad partially exposing the gate metal wiring and a source electrode pad partially exposing the source electrode. An inorganic protective film formed between the gate metal wiring and the organic protective film covers the gate metal wiring. The semiconductor device is highly reliable.
US08872244B1	Contact structure employing a self-aligned gate cap After formation of a replacement gate structure, a template dielectric layer employed to pattern the replacement gate structure is removed. After deposition of a dielectric liner, a first dielectric material layer is deposited by an anisotropic deposition and an isotropic etchback. A second dielectric material layer is deposited and planarized employing the first dielectric material portion as a stopping structure. The first dielectric material portion is removed selective to the second dielectric material layer, and is replaced with gate cap dielectric material portion including at least one dielectric material different from the materials of the dielectric material layers. A contact via hole extending to a source/drain region is formed employing the gate cap dielectric material portion as an etch stop structure. A contact via structure is spaced from the replacement gate structure at least by remaining portions of the gate cap dielectric material portion.
US08872242B2	Silicon carbide semiconductor device and method for manufacturing the same A silicon carbide substrate has a first conductivity type. The silicon carbide substrate has a first surface provided with a first electrode and a second surface provided with first trenches arranged to be spaced from one another. A gate layer covers an inner surface of each of the first trenches. The gate layer has a second conductivity type different from the first conductivity type. A filling portion fills each of the first trenches covered with the gate layer. A second electrode is separated from the gate layer and provided on the second surface of the silicon carbide substrate. A gate electrode is electrically insulated from the silicon carbide substrate and electrically connected to the gate layer. Thereby, a silicon carbide semiconductor device capable of being easily manufactured can be provided.
US08872237B2	Heterojunction bipolar transistor manufacturing method and integrated circuit comprising a heterojunction bipolar transistor Disclosed is a method of manufacturing a heterojunction bipolar transistor comprising a substrate, an upper region of said substrate comprising an active region of the bipolar transistor bordered by shallow trench insulation, said active region comprising a buried collector region extending to a depth beyond the depth of the shallow trench insulation, the method comprising forming a trench in the substrate adjacent to said active region, said trench extending through the shallow trench insulation; at least partially filling said trench with an impurity; and forming a collector sinker in the substrate by developing said impurity to extend into the substrate to a depth beyond the depth of the shallow trench insulation. An IC comprising a heterojunction bipolar transistor manufactured by this method is also disclosed.
US08872232B2	Compound semiconductor device and method for manufacturing the same There is embodied a high-reliability high-voltage resistance compound semiconductor device capable of improving the speed of device operation, being high in avalanche resistance, being resistant to surges, eliminating the need to connect any external diodes when applied to, for example, an inverter circuit, and achieving stable operation even if holes are produced, in addition to alleviating the concentration of electric fields on a gate electrode and thereby realizing a further improvement in voltage resistance. A gate electrode is formed so as to fill an electrode recess formed in a structure of stacked compound semiconductors with an electrode material through a gate insulation film, and a field plate recess formed in the structure of stacked compound semiconductors is filled with a p-type semiconductor, thereby forming a field plate the p-type semiconductor layer of which has contact with the structure of stacked compound semiconductors.
US08872229B2	Thin film transistor A thin film transistor includes a substrate and an active layer formed on the substrate. The active layer includes a channel region, a source region and a drain region. A source electrode and a drain electrode are formed on the source region and the drain region respectively. A gate insulating layer is formed between a gate electrode and the channel region. The thin film transistor further includes a nitride conductive layer formed between the drain electrode and the drain region, and between the source electrode and source region. The nitride conductive layer has a carrier concentration higher than that of the active layer, thereby reducing contacting resistances between the drain electrode and the drain region and between the source electrode and source region.
US08872228B2	Strained-channel semiconductor device fabrication A method for controlling IC device strain and the devices thereby formed are disclosed. An exemplary embodiment includes receiving an IC device substrate having a device region corresponding to an IC device. An implantation process is performed on the device region forming an amorphous region within the device region. The IC device substrate is recessed to define a source/drain recess in the device region having a profile determined by the amorphous structure of the amorphous region. A source/drain epitaxy is then performed to form a source/drain structure within the source/drain recess.
US08872224B2	Solution Processed Neutron Detector A low-cost neutron detector is formed on a substrate includes a sensor formed by an active material layer sandwiched between two electrodes, and a neutron capture layer formed in close proximity to (i.e., over and/or under) the sensor. The sensor active material layer includes a bulk heterojunction or bilayer structure that is formed by depositing particulate solutions incorporating at least one type of high atomic number nanoparticle using low-temperature (i.e., below 400° C.) solution processing techniques. The sensor electrode material and neutron capture material are similarly disposed in associated solutions (e.g., conductive inks) that are also deposited using low-temperature solution processing techniques, whereby the fabrication process can be carried out on low-cost flexible substrate material (e.g., PET) using high efficiency roll-to-roll production techniques. The neutron capture material is optionally patterned as an array of pillars, and the active layer materials are backfilled between the pillars.
US08872220B2	Integrated circuits with aligned (100) NMOS and (110) PMOS FinFET sidewall channels An integrated circuit device that includes a plurality of multiple gate FinFETs (MuGFETs) is disclosed. Fins of different crystal orientations for PMOS and NMOS MuGFETs are formed through amorphization and crystal regrowth on a direct silicon bonded (DSB) hybrid orientation technology (HOT) substrate. PMOS MuGFET fins are formed with channels defined by fin sidewall surfaces having (110) crystal orientations. NMOS MuGFET fins are formed with channels defined by fin sidewall surfaces having (100) crystal orientations in a Manhattan layout with the sidewall channels of the different PMOS and NMOS MuGFETs aligned at 0° or 90° rotations.
US08872215B2	Light emitting device and light emitting device package A light emitting device according to the embodiment includes a first electrode; a light emitting structure including a first semiconductor layer, an active layer and a second semiconductor layer on the first electrode; a second electrode on the light emitting structure; and a control switch installed on the light emitting structure to control the light emitting structure.
US08872213B2	Semiconductor light emitting device A semiconductor light emitting device includes: a package which is made of a resin and includes a recess; a lead frame exposed to a bottom of the recess; a semiconductor light emitting element connected to the lead frame in the recess; a phosphor layer over the bottom of the recess; and a second resin layer above the phosphor layer and the semiconductor light emitting element, in which the phosphor layer contains a semiconductor fine particle having an excitation fluorescence spectrum which changes according to a particle size, and the phosphor layer includes a water-soluble or water-dispersible material.
US08872206B2	Organic light emitting display device and method of manufacturing the same An organic light emitting display device includes a thin film transistor (TFT), a first insulating layer covering the TFT, a first electrode formed on the first insulating layer and electrically connected to the TFT, a second insulating layer that is formed on the first insulating layer and covers the first electrode and has an opening to expose a portion of the first electrode, an organic layer formed on a portion of the second insulating layer and the first electrode, a second electrode formed on the second insulating layer and the organic layer and composed of a first region and a second region, a capping layer formed on a first region of the second electrode and having first edges, and a third electrode formed on a second region of the second electrode and having second edges whose side surfaces contact side surfaces of the first edges of the capping layer.
US08872205B2	Semiconductor light-emitting device and method of manufacturing the same A semiconductor light-emitting device, and a method of manufacturing the same. The semiconductor light-emitting device includes a first electrode layer, an insulating layer, a second electrode layer, a second semiconductor layer, an active layer, and a first semiconductor layer that are sequentially stacked on a substrate, a first contact that passes through the substrate to be electrically connected to the first electrode layer, and a second contact that passes through the substrate, the first electrode layer, and the insulating layer to communicate with the second electrode layer. The first electrode layer is electrically connected to the first semiconductor layer by filling a contact hole that passes through the second electrode layer, the second semiconductor layer, and the active layer, and the insulating layer surrounds an inner circumferential surface of the contact hole to insulate the first electrode layer from the second electrode layer.
US08872201B2	Organic light emitting diode display An organic light emitting diode (OLED) display is disclosed. In one embodiment, the OLED display includes i) a substrate having first and second surfaces opposing each other and ii) an organic light emitting diode (OLED) formed over the substrate, wherein the OLED is closer to the first surface than the second surface of the substrate. The display may also include i) a light scattering layer formed between the first surface of the substrate and the organic light emitting diode and ii) a light absorbing layer formed between the first surface of the substrate and the light scattering layer or on the second surface of the substrate.
US08872198B2	Luminaire and light-emitting apparatus with light-emitting device According to one embodiment, the light-emitting apparatus is provided with a substrate, a plurality of light-emitting devices, and a phosphor layer. The plurality of light-emitting devices are mounted on the substrate. The phosphor layer is formed of a translucent resin containing a phosphor and includes a phosphor portion that is formed in a convex shape and covers a predetermined number of the light-emitting device. Bases of the adjacent phosphor portions are formed by being linked with one another.
US08872197B2	Organic light emitting diode display and method of manufacturing the same An organic light emitting diode (OLED) display comprises a first substrate and a second substrate configured to comprise a pixel area and a non-pixel area other than the pixel area, a sealing member configured to adhere the first substrate and the second substrate together, reinforcing materials filled into the non-pixel area of the first substrate and the second substrate, and an accommodation unit configured to accommodate some of the reinforcing materials within at least one of the first substrate and the second substrate corresponding to the non-pixel area. A method of manufacturing the OLED display comprises: preparing a mother substrate, including a plurality of display panels and cutting lines between two adjacent display panels; cutting the mother substrate into separated display panel units; forming grooves on a side of each display panel unit; and filling reinforcing materials in a non-pixel area of the display panel units, some of the reinforcing materials flowing into the grooves.
US08872195B2	Light emitting device package A light emitting device package including a package body including a plurality of first ceramic layers, at least one electrode pattern placed on the package body, at least one light emitting device electrically connected to the electrode pattern, and a heat dissipation member disposed in the package body to thermally come into contact with the light emitting device, wherein the heat dissipation member is provided with an expanded portion at a region corresponding to a boundary of different first ceramic layers.
US08872188B2	Silicon carbide semiconductor device and method of manufacturing thereof A silicon carbide semiconductor device is provided that includes a semiconductor layer made of silicon carbide and having a surface tilted at an angle in a range of not less than 50° and not more than 65° relative to the {0001} plane, and an insulating film formed to contact the surface of the semiconductor layer. A maximum value of the nitrogen concentration in a region within 10 nm from the interface between the semiconductor layer and the insulating film is not less than 1×1021 cm−3, and the semiconductor device has a channel direction in a range of ±10° relative to the direction orthogonal to the <−2110> direction in the surface of the semiconductor layer. A method of manufacturing the silicon carbide semiconductor device is also provided.
US08872186B2	Display device and method for manufacturing same A method for manufacturing a display device provided with gate wiring lines (112) disposed on a substrate to supply signals to TFTs, and a plurality of source wiring lines (111) disposed above the gate wiring lines, the method for manufacturing a display device including: a step of forming a first conductive pattern (31) that includes the gate wiring lines (112) by etching a gate metal layer with a first resist pattern as a mask; and a step of forming a second resist pattern (12) at a portion located between the source wirings (111) so as to expose a portion of an edge of an upper surface of the first conductive pattern (31) and so as to cover other parts thereof, at the aforementioned portion of the edge of the upper surface, the first conductive pattern (31) is etched off from the upper surface through an intermediate point along the direction of thickness.
US08872184B2	Array structure and fabricating method thereof An array structure, which includes a TFT, a passivation layer, a pixel electrode, a first connecting layer and a first spacer is provided. The TFT includes a gate, a source and a drain. The passivation layer overlays the TFT. The pixel electrode is located on the passivation layer. The first connecting layer is located on the pixel electrode and electrically connected to the pixel electrode and the drain. The first spacer is located on the first connecting layer.
US08872179B2	Semiconductor device To improve switching characteristics of a transistor in which a channel is formed in an oxide semiconductor layer. A parasitic channel is formed at an end portion of the oxide semiconductor layer because a source and a drain of the transistor are electrically connected to the end portion. That is, when at least one of the source and the drain of the transistor is not electrically connected to the end portion, the parasitic channel is not formed at the end portion. In view of this, a transistor having a structure in which at least one of a source and a drain of the transistor is not or less likely to be electrically connected to an end portion of an oxide semiconductor layer is provided.
US08872177B2	Electric charge flow circuit for a time measurement A charge flow circuit for a time measurement, including a plurality of elementary capacitive elements electrically in series, each elementary capacitive element leaking through its dielectric space.
US08872176B2	Elastic encapsulated carbon nanotube based electrical contacts Contacts of an electrical device can be made of carbon nanotube columns. Contact tips can be disposed at ends of the columns. The contact tips can be made of an electrically conductive paste applied to the ends of the columns and cured (e.g., hardened). The paste can be applied, cured, and/or otherwise treated to make the contact tips in desired shapes. The carbon nanotube columns can be encapsulated in an elastic material that can impart the dominant mechanical characteristics, such as spring characteristics, to the contacts. The contacts can be electrically conductive and can be utilized to make pressure-based electrical connections with electrical terminals or other contact structures of another device.
US08872172B2	Embedded source/drains with epitaxial oxide underlayer Semiconductor structures having embedded source/drains with oxide underlayers and methods for forming the same. Embodiments include semiconductor structures having a channel in a substrate, and a source/drain region adjacent to the channel including an embedded oxide region and an embedded semiconductor region located above the embedded oxide region. Embodiments further include methods of forming a transistor structure including forming a gate on a substrate, etching a source/drain recess in the substrate, filling a bottom portion of the source/drain recess with an oxide layer, and filling a portion of the source/drain recess not filled by the oxide layer with a semiconductor layer.
US08872160B2	Increasing carrier injection velocity for integrated circuit devices Embodiments of the present disclosure describe structures and techniques to increase carrier injection velocity for integrated circuit devices. An integrated circuit device includes a semiconductor substrate, a first barrier film coupled with the semiconductor substrate, a quantum well channel coupled to the first barrier film, the quantum well channel comprising a first material having a first bandgap energy, and a source structure coupled to launch mobile charge carriers into the quantum well channel, the source structure comprising a second material having a second bandgap energy, wherein the second bandgap energy is greater than the first bandgap energy. Other embodiments may be described and/or claimed.
US08872157B2	Nitride semiconductor structure and semiconductor light emitting device including the same A nitride semiconductor structure and a semiconductor light emitting device including the same are revealed. The nitride semiconductor structure includes a light emitting layer disposed between a n-type semiconductor layer and a p-type semiconductor layer, and a hole supply layer disposed between the light emitting layer and the p-type semiconductor layer. The hole supply layer is made from material InxGa1-xN (0
US08872154B2	Field effect transistor fabrication from carbon nanotubes Methods and apparatus for an electronic device such as a field effect transistor. One embodiment includes fabrication of an FET utilizing single walled carbon nanotubes as the semiconducting material. In one embodiment, the FETs are vertical arrangements of SWCNTs, and in some embodiments prepared within porous anodic alumina (PAA). Various embodiments pertain to different methods for fabricating the drains, sources, and gates.
US08872151B2	Surface treatment to improve resistive-switching characteristics This disclosure provides a method of fabricating a semiconductor device layer and associated memory cell structures. By performing a surface treatment process (such as ion bombardment) of a semiconductor device layer to create defects having a deliberate depth profile, one may create multistable memory cells having more consistent electrical parameters. For example, in a resistive-switching memory cell, one may obtain a tighter distribution of set and reset voltages and lower forming voltage, leading to improved device yield and reliability. In at least one embodiment, the depth profile is selected to modulate the type of defects and their influence on electrical properties of a bombarded metal oxide layer and to enhance uniform defect distribution.
US08872150B2	Memory constructions Some embodiments include memory constructions having a plurality of bands between top and bottom electrically conductive materials. The bands include chalcogenide bands alternating with non-chalcogenide bands. In some embodiments, there may be least two of the chalcogenide bands and at least one of the non-chalcogenide bands. In some embodiments, the memory cells may be between a pair of electrodes; with one of the electrodes being configured as a lance, angled plate, container or beam. In some embodiments, the memory cells may be electrically coupled with select devices, such as, for example, diodes, field effect transistors or bipolar junction transistors.
US08872147B2	Method for manufacturing nonvolatile semiconductor storage device and nonvolatile semiconductor storage device A method for manufacturing a nonvolatile semiconductor storage device according to an embodiment includes laminating a first wire extending in a first direction, and a film made into a variable resistance element made of a metallic material, which are laminated in order on a semiconductor substrate, dividing, into a plurality of pieces, the film made into the variable resistance element, in the first direction and a second direction, forming an interlayer insulating film between the plurality of pieces formed by dividing the film made into the variable resistance element in the second direction, and oxidizing the metallic material of the film made into the variable resistance element, and laminating an upper electrode and a second wire extending in the second direction, which are laminated in order on the film made into the variable resistance element and the interlayer insulating film.
US08872145B2	Target supply device A target supply device according to an aspect of the present disclosure may include a target generator having a holding space and a first through-hole that communicates with the holding space, a porous filter having a thermal expansion coefficient that is substantially the same as a thermal expansion coefficient of the target generator, and a holder portion having a thermal expansion coefficient that is substantially the same as the thermal expansion coefficient of the target generator, that is configured to hold the porous filter and that is provided so as to form a seal against an inner surface of the target generator.
US08872144B1	System and method for laser beam focus control for extreme ultraviolet laser produced plasma source Focus of a laser beam on a target in a Laser Produced Plasma (LPP) Extreme Ultraviolet (EUV) light source is maintained by focusing reflected light from the target illuminated by a laser source, sampling the focused reflected light in a plurality of planes at different optical path lengths, and comparing the image sizes of the focused reflected light at the plurality of planes to determine a correction signal to correct the focus of the laser source. In an embodiment, the focused reflected light is split into a two optical paths of differing optical path lengths, with each optical path directed to a sensing device at an imaging plane. Since each of the optical paths is of a different length, the images of the target taken by the sensing device at the imaging plane will be of different sizes. By comparing the relative sizes of the target images from the optical paths, a correction signal is produced to correct the focus of the laser source.
US08872138B2	Gas delivery for uniform film properties at UV curing chamber A UV curing system includes an enclosure defining an interior, a UV radiation source disposed within the interior of the enclosure, and a first window disposed within the interior of the enclosure. The first window creates a barrier that separates the UV radiation source and a processing chamber. A second window is disposed within the interior of the enclosure at a distance from the first window to define a gas channel. The second window defines a plurality of openings such that the gas channel is in fluid communication with the processing chamber. A gas inlet conduit is in fluid communication with the gas channel and is configured to introduce a cooling gas into the gas channel. A gas outlet is in fluid communication with the processing chamber and is configured to remove gas from the processing chamber.
US08872137B2	Dual elliptical reflector with a co-located foci for curing optical fibers A device for UV curing a coating or printed ink on an workpiece such as an optical fiber comprises dual elliptical reflectors arranged to have a co-located focus. The workpiece is centered at the co-located focus such that the dual elliptical reflectors are disposed on opposing sides of the workpiece. Two separate light sources are positioned at a second focus of each elliptical reflector, wherein light irradiated from the light sources is substantially concentrated onto the surface of the workpiece at the co-located focus.
US08872136B1	Plant eradication using non-mutating low energy rapid unnatural dual component illumination protocol (RUDCIP) in four parameters Non soil-invasive four-parameter rapid unnatural dual component selective illumination protocol (UDCIP) for plant eradication using a process time under one minute. Application of a relatively low level of non-mutating UV-A optical energy to root crowns and/or soil grades allows below-ground UV-A penetration into soil to illuminate root crowns, and when preceded by or coincident with an above ground near-IR defoliation and root crown illumination step, results in an unexpected rise in lethality. Very high lethality, including 100 percent, is obtained using low deposited energy. UV-A optical energy can be delivered to root crowns and adjacent soil via a UV-transmissive knive blade.

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