| Document | Document Title |
|---|---|
| US08422603B2 |
Signal receiving apparatus, signal receiving method and signal receiving program
A signal receiving apparatus for receiving signals is provided. The signal receiving apparatus includes a correlation-value computation section configured to sequentially compute a correlation value representing a correlation between the received signal and a series of known symbols while sliding the series of known symbols for every symbol included in the received signal, a maximum-value detection section configured to detect a largest correlation value among the correlation values computed by the correlation-value computation section for one frame of the received signal, and a correlation-value storage section configured to store each of the correlation values at one of a predetermined number of storage locations, before and after the largest correlation value is detected by the maximum-value detection section. |
| US08422602B2 |
Pattern detection circuit, base station and mobile communication system using the same, and pattern detecting method
A pattern detection circuit for performing pattern detection on input signals from a communication terminal, includes a frequency domain transformer that transforms input signals into frequency domain signals; a frequency extractor that extracts frequency components of the frequency domain signals; and a pattern detector that performs the pattern detection on the input signals based on cross-correlation values in frequency domain between the extracted frequency components and predetermined patterns. |
| US08422601B2 |
Spread spectrum signal processing
The present invention relates to processing of spread spectrum signals, where a continuous signal of a comparatively high frequency is received. This signal is sampled at a basic sampling rate whereby a resulting sequence of time discrete signal samples is produced, which are in turn quantized into a corresponding level-discrete sample value. A plurality of data words are formed, which each includes one or more consecutive sample values. Information obtained from these data words is correlated with at least one representation of a signal source specific code sequence, which has been pre-generated in the form of a code vector. The correlation step specifically involves correlating at least each vector in a sub-group of the code vectors with at least one vector that has been derived from the data word. Thereby resulting data is produced. |
| US08422599B2 |
Device and method of estimating symbol using second order differential phase vector
Provided is a method of estimating a symbol. The method may include deriving phase components of input data, applying a second order differentiation to the phase components to obtain a second order differential phase vector, and estimating symbols corresponding to the input data using the second order differential phase vector. |
| US08422592B2 |
Receiving apparatus and receiving method
A duplicating section duplicates a bit sequence to be input, and a 16QAM section modulates a bit sequence of a duplicating source to form a symbol, a 16QAM section modulates the duplicated bit sequence to form a symbol, an S/P section parallel converts the symbol sequence input in series, an S/P section parallel converts the symbol sequence input in series, and an IFFT section 15 provides IFFT processing to the input symbol sequence. Since each of multiple same bits duplicated by the duplicating section is included in a different symbol, each of the multiple same bits is allocated to each of multiple subcarriers each having a different frequency by IFFT processing. As a result, a multicarrier signal including the multiple same bits each having a different frequency is generated. |
| US08422589B2 |
Method and apparatus for transmitting data in a digital communication system, and computer-readable storage medium relating thereto
The present invention is directed to a transmitter and method for transmitting data in a digital communication system, the method comprising generating an original symbol by mapping the bits of the original bit sequence using a modulation constellation, generating at least one counter part symbol from the original symbol or from at least one counter part bit sequence generated from the original bit sequence where a combination of the original symbol and the at least one counter part symbol forms a quasi pilot symbol. |
| US08422582B2 |
Method for sending and receiving a signal in a multiple-antenna system implementing spatial pre-encoding, corresponding sender, receiver and computer program products
A method and apparatus are provided for emitting and receiving a signal in a multi-antennae system, using spatial precoding. A method for emitting a signal from an emitter towards a receiver via a transmission channel, in the form of a set of data flows, includes distributing the emission antennae into a plurality of groups containing at least one antenna, at least one group containing two antennae, according to at least one piece of information representing the transmission channel. The method also includes: attributing an efficiency to each emission antenna; allocating an emission power to each data flow; and spatial precoding the signal, using a matrix for diagonal precoding by blocks, containing at least two blocks, each block being associated with one of the groups of antennae. |
| US08422581B2 |
Multi-antenna transmission device, multi-antenna reception device, multi-antenna transmission method, multi-antenna reception method, terminal device, and base station device
Provided is a multi-antenna transmission device (400) which can perform MLD by using a simple configuration of a reception device in a MIMO-AMC system. The multi-antenna transmission device (400) includes common signal point mapping units (401, 402) for mapping data transmitted from different antennas (111, 112) in transmission scheme using MIMO spatial multiplexing, to common signal points shared by respective modulation methods. Thus, the arrangement of baseband signal points obtained by mapping a code word after channel encoding onto an IQ plane can be shared as common signal points shared by modulation methods. Accordingly, the reception device need not prepare a particular circuit for performing MLD calculation in accordance with a combination of the methods for modulating the signals which have been MIMO-space multiplexed. This can reduce the circuit size of the MLD calculation circuit. |
| US08422579B1 |
Quadrature amplitude modulation via modified-square signal point constellation
A square array of signal points forming a 22n-QAM signal constellation, where n=3, 4, is modified by relocating the inner most 22n/16 and outer 22n/16 constellation points to specific positions, resulting a modified-square constellation with a reduced peak to average power ratio (PAPR) at the modulator output relative to that of the square constellation while resulting in a receiver sensitivity that is degraded by less than the decrease in the modulator's PAPR and hence less than the possible improvement at the transmitter in average transmitted power. |
| US08422578B2 |
Radio transmission apparatus, radio communication base station apparatus, radio communication mobile station apparatus, and transmission signal generating method
A base station allowing mobile stations to efficiently remove interference signals. In this base station, an encoding part performs an error correction encoding of transport data to generate a bit sequence comprising systematic bits and parity bits; a repetition part repeats, as a repetition subject, only the parity bits out of the plurality of bits included in the bit sequence, which is generated by the encoding part, so as to perform a rate matching; a modulating part modulates, after the repetition, the bit sequence to generate symbols; an S/P part parallel converts the symbols serially inputted from the modulating part (103) and then outputs them to an IFFT part; and the IFFT part performs an IFFT processing of the symbols inputted from the S/P part and then maps them onto subcarriers in accordance with a predetermined mapping pattern, thereby generating OFDM symbols. |
| US08422575B2 |
Broadcasting system and multi-carrier communication system
The invention provides a broadcasting system. In one embodiment, the broadcasting system comprises a transceiver and a processor. The transceiver carries out signal transmission via at least one fully configured carrier and at least one partially configured carrier. The processor controls the transceiver to broadcast a first preamble set via the at least one fully configured carrier, and controls the transceiver to broadcast a secondary preamble set via the at least one partially configured carrier, wherein the first preamble set comprises a primary preamble and at least one secondary preamble, and the second preamble set comprises no primary preamble and at least one secondary preamble. |
| US08422571B2 |
Procedure for simultaneous transmission in time and frequency of multiple communications of data by means of OFDM modulations
A method for simultaneous transmission in time and frequency of multiple communications of data using orthogonal frequency division multiplexing (OFDM) modulation includes transmitting the multiple communications of data at a same time on a single channel. A first starting signal, transmitted using a first network device, and a second starting signal, transmitted using a second network device, are used in transmission of a frame. Properties of the first starting signal and the second starting signal for transmission of each of the multiple communications are modified by shifting a frequency of the first starting signal with respect to a frequency of the second starting signal so that remaining communications coincident in time and frequency with respect to a given communication are ignored. The frequency of the first starting signal is shifted an amount equal to a fraction of a separation between carriers of the OFDM modulation. |
| US08422569B2 |
Encoding device, decoding device, and method thereof
Provided is an encoding device which divides an input signal into a low-range component and a high-range component and encodes the components in separate encoding units. The encoding device can improve quality of a decoded signal. The encoding device (101) includes: a band division process unit (201) which subjects an input signal to a band division process so as to obtain a lower intermediate-range component lower than a first frequency and a high-range component higher than the first frequency; a low-range encoding unit (202) which suppresses a portion of the lower intermediate-range component higher than a second frequency so as to obtain a low-range component and encodes the low-range component so as to obtain low-range encoded information; an intermediate-range correction unit (203) corrects the intermediate-range component higher than the second frequency among the suppressed lower intermediate-range component so as to obtain a corrected intermediate-range component; an intermediate high-range encoding unit (204) which encodes the corrected intermediate-range component and the high-range component so as to obtain intermediate high-range encoded information; and a multiplexing unit (205) which multiplexes the low-range encoded information and the intermediate high-range encoded information so as to obtain encoded information. |
| US08422563B2 |
System for generating closed captioning compatible with legacy and newer set-top boxes
A caption formatting method and computing system that receives an input video stream that includes a sequence of input transport stream packets. The method locates user data in the sequence of input transport stream packets, where the user data includes input caption data compliant with an input caption data format. The method extracts EIA-608 captions and EIA-708 captions from the input caption data, and formats the EIA-608 captions as caption data compliant with SCTE-20 format. The method creates a sequence of output transport stream packets based on the sequence of input transport stream packets, where the sequence of output transport stream packets include the caption data compliant with SCTE-20 format and the input caption data. The method sends an output video stream from the computing device, where the output video stream includes the sequence of output transport stream packets. |
| US08422562B2 |
Decoding circuit, decoding method, and image reproducing apparatus
To perform, with a single circuit, decoding in association with various image encoding systems and improve universality, a coefficient selection processing section selects a DC coefficient and an AC coefficient of an adjacent block adjacent to a decoding target block, a coefficient arithmetic processing section applies arithmetic processing to the selected DC coefficient and AC coefficient, a coefficient comparison processing section calculates, based on the DC coefficient subjected to the arithmetic processing, inter-block correlations in horizontal and vertical directions, and a direction determination processing section determines a predicting method using the inter-block correlations. Further, a prediction processing section adds, using the determined predicting method, the DC coefficient and the AC coefficient subjected to the arithmetic processing to encoded data, and a controlling section controls, according to the encoded data, a selecting method, an arithmetic processing method, a determining method, and/or a prediction processing method. |
| US08422561B2 |
Method and system for low-subband content discrimination
A method and system are provided for discriminating areas of content from areas of noise in difference images of a digital video sequence. This allows the fewest bits possible to be used to encode areas of noise according to a video compression algorithm. The method comprises computing a difference frame from current image data and a reference frame; comparing at least one component of a candidate block within the difference frame to a threshold value to discriminate between content and noise; and encoding the candidate block if content is detected. |
| US08422557B2 |
Method of motion estimation for video compression
A motion estimation method for video compression comprises the following steps. First, an initial simplex comprising three points is determined based on motion vectors in blocks of a current frame and a previous frame, and a point having a largest function value among the three points is replaced with a point having a smaller function value to form a simplex. The replacement is repeated until two points of the three points of the simplex converge to a same point. The iteration is performed by downhill simplex search including operations of reflection, expansion, contraction and shrinkage to find a point for replacement. The motion estimation method for video compression can also use multi-reference frames. An initial simplex comprising four points is determined based on motion vectors of a current frame with reference to a plurality of previous frames, and a point having a largest function value among the four points is repeatedly replaced with a point having a smaller function value to form a simplex until two points of the four points of the simplex converge to a same point. |
| US08422556B2 |
Method of deriving a motion vector of a bi-predictive block based on a motion vector of a co-located block in a reference picture
In one embodiment, the method includes selecting a list 1 motion vector of the co-located block in a first reference picture if the co-located block only has the list 1 motion vector. The first reference picture is a type of reference picture permitted to be located temporally before or after a current picture. The current picture includes the bi-predictive block. The method further includes deriving at least one motion vector of the bi-predictive block by applying a bit operation to the selected motion vector. The bit operation includes 8 bits right shift. |
| US08422551B2 |
Method and apparatus for managing a reference picture
A method for managing a reference picture with a decoder is disclosed. The method for managing a reference picture includes storing a decoded picture including quality base picture and quality enhanced picture in a buffer, marking the quality base picture and the quality enhanced picture as a reference picture, marking the quality base picture as distinct information, managing the quality base picture and the quality enhanced picture using an adaptive memory management method or a sliding window method. |
| US08422548B2 |
Methods and systems for transform selection and management
Embodiments of the present invention comprise systems and methods for managing and combining layers in a multi-layer bitstream. |
| US08422546B2 |
Adaptive video encoding using a perceptual model
A video encoder includes a region detector module that classifies blocks of video frames. An adaptive filter module applies a median filter to a block based upon a block classification assigned by the region detector module. An adaptive quantization module quantizes a block according to a quantization method adaptively determined based upon a block classification assigned by the region detection module. In one example, a video encoder adaptively determines a median filter selected using a block classification. In another example, a video encoder adaptively determines whether to drop an isolated last transform coefficient based on the block classification, and/or applies a dead-zone selected using the block classification. |
| US08422536B2 |
Spread spectrum clock signal generator method and system
A system and method for generating a spread spectrum clock signal with a constant ppm offset as a function of a repetition number. A phase interpolator can be configured in association with of a phase-locked loop circuit in order to provide a phase movement from a bit clock generated by the PLL circuit. A repetition number divider computes the repetition number for each time slot in a piece-wise SSC modulation profile. A noise shaping modulator can be employed for modulating a fractional part associated with the repetition number. A repetition counter and a phase accumulator receives an integer part of the repetition number and counts unit interval clock periods equal to a sum of integer and the sigma-delta modulated fractional parts of the repetition number. The phase accumulator can be incremented and/or decremented based on the sign of the spread spectrum direction. |
| US08422535B2 |
Frequency selective digital transmission apparatus
A frequency selective digital transmission apparatus includes: a preamble transmission processing unit generating a preamble for frame synchronization and spreading the generated preamble with a predetermined spreading code; a header transmission processing unit configuring a header including data attribute information and spreading the header with a predetermined spreading code; a data transmission processing unit performing serial-to-parallel conversion on transmission data according to a selected transmission mode and a spreading scheme and spreading the same with a frequency selective spreading code; and a multiplexing unit multiplexing the preamble, the header, and the data which have been spread by the preamble transmission processing unit, the header transmission processing unit and the data transmission processing unit, respectively, and transmitting the same as digital signals. |
| US08422533B2 |
Radio communication apparatus and radio communication method
Provided is a radio communication device which can make Acknowledgement (ACK) reception quality and Negative Acknowledgement (NACK) reception quality to be equal to each other. The device includes: a scrambling unit (214) which multiplies a response signal after modulated, by a scrambling code “1” or “e−j(π/2)” so as to rotate a constellation for each of response signals on a cyclic shift axis; a spread unit (215) which performs a primary spread of the response signal by using a Zero Auto Correlation (ZAC) sequence set by a control unit (209); and a spread unit (218) which performs a secondary spread of the response signal after subjected to the primary spread, by using a block-wise spread code sequence set by the control unit (209). |
| US08422531B2 |
Surface emitting semiconductor laser
A surface emitting semiconductor laser includes a substrate, an n-type lower DBR, an n-type cavity extending region formed on the lower DBR, an active region formed on the cavity extending region, and an upper DBR formed on the active region. A difference in refractive index between a relatively high refractive index layer and a relatively low refractive in the upper DBR is smaller than that in the lower DBR. |
| US08422529B2 |
Tunable laser light source based on variable optical pulse excitation and method for operating same
A tunable laser light source having emission wavelengths in a visible or an adjoining spectral region includes a rotationally disposed laser substrate having more than one emission wavelength, a drive unit coupled to the laser substrate, a pulsed light source having a pulse transmitter, a trigger device, and a signal-delay unit. The trigger device, the signal-delay unit and the pulse transmitter are sequentially connected downstream of the drive unit. |
| US08422526B2 |
Semiconductor laser device and method for manufacturing the same
A semiconductor laser device includes a semiconductor multilayer structure selectively grown on a substrate other than on a predetermined region of the substrate. The semiconductor multilayer structure includes an active layer, and has a stripe-shaped optical waveguide extending in a direction intersecting a front facet through which light is emitted. The active layer has an abnormal growth portion formed at a peripheral edge of the predetermined region, and a larger forbidden band width portion formed around the abnormal growth portion and having a larger width of a forbidden band than that of a portion other than the abnormal growth portion of the active layer. The optical waveguide is spaced apart from the abnormal growth portion and includes the larger forbidden band width portion at the front facet. |
| US08422524B2 |
Rotary disk laser and amplifier configurations
There is provided a rotary disk laser module including disk comprised of at least one lasing material. The lasing material may be excited by a laser excitation source, such as an optical pump beam directed onto the disk. The laser gain region contains excited lasing material and extends between the first and second surfaces of the disk. A laser generator is formed when the gain region is brought into optical communication with a laser generator. A laser generator may be a laser oscillator or a laser amplifier. The disk may move in order to enable various lasing functionality to the laser module. For instance, the disk may rotate, translate, or tilt to rotate the gain region, provide various quantum effects, or to enable heat transfer with a heat sink. A high-power laser generator may be formed by using a number of disks containing lasing material, exciting the lasing material using at least one laser excitation source, and bringing them into optical communication with a laser generator. |
| US08422521B2 |
Laser device of equal-energy pulse synchronous with motion
A laser device of an equal-energy pulse synchronous with motion includes: a resonant cavity, outputting a plurality of pulses with stable pulse-width and energy; a beam switch modulator, selectively enabling one of the pulses to pass; a beam energy modulator, adjusting the energy of the pulse according to a power feedback signal; an optical power sensor, sensing the energy and the pulse-width of the pulse; a motion controller, providing processing motion information; an optical feedback controller, outputting the power feedback signal to the beam energy modulator according to the energy of the pulse and the processing motion information; a trigger controller, measuring a time difference between time when the pulse is triggered and time when the optical power sensor detects the pulse, and correcting a turn-on time point of the beam switch modulator. The processing quality is therefore stabilized, and the device is applicable to various laser industrial processes. |
| US08422518B2 |
Managing transmit jitter for multi-format digital audio transmission
A method of transmitting audio data across a digital interface is provided. The method includes receiving audio data, organized as a plurality of audio samples. At least one of the plurality of audio samples may be placed into a data packet. The data packet may be transmitted during a valid transmission interval if the data packet is full or during a valid transmission interval in response to receiving a packet send event. |
| US08422516B2 |
Scalable DigRF architecture
An embodiment of the invention provides a communication device (500, 800) which comprises a communication entity (502, 802) and a further communication entity (504, 804) communicatively coupled to the communication entity (502, 802) in accordance with a Digital Radio Frequency protocol. The communication entity (502, 802) comprises a protocol layer (516), the further communication entity (504, 804) comprises a protocol layer (514), and the protocol layers (516, 514) of the communication entity (502, 802) and of the further communication entity (504, 804) are connected via a protocol-physical interface (512, 513) which provides for a parallel bidirectional signal interfacing. The protocol-physical interface (512, 513) is adapted for selectively connecting the protocol layers (516, 514) directly or via physical layers (503, 508). |
| US08422515B2 |
Method, system, and device for transmitting data in optical transport network
A method, a system, and a device for transmitting data in an OTN are disclosed herein. The method for transmitting data in an OTN includes: mapping the at least one pair of ODU0's to an ODTU to form an ODTUvkt, wherein k is greater than or equal to 1, t is 2 or 3, and an external structure of the ODTUvkt is the same as an external structure of an ODTUkt; and mapping the ODTUvkt to timeslot i and timeslot i+n of a 1.25 G ODUt, indicating the type of at least one pair of ODU0's carried in timeslot i to be ODUk, and transmitting the ODUk to a destination node. |
| US08422513B2 |
Providing station context and mobility in a wireless local area network having a split MAC architecture
A method includes receiving a first frame at a wireless access node, the first frame being received through a first communication network and having a source address; applying a function (e.g., a hash function) to the source address to derive a destination address; encapsulating the first frame in a second frame that includes the destination address and a source address identifying the wireless access node; and sending the second frame to a second communication network for receipt by a destination node having the destination address. The destination node is an access controller that maintains state for a station that sends the first frame. The first communication network may be an IEEE 802.11 network, and the second communication network may be an IEEE 802.3 network. The address of the access controller is one of potentially many virtual MAC addresses associated with the access controller that enables an N:M relationship between a particular access node and a plurality of access controllers that may be clustered, and a N:1 relationship between a Station and a virtual access controller. |
| US08422510B2 |
Method for signaling back-off information in random access
A method for performing random access in a wireless communication system is provided. The method includes transmitting a preamble for random access in uplink, receiving a random access response message including back-off information as a response to the preamble, and performing back-off using the back-off information when the random access has failed. |
| US08422503B2 |
Address translator using address translation information in header area on network layer level and a method therefor
An address translator carries out address translation between a private address and a global address on a source address or a destination address included in the header of a received packet. The translator includes an address translation processor for applying address translation information to the header area of the received packet on a network layer level and carrying out address translation on the network layer level by means of the address translation information. Thus, the translator can establish high transparency, high possibility to establish interconnection, impartial assurance for users, high throughput and high availability, and thus provide open measures minimizing interrupt actions of any communication as well as possible. |
| US08422502B1 |
System and method for identifying VPN traffic paths and linking VPN traffic and paths to VPN customers of a provider
A system and method collects information for VPN traffic from non edge routers that are coupled to edge routers and identifies the path the traffic took and the customer corresponding to the VPN. The system and method also identifies the ingress router coupled to the non edge router from which the traffic was collected. The system and method may assign identifiers to route targets. |
| US08422501B2 |
Efficient path maximum transmission unit information discovery and storage
A method, computer program product, and data processing system for efficiently discovering and storing path MTU information in a sending host are disclosed. In a preferred embodiment, two path MTU tables are maintained. One path MTU table contains MTU values corresponding to the first-hop routers associated with the sending host. The other path MTU table contains MTU values corresponding to individual destination hosts. When the sending host needs to send information to a destination, it first consults the MTU table associated with individual destination hosts. If an entry for that destination host is found in the table, the sending host uses that MTU value. If not, the sending host consults the MTU table for the first-hop router on the path to the destination host and uses that MTU value. If that MTU value is too high, a new entry is made in the host-specific MTU table for the destination host. |
| US08422499B2 |
Methods and apparatus for managing multicast traffic
A device, system and method for controlling the flow of multicast data packets from sources sending data to hosts requesting the data. In one implementation, a router is situated in a data network between sources that send multicast data packets directed to a multicast group and hosts requesting to receive the multicast data packets. The router has one or more network interfaces in the direction of the hosts and stores for each network interface, each multicast group address and each host at least one data record arising from one or more data requests made by the hosts which includes multicast group and source information. The router stores executable instructions to receive messages originating from a host, update the status of the data sources for that host and implement the actions according to one or a combination of Tables 3, 4, 5, 6 and 7 disclosed herein. |
| US08422498B2 |
Information communication apparatus, information transmitting apparatus, and information communication method
An information communication apparatus (100A) that receives transmission information transmitted from a broadcast station, generates and relays response information to an information communication apparatus (100C) having access to a communication network (120) includes: a broadcast-wave I/F that receives the transmission information; a wireless I/F that transmits the response information to the information communication apparatus (100C) capable of wireless communication to relay the response information to an area having access to the communication network (120); a communication network I/F that is connected to the communication network (120) and transmits the response information; a response-transmission-information generating unit that generates the response information; and a connection control unit that determines whether the communication network (120) is accessible, transmits the response information to the communication network (120) when accessible, and relays the response information to the connectable information communication apparatus (100B) when inaccessible. |
| US08422496B2 |
Broadcast-content transmitting apparatus, broadcast-content receiving apparatus, broadcast-content transmitting method, broadcast-content receiving method, and program
The content receiving unit (201) receives IP packets (Ethernet frames) that include broadcast content. The assigning unit (202) assigns, based on a given method, received Ethernet frames to the A-layer and the B-layer that are different digital broadcast layers. The Ethernet frames assigned to the A-layer are encapsulated by the A-layer processing unit (203), and transmitted to a terrestrial digital broadcast network together with encapsulation format information. Meanwhile, the Ethernet frames assigned to the B-layer are encapsulated by the B-layer processing unit (204), and transmitted to the terrestrial digital broadcast network together with encapsulation format information. |
| US08422495B2 |
Triggering bandwidth reservation and priority remarking
In one embodiment, a reservation proxy monitors for received connectivity check messages or beginning-of-media-flow indication messages. When either type of message is observed, the reservation proxy requests resource allocation for a media flow associated with the received message. The amount of resource allocation requested may be coordinated by exchanging messages with a call controller or policy server for one of the endpoints of the media flow, or the amount of resource allocation may be identified within the received message. |
| US08422493B2 |
Network relay device and network relay method
A network relay device for relaying communication for a regular terminal via a port includes an acquiring module, a regular terminal information storing module, and a determination process module. The acquiring module acquires a regular layer 2 address, a regular layer 3 address, regular VLAN information representing a VLAN assigned to the regular terminal, and regular port information representing a port to which the regular terminal is connected. The regular terminal information storing module stores regular terminal information representing a combination of the acquired regular layer 2 address, the regular layer 3 address, the regular VLAN information, and the regular port information. The determination process module determines whether the combination of source layer 2 address, source layer 3 address, assigned VLAN, and reception port of target frame data received via the port is stored as the regular terminal information. |
| US08422492B2 |
Method for generating and identifying identifier and communication system
A method for generating and identifying an identifier and a communication system are provided. In the method, a subclass of a port in a packet is retrieved. In addition, the subclass of the port serves as a part of the identifier. A first device transmits the packet to a second device according to the identifier. |
| US08422490B2 |
System and method for identifying music content in a P2P real time recommendation network
A peer-to-peer (P2P) network for providing real time media recommendations is provided. The media recommendations may be song recommendations or video recommendations. Each time a media presentation is played by a peer device, the peer device provides a recommendation identifying the media presentation to other peer devices in the P2P network. A peer device having received recommendations from the other peer devices in the P2P network then programmatically, or automatically, selects a next media presentation to play from the media presentations recently played by the other peer devices and one or more locally stored media presentations. If the selected media presentation is not stored locally by the peer device, the peer device may obtain the selected media presentation from a subscription based service enabling streaming or download of the selected media presentation, an e-commerce service enabling purchase and download of the selected media presentation, or another peer device. |
| US08422489B2 |
Packetization time setting system for voice signals and setting method thereof
In a method for setting a packetization time of client device, simple network management protocol (SNMP) trap signals are transmitted from the client device to an element management system (EMS) to inquire a client capacity usage of each available worldwide interoperability for microwave access (WIMAX) channel. The client capacity usage is send from the base station that communicates with the EMS. A voice signal packetization time of the client device is set by comparing the client capacity usage with a predetermined threshold. |
| US08422487B2 |
Presence registration and routing node
A presence registration and routing node receives a message indicative of a telephony-related action performed by a user. In response to the message, the presence registration and routing node sends a message to a presence server for updating presence information regarding the user in a presence server database. |
| US08422485B2 |
Method and system for providing multimedia portal contents in communication system
A system and method for providing multimedia portal contents in a communication system. The method provides a ring-back tone to a calling terminal, the calling terminal sets first multimedia portal contents to be provided as the ring-back tone in consideration of given information of a calling terminal user. A called terminal sets second multimedia portal contents to provide as the ring-back tone in consideration of the given information of the calling terminal user, and the calling and called terminals transmit call connection setup related signals including set information. A first server receives the call connection setup-related signals and provides specific multimedia portal contents as the ring-back tone when the calling and called terminals set the multimedia portal contents, and provides the determined multimedia portal contents to the calling terminal. |
| US08422482B2 |
Space-diversity wireless image communication system
A wireless communication system has transmission apparatus transmitting a wireless signal based on a transmission unit and reception apparatus. The reception apparatus includes plural reception devices receiving the wireless signal to obtain the informational signals and output-controlling device selecting any informational signal from the informational signals. The reception device has communication-quality-detecting device that detects communication quality of the wireless signal, a memory storing the informational signal, and synchronization-detection-storage-controlling device that detects the synchronization signal and controls the memory to store the informational signal based on a detected result of the synchronization signal. The output-controlling device reads the informational signals out of the memories with the signals being synchronized after the reception devices have detected the synchronization signals, selects the reception device having satisfactory communication quality based on a detected result of the communication quality, and outputs the informational signal read out of the selected reception device. |
| US08422468B2 |
Common-mode partitioning of wideband channels
Certain aspects of the present disclosure relate to a method for allocating a plurality of logical channels within each wideband channel specified by the IEEE 802.15.3c standard. Each logical channel can utilize the same wideband channel, but the logical channel can also utilize a narrowband channel (i.e., a low data rate (LDR) channel) for control and signaling. The logical channel may function as a common mode channel for multi-mode operations. A piconet controller (PNC) within a piconet can utilize the LDR for beaconing, association, and for assigning Channel Time Allocations (CTAs). Inside a CTA period, multiple devices in the piconet can communicate using a single-carrier mode, an OFDM mode, or some other mode. |
| US08422466B2 |
Multiple network connections
The invention provides a method, an apparatus, and a computer program for supporting multiple connections to a network or a plurality of networks. Support for multiple connections is enabled by establishing a connection of a first type to a network, receiving a request for a connection of the first type, registering a virtual connection as a response to receiving said request, receiving a request for establishing a connection of a second type through the virtual connection, associating the virtual connection with the connection of the first type, and establishing the connection of the second type through the connection of the first type. |
| US08422463B2 |
System and method for dynamic data management in a wireless network
A node is configured for transmitting a data packet over a wireless network. The node includes a controller configured to provide individualized control of a payload in the data packet. The controller is further configured to receive data to be transmitted over the wireless network, to determine a signal quality indicator for the wireless network, and to adjust the amount of the data included in the payload based on the signal quality indicator. |
| US08422462B2 |
Mobile communication device and mobile communication method using a plurality of different types of radio communication interfaces
Disclosed are a mobile communication device and mobile communication method which make it possible to reduce the amount of the data transfer during heterogeneous network handover processing in the hard handover processing in a mobile network. The mobile communication device which is equipped with a plurality of kinds of radio communication interfaces, receives a request to perform the handover between heterogeneous networks, which requests switching from a radio communication interface in use to another radio communication interface from the mobile communication network, and performs the handover between the heterogeneous networks comprises a measurement processing section (106) for measuring the connection quality of the plurality of kinds of radio communication interfaces, a handover execution predicting section (107); for predicting whether or not the handover between the heterogeneous networks is performed on the basis of the connection quality, and a TCP window control unit (113) for setting a window size to a smaller window size than the window size in use if the handover execution predicting section (107) predicts that the handover between the heterogeneous networks is performed. |
| US08422455B1 |
Enhanced control channel in multicarrier wireless networks
A base station transmits downlink control information on a first carrier starting from the first symbol of a first subframe and provides first transmission format and scheduling information for first data packets to be transmitted on a first data channel of the first carrier. The base station transmits control message(s) configuring radio resources of a second control channel of a second carrier. The radio resources comprise one or more sets of resource blocks in a subset of subframes. The control message indicates a starting OFDM symbol in a subframe and a frequency allocation for said second control channel. |
| US08422453B2 |
Communication systems
A spectrum-assignment method for use in a wireless communication system, the system comprising at least first and second communication apparatuses each having a portion of communication spectrum pre-assigned to it for communication, the method comprising: on a dynamic basis, controlling re-assignments of said spectrum between the first and second communication apparatuses in dependence upon spectrum requirements of those apparatuses and at least one indicator indicative of interference expected to result from such re-assignments, so as to tend to improve spectrum utilization between the first and second communication apparatuses. |
| US08422450B2 |
Relaxed deterministic back-off method for medium access control
A method and apparatus are described including transmitting data if a slot count is equal to a triggering event, selecting a new triggering event responsive to a failed data transmission and replacing the triggering event with the new triggering event. |
| US08422447B2 |
Cellular network
Systems (200) and methods for providing voice communications over a cellular network (204, 212). A call setup message is communicated from a first communication device (FCD) to a second communication device (SCD) on a first communications channel (FCC) in a cellular network (CN) at a first data transfer rate (FDTR). In response to the call setup message, a stimulator packet is communicated to the CN on FCC at FDTR. The stimulator packet includes data of an amount that equals or exceeds a threshold value. In response to the stimulator packet, FCD (202, 214) and CN transition from a first channel mode to a second different channel mode. In the second channel mode, data is transmitted on a second communications channel (SCC) in CN at a second data transfer rate (SDTR) different than FDTR. |
| US08422446B2 |
Controlling power for contention based uplink transmissions
A wireless communication device configured for controlling power for contention based uplink transmissions is described. The wireless communication device includes a processor and instructions stored in memory. The wireless communication device receives one or more power control parameters and performs contention based power control for uplink transmissions. The contention based power control is different from dynamic scheduled grant power control. The wireless communication device sends a contention based uplink transmission. |
| US08422442B2 |
Radio communication apparatus
There is provided a radio communication apparatus that performs communication in a plurality of different radio communication systems independently of one another and is capable of normally performing data communication with interference in the data communication avoided. The radio communication apparatus includes modems respectively corresponding to DECT communication and GSM communication respectively utilizing close frequency bands for transmitting/receiving data, and is configured so that communication time slots not used for time division multiplex domestic radio communication or for time division multiplex subscriber channel radio communication may be adjusted between the modems by a modern controller 208 for avoiding simultaneous communication timing. |
| US08422437B2 |
Resource assignment method for communication system adapted for change of channel
A resource assignment method for a communication system provides a method to realize an estimate of channel with high accuracy for terminals which change channels rapidly. A resource assignment unit (102), supplied with channel information ISCI1 to NSCIN, determines assignment of resources to a first to a Nth terminals and outputs a resource assignment information SRA. A multiplex signal generating unit (103), supplied with the resource assignment information SRA, outputs a transmission signal STX. A resource selector (104), supplied with the channel information 1SCI1 to NSCIN and the relative position information SRP, determines the assignment of resources to the first to Nth terminals and outputs the resource assignment information SRA. A resource position generating unit (105), supplied with the resource assignment information SRA, calculates a relative position of an empty resource with respect to a multiplex position of a pilot signal and outputs the relative position information SRP. |
| US08422436B2 |
Method and apparatus for forwarding data in forwarding networks
A method for forwarding data in forwarding networks includes: acquiring a signal transmitted from a source node to a target node in the forwarding network; selecting an antenna which is closest to the target node or a subordinate forwarding node, according to a corresponding relationship between antennas and nodes in coverage areas of the antennas; sending the signal to the antenna selected through wire transmission media; and transmitting the signal by the antenna selected. An apparatus for forwarding data and a forwarding network are disclosed as well. |
| US08422434B2 |
Peak-to-average power ratio management for multi-carrier modulation in wireless communication systems
Techniques for managing peak-to-average power ratio (PAPR) for multi-carrier modulation in wireless communication systems. Different terminals in a multiple-access system may have different required transmit powers. The number of carriers to allocate to each terminal is made dependent on its required transmit power. Terminals with higher required transmit powers may be allocated fewer carriers (associated with smaller PAPR) to allow the power amplifier to operate at higher power levels. Terminals with lower required transmit powers may be allocated more carriers (associated with higher PAPR) since the power amplifier is operated at lower power levels. The specific carriers to assign to the terminals may also be determined by their transmit power levels to reduce out-of-band emissions. Terminals with higher required transmit powers may be assigned with carriers near the middle of the operating band, and terminals with lower required transmit powers may be assigned with carriers near the band edges. |
| US08422433B2 |
Base station apparatus, communication control system, communication control method, and inter-station control method
A base station apparatus includes a determining unit that determines whether a direct link has been established between the base station apparatus and another base station apparatus, when a mobile device makes a request to switch a communication recipient from the base station apparatus to the other base station apparatus; a link information acquiring unit that acquires, indirectly from the other base station apparatus, link information necessary for establishing the direct link to the other base station apparatus, when the determining unit determines that no direct link to the other base station apparatus has been established; and a link requesting unit that requests the other base station apparatus to establish the direct link to the base station apparatus, based on the link information of the other base station apparatus acquired by the link information acquiring unit. |
| US08422429B2 |
Method and system for indicating the transmission mode for uplink control information
A base station includes a transmit path circuitry to select one of a first UCI multiplexing method that allows a subscriber station to simultaneously transmit PUSCH and PUCCH and a second UCI multiplexing method that does not allow the subscriber station to simultaneously transmit PUSCH and PUCCH. The transmit path circuitry also transmits a higher layer signal indicating the one selected UCI multiplexing method, and transmits one or more uplink grants. Each of the uplink grants schedules a PUSCH in an UL CC for a subframe n, and each of the uplink grants carries a CQI request. The base station also includes a receive path circuitry to receive an aperiodic CSI report on the PUSCH in the uplink component carrier i when only one of the uplink grants scheduling a PUSCH in an uplink component carrier i carries a CQI request having a value from a set of values. |
| US08422428B1 |
Device management for a wireless communication device having and invalid user identifier
A method of operating a communication system comprises, in a user identifier database system, identifying a failed registration attempt by a wireless communication device to register with a communication network based on a device identifier, identifying a routing system associated with the failed registration attempt, and transferring a data service message for delivery to the routing system, wherein the data service message comprises the device identifier, a service identifier, and instructions for a data session. The method further comprises, in the routing system, creating a temporary profile for the wireless communication device based on the service identifier and transferring the instructions for the data session for delivery to the wireless communication device. The method further comprises, in the wireless communication device, processing the instructions for the data session and transferring a session request for delivery to the routing system to establish the data session with a device management system identified in the instructions, and in the device management system, performing a device management task on the wireless communication device. |
| US08422426B2 |
Apparatus and method for calibration for cooperative multiple input multiple output in a wireless communication system
A method and apparatus for multi-cell calibration in a wireless communication system supporting cooperative Multiple Input Multiple Output (MIMO) are provided. Operations of a Base Station (BS) according to the method include transmitting a first message indicating a start of multi-cell sounding calibration to a reference Mobile Station (MS); estimating an uplink channel matrix of the reference MS using pilot symbols received from the reference MS; transmitting pilot symbols for enabling the reference MS to estimate a downlink channel matrix; when receiving downlink channel information of cooperative BSs from the reference MS, transmitting second messages comprising the downlink channel information to the cooperative BSs; and determining a multi-cell calibration matrix using the uplink channel matrix and the downlink channel information received from the reference MS. |
| US08422423B2 |
Packet communication method and mobile station
A packet communication method of the present invention includes a step of: receiving, at a mobile station (UE), restriction information for accepting an incoming call and restricting an outgoing call; establishing, at the mobile station (UE), a control path with a packet exchange (SGSN) in response to incoming of paging for the mobile station (UE); sending, the packet exchange (SGSN), a message instructing to establish the data path via the control path; and establishing, at the mobile station (UE), the data path by calling to the packet exchange (SGSN), when the mobile station (UE) receives the message after the mobile station (UE) has received the restriction information. |
| US08422418B2 |
Earthquake and tsunami warning system and a transmission method for a primary notification message thereof
The present disclosure provides an earthquake and tsunami warning system and a transmission method for a primary notification message thereof. The transmission method includes: a base station pages all terminals via a paging message containing indication information of an earthquake and tsunami warning system (ETWS) message, and transmits security information of an ETWS primary notification message via the resource prearranged with the terminals, and basic information of the ETWS primary notification message is transmitted within the paging message or via the prearranged resource; the terminals receive the security information of the ETWS primary notification message via the prearranged resource after receiving the paging message containing indication information of the ETWS message, and obtains the basic information of the ETWS primary notification message from the paging message or receives the basic information of the ETWS primary notification message via the prearranged resource. The technical solution provided by the present disclosure can achieve the transmission of the ETWS primary notification message as well as meet the time delay requirement, and modify the base station and terminals slightly with little or no overhead increasing. |
| US08422412B2 |
Duplexer and switch enhancement
A signal selector enhancer suitable for portable electronic devices and base stations is disclosed. In one embodiment, the enhancer can include: a filter for receiving a signal from a first node, and for providing a filtered signal output therefrom, where the first node is coupled to a signal selector; and a noise canceller for receiving the filtered signal output, and for providing an adjusted filtered signal at a second node, where the second node is coupled to the signal selector, and where an operation of the signal selector is enhanced by the filter and the noise canceller arrangement. |
| US08422406B2 |
Identifying callers in telecommunications networks
A system and method that allows different participants in a conference call to be identified at a receiving terminal includes watermarking speech data when the uplink information from the terminals of the participants is received at the telecommunications network. The speech data is then combined at a conference bridge in the network and is transmitted in the downlink to the receiving terminal. The receiving terminal uses the watermarks to identify from which of the participants the received speech data originated and is operable to reproduce the speech data from the respective participants at different positions in a 2D or 3D space to help the user of the receiver terminal to identify contributions made by the respective participants. |
| US08422399B2 |
System and method of mapping and analyzing vulnerabilities in networks
Systems and methods for mapping and analyzing vulnerabilities in networks. In one embodiment, a network is mapped, comprising: converting network line data into point data; associating the point data with cells of a grid overlaying the network; and analyzing the network by determining the relationship of the point data to the cells of the grid. |
| US08422397B2 |
Method and apparatus for rapid session routing
A gateway device at a user premises edge of a wide area network implements a method for rapidly routing a media session. for an application layer service. The gateway device receivers a request from a first endpoint device to create the media session with a second device. The request includes an application layer identifier for the second device. The method involves accessing a routing table within the gateway device using the application layer identifier and obtaining, from the internal routing table a network layer address for communication with the second device. The gateway device then creates a route for the media session for the application layer service via bi-directional network layer communications through at least one of its interfaces using the network layer address. |
| US08422396B2 |
Rate monitoring apparatus
A rate monitoring apparatus using a token bucket algorithm for controlling a packet flow, the apparatus includes a packet information storage unit having two storage media for storing packet information extracted from a packet data, a token identifying information storage unit having two storage media for storing identification information used for supplying a created token, and an operation unit for performing a policing operation by using a packet length, an allowable burst size, a token supply capacity and a currently transmittable data capacity, based on an identifying information included in the packet information and a comparison result between identification information included in the packet information and the identification information used for supplying the created token, these compared identification information being read out from the other storage medium different from the storage medium under writing in the packet information storage unit and the token identifying information storage unit. |
| US08422390B2 |
Method and apparatus for transporting deterministic traffic in a gigabit passive optical network
A system and method are disclosed for transporting deterministic traffic in a gigabit passive optical network. A system that incorporates teachings of the present disclosure may include, for example, an Optical Line Termination (OLT) for exchanging data traffic in a Gigabit Passive Optical Network (GPON) having a controller programmed to generate a timeslot schedule for transport of a desired bandwidth of constant bit rate (CBR) data traffic by selecting one or more timeslots from periodic frame clusters operating according to a GPON Transmission Convergence (GTC) protocol. Additional embodiments are disclosed. |
| US08422387B2 |
Method and apparatus of handling uplink information under carrier aggregation in a wireless communication system
A method of handling uplink information under carrier aggregation for a MAC layer of a UE in a wireless communication system includes receiving uplink data from a higher layer of the UE, triggering a request for requesting UL-SCH resource on at least one of a plurality of component carriers according to whether a PUCCH resource is configured on the at least one of the plurality of component carriers in a current TTI when no UL-SCH resource is available for transmitting the uplink data in the current TTI, and instructing a lower layer of the UE to transmit the request on the at least one of the plurality of component carriers. |
| US08422385B2 |
Control method for uplink connecting of idle terminal
A method for controlling an uplink connection of an idle UE in a wireless communication system is disclosed. In a method for performing a random access procedure by an idle-mode user equipment (UE) which desires to receive a specific broadcast/multicast service in a wireless communication system, the method includes, receiving a first message transmitted from a network, so as to count the number of UEs which desire to receive the broadcast/multicast service, transmitting a preamble for a random access to the network, receiving a second message including uplink (UL) radio resource allocation information from the network in response to the preamble, transmitting a third message selected according to a connection indication information contained in the first or second message to the network using the uplink (UL) radio resource allocation information, wherein the connection indication information indicates whether a connection to the network is required or not, and receiving a contention resolution message from the network. |
| US08422384B2 |
Method and arrangement in communication networks
The present invention relates to apparatus and methods for communicating on two or more services or transport channels by a multi-branch receiver and for dynamically reconfiguring the multi-branch receiver. The dynamic reconfiguration of the multi-branch receiver may be based on at least one of the measured radio conditions, measured quality of the services, and network-controlled quality of service targets. For each of the services or transport channels, a measured quality target is derived from the network-controlled quality of service targets. Based on the largest of the measured quality targets, one or more of the branches of the receiver is dynamically switched on or off. |
| US08422382B2 |
Method and arrangement for adapting transmission of encoded media
The present invention is to select an adaptation scheme for the transmission of the encoded media that results in a satisfactory performance of the transmitted encoded media. A difference from the prior art is that each adaptation scheme defines a set of different transmission formats, wherein each transmission formats is a combination of at least two of the parameters the source codec bit rate, the packet rate, the number of frames of each packet (referred to as frame aggregation), and the level of redundancy. By using the different transmission formats, the transmission can be adapted to different operating scenarios and the performance is hence improved. |
| US08422381B1 |
System and method for improved jamming resistance for high throughput point to point communication networks
A system for improving jamming resistance comprising a first node suitable for transmitting a coded packet and a second node suitable for receiving the coded packet. The first node generates a plurality of coded preamble packets and transmits the plurality of coded preamble packets to the second node on a plurality of frequency channels, the second node receives the plurality of coded preamble packets, determines a relative strength for each of the plurality of frequency channels based on a frequency channel condition determined from the transmission of the plurality of coded preamble packets and transmits a frequency channel response to the first node. |
| US08422380B2 |
Dynamically reconfigurable wired network
The invention is directed to a dynamically reconfigurable network comprising a plurality of nodes having respective transmitters and receivers for transmitting and receiving respective signals to and from one another. In one embodiment, the network is adapted to determine whether a first maximum power can be found at which a first node can transmit a first signal that provides a minimum signal-to-noise ratio at a second node without exceeding a maximum signal-to-noise ratio that a third node requires to simultaneously receive a second signal from a fourth node. If the first maximum power cannot be found, the network is further adapted to cause the first, second, third, and fourth nodes to share a single sub-network. Alternatively, if the first maximum power can be found, the network is adapted to cause the first and second nodes to share a single sub-network that the third node is not permitted to share. |
| US08422376B2 |
Routing under heavy loading
According to the invention, a delivery network for assisting delivery of content objects over an Internet is disclosed. The delivery network includes a network outlet, an interface and a routing function. The network outlet is coupled to a plurality of full-route networks, where each of the plurality of full-route networks is capable of delivering content objects to a plurality of terminal networks. The plurality of terminal networks include a terminal network, where the plurality of terminal networks are coupled to a plurality of end user computers. The interface receives content objects for delivery to the plurality of end user computers. The routing function routes content objects in at least two modes, where a first mode routes content objects based upon a first route path from the network outlet to the terminal network, and a second mode routes at least some content objects using a second route path from the network outlet to the terminal network. The first route path is chosen based upon delivery efficiency. Switching from the first mode to the second mode is triggered when at least of a portion of the first route path reaches a predetermined level of use. The first and second route paths are different, and the second route path is less efficient than the first route path. |
| US08422372B2 |
Method of channel resource allocation and devices in wireless networks
A method of allocating channel resources from a first device to a second device in a wireless network comprises receiving channel resource allocation information from a coordinator of the wireless network to allocate the channel resources; transmitting data to the second device through the allocated channel resources; receiving channel resource request information from the second device to request the first device to allocate a part of the allocated channel resources; and deciding whether to allocate the part of the channel resources allocated from the coordinator, to the second device in accordance with the channel resource request information. |
| US08422362B2 |
Reliability as an interdomain service
A system and techniques to increase the redundancy (i.e., physical diversity and bandwidth) available to an IP network, thereby increasing the failure processing capability of IP networks. The techniques include pooling the resources of multiple networks together for mutual backup purposes to improve network reliability and employing methods to efficiently utilize both the intradomain and the interdomain redundancies provided by networks at low cost. |
| US08422360B2 |
Route switching method, server, boundary node apparatus, route switching system, and route switching program
A route switching method for switching a route in a core network that accommodates service networks including user node apparatuses by use of a server storing path information that includes, in every time frame, a route for a working path and a route for a backup path to be switched over from the working path, both of the working path and the backup path established between two boundary node apparatuses each of which is located on a boundary between the service network and the core network. The server calculates, in response to the connection request from the user node apparatus, a route for a working path and a route for a backup path, and requests the boundary node apparatus to establish this working path. The server can send the route for the backup path to the boundary node apparatus before a failure occurs in the core network. The boundary node apparatus establishes the working path in response to the establishment request for establishing the working path from the server, and can perform a quick recovery by switching over the working path to the backup path when a failure occurs in the core network. |
| US08422359B2 |
Communication network control system and control method
In a case where a failure has occurred in one of fabric management mechanisms, nodes resume data I/O communications without degrading performance and without changing the data I/O communication path between the nodes by switching control to the other one of the fabric management mechanisms. The fabric management mechanisms share management information with each other. When a failure occurs in either of the fabric management mechanisms, an E_Node that belongs to the domain, in which a failure has occurred, logs into a normal fabric management mechanism via a newly created management-use communication path. The normal fabric management mechanism allocates an N_Port_ID on the basis of a virtual FC domain number that has been allocated to a switch. |
| US08422356B2 |
Base station, user apparatus, and method
A base station used in a mobile communications system which uses orthogonal frequency division multiplexing (OFDM) for downlink is disclosed. The base station includes: a unit which provides a reference signal; a unit which multiplexes a control signal and the reference signal, and generates a transmit symbol; and a unit which inverse Fourier transforms the transmit symbol and wirelessly transmits the transformed transmit symbol, wherein a first sequence including a random code sequence and a second sequence belonging to an orthogonal-code sequence group are multiplied with the reference signal, mutually different ones of the orthogonal code sequences are used in the respective multiple sectors belonging to the same cell, and different ones of the random code sequences are used in the respective two or more cells. |
| US08422355B2 |
Mobile communication system, base station apparatus, user apparatus and method
A base station apparatus for use in a mobile communication system includes: a unit configured to generate a reference signal; a unit configured to generate a transmission symbol including the reference signal; a unit configured to transmit the transmission symbol for each sector; and a unit configured to monitor a radio propagation state. The reference signal is generated by multiplying a first sequence formed by a non-orthogonal code sequence which is different at least between an adjacent cell and an own cell, by a second sequence. Whether to form the second sequence by using an orthogonal code sequence which is different among sectors or by using a non-orthogonal code sequence is determined according to the radio propagation state. |
| US08422350B2 |
Information processor device and storage medium
In an information storage device in which small partitions for storing information are three-dimensionally placed inside a solid, the invention aims at long-period storage, robustness, and rapid information reading. Accordingly, the stored three-dimensional information is divided into two-dimensional data for each layer, and two-dimensional inverse Fourier transform is previously applied for the two-dimensional data. The two-dimensional data is recorded in each layer in a Z direction inside a storage medium which is solid. When the information is reproduced, electromagnetic waves are irradiated to a storage area MA as gradually rotating the storage area MA around a z axis, and projection images of all layers during the rotation are obtained from response. By applying one-dimensional Fourier transform for a plurality of projection images obtained as described above, the recorded original three-dimensional information is rapidly reproduced. |
| US08422349B2 |
Method and device to improve start-up performance of a multi-layer optical disc
A method comprising recording data related to a start-up procedure on at least one of a plurality of recording layers disposed on an optical record carrier for reading back the recorded data during subsequent start-ups, the selection of the at least one recording layer based on properties of the at least one recording layer is disclosed. The technique reduces the optical record carrier start-up time and is useful for DVD, HD-DVD and BD recorders and/or players. |
| US08422348B2 |
Reproducing system for mediums and method for reproducing digital data and identifying the same
A method for reproducing digital data and identifying the same by executing a software program stored in a memory of a computer is disclosed. The method includes: reading digital data; identifying total size of the digital data; saving the digital data as a temporary file; receiving a request for selecting at least one target medium, wherein the target medium is used for storing the digital data; determining a quantity of the target medium to be used for writing; writing the digital data into the target medium; generating a list text file and an index text file into each target medium, wherein the list text file includes information regarding to the content stored in each target medium respectively and the index text file includes information regarding to the content in all target medium; and building an index database of the digital data. |
| US08422346B2 |
Method and apparatus for determining the number of data layers in an optical disc
The present invention provides a method and an apparatus for determining the number of data layers in an optical disc. Firstly, the objective lens of the optical pickup head is controlled so that it moves toward the optical disc. At the same time, a generated SBAD signal is recorded. The number of wave peaks in the SBAD signal is then detected and the number of the data layers in an optical disc is determined according to the detected number of wave peaks in the SBAD signal. |
| US08422345B2 |
Optical information storage medium reproduction apparatus and control method of the same
In an optical information storage medium reproduction apparatus (10) for reproducing an optical information storage medium including a plurality of information recording layers each including a recording mark having a length shorter than an optical system resolution limit, reproduction laser power for reading an information recording layer closest to a reproduction-laser-incident surface of the optical information storage medium is set to be lower than reproduction laser power for reading an information recording layer farthest from the reproduction-laser-incident surface but not lower than minimum reproduction laser power that satisfies a reproduction signal characteristic that the optical information storage medium reproduction apparatus (10) requires. With the arrangement, it is possible to prevent that the information recording layer closest to the reproduction-laser-incident surface is irradiated wrongly with reproduction laser having high reproduction laser power, thereby making it possible to obtain successful reproduction quality. That is, it is possible to realize the optical information storage medium reproduction apparatus (10) that can set optimum reproduction laser power and perform stable super resolution reproduction. |
| US08422342B1 |
Energy assisted magnetic recording disk drive using a distributed feedback laser
A method and system for providing an energy assisted magnetic recording (EAMR) disk drive are described. The EAMR disk drive includes a media, a slider having a trailing face and an air-bearing surface (ABS), at least one distributed feedback (DFB) layer and at least one EAMR transducer on the slider. The DFB laser(s) each includes a plurality of quantum wells, a laser coupling grating, at least one reflector, and a cavity in the at least one DFB laser. The DFB laser(s) for providing energy to the media. The EAMR transducer(s) includes at least one waveguide, a write pole, at least one coil for energizing the write pole, at least one grating, and may include a near-field transducer. The grating(s) include a coupling grating for coupling the energy from the at least one DFB laser to the waveguide(s). The waveguide(s) direct the energy from the at least one grating toward the ABS. |
| US08422340B2 |
Methods for determining the frequency or period of a signal
Methods for determining timestamps for signal timing edges for use in, e.g., a reciprocal counter for determining the frequency of a signal is disclosed, comprising the steps of inputting the signal into a tapped delay line, producing a plurality of delay line tap signals at the output of each of the delay line taps. In one embodiment, after detecting the signal timing edge and determining an initial time value corresponding to the timer clock cycle count at the signal timing edge or the next clock timing edge, the delay line tap signals are monitored to determine a fractional correction time value adjustment to be made to the initial value to account for the delay between the signal timing edge and the next clock timing edge to determine the timestamp. In another embodiment, after detecting the signal timing edge, the average of a plurality of delay line timer clock cycle counts corresponding to the timer clock cycle counts at the delay line tap signal timing edges is used to determine the timestamp. |
| US08422331B2 |
Data output control circuit and data output control method
A data output control circuit controls a data output in a read operation. A data output control method includes a count shifting mode and a delay mode and can be used in low and high frequency operations, so that a data output can be stably controlled in a broad frequency range. The data output control circuit includes: a low frequency mode controller a high frequency mode controller and a selector selecting any one of first and second command signals through CAS latency information to be output as a data output control signal. |
| US08422329B2 |
Semiconductor device with anti-fuse elements
A semiconductor device compares potential AF_G at an end of an anti-fuse element with potential VPPR. If potential AF_G is equal to or higher than potential VPPR, then the semiconductor device boosts potential VPPSVT of a power supply line that is connected to the end of the anti-fuse element. If the of the anti-fuse element and the other end thereof are connected to each other by the boosted potential, thereby making potential AF_G lower than potential VPPR, then the semiconductor device stops boosting potential VPPSVT. |
| US08422325B2 |
Precharge control circuit and integrated circuit including the same
A precharge control circuit includes a precharge voltage supply unit for generating a precharge voltage according to a voltage level of a precharge control signal, a voltage generator for generating an operating voltage for controlling the voltage level of the precharge control signal in response to a first enable signal and a voltage control signal, and a signal generator for fixing the precharge control signal to a specific voltage level in response to a second enable signal and for linearly changing the voltage level of the precharge control signal according to a slope, determined by a level of the operating voltage, when the second enable signal is disabled. |
| US08422324B2 |
Method and apparatus for sending test mode signals
A test mode signal system includes: a test mode block for generating a plurality, N, of test mode signals; a test mode send block, for generating and outputting a pulsed signal according to a command signal, and for multiplexing the N test mode signals in sets according to the pulsed signal and outputting the multiplexed pairs of test mode signals over M signal wires wherein M is less than N, such that each signal wire carries a multiplexed set of the N test mode signals; and a test mode receive block, for receiving the multiplexed sets of N test mode signals and the pulsed signal and demultiplexing each multiplexed set of N test mode signals according to the pulsed signal. |
| US08422323B2 |
Multi-bit test circuit of semiconductor memory apparatus
A multi-bit test circuit for a semiconductor memory is configured to cause an active command to activate active signals. At least two active signals are respectively inputted to a plurality of banks at different timings in a multi-bit test mode. |
| US08422322B2 |
Self-repair integrated circuit and repair method
A method for repairing degraded field effect transistors includes forward biasing PN junctions of one of a source and a drain of a field effect transistor (FET), and a body of the FET. Charge is injected from a substrate to a gate region to neutralize charge in the gate region. The method is applicable to CMOS devices. Repair circuits are disclosed for implementing the repairs. |
| US08422315B2 |
Memory chips and memory devices using the same
A memory chip is provided and includes a control unit, a wait controller, and a wait receiver. When the memory chip operates in an active mode and the control unit determines that the memory chip will be changed to operate in an inactive mode according to an input address signal, the wait controller changes a state of a wait signal at a wait pad from a de-asserted state to an asserted state. When the memory chip operates in an inactive mode and the wait receiver detects that the state of the wait signal has been changed from the de-asserted state to the asserted state, the control unit determines whether the memory chip will be changed to operate in the active mode or a word-line boundary crossing operation will be performed to another memory chip. |
| US08422310B2 |
Analog sensing of memory cells with a source follower driver in a semiconductor memory device
Memory devices, methods, and sample and hold circuits are disclosed, including a memory device that includes a sample and hold circuit coupled to a bit line. One such sample and hold circuit includes a read circuit, a verify circuit, and a reference circuit. The read circuit stores a read threshold voltage that was read from a selected memory cell. The verify circuit stores a target threshold voltage that is compared to the read threshold voltage to generate an inhibit signal when the target and read threshold voltages are substantially equal. The reference circuit stores a reference threshold voltage that can be used to translate the read threshold voltage to compensate for a transistor voltage drop and/or temperature variations. |
| US08422308B2 |
Block decoder of flash memory device
A block decoder of a flash memory device includes a discharge control unit configured to output a discharge signal in response to a program precharge signal and one or more of a number of address signals, and a selection line control unit configured to apply a ground voltage to source and drain selection lines of memory blocks in response to the discharge signal. |
| US08422307B2 |
Nonvolatile memory device and read method using dynamically determined read voltages
A method of reading a nonvolatile memory device comprises measuring threshold voltage distributions of a plurality of memory cells, combining the measured threshold voltage distributions, and determining local minimum points in the combined threshold voltage distributions to determine read voltages for a predetermined group of memory cells. |
| US08422305B2 |
Method of programming nonvolatile memory device
A method of programming a nonvolatile memory device includes inputting program data to page buffers; performing a program operation and a program verification operation until threshold voltages of memory cells included in a selected page reach a target level according to the program data; when the threshold voltages of the memory cells reach the target level, performing an over-program verification operation to determine over-programmed memory cells in the memory cells; and making a determination of whether error checking and correction (ECC) processing for the over-programmed memory cells is feasible. |
| US08422304B2 |
Flash memory device and method for manufacturing flash memory device
A method of manufacturing a flash memory device is provided. First and second gates are formed on first and second dielectrics and spaced apart from each other on a cell area of a substrate. A third gate is formed on a third dielectric that is formed on first opposing sidewalls of the first gate and extending on a portion of the substrate from the first opposing sidewalls. A fourth gate is formed on a fourth dielectric that is formed on second opposing sidewalls of the second gate and extending on a portion of the substrate from the second opposing sidewalls. The third gate and third dielectric on one of the first opposing sidewalls facing the second gate and the fourth gate and fourth dielectric on one of the second opposing sidewalls facing the first gate are removed. Drain areas are formed at outer sides of the third and fourth gates, and a common source area is formed between the first and second gates. |
| US08422303B2 |
Early degradation detection in flash memory using test cells
A Flash memory system and a method for data management using the embodiments of the invention use special test cells with Early Degradation Detection (EDD) circuitry instead of using the actual user-data storage cells are described. The Flash memory test cells can be made to serve as a “canary in a coal mine” by being made more sensitive than the standard cells by using experimentally determined sensitive write VT and variable read VT. Techniques for early degradation detection (EDD) in Flash memories measure the dispersion of the threshold voltages (VT's), of a set (e.g. page) of NAND Flash memory cells during read operations. In an embodiment of the invention the time-to-completion (TTC) values for the read operation for the memory cells are used as a proxy for dispersion of the threshold voltages (VT's). A Dispersion Analyzer determines the dispersion of the set of TTC values. |
| US08422301B2 |
Nonvolatile semiconductor memory device and operating method thereof
A nonvolatile semiconductor memory device in accordance with an embodiment includes a memory cell array. A control unit performs control of repeating a write operation, a write verify operation, and a step-up operation, the write operation being an operation to apply a write pulse voltage to a selected memory cell and an intermediate voltage to an unselected memory cell. The control unit controls the step-up operation such that, in a first period, the intermediate voltage is maintained at a constant value, and, in a second period, the intermediate voltage is raised by a certain value. The control unit controls the step-up operation such that the first period includes an operation to raise the write pulse voltage by a first step-up value, and the second period includes an operation to raise the write pulse voltage by a second step-up value smaller than the first step-up value. |
| US08422299B2 |
Non-volatile semiconductor memory device
According to one embodiment, a non-volatile semiconductor memory device comprises memory strings. Each memory string comprises a semiconductor layer, control gates, a first selection gate, and a second selection gate. A semiconductor layer comprises a pair of pillar portions which extend in a vertical direction to a substrate, and a coupling portion formed to couple the pair of pillar portions. Control gates orthogonally intersect one of the pair of pillar portions or the other of the pair of pillar portions. A first selection gate orthogonally intersects one of the pair of pillar portions and is formed above the control gates. A second selection gate orthogonally intersects the other of the pair of pillar portions, is formed above the control gates, and is on the same level as the first selection gate as well as integrated with the first selection gate. |
| US08422295B1 |
Non-volatile random access memory coupled to a first, second and third voltage and operation method thereof
A non-volatile random access memory (NV-RAM) and an operation method thereof are provided. The NV-RAM includes a latch unit, a switch, and a first to fourth non-volatile memory elements. First terminals of the first and the third non-volatile memory elements respectively couple to a first voltage and a second voltage. A second terminal of the first non-volatile memory element and a first terminal of the second non-volatile memory element are coupled to a first terminal of the latch unit. A second terminal of the third non-volatile memory element and a first terminal of the fourth non-volatile memory element are coupled to a second terminal of the latch unit. Second terminals of the second and the fourth non-volatile memory element are coupled to a first terminal of the switch. A second terminal of the switch is coupled to a third voltage. |
| US08422293B2 |
Self-powered event detection device
The self-powered detection device comprises a non-volatile memory cell and a sensor activated by a physical or chemical action or phenomenon, this sensor forming an energy harvester transforming energy from the physical or chemical action orphenomenon into an electrical stimulus pulse, the memory cell arranged for storing, by using electrical power of the electrical stimulus pulse, at least a bit of information relative to detection by the sensor of at least a first physical or chemical action or phenomenon. The non-volatile memory cell comprises a FET transistor having a control gate, a first diffusion defining a first input and a second diffusion defining a second input. This FET transistor is set to its written logical state from its initial logical state when, in a detection mode, it receives on a set terminal a voltage stimulus signal resulting from the first physical or chemical action or phenomenon. |
| US08422289B2 |
Fabrication method of nanoparticles by chemical curing
A method of producing nanoparticles by using chemical curing. The method includes depositing a metal thin film on a substrate, applying an insulator precursor on a metal thin film, and adding a curing agent and a catalyst to the insulator precursor to perform the chemical curing. The method also includes mixing metal powder and an insulator precursor, applying a mixture on a substrate, and adding a curing agent and a catalyst to the mixture to perform the chemical curing. Since the chemical curing process is used in the method, it is possible to form nanoparticles by using a simple process at low cost while a high temperature process such as thermal curing is not used. |
| US08422288B2 |
DRAM cell utilizing floating body effect and manufacturing method thereof
The present invention discloses a DRAM cell utilizing floating body effect and a manufacturing method thereof. The DRAM cell includes a P type semiconductor region provided on a buried oxide layer, an N type semiconductor region provided on the P type semiconductor region, a gate region provided on the N type semiconductor region, and an electrical isolation region surrounding the P type semiconductor region and the N type semiconductor region. A diode of floating body effect is taken as a storage node. Via a tunneling effect between bands, electrons gather in the floating body, which is defined as a first storage state; via forward bias of PN junction, electrons are emitted out from the floating body or holes are injected into the floating body, which is defined as a second storage state. The present invention provides a highly efficient DRAM cell utilizing floating body effect with high density, which has low power consumption, has simple manufacturing process, and is compatible to the conventional CMOS and conventional logic circuit manufacturing process. |
| US08422284B2 |
High density spin torque three dimensional (3D) memory arrays addressed with microwave current
One embodiment of the present invention includes a three dimensional memory array having a plurality of memory elements coupled to form the array through a single top lead and a single bottom lead, each memory element including a magnetic free layer in which non-volatile data can be stored, wherein each memory element possesses unique resonant frequencies associated with each digital memory state, thereby enabling frequency addressing during parallel write and read operations, each memory element further including a fixed layer and a spacer formed between the free layer and the fixed layer. |
| US08422281B2 |
Voltage control circuit for phase change memory
The present invention relates to a voltage control circuit, semiconductor memory device, and method of controlling a voltage in a phase-change memory, wherein the voltage control circuit generates a controlled voltage which can be above the logic supply voltage. This voltage can limit the bit line voltage in a phase-change memory to allow the use of smaller transistors in the memory cells and in the program current part of the circuit. This results in smaller memory cells and modules. |
| US08422279B2 |
STRAM with composite free magnetic element
Spin-transfer torque memory includes a composite free magnetic element, a reference magnetic element having a magnetization orientation that is pinned in a reference direction, and an electrically insulating and non-magnetic tunneling barrier layer separating the composite free magnetic element from the magnetic reference element. The free magnetic element includes a hard magnetic layer exchanged coupled to a soft magnetic layer. The composite free magnetic element has a magnetization orientation that can change direction due to spin-torque transfer when a write current passes through the spin-transfer torque memory unit. |
| US08422278B2 |
Memory with separate read and write paths
A memory unit includes a giant magnetoresistance cell electrically coupled between a write bit line and a write source line. The giant magnetoresistance cell includes a free magnetic layer separated from a first pinned magnetic layer by a first non-magnetic electrically conducting layer. A magnetic tunnel junction data cell is electrically coupled between a read bit line and a read source line. The magnetic tunnel junction data cell includes the free magnetic layer separated from a second pinned magnetic layer by an oxide barrier layer. A write current passes through the giant magnetoresistance cell to switche the giant magnetoresistance cell between a high resistance state and a low resistance state. The magnetic tunnel junction data cell is configured to switch between a high resistance state and a low resistance state by magnetostatic coupling with the giant magnetoresistance cell, and be read by a read current passing though the magnetic tunnel junction data cell. |
| US08422273B2 |
Nanowire mesh FET with multiple threshold voltages
Nanowire-based field-effect transistors (FETs) and techniques for the fabrication thereof are provided. In one aspect, a FET is provided having a plurality of device layers oriented vertically in a stack, each device layer having a source region, a drain region and a plurality of nanowire channels connecting the source region and the drain region, wherein one or more of the device layers are configured to have a different threshold voltage from one or more other of the device layers; and a gate common to each of the device layers surrounding the nanowire channels. |
| US08422271B2 |
Bidirectional non-volatile memory array architecture
Method and apparatus for transferring data in a memory. A semiconductor memory includes a plurality of memory cells each having a resistive sense element (RSE) in series with a switching device. A conductive word line extends in a first direction adjacent the memory cells and is connected to a gate structure of each of the switching devices. A plurality of conductive bit lines extend in a second direction adjacent the memory cells, each bit line providing a connection node that interconnects a respective pair of the memory cells. A control circuit senses a programmed state of a selected memory cell by setting each of the bit lines on a first side of the selected memory cell to a first voltage level, setting each of the remaining bit lines on an opposing second side of the selected memory cell to a second voltage level, and setting the word line to a third voltage level. |
| US08422267B2 |
Semiconductor memory device and semiconductor integrated circuit
A semiconductor memory device includes a plurality of memory cells connected to a common bit line, a plurality of select lines each configured to select at least one of the memory cells, a plurality of drive circuits each configured to drive at least one of the select lines, a sense amplifier configured to amplify a voltage occurring at the bit line depending on data stored in the selected memory cell. A memory region where the memory cells are provided has a first region and a second region. When the first region is read, a larger number of the select lines are simultaneously driven by the corresponding common drive circuit than those in the second region, and a larger number of the memory cells are simultaneously selected than those in the second region. |
| US08422262B2 |
Generating ROM bit cell arrays
A method of generating a ROM bit cell array layout including the steps of: inputting a predetermined memory architecture having a predetermined positioning of bit lines and virtual ground lines, the memory architecture including a plurality of columns of memory cells, each column of memory cells being located between associated bit lines and virtual ground lines. Adjacent memory cells in each column of memory cells share a common connection to either the associated bit line or the associated virtual ground line. The further steps of evaluating the width of active area of each of said columns of memory cells, in dependence on said predetermined positioning of bit lines and virtual ground lines; selecting a final width of active area in dependence on at least one performance characteristic associated with said final width of active area; and generating the layout according to said final width of active area. |
| US08422260B2 |
Arrangement for voltage conversion
An arrangement for converting direct voltage into alternating voltage and conversely has a Voltage Source Converter with at least one phase leg connected to opposite poles (5, 6) of a direct voltage side of the converter and a series connection of switching cells arranged between said poles. Each half (8, 9) of this series connection is connected to a mid point forming a phase output by a phase reactor. The phase reactors of a said phase leg are built in a transformer (30) configured to connect said phase output to an alternating voltage phase line (28) by forming a primary winding each of the transformer arranged to interact with a secondary winding thereof connected to the alternating voltage phase line. |
| US08422258B2 |
Maximum power point tracker, power conversion controller, power conversion device having insulating structure, and method for tracking maximum power point thereof
Disclosed are a maximum power point tracker, a power conversion controller, a power conversion device having an insulating structure, and a method for tracking maximum power point. The power conversion device includes: a DC/AC converter including a primary DC chopper unit having a primary switch, a transformer, and an AC/AC conversion unit including a secondary switch; a current detector detecting current from an input stage of the DC/AC converter and providing a detected current value; a voltage detector detecting a system voltage from an output stage of the DC/AC converter; and a power conversion controller generating a primary PWM signal to be provided to the primary DC chopper unit and secondary first and second PWM signals, having the mutually opposing phases, to be provided to the AC/AC conversion unit by using the detected current value and the system voltage. |
| US08422255B2 |
Power converter with oscillation control part and method for controlling the same
An oscillation control part composed of a control switching element and a damping resistance connected in parallel is arranged between an input power supply and a main switching element of a power conversion circuit, and the control switching element and the main switching element have a relationship such as Ron(S2) |
| US08422254B2 |
Voltage source converter
A Voltage Source Converter having at least one phase leg connected to opposite poles of a direct voltage side of the converter and comprising a series connection of switching cells has inductance means comprising a plurality of inductors built in in said series connection of switching cells and connected in series with these cells by being connected to terminals thereof. |
| US08422253B2 |
Circuit regulator and synchronous timing pulse generation circuit thereof
A circuit regulator is used to generate a pulse-width-modulation signal, so as to control a power to be selectively input or not input to a primary side of a switching power supply. The circuit regulator includes a synchronous timing pulse generation circuit, outputs a starting pulse after performing signal process of time delay, timing pulse regulation, and synchronization control on a pulse-width-modulation signal and a discharging time signal of a secondary side, and accordingly effectively controls a pulse starting time of the pulse-width-modulation signal. Therefore, the synchronous timing pulse generation circuit can be applied to the circuit regulator, so as to further effectively prevent an inductor current of the switching power supply from entering a Continuous Conduction Mode (CCM). |
| US08422252B2 |
Snubber capacitor generating an auxillary power supply voltage
An integrated circuit (IC) forming a pulse-width modulator controls the switching operation of an output stage of a switching power supply. A snubber capacitor that is coupled to a primary winding of a transformer of the output stage is used for producing a capacitive coupled charging current. The capacitive coupled charging current is coupled to a filter or charge storage second capacitor for producing in the second capacitor a first portion of a second power supply voltage. During a portion of a switching cycle of the output stage, the snubber capacitor is coupled to an inductor to form a resonant circuit. The resonant circuit produces in the second capacitor a second portion of the second power supply voltage for energizing the IC. The second power supply voltage is used for energizing the IC. |
| US08422251B2 |
Circuit arrangements for operating a household appliance
A circuit for operating a household appliance, wherein the circuit includes a switched-mode power supply for converting the power supply of a public power supply network into direct supply voltage. The circuit also includes a controller that is connected to the switched-mode power supply for being supplied with the direct supply voltage and for controlling processes of the household appliance. An EMC filter is provided to protect the public supply network from interference signals from the household appliance. The EMC filter includes a condenser that is connected between a phase conductor pole and a neutral conductor pole of the public power supply network; a bleeder resistor that is connected in parallel with the condenser; and a switch that can be activated by the controller to connect the condenser and the bleeder resistor to the neutral conductor pole. |
| US08422249B2 |
Apparatus for a microinverter particularly suited for use in solar power installations
A microinverter is disclosed for use in a solar power installation. The microinverter incorporates a voltage-to-current control loop that initially converts output current produced by a photovoltaic panel into a pulse width modulated output synchronized and phase-locked to the utility grid voltage. The duty cycle of that modulated output is specified by output power internally requested from the microinverter. This modulated output is converted into a full-wave rectified unipolar waveform that is converted, through a Commutator, into a bipolar AC output that is also phase-locked and synchronized to the grid voltage. The commutator uses an H-bridge composed of four FETs, with each of two diagonally-oriented pairs of these FETs being advantageously switched on substantially at zero-crossing points in the grid voltage. Switching these FETs during times of zero current and voltage, and switching each pair on for substantially an entire half-cycle of grid voltage reduces switching loss and power dissipation of the FETs and ensures that these FETs remain substantially unaffected by transients which might appear in the grid voltage. |
| US08422243B2 |
Integrated circuit package system employing a support structure with a recess
An integrated circuit package system that includes: providing an electrical interconnect system including a support structure and a lead-finger system; processing a top edge of the support structure along an outermost periphery thereof, to include a recess for preventing mold bleed, the recess surrounded by the lead finger system; and encapsulating the recess and the electrical interconnect system with an encapsulation material to interlock the encapsulation material. |
| US08422241B2 |
Sealed electronic control device and method of fabricating the same
Provided is a small resin-sealed electronic control device with a reduced plane area and volume, which can provide an enlarged area on which circuit components are mounted without increasing a plane area of electronic boards. In the resin-sealed electronic control device, a support member (20A) includes a first support plate (21a), a second support plate (22a), and a pair of rising portions (23a) which form a space portion with a first electronic board (30A) and a second electronic board (40A). An exterior covering material (11) is formed by injecting a melted synthetic resin into the space portion and spaces outside the space portion along the pair of rising portions (23a). Inner circuit components (33) are situated inside window holes formed through the support plate (20A) and face one of the first electronic board (30A) and the second electronic board (40A) opposed to each other with a gap interposed therebetween. |
| US08422238B2 |
Signal conversion device
The present invention provides a signal conversion device comprising: a substrate having a first surface and a second surface, the first surface being provided with a first contact region comprising at least a first contact and a second contact while the second surface being provided with a second contact region comprising at least a third contact and a fourth contact; wherein there is an electrical connection between the first and third contacts, and the second and fourth contacts are electrically connected to an IC fabricated using Wafer Level Chip Scale Package (WLCSP) or Chip On Film (COF) technology, and wherein the IC is disposed at the first surface or the second surface. |
| US08422234B2 |
Device for electromagnetic shielding and dissipation of heat released by an electronic component, and corresponding electronic circuit
A device is provided for electromagnetic shielding an electronic component and for dissipating heat generated by the component. The component includes a package designed to be fastened to a first face of a printed circuit, called a rear face, by a heat sink, the heat sink passing through the rear face of the printed circuit and emerging on a second face of the printed circuit, called a front face. The device includes a metal structure mounted on the front face of the printed circuit and defining an electromagnetic shielding enclosure. The metal structure having a first heat discharge opening lying approximately opposite the heat sink. The device further includes at least one thermal connector, a first end of which is fastened to the metal structure and a second end of which is fastened to the heat sink and/or to the front face of the printed circuit near the heat sink. |
| US08422233B2 |
Motherboard system having heat dissipating device
A motherboard system includes a PCB, a CPU socket mounted on the PCB, a heat dissipating device, and a number of fastening devices. The CPU socket is configured for receiving a CPU. The heat dissipating device is mounted on the CPU socket for dissipating heat generated by the CPU. The fastening devices extend through the heat dissipating device and the CPU socket and are engaged in the PCB, thereby fastening the heat dissipating device, and the CPU socket to the PCB. |
| US08422232B2 |
System for controlling temperature of antenna module
A system for controlling temperature of an antenna module including a heat generating module, and a radome and an underbody cover that enclose the heat generating module. The system includes: a heat collecting unit mounted on inner surface of the antenna module; a heat discharging unit mounted on outer surface of the antenna module; and a heat transfer unit for transferring heat from the heat collecting unit to the heat discharging unit. |
| US08422226B2 |
Heat dissipation device
A heat dissipation device is used to dissipate heat generated by a number of memory chips of a motherboard. The heat dissipation device includes a bracket attached to the motherboard and at one side of the memory chips, at least one fan, and at least one connection member attached to the corresponding fan. The fan is adjustably attached to the bracket by the connection member. |
| US08422225B2 |
Power electronic apparatuses with cooling arrangements
A power electronic device with cooling arrangement includes a housing that accommodates power electronic components. At least two adjacent axial fans are connected to the housing for inducing an airflow from outside into the housing in order to cool the power electronic components. Furthermore, the device can include a separating wall that extends outside the housing from between the at least two adjacent axial fans in order to reduce noise caused by the fans. Such a cooling arrangement can provide a power electronic device with effective cooling in compact size and also having an acceptable level of noise. |
| US08422224B2 |
Display device and electronic apparatus
According to one embodiment, an electronic apparatus includes a housing including an outlet, a cooling fan in the housing, a component in the housing configured to serve as a wall guiding air from the cooling fan to the outlet, and a wind shielding portion between the component and an inner surface of the housing. |
| US08422221B2 |
Television stand
A display device may be mounted on a stand. The stand may present a display screen of the display device at an angle in which it is easy for the user to view the display screen. The desired tilt angle of the display screen may vary depending on where it is positioned, and where it is viewed from. The present invention provides a stand in which the tilt angle of a display device can be changed between at least two different angles. The display device is securely mounted to the stand at all tilt angles. |
| US08422218B2 |
Liquid cooled condensers for loop heat pipe like enclosure cooling
A cooling device includes an enclosure, an external heat rejection device, a primary cooling system including a loop heat pipe like device. The LHPL device includes, an evaporator module, a condenser module, a vapor line, a liquid return line, and a working fluid having a liquid phase and a vapor phase. The evaporator module includes a component-evaporator heat spreader, an evaporator body, and an evaporator-component clamping mean. The evaporator body includes an evaporator outer shell, a working fluid inlet port, a compensation chamber, a working fluid exit port, and an evaporator wick having vapor escape channels. The condenser module includes a condenser coolant inlet, a condenser coolant exit, a condenser condensation channel, a condensation channel working fluid inlet, a condensation channel working fluid exit, and a condensation channel-coolant thermal interface further comprises a coolant passageway. The secondary cooling system including a secondary coolant, the secondary cooling system cooling a secondary heat rejecting component, wherein the secondary heat rejecting component is one of the plurality of other components. |
| US08422212B2 |
Electronic device with separable module
An electronic device includes a display unit and a main unit having a separable module and a base. The separable module is provided along two opposite shorter edges with a plurality of hooking elements, and has at least one carrier member located on one side of the separable module. The base includes a plurality of retaining slots corresponding to the hooking elements, and at least one magnetic element located on one side of the base facing toward the carrier member. To cover the separable module onto the base, first cause the carrier member to be magnetically attracted to the at least one magnetic element and align the hooking elements with the retaining slots, and, then, move the separable module for the hooking elements to engage with the retaining slots, so that the separable module is held to the base. |
| US08422211B2 |
Assembling/disassembling keyboard structure for a portable device
An assembling/disassembling keyboard structure for a portable device includes a main body, a keyboard, and at least one fastening unit. The main body has a surface which forms a containing cavity with at least one side wall and a plurality of holes defined on the side wall. The keyboard is capable of being assembled to/disassembled from the containing cavity. The fastening unit is disposed on the other surface in opposite to the surface where the containing cavity was formed and has at least one engaging portion which can be correspondingly inserted into one of the holes for assembling/disassembling the keyboard to/from the containing cavity. Accordingly, the present invention is not only capable of easily assembling/disassembling the keyboard by the engaging portion but also prevents the keyboard from being possibly scratched or damaged during a process of utilizing an auxiliary tool to assembling/disassembling the keyboard. |
| US08422210B2 |
Reconfigurable computer
A portable computer system is provided having a base unit and a detachable display unit. The display unit includes a support structure movable between a stowed position and a deployed position. The support structure can help support the display unit when mounted on the base unit, standing alone, or both. Mechanical engagement tabs can also help support the display unit. A wireless communications link can convey information between the base and display units. |
| US08422207B2 |
Al alloy film for display device, display device, and sputtering target
Disclosed is an Al alloy film for a display device that, even when low-temperature heat treatment is applied, can realize satisfactorily low electric resistance, can realize a satisfactory reduction in contact resistance between the Al alloy film and a transparent pixel electrode connected directly to the Al alloy film, and has excellent corrosion resistance. The Al alloy film is connected directly to a transparent electroconductive film on the substrate in the display device. The Al alloy film comprises 0.05 to 0.5 atomic % of Co and 0.2 to 1.0 atomic % of Ge and satisfies the requirement that the content of Co and the content of Ge in the Al alloy film have a relationship represented by formula (1): [Ge]≧−0.25×[Co]+0.2 (1) In formula (1), [Ge] represents the content of Ge in the Al alloy film, atomic %; and [Co] represents the content of Co in the Al alloy film, atomic %. |
| US08422203B2 |
Low-resistance telecommunications power distribution panel
A low-resistance telecommunications power distribution panel provides a lower electrical resistance than traditional telecommunications power distribution panels, where the lower electrical resistance provides a reduced amount of waste heat. The low-resistance telecommunications power distribution panel may comprise a single unitary metal busbar configured to directly interconnect a power input cable to a plurality of fuse holders. A plurality of single unitary metal strips may directly connect to each fuse holder, each single unitary metal strip configured to directly connect to a power output lead. A single unitary metal return busbar may directly connect a return input to a plurality of return outputs. |
| US08422202B2 |
Capacitor and method for manufacturing the same
A method for manufacturing a capacitor that enables a capacitor having a high degree of conductivity and minimal leakage current to be obtained with a high level of productivity. A method for manufacturing a capacitor (10) according to the present invention includes an electrolytic oxidation step of forming a dielectric layer (12) by electrolytically oxidizing the surface of an anode (11) composed of a valve metal, a cathode positioning step of positioning a cathode (13) composed of a conductor in an opposing arrangement on the surface of the dielectric layer (12), a solid electrolyte formation step of forming a solid electrolyte layer (14) between the dielectric layer (12) and the cathode (13) using a conductive polymer solution containing a π-conjugated conductive polymer and a polyanion, and an application step of performing a treatment in which a direct current voltage is applied between the anode (11) and the cathode (13). |
| US08422201B2 |
Solid electrolytic capacitor and fabrication method thereof
A solid electrolytic capacitor comprising an anode composed of a valve metal or its alloy, a dielectric layer formed on a surface of the anode, a coupling agent layer formed by subjecting the dielectric layer to a surface treatment with a coupling agent having a phosphonic acid group, a conductive polymer layer formed on the coupling agent layer, and a cathode layer formed on the conductive polymer layer. |
| US08422197B2 |
Applying optical energy to nanoparticles to produce a specified nanostructure
The instant article of manufacture is made by applying optical energy to one or more layers of nanoparticulate materials under predetermined conditions to produce a nanostructure. The nanostructure has layers of optically fused nanoparticles including a predetermined pore density, a predetermined pore size, or both. The predetermined conditions for applying the optical energy may include a predetermined voltage, a predetermined duration, a predetermined power density, or combinations thereof. |
| US08422196B2 |
Multilayer ceramic electronic component
There is provided a multilayer ceramic electronic component, including: a multilayer body having a dielectric layer; and a plurality of internal electrode layers provided in the multilayer body, and having ends exposed to at least one face of the multilayer body, wherein, a ratio of T2 to T1 (T2/T1) ranges from 0.70 to 0.95, when T1 represents a thickness of a capacity formation portion formed by overlapping the plurality of internal electrode layers and T2 represents a distance between ends of outermost internal electrodes arranged on one face of the multilayer body to which the ends of the internal electrodes are exposed, and a thickness D1 of the multilayer body, in which the capacity formation portion is formed, is greater than a thickness D2 of a first side of the multilayer body to which the ends of the internal electrodes are exposed. |
| US08422194B2 |
Susceptance—mode inductor
A Susceptance-Mode Inductor with infinite order resonance cavity which includes an inductor section is formed by a physical inductor coil wound about a permanent magnetic materials, with both ends of the coil connecting to a electric damper and a capacitor of the infinite order resonance cavity; thereby that power is coupled into the incoming end of the infinite order resonance cavity through a radio frequency (RF) radiation electric field and the outgoing end thereof is electrically connected to a set of resonance power storage section, or alternatively the incoming end is connected to electric charge and the outgoing end is connected to the load; accordingly, the resonance of the infinite order resonance cavity, thus allowing to convert the current or electron flow at the magnetic field end into charge output by means of Lorenz force. |
| US08422193B2 |
Annulus clamping and backside gas cooled electrostatic chuck
An electrostatic clamp (ESC), system, and method for clamping a workpiece is provided. A clamping plate of the ESC has central disk and an annulus encircling the central disk, wherein the central disk is recessed from the annulus by a gap distance, therein defining a volume. Backside gas delivery apertures are positioned proximate to an interface between the annulus and the central disk. A first voltage to a first electrode of the annulus clamps a peripheral region of the workpiece to a first layer. A second voltage to a second electrode of the central disk generally compensates for a pressure of a backside gas within the volume. The ESC can be formed of J-R- or Coulombic-type materials. A cooling plate associated with the clamping plate further provides cooling by one or more cooling channels configured to route a cooling fluid therethrough. |
| US08422192B2 |
Fuel pipe joint on an aircraft
A joint with a first component; a second component; and an electrical assembly which provides an electrical pathway between the first and second components with an electrical resistance between 100 kΩ and 10 MΩ. The electrical assembly comprises a bonding lead; and a pair of connection assemblies each connecting the bonding lead to a respective one of the components. Each connection assembly comprises: a fastener with a shaft which passes through a hole in the component and a hole in the bonding lead, the hole in the bonding lead passing between an inner face of the bonding lead which faces towards the component and an outer face of the bonding lead which faces away from the component, and a washer which is carried by the shaft of the fastener and engages the component and the inner face of the bonding lead. Each washer provides the path of least electrical resistance between the bonding lead and a respective one of the components, each said path having an electrical resistance between 50 kΩ and 5 MΩ. |
| US08422191B2 |
Controlled dissipation of electrostatic charge
Disclosed is an improved ESD control system for use in vehicular applications that incorporated one or more dissipative elements constructed from a blend of polypropylene and a urethane/acrylic alloy which form substantially co-continuous networks and which are suitable for injection molding operations to produce dissipative elements. The dissipative elements are then incorporated into vehicular interiors in a manner whereby a surface of the element is exposed to contact, whether incidental or deliberate, by the vehicle occupants, particularly as they are entering or exiting the vehicle, to provide controlled dissipation of electrostatic charges that have accumulated on the occupants. In particular, these materials may be used in forming portions of the vehicle seat assembly and/or door assembly that will typically be contacted during egress, operation of the vehicle and/or ingress in order to suppress subsequent and less controlled discharges that could compromise the comfort and safety of the vehicle occupants. |
| US08422186B2 |
Low level voltage programmable logic control
An improved programmable logic control device for monitoring the current of a circuit and for signalling a circuit control device, the programmable logic control device including electrical power circuitry for activating the circuit control device and electrical circuitry for monitoring the current in the electrical circuit, the electrical circuitry including: adjustable electrical signal input circuitry to monitor the electrical current in the circuit; adjustable pick-up circuitry for adjusting the level of the current monitored in the electrical circuit, the pick-up circuitry having a thermister means for improved stabilization; adjustable time circuitry to command the electrical power circuitry to activate the circuit control device when the electrical current in the electrical circuit reaches the selected level and time duration, the time circuitry having an increased time duration to minimize nuisance tripping; and a zener diode in reverse mode for controlling the level of voltage applied to the adjustable pick-up circuitry and time circuitry substantially without resistive burden, the zener diode in reverse mode passing a reference voltage which is less than an input voltage to the said device. The device is preferably packaged in material that is resistant to radiation, such as ceramic, and is well-suited for harsh environment applications. |
| US08422182B2 |
Relay system comprising two JFET transistors in series
A static relay system configured to be connected in series with an electrical load supplied with AC current, including: two series-connected field-effect transistors fabricated in a material having a high bandgap energy; a detector detecting a threshold of a voltage across the terminals of each of the transistors or of the two transistors; an electromechanical relay connected in series with the transistors; and a controller for opening at least one transistor or the electromechanical relay when the threshold voltage is exceeded. |
| US08422181B2 |
Electrostatic discharge protection device of an electric apparatus
An electronic apparatus including an electrostatic discharge (ESD) protection circuit, an abnormal voltage detection circuit, an internal circuit and a blocking circuit is provided. The ESD protection circuit receives a plurality of input signals for preventing an abnormal high voltage damage produced by an ESD phenomenon on a path for delivering the input signals, and correspondingly outputs a plurality of voltage-dropped input signals. The input signals include a control signal set and a data signal set. The abnormal voltage detection circuit is coupled to the ESD protection circuit. The abnormal voltage detection circuit receives the voltage-dropped input signals, and produces a blocking control signal according to voltage levels of the voltage-dropped input signals. The blocking circuit is used for receiving the blocking control signal and blocking the control signal set from delivering to the internal circuit according to the blocking control signal. |
| US08422179B2 |
Inrush current control
An inrush current control circuit selectively short-circuit bypasses an inrush current limiting resistor (R1) of a power supply that includes a switching transistor (Q1) having a control terminal (gate or base) driven in dependence on a pulse width modulated (PWM) drive signal. The inrush current control circuit includes a bypass transistor (Q3), a first resistor (R3), a capacitor (C2), a second resistor (R2) and a diode (D3), wherein an anode terminal of the diode (D3) is connected to one of the terminals of the switching transistor (Q1) of the power supply. |
| US08422178B2 |
Hybrid power relay using communications link
A control circuit for controlling an arc suppression circuit includes a serial communication link communicating a serial signal therethrough. The control circuit includes a microprocessor having a serial input communicating with the serial communication link. The microprocessor generates a control output signal in response to the serial signal. The control circuit further includes the arc suppression circuit having an electrical contact and operating in response to the control output signal to reduce an arc at the electrical contact. |
| US08422172B1 |
Actuator trace through a die
A disk drive is disclosed. The disk drive comprises a disk, a head configured to write data to and read data from the disk, and an actuator configured to position the head relative to the disk. The disk drive also comprises a die including internal circuitry electrically coupled to the head and a bypass trace electrically coupled to the actuator, wherein the internal circuitry comprises one or more preamplifiers and the bypass trace is electrically isolated from the internal circuitry. |
| US08422167B1 |
Textured magnetic poles for magnetic writers
A magnetic writer is formed with a texture on a surface of a write pole, preferably on a surface associated with the trailing edge of the writer. This texturing results in, in effect, a magnon-magnon scattering process that increases the surface damping of the pole and thus decreases the write field rise time. Rare earth elements can also be added in amounts sufficient to further increase the damping. |
| US08422160B1 |
Harmonic sensor
A system includes an input circuit, an analog to digital converter, first and second harmonic sensor modules, a head height control module, and a weighting function module. The input circuit receives analog signals from a read/write head. The analog to digital converter generates digital samples in response to the analog signals. The first and second harmonic sensor modules determine, from the digital samples, a first magnitude of a first frequency component and a second magnitude of a second frequency component, respectively. The head height control module estimates a height of the head over a storage medium in response to a comparison of the first magnitude and the second magnitude, and selectively adjusts the height in response to the estimated height. The weighting function module applies a time domain window function to the digital samples to create modified samples on which the first and second harmonic sensor modules operate. |
| US08422143B2 |
Retrofocus wide-angle lens system and optical instrument provided with the same
A retrofocus wide-angle lens system is provided, wherein the entire the wide-angle lens system is divided at a position that satisfies the following condition (1) between a theoretical front lens group having a negative refractive power, and a theoretical rear lens group having a positive refractive power including the diaphragm, at a minimum focal length, and wherein a flat parallel plate is disposed at the position that satisfies the following condition (1): 1.2<|fF/f|<4.0 . . . (1), wherein fF designates the focal length of the theoretical front lens group having a negative refractive power, and f designates the focal length of the entire the wide-angle lens system. |
| US08422137B2 |
Optical element, head-up display and method for producing optical element
An optical element includes first and second microlens array units on which microlenses are arranged. The microlenses are formed by lens contour having a polygonal shape in a plan view. The first and second microlens array units are arranged opposite to each other at a position where a distance between the first and second microlens array units is at least longer than a focal distance of the microlens, and are formed so that a direction of vertices of the lens contour of the microlens arranged on the first microlens array unit is different from a direction of vertices of the lens contour of the microlens arranged on the second microlens array unit. According to the above optical element, it is possible to appropriately suppress an influence of shift of the position between the first and second microlens array units, and it becomes possible to produce the optical element with ease. |
| US08422136B2 |
Electronic element wafer module; electronic element module; sensor wafer module; sensor module; lens array plate; manufacturing method for the sensor module; and electronic information device
An electronic element wafer module is provided, comprising: an electronic element wafer arranged with a plurality of electronic elements having a through hole electrode; a resin adhesion layer formed in a predetermined area on the electronic element wafer; a transparent cover member covering the electronic element wafer and fixed on the resin adhesion layer; and a plurality of resin optical elements adhered and fixed on the transparent cover member to be integrated in such a manner to correspond to the respective plurality of electronic elements. |
| US08422135B2 |
Optical sheet
An optical sheet for use as a display device surface, has a functional layer on at least one side of a transparent base material and has a diffusion factor on the outer surface and/or interior of the functional layer, wherein the relationship represented by the following formula (I) is satisfied. 0.16 |
| US08422132B2 |
Integrated planar polarizing device
The embodiments of the present invention provide an integrated planar polarizing device and methods of fabrication. The device, in the order of incidence along an optical path of an incident light beam from back position to front position, comprises a planar array of micro mirrors, a quarter wave retarder film and a reflective polarization plate. The micro mirrors are regularly spaced-apart in an identical tilted angle α relative to a base plane. The quarter wave retarder film is positioned between the micro mirrors and the reflective polarization plate. The reflective polarization plate is in parallel to the base plane and is adapted to transmit and polarize a first polarized light of the incident light beam in a first polarization state, and to reflect and polarize a second polarized light of the incident light beam in a second polarization, The micro mirrors are adapted to reflect the second polarized light passing and polarized through the quarter wave retarder film first time to pass and be polarized through the quarter wave retarder film second time, thereby converting the second polarized light to be a third polarized light in the first polarization state which can transmit the reflective polarization plate. The planar array of micro mirrors, the quarter wave retarder film and the reflective polarization plate are embedded in a transparent medium. The embodiments of the present invention could improve in device integration and simplification in assembly robustness. |
| US08422122B2 |
Splitter/combiner and waveguide amplifier incorporating splitter/combiner
Several embodiments of waveguide amplifiers incorporating a network of waveguides, signal splitters, solid state amplifiers and signal combiners are disclosed. The signal splitters and combiners have similar structures including parallel input and exit ports. In some embodiments, the solid state amplifiers are enclosed within the waveguide amplifier. |
| US08422121B2 |
Optical transmission apparatus and optical signal level checking method
An optical transmission node including an optical preamplifier to amplify input light and an optical postamplifier to amplify light output from the optical preamplifier, includes the optical postamplifier configured to generate amplified spontaneous emission light without signals input, the optical preamplifier configured to amplify the amplified spontaneous emission light from the optical postamplifier, a loopback switch configured to discouple a path of the light output from the optical preamplifier to the optical postamplifier, and couple a path of the light output from the optical postamplifier to the optical preamplifier. |
| US08422119B1 |
Compensation of beam walkoff in nonlinear crystal using cylindrical lens
A nonlinear optical system may include optics, a non-linear optical crystal, and a uni-axial focusing element. The non-linear optical crystal is configured to generate an output beam from a non-linear optical interaction with an input beam. The optics are configured to image the input beam to an original input beam waist within the non-linear optical crystal, whereby the output beam has an original output beam waist. The uni-axial focusing element is optically coupled to the non-linear optical crystal. The uni-axial focusing element is configured so that the output beam has a new output beam waist at approximately the same location as the original output beam waist. |
| US08422111B2 |
Solar array with multiple substrate layers providing frequency selective surfaces
A leaky travelling wave array of optical elements provide a solar wavelength rectenna. |
| US08422110B2 |
Optical switch
An optical switch changes the refractive index of an electro-optical crystal according to an electric field applied to the electro-optical crystal so as to switch depending on whether the electro-optical crystal enables incident light to pass through or whether the electro-optical crystal enables incident light to be totally reflected. The optical switch includes an electrode section including a plurality of electrodes and formed in the electro-optical crystal, a principal plane including the largest area of each electrode on a same plane of the electro-optical crystal; an insulator layer on at least one plane of the electro-optical crystal, the plane being parallel with the electrode section, the insulator layer made of an insulator with lower dielectric constant than the electro-optical crystal; and a temperature control device formed on and in contact with the insulator layer and controls a temperature of the electrode section or dissipates heat generated in the electrode section. |
| US08422108B2 |
Method and device for modulating light with optical compensation
An interferometric modulator (Imod) cavity has a reflector and an induced absorber. A direct view reflective flat panel display may include an array of the modulators. Adjacent spacers of different thicknesses are fabricated on a substrate by a lift-off technique used to pattern the spacers which are deposited separately, each deposition providing a different thickness of spacer. Or a patterned photoresist may be used to allow for an etching process to selectively etch back the thickness of a spacer which was deposited in a single deposition. A full-color static graphical image may be formed of combined patterns of interferometric modulator cavities. Each cavity includes a reflector, and an induced absorber, the induced absorber including a spacer having a thickness that defines a color associated with the cavity. |
| US08422104B2 |
Image processing apparatus, image processing method, and computer-readable recording medium storing image processing program
An image processing apparatus is disclosed. In the image processing apparatus, when preview images and/or thumbnail images of image data of plural documents read by a scanner section are formed, a preview image and/or a thumbnail image of the image data of a document is formed before the scanner section starts to read image data of a next document, and the formed preview image and/or the formed thumbnail image is stored in a storage unit. When the preview image and/or thumbnail image is displayed, the stored preview image and/or the stored thumbnail image is displayed so that the image processing apparatus can immediately and easily display the preview image and/or the thumbnail image while maintaining the productivity of the image processing apparatus. |
| US08422103B2 |
Optimization of gray component replacement
Methods and systems herein provide for color conversion. Such color conversion includes a method of optimizing gray component replacement in a color image that includes receiving a color image from an input imaging device (e.g., a digital camera, scanner, etc), determining a color gamut of an output imaging device, such as a printer, and generating a CIELab to CMY numerical model to convert the color image to a color space within the color gamut of the output imaging device. The method also includes generating a CMYK to CIELab numerical conversion model, removing a portion of CMY color values generated from the CIELab to CMY numerical conversion model, and replacing the removed portion of the CMY color values with black color values. The method also includes optimizing CMYK color values via a multidimensional optimization using the CMYK to CIELab numerical model. |
| US08422101B2 |
Color conversion device
A color conversion device includes a profile storage unit, a saturation determining unit, a first selecting unit, and a conversion unit. The profile storage unit stores a plurality of profiles, each profile indicating correspondence relationships between input color signals representing values in an input color space defined in an input-side device and output color signals representing values in an output color space defined in an output-side device. The saturation determining unit is configured to determine a saturation of pixel data in input image data, the input image data being represented by input color signals and including a plurality of regions, each region containing at least one set of pixel data. The first selecting unit is configured to select, for each region, one profile among the plurality of profiles as an active profile based on the saturation of the at least one set of pixel data that is contained in the each region. The conversion unit that converts the input image data into print data represented by output color signals, by converting each set of pixel data based on the active profile that is selected for a region that contains the each set of pixel data. |
| US08422100B2 |
Method and apparatus for converting color-describing input data, which are suitable for graphical output using an output device, into color-describing adapted output data
In a method to convert color-describing input print data suitable for graphical output with aid of an output apparatus into color-describing output print data, color proportions, defined by the input print data, of at least one region to be inked with at least two color separations, are determined, and a color space value to be generated with aid of the color separations is determined. An association rule is determined to convert the input print data into the output print data while retaining the color space value. A total areal coverage of areal coverages defined by the output print data of the color separations to generate the color space value is reduced relative to areal coverages of the color separations defined by the input print data. The input print data is converted into the output print data with aid of the determined association rule. |
| US08422097B2 |
Apparatus and method for image processing and processing program
Disclosed is an image processing method for processing an image obtained by reading a document plate on which at least one document is placed. The method includes a first detecting step of specifying a first rectangular region including all of objects included in the image to detect the coordinates of each vertex thereof, an identifying step of identifying on each object whether it is a document item, an eliminating step of eliminating the object which is not a document item from the image, a second detecting step of specifying a second rectangular region to detect the coordinates of each vertex thereof, the region including all of the objects after elimination and having a minimum area, a comparing step of comparing the coordinates of the vertices detected in the first and second detecting steps, and a determining step of determining a method of cropping the document based on the comparison result. |
| US08422089B2 |
Scanning device
A scanning device including a base, a guiding module and a scanning head is provided. The guiding module includes a guiding rod, a guiding element, a sliding element and an elastic element. The guiding rod is fixed to the base. The guiding element has a notch, wherein the guiding rod is slidingly disposed at the notch along a first axial direction. The sliding element is slidingly disposed at the guiding element along a second axial direction substantially perpendicular to the first axial direction. The elastic element is fixed to the guiding element and contacts with the sliding element, wherein the sliding element pushes the guiding rod to contact an inner wall of the notch along the second axial direction by an elastic force of the elastic element, so as to prevent the guiding rod from swaying during a scanning process. |
| US08422083B2 |
Calibration mechanism and scanner has the calibration mechanism
A calibration mechanism is positioned in a scanning device having a scanning module for scanning a document. The scanning module defines a scanning line perpendicular to a scanned area of the document. The calibration mechanism includes a calibration unit, a supporting unit supporting the calibration unit, and a driving unit. The calibration unit is positioned to face the scanning module and aligned with the scanning line. The driving unit drives the calibration unit to move close to the scanning module and away from the scanning module along the scanning line. The scanning module obtains great brightness value by scanning the calibration unit, if the calibration unit is close to the scanning module. The scanning module obtains small brightness value by scanning the calibration unit, if the calibration unit is far from the scanning module. |
| US08422082B2 |
Reducing ink bleed artifacts for RGB images
A method for modifying an input digital image having three color channels, to form a modified digital image suitable for use by an inkjet printer having reduced ink bleed artifacts comprising computing a transformed digital image containing at least a black color channel and a color dependent scale factor channel, computing a filtered black color channel using a convolution operation, and forming the modified digital image in response to the corresponding pixel values of the color dependent scale factor channel and the filtered black color channel, so that when the modified digital image is used to produce a printed image on an inkjet printer there are reduced ink bleed artifacts. |
| US08422081B2 |
Image forming apparatus and image forming method capable of revising gray image
An apparatus includes a gray converter to convert an inputted color image to be printed into a gray conversion image and to outputs the gray conversion image a difference calculator to calculate a at least one difference value between at least one color channel image with respect to the color image and the gray conversion image; and a gray reviser to revise the gray conversion image based on the at least one difference value and to output a gray conversion image. |
| US08422080B2 |
Image processing apparatus and image processing method in which composite tone pixel data is provided based on tone pixel data generated by error diffusion processing and dither processing
An image processing apparatus 101 that generates output image data based on multi-level image data is provided with an error diffusion processing unit 104 that generates tone pixel data from the pixel-of-interest data according to an error diffusion method, a dither processing unit 103 that generates tone pixel data from the pixel-of-interest data according to a dither processing method, an allotment ratio determination unit 105 that increases the allotment ratio with respect to the error diffusion method as the difference between the maximum density and the minimum density increases, and a composition unit 109 that composites the tone pixel data for a pixel of interest that has been generated by the error diffusion processing unit 104 and the dither processing unit 103 according to the allotment ratios determined by the allotment ratio determination unit 105, and outputs the composited data as pixel data of the output image data. |
| US08422079B2 |
Image forming apparatus and image correction method for correcting scan-line position error with error diffusion
It is determined whether the pixel of interest in image data to be processed belongs to area 1 not close to a scan line changing point where a scan line changing process is done (S101). If the pixel of interest belongs to area 1, an error diffusion process is performed using an error diffusion matrix for area 1 (S102). If the pixel of interest belongs to area 2 close to the scan line changing point, the error diffusion process is performing using an error diffusion matrix for downward scan line changing for area 2 when the scan line changing process is changing to a lower line, or an error diffusion matrix for upward scan line changing for area 2 when the scan line changing process is changing to an upper line. |
| US08422078B2 |
Method of processing neutral gray color print jobs as monochrome black during billing detection and printing as a neutral gray composite black
A method of converting a RIPped K-only page or pixels to composite black in a digital print engine is included which executes the conversion process during current job workflow, while detecting the K-only page or pixels for billing purposes as K-only, and printed out as composite black. |
| US08422077B2 |
Method and apparatus for performing printing job by adjusting color information
A method and apparatus to perform a printing job by adjusting color information include updating a predetermined color conversion table stored in an image forming device by inputting color adjustment information from a user, and performing the printing job using the updated color conversion table. Accordingly, the printing job is performed by adjusting color information regardless of whether an emulator of the image forming device supports a color adjustment function, increasing the efficiency of the printing operation. Additionally, when printing jobs are performed by repeatedly adjusting color information using the same color adjustment information, since the color information is converted using the same color conversion table as the color conversion table is updated using the color adjustment information, a waste of time for the color conversion is reduced. Furthermore, a function of the emulator does not have to be changed to perform a printing job, even if a function of an image forming device driver is changed to add a color adjustment function to the image forming device. |
| US08422074B2 |
Print data generating device
A print data generating device includes: (a) a display; (b) a print-image-region selector for selecting a print image region which is a region of an original-data-based image, such that the selected print image region corresponds to each of desired images; (c) a media size recognizer for recognizing a size of a print medium; (d) a print layout determiner for determining, based on a size of the print image region and the recognized size of the print medium, a print layout of the desired images that are to be printed onto the print medium, such that a number of the desired images printable onto the print medium is maximized in the determined print layout; and (e) a display controller for causing the display to display a print layout preview showing the desired images that are arranged according to the determined print layout. The print data generating device generates a print data which is used for printing, in conformity with the print layout preview, the desired images arranged according to the determined print layout, onto the print medium. |
| US08422070B2 |
Image processing apparatus, method, and computer readable storage medium for toner reduction based on image data type and area size
The image processing apparatus is provided with: a reception unit that receives image information; an acquisition unit that acquires target information on a targeted level of an image forming material used at image formation based on the image information received by the reception unit; and a determination unit that determines a content of processing for reducing the image forming material for each portion of the image information received by the reception unit in accordance with the target information acquired by the acquisition unit. |
| US08422067B2 |
Image forming apparatus and method utilizing see-through prevention patterns to increase transillumination document security
An image forming apparatus has an image data reading section that reads image data formed on a document, an image processing section that separates regions where effective information is present from the read image data so as to determine, for every separated region, a shape of a see-through preventing pattern and a position at which the see-through preventing pattern is formed, and an image printing section that prints the determined see-through preventing pattern at a part on a back surface of a recording sheet on which the document is printed, on the basis of the information of the determined position at which the see-through preventing pattern is formed, the part corresponding to any of the regions where the effective information of the document is present. |
| US08422056B2 |
Electric apparatus
When an accepting unit is removed from a main unit, a situation of the main unit is detected whether belonging to waiting situations, operation situations, malfunction situations, or the like. A display part then displays images in accordance with the detected situations. The display part is arranged on the accepting unit that is removable from the main unit. Therefore, it is possible to change images displayed on the display part in accordance with the situations of the main unit at the time when the accepting unit is removed. |
| US08422055B2 |
Computer readable medium, image processing apparatus, image processing system and image processing method
A computer readable medium storing a program causing a computer to execute a process for managing image information, the process includes: accepting image information and registration destination information that indicates a registration destination of the image information; acquiring a registration condition determined based on feature information of the image information that is allowed to be registered in the registration destination indicated by the accepted registration destination information; extracting the feature information from the accepted image information; and registering the accepted image information in the registration destination when the extracted feature information satisfies the acquired registration condition. |
| US08422054B2 |
Remote copy system, image forming apparatus, control method therefor, and storage medium
A remote copy system capable of improving the quality of an image formed by remote copy. The remote copy system includes a plurality of image forming apparatuses connected to a network. A controller unit of a local apparatus that reads an image of an original accepts input settings and determine an image process to be executed, based on the input settings. The controller unit determines an image forming apparatus that is to execute the determined image process, based on performance of each of image forming apparatuses connected to a network. Remote copy is executed by causing the determined image forming apparatus to perform the determined image process on data of the image of the original read by the local apparatus, and causing a remote apparatus to perform image formation based on the processed image data. |
| US08422053B2 |
Print options for productivity
In an embodiment, a document processing application selects, based on an objective for a print job, one or more document processing devices and/or one or more parameter values for processing the print job. The objective may be selected by a user. Examples of objectives for a print job include fastest time to process the print job, the lowest cost to process the print job, the least amount of labor required to process the print job, the lowest cost of labor required to process the print job, and the highest quality finished product. The print job is sent to a printing device and a finishing device, one or both of which may have been selected, based on the objective, by the application. Any selected parameter values (whether selected by the application, or manually selected) are sent to the appropriate document processing device. |
| US08422050B2 |
Image forming apparatus with a plurality of modules receiving a common trigger signal
An apparatus is provided that can perform distributed control for a plurality of operation units, without concentrating control in a single device. The apparatus includes a plurality of modules that respectively correspond to a plurality of operation units, each module including a communication device, a functional block setting device and a functional block connected with a corresponding operation unit. The functional block has a register that holds, in an updateable condition, control values relating to various controls of the corresponding operation unit. Each module is triggered by an operation start signal input to a start terminal of the communication device to start an operation for controlling a corresponding operation unit in accordance with each control value held in the register device. |
| US08422047B2 |
Image processing apparatus, image processing method, and program product which determines whether there is a restriction of the output of document data
A storage unit stores therein a plurality of document data and a reoutput condition associated with any of the document data. The reoutput condition defines an output condition used when the document data is reoutput. A selection receiving unit receives selections of the document data including at least one reoutput-conditioned document data that is associated with the reoutput condition as document data to be output. A condition setting unit sets the reoutput condition associated with selected reoutput-conditioned document data as the output condition. An image output unit outputs all the document data of which the selections are received by the selection receiving unit on the output condition set by the condition setting unit. |
| US08422046B2 |
Print setting based reprinting
This invention provides an image processing method and apparatus capable of easily reprinting the same print data in various output forms at a high speed without any large-capacity storage device, in which when a page image corresponding to print data input from an external device is to be generated, the print data is analyzed to generate the page image, print data of at least one job is held, a page image of at least one page that is generated by analyzing the print data is held, and when reprinting is designated, either of the spooled print data and page image is read out to perform reprinting. |
| US08422045B2 |
Image forming apparatus specifying a file to be printed from files stored in a storage medium
One aspect of the present invention can include an image forming apparatus having an access portion configured to access an external storage medium, a file specification portion configured to specify a file to be a printing object, from files stored in the storage medium, a printing portion configured to execute, in accordance with printing conditions, data development processing of the file specified by the file specification portion and execute processing of printing to a printing medium on the basis of the developed data obtained by the data development processing, a printing history storage portion configured to store printing conditions used in the printing processing executed by the printing portion as printing history information. This aspect of the present invention can further include an acceptance portion configured to accept a printing history use instruction, and a printing control portion configured to, when the printing history use instruction is received and a file is specified by the file specification portion, cause printing processing of the specified file to be executed by the printing portion in accordance with the printing conditions stored as the printing history information. |
| US08422043B2 |
Watermarked document reading apparatus with improved error processing
In a watermarked document printing apparatus, secret information is divided, error correction encoding is performed to each divided pieces of information, and the secret information is converted into a pattern image and embedded in paper. In a watermarked document reading apparatus, after extracting signals from the pattern image on the paper, a reading error is detected by decoding the error correction code for each divided pieces of information, and the portion where the reading error exists is read again. The scanning process is performed again only to the portion where the decoding cannot be performed due to the temporal malfunction of the scanner or the like. Therefore, the pattern image can efficiently be obtained. |
| US08422035B2 |
Distance-measuring method for a device projecting a reference line, and such a device
A device projecting a reference line, wherein at least one part of the reference path may be detected upon passing through by the human eye and/or detectors as a reference line. In conjunction with passing through the reference path, a distance measurement occurs to at least one point on the reference path by transmitting a measurement beam that is parallel or coaxial to the reference beam or using the reference beam as a measurement beam. After receipt of portions of the reflected measurement beam, a signal is derived from said portions and a distance from at least one point is determined from the signal, wherein the guidance along the reference path is repeated at least once more and, upon each instance of passing through the reference path, a distance or distance-related variable is determined for each point. |
| US08422032B2 |
Position determination method
Chronologically correlated position pairs are generated in a position determination method using a unit, particularly a working machine (4), that changes its own position, having a GNSS receiver (2) and an optically measurable reference point (A) disposed in a spatially stationary manner, particularly an all-around prism (3), and having a geodetic device with a distance- and angle-measuring functionality, particularly a tacheometer (1). To this end, relative positions of the reference point (A) are determined in an interior reference system by optically measuring distance and at least one angle of the geodetic device to the reference point (A) and GNSS positions of the GNSS receiver in an exterior reference system. Equal times, or relative and GNSS positions allocated to a time frame are associated with each other, particularly in pairs, thus forming position pairs. In addition, the position pairs perform a derivation from a balanced relationship between the exterior and interior reference system, particularly from balanced transformation parameters, and determine the position of the unit, of the geodetic device, and/or of the measurable new point from said balanced relationship. |
| US08422031B2 |
Focusing methods and optical systems and assemblies using the same
A method for controlling a focus of an optical system. The method includes providing a pair of incident light beams to a conjugate lens. The incident light beams are directed by the lens to converge toward a focal region. The method also includes reflecting the incident light beams with an object positioned proximate to the focal region. The reflected light beams return to and propagate through the lens. The method also includes determining relative separation measured between the reflected light beams and determining a degree-of-focus of the optical system with respect to the sample based upon the relative separation. |
| US08422026B2 |
Spectrally controllable light sources in interferometry
The time delay (and therefore the OPD) between object and reference beams in an interferometer is manipulated by changing the spectral properties of the source. The spectral distribution is tuned to produce a modulation peak at a value of OPD equal to the optical distance between the object and reference arms of a Fizeau interferometer, thereby enabling the use of its common-axis configuration to carry out white-light measurements free of coherence noise. Unwanted interferences from other reflections in the optical path are also removed by illuminating the object with appropriate spectral characteristics. OPD scanning is implemented without mechanical means by altering the source spectrum over time so as to shift the peak location by a predetermined scanning step between acquisition frames. Finally, the spectrum is controlled on a pixel-by-pixel basis to create a virtual surface that matches the profile of a particular sample surface. |
| US08422010B2 |
Methods and systems for determining a characteristic of a wafer
Methods and systems for determining a characteristic of a wafer are provided. One method includes generating output responsive to light from the wafer using an inspection system. The output includes first output corresponding to defects on the wafer and second output that does not correspond to the defects. The method also includes determining the characteristic of the wafer using the second output. One system includes an inspection subsystem configured to illuminate the wafer and to generate output responsive to light from the wafer. The output includes first output corresponding to defects on the wafer and second output that does not correspond to the defects. The system also includes a processor configured to determine the characteristic of the wafer using the second output. |
| US08422007B2 |
Optical measurement device with reduced contact area
An optical measurement device for measuring an optical appearance of a surface of a sample includes a measuring head which can be brought into contact with the surface of the sample. The measuring head includes an illumination device for illuminating the surface with an illumination beam, and a detection device or detecting a response beam. The response beam is the response of the sample to the illumination beam. The detection device includes a screen for intercepting the response beam, where the screen extends approximately a quarter hemisphere in order to realize measuring head with a small contact area with the surface. |
| US08422006B2 |
System and method for testing lens module
A system for testing a lens module is provided. The lens module includes a barrel and a lens received in the barrel. The barrel includes a side surface which is parallel to the central axis thereof. The lens includes a smooth flat non-optical surface. The system includes an alignment device, a position detection device, and a processing device. The alignment device includes a leveling unit and an alignment block including an alignment surface for being in contact with and parallel to the side surface. The leveling unit adjusts the alignment surface to be perpendicular to a horizontal plane such that the side surface is perpendicular to the horizontal plane. The position detection device determines the three dimensional coordinates of three non-collinear points on the non-optical surface. The processing device determines whether the non-optical surface is parallel to the horizontal plane according to the coordinates of the three non-collinear points. |
| US08422003B2 |
Device and method for the classification of transparent component in a material flow
A device is disclosed for the classification of a transparent component of a material flow using an optical detector unit, with allocatable optical axis which is directed toward the material flow, at least one illumination unit for illuminating the material flow from a space over the material flow, in which the optical detector unit is also contained, and a classifier, which classifies the component based on information which is recorded from the component using the optical detector unit, and a decision criterion. A retroreflector is provided at least longitudinally relative to the optical axis of the detector unit, downstream from the material flow in the viewing direction of the detector, the illumination unit provides at least two light sources, with first light source emitting light of a first type and a second light source emitting light of a second type. |
| US08421998B2 |
Optical system, exposure apparatus, and method of manufacturing electronic device
An aperture diaphragm plate is provided to define a light flux on a pupil plane of an optical system or a plane or surface disposed in the vicinity of the pupil plane. An aperture, which is formed in the aperture diaphragm plate, has a three-dimensional shape corresponding to an optimum pupil shape of the optical system. It is possible to improve the imaging characteristic brought about by the optical system by providing the optimum pupil shape of the optical system. |
| US08421997B2 |
Active spot array lithographic projector system with regulated spots
An active spot array projection system particularly for microlithographic projection includes a spatial light modulator, such as a digital micromirror device, having individually addressable elements. A focusing array, such as a microlens array, focuses elements transverse segments of the light beam into spots. Within an imaging optic between the spatial light modulator and the focusing array, an spatial frequency filter attenuates certain spatial frequencies of light arising from the irregularities of the individually addressable elements while avoiding attenuating higher spatial frequencies of light arising from the peripheral boundaries of the individually addressable elements for regulating light distributions of the spots while limiting crosstalk between adjacent spots. |
| US08421996B2 |
Lithographic apparatus
A barrier member is provided for use in immersion lithography. The barrier member includes an extractor assembly on a bottom surface configured to face the substrate. The extractor assembly includes a plate configured to split the space between a liquid removal device and the substrate in two such that a meniscus is formed in an upper channel between the liquid removal device and the plate and below the plate between the plate and the substrate. |
| US08421994B2 |
Exposure apparatus
Electric power is generated by using a generator equipped with: a coil unit that is arranged on a barrel platform and incorporates coils; and a magnet unit that has a magnet section arranged on a protruding section of a column separated from the barrel platform in terms of vibration and generates an electromotive force in a non-contact state with the coils, and a motor that drives the magnet section, and thus a wiring that supplies electric power to the barrel platform does not have to be used. Accordingly, vibration that has been propagated to the barrel platform through the wiring can be precluded. |
| US08421993B2 |
Fluid handling structure, lithographic apparatus and device manufacturing method
A fluid handling structure is disclosed in which the size and arrangement of the fluid extraction openings is specified in order to reduce the vibrations which are transmitted to the fluid handling structure as a result of two-phase extraction. The area of each fluid extraction opening and/or the total area of all of the fluid extraction openings and/or the space in between neighboring fluid extraction openings may be controlled. The reduction in vibrations increases the accuracy of the exposure. |
| US08421992B2 |
Exposure method, exposure apparatus, and method for producing device
An exposure method forms an immersion area in at least a part of a substrate including a projection area of a projection optical system and projects an image of a mask pattern onto the substrate through liquid between the projection optical system and the substrate. Distribution of the mask pattern is measured and adjustment is made so that a desired image of the pattern is projected onto the substrate according to distribution of the exposure light incident into the liquid between the projection optical system and the substrate when exposing the substrate. It is possible to expose the substrate with the pattern accurately regardless of the distribution of the mask pattern. |
| US08421987B2 |
Discrimination medium and production method therefor
A discrimination medium, which can have much information, can be produced on a small scale at low cost, and enables change of a sticker design at low cost, is provided. A cholesteric liquid crystal layer, having a fine asperity for forming a hologram, is formed on a transparent first substrate. A print layer composed of a black ink is formed on a transparent second substrate. The substrates are affixed to each other via a bond layer, so that a discrimination medium is obtained. In the discrimination medium, the display content obtained by the print layer is changed, so that the display content for discrimination can be changed at low cost. |
| US08421985B2 |
Liquid crystal display device and manufacturing method thereof
An electro-optical device typified by an active matrix type liquid crystal display device, is manufactured by cutting a rubbing process, and in addition, a reduction in the manufacturing cost and an improvement in the yield are realized by reducing the number of process steps to manufacture a TFT. By forming a pixel TFT portion having a reverse stagger type n-channel TFT, and a storage capacitor, by performing three photolithography steps using three photomasks, and in addition, by having a uniform cell gap by forming wall-like spacers by performing one photolithography step, without performing a rubbing process, a multi-domain perpendicular orientation type liquid crystal display device having a wide viewing angle display, and in which a switching direction of the liquid crystal molecules is controlled, can be realized. |
| US08421984B2 |
Liquid crystal display device
The electrode structure layer includes a transparent insulating film formed of a semiconductor oxide or a semiconductor nitride, the transparent insulating film being formed so as to separate a surface of the liquid crystal and a surface of a color filter layer facing each other; and a first transparent conductive film and a second transparent conductive film both formed of an oxide semiconductor, the first transparent conductive film and the second transparent conductive film being formed on both sides of the transparent insulating film. The color filter layer includes a first region formed of one colored layer; and a second region formed of at least two laminated colored layers. The second region has a convex portion, the convex portion being formed of the at least two laminated colored layers, and the convex portion retains a gap formed between the first substrate and a second substrate. |
| US08421982B2 |
Display substrate, method of manufacturing the display substrate and display apparatus having the display substrate
A display substrate includes a pixel, an organic layer and a shorting pad structure. The pixel electrode is arranged at a display area of a base substrate, and the pixel electrode is electrically connected to a transistor connected to a gate line and data line. The organic layer is arranged at the base substrate, and the organic layer is arranged between the transistor and the pixel electrode. The shorting pad structure is disposed at a peripheral area of the display area, and the shorting pad structure includes a first pad electrode at a lower height, a second pad electrode at a higher height, and a first height compensation pattern interposed between the first and second pad electrodes. A contact hole is defined through the organic layer so that second pad electrode can be electrically connected there through to the first pad electrode. |
| US08421980B2 |
Liquid crystal display device
A liquid crystal display device includes a liquid crystal panel including a display unit in which pixels are provided in the form of a matrix and a plurality of pad units provided at a peripheral portion in at least one side of the display unit and including a plurality of connection pads having widths different from each other, and a tape carrier package including a plurality of output pads corresponding to the plurality of pad units, in which driving integrated circuits are mounted on the output pads to drive the liquid crystal panel, and the output pads have widths different from each other corresponding to the plurality of connection pads. |
| US08421972B2 |
Liquid crystal display device
There is provided a liquid crystal display device of high picture quality with high brightness and small display unevenness.A vertical alignment type liquid crystal display device which has a plurality of pixels includes: a first electrode which includes, in each of the plurality of pixels, a plurality of first branch portions extending in a first direction and a plurality of second branch portions extending in a second direction that is different from the first direction; a second electrode disposed so as to oppose the first electrode; and a liquid crystal layer interposed between the first electrode and the second electrode, wherein a width of each of the plurality of first branch portions and the plurality of second branch portions is in a range not less than 1.4 μm and not more than 8.0 μm. |
| US08421971B2 |
Liquid crystal display module and one-piece back plate thereof
The present invention provides a liquid crystal display (LCD) module and a one-piece back plate thereof. The one-piece back plate of the LCD module comprises a plurality of first stepped portions, a plurality of second stepped portions and a plurality of engaging portions extending and being bent from the bottom thereof in sequence. An optical film assembly is supported and mounted by the first stepped portions, and a liquid crystal panel is supported and mounted by the second stepped portions. With the design of the one-piece back plate of the LCD module of the present invention, it is possible to omit the housing and the front frame, and the liquid crystal panel can be directly arranged on the one-piece back plate, so as to simplify and speed up the assembly process, and to further reduce the research cost, development cycle and production cost thereof. |
| US08421967B2 |
Liquid crystal display device and process for producing liquid crystal display device
Transflective-type and reflection-type liquid crystal display devices having a high image quality are provided at low cost.A liquid crystal display device according to the present invention is a liquid crystal display device having a reflection region for reflecting incident light toward a display surface, the reflection region including a Cs metal layer (metal layer), a gate insulating layer formed on the Cs metal layer, a semiconductor layer formed on the gate insulating layer, and a reflective layer formed on the semiconductor layer. On the surface of the reflective layer, a first recess and a second recess located inside the first recess are formed. The Cs metal layer and the semiconductor layer each have an aperture, and one of the first recess and the second recess is constituted by the aperture of the Cs metal layer, and the other is constituted by the aperture of the semiconductor layer. |
| US08421960B2 |
Liquid crystal display having in-cell backlight
A liquid crystal display having an in-cell backlight and method of manufacturing the same is provided. The liquid crystal display includes a front substrate and a rear substrate opposite to each other. A color filter layer comprises a black matrix, a color filter and a common electrode on the front substrate. An array element comprises a plurality of gate lines and data lines having to cross each other, and a pixel electrode with the common electrode to generate electric field on the rear substrate. A liquid crystal layer is disposed between the color filter layer and the array element. A light source layer is disposed between the rear substrate and the array element and configured to supply light to the front substrate. At least one polarization plate is laminated on the light source layer. |
| US08421959B2 |
Transparent see-through display device
There is provided a see-through display device. A see-through display device comprises a liquid crystal plate filled with liquid crystals; first and second orientation plates respectively positioned on upper and lower surfaces of the liquid crystal plate, and controlling an initial alignment state of the liquid crystals; first and second conductive plates respectively positioned on an upper surface of the first orientation plate and a lower surface of the second orientation plate, and being filled with a conductive material; first and second transparent plates respectively positioned on an upper surface of the first conductive plate and a lower surface of the second conductive plate; first and second polarizing plates respectively positioned on an upper surface of the first transparent plate and a lower surface of the second transparent plate; and a transparent light guide plate spaced apart from a lower surface of the second polarizing plate, and allowing beams incident from a light source positioned at one side thereof to be totally reflected and emitted upward. Accordingly, a see-through display device comprises a transparent optical display device and a transparent light guide plate having a light source disposed at one side thereof, so that the display device can be optically transparent even when it is not operated. |
| US08421950B2 |
Liquid crystal display device
The present disclosure relates to the present disclosure relates to a liquid crystal display device adapting a guide panel having a reinforced structure. A liquid crystal display panel according to the present disclosure comprises: a liquid crystal display panel; a light guide plate disposed under the liquid crystal display panel; an LED light source disposed one side of the light guide plate; a cover bottom housing the LED light source and the light guide plate; and a guide panel supporting the liquid crystal display panel, and wraping the LED light source and the light guide plate at outside, wherein the guide panel has an outer vertical surface and a support rib apart from the outer vertical surface inward to form a space for holding a vertical surface of the cover bottom. With simple structure on the guide panel, the reliability of the liquid crystal display panel is enhanced remarkably. |
| US08421949B2 |
Flat panel display device
A flat panel display device includes a rear housing defining a containing space, a support member disposed in the containing space and secured to the rear housing, a display panel secured to a front face of the support member, a front frame, and a motherboard. The front frame covers a peripheral portion of a front face of the display panel, is connected to the rear housing, and includes light guides extending into corresponding holes in the front frame. The motherboard includes a board body secured to a rear face of the support member, a plurality of press buttons disposed on the board body and extending respectively holes in the rear housing, a plurality of light-emitting diodes disposed at the board body, and a wireless signal receiver disposed on the board body. The light-emitting diodes and the wireless signal receiver correspond to the rear ends of the light guides. |
| US08421946B2 |
Backlight unit and liquid crystal display device having the same
A backlight unit is provided. The backlight unit includes: a bottom cover having a height difference region; a flexible printed circuit board side-contacting an inner side, the inner side corresponding to the height difference region of the bottom cover; a plurality of light emitting diodes mounted on the flexible printed circuit board; a light guide plate disposed on the same plane as the light emitting diode; and a reflective sheet attached to a bottom of the light guide plate to correspond to the height difference region of the bottom cover. |
| US08421945B2 |
Liquid crystal display device
A liquid crystal display device includes a liquid crystal display panel having a plurality of pixels; a detector included in an interior of the liquid crystal display panel for detecting a variance of a kickback voltage; and a compensation common voltage generator reflects the variance of the kickback voltage detected by the detector and controls a common voltage to be supplied to the liquid crystal display panel. The detector includes at least one or more detection pixels, and the detection pixels are electrically connected to a gate line arranged in the liquid crystal display panel and to a detection line which is arranged neighboring to the data line disposed close to the edge of the liquid crystal display panel. |
| US08421941B2 |
TFT substrate and method of manufacturing the same
There is provided a TFT substrate including a gate electrode having a thick film part and a thin film part with a smaller film thickness than the thick film part, a semiconductor active film formed above the thick film part and the thin film part of the gate electrode, an ohmic contact film formed on an inside of the semiconductor active film and on the semiconductor active film corresponding to the thin film part on an outside of the thick film part, and an electrode film constituting a source electrode and a drain electrode, having a planar shape identical to or on an inside of the ohmic contact film, and formed on the ohmic contact film. |
| US08421940B2 |
Display device and manufacturing method thereof
A display device includes a TFT substrate in which a plurality of first TFT elements each having an active layer of an amorphous semiconductor and a plurality of second TFT elements each having an active layer of a polycrystalline semiconductor are disposed on a surface of an insulating substrate, wherein the first TFT element and the second TFT element each have a structure with a gate electrode, a gate insulating film, and the active layer stacked in this order on the surface of the insulating substrate and a source electrode and a drain electrode both connected to the active layer via a contact layer above the active layer, and the active layer of the second TFT element has a thickness of more than 60 nm in a position where the contact layer is stacked. |
| US08421939B2 |
Display control substrate, manufacturing method thereof, liquid crystal display panel, electronic information device
A display control substrate and a method of manufacturing thereof, includes a thin film transistor (TFT) that is provided for each of a multiplicity of pixel sections provided in two dimensions and is an inversely staggered TFT. A gate electrode wiring, a Cs wiring and a source electrode wiring of the TFT are simultaneously formed. An interlayer insulation film is deposited after gate insulation films and semiconductor islands are formed. After contact holes are formed in the interlayer insulation film, at the time of forming a pixel electrode, a connecting portion for connecting cut portions of the source electrode wirings via the contact hole is formed. The source electrode wiring is connected to a source region of the semiconductor island by the connecting portion. This process reduces the number of masks required at the time of manufacturing a TFT substrate, and also reduces the lead time, increases the yield and reduces the manufacturing cost. |
| US08421935B2 |
Method for manufacturing liquid crystal display device
A method for manufacturing a liquid crystal display device includes the steps of combining a first substrate and a second substrate between which a liquid crystal layer is to be held, and forming a functional member directly on a surface of the first substrate opposite to the side holding the liquid crystal layer. |
| US08421933B2 |
Shutter glasses capable of viewing a plurality of types of monitors whose image light outputs have different polarization directions
A three-dimensional liquid crystal shutter glasses includes a frame and two lenses, where the frame includes two sub-frames, the two lenses can be deposed on the two sub-frames in any one of a plurality of specific angles, respectively, and the plurality of specific angles are for a user to watch a plurality of types of monitors whose images have different polarization directions. |
| US08421930B2 |
Digital broadcast receiver
A digital broadcast receiver 1 capable of receiving a program broadcast by a plurality of services from among broadcast electric waves to which a single physical channel is assigned and provided with at least an I/O device (a display 18) is provided. The digital broadcast receiver includes a control unit (15) for determining whether or not there are identical services in services which the digital broadcast receiver has received in each of a plurality of regions, and for, when determining that there are identical services in the services, generating a service list for each of the regions (countries) or for each of the services (broadcast stations) while merging the physical channels, and then displaying the service list generated thereby on the I/O device to urge a viewer to perform a selection input. |
| US08421928B2 |
System and method for detecting scene change
The present invention relates to a system for scene change detection including a decoder decoding input digital video data into video data compressed by a single codec or uncompressed video data in a codec-independent format, a normalizer normalizing the video data decoded by the decoder in a temporally and spatially uniform format, and a scene change detector computing a mode ratio for each frame of the normalized video data through a mode determination, and determining, when a frame has a mode ratio higher than a preset threshold value, that a scene change has occurred at the frame. The decoder decodes video data compression-coded by various video codecs into uncompressed video frames. |
| US08421927B2 |
Display device and color adjustment method for display device
A display device includes a display panel, a light source module and a skin-color detector. The display panel has a plurality of sub pixel units, and the sub pixel units include red sub pixel units, green sub pixel units, blue sub pixel units and white sub pixel units. The light source module is disposed at a side of the display panel and the light source module includes a white light source and a yellow light source distributed in the white light source. The skin-color detector is electrically connected to the display panel, wherein the skin-color detector detects the skin-color area proportion of an image signal of the display panel. |
| US08421924B2 |
Image processing circuit and image processing method
An image processing method and its associated image processing circuit for processing an image based on a sequential couleur avec memoire (SECAM) system are provided. The image includes a first pixel, a second pixel and a third pixel, which are successively arranged in a same vertical line and are respectively corresponding to a first image signal and a second image signal and a third image signal. The image processing method includes steps of calculating a chroma signal via a vertical filtering process according to the first image signal, the second image signal and the third image signal; calculating a chroma angular frequency via a frequency modulation process according to the chroma signal; and generating a chromaticity according to the chroma angular frequency. |
| US08421923B2 |
Object-based audio-visual terminal and bitstream structure
As information to be processed at an object-based video or audio-visual (AV) terminal, an object-oriented bitstream includes objects, composition information, and scene demarcation information. Such bitstream structure allows on-line editing, e.g. cut and paste, insertion/deletion, grouping, and special effects. In the interest of ease of editing, AV objects and their composition information are transmitted or accessed on separate logical channels (LCs). Objects which have a lifetime in the decoder beyond their initial presentation time are cached for reuse until a selected expiration time. The system includes a de-multiplexer, a controller which controls the operation of the AV terminal, input buffers, AV objects decoders, buffers for decoded data, a composer, a display, and an object cache. |
| US08421918B2 |
De-interlacing video
A video de-interlacer forms a first new-pixel value from motion compensation of a pixel of a previous field with a first motion vector and forms a second new-pixel value from motion compensation of a pixel of a next field with a second motion vector. These two new-pixel values are then summed with a weighting which depends upon the respective confidence values associated with the two motion vectors. |
| US08421911B2 |
Image sensor module and camera module
An exemplary image sensor module includes a plate, an image sensor, and a number of conductive wires. The plate includes a top surface, a bottom surface, a light passing through hole, a number of spaced receiving holes extending through the top surface and the bottom surface, and a number of conductive pads on the top surface. The receiving holes surround the through hole. The sensor includes a first surface and a number of bonding pads corresponding to the respective conductive pads. The first surface opposes the bottom surface, and is mounted on the bottom surface. The first surface includes a light sensitive region aligned with the through hole, and a light insensitive region surrounding the light sensitive region. The bonding pads are arranged on the light insensitive region. The wires pass through the respective receiving holes, and respectively electrically connect the bonding pads to the corresponding conductive pads. |
| US08421910B2 |
Electronic flash, electronic camera and light emitting head
R, G and B LEDs are used as a light source of an electronic flash. Electric energy is supplied to a capacitor to the LEDs. A system controller controls light emitting amounts of the LEDs so that a color temperature of the electronic flash light becomes a color temperature that has been manually set with a color temperature setting switch or a color temperature of a light source determined by color temperature sensors. |
| US08421903B2 |
Staggered contact image sensor imaging system
A method and an apparatus for imaging a biologic sample is provided. The apparatus includes at least one light source, at least one lens array, at least one image detector, a positioning system, and an image processor. The lens array has a plurality of lengthwise extending rows, which rows are successively arranged in a widthwise direction. Each row has a plurality of micro lenses, with each micro lens having a resolution field. Each micro lens is adapted to receive light from the illuminated region of the sample and to produce a beam of light. Each row includes a first micro lens and the first micro lens in each successive row is offset from the first micro lens in the previous row by a predetermined amount extending in the lengthwise direction. The offset between successive rows aligns the resolution fields of the micro lenses to collectively create a continuous resolution field across the length of the lens array. The positioning system moves the lens array and image detector relative to the sample, or vice versa, or both. The image processor produces an image signal indicative of the illuminated region of the sample produced from data signals from the image detector. |
| US08421902B2 |
Display processing apparatus and method, and recording medium
A display processing apparatus which makes it possible to set auto bracketing values while confirming a whole range of shooting conditions configurable for correction in which possible shooting condition corrections are taken into account. An exposure correction value is set based on an instruction from a user for correcting a preset value of exposure. Auto bracketing value auto bracketing shooting are set based on an instruction from the user. A process is carried out for displaying a scale for indicating values of the exposure correction value and the auto bracketing values, indicators indicative of a range of exposure correction values that can be set and are arranged in a manner associated with the scale, and indicators indicative of a range of auto bracketing values that can be set and are arranged in a manner associated with the scale and the first indicators. |
| US08421900B2 |
Image capturing apparatus, an image capturing method and a machine readable medium storing thereon a computer program for capturing an image of a range wider than an image capture designation range
It is an object to provide an image of a desired composition in case the user is unsatisfied with the composition of an image already captured.An image capturing apparatus for capturing an image is provided, wherein the apparatus includes an image capturing designation range acquiring unit for acquiring an image capturing designation range designated by a user; an image capturing unit for capturing an image of a range wider than the image capturing designation range; a storing unit for storing information indicative of the image capturing designation range corresponding to the captured image; and an image displaying unit for displaying at least an image within the image capturing designation range out of the captured image by making the user recognize the image capturing designation range. |
| US08421895B2 |
Image sensing device and image sensing method
An image sensing device and image sensing method is described, in which an interrupt circuit is disposed to interrupt a clock signal input to a logic circuit not associated with the reading of image data when the image data is read, so as to temporarily interrupt the operation of the logic circuit, thereby reducing the power noises caused by the current generated during the operation of the logic circuit. |
| US08421893B2 |
Solid-state imaging apparatus
A solid-state imaging apparatus includes a comparison section comparing a pixel signal from a pixel with a ramp signal and outputting a comparison signal. A measurement section starts counting in synchronism with the ramp signal and continues the counting until a signal supplied thereto reverses to measure comparison time. A comparator output controlling section interposed between the output of the comparison section and the input of the measurement section stops, if a pixel signal value exceeds a predetermined value determined based on a tanning phenomenon when the counting is started, the counting when the comparison signal is supplied to the measurement section to reverse the comparison signal, but supplies, if the pixel signal value does not exceed the predetermined value, a signal which is not reversed within a measurement period to the measurement section to continue the counting during the measurement period. |
| US08421890B2 |
Electronic imager using an impedance sensor grid array and method of making
An novel impedance sensor is provided having a plurality of substantially parallel drive lines configured to transmit a signal into a surface of a proximally located object, and also a plurality of substantially parallel pickup lines oriented substantially perpendicular to the drive lines and separated from the pickup lines by a dielectric to form intrinsic electrode pairs that are impedance sensitive at each of the drive and pickup crossover locations. |
| US08421889B2 |
Image pickup apparatus, image pickup system, and method of the image pickup apparatus having pixel array for outputting an analog signal
An apparatus includes a pixel array in which pixels for outputting an analog signal are arranged in a matrix, vertical output lines each of which is connected to pixels in a same column, A/D conversion units, which are individually connected to the vertical output lines, for converting the analog signal into a digital signal, and a constant current supply unit for supplying a constant current to the A/D conversion units. Each of the A/D conversion units includes an integration unit for integrating the constant current, a comparison unit for comparing the integrated constant current with the analog signal and outputting a comparison signal, and a digital signal storage unit for storing a digital signal corresponding to the comparison signal. The integration unit includes an input capacitor for receiving the constant current. The comparison unit is connected to the constant current supply unit via the input capacitor. |
| US08421883B2 |
Information processing apparatus and method, and program storage medium
Disclosed is an information processing method comprising the steps of: storing measured position information in association with first time information representing times of day at which the measured position information is obtained; storing video information in association with second time information representing times of day at which the video information is obtained; and associating the measured position information with the video information in accordance with degrees of difference between the first time information and the second time information. |
| US08421878B2 |
White balance adjustment system for solid-state electronic image sensing device, and method of controlling operation of same
A main solid-state electronic image sensing device and a subordinate solid-state electronic image sensing device are included in a digital camera. The light source is estimated from image data obtained from the main electronic image sensing device, and white balance gain conforming to the estimated light source is calculated for the purpose of white balance adjustment. When the setting is such that white balance gain regarding image data that has been output from the subordinate solid-state electronic image sensing device conforms to the light source estimated from the image data of the main solid-state electronic image sensing device, the gain is calculated accordingly. When the setting is such that white balance gain regarding image data that has been output from the subordinate solid-state electronic image sensing device conforms to a light source estimated from the image data of the subordinate solid-state electronic image sensing device, the gain is calculated accordingly. |
| US08421874B2 |
Image processing apparatus
An image processing apparatus includes a fetcher. A fetcher fetches an object scene image. A first adjuster adjusts a tonality of the object scene image fetched by the fetcher, corresponding to a property of a display device. An object scene image outputter outputs the object scene image having the tonality adjusted by the first adjuster, toward the display device. A second adjuster adjusts the tonality of the object scene image fetched by the fetcher, in parallel with the adjusting process of the first adjuster. A first searcher searches for an object image that coincides with a registered object image from the object scene image having the tonality adjusted by the second adjuster. |
| US08421873B2 |
System comprising two lamps and an optical sensor
A system composed of a housing and an arm coupled to the housing. The arm supports a first lamp, a second lamp, and an optical sensor. |
| US08421872B2 |
Image base inquiry system for search engines for mobile telephones with integrated camera
An increasing number of mobile telephones and computers are being equipped with a camera. Thus, instead of simple text strings, it is also possible to send images as queries to search engines or databases. Moreover, advances in image recognition allow a greater degree of automated recognition of objects, strings of letters, or symbols in digital images. This makes it possible to convert the graphical information into a symbolic format, for example, plain text, in order to then access information about the object shown. |
| US08421871B2 |
Method and apparatus for image pickup and image processing
An image processing apparatus includes: a first image storing unit that stores a first history image including a first picked-up image forming a picked-up moving image; an image transforming unit that transforms, on the basis of transformation information concerning the first picked-up image and a second picked-up image forming the picked-up moving image located after the first picked-up image on a time axis of the picked-up moving image, the second picked-up image; and an image combining unit that causes a second image storing unit different from the first image storing unit to store the transformed second picked-up image, overwrites the first history image stored in the first image storing unit on the second picked-up image stored in the second image storing unit, and combines the first history image and the second picked-up image. |
| US08421869B2 |
Camera system for with velocity sensor and de-blurring processor
A camera system for outputting deblurred still images includes a portable handheld camera device comprising an image sensor for recording an image; a two-dimensional accelerometer for detecting an angular velocity of the camera system relative to an external environment and to produce an angular velocity output indicative thereof; a linear image sensor for sensing data provided on an encoded card inserted into the camera system, the encoded card containing instructions for the manipulation of the image; and a processor for receiving the image from the image sensor, receiving the angular velocity output from the two-dimensional accelerometer, and processing the image in accordance with the instructions sensed from the encoded to deblur any blurred pixels present in the image in consideration of the angular velocity output. |
| US08421865B2 |
Method for calibrating a vehicular camera system
A method of calibrating a vehicular multi-camera system includes equipping a vehicle with a plurality of cameras wherein each camera of the plurality of cameras captures image data, equipping the vehicle with an image processor, inputting image data from each of the plurality of cameras to the image processor, the image processor processing input image data in order to calibrate the vehicular multi-camera system, and wherein calibration of the vehicular multi-camera system is achieved independently of a model of the real world. |
| US08421855B2 |
Optical coherence tomography (OCT) imaging systems for use in pediatric ophthalmic applications and related methods and computer program products
Optical coherence tomography (OCT) imaging systems for imaging an eye are provided including a source having an associated source arm path and a reference arm having an associated reference arm path coupled to the source path, the reference arm path having an associated reference arm path length. A sample having an associated sample arm path coupled to the source arm and reference arm paths is provided. A reference arm path length adjustment module is coupled to the reference arm. The reference arm path length adjustment module is configured to automatically adjust the reference arm path length such that the reference arm path length is based on an eye length of the subject. Related methods and computer program products are also provided. |
| US08421843B2 |
System and method for processing images by visual echo cancellation
This image processing system comprises: a device (PRJ, SI1) for projecting a first light beam (FL1) to form a first image (I1) on a screen (ECR) on which a second light beam (FL2) coming from an observation area (ZO) forms a second image (I2) and a device (CAM, SI1) for acquiring a third image (I3) formed on the screen (ECR) and corresponding to the superimposition of the second image (I2) and at least a portion (I1′) of the first image (I1). This system further comprises control means (CTR) for: obtaining a first signal (S1) representing the portion (I1′) of the first image (I1), obtaining a second signal (S2) representing the third image (I3), and calculating a third signal (S3) by subtracting at least part of the first signal (S1) from the second signal (S2) to form an image (I2′) representing the observation area (ZO). |
| US08421840B2 |
System and method for improved view layout management in scalable video and audio communication systems
A system and method for transmitting a plurality of video signals scalably coded into layers including a base layer and one or more enhancement layers and associated audio signals, if any, over a communication network for presentation to one or more end users. A layout to display the plurality of video signals is determined based on a set of criteria and only the data of the video signal layers that are necessary for displaying the video signals in the determined layout, and any associated audio signals, is selectively transmitted over the communication network. |
| US08421838B2 |
Optical device, optical scanning device, image forming apparatus, and manufacturing method of optical device
An optical device including an optical element; a package member in which the optical element is held on a bottom surface of the package member in an area surrounded by walls; and a plate member that seals the area surrounded by the walls and the bottom surface in an airtight manner, the plate member being translucent and joined to the package member with a resin material. The walls have a structure including steps, the plate member is joined onto one of the steps of the walls, and at least a part of the walls facing side surfaces of the plate member includes a positioning part for positioning the plate member and a retaining part for retaining the resin material, in a direction perpendicular to the bottom surface. |
| US08421836B2 |
Light-emitting device, print head and image forming apparatus
A light-emitting device includes: a circuit board including at least two of signal interconnection layers each having plural signal interconnections, at least adjacent two of the signal interconnection layers including signal interconnections provided so that center positions of the respective signal interconnections in a direction intersecting with a longitudinal direction are displaced from each other in portions of the signal interconnections provided in the longitudinal direction; and plural light-emitting chips each having plural light-emitting elements, the light-emitting chips being arrayed in line in the longitudinal direction on a surface of the circuit board. |
| US08421833B2 |
Thermal paper roll, image forming device, image forming method, and program
A thermal paper roll includes a paper core, a thermal paper wound on the paper core, a flange attached to at least one end surface of the paper core, and a contacted surface formed on a plane intersecting a roll axis of the paper core at a side opposite to the paper core side of the flange in order to detect or identify a state of the thermal paper roll. |
| US08421832B2 |
Surface property modifying sheet cartridge and image forming cartridge
A surface property modifying sheet cartridge includes two reels that are disposed in parallel with a predetermined interval, a surface property modifying sheet that is provided in a tensioned state between the two reels in a manner such that end parts thereof are respectively fixed to the two reels and are wound respectively around the two reels, and a case part configured to store the two reels and the surface property modifying sheet. In the surface property modifying sheet cartridge, the case part includes a penetrating part that exposes a part of the surface property modifying sheet positioned between the two reels. |
| US08421831B2 |
Image forming apparatus, image forming method, and program
An image forming apparatus includes a conveyance unit conveying a medium to be recorded in a predetermined direction, a thermal transfer sheet including an ink layer thermally transferred onto the medium to form a printing layer, and a protective material layer thermally transferred onto the medium to form a protection layer, a transfer sheet traveling unit causing the thermal transfer sheet to travel, a reforming sheet including a printing opening for bringing the ink layer and the protective material layer into contact with a surface of the medium, and a surface property reforming unit reforming the surface property of the protection layer, a reforming sheet traveling unit causing the reforming sheet to travel, and a thermal head pressing the surface property reforming unit on the medium through the protective material layer having been thermally transferred to thereby heat the pressed surface property reforming unit. |
| US08421829B2 |
Liquid crystal display controller
The present invention provides a liquid crystal display controller device and method which provides for a full and/or partial display with good display quality and/or low power consumption based on the scanning period for an active scan line being dependent upon a number of reference clock pulses. Some embodiments of the present invention include one or more of the following features: keeping the frequency substantially constant for different numbers of active scan lines, allowing change of the frequency due to characteristics of the LCD, displaying gradation with near linear effective voltage characteristics, displaying graduation data with lower power, or displaying a partial or full screen in a mobile device, for example, a cell phone. |
| US08421825B2 |
Electronic device, controlling method thereof, controlling program thereof, and recording medium
A plurality of screen aspects is acquired; each screen layout is optimized; switching of the screen aspects is supported; and visibility and functionality of the display screen are improved. An electronic device (portable terminal apparatus) including a display function in a rotatable and/or openable/closable case includes a displaying unit that displays a vertically elongated vertical screen or a horizontally elongated horizontal screen and a controlling unit (CPU) that changes screen layouts correspondingly to the vertical screen or the horizontal screen displayed on the displaying unit. The change in the screen layout corresponding to the vertical screen or the horizontal screen includes a change in arrangement of icons. |
| US08421822B2 |
Customizing footwear
A system and method for customizing the look of footwear. The footwear of the system includes a display that can show high resolution images and covers a large portion of the footwear surface. A user can create and transfer designs to be displayed. Designs can be bought or shared over the Internet. The system also allows the user to use a handheld device to detect the color of another object and then display substantially the same color in pixels of the display. |
| US08421817B2 |
Color processing apparatus and method thereof
In order to obtain a highly accurate color processing condition, a user is allowed to easily adjust a weight for a patch image with poor reliability. Hence, a color processing apparatus inputs color data of a plurality of patches included in a color chart captured by an image sensing device. Patch images based on the color data are displayed on a monitor, and a user interface for inputting a user's instruction to adjust a weight value for each patch image is displayed on a monitor. A color processing condition of an image captured by the image sensing device is generated based on the weight value, the color data, and a target value of a color representation corresponding to each patch image. |
| US08421816B1 |
Selection of colors
Disclosed are various embodiments for facilitating the selection of colors. An initial set of colors from a color space is generated in one or more computing devices for rendering in a user interface. Each color from the color space is expressed as a respective tuple of color component values. A selection of one of the initial set of colors is obtained. A subsequent set of colors from the color space is generated for rendering in the user interface. The subsequent set of colors is determined according to values of the N most significant bits of each of the corresponding color component values of the one of the initial set of colors, where N is a predetermined positive integer that is less than a bit length of each color component value. |
| US08421814B2 |
Display device and method of driving the same
A display device capable of displaying an image selected by a user for a certain period of time without interruption even when power consumption to be used to completely display the image exceeds a remaining capacity of a battery, and a method of driving the same. The display device includes a storage element; a selection circuit configured to select an image stored in the storage element according to a user request; a battery; a first detection circuit configured to detect a remaining capacity of the battery; a controller; and a display panel coupled to the battery via the controller and configured to display the selected image in accordance with a control output of the controller. |
| US08421807B2 |
Display device
A display device includes a display unit and a plurality of refreshing units. The display unit has a plurality of the display areas. Each of the display areas has a plurality of pixels. Each of the pixels has a memory. The refreshing units respectively control to refresh the pixels of the corresponding display areas at different time periods. Thus, the produced peak current during the pixel refreshing can be reduced, and the stored pixel data can be maintained. |
| US08421799B2 |
Illustrating a three-dimensional nature of a data set on a two-dimensional display
A volume of a patient can be mapped with a system operable to identify a plurality of locations and save a plurality of locations of a mapping instrument. The mapping instrument can include one or more electrodes that can sense a voltage that can be correlated to a three dimensional location of the electrode at the time of the sensing or measurement. Therefore, a map of a volume can be determined based upon the sensing of the plurality of points without the use of other imaging devices. An implantable medical device can then be navigated relative to the mapping data. |
| US08421798B2 |
Method of computer-aided design of edges connecting faces of a modeled object
The invention is directed method of computer-aided design of edges connecting faces of a modeled object, the method comprising a step of:—determining (S100-S130) a structure of subsets of faces and edges of specified convex or concave type, by iteratively disconnecting (¦S120¦) faces connected by edges of one type from a parent subset, whereby said parent subset is decomposed into child subsets comprising either:—a non-connected face; or—faces connected by edges of the other type, in which case edges of said one type are maintained in said child subset, wherein said one type of edges is further alternated at each iteration of disconnecting; and the method further comprising a step of:—processing (S140) the structure from a given parent subset for rounding or filleting the one or more edges connecting child subsets thereof, according to the type of edge as specified in said given parent subset. More generally, the present invention may further be directed to the design of implementation of two distinct technologies for processing features connecting elements a model, in place of design of edges connecting faces of a modelled object. |
| US08421797B2 |
Remote control system and remote control apparatus
A remote control system and a remote control apparatus allow a human operator to remotely control a mobile body easily even if the system uses a low-speed communications link. The remote control system includes a remote control apparatus, in which a CPU selects old information based on both old information and the latest mobile body information from a mobile body, and determines a virtual view point V. The CPU generates a three-dimensional environmental image K and the virtual view point V based on the selected old information, and also generates a mobile body model M, a reference point B and a clipping center point based on the latest mobile body information and data regarding a mobile body model M, in a global coordinate system GC. The CPU calculates an angle of view based on a distance d between the virtual viewpoint V and the reference point B, makes a perspective projection of the three-dimensional environmental image K and the mobile body model M from the virtual view point V toward the clipping center point to obtain a projected image, makes a clip from the projected image based on the angle of view thereby making a composite image, and converts the composite image into a display image of a predetermined size. The resulting display image is displayed on a monitor. |
| US08421792B2 |
Data transmitting device and flat plate display using the same
A data transmitting device and a flat plate display using the same are disclosed. The data transmitting device includes a current generator comprising a plurality of constant current sources connected in parallel and a plurality of switches connected to output terminals of the constant current sources, respectively, the current generator configured to switch the switches independently according to a preset digital current control signal and adding up the currents supplied from the constant current sources via the tuned-on switches to output; a current amplifier configured to amplify and output the output current of the current generator; and a line driver configured to generate and output a low voltage differential signal according to input data by using a constant current such as the amplified current of the current amplifier. |
| US08421790B2 |
Integrated circuit for SRAM standby power reduction in LCD driver
The present invention relates to an integrated circuit (IC) for SRAM (Static Random Access Memory) standby power reduction in LCD (Liquid Crystal Display) driver. The IC layout mainly disposes a high-current endurable transistor between a power supply pad and a power supply metal layer of the SRAM matrix. When the IC enters a standby mode, the electrical interconnection between the power supply pad and the power supply metal layer of the SRAM is cut off through the transistor so that the leakage current and the power consumption of the SRAM can be reduced. |
| US08421784B2 |
Display
In one embodiment of the present invention, a display for receiving m-bit display data includes a display driver including a switched capacitor digital/analogue converter including an n-bit input, where m is not greater than n. The upper plates of the capacitors of the switched capacitor digital/analogue converter may be connected, in the zeroing phase, to one of a plurality of reference voltages. The choice of which reference voltage is connected to the upper plates of the capacitors of the switched capacitor digital/analogue converter in the zeroing phase is independent of the input n-bit digital code, and is determined by a signal internal to the display. The output voltage range from the converter in a decoding phase may be a first range in which output voltages are above and below one reference voltage or it may be a second range in which output voltages are above and below another reference voltage, depending on which reference voltage was selected in the preceding zeroing phase. |
| US08421781B2 |
Shift register capable of reducing coupling effect
A shift register has a plurality of shift register units coupled in series. Each shift register includes a pull-up circuit, an input circuit, a pull-down circuit, a compensation circuit, an input end, an output end and a node. Each shift register unit receives an input voltage at the input end and provides an output voltage at the output end. The input circuit transmits the input voltage to the node based on a first clock signal. The pull-up circuit provides the output voltage based on a second clock signal and the voltage level of the node. The pull-down circuit selectively connects the node with the output end according to a third clock signal. The compensation circuit is coupled to the input circuit, the pull-down circuit and the node for maintaining the voltage level of the node based on the second and third clock signals. |
| US08421779B2 |
Display and method thereof for signal transmission
A display and a method for signal transmission of the display are provided. The display has a source driver, a panel, and a timing controller having at least one data pin and a clock signal pin. The timing controller sends a clock signal to the source driver via the clock signal pin, and then sends a start pulse pattern to the source driver via the at least one data pin such that the source driver is notified to receive setting signals and display data signals. The source driver drives the panel according to the setting signals and the display data signals received from the timing controller via the at least one data pin. One or more of the setting signals are received by the source driver within every clock of the clock signal. |
| US08421776B2 |
Acoustic condition sensor employing a plurality of mutually non-orthogonal waves
A touch input system, comprising a surface, adapted to receive at least one simultaneous touch inputs from human fingers; a sensor adapted to detect the at least one touch inputs and produce at least one signal representing a unique position for the at least one touch input; and a processor, adapted to receive the at least one signal and produce an output representing a touch detection and a mapping of a coordinate position on the surface for each of the simultaneous touch inputs. The system may detect, for example, two touch inputs simultaneously. The surface may be non-planar and distinct from a small solid angle section of a sphere. |
| US08421775B2 |
Method and apparatus for detecting touch point
A method of detecting a touch point includes detecting an edge image of a finger image from an input image, generating a touch point image utilizing the detected edge image, and calculating coordinates of the touch point from the touch point image. The touch point image may be generated by setting a center at a position separated by a set distance in a gradient direction with respect to a position where the edge image is detected, and generating the touch point image by summing up gradient magnitude values with respect to a set area based on the set center. The coordinates of multiple touch points may be calculated by updating coordinates of the multiple touch points according to the gradient magnitude values accumulatively summed up in the multiple touch points based on a comparison between the coordinates of the multiple touch points and the set distance. |
| US08421773B2 |
Resistive touch panel and driving method therefor
A resistive touch panel includes a first substrate, a second substratem and a driving circuit. A first conductive layer is disposed on the first substrate and includes a first, a second, a third, and a fourth corners which are different from each other. A first, a second, a third, and a fourth conducting wires are electrically connected to the first, second, third, and fourth corners, respectively. The second substrate is disposed parallel to the first substrate. A second conductive layer is disposed on the second substrate and faces the first conductive layer. A fifth conducting wire is electrically connected to a first side of the second conductive layer while a sixth conducting wire is electrically connected to a second side of the second conductive layer. The driving circuit is electrically connected to the first, second, third, fourth, fifth, and sixth conducting wires. |
| US08421772B2 |
Resistive touch control device and driving method and driving controller thereof
A resistive touch control device and driving methods and a driving controller thereof are provided to switch operation modes of a touch panel. Depending on the user's requirement, the touch panel can be operated in multi-touch mode or only in an analog mode with high resolution. In other words, the touch control device can be operated in a digital mode, the analog mode, or a hybrid mode including both of the digital and the analog modes. |
| US08421769B2 |
Electronic cosmetic case with 3D function
An electronic cosmetic case includes a stereo image display unit, and a pair of image capturing units. The pair of image capturing units is for simultaneously capturing facial image of a user from two different directions, and providing the captured images to the stereo image display unit. The stereo image display unit receives the two captured images and simultaneously displays one captured image to the left eye and displays the other captured image to the right eye, thus allowing the user to perceive a stereo image. |
| US08421768B2 |
Touch screen device
Disclosed herein is a touch screen device, including: a first transparent electrode formed on one surface of a first transparent substrate to sense a touched input; a second transparent electrode formed on one surface of a second transparent substrate formed to be opposite to the first transparent electrode to sense a touched input; a display formed on the other surface of the second transparent substrate; a first adhesive layer bonding the first transparent substrate to the second transparent substrate; and a second adhesive layer bonding a first connection part formed on an outer side of first transparent substrate to a second connection part formed on an outer side of the display. The touch screen device directly bonds the first transparent substrate to the display, thereby making it possible to provide a high definition image to a user and to reduce infiltration of moisture or the like. |
| US08421765B2 |
Touch sensing device and method
A touch sensing device capable of accurately detecting a touched position on a touch panel includes a touch panel, a conversion unit and a calculation unit. The touch panel having a plurality of horizontal sensing lines and vertical sensing lines generates a plurality of horizontal sensing signals and vertical sensing signals in response to a touch on the touch panel. The conversion unit generates a plurality of two-dimensional (2D) sensing signals according to the horizontal and vertical sensing signals. The calculation unit determines a touched position on the touch panel according to the 2D sensing signals. |
| US08421764B2 |
Method of driving electrophoretic display device, electrophoretic display device, and electronic apparatus
A method for driving a touch panel-mounted electrophoretic display device includes: connecting a first control line or a second control line and a first electrode of the device with a switching circuit based on output from a memory circuit, and setting the electric potentials of the first and second control lines to first and second potentials, during an inputting period when positional information is input to the touch panel; and inputting an image signal including a touch panel signal for displaying the trajectory of the positional information input to the touch panel to the memory circuit of the selected pixel through the data lines and a pixel switching element by selecting the pixel connected to the corresponding scanning line by simultaneously supplying a scanning signal to the scanning lines while the potential of the second electrode is set to the first electric potential. |
| US08421760B2 |
Touch panel display
A touch panel display including a first substrate, a second substrate, a display medium and a touch device is provided. The first substrate has a display area and a peripheral area. The first substrate has a pixel array in the display area and at least one integrated driving circuit in the peripheral area. The integrated driving circuit is electrically connected to the pixel array. The second substrate is disposed above the first substrate to cover the integrated driving circuit and the pixel array. The display medium is disposed on the pixel array and located between the first substrate and the second substrate. The touch device is disposed on the second substrate, and has a sensor element and a wiring element connected to the sensor element. The sensor element is located above the pixel array and the wiring element is located above at least a portion of the integrated driving circuit. |
| US08421754B2 |
Handheld electronic device and keyboard having multiple-function keys
An improved handheld electronic device having an improved keyboard provides enhanced usability with fewer keys by enabling the keys to pivot slightly to provide multiple functions to the keys. The improved keyboard may, for example, include internal strips of conductive carbon that are disposed adjacent the keys and are electrically engageable with contacts on a printed circuit board. Specifically, when a key is pressed directly downward it collapses a single dome and connects together a set of primary contacts to provide a first function. When the key is pressed at the side thereof, the key pivots slightly, collapses the dome and connects together the primary contacts, and also engages a carbon strip with a pair of secondary contacts to connect together the secondary contacts, all of which provide a second function. The keyboard may be configured to be of a QWERTY configuration while using only a relatively small number of keys. |
| US08421752B2 |
Portable electronic device and method therefor
An electronic device includes an object sensor for detecting motion of an object, such as a stylus or finger, relative to device and during a period of contactless object movement. A motion sensor, such as an accelerometer, detects device motion during the period of contactless object movement. A processor determines a gesture that corresponds to the movement of the object and to movement of the device. This device, and the associated method, results in a more accurate determination of an intended gesture, such as a three-dimensional gesture. For example, the processor, or gesture determinator, can compensate for movement of the device when determining the gesture corresponding to detected contactless movement of the object. |
| US08421751B2 |
Computer-readable storage medium having information processing program stored therein, information processing system, and information processing method
A free direction input area, a lateral direction input area, and a longitudinal direction input area are provided on an input surface of a touch panel. When a user performs a slide operation whose starting point is within the free direction input area, movement of a virtual camera is controlled based on a change amount of a touch position with respect to X- and Y-axis directions. When the user performs a slide operation whose starting point is within the lateral direction input area, movement of the virtual camera is controlled based on a change amount of a touch position only with respect to the X-axis direction. When the user performs a slide operation whose starting point is within the longitudinal direction input area, movement of the virtual camera is controlled based on a change amount of a touch position only with respect to the Y-axis direction. |
| US08421750B2 |
Pointing device, data processing device, and data processing system
A data processing device includes a cursor position decision unit, a display control unit, a switch operation signal detection unit, a storage unit, an event generation unit and an event execution unit. The storage unit is configured to store, for a predetermined period, at least one of cursor position information outputted from the cursor position decision unit and event information according to one of a plurality of selection options located in a displayed image at a position corresponding to the cursor position decided by the cursor position decision unit. The event generation unit is configured to generate an execution event when a first switch operation signal is detected at a first timing by the switch operation signal detection unit based on the at least one of the cursor position information and the event information stored in the storage unit at a second timing prior to the first timing. |
| US08421748B2 |
Information exchange device
An information exchange device includes a human body communication unit which applies information flowing via a human body to a human body and detects information flowing via the human body, an information transmission unit which transmits information via the human body communication unit, an identification unit which identifies other device which can transmit information from the information transmission unit, a detection unit which detects a contact state with other human body, and a transmission control unit which starts transmission of information according to identification by the identification unit and a detection by the detection unit. |
| US08421743B2 |
Flat panel display and mobile device using the same
A flat panel display for reducing damage to a panel assembly from a falling impact is disclosed. In one embodiment, the display includes: 1) a liquid crystal panel assembly configured to display an image and 2) a backlight assembly including i) a light source configured to provide light to the liquid crystal panel assembly, ii) a flexible printed circuit board (FPCB) configured to provide power for the light source to generate the light, and iii) a light guide panel configured to guide the light received from the light source. The display may further include 1) a mold frame surrounding the flexible printed circuit board, 2) a chassis accommodating the mold frame and 3) a weight unit formed in at least one of the chassis and mold frame, wherein the weight unit is formed at a place that is eccentric with respect to the center of the liquid crystal panel assembly. |
| US08421740B2 |
Liquid crystal display device and image display method thereof
A liquid crystal panel displays an image from image signals. A backlight device is disposed on the back side of the liquid crystal panel, and is divided into a plurality of regions. The backlight device comprises light sources in each of the regions. The light sources are positioned to emit light onto the liquid crystal panel. A histogram detector detects an image signal gradation distribution for each region and to produce a histogram therefrom. An image gain calculator calculates a gain from the detected gradation distribution of the histogram detector, and controls light emission from each light source in each region of the backlight device. A light emission luminance calculator controls the light emission luminance of each light source based on a maximum luminance of the light sources and based on an inverse number of the gain calculated in the image gain calculator. |
| US08421735B2 |
Liquid crystal display device
Disclosed herein is a liquid crystal display device in which an image can be correctly seen even though a screen is rotated. The liquid crystal display device includes a storage unit for storing a plurality of screen change signals, and a timing controller for dividing image data of one horizontal line externally supplied thereto into k odd sub-image data and k even sub-image data, and sequentially outputting the k odd sub-image data and sequentially outputting the k even sub-image data. |
| US08421734B2 |
Driving method and apparatus of LCD panel, and associated timing controller
A timing controller of an LCD panel is provided. The timing controller, for controlling a plurality of source drivers and a plurality of gate drivers of the LCD panel, includes a data processing module for generating a data signal carrying image data and black data, and a control signal generating module for generating a plurality of horizontal start signals, a first gate enable signal and a second gate enable signal. The horizontal start signals are for controlling the inputting of the data signals into the source drivers. The first and second gate enable signals correspond to different enable timings, and are selectively outputted to the gate drivers. |
| US08421732B2 |
Image display system
A system for displaying images includes a display device. The display device includes a timing control circuit, a display matrix, a horizontal driving circuit and a horizontal signal processing circuit. The timing control circuit generates a plurality of timing signals. The display matrix includes a plurality of display elements arranged in a matrix, wherein the display elements are vertically divided into N banks to be updated sequentially. The horizontal driving circuit is coupled to the timing control circuit for generating a plurality of switch signals according to the timing signals and sequentially turning on the banks. The horizontal signal processing circuit is coupled to the timing control circuit, the horizontal driving circuit and the display matrix for determining a turning-on period for each bank according to the timing signals and the switch signals. |
| US08421727B2 |
Transmitter circuit, transmission circuit and driver unit
A transmitter circuit includes a driver circuit including a non-inverting output terminal and an inverting output terminal for outputting a signal current, which has a loop direction that changes based upon an input signal, to the non-inverting output terminal and the inverting output terminal and an output-waveform control circuit for detecting a waveform edge of the input signal and responding by increasing the signal current temporarily. The output-waveform control circuit includes a first inverter circuit receiving a non-inverted input signal, a first capacitor including one end connected to an output terminal of the first inverter circuit and another end connected to the inverting output terminal, a second inverter circuit receiving an inverted input signal, and a second capacitor including one end connected to an output terminal of the second inverter circuit and another end connected to the non-inverting output terminal. |
| US08421720B2 |
LCD and circuit architecture thereof
A liquid crystal display (LCD) and circuit architecture thereof are proposed. Power signal lines, data signal lines, and control signal lines are mounted on a printed circuit board (PCB) and a thin film substrate. The thin film substrate is connected to a LCD panel by using a COF bonding. These circuits can be transferred onto a conductive glass of the panel and subsequently onto source driver chips of the thin film substrate of the COF. Therefore, a position which needs the least time for power signal lines, data signal lines, and control signal lines to transmit to all of the circuits of the panel on the PCB can be calculated in order to achieve the best design. |
| US08421716B2 |
Display device
During first period, TFTs: and are set in ON and OFF states, respectively. Potential Va is fed into a source line Sj so that potential of pixel electrode is Va. During second period, the TFTs: and are set in the OFF and ON states, respectively. The potential Va is continuously fed into the source line Sj. This sets potential of node to Va, thereby changing the potential of the pixel electrode. During third period, the TFTs: and are set in the OFF state. This realizes a display device where high cost factors and power consumption increase are suppressed, and the effective value of voltage expressed by difference between potential applied to a driving potential input terminal and reference potential can have variance larger than amplitude of signal voltage fed into a data signal line, the variance corresponding to variation in the signal voltage. |
| US08421713B2 |
Driving method of plasma display panel
It is an object to provide a driving method of a plasma display panel, whereby a dark contrast can be improved while suppressing an erroneous discharge. In a resetting step in a first unit display period, while a first reset pulse having a predetermined peak electric potential is applied to one of first row electrodes of row electrode pairs formed in the PDP, a second reset pulse having a peak electric potential smaller than that of the first reset pulse is applied to the other of the first row electrodes. In the resetting step in a second unit display period subsequent to the first unit display period, a second reset pulse is applied to each of the one and the other of the first row electrodes. |
| US08421712B2 |
Display apparatus
A liquid crystal display part includes a seven segment display group and first and second switches. If the first switch “on”, a display provided by the seven segment display group is switched to a normal direction display having an upward orientation. In addition, if the second switch is “on,” then the display provided by the seven segment display group is switched to an inverse direction display having a downward direction. In addition, a first character pattern that indicates the unit of the measurement value is displayed for the normal direction display, and a second character pattern that indicates the unit of the measurement value is displayed for the inverse direction display. A cover is openably, closably, and rotatably provided to the liquid crystal display part, and the display direction of the measurement value is switched according to the position of the cover. |
| US08421705B2 |
Antenna structure
An antenna structure includes a positive feeding point, a negative feeding point, a radiation element, and a grounding element. The radiation element includes a first radiator and a second radiator. The first radiator has a first end coupled to the positive feeding point, and has a plurality of first side edges. The second radiator has a first end coupled to the negative feeding point, and has a plurality of second side edges. Herein the second radiator at least partially surrounds the first radiator, such that there are a plurality of predetermined gaps existed in between the plurality of first side edges of the first radiator and the plurality of second side edges of the second radiator to form coupling effects. The grounding element is coupled to the second radiator. |
| US08421696B2 |
Dual polarization antenna structure, radome and design method thereof
A dual polarization antenna radome includes a plurality of dielectric substrates. Each dielectric substrate provides a plurality of metal totems, and the pattern of the metal totems is unchanged after the metal totems rotate by 90 degrees around the axis perpendicular to the dielectric substrate. |
| US08421694B2 |
Composite antenna device
There is provided a composite antenna device for responding to waves in a plurality of radio frequency bands, including: a sheet of conductor plate; a first antenna provided on the sheet of conductor plate for responding to a linearly-polarized wave in at least one radio frequency band; and a second antenna provided on the sheet of conductor plate for responding to a circularly-polarized wave in a radio frequency band that is different from the at least one radio frequency band, wherein the first antenna has a ground portion, the second antenna is formed in an area in the ground portion, and each of the first antenna and the second antenna has a feeding point. |
| US08421692B2 |
Transmitting power and data
Apparatus, systems and methods to transmit power and data are provided. A particular apparatus to transmit power and data includes a transmission medium. The transmission medium includes at least one first frequency selective surface (FSS) layer, at least one second FSS layer, and a dielectric layer separating the at least one first FSS layer and the at least one second FSS layer. In a particular embodiment, the apparatus also includes a first coupler coupled to the transmission medium to send a signal along the transmission medium and a second coupler coupled to the transmission medium. The second coupler may receive signals via the transmission medium, receive power via the transmission medium to power devices coupled to the second coupler, process and send data via the transmission medium, or any combination thereof. |
| US08421690B2 |
Antenna heating apparatus
Antenna heating apparatus includes a cover element adapted for covering a signal receiving surface of an antenna, and a heating element on the cover element. The cover element has a body portion which is shaped differently to that of the signal receiving surface of the antenna. The differently shaped body portion 16, preferably having a rear surface which is planar or concave so as to be spaced from the signal receiving surface of the antenna, in use defines at least in part a plenum chamber for heated air between the body portion and the signal receiving surface of the antenna. A method of preventing or limiting accumulation of precipitation on an antenna by use of such antenna heating apparatus is also provided. |
| US08421689B2 |
Antennas with tuning structure for handheld devices
Handheld electronic devices are provided that contain wireless communications circuitry. The wireless communications circuitry may include antenna structures. To accommodate manufacturing variations, the antenna structures and handheld electronic devices may be characterized by performing measurements such as antenna performance measurements. Appropriate antenna adjustments may be made during manufacturing of a handheld electronic device based on the characterizing measurements. An antenna may be formed using an inverted-F design in which an antenna flex circuit is mounted to a dielectric antenna support structure. Cavities in the support may be selectively filled with dielectric material and dielectric patches may be added to the antenna flex circuit to adjust the dielectric loading of the antenna. The length of a ground return path in the antenna may be adjusted by appropriate positioning of an electrical connector within the ground return path. |
| US08421685B2 |
Spatial filter for near field modification in a wireless communication device
A spatial filter is developed for specific absorption rate (SAR) reduction in a wireless device. A conductive element is designed to modify the near field distribution of an antenna operating in a wireless device. This reduces SAR while minimizing degradation of antenna efficiency at one or several frequency bands that the antenna is designed to operate over. Lumped reactance can be designed into the conductive element to generate low pass, band pass, and/or high pass frequency characteristics. Distributed reactance can be designed into the conductive element to replace or to work in conjunction with the lumped reactance. Active components can be designed into the conductive element to provide dynamic tuning of the frequency response of the conductive element. |
| US08421683B2 |
Rollable and/or foldable antenna systems and methods for use thereof
An antenna system comprises a ground plane, a flexible substrate, a first antenna element disposed upon the flexible substrate and proximal to the ground plane, the flexible substrate configured so as to be at least partially rolled, and a Radio Frequency (RF) module in communication with the first antenna element and transmitting and receiving radio waves through the first antenna element. |
| US08421680B2 |
Digital broadcasting antenna structure
A digital broadcasting antenna structure includes a substrate having at least a first and a second face; a main antenna arranged on the first face; an amplifier arranged on the first face and electrically connected to the main antenna; a compensating unit arranged on the second face and electrically connected to the main antenna; a bandwidth modulating unit arranged on the second face and electrically connected to the compensating unit; and a grounding section arranged on the second face and electrically connected to the bandwidth modulating unit. The digital broadcasting antenna structure can receive digital broadcasting signals without being restricted to any specific receiving direction, and is applicable to low, intermediate and high frequency bands to therefore achieve the effects of miniaturization, high bandwidth and low return loss. |
| US08421676B2 |
Method and system for determining the location of an electronic device using multi-tone frequency signals
Embodiments of the present invention include a method of determining a location of a mobile device. The method comprises transmitting a signal between a plurality of known locations and receiving signal at device of unknown location such as a mobile device. The signal may include multiple tones having different frequencies and resulting in sets of residual phase differences. The location of the mobile device may be determined using the known locations and the frequency and phase differences between the transmitted tones. In one embodiment, OFDM signals may be used between an access point and mobile device, for example, to determine the location of the mobile device. |
| US08421674B2 |
Localization system for determining a position of a device that can be moved on the floor
The invention relates to a localization system for determining a state of a device that can move on a floor, comprising a floor transceiver system having a plurality of floor transceivers which each have floor antennas for marking position points within the plane of the floor, and a transceiver tablet which is connected to the movable device and has a transmitting/receiving surface which is located opposite the floor and is suitable for continuously determining the position of at least two floor antennas within the transmitting/receiving surface simultaneously. |
| US08421670B2 |
Position estimation apparatus and computer readable medium storing position estimation program
The present invention provides a position estimation apparatus, mounted at mobile object, including: an acquisition section that acquires transmission source information transmitted from each plural information transmission sources including, information relating to a position of information transmission source, information relating to a distance between information transmission source and mobile object, and information relating to a relative velocity of mobile object with respect to information transmission sources; a trajectory calculation section that calculates, over predetermined duration, a trajectory of mobile object by integrating velocity vectors of mobile object obtained based on transmission source information; and an estimation section that estimates, as a position of mobile object, a position for which trajectory is translated such that a difference between, distances between a plurality of points at different times on trajectory and respective information transmission sources, and acquired distances between respective information transmission sources and mobile object, is minimum. |
| US08421663B1 |
Analog-to-digital converter comprising dual oscillators for linearity compensation
An analog-to-digital converter (ADC) is disclosed operable to convert a sensor signal to a digital value. A differential amplifier responsive to the sensor signal and a reference signal generates a first analog signal representing a first offset above the reference signal and a second analog signal representing a second offset below the reference signal. A first oscillator generates a first output frequency dependent on the first analog signal, and a second oscillator generates a second output frequency dependent on the second analog signal. A difference between the first output frequency and the second output frequency is generated, and the digital value representing the sensor signal is generated in response to the difference. |
| US08421660B1 |
Configurable cascading sigma delta analog-to digital converter (ADC) for adjusting power and performance
A cascaded sigma-delta modulator has several modulator loops that have one or two sets of integrators, summers, and scalers, and a quantizer that generates a loop output. Input muxes to each loop select either an overall input or the loop output from a prior loop, allowing the modulator loops to be cascaded in series or to operate separately. Filter-configuring muxes after each modulator loop select either that loop's output or a loop output from any prior loop, or a zero. Each filter-configuring mux drives an input to a modified CIC filter. The modified CIC filter has an initial delay stage that receives the first filter-configuring mux output, and successive integrator stages that each receives a successive filter-configuring mux output. The modified CIC filter is a combination of a digital transform filter and a Cascaded-Integrator-Comb (CIC) filter. Modulator loops are powered down for lower-performance configurations or cascaded together for higher-performance configurations. |
| US08421659B2 |
Minimum differential non-linearity trim DAC
A trim DAC wherein the digital input bits to the trim DAC are controlled by a state machine to produce an analog output that is within a least significant bit of the digital input bits. An undersize factor between digital input bits is used to assist in finding a trim solution for major transitions of the digital input bits. Trim solutions are stored in a nonvolatile memory associated with the state machine to be used in creating an accurate analog output. |
| US08421658B1 |
Parallel pipelined calculation of two calibration values during the prior conversion cycle in a successive-approximation-register analog-to-digital converter (SAR-ADC)
A Successive-Approximation Register Analog-to-Digital Converter (SAR-ADC) predicts compensation values for use in a future cycle. A compensation value is applied to capacitors in a calibration Y-side capacitor array to compensate for capacitance errors in a binary-weighted X-side capacitor array. Two compute engines pre-calculate predicted-0 and predicted-1 compensation values for a next bit to be converted. At the end of the current cycle when the comparator determines the current bit, the comparator also controls a mux to select one of the two predicted compensation values. Thus the compensation value is available at the beginning of the next bit's cycle, eliminating a long calculation delay. The compensation value for the first bit to be converted, such as the MSB, is calculated during calibration. Compensation values for other bits are data-dependent. Calibration values are accumulated during calibration to generate the first conversion compensation value for the first bit to be converted. |
| US08421652B2 |
Decoding circuit and decoding method thereof
A decoding circuit is adapted for decoding an input signal. The input signal includes at least a break and the time length of the break is a preset time. The decoding circuit includes a decoding unit and a detecting unit. The detecting unit detects whether the voltage level of the input signal is kept at a specific logic level for more than the preset time. If the input signal is kept at the specific logic level for more than the preset time, the detecting circuit, according to the voltage level of the specific logic level, outputs the input signal or the inverted input signal to the decoding unit so as to perform a decoding process. |
| US08421651B2 |
Mobile phone with improved keyboard scanning and component reduction and method
Apparatus and method to detect one or more keys of a mobile wireless electronic device that have received an activating input, e.g., have been pressed, interrogates simultaneously several keys of a group of keys to reduce time required to detect which of the keys is pushed to provide inputs to the electronic device. The keys are arranged in a two dimensional matrix that facilitates organized interrogation of the keys. Resistors are used in providing a decoupling effect with respect to the antenna function of the wireless electronic device. |
| US08421648B2 |
Wrong-way-travel warning device and wrong-way-travel warning method
A wrong-way-travel warning device comprising a vehicle speed detecting part configured to detect a vehicle speed of a vehicle, a part configured to detect a position of the vehicle, an angle detecting part configured to detect an angle of a vehicular longitudinal direction of the vehicle relative to a lane marking if the vehicle speed of the vehicle becomes less than or equal to a predetermined value, and a warning part configured to issue a warning to an occupant if the position of the vehicle is on a main lane of a highway and if the angle becomes about 90 degrees, is provided. |
| US08421643B2 |
Automatic valve seating integrity test
The present invention comprises methods for testing the valve seating integrity of a valve. The valve components that determine valve seating integrity are typically a valve seat and a valve closing element that engages the valve seat to close the valve. Examples of the test method described herein respectively test valve seating integrity during opening of the valve and during closing of the valve, and do so in all instances without interrupting the operation of a process control system that includes the valve, without isolating the valve, and without relying on user analysis. |
| US08421635B2 |
Patient bed
A patient bed with a multimedia system is disclosed. A patient can access a net work through the multimedia system, and to join a net meeting to chat with other patients. The multimedia system can also provide a consolidated platform of medical information for a doctor or a nurse. An input device of the patient bed may have a touch pad, which allows the patient to control the position of patient support through finger gesture. |
| US08421627B2 |
Method for associating and RFID tag with a known region
A method of associating radio-frequency identification (RFID) tags with a region, location, or container is provided. The method can comprise, among other steps, transmitting an interrogation signal with an RFID reader corresponding to a read zone of a first size, receiving a response from at least one of the plurality of RFID tags in the region as a new tag, recording an indicator of the response of the at least one of the plurality of RFID tags, thereby designating it as a recorded tag, increasing the read zone of the RFID reader until no new tags are detected, and associating of each of the recorded tags with the region. |
| US08421623B2 |
Infectious disease warning system
A system comprising a portable unit which can be temporarily placed outside a patient room comprising a processor, memory, a speaker or voice generator, and programming to allow an authorized user to select (A) a disease or medical condition which corresponds to preprogrammed simulated voice warnings, for example “wash hands,” “wear gown,” “wear gloves,” “wear mask,” “dispose of gown,” “use hand sanitizer,” “wash hands with soap and water after removing protective clothing,” and combinations of said voice warnings; or (B) one or more of said preprogrammed voice warnings; a room entry detector programmed to activate the simulated voice warnings, the system configured so that when entry to the room is detected, one or a combination of the simulated voice warnings is emitted by the system. |
| US08421621B2 |
Sensor and transmission control circuit in adaptive interface package
A programmable interface module includes a linear power regulator to control and provide power to interfaced components on an as needed basis. The interface module is implemented in, for example, a sensor pack and multiplexed to a plurality of sensor modules. In a first mode, the linear voltage regulator provides a relatively small amount of power which allows a sensor module to output a signal responsive to detecting an environmental condition (e.g., gamma or x-ray radiation, extreme temperatures, etc.). The interface module can switch the linear voltage regulator to a second mode in which the linear voltage regulator ramps up the amount of power provided to a detecting sensor module. The sensor module can then provide a level indicative of a concentration or intensity of the environmental condition. If the level surpasses a predetermined threshold, the sensor pack can output an alert signal to security server. |
| US08421616B1 |
Method and apparatus for concealing sensors in urban and industrial environments
The present invention provides a method of monitoring the position of a vehicle, vessel, rail car, barge, tanker truck that is loaded with bulk or hazardous material. A G.P.S unit is set to send a signal to a radio transmitter if the unit moves beyond a maximum permissible distance (for example, 50 feet or more). An oxygen sensor can be used to send a signal to a radio transmitter if oxygen levels fall below a selected minimum concentration. The radio transmitter can send the message to a tugboat crew, police department, fire department, company headquarters, civil defense office or other personnel if either of the unit has moved beyond the selected maximum travel distance or if oxygen levels fall below a minimum concentration. In addition to the radio transmission of oxygen concentration data and/or G.P.S position data, visible or audible alarms can be used such as strobe light, horn or the like. Also disclosed is a system for concealment of chemical and/or biological sensors in a building for urban or industrial environments. |
| US08421612B2 |
Vehicular system for providing tire pressure on a portable handset including use of the vehicle's entry system
An in-vehicle apparatus allows the user to check and adjust tire pressure whenever he/she thinks of doing it, by transmitting, from a portable unit that is carried by the user, a start request signal through UHF band electric wave to forcefully operate sensor units for detecting the tire pressure in each of the tires of the automobile, by collecting the tire pressure information to a control unit of the in-vehicle apparatus, and by displaying the tire pressure on a display unit of the portable unit when the tire pressure information is transmitted from a Bluetooth unit of the in-vehicle apparatus to a Bluetooth unit of the portable unit. |
| US08421610B2 |
Touch screen and method of operating the same
Provided are a touch screen and a method of operating the same. The touch screen includes a detecting part, a control part, and a tactile feedback part. The detecting part detects object's approach or contact. The control part receives a signal of the detecting part to output a feedback signal. The tactile feedback part receives the feedback signal of the control part to provide a tactile feedback to a contact position using a magnetic force. The tactile feedback uses the magnetic force of a magnetic dipole. |
| US08421608B2 |
Vibrating trigger button
A trigger switch for a hand-held device provides vibrating alerts directly to one or more fingers of a user's hand when signaled by the device. The trigger switch housing is pivotally mounted in the device with a stop to limit outward travel therefrom. A housing cavity receives a miniaturized vibrating motor that is electrically coupled to a printed circuit board, which has a wire bundle with a connector to couple the board to the device. The motor's body may contact one side of the printed circuit board, and directly on the opposite side of the board may be a platform with a post extending therefrom to support one end of a coil spring, with the other end being retained within the device. When the user completes an operation, the device may signal the printed circuit board, which causes a counterweight to rotate and transmit vibrations to the trigger switch. |
| US08421606B2 |
Wireless bed locating system
A system includes a unit having associated therewith first identification (ID) data. The unit is mountable to a room wall and has a first transmitter that transmits the first ID data wirelessly. The system also includes a hospital bed having associated therewith second ID data. The hospital bed is spaced from the unit and has a wireless receiver that receives the first ID data transmitted by the unit. The hospital bed has a second transmitter that transmits the first ID data and the second ID data wirelessly. |
| US08421602B2 |
Remote control unit for a programmable multimedia controller
A remote control unit is provided that includes an annular touch sensor for manipulating an annular menuing system displayed on a display device. In response to a user gesturing by scrolling clockwise or counter-clockwise about the annular touch sensor, pressing firmly on the annular touch sensor, or tapping at a particular location on the annular touch sensor, the annular menuing system is manipulated to select particular items. The remote control unit is further configured to implement location-awareness features. Control is adapted to the location of the remote control unit and to the devices located nearby to this location. Similarly the remote control unit is further configured to implement user-awareness features, such that the control is adapted for the individual preferences of different users. |
| US08421600B2 |
Utilizing an RFID tag in manufacturing for enhanced lifecycle management
Data associated with supply chain events for a manufactured assembly is automatically stored. In preferred embodiments the supply chain events for the manufactured assembly are stored on an RFID tag attached to the assembly as it travels through the supply chain to insure the data concerning the assembly is readily available and not separated from the assembly. In other embodiments, the supply chain events or characteristic data is stored on the RFID tag in a hierarchical structure beginning with the original state of the assembly and with additional entries for each step in the assembly process. In other embodiments, as the product undergoes rework, conversion to a different assembly, or personalizations, the new state of the assembly is stored in the RFID tag. In other preferred embodiments, other information is also stored on the RFID tag such as country of origin, failure data, cycle times and a quality status indicator. |
| US08421598B1 |
Battery assisted RFID system RF power and interference control
The present invention discloses battery assisted RFID system RF power control implementations that optimize the amount of transmitted power and interference from a reader in relation to the sensitivity of the RFID tags, their ranges from the reader, and the unique physics of the backscatter RFID radio link. Tag transmit power control implementations are also disclosed. These methods enhance system reliability when employing battery assisted RFID tags that operate with sensitive transistor based square law tag receivers and highly sensitive RFID readers intended to take advantage of outstanding tag sensitivity. Further enhancement is achieved via implementation of specialized commands that optimally support the power control operations, otherwise control system interference, and allow maximum usage of high sensitivity in both tags and readers. |
| US08421597B2 |
Remote control apparatus and portable communication terminal
A portable communication terminal having a remote control apparatus includes a CPU. The CPU detects electronic appliances around there by a wireless tag reader, displays characters respectively corresponding to the detected appliances on a monitor, transmits test signals to these appliances, and changes a manner of the character of the appliance except for the appliance which responds, that is, in an off-state. Furthermore, the CPU detects identification information of a base station which is able to communicate with the terminal, registers the identification information detected under a desired location condition in the register, and determines whether or not a match condition is satisfied between detected identification information and the identification information which has been registered. Then, if the determination result is affirmative, the electronic appliance around there is detected by the wireless tag reader, and an operation screen for remotely controlling the detected appliance on a monitor is displayed. |
| US08421595B2 |
Method, device, server and system for identity authentication using biometrics
A method, a device, a server and a system for authenticating the identity with the biological character in an authenticating system, the authenticating system at least includes a local device and an authenticating server, wherein the method comprises the following steps: inputting step, inputting the biological character data in the local device by a biological character sensor; matching step, matching the input biological character data with the original biological character data pre-stored in the memory of the local device; first identification code producing step, producing the first identification code in the local device if the input biological character data is matched with the original biological character data pre-stored in the memory; and authenticating step, sending the first identification code to the authenticating server, authenticating the first identification code by the authenticating server in order to authorize the system to perform the authorized operation. |
| US08421593B2 |
Apparatus, systems and methods for authentication of objects having multiple components
Apparatus, systems and methods for authenticating objects, comprising receiving an encrypted object identifier associated with an unknown object having multiple components, decrypting the encrypted object identifier using a first public key of a first public/private key pair to obtain unknown object information including unknown identification data for the multiple components, inspecting the unknown object to obtain actual object information including actual identification data for the multiple components, and comparing the unknown identification data with the actual identification data to determine whether the unknown object is an authentic object, wherein an authentic object has an object identifier generated using a first private key of the first public/private key pair to encrypt the actual object information. |
| US08421592B1 |
Mediation of electric vehicle charging by wireless network provider
A recharging station for recharging an electric vehicle has a fixed transceiver operable with a local interface and a wide-area wireless interface, wherein the wide-area wireless interface corresponds to a cellular network provider. A user transceiver is activated by a user to send an authentication request to the recharging station via the local interface. A front-end server in a core network of the cellular network provider communicates with the recharging station and the user transceiver. The recharging station forwards the authentication request with an identification of the recharging station to the front-end server, and the front-end server creates a PIN code in response to the authentication request if the identification of the user transceiver is verified. A back-end server associated with the utility provider receives the PIN code and verifies the identification of the recharging station. The front-end server sends the PIN code to both the user transceiver and the recharging station via the wide-area wireless interface, and the PIN code is used to initiate charging. |
| US08421586B2 |
Lamp-operating appliance for operating one or more light-sources and process for operating a lamp-operating appliance
The invention relates to a lamp operating device (10) for operating one or multiple light sources (20-1, 20-2), with a first interface unit (15) for connecting the lamp operating device (10) to a control line (2) and for receiving external control commands corresponding to a first communications protocol, and with a control unit (11) which operates the light source(s) (20-1, 20-2) in accordance with the control commands received via the first interface unit (15). A second interface unit (17) is provided for receiving programming information according to a second communications protocol, wherein the conversion of the control commands received via the first interface unit (15) for operating the light source(s) (20-1, 20-2) is performed by the control unit (11), at least partially taking into account the programming information. |
| US08421585B2 |
Alarm apparatus and manufacturing method
An alarm apparatus for sensing occurrence of abnormality in a plant that manufactures products by processing substrates, the alarm apparatus includes: means responsive to an inspection result of a surface of the substrates during manufacturing the products for aggregating degree of occurrence of defects for each monitoring unit region to produce an aggregation result, the monitoring unit region having a prescribed size configured for each type of the abnormality; means for comparing the degree of occurrence of defects in each of the monitoring unit regions with a reference; and means responsive to detection of the monitoring unit region with the degree of occurrence of defects being higher than the reference for transmitting an alarm and outputting the aggregation result. |
| US08421583B2 |
PTC device
There is provided a PTC device wherein its PTC element functions appropriately even when the PTC device is used in an environment in which solvent is present. The PTC device includes: (1) a polymer PTC component including a polymer PTC element and a first and a second metal electrodes disposed on both sides of the main surface thereof; (2) a lead connected to at least one of the metal electrodes of the polymer PTC component; and (3) a ceramic package having an open-ended space for accommodating the polymer PTC component, said open-ended space having at least one opening that defines the open-ended space. The lead closes said opening in order to isolate the polymer PTC component disposed in said open-ended space from the environment surrounding the ceramic package. |
| US08421581B2 |
Push-button testing system
A system for testing a push-button switch is provided. The system for testing a push-button switch includes a switch test device. The switch test device has a flexible tab attached to a pushing member at an end of the flexible tab. A sensor is attached to the flexible tab. The sensor generates a signal that changes relative to a deformation of the flexible tab. A data collection system is connected to the switch test device and receives signals from the sensor. |
| US08421579B2 |
Current protection device
A current protection device includes stacking first substrate, support layer, circuit layer, and second substrate. The surface of the first substrate attached to the support layer is an arrangement surface, and the surface of the second substrate attached to the circuit layer is a contact surface. The contact surface has a second recess, and the arrangement surface selectively has a first recess. The recesses serve to release pressure and to ensure the circuit is entirely blown by over current so as to prevent an arc effect. Besides the over current protection for electric equipment, the current protection device can be applied to light and small electronic device. |
| US08421567B2 |
Method for production of a pole face of a metallic closing element of an electromagnet
A method is disclosed for producing a pole face of a metal closing elements of a solenoid, especially for electromechanical switchgear. In at least one embodiment, the method includes machining the surface of a crude stamped part of the closing element to give the pole face. A corresponding armature, yoke, solenoid and switchgear are also disclosed. |
| US08421565B2 |
Starter motor solenoid with variable reluctance plunger
A solenoid for a vehicle starter includes at least one coil with a passage extending through the coil. A plunger is slideably positioned within the passage and configured to move in an axial direction between a first position and a second position. The plunger includes a substantially cylindrical outer surface portion with a circumferential notch formed in the outer surface portion. The at least one coil may include a pull-in coil and a hold-in coil wound on a spool. A plate member is positioned at one end of the spool and is separated from the plunger by a radial distance. The radial distance varies when the plunger moves in the axial direction as a result of the notch moving in relation to the plate member. A sleeve member may be coupled to the plunger such that the sleeve member covers the circumferential notch formed in the plunger. |
| US08421559B2 |
Interface acoustic wave device
The present invention relates to the field of acoustic wave devices, and particularly to that of transducers capable of operating at very high frequencies, from a few hundred MHz to several gigahertz, and its subject is more particularly an interface acoustic wave device including at least two substrates and a layer of ferroelectric material, the latter being contained between a first electrode and a second electrode and having first positive-polarization domains and second negative-polarization domains, the first and second domains being alternated, wherein the assembly constituted by the first electrode, the layer of ferroelectric material, and the second electrode is contained between a first substrate and a second substrate. |
| US08421552B2 |
High-frequency switch
Provided is a high-frequency switch formed by a first switch circuit connected in parallel to a first λ/4 signal transmission path for transmitting a transmission signal from a transmission terminal and a second switch circuit connected in parallel to a second λ/4 signal transmission path for transmitting a reception signal to a reception terminal. The high-frequency switch further includes a directivity coupler which has the first λ/4 signal transmission path as a constituent element and detects a reflected wave of the transmission signal. The directivity coupler includes: the first λ/4 signal transmission path; a λ/4 signal line arranged to oppose to the first λ/4 signal transmission path; a reflected wave output terminal connected to one end of the λ/4 signal line; and a terminal resistor connected to the other end of the λ/4 signal line. |
| US08421550B2 |
Impedance matching component and hybrid wave-absorbing material
Embodiments of the present disclosure relate to an impedance matching component and a hybrid wave-absorbing material. The impedance matching component is disposed between a first medium and a second medium, and comprises a plurality of functional sheet layers. Impedances of the functional sheet layers vary continuously in a stacking direction of the functional sheet layers, with the impedance of a first one of the functional sheet layers being identical to that of the first medium and the impedance of a last one of the functional sheet layers being identical to that of the second medium. |
| US08421549B2 |
Impedance matching component
The present disclosure discloses an impedance matching component disposed between a first medium and a second medium, which is formed by stacking a plurality of homogeneous metamaterial sheet layers in a direction perpendicular to surfaces thereof. Each of the metamaterial sheet layers comprises a substrate and a plurality of man-made microstructures attached thereon. A first and last metamaterial sheet layers have impedances identical to those of the first and second media respectively. The man-made microstructures attached on the first metamaterial sheet layer have a first pattern, the man-made microstructures attached on the last metamaterial sheet layer have a second pattern, and the man-made microstructures attached on intermediate ones of the metamaterial sheet layers have patterns that are combinations of the first and second patterns, with the first pattern becoming smaller continuously and the second pattern becoming larger continuously in the stacking direction of the metamaterial sheet layers. |
| US08421545B2 |
Oscillators and methods of operating the same
Oscillators and methods of operating the same, the oscillators include a pinned layer having a fixed magnetization direction, a first free layer over the pinned layer, and a second free layer over the first free layer. The oscillators are configured to generate a signal using precession of a magnetic moment of at least one of the first and second free layers. |
| US08421543B2 |
Crystal oscillator and method for manufacturing the same
A crystal oscillator includes a cover, a crystal blank and an Integrated Circuit (IC) chip. The cover has a surface, a cavity formed in the surface, a plurality of conductive contacts and a conductive sealing ring. The conductive contacts are disposed on the surface, and the conductive sealing ring is disposed on the surface and surrounds the conductive contacts. The IC chip is connected to the conductive contacts and the conductive sealing ring, and forms a hermetic chamber with the cover and the conductive sealing ring. The crystal blank is located in the hermetic chamber, and is electrically connected to the IC chip. Furthermore, a method for manufacturing a crystal oscillator is also provided. |
| US08421540B1 |
Method and apparatus for run-time short circuit protection for amplifiers
The system contains a first input receiving a signal from the amplifier input. A second input receives a signal from the amplifier output. A gain modification device is connected to the second input thereby reducing an amplitude of the signal from the amplifier output. A difference element connected to the gain modification device and the first input subtracts one of the first input and the second input from the other of the first input and the second input and outputting a difference voltage. A comparator, connected to the difference element and a threshold voltage source, compares the difference voltage to a threshold voltage. A disabling device is connected to the comparator and an output stage of the amplifier, wherein an output stage of the amplifier is disabled when the threshold voltage exceeds the difference voltage. |
| US08421539B2 |
Multi-mode high efficiency linear power amplifier
A power amplifier includes a plurality of amplification paths in which at least one amplification path is selectively enabled and disabled, wherein each amplification path includes an output impedance modification element and an output phase shift element that is operable independently from the output impedance modification element, and wherein the output impedance modification element in each amplification path provides selective impedance for each amplification path. |
| US08421535B2 |
Method and apparatus for reducing distortion in Class D amplifier
Provided are apparatuses and methods for reducing nonlinear distortions in Class D amplifiers by dynamically changing first and second threshold voltages in a pulse width modulator. A Class D amplifier apparatus is disclosed, comprising a pulse width modulator whose operation relies on a first and second threshold value, and a threshold controller which varies the thresholds in response to internal signals in the amplifier. Further, a method of processing Class D amplifier internal signals is disclosed, comprising steps involving measuring internal signals in a Class D amplifier and varying threshold signals in response to those measurements within the amplifier. |
| US08421530B2 |
Filter circuit, integrated circuit including the same, and signal filtering method
A filter circuit includes a filtering unit configured to filter an input signal and generate an output signal, and a weight generation unit configured to monitor a variation of the output signal and generate weight information based on the monitored variation. |
| US08421526B2 |
Circuit charge pump arrangement and method for providing a regulated current
A power source arrangement comprises a controlled and clocked operated power source, that power source providing an output voltage out of a plurality of output voltages in response to a first multiplication factor. One or more regulated current sources are connected to the controlled and clocked operated power source to provide an output current to respective loads. Each of the one or more regulated current sources is adapted to provide a first indication signal upon a regulated operation of the respective current source. The power source arrangement further comprises a dummy power source as well as a dummy current source connected to the dummy power source. The dummy current source receives a load signal corresponding to a voltage drop over the loads connected to the one or more regulated current sources and provides a second indication signal in response thereto. A control circuit receives the respective first and second indication signal and provides the control signal to the controlled and clocked operated power source in response thereto. |
| US08421524B2 |
Charge pump systems with reduction in inefficiencies due to charge sharing between capacitances
Improvements in the efficiency of two charge pump designs are presented. As a charge pump switches between modes, capacitances are charged. Due to charge sharing between capacitances, inefficiencies are introduced. Techniques for reducing these inefficiencies are presented for two different charge pump designs are presented. For a clock voltage doubler type of pump, a four phase clock scheme is introduced to pre-charge the output nodes of the pump's legs. For a pump design where a set of capacitances are connected in series to supply the output during the charging phase, one or more pre-charging phases are introduced after the reset phase, but before the charging phase. In this pre-charge phase, the bottom plate of a capacitor is set to the high voltage level prior to being connected to the top plate of the preceding capacitor in the series. |
| US08421522B2 |
High voltage generator and method of generating high voltage
A high voltage generator includes a negative bias generator configured to generate a negative bias, a clock generator configured to generate a clock signal that toggles between a positive bias and the negative bias, a clock doubling circuit configured to raise the positive bias of the clock signal and to output the clock signal having the raised positive bias as a second clock signal, and a charge pump configured to generate a high voltage using the second clock signal having the raised positive bias. |
| US08421521B1 |
Chemical detection with MOSFET sensor
Embodiments relate to a metal-oxide-semiconductor device including a metal-oxide-semiconductor field-effect transistor (MOSFET). The MOSFET includes a gate configured to change electrical characteristics based on a sensed chemical characteristic and a source and drain. One of the source and drain is connected to an analysis circuit, and a backgate is connected to an AC voltage source. |
| US08421517B2 |
Semiconductor device including power conversion and a drive recorder
A semiconductor device of the present invention is provided with a terminal for connecting a plurality of buses to the outside of the semiconductor device, a bus interface circuit for treating the plurality of buses as the same bus within the semiconductor device and a controller connected to the bus interface circuit. |
| US08421516B2 |
Apparatus and method providing an interface between a first voltage domain and a second voltage domain
An interface between first and second voltage domains is provided. A level shifter is configured to receive an input signal from the first voltage domain and to level shift the input signal to provide an output signal for passing to the second voltage domain. A control signal generator is configured to generate a second voltage domain control signal in dependence on at least one first voltage domain control signal from a controller in the first voltage domain. The level shifter is configured to be in a retention state when the second voltage domain control signal has a first value, such that its output signal is held constant even when the controller becomes not actively driven by the first voltage supply. The level shifter is configured to be in a transmission state when the second voltage domain control signal has a second value, wherein the output signal depends on the input signal. |
| US08421512B2 |
Duty compensation circuit
A duty compensation circuit including a duty detection circuit, a duty adjustment signal generator for generating a control signal from a detected duty, and a duty adjustment circuit, in which the duty detection circuit executes sampling of a clock at sampling timing obtained by causing the clock to be delayed by a variable delay circuit, thereby detecting a duty. Thereby, duty compensation is enabled without preparing a clock higher in operating speed than a clock before compensation. |
| US08421507B2 |
Phase-locked loop with calibration function and associated calibration method
A phase-locked loop (PLL) includes a charge pump, a frequency divider, a voltage detector, a control module, and a calibration module. When a predetermined current amount and a predetermined frequency dividing amount are provided, the voltage detector measures a voltage associated with an output frequency of the PLL to generate a first reference voltage. When a test current amount and the predetermined frequency dividing amount are provided, the voltage detector again measures the voltage to generate a second reference voltage. When the predetermined current amount and a test frequency dividing amount are provided, the voltage detector again measures the voltage to generate a third reference voltage. The control module estimates a loop gain of the PLL according to the current amounts, the frequency dividing amounts and the reference voltages. The calibration module calibrates the PLL according to the loop gain. |
| US08421499B2 |
Power switch ramp rate control using programmable connection to switches
In an embodiment, an integrated circuit includes a power gated block and a power manager circuit. The power manager circuit is configured to provide a block enable signal and at least one select signal to the power gated block. The power manager may generate the select signal responsive to various parameters that affect the speed of the integrated circuit, such as power supply voltage magnitude, operating temperature, and/or process corner. The power gated block may control the rate at which power switches are enabled based on the select signal or signals. For example, the power switches may be enabled in a more parallel or more serial fashion and/or the drive strength of block enable buffering to the power switches may be varied. In another embodiment, the power manager circuit may assert multiple block enables to the power gated block (which are connected to separate sets of power switches), and may control the timing of assertion of the enables to control the rate at which power switches are enabled. |
| US08421498B2 |
Semiconductor device with bus connection circuit and method of making bus connection
A semiconductor device capable of achieving desirable communication behavior through a bus regardless of whether or not a pull-up resistor is connected on a bus line. The semiconductor device includes external pull-up determination unit and internal pull-up setting unit. The external pull-up determination unit applies a pull-down voltage through an internal pull-down resistor to the bus line, and determines whether an external pull-up resistor external to the semiconductor device is connected on the bus line on the basis of the voltage level of the bus line when the pull-down voltage is applied to the bus line. The internal pull-up setting unit stops application of the pull-down voltage, and applies a pull-up voltage through an internal pull-up resistor to the bus line if it is determined that no external pull-up resistor is connected on the bus line. The internal pull-up setting unit stops application of the pull-down voltage if it is determined that the external pull-up resistor is connected on the bus line. |
| US08421492B2 |
Probe card and method for selecting the same
A probe card includes a probe unit having multiple through holes arranged therein, multiple probe needles respectively press-fitted to the multiple through holes, a printed board having convex portions which presses down the probe needles located in predetermined positions, and a unit holder which supports the probe unit and the printed board. |
| US08421490B2 |
Loading card for measuring voltages
A loading card includes a printed circuit board, first and second connection portions. The first connection portion includes first and second voltage pins, and a first ground pin. The second connection portion includes third and fourth voltage pins, and a second ground pin. The loading card also includes a first voltage signal test point connected to the first and third voltage pins, a second voltage signal test point connected to the second and fourth voltage pins, a first ground signal test point connected to the first and second ground signal test points, and a second ground signal test point connected to the first and second ground signal test points. |
| US08421486B2 |
Oil-degradation detecting apparatus
An oil-degradation detecting apparatus that can more accurately judge oil degradation and a mechanical system having a rotating part or a sliding part and including the oil-degradation detecting apparatus are provided. Two plates (21, 22) are disposed in an oil flow path (11) so as to be parallel to each other, an ammeter (24) measures a current that flows when an AC voltage is applied between the two plates (21, 22), a voltmeter measures the voltage between the plates (21, 22), and a signal processor (processor) (31) determines the electrical conductivity and the dielectric constant of the oil (10) based on the measurement results from the ammeter (24) and the voltmeter (25) and judges degradation of the oil (10) based on the electrical conductivity and the dielectric constant. |
| US08421485B2 |
Detection device and detection system using the same
A particle detection device (10) included substrates (1, 4), insulating members (2, 3), supporting member (5), and electrodes (6, 7). The insulating member (2) is provided on a principal surface of the substrate (1) and has a recess. The insulating member (3) is provided so as to make contact with the insulating member (3) and the substrate (4). The substrate (4) is formed on a principal surface of the supporting member (5). The electrode (6) is formed on a surface, which is opposite to the surface where the insulating member (2) is formed, of the substrate (1). The electrode (7) is formed on the surface (5A), the side surface (5B), and the rear surface (5C) of the supporting member (5) so as to be connected to the substrate (4). Accordingly, the detection device 10 includes a gap (8) surrounded by the insulating members (2, 3). The substrate (1) is connected to the substrate (4) with the insulating members (2, 3) and the supporting member (5) (quartz). In one embodiment, the insulating member (3) consist of quantum dots. Detection of the particles is either optically or electrically. |
| US08421483B2 |
Touch and force sensing for input devices
A device may include a first layer, a second layer, a third layer, a capacitive sensing component coupled to the first layer, and a force sensing component coupled to the first layer and the third layer and configured to detect the amount of force applied to the second layer. A method may include monitoring capacitance and voltage at one or more input sensors configured to detect changes in capacitance and to detect changes in applied force, detecting a change in capacitance, activating a capacitance response in response to detecting a change in capacitance, detecting a change in voltage, and activating a force response in response to detecting a change in voltage. |
| US08421478B2 |
Radio frequency integrated circuit with on-chip noise source for self-test
Radio frequency integrated circuits with on-chip noise source for use in the performance of tests and/or calibrations. A radio frequency integrated circuit includes at least one noise source residing on the radio frequency integrated circuit, the noise source being controllable by a digital input, and a radio frequency circuit residing on the radio frequency integrated circuit and being coupled to the noise source, wherein at least one attribute of the radio frequency circuit is determinable by controlling the noise source via the digital input. |
| US08421476B2 |
Fan failure detector
A fan failure detector for detecting whether a fan is locked with a drive IC, a coil and an inspection circuit, the drive IC outputting a pulse signal, the coil is electrically connected to the drive IC and driven by the drive IC, the inspection circuit is electrically connected to the drive IC and the coil, the inspection circuit includes an RC charge/discharge circuit, a diode, a second capacitor, a voltage divider and a transistor having an output terminal, wherein the RC charge/discharge circuit, the diode, the voltage divider and the transistor are sequentially connected in series, the second capacitor is electrically connected with the diode and the voltage divider, when the fan operates normally, the output terminal provides a low voltage signal, when the fan locks, the output terminal provides a high voltage signal to avoid a wrong judgment that the fan still operates normally. |
| US08421475B2 |
AC current sensor for measuring electric AC current in a conductor and an indicator system comprising such a sensor
The invention concerns a current sensor (22; 24; 26) for substantially in real time measuring electric current in a conductor. It is suitable for application in an indicator system (1) such as a short circuit indicator system for measuring instantaneous i.e. live current value, power, reactive power, phase angle, polarity, short circuits, in single or averaged values. It comprises current responsive means comprising a current transformer (2210), adapted for mounting adjacent to said electric conductor; and sensor circuitry (2220) comprising means for emitting a non-electrical wave signal as an output; said sensor circuitry (2220) comprises current level converter circuitry (2222) comprising a current-to-frequency converter adapted to provide said non-electrical wave signal as a current level indication pulse signal (CS1) having a pulse frequency (Pfcs) which is proportional to said real time electric conductor current, when the latter is within a predetermined current interval (I1-I2). Thus, a low cost sensor is provided. The invention further relates to an indicator system (1) for an electric conductor comprising at least one of the above mentioned current sensors (22; 24; 26). |
| US08421474B2 |
Circuit test apparatus
A circuit testing apparatus for testing a device under test is disclosed. The device under test includes a first terminal end and second terminal end for generating a first output signal and a second output signal, respectively. The circuit testing apparatus determines whether the device under test has passed the test according to the first and second output signals. |
| US08421472B2 |
Apparatuses and methods for testing welding apparatuses
A testing apparatus for testing a welding apparatus is disclosed. The testing apparatus includes a receptacle, a fault indicator, and a power supply. The receptacle includes a grounding socket and a plurality of power sockets. The power supply is electrically coupled to the grounding socket, the fault indicator, and at least one of the plurality of power sockets. When a plug of the welding apparatus is matingly coupled to the receptacle, the fault indicator indicates whether an electrical resistance between a grounding prong of the plug and at least one of a plurality of power prongs of the plug is below a predetermined threshold. |
| US08421468B2 |
Internal resistance estimation apparatus for power storage device, degradation determination apparatus for power storage device, power supply system, and internal resistance estimation method for power storage device
A converter control unit responds to a command from a start determining unit to control a converter such that a ripple current is generated at a secondary battery. A storage unit stores a map defining a correlative relationship between the temperature and current of the secondary battery and internal resistance. An estimating unit estimates a value of internal resistance of the secondary battery based on each detection value of the temperature and current, and the map stored in the storage unit. |
| US08421458B2 |
NMR diagnostics by means of a plastic sample container
Sample containers and methods for employing the same in in-vitro nuclear magnetic resonance measurements are provided. The sample containers are made of a material that comprises one or more polymeric materials. |
| US08421457B2 |
Methods and systems for magnetically resonating both a subject and a substance administered to the subject
Embodiments of the current invention include a magnetic resonance system including a magnetic resonance device and a substance to be introduced to a subject in accordance with a treatment. Further embodiments of the current invention include a method of using a magnetic resonance system including administering a substance to a subject and providing magnetic resonance to the subject. |
| US08421455B1 |
Pulsed free induction decay nonlinear magneto-optical rotation apparatus
A magnetometer and concomitant magnetometry method comprising emitting light from a light source, via a pulse generator pulsing light from the light source, directing the pulsed light to an atomic chamber, employing a field sensor in the atomic chamber, and via a signal processing module receiving a signal from the field sensor. |
| US08421454B2 |
High-resolution wireline nuclear magnetic resonance tool
A nuclear magnetic resonance well logging tool, where some embodiments comprise two, oppositely oriented magnets separated by a pole piece to guide static magnetic flux into a sensitive volume, and another pole piece serving as a core for several antennas. For some embodiments, the antennas are solenoids. Two of the antennas serve as transmit and receive antennas, where they are driven to generate an elliptically polarized magnetic field, and their antenna responses are combined so that the combined response is sensitive to elliptically polarized magnetic fields, but with zero gradient in the z-direction. A third antenna serves as a receive antenna sensitive to magnetic field vectors having a sinusoidal spatial variation in the z-direction of period equal to the length of the third antenna. A fourth antenna serves as a receive antenna sensitive to sinusoidal magnetic field vectors with the same spatial-frequency as the third antenna, but phase shifted by 90 degrees. A fifth antenna may be utilized, which serves as a receive antenna sensitive to the next higher spatial-frequency component of the received signal. The receive antennas have good cancellation of mutual coupling. Other embodiments are described and claimed. |
| US08421447B2 |
Position sensor
An electromagnetic induction type rotary encoder includes an excitation board including an excitation coil, a detection board fixed to a movable element to face the excitation board and including a detection coil placed to face the excitation coil with a clearance therefrom, and a controller for outputting an excitation signal to the excitation coil and processing a detection signal output from the detection coil. The controller includes an excitation circuit for exciting the excitation coil at high frequency and a high-frequency generating circuit, a demodulation circuit for demodulating a signal from the detection coil in accordance with excitation to the excitation coil, a waveform shaping circuit for waveform shaping a signal from the demodulation circuit, and a pulse generating circuit for outputting a pulse signal based on the signal from the waveform shaping circuit. Each of the excitation coil and the detection coil is formed in a meandering coil pattern. |
| US08421445B2 |
Position detecting system and position detecting method
A system includes an object in a space to generate an induced field; coils that generate a driving field; a detecting coil that detects a synthetic field of the driving field and the induced field; a unit that detects a driving current through the coil in synchronization with field detection by the detecting coil; a calculating unit that calculates a position and a direction of the object based on a detection value of the synthetic field and a detection value of the driving current; and a unit that calculates a phase of a driving field component which corresponds to the driving field at the detection value of the synthetic field, based on the detection value. The calculating unit obtains a component having a phase difference approximately orthogonal to the phase of the driving field component and calculates the position and direction of the object based on the obtained component. |
| US08421443B2 |
Branch current monitor with calibration
A meter for measuring electric power consumed by a plurality of branch circuits includes interchangeable current transformers including respective transformer memories for storage of transformer characterization data and enables self-discovery of a phase shift induced by respective current transformers and the phase of current conducted by each branch circuit. |
| US08421436B2 |
Step-down converter maintaining stable operation at start up
A step-down converter is provided. The step-down converter includes a DC-DC converter including a boost capacitor and an NMOS transistor, the DC-DC converter converting an input direct current (DC) voltage to an output DC voltage; and an electric discharge circuit which adjusts the output voltage to be less than or equal to the input voltage. |
| US08421435B2 |
Power supply voltage controlling circuit for use in subthreshold digital CMOS circuit including minute current generator and controlled output voltage generator circuit
In a circuit and method for correcting a delay variation of a subthreshold CMOS circuit operating in a subthreshold region, a power supply voltage controlling circuit is provided for supplying a controlled output voltage to a subthreshold digital CMOS circuit as a controlled power supply voltage. The subthreshold digital CMOS circuit includes CMOS circuits each having a pMOSFET and an nMOSFET and operating in a subthreshold region with a predetermined delay time, and further includes a minute current generator circuit generating a predetermined minute current based on a power supply voltage, and a controlled output voltage generator circuit generating a controlled output voltage for correcting a variation in the delay time based on a generated minute current and supplying the controlled output voltage to the subthreshold digital CMOS circuit as a controlled power supply voltage including a change in each threshold voltage of the pMOSFET and the nMOSFET. |
| US08421433B2 |
Low noise bandgap references
Low noise bandgap voltage references using a cascaded sum of bipolar transistor cross coupled loops. These loops are designed to provide the total PTAT voltage necessary for one and two bandgap voltage references. The PTAT voltage noise is the square root of the sum of the squares of the noise voltage of each transistor in the loops. The total noise of the reference can be much lower than approaches using two or 4 bipolar devices to get a PTAT voltage and then gaining this PTAT voltage to the required total PTAT voltage. The cross coupled loops also reject noise in the current that bias them. Alternate embodiments are disclosed. |
| US08421432B2 |
DC/DC converter having a fast and accurate average current limit
Three modifications are provided to obtain a fast and accurate average current limit in a DC/DC converter. The first modification relates to providing a bias signal control configured to apply a variable DC bias signal to the compensation ramp signal generated in the DC/DC converter so that the compensating ramp signal is biased to zero at the end of each ON-time for each cycle so that the peak current limit is independent of the duty cycle of the pulse width modulation signal during current limit conditions. A second modification relates to modulating the clamp voltage that establishes the peak current limit as a function of ripple of the inductor current for each cycle of the pulse width modulation signal so as to reduce or cancel the effect of the inductor ripple current on the average output current during current limit conditions. The third modification relates to adjusting the frequency of the pulse width modulation signal during current limit conditions as a function of both the input voltage and the output voltage of the DC/DC converter. |
| US08421431B2 |
Frequency jitter controller for power converter
A frequency-jitter-controller for a power-converter is provided, and which includes a first and a second capacitance units, a first and a second charge-discharge control units, a comparing unit and a control unit. Both capacitance units are charged to a crossing-voltage during a charging phase and discharged to a reference voltage and a clamp voltage respectively during a discharging-phase in response to operations of both charge-discharge control units. The comparing unit outputs a pulse signal, compares voltages of both capacitance units during the charging phase, and compares the voltage of the first capacitance unit and the reference voltage during the discharging phase. The control unit generates a frequency jitter control signal according to the pulse signal to adjust a rising rate of the voltage on the second capacitance unit, so as to change a frequency of the pulse signal, and thus reduce EMI generated by switching switch-elements in the power-converter. |
| US08421426B2 |
Constant current driving device having an improved accuracy
An embodiment of a driving device is proposed for supplying at least one regulated global output current to a load. The driving device includes programming means for programming a value of the global output current within a global current range. Reference means are provided for supplying a reference voltage, which has a value corresponding to the value of the global output current. Conversion means are then used for converting the reference voltage into the global output current. In the driving device according to an embodiment of the disclosure, the conversion means include a plurality of conversion units for corresponding partial current ranges, which partition the global current range. Each conversion unit is adapted to convert the reference voltage into a partial output current that contributes to the global output current, with the partial output current that is within the corresponding partial current range. The driving device further includes control means for selectively enabling the conversion units according to the partial current range wherein the global output current falls and for controlling the reference voltage so as to swing in a partial voltage range for each partial current range (with the partial voltage ranges that are at least partly superimposed). |
| US08421422B2 |
Power supply device
A power supply device comprising: a magneto generator including a rotor including a magnet forming a magnetic field; a rectifying unit rectifying an alternating current of the generator to a direct current and supplying to an electrical load; a voltage detection unit detecting a voltage of the electrical load; an opening unit interrupting electrical conduction of an output of the generator; short-circuiting units electrically short-circuiting the output; a torque supplying device supplying torque to the rotor; a voltage control unit selectively performing one of opening-control of controlling on/off switching of the opening unit and short-circuit-control of controlling on/off switching of the short-circuiting units to control the voltage of the electrical load to a predetermined value in accordance with the voltage detected by the voltage detection unit; a switching control unit switching and controlling between the above two controls in accordance with an operating state regarding rotation of the rotor. |
| US08421421B2 |
Storage system including a plurality of battery modules
In a storage system provided with a plurality of storage modules, the rated power consumption can be reduced. The storage system is provided with a charge control unit. The charge control unit stops, when detecting that a predetermined number of a plurality of battery modules are during battery charging, the battery charging in the remaining battery modules. |
| US08421416B2 |
Battery charge compensation
A battery charger and method for a rechargeable battery pack which includes various elements in series with the cells to be charged, including but not limited to current control FETs, a fuse, current sense resistor, and internal series impedance of the series connected cells to be charged. The charging current Ichg flowing through these series elements reduces the voltage applied to the cells, thus lengthening charging time. A compensation voltage Vcomp, which when added to the nominal charging voltage for the series connected cells overcomes these voltage drops, facilitates more efficient charging while avoiding over-voltage damage to the cells. Three voltages representing substantially all of the voltage drops reducing the charging voltage on the cells, are summed, and the result is a compensation voltage which is utilized to change the nominal charge voltage for the battery to overcome these voltage drops. |
| US08421414B2 |
Mobile electronic device and power management method of battery module thereof
This invention relates to a mobile electronic device and a power management method of a battery module thereof. The mobile electronic device includes a battery module, a charging/discharging module, and a control module. The charging/discharging module is coupled with the battery module. The control module is coupled with the battery module and the charging/discharging module. When the power supply is coupled with the mobile electronic device and the system time is not within a maintenance period, the control module controls the charging/discharging module to maintain capacity of the battery module within a first capacity range. When the power supply is coupled with the mobile electronic device and the system time is within the maintenance period, the control module controls the charging/discharging module to maintain the capacity of the battery module within a second capacity range. |
| US08421413B2 |
Battery fault detection apparatus
The battery fault determination apparatus includes battery monitor sections connected in a daisy chain, each of which is provided for a corresponding one of unit batteries each including battery cells connected in series to monitor the battery cells and output an output signal indicative of a monitoring result, and a control section configured to output a control signal to the battery monitor sections. The control signal and the output signal are cascaded through the battery monitor sections causing each battery monitor section to perform a state change between a state to monitor overcharge of the battery cells and a state to monitor wire breakage. Each battery monitor section is configured to receive the control signal from the immediately upstream-side battery monitor section, make a detection whether the state change has been performed correctly, and output the output signal including a detection result to the immediately downstream-side battery monitor section. |
| US08421412B2 |
Cell balancing circuit and secondary battery with cell balancing circuit
A cell balancing circuit with a self-balancing function and a secondary battery with the cell balancing circuit, the cell balancing circuit includes a balancing unit provided for every two adjacent unit cells among the unit cells. The balancing unit includes a discharge unit and a voltage-dividing unit. The discharge unit sets a discharge path to discharge only the unit cell with the higher voltage among the two adjacent unit cells. The voltage-dividing unit uses the voltages of the two adjacent unit cells to provide an enable signal to the discharge unit. |
| US08421411B2 |
Resonance type non-contact charging device
A resonance type non-contact charging device includes a high frequency power source, a primary side resonant coil, a secondary side resonant coil, a charger, a secondary battery, and a stop control unit. The primary side resonant coil receives supply of high frequency electric power from the high frequency power source. The secondary side resonant coil is arranged apart from the primary side resonant coil in a non-contact manner. The secondary side resonant coil receives electric power from the primary side resonant coil through magnetic field resonance between the primary side resonant coil and the secondary side resonant coil. The charger receives supply of high frequency electric power from the secondary side resonant coil. The secondary battery is connected to the charger. The stop control unit stops the high frequency power source before stopping the charger when charging is to be stopped. |
| US08421406B2 |
Charge control circuit, battery-operated device, charging apparatus and charging method
A charge control circuit includes a first acquisition unit that acquires a total discharge electric quantity of a lead storage battery, the total discharge electric quantity being separated into a first discharge electric quantity which is a discharge electric quantity of a discharge current having a current value of less than a predetermined level, and a second discharge electric quantity which is a discharge electric quantity of a discharge current having a current value of not less than the predetermined level, a computing unit that obtains a first and second charge electric quantities corresponding to the first and second discharge electric quantities respectively, and a charge electric quantity required for charging the lead storage battery as a sum of the obtained first and second charge electric quantities, and a charge control unit that controls a charge of the lead storage battery based on the charge electric quantity. |
| US08421405B2 |
Charge system, mobile electronic device, cell terminal used for them, and secondary cell
It is possible to prevent charge of an incompatible secondary cell while suppressing the size of a mobile electronic device and a secondary cell without increasing power consumption so as to prevent damage of the secondary cell or the mobile electronic device by charge. A detachable secondary cell (30) supplies power to a mobile electronic device (2). The mobile electronic device (2) includes: a cell terminal (60) which outputs and inputs power to/from the mounted secondary cell (30); non-contact information extraction means (20) which performs a magnetic field communication; a loop antenna (26) which transmits/receives a signal using an electromagnetic wave by the non-contact information extraction means (20); and control means (22) which acquires particular information outputted from the non-contact information extraction means (20) and controls charge of the secondary cell (30) according to the acquired particular information. The loop antenna (26) is arranged in the cell terminal (60). |
| US08421404B2 |
Power feeding control apparatus
A power feeding control apparatus includes a housing for accommodating at least a relay unit arranged on power feeding lines to open and close the power feeding lines, a control circuit for controlling the relay unit, a leakage current detection circuit for detecting leakage current in an electric vehicle and a power supply circuit for generating a control electric power. The apparatus further includes a power source side connector removably connected to a socket of an external power source, a vehicle side connector removably connected to a power receiving connector of the electric vehicle and a first and a second board that the power supply circuit and the control circuit are mounted, respectively. A power feeding line block provided separately from the first and the second board and having metal plates constituting the power feeding lines. The metal plates are insertion-molded in the power feeding line block. |
| US08421399B2 |
Energy saver delay circuit for AC induction motors
A power control system for an A.C. induction motor is disclosed, comprising a voltage/current phase difference generator for determining a difference in phase between a voltage applied to the motor and a current drawn by the motor, and for generating a phase difference signal as a function of the determined difference in phase, the voltage/current phase difference generator including an integrator, the integrator receiving the phase difference signal and generating an error signal for controlling an amount of power supplied to the motor as a function of the phase difference signal, the integrator being electrically coupled to a potentiometer, the potentiometer providing a bias signal for at least partially controlling the error signal; and a delay circuit for controlling the bias signal provided by the potentiometer so as to cause full available power to be supplied to the motor for a predetermined amount of time. The potentiometer further comprises first and second outer terminals and a center tap terminal, the center tap terminal providing the bias signal. The delay circuit controls the resistance appearing across the first outer terminal and second outer terminal of the potentiometer for the predetermined amount of time. |
| US08421398B2 |
Power control for induction motors using variable frequency AC power
An autonomous controller allows an AC induction motor to operate over a broad range of AC power supply frequencies by reducing the amount of current supplied to the motor at lower frequencies. The controller detects the frequency of the power supply and switches the supply current on and off during each AC cycle to limit the RMS current to a value that is related to the detected frequency. Alternatively, the controller switches capacitive reactance into the power supply circuit which reduces the current supplied to the motor at lower AC frequencies. |
| US08421397B2 |
System and method for fast start-up of an induction motor
A system for controlling operation of a motor drive during fast start-up of an induction motor is disclosed. The system includes an AC motor drive having a PWM inverter and a control system to generate a command signal to cause the PWM inverter to control an output of the AC motor drive. The control system includes a start-up modulator that is selectively operable during start-up acceleration of the AC motor, the start-up modulator programmed to determine a motor current applied to the AC motor and a voltage of a DC bus, generate a first frequency offset that causes a frequency reference of the command signal to be decreased when the motor current is greater than a reference current threshold, and generate a second frequency offset that causes the frequency reference of the command signal to be increased when the DC bus voltage is greater than a reference voltage threshold. |
| US08421395B2 |
Synchronous motor and control method of synchronous motor
A synchronous motor including therein a three-phase inverter and position sensors, having a unit for calculating a digital input current value from the analog output of an input current detection circuit that detects the input current flowing into the DC input terminal of the three-phase inverter, and a digital feedback speed control unit for adjusting the amplitudes and frequency of the AC voltages outputted from the three-phase inverter in such a manner that the motor speed calculated by a motor speed calculation unit 41 on the basis of the outputs of the position sensors approaches a speed command value received by a communication reception unit from outside the synchronous motor. The synchronous motor further includes therein a communication transmission unit for transmitting the input current value and the motor speed to outside the synchronous motor. |
| US08421394B2 |
Method and apparatus for current measurement in an electrical network, in particular a multiphase electrical network
The invention relates to a method for current measurement in an in particular multiphase electrical system, in which an electrical load is energized as desired by at least one circuit element and a control unit produces drive signals which act on the at least one circuit element in order to achieve the desired energization of the load. The invention provides that clock patterns of the drive signals are associated with measurement windows for current measurement, in particular for measuring phase currents, and clock patterns are temporally offset in order to obtain measurement windows with a sufficient temporal length. A minimum temporal shift is the sum of a minimum dead time of the circuit element, a minimum settling time of the measuring amplifier circuit, and a minimum sampling time of the analogue-to-digital converter. The invention furthermore provides that the clock patterns are selected taking into consideration a phase selection for the current measurement. Provision may be made for the clock patterns to be selected taking into consideration the instantaneous rotary angle position of the phase vector. In addition, a corresponding apparatus is specified. |
| US08421392B2 |
Apparatus and method for controlling speed of fan in computer
An apparatus and method controls a speed of a fan in a computer. The apparatus includes a signal generator, a signal buffer, a signal switch, and an integrated baseboard management controller (IBMC). The IBMC includes a general purpose input output (GIPO) pin and a signal output port. The IBMC determines whether the IBMC operates normally by detecting a voltage status of the GIPO pin. The signal generator generates a first pulse width modulation (PWM) signal according to a system temperature of the computer when the IBMC does not operate normally. The IBMC generates a second PWM signal to according to the system temperature of the computer when the IBMC operates normally. The signal switch controls the speed of the fan according to the first PWM signal or the second PWM signal. |
| US08421391B2 |
Electric motor stator winding temperature estimation systems and methods
An electric motor system includes an electric motor comprising a stator with windings and a rotor configured to operate at a motor speed; a cooling system comprising coolant configured to cool the rotor and the stator, the coolant having a coolant flow rate and a coolant temperature; an inverter module coupled to the electric motor and configured to provide current to the windings based on inverter control signals; a current regulated torque controller coupled to the inverter module and configured to generate the inverter control signals in response to a derated torque command; and a temperature estimation controller coupled to the current regulated torque controller and configured to generate the derated torque command based on an initial torque command and an estimated stator winding temperature. The temperature estimation controller is configured to estimate the estimated stator winding temperature based on the motor speed and the coolant flow rate. |
| US08421390B2 |
Fan motor control device
A fan motor control device for controlling the soft start of a fan motor is disclosed. The fan motor control device comprises a converter, a starting capacitor, and a controller. The converter sends out a control signal to the controller based on an input pulse-width modulation signal. The starting capacitor is coupled between a voltage source terminal and a controlled terminal of the controller. Thereby, based on an input voltage to the controlled terminal, the controller controls the soft start of the fan motor. For the soft start period, the magnitude of the input voltage is determined by the base working voltage outputted via the voltage source terminal. While for normal operation, based on the input voltage to the controlled terminal, the controller controls the speed of the fan motor, with the magnitude of the input voltage determined by the control voltage outputted by the converter. |
| US08421389B2 |
Driving with inverters with low switching losses
The invention relates to converters (inverters, pulse or frequency converters) and to driving “magnetically active” operating means. According to one embodiment, a circuit arrangement for feeding the operating means in at least one first winding phase (S1), comprises a first branch (Z1) of a frequency converter (WR1) adapted for and operable at a switching frequency of not higher than 5 kHz for outputting a main alternating current generated at said switching frequency and having a substantially lower operating frequency (f1) to a winding (L1). A second branch (z1) of another frequency converter (WR2) is adapted for and operable at a second switching frequency of more than 5 kHz for outputting a supplementary alternating current generated at said switching frequency to the same winding (L1). In the at least one winding (L1), the two alternating currents (iA(t); iB(t)) of the two branches (Z1, z1) are superimposed to form a sum current. |
| US08421387B2 |
Method and device for controlling a motor
A method controls a motor, especially for opening and closing a door. The motor is controlled by a pulse width-modulated switching signal that is divided into a specifiable number of pulse width-modulated control signals for actuating a bridge circuit to a corresponding number of functional channels. The functional channels are switched off independently from each other by at least one or more switch-off signals on at least one switching circuit of a number of independent switching circuits corresponding to the number of functional channels. |
| US08421383B2 |
Rotation control circuit of fan
A rotation control circuit comprises a motor-driving unit and a rotation-switching unit. The motor-driving unit is coupled to a motor of a fan. The rotation-switching unit is coupled to the motor-driving unit and has at least a charging-discharging circuit for generating a rotation control command, the rotation control command controls the motor to rotate in a forward direction for a time period when the motor starts to operate, and controls the motor to rotate in a backward direction opposite to the forward direction. |
| US08421381B2 |
Battery charging circuit and charging method
A charging circuit is provided that charges a battery for supplying power to a motor drive system that includes a three-phase motor and a three-phase inverter for controlling the three-phase motor. The three-phase inverter includes first to third sets of switching elements. Each set corresponds to one of the three phases. The charging circuit includes a single-phase output transformer, a rectifier circuit, a line, and a controller. The single-phase output transformer includes a secondary side output section having a first terminal and a second terminal. The rectifier circuit is connected in parallel with the three-phase inverter and the battery. The rectifier circuit is also connected to the first terminal of the secondary side output section. The line connects a connecting point between the first set of the switching elements in the three-phase inverter with the second terminal of the secondary side output section. The controller performs on-off control of the first to third sets of the switching elements. During charging of the battery, the controller maintains the first set of the switching elements in an OFF state, and performs the on-off control of at least one set of the second and third sets of the switching elements. |
| US08421377B2 |
Protecting high-frequency amplifers
In one aspect, protecting high frequency (HF) amplifiers of a plasma supply device configured to deliver >500 W at a substantially constant fundamental frequency >3 MHz is accomplished by: driving two HF amplifiers with two drive signals having a common frequency and a predetermined phase shift with respect to one another; generating two HF source signals using the HF amplifiers, the HF source signals coupled in a coupler to form a HF output signal; transmitting the HF output signal to the plasma load; measuring electrical variables related to the load impedances seen by the two HF amplifiers; determining whether the load impedance seen by one of the HF amplifiers lies outside a predetermined range; and adjusting the phase shift of the two drive signals, wherein neither of the load impedances seen by the HF amplifiers lies outside the predetermined range. |
| US08421375B2 |
Amplification circuit and heat sink used with a light emitting apparatus having varying voltages
A light emitting apparatus for regulating a current output of an LED at predetermined value with a power source having a wide variety of voltages and chemistries is described. A light emitting diode is electrically coupled to the voltage source. A pulse width modulation controller controls a duty cycle of the voltage applied. A resistor electrically coupled between the voltage source and the light emitting diode is used to regulate output current for the LED. An amplification circuit is electrically coupled to the resistor and the pulse width modulation controller for supplying a feedback voltage to the pulse width modulation controller that is higher than a voltage measured across the resistor. |
| US08421367B2 |
Light-emitting diode light source and light-emitting diode lamp
A light-emitting diode (LED) light source suitable for being electrically connected with a power line is provided. The LED light source includes an LED array, a power line communication (PLC) unit and a current control unit. The PLC unit is electrically connected with the power line, and the current control unit is electrically connected with the LED array and the PLC unit. |
| US08421359B2 |
Discharge lamp unit having heat dissipation structure
A discharge lamp unit constitutes circuit components including self-heating components that radiate the heat, i.e., a circuit board and a DC/DC transformer, and a heat radiation member. The heat radiation member made of metal is arranged in a portion between the self-heating components and the other components, so as to cover at least a portion of the self-heating component. In the discharge lamp unit, the heat produced by the self-heating components can be absorbed by the heat radiation member before the conducting heat reaches the circuit components other than the self-heat components. As a result, the heat produced by the self-heating components can be effectively radiated away. |
| US08421358B2 |
Lamp
A discharge tube of glass, filled with a halogen/noble-gas mix, which passes through a ½ lambda wave guide of alumina at an aperture ¼ lambda from one end. The wave guide is silver plated to establish resonance between its opposed ends. An antenna/probe is provided in another aperture, driven via a matching circuit from an amplifier. The discharge tube has a length greater than twice the thickness of the wave guide, extending from the wave guide on at least one side thereof. |
| US08421356B1 |
Microshell gas discharge device
A gas discharge device with a multiplicity of gas filled microshells positioned on a single substrate in electrical contact with one or more electrodes. Each microshell may contain a luminescent material. |
| US08421354B2 |
Photocathode, photomultiplier and electron tube
The present invention relates to a photocathode having a structure to dramatically improve the effective quantum efficiency in comparison with that of a conventional art, an photomultiplier and an electron tube. The photocathode comprises a supporting substrate transmitting or blocking an incident light, a photoelectron emitting layer containing an alkali metal provided on the supporting substrate, and an underlayer provided between the supporting substrate and the photoelectron emitting layer. Particularly, the underlayer contains a beryllium oxide, and is adjusted in its thickness such that a thickness ratio of the underlayer to the photoelectron emitting layer falls within a specific range. This structure allows to obtain a photocathode having a dramatically improved quantum efficiency. |
| US08421351B2 |
Hot-melt type member and organic EL display panel
The present invention provides a thin organic EL element that can maintain stable emission characteristics for a long time without being affected by water or oxygen. Specifically, the present invention provides an organic EL display panel having a substrate (1), an organic EL element (2) formed on the substrate; and a case (3) encapsulating the organic EL element, wherein a specific hot melt-type member is arranged between the organic EL element and the case. |
| US08421346B2 |
Composite material, light-emitting element, light-emitting device, lighting device, electronic device, and fluorene derivative
Provided is a composite material which makes it possible to provide a light-emitting element having at least one of the following characteristics by applying the composite material to the light-emitting element: low voltage driving, high emission efficiency, and a long life (high reliability). The composite material includes a hydrocarbon compound and an inorganic compound which exhibits an electron-accepting property with respect to the hydrocarbon compound. The hydrocarbon compound has a molecular weight of greater than or equal to 400 and less than or equal to 2000, where one or more aryl groups are bonded to a fluorene unit. |
| US08421345B2 |
Electroluminescent device including white color filter pattern having blue light transmittance greater than red and green light transmittance
An organic electroluminescent device includes a first substrate including first to fourth pixel regions; an organic electroluminescent diode on the first substrate and in each of the first to fourth pixel regions, the organic electroluminescent diode emitting a white light; a second substrate facing the first substrate; and a color filter layer positioned between the organic electroluminescent diode and the second substrate or between the organic electroluminescent diode and the first substrate and including a red color filter pattern, a green color filter pattern, a blue color filter pattern and a white color filter pattern corresponding to the first to fourth pixel regions, respectively, wherein the white color filter pattern has a first transmittance with respect to a blue light greater than a second transmittance with respect to a red light and a green light. |
| US08421343B2 |
Organic light emitting display device and manufacturing method therefor
Provided are an organic light emitting display device which can be simultaneously used as a mirror and a display screen in an external display device such as a mobile phone, and a manufacturing method for the organic light emitting display device. In one embodiment, an organic light emitting display device includes a first substrate and first transistors formed on the first substrate. A first organic light emitting diode is electrically connected to each of the first transistors. A second substrate is disposed opposite to the first substrate. Second organic light emitting diodes are formed on the second substrate. In the organic light emitting display device, a cathode electrode of each of the second organic light emitting diodes is formed of a reflective material. |
| US08421341B2 |
Organic electroluminescent device
An electroluminescent device includes: first to third pixel regions; a first electrode in each of the first to third pixel regions, wherein the first electrode of the third pixel region has a first thickness, the first electrode of the first pixel region has a second thickness less than the first thickness, and the first electrode of the second pixel region has a third thickness less than the second thickness; a second electrode in each of the first to third pixel regions; at least two electroluminescent units in each of the first and third pixel regions and disposed between the first electrode and second electrode, wherein one of the at least two electroluminescent units includes a blue light emitting layer and the other of the at least two electroluminescent units include a red/green light emitting layer; and a charge generation layer disposed between the at least two electroluminescent units. |
| US08421337B2 |
Organic light emitting diode display device and method of fabricating the same
An organic light emitting diode (OLED) display device and a method of fabricating the same. The OLED display device includes a substrate, a thin film transistor on the substrate and including a semiconductor layer, a gate electrode, a gate insulating layer, a source electrode and a drain electrode. A passivation layer is on an entire surface of the substrate including the thin film transistor. A planarization layer is on the passivation layer. A first electrode is on the planarization layer and electrically coupled to any one of the source electrode or the drain electrode. A metal mixture layer is on substantially the entire surface of the substrate and includes a conductive region and a non-conductive region. An organic emitting layer and a second electrode both are on the metal mixture layer. |
| US08421328B2 |
Infrared heat lamp having vertical burning position
An infrared heat lamp (200) having a vertical burning position includes an outer tubular member (202) and a heating element (208) having a coiled portion (214) at least partially disposed within the outer tubular member (202). The heating element (208) includes first and second terminal ends (210, 212), wherein the coiled portion (214) is defined therebetween, the coiled portion (214) having a plurality of turns (216) defining a through passage (218). The heat lamp (200) further includes an inner elongate member (222) disposed within the through passage (218) of the coiled portion (214), the inner elongate member (222) having a plurality of support members (224) extending therefrom. Each of the plurality of support members (224) engages at least one of the plurality of turns (216) of the coiled portion (214), whereby the coiled portion (214) is supported by the plurality of support members (224) when the heating element (208) is in a vertical orientation. |
| US08421326B2 |
Electrode, method of preparing the same, and electronic device including the electrode
An electrode including metal oxides and a plurality of 12CaO.7Al2O3 particles, a method of preparing the electrode, an electronic device including the electrode, and, in particular, an organic light emitting device including the electrode. The electrode has low resistance, high optical transmittance, and a low work function. |
| US08421325B2 |
More efficient electrodeless plasma lamp with increased overall capacitance through the use of multiple dielectric and insulating materials
An RF electrodeless plasma lamp with improved efficiency in higher lumens per watt includes a waveguide body, in which an RF signal drives the entire structure at the resonant frequency of the structure. The resonant frequency of the structure is lowered by increasing the overall capacitance of the waveguide body by adding at least two layers of dielectric material between the input feed and the bulb of the lamp. The layered structure can include an air cavity disposed between a dielectric layer and the input feed. In lowering the resonant frequency of the lamp, the device is capable of using RF amplifiers that have higher efficiency, and thus has a higher lumens per watt ratio. |
| US08421324B2 |
Spark plug, metal shell for spark plug, and method of manufacturing spark plug
Provided is a spark plug that is excellent not only in salt resistance but also in stress corrosion cracking resistance. The spark plug includes a metal shell covered by a composite layer including a nickel plating layer and a chromate layer formed on the nickel plating layer. The chromate layer has a film thickness of 2 to 45 nm and Cr element concentration of not more than 60 at % and contains Ni in addition to Cr. |
| US08421317B2 |
End cap assembly
An electric motor has an end cap assembly comprising: a base and a cover. The base has a first chamber configured to receive a commutator, a second chamber configured to receive electronic components, and brush boxes having passages configured to receive brushes. The first chamber and the second chamber are respectively formed on opposite sides of the base. The passages of the brush boxes open into the first chamber to allow the brushes to slidably contact a commutator disposed therein. The cover is fixed to the base and covers the second chamber. |
| US08421314B2 |
Composite substrate, elastic wave device using the same, and method for manufacturing composite substrate
A composite substrate is provided, including a piezoelectric substrate which is capable of transmitting an elastic wave, and a support substrate, which has a smaller thermal expansion coefficient than that of the piezoelectric substrate, bonded to each other. The in-plane maximum thermal strain amount, which is the largest thermal strain amount in the plane of the composite substrate, has a minimum value and a maximum value when the piezoelectric substrate and the support substrate are relatively rotated 0° to 360°, and the piezoelectric substrate and the support substrate are bonded to each other so that the in-plane maximum thermal strain amount has the minimum value or a value in the vicinity thereof. |
| US08421313B2 |
Energy harvesting device
A piezoelectric energy harvesting device (PEHD) comprising a driving element, conducting element, piezoelectric layer and non-piezoelectric layer capable of converting ambient mechanical energy into electrical energy. The piezoelectric layer may be constructed from PMN-PT or PZT having a thickness of about 1-150 μm. The PEHD may be used to generate about 1 W. The harvested energy may be stored and used to power microelectronic devices and rechargeable battery technologies. |
| US08421310B2 |
Multi-layer piezoelectric element, ejection apparatus using the same and fuel ejection system
To provide a multi-layer piezoelectric element which is easy to be fabricated and which exhibits excellent durability, even when it is driven continuously for a long time under high electric field and high pressure. The multi-layer piezoelectric element comprising a stacked body wherein a plurality of piezoelectric layers and a plurality of metal layers are stacked alternately one on another and it is driven by applying a voltage to adjacent and opposing metal layers, wherein an average grain size of the piezoelectric crystal grains in a region of the piezoelectric layer, in which region the piezoelectric layer is sandwiched between the adjacent and opposing internal electrode in the stacking direction. |
| US08421309B2 |
Ultrasonic motor
In an ultrasonic motor, an elliptical vibration is generated by combining a longitudinal primary resonance vibration, resulting from an expansion and a contraction of a vibrator in a direction of a central axis, and a torsional secondary resonance vibration or a torsional tertiary resonance vibration resulting from twisting of the vibrator about the central axis. A dimension ratio of a rectangle of the vibrator is chosen such that a resonance frequency of the longitudinal primary resonance vibration, resulting from the expansion and the contraction of the vibrator in the direction of the central axis, and a resonance frequency of the torsional secondary resonance vibration or the torsional tertiary resonance vibration, resulting from twisting of the vibrator about rotation axis, substantially match. The vibrator includes, stacked in a short side direction of the cross-section, at least one torsional piezoelectric body that generates the torsional secondary resonance vibration or the torsional tertiary resonance vibration, and a piezoelectric body for longitudinal vibration that generates at least the longitudinal primary resonance vibration. |
| US08421305B2 |
MEMS devices and systems actuated by an energy field
A microelectromechanical system (MEMS) device includes an actuator having a plurality of charge collection elements. At least one of the charge collection elements is configured to build up electrical charges by directly interacting with an energy field thereby actuating the MEMS through Coulombic interactions. An actuator for a MEMS device is configured to actuate the MEMS device through Coulombic interactions by pumping charges to the actuator when subject to an energy field. A method of actuating a MEMS device includes irradiating an actuator of the MEMS device with an energy field thereby building up electrical charges on the actuator, and actuating the MEMS device with Coulomb forces from the built up electrical charges. |
| US08421304B2 |
Actuator and actuator structure
An actuator includes a first bending portion having a first electrode layer, a first electrolyte layer on a first surface of the first electrode layer, and a second electrode layer in contact with the first electrolyte layer; and a second bending portion having the first electrode layer, a second electrolyte layer on a second surface of the first electrode layer, the second surface facing the first surface, and a third electrode layer in contact with the second electrolyte layer, in which the first surface of the first electrode layer includes a region where the first electrolyte layer is not arranged, the second surface of the first electrode layer includes a region where the second electrolyte layer is not arranged, the first bending portion is adjacent to the second bending portion, and the bending direction of the first bending portion is opposite to the bending direction of the second bending portion. |
| US08421296B2 |
Rotor for electric motor optimized for high power
A rotor for a high power electric motor intended to operate at particularly high rotational speeds. It includes a magnetic mass, gripped on either side by short circuit rings, and passed through at a plurality of notches by main bars forming a squirrel cage. The rotor also includes secondary bars passing through the magnetic mass via notches. The shape and arrangement of each notch is defined so as to ensure contact between the main bars and the secondary bars sufficient to allow the passage of an electric current when the rotor is in rotation. In particular, the invention applies to asynchronous motors capable of operating at high peripheral speeds typically starting at 100 m·s−1, in particular motors intended for gas or oil applications, whether land-, sea-, or undersea-based. |
| US08421293B2 |
Method of rare earth-iron based annular magnet and motor fabricated thereby
Improvement of torque densities, miniaturization and weight saving for outer rotor type motors or permanent-magnet-field-type DC motors can be efficiently achieved by high-energy densification of a magnet. However, torque pulsation or armature reaction gives negative influences thereto. Further, in application of a slotless (coreless) structure eliminating the torque pulsation or the armature reaction, the magnetic resistance of motor magnetic circuits will be enhanced. For solving the above problems, there is provided an annular magnet that is opened in a reverse direction relative to the opening direction of a U-shaped segment fabricated in constantly-directed magnetic fields, the annular magnet having an anisotropic distribution where angles relative to inner peripheral tangent lines can be continuously changed in the range of approximately 0 to 90 degrees, and having energy density (BH)max of 160 to 186 kJ/m3. |
| US08421290B2 |
Assembly of driving device for brushless motor of air-conditioner
The present invention relates to an improved assembly of driving device for brushless motor of air-conditioner, which is a design providing a unitary and simple assembly of driving device of brushless motor, including a brushless motor body and a support rack. The support rack is made in the form of a U-shape having opposite ends forming end plates that extend high upwards. Besides providing a recess for positioning, assembling, and fixing the motor body, the U-shaped support rack forms a space that exactly accommodates the driving device therein, whereby the structure of the motor is reduced in volume and the purposes of use of simplified structure and practical convenience are realized. |
| US08421286B2 |
Kit and method for attaching a grounding ring to an electrical motor
A method may be used to retroactively install a grounding ring on an electrical motor used with an inverter to reduce the likelihood that shaft currents affect motor bearings. The method includes securing a ring of conductive material to an endplate of an electrical motor at a position that enables a shaft extending through the endplate to pass through the ring, the ring of conductive material includes conductive material that extends from the ring to contact the shaft when the ring is secured to the endplate, and covering the ring of conductive material with a bearing cap that has an opening that enables the shaft to pass through the bearing cap. |
| US08421283B2 |
Electric motor drive, in particular fan drive
An electro-motor drive, in particular for a fan drive of a motor vehicle, includes a commutator motor, a motor shaft of which is rotatably mounted on axially opposite sides in shaft bearings facing away from the bearing shield in order to substantially dampen the sound of at least bearing play-related contact noise and vibration or humming noise. |
| US08421272B2 |
Transmission system, power supplying apparatus, power receiving apparatus, and transmission method
There is provided a transmission system, including a power supplying apparatus that includes an AC signal generation unit that generates an AC signal, a first resonance unit that has an induction component and/or a capacitance component and resonates the AC signal generated by the AC signal generation unit, and a power supplying electrode that externally radiates the resonated AC signal as a potential difference in an electrostatic field, and a power receiving apparatus that includes a power receiving electrode that generates an electric signal by sensing the potential difference in the electrostatic field, a second resonance unit that has an induction component and/or a capacitance component and resonates the electric signal generated by the power receiving electrode, and a rectification unit that rectifies the resonated electric signal. |
| US08421270B1 |
System and method for a controlled interconnected DC and AC bus microgrid
Systems and methods are described herein for a microgrid module. The microgrid module can receive power from either AC or DC sources and output either AC or DC power as needed. The microgrid module includes transformers and/or power converters necessary for modifying the input AC or DC power sources to meet the required characteristics of the output power. The microgrid module further comprises a control software module installed on a microgrid computer. The control software module receives information from sensors installed in the microgrid module and sends commands to controllable elements installed in the microgrid module for the purpose of controlling the power through the microgrid in a manner consistent with power requirements of various loads and the power available from multiple and diverse sources and internal and/or external energy storage devices. |
| US08421268B2 |
Combined power switch and data distribution unit
A communication device for use with a power distribution module. The communication device allows multiple different DMX universes to be handled over the same cable that also handles power distribution. A front of house module is provided for powering consoles and receiving DMX inputs from the consoles. Two different consoles can be powered and provide their inputs, and either console can be used to control any or all of the universes. |
| US08421267B2 |
Packaging and details of a wireless power device
A wireless power system includes a power source, power receiver, and components thereof. A current sensor senses the amount of current through the antenna. That amount of current is then used to adjust characteristics of the transmitting or receiving. |
| US08421264B2 |
Wind power generation device for electronic equipment
A wind power generation device for electronic equipment including: at least a heat dissipation module, a wind power generation module, and at least a reception module. The heat dissipation module includes a heat dissipation device with a plurality of heat dissipating fins, and a first fan butted with one side of the heat dissipation device. Butted with the other side of the heat dissipation device in opposition to the first fan, the wind power generation module is driven to operate, generate electricity, and produce a power signal under the propulsion of the fluid generated by the first fan. The reception module is electrically interconnected with the wind power generation module and receives the power signal. The combination of a heat dissipation module, a wind power generation module, and a reception module effectively saves energy by utilizing or recycling the fluid generated by the first fan, converting the fluid into usable energy, and supplying the energy to the reception module for use or storage. |
| US08421263B2 |
Floating vertical axis wind turbine
A large floating vertical axis wind turbine with a floating inner cylinder having rotor blades that rotate together as an assembly, and a floating outer cylinder with a central opening in which the floating inner cylinder rotates for support against tipping. Outriggers with floating devices on the ends extend out from the floating outer cylinder for additional stability. The floating inner cylinder is partially supported by a top bearing on the outer cylinder to carry some of the load from the rotor blades. |
| US08421262B2 |
Generator arrangement for a wind power plant
In the generator arrangement according to the invention at least one main bearing is arranged between the generator and the hub wherein the rotor of the generator is supported only on the front end of a rigid carrier in the form of a support disc (30). The support disc is a hollow chamber structure of low weight and high rigidity. |
| US08421259B2 |
Wave energy absorber
A wave-power unit for extracting in an efficient way energy from waves on a water surface in different offshore conditions, including a main buoyant structure moored to the seabed with taut mooring lines and placed at a submerged, wave active depth, a linear generator placed within the buoyant structure and activated via a taut mooring line. The unit also includes a power take off cable connected to the linear generator and leading via the seabed to shore, and is characterized in that the buoyant structure is provided with fixed buoyancy and with elements to vary the surface of the buoyant structure that is exposed to the dynamic pressure of the wave, to optimize the surface for an efficient power take-off for more than one wave frequency and to control the tension in the taut mooring lines. |
| US08421248B2 |
Electronic device and electronic apparatus
An electronic device includes a semiconductor device and a wiring substrate having a wiring pattern. The semiconductor device includes: a semiconductor chip having an electrode; a convex-shaped resin protrusion provided on a surface of the semiconductor chip, the surface having the electrode; and wiring having a plurality of electrical coupling sections which are aligned on the resin protrusion and electrically coupled to the electrode. The semiconductor device is mounted to the wiring substrate so that the electrical coupling sections and the wiring pattern are brought into contact and electrically coupled with each other. The plurality of electrical coupling sections brought into contact with the wiring pattern include curved or bent shapes projecting in a longitudinal direction of the resin protrusion. |
| US08421242B2 |
Semiconductor package
A semiconductor package is provided. The semiconductor package includes an organic substrate, a stiffness layer, and a chip subassembly. The stiffness layer is formed on the organic substrate. The chip subassembly is disposed on the stiffness layer. The chip subassembly includes at least a first chip, a second chip, and a third chip. The second chip is disposed between the first chip and the third chip in a stacked orientation. The first chip, the second chip, and the third chip have the function of proximity communication. |
| US08421240B2 |
Sensor device and method of manufacturing the sensor device
A sensor device includes a substrate which includes an element forming region, a plurality of sensor elements formed in the element forming region, a plurality of connection pads formed on a region of the substrate other than the element forming region, a plurality of first wiring formed on the substrate and electrically connected with the plurality of sensor elements, a plurality of second wiring formed on the substrate and electrically connected with the plurality of connection pads, a plurality of third wiring formed on a different layer to the plurality of first wiring and the plurality of second wiring and formed to intersect with the plurality of first wiring and the plurality of second wiring, and an insulation layer formed between the plurality of first wiring, the plurality of second wiring and the plurality of third wiring. |
| US08421231B2 |
Electrically conductive composite
The present invention provides a conductive composite comprising: suspension matrix, metal nanoparticles suspended within the suspension matrix, wherein the conductive composite has a conductivity greater than 104 S cm−1. |
| US08421225B2 |
Three-dimensional stacked substrate arrangements
Three-dimensional stacked substrate arrangements with reliable bonding and inter-substrate protection. |
| US08421224B2 |
Semiconductor chip having double bump structure and smart card including the same
Provided is a semiconductor chip having a double bump structure. The semiconductor chip may include a semiconductor substrate, a circuit region on a surface of the semiconductor substrate, a pad on the semiconductor substrate and connected to the circuit region, a first bump on the pad, and a second bump on the first bump. The second bump may be arranged at one side of an upper surface of the first bump and the upper surface of the first bump may include a test area configured to interface with a probe tip, wherein the test area is an area of the upper surface of the first bump exposed by the second bump. |
| US08421217B2 |
Achieving mechanical and thermal stability in a multi-chip package
A system and method system for achieving mechanical and thermal stability in a multi-chip package. The system utilizes a lid and multiple thermal interface materials. The method includes utilizing a lid on a multi-chip package and utilizing multiple thermal interface materials on the multi-chip package. |
| US08421215B2 |
Laminated and sintered ceramic circuit board, and semiconductor package including the circuit board
In the laminated and sintered ceramic circuit board according to the present invention, at least a portion of the inplane conductor is fine-lined, such that the shape of the cross-section surface of the fine-lined inplane conductor is trapezoid, and the height (a), the length (c) of the lower base and the length (d) of the upper base of the trapezoidal cross-section surfaces, and the interval (b) between the lower bases of the trapezoidal cross-section surfaces of the inplane conductors adjacent in a plane parallel to the principal surfaces of the board meet a certain relation. This provides a laminated ceramic circuit board with low open failure rate, short-circuit failure rate and high reliability against high temperature and high humidity in a downsized and short-in-height (thin) semiconductor package. |
| US08421211B2 |
Wafer level semiconductor package and fabrication method thereof
A wafer level semiconductor package is provided. A warpage control barrier line formed in every package of a single wafer prevents wafer from warping. The changed shape of the interface between a semiconductor chip and a molding layer at the edge of the package disperses stress applied to the outside of the package, and suppress the generation and propagation of crack. The size of the package is reduced to that of the semiconductor, and the thickness of the package is minimized. |
| US08421210B2 |
Integrated circuit packaging system with dual side connection and method of manufacture thereof
A method of manufacture of an integrated circuit packaging system includes: forming a first terminal; connecting an integrated circuit to the first terminal; forming a second terminal connected over the first terminal and the integrated circuit by a vertical conductive post integral with the first terminal or the second terminal; and encapsulating the integrated circuit and the vertical conductive post leaving portions of the first terminal and the second terminal exposed. |
| US08421209B2 |
Semiconductor device with lead terminals having portions thereof extending obliquely
A semiconductor device in which a semiconductor chip, a lead frame and metal wires for electrically connecting the lead frame are sealed with sealing resin. The lead frame has a plurality of lead terminal portions, a supporting portion for supporting the semiconductor chip, and hanging lead portions supporting the supporting portion. Each of the lead terminal portions adjacent to the hanging lead portion is a chamfered lead terminal portion having, at its head, a chamfered portion formed substantially in parallel with the hanging lead portion so as to avoid interference with the hanging lead portion. |
| US08421206B2 |
Semiconductor device and connection checking method for semiconductor device
Provided is a semiconductor device in which a connection between connection terminals and land of the semiconductor device can be checked with the semiconductor device kept in a sound condition, the connection not being allowed to be checked with a semiconductor chip. The semiconductor device of the present invention includes: a package substrate; a semiconductor chip mounted on the package substrate; a first land formed in a first principal surface of the package substrate; a second land formed in a second principal surface of the package substrate; first connection terminals connected to the second land and having the connection thereto not allowed to be checked with the semiconductor chip; a connection interconnection for connecting the first land and the second land; a second connection terminal formed in the second principal surface of the package substrate; and a branch interconnection for connecting the connection interconnection and the second connection terminal. |
| US08421204B2 |
Embedded semiconductor power modules and packages
Disclosed are semiconductor die packages constructed from modules of embedded semiconductor dice and electrical components. In one embodiment, a semiconductor die package comprises a first module and a second module attached to the first module. One or more semiconductor dice are embedded in the first module, and one or more electrical components, such as surface-mounted components, are embedded in the second module. The first module may be formed by a lamination process, and the second module may be formed by a lamination process or a molding process. Patterned metal layers and vias provide electrical interconnections to the package and among the die and components of the package. The second module may be attached to the first module by coupling interconnect lands of separately manufactured modules to one another, or may be directly attached by lamination or molding. |
| US08421203B2 |
Integrated circuit packaging system with foldable substrate and method of manufacture thereof
A method of manufacture of an integrated circuit packaging system includes: providing a package substrate having a foldable segment, a base segment, and a stack segment; connecting a base substrate connector directly on the base segment; connecting a stack substrate connector directly on the stack segment; mounting a base integrated circuit over the base segment with the base substrate connector outside a perimeter of the base integrated circuit; and folding the package substrate with the stack segment over the base segment and the stack substrate connector directly on the base substrate connector. |
| US08421200B2 |
Semiconductor integrated circuit device and method for fabricating the same
A semiconductor integrated circuit device is made by stacking a plurality of semiconductor chips. The semiconductor integrated circuit device includes: a penetrating electrode formed to penetrate the plurality of semiconductor chips; a plurality of electrodes formed in respective layers constituting each of the plurality of semiconductor chips and having respective openings within which the penetrating electrode penetrates; and a plurality of vias each of which electrically connects electrodes of the plurality of electrodes located in adjacent layers. The vias are each formed so that the side face thereof is in contact with the penetrating electrode. |
| US08421197B2 |
Integrated circuit package system with warp-free chip
An integrated circuit package system includes: a semiconductor chip; a stress-relieving layer on the semiconductor chip; an adhesion layer on the stress relieving layer; and electrical interconnects bonded to the adhesion layer. |
| US08421196B2 |
Semiconductor device and manufacturing method
A semiconductor device includes a drift zone of a first conductivity type formed within a semiconductor body, wherein one side of opposing sides of the drift zone adjoins a first zone within the semiconductor body and the other side adjoins a second zone within the semiconductor body. First semiconductor subzones of a second conductivity type different from the first conductivity type are formed within each of the first and second zones opposing each other along a lateral direction extending parallel to a surface of the semiconductor body. A second semiconductor subzone is formed within each of the first and second zones and between the first semiconductor subzones along the lateral direction. An average concentration of dopants within the second semiconductor subzone along 10% to 90% of an extension of the second semiconductor subzone along a vertical direction perpendicular to the surface is smaller than the average concentration of dopants along a corresponding section of extension within the drift zone. |
| US08421194B2 |
Sub-lithographic printing method
A trench structure and an integrated circuit comprising sub-lithographic trench structures in a substrate. In one embodiment the trench structure is created by forming sets of trenches with a lithographic mask and filling the sets of trenches with sets of step spacer blocks comprising two alternating spacer materials which are separately removable from each other. In one embodiment, the trench structures formed are one-nth the thickness of the lithographic mask's feature size. The size of the trench structures being dependent on the thickness and number of spacer material layers used to form the set of step spacer blocks. The number of spacer material layers being n/2 and the thickness of each spacer material layer being one-nth of the lithographic mask's feature size. |
| US08421181B2 |
Schottky barrier diode with perimeter capacitance well junction
A Schottky barrier diode comprises a first-type substrate, a second-type well isolation region on the first-type substrate, and a first-type well region on the second-type well isolation region. With embodiments herein a feature referred to as a perimeter capacitance well junction ring is on the second-type well isolation region. A second-type well region is on the second-type well isolation region. The perimeter capacitance well junction ring is positioned between and separates the first-type well region and the second-type well region. A second-type contact region is on the second-type well region, and a first-type contact region contacts the inner portion of the first-type well region. The inner portion of the first-type well region is positioned within the center of the first-type contact region. Additionally, a first ohmic metallic layer is on the first-type contact region and a second ohmic metallic layer is on the first-type well region. The first ohmic metallic layer contacts the second ohmic metallic layer at a junction that makes up the Schottky barrier of the Schottky barrier diode. |
| US08421178B2 |
Solid-state imaging device, electronic module and electronic apparatus
A solid-state imaging device including an imaging area formed of a plurality of pixels arrayed in a two-dimensional matrix is provided. The solid-state imaging device includes: a photoelectric conversion portion including a charge accumulation region provided on a semiconductor substrate; a read transistor for reading electric charges from the photoelectric conversion portion; and a gettering site for separating metal impurities within the semiconductor substrate from at least the photoelectric conversion portion. The photoelectric conversion portion is provided on the surface side of the semiconductor substrate, and the gettering site is provided on the rear side away from the semiconductor substrate. |
| US08421176B2 |
MOS solid-state image pickup device
A solid-state image pickup device relating to the present invention has a specific gap in a part of a lattice-shaped light blocking film pattern or wiring pattern having an opening enclosing a light reception region. Peripheral circuits and wiring layers on a pixel may be used as the light blocking film. In such a case, when multiple wiring layers are used as the light blocking film, layouts of a second and subsequent wiring layers is determined according to the layout of the first wiring layer above the light reception region. The specific gap is created in a part of the wiring enclosing the light reception region. |
| US08421174B2 |
Light emitting diode package structure
A light emitting diode package structure includes a substrate (10), LED bare chips (20) and a lens (30). The substrate (10) has an upper surface (11), a lower surface (12) and a side surface (13) between the upper surface (11) and the lower surface (12). The upper surface (11) is provided with a circuit pattern (111). The side surface (13) is provided with a groove (131). The LED bare chips (20) are fixed on the upper surface (11) and electrically connected with the circuit pattern (111). The lens (30) covers the LED bare chips (20), the upper surface (11) and the circuit pattern (111) by an injection molding process so as to be inserted into the groove (131). With this arrangement, the connecting strength between the substrate (10) and the lens (30) can be enhanced, thereby achieving waterproof and anti-electrostatic effects. Further, material cost of the present invention is reduced greatly. |
| US08421170B2 |
Method for microfabrication of a capacitive micromachined ultrasonic transducer comprising a diamond membrane and a transducer thereof
This invention relates generally to capacitive micromachined ultrasonic transducers (CMUTs), particularly to those comprising diamond or diamond like carbon membranes and a method of microfabrication of such CMUTs, wherein the membrane of diamond or diamond like carbon is attached to the substrate by plasma-activated direct bonding of an interlayer of high temperature oxide (HTO). |
| US08421168B2 |
Microelectromechanical systems microphone packaging systems
This document discusses, among other things, a conductive frame, a silicon die coupled to the conductive frame, the silicon die including a vibratory diaphragm, the die having a silicon die top opposite a silicon die bottom, with a silicon die port extending through the silicon die to the vibratory diaphragm, with a silicon die terminal in electrical communication with the conductive frame and an insulator affixed to the conductive frame and the silicon die, with the insulator extending through interstices in the conductive frame to a conductive frame bottom of the conductive frame, and around an exterior of the silicon die to the silicon die top, with the insulator physically affixed to the silicon die and to the conductive frame, with the silicon die port exposed and with a conductive frame terminal disposed at the conductive frame bottom in electrical communication with the silicon die terminal. |
| US08421161B2 |
Semiconductor device and fabrication method
A semiconductor device has a semiconductor substrate in which first and second wells are formed. The substrate and wells are of the same conductivity type, but the second well has a higher impurity concentration than the first well. High-voltage MOS transistors are formed in the first well, and a low-voltage MOS transistor is formed in the second well. The high-voltage MOS transistors include a first transistor having a gate oxide layer with a first thickness and a second transistor having a gate oxide layer with a second thickness less than the first thickness. The low-voltage MOS transistor has a third gate oxide layer with a third thickness less than the first thickness. The second high-voltage MOS transistor provides efficient current conduction. |
| US08421160B2 |
Structure and method to enabling a borderless contact to source regions and drain regions of a complementary metal oxide semiconductor (CMOS) transistor
A semiconductor device that includes a gate structure on a channel region of a semiconductor substrate. A first source region and a first drain region are present in the semiconductor substrate on opposing sides of the gate structure. At least one spacer is present on the sidewalls of the gate structure. The at least one spacer includes a first spacer and a second spacer. The first spacer of the at least one spacer is in direct contact with the sidewall of the gate structure and is present over an entire width of the first source region and the first drain region. The second spacer of the at least one spacer extends from the first spacer of the at least one spacer and has a length that covers an entire length of a first source region and a first drain region. |
| US08421157B2 |
Semiconductor device
A horizontal semiconductor device includes a semiconductor substrate of a first conductivity type and a semiconductor region of a second conductivity type on the semiconductor substrate. The device includes a collector layer of the first conductivity type within the semiconductor region, an endless base layer of the first conductivity type within the semiconductor region, and an endless first emitter layer of the second conductivity type in the endless base layer. The endless base layer is off the collector layer but surrounds the collector layer. A movement of carriers between the endless first emitter layer and the collector layer is controlled in a channel region formed in the endless base layer. An insulation film is disposed between the semiconductor substrate and the semiconductor region. A region of the first conductivity type is disposed in the semiconductor region to contact with a surface of the endless base layer nearest the semiconductor substrate. |
| US08421153B2 |
Semiconductor device
A first semiconductor layer extends from the element region to the element-termination region, and functions as a drain of the MOS transistor. A second semiconductor layer extends, below the first semiconductor layer, from the element region to the element-termination region. A third semiconductor layer extends from the element region to the element-termination region, and is in contact with the second semiconductor layer to function as a drift layer of the MOS transistor. A distance between a boundary between the first semiconductor layer and the field oxide film, and the end portion of the third semiconductor layer on the fifth semiconductor layer side in the element region is smaller than that between a boundary between the first semiconductor layer and the field oxide layer and an end portion of the third semiconductor layer on the fifth semiconductor layer side in the element-termination region. |
| US08421151B2 |
Semiconductor device and process for production thereof
The semiconductor device of this invention has unit cells, each of which includes: a substrate; a drift layer on the substrate; a body region in the drift layer; a first doped region of a first conductivity type in the body region; a second doped region of the first conductivity type arranged adjacent to the body region and in a surface region of the drift layer; a third doped region of the first conductivity type arranged between two adjacent unit cells' second doped region of the first conductivity type and in the surface region of the drift layer to contact with the second doped region of the first conductivity type; a gate insulating film arranged to contact with the surface of the drift layer at least between the first and second doped regions of the first conductivity type; a gate electrode on the gate insulating film; and first and second ohmic electrodes. The dopant concentration of the third doped region of the first conductivity type is lower than that of the second doped region of the first conductivity type and equal to or higher than that of the drift layer. |
| US08421148B2 |
Grid-UMOSFET with electric field shielding of gate oxide
A trench metal oxide semiconductor field effect transistor or UMOSFET, includes a buried region that extends beneath the trench and beyond a corner of the trench. The buried region is tied to a source potential of the UMOSFET, and splits the potential realized across the structure. This effectively shields the electric field from the corners of the trench to reduce gate oxide stress, and resultantly improves device performance and reliability. |
| US08421147B2 |
MOS transistor with elevated gate drain capacity
A MOS transistor having an increased gate-drain capacitance is described. One embodiment provides a drift zone of a first conduction type. At least one transistor cell has a body zone, a source zone separated from the drift zone by the body zone, and a gate electrode, which is arranged adjacent to the body zone and which is dielectrically insulated from the body zone by a gate dielectric. At least one compensation zone of the first conduction type is arranged in the drift zone. At least one feedback electrode is arranged at a distance from the body zone, which is dielectrically insulated from the drift zone by a feedback dielectric and which is electrically conductively connected to the gate electrode. |
| US08421144B2 |
Electrically erasable programmable read-only memory and manufacturing method thereof
An electrically erasable programmable read-only memory includes a first polysilicon layer, a second polysilicon layer and a third polysilicon layer, the first polysilicon layer and the third polysilicon layer forming a control gate and the second polysilicon layer forming a floating gate. The first polysilicon layer is horizontally disposed in series with the second polysilicon layer and is connected to the third polysilicon layer, so that the control gate encloses all of the floating gate except for a tunnel surface of the floating gate. |
| US08421141B2 |
Non-volatile memory device and method of fabricating the same
A non-volatile memory device includes a substrate, a gate stack, a selecting gate, an erasing gate, a source region, and a drain region. The gate stack on the substrate includes from bottom to top a tunneling dielectric layer, a floating gate, an inter-gate dielectric layer, a control gate, and a spacer that is located between sidewalls of the control gate and the inter-gate dielectric layer. A side of the floating gate adjacent to the erasing gate has a warp-around profile and a sharp corner protruding from a vertical surface of the spacer. The selecting and erasing gates are respectively located at first and second sides of the substrate of the gate stack. The source region is located in the substrate under the erasing gate. The drain region is located in the substrate at a side of the selecting gate. |
| US08421139B2 |
Structure and method to integrate embedded DRAM with finfet
A transistor includes a first fin structure and at least a second fin structure formed on a substrate. A deep trench area is formed between the first and second fin structures. The deep trench area extends through an insulator layer of the substrate and a semiconductor layer of the substrate. A high-k metal gate is formed within the deep trench area. A polysilicon layer is formed within the deep trench area adjacent to the metal layer. The polysilicon layer and the high-k metal layer are recessed below a top surface of the insulator layer. A poly strap in the deep trench area is formed on top of the high-k metal gate and the polysilicon material. The poly strap is dimensioned to be below a top surface of the first and second fin structures. The first fin structure and the second fin structure are electrically coupled to the poly strap. |
| US08421138B2 |
Magnetic tunneling junction device with recessed magnetic free layer
A magnetic pinned layer is formed over a substrate. An insulating film is formed over the magnetic pinned layer. A recess is formed in and through the insulating film. A tunneling insulating film is formed over a bottom of the recess. A first magnetic free layer is formed over the bottom of the recess via the tunneling insulating film. A second magnetic free layer is formed over the insulating film and made of a same material as the first magnetic free layer. A non-magnetic film is formed on sidewalls of the recess, extending from the first magnetic free layer to the second magnetic free layer and made of oxide of the material of the first magnetic free layer. An upper electrode is disposed over the first magnetic free layer, non-magnetic film and second magnetic free layer, and electrically connected to the first magnetic free layer and second magnetic free layer. |
| US08421135B2 |
Semiconductor device, and manufacturing method thereof
In a display device such as a liquid crystal display device, a large-sized display screen is realized under low power consumption. A surface of a source wiring line of a pixel portion employed in an active matrix type liquid crystal display device is processed by way of a plating process operation so as to lower a resistance value of this source wiring line. The source wiring line of the pixel portion is manufactured at a step different from a step for manufacturing a source wiring line of a drive circuit portion. Further, electrodes of a terminal portion are processed by a plating process operation so as to reduce a resistance value thereof. |
| US08421132B2 |
Post-planarization UV curing of stress inducing layers in replacement gate transistor fabrication
A method of forming a semiconductor structure includes forming a stress inducing layer over one or more partially completed field effect transistor (FET) devices disposed over a substrate, the one or more partially completed FET devices including sacrificial dummy gate structures; planarizing the stress inducing layer and removing the sacrificial dummy gate structures; and following the planarizing the stress inducing layer and removing the sacrificial dummy gate structures, performing an ultraviolet (UV) cure of the stress inducing layer so as to enhance a value of an initial applied stress by the stress inducing layer on channel regions of the one or more partially completed FET devices. A semiconductor structure includes a UV cured tensile nitride layer formed over the substrate and between gate structures of the NFET devices, with portions of the UV cured tensile nitride layer having a trapezoidal profile with a bottom end wider than a top end. |
| US08421131B2 |
Graphene electronic device and method of fabricating the same
A graphene electronic device may include a silicon substrate, connecting lines on the silicon substrate, a first electrode and a second electrode on the silicon substrate, and an interlayer dielectric on the silicon substrate. The interlayer dielectric may be configured to cover the connecting lines and the first and second electrodes and the interlayer dielectric may be further configured to expose at least a portion of the first and second electrodes. The graphene electronic device may further include an insulating layer on the interlayer dielectric and a graphene layer on the insulating layer, the graphene layer having a first end and a second end. The first end of the graphene layer may be connected to the first electrode and the second end of the graphene layer may be connected to the second electrode. |
| US08421130B2 |
Method for manufacturing SRAM devices with reduced threshold voltage deviation
A semiconductor device includes a semiconductor substrate; a gate dielectric layer disposed on the semiconductor substrate; a gate conductive layer doped with impurities selected from nitrogen, carbon, silicon, germanium, fluorine, oxygen, helium, neon, xenon or a combination thereof on the gate dielectric layer; and source/drain doped regions formed adjacent to the gate conductive layer in the semiconductor substrate, wherein the source and drain doped regions are substantially free of the impurities doped into the gate conductive layer. These impurities reduce the diffusion rates of the N-type of P-type dopants in the gate conductive layer, thereby improving the device performance. |
| US08421129B2 |
Semiconductor device using carbon nanotubes for a channel layer and method of manufacturing the same
A CNT channel layer of a transistor is cut along a direction perpendicular to the channel to form a plurality of CNT patches, which are used to connect between a source and a drain. The arrangement of the CNT channel layer formed of a plurality of CNT patches can increase the probability that part of CNT patches becomes a semiconductive CNT patch. Since part of a plurality of CNT patches forming the channel layer is formed of a semiconductive CNT patch, a transistor having a good on/off ratio can be provided. |
| US08421128B2 |
Semiconductor device heat dissipation structure
A heat generating component of a semiconductor device is located between two heavily doped semiconductor regions in a semiconductor substrate. The heat generating component may be a middle portion of a diode having a light doping, a lightly doped p-n junction between a cathode and anode of a silicon controlled rectifier, or a resistive portion of a doped semiconductor resistor. At least one thermally conductive via comprising a metal or a non-metallic conductive material is place directly on the heat generating component. Alternatively, a thin dielectric layer may be formed between the heat generating component and the at least one thermally conductive via. The at least one thermally conductive via may, or may not, be connected to a back-end-of-line metal wire, which may be connected to higher level of metal wiring or to a handle substrate through a buried insulator layer. |
| US08421125B2 |
Semiconductor device with deviation compensation and method for fabricating the same
A semiconductor device includes a conductive pattern formed on a substrate, a conductive land formed to come into contact with at least part of the top surface of the conductive pattern, and a conductive section formed on the conductive land. The conductive section is electrically connected through the conductive land to the conductive pattern. |
| US08421124B2 |
High-beta bipolar junction transistor and method of manufacture
An NPN bipolar junction transistor is disclosed that exhibits a collector-to-emitter breakdown voltage greater than 10 volts and a beta greater than 300. The large value of beta is obtained by fabricating the transistor with an extra N-type layer that reduces recombination of electrons and holes. |
| US08421119B2 |
GaN related compound semiconductor element and process for producing the same and device having the same
A GaN related compound semiconductor element includes: a channel layer made of a GaN related compound semiconductor; and a source layer and a drain layer, which are disposed in a manner of sandwiching the channel layer. The source layer includes two adjacent ridge portions which are formed by selective growth. A source electrode is formed over the surface, sandwiched by the ridge portions, of the channel layer, and the surfaces of the respective two adjacent ridge portions. The selective-growth mask formed between the two ridge portions is removed by wet etching. In addition, as another embodiment, a gate electrode is formed in a manner that the direction of the longer dimension of the gate electrode is aligned with the m plane of the channel layer. Moreover, as still another embodiment, the channel layer has a multilayer structure in which a GaN layer doped with no impurity is used as an intermediate layer. |
| US08421118B2 |
Regenerative building block and diode bridge rectifier and methods
A rectifier building block has four electrodes: source, drain, gate and probe. The main current flows between the source and drain electrodes. The gate voltage controls the conductivity of a narrow channel under a MOS gate and can switch the RBB between OFF and ON states. Used in pairs, the RBB can be configured as a three terminal half-bridge rectifier which exhibits better than ideal diode performance, similar to synchronous rectifiers but without the need for control circuits. N-type and P-type pairs can be configured as a full bridge rectifier. Other combinations are possible to create a variety of devices. |
| US08421117B2 |
Semiconductor device and method of manufacturing the same
In a semiconductor device including a protection diode for preventing electrostatic breakdown employing a low capacitance protection diode, an occupation area of a Zener diode as a voltage limiting element is not needed on a front surface of a semiconductor substrate. A P+ type embedded diffusion layer is formed in a P+ type semiconductor substrate. This is then covered by a non-doped first epitaxial layer. A high resistivity N type second epitaxial layer is then formed on the first epitaxial layer. The second epitaxial layer is divided by a P+ isolation layer into a first protection diode forming region and a second protection diode forming region. An N+ type embedded layer extending from the front surface of the first epitaxial layer of the first protection diode forming region to the first epitaxial layer and the second epitaxial layer, and so on are then formed. A Zener diode is formed by a P+ type upward diffusion layer extending from the P+ type embedded diffusion layer and the N+ type embedded layer. |
| US08421113B2 |
Electronic device incorporating the white resin
The coating agent of the invention is a coating agent to be used between conductor members, comprising a thermosetting resin, a white pigment, a curing agent and a curing catalyst, the coating agent to be used between conductor members having a white pigment content of 10-85 vol % based on the total solid volume of the coating agent, and a whiteness of at least 75 when the cured product of the coating agent has been allowed to stand at 200° C. for 24 hours. |
| US08421110B2 |
Light emitting device and light emitting device package
Disclosed are a light emitting device, a method of manufacturing the same and a light emitting device package. The light emitting device of the embodiment includes a light emitting structure including a first conductive semiconductor layer, a second conductive semiconductor layer and an active layer between the first and second conductive semiconductor layers; a fluorescent layer on the light emitting structure; and a light extracting structure on the fluorescent layer. The light extracting structure extracts light, which is generated in the light emitting structure and incident into an interfacial surface between the fluorescent layer and the light extracting structure, to an outside of the light emitting structure. |
| US08421109B2 |
Light-emitting apparatus package, light-emitting apparatus, backlight apparatus, and display apparatus
A light-emitting apparatus package of the present invention includes (i) an electrically insulated ceramic substrate, (ii) a first concave section formed in the direction of thickness of the ceramic substrate so as to form a light exit aperture in a surface of the ceramic substrate, (iii) a second concave section formed within the first concave section in the further direction of thickness of the ceramic substrate so that one or more light-emitting devices are provided therein, (iv) a wiring pattern for supplying electricity, which is provided in the first concave section, and (v) a metalized layer having light-reflectivity, which is (a) provided between the light-emitting device and the surface of the second concave section of the substrate, and (b) electrically insulated from the wiring pattern. On the account of this, the light-emitting apparatus package in which heat is excellently discharged and light is efficiently utilized and a light-emitting apparatus in which the light-emitting apparatus package is used can be obtained. |
| US08421106B2 |
Light emitting device, system and package
A light emitting device includes a light emitting structure formed from an active layer located between two semiconductor layers. An insulator extends through the active layer and at least partially through the semiconductor layers, and the light emitting structure is located between a first electrode and a second electrode layer. The first electrode and insulator overlap one another and may have the same or different widths. |
| US08421104B2 |
Light emitting diode apparatus and method for enhancing luminous efficiency thereof
A light emitting diode apparatus with enhanced luminous efficiency is disclosed in the present invention. The light emitting diode apparatus includes a light emitting diode chip for providing a first light beam; a substrate, having a cross-section of a trapezoid, for supporting the light emitting diode chip, which is transparent to the first light beam; and an encapsulating body, containing a phosphor and encapsulating the light emitting diode chip and the substrate, for fixing the light emitting diode chip and the substrate and providing a second light beam when the phosphor is excited by the first light beam. Due to the shape of the substrate, contact area of the substrate with the phosphor is enlarged. Luminous efficiency is enhanced as well. |
| US08421101B2 |
Semiconductor light emitting device
Provided are a semiconductor light emitting device and a method for manufacturing the same. The semiconductor light emitting device comprises a first electrode on an region of top surface of a first conductive semiconductor layer; a second electrode layer under a second conductive semiconductor layer; and a conductive support member under the second electrode layer, wherein the second conductive semiconductor layer includes a plurality of recesses on a lower portion of the second conductive semiconductor layer, wherein the second electrode layer has an uneven structure corresponding to the plurality of recesses. |
| US08421097B2 |
Organic light emitting diode display device
An organic light emitting diode display includes a substrate main body, a plurality of organic light emitting diodes formed on the substrate main body, and a differential capping layer covering the plurality of organic light emitting diodes, the differential capping layer having a plurality of thicknesses. The differential capping layer has first regions with a thickness of 90 nm to 120 nm, and second regions with a thickness smaller than the thickness of the first regions. |
| US08421095B2 |
Light-emitting diode array
A method of fabricating a light emitting diode array, comprising: providing a temporary substrate; forming a first light emitting stack and a second light emitting stack on the temporary substrate; forming a first insulating layer covering partial of the first light emitting stack; forming a wire on the first insulating layer and electrically connecting to the first light emitting stack and the second light emitting stack; forming a second insulating layer fully covering the first light emitting stack, the wire and partial of the second light emitting stack; forming a metal connecting layer on the second insulating layer and electrically connecting to the second light emitting stack; forming a conductive substrate on the metal connecting layer; removing the temporary substrate; and forming a first electrode connecting to the first light emitting stack. |
| US08421093B2 |
LED module and LED dot matrix display
An LED module A1 includes LED chips 3R, 3G, 3B, and a module substrate 1 on which the LED chips 3R, 3G, 3B are mounted. A wire 4R is connected to the LED chip 3R, and the LED chips 3G and 3B are arranged to face each other across the wire 4R. With this arrangement, the LED module A1 is reduced in size, and red light, green light and blue light are properly mixed. |