Document Document Title
US07742550B2 Wireless communication apparatus using fast fourier transforms to create, optimize and incorporate a beam space antenna array in an orthogonal frequency division multiplexing receiver
A wireless communication apparatus which uses fast Fourier transforms (FFTs) in an orthogonal frequency division multiplexing (OFDM) receiver which incorporates a beam space antenna array. The beam space antenna array may be implemented with a Butler matrix array. The beam space antenna array may be a circular array, vertical array, or a combination of both circular and vertical arrays, for providing the desired angular antenna coverage. In one embodiment, the antenna array is optimized because the FFTs are linear invariant transform operators, whereby the order of operations in the OFDM receiver can be interchanged.
US07742545B2 Method and apparatus for generating corrected quadrature phase signal pairs in a communication device
A method and an apparatus (300) for generating corrected quadrature phase signal pairs in a communication device are provided. The apparatus (300) includes a quadrature phase generator (310), programmable delay elements (320, 330) and a control circuit (360). The programmable delay elements (320, 330) receive a quadrature phase signal pair (signals I 312 and Q 314) from the quadrature phase generator (310). The control circuit (360) generates a control signal (362) based on outputs (325, 335) of the programmable delay elements (320, 330). The control signal (362) configures the programmable delay elements (320, 330). The programmable delay elements (320, 330) are configured to adjust delay between the signals I (312) and Q (314). The programmable delay elements (320, 330) are also used to adjust duty cycle for the quadrature phase signal pair to provide the corrected quadrature phase signal pair.
US07742544B2 System and method for efficient CABAC clock
A system and method that process data in a circuitry utilizing two clocks. The two clocks may be an offset version of one another. Utilizing two clocks to processes the data may consume fewer clock cycles than using only one clock. The circuitry may comprise registers and a memory, wherein one register may receive a location of information in the memory, which may then be read from the received location. The one register may utilize a first of the two clocks, and the reading from the memory may utilize the second of the two clocks. The circuitry may comprise a portion of a CABAC decoder.
US07742538B2 Method for selecting optimal beam and apparatus for receiving digital broadcasting signal using the same
There are provided a method for selecting an optimal beam to improve digital broadcasting receiving performance, and a digital broadcasting receiving apparatus using the same. The method includes the steps of: a) calculating a mainpath Signal to Multipath signal and Noise Ratio (SMNR) based on a channel impulse response for a plurality of beams which are formed according to steering directions from output signals of antennas, wherein the output signal of each antenna has different phase shift according to location of antenna element; b) selecting a predetermined number of beams having a high SMNR value by comparing the calculated SMNR value for respective beam; c) calculating a mainpath Signal to Dominant Multipath signal Ratio (SDMR) based on a channel impulse response corresponding to the selected beam; and d) selecting a beam output signal having the biggest SDMR value by comparing SDMR values calculated in selecting a predetermined number of beams.
US07742530B2 Digital television system
Disclosed is a digital television system carrying out modulation/demodulation by VSB(vestigial side band). A VSB transmitter includes an additional error correction encoder designed in a manner that a signal mapping of a TCM encoder is considered, a multiplexer(MUX), a TCM encoder operating in a manner corresponding to state transition processes of the additional error correction encoder, and a signal transmission part including an RF converter. And, A VSB receiver includes a signal receiver part receiving a signal transmitted from the transmitter, a TCM decoder, a signal processing part including a derandomizer, and an additional error correction decoder part.
US07742527B2 Signal compressing system
A multi-scanner scans a signal according to several different patterns. A scanning pattern selector determines which scanning pattern produced the most efficient coding result, for example, for runlength coding, and outputs a coded signal, coded most efficiently, and a selection signal which identifies the scanning pattern found to be most efficient.
US07742526B2 Moving picture coding method and moving picture decoding method for performing inter picture prediction coding and inter picture prediction decoding using previously processed pictures as reference pictures
A coding control unit (110) and a mode selection unit (109) are included. The coding control unit (110) determines the coding order for a plurality of consecutive B-pictures located between I-pictures and P-pictures so that the B-picture whose temporal distance from two previously coded pictures is farthest in display order is coded by priority, so as to reorder the B-pictures in coding order. When a current block is coded in direct mode, the mode selection unit 109 scales a forward motion vector of a block which is included in a backward reference picture of a current picture and co-located with the current block, so as to generate motion vectors of the current block, if the forward motion vector has been used for coding the co-located block.
US07742523B2 Moving picture coding apparatus and moving picture decoding apparatus
A video encoder (70) for coding moving pictures comprising a buffer (16c) with a plurality of memory areas capable of storing frames composed of top fields and bottom fields, a motion estimation unit (19) operable to code, field by field, inputted pictures performing moving estimation and moving compensation by referring, field by field, to the picture data stored in a memory area, a motion compensation unit (16d), a subtractor (11), a transformation unit (13) and a quantization unit (14), a memory management unit (71) operable to manage, frame by frame, a plurality of memory areas, an inverse quantization unit (16a) and inverse discrete cosine transform unit (16b) operable to decode picture data in coded fields and store the picture data in the decoded field in any of the plurality of memory areas under the management by the memory management unit (71).
US07742522B2 Signal compressing system
A multi-scanner scans a signal according to several different patterns. A scanning pattern selector determines which scanning pattern produced the most efficient coding result, for example, for runlength coding, and outputs a coded signal, coded most efficiently, and a selection signal which identifies the scanning pattern found to be most efficient.
US07742520B2 Equalization circuit
An equalization circuit that allows particularly for lowpass filtering by transmission lines comprises a compensating equalizer controlled according to whether the edges between bits in the data waveform are early or late. Adjusting the equalization causes edges to appear in the same place, whereas if the adjustment is incorrect certain edges will be late and certain edges will be early depending on the history of “1”s and “0”s in the data stream. This is an effect of so-called intersymbol interference. The control mechanism includes circuits for recognizing patterns of “1”s and “0”s in the recent history of the data waveform whose occurrence is used to trigger the adjustment of the equalizer.
US07742518B2 Discriminator function for GPS code alignment
Embodiments of the present invention pertain generally to methods and systems of processing a global positioning satellite (GPS) signal. More particularly, embodiments of the present invention provide an improved discriminator function that utilizes the early, prompt, and late correlator values. For example, the improved discriminator function may be normalized based on all three of the early, prompt, and late correlator values. The improved discriminator function behaves linearly across a prescribed region whose width depends on the separation between correlators.
US07742517B2 Method for modulating a bit string, modulator, radio transmitter, and radio receiver
A modulator includes a first input configured to input a first bit string; a first modulating device configured to modulate the inputted first bit string at a first bit rate; a second input configured to input a second bit string; a second modulating device configured to modulate the inputted second bit string at a second bit rate which is lower than the first bit rate; and an output configured to output a modulated signal including the modulated first bit string and the modulated second bit string.
US07742516B2 Modulator
A modulator, and more particularly an HPSK modulator, is disclosed that enables the circuit scale to be reduced and also enables power consumption to be reduced. An HPSK modulator 209 incorporated in a radio communication apparatus or the like is equipped with a spreading code multiplication section 11, a complex arithmetic section 101, a coefficient determination section 51, and raised COS filters 41 and 42. Spreading code multiplication section 11 multiplies transmit data DPDCH1 by a spreading code Cd1. Complex arithmetic section 101 performs complex arithmetic on an output signal output from spreading code multiplication section 11 and a scrambling code Sn, and performs conversion to complex data. Coefficient determination section 51 determines a filter coefficient Ad1n based on a gain factor βd1 that determines transmission power. Raised COS filters 41 and 42 band-limit the complex data using the filter coefficient.
US07742511B2 Method and system for a pulsed laser source emitting shaped optical waveforms
A laser system for processing a workpiece includes a tunable pulsed laser source having an output comprising a set of optical pulses. The tunable pulsed laser source includes a seed source, an optical circulator having a first port coupled to the seed source, a second port, and a third port, a modulator driver, and an amplitude modulator coupled to the modulator driver. The tunable pulsed laser source also includes a first optical amplifier characterized by an input end and a reflective end and a second optical amplifier coupled to the third port of the optical circulator. The laser system also includes a controller configured to adjust laser parameters of the tunable pulsed laser source, a supporting member configured to support the workpiece, and an optical system configured to adjust laser beams from the tunable pulsed laser source and direct them towards the workpiece.
US07742509B2 Single-longitudinal mode laser with orthogonal-polarization traveling-wave mode
A single longitudinal-mode laser includes a first mirror and a second mirror that define a laser cavity therein that does not include a linear polarizer. A birefringent gain medium can generate a lasing light at a lasing wavelength along a light propagation direction in response to a pump light at a pumping wavelength. The birefringent gain medium has an optical axis substantially perpendicular to the light propagation direction. A first wave plate positioned between the first mirror and the birefringent gain medium is a quarter wave plate at the lasing wavelength and a whole wave plate at the pumping wavelength. A second wave plate is positioned between the birefringent gain medium and the second mirror. The first wave plat and the second wave plate in part produce a single longitudinal mode in the lasing light.
US07742508B2 Electro-optic deflector
An electro-optic deflector 51 has an electro-optic material body 519 through which an optical beam 46 is passed. The deflector has no more than three longitudinal electrodes, of which no more than two electrodes 511, 512 have arcuate transverse cross-sections. The electrodes are arranged to create an electric field substantially transverse to a direction of the optical beam to deflect the optical beam passing between the electrodes. The electro-optic deflector has particular application in a Q-switched laser for generating sub-nanosecond optical pulses.
US07742507B1 Method and system for phase and byte alignment on a multiplexed high speed bus
A method and system for multiplexing a plurality of serialized data signals in which a first integrated circuit device generates a plurality of serialized data signals. A second integrated circuit device is in electrical communication with the first integrated circuit device. The second integrated circuit device includes a multiplexer operable to generate a multiplexed output signal from the plurality of serialized data signals received from the first integrated circuit. A phase data and byte snapshot back channel is transmitted from the second integrated circuit device to the first integrated circuit device. The phase data and byte snapshot back channel carries phase data and periodic snapshots of the serialized data signals. The phase data and byte snapshot back channel is used by the first integrated circuit device to adjust the phase of each of the plurality of serialized data signals to preserve bit and byte alignment. Such a method and system can be implemented as a 4×10 Gbit/Sec. system that is multiplexed to a 40 Gbit/Sec. stream as may be used in optical transmission systems.
US07742503B2 Method and apparatus for transmitting data from asynchronous network via synchronous network
A transmitting apparatus for encapsulating data received from an asynchronous network to a frame of a specified format and transmitting the received data as a synchronous frame to a synchronous network, includes a code generating part configured to generate an error detection code for detecting an error in the received data and add the error detection code to the received data, an inverting part configured to perform bit inversion in which the received data added with the error detection code are converted to bit inverted received data, a selecting part configured to select either the received data or the bit inverted received data according to the number of bit patterns included in the received data and the bit inverted received data, and a transmitting part configured to transmit either the received data added with the error detection code or the bit inverted received data selected by the selecting part.
US07742502B2 Method and apparatus for transporting a client layer signal over an optical transport network (OTN)
In order to facilitate the transport of 1 Gbit/s Ethernet signals over an Optical Transport Network using the Optical Transport Hierarchy as specified by ITU-T G.709, a new OTH entity referred to as Optical Channel Data Unit-0 (ODU0, 101) with a capacity of approximately 1.22 Gbit/s is defined. This new entity fits perfectly into the existing OTH multiplexing structure, allowing the transport of two times a 1 Gbit/s Ethernet client layer signal within the capacity of one ODU1 (110), while being individually switchable. A 1 Gbit/s Ethernet signal (102) can be mapped into the ODU0 payload (103) using the Transparent Generic Framing Procedure (GFP-T) encapsulation technique as specified in Rec. G.7041.
US07742500B2 Method for transmitting data by a mobile station comprising a step of determining a Maximum Datagram Size (MDS)
A mobile station that includes a smart card associated with a mobile host equipment communicates by means of a protocol that is organized in several layers. These layers include at least a data transport layer of the datagram type that is adapted to transmit integral data packets of a maximum size. The transmission method carries out the step of determining the value of the maximum size of data packets that are capable of being integrally transmitted by the transport layer of the mobile host equipment, and storing that value in the card.
US07742497B2 Access systems and methods for a shared communication medium
Priority-based access systems and methods for shared communication media are provided. The priority and a corresponding weight of traffic to be transmitted on a shared communication medium are determined. This determination may be made, for example, before a first attempt to transmit the traffic, or before a subsequent traffic transmission attempt following an unsuccessful transmission attempt. The weight controls a rate of change of an exponential delay range limit factor in proportion to a number of attempts to transmit the traffic. The resultant weighted delay range limit factor is used to determine a range of delays from which a delay is selected. A transmission back-off time is then determined based on the selected delay.
US07742496B2 Simultaneous serial transmission of messages with bit-arbitrated selection of the numerically largest or smallest value in the messages' data fields
A communication system has a number of nodes connected to a serial data bus. Nodes communicate with each other by transmitting dominant and recessive bits during bit intervals as taught by the CAN (controller area network) arbitration protocol. According to the CAN arbitration protocol, any dominant bit transmitted during a bit interval causes the bit value received to be a dominant bit regardless of the number of recessive bits being sent. The system is arranged so that two or more nodes each respond to a report query message sent by one of the nodes, with a report message sent simultaneously by each of the nodes. The headers (leading bits) of each of the report messages sent by nodes responding to a report query message are the same, allowing arbitration on a trailing node data field. This results in the message having the numerically largest (or smallest) node data field value to survive arbitration. Thus a number of nodes can be polled with a report query message and will respond by simultaneously sending each node's numerical data value with the largest or smallest of these data values received by the system's nodes.
US07742489B2 Multi-protocol network interface card
A method and apparatus for a communications network that executes a medium access control (MAC) protocol that permits multiple access to a shared medium or shared switching fabric. The MAC protocol uses a BANDWIDTH_ALLOCATOR to regulate access to the network by sending a permission message to a NODE, allowing it to transmit to a specific set of NODEs for a specific length of time. The medium and switching fabric can carry one or more protocols, each of varying framing format and native bitrate. The switching fabric provides a connection-oriented bufferless data transport service that preserves frame ordering. An illustrative embodiment uses a slotted master/slave time-division multiplexed access (TDMA) scheme to allow flexible provisioning of network bandwidth.
US07742486B2 Network interconnect crosspoint switching architecture and method
A network switching system includes transceiver devices respectively provided for a plurality of input line cards. The switching system also includes transceiver devices respective provided for a plurality of output line cards. The switching system further includes a switch device communicatively coupled to each of the plurality of input line cards and the plurality of output line cards. The switch device includes a crosspoint matrix for communicatively connecting one of the input line cards to one of the output line cards. The switch device is capable of operating in either a crosspoint mode for routing cells or packets from one of the input line cards to one of the output line cards, or a scheduler mode for controlling flow of cells and/or packets through at least one other switch device.
US07742484B2 Multifabric communication using a backbone fabric
A Fibre Channel router used to join fabrics. EX_ports are used to connect to the fabrics. The EX_port joins the fabric but the router will not merge into the fabric. Ports in the Fibre Channel router can be in a fabric, but other ports can be connected to other fabrics. Fibre Channel routers can be interconnected using a backbone fabric. Global, interfabric and encapsulation headers are developed to allow routing by conventional Fibre Channel switch devices in the backbone fabric and simplify Fibre Channel router routing. Phantom domains and devices must be developed for each of the fabrics being interconnected. Front phantom domains are present at each port directly connected to a fabric. Each of these is then connected to at least one translate phantom domain. Zoning is accomplished by use of a special LSAN zoning naming convention. This allows each administrator to independently define devices are accessible.
US07742483B2 Method and radio sation for transmitting data packets in a radio-communication system
A method transmits data packets in a radio-communication system. A criterion is associated with a data packet received by a radio station, and a data packet which is correctly received is transmitted to another device and/or protocol layer when the criterion has been met.
US07742482B1 Upstream label assignment for the resource reservation protocol with traffic engineering
The invention is directed toward techniques for Multi-Protocol Label Switching (MPLS) upstream label assignment for the Resource Reservation Protocol with Traffic Engineering (RSVP-TE). The techniques include extensions to the RSVP-TE that enable distribution of upstream assigned labels in Path messages from an upstream router to two or more downstream routers of tunnel established over a network. The tunnel may comprise a RSVP-TE P2MP Label Switched Path (LSP) or an Internet Protocol (IP) multicast tunnel. The techniques also include extensions to the RSVP-TE that enable a router to advertise upstream label assignment capability to neighboring routers in the network. The MPLS upstream label assignment using RSVP-TE described herein enables a branch router to avoid traffic replication on a Local Area Network (LAN) for RSVP-TE P2MP LSPs.
US07742480B2 Selective header field dispatch in a network processing system
A method and structure are disclosed for dispatching appropriate data to a network processing system comprising an improved technique for extracting protocol header fields for use by the network processor. This technique includes basic classification of a packet according to the types of protocol headers present in the packet. Based on the results of the classification, specific parameter fields are extracted from corresponding headers. All such parameter fields from one or more protocol headers in the packet are concatenated into a compressed dispatch message. Multiples of such dispatch messages are bundled into a single composite dispatch message. Thus, selected header fields from N packets are passed to the network processor in a single composite dispatch message, increasing the network processor's packet forwarding capacity by a factor of N. Likewise, multiple enqueue messages are bundled into a single composite enqueue message to direct enqueue and frame alterations to be taken on the bundle of N packets.
US07742479B1 Method and apparatus for dynamic network address reassignment employing interim network address translation
An edge router termed a “service gateway” operates to reassign network addresses such as Internet Protocol (IP) addresses to a subscriber, such as when the subscriber is to be transitioned from a first virtual private network (VPN) to a second VPN. The service gateway obtains a new network address routable in a second VPN and applies dynamic edge network address translation (NAT) on an interim basis to provide instant access to the second VPN (following web-based identification for example), while a prior lease for an initial network address not routable in the second VPN is still in effect. When the subscriber attempts to renew the lease in due course, the renewal request is rejected, which forces the subscriber to re-initiate dynamic host control protocol (DHCP) procedures to obtain a new network address. At this point, the interim NAT mapping is removed and the new network address is assigned directly to the subscriber via DHCP. This approach combines the benefits of DHCP and NAT while minimizing dead time on the network and the processing overhead associated with alternative approaches.
US07742475B2 Techniques for distributing replication points for traffic using point-to-point links
Techniques for dynamically distribute replication points based on routing metrics are provided. A receiver list may be split based on the routing metrics. For example, the receiver list may be split based on unicast reachability over an interface. If portions of egress routers are reachable over different interfaces, the portions are included together in a sublist. Thus, the list is split into sublists based on the reachability. Point-to-point links are then set up between a head end router and an egress router in each sublist. The sublist is then sent to each egress router, which can perform the process above in setting up a point-to-point link to another egress router in each sublist.
US07742474B2 Virtual network interface cards with VLAN functionality
A method for receiving incoming packets associated with a virtual Local Area Network (VLAN) includes receiving an incoming packet, classifying the incoming packet based on a VLAN tag embedded in the incoming packet, wherein the VLAN tag corresponds to the VLAN, and passing the incoming packet to a virtual network interface card (NIC) based on the VLAN tag.
US07742473B2 Accelerator module
Stateless storage accelerator modules comprise network interfaces and filter functions that enable the accelerated processing of stateless protocols associated with network storage. Filter functions examine packets received over the network interface according to contexts associated with the destination of the packets. Contexts are found quickly through a fast look-up to ensure high performance of the over all system. The contexts comprise information associated with storage areas including addresses associated with the storage areas.
US07742472B2 Signal processing apparatus and stream processing method
A signal processing apparatus includes, a receiving unit which receives a stream includes compression-encoded data via a network, the stream being formed by packets to which time stamps are respectively added, a generating unit which generates a first stream from the stream received by the receiving unit, based on the time stamps added to the packets in the stream received by the receiving unit to output the first stream from an output port, a selector to which has a first port that receives the first stream output from the output port and a second port that receives a second stream including compression-encoded data and being transmitted in real time from outside, the selector selecting one of the first stream input to the first port and the second stream input to the second port, and a decoding unit which decodes the one stream selected by the selector.
US07742471B2 Methods and systems for routing packets with a hardware forwarding engine and a software forwarding engine
A system is provided that includes a hardware forwarding engine that routes data packets. The system also comprises a processor coupled to the hardware forwarding engine, the processor having a software forwarding engine that routes data packets. If data packets are forwarded from the hardware forwarding engine to the software forwarding engine, the hardware forwarding engine provides route lookup results for at least some of the data packets forwarded to the software forwarding engine.
US07742468B2 Systems and methods for providing enhanced telephone services
A method for providing enhanced telephone services via a computerized telephone services device for use in conjunction with multiple telephone lines and providers. According to embodiments of the invention, a subscriber to telephone services or a group of subscribers may be reached on multiple telephone lines from a single dial-in number; calls in progress may be transferred seamlessly from one line associated with a subscriber to another; and group calling features may be enhanced.
US07742466B2 Switchboard for multiple data rate communication system
A switchboard device and methods of operation of same are disclosed. Embodiments of the invention may provide a flexible means of interconnecting wideband and narrowband communications interfaces, where wideband communications interfaces may transfer low-band data and high-band data, and narrowband communication interfaces may transfer low-band data. Low-band data may be combined and sent to a narrowband communications interface or a wideband communications interface. High-band data may be combined and sent to a wideband communications interface. The low-band data may represent audio signals below a predetermined frequency, while the high-band data may represent audio signals above the predetermined frequency. The predetermined frequency may be, for example, approximately 4 kHz. The spectral mask of the low-band data may meet the spectral mask of G.712. Methods of operating embodiments of the present invention are included. An additional aspect of the present invention may include machine-readable storage having stored thereon a computer program having a plurality of code sections executable by a machine for causing the machine to perform the foregoing.
US07742464B2 System and method for remotely controlling a communication terminal
When a setting in an IP telephone terminal is to be changed, a remote resetter registers subscriber information corresponding to this IP telephone terminal and places a call to this IP telephone terminal. The IP telephone terminal sends a setup request to a setup server if an incoming call is from a pre-registered source. When the IP telephone terminal receives, as a response to this request, setup information from the setup server, the IP telephone terminal sets the setup information and sends a setup completion notification to the remote resetter. Upon receipt of the setup completion notification, the remote resetter deletes the subscriber information corresponding to this IP telephone terminal.
US07742460B2 Method for detecting calls and corresponding units
Disclosed is a method in which a detection request, by means of which an identifier of a calling terminal is to be detected, is addressed to a signaling unit by a called terminal. The called terminal is connected to a data packet transmission network. The signaling unit signals according to a signaling protocol that has been defined for the transmission of data in a data packet transmission network. The detection request is transmitted along with a message and/or an information element which has been established for signaling in the data packet transmission network.
US07742452B2 System and method for dynamic preamble assignment
A method of operation of a multi-hop wireless communication system comprising operating a first device to communicate with one or more network devices using a preamble sequence; locating the first device within range of a network entity; and switching the preamble sequence of the first device to a second preamble for communicating with the one or more network devices.
US07742449B2 Handover function testing method and spectrum spread mobile communications system
At least a mobile terminal 10, base station radio apparatuses 20a and 20b that communicate with the mobile terminal 10, and a radio base station control apparatus 30 that controls the transmission powers of the base station radio apparatuses 20a and 20b are at least provided. When a handover function test is performed between cells that are covered by the base station radio apparatuses 20a and 20b, the radio base station control apparatus 30 calculates a difference between the levels of the reception fields of the base station radio apparatuses 20a and 20b that cover the cells for which the handover test of the mobile terminal 10 is to be performed. Then, the radio base station control apparatus 30 controls the transmission powers of the base station radio apparatuses 20a and 20b so that the difference is equal to or smaller than a predetermined threshold value. Thereafter, the radio base station control apparatus 30 performs the handover function test between the cells covered by the base station radio apparatuses 20a and 20b, the difference between the levels of the reception fields from which is equal to or smaller than the threshold value.
US07742448B2 Optimizing topology learning in a multihop network
In a multihop network having a first type of node, a second type of node and a third type of node, techniques are provided for optimizing topology learning in the multihop network which can reduce the amount of control traffic that occurs due to frequent topology changes. For example, each of the nodes can transmit a node identifier and status information to the first type of node. The status information associated with each node can include a node type and a mobility state of the node. The first type of node can store the node identifier and the status information from each of the nodes. The first type of node can reserve or allocate a channel resource to each of the second type of nodes having a mobile state. The channel resource is used by the second type of node for exchanging topology information with the first type of node.
US07742445B2 Distributed network communication system which enables multiple network providers to use a common distributed network infrastructure
In one embodiment, a wireless access point wirelessly receives identification information from a portable computing device, determines a particular communication medium access provider identified in the identification information, wirelessly receives data from the portable computing device, and transmits the data to a destination of the particular communication medium access provider. In one embodiment, the wireless access point communicates with the portable computing device using wireless Ethernet, listens for all types of identification information and answers all queries from the portable computing device even if the wireless access point does not recognize the identification information, and provides the portable computing devices access to a plurality of communication medium access providers. In one embodiment, each of the communication medium access providers wirelessly connects the portable computing device to a network, and the identification information identifies a particular one of the communication medium access providers.
US07742442B2 Changing access point (AP) device type based on connectivity to a network
Techniques are provided for determining whether a particular Access Point (AP) is to be designated as an Infrastructure Access Point (IAP) or a Backhaul Mesh Access Point (BMAP) based on the connectivity of the particular AP to a network which includes at least one multicast heartbeat message (MCHBM) source. Techniques are provided which can allow an Infrastructure Access Point (IAP) to change its device type to a Backhaul Mesh Access Point (BMAP) device type when the IAP determines that connectivity to the network is lost. Other techniques are provided which can allow a Backhaul Mesh Access Point (BMAP) to change its device type to an Infrastructure Access Point (IAP) device type when the BMAP determines that connectivity to the network is established.
US07742441B2 Apparatus, and associated method, for setting the number of page indications per page to be included in a quick page message
Apparatus, and an associated method, for paging an access terminal in a radio communication system. A page indication count setter selects the page indication count, i.e., the number of page indications per page, to be included in a quick page message. The set page indication count is dependent upon communication activity, e.g., the system paging load, identified by a communication activity input indicia identifier.
US07742440B2 Networks and methods integrating digital mobile standards
Communications in a wireless communication system based on two or more communication standards are configured for delivery to cell sites or to subscribers using a digital link having channels assigned to the two or more communication standards. A T-1 level can be divided into twenty four channels that are assigned to two or more mobile standards, and subscriber or network communications based on the two or more standards can be delivered to, for example, radio transmitters associated with the mobile standards. Channel allocation can be revised based upon requested capacity associated with the mobile standards.
US07742432B2 Topology comparison
A solution for comparing topologies is provided. In an embodiment of the invention, a set of differences between the nodes and/or connectors of two or more topologies is obtained. Each difference can comprise a missing node/connector and/or a difference in an item/relationship attribute. A user interface is generated that displays one or more of the differences by displaying a subset of each topology that corresponds to the difference. In an embodiment of the invention, a user interface for comparing topologies is provided that displays each subset in a unique display area and enables a user to select the difference(s) and/or limit the difference(s) that can be selected based on the type of difference.
US07742429B1 Method and system of promptly processing real-time media stream data packet
A method and system for fast transporting real-time media stream data package is based on the Real-time Transport Protocol/Real-time Transport Control Protocol of User Datagram Protocol for network nodes such as media gateway, Integrated Access Device (IAD) and multimedia terminal. The improvement of the system lies in the adding of an IP data package fast filter module, a UDP fast sending module and a policy ARP table process module based on local UDP port. The method involves: fast receiving the real-time media stream data package transmitted on the basis of RTP/RTCP protocol; fast sending the real-time media stream data package transmitted on the basis of RTP/RTCP protocol; and a policy ARP table based on UDP port and its refurbishing system.
US07742427B2 Internal loop-back architecture for parallel serializer/deserializer (SERDES)
An internal loop-back architecture for a parallel serializer/deserializer (SERDES) includes a transmitter macro including a plurality of transmit elements arranged in a parallel architecture, and a receiver macro including a plurality of receive elements arranged in a parallel architecture, wherein at least a portion of the transmit elements and a portion of the receive elements share a communication channel and wherein any of the plurality of transmit elements in a row can communicate with any of the plurality of receive elements in a row, and wherein each of the plurality of transmit element includes a loop-back arrangement with each of the plurality of receive elements.
US07742424B2 Communication-efficient distributed monitoring of thresholded counts
A system, method, and computer program product for distributed monitoring of local thresholds at each of a number of monitoring nodes and initiating communication only after the locally observed data exceeds the local threshold. Both static thresholds and adaptive thresholds are considered. In the static case, a combination of two alternate strategies for considering thresholds minimizes communication overhead. In the adaptive case, local thresholds are adjusted based on the observed distributions of updated information in the distributed monitoring system. Both approaches yield significant savings over the naïve approach of performing processing at a centralized location.
US07742419B2 Method, system and article for improved TCP performance during packet reordering
TCP congestion avoidance is implemented upon retransmission of a packet and is reverted back to the original congestion state upon receipt of an early acknowledgement (ACK), indicating reordering of packets, thereby eliminating a needless restriction on TCP bandwidth. Upon receiving an ACK to a retransmitted packet, it is determined if the ACK resulted from receipt of the original reordered packet or the retransmitted packet, based on the arrival time of the ACK at the sender. If the round-trip-time (RTT) for the retransmitted packet is much lower than the average or current calculated RTT for the network link between sender and receiver, then the retransmission occurred as a result of a reordering event, and the congestion window is restored back to its value prior to the retransmission, thereby permitting the network link to continue operating at its original increased throughput.
US07742412B1 Method and apparatus for preventing head of line blocking in an ethernet system
A method for preventing head of line blocking in an Ethernet system. In one embodiment, a network interface detects whether there is traffic flow congestion between the network interface and a data processing unit such as a CPU or other peripheral. If yes, the network interface communicates the congestion status to its attached Ethernet switch. In another aspect of the invention, the Ethernet switch then stops serving the congested port or queue, and informs a switch from which the traffic flow causing the congestion originates. In a further aspect, the originating switch then reduces bandwidth for the traffic flow causing the congestion. In a still further aspect, the originating switch can take the bandwidth that it acquired because of reducing the congesting traffic flow, and use it to increase bandwidth for other traffic flow.
US07742409B2 Method and apparatus for compensating for performance degradation of an application session
Disclosed is a method and apparatus for compensating for a performance degradation of an application session in a plurality of application sessions associated with a network link. The performance of each application session in the plurality of application sessions associated with the network link is determined. The performance of each application session in the plurality is then compared. From this comparison, a lowest performance application session in the plurality of application sessions is identified. Corrective action is performed on packets scheduled to be transmitted over the lowest performance application session.
US07742407B2 Quality of service management in a switched digital video environment
Quality of service management in a switched digital video environment. The devices in a user's home can be given quality of service priority statuses by a system operator. In the event of oversubscription, the quality of service management allows the user to determine which services will have priority over others if more bandwidth is requested than available.
US07742406B1 Coordinated environment for classification and control of network traffic
Methods, apparatuses and systems directed to the coordinated classification of network traffic. In one implementation, the present invention enables a coordinated network environment for traffic classification where an upstream network device classifies a data flow and adds traffic class information to at least one packet in the data flow. Downstream network devices in the communications path to the destination host can use the traffic class information in the modified packet, bypassing at least some of the local traffic classification operations and thereby reducing CPU utilization. In one implementation, the last downstream network device strips the traffic classification information from the modified packet before it is forwarded to the destination host. Embodiments of the invention reduce or eliminate redundant network traffic classification operations performed by a plurality of network devices in a communications path.
US07742403B2 Deadlock detection in a telecommunication network
A method is described for checking deadlock in a telecommunication network including a first activated backup connection for protecting traffic over a first intended connection. The method includes the steps of checking a reversion blocked status of the first intended connection by checking if the segments of the first intended connection are available or not available, in case of detecting the reversion blocked status of the first intended connection identifying activated backup connections using the not available segments of the first intended connection, identifying the corresponding intended connections, checking the reversion blocked status of each identified corresponding intended connection by checking if the corresponding segments are available or not available, in case of detecting the reversion blocked status of an identified corresponding intended connection checking if a corresponding not available segment is included in the first backup connection. The method further provides the indication of the intended connections involved in the deadlock.
US07742402B2 Path switching control system, path switching control method and computer system using path switching control
Disclosed is a path switching control system for controlling path switching, including: an active path control unit for controlling active paths; a standby path control unit for controlling standby paths; and a path switching control unit being configured in hardware and for controlling the path switching, wherein the path switching control unit includes: a control information reading unit for reading control information from the active path control unit on the occurrence of a failure in the active path control unit; and a control information writing unit for writing the control information read by the control information reading unit into the standby path control unit. A computer system using the path switching system and a path switching control method are also disclosed.
US07742401B2 Network having switchover with no data loss
A data switchover from a first switching module to a second switching module has no data loss. A graceful code upgrade in a Fibre Channel network, for example, with no data loss can be achieved.
US07742398B1 Information redirection
A technique is disclosed for redirecting information in a segmented virtual machine. The technique includes sending information to a shell VM and redirecting the information to bypass the shell VM. A technique for evaluating whether to redirect information may include sending a discovery packet, receiving a reply to the discovery packet; and determining whether a switch is capable of stitching based on the reply. A technique for responding to a discovery packet may include receiving the discovery packet at a switch and sending a response indicating a capability of the switch.
US07742396B2 Communication control method, address management node, and mobile node
A technique is disclosed whereby, while a MN (mobile node) is separated from a home network, the status available on a home network is obtained, and a communication path is optimized for a packet to be transmitted between the MN and a CN (correspondent node) via a HA (home agent). According to this technique, an HA 20 that manages a plurality of home addresses allocated to an MN 10 detects communication statuses of, for example, an ISP1 and an ISP2, and selects a home address that is designated, for a packet transfer to be performed from the MN, via the HA, to a CN 15, as a source address for the inner packet of an encapsulated packet to be transmitted from the MN to the HA. Since the MN designates this home address as the source address for the inner packet, a packet decapsulated and transferred by the HA is delivered to the CN via the ISP1 or the ISP2 in a superior communication status.
US07742393B2 Locating endpoints in a power line communication system
A system for bi-directional communication within a power distribution system. The system is configured to find an endpoint, the endpoint having an endpoint transceiver in electrical communication with a power distribution line. The power distribution line is within the power distribution system, and the endpoint is identified by a unique identifier (I.D.). The system comprises a substation transceiver electrically coupled to a power distribution line within the power distribution system. A substation circuit is in electrical communication with the substation transceiver. The substation circuit is programmed to map the unique I.D. endpoint to a base frequency within a bandwidth and to control the endpoint to transmit a find endpoint data packet onto the power distribution network. The find endpoint data packet includes the unique I.D. and the base frequency. The substation circuit is further programmed to assign a status to the base frequency upon receiving a signal from the endpoint, the status indicating that the substation transceiver is receiving signals in the frequency bandwidth.
US07742391B2 Apparatus and method for estimating frequency offset
In a frequency offset estimating device of a subscriber station of a communication system in which a plurality of sectors are allocated to a cell, the frequency offset estimating device extracts a preamble sequence from a downlink frame signal. The frequency offset estimating device estimates a phase offset of a sector to which the subscriber station belongs among the sectors by using the preamble sequence, and calculates the autocorrelation value for the respective signals of the preamble sequence. The frequency offset estimating device compensates the autocorrelation value by using the phase offset, and estimates a frequency offset from the sum of the phase offset compensated autocorrelation values.
US07742390B2 Method and apparatus for improved long preamble formats in a multiple antenna communication system
Methods and apparatus are provided for improved long preamble formats in a multiple antenna communication system having N antennas. According to one aspect of the invention, a preamble having a legacy portion and a high throughput portion is transmitted (or received) on each of the N transmit antennas, wherein the legacy portion comprises a legacy long training field and the high throughput portion comprises at least N high throughput long training fields, wherein the N high throughput long training fields are transmitted in N time slots using an N×N orthogonal matrix. The orthogonal matrix can be, for example, one or more of a Walsh matrix and a Fourier matrix. The N time slots can optionally comprise a single symbol.
US07742389B2 Method and apparatus for improved short preamble formats in a multiple antenna communication system
Methods and apparatus are provided for improved short preamble formats in a multiple antenna communication system having N antennas. A short preamble format having a legacy portion and a high throughput portion is transmitted (or received) on each of the N transmit antennas, wherein the legacy portion comprises a legacy long training field and the high throughput portion comprises N−1 high throughput long training fields. The legacy long training field and the N−1 high throughput long training fields can be transmitted in N time slots using an N×N orthogonal matrix, such as a Walsh matrix or a Fourier matrix. The N time slots can optionally comprise a single symbol. Backwards compatibility is optionally maintained by including a legacy short training field and a legacy signal field in the legacy portion of the short preamble.
US07742385B2 Hybrid optical data carrier having a modified CD layer
The invention relates to an optical data carrier which combines a CD layer with at least one further format, such as a DVD layer for example. If a hybrid data carrier of this kind is to be produced in a thickness of less than 1.7 mm, and preferably in a thickness of 1.5 mm or less, then, seen from the surface which is to be read from, the CD layer will normally be situated at a depth of considerably less than 1.1 mm, and the CD substrate therefore has to be thinned down. The quality of the reading signals obtained is increased by increasing the length of the optically readable structures of the CD layer in comparison with the values which are usual in this case. Because of the difficulties which certain CD players have in focussing when the substrates are thin, the refractive index of the disc material used is reduced from the figure for polycarbonate, at least in the case of the CD substrate, the recommended range being between 1.40 and 1.55. The compatibility of the CD layer of a hybrid disc according to the invention with different players may be further increased by widening its readable structures in comparison with normal values and thus by making them more than 500 nm wide.
US07742384B2 Optical head and optical disc device
The present invention aims to provide an optical head and an optical disk device capable of suitably detecting tracking error signals for different types of optical discs.A polarizing hologram element includes a first area and a second area adjacent to the first area in an area where a beam reflected and diffracted by a BD passes. The first area includes a first transmission area for transmitting many 1st-order diffracted lights from the BD, a second transmission area adjacent to the first transmission area and closer to an optical axis than the first transmission area, and a third transmission area adjacent to the first and second transmission areas. The second area includes a fourth transmission area for transmitting many 1st-order diffracted lights from the BD, a fifth transmission area adjacent to the fourth transmission area and closer to the optical axis than the fourth transmission area, and a sixth transmission area adjacent to the fourth and fifth transmission areas.
US07742383B2 Optical pickup lens
An optical pickup lens for focusing a light beam from a laser light source on an optical information recording medium is a single lens. The optical pickup lens has two surfaces, and a surface R2 opposite to a surface R1 closer to the laser light source has a continuous shape. When the surface R2 has radii h1, h2 and h3 (h1Δsag1>Δsag2 and Δsag2<Δsag3 are satisfied.
US07742377B2 Image forming method, apparatus and computer-readable recording medium having image forming program
An image forming apparatus at least includes a photoreceptor, a light emitter, a detector and a controller. The light emitter irradiates the photoreceptor with a laser beam so as to form an electrostatic latent image thereon. The detector detects an incident amount of the laser beam falling on a light receiving portion of the detector on a main scan line. The controller changes at least one of a detection sensitivity of the detector for a laser beam and an emission amount of the laser beam emitted from the light emitter when the incident amount of the laser beam detected by the detector is not greater than a predetermined value.
US07742376B2 Recording medium and method and apparatus for controlling the recording using sequence numbers of control information units
A recording medium equipped with recording/reproducing control information, and a method and apparatus for controlling the recording medium using the control information are disclosed. The recording medium includes: a data area in which data is recorded; and a management area in which control information is recorded, wherein the management area includes a plurality of first control information units equipped with the control information and a plurality of second control information units, the second control information unit being formed by grouping at least one first control information units among the plurality of first control information units, and the control information includes information indicating the number of consecutive second control information units among the plurality of second control information units. Therefore, the recording medium can be effectively controlled.
US07742375B2 Method of recording information to and reproducing information from an optical information storage medium
A method of recording information to a read-only optical information storage medium comprising a plurality of areas, including: recording data in at least one of the plurality of areas in the form of pits in a first pit pattern; and recording data in others of the plurality of areas in the form of pits in a second pit pattern different from the first.
US07742374B2 Method of recording data on optical recording media and optical recording device
A method of recording data on a double-layer optical recording medium having a recording layer with high light transmittance is provided. A laser beam is modulated to emit a pulse series of laser including a write pulse of a write power and a cooling pulse of a bottom power, so as to encode and write data to be recorded as recording marks of a length nT along a track of the recording layer, where n is an integer and T is one clock cycle. An nT recording mark is formed using (n−1) write pulse(s), and when forming a recording mark of 4 T or longer, a cooling pulse with a pulse width of 0.8 T to 2 T is inserted before the last write pulse. Recording marks are thereby accurately formed without heat interference between consecutive recording marks and cross erase between recording marks of adjacent tracks.
US07742373B2 Optical disk drive for scanning an optical disk carrying a groove with a wobble
An optical disk drive for scanning an optical disk having a wobbled groove and a land portion separating adjacent parts of the groove. The optical disk drive has a beam generator for generating a read beam and directing the read beam to the optical disk, a sensor for sensing a reflected beam produced by the optical disk upon receiving the read beam and for producing a sensor output signal with a sensor output signal amplitude, and an envelope analyzer to receive the sensor output signal from the sensor, to analyze an envelope (WS1e, WS2e) of the sensor output signal amplitude, and to derive from a variation of the envelope (WS1e, WS2e) as a function of time an indicator indicating whether the read beam is directed to the groove or to the land portion.
US07742370B2 Objective lens and optical information read/write device
An objective lens, for an optical information read/write device that performs read/write operations on each of a plurality of optical discs using a corresponding one of three laser beams having first, second, and third wavelengths λ1, λ2, and λ3 (nm) satisfying a relationship λ1<λ2<λ3, respectively, includes a phase shift structure having a plurality of ring-shaped refractive surface zones into which at least one surface of the objective lens is concentrically divided. The objective lens is made of material with an Abbe number νd satisfying a condition 40≦νd≦80. The phase shift structure has a step between each couple of the adjacent refractive surface zones that gives an optical path difference to an incident laser beam, so that a condition 2N+1.00<|ΔOPD/λ1|<2N+1.30 is satisfied, where ΔOPD represents the optical path difference (nm) that the step gives to the laser beam with the first wavelength, and N represents a non-negative integer.
US07742367B2 One piece self-expiring security badge or label
A self-expiring badge or label is provided that includes a clear substrate, an opaque adhesive layer, a liner web, and an ink pattern is provided. The clear substrate has a back surface and a front surface with the opaque adhesive layer on the back surface. The liner web has a first surface and a second surface, where the adhesive layer secures the substrate to the first surface. The ink pattern is on at least a portion of the second surface. Upon removal of the liner web from the adhesive layer, the portion remains secured to the clear substrate by the adhesive layer and the clear substrate is foldable to place the ink pattern in contact with the adhesive layer. The ink pattern migrates through the adhesive layer in a selected time interval and is visible through the clear substrate when the ink pattern is in contact with the adhesive layer.
US07742366B2 One piece self-expiring security badge or label with devices to print, activate and issue the time-label automatically
A self-expiring badge or label that includes an upper substrate having an upper surface and a lower surface and an adhesive activator layer on the lower surface. A protective layer having a first surface and a second surface is provided, with the first surface of the protective layer being removably attached to and overlaying the adhesive layer. A lower substrate is provided that has an upper surface and a lower surface, the upper surface being removably attached to and overlaying the second surface of the protective layer. A migrating ink pattern is on the lower surface of the lower substrate. To activate, the upper substrate and at least a portion of the lower substrate are removed from the protective layer to leave a remaining portion of the lower substrate having the migrating ink pattern thereon. The migrating ink pattern is then contacted with the exposed adhesive activator layer to activate the migrating ink pattern to migrate through the adhesive activator layer and upper substrate in a selected time interval for viewing from the upper surface of the upper support layer to indicate an expired badge or label. Preferably the migrating ink pattern is contacted with the adhesive layer by folding it onto the adhesive layer. Optionally, to activate the badge both substrates are completely removed from the protective layer and the migrating ink pattern is contacted with the adhesive layer.
US07742362B2 Timepiece comprising an alarm
A timepiece with an alarm mechanism having: a power source (24) which is locked when the mechanism is at rest and unlocked when the mechanism is in operation; an adjustment system which can be used to program the alarm time; and a trigger system that includes a control member (16) which controls the unlocking of the power source and a cam (10) which is kinematically connected to the movement and performs one revolution every 24 hours. The alarm mechanism also has a first striking train mechanism equipped with at least one hammer (54) arranged to strike at least one gong (56), and a second striking train mechanism equipped with at least one hammer (70) arranged to strike at least one non-resonant object (72), wherein the power source (24) drives one or the other of the striking train mechanisms.
US07742361B2 Method for changing a time zone, and timepiece therefor
Method for switching the time zone indicated by a timepiece (1) in order to switch from an initial time zone to a modified time zone, having the following steps: the user enters a time switch command (268) by means of the crown, the hours' and minutes' hands indicate the time of the modified time zone (274), whilst the seconds' hand indicates a city corresponding to the selected time zone, the timepiece automatically returns (280) to the initial time zone and indicates the time of the initial time zone (202), or the time of the modified time zone is retained by means of a command from the user.
US07742360B1 Date-identifying container for perishable food items
A combined container and date-notification mechanism includes a container that has a body and a lid removably attached thereto for maintaining the perishable food item isolated from the environment. A mechanism is included for identifying a date when the perishable food item is placed inside the body such that a user can quickly identify a number of days that the perishable food has been housed within the container without removing the lid from the body. An identification marker is adjustably connected to the date-identifying mechanism and is spaced from the affixing mechanism. A mechanism is included for removably affixing the date-identifying mechanism onto the lid such that the user can selectively affix the date-identifying mechanism onto alternate containers. The affixing mechanism is formed from water insoluble material.
US07742359B2 Calibration circuit of a semiconductor memory device and method of operating the same
A calibration circuit for a semiconductor device and a method of driving the same. The calibration circuit includes a PRBS generator in which a data pattern is generated within an integrated circuit without receiving data from the outside, a PRBS tester that compares output signals of a data latch that strobes and latches an output signal of a data input buffer to determine whether the interlock operation of data and strobe is pass or fail, and a calibration unit that calibrates a delay time using the output signal of the PRBS tester as much as a predetermined unit. Thus, variation in process, voltage, temperature, etc. can be freely calibrated even after package assembly. Accordingly, it is possible to guarantee a set-up/hold value that is necessary for high frequency operation of a system, and to reduce the time and resources necessary for product manufacture and for calibrating these values.
US07742356B2 Semiconductor memory device having a refresh cycle changing circuit
A semiconductor memory device includes a first refresh cycle changing circuit that changes a refresh cycle according to an auto-refresh mode, without giving influence to a refresh cycle according to a self-refresh mode, and a second refresh cycle changing circuit that changes a refresh cycle according to the self-refresh mode, without giving influence to a refresh cycle according to the auto-refresh mode. In this way, according to the present invention, the refresh cycle according to the auto-refresh mode and the refresh cycle according to the self-refresh mode can be controlled independently. Therefore, refresh operation considering the characteristic of each mode can be executed.
US07742354B2 Random access memory data resetting method
A random access memory data resetting method is provided. The method includes following steps. First, a state machine resetting signal is provided to a RAM. Next, the state machine resetting signal is extended for a predetermined time period. Afterwards, a data resetting operation is executed in the RAM within the predetermined time period.
US07742351B2 Semiconductor device and electronic device
In relation to reading of data in a memory, it is an object to provide a semiconductor device mounted with a low power consumption memory. A semiconductor device including a word line, a bit line, and a memory cell electrically connected to the word line and the bit line, further includes a precharge circuit for making the bit line have an electric potential for reading data stored in the memory cell. The precharge circuit is provided for each bit line and connected to the bit line. Further, the precharge circuit is capable of making each bit line have an electric potential for reading the data stored in the memory cell for each bit line.
US07742349B2 Semiconductor memory device
A circuit can control a bit rate of information output from a multi-purpose register (MPR) of a semiconductor memory device in a test mode, thereby reducing current consumption for outputting information in a multi-purpose register (MPR). The semiconductor memory device includes a multi-purpose register configured separately to store a plurality of information, and to control a bit rate of the stored information in a test mode, each of the information having multiple bits, and a connection selector configured selectively to connect an output terminal of the multi-purpose register to one of a number of global lines according to an operation mode.
US07742345B2 Data input circuit of semiconductor memory apparatus and method of inputting the data
A data input circuit for a semiconductor memory apparatus includes a write latency control unit configured to generate a buffer enable signal based on a low frequency operation mode signal, and a data input buffer configured to buffer input data in response to the buffer enable signal.
US07742342B2 Biasing circuit for EEPROM memories with shared latches
An EEPROM memory having a matrix of individually selectable memory cells, the matrix having a plurality of columns, a plurality of data lines each coupled with the cells of a corresponding column, the data lines being grouped in a plurality of packets, a plurality of biasing elements for providing a biasing signal to the data lines, and means for selecting the biasing elements for a selected one of the packets, wherein each biasing element is associated with corresponding data lines of a plurality of packets, the biasing element comprising switching means for selectively applying the biasing signal to a selected one of the associated data lines.
US07742340B2 Read reference technique with current degradation protection
A set of reference cells is used for sensing the data values stored at bit cells of a memory device. In response to an event, the reference cell providing the highest output of the set is selected as the reference cell to be used for subsequent memory access operations. The remaining reference cells are disabled so that they can recover back to or near their original non-degraded states. At each successive event, the set of reference cells can be reassessed to identify the reference cell that provides the highest output at that time and the memory device can be reconfigured to utilize the reference cell so identified. By utilizing the reference cell having the highest output to provide the read reference and disabling the remaining reference cells, the likelihood of the read reference falling below a minimum threshold can be reduced.
US07742339B2 Rd algorithm improvement for NROM technology
Selecting a read voltage level for a NVM cell by using an initial value for the read voltage and performing a read operation, comparing an actual number of bits found to an expected number of bits and, if there is a discrepancy between the actual number and the expected number, adjusting the read voltage level, based on variable data such as statistics available, level occupation, neighbor level, previous chunks data, and other data used during read, program or erase. For example, based on a number of missing bits, or upon a result of a previous read operation, or a result obtained at another program level, or upon how many times the memory cell has been cycled, or upon how many memory cells are at each program level, or on a number of bits at another program level in a selected chunk of memory.
US07742338B2 Local self-boost inhibit scheme with shielded word line
A NAND architecture non-volatile memory device and programming process is described that reduces the effects of word line to word line voltage coupling by utilizing sets of two or more adjacent word lines and applying the same voltage to each in array access operations. This allows each word line of the set or pair to shield the other from word line to word line capacitive voltage coupling. In NAND memory string embodiments the various cells of strings of non-volatile memory cells are programmed utilizing modified or unmodified drain-side self boost, source-side self boost, local self boost, and virtual ground programming processes that utilize two or more “blocking” memory cells on either the source line side and drain line side of a selected memory cell. The paired blocking cells shield each other during programming to reduce coupled noise, to prevent charge leakage from the boosted channel of the selected memory cell.
US07742337B2 Semiconductor memory
A semiconductor memory is achieved which allows a reduction in the area of a memory array block without reducing the gate widths of floating gates. A plurality of select gates extend in straight lines in the X direction. Between the upper- and lower-side select gates, two rows' worth of floating gates are arranged. The plurality of floating gates are placed in a staggered arrangement (in other words, in a zigzag pattern). That is, looking at one floating gate in a specific column and another floating gate in a column adjacent to that specific column, those floating gates deviate from each other in the Y direction.
US07742336B2 Trap-charge non-volatile switch connector for programmable logic
A nonvolatile trap charge storage cell selects a logic interconnect transistor uses in programmable logic applications, such as FPGA. The nonvolatile trap charge element is an insulator located under a control gate and above an oxide on the surface of a semiconductor substrate. The preferred embodiment is an integrated device comprising a word gate portion sandwiched between two nonvolatile trap charge storage portions, wherein the integrated device is connected between a high bias, a low bias and an output. The output is formed by a diffusion connecting to the channel directly under the word gate portion. The program state of the two storage portions determines whether the high bias or the low bias is coupled to a logic interconnect transistor connected to the output diffusion.
US07742331B2 Nonvolatile semiconductor memory device and data erase/write method thereof
A nonvolatile semiconductor memory device includes a memory cell array which includes a memory cell string including a plurality of memory cells each having a variable resistor element and a switching element having a current path with one end and the other end, between which the variable resistor element is connected, the plurality of memory cells having current paths thereof being connected in series, the memory cell array further including a first select element connected to one end of a current path of the memory cell string, and a second select element connected to the other end of the current path of the memory cell string, a bit line which is electrically connected to one end of a current path of the first select element, and a source line which is electrically connected to one end of a current path of the second select element.
US07742325B2 Swapped-body RAM architecture
A method for operating an SRAM cell comprises, during a read operation, forward biasing an N-well of a first and second pull-up transistor, and forward biasing a P-well of a first and second pull-down transistor and a first and second access transistor. The method further comprises, during a write operation, zero or reverse biasing an N-well of a first and second pull-up transistor, and forward biasing a P-well of a first and second pull-down transistor and a first and second access transistor. The method further comprises, during an idle state, zero biasing an N-well of a first and second pull-up transistor and zero biasing a P-well of a first and second pull-down transistor and a first and second access transistor. In addition, one or more rows or columns of memory cells may receive a bias voltage.
US07742324B2 Systems and devices including local data lines and methods of using, making, and operating the same
Disclosed are methods, systems and devices, including a device having a fin field-effect transistor with a first terminal, a second terminal, and two gates. In some embodiments, the device includes a local data line connected to the first terminal, at least a portion of a capacitor plate connected to the second terminal, and a global data line connected to the local data line by the capacitor plate.
US07742319B2 Transformer having resonant inductance
Provided is a transformer having resonant inductance, the transformer including a core that includes a first leg formed in one side thereof, a second leg which is formed in the other side thereof so as to be electromagnetically coupled to the first leg, and a third leg which is formed between the first and second legs so as to be electromagnetically coupled to the first and second legs; a primary winding that is wound around one side of the third leg; a secondary winding that is wound around the other side of the third leg so as to induce power through electromagnetic induction with the primary winding; and a resonant inductance winding that is wound around the outside of the core so as not to be magnetically induced by magnetic fluxes generated from the primary and secondary windings.
US07742317B2 Precharging boost converters in DC to DC power converters
A method and apparatus for precharging a DC to DC power converter system is provided. The system includes a boost circuit for generating a boosted output voltage from an input voltage. The input voltage is monitored. A predetermined current limit is compared to a current in the boost circuit, and the current limited is increased when the input voltage is greater than a predetermined value.
US07742307B2 High performance power device
A printed circuit board (PCB) assembly is provided. The PCB assembly is adapted for mounting at least one heat-generating electrical device and providing integrated heat dissipating capability to dissipate heat generated by the electrical device. The PCB assembly has a top surface and a bottom surface and comprises a signal carrying layer and an insert of pyrolytic graphite (PG). The signal carrying layer, disposed between the top surface and the bottom surface, comprises a material that is both thermally conductive and electrically conductive (such as at least one of aluminum, copper, and silver and alloys thereof) and has at least a portion lying in a first plane. The insert of PG is disposed within at least a portion of the first plane of the signal carrying layer, is in thermal contact with the signal carrying layer, and is constructed and arranged to have its greatest electrical conductivity in the first plane. Optionally, a conductive via can be formed in portions of the signal carrying layer not occupied by the insert of PG, where the conductive via operably couples a first side of the signal carrying layer to a second side of the signal carrying layer.
US07742305B2 Switching power supply unit
A switching power supply having at least one switch (S) controlled by a control circuit (AST), by means of which an input direct voltage (UV) is switched, whereby a thermal model (THM) is implemented in a control (STE), by means of which the temperature of at least one component (S; D3, D4, UET) can be calculated or estimated, and at least one current value that is load-dependent is made available as an electrical quantity to the thermal model, the control (STE) is directed at outputting at least one limiting signal (abs, ala) when a limiting value or a function of multiple limiting values depending on calculated or estimated temperature values is reached, which is usable in the sense of an action to reduce temperature, and which produces at least one limiting signal (abs) to the control circuit in the sense of a temperature reduction and thus a power reduction.
US07742304B2 Control device housing for an electronic brake
A control device housing for an electronic brake system includes a lid, a housing part closable by the lid, a component support member for electronic components, and a cooling element that is in direct or indirect thermal contact with at least part of the electronic components. The cooling element may be either a planar additional cooling plate or a lid that is at least partly made of metal. The cooling element and the component support member are spaced from each other, and thin heat conductive elements are arranged in the resulting intermediate space between the cooling element and the electronic components that are to be cooled or the component support member. The heat conductive elements are configured flexibly for tolerance compensation and inhere good heat conductivity in addition.
US07742302B2 Axial-flow fan unit and heat-emitting element cooling
An axial-flow fan unit that produces less noise is provided. Blades 19 are exposed from a venturi 29. The shape of each of the blades 19 is so defined that a space formed between at least an inner surface 28a of each of web leg sections 28A to 28C and an edge 19a of each of the blades 19 located in the radially outward direction of the blades 19 expands toward the ends of the web leg sections 28A to 28C (or web bodies 30A to 30C). With this arrangement, noise produced when the blades 19 rotate along the web leg sections 28A to 28C is reduced.
US07742300B2 In-vehicle apparatus
An audio-integrated apparatus has a body casing attached in an instrument panel of a vehicle. The body casing contains a media reader, a circuit board having a CPU, a CPU fan for cooling the CPU, and an exhaust fan. A media loading slot is in a front face of the body casing for inserting a media. A movable display section is in front of the body casing to be movable in a back-and-forth direction. A display movement mechanism can move the movable display section in the back-and-forth direction to thereby change an inclination against the front face of the body casing. A gear motor can detect a position of the movable display section. According to the detected position of the movable display section, rotational frequencies of the CPU fan and the exhaust fan are controlled.
US07742299B2 Piezo fans for cooling an electronic device
A cooling system including one or more piezo fans for an electronic assembly is disclosed. The electronic assembly may include heat-generating components coupled with a front side of a printed circuit board (PCB) and one or more piezo fans coupled with a back side of the PCB. One or more piezo fans may be capable of cooling the heat-generating components from the back side. The cooling system may further include a heat sink coupled with the back side of the PCB.
US07742298B2 Passively cooled computer
A passively cooled computer includes two or more components arranged in a housing frame 41, wherein each of these components is associated with a cooling body for dissipating waste heat of the component when the component is in operation. The cooling bodies each include a cooling surface, and these cooling surfaces are arranged to oppose one another with their cooling surfaces and thereby define an air channel leading vertically through the inside of the housing frame. The cooling bodies substantially separate the air channel from the remaining volume inside the housing frame.
US07742293B2 Adaptable digital music player cradle
A digital music player cradle for sequentially supporting multiple digital music players includes a base with a cavity in an upper surface. The cavity accepts an end portion of a largest digital music player of the multiple digital music players. A support wall extends from the upper surface of the base for supporting one of the digital music players at a time. A trough in the back of the base extends through the support wall and into the cavity. The trough is provided to route a data cable connected to the one of the multiple digital music players. A plurality of ledges is within the cavity. The ledges are of decreasing size towards the bottom of the cavity and each ledge is sized to hold a different one of the multiple digital music players.
US07742291B2 Computer enclosure adapted for mounting different types of transfer cards
A computer enclosure includes a chassis having a rear wall, a transfer card, a mounting bracket, and a PCI card. An expansion slot is defined in the rear wall of the chassis. A detachable shielding cover is formed on the rear wall adjacent to the expansion slot. The transfer card is secured in the chassis. The transfer card has a circuit board perpendicular to the rear wall. The mounting bracket is secured to the rear wall of the chassis and has a width substantially equal to a length of the expansion slot. The PCI card is secured to the mounting bracket and perpendicularly attached to the transfer card. A receiving space corresponding to the shielding cover is defined shielding cover and the PCI card, for receiving a connector between the mounting bracket and the circuit board of the transfer card.
US07742288B2 Display device
A display devise includes a display panel and a chassis base supporting the display panel. At least one reinforcing member is attached to the chassis base to add rigidity to the chassis base and at least one stand is attached to the chassis base to allow the chassis base to stand upright. A guide stand couples the reinforcing member to the stand, the guide stand comprising a body and a reinforcing plate substantially extending at an angle from the body.
US07742287B2 Apparatus for display movement of a laptop computer
Disclosed is a laptop computer including a body and a display articulably connected to the body. The laptop computer includes at least one drive unit capable of moving the display relative to the body.
US07742285B2 Folding portable terminal
A folding portable terminal which can be changed into a desired shape depending on applications of functions such as a telephone, a digital camera, and the like. A folding portable terminal (1) comprises a case (10) with a display section (11) and a case (20) with an operating section (21), and the cases are foldably linked through a hinge mechanism. The hinge mechanism comprises a first hinge section (12) formed by providing a first rotation axis at substantially the center of the case (10) that can be rotated about the first rotation axis in the folding or opening direction relative to the case (20); a second hinge section (24) formed by providing a second rotation axis at substantially the upper end part of the case (20) so as to be parallel to the first rotation axis, the case (20) being rotated in the folding or opening direction relative to the case (10); and means (13a) for linking both ends of the first rotation axis and both ends of the second rotation axis. The hinge mechanism enables the display section (11) and the operating section (21) to be folded without being faced each other, and a user can operate the operating section (21) or view the display section (11) in the folded state.
US07742280B2 Coin-shaped storage cell
A coin-shaped storage cell (1) has a pair of polarizable electrodes (17, 18), an insulating separator (21) interposed between the polarizable electrodes, an electrolytic solution (22) impregnated in the polarizable electrodes (17, 18) and the separator (21), a metal case (11) for housing the polarizable electrodes (17, 18), an insulating ring packing (15) arranged in the metal case, and a top lid (13) which is caulked integrally with the metal case (11) via the ring packing (15). The inner bottom surface of the metal case (11) is provided with recessed and projected portions.
US07742275B2 MEMS capacitor with conductively tethered moveable capacitor plate
A capacitive device including at least one actuator structure formed on a substrate is provided. The capacitive device further includes a moveable structure formed on the substrate and mechanically coupled to the at least one actuator structure. The moveable structure includes a moveable capacitive plate and a bridge, formed substantially planar to the moveable capacitive plate. The bridge is used to mechanically and electrically couple the moveable capacitive plate to a signal line formed on the substrate such that the moveable capacitive plate moves up or down based on a force generated by the at least one actuator structure.
US07742269B2 Circuit breaker
The circuit breaker according to the present invention has first and second terminals having favorable electric conductivity and joined to each other with solder; and a heater whose circumference is insulated installed for melting the solder and supplied with electric power from the current path separate from current paths passing through the first and second terminals; wherein the first and second terminals are separated by a spring force and insulated when the solder is melted.
US07742268B2 Electric vehicle control apparatus
Control apparatus of an electric vehicle controls a power supply system of the electric vehicle equipped with a first direct current power supply apparatus for supplying direct current power to a traction inverter, and a second direct current power supply apparatus connected in parallel with the first direct current power supply apparatus via a DC/DC converter. This control apparatus is also provided with a relay for cutting off supply of power from the first direct current power supply apparatus to the traction inverter in synchronization with the operation of the self-protection circuit in the event that the self-protection circuit of the traction inverter operates as a result of overcurrents supplied by the first direct current power supply apparatus.
US07742266B2 ESD/EOS protection circuit and related integrated circuit
An ESD/EOS protection circuit includes a first protection circuit and a second protection circuit. The first protection circuit is coupled between an I/O pad and a power pad and includes a first P-type transistor. The P-type transistor includes a control node, a floating gate, a first connection node, and a second connection node, wherein the first connection node of the first P-type transistor is coupled to the power pad and the second connection node of the first P-type transistor is coupled to the I/O pad. The second protection circuit is coupled between the I/O pad and a ground pad.
US07742261B2 Tunneling magneto-resistive spin valve sensor with novel composite free layer
The conventional free layer in a TMR read head has been replaced by a composite of two or more magnetic layers, one of which is iron rich The result is an improved device that has a higher MR ratio than prior art devices, while still maintaining free layer softness and acceptable magnetostriction. A process for manufacturing the device is also described.
US07742253B2 Storage device and control device
A storage device and a control device include a first DSP, a second DSP, and a Servo MPU for controlling a position of a head with respect to a storage medium. The Servo MPU instructs the first DSP and the second DSP. The first DSP carries out calculation of at least any of a demodulation calculation that is a calculation relating to demodulation of servo information and a digital filter calculation based on the instruction from the Servo MPU. The first DSP carries out a correction calculation that is a calculation relating to correction of the position based on the instruction from the Servo MPU. The Servo MPU carries out control of the position based on a result of the calculation carried out by the first DSP and the second DSP.
US07742251B2 Timing insensitive method and apparatus for spectral analysis in a disk recording system
A hard disk drive that includes a disk that contains at least one signal and a head that is coupled to the disk. The disk drive also contains a circuit that includes a data sampler that generates a plurality of data samples from the signal, a harmonic sensor coupled to the data sampler and a spectral power accumulator coupled to the harmonic sensor. The harmonic sensor accumulates the data samples. The circuit includes a window generator that determines a window length of the data samples accumulated by the harmonic sensor. The spectral power accumulator accumulates the windows of sample data accumulated by the harmonic sensor. The sample data accumulated by the spectral power accumulator can be accessed by a processor that performs a spectral analysis of the data.
US07742249B2 Color wheel
A color wheel includes a fixing base, a ring filter, a washer, and a fixing ring. The fixing base has a protrusion portion and a supporting portion. The ring filter is fit on the protrusion portion. An inner margin of the ring filter leans on the supporting portion. The washer is connected to the protrusion portion. The ring filter is disposed between the washer and the supporting portion. The washer and the supporting portion clip the inner margin of the ring filter. The fixing ring has an annular supporting portion, a side wall surrounding the annular supporting portion, and fixing blocks connected to the side wall and dotted on an outer margin of the ring filter. The outer margin of the ring filter leans on the annular supporting portion. The fixing blocks, the side wall, and the annular supporting portion clip the outer margin of the ring filter.
US07742246B2 Lens barrel and camera with lens barrel
A lens barrel includes: a first optical element group that has an optical element disposed on a first optical axis; a second optical element group that has an optical element disposed on a second optical axis extending along a direction different from a direction along which the first optical axis extends; and a bending portion disposed between the first optical element group and the second optical element group, that bends image light having passed through the first optical element. At least part of the first optical element group can be housed inside a first space formed as the bending portion moves further away from the first optical axis.
US07742244B2 Cylindrical model eye, cylindrical test device and the manufacturing method thereof
A cylindrical model eye comprises a plano-cylindrical portion having a plano surface and a first cylindrical surface opposite to the plano surface, a sphero-cylindrical portion having a convex spherical surface and a second cylindrical surface opposite to the convex spherical surface. The second cylindrical surface mates with the first cylindrical surface, and the first cylindrical surface has substantially the same radius curvature radius as the second cylindrical surface.
US07742237B2 Lens barrier mechanism of a lens barrel
A lens barrier mechanism of a lens barrel includes a cam ring including a forward-projecting portion; a linearly movable barrel provided outside the cam ring and moves linearly by rotating the cam ring; a barrier blade provided in the linearly movable barrel and movable in an operating plane orthogonal to the optical axis to open and close an opening at the front of the linearly movable barrel; and a barrier drive mechanism which opens and shuts the barrier blade when the lens barrel moves from/to the accommodated state to/from the ready-to-photograph state, respectively. A range of opening/shutting operation of the barrier blade extends radially outside an inner periphery of the forward-projecting portion. In the accommodated state, the forward-projecting portion intersects the operating plane of the barrier blade but is positioned outside the range of opening/shutting operation of the barrier blade.
US07742234B2 Composite optical dividing device
A composite optical-dividing component receives a light beam. There are mixed-bands in the light beam. The composite optical-dividing component includes a first optical-patch and a second optical-patch. The first optical-patch has multiple micro-structural lenses in an identical shape. Each micro-structural lens receives the light beam and generates a deflecting light in some degrees of condense. The second optical patch has multiple polygonal structures. Some polygonal structures are periodic and provide the function of deflection in order to receive the deflecting light and then separate multiple bands from the beam. In accordance with wavelengths in multiple bands, the bands are emitted to a target area (RGB) in a plane, respectively. Another part of the polygonal structures has the capability of light refraction, which receives the deflecting light and deflects and the rest of the bands in the beam. And it is emitted to a target area (W) in a plane.
US07742232B2 Three-dimensional imaging system
A new three-dimensional imaging system has been needed to overcome the problems of the prior arts using conventional variable focal length lenses, which have slow response time, small focal length variation, and low focusing efficiency, and require a complex mechanism to control it. The three-dimensional imaging system of the present invention uses the variable focal length micromirror array lens. Since the micromirror array lens has many advantages such as very fast response time, large focal length variation, high optical focusing efficiency, large size aperture, low cost, simple mechanism, and so on, the three-dimensional imaging system can get a real-time three-dimensional image with large depth range and high depth resolution.
US07742227B2 Microscope apparatus
Providing a microscope apparatus including an optical mount member capable of supporting various optical devices even without a large amount of space. A base body 10 arranged on a mount surface 9a of a vibration isolation table 9 is provided substantially perpendicularly to the mount surface 9a. A plurality of rails 32 through 36 are provided on the base body 31 vertically to the mount surface 9a so as to provide a plurality of extension optical devices such as a Galvanic scanner 64 to be combined with the microscope main body 10.
US07742224B1 Optical amplification in the 850 nm window
Systems and methods are disclosed for amplifying optical signals in the 850 nm window. In one embodiment, an amplifier system includes a span of Thulium-doped fiber (TDF) and two pump systems. The TDF span receives and transports optical signals in the 850 nm window. A first pump system pumps the TDF span at a wavelength in the range of 1390 nm to 1430 nm, and a second pump system pumps the TDF span at a wavelength in the range of 670 nm to 720 nm. The pumping generates gain in the optical signals in the 850 nm window. In another embodiment, the amplifier system includes a single pump system. The pump system pumps the TDF span at a wavelength in the range of 1390 nm to 1430 nm to generate gain in the 850 nm window.
US07742213B2 Adaptive-scanning optical microscope
An adaptive scanning optical microscope has a scanner lens assembly for acquiring images from different parts of an object plane and for forming a preferably curved image field having at least some aberration which varies as a function of the part of the object plane from which the image is acquired. A steering mirror selects the field of view and steers light from the object and along a light path from the object plane to a final image plane. An adaptive optics element receives the steered light from the object and compensates for the field position dependent optical aberrations and additional optics are along at least part of the light path for conditioning and focusing the light as it moves from the steering mirror, past the adaptive optics element and to the final image plane.
US07742211B2 Sensing and correcting angular orientation of holographic media in a holographic memory system by partial reflection, the system including a galvano mirror
A holographic memory system is disclosed. The holographic memory system comprises: a light source configured to generate a light beam; a photosensitive holographic storage medium configured to at least partially reflect the light beam; and an alignment module configured to determine an angular orientation of the storage medium based on the reflected light beam.
US07742210B2 Replication of data to holographic medium using holographic master media
An apparatus for replicating holographically recorded data, comprising a holographic master media having holographically recorded data thereon; a holographic copy media; a light source for generating a master reference beam and a copy reference beam, coherent with the first object beam, the first master reference beam incident on the holographic master media, the holographic master media diffracting the master reference beam to provide a first object beam; the copy reference beam incident on the holographic copy media; and a first optical relay system, disposed between the holographic master media and the holographic copy media, for relaying the first object beam from the holographic master media to the holographic copy media, the holographic copy media recording an interference pattern between the first object beam and the copy reference beam, thereby replicating at least a portion of holographically recorded data.
US07742209B2 Monocular holographic data storage system architecture
A monocular holographic storage device or system to provide for compact recording and/or reading of data pages in a holographic storage medium. Also provided are methods for carrying out such data storage and/or data recovery using a monocular holographic storage device or system. Further provided are articles including holographic storage media for recording or for reading recorded data using such devices or systems.
US07742208B2 Holographic display and methods of manufacture and use
A rewriteable diffraction grating contains first nanoparticles and second nanoparticles. Each first nanoparticle is configured and arranged to generate one or more charge carriers in response to a write beam. Each second nanoparticle is configured and arranged to substantially alter its response to light from a read beam upon receiving one or more charge carriers from the first nanoparticles. The second nanoparticles are disposed in proximity to the first nanoparticles to permit charge carriers generated by the first nanoparticles to interact with the second nanoparticles.
US07742206B2 Methods and systems for color gamut adjustment
Embodiments of the present invention comprise methods and systems for color gamut mapping. Some embodiments comprise mapping by projecting a first gamut color point to an intermediate curvilinear construct and then projecting from the curvilinear construct to a second color gamut point. In some embodiments, gamut points are separated into regions with differing projection rules and curvilinear constructs.
US07742205B2 Perceptual color matching method between two different polychromatic displays
The invention relates to a color matching method for transforming a color representation of a first set of color primaries with a plurality of first signals to a second set of color primaries with a plurality of second signals in a first domain. The color matching method of the invention is to consider the characteristics of human visual perception. Since human is more sensitive to the luminous intensity than chrominance, the color matching method of the invention is considered to match the luminous intensity. The color matching method of the invention can minimize the intensity difference by utilizing the optimality of resource distribution. An additional step of smoothing the intensity difference among color primaries at the level of color primaries is appended. It enhances the visual quality especially for the images with a gradual change in numerous levels of color. Besides, when the color is outside the gamut, we keep the information of luminance by adding extra white. According to the invention, the color matching method of handling colors outside gamut can provide a higher contrast which is especially good for displaying a color change with numerous levels, such as sunrise or sunset scenes. The color matching method further considers color interactions of each color primary regarding the configuration of surrounding color primaries. With the consideration of exploiting the perceived luminous intensity instead of physical luminous intensity, a superior color matching algorithm can be made.
US07742204B2 Methods and apparatus for determining a total colorant limit for digital imaging devices
Methods and apparatus are provided for calibrating a digital color imaging device to a printing press by determining a total colorant limit, per-channel colorant limits, and channel linearization tables using colorimetric and/or spectrophotometric techniques. In addition, for digital color imaging devices that use multi-hue colorants, methods and apparatus are provided for determining distribution functions for the multi-hue colorants as a function of input values.
US07742199B2 System and method for compressing and rotating image data
A system and method for reproducing original documents includes scanning an original document to generate image data corresponding to the scanned original document, dividing the image data into a plurality of image data blocks, and compressing the plurality of image data blocks into respective compressed image data blocks, such that data of each compressed image data block is independent of data of each other compressed image data block. Each compressed image data block is stored in a first memory with a respective predetermined beginning address. The first compressed image data block, having a first predetermined beginning address, is accessed from the first memory and decompressed into a first decompressed image data block. At least one image processing function is performed on the decompressed first image data block.
US07742195B2 Image processing device, image processing method, and program product for the same
An image printing process of the invention first specifies a pixel group tone value of each pixel group consisting of a preset number of multiple pixels and refers to one of correlation maps selected for the pixel group to convert the specified pixel group tone value to a multivalue code. Each of the correlation maps sets multivalue codes in correlation to pixel group tone values. The multivalue codes of all pixel groups constituting an image are output as control data to an image output device. The image output device determines the dot on-off state in respective pixels of each pixel group according to the received control data and actually creates dots on an output medium to complete an output image. Each correlation map referred to for the multivalue coding has a slightly lower tone resolution in a higher tone value area than in a lower tone value area. This arrangement desirably reduces the data volume of the control data, while preventing deterioration of the picture quality. The technique of the invention enables quick output of the control data and accordingly ensures high-speed output of a high-quality image by this simple procedure.
US07742192B2 Image processing method and system
In bitmapping an input rendering command to a bitmap, a logic operation designated by the rendering command is analyzed in accordance with the source and pattern as the logic operation target and a logic operation code. On the basis of the analysis result, an additional information operation corresponding to each pixel of the bitmap is created. On the basis of the additional information operation, additional information of each pixel is created. When image processing based on the additional information is executed for the bitmap, high-quality output image data can be created.
US07742191B2 Image input and output apparatus selecting processing according to colored pattern
An image input and output apparatus such as a facsimile machine or multifunction printer recognizes a colored image pattern on an input document and processes the document according to the color of the image pattern. Information that can be encoded by the color of the image pattern includes an electronic mail address, facsimile number, or file server address to which an image of the document is to be sent, a folder in which the image is to be stored, or a number of copies of the image to be printed. The color recognition capability of the apparatus can thereby be used effectively even in the processing of basically black and white documents. Information may also be encoded by the shape of the colored image pattern.
US07742185B2 Print sequence scheduling for reliability
A method for scheduling print jobs for a plurality of printers (40, 42, 44, 46, 48, 50) includes, for each of a plurality of print jobs, determining a number of pages of a first print modality (such as black only printing) and of a second print modality (such as color printing) for the print job. A file header is determined, based on the number of pages of the first and second print modalities in the print job. The file header is associated with the print job and the print job transmitted, along with the file header, to a print job scheduler (10). The scheduler schedules a sequence for printing the plurality of print jobs by the plurality of printers, based on minimizing, for at least one of the plurality of printers, a number of periods of time during the sequence of printing where the at least one printer is in a non-operational mode; and/or maximizing continuous run time for at least one of the printers.
US07742183B2 Method and apparatus for format conversion of printing data
Disclosed herein is a printing control apparatus for enabling an image forming apparatus, having a network connection function and printing data interpretation function, to print printing data written in a format that cannot be interpreted by the interpretation function of the image forming apparatus. The printing control apparatus, connected between a network and an image forming apparatus having a network interface, determines whether or not a data packet received from the network is printing data (S303), and when the received data packet is printing data, encodes the received data packet in a format interpretable by the image forming apparatus (S305) to be outputted to the image forming apparatus.
US07742181B2 Image forming apparatus and method for controlling image forming apparatus
The measured density value of a printer at the time is compared with the density measured value at the time of adjusting a copy-forgery-inhibited pattern density, and the fluctuation amount of the output density of the printer from the copy-forgery-inhibited pattern density adjustment time until the time is calculated. It is judged whether the calculated density fluctuation amount exceeds a density region (the threshold of density fluctuation amount) which becomes effective as the copy-forgery-inhibited pattern image. When the density fluctuation amount exceeds the threshold of the density fluctuation amount, the user is notified that the density of the copy-forgery-inhibited pattern image may have inappropriate density as the copy-forgery-inhibited pattern image by the density fluctuation. Thereby, the user can check whether the present copy-forgery-inhibited pattern image is appropriate.
US07742178B2 Method, device system and computer program system for processing document data
In a method and system for processing document data in a document processing system that comprises at least a document generation computer, a document processing computer, an electronic document output system, and a monitoring computer, document data are generated on the document generation computer. The document data are transmitted from the document generation computer to a processing computer. To optimize control of a subsequent data output, control data are added to the transmitted document data in the processing computer with a processing module, and the control data are additionally stored in a control data buffer file. The processed data are forwarded to an output system.
US07742177B2 Noise-reduction metrology models
The invention can provide apparatus and methods for processing wafers using Noise-Reduction (N-R) metrology models that can be used in Double-Patterning (D-P) processing sequences, Double-Exposure (D-E) processing sequences, or other processing sequences.
US07742176B2 Method and system for determining the spatial position of a hand-held measuring appliance
The aim of the invention is to determine the actual position and/or actual orientation of a measuring appliance (4b). To this end, at least two reference points (2b′) lying in a spatial segment (5′) scanned by a laser beam are detected and measured in terms of the distance thereinbetween and the inclination angle thereof. The actual position of the measuring appliance (4b) can be deduced from the known positions of said reference points (2b′) arranged in a detectable manner and the associated distances and inclination angle thereof. The detection, monitoring and measuring of the reference points is carried out by the measuring appliance (4b) in an automated manner, the measuring appliance (4b) and specifically embodied elements associated with the reference points (2b′) forming a local positioning and/or orientation measuring system. The inventive method and corresponding devices enable measurements to be carried out in a problem-free and automated manner, even in areas that cannot be accessed by other measuring systems.
US07742174B2 Methods, systems and computer program products for removing undesired artifacts in fourier domain optical coherence tomography (FDOCT) systems using continuous phase modulation and related phase modulators
Methods, fourier domain optical coherence tomography (FDOCT) interferometers and computer program products are provided for removing undesired artifacts in FDOCT systems using continuous phase modulation. A variable phase delay is introduced between a reference arm and a sample arm of an FDOCT interferometer using continuous phase modulation. Two or more spectral interferograms having different phase delay integration times are generated. The spectral interferograms are combined using signal processing to remove the undesired artifacts. Systems and methods for switching between stepped and continuous phase shifting Fourier domain optical coherence tomography (FDOCT) and polarization-sensitive optical coherence tomography (PSOCT) are also provided herein.
US07742171B2 Reflectivity/emissivity measurement probe insensitive to variations in probe-to-target distance
Apparatuses and methods for accurately measuring the reflectivity of a target surface, under conditions where the distance between a measuring probe and the target surface is not fixed. At least two measurements of the target reflectivity are taken under different conditions, and then these two or more measurements are combined in order to calculate the target reflectivity in a way which is independent of the probe-to-target distance. In particular, the different conditions are such that each measurement samples radiation reflected from the target surface at a different distribution of angles. The apparatus can also be used to accurately measure the distance between the probe measurement head and a target surface.
US07742167B2 Optical emission device with boost device
A device for optical emission spectroscopy comprising a chamber comprising an atomization source, at least one boost device configured with a radio frequency source to provide radio frequency energy to the chamber, and an optical detector configured to detect optical emission of species in the chamber is provided. In certain examples, a boost device may be used with a flame or plasma to provide additional energy to a flame or plasma to enhance desolvation, atomization, and/or ionization. In other examples, the boost device may be configured to provide additional energy for excitation of species.
US07742164B1 Luminescence reference standards
The present teachings provide for systems, and components thereof, for detecting and/or analyzing light. These systems can include, among others, optical reference standards utilizing luminophores, such as nanocrystals, for calibrating, validating, and/or monitoring light-detection systems, before, during, and/or after sample analysis.
US07742161B2 Process and device for monitoring the illumination of lamp bulbs
A device for measuring the illumination of a light bulb wherein it has a sensor for measuring the illumination of the bulb and a device for measurement and comparison of the value of illumination of the bulb to at least one threshold.
US07742159B2 Apparatus for checking concentricity between lens barrel and barrel holder
An apparatus for checking concentricity between a barrel holder and a lens barrel rotatably engaging with the barrel holder is provided. The lens barrel includes at least one lens coaxially received therein. The apparatus includes a barrel holder retaining member, a rotating member, a driving unit, a light source, and an image sensor. The barrel holder retaining member is used for fixedly retaining the barrel holder in position. The rotating member is structured for meshing with the lens barrel. The driving unit is used for driving the rotating member to rotate, thereby rotates the lens barrel. The light source is configured for emitting light toward a first end of the lens barrel. The image sensor is arranged to face toward an opposite second end of the lens barrel. The image sensor is configured for sensing the light emitted from the light source.
US07742156B2 Method of testing optical materials by irradiating with high energy density radiation, optical materials selected by said method and uses thereof
An optical material for lithographic applications is selected from crystal materials by a testing method. The crystal materials are preferably quartz and/or alkali or alkaline earth halides, especially fluorides, or mixed crystals. The testing method includes three tests to measure irreversible radiation damage: 1) the optical material is irradiated with ultraviolet radiation at 193 nm and the non-intrinsic fluorescence intensity at 740 nm is measured; 2) the optical material is irradiated with high energy density laser light and a change in respective absorptions before and after irradiation at 385 nm is measured; and 3) the optical material is irradiated with an X-ray or radioactive source to form all possible color centers and a difference of respective surface integrals of corresponding absorption spectra in ultraviolet spectral and/or visible spectral regions is measured before and after irradiation.
US07742150B2 Manufacturing method of semiconductor device
A manufacturing method of a semiconductor device including a liquid immersion movement exposure of interposing a liquid between an exposure target substrate and a projection optical system of an exposure apparatus, and carrying out an exposure processing with respect to a plurality of exposure regions set on a surface of the substrate while relatively moving the substrate with respect to the system, a first liquid immersion movement of relatively moving the substrate with respect to the system while interposing the liquid between the substrate and the system, in adjacent exposure regions of said each exposure region, and a second liquid immersion movement of relatively moving the substrate with respect to the system at a speed lower than a movement speed in the first movement, while interposing the liquid between the substrate and the system, in a distance that is longer than a movement distance in the first movement.
US07742144B2 Apparatus for rubbing alignment layer
An apparatus for rubbing an alignment layer by which a defective rubbing due to a load can be prevented by installing a head at an upper portion of a frame, the apparatus including a frame, a rubbing table to which a substrate having an alignment layer is loaded, a rubbing roll disposed at an upper portion of the rubbing table inside the frame, and a head disposed at an upper portion of the frame that supports the rubbing roll.
US07742141B2 Flat-panel display devices including markings and manufacturing method therefor
A flat-panel display device comprises: a display panel having a pixel area for matrix imaging; a plurality of driver IC chips mounted in a row on a fringe part of the display panel; extension wirings extended out from wirings within the pixel area and electrically connected to terminals of the driver IC chips; and a marking visible with naked eye, which is disposed between a group of the extension wirings connected to one of the driver IC chips and another group of the extension wirings connected to other one of the driver IC chips, and which indicates boundary between said one group and said another group of the extension wirings.
US07742139B2 Array substrate and liquid crystal display panel
Structures of array substrate and panel of LCD are provided. In the structures, a single pixel is divided into two sub-pixels. By altering thickness of passivation layer, dielectric layer or organic layer in the two sub-pixels, the total capacitances of the two sub-pixels are different. Therefore, the goal of increasing view angles of displays is achieved.
US07742134B2 Transflective color-balanced liquid crystal display
In a transflective liquid crystal display comprising a plurality of pixels, each is divided into three color sub-pixels in red, green and blue. Each of the color sub-pixels is further divided into a main sub-pixel and an auxiliary sub-pixel. The main sub-pixel comprises a transflective area and a reflective area. The auxiliary sub-pixel can be entirely transmissive, reflective or partially transmissive and reflective. The liquid crystal display further comprises a plurality of first gate lines for electrically controlling the main sub-pixels and a plurality of second gate lines for electrically controlling the auxiliary sub-pixels. The auxiliary sub-pixels may have a color filter for partially filtering light encountering the auxiliary sub-pixels according to the color of the color sub-pixels.
US07742133B2 Transflective liquid crystal display device having high aperture ratio and fabrication method thereof
A transflective liquid crystal display device includes: first and second substrates facing and spaced apart from each other; a gate line on an inner surface of the first substrate; a data line crossing the gate line to define a pixel region including a reflective portion and a transmissive portion, wherein the transmissive portion has a polygonal shape inscribed in a rectangle, and a circumference of the transmissive portion is less than the circumference of the rectangle; a thin film transistor connected to the gate line and the data line; a passivation layer on the thin film transistor, the passivation layer having a opening corresponding to the transmissive portion; a reflective layer corresponding to the reflective portion on the passivation layer; a transparent electrode corresponding to the pixel region over the reflective layer; a color filter layer on an inner surface of the second substrate; a common electrode on the color filter layer; and a liquid crystal layer between the common electrode and the transparent electrode.
US07742131B2 Touch panel, color filter substrate and fabricating method thereof
A method for fabricating a color filter substrate including the following procedures is provided. First, a substrate is provided and a color filter layer is formed thereon. Next, a plurality of sensing spacers is formed on a part of the color filter layer. Then, a planarization layer is formed to cover the color filter layer and expose the sensing spacers. Next, an electrode layer is formed to cover the planarization layer and the sensing spacers. After that, a plurality of main spacers is formed on a part of the electrode layer excluding disposing regions of the sensing spacers, wherein a step height is formed between the main spacers and the electrode layer above sensing spacers.
US07742129B2 Color filter substrate and manufacturing method thereof and liquid crystal display panel
A manufacturing method of a color filter substrate is provided. In the method, a substrate is provided. A first color layer, a second color layer, and a third color layer are then sequentially formed on the substrate. At least any two of the first color layer, the second color layer, and the third color layer are partially overlapped to form a number of supporters. Next, a common electrode layer is formed on the substrate to cover the first color layer, the second color layer, the third color layer, and the supporters. A light-shielding layer is then formed on the common electrode layer, and a portion of the light-shielding layer is disposed over the supporters. Based on the manufacturing method of the color filter substrate, fewer masks are required.
US07742123B2 Color-filterless LCD
A color-filterless liquid crystal display (LCD) having a large screen. The color-filterless LCD further including a light guide plate uniformly emitting light, which is incident from both lateral sides, through a top surface thereof; first and second light sources disposed on both the lateral sides of the light guide plate; a color separation sheet that is disposed on the top surface of the light guide plate and is adapted to separate incident light into red, green, and blue light beams and emit them at different exit angles; a liquid crystal panel having a liquid crystal layer that is divided into a plurality of pixels; and an optical element sheet that is disposed on a bottom surface of the liquid crystal panel and includes a plurality of optical elements focusing the red, green, and blue light beams separated by the color separation sheet on three different pixels that are continuously arranged, where the first and second light sources are turned on alternately.
US07742122B2 Blue color composition for color filter, color filter, and color image display device
The invention relates to a blue composition for a color filter to realize an image having a high color purity corresponding to the emission wavelength of an improved LED backlight, a color filter and a color image display device.
US07742120B2 Image display device
An image display comprises: a display device having an image output surface at which an image is displayed as a spaced array of pixel elements; an image guide (20) coupled to the image output surface of the display device and comprising a plurality of light transmission guides (80) each having an input end and an output end, the input ends of the light transmission guides being arranged relative to one another so that groups of one or more light transmission guides receive light from respective groups of one or for a cluster comprising at least a subset of the light transmission guides (80): at the outer periphery of the cluster, the input ends of the light transmission guides are constrained against expansion by a frame formed of a material having thermal expansion properties which are substantially similar to the thermal expansion properties of the image output surface.
US07742117B2 Liquid crystal display panel
A liquid crystal display (LCD) panel includes: a first base substrate; a plurality of gate lines and a plurality of data lines disposed on the first base substrate and crossing each other; a pixel electrode pattern disposed on the first base substrate; a storage pattern disposed on the first base substrate, the storage pattern being positioned between consecutive gate lines and substantially in parallel with the gate lines; a second base substrate; a common electrode disposed on the second base substrate and alternately positioned with the pixel electrode; and a liquid crystal layer disposed between the first and second base substrates.
US07742112B2 Memory device, data recording method, and IC tag
A memory device includes first electrodes, second electrodes, third electrodes, heaters, and memory cells between the first electrodes and the heaters. Each third electrode is provided on the heaters, and each second electrode is provided at a side portion of the heaters. Each memory cell contains an electroconductive liquid crystal compound having a long linear conjugate structure and exhibiting a smectic phase as a liquid crystal phase. Information can be written in the memory cells by selectively heating the heaters to cause the corresponding memory cells to have both electroconductivity and optical anisotropy.
US07742110B1 Comb filter system and method
I describe and claim a temporal comb filtering system and method. The temporal comb filter system includes a comb filter to temporally process separated luminance and chrominance components from an image field responsive to image data from at least one other image field and a panel to display the processed components. The comb filter includes a cross-chroma detector to detect luminance information within chrominance data from a first image field responsive to chrominance data from at least one other image field and a cross-luma detector to detect chrominance information within the luminance data from the first image field responsive to the luminance data from at least one other image field.
US07742108B2 Method and system for real time motion picture segmentation and superposition
Methods and systems for separating a picture part of interest from an arbitrary background in real time videos are presented. The background may be a moving or still frame. The picture part of interest and background frames may be in or out of focus. One separation approach employs the difference between luminance and chrominance values of the input and background frames where changes in luminance from frame to frame are compensated for. In another approach, picture part of interest separation is based solely on spatial resolution differences between the background and the picture part of interest frames. The present invention also teaches a method and system for parameter matching of the picture part of interest and the basic picture into which the picture part of interest is embedded. The invention further teaches a method and system for embedding a separated picture part of interest into a basic picture containing text.
US07742106B2 Method and apparatus for setting language in television receiver
A method and apparatus for setting a language in a television receiver enable one language setting operation performed in a first menu, corresponding to one of a plurality of language-specific functions, to automatically set a preferred language for one or more other functions. The method includes steps of setting a language in a first menu according to a user selection, the first menu corresponding to one function of a plurality of language-specific functions; and automatically setting a language of at least one other function of the plurality of language-specific functions to the language set according to the user selection, the language of the at least one other function being set interoperably with the first menu. Thus, if at least one language is selected in the first menu, a language of at least one other function is set to the first-menu language. Upon powering a television receiver receiving a transport stream from a broadcasting station, a tuner tunes a broadcast signal of a corresponding channel, whereupon additional information is parsed from the tuned transport stream to extract information of every language being provided. The extracted information is then stored in memory so that, according to a user selection of a first menu for performing a language setting operation, the stored language information can be simultaneously output as an audio signal and displayed on a screen to enable user recognition.
US07742103B1 Motion object video on film detection and adaptive de-interlace method based on fuzzy logic
A method and system for performing fuzzy logic based de-interlacing on film source fields that might be mixed with video on film. An embodiment of the invention comprises an adaptive de-interlacer by weighing between merge operation and interpolation operation in the case of occurring video on film motion object. A weighing factor is generated from video on film pattern based on fuzzy logic inference rules. This weighing factor specifies the weighting between merging and interpolating in assigning the pixel values of the progressive display output.
US07742095B2 Information processing apparatus, method and storage medium
Provided is a display technique whereby it is possible for an area, which an operator desires to zoom and display, to be zoomed and displayed in conformity with the size of the screen through a simple operation. This is achieved by an information processing apparatus capable of displaying any desired area, which has been designated in an image (801) displayed on a screen, upon enlarging the size of the area, the apparatus including: partitioning unit (step S1303) configured to partition the image into a plurality of areas based upon a given command; identifying unit (step S1304) configured to identify each area of the partitioned image; storage control unit (step S1304) configured to store results of the identification in storage means in association with the information concerning user operation; and pointer moving unit (step S1311) configured to successively move a pointer that is for designating each area. An area (any of blocks 0 to 6), which has been designated by the pointer, is enlarged and displayed in conformity with the size of the screen (step S1310).
US07742091B2 Flexy-power amplifier: a new amplifier with built-in power management
A voltage amplifier is provided. The voltage amplifier includes an amplifier stage to amplify an input signal. A bias current generator supplies a bias current to the amplifier stage. The bias current generator is controllable in response to a frame rate signal that is representative of a video frame rate. A compensation network stabilizes a loop response of the voltage amplifier. The compensation network is controllable in response to the frame rate signal.
US07742090B2 Flexible segmented image sensor
A method of making a curved sensor is described. The method involves projecting portions of a curved three dimensional structure such as a hemisphere onto a two dimensional substrate in an outline pattern. The outline pattern typically serves as a perimeter of a sensor. After forming a sensor in the shape of the outline pattern, the two dimensional substrate is flexed to form a three dimensional sensor structure.
US07742087B2 Image pickup device
A plurality of imaging regions (104, 105 and 106) capture a plurality of images, respectively, via a plurality of imaging optical systems (101, 102 and 103) corresponding one to one to the plurality of imaging regions. An image combining means (115) eliminates a difference among the plurality of images and combines the plurality of images into a single image. Thereby, it is possible to obtain a combined image of high quality.
US07742077B2 Image stabilization system and method for a video camera
A video image stabilization system includes a camera having an image capturing device capturing a video image. The camera has a selectively adjustable field of view. A processing device is operably coupled to the camera. The processing device receives signals indicative of the field of view of the camera and images captured by the camera. The processing device automatically tracks movements of at least one object in the images. The processing device determines a stabilizing adjustment for the video image as a function of an unintended change in the field of view of the camera during a time interval between capture of a first image and capture of a second image. The determining is based upon the signals indicative of the field of view and an analysis of the first and second images.
US07742073B1 Method and apparatus for tracking an object of interest using a camera associated with a hand-held processing device
A hand-held processing device, such as a mobile telephone, a personal digital assistant (PDA), or a portable computer, includes a physically or electronically adjustable camera and is operative to track a specified object of interest. Relative movement between the hand-held device and the object of interest is detected using an orientation determination device such as a gyroscope, an image-based tracking operation, or a hybrid combination of orientation determination and image-based tracking. A setting of the camera is then adjusted so as to maintain a desired framing of the object of interest within an image generated by the camera.
US07742071B2 Methods and apparatus for inspecting centerplane connectors
The present invention relates to apparatus and methods that reliably detect defects on centerplane connectors. The apparatus and methods include a visual inspection system. The visual inspection system includes a control box, an inspection cart, a camera jig, and a vision system. The vision system has a light emitting diode (LED) lighting system that provides the necessary lighting for the camera on the vision system. The vision system is mounted to the camera jig via a spring-loaded mechanism. The camera jig has dimensions similar to a daughter card that is used with the centerplane connectors. The camera jig also includes a motor and worm gear assembly that raise and/or lower the camera's view of the centerplane connectors. The control box is mounted to the inspection cart so that an operator can use it to control the up/down movements of the vision system. A timer/relay may be build into the control box to allow controlled/fixed movements of the vision system. The camera is connected to a high resolution color monitor and/or an optional flat screen color monitor. A computer workstation can be used to video capture the camera's image and can be used to send this image to an e-mail alias/webpage or print out a hard copy.
US07742067B2 Image forming apparatus having a exposure control unit capable of changing an exposure ratio between a first exposure ratio and a second exposure ratio different from the first exposure ratio when a first exposure unit or second exposure unit exposes an image carrier on the basis of image data for forming an image with a certain density
In an early-middle stage of a photosensitive drum life cycle, an image forming apparatus uses only a second semiconductor laser having an oscillation wavelength 660 nm to perform writing of an electrostatic latent image on a photosensitive drum surface. In a middle-late stage of the photosensitive drum life cycle, the image forming apparatus starts using a first semiconductor laser having an oscillation wavelength of 440 nm in addition to the second semiconductor laser to perform writing of an electrostatic latent image on the photosensitive drum surface with a combined exposure spot formed at the same position. An exposure control unit gradually increases an output rate of the first semiconductor laser according to an increase in total output of the first and second semiconductor lasers.
US07742065B2 Controller driver and liquid crystal display apparatus using the same
A controller driver includes an overdrive processing unit generating corrected image data based on image data and image data of one frame previous to the image data, a data line driver generating a liquid crystal driving voltage, a roundabout route bypassing the overdrive processing unit and allowing the one frame previous image data to be input to the data line driver, a second expander outputting the one frame previous image data to one of a connection route to the overdrive processing unit and the roundabout route, a command controller supplying a moving/still image switching signal S1 for indicating switching between moving image display and still image display to the second expander. The second expander selects the connection route to the overdrive processing unit in displaying a moving image and selects the roundabout route in displaying a still image.
US07742064B2 Signal line driver circuit, light emitting device and driving method thereof
Variation occurs in transistor characteristics. The present invention relates to a signal line driver circuit comprising a plurality of current source circuits respectively corresponding to a plurality of wirings, characterized in that: the plurality of current source circuits each comprise capacitor means and supply means; and the plurality of current source circuits each convert a supplied current into a voltage in accordance with a video signal, and supply a current corresponding to the converted voltage.
US07742057B2 Method and device of obtaining a color temperature point
A method of obtaining a new color temperature point as applied in a color display device. The color display device has a brightest temperature point when its red, green, and blue components are all in their brightest states. The method of obtaining a new color temperature point uses a mathematical method to find the new point which substantially satisfies the specific color temperature and also causes a minimum loss in brightness.
US07742056B2 Image display system
An image display system includes: an information processing apparatus that performs predetermined correction processing for image data to be displayed; and an image display apparatus that displays an image on the basis of the image data correction-processed in the information processing apparatus. The information processing apparatus includes a first image correction operation processing section that executes, for the image data, correction processing set on the basis of characteristics of the image data of a plurality of correction processing to be performed for the image data. The image display apparatus includes a second image correction operation processing section that executes, for the image data correction-processed in the information processing apparatus, correction processing other than correction processing executed in the information processing apparatus of the plurality of correction processing to be performed for the image data.
US07742055B2 Method for producing three-dimensional views using a brightness control
A process for creating three-dimensional or relief views with the help of software running on a computer system for adjusting brightness of a scene comprising a plurality of pixels includes: determining a representative brightness of at least one predetermined area of the scene based on brightness of each pixel of the at least one predetermined area; comparing the average brightness to a reference value; and correcting the brightness of at least a portion of the scene in accordance with a result of the comparison.
US07742054B2 Display module
A display module for displaying information on a screen, using a display data structure, wherein the display data structure is a doubly linked list. A display space in defined in video memory and the display space is filled by sequentially copying at least a portion of a set of characters from the display data structure into the video memory.
US07742052B2 Video card with interchangeable connector module
A video card for processing a video signal comprises an interchangeable connector module and a video processing module. The interchangeable connector module has a specific configuration. The video processing module has a connector for coupling the interchangeable connector module. The specific configuration of the interchangeable connector module sets the characteristics of the video processing module.
US07742047B2 Image processing program and image processing system using same
By means of an image drawing program stored in a storage medium readable by an image processing system, the corresponding image processing system and the corresponding image drawing method, shadows are drawn for a plurality of characters, without imposing a large load on the processor, by referencing a shadow created in advance, and using the shadow for other characters to draw numerous humanoid shadows for display on one screen.
US07742041B2 Liquid crystal display with touch sensing using variable capacitor sensor and photosensor
A liquid crystal display includes a first panel, a second panel facing the first panel and spaced apart from the first panel, a liquid crystal layer disposed between the first panel and the second panel, a variable capacitor having a capacitance that varies by a touch and generating a control voltage that has a magnitude depending on the capacitance, and a sensing element disposed on the second panel and generating a sensing signal based on the control voltage.
US07742039B2 Information processing apparatus
An information processing apparatus is comprised of a data input device for inputting informations, a memory for storing the informations input by the data input device, a processor for processing the informations in a form of a plurality of pages, a displaying device for displaying the informations formed in a unit of the pages, a device for registering image data in respect of owner name input by the data input device, a device for judging whether or not a predetermined process is done at one of the pages, and a device for storing the image data at a predetermined position of the one of the pages by a judged result of the judging device, wherein when the one of the pages is displayed, the stored image data is displayed with the informations.
US07742038B2 Method for detecting overlapped function area on a touchpad
In a method for detecting overlapped function area on a touchpad with the overlapped function area overlapped by more than two different function areas, when the overlapped function area is touched by an object, a further function can be correctly performed according to touched duration, touched movement, or a terminal touched area pressed onto the touchpad.
US07742033B2 Backlight control system for small size display, LCD panel therefor, and method for making backlight control system
A backlight control system has a light source controlled by a control device; a light guide for introducing light from light source and supplying backlight from the back surface of liquid crystal panel; a light sensor for detecting part of the backlight; and means for feeding signals from light sensor back to control device. Liquid crystal panel comprises light sensor on the side of the glass substrate thereof opposite the side where drive elements are mounted. Light sensor detects light from the base side that has passed through glass substrate on the surface of glass substrate.
US07742028B2 Display control apparatus and method
A display control apparatus that controls first and second modulation sections optically connected in series includes a storage unit and a control unit. The storage unit stores information to specify a defective pixel of the first modulation section. The control unit controls the second modulation section in response to a defect of the defective pixel being stored in the storage unit.
US07742025B2 Display apparatus and driving method thereof
A display apparatus includes a plurality of pixels arranged in a matrix. Each pixel includes a light emitting device, a driving transistor for supplying a driving current to the light emitting device, a first switching transistor coupled with the control terminal of the driving transistor to transmit a data voltage, and a second switching transistor coupled with the control terminal of the driving transistor to transmit a reverse voltage. The first and second switching transistors are alternately coupled with scanning lines driven by one of two scanning drivers, and are alternately turned on at different times. The display apparatus periodically applies the reverse voltage to the driving transistors to turn off the diving transistors and to compensate for variation of the threshold voltage of the driving transistors.
US07742023B2 Electroluminescence display device
In an electroluminescence display device having, on a display panel, a display portion in which pixels are arranged in matrix, an external connection terminal is placed along a lateral side of the display panel and a vertical scan driver circuit is placed on a lateral side of the display panel which opposes the lateral side on which the external connection terminal is placed. Lines for a horizontal scan driver circuit and for the vertical scan driver circuit can be provided only on three sides of the display panel including the side on which the external connection terminal is provided, a side opposing this side, and another side. By not placing the line for the driver circuits on the remaining side, spaces can be secured on this side for a drive current line which supplies power to an electroluminescence element. With this structure, a size of a frame portion can be reduced while securing sufficient width for the drive current common line.
US07742020B2 Display device
A signal line driving circuit which includes a digital signal sampling circuit, a storage circuit, a time setting circuit and a constant current circuit, is fabricated of TFTs on an insulating substrate which is made of the same substance as that of a pixel portion substrate. Thus, in a passive type EL display device, the problem of a distortion in the case of bonding the signal line driving circuit onto the pixel portion substrate can be eliminated. Besides, in an active type EL display device, each pixel is constructed of one transistor and an EL element. Thus, the aperture factor of the EL display device is enlarged.
US07742017B2 Electro-optical device and electronic apparatus having the same
An electro-optical device includes a holding capacitor with a first electrode electrically connected to a transistor and a pixel electrode, a second electrode disposed opposite to the first electrode, and a multilayer dielectric film structure disposed between the first electrode and the second electrode. The multilayer dielectric film structure includes a low dielectric film and first and second high dielectric films. The first and second high dielectric films sandwich the low dielectric film from a first electrode side and a second electrode side, respectively. Both of the first and second high dielectric films have a permittivity that is higher than that of the low dielectric film.
US07742012B2 Electronic devices having complementary dual displays
Methods for controlling complementary dual displays for use with an electronic device are presented including: sending a video signal to a first display, wherein the first display is a low resolution, high frame rate display; displaying the video signal on the first display; and printing a frame of the video signal to a second display, wherein the second display is a high resolution, low frame rate display, the printing including, loading a portion of a current frame of the video signal into a frame buffer, and displaying the current frame of the video signal to a second display, such that a high resolution static image is displayed on the second display.
US07742007B2 Transmission of underwater electromagnetic radiation through the seabed
An underwater communication method is provided. EM signals are transmitted via a seabed using an underwater electrically insulated magnetically coupled antenna. By making use of the low loss properties of the seabed, EM signal attenuation can be reduced and consequently the transmission range can be increased. The underwater electrically insulated magnetically coupled antenna may be located within a body of water or may be buried in the seabed.
US07741999B2 Multilayer antenna of planar construction
A multilayer antenna of planar construction comprises an electrically conductive ground face and a conductive radiation face which is arranged with lateral spacing from the ground face and extends substantially parallel thereto. A dielectric carrier is arranged between the ground face and the radiation face. Above the radiation face there is a carrying means. Above the carrying means there is provided an electrically conductive patch element. The carrying means has a thickness or height which is less than the thickness or height of the patch element.
US07741997B1 Multiple-beam phased array with switchable element areas
A phased array antenna system is provided, which includes one or more switchable sub-groups. Each switchable sub-group can be switchably configured to associate one or more waveform signals with one or more of a plurality of controller circuits using a first switching network, and to associate one or more of the plurality of controller circuits with one or more of a plurality of antenna elements using a second switching network. The switching networks permit a phased array antenna system to switchably control one or more beams, with different scanning ranges and coverage areas depending upon mission requirements.
US07741995B2 Method of acquiring error correction value of reference frequency, terminal device, and recording medium
A terminal device receives satellite signals from a plurality of satellite positioning system (SPS) satellites and locates a position. The terminal device periodically calculates a first drift df1 of a local oscillator using a reference frequency Hr, calculates a search range of the satellite signal using the first drift df1, calculates a second drift df2 of the local oscillator using a reception frequency of the satellite signal, calculates a reference frequency error β which is an error of the reference frequency by calculating a difference between the first drift df1 and the second drift df2, and calculates an error correction value βav of the reference frequency by subjecting a plurality of the reference frequency errors β to a statistical process.
US07741993B1 Method for locating the surface of a polymer particle bed
A method for determining the level of a bed of polymer particles in a vessel comprising providing water wet polymer particles and employing a guided wave radar probe unit carrying a pair of radar active probes spaced from the guided wave radar probe unit by a radar inactive member, and positioning the radar inactive member so that polymer particles that are introduced into the vessel first encounter the radar inactive member.
US07741992B2 Moving target detector for radar systems
Various embodiments are described herein for a moving target detector that processes input data to perform detection for a current range cell. The moving target detector includes a Doppler filter bank module for processing the input data to provide several Doppler outputs for the current range cell, a no-land-clutter path for processing several input data sets related to the several Doppler outputs to provide detection data by performing peak selection on each of the several input data sets and performing detection on the results of the peak selection, a land-clutter path for processing the several input data sets to provide detection data by performing Constant False Alaπn Rate (CFAR) detection on each of the several input data sets and merging the detection results; and a switching logic module for selecting one of the land-clutter path and the no-land-clutter path based on clutter information.
US07741991B1 Radar tracking system
An angle tracking radar system particularly for a missile with a steerable antenna and gyros strapped down to the missile body—a ‘partially strapdown’ system. The body rate signals, body acceleration signals where provided, and target position signals are converted into an electronic reference frame which is controlled to align with the target sightline, the above body and target signals being employed to produce estimates of target direction, sightline rate and sightline acceleration for use in controlling the missile.
US07741990B2 Method and apparatus for detection of moving objects by SAR images
A method for the detection of moving objects by SAR images envisages the steps of: generating a pulse-repetition frequency signal starting from a radar signal; and generating a sequence of SAR images starting from the pulse-repetition frequency signal. In particular, SAR images with low azimuth resolution are generated by of coherent integration of the pulse-repetition frequency signal for a sub-aperture time shorter than an aperture time. In addition, the method envisages generating difference images through point-to-point difference between subsequent low azimuth resolution SAR images, and recognizing patterns associated to moving objects in the difference images.
US07741989B2 Radar system, radar transmission signal generation method, program therefor and program recording medium
Disclosed is a radar system capable of detecting near targets even in case of using discrete bands transmission signal. For this end, a discrete bands selection unit 1 selects discrete bands that meet the required radar parameters for detecting target information. A discrete bands synthetic waveform generation unit 2 suitably synthesizes center frequency signals of the respective discrete bands on the time base so that the signals for all of the discrete bands are transmitted within the transmission time of a particular discrete band that requires the longest time among the signals for the selected discrete bands selected. Alternatively, the center frequency signal is generated for the particular band requiring the longest transmission time, while signals sweeping from lower limit frequencies to upper limit frequencies are generated during the transmission time for the discrete bands other than the particular discrete band requiring the longest transmission time. Subsequently, the signals for the respective discrete bands are synthesized on the time base to generate discrete bands synthetic waveforms so that a discrete bands waveform storage unit 3 stores them in a transmission signal buffer.
US07741984B2 Track and hold amplifiers and analog to digital converters
A track and hold amplifier is provided. The track and hold amplifier includes an input node receiving an analog signal, a buffer coupled between a first node and an output node, a first switch coupled between the input node and the first node, a plurality of switching circuits and a voltage generating unit. Each of the switching circuits includes a capacitor coupled between the first node and a second node. The voltage generating unit selectively provides a common signal and a reference signal to the capacitors of the switching circuits, wherein the reference signal is independent from the analog signal and the common signal.
US07741983B1 Auto-measurement and calibration of DC resistance in current sensing applications
The present invention pertains to calibration in current sensing applications. Power conversion systems such as those used in computer architectures may employ step down converters such as buck converters or other types of converters. The present invention provides calibration processes and devices to account for various parasitic resistances which are found in such systems. A calibration circuit may be coupled to the buck converter or other power conversion to determine a calibrated voltage signal for the output of the power converter. An effective DC resistance may be determined and programmed for use by a control device used. In this way, the parasitic resistances are taken into account to obtain an accurate estimate of the actual current. In turn, this enables power converters and other devices to operate within specification requirements.
US07741980B2 Providing running digital sum control in a precoded bit stream using precoder aware encoding
A system includes a precoder-aware running digital sum (RDS) encoder that encodes user data as w-bit sub-blocks, to produce an encoded data block that meets block RDS constraints and consists of encoded data sub-blocks that meet sub-block RDS constraints. The sub-block constraints include the data sub-blocks having the same magnitude RDS before and after precoding. The encoder data block is further encoded using an error correction code to produce parity bits, and the parity bits are dispersed, as i-bit parity sub-blocks, between selected data sub-blocks to form a code word. The code word is then precoded to produce a precoded bit sequence for transmission over a channel. Sub-block run length limit (“RLL”) constraints may also be included, such that the encoded data block meets both RLL and RDS, with the encoded data sub-blocks meeting respective RLL and RDS sub-block constraints.
US07741977B2 Method and apparatus for vehicle traffic time calculation
A method and apparatus for calculating the travel time of a vehicle as it transits through multiple locations. The method and apparatus includes a device for detecting a radio signal from a vehicle, attaching information to the radio signal, and transmitting a message packet with the signal and attached information to a central server. The central server stores the message packet. The central server compares the information in the message packet against other stored message packets received from multiple locations. When matching information is found, an algorithm is run to compute a vehicle travel time between two locations.
US07741976B2 Server and method for processing meter data into a common format
A method for processing meter data into a common format includes receiving, in a first transmission, meter data using a satellite communications network in a common protocol, the meter data representing information read at time intervals from associated utility meters in at least two data formats, each data format associated with a type of utility meter. The meter data in the plurality of formats is processed into a common data format. The meter data is stored in the common format as interval data for transmission to a customer.
US07741974B1 USB port connectible device reminder
Reminding of the owner of a Universal Serial Bus (USB) port connectible device that the same has been left connected to a USB port of a powered computer is provided by an alarm disposed on a portable base for the device activated by cessation of reception of a limited range radio frequency (RF) signal. Transmission is powered by the computer through the USB port. The portable base has an independent power source for reception/alarm circuitry preferably switched on by separation of a USB port connectible device and/or signalling attachment from the portable base and switched off by physical reunion of the same. Alarm activation while retrieving the USB port connectible device from the USB port of a computer is avoided with an alarm activation delay exceeding in duration a transmission interval minimizing the likelihood of RF signal interference between multiple proximate reminders or other signals of the same RF. An identification (ID) number carried by the RF signal and recognized by a portable base thereby associated with a particular USB port connectible device and/or signalling attachment avoids defeat of alarm activation by reception of another signal of the same RF.
US07741973B2 Drive control device
A drive control device that includes: a driving circuit to drive a driving source; a condition detector to detect the condition of at least one of the driving source and the driving circuit to output a condition signal thereof; a controller to control the driving circuit based on the condition signal; an alarm detector to detect an occurrence of an alarm based on the condition signal; an alarm code generator to analyze the alarm detected by the alarm detector to generate an alarm code; and an alarm display to display the alarm code generated by the alarm code generator, in which the alarm display includes one or more lighting section to display the alarm code by a lighting pattern of the lighting section.
US07741966B2 Proximity detection apparatus
A proximity detection apparatus for a control unit for use in controlling a medical device, the proximity detection apparatus comprising: a detecting part and an emitting part; one part being located in the medical device and the other part in the control unit, so that when the control unit is attached to the medical device the detecting part detects the emitting part and instructs the control unit to select a first mode of operation and when the control unit is detached from the medical device, the detecting part does not detect the emitting part and instructs the control unit to select a second mode of operation.
US07741963B2 Wheel data detection system
A wheel data detection system includes a wireless data detection device and a data receiver. The wireless data detection device includes: a body adapted to be mounted to an inner surface of a rim, and having a closed end, an open end disposed to be in spatial communication with a chamber of a wheel, and a cavity defined between the closed and open ends; a radio frequency unit for receiving and transmitting radio signals; a detector for detecting pressure in the cavity and for generating a pressure signal according to the pressure detected thereby; and a control unit for processing the pressure signal into a data output. The radio frequency unit converts the data output received from the control unit into the radio signal to be transmitted thereby. The data receiver receives the radio signals transmitted by the radio frequency unit.
US07741960B1 Vehicle communication method and apparatus
An apparatus and method for binary communication between a vehicle and a trailer transmits high voltage and low voltage signals detectable as high bits and low bits aggregated into messages. A controller in the vehicle and trailer subsystems each include transceivers for transmitting messages across the vehicle's powerbus that are detectable when current flows across the powerbus. The apparatus and method are useful for controlling trailer brakes via a blue wire interface.
US07741951B2 Method and apparatus for a rolling code learning transmitter
A barrier movement operator system having a receiver for receiving, learning and responding to transmitted rolling code type access codes; at least one trained transmitter for operating the system by transmitting a rolling code type access code to the receiver; at least one learning transmitter for learning the rolling code type access code from said trained transmitter in order to operate the system; a controller for evaluating the relationship between the learning transmitter rolling type access code and the trained transmitter rolling type access code; and a device for providing a barrier movement in response to access codes received by the receiver. The barrier movement operator provides a method of learning valid security codes by a security code receiver comprising the steps of receiving a first security code, then within a predetermined period of time receiving a second security code, having a predetermined relationship to the first security code; and storing a representation of the second security code as a valid security code.
US07741946B2 Metal oxide varistor with heat protection
A metal oxide varistor with heat protection has a body, an insulated washer, a first lead, a second lead and a thermal fuse. The body has two sides and two contacts respectively on the sides. The insulated washer is attached to one contact and has a through hole. The first lead is mounted on the other contact. The second lead is mounted on the insulated washer. The thermal fuse is mounted on the insulated washer and electrically connects to the second lead and the second contact. When the body overloads and overheats, the thermal fuse causes the circuit to open quickly, and the insulated washer keeps the thermal fuse from electrically connecting to the second contact again.
US07741940B2 Actuator device for optical device and image-capture apparatus
Disclosed is an actuator device for an optical device. The actuator device includes a core arranged in an optical device inside of which an optical path passes through, a coil wound around the core, and a rotational magnet formed into an approximately cylindrical shape, at least one end of which includes a bearing portion in an axial direction, and which rotates according to a direction of a magnet field output from the core by electrifying the coil. The actuator device further includes a drive pin rotated in association with the rotational magnet, a base member securely supporting the core and rotatably supporting the rotating magnet, and an optical member moving in and out of the optical path based on rotation of the rotational magnet.
US07741939B2 Displacement device as well as a component placement device
A displacement device is provided with a linear motor which comprises a first part comprising magnetic strips and a second part comprising a coil block. The parts are connected via a linear guide. The second part is movable with respect to the first part in a conveying direction extending parallel to the guide. The displacement device further comprises an connected to said second part, which is located on a side of the first part remote from the second part. The displacement device can be used is a component placement device.
US07741938B2 Rotary actuator with programmable tactile feedback
A control element is provided having programmable haptics, in particular a programmable central catch, for a motor vehicle, having a control knob which can be accommodated such that it can rotate, the control knob being connected in a force-fitting or interlocking manner to a toothed ring or having an integral design, and it being possible for the toothed ring (to be rotated by means of the control knob, and at least one latching element which can move towards the toothed ring and/or away from the toothed ring by means of an electromagnet.
US07741937B2 Power switching apparatus and method of controlling the same
A power switching apparatus includes a breaker unit, an operating unit, a measuring unit, and a controlling unit. The breaker unit is connected on a three-phase current line, and includes switches each corresponding to one of phases of the three-phase current line. The operating unit simultaneously turns on or off the switches. The measuring unit measures a current flowing in each phase, and determines a time point where current flowing in one of the phases becomes zero as a reference time point. The controlling unit controls, when interrupting load current, the operating unit to turn off the switches in a range from 20 degrees to 40 degrees of an electric angle from the reference time point.
US07741935B2 High voltage isolation semiconductor capacitor digital communication device and corresponding package
According to one embodiment, there is provided a semiconductor digital communication device comprising communication drive and sense electrodes formed in a single plane, where the electrodes have relatively high sidewalls. The relatively high sidewalls permit low electrical field densities to be obtained in the sense and drive electrodes during operation, and further permit very high breakdown voltages to be obtained between the electrodes, and between the drive electrode and an underlying ground plane substrate. The device effects communications between drive and receive circuits through the drive and sense electrodes by capacitive means, and in a preferred embodiment is capable of effecting relatively high-speed digital communications. The device may be formed in a small package using, by way of example, CMOS or other semiconductor fabrication and packaging processes.
US07741932B2 Torsional resonator and filter using this
A torsional resonator for suppressing unnecessary flexural vibration and providing excellent resonance characteristic is provided. A vibrator is a beam structure or a paddle-like projection structure added onto a beam structure and an electrostatic force produced due to the potential difference between an electrode and the vibrator adds a moment with the axis of the beam of the vibrator as the center axis, but does not add a force for producing flexure to the beam. As one method, the same AC signal and DC bias voltages different in polarity are applied to an electrode pair of the electrode brought away from the vibrator and the electrode brought close to the vibrator with torsional vibration of the vibrator, so that only torsional vibration can be excited.
US07741930B2 Filter and antenna duplexer
There is provided a filter including a first resonator, a second resonator in which an excitation efficiency is reduced more than the first resonator, and an inductor connected in parallel with the second resonator.
US07741929B2 Miniature quadrature hybrid
A radio frequency (RF) directional coupler (100) can include a first transmission line element (102) having a first end and a second end, and a second transmission line element (104) having a first end and a second end. The first and second transmission line elements (102, 104) can be disposed in a first plane, where at least a portion of said first and said second transmission line elements (102, 104) are adjacent along a path. The RF coupler (100) can also include a first series of conductive coupling elements (116) disposed along said path in a second plane parallel to the first plane and separated from said first and said second transmission line elements (102, 104) by a first dielectric element (114). The first and second plane can be separated by a pre-determined distance (t2) to increase a capacitive coupling between the first and second transmission line elements (102, 104).
US07741925B2 Temperature detector circuit and oscillation frequency compensation device using the same
A temperature detector circuit using a MOS transistor capable of reducing manufacture variation of a mobility and realizing stable output characteristics which are not affected by temperature dependency may be offered. In one example, the temperature detector circuit includes a pair of depression type transistors to output a voltage which is proportional to temperature from a connecting point of a source of a first transistor and a drain of a second transistor. The transistors are the same conducted type of current and are formed in different channel size, which are connected between power supplies in series, and have a configuration in which first transistor's gate and source are connected each other and a first transistor's drain is connected with a second power supply and second transistor's gate and drain are connected each other and a second transistor's source is connected with a first power supply.
US07741922B2 Switch, negative resistance cell, and differential voltage controlled oscillator using the same
The present invention relates to a switch, a negative resistance cell, and a differential voltage controlled oscillator using the same. The present invention includes a first signal line provided in a first direction, a second signal line provided in parallel with the first signal line, and first to fourth gate electrodes, first to third source electrodes, and first to fourth drain electrodes formed between the first signal line and the second signal line, and provides a switch having electrodes in the order of the first gate electrode, the first drain electrode, the second gate electrode, the first source electrode, the third gate electrode, the second drain electrode, the fourth gate electrode, the second source electrode, the fifth gate electrode, the third drain electrode, the sixth gate electrode, the third source electrode, the seventh gate electrode, the fourth drain electrode, and the eighth gate electrode. According to the present invention, a differential voltage controlled oscillator for RF oscillation operation in the broadband area is realized by minimizing generation of parasitic components.
US07741919B2 Architecture for maintaining constant voltage-controlled oscillator gain
A voltage controlled oscillator and a method of operating a voltage-controlled oscillator are disclosed. The oscillator comprises a current controlled oscillator having a variable frequency current output, a first control path for generating a first control current having a first adjustable gain, and a second control path for generating a second control current having a second adjustable gain. A summer is provided for adding the first and second control currents to obtain a summed control current, and for applying the summed control current as an input current to the current controlled oscillator. A control sub-circuit is used for controlling the gain of the first control current as a function of a defined voltage on the second control path to maintain constant the gain of the current output of the current controlled oscillator over a given operating range of the current controlled oscillator.
US07741918B1 System and method for an enhanced noise shaping for spread spectrum modulation
A frequency synthesizer is described. In particular, the frequency synthesizer includes a modulator circuit for producing a signal of modulated frequency. The frequency synthesizer includes an accumulator for summing a plurality of errors in the modulator circuit. An error sum value is generated. More particularly, the accumulator increases the rate of sign change of the plurality of errors. An error signal modulator is coupled to the accumulator and modulates an index that is associated with a current error based on the error sum value. The index that is modulated is used for selecting a feedback loop divider count value used for dividing a frequency of the signal. As a result, the error noise around a target signal shows an increased sign change of error, which moves the error noise to higher frequencies. This improves EMI performance.
US07741915B2 Power amplification apparatus in communication system
Disclosed is a power amplification apparatus in a communication system. The apparatus includes a high power amplifier for amplifying an input signal; and a lattice panel, one surface of which is in contact with a ground plane of the high power amplifier, the one surface including a first line and a second line. The first line has at least two first etched portions and at least one first copperplate portion, the first copperplate portion being positioned between the first etched portions, and the first copperplate portion being formed at an interval of λ 0 4 , and the second line has at least two second etched portions and at least one second copperplate portion, the second copperplate portion being positioned between the second etched portions, and the second copperplate portion being formed at an interval of λ 0 ′ 4 .
US07741913B2 Low-loss electrical component with an amplifier
An electrical component includes an amplifier that includes an output stage, and a power-supply path for powering the output stage. The power supply path includes a line that includes conductor track sections in parallel. The electrical component also includes a carrier substrate containing the amplifier and the line with the conductor tracks.
US07741912B1 Varying amplifier bias parameters to meet radio frequency (RF) communications requirements
The present invention relates to amplifier bias circuitry, which provides a direct current (DC) bias to a radio frequency (RF) amplifier. The amplifier bias circuitry includes a control loop having a control loop bandwidth, and an output impedance associated with providing the DC bias to the RF amplifier. The amplifier bias circuitry may vary the DC bias, the output impedance, the control loop bandwidth, or any combination thereof, to meet wireless communications requirements. For example, in a multi-mode radio, low output impedance may be needed to meet linearity requirements of the RF amplifier associated with wireless communications protocols in one mode of the multi-modes; however, some low output impedance designs may reduce the control loop bandwidth below that needed to meet modulation requirements associated with wireless communications protocols in another mode of the multi-modes.
US07741911B2 Circuit and method for dynamic current compensation
An operational amplifier includes a first stage and a second stage, the first stage for receiving two input signals and the second stage being coupled to the first stage, wherein the second stage includes a first part with a first output of the operational amplifier, and a second part with a second output of the operational amplifier. A method includes providing a first current to the first part of the second stage, and providing a second current to the second part of the second stage. The method further includes adjusting the first current based on a current consumption of the first part of the second stage, and adjusting the second current based on a current consumption of the second part of the second stage, wherein the sum of the first current and the second current is substantially constant.
US07741910B2 Capacitor gain-boost circuit
A circuit is disclosed that comprises a capacitor gain-boost circuit and an amplifier coupled to capacitor gain-boost circuit. A capacitor gain-boost circuit comprises of capacitor, gain-boost amplifier and biasing circuit. The gain-boost amplifier and capacitor provides optimum biasing operation and performance. Accordingly, through the use of capacitor gain-boost circuit, the supply voltage range and power consumption of an amplifier is optimized while the gain of amplifier is improved.
US07741906B1 Method of and circuit for generating parameters for a predistortion circuit in an integrated circuit
A method of generating parameters for a predistortion circuit in an integrated circuit is disclosed. The method comprises receiving, at the predistortion circuit, an input signal to be amplified by a power amplifier; receiving an output of the power amplifier at an input of the integrated circuit; comparing an output of the predistortion circuit with the output of the power amplifier; conforming the output of the power amplifier with the output of the predistortion circuit; and generating parameters to be applied to the predistortion circuit based upon the conformed output of the power amplifier and the predistortion circuit. An integrated circuit having a circuit for generating parameters for a predistortion circuit of the integrated circuit is also disclosed.
US07741897B1 Method and apparatus for self gate pumped NMOS high speed switch
A method and apparatus for self gate pumped NMOS high speed switch have been disclosed.
US07741896B2 High voltage drive circuit employing capacitive signal coupling and associated devices and methods
According to one embodiment, there is provided a high voltage drive circuit comprising drive and sense electrodes formed substantially in a single plane. The device effects signal transfer between drive and receive circuits through the drive and sense electrodes by capacitive means, and permits high voltage devices, such as IGBTs, to be driven thereby without the use of high voltage transistors, thereby eliminating the need to use expensive fabrication processes such as SOI when manufacturing high voltage gate drive circuits and ICs. The device may be formed in a small package using, by way of example, using CMOS or other conventional low-cost semiconductor fabrication and packaging processes.
US07741894B2 Output circuit
An output circuit having an output transistor which switches a load current is disclosed. The output circuit includes a load current detecting block which detects a current level of the load current, and a slew rate adjustment block which adjusts a slew rate during a turn-off transition of the output transistor in response to a result of the detection by the load current detecting block.
US07741892B2 Data output controller
Disclosed is a data output controller that includes an enable signal controller, which generates a control signal having a predetermined pulse width in response to a DQ off signal and a write signal and generates a clock enable signal in response to a read signal and the control signal in synchronization with the control signal when the read signal is activated, and a clock generator that receives the enable signal and an internal clock signal and generates a data clock signal in synchronization with the internal clock signal during an activation period of the enable signal.
US07741891B2 Delay locked loop circuit
A delay locked loop increases an operation margin of a delay locked loop by using an output clock having more advanced phase than a DLL output clock. A clock delay compensation block receives an external clock signal to thereby generate a first multi clock and a second multi clock. A phase control block compares the first multi clock with the second multi clock to generate phase control signal controlling a shifting operation. A multi-phase delay control block performs a shifting operation based on the phase control signal to control the clock delay compensation block.
US07741888B2 PLL circuit having loop filter and method of driving the same
A PLL circuit includes a phase detector that compares the phase of an input clock and the phase of a feedback clock and generates a pull-up control signal and a pull-down control signal. A loop filter pumps a voltage in response to the pull-up and pull-down control signals, filters the pumped voltage, and outputs a control voltage. A voltage controlled oscillator receives the control signal and oscillates an output clock. A clock divider divides the frequency of the output clock at a predetermined rate to generate the feedback clock. In the PLL circuit, the loop filter includes a compensator that compensates for a variation.
US07741885B1 Frequency multiplier
A device for modifying an input signal having an input signal frequency and a duty cycle is disclosed. The device determines two separate counts for each of the high and low pulses of the input signal. One of the two counts for each of the high and low pulses is divided. The divided count is then compared with the undivided count. Based on this comparison, an output module outputs an output signal that has the same duty cycle as the input signal but at a frequency that is a multiple of the input signal frequency.
US07741879B2 Apparatus and method for generating a constant logical value in an integrated circuit
An apparatus for generating a constant logical value in an integrated circuit includes a first logic network having n outputs, the n outputs providing 2n possible output combinations, where the n outputs assume a state that is a subset of the 2n possible output combinations and a second logic network configured to generate at least one constant logic signal when the n outputs assume any state that is part of the subset of the 2n possible output combinations.
US07741877B2 Circuit for distributing an initial signal with a tree structure, protected against logic random events
An embodiment of the invention relates to a circuit for distributing an initial signal, comprising an input node receiving the initial signal, a plurality of terminal nodes each providing at least one resulting signal to a circuit component, and different connection branches between the input node and the plurality of terminal nodes, to which a plurality of intermediate nodes is connected, wherein connection branch is duplicated, so that each node among the input node and the intermediate nodes comprises two inputs and two outputs allowing double propagation of the initial signal towards the terminal nodes through duplicated connection branches, each terminal node terminal node receiving two input signals, images of the initial signal and providing the resulting initial signal: an image of the input signals if said input signals are identical, or inactive, if the input signals are different from each other.
US07741870B2 Multi-function input terminal
A single terminal is usable to configure an integrated circuit into one of three states. A circuit within the integrated circuit is coupled to the terminal and determines whether the terminal: 1) is tied low by an external connection, or 2) is tied high by an external connection, or 3) is floating or is substantially floating. If the circuit determines that the terminal is floating or is substantially floating, then the circuit sets an operational characteristic of a portion of the circuit (for example, sets a maximum current with which the circuit charges a battery) to have a value that is a function of a resistance of an external resistor coupled to the terminal. If no external resistor is present, then the terminal is floating and the operational characteristic is set to have a zero value. The terminal and circuit are particularly suited to use in a USB battery charger.
US07741868B2 Calibration methods and circuits to calibrate drive current and termination impedance
Described are on-die termination (ODT) systems and methods that facilitate high-speed communication between a driver die and a receiver die interconnected via one or more signal transmission lines. An ODT control system in accordance with one embodiment calibrates and maintains termination resistances and drive currents to produce optimal output swing voltages. Comparison circuitry employed to calibrate the reference resistance is also used to calibrate the drive current. Termination elements in some embodiments are divided into two adjustable resistive portions, both of which are designed to minimize capacitive loading. One portion is optimized to produce a relatively high range of adjustment, while the other is optimized for fine-tuning and glitch-free switching.
US07741867B2 Differential on-line termination
Memory devices and systems incorporate on-die termination for signal lines. A memory device comprises an integrated circuit die. The integrated circuit die comprises a pair of input signal pins that supply a pair of input signals, and an on-die termination circuit coupled between the pair of input signal pins that differentially terminates the pair of input signals.
US07741863B2 Apparatus and methods for performing a test
A circuit structure has a circuit portion with negative resistance and a test resonator structure. Furthermore, the circuit structure has a unit for coupling the test resonator structure to the circuit portion with negative resistance during testing and for decoupling the test resonator structure from the circuit portion with negative resistance after testing.
US07741862B2 Semiconductor device including a signal generator activated upon occurring of a timing signal
A mode decode/latch circuit decodes an input signal based on a latch timing signal to output a test mode signal to a test execution circuit. Test mode signal line includes a high-resistance portion extending from the mode decode/latch circuit toward the vicinity of the test execution circuit and a low-resistance portion connecting together the distal end of the high-resistance portion and the input of the test execution circuit. A latch circuit for latching the test mode signal based on the latch timing signal is inserted in the low-resistance portion.
US07741856B2 Immunity test system
In an immunity test system of the present invention, a boundary point detection device changes a signal level of a transmission signal input to an antenna through a level adjusting device while monitoring an operation of an electronic equipment, and thereby detects a signal level of the transmission signal at a boundary point, at which the electronic equipment is changed from a normal operation state to an abnormal operation state, or vice versa, due to the test wave; and a test result storing device calculates an electric field strength of the test wave at the boundary point by using conversion data based on the signal level of the transmission signal at the boundary point detected by the boundary point detection device, and stores in a storage device a calculation result of the electric field strength as well as a test condition used for obtaining the electric field strength.
US07741855B2 Calibration circuit for resistance component
A calibration circuit including a plurality of first resistance components, a plurality of second resistance components, and a first feedback system is provided. The first feedback system selects M1 first resistance components and N1 second resistance components so that a first combination of the M1 first resistance components and the N1 second resistance components has a first predetermined relationship with the impedance of a first resistor. The first feedback system selects M2 first resistance components and N2 second resistance components so that a second combination of the M2 first resistance components and the N2 second resistance components has a second predetermined relationship with the impedance of the first resistor. Based on the values of M1, N1, M2, N2, and a target impedance, the first feedback system generates a first set of calibration signals for a plurality of third resistance components and generates a second set of calibration signals for a plurality of fourth resistance components.
US07741854B2 Method of in slot tightness measuring of stator coil
A method for measuring a tangential tightness of a stator coil within an armature slot of a stator assembly in an electric generator. The stator coil is excited to produce a vibratory response therein. The vibratory response of the stator coil is detected and a frequency response function of the vibratory response is determined. A tangential tightness of the stator coil within the armature slot is estimated based on the frequency response function of the vibratory response of the stator coil.
US07741853B2 Differential-mode-current-sensing method and apparatus
Systems, methods, and devices are disclosed, including a ground-fault sensor that has a plurality of conductors each disposed one inside of another except for an outer conductor and a field sensor configured to sense an electric field, a magnetic field, or both. In some embodiments, the field sensor is disposed adjacent the outer conductor.
US07741849B2 Method for predicting the residual service life of an electric energy accumulator
Methods for predicting a remaining lifetime of an electric energy storage mechanism, in particular a battery in a motor vehicle and devices for implementing such methods are described in which the remaining lifetime is determined by extrapolation with the help of a mathematical model of the energy storage mechanism. This remaining lifetime is defined as the time until reaching any definable limiting values for the minimum efficiency or minimum storage capacity. The remaining lifetime is indicated and, when the level falls below a preselectable threshold, a warning is displayed. The parameters of the energy storage mechanism are adapted continuously to the real values over the lifetime. The anticipated remaining lifetime is determined by extrapolation from the values for the efficiency and/or storage capacity, based on a specifiable charge state and temperature and the minimum values required for the particular application, these values being calculated at regular intervals on the basis of the model and saved.
US07741844B2 Method and system for magnetic resonance imaging using labeled contrast agents
A method and system for imaging using labeled contrast agents and a magnetic resonance imaging (MRI) scanner are provided. The method comprises performing a prescan at a frequency selected to be substantially similar to a frequency of the labeled contrast agent and performing an examination scan at the frequency of the labeled contrast agent substantially immediately after administering the labeled contrast agent to a subject.
US07741842B2 Calibration maps for parallel imaging free of chemical shift artifact
A method for generating a calibrated parallel magnetic resonance image is provided in a manifestation of the invention. A magnetic resonance imaging excitation is applied. A plurality of echoes at different echo times (TE) is acquired. The acquired plurality of echoes from different echo times is used to create a chemical shift corrected calibration map.
US07741840B1 Magnetic probe
A magnetic probe includes a tubular container, the inside of which can be observed and at least one end of which is closed, a paramagnetic seed which is fixed to an end of the tubular container, and a paramagnetic colloidal particle dispersion liquid that is filled in the tubular container.
US07741839B2 Non-contacting position sensor using a rotating magnetic vector
A sensor for sensing the position of an object includes a magnet and a magnetic flux sensor. The magnet has dimensions that include a length, a width and a height. The magnet is adapted to generate a flux field. The flux field has a magnitude of flux and a flux direction. The flux direction changes along at least one of the dimensions. The magnetic flux sensor is mounted adjacent the magnet. The magnet provides a rotating magnetic field vector. A method for magnetizing a magnet to create the rotating magnetic field vector is also disclosed.
US07741833B1 Non contact method and apparatus for measurement of sheet resistance of p-n junctions
A contactless sheet resistance measurement apparatus and method for measuring the sheet resistance of upper layer of ultra shallow p-n junction is disclosed. The apparatus comprises alternating light source optically coupled with first transparent and conducting electrode brought close to the wafer, the second electrode placed outside of illumination area. Using the measurement of the surface photovoltage signals inside illuminated area and outside this area and its phase shifts, linear SPV model describing its lateral distribution the sheet resistance and p-n junction conductance is determined.
US07741831B2 Frequency component measuring device
It is possible to provide a frequency component measuring device capable of narrowing the range of transmission frequency of a local oscillator, preventing degradation of the level measurement accuracy, and measuring the level of a modulation wave. The device includes: a local oscillator (24) capable of performing sweep in a predetermined frequency range; a mixer (22) for mixing a local oscillation signal outputted from the local oscillator (24) and a measured signal so as to subject the measured signal to a frequency conversion; a plurality of intermediate-frequency filters (44, 46) for extracting and outputting components of different intermediate frequencies from a signal outputted from the mixer (22); and an image removal processing section (66) for performing image removal according to the plurality of intermediate-frequency signals separately outputted from the intermediate-frequency filters (44, 46) corresponding to frequency sweep operations performed by the local oscillator (24) more than once.
US07741830B2 Image cancellation in frequency converters for spectrum analysers
The process eliminates image rays generated in a frequency converting device generating actual rays and image rays from frequency rays of an input signal. The frequency converting device comprising a mixer mixing the input signal and a signal provided by a local oscillator and a filter assembly filtering the mixed signals output by the mixer. In a first sweep and a second sweep, the frequency of the oscillator is varied and the signal level at the output of the frequency converting device is recorded for a set of converted frequencies. The second sweep is carried out so that the frequency of the actual ray generated in the second sweep by an input ray is the same as the frequency of the actual ray generated in said first sweep by said input ray, and the frequency of the image ray generated in the second sweep by an input ray is not the same as the frequency of the image ray generated in said first sweep by said input ray. Then, the process determines if a ray-including signal level was recorded both during the first sweep and the second sweep for at least one converted frequency and displays an indication of the presence of a ray for said at least one converted frequency on a screen only if said determination is positive.
US07741825B2 Power supply circuit with temperature-dependent drive signal
A power supply circuit is disclosed herein comprising a load current path for connecting a load which has a switching element. The power supply circuit also includes a current sensor for providing a current measurement signal dependent on a current through the load current path. A drive circuit is also included which provides a clocked drive signal with a number of drive cycles, in each case having an on period and an off period, for the switching element. A temperature sensor arrangement with a temperature sensor is provided for determining an environmental temperature in the area of the temperature sensor, which provides a temperature measurement signal dependent on the environmental temperature. The clocked drive signal is dependent on the current measurement signal and the temperature measurement signal.
US07741824B2 Switching power supply control
A switching power supply controller includes a comparator to compare a feedback signal to a first limit and a second limit, one of which includes a ramp. Limit generators may be used to generate limit signals in response to power supply signals, control signals, and/or output signals. An error amplifier may be used to generate the feedback signal in response to an output signal and an input control signal. A switching power supply may alternatively include an oscillator that shifts the switching frequency in response to the input control signal.
US07741820B2 Switching voltage regulator pulse width modulation controller and method
A PWM controller for controlling a switching voltage regulator comprises a first comparator, a second comparator and a third comparator. The first comparator is configured to detect voltages of a first node and a second node so as to determine whether to stop the PWM controller. The PWM controller is stopped if a first potential is lower than a threshold, and the first potential derives from the voltage of the first node by a level shift of a first voltage difference. The second comparator is configured to detect the voltage of the first node and then to compare the voltage with a power reference voltage so as to determine whether the PWM controller receives necessary power. The third comparator is configured to compare the voltage of the second node with an enable reference voltage so as to determine whether to disable the PWN controller.
US07741819B2 Unipolar or bipolar chopping converter with two magnetically coupled windings
In order to reduce the cost of a chopping converter supplying a continuous voltage at the terminals of a load (Z), a circuit with two windings (Lp, Ls) and a single magnetic core is proposed, according to the present invention, which enables the cost and the size of the circuit to be reduced. It is then necessary to add two diodes (D3, D4) to the circuit, but these elements are inexpensive and of small size.
US07741806B2 Magnetically attachable battery recharging
A charging device for transferring electrical charge between a variety of sources and clients comprising charging circuitry and electrical leads with magnetically attaching connectors is disclosed. The magnetically attachable leads are used to connect to external batteries or other sources or clients. The charging circuitry may be a buck, boost, or boost/buck switching ASIC or may be a micro-controller.
US07741805B2 Method and apparatus for managing power flow of an electric power storage device
An electrical power storage device provides power to crank an internal combustion engine. Thereafter available power from the electric power storage device to crank the engine again is continually updated. Remedial measures are invoked if the available power is less than a predetermined power threshold.
US07741803B2 Apparatus and method for driving 2-phase SRM
Disclosed is an apparatus and method for driving a 2-phase SRM capable of individually performing an initial driving by an initializing sensor and a normal driving by a driving sensor, and capable of controlling a rotation speed of the SRM by delaying a phase signal by a half period and then generating a pulse width modulation signal based on the period. The apparatus comprises: a driving sensor which detects a position of a rotor thus to generate a driving sensor signal based on a result of the detection; a microprocessor which generates a 1-phase signal and a 2-phase signal based on a rising time and a falling time of the driving sensor signal at the time of a normal driving; an oscillator which generates first and second pulse width modulation signals delayed by a preset time; and a multiplying unit which multiplies the 1-phase and 2-phase signals with the first and second pulse width modulation signals, and generates 1-phase and 2-phase driving signals based on a result of the multiplication.
US07741802B2 Medical robotic system with programmably controlled constraints on error dynamics
A medical robotic system has a robot arm holding an instrument for performing a medical procedure, and a control system for controlling movement of the arm and its instrument according to user manipulation of a master manipulator. The control system includes at least one joint controller that includes a controller having programmable parameters for setting a steady-state velocity error and a maximum acceleration error for the joint's movement relative to a set point in response to an externally applied and released force.
US07741800B2 Control apparatus and method for controlling an adjusting device in a motor vehicle
A control apparatus for an adjusting device in a motor vehicle is provided. The apparatus has a sensor, particularly a current sensor (S1), for generating a signal (U1 to U10, I1 to I3, Δt1 to Δt8) which is dependent on a motor movement by a motor in the adjusting device. The apparatus also has a power driver for controlling a motor current, and a processor (RE). The processor is designed and set up (i) to find a position (xm) from the sensor signal (U1 to U10, I1 to I3, Δt1 to Δt8), particularly from the ripple in the motor current, (ii) to associate a reference characteristic (Chref) of orderly signals (U1 to U10, I1 to I3, Δt1 to Δt8) from the sensor, particularly for the ripple, with a reference position (xref), (iii) to correct the position found (xm) on the basis of the reference characteristic (Chref) and the reference position (xref), and (iv) to control the motor current on the basis of the corrected position.
US07741797B2 Method for managing transitions in a three-phase BLDC motor and corresponding device
A method is provided for managing at least one transition in a three-phase BLDC motor describing a cycle including six successive states, wherein the motor obtains first, second and third synchronization signals. The synchronization signals are respectively associated with first, second and third coils of the motor. The method includes the following steps, for each current transition associated with the switching of the motor from a current state to a next state: selecting a current synchronization signal on which the current transition is to appear; detecting the occurrence of the current transition on the current synchronization signal; and sending, to the motor, at least one current control signal so as to switch the motor from the current state to the next state.
US07741796B2 Method for controlling brake chopper, brake chopper and frequency converter
A method for controlling brake resistors and a brake chopper, the number of brake resistors being two or more and the brake resistors being connected in series with switches to be controlled, the series connection being connected between a positive and a negative rail of a DC voltage intermediate circuit, the method comprising the step of determining a magnitude for a voltage of the DC intermediate circuit; and determining a first voltage limit and a second voltage limit. The method further comprises the steps of switching brake resistors to the intermediate circuit in a periodically alternating manner, each switch being switched during a switching period and the on-period of each switch in a switching period being responsive to the magnitude of the voltage in the DC voltage intermediate circuit when the voltage is above the first predetermined limit and below the second predetermined limit.
US07741784B2 Apparatus for driving a light source and liquid crystal display device using the same
An apparatus for driving a light source and a liquid crystal display device using the same is disclosed. The apparatus for driving a light includes: a light source unit including a plurality of lamps to emit light; and a light source driving unit that selectively drives the plurality of lamps in response to a luminance control signal and a selection signal.
US07741781B2 Radio-frequency accelerating cavity and circular accelerator
An RF accelerating cavity includes an accelerating cavity unit and an inductance varying device having a magnetic member connected parallel to an acceleration electrode gap. The RF accelerating cavity is tuned in such a fashion that a charged particle beam acceleration frequency matches a resonant frequency of the RF accelerating cavity by regulating inductance of the inductance varying device in accordance with a changing pattern of the charged particle beam acceleration frequency. Alternatively, impedance of the RF accelerating cavity is increased with the provision of a fixed inductance connected parallel to the acceleration electrode gap when the RF accelerating cavity has a narrow acceleration frequency range.
US07741779B2 Metal vapor discharge lamp and illumination apparatus
A metal vapor discharge lamp and a lighting fixture are downsized without causing breakage of an outer tube because of optimization of a positional relation among the outer tube (34), an inner tube (32), and an arc tube (40). The metal vapor discharge lamp has the arc tube, the inner tube housing the arc tube, and the outer tube housing the inner tube. The positional relation satisfies the relation of 2×A+B≧1.06. In a cross section of the lamp (the cross section of the arc tube is unshown for convenience), A (mm) represents the shortest distance between the arc tube and the inner tube along a line in a radial direction of the inner tube, and B (mm) represents a distance between the inner tube and the outer tube on a line segment C that is extension of the line.
US07741772B2 White LED package structure having a silicon substrate and method of making the same
A white light emitting diode package structure having a silicon substrate is disclosed. The white light emitting diode package structure comprises a silicon substrate having a plurality of cup-structures thereon, one of a plurality of blue light emitting diodes is respectively disposed in each cup-structure, and a phosphor structure covering the silicon substrate and the cup-structures. The blue light emitting diodes have various wavelengths and the phosphor structure has a plurality of kinds of phosphor powders and a sealing material. Each kind of phosphor powder is able to convert blue light within a certain wavelength into yellow light.
US07741771B2 Light-emitting element and display device and lighting device using same
A light-emitting element is provided having a layered structure composed of at least a light-emitting layer having a light-emitting region and a reflective layer for reflecting light emitted from the light-emitting region. Light emitted from the light-emitting region is extracted from a light-extracting surface distanced from the light-emitting region. A light-scattering portion is present in a part of the reflective layer.
US07741770B2 LED device having improved light output
A light-emitting microcavity diode device includes a reflective electrode and a semi-transparent electrode, formed over a substrate, with an unpatterned light-emitting layer formed between the reflective electrode and the semi-transparent electrode. The reflective electrode, semi-transparent electrode, and unpatterned light-emitting layer form an optical cavity. Either the reflective or semi-transparent electrode is patterned to form independently-controllable, light-emitting sub-pixels. At least one, and fewer than all, of the sub-pixels emit light through a color filter. A first sub-pixel emits light having a first primary color and a second sub-pixel emits a complementary colored light. The light emitted from the first and second sub-pixels changes at one or more different angles. The color of the combined light of the first and second sub-pixels changes less at the one or more different angles than the light from at least one of the first or second sub-pixels. A third sub-pixel emits light through a color filter of a second primary color, different from the first primary color.
US07741769B2 Light-emitting device for sealing light-emitting elements and electronic apparatus
A light-emitting device includes: a substrate; a plurality of light-emitting elements which is formed on the substrate and each of which has an anode partitioned by an insulating pixel partition wall, a cathode, and an organic light-emitting layer interposed therebetween and emits light by an electric field generated by the anode and the cathode; a first organic buffer layer that is formed by applying an organic compound and hardening the organic compound and covers a region larger than the region in which the plurality of light-emitting elements are formed; a second organic buffer layer that is that is formed by applying an organic compound and hardening the organic compound and is arranged above the substrate with the first organic buffer layer interposed therebetween so as to cover the plurality of light-emitting elements; and a gas barrier layer that is formed of an inorganic compound, covers a region larger than the region in which the first and second organic buffer layers are formed, and protects the plurality of light-emitting elements from air. In the light-emitting device, a region of the substrate overlapping the first organic buffer layer is not completely matched with a region of the substrate overlapping the second organic buffer layer.
US07741766B2 Composition for forming layer, fluorescent lamp using the composition, and method of manufacturing a fluorescent lamp
A slurry composition for forming a layer is provided. The slurry composition includes 100 parts by weight of a metal oxide selected from the group consisting of MgO, CaO, SrO, BaO, ZrO3, and a combination thereof; 1-200 parts by weight of a binding agent per 100 parts by weight of the metal oxide, the binding agent being selected from the group consisting of calcium phosphate (CaP), a calcium-barium-boron-based (CBB-based) oxide, a triple carbonate ((Ca, Ba, Sr)CO3), and a combination thereof; 1-10 parts by weight of a binder per 100 parts by weight of the metal oxide, the binder being selected from the group consisting of nitro cellulose, ethyl cellulose, methyl methacrylate, and a combination thereof; and 50-500 parts by weight of a solvent per 100 parts by weight of the metal oxide.
US07741763B2 Spark plug
A spark plug including a center electrode; an insulator; a metal shell; a ground electrode; and an annular packing, all as defined herein, wherein the packing has a hardness greater than or equal to a hardness of the stepped portion of the metal shell or has a Vickers hardness of not less than 300 Hv. Preferably, a difference between the hardness of the packing and the hardness of the stepped portion of the metal shell is from 120 Hv to 160 Hv, and the packing has a Vickers hardness of not more than 500 Hv.
US07741761B2 Radiofrequency plasma spark plug
A radiofrequency plasma spark plug configured to equip a combustion chamber including: an annular shell with a main axis; a central electrode made of a conductive material, extending along the main axis and including an inner portion arranged inside the annular shell and an outer portion arranged outside the annular shell; an annular electrically insulating part extending at least about the inner portion of the central electrode so as to be interposed between the shell and the electrode, the insulating part only covering part of the outer portion of the central electrode. The insulating part includes an annular flange concealing the entire circular terminal surface of the shell relative to the uncovered part of the electrode.
US07741759B2 Electron tube and method for manufacturing electron tube
A photomultiplier tube 1 is an electron tube comprising an envelope 5 including a frame 3b having at least one end part formed with an opening and an upper substrate 2 airtightly joined to the opening, and a photocathode 6 contained within the envelope 5, the photocathode 6 emitting a photoelectron into the envelope 5 in response to light incident thereon from the outside; wherein multilayer metal films 10b, 10a each constituted by a metal film made of titanium, a metal film made of platinum, and a metal film made of gold laminated in this order are formed at the opening and the joint part between the upper substrate 2 and opening; and wherein the frame 3b and upper side substrate 2 are joined to each other by holding a joint layer 14 containing indium between the respective multilayer metal films 10b, 10a.
US07741757B2 Energy shuttle based high energy piezoelectric apparatus and method
An energy harvester apparatus that includes a piezoelectric beam having opposing first and second ends, with the first end being fixedly supported to a support structure. A negative spring force subsystem has a first end fixedly secured against movement, and a second end secured to the second end of said piezoelectric beam. The negative spring force subsystem includes a linkage system and a biasing element operably associated with the linkage system for applying an adjustable, negative spring force to the piezoelectric beam to soften the piezoelectric beam. The negative spring force subsystem is adjusted to flex the beam sufficiently to overcome the inherent stiffness of the beam such that two stable positions for the beam are created. The beam is therefore able to oscillate between the two stable positions in an over center fashion in response to a low magnitude vibration signal. In various embodiments the system is implemented to provide an input drive signal to control various types of external devices.
US07741752B2 High frequency surface acoustic wave device and the substrate thereof
A high frequency SAW device and the substrate thereof are disclosed. The disclosed high frequency SAW device does not need to use the conventional and expensive sapphire substrate as its substrate. Besides, the disclosed substrate for a high-frequency SAW device can replace the conventional sapphire substrate in the use of the substrate for a high frequency SAW device. The disclosed high frequency SAW device comprises: a substrate; a first buffering layer forming on the surface of the substrate; a second buffering layer forming on the surface of the first buffering layer; a piezoelectric layer forming on the surface of the second buffering layer; an input transformation unit; and an output transformation unit, wherein the input transformation unit and the output transformation unit are formed in pairs on the surface of or beneath the piezoelectric layer.
US07741751B2 MEMS device having distance stops
A micro-electromechanical systems (MEMS) device includes bottom and top capacitive plates, such that a capacitor is definable therebetween. A mechanism is electrostatically movably disposed between the bottom and top capacitive plates. One or more flexures are movably disposed between the bottom capacitive plate and the mechanism, and having distance stops between the bottom capacitive plate and the mechanism corresponding to maximum downward movement. The MEMS device includes one or more electrodes of the bottom capacitive plate corresponding to the flexures. Energizing different of the electrodes causes the flexures to move to different of the distance stops, causing the mechanism to move to different positions between the bottom and top capacitive plates.
US07741750B1 Induction motor with improved torque density
An induction motor embodiment includes a stator defining a stator bore, the stator including a stator yoke having a stator yoke thickness and a plurality of stator teeth, the teeth having a common length, with each of the stator teeth including a stator tooth center portion that extends from a stator tooth bottom portion proximal the yoke to a stator tooth tip portion, with adjacent stator teeth defining a stator slot between them, each stator slot having a stator slot bottom that extends along a stator slot bottom length. In the embodiment, the center portion has a stator tooth width that is less than or equal to one half the stator slot bottom length. In the embodiment, the stator tooth width is smaller than a stator slot opening width distance. In the embodiment, a ratio of stator yoke thickness to stator tooth width is at least 5:1. A rotor is rotably mounted in the stator.
US07741745B2 Attaching structure of resolver, dynamo-electric machine and attaching method of resolver
A resolver stator portion is attached to a resolver stator portion side attaching portion formed at a position facing to a resolver rotor portion via an elastic ring. Thus, it is possible to absorb a dimensional error of the resolver stator portion side attaching portion on the basis of an elastic deformation of the elastic ring even in the case that the dimensional error is generated in the resolver stator portion side attaching portion.
US07741744B2 System and method for protecting a submersible motor
A technique is provided to facilitate pumping of fluids in a well. A submersible pumping system utilizes a submersible motor to power a submersible pump. A motor protector works in cooperation with the submersible motor to protect motor fluid within the submersible motor and to reduce differential pressures between the internal motor fluid and the external well fluid. The motor protector incorporates a piston slidably sealed within an interior cavity of the motor protector for movement to reduce undue differential pressures.
US07741737B2 Solid state power control and method for reducing control power
A solid state power control apparatus includes a switch and a microcontroller that controls the switch. The microcontroller receives serial communication and switches between an active state and a sleep state in response to the serial communication.
US07741736B2 System and method for multiple sense point voltage regulation
The present invention is a system and method for sensing the voltage at multiple sense points. The present invention acquires optimal feedback from a plurality of sources including those integrated on the same motherboard, for populated or unpopulated connectors and for adapter cards plugged into the connectors, for the purpose of controlling the voltage regulator output. The voltage regulator, connected to a logic system, provides voltage to those connectors needing the voltage.
US07741733B1 Modular battery control apparatus
A modular battery control apparatus includes a first stationary contact adapted for electrical communication with coach loads and a battery charger, a second stationary contact adapted for electrical communication with a coach battery, a third stationary contact adapted for electrical communication with a chassis battery, and a fourth stationary contact adapted for electrical communication with chassis loads and an alternator. First, second, and third movable contacts are respectively attached to first, second, and third latching solenoids and are adapted to abuttingly engage and disengage the respective first and second stationary contacts, second and third stationary contacts, and third and fourth stationary contacts. A controller selectively activates and deactivates the first, second, and third latching solenoids and a user-controlled switch panel communicates with the controller.
US07741731B2 PWM power regulator device
A PWM power regulator device has a processor, an input interface circuit, a zero phase detecting circuit and a thyristor. The input interface circuit is connected to a PWM output terminal of an external digital control circuit and the processor. The processor calculates a period and duty cycle of a PWM signal from the PWM output terminal and then outputs a triggering signal to the thyristor. The thyristor is triggered at different conduct angle according to the triggering signal and the triggering signal is determined by the processor according to the PWM signal. Therefore, the power regulator device is directly connected to the PWM output terminal of the digital control circuit without digital to analog converter.
US07741727B2 System and method for creating a networked infrastructure distribution platform of small fixed and vehicle based wind energy gathering devices along roadways
A roadway system for energy generation and distribution is presented. In accordance with one embodiment of the invention, the roadway system comprises a plurality of wind energy generating devices, and a roadway system electricity grid. The wind energy generating devices are electrically connected to the roadway system electricity grid and are positioned on part of or near to a road in a system of roads and are optionally fixed in a position such that a multi-form, wind energy gathering network can be formed.
US07741722B2 Through-wafer vias
A through-wafer via structure and method for forming the same. The through-wafer via structure includes a wafer having an opening and a top wafer surface. The top wafer surface defines a first reference direction perpendicular to the top wafer surface. The through-wafer via structure further includes a through-wafer via in the opening. The through-wafer via has a shape of a rectangular plate. A height of the through-wafer via in the first reference direction essentially equals a thickness of the wafer in the first reference direction. A length of the through-wafer via in a second reference direction is at least ten times greater than a width of the through-wafer via in a third reference direction. The first, second, and third reference directions are perpendicular to each other.
US07741721B2 Electrical fuses and resistors having sublithographic dimensions
Electrical fuses and resistors having a sublithographic lateral or vertical dimension are provided. A conductive structure comprising a conductor or a semiconductor is formed on a semiconductor substrate. At least one insulator layer is formed on the conductive structure. A recessed area is formed in the at least one insulator layer. Self-assembling block copolymers are applied into the recessed area and annealed to form a first set of polymer blocks and a second set of polymer blocks. The first set of polymer blocks are etched selective to the second set and the at least one insulator layer. Features having sublithographic dimensions are formed in the at least one insulator layer and/or the conductive structure. Various semiconductor structures having sublithographic dimensions are formed including electrical fuses and resistors.
US07741720B2 Electronic device with wire bonds adhered between integrated circuits dies and printed circuit boards
An electronic device that has an integrated circuit die with a plurality of contacts pads, a printed circuit board with a plurality of conductors corresponding to each of the contact pads respectively, wire bonds electrically connecting each of the contact pads to the corresponding conductors and, an adhesive surface positioned between the contacts pads and the corresponding conductors. The wire bonds are secured to the adhesive surface to hold them in a low profile configuration.
US07741719B2 Integrated circuit system with dummy region
An integrated circuit system comprised by forming a first region, a second region and a third region within a dielectric over a substrate. The first region includes tungsten plugs. The second region is formed adjacent at least a portion of the perimeter of the first region and the third region is formed between the first region and the second region. An opening is formed in the third region and a material is deposited within the opening for preventing erosion of the first region.
US07741709B2 Embedded type multifunctional integrated structure for integrating protection components and method for manufacturing the same
An embedded type multifunctional integrated structure for integrating protection components and a method for manufacturing the same are disclosed. The present invention utilizes the concept of multi-layer design to integrate more than two passive components on a component structure that is adhered onto a substrate and is applied to a USB terminal in order to protect an electronic device that uses the USB. Hence, the present invention has an OCP function, an OVP function, and an anti-ESD function at the same time. Therefore, the present invention effectively integrates two or more passive components in order to increase functionality. Moreover, the present invention effectively reduces the size of the passive components on a PCB and reduces the number of solder joints.
US07741708B2 Semiconductor device
A semiconductor device having a plurality of semiconductor chips mounted on a lead frame (10) and required portions covered with seal portions in which: the plurality of semiconductor chips are divided into a first group of semiconductor chips (Dx to Dz) and a second group of semiconductor chips (Du to Dw and Thx to Thz); both groups of semiconductor chips are mounted on the lead frame (10) at a distance from each other; the seal portions are comprised of first and second resin-seal portions (41 and 42) which cover the first and second groups of semiconductor chips, respectively, along with required portions of the lead frame; both resin-seal portions are mechanically coupled with each other by coupling portions; and a group of read terminals respectively connected to circuits within the first resin-seal portion and circuits within the second resin-seal portion are led out through a gap between the first resin-seal portion (41) and the second resin-seal portion (42).
US07741707B2 Stackable integrated circuit package system
A stackable integrated circuit package system is provided placing a first integrated circuit die having an interconnect provided thereon in a substrate having a cavity, encapsulating the first integrated circuit die, having the interconnect exposed, in the cavity and along a first side of the substrate, mounting a second integrated circuit die to the first integrated circuit die, and encapsulating the second integrated circuit die along a second side of the substrate.
US07741701B2 Method for reducing stress concentrations on a semiconductor wafer by surface laser treatment
A method for treating an area of a semiconductor wafer surface with a laser for reducing stress concentrations is disclosed. The wafer treatment method discloses treating an area of a wafer surface with a laser beam, wherein the treated area is ablated or melted by the beam and re-solidifies into a more planar profile, thereby reducing areas of stress concentration and stress risers that contribute to cracking and chipping during wafer singulation. Preferably, the treated area has a width less than that of a scribe street, but wider than the kerf created by a wafer dicing blade. Consequently, when the wafer is singulated, the dicing blade will preferably saw through treated areas only. It will be understood that the method of the preferred embodiments may be used to treat other areas of stress concentration and surface discontinuities on the wafer, as desired.
US07741700B2 Transistor with heat dissipating means
A semiconductor device having sufficiently high heat dissipation performance while inhibiting an increase in the area of a chip is provided. In semiconductor device 1, a plurality of HBTs 20 and a plurality of diodes 30 are one-dimensionally and alternately arranged on semiconductor substrate 10. Anode electrode 36 of diode 30 is connected to emitter electrode 27 of HBT 20 via common emitter wiring 42. Diode 30 works as heat dissipating elements dissipating to semiconductor substrate 10 the heat transmitted through common emitter wiring 42 from emitter electrode 27, and also works as a protection diode connected in parallel between an emitter and a collector of HBT 20.
US07741697B2 Semiconductor device structure for anti-fuse
The present invention discloses a semiconductor device, the device comprising a semiconductor layer on a substrate. A gate oxide and a gate electrode are formed on the semiconductor substrate. A gate conductive layer is formed on the gate electrode. A first doped region is formed in the semiconductor layer. A dielectric spacer is optionally formed onto the sidewall of the gate electrode and part of the semiconductor layer. A second doped region is formed from a predetermined distance to the gate electrode, wherein the predetermined distance is no less than the distance between the first doped region and the gate electrode. A third doped region is formed adjacent to the first doped region in the semiconductor layer and between the first doped region and the second doped region.
US07741694B2 Semiconductor integrated circuit device
A semiconductor integrated circuit device according to the present invention includes an N-type embedded diffusion region between a substrate and an epitaxial layer in first and second island regions serving as small signal section. The N-type embedded diffusion region connects to N-type diffusion regions having supply potential. The substrate and the epitaxial layer are thus partitioned by the N-type embedded diffusion region having supply potential in the island regions serving as small signal section. This structure prevents the inflow of free carriers (electrons) generated from a power NPN transistor due to the back electromotive force of the motor into the small signal section, thus preventing the malfunction of the small signal section.
US07741692B2 Integrated circuit device with temperature monitor members
In a semiconductor integrated circuit device, a logic circuit section is provided at the top surface of a P-type silicon substrate and a multi-level wiring layer. The device is further provided with a temperature sensor section in which a first temperature monitor member of vanadium oxide is provided above the multi-level wiring layer. A second temperature monitor member of Ti is provided at a lowermost layer of the multi-level wiring layer. The first and second temperature monitor members are connected in series between a ground potential wire and a power-source potential wire, with an output terminal connected to the node of both members. The temperature coefficient of the electric resistivity of the first temperature monitor member is negative, while that of the second temperature monitor member is positive.
US07741690B2 Photoelectric conversion device and photodetector apparatus having the same
A photoelectric conversion device includes an intrinsic semiconductor layer, a first conductive type semiconductor layer disposed on a first side of the intrinsic semiconductor layer, and a second conductive type semiconductor layer disposed on a second side of the intrinsic semiconductor layer opposite the first side. The intrinsic semiconductor layer includes an amorphous semiconductor layer and a crystalline semiconductor layer including a plurality of crystals. A diameter of a crystal of the plurality of crystals is equal to or less than approximately 100 angstroms.
US07741689B2 Photoelectric conversion layer-stacked solid-state imaging element
A photoelectric conversion layer-stacked solid-state imaging element comprises: a semiconductor substrate having a signal reading circuit formed thereon; at least one layer of photoelectric conversion layer each of which is provided interposed between a common electrode layer and a plurality of pixel electrode layers corresponding to pixels, said at least one layer of photoelectric conversion layer being stacked above the semiconductor substrate via a light shielding layer; and inhibiting structures each of which inhibits a reflected light produced by reflection of incident light on the light shielding layer, the incident light having passed through said at least one layer of photoelectric conversion layer and entered into a pixel, from entering in direction toward adjacent pixels.
US07741684B2 Semiconductor device and method for fabricating the same
The semiconductor device comprises a gate insulating film including a first dielectric film of HfxAl1-xOy (0.7
US07741680B2 Electro-static discharge and latchup resistant semiconductor device
The present invention relates to a semiconductor device including a substrate layer, a metal-oxide-semiconductor field-effect transistor (MOSFET), a backgate region, an isolation layer and a diode. The MOSFET includes a gate region, a source region and a drain region. The source and drain regions are embedded in the backgate region, which includes a voltage input terminal. The isolation layer is located between the backgate region and the substrate layer and has a doping type opposite that of the backgate region. The diode includes a first terminal connected to the isolation layer and a second terminal coupled to an isolation voltage source.
US07741678B2 Semiconductor substrates having useful and transfer layers
A semiconductor substrate that includes a relatively thin monocrystalline useful layer, an intermediate layer transferred from a source substrate, and a relatively thick layer of a support present on one of the useful layer of the intermediate layer. The support is made of a deposited material that has a lower quality than that of one or both of the intermediate and useful layers. A bonding layer may be included on one of the intermediate layer or the useful layer, or both, to facilitate bonding of the layers an a thin layer may be provided between the useful layer and intermediate layer. These final substrates are useful in optic, electronic, or optoelectronic applications.
US07741677B2 Semiconductor integrated circuit device and manufacturing method thereof
After silicon oxide film (9) is formed on the surface of a semiconductor substrate (1), the silicon oxide film (9) in a region in which a gate insulation film having a small effective thickness is formed is removed using diluted HF and after that, high dielectric constant insulation film (10) is formed on the semiconductor substrate (1). Consequently, two kinds of gate insulation films, namely, a gate insulation film (12) comprised of stacked film of high dielectric constant insulation film (10) and silicon oxide film (9) and gate insulation film (11) comprised of the high dielectric constant insulation film (10) are formed on the semiconductor substrate (1).
US07741675B2 Semiconductor component and method for fabricating it
A semiconductor component has a semiconductor body in which a trench structure is provided. An electrode structure embedded in the trench structure is at least partly insulated from its surroundings by an insulation structure, and is contact-connected in a contact-connecting region via a contact hole that penetrates through an upper region of the insulation structure. The semiconductor component has at least two trenches running next to one another, at least one of said trenches containing a part of the electrode structure. The trenches are oriented so that at least the regions of the insulation structure which are provided in the upper region of the trenches overlap one another in an overlap region. The contact hole is arranged above the at least two trenches in such a way that at least parts of the overlap region and at least one of the electrode structure parts are contact-connected via the contact hole.
US07741674B2 Non-volatile memory with source/drains in multiple directions
An object is to improve a data recording amount per memory cell. In the invention, in a non-volatile memory, the data contents of which can be electrically written and erased, each memory cell that configures the non-volatile memory is provided with: source/drain regions formed on a semiconductor substrate; a gate electrode formed on a channel region of the semiconductor substrate; and a gate insulating film formed between the semiconductor substrate and the gate electrode. A configuration in which the source/drain regions extend at least in three directions from the channel region when seen on a plane from the gate electrode side is employed.
US07741673B2 Floating body memory and method of fabricating the same
A floating body memory includes a semiconductor substrate having a cell region and a peripheral circuit region. A floating body cell is located in the cell region and a first floating body is located in the peripheral circuit region of the semiconductor substrate. A peripheral gate pattern is positioned on the first floating body. First source and drain regions are positioned at both sides of the peripheral gate pattern. First leakage shielding patterns are positioned between the first floating body and the first source and drain regions, the first source and drain regions contacting the first floating body. The first leakage shielding patterns may be positioned outside outer edges of the peripheral gate pattern.
US07741672B2 Bridged gate FinFet
In a fin-type field effect transistor (FinFET) structure, a gate strap is positioned on the top of a gate conductor and runs along the gate conductor. The top of the gate strap is positioned a greater height above the top surface of the substrate than the top of the fin cap. The gate strap is conformal and, therefore, the top of the portion of the gate strap that crosses the fin cap has a greater height above the top surface of the substrate than top portions of other regions of the gate strap. Further, the material of the gate strap can have a different work function than a material of the gate conductor.
US07741662B2 Ultra high voltage MOS transistor device
An ultra high voltage MOS transistor device includes a substrate; a source region formed in the substrate; a first doping region formed in the substrate and bordering upon the source region; a first ion well encompassing the source region and the first doping region; a gate oxide layer formed on the source region and on the first ion well; a field oxide layer connected with the gate oxide layer and formed on a semiconductor region; a dielectric layer stacked on the field oxide layer; a drain region formed at one side of the field oxide layer and being spaced apart from the source region; a second ion well encompassing the drain region; and a gate disposed on the gate oxide layer and laterally extending to the field oxide layer and onto the dielectric layer.
US07741659B2 Semiconductor device
A semiconductor device is provided. An isolation structure is formed in a substrate to define a first and a second active region, and a channel active region therebetween. A field implant region is formed below a portion of the isolation structure around the first, second, and channel active regions. A channel active region includes two first sides defining a channel width. The distance from each first side to a second side of a neighboring field implant region is d1. The shortest distance from a third side of each first or second active region to an extension line of each second side of the field implant region is d2. R=d1/d2, where 0.15≦R≦0.85. A gate structure covers the channel active region and extends over a portion of the isolation structure. Source/drain doped regions are formed in the first and the second active regions.
US07741658B2 Self-aligned super stressed PFET
The embodiments of the invention comprise a self-aligned super stressed p-type field effect transistor (PFET). More specifically, a field effect transistor comprises a channel region comprising N-doped material and a gate above the channel region. The field effect transistor also includes a source region on a first side of the channel region and a drain region on a second side of the channel region opposite the first side. The source and drain regions each comprise silicon germanium, wherein the silicon germanium has structural indicia of epitaxial growth.
US07741657B2 Inverted planar avalanche photodiode
An avalanche photodetector is disclosed. An apparatus according to aspects of the present invention includes a semiconductor substrate layer including a first type of semiconductor material. The apparatus also includes a multiplication layer including the first type of semiconductor material disposed proximate to the semiconductor substrate layer. The apparatus also includes an absorption layer having a second type of semiconductor material disposed proximate to the multiplication layer such that the multiplication layer is disposed between the absorption layer and the semiconductor substrate layer. The absorption layer is optically coupled to receive and absorb an optical beam. The apparatus also includes an n+ doped region of the first type of semiconductor material defined at a surface of the multiplication layer opposite the absorption layer. A high electric field is generated in the multiplication layer to multiply charge carriers photo-generated in response to the absorption of the optical beam received in the absorption layer.
US07741656B2 Semiconductor device and manufacturing the same
A semiconductor device including a MISFET formed in a well at a main surface of a substrate, a second MISFET formed at a main surface of the substrate, and a passive element formed over the main surface of the substrate and having two terminals. A conductive film is formed at a rear face of the semiconductor substrate. The conductive film is connected with a fixed potential and also electrically connected with the conductive film.
US07741653B2 Gallium nitride-based compound semiconductor light-emitting device
A gallium nitride-based compound semiconductor light-emitting device having an n-type semiconductor layer, a light-emitting layer and a p-type semiconductor layer formed in this order on a substrate. Each layer includes a gallium nitride-based compound semiconductor, the light-emitting device has a negative electrode and a positive electrode provided on the n-type semiconductor layer and on the p-type semiconductor layer, respectively, the positive electrode is at least partially formed of a transparent electrically conducting film, the transparent electrically conducting film is at least partially in contact with the p-type semiconductor layer, a semiconductor metal mixed layer containing a Group III metal component is present on the semiconductor side surface of the transparent electrically conducting film, and the thickness of the semiconductor metal mixed layer is from 0.1 to 10 nm.
US07741651B2 Light emitting diode
A light emitting diode includes a base, a light emitting chip, and a wavelength converting layer. The base is formed with a recessed portion that has a bottom wall surface, and a side wall surface extending upwardly from the bottom wall surface and cooperating with the bottom wall surface to define a receiving space. The light emitting chip is provided on the bottom wall surface of the receiving space, and has a top chip surface disposed below a top surface of the base, and a peripheral chip surface extending downwardly from the top chip surface and being substantially parallel to and forming a gap with the side wall surface of the recessed portion. The wavelength converting layer is filled in the receiving space in the recessed portion so as to cover the top chip surface and the peripheral chip surface of the light emitting chip.
US07741649B2 Semiconductor light emitting device and method for manufacturing the same
In a semiconductor light emitting device, a semiconductor light emitting element has a light extracted surface on which a plurality of convex structures is formed. The convex structures each have a conical mesa portion constituting a refractive index gradient structure, a cylindrical portion constituting a diffraction grating structure, and a conical portion constituting a refractive index gradient structure. The mesa portion, cylindrical portion, and conical portion are arranged in this order from the light extracted surface. The period between the convex structures is longer than 1/(the refractive index of an external medium+the refractive index of the convex structures) of an emission wavelength and equal to or shorter than the emission wavelength. The circle-equivalent average diameter of the cylindrical portion is ⅓ to 9/10 of that of the bottom of the mesa portion.
US07741643B2 Thin film transistor
One embodiment of the present invention is a thin film transistor, including: an insulating substrate; a gate electrode, a gate insulating layer and a semiconductor layer including an oxide, these three elements being formed over the insulating substrate in this order, and the gate insulating layer including: a lower gate insulating layer, the lower gate insulating layer being in contact with the insulating substrate and being an oxide including any one of the elements In, Zn or Ga; and an upper gate insulating layer provided on the lower gate insulating layer, the upper gate insulating layer comprising at least one layer; and a source electrode and a drain electrode formed on the semiconductor layer.
US07741640B2 Top-emission organic light-emitting display device
An organic light-emitting display device and a method of fabricating the device are disclosed. The organic light-emitting display device includes a thin-film transistor positioned on a substrate that has a semiconductor layer, a gate electrode, and source and drain electrodes. A first electrode is positioned, which is connected to either the source electrode or drain electrode. A reflective layer, which is spaced apart from the source electrode or drain electrode, is positioned below the first electrode. An organic functional layer having at least an emission layer is positioned on the first electrode. A second electrode is positioned on the organic functional layer. The first electrode, the reflective layer, the organic functional layer, and the second electrode constitute an organic light-emitting diode.
US07741635B2 Composition for organic polymer gate insulating layer and organic thin film transistor using the same
Provided are a composition for an organic polymer gate insulating layer and an Organic Thin Film Transistor (OTFT) using the same. The composition includes an insulating organic polymer including at least one selected from the group consisting of polymethylmethacrylate (PMMA), polyvinylalcohol (PVA), polyvinylpyrrolidone (PVP), poly(vinyl phenol) (PVPh) and a copolymer thereof, a crosslinking monomer having two or more double bonds, and a photoinitiator. The OTFT includes a gate insulating layer of a semi-interpenetrating polymer network formed of the composition. The composition for a photoreactive organic polymer gate insulating layer has a photochemical characteristic that enables micropatterning, and can be formed into a layer having excellent chemical resistance, thermal resistance, surface characteristics and electrical characteristics.
US07741631B2 Phase-changeable memory devices including phase-changeable materials on silicon nitride layers
A phase-changeable memory device includes a substrate having a contact region on an upper surface thereof. An insulating interlayer on the substrate has an opening therein, and a lower electrode is formed in the opening. The lower electrode has a nitrided surface portion and is in electrical contact with the contact region of the substrate. A phase-changeable material layer pattern is on the lower electrode, and an upper electrode is on the phase-changeable material layer pattern. The insulating interlayer may have a nitrided surface portion and the phase-changeable material layer may be at least partially on the nitrided surface portion of the insulating interlayer. Methods of forming phase-changeable memory devices are also disclosed.
US07741628B2 Container for long-term storage of radioactive material, and method and apparatus for manufacturing the container
A long-term storage container (1) for storage of radioactive material to inhibit radioactive radiation therefrom to the outside of the container, the top of said container to be closed by a screw-on radioactive radiation inhibiting lid (7), said container having an integral inner container part (2; 34; 62; 62′) of a first material, e.g. plastic material, an integral outer container part (3; 43; 69) of a second material, e.g. plastic material, and radioactive radiation inhibiting material (4; 38; 68) in an inter-space between the walls and bottoms of said inner and outer container parts. To fill the inter-space an inter-space container part (4; 38; 68) is integrally moulded through injection or pressure moulding and then fitted onto the inner container part (2; 34; 62; 62′) to subsequently mould the outer container part (3; 43; 69) onto the outside of the inter-space container part (4; 38; 68). A specially made container lid (7) is provided. A preferred twin-mould moulding apparatus (61) provides for simultaneous pre-casting of the inner container part (62′) and the outer container part (69) in a respective mould of the apparatus.
US07741626B2 Spectral purity filters and methods therefor
A spectral purity filter arrangement is disclosed. The spectral purity filter arrangement includes a film configured for filtering out at least a portion of input light and a support structure coupled to the film along at least one edge of the film. The spectral purity filter arrangement further includes a gas control subsystem configured to direct a gas at the film to support the film at least when the film is disposed in an operational position to perform the filtering.
US07741625B2 Infrared source
A sealed infrared radiation source includes an emitter membrane stimulated by an electrical current conducted through the membrane, which acts like an electrical conductor, wherein the membrane is mounted between first and second housing parts, at least one being transparent in the IR range, each housing part defining a cavity between the membrane and the respective housing part of each side of the membrane. The housing parts are at least partially electrical conductive, and a first of the housing parts is electrically coupled to a first end of the electrical conductor and insulated from the second end of the electrical conductor, the second housing part being electrically coupled to a second end of the electrical conductor and being insulated from the first end of the electrical conductor, thus allowing a current applied from the first housing part to the second housing part to pass through and heat the membrane.
US07741620B2 Multi-beam modulator for a particle beam and use of the multi-beam modulator for the maskless structuring of a substrate
The invention discloses a multibeam modulator which generates a plurality of individual beams from a particle beam. The particle beam illuminates the multibeam modulator at least partially over its surface. The multibeam modulator comprises a plurality of aperture groups composed of aperture row groups. The totality of all aperture rows defines a matrix of m×n cells, where m cells form a row, and k openings are formed in each row. The density of openings within a row is inhomogeneously distributed.
US07741616B2 EUV light source, EUV exposure equipment, and semiconductor device manufacturing method
A liquid in which fine solid Sn particles are dispersed in a resin is accommodated inside the heated tank 4. The resin pressurized by a pressurizing pump is conducted to a nozzle 1, so that a liquid-form resin is caused to jet from the tip end of the nozzle 1 that is disposed inside a vacuum chamber 7. The liquid-form resin which is caused to jet from the nozzle 1 assumes a spherical shape as a result of surface tension, and is solidified by being cooled in a vacuum, so that a solid-form target 2 is formed. A laser introduction window 10 used for the introduction of laser light is formed in the vacuum chamber 7, and laser light generated from a laser light source 8 disposed on the outside of the vacuum chamber 7 is focused by a lens 9 and conducted into the vacuum chamber 7, so that the target is converted into a plasma, thus generating EUV light.
US07741613B1 Neutron scatter camera
An instrument that will directly image the fast fission neutrons from a special nuclear material source has been described. This instrument can improve the signal to background compared to non imaging neutron detection techniques by a factor given by ratio of the angular resolution window to 4π. In addition to being a neutron imager, this instrument will also be an excellent neutron spectrometer, and will be able to differentiate between different types of neutron sources (e.g. fission, alpha-n, cosmic ray, and D-D or D-T fusion). Moreover, the instrument is able to pinpoint the source location.
US07741597B2 Motion sensor with LED alignment aid
A motion sensor incorporates an internal light source, typically a super bright LED and an optical projection system visible to an observer standing in the motion sensor coverage zone(s) to simplify orientation of the sensor on installation. A multi-lens system or an arrangement of small windows in front of the LED projects a visible light pattern that mimics the detection pattern of the motion sensor to an observer standing in the detection zone and looking at the sensor.
US07741595B2 Light grid for detecting objects in a monitored zone
A light grid detects includes a number of light emitting transmitters. The transmitted light rays of the individual transmitters are imprinted with a code that characterizes the transmitted light rays. The transmitters are activated cyclically and successively. Corresponding receivers aligned with the transmitters form transmitter/receiver pairs. The receivers are activated continuously for reception of the transmitted light rays. An evaluation unit coupled to the receiver outputs generates an object detection signal in dependence on the signals received at the receiver outputs. The received signals are conducted in parallel to evaluation unit inputs. Only the received signals associated with the active transmitter are recorded and stored in the evaluation unit by muting the inputs onto which the signals received by the remaining receivers are conducted. The correctness of the codes transmitted by the transmitters and their sequence are checked in the evaluation unit by evaluating the stored received signals.
US07741591B2 Optically powered drive circuit and method for controlling a semiconductor switch
An optically powered drive circuit and a method for controlling a first semiconductor switch are provided. The optically powered drive circuit includes a photovoltaic cell configured to receive a first light signal from a fiber optic cable and to output a first voltage in response to the first light signal. The optically powered drive circuit further includes an energy storage device electrically coupled to the photovoltaic cell configured to store electrical energy received from the first voltage and to output a second voltage. The optically powered drive circuit further includes an electrical circuit electrically coupled to both the photovoltaic cell and the energy storage device. The electrical circuit is energized by the second voltage. The electrical circuit is configured to receive the first voltage and to output a third voltage in response to the first voltage for controlling operation of the first semiconductor switch.
US07741588B2 Method and device for varying a flight path of a projectile by intentional tumbling of the projectile
A method for varying the flight path of a missile, in particular of a spin-stabilized projectile, which has an outer wall and which is provided with at least one impulse device. The impulse device can be activated deliberately at a defined time during the flight of the missile. The impulse device is arranged with respect to the longitudinal axis of the missile such that, when it is activated, it generates an impulse that initiates a tumbling movement which causes the flight-path of the missile to be shortened or varied. A spin-stabilized projectile is provided with such an impulse device and it is configured so that the impulse device may be triggered during flight so as to initiate the flight-altering tumbling movement.
US07741586B2 Heat transfer device for use in barbeques
The invention relates generally to heat transfer devices for natural gas or propane barbeques. More particularly, the invention relates to the use of a knitted wire mesh with an open loop structure as a heat transfer device in barbeques.
US07741579B2 Flushing lines or cavities of a laser processing machine
Flushing gas lines of a laser processing machine, by supplying a flushing gas to the system in a series of pressure impulses greater than a residual processing gas pressure after completion of a processing sequence, and allowing the supplied flushing gas to expand and mix with any residual gas between successive pressure impulses, to substantially clear the processing gas from the system.
US07741578B2 Gas shielding structure for use in solid free form fabrication systems
A solid free form fabrication (SFF) system and method is used to fabricate a three-dimensional structure in a continuous manner from successive layers of feedstock material. The system includes a gas shielding structure that is configured to protect a targeted region from oxidation. The system further includes a positioning arm coupled to the deposition head and moveable to align the deposition head with a targeted region of the three-dimensional structure and a plurality of control components coupled to the positioning arm for controlling a position of the positioning arm and operation of the deposition head. The gas shielding structure is formed as either a parallelepiped structure or a half disc structure and may be conformable to at least one surface of the three-dimensional structure.
US07741577B2 Modular hybrid plasma reactor and related systems and methods
A device, method and system for generating a plasma is disclosed wherein an electrical arc is established and the movement of the electrical arc is selectively controlled. In one example, modular units are coupled to one another to collectively define a chamber. Each modular unit may include an electrode and a cathode spaced apart and configured to generate an arc therebetween. A device, such as a magnetic or electromagnetic device, may be used to selectively control the movement of the arc about a longitudinal axis of the chamber. The arcs of individual modules may be individually controlled so as to exhibit similar or dissimilar motions about the longitudinal axis of the chamber. In another embodiment, an inlet structure may be used to selectively define the flow path of matter introduced into the chamber such that it travels in a substantially circular or helical path within the chamber.
US07741575B2 Mail piece consolidation and accountability using advanced tracking methods
Mail processing methods and techniques for sorting and commingling mail from various mail sources including the tracking of the mail pieces through processing. Such tracking entails uniquely identifying each mail piece, received in batches from the mail sources, and recording the unique identification of each mail piece. The received mail is sorted and commingled in a first pass, to form first collections, and each first collection is loaded into a uniquely identified mail container. For each respective mail piece, the tracking entails recording an association of the unique identification of one of the mail containers into which it is likely the respective mail piece is sorted on the first pass. After processing is complete, postal and client reports can be adjusted based on actual first pass counts.
US07741571B2 Rotary/push-button controller
The invention relates to a rotary/push-button controller having a controller ring (18) which can be rotated about a rotation axis (7) and is arranged such that it can rotate on a holding cylinder (6) which is arranged coaxially within the control ring (18). In this case, the holding cylinder (6) is provided at its end with an input and/or display field (14), and the control ring (18) and the holding cylinder (6) can be moved axially with respect to the rotation axis (7) against a spring force from a neutral position to a switch position which operates a switching element. The input and/or display field (14) is mounted so that it can rotate about the rotation axis (7). A rotary transmitter ring is arranged coaxially on the control ring (18) and is arranged coaxially alongside a rotary transmitter (17) which is firmly connected to the holding cylinder (6) with the relative rotation position of the rotary transmitter ring with the respect to the rotary transmitter (17) being recordable.
US07741570B2 Small form-factor keyboard using keys with offset peaks and pitch variations
A small form-factor keyboard or keypad for key structures is provided in which individual key structures have a contact surface on which there is a center reference and a peak. The center reference and the peak or offset, so that an offset distance between the center reference and the peak is greater than or equal to zero. The offset distance for at least two or more key structures in the plurality of key structures may different. The difference in the offset distance may be based on a position of the individual key structures relative to a first reference line.
US07741567B2 Integrated circuit package having integrated faraday shield
A packaged integrated circuit (IC) (100) includes a first substrate (110) including a first plurality of layers and first circuit coupling features (112) at an upper surface of the first substrate (110). The first plurality of layers include a first electromagnetic interference shielding layer (132). The packaged IC also includes a second substrate (106) having an upper surface attached to a lower surface of the first substrate (110) by an electrically conductive adhesive material (136). The second substrate (106) includes a second plurality of layers and a second circuit coupling feature (108) at a lower surface of the second substrate (106). The first plurality of layers includes a second EMI shielding layer (134). The packaged IC further includes a functional die (124) disposed between the first (110) and the second (106) substrates and functionally coupled to the first (112) and/or the second (108) circuit coupling features. In the packaged IC, the adhesive material (136) electrically couples the first (132) and the second (134) shielding layers.
US07741565B2 Electronic component and method for manufacturing the same
In conventional electronic components, having a substrate as a component of the structure has been an obstacle to an ultra-low profile design. To address the problem, the present invention provides an improved structure without a substrate. Internal electrode 15 is formed into a predetermined coil pattern. Bumps 16 and irregularities 17 are formed on confronting surfaces of the component, by which each component is hard-to-cling with one another. On the other hand, the confronting side-surfaces with no bumps 16 or irregularities 17 allow a mounting device to have an improved vacuum suction force. Such structured electronic component maintains easy handling even when it is extremely downsized.
US07741561B2 Electrosmog shielding for cable conduit
In combination with a alternating-current-carrying electric power cables and a guide holding the cable. The guide is constructed such that electrical or magnetic radiation emitted by the cable can pass through the guide, an electrosmog shield has a channel formed of a material capable of blocking low-frequency electrical and magnetic radiation and dimensioned to fit with the conduit.
US07741559B2 Photoelectric conversion element
A photoelectric conversion element having a composite dye and an n-type semiconductor, the composite dye having a plurality of component dyes which have different excitation levels and which are chemically bonded to each other to form a straight chain or branched structure for transferring an electron therethrough, wherein the straight chain or branched structure is, at one end thereof, secured to the n-type semiconductor and has, at least at one other end thereof, a free end, wherein, in the straight chain or branched structure, the plurality of component dyes are arranged in an order such that the excitation levels of the plurality of component dyes are decreased as viewed from the one end of the structure toward the at least one other end of the structure.
US07741558B2 Solar cell module
A solar cell module includes a photovoltaic element, a light receiving surface side protective member disposed above a light receiving surface of the photovoltaic element, and a back surface side protective member disposed above a back surface opposite to the light receiving surface side of the photovoltaic element. The photovoltaic element includes an indium oxide layer formed on a surface facing the back surface side protective member and another indium oxide layer formed on a surface facing the light receiving surface side protective member. An arithmetic mean roughness (Ra) on a surface of the indium oxide layer on the back surface of the photovoltaic element is larger than an arithmetic mean roughness (Ra) on the light receiving surface of the photovoltaic element.
US07741552B2 Training drumsticks
The present invention provides drumsticks for training percussionists to use proper form, which may increase learning speed and enable faster and more efficient drum strokes. Each drumstick includes a tip or bead with a wing extending therefrom. The wing extends beyond the width of the shaft of the drumstick so that the percussionist must strike the drum head with wing extending parallel to the drum head surface to achieve a proper and acceptable sound. A grip is also provided to properly orient the user's hands for the matched grip variation desired.
US07741551B2 Instrument stand system and methods for supporting an electronic musical instrument
An electronic percussion instrument stand system includes a hollow pipe structure having a groove and ridge system that allows for wires to be routed along the pipe structure. The exit side of the groove is slightly smaller in diameter than the diameter of the cable which extends through it. The hollow pipe can be constricted or be expanded at the each end of the pipe to allow for a secure hold on the instrument. The hollow pipe connects to a cover that contains reciprocal ridges and grooves that create a strong hold and ease of assembly of the electronic percussion instrument stand system.
US07741549B2 Method of producing parts for woodwind and brass musical instruments using briarwood
The invention relates to a method of producing parts for woodwind and brass musical instruments using briarwood, either from the root or branch thereof, said wood being kept moist from the moment it is cut until it is boiled in water for 16 hours, dried in anaerobic conditions and cured under cover for at least six months and for up to two or more years. The following parts can be thus produced: mouthpiece, tongue, clarinet barrel, flute head or bell. The aforementioned parts, which are not affected by humidity, better produce and carry the sound. In addition, a wide range of sounds is possible, such as jazz, classical, soloist, orchestra and band.
US07741548B2 Method and composition for increasing branching and flowering response in plants
A unique fusion gene is disclosed which is useful for transforming a wide range of plants, resulting in a significant alteration of the plant phenotype with respect to shoot and floral tissue response, but not affecting root growth or function. The gene construct includes an ACC oxidase promoter to drive an ipt coding sequence that expresses IPT at certain stages of plant maturation and in certain tissues of the shoot. Exemplary transformations include chrysanthemum and tobacco, both of which exhibit increased branching in the vegetative shoot and increased bud count in the generative shoot.
US07741547B2 Plants and seeds of hybrid corn variety CH569005
According to the invention, there is provided seed and plants of the hybrid corn variety designated CH569005. The invention thus relates to the plants, seeds and tissue cultures of the variety CH569005, and to methods for producing a corn plant produced by crossing a corn plant of variety CH569005 with itself or with another corn plant, such as a plant of another variety. The invention further relates to genetic complements of plants of variety CH569005.
US07741546B2 Plants and seeds of corn variety CV695186
According to the invention, there is provided seed and plants of the corn variety designated CV695186. The invention thus relates to the plants, seeds and tissue cultures of the variety CV695186, and to methods for producing a corn plant produced by crossing a corn plant of variety CV695186 with itself or with another corn plant, such as a plant of another variety. The invention further relates to corn seeds and plants produced by crossing plants of variety CV695186 with plants of another variety, such as another inbred line. The invention further relates to the inbred and hybrid genetic complements of plants of variety CV695186.
US07741542B2 Canola oil having increased oleic acid and decreased linolenic acid content
An endogenous oil extracted from Brassica seeds is disclosed that contains, after crushing and extraction, greater than 86% oleic acid and less than 2.5% α-linolenic acid. The oil also contains less than 7% linoleic acid. The Brassica seeds are produced by plants that contain seed-specific inhibition of microsomal oleate desaturase and microsomal linoleate desaturase gene expression. Such inhibition can be created by cosuppression or antisense technology. Such an oil has a very high oxidative stability in the absence of added antioxidants.
US07741541B2 Method for obtaining improved fertility restorer lines for transgenic male sterile crop plants and a DNA construct for use in said method
A method for obtaining improved fertility restorer lines for male sterile crop plants and a DNA construct for use in said method are disclosed. The invention relates to the simultaneous use of two different gene sequences encoding the same protein product, one being the naturally occurring wild type sequence and the other sequence being generated by modification of the wild type sequence for expression in crop plants by using codon degeneracy to avoid homology between the two sequences at the DNA and mRNA levels, each of the said sequences being placed under independent transcriptional control of different overlapping plant tissue-specific regulatory elements in the same DNA construct.
US07741540B2 Compositions comprising D-amino acids
This invention relates to fertilizer and herbicide compositions. The present invention provides a composition for selective fertilization of a transgenic plant comprising a polypeptide which metabolizes a D-amino acid substrate; said composition comprising said D-amino acid substrate. Another aspect of the present invention provides a selective herbicide composition comprising a D-amino acid. Such a herbicide will inhibit or reduce the growth of plants which do not contain the appropriate D-amino acid metabolizing enzyme, while the growth of transgenic plants which are able to metabolize the D-amino acid will be unaffected or, more preferably, be increased or enhanced. Methods and means are also provided for selectively modulating the growth and stress tolerance such plants using D-amino acids. The methods can be used either for detoxification of phytotoxic D-amino acids such as D-alanine and D-serine, thereby allowing for selection of plants comprising said D-amino acid metabolizing enzymes, or for enhancing toxicity of lesser phytotoxic D-amino acids such as D-isoleucine, thereby allowing for selection of plants not comprising said D-amino acid metabolizing enzymes.
US07741534B2 Cytokinin oxidase promoter from maize
The present invention provides compositions and methods for regulating expression of nucleotide sequences in a plant. Compositions may comprise a novel nucleic acid sequence for a promoter with tissue specificity and/or cytokinin inducibility. A method for expressing a heterologous nucleotide sequence in a plant using the promoter sequence is also provided. The method comprises transforming a plant cell to contain a heterologous nucleotide sequence operably linked to the promoter of the present invention and regenerating a stably transformed plant from the transformed plant cell. Other methods provide for downregulation of cytokinin oxidase in a plant.
US07741532B2 Diacylglycerol acyl transferase proteins
The invention provides diacylglycerol acyltransferase (DAGAT) proteins, wherein said proteins are active in the formation of triacylglycerol from fatty acyl and diacylglycerol substrates. In one aspect, Mortierella ramanniana DAGAT proteins have been isolated and have molecular weights of between approximately 36 and 37 kDa as measured by SDS-PAGE. The invention also provides novel DAGAT polynucleotide and polypeptide sequences and to methods of producing such polypeptides using recombinant techniques. In addition, methods are provided for using such sequences to alter triacylglycerol levels in plants and to treat diseases associated with altered DAGAT activity or expression.
US07741528B2 Method of separating condensed liquid from an olefin stream
This invention is to a process for separating condensed water and entrained solids from an olefin stream so that fouling of the separation equipment by the entrained solids is reduced or eliminated. The process involves injecting an antifouling agent into a water condensing or quench system in an amount to maintain a zeta potential of fouling liquid and a zeta potential of the surface of the quench system both in a positive range or both in a negative range.
US07741527B2 Solid phosphoric acid catalyst and method for dimerization of olefin using the same
The present invention provides a solid phosphoric acid catalyst which attains high activity and dimer selectivity in olefin dimerization reaction and an efficient method for dimerization of olefin using the same. The solid phosphoric acid catalyst comprises phosphoric acid supported on a siliceous carrier, the proportion of orthophosphoric acid in the phosphoric acid supported being 60 mol % or more in terms of phosphorus atom amount. The solid phosphoric acid catalyst is prepared by bringing a phosphoric acid aqueous solution into contact with the siliceous carrier followed by drying, the preparation step being carried out at a temperature lower than 100° C. Also provided is a method for bringing an olefin-containing raw material into contact with the catalyst. In this method, the olefin-containing raw material contains water in an amount of 10 to 1000 mass ppm, the olefin-containing raw material is brought into contact with the solid phosphoric acid catalyst in a liquid phase, and the olefin is a monoolefin having 3 to 7 carbon atoms.
US07741518B2 Method for producing trifluoromethanesulfonic anhydride
This method for producing trifluoromethanesulfonic anhydride reacting trifluoromethanesulfonic acid with phosphorus pentoxide to produce trifluoromethanesulfonic anhydride, wherein hardening of the reaction solution due to polyphosphoric acid, which is produced as a byproduct, is prevented by using an excess amount of trifluoromethanesulfonic acid with respect to the phosphorus pentoxide.
US07741513B2 Thioacids and thioacid salts for determining the enantiomeric excess of chiral compounds containing an electrophilic carbon center
The invention provides novel chiral compounds including 2-methoxy-2-trifluoromethylphenylacetic thioacid useful to react with and analyze other chiral compounds that have an electrophilic chiral carbon center.
US07741512B2 Process for the preparation of carbonylation products
Process for preparing an aliphatic carboxylic acid having (n+1) carbon atoms, where n is an integer up to 6, and/or the ester derivative thereof by contacting an aliphatic alcohol having n carbon atoms and/or a reactive derivative thereof selected from dialkyl ether, ester of the alcohol and an alkyl halide with carbon monoxide in the presence of a catalyst. The catalyst consists of mordenite which has been ion- exchanged or otherwise loaded with silver.
US07741511B2 Process for the preparation of carboxylic acid esters
There is provided a process for preparing a carboxylic acid ester of formula (3): R2COOR1  (3) wherein R1 is an alkyl group which may be substituted, an alkenyl group which may be substituted, an alkynyl group which may be substituted, an aralkyl group which may be substituted, or a heteroarylalkyl group which may be substituted, and R2 is an alkyl group which may be substituted, an alkenyl group which may be substituted, an alkynyl group which may be substituted, an aryl group which may be substituted, a heteroaryl which may be substituted, an aralkyl group which may be substituted, or a heteroarylalkyl group which may be substituted, which process is characterized by the steps of reacting a monohydroxy compound of formula (1): R1OH  (1) wherein R1 is as defined above, with a zirconium compound of formula (6): Zr(OR8)4  (6) wherein R8 is an alkyl group or an aryl group which may be substituted and is not the same as R1, to prepare a zirconium catalyst, and reacting a carboxylic acid of formula (2): R2COOH  (2) wherein R2 is as defined above, with the monohydroxy compound of formula (1) in the presence of the zirconium catalyst.
US07741510B2 Rheology control agents
The present invention provides for a rheology control agent that includes a following compound represented by the following formula: wherein A, B, C and D equal CH2, CHR, NH, or O, and A, B, C and D may be the same or different and at least one of A and B equals NH and at least one of C and D equals NH; and wherein R1, R2, and R3 may be the same or different and represent a linear, branched, hyper-branched, or dendritic ether, polyether or hydrocarbon based chain, optionally forming at least one carbon-based ring, being saturated or unsaturated and R2 represents linear or branched alkylenes, ethers, polyethers, or polyester linkages and at least one of R1, R2, and R3 comprises an ester group or an amide group which is branched off from the main chain; excluded from Formula (1) is a compound wherein R2 is CH2—CH2—CH2—CH2—CH(C(O)OCH3), A, B, C, and D are equal to NH and R1 and R3 are both equal to a linear octyl hydrocarbon chain; the rheology control agent is suitable for solvent-borne and water-borne coating composition having improved rheology control useful for OEM refinishing or repainting the exterior of automobile and truck bodies and parts thereof.
US07741505B2 Bisbiphenylacylphosphine oxide and preparation method therefore
A bisbiphenylacylphosphine oxide of formula (I) and its preparation method are provided. The formula of —Ar— is First, 10-chloro-9,10-dihydro-9-oxa-10-phosphaphenanthrene (CDOP) is prepared by using 2-phenylphenol, and then is esterified to synthesize 6-methoxy-(6H)-dibenz[c,e][1,2]oxa-phosphorin (MDOP). Next, acid chloride compounds are added for performing the Arbuzov reaction to synthesize bisbiphenylacylphosphine oxide. CDOP is hydrolyzed to be derived into 9,10-dihydro-9-oxa-10-phosphaphen-anthrene-10-oxide (DOPO), and then DOPO reacts with arylaldehyde to form secondary alcohol. Therefore, bisbiphenylacylphosphine oxide is prepared by using secondary alcohol under oxidation. Also, under a coupling reaction, DOPO reacts with the acid chloride compounds by using a Lewis acid as a catalyst to prepare bisbiphenylacylphosphine oxide.
US07741500B2 Processes for preparation of oil compositions
The present invention is directed to processes for preparing oil compositions having a high concentration of poly-unsaturated fatty acids and oil compositions having a low concentration of α-linolenic acid. In addition, the present invention is directed to processes for preparing oil compositions having advantageous stability characteristics.
US07741498B2 Propylene oxide process
A process for making propylene oxide from propylene is disclosed. The process comprises reacting propylene, oxygen, and hydrogen in the presence of a catalyst and a solvent to produce a reaction mixture comprising propylene oxide. Separation of propylene, oxygen, hydrogen, and propylene oxide from the reaction mixture results in a residual mixture comprising methanol. A portion of the residual mixture is recycled to the reaction. A portion of the residual mixture is distilled to generate a distilled methanol stream, which is recycled to the reaction.
US07741497B2 Processes for preparing alkyl 3-(4-tetrahydropyranyl)-3-oxopropanoate compound and 4-acyltetrahydropyrane
The present invention is to provide a process for preparing an alkyl 3-(4-tetrahydropyranyl)-3-oxopropanoate compound represented by the formula (1): wherein R1 and R2 may be the same or different from each other, and represent a group which does not participate in the reaction, and R1 and R2 may be bonded to form a ring, and the ring may contain a hetero atom(s), and R3 represents a hydrocarbon group, which comprises reacting 4-acyltetrahydropyran represented by the formula (2): wherein R1 and R2 have the same meanings as defined above, and a carbonic acid diester represented by the formula (3): wherein R3 has the same meanings as defined above, and two R3s may be bonded to each other to form a ring, in the presence of a base, and a process for preparing 4-acyltetrahydropyran.
US07741496B2 Ascorbic acid derivatives
The present invention discloses the ascorbic acid derivatives. The inventive molecules that combine with one or two hydrophilic headgroups connected by a hydrophobic spacer can increase skin penetration.
US07741491B2 Diphenylamine-substituted salicylthiazole derivatives and related compounds as phosphotyrosine phosphatase 1B (PTB1B) inhibitors for using as blood-sugar decreasing active ingredients for treating diabetes
The invention therefore relates to compounds of the formula I in which the variables are as defined in the specification, to pharmaceutical compositions containing them and to their use for therapeutically lowering blood glucose levels.
US07741489B2 Process for the synthesis of solifenacin
The present invention provides an improved synthetic strategy for the preparation of solifenacin and pharmaceutically acceptable salts thereof.
US07741485B2 Benzenesulphonamide derivatives as herbicides or desiccant/defoliant compounds
The invention relates to benzenesulphonamide derivatives of formula (I), methods and intermediate products for production thereof and use of said compounds, or means comprising said compounds for the control of undesired plants and for the desiccation/defoliation of plants.
US07741481B2 Method for producing pure melamine
The invention relates to a method for producing pure melamine by preparing a melamine melt, which is obtained in a high pressure process and from which the reaction gases are removed. Said method is characterized in that the melamine melt is quenched by water with a purity in excess of 95 wt. %, that NH3 and CO2 are subsequently removed from the obtained melamine solution and that alkali is added to said melamine solution and the mixture is then left to rest, whereby pure melamine is obtained by crystallization. Thus a melamine can be obtained with the same quality as that produced in known comparative methods, using smaller quantities of alkali.
US07741480B2 Process for the preparation of linezolid and related compounds
The present invention provides a novel process for preparation of 5-aminomethyl substituted oxazolidinones, key intermediates for oxazolidinone antibacterials including linezolid. Thus linezolid is prepared by a) reacting 3-fluoro-4-morpholinyl aniline with R-epichlorohydrin; b) subjecting N-[3-Chloro-2-(R)-hydroxypropyl]-3-fluoro-4-morpholinyl aniline produced above to carbonylation; c) reacting (5R)-5-(chloromethyl)-3-[3-fluoro-4-(4-morpholinyl)phenyl]-2-oxazolidinone produced above with potassium phthalimide; d) reacting (S)-N-[[3-[3-Fluoro-4-[4-morpholinyl]phenyl]-2-oxo-5-oxazolidinyl]methyl]phthalimide produced above with hydrazine hydrate; and e) reacting S-N-[[3-[3-Fluoro-4-[4-morpholinyl]phenyl]-2-oxo-5-oxazolidinyl]methyl]amine produced above with acetic anhydride to produce linezolid.
US07741479B2 Urea inhibitors of MAP kinases
The present invention is directed to a compound having the formula wherein R1, R2, G, and Q are defined herein. The compounds of the present invention are useful as inhibitors of protein kinases such as MAP kinases, in particular p38 kinases. The present invention is also directed to compositions comprising a compound according to the above formula. The compounds and compositions described herein are useful for treating and preventing an inflammatory condition or disease. The present invention is also directed to a method of treating or preventing a protein kinase-mediated condition.
US07741477B2 Process for purification of sucralose
The present invention relates to a process for the purification of Sucralose of formula (I) which comprises acetylation of substantially impure Sucralose to its penultimate intermediate 4,1′,6′-trichloro-4,1′,6′-trideoxy galactosucrose penta-acetate (TOPSA) of formula (VI) followed by purification of TOPSA and then deacetylation of purified TOPSA.
US07741475B2 Synthesis of monovalent and polyvalent arabinans and mannose-capped arabinans of the protective cell-wall coat of mycobacterium tuberculosis
The present application provides arabinans and mannose-capped arabinan compositions of formulas I-VIII, described herein, and methods of making the compositions.
US07741472B2 Polynucleotide containing a phosphate mimetic
The present invention concerns modified oligonucleotides and processes for their production wherein these oligonucleotides contain at least once the structure P═N-Acc where Acc is an electron acceptor or an electron acceptor substituted with a residue R and R is any organic substituent.
US07741466B2 Polypeptides having cellulolytic enhancing activity and nucleic acids encoding same
The present invention relates to isolated polypeptides having cellulolytic enhancing activity and isolated polynucleotides encoding the polypeptides. The invention also relates to nucleic acid constructs, vectors, and host cells comprising the polynucleotides as well as methods for producing and using the polypeptides.
US07741465B1 Chimeric receptor genes and cells transformed therewith
Chimeric receptor genes suitable for endowing lymphocytes with antibody-type specificity include a first gene segment encoding a single-chain Fv domain of a specific antibody and a second gene segment encoding all or part of the transmembrane and cytoplasmic domains, and optionally the extracellular domain, of an immune cell-triggering molecule. The chimeric receptor gene, when transfected to immune cells, expresses the antibody-recognition site and the immune cell-triggering moiety into one continuous chain. The transformed lymphocytes are useful in therapeutic treatment methods.
US07741463B2 Method of preparing libraries of template polynucleotides
The present invention relates to a method for preparing a library of template polynucleotides and use thereof in methods of solid-phase nucleic acid amplification. More specifically, the invention relates to a method for preparing a library of template polynucleotides that have common sequences at their 5′ ends and at their 3′ ends.
US07741461B2 Nucleic acid probes and methods for detecting clinically important fungal pathogens
The current invention relates to the field of detection and identification of clinically important fungi. More particularly, the present invention relates to species specific probes originating from the Internal Transcribed Spacer (ITS) region of rDNA for the detection of fungal species such as Candida albicans, Candida parapsilosis, Candida tropicalis, Candida kefyr, Candida krusei, Candida glabrata, Candida dubliniensis, Aspergillus flavus, Aspergillus versicolor, Aspergillus nidulans, Aspergillus fumigatus, Cryptococcus neoformans and Pneumocystis carinii in clinical samples, and methods using said probes.
US07741452B2 Glycosylation-deficient hepatocyte growth factor
The invention provides a modified glycosylation-deficient HGF and a production method thereof. The glycosylation-deficient HGF is produced by introducing amino acid mutation(s) so that no glycosylation take place at at least one glycosylation site of hepatocyte growth factor.
US07741450B2 Antibodies to GM-CSF
Hybridoma lines that secrete human monoclonal antibodies with high binding specificity and biological activity, particularly neutralizing activity against granulocyte-macrophage colony stimulating factor, and methods of generating the hybridoma lines are provided. Target antigens and epitopes are also provided. The antibodies may be used in therapeutic methods, for example in the treatment of cancer, infectious disease, or autoimmune disease.
US07741449B2 Anti-interferon alpha antibodies
The present invention provides isolated anti-interferon alpha monoclonal antibodies, particularly human monoclonal antibodies, that inhibit the biological activity of multiple interferon (IFN) alpha subtypes but do not substantially inhibit the biological activity of IFN alpha 21 or the biological activity of either IFN beta or IFN omega. Immunoconjugates, bispecific molecules and pharmaceutical compositions comprising the antibodies of the invention are also provided. The invention also provides methods for inhibiting the biological activity of IFN alpha using the antibodies of the invention, as well as methods of treating disease or disorders mediated by IFN alpha, such as autoimmune diseases, transplant rejection and graft versus host disease, by administering the antibodies of the invention.
US07741446B2 Fusion antibodies that cross the blood-brain barrier in both directions
The invention provides diagnostic and therapeutic macromolecular compositions that cross the blood-brain barrier, in some embodiments in both directions, while allowing their activity to remain substantially intact once across the barrier. Also provided are methods for using such compositions in the diagnosis or treatment of CNS disorders such as Alzheimer's disease.
US07741443B2 Binding molecules for the treatment of myeloid cell malignancies
The present invention provides a human C-type lectin, binding molecules that specifically bind to the human C-type lectin, nucleic acid molecules encoding the binding molecules or the human C-type lectin, compositions comprising the binding molecules or the human C-type lectin and methods of identifying or producing the binding molecules. The human C-type lectin is specifically expressed on myeloid cells and binding molecules capable of specifically binding to the human C-type lectin can be used in the diagnosis, prevention and/or treatment of neoplastic disorders and diseases.
US07741439B2 Isolated stra6 polypeptides
The present invention is directed to novel polypeptides having sequence similarity to Stra6, a murine retinoic acid responsive protein, and to nucleic acid molecules encoding those polypeptides. Also provided herein are vectors and host cells comprising those nucleic acid sequences, chimeric polypeptide molecules comprising the polypeptides of the present invention fused to heterologous polypeptide sequences, antibodies which bind to the polypeptides of the present invention and to methods for producing the polypeptides of the present invention.
US07741436B2 Biologically active peptides and their use for repairing injured nerves
The present invention relates to biologically active peptides derived from the neurite outgrowth-promoting domain of laminin-1, i.e. the γ1-chain of laminin-1. These peptides include the decapeptide RDIAEIIKDI (SEQ ID NO: 1) and the truncated peptides derived therefrom comprising the biologically active domain thereof, the tripeptide KDI. The invention is directed to the biologically active tripeptide motif KDI, and to its use in promoting regeneration of neuronal or non-neuronal tissues and, in specific, to its use in the treatment of spinal cord injuries.
US07741434B2 High-affinity antagonists of ELR-CXC chemokines
The present invention provides novel polypeptide sequences, methods for production thereof and uses thereof for novel ELR-CXC chemokine receptor agonists and antagonists.
US07741432B2 Substrate for Rpn11 enzymatic activity
The present application provides peptides that serve as substrates for proteasome enzymatic activity, e.g., the enzymatic activity of Rpn11, a metalloprotease of the 19S regulatory particle. The present application also provides methods and compositions employing the peptide substrates.
US07741428B2 Method for producing a borohydride
A method for producing a borohydride is described that includes the steps of providing a source of borate; providing a material that chemically reduces the source of the borate to produce a borohydride; and reacting the source of the borate and the material by supplying heat at a temperature that substantially effects the production of the borohydride.
US07741421B2 Methods for producing macromolecule-identifying polymers
The methods for producing macromolecule identifying polymers according to the present invention comprise the steps of polymerizing a starting monomer in an aqueous solution in the presence of a macromolecule, a crosslinking agent, and a radical polymerization initiator to produce a polymer containing the macromolecule in its interior; and removing the macromolecule from the polymer containing the macromolecule to thereby produce the macromolecule identifying polymer having a molecular imprint of the macromolecule. In this method, the crosslinker has a solubility in water at 25° C. of 100% by mass or higher.
US07741411B2 Carboxyl group-containing polyurethane and heat-curable polyurethane resin composition
A carboxyl group-containing polyurethane is capable of giving cured products excellent in adhesion with substrates, low warpage, flexibility, plating resistance, soldering heat resistance and long-term reliability. The carboxyl group-containing polyurethane includes a structure derived from a polyol compound having 1 to 10 hydroxyl groups and 18 to 72 carbon atoms per molecule. The carboxyl group-containing polyurethane is produced by reacting: (A) a polyisocyanate compound; (B) a polyol compound having 1 to 10 hydroxyl groups and 18 to 72 carbon atoms per molecule; and (C) a carboxyl group-containing dihydroxy compound (other than the compound (B)).
US07741410B2 Epoxidation of isobutene polymers
A process is described for epoxidizing an ethylenically unsaturated isobutene polymer, in which an organic phase comprising the isobutene polymer is contacted with an aqueous phase which comprises formic acid and hydrogen peroxide. The process affords essentially quantitative conversions after a short reaction time.
US07741407B2 Catalyst compositions comprising chain shuttling agents and the use thereof to produce golf ball compositions
The present invention is directed to golf balls having at least one layer which comprises a polymer produced by a process wherein one or more monomers are contacted with a composition comprising the admixture or reaction product resulting from combining (A) a first olefin polymerization catalyst, (B) a second olefin polymerization catalyst capable of preparing polymers differing in chemical or physical properties from the polymer prepared by the first olefin polymerization catalyst under equivalent polymerization conditions, and (C) a chain shuttling agent. Golf balls of the present invention include one-piece, two-piece, and multi-layer golf balls. In two-piece and multi-layer golf balls of the present invention, the polymer may be present in a core layer, a cover layer, an intermediate layer (in the case of multi-layer balls), or a combination thereof.
US07741403B2 PVC plastisols comprising effect pigments, their preparation and use in coil coating
Disclosed herein are effect pigment PVC plastisol, uses thereof, and proceses for producing effect pigment PVC plastisol. In one embodiment, an effect pigment PVC plastisol comprises: (A) at least one finely divided PVC homopolymer having particle sizes of from 0.04 to 40 μm, and which as a dispersion in a plasticizer exhibits dilatancy, (B) at least one finely divided PVC homopolymer having particle sizes of from 1 to 400 μm, and which as a dispersion in a plasticizer exhibits pseudoplasticity, (C) at least one plasticizer, and (D) at least one effect pigment.
US07741402B2 Thickener composition and method for thickening aqueous systems
A composition and method whereby the same group that is attached to or within the backbone of an associative thickener is reversibly switched between being hydrophilic and hydrophobic in nature. When the group that is attached to or within the backbone is rendered hydrophilic, the aqueous thickener is pourable and readily incorporated into aqueous polymer compositions. When this group is rendered hydrophobic, the thickener performs its thickening function efficiently. Switching is readily accomplished by adjusting the pH of the associative thickener composition and the aqueous polymer composition being thickened.
US07741396B2 Composites having tunable dielectric constants, methods of manufacture thereof, and articles comprising the same
Disclosed herein is a composition comprising a polymeric material; and non-linear dielectric ceramic fillers; wherein the non-linear dielectric ceramic fillers have a dielectric constant that is greater than or equal to about 100 and wherein the dielectric constant of the composition is tunable. Disclosed herein too is a composition comprising a polymeric material; and perovskites; wherein the dielectric constant of a composition is tunable and further wherein the composition has a dielectric constant of about 2 to about 100. Disclosed herein too is a method comprising blending a polymeric resin with non-linear dielectric ceramic fillers to form a composition; wherein the non-linear dielectric ceramic fillers have a dielectric constant of greater than or equal to about 100 and wherein the dielectric constant of the composition is tunable.
US07741395B2 Low volatile organic content viscosity reducer
Low VOC viscosity reducer (LVVR) compounds useful for reducing the viscosity of plastisol compositions. The plastisol compositions are combined with a viscosity reducing compound which is derived from the reaction of at least one of 2,2,4-trimethyl-1,3-pentane diol (TMPD) and 2,2,4-trimethyl-1,3-pentanediol monoisobutyrate (TXOL) with at least one of a carboxylic acid or a fatty acid.
US07741394B2 Rubber composition and uses thereof
It is an object of the present invention to provide a rubber composition which has been improved in mechanical properties with maintaining excellent various properties and is favorably used for a fuel cell sealing member, a hard disc drive top cover gasket member and an electric wire connector sealing member. It is another object of the present invention to provide main bodies mounted with the above respective members obtained by the use of the rubber composition. The rubber composition of the invention comprises a specific ethylene/α-olefin/non-conjugated polyene copolymer in which the non-conjugated polyene is a norbornene-based compound, a specific SiH group-containing compound, and if necessary, an organopolysiloxane. Such a rubber composition of the invention is excellent in mechanical properties and can be particularly favorably used for a fuel cell sealing member, a hard disc drive top cover gasket, an electric wire connector sealing member, etc.
US07741392B2 Rubber compositions having improved physical and low temperature properties
The present invention relates to an elastomer rubber composition containing a carboxylated rubber polymer and a fluorinated additive. The present invention is also directed to an elastomer composition containing a hydrogenated carboxylated nitrile rubber and a fluorinated additive.
US07741391B2 Silica-filled elastomeric compounds
The present invention relates to silica-filled halogenated butyl elastomers, such as bromobutyl elastomers (BIIR). Further, the present invention also relates to bromobutyl elastomers with improved scorch safety.
US07741390B2 Coordination-polymeric triethanolamineperchlorato(triflato)metal inner complexes as additives for synthetic polymers
Stabilizer system for chlorinated polymers, especially PVC, comprising at least one coordination-polymeric triethanolamineperchlorato(triflato)metal inner complex comprising the monomer unit of the formula (A) The stabilizer system may additionally comprise substituted cyanoacetylureas or/and 6-aminouracils or/and 3-aminocrotonic esters or/and hydantoins or/and monomeric or polymeric dihydropyridines or alkaline earth metal hydroxides or/and hydrotalcites or/and dawsonites or/and zeolites or/and glycidyl compounds or/and cyanamides or/and cyanoguanidines or/and melamines. In addition, phosphites or/and sterically hindered amines or/and NOR-HALS compounds may be present.
US07741388B2 Epoxy resin composition and semiconductor device
The present invention is to provide an epoxy resin composition for encapsulating a semiconductor having a high flame resistance without using a flame retarder and having an excellent solder reflow resistance, and a semiconductor device using the same for encapsulating a semiconductor element. An epoxy resin composition for encapsulating a semiconductor of each of the first, second and third aspects essentially comprises (A) a phenol aralkyl type epoxy resin having a phenylene structure, (B) a phenol aralkyl type phenolic resin having a biphenylene structure and (D) an inorganic filler as common components, wherein (D) the inorganic filler is contained at the rate of 84 wt % or more and 92 wt % or less of the total amount of the epoxy resin composition.
US07741382B2 Rubber composition for tread and tire having tread using same
The present invention provides a rubber composition for a tread which can improve both of grip performance and rolling resistance in good balance and a tire having a tread prepared by using it. The rubber composition for a tread of the present invention contains 30 to 80 parts by weight of a silica having a pH of 7.1 to 12.0 when dispersed in water to prepare a 5% aqueous dispersion; and not more than 10 parts by weight of a carbon black on the basis of 100 parts by weight of a rubber component comprising an epoxidized natural rubber and the tire of the present invention has a tread prepared by using the rubber composition.
US07741374B1 Methods of use of fenofibric acid
Fenofibric acid formulations comprising 105 mg of fenofibric acid are described as well as methods of use thereof. Dosage forms include, for example, immediate-release dosage forms.
US07741366B2 Low pH pharmacologically active products and methods for the production thereof
There is provided a new technology that will allow the formulation of pharmaceutically active organic acid products at relatively high pH during storage. This affords the advantages of avoiding formulation with the acid form of the product, yet when the product is used, the pH will be reduced via a chemical reaction, thus forming the organic acid which is the active form of the product. A by-product of the reaction is a significant increase in temperature, thus adding to the efficacy of the organic acid.
US07741363B2 3-Acylindole derivatives, preparation and therapeutic use thereof
The invention relates to compounds of formula (I), wherein X, R1, R2, R3, R4 and R5 are as described herein. The invention also includes preparative methods for the preparation of compounds of formula (I). A method for the therapeutic use of the inventive compounds is also disclosed and claimed.
US07741361B2 Glucocorticoid mimetics, methods of making them, pharmaceutical compositions, and uses thereof
Compounds of Formula (I) wherein R1, R2, R3, R4, R5, R6, and R7 are as defined herein, or a tautomer, prodrug, solvate, or salt thereof; pharmaceutical compositions containing such compounds, and methods of modulating the glucocorticoid receptor function and methods of treating disease-states or conditions mediated by the glucocorticoid receptor function or characterized by inflammatory, allergic, or proliferative processes in a patient using these compounds.
US07741359B2 Hydrogen sulfide derivatives of non-steroidal anti-inflammatory drugs
The present invention relates to derivatives of non-steroidal anti-inflammatory drugs (NSAIDs) having improved anti-inflammatory properties useful in the treatment of inflammation, pain and fever. More particularly, NSAIDs are derivatized with a hydrogen sulfide (H2S) releasing moiety to produce novel anti-inflammatory compounds having reduced side effects.
US07741358B2 Crystal form of asenapine maleate
The invention relates to an orthorhombic crystal form of compound trans-5-chloro-2,3,3a,12b-tetrahydro-2-methyl-1H-dibenz [2,3:6,7]oxepino[4,5-c]pyrrole (Z)-2-butenedioate, to methods for the preparation of this crystal form and to pharmaceutical compositions comprising an orthorhombic crystal form.
US07741357B1 Heterocyclic and carbonate derivatives of NDGA and their use as new anti-HIV and anti-cancer agents
Reaction of nordihydroguaiaretic acid with various alkyl chlorides, 1-piperidinecarbonyl chloride, methyl chloroformate, or 1,1′-carbonyldiimidazole under alkaline conditions produced the corresponding phenol ethers, carbamates and carbonates, respectively, in 67-83% yields (Scheme 1 and Scheme 2). Among these derivatives, the nitrogen-containing compounds were converted to the corresponding hydrochloride salts. Having good solubility, these NDGA derivatives were found to be stable in aqueous solution. These new compounds exerted potent activities against HIV Tat-regulated transactivation in cos-7 cells. The most active transcription inhibitor compound of this series 5b (P4N, Tetrapiperidino NDGA, meso-2,3-dimethyl-1,4-bis(3,4-[2-(piperidino)ethoxyphenyl])butane tetrakishydrochloride salt) has an IC50 of 0.88 μM.
US07741353B2 Lead-free primary explosives
Lead-free primary explosives of the formula (cat)Y[MII(T)X(H2O)6-X]Z, where T is 5-nitrotetrazolate, and syntheses thereof are described. Substantially stoichiometric equivalents of the reactants lead to high yields of pure compositions thereby avoiding dangerous purification steps.
US07741351B2 Compounds which potentiate glutamate receptor and uses thereof in medicine
This case discloses compounds of formula (I) wherein R1 is C1-6alkyl, haloC1-6alkyl, C2-6alkenyl, amino, monoC1-4alkylamino or diC1-4alkylamino; R2 and R3, which may be the same or different, are hydrogen, halogen, C1-6alkyl, haloC1-6alkyl, C1-4alkoxy, haloC1-4alkoxy, cyano or amino; each R4, which may be the same or different, is C1-6alkyl, halogen, haloC1-6alkyl, C1-4alkoxy, haloC1-4alkoxy, cyano, nitro or amino; p is 0, 1 or 2; each R5, which may be the same or different, is C1-6alkyl, halogen, haloC1-6alkyl, C1-4alkoxy, haloC1-4alkoxy, cyano, nitro or amino; q is 0, 1 or 2; R6 is —NR6aSO2R6b, —NR6aC(═O)R6b, —NR6a(C═O)N(R6c)2, —(C═O)R6d, —CH2NR6aSO2R6b, —CH2NR6aC(═O)R6b, CH2NR6a(C═O)N(R6c)2 or —CH2(C═O)R6d; where R6a and each R6c, which may be the same or different, is hydrogen or C1-6alkyl; R6b and R6d are C1-6alkyl or haloC1-6alkyl; or R6a and R6b, or R6a and R6c, together with the interconnecting atoms, may form a 5- or 6-membered ring; n is 1 or 2; and R7 and R8, which may be the same or different, are hydrogen, halogen, C1-6alkyl, haloC1-6alkyl, C1-4alkoxy, haloC1-4alkoxy, cyano or amino. It also discloses methods for preparing the compounds and their use in therapy such as treating schizophrenia.
US07741344B2 Process for preparing purified S-BEL and R-BEL and compositions thereof
A process for resolution of racemic BEL into its individual enantiomeric constituents by chiral HPLC. A method for determining the role of specific isoforms of iPLA2 in biologic processes.
US07741342B2 Water-soluble thalidomine derivatives
Thalidomide derivative (I) and their bases or salts are new: where R represents CHR1NR2R3, CHR1NR4C(O)CHR5NR2R3, W or CHR5NR4C(O)W, where R1, R4 and R5 represent independently each other H, C1-4 alkyl, R2 is a C1-4 alkyl, R3 is a C1-4 alkyl, or R2 and R3 together represents 1,3-propylene, 1,4-butylene, 1,5-pentylene, 1,6-hexylene, W represents 4-, 5-, 6-, 7-, or 8-mumbered, saturated or unsaturated heterocycle. The invention also relates to processes of production thereof and the use of thereof as an active pharmaceutical ingredient.
US07741341B2 Benzimidazole-derivatives as factor Xa inhibitors
The present invention relates to compounds of the formula I, wherein R0, R1, R2, Q, V, G and M are as defined herein. The compounds of the formula I are valuable pharmacologically active compounds. They exhibit a strong antithrombotic effect and are suitable, for example, for the therapy and prophylaxis of cardiovascular disorders like thromboembolic diseases or restenoses. They are reversible inhibitors of the blood clotting enzymes factor Xa (FXa) and/or factor VIIa (FVIIa), and can in general be applied in conditions in which an undesired activity of factor Xa and/or factor VIIa is present or for the cure or prevention of which an inhibition of factor Xa and/or factor VIIa is intended. The invention furthermore relates to processes for the preparation of compounds of the formula I, their use, in particular as active ingredients in pharmaceuticals, and pharmaceutical preparations comprising them.
US07741338B2 Macrolides
The invention relates to the stabilization of poly-ene macrolides and to a particular macrolide obtained in crystalline form.
US07741327B2 Pyrrolidinone glucokinase activators
Provided herein are compounds of the formula (I): as well as pharmaceutically acceptable salts thereof, wherein the substituents are as those disclosed in the specification. These compounds, and the pharmaceutical compositions containing them, are useful for the treatment of metabolic diseases and disorders such as, for example, type II diabetes mellitus.
US07741326B2 Indole and benzofuran 2-carboxamide derivatives and uses thereof
Compounds of formula I or formula II: or pharmaceutically acceptable salts thereof, wherein m, n, p, Ar R1, R2, R4, and R5 are as defined herein. The invention also provides methods for preparing, compositions comprising, and methods for using compounds.
US07741325B2 Benzo[b]chromeno-naphthyridin-7-one and pyrano[2′,3′:7,8]quino[2,3-b]quinoxalin-7-one compounds
A compound selected from those of formula (I): wherein: B1, B2 represent carbon or nitrogen, X, Y, X1 and Y1 represent a group selected from hydrogen, halogen, hydroxy, alkoxy, nitro, cyano, trihaloalkyl and NRaRb wherein Ra and Rb are as defined in the description, R1 represents hydrogen or alkyl, R2 represents a group selected from hydrogen, alkyl, —OR″a, —NR′aR′b, —O-Ta-OR″a, —NR″a-Ta-NR′aR′b, NR″a—C(O)-TaH, —O—C(O)-TaH, —O-Ta-NRa′Rb′, —NR″a-Ta-OR″a, —NR″a-Ta-CO2R″a and —NR″a—C(O)-Ta-NR′aR′b wherein R′a, R′b, R″a and Ta are as defined in the description, R3, R4 represent hydrogen or alkyl, A represents a group of formula —CH(R5)—CH(R6)—, —CH═C(R7)—, —C(R7)═CH—, —C(O)—CH(R8)— or —CH(R8)—C(O)— wherein R5, R6, R7 and R8 are as defined in the description, its isomers, N-oxides, and addition salts thereof with a pharmaceutically acceptable acid or base, and medicinal products containing the same which are useful in the treatment of cancer.
US07741317B2 LXR modulators
A compound of formula I wherein A, X, q, R1, R2a, R2b, R2c, R3a, and R3b are defined herein.
US07741316B2 Pharmacological uses of azetidine derivatives
A method of treating or preventing Alzheimer's disease, Parkinson's Disease and/or schizophrenia, this method comprising administering to a patient in need of such treatment a compound of formula: in which R, R3 and R4 are as defined in the specification.
US07741312B2 Compounds and methods for inhibiting selectin-mediated function
Compounds and methods are provided for modulating in vitro and in vivo processes mediated by selectin binding. More specifically, selectin modulators and their use are described, wherein the selectin modulators that modulate (e.g., inhibit or enhance) a selectin-mediated function comprise a class of compounds termed BASAs (Benzyl Amino Sulfonic Acids, which include a portion or analogue thereof linked to a carbohydrate or glycomimetic.
US07741309B2 Oligomeric compounds for the modulation of survivin expression
Oligonucleotides directed against the survivin gene are provided for modulating the expression of survivin. The compositions comprise oligonucleotides, particularly antisense oligonucleotides, targeted to nucleic acids encoding the survivin. Methods of using these compounds for modulation of survivin expression and for the treatment of diseases associated with either overexpression of survivin, expression of mutated survivin or both are provided. Examples of diseases are cancer such as lung, breast, colon, prostate, pancreas, lung, liver, thyroid, kidney, brain, testes, stomach, intestine, bowel, spinal cord, sinuses, bladder, urinary tract or ovaries cancers. The oligonucleotides may be composed of deoxyribonucleosides or a nucleic acid analogue such as for example locked nucleic acid or a combination thereof.
US07741307B2 RNA aptamers and methods for identifying the same
RNA aptamers and methods for identifying the same are disclosed. The RNA aptamers selectively bind coagulation factors, E2F family members, Ang1 or Ang2, and therapeutic and other uses for the RNA aptamers are also disclosed.
US07741305B2 Modulation of apolipoprotein (a) expression
Compounds, compositions and methods are provided for modulating the expression of apolipoprotein(a). The compositions comprise oligonucleotides, targeted to nucleic acid encoding apolipoprotein(a). Methods of using these compounds for modulation of apolipoprotein(a) expression and for diagnosis and treatment of disease associated with expression of apolipoprotein(a) are provided.
US07741304B2 Casein kinase 2 antisense therapy
The invention provides for antisense oligonucleotides that hybridize to casein kinase 2 nucleic acid sequences and methods of using such antisense oligonucleotides to inhibit expression of casein kinase 2 and reduce the size of solid tumors.
US07741299B2 Therapeutic uses of inhibitors of RTP801
The present invention provides novel molecules, compositions, methods and uses for treating microvascular disorders, eye diseases and respiratory conditions based upon inhibition of the RTP801 gene and/or protein.
US07741295B2 Sir2 products and activities
A novel compound, 2′/3′-O-acetyl-ADP-ribose, is provided. The compound is a mixture of the 2′ and 3′ regioisomers of O-acetyl-ADP ribose, and is formed nonenzymatically from 2′-O-acetyl-ADP-ribose, which is the newly discovered product of the reaction of Sir2 enzymes with acetylated peptides and NAD+. Analogs of 2′/3′-O-acetyl-ADP-ribose are also provided. Additionally, methods of preparing 2′/3′-O-acetyl-ADP-ribose, methods of determining whether a test compound is an inhibitor of a Sir2 enzyme, methods of detecting Sir2 activity in a composition, methods of deacetylating an acetylated peptide, and methods of inhibiting the deacetylation of an acetylated peptide are provided. Prodrugs of 2′/3′-O-acetyl-ADP-ribose are also provided.
US07741289B2 Substituted azetidinone compounds, processes for preparing the same, formulations and uses thereof
The present invention provides compounds represented by the structural formula (I): or pharmaceutically acceptable isomers, salts, solvates or esters of the compound of Formula (I), wherein each of the substituents is as specified herein, formulations including the above compounds, processes for preparing the same and methods for treating atherosclerosis, hypercholesterolemia, or sitosterolemia, and for lowering plasma levels of sterols and/or stanols.
US07741287B2 Peptides for the treatment of herpes virus infections
The present invention relates to the use of a peptide having the amino acid sequence NH2-VCVLAHHFGKEFTPPVQAAYQKVVAGVANALAHKYH-COOH (SEQ ID NO:1) as well as variants, derivatives and fragments of the peptide for the treatment of viral diseases.
US07741281B2 Hepatitis C virus inhibitors
Macrocyclic peptides are disclosed having the general formula: wherein R′, R3, R3′, R4, R6, X, Q, and W are described. Compositions comprising the compounds and methods for using the compounds to inhibit HCV are also disclosed.
US07741278B2 Modified proteins, designer toxins, and methods of making thereof
The present invention concerns methods of reducing the antigenicity of a proteinaceous compound while maintaining the compounds biological activity, as well as proteinaceous compositions with biological activity but reduced antigenicity. These methods and compositions have significant benefits to a subject in need of such compounds and compositions. Also included are modified toxin compounds that are truncated and/or possess reduce antigenicity. Such designer toxins have therapeutic, diagnostic, and preventative benefits, particularly as immunotoxins. Methods of treating cancer using these immunotoxins are provided.
US07741277B2 Conjugates of disorazoles and their derivatives with cell-binding molecules, novel disorazole derivatives, processes of manufacturing and uses thereof
The present invention provides conjugates of disorazoles and their derivatives with cell-binding molecules, such as peptides, proteins, hormones, blood proteins and antibodies. The present invention further provides novel disorazole derivatives and processes of manufacturing such conjugates and disorazole derivatives. These compounds can be used as medicaments for the treatment of physiological and/or pathophysiological conditions in mammals, in particular for the treatment of various tumors.
US07741273B2 Drug depot implant designs
The present invention relates to novel drug depot implant designs for optimal delivery of therapeutic agents to subjects. The invention provides a method for alleviating pain associated with neuromuscular or skeletal injury or inflammation by targeted delivery of one or more therapeutic agents to inhibit the inflammatory response which ultimately causes acute or chronic pain. Controlled and directed delivery can be provided by drug depot implants, comprising therapeutic agents, specifically designed to deliver the therapeutic agent to the desired location by facilitating their implantation, minimizing their migration from the desired tissue location, and without disrupting normal joint and soft tissue movement.
US07741265B2 Hard surface cleaner with extended residual cleaning benefit
A cleaning composition for a hard surface is disclosed which provides for initial cleaning of the hard surface and provision of a hydrophilic coating or barrier layer on the surface which provides residual cleaning to the hard surface for an extended number of rinsings. The composition includes a hydrophilic polymer, at least one nonionic surfactant, at least one solvent, an acid and water, wherein the acid provides the composition with a pH of about 2 to 3.5 and the composition is provided in the absence of any anionic, cationic or amphoteric surfactant.
US07741264B2 Surface active polymers as detergents
Provided herein are compositions useful as detergents in cleaning a wide variety of substrates, including hard surfaces and laundry. The compositions contain a water-soluble polymer, which is a co-polymer between a polymerizable amide and a second, ethylenically-unsaturated monomer. The polymerizable amide itself is prepared from an amine-capped, alkoxylated alcohol by reaction with maleic acid anhydride. Compositions according to the invention show enhanced cleaning performance and beneficial anti-redeposition properties.
US07741263B2 Cleaning composition
An improved cleaning composition and method adapted to clean a variety of hard surfaces. The improved cleaning composition and method includes the use of a cationic biocide that includes biguanide compounds and/or quats.
US07741261B1 Composition for all natural cleaning products
A cleaning composition contains all natural ingredients and is both environmentally safe and hypoallergenic. One embodiment of natural glass cleaner contains white vinegar, natural aloe vera gel, fresh rosemary, filtered water, pure eucalyptus oil, lauryl glucoside, green food color, and a preservative. One embodiment of natural scrub wash multi-purpose cleaner contains lemon juice, fresh rosemary, lauryl glucoside, filtered water, fresh peppermint and a preservative. One embodiment of natural shine furniture cleaner contains lemon juice, extra virgin olive oil, pure orange oil, pure lemon oil, pure eucalyptus oil, filtered water, and a preservative.
US07741259B2 Environmentally compatible hydraulic fluid
Environmentally safe and compatible fluids that are useful as lubricants, and especially as hydraulic fluids, in mobile machinery are formulated to be non-contaminating when accidentally contacted with surrounding vegetation, and removable from vegetation by simply washing the vegetation with tap water. The fluids of the invention are polyalkylene glycol-based and having an ethylene oxide to propylene oxide ratio of from about 68:32 to about 78:22.
US07741257B2 Dry lubricant for conveying containers
The passage of a container along a conveyor is lubricated by applying to the container or conveyor a mixture of a water-miscible silicone material and a water-miscible lubricant. The mixture can be applied in relatively low amounts, to provide thin, substantially non-dripping lubricating films. In contrast to dilute aqueous lubricants, the lubricants of the invention provide drier lubrication of the conveyors and containers, a cleaner conveyor line and reduced lubricant usage, thereby reducing waste, cleanup and disposal problems.
US07741254B2 High density materials with intrinsic unabradable slipperiness and method of fabrication thereof
Pressureless sintered high density materials containing hexagonal boron nitride have low coefficients of friction and high wear resistance and are useful for bearings, bushings and other articles subjected to bearing loads.
US07741253B2 Methods and compositions for crosslinking polymers with boronic acids
The present invention provides a method of forming a viscosified treatment fluid comprising: providing a treatment fluid that comprises water and a gelling agent; contacting the treatment fluid with a boronic acid crosslinking agent so as to form a crosslinked gelling agent, wherein the boronic acid crosslinking agent comprises a compound having the formula: The present invention also provides methods of crosslinking gelling agent molecules, methods of treating a subterranean formation, methods of reusing viscosified treatment fluids, methods of fracturing subterranean formations, and methods of placing a gravel pack in subterranean formations. The present invention also provides boronic acid crosslinking agents and viscosified treatment fluids that comprise crosslinked gelling agents, the crosslinked gelling agent being formed from a reaction comprising a gelling agent and a boronic acid crosslinking agent.
US07741252B2 Surfactants not toxic to bacteria
An oilfield treatment method is given that uses fluids that contain surfactants used as foamers and/or viscosifiers such that the fluids pass the Alberta Energy and Utilities Board Directive 27 requirements for low toxicity to certain bioluminescent bacteria. Such fluids may be used in oilfield treatments, for example drilling and stimulation, near fresh water aquifers. The surfactants are certain non-ionic surfactants that are not aromatic, or certain amphoteric surfactants (that can be neutral), or certain zwitterionic surfactants, (in which both positive and negative charges are present in a single molecule so that the whole molecule is neutral).
US07741251B2 Compositions and methods of stabilizing subterranean formations containing reactive shales
The present invention relates to well bore stabilization and, more particularly, to treatment fluids that may reduce the tendency of shales to swell and associated methods. In some embodiments, the present invention provides a method of stabilizing a subterranean formation that comprises a shale, the method comprising contacting the subterranean formation that comprises the shale with a treatment fluid, the treatment fluid comprising a base fluid, and a hydrophobically modified polymer. In other embodiments, the treatment fluids comprise a base fluid and a hydrophilically modified polymer. In yet other embodiments, the present invention provides shale-inhibiting components, treatment fluids, and methods of reducing the tendency of shale to swell when exposed to a treatment fluid.
US07741250B2 Wellbore servicing fluids comprising grafted homopolymers and methods of using same
A non-aqueous wellbore servicing fluid comprising an alpha-olefin homopolymer grafted with a polar monomer.
US07741248B2 Borehole treating substance containing ether carboxylic acids
A well servicing composition containing an aqueous phase and an oil phase and an ether carboxylic acid of the formula: RO(CH2CH2O)x(CH2CHR1O)yCH2—COOX wherein, R is a saturated or unsaturated, branched or unbranched alkyl or alkenyl group containing 6 to 22 carbon atoms, x is a number from 1 to 20 and y is 0 or a number from 1 to 20, provided that the sum of x and y is at least 1 and at most 25, R1 is an alkyl group containing 1 to 4 carbon atoms and X comprises at least one member selected from the group consisting of a hydrogen atom, monovalent cations and polyvalent cations.
US07741245B2 Method for treating plants or plant parts
The present invention generally relates to a method of treating plants or plant parts comprising the step of contacting said plants or plant parts with at least one composition comprising at least one double bond adducted cyclopropene compound.
US07741237B1 Sealing composition for sealing aluminum nitride and aluminum oxynitride ceramics
There is described a sealing composition for sealing aluminum nitride and aluminum oxynitride ceramics comprising: a mixture of SiO2, at least one other metal oxide, and a silicon additive comprising at least one of silicon metal or a silicide. The silicon additive acts to suppress the formation of nitrogen bubbles during the sealing of articles comprised of aluminum nitride or aluminum oxynitride ceramics, e.g., as in the case of a ceramic discharge vessel for a high intensity discharge lamp.
US07741236B2 Water-soluble glass composition
A zinc and bismuth containing, water-soluble glass composition comprising from 10 to 75 mole % P2O5, 5-50 mole % alkali metal oxide, up to 40 mole % ZnO and up to 40 mole % Bi2O3.
US07741235B2 Composite sheet and absorbent article using the same
A composite sheet that has a low basis weight and can inhibit adhesives from flowing out is provided. The composite sheet 1 according to the present invention is formed by bonding a stretchable nonwoven fabric 2 and a non-stretchable nonwoven fabric 3 to each other with adhesives 4. The stretchable nonwoven fabric 2 in an extended state is bonded to the non-stretchable sheet. The stretchable nonwoven fabric 2 has a plurality of strip-shaped non-dense regions 21 and a plurality of strip-shaped dense regions 22 formed on both its surfaces alternately and alternately in the transverse direction such that the dense regions 22 on one of the surfaces and the dense regions 22 on the other surface are not overlapped with each other. The stretchable nonwoven fabric 2 includes thermoplastic fibers that have been stretched at least partially and elastomer fibers.
US07741231B2 Techniques for providing decoupling capacitance
Techniques for electronic device fabrication are provided. In one aspect, an electronic device is provided. The electronic device comprises at least one interposer structure having one or mole vias and a plurality of decoupling capacitors integrated therein, the at least one interposer structure being configured to allow for one or more of the plurality of decoupling capacitors to be selectively deactivated. In another aspect, a method of fabricating an electronic device comprising at least one interposer structure having one or more vias and a plurality of decoupling capacitors integrated therein comprises the following step. One or more of the plurality of decoupling capacitors are selectively deactivated.
US07741229B2 Method for manufacturing magnetic recording medium
A method for manufacturing a magnetic recording medium is provided, which can manufacture a magnetic recording medium that includes a recording layer having a concavo-convex pattern and has a sufficiently flat surface. The method includes the steps of: forming an object to be processed including a recording layer having a predetermined concavo-convex pattern formed over a substrate and a first mask layer (temporary underlying material) formed at least on recording elements (convex portions) of the recording layer; depositing a filling material on the object to be processed to fill concave portions; removing a part of the filling material by dry etching to expose at least side faces of the first mask layer; and removing the first mask layer by an etching method in which an etching rate of the first mask layer is higher than that of the filling material to flatten a surface.
US07741228B2 Method for fabricating semiconductor device
After a first insulating film is formed on a substrate, a wiring groove is formed in the first insulating film, and then a wire is formed inside the wiring groove. Subsequently, a protection film is formed on the first insulating film and on the wire, and then a hard mask film is formed on the protection film. After that, the hard mask film is patterned. Subsequently, the protection film and the first insulating film are partially removed using the patterned hard mask film to form an air gap groove, and then a second insulating film is formed to close an upper portion of the air gap groove for forming an air gap.
US07741227B2 Process for structuring at least one year as well as electrical component with structures from the layer
A process for structuring at least one layer as well as an electrical component with structures from the layer are described.The invention states a process to generate at least one structured layer (10A), wherein a mask structure (20) with a first (20A) and second structure (20B) is generated on a layer (10) which is present on a substrate (5). Through this mask structure (20), the first layer (20A) is transferred onto the layer (10) using isotropic structuring processes, and the second structure (20B) is transferred onto the layer (10) using anisotropic structuring processes. The process as per the invention permits the generation of two structures (20A, 20B) in at least a single layer while using a single mask structure.
US07741226B2 Optimal tungsten through wafer via and process of fabricating same
A method of optimally filling a through via within a through wafer via structure with a conductive metal such as, for example, W is provided. The inventive method includes providing a structure including a substrate having at least one aperture at least partially formed through the substrate. The at least one aperture of the structure has an aspect ratio of at least 20:1 or greater. Next, a refractory metal-containing liner such as, for example, Ti/TiN, is formed on bare sidewalls of the substrate within the at least one aperture. A conductive metal seed layer is then formed on the refractory metal-containing liner. In the invention, the conductive metal seed layer formed is enriched with silicon and has a grain size of about 5 nm or less. Next, a conductive metal nucleation layer is formed on the conductive metal seed layer. The conductive metal nucleation layer is also enriched with silicon and has a grain size of about 20 nm or greater. Next, a conductive metal is formed on the conductive metal nucleation layer. After performing the above processing steps, a backside planarization process is performed to convert the at least one aperture into at least one through via that is now optimally filled with a conductive metal.
US07741219B2 Method for manufacturing a semiconductor device using the self aligned contact (SAC) process flow for semiconductor devices with aluminum metal gates
In one embodiment, a method, comprises forming a diffusion layer on a semiconductor substrate, forming a selectively deposited metal or metal alloy on an aluminum gate structure by removing an aluminum oxide layer from the aluminum gate structure and depositing a zinc layer on the aluminum gate structure by a zincating process, and selectively depositing a sacrificial metal or metal alloy cap on the aluminum gate layer by displacing the zinc layer. This embodiment enables the SAC process flow on devices with Aluminum gates.
US07741218B2 Conductive via formation utilizing electroplating
A method for forming a conductive via is discussed and includes forming a seed layer over a first side of a semiconductor substrate, wherein the semiconductor substrate includes a first side opposite a second side, forming a via hole in a semiconductor substrate from the second side of the semiconductor substrate, wherein the via hole exposes the seed layer; and electroplating a conductive via material in the via hole from the seed layer. In one embodiment, a continuous conductive layer is formed over and electrically coupled to the seed layer. The continuous conductive layer can serve as the current source while electroplating the conductive via material.
US07741212B2 Semiconductor device and method for manufacturing the same
A semiconductor device and method for manufacturing the same are provided, capable of narrowing feature size by utilizing the property of oxidation of a material. In one method, a polysilicon layer can be patterned into a fine pattern up to a critical dimension using a photolithography process. Then the patterned polysilicon layer can be oxidized, thereby narrowing the gap between adjacent polysilicon patterns and narrowing the polysilicon patterns through the oxidation process. The narrowed polysilicon patterns and/or the narrowed gap between adjacent polysilicon patterns can be used to form vias or trenches in the substrate (or layer) below the polysilicon layer having a width narrower than the critical dimension.
US07741210B2 Methods of forming a conductive interconnect in a pixel of an imager and in other integrated circuitry
A method of forming conductive interconnects includes forming a node of a circuit component on a substrate. A conductive metal line is formed at a first metal routing level that is elevationally outward of the circuit component. Insulative material is deposited above the first metal routing level over the conductive metal line and the circuit component. In a common masking step, a first opening is etched through the insulative material to the conductive metal line and a second opening is etched through the insulative material to the node of the circuit component that is received elevationally inward of the conductive metal line. Conductive material is concurrently deposited to within the first and second openings in respective conductive connection with the conductive metal line and the node of the circuit component. A first metal line at a second metal routing level that is above the first metal routing level is formed in conductive connection with the conductive material in the first opening. A second metal line at the second metal routing level is formed in conductive connection with the conductive material in the second opening.
US07741209B2 Contact structure of semiconductor device and method for fabricating the same
A method for fabricating a contact of a semiconductor device includes the steps of forming a dielectric layer having a contact hole on a semiconductor substrate, forming an outgassing barrier layer comprising a poly-silicon layer to cover at least inner walls of the contact hole in order to prevent undesired outgassing from the dielectric layer, and depositing an aluminum layer on the outgassing barrier layer. The contact structure of the semiconductor device includes the aluminum layer filled in the contact layer formed on the semiconductor substrate, and the outgassing barrier layer formed under the aluminum layer to prevent outgassing from the dielectric layer. A fine contact can be formed along with the aluminum layer, thereby realizing the contact structure of a lower contact resistance. As a result, it is possible to realize stabilization of an overall contact resistance of the semiconductor device.
US07741208B2 Method for making a wedge wedge wire loop
A wedge wedge wire loop is formed with the steps: a) lowering the capillary onto the first connection point and applying a predefined bond force and ultrasound for producing a wedge connection on the first connection point, b) raising the capillary by a predetermined distance D1 in an essentially vertical direction, c) moving the capillary laterally and downwards in order to bend the wire and press it against the wedge connection, d) raising the capillary and moving the capillary in order to form a wire loop and to attach the wire to the second connection point, and e) tearing off the wire.
US07741206B2 Pad structure for liquid crystal display and method of manufacturing thereof
A liquid crystal display has a pad structure. The pad structure includes at least one pad formed on a substrate, an insulating film formed on the pad, and at least one conductive layer connected to the pad through contact holes defined through the insulating film. The insulating film covers side surfaces of the pad and a portion of the substrate adjacent to the side surfaces of the pad.
US07741205B2 Integrated circuit having a top side wafer contact and a method of manufacture therefor
The present invention provides an integrated circuit and a method of manufacture therefore therefor. The integrated circuit (100, 1000), in one embodiment without limitation, includes a dielectric layer (120, 1020) located over a wafer substrate (110, 1010), and a semiconductor substrate (130, 1030) located over the dielectric layer (120, 1020), the semiconductor substrate (130, 1030) having one or more transistor devices (140, 1040) located therein or thereon. The integrated circuit (100, 1000) may further include an interconnect (170, 1810) extending entirely through the semiconductor substrate (130, 1030) and the dielectric layer (120, 1020), thereby electrically contacting the wafer substrate (110, 1010).
US07741204B2 Mixed-scale electronic interfaces
Certain embodiments of the present invention are directed to a method of fabricating a mixed-scale electronic interface. A substrate is provided with a first set of conductive elements. A first layer of nanowires may be formed over the first set of conductive elements. A number of channels may be formed, with each of the channels extending diagonally through a number of the nanowires of the first layer. A number of pads may be formed, each of which is electrically interconnected with an underlying conductive element of the first set of conductive elements and one or more adjacent nanowires of the first layer of nanowires. The pads and corresponding electrically interconnected nanowires define a number of pad-interconnected-nanowire-units. Additional embodiments are directed to a method of forming a nanoimprinting mold and a method of selectively programming nanowire-to-conductive element electrical connections.
US07741201B2 Semiconductor device and method of manufacturing a gate stack
The semiconductor device includes a semiconductor substrate, a gate insulating film formed in contact with an upper side of the semiconductor substrate, and a gate electrode formed on the upper side of the gate insulating film and made of metal nitride or metal nitride silicide. A buffer layer for preventing diffusion of nitrogen and silicon is interposed between the gate insulating film and the gate electrode. Preferably, the buffer layer has a thickness of 5 nm or less. In the case where gate electrode contains Ti elements, and the gate insulating film contains Hf elements, the buffer layer preferably contains a titanium film.
US07741200B2 Formation and treatment of epitaxial layer containing silicon and carbon
Methods for formation and treatment of epitaxial layers containing silicon and carbon are disclosed. Treatment converts interstitial carbon to substitutional carbon in the epitaxial layer, according to one or more embodiments. Specific embodiments pertain to the formation and treatment of epitaxial layers in semiconductor devices, for example, Metal Oxide Semiconductor Field Effect Transistor (MOSFET) devices. In specific embodiments, the treatment of the epitaxial layer involves annealing for short periods of time, for example, by laser annealing, millisecond annealing, rapid thermal annealing, spike annealing and combinations thereof. Embodiments include amorphization of at least a portion of the epitaxial layer containing silicon and carbon.
US07741198B2 Method for fabricating a probing pad of an integrated circuit chip
A method for fabricating a probing pad is disclosed. A substrate having thereon a dielectric layer is provided. An inlaid metal wiring is formed in the dielectric layer. The inlaid metal wiring and the dielectric layer are covered with a passivation dielectric film. A portion of the passivation dielectric film is then etched away to form a reinforcement pattern on the inlaid metal wiring. The reinforcement pattern has inter-space that exposes a portion of the underlying inlaid metal wiring. A conductive pad is formed over the reinforcement pattern and the passivation dielectric film. The conductive pad fills the inter-space of the reinforcement pattern.
US07741196B2 Semiconductor wafer with improved crack protection
A method of manufacturing a semiconductor wafer for dicing includes providing a semiconductor wafer including a substrate and a plurality of upper layers on the substrate that form a formation of die areas. The formation is arranged so that adjacent die areas are separated by a path for a dicing tool. Within each path, a pair of spaced apart lines is fabricated. Each line defines a dicing edge of a respective path and has at least one trench extending between a top surface of the wafer and the substrate. Each trench is filled with a stress absorbing material for reducing die tool induced stress on the die areas during dicing.
US07741195B2 Method of stimulating die circuitry and structure therefor
A method includes providing a wafer having a first die and a scribe grid, where the first die has die circuitry and a bond pad electrically connected to the die circuitry, and where the scribe grid has a scribe grid pad electrically connected to the die circuitry. The method further includes accessing the scribe grid pad to stimulate the die circuitry. A wafer includes a first die. The first die includes die circuitry, a plurality of conductive layers, and a bond pad electrically connected to the die circuitry via at least one conductive layer of the plurality of conductive layers. The wafer includes a scribe grid having a scribe grid pad, and an interconnect electrically connecting the scribe grid pad to the die circuitry. The plurality of die of the wafer can then be singulated, and at least one of the singulated die can be packaged.
US07741192B2 Semiconductor device and manufacturing method thereof
A thin semiconductor wafer, on which a top surface structure and a bottom surface structure that form a semiconductor chip are formed, is affixed to a supporting substrate by a double-sided adhesive tape. Then, on the thin semiconductor wafer, a trench to become a scribing line is formed by wet anisotropic etching with a crystal face exposed so as to form a side wall of the trench. On the side wall of the trench with the crystal face thus exposed, an isolation layer for holding a reverse breakdown voltage is formed by ion implantation and low temperature annealing or laser annealing so as to be extended to the top surface side while being in contact with a p collector region as a bottom surface diffused layer. Then, laser dicing is carried out to neatly dice a collector electrode, formed on the p collector region, together with the p collector region, without presenting any excessive portions and any insufficient portions under the isolation layer. Thereafter, the double-sided adhesive tape is removed from the collector electrode to produce semiconductor chips. A highly reliable reverse-blocking semiconductor device can thus be formed at a low cost.
US07741191B2 Method for preventing the formation of electrical shorts via contact ILD voids
Densely spaced gates of field effect transistors usually lead to voids in a contact interlayer dielectric. If such a void is opened by a contact via and filled with conductive material, an electrical short between neighboring contact regions of neighboring transistors may occur. By forming a recess between two neighboring contact regions, the void forms at a lower level. Thus, opening of the void by contact vias is prevented.
US07741187B2 Lateral junction varactor with large tuning range
Large tuning range junction varactor includes first and second junction capacitors coupled in parallel between first and second varactor terminals. First and second plates of the capacitors are formed by three alternating doped regions in a substrate. The second and third doped regions are of the same type sandwiching the first doped region of the second type. A first varactor terminal is coupled to the second and third doped regions and a second varactor terminal is coupled to the first doped region. At the interfaces of the doped regions are first and second depletion regions, the widths of which can be varied by varying the voltage across the terminals from zero to full reverse bias. At zero bias condition, junction capacitance (Cmax) is enhanced due to summation of two junction capacitances in parallel. At reverse bias condition, with the merging of the two junction depletion widths, the capacitor areas are drastically reduced, thereby reducing Cmin significantly. Thus, tuning range Cmax/Cmin is significantly increased. Tuning range with this configuration can be increased infinitely by increasing the horizontal lengths of the second and third diffusion regions.
US07741185B2 Method of manufacturing semiconductor device
Each of channel regions 2a and 3b is covered by a gate electrode 6 via a gate insulation film 5 and side wall spacers 9 from its top face to both side faces along an x-direction. In other words, there is no insulation material of an STI element isolation structure 4 on both side faces along the x-direction of each of the channel regions 2b and 3b (in a non-contact state), thereby preventing stress in a z-direction from being applied by the STI element isolation structure 4 to each of the channel region 2b and 3b.
US07741183B2 Method of forming a gate dielectric
A method of forming a semiconductor device includes providing a substrate for the semiconductor device. A base oxide layer is formed overlying the substrate by applying a rapid thermal oxidation (RTO) of the substrate in the presence of oxygen. A nitrogen-rich region is formed within and at a surface of the base oxide layer. The nitrogen-rich region overlies an oxide region in the base oxide layer. Afterwards, the semiconductor device is annealed in a dilute oxygen and hydrogen-free ambient of below 1 Torr partial pressure of the oxygen. The annealing heals bond damage in both the oxide region and the nitrogen-rich region in the base oxide layer. After annealing the semiconductor device in the dilute oxygen ambient, in-situ steam generation (ISSG) is used to grow and density the oxide region in the base oxide layer at an interface between the substrate and base oxide layer.
US07741179B2 Method of manufacturing flash semiconductor device
A method of manufacturing a flash semiconductor device minimizes a loss of dopant caused by dopant out-diffusion. A trench is formed in a semiconductor substrate. At least one poly gate is formed in the semiconductor substrate including the trench. An RCS (Recess Common Source) region is formed in the trench. Dopant ions are implanted into the RCS region, and an annealing process is applied to the RCS region.
US07741177B2 Method and apparatus transporting charges in semiconductor device and semiconductor memory device
A method of providing a memory cell comprises providing a semiconductor substrate including a body of a first conductivity type, first and second regions of a second conductivity type and a channel between the first and second regions; arranging a first insulator layer adjacent to the substrate; arranging a charge storage region adjacent to the first insulator layer; arranging a second insulator layer adjacent to the charge storage region; arranging a first conductive region adjacent to the second insulator layer; arranging a layer adjacent to the first conductive region; arranging a second conductive region adjacent to the layer; and increasing mechanical stress of at least one of the first and second conductive regions. The second conductive region overlaps the first conductive region at an overlap surface, and wherein a line perpendicular to the overlap surface intersects at least a portion of the charge storage region.
US07741173B2 Method for forming a metal oxide film
A method for forming a capacitor insulation film includes the step of depositing a monoatomic film made of a metal by supplying a metal source including the metal and no oxygen, and depositing a metal oxide film including the metal by using a CVD technique. The method provides the metal oxide film having higher film properties with a higher throughput.
US07741172B2 Positive-intrinsic-negative (PIN)/negative-intrinsic-positive (NIP) diode
A positive-intrinsic-negative (PIN)/negative-intrinsic-positive (NIP) diode includes a semiconductor substrate having first and second main surfaces opposite to each other. The semiconductor substrate is of a first conductivity. The PIN/NIP diode includes at least one trench formed in the first main surface which defines at least one mesa. The trench extends to a first depth position in the semiconductor substrate. The PIN/NIP diode includes a first anode/cathode layer proximate the first main surface and the sidewalls and the bottom of the trench. The first anode/cathode layer is of a second conductivity opposite to the first conductivity. The PIN/NIP diode includes a second anode/cathode layer proximate the second main surface, a first passivation material lining the trench and a second passivation material lining the mesa. The second anode/cathode layer is the first conductivity.
US07741166B2 Oxidation method for altering a film structure
A method is provided in which a stress present in a film is reduced in magnitude by oxidizing the film through atomic oxygen supplied to a surface of the film. In an embodiment, a mask is used to selectively block portions of the film so that the stress is relaxed only in areas exposed to the oxidation process. A method is further provided in which a film having a stress is formed over source and drain regions of an NFET and a PFET. The stress present in the film over the source and drain regions of either the NFET or the PFET is then relaxed by oxidizing the film through exposure to atomic oxygen to provide enhanced mobility in at least one of the NFET or the PFET while maintaining desirable mobility in the other of the NFET and PFET.
US07741164B2 Method for fabricating SOI device
A method is provided for fabricating a semiconductor on insulator (SOI) device. The method includes, in one embodiment, providing a monocrystalline silicon substrate having a monocrystalline silicon layer overlying a monocrystalline silicon substrate and separated therefrom by a dielectric layer. A well region is ion implanted in the monocrystalline silicon substrate. A gate electrode material is deposited overlying the monocrystalline silicon layer. The gate electrode material is photolithographically patterned and etched using a minimum lithography feature size to form a first gate electrode, a second gate electrode and a spacer having the minimum lithography feature size. The gate electrode material is then isotropically etched to reduce the width of the first gate electrode, the second gate electrode and the spacer.
US07741162B2 Method for manufacturing high-frequency module device
This invention is a method for manufacturing a high-frequency module device. A high-frequency circuit unit (2) in which first to third unit wiring layers (5) to (7), each having a capacitor (12) or the like at a part, are stacked and formed on flattened one surface of a dummy board (30) so that a third pattern wiring is exposed from a connection surface (2a) of an uppermost layer is mounted on a mounting surface (3a) of a base board (3) where an input/output terminal part (18) is exposed, in such a manner that the third pattern wiring and the input/output terminal part are connected with each other, and after that, the dummy board is removed. A high-frequency module device is thus manufactured.
US07741160B1 Structure and assembly procedure for low stress thin die flip chip packages designed for low-K Si and thin core substrate
Provided are semiconductor die flip chip packages and semiconductor die flip chip package components where certain properties of the packages/components are controlled to facilitate management of the package stresses. Also provided are fabrication methods for such packages and package components. For instance, the thickness of a die can be controlled such that the stress generated/experienced by the die is minimized. As such, the package stress is managed to suitable levels for incorporation of a low-K Si die and/or a thin package substrate. Further, a thin die can be attached to a heat spreader to increase the rigidity for easier handling during fabrication of the semiconductor die flip chip package.
US07741159B2 Semiconductor device having channel with cooling fluid and manufacturing method thereof
A semiconductor device includes a semiconductor substrate, a first diffusion region formed in the semiconductor substrate, a semiconductor element formed in the first diffusion region, and a channel formed in the first diffusion region to receive a cooling fluid.
US07741157B2 System and method for direct bonding of substrates
A method of forming a MEMS (Micro-Electro-Mechanical System), includes forming an ambient port through a MEMS cap which defines a cavity containing a plurality of MEMS actuators therein; and bonding a lid arrangement to the MEMS cap to hermetically seal the ambient port.
US07741155B2 Method of manufacturing semiconducting device with stacked dice
Some embodiments of the present invention relate to a semiconducting device and method that include a substrate and a first die that is attached to the substrate. The first die includes active circuitry (e.g., a flash memory array or logic circuitry) on an upper surface of the first die. The semiconducting device further includes a spacer that covers the active circuitry on the upper surface of the first die and a second die that is stacked onto the spacer and the first die. The spacer extends from a first side of the first die to an opposing second side of the first die. The spacer also extends near a third side of the first die and an opposing fourth side of the first die such that the active circuitry is exposed near the third and fourth sides of the first die.
US07741153B2 Modular chip integration techniques
Modular chip integration and operation techniques are provided. In one aspect, a method of integrating chips, chip macros or at least one chip in combination with at least one chip macro is provided. The method comprises the following steps. The chips, chip macros or at least one chip in combination with at least one chip macro are assembled on a single carrier platform. One or more signal inputs and outputs are provided to each of the chips, chip macros or at least one chip in combination with at least one chip macro. One or more power and ground inputs and outputs are provided to each of the chips, chip macros or at least one chip in combination with at least one chip macro. The power and ground inputs and outputs to one or more of the chips, chip macros or at least one chip in combination with at least one chip macro are segmented from the power and ground inputs and outputs to at least one other of the chips, chip macros or at least one chip in combination with at least one chip macro so as to form a plurality of voltage islands.
US07741150B2 Packaged microelectronic devices and methods for manufacturing packaged microelectronic devices
Packaged microelectronic devices and methods of manufacturing packaged microelectronic devices are disclosed herein. In one embodiment, a method of manufacturing a microelectronic device includes forming a stand-off layer over a plurality of microelectronic dies on a semiconductor workpiece, and removing selected portions of the stand-off layer to form a plurality of stand-offs with the individual stand-offs positioned on a backside of a corresponding die. The method further includes cutting the semiconductor workpiece to singulate the dies, and attaching the stand-off on a first singulated die to a second die.
US07741149B2 Method of fabricating chip package structure
A chip package structure includes a chip, a lead frame, first and second bonding wires, an upper encapsulant, a first lower encapsulant, and a second lower encapsulant. The chip has an active surface, a back surface, and chip bonding pads disposed on the active surface. The lead frame having an upper surface and a lower surface includes a die pad, leads, and at least a bus bar. The back surface of the chip is adhered to the die pad. The leads surround the die pad. The bus bar is disposed between the die pad and the leads. The first bonding wires are connected to the chip bonding pads and the bus bar. The second bonding wires are connected to the bus bar and the leads. The upper encapsulant encapsulates the upper surface of the lead frame, the chip, the first bonding wires, and the second bonding wires.
US07741147B2 Method of field-controlled diffusion and devices formed thereby
A technique for creating high quality Schottky barrier devices in doped (e.g., Li+) crystalline metal oxide (e.g., ZnO) comprises field-controlled diffusion of mobile dopant atoms within the metal oxide crystal lattice. When heated (e.g., above 550 K) in the presence of an electric field (e.g., bias to ground of +/−50 V) the dopant atoms are caused to collect to form an ohmic contact, leaving a depletion region. The size of the depletion region controls the thickness of the Schottky barrier. Metal-semiconductor junction devices such as diodes, photo-diodes, photo-detectors, MESFETs, etc. may thereby be fabricated.
US07741146B2 Demounting of inverted metamorphic multijunction solar cells
A method of forming a multifunction solar cell including an upper subcell, a middle subcell, and a lower subcell by providing a first substrate for the epitaxial growth of semiconductor material; forming a first solar subcell on the substrate having a first band gap; forming a second solar subcell over the first solar subcell having a second band gap smaller than the first band gap; forming a graded interlayer over the second subcell, the graded interlayer having a third band gap greater than the second band gap; forming a third solar subcell over the graded interlayer having a fourth band gap smaller than the second band gap such that the third subcell is lattice mismatched with respect to the second subcell; attaching a surrogate second substrate over the third solar subcell and removing the first substrate; and etching a first trough around the periphery of the solar cell to the surrogate second substrate so as to form a mesa structure on the surrogate second substrate and facilitate the removal of said solar cell from the surrogate second substrate.
US07741143B2 Image sensor having 3-dimensional transfer transistor and its method of manufacture
In an embodiment, an image sensor includes an isolation layer disposed in a semiconductor substrate to define a first active region and a second active region extending from the first active region. A photodiode is disposed in a portion of the first active region. A floating diffusion region is provided in the second active region at a position spaced apart from the photodiode. A transfer gate electrode is disposed on the second active region between the photodiode and the floating diffusion region. The transfer gate electrode is disposed to cover both sidewalls and an upper portion of the second active region. The transfer gate electrode has a region extending onto the first active region and overlapping the photodiode. The photodiode has a protrusion into the second active region at the portion adjacent to the transfer gate electrode. A deep n-impurity region of the photodiode extends in the protrusion.
US07741141B2 Photodiode having increased proportion of light-sensitive area to light-insensitive area
A photodiode having an increased proportion of light-sensitive area to light-insensitive area includes a semiconductor having a backside surface and a light-sensitive frontside surface. The semiconductor includes a first active layer having a first conductivity, a second active layer having a second conductivity opposite the first conductivity, and an intrinsic layer separating the first and second active layers. A plurality of isolation trenches are arranged to divide the photodiode into a plurality of cells. Each cell has a total frontside area including a cell active frontside area sensitive to light and a cell inactive frontside area not sensitive to light. The cell active frontside area forms at least 95 percent of the cell total frontside area. A method of forming the photodiode is also disclosed.
US07741139B2 Solar cell manufacturing method
A method of manufacturing a solar cell includes forming a diffusion layer on a crystal-type silicon substrate. The diffusion layer has a conductivity opposite to that of the substrate. Furthermore, the method includes etching and removing a part of the diffusion layer by using sodium silicate, and forming a first electrode that makes an electric contact with the diffusion layer and forming a second electrode that makes an electric contact with the substrate.
US07741136B1 Method of fabricating turning mirror using sacrificial spacer layer and device made therefrom
The present invention is a method of fabricating a waveguide using a sacrificial spacer layer. The first step in this process is to fabricate the underlying optical semiconductor structure. A trench is then etched in this structure resulting in an underlying L-shaped structure. A sacrificial spacer layer is deposited in the trench. The waveguide is created in the trench on the sacrificial spacer layer using a mask layer to angle the vertex of the L-shaped structure. User-defined portions of the sacrificial spacer layer are subsequently removed to create air gaps between the waveguide and the sidewalls of the trench in the optical semiconductor.
US07741132B2 Display panel, display panel inspection method, and display panel manufacturing method
A method of inspecting a display panel, which is capable of distinguishing between whether an EL panel is a good product or a defective product before sealing of the display panel, is provided. In a first method of inspection, a conductive film is patterned to forming pixel electrodes after measuring the electric current flowing in the conductive film and detecting defective pixels in accordance with the measured values. In a second method of inspection, all of the pixel electrodes are connected by an inspection conductive film, a value of electric current flowing in the inspection conductive film is measured, and the inspection conductive film is removed after detecting defective pixels in accordance with the measured values.
US07741127B2 Method for producing diesel exhaust with particulate material for testing diesel engine aftertreatment devices
A method of using a burner-based system to produce diesel exhaust gas that contains particulate matter of a desired composition, to simulate the PM matter in exhaust produced by a production-type diesel internal combustion engine.
US07741121B2 System for purification and analysis of radiochemical products yielded by microfluidic synthesis devices
The present application is generally directed to microfluidic devices and methods for the achievement and assessment of chemical and radiochemical purity of (microfluidic) radio-synthesis products. More particularly, the current application relates to systems for purification and analysis of radiochemical products yielded by microfluidic synthesis devices.
US07741119B2 Xylitol synthesis mutant of xylose-utilizing zymomonas for ethanol production
A strain of xylose-utilizing Zymomonas was engineered with a genetic modification to the glucose-fructose oxidoreductase gene resulting in reduced expression of GFOR enzyme activity. The engineered strain exhibits reduced production of xylitol, a detrimental by-product of xylose metabolism. It also consumes more xylose and produces more ethanol during mixed sugar fermentation under process-relevant conditions.
US07741118B1 Synthetic plant genes and method for preparation
A method for modifying structural gene sequences to enhance the expression of the protein product is disclosed. Also disclosed are novel structural genes which encode insecticidal proteins of B.t.k. HD-1, B.t.k. HD-73, B.t. tenebrionis, B.t. entomocidus, 2 protein of B.t.k. HD-1, and the coat protein of potato leaf roll virus.