Frequency modulation system for transmitting binary information
阅读：148发布：2023-05-09
专利汇可以提供Frequency modulation system for transmitting binary information专利检索，专利查询，专利分析的服务。并且A system for transmitting binary information in the form of a frequency modulated signal is provided. The system includes a digital to analog converter for converting a series of input pulses into an output signal consisting of a series of incremental voltage changes which is approximately in the form of a sine wave having a frequency determined by the frequency of the input pulses. The system also includes a frequency selecting circuit for controlling the frequency of the input pulses to the digital to analog converter. The frequency selecting circuit is operated by a binary input signal and controls the frequency of the output signal produced by the digital to analog converter. A filter is connected to the output of the digital to analog converter to eliminate discontinuities from the output signal of the converter.，下面是Frequency modulation system for transmitting binary information专利的具体信息内容。
1. A system for producing a frequency modulated signal, which comprises: a converting circuit for transforming a series of input pulses into a sinusoidal output signal having a frequency determined by the frequency of the input pulses, said converting circuit comprising 1. a digital to analog converter for converting the series of input pulses into an output signal consisting of a series of incremental voltage changes which is approximately in the form of a sine wave, and 2. a filter for eliminating the discontinuities in the output signal of the digital to analog converter to produce a sinusoidal output signal; means for applying a series of input pulses to said converting circuIt; and means for varying the frequency of the input pulses applied to said converting circuit to vary the frequency of the sinusoidal output signal and produce a frequency modulated sinusoidal signal.
2. a filter for eliminating the discontinuities in the output signal of the digital to analog converter to produce a sinusoidal output signal; means for applying a series of input pulses to said converting circuIt; and means for varying the frequency of the input pulses applied to said converting circuit to vary the frequency of the sinusoidal output signal and produce a frequency modulated sinusoidal signal.
2. The system of claim 1, wherein: said means for applying a series of input pulses to said converting circuit includes a source for producing pulses at a predetermined frequency, and a frequency divider connected to said source for producing a series of pulses at a frequency which is less than the predetermined frequency; and said means for varying the frequency of the input pulses to said converting circuit comprises a frequency selecting circuit connected to said frequency divider for controlling the operation of said frequency divider to determine the frequency of the pulses produced at the output of said frequency divider.
2. a filter for eliminating the discontinuities in the output signal of the digital to analog converter to produce a sinusoidal output signal.
3. The system of claim 2, wherein the digital to analog converter comprises: a counting circuit having a plurality of binary counting stages which are turned on and then turned off in a predetermined sequence in response to input pulses applied to the counting circuit; and means for combining the output signals produced by said binary counting stages to provide a signal consisting of a series of incremental voltage changes corresponding to the changes in voltage which occur in a sinusoidal signal.
4. The system of claim 3, wherein the means for combining the output signals produced by the binary counting stages comprises: a resistance summing network including a plurality of weighted resistances connected to output terminals of said counting stages and to a common output terminal, said resistance summing network producing an output signal at said common output terminal consisting of a series of incremental voltage changes corresponding to the changes in voltage which occur in the sinusoidal signal.
5. The system of claim 4, which includes: a resistance bridge having a terminal connected to the common output terminal of said resistance summing network.
6. The system of claim 1, wherein the digital to analog converter includes: a counting circuit having a plurality of binary counting stages operable in a predetermined sequence in which the binary stages are turned on one at a time until all of the stages are turned on, and then the binary stages are turned off one at a time until all the stages are turned off in response to input pulses applied to the counting circuit; and means for combining the output signals produced by the binary counting stages to provide a signal consisting of a series of incremental voltage changes corresponding to the changes in voltage which occur in a sinusoidal signal.
7. The system of claim 6, wherein the means for combining the output signals produced by the binary counting stages comprises: a resistance summing network including a plurality of weighted resistances connected to the outputs of the binary counting stages; said weighted resistances being weighted so as to produce incremental voltage changes at said common terminal corresponding to changes in voltage which occur in a sinusoidal signal in response to the output signals produced by the binary stages of said counting circuit. a frequency selecting circuit for controlling the operation of said frequency divider in response to a binary input signal to vary the frequency of the output pulses produced by said frequency divider to obtain pulses which occur at a first or second frequency; and a converting circuit connected to the output of said frequency divider for transforming the series of output pulses from the frequency divider into a sinusoidal signal having a frequency corresponding to the frequency of the output pulses to transmit the binary input signal in the form of a frequency modulated sinusoidal signal, said converting circuit comprising
8. A system for transmitting binary information in the form of a frequency modulated signal, which comprises: a source for producing pulses at a predetermined frequency; a frequency divider connected to said source for producing a series of output pulses at a frequency less than the predetermined frequency;
9. The system of claim 8, wherein: said frequency divider includes a plurality of flip-flops arranged in a series; and said frequency selecting circuit interconnects at least two of the flip-flops of said frequency divider for selectively altering the operating sequence of the flip-flops of said frequency divider to change the frequency of the output pulses produced by the frequency divider.
10. The system of claim 9, wherein the frequency selecting circuit comprises: a set of gates responsive to a binary input signal to the system and to the output signals of one of the flip-flops of said frequency divider and having an output terminal connected to the clock input terminal of the next adjacent flip-flop of the frequency divider for altering the operating sequence of the flip-flops in response to the binary input signal.
11. The system of claim 9, wherein the frequency selecting circuit comprises: a binary input terminal for receiving binary input signals; an inverter having an input terminal connected to said binary input terminal and an output terminal; an OR gate having a pair of input terminals and an output terminal; a first NOR gate having an input terminal connected to said binary input terminal and another input terminal connected to an output terminal of one of the flip-flops of said frequency divider, said first NOR gate also having an output terminal connected to one of the input terminals of said OR gate; and a second NOR gate having an input terminal connected to the output terminal of said inverter and another input terminal connected to the other output terminal of that flip-flop, said second NOR gate also having an output terminal connected to the other input terminal of said OR gate; said output terminal of said OR gate being connected to the clock input terminal of the next adjacent flip-flop of said frequency divider.
12. The system of claim 9, wherein the frequency selecting circuit comprises: a first set of gates responsive to a binary input signal to the system and to the output signals of a first one of the flip-flops of said frequency divider and having an output terminal connected to the clock input terminal of the flip-flop of the frequency divider next adjacent to that first flip-flop for altering the operating sequence of the flip-flops in response to the binary input signal; and a second set of gates responsive to the binary input signal to the system and to the output signals of a second one of the flip-flops of said frequency divider and having an output terminal connected to the clock input terminal of the flip-flop of the frequency divider next adjacent to that second flip-flop for altering the operating sequence of the flip-flops in response to the binary input signal.
13. The system of claim 9, wherein the frequency selecting circuit comprises: a binary input terminal for receiving binary input signals; an inverter having an input terminal connected to said binary input terminal and an output terminal; a first set of gates comprising: a. a first OR gate having a pair of input terminals and an output terminal; b. a first NOR gate having an input terminal connected to said binary input terminal and another input terminal connected to an output terminal of a first one of the flip-flops of said frequency divider, said first NOR gate also having an output terminal connected to one oF the input terminals of said first OR gate; and c. a second NOR gate having an input terminal connected to the output terminal of said inverter and another input terminal connected to the other output terminal of that first flip-flop, said second NOR gate also having an output terminal connected to the other input terminal of said first OR gate; d. said output terminal of said first OR gate being connected to the clock input terminal of the flip-flop of said frequency divider next adjacent to that first flip-flop; and a second set of gates comprising: a. a second OR gate having a pair of input terminals and an output terminal; b. a third NOR gate having an input terminal connected to said binary input terminal and another input terminal connected to an output terminal of a second one of the flip-flops of said frequency divider, said third NOR gate also having an output terminal connected to one of the input terminals of said second OR gate; and c. a fourth NOR gate having an input terminal connected to the output terminal of said inverter and another input terminal connected to the other output terminal of that second flip-flop, said fourth NOR gate also having an output terminal connected to the other input terminal of said second OR gate; d. said output terminal of said second OR gate being connected to the clock input terminal of the flip-flop of said frequency divider next adjacent to that second flip-flop.
| 标题 | 发布/更新时间 | 阅读量 |
|---|---|---|
| 基于光伏多电平逆变器并网的变指数积分复位控制方法 | 2020-07-09 | 4 |
| 一种倍频正弦脉宽调制的数字实现方法 | 2021-01-21 | 4 |
| 适用于高阶QAM的自适应均衡与载波恢复方法及其电路 | 2021-12-12 | 1 |
| 一种基于以太网的电能质量在线监测装置 | 2020-12-13 | 1 |
| 水中沉积物检测系统及方法 | 2021-08-10 | 1 |
| Voice output device | 2022-10-05 | 2 |
| Measuring method and detector for wave height | 2022-11-28 | 0 |
| Corrosion monitoring system | 2021-11-30 | 1 |
| 用于具有阈值扩展的FM调制的设备 | 2020-11-23 | 2 |
| 전자식 방위 검출용 위상 보상회로 | 2022-09-13 | 2 |
高效检索全球专利专利汇是专利免费检索,专利查询,专利分析-国家发明专利查询检索分析平台，是提供专利分析，专利查询，专利检索等数据服务功能的知识产权数据服务商。
我们的产品包含105个国家的1.26亿组数据，免费查、免费专利分析。
分析报告
专利汇分析报告产品可以对行业情报数据进行梳理分析，涉及维度包括行业专利基本状况分析、地域分析、技术分析、发明人分析、申请人分析、专利权人分析、失效分析、核心专利分析、法律分析、研发重点分析、企业专利处境分析、技术处境分析、专利寿命分析、企业定位分析、引证分析等超过60个分析角度，系统通过AI智能系统对图表进行解读，只需1分钟，一键生成行业专利分析报告。
QQ群二维码
意见反馈
意见反馈