Low power flip-flop circuits
阅读：868发布：2022-06-20
专利汇可以提供Low power flip-flop circuits专利检索，专利查询，专利分析的服务。并且The series combination of a pair of diodes, preferably Schottky barrier diodes, are substituted for the load resistors of a standard two-transistor flip-flop. The base of each of the transistors is cross-coupled to the cathode of one diode which is connected to the collector of the other transistor through a Schottky barrier diode. Low power dissipation is achieved because the power supply need be of only sufficient magnitude to forward bias two semiconductor junctions.，下面是Low power flip-flop circuits专利的具体信息内容。
1. In combination: first and second junction transistors, each of said transistors having a collector, a base, at least one emitter and an emitter-base junction; first and second diodes, each having essentially the same barrier height; third and fourth diodes each having essentially the same barrier height; the barrier height of the third and fourth diodes being less than the barrier height of the emitter-base junctions of the transistors; one emitter of each of the first and second transistors being coupled together; the cathode of the first diode being coupled to the anode of the third diode and the cathode of the third diode being coupled to the collector of the first transistor; the cathode of the second diode being coupled to the anode of the fourth diode and the cathode of the fourth diode being coupled to the collector of the second transistor; and the base of the first transistor being coupled to the cathode of the second diode and the base of the second transistor being coupled to the cathode of the first diode.
2. The combination of claim 1 wherein: the first, second, third and fourth diodes are all Schottky barrier diodes.
3. In combination: first and second junction transistors, each of said transistors having a collector, a base and at least one emitter; first and second diodes each having the same barrier height; third and fourth diodes each having the same barrier height, the barrier height of the first and second diodes being greater than the barrier height of the third and fourth diodes; one emitter of each of the first and second transistors being coupled together; the cathode of the first diode being coupled to the anode of the third diode and the cathode of the third diode being coupled to the collector of the first transistor; the cathode of the second diode being coupled to the anode of the fourth diode and the cathode of the fourth diode being coupled to the collector of the second transistor; and the base of the first transistor being coupled to the cathode of the second diode and the base of the second transistor being coupled to the cathode of the first diode.
4. The combination of claim 3 wherein: the first and second transistors are NPN-type transistors; the first and second diodes are p-n diodes; and the third and fourth diodes are Schottky barrier diodes.
5. The combination of claim 4 wherein the anodes of the first and second diodes are coupled together.
6. The combination of claim 5 wherein the transistors each have two emitters.
7. In combination: at least one set of the following: first and second transistors, each of the first and second transistors comprises a control terminal, a first terminal and second terminal; first and second diodes each having the same barrier height; third and fourth diodes each having the same barrier height; the barrier height of the first and second diodes being greater than the barrier height of the third and fourth diodes; the cathode of the first diode being coupled to the anode of the third diode and the cathode of the third diode being coupled to the first terminal of the first transistor; the cathode of the second diode being coupled to the anode of the fourth diode and the cathode of the fourth diode being coupled to the firsT terminal of the second transistor; the second terminals of the first and second transistors being coupled together; and the control terminal of the first transistor being coupled to the cathode of the second diode and the control terminal of the second transistor being coupled to the cathode of the first diode.
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