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Inverter incorporating complementary field effect transistors

阅读:538发布:2022-06-23

专利汇可以提供Inverter incorporating complementary field effect transistors专利检索,专利查询,专利分析的服务。并且An inverter incorporating a pair of complementary field effect transistors and a pair of Schottky barrier diodes disposed in series with the complementary transistors is disclosed. The gates of the complementary transistors are connected in parallel to a pulsed source which provides positive and negative inputs to the inverter. First and second pulsed sources are connected to the inverter which, during an ENABLE cycle, provide voltages of opposite polarity to the inverter which, operating in a common source mode, charges an output to one of the source potentials. During a DISABLE cycle, the potential at the output is locked at a node by applying to the inverter potentials complementary to those initially applied to the inverter. A shift register stage consisting of the arrangement just described and an inverted inverter is also disclosed. When this shift register stage is actuated, during the ENABLE portion of a given cycle, one inverter is enabled while the other is disabled and, during the DISABLE portion of the given cycle, the other inverter is enabled while the first inverter is disabled. Also included are embodiments which are operable in a static mode as well as a cynamic mode.,下面是Inverter incorporating complementary field effect transistors专利的具体信息内容。

1. An inverter having input and output terminals comprising: a pair of complementary field effect transistors the gates of which are connected to said input and a pair of unidirectional devices disposed in series with said field effect transistors; means connected to said inverter for simultaneously applying at least first and second pulsed potentials thereto to charge said output to one of said first and second potentials during a first portion of a given cycle; and, means connecteD to said inverter for simulataneously applying complementary potentials opposite to said first and second potentials thereto for holding the potential of said output to approximately one of said first and second potentials during a second portion of said given cycle.
2. An inverter according to claim 1 wherein said unidirectional devices are diodes.
3. An inverter according to claim 1 wherein said unidirectional devices are Schottky barrier diodes.
4. An inverter according to claim 1 wherein said means for applying at least first and second potentials includes a pulsed source connected to said input which applies one of a positive and negative potential to said input during said first portion of said given cycle.
5. An inverter according to claim 1 wherein said means for applying at least first and second potentials includes a pulsed source connected to said input which applies one of a positive and ground potential to said input during said first portion of said given cycle.
6. An inverter according to claim 1 wherein said means for applying at least first and second potentials includes a pulsed source connected to said input which applies one of a negative and ground potential to said input during said first portion of said given cycle.
7. An inverter according to claim 1 wherein said means for applying at least first and second potentials includes first and second pulsed sources which apply positive and negative potentials to said inverter during said first portion of said given cycle said first pulsed source applying a potential of opposite polarity to said second pulsed source at the same instant.
8. An inverter according to claim 1 wherein said means for applying at least first and second potentials includes first and second pulsed sources which apply positive and ground potentials to said inverter during said first portion of said given cycle said first pulsed source applying a potential of opposite polarity to said second pulsed source at the same instant.
9. An inverter according to claim 1 wherein said means for applying at least first and second potentials includes first and second pulsed sources which apply negative and ground potentials to said inverter during said first portion of said given cycle said first pulsed source applying a potential of opposite polarity to said second pulsed source at the same instant.
10. An inverter according to claim 1 wherein said means for holding includes pulsed sources connected to said inverter which apply the potentials complementary to those applied during the first portion of the given cycle to said inverter during said second portion of said given cycle.
11. An inverter according to claim 1 wherein said complementary field effect devices are enhancement mode devices.
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