FIELD OF THE INVENTION

This invention relates to pre-amplifiers for use with a single fiber communication link.

BACKGROUND OF THE INVENTION

The first order parameters which normally limit the maximum length of the communication link are

(1) magnitude of coupled power,

(2) fiber losses, and

(3) receiver sensitivity.

In general, the only control a designer has over the first two parameters is by component and fiber selection. In the case of receiver design, however, circuit design expertise can yield up to 10 dB (optical) improvement over conventional approaches which can add several kilometers to the maximum distance achievable without repeaters. With this in mind, one of the areas of improvement which can be made concerns the use of the pre-amplifier section.

In co-pending application Ser. No. 149,291, filed by Paul W. Casper et al on May 12, 1980 entitled "multi-Channel, Repeatered, Fiber Optic Communication Network" and assigned to the assignee of the present application, there is described a system in which optical signals are transmitted over the fiber optic communication links and received by an optical receiver module. In the receiver module the incoming signals are converted by means of an avalanche photo diode and are made ready for further processing through the use of a pre-amplifier. Advantageously, the system described in the above-referenced application employs a transimpedance pre-amplifier according to the present invention. Although the transimpedance amplifier of the present invention applies specifically to the above-identified co-pending application, it also applies to any high data rate optical signal system such as the T4 system.

The problem of obtaining low distortion and flat frequency response over a wide range of input signals is solved in the prior art by the use of negative feedback. When the input signal is a current as in the case for avalanche photo diodes and other diode optical detectors, a "transimpedance amplifier" (an operational amplifier with a single resistor for the feedback network) is an obvious choice. However, in the conventional implementation, the feedback resistor-input capacitance-system bandwidth product must be kept small because of the additional phase shift caused by the feedback resistance and input capacitance. This results in the amplifier being dominated by the thermal noise of the feedback resistor. Therefore, one of the prior art problems which must be solved is the implementation of a feedback system of a transimpedance amplifier which can produce low noise, low distortion and flat frequency response in the presence of a large value of feedback resistor-input capacitance-system bandwidth product.

SUMMARY OF THE INVENTION

The present invention relates to an improved amplifier circuit which has a feedback resistance connected between the output and input of the amplifier circuit. The improvement relates to the phase margin compensation circuit which is connected across the output of the amplifier which maintains a flat frequency response over a wide range of input signals and at the same time maintains a low noise distortion by keeping the phase margin of the amplifier constant when the feedback resistance is varied.

In a preferred embodiment, the value of the feedback resistance-input capacitance bandwidth product is inversely proportional to the impedance value of the phase margin compensation circuit. Also in the preferred embodiment, the amplifier circuit contains a plurality of transistors which are connected to form a transimpedance amplifier. The transistors which formed the transimpedance amplifier are supported by amplifier bandpass determining circuits which include the above-mentioned phase margin compensation circuit. This phase margin compensation circuit located within the amplifier bandpass determining circuit offsets the phase margin contribution of the feedback resistor and input capacitance product.

The amplifier design of the present invention improves the sensitivity in bandwidth of previous designs while also improving the dynamic range at lower distortion. Additionally, the low frequency response may be moved easily to the 10 Hz range by practical-value component selection and the previous difficulties of matching pole-zero locations for wide band equalization are eliminated. The pre-amplifier design is also such that the frequency response may be tailored so as to perform active filtering with a three-pole response characteristic thereby eliminating the need for external discrete filters to establish receiver noise bandwidth.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a schematic representation illustrating the basic concept of the present invention.

FIG. 2 is a detailed schematic of the transimpedance amplifier of the present invention.

FIG. 3 is a model representation of the transimpedance amplifier of FIG. 2 for purposes of bandpass analysis.

FIG. 4 is a model of the active element of FIG. 3 for purposes of Y-parameter calculation.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT

The pre-amplifier shown at 10 in the FIG. 1 has an operational amplifier 12 with a feedback resistance R_f connected between the output and the input of the amplifier 12 as well as an input capacitance C_i. The amplifier 12 is shown comprising a gain section 18 and a load resistance R_L and C_L, both of which are attached to the output of the gain section 18 and grounded.

The problem of obtaining low distortion and flat frequency response over a wide range of input signals is solved by the use of the negative feedback R_f which is particularly useful in the case for optical detectors because the input signal is a current and the use of the negative feedback resistor produces a transimpedance amplifier thereby providing a voltage output from the amplifier. Conventionally the feedback resistor-input capacitance system bandwidth product was kept small in order to accomplish the low distortion and flat frequency response over the wide range of input signals. One of the drawbacks with this particular small bandwidth product was that the thermal noise of the feedback resistor dominated the amplifier. The following analysis makes clear that the system of FIG. 1 may be designed so that proper operation is obtained in the presence of a large value of feedback resistor-input capacitance-system bandwidth product which allows for low noise, low distortion and flat frequency response.

The open loop gain of the operational amplifier 12 of FIG. 1 is given by:

A(w)=-gmRL (1+jwRL CL)-1               (1)

The phase shift through the amplifier is therefore:

Φ1 =wtd +arc tan wKL CL            (2)

where t_d is the delay time for transmission of the signal through gain section 18. The effect of the additional feedback connection of resistor R_f and the input capacity C_i produces an additional phase shift:

d2 =arc tan wRf Ci                          (3)

Let w=w₁ when the loop gain is unity. Then the phase margin will be:

Φm=180°-(w1 td +arc tan w1 RL CL +arc tan w1 Rf Ci)                              (4)

In a conventional operational amplifier R₃ is made very large so that the arc tan w₁ R_L C_L is close to 90°. If the phase margin is to be 45° or more in the feedback resistor connection of FIG. 1 in order to obtain a stable amplifier, then as can be seen from equation (4), w₁ R_f C_i must be less than unity. Since the closed loop frequency response w₀ is approximately equal to the unity gain open loop response w₁, then W₀ R_f C_i must also be kept less than unity, which will result in the amplifier being dominated by thermal noise from R_f. Therefore, it can be seen from equation (4) that the R_L C_L and R_f C_i are interchangeable with regard to the phase margin. That is if w₁ R_L C_L is made small, then w₁ R_f C_i can be made large without affecting the phase margin. The design of the detailed schematic of FIG. 3 is based upon this principle which produces a transimpedance amplifier possessing the desired characteristics of low noise, low distortion, and flat frequency response simultaneously.

FIG. 3 illustrates the detailed schematic of the transimpedance amplifier of FIG. 1 including the input optical detector shown at 20. The operational amplifier portion of FIG. 3 consists of transistors Q₁ and Q₂ as well as resistors R₁ through R₅ and C₁, C₂, and C₃ while the feedback resistor R_f remains as from FIG. 1.

The transistor Q₁ functions to provide the current gain while the transistor Q₂ provides the voltage gain. The resistor R₃ connected to the emitter of Q₁ establishes the collector current bias level for Q₁, while the resistor R₂ connected between the voltage supply V₅ and the collector of Q₂ establishes the collector current bias level for Q₂. The resistor R₁ connected between the voltage supply V₅ and the collector of Q₁ is used to establish the collector voltage bias level for Q₁, while the capacitor C₁ connected between the collector of Q₁ and ground provides a signal current return path for Q₁. Resistors R₄ connected to the base of Q₂ and R₅ connected to the output of the amplifier as well as capacitors C₂ connected to the base of the transistor Q₂ and the capacitor C₃ connected to the output of the amplifier are used to adjust the open loop gain and frequency response of the system.

The selection of transistor types and collector current bias levels for the configuration of FIG. 3 is based upon the required frequency response for the pre-amplifier as well as the attainment of the maximum signal-to-noise-ratio. The best transistors to be used for the pre-amplifier section are those having a high hFE and a small R_b as well as small common emitter input capacity. Low noise-small signal microwave transistors are examples which meet the above requirements.

The collector current bias level of the input stage is a critical factor in achieving maximum signal-to-noise ratio. The optimum collector current for Q₁ is given by:

Ic1 =kT(q)-1 ×2πBn (Cd +Cie)(K,hFE)-1/2,                               (5)

where

B_n is the noise bandwidth,

C_d is the detector capacity (including board capacity),

C_ie is the common emitter input capacity for Q₁, and ##EQU1## where F(W) is the function which describes the system bandpass. Several values of K₁ are:

K₁ =0.810 for a 2-pole Butterworth characteristic,

K₁ =0.453 for a 3-pole Butterworth characteristic,

K₁ =0.393 for a 4-pole Butterworth characteristic,

K₁ =0.809 for a 3-pole Bessel characteristic.

The collector current bias level for Q₂ should be high enough to obtain the necessary gain and bandwidth, but not so high that the base current of Q₂ is a significant fraction of the collector current of Q₁.

In order to complete the pre-amplifier design, it is necessary to know the required bandpass characteristics and cutoff frequency. The choice of values for R₄, R₅, C₂, C₃ and R_f, along with the collector current bias level for Q₂, fix the bandpass characteristics and cutoff frequency.

BANDPASS COMPUTATION

In order to complete the bandpass design, it is necessary to know the frequency characteristics of all the components in the pre-amplifier, including the parasitic capacities associated with the layout. Of particular importance are the parameters used to describe the transistors. Y-parameters are convenient for this application; they may be supplied with the data sheets, or they may be calculated from h-parameters or S-parameters.

The transfer function of the preamplifier is given by:

ZT =Zf AB(1+AB)-1,                          (7)

where Z_T is the transimpedance (the ratio of output voltage to input current), A is the gain of the operational amplifier, and B is the feedback factor (the fraction of this output voltage which is fed back to the input terminal).

In general Z_f, A, and B are frequency dependent, so Z_T versus frequency corresponds to a plot of the frequency response of the preamplifier.

Consider the operational amplifier to consist of a 3-terminal active element driving a load admittance Y_L, as shown in FIG. 3. Assume that the feedback element consists of a noninductive resistor R_f, with parasitic capacities C_f in parallel and C_s to ground. Assume that parasitic capacity C_d connects to the input terminal.

The load admittance y_L is determined by resistors R₂ and R₅ and capacitor C₃, (FIG. 2) along with the parasitic capacity associated with the layout and the input admittance of the circuit to which the preamplifier output is connected.

The input capacity C_d is the capacity due to the detector, plus the parasitic capacity associated with the layout.

The load admittance y_L is determined by resistors R₂ and R₅ and capacitor C₃, (FIG. 2) along with the parasitic capacity associated with the layout and the input admittance of the circuit to which the preamplifier output is connected.

The input capacity C_d is the capacity due to the detector, plus the parasitic capacity associated with the layout.

The active element consists of transistors Q₁ and Q₂, resistors R₃ and R₄, and capacitor C₂, if wet let

y1 =R3 -1 +(R4 -j(wc2)-1)-1,(8)

then the active element may be described by the circuit of FIG. 4.

Assume that the active element is described by the y-parameters y₁₁, y₁₂, y₂₁, and y₂₂ such that

ii =y11 Vi +y12 Vo                (9)

io =y21 Vi +y22 Vo                (10)

Let

yii =yie of Q1                                   (11)

yr1 =yre of Q1                                   (12)

yf1 =yfe of Q1                                   (13)

yo1 =yfe of Q1                                   (14)

yi2 =yfe of Q2                                   (15)

yr2 =yre of Q2                                   (16)

yf2 =yfe of Q2                                   (17)

yo2 =yoe of Q2                                   (18)

ys =yi1 +yr1 +yf1 +yo1 +yi2 +y1(19)

analyzing the circuit of FIG. 4, taking into account equations (9) through (19) give ##EQU2## analyzing the circuit of FIG. 3, taking into account equations (9) and (10) gives ##EQU3##

If the frequency range of interest is sufficiently low, so that wR_f C_f <<1, wR_f C_s <<1, R_f b₁₂ <<1, and b₂₁ <<g₂₁, then equations (24), (25) and (26) reduce to ##EQU4## substituting (28) and (29) into (7) and solving gives: ##EQU5## then from (36) and (37) ##EQU6##

Equations (38) and (39) give the locations of the poles which describe the frequency response of the pre-amplifier.

In many instances the desired locations of the poles are known, and it is required to design the pre-amplifier to meet them. For this purpose, equations (36) and (37) are solved for w_A and w_B : ##EQU7## assume that ##EQU8## then by substituting (42) and (43) into (40) and (41): ##EQU9##

If ##EQU10## then equations (44) and (45) reduce to ##EQU11## and from (30) through (33) plus (46) and (47) ##EQU12##

CIRCUIT DESIGN PROCEDURE

Once the bandpass characteristics are known by the above-mentioned formulas, the procedures for the circuit design proceeds as follows:

Step 1: Calculate I_c1, using equation (5), Calculate R₃ =0.75(I_c1)^-1

Step 2: Assume I_c2 =10 I_c1, Calculate R₂ =(V_s -1.5)(I_c2)^-1

Step 3: Calculate g₁₁, g₁₂, g₂₁ and g₂₂ at f=0, using equations (8) through (23).

Step 4: Calculate R_f and R₅, using equations (48) and (49).

Step 5: Calculate and plot, Z_T versus frequency, using equations (7) through (26).

Step 6: Adjust R₂, R₄, R₅ and/or R_f and repeat Step 5, until the desired result is obtained.

The resulting circuit having the values calculated in the procedure outlined above presents a transimpedance pre-amplifier which retains the characteristics of low distortion and a flat frequency response obtained by the use of the feedback resistor R_f and also permits the use of an R_f value which keeps the thermal noise at a low level so as not to interfere with the signal output. This design also accomplishes the tailoring of the frequency response to perform active filtering with a 3-pole response characteristic thereby eliminating the need for external discrete filters to establish receiver noise bandwidth. Additionally, the low frequency response may easily be moved to the 10 Hz range by practical value component selection and the difficulties of matching pole-zero locations for wide band equalization are eliminated.