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Variable divider-multiplier circuit using n-channel filter

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专利汇可以提供Variable divider-multiplier circuit using n-channel filter专利检索,专利查询,专利分析的服务。并且PURPOSE: To simplify circuit constitution by realizing freely-variable multiplication and division with no adjustment by selecting a desired cycle inout signal.
CONSTITUTION: An input cycle synchronizing fignal from input terminal 5 is inputted to capacitors 12 to 15 in a time-division mode via resistance 11 provided to N-channel filter 1 and in the time allotted to capacitors 12 to 15, the momentary value of the input signal is charged or discharged at time constants C and R according to the discrete value of counter 10 supplied with the output of clock signal generator 3 so as to charge sequentially capacitors 16 to 19 with a sample voltage of the input waveform for several cycles. Under the control of counter 11 connected to clock signal generator 4 of read-out part 2, data stored in capacitors 16 to 19 are read out and sent to buffer amplifier 25 via switch circuits 21 to 24, so that multiplication and division outputs of desired characteristics required for output terminal 6 will be outputted with no adjustment.
COPYRIGHT: (C)1980,JPO&Japio,下面是Variable divider-multiplier circuit using n-channel filter专利的具体信息内容。

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