Automatic timing network for camera shutters
阅读：726发布：2022-05-26
专利汇可以提供Automatic timing network for camera shutters专利检索，专利查询，专利分析的服务。并且A camera shutter timing network includes a photoconductor connected in series with a plurality of diodes, the voltage across the diodes which is a logarithmic function of the photoconductor incident light is amplified by a variable gain amplifier to produce a first voltage. A second diode network combined with variable resistors and an amplifier produces a second voltage which is a logarithmic function of the camera diaphragm opening and film speed rating. A memory capacitor is charged to the difference of the two voltages and a timing capacitor is charged through a diode type logarithmic expansion network at a constant rate dependent on the memory capacitor voltage. An electromagnet energized through a Schmitt type switch releases the shutter to closing upon a predetermined voltage on the timing capacitor. A meter indicates the difference between the first and second voltages and hence the shutter speed.，下面是Automatic timing network for camera shutters专利的具体信息内容。
1. A camera shutter timing network comprising a photosensitive device having a first electrical parameter which is a function of the light incident thereon, a memory capacitor, means for charging said memory capacitor to a voltage which is responsive to a logarithmic function of said electrical parameter, a timing capacitor, means for charging said timing capacitor at a constant rate which is a function of the voltage on said memory capacitor, and switch means responsive to the voltage on said timing capacitor for controlling said camera shutter, said memory capacitor charging means including a logarithmic compression network coupled to said photosensitive device and an adjustable gain amplifier having an input connected to the output of said compression network.
2. The network of claim 1 wherein said compression network comprises at least one diode connected in series with said photoconductor.
3. The network of claim 1 including means for producing an adjustable second electrical parameter which is related to the camera diaphragm opening value and the speed value of the camera film, said memory capacitor voltage being responsive to the difference between the logarithms of said electrical parameters.
4. The network of claim 3 including means for providing a visual indication of said parameter difference.
5. The network of claim 1 wherein said charging rate is a function of the antilog of said memory capacitor voltage.
6. The network of claim 5 including means for producing an adjustable second electrical parameter which is related to the camera diaphragm opening and the speed value of the camera film, said memory capacitor voltage being responsive to a function of the logarithms of said parameters.
7. A camera provided with an automatic exposure time control shutter system and a system measuring light through the photographic taking lens, characterized by a light measuring block comprising a photosensitive element, means including a logarithmic compression network and an amplifier for providing a first output which is logarithmic function of the light incident on said photosensitive element, a diaphragm value and film sensitivity value setting block including a variable resistor for providing a second output which is a logarithmic function of said values, a memory capacitor, means for charging said memory capacitor to a voltage which is an arithmetic function of said first and second outputs, a timing capacitor, and means including a logarithmic expansion circuit and a constant-current charging network for charging said timing capacitor at a constant rate which is an antilog function of said voltage whereby said timing capacitor is constant-current charged with a current which is proportional to the incident light amount in synchronsim with the start of the camera shutter opening and means including a switching circuit responsive to the charge on said timing capacitor for controlling said shutter whereby there is produced a delay time between the run start of the shutter opening and that of the shutter closing and control is so made that after elapse of such delay time the closing is initiated.
8. A camera according to claim 7 comprising an indicating device responsive to the charge on said memory capacitor so that the automatically set exposure time is indicated prior to shutter release action.
9. A camera shutter timing network comprising a. a photosensitive element; b. first means including a logarithmic compression network coupled to said photosensitive element for providing a first signal responsive to a logarithmic function of the light incident on said photosensitive element; c. second means including a variable resistor for providing a second signal which is a logarithmic function of at least one nonlight photographic parameter; d. a memory capacitor; e. means for charging said memoRy capacitor to a voltage which is an arithmetic function of said first and second signals; f. a timing capacitor; g. second means for charging said timing capacitor at a rate which is an antilog function of said memory capacitor voltage; and h. means responsive to the charge on said timing capacitor for controlling said camera shutter timing.
10. The network of claim 9 wherein said memory capacitor charging means charges said memory capacitor to a voltage which is a function of the arithmetic difference between said first and second signals.
11. A camera shutter timing network comprising: a. A photosensitive element; b. first means including a network coupled to said photosensitive element for providing a first signal responsive to a logarithmic function of the light incident on said photosensitive element; c. second means including a variable resistor for providing a second signal which is a logarithmic function of at least one non-light photographic parameter; d. a memory capacitor; e. means for charging said memory capacitor to a voltage which is an arithmetic function of said first and second signals; f. a timing capacitor; g. second means including a logarithmic expansion circuit for charging said timing capacitor at a rate which is an antilog function of said memory capacitor voltage; and h. means responsive to the charge on said timing capacitor for controlling said camera shutter timing.
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