JPS4811642B1 -
专利汇可以提供JPS4811642B1 -专利检索，专利查询，专利分析的服务。并且1,210,931. Multiplex pulse signalling. N1PPON ELECTRIC CO. Ltd. 20 Nov., 1967 [19 Nov., 1966], No. 52678/67. Heading H4L. An earth station in a time division multiplex satellite communication system comprises means in which the time difference between a frame synchronizing signal and a time slot allotted to the earth station is monitored on an incoming signal, means for compensating for timing variations so as to adjust the transmissiontimingfrom the earth station, and means for synchronously locking the earth station to the system by the transmission of pulse codes over a plurality of frames at a lower power level than that used for communication purposes which when returned from the satellite are utilized in the adjustment of the transmitter timing so that the pulse code of each frame is accommodated in the time slot allotted to the earth station. The code transmitted is of a pseudo-random nature but over a number of frames is coded to represent the time slot number, i.e. the position in a frame which is allotted to the station. The use of low power ensures that the station can join the system without interfering with the stations already operating. As described one of the earth stations acts as a master station and sends a coded synchronizing signal at the start of each frame, each station being alotted a particular time slot in the frame. The transmitter timing control at the earth stations ensures that the propagation time is compensated for so that each station appears in its allotted time slot at the satellite relay station. Earth station, Fig. 4.-Assuming that the station wishes to join the communication system, the received signals are amplified and demodulated at 56 and the frame synchronizing signal is selected at 11 and supplied to a differential-type matched filter 12D, 12H in a receiving timing pulse synchronizer 10, whereby the output of the detector 11 is differentiated to provide an accurate indication of the timing of the sync. signal. The output of the matched filter is supplied to a phase comparator 13 together with the output of a timing circuit 14 which is controlled by a local clock pulse generator 60 via a phase shifter 15 which is adjusted in accordance with the output of the comparator 13. The timing circuit 14 includes a frequencydividing circuit which is thus controlled by the output of filter 12 to supply a timing pulse for the allotted time slot to a pulse code detector 57. Initially, a counter 41 is started and causes a bi-stable 42 to operate a power controller 52 to lower the power transmitted by radio transmitter 53 to a predetermined amount and a bistable 43 is set to pass a signal via OR gate 47 to a pulse code control circuit 34 to cause generator 21 to supply a continuous pseudo-random pulse code via switch 24, I.F. modulator 51 and controller 52 to the transmitter 53. This signal is returned from the satellite, demodulated at 56 and the pulse code is detected at 57 under the control timing circuit 14. The output of detector 57 is supplied to a transmitter synchronizer 30 including a differential - type matched filter 36 whose output is fed to a phase comparator 31 together with the timing pulses from circuit 14 to control a phase shifter 32 controlling the timing of clock pulses from generator 60 to the timing circuit 33 and the pulse code control circuit 34. The output of detector 57 is integrated over several frames at 59 to confirm that the station is synchronized and the resulting signal resets bi-stable 43 and advances counter 41 by one step to set a bistable 44 whereby a controller 35 controlled by timing circuit 33 operates a time slot number code generator 23. Generator 23 controls the switch 24 so that the pulse code is inverted at the appropriate time intervals to indicate the time slot number over a plurality of frames. This number code is detected in the received signal at 58 and stored to provide a signal to reset bi-stable 44 and stop the transmission of the number code. The output of detector 58 is also supplied to a coincidence gate 46 together with an output from transmitter timing circuit 33 to provide a signal to the control circuit 34 whereby the generator 21 supplies the pulse code in the allotted time slot which is transmitted at low power. This signal when returned, operates the integrating detector 59 which on confirming that the station is synchronized resets the bi-stable 42 via AND gate 45 which receives also the signal stored at 58, to set the transmission to full power and normal operation. If synchronization is not confirmed the counter 41 is reset and the process repeated.，下面是JPS4811642B1 -专利的具体信息内容。
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