Access controller for memory
专利汇可以提供Access controller for memory专利检索，专利查询，专利分析的服务。并且PURPOSE: To make it possible to control access times by memories by previously storing access times by memories and then by holding an arithmetic unit in readiness in an access time that corresponds to an assigned memory.
CONSTITUTION: C register 11 is stored with set access times by memory blocks. In response to a memory access instruction, U counter 13 counts reference clocks and supplies the result to weight signal generating circuit 14 to hold a weight signal at a high level and the signal is supplied to T counter control circuit 15, which stops the counting operation of T counter 16 controlling machine runs so that arithmetic logic unit 20 will be held in readiness. Then, the count value of U counter 13 reaches a value equivalent to the access time of a memory to which the current access is attained, the weight signal is held at a low level and microinstruction generating circuit 17 generates an updated microinstruction.
COPYRIGHT: (C)1981,JPO&Japio，下面是Access controller for memory专利的具体信息内容。
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