Computer having associative search apparatus专利检索-专用逻辑人工智能专利检索查询-专利查询网

Computer having associative search apparatus

阅读：585发布：2023-07-30

专利汇可以提供Computer having associative search apparatus专利检索，专利查询，专利分析的服务。并且The central processor includes logic circuits for a plurality of operation codes, one of which is a special SCAN code for associative searches to find the address of a word in which given data is stored. The apparatus includes two comparison circuits, one connected to compare the contents of a general register with the memory output data, and the other connected to compare the contents of an accumulator register with a constant. The given data is first placed in the general register and the start address for the search is placed in the accumulator register. Then reading a single program instruction word containing the SCAN operation code causes data words to be read and compared as the address in the accumulator register continues to advance until either the given data word is found or the address corresponding to the constant is reached. During the search the instruction address register and the operation code instruction register are inhibited from changing so that all other program controlled processing is halted during the search.，下面是Computer having associative search apparatus专利的具体信息内容。

权利要求

1. In a digital data processing system having a central processing unit and a memory; wherein the memory comprises a plurality of word stores for program words and data words, the program words having a first part for an operation code and a second part for an operand, a memory input register for addresses designating the individual word stores, access means connected to read out a word from a store corresponding to the address in the memory input register and to supply signals representing the word to a set of memory output conductors; wherein the central processing unit comprises memory output register means, an accumulator, an instruction register, arithmetic circuits, a store register, and interconnections among them and to the memory input register and memory output conductors, operation cycling means providing operation cycles; wherein the combination of the central processing unit and memory includes operation means effective during each operation cycle with a first step using said access means to read out one program word from memory with the operation code into the instruction register and the operand into the memory output register means, and in following steps using the arithmetic circuits to perform an operation designated by the operation code, which for some operation codes includes placing a data word address into the memory input register and using the access means to read out a corresponding data word into the memory output register means, and means effective during the operation cycle to place an address of a program word into the memory input register for the next operation; the improvement wherein one of said operation codes is a scancontrol operation code, and said arithmetic circuits include scan apparatus comprising first and second comparison means, each of which comprises two sets of inputs with each input of one set compared with a corresponding input of the other set, an enabling input, and an output, and means for supplying an enabling signal at the enabling input to produce an output indicative of equality or non-equality of the two sets of inputs; the first comparison means having its two sets of inputs coupled respectively to outputs of the memory output register and outputs of said store register, the second comparison means having one set of inputs coupled to certain outputs of the accumulator and the other set of inputs to a source representing a given constant for comparing a portion of an address to said constant, which is used to detect addresses to end the scan, both comparison means having the enabling input coupled to an output for the scan-control code from the instruction register; and their outputs connected to effect the operation described below; wherein the scan apparatus in combination with the central processing unit and memory includes means responsive to the scan-control operation code in the instruction register to place a word representing an address from the accumulator into the memory input register and using said access means to read out a word from the memory at that address into the memory output register means for said comparison operation, means responsive to non-equality signals from both comparison means to add ''''1'''' to the word in the accumulator, means to reset the operation cycling means to skip said first step, means to place the resulting word from the accumuLator into the memory input register and using said access means to read out the word from the memory of that address into the memory output register means and repeat the comparison operation; means alternatively responsive to an equality output signal from the first comparison means to place one program word address into the memory input register, means alternatively responsive to an equality output signal from the second comparison means to place a different program word address into the memory input register, and means responsive to the equality output signal being from either comparison means to cause proceeding to the first step of the next operation cycle in which the corresponding program word is read out.

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Computer having associative search apparatus

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