Delay time difference compensation system in bit by bit comparator for multiplexing device
专利汇可以提供Delay time difference compensation system in bit by bit comparator for multiplexing device专利检索，专利查询，专利分析的服务。并且PURPOSE: To speed up delay time compensation by using a pulse representing a frame position in addition to a low-order group data of an active line and a monitoring system so as to apply bit by bit comparison, thereby discriminating the normal operation of the active line.
CONSTITUTION: An elastic memory 21 attracts a destuff jitter of a low-order group signal 2 of a monitoring system. A shift register 22 receives a low-order group data 1 of the active line to be interlocked with the shift register 23. The register 23 uses a frame pulse phase comparison section 26 to match the phase of a frame reference pulse 4 of a monitoring system demultiplexer compared with the phase by a frame pulse phase comparison section 26. The shift register 24 shifts bit by bit each every time the result of comparison of the comparison section 25 is in error. The comparison section 25 compares the low-order group signal 1 of the active line with the low-order group signal 2 of the monitoring system by one bit end. Thus, the normal operation of the active line is discriminated and the time for the delay time compensation is reduced.
COPYRIGHT: (C)1988,JPO&Japio，下面是Delay time difference compensation system in bit by bit comparator for multiplexing device专利的具体信息内容。
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