Resolution-boosted sigma delta analog-to-digital converter |
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| 申请号 | EP14001697.3 | 申请日 | 2014-05-14 | 公开(公告)号 | EP2811654A3 | 公开(公告)日 | 2014-12-24 |
| 申请人 | Linear Technology Corporation; | 发明人 | Trampitsch, Gerd; | ||||
| 摘要 | A method and an ADC circuit use multiple SD modulations on an analog value and apply digital post-processing of the pulse density modulation (PDM) streams from the SD modulations obtaining a higher resolution in the digital output value for a given oversampling ratio. SD ADC does not face the constraint of conversion time doubling for each additional bit of resolution. In one implementation, an SD ADC includes conversions in SD phase and a resolution-boosting phase. During SD phase, MSBs of the digital output value are generated from the sampled analog value using a first SD conversion. At the end of SD phase, the sampled analog value is reduced to "residual quantization error," which remains in a capacitor of an integrator of SD ADC. In resolution-boosting phase, the LSBs of the digital output value are generated from residual quantization error using a second SD conversion that provides at least the LSBs. | ||||||
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