Wideband dual amplifier circuits

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention generally relates to amplifier circuits providing wideband amplification with minimal noise, and in particular, to amplifier circuits utilizing pairs of functionally complementing devices.

2. Description of the Related Art

A gain-bandwidth product as well as a noise factor of a field effect transistor (hereinafter “FET”) limits the FET's ability to amplify low-level voltage input signals over a wide range of frequencies. Additionally, a gain-bandwidth product as well as a noise factor of a magnetic tunnel junction device (hereinafter “MTJ”) limits the MTJ's ability to amplify low-level current input signals over a wide range of frequencies.

In radio frequency and microwave circuits, the gain of amplifiers utilizing a FET or MTJ as an active filter can be increased by narrowing the pass band of the FET or MTJ. However, that gain responses are not flat and often have phase discontinuities. Furthermore, the noise performance is poorer when stages are cascaded.

The high frequency electronic industry is therefore continually striving to improve the gain-bandwidth product of amplifying circuits.

SUMMARY OF THE INVENTION

The present invention relates to an amplifier circuit which utilizes duality of devices to provide high gain-bandwidth product.

A FET and MTJ are connected in functional cascade to best utilize the amplification, impedance, noise, and operating mode characteristics of each device. This composite utilizes a synergistic improvement in the gain bandwidth of such cascaded pair. In one form the MTJ input is the load of the FET. In another form, the FET input (gate electrode) is the load of the MTJ. The FET/MTJ composite matches respective desirable impedance characteristics while eliminating the noise introduced by resistors in conventional cascade configurations.

The foregoing forms and other forms, features and advantages of the invention will become further apparent from the following detailed description of the presently preferred embodiments, read in conjunction with the accompanying drawings. The detailed description and drawings are merely illustrative of the invention rather than limiting, the scope of the invention being defined by the appended claims and equivalents thereof.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1

depicts small signal models of a FET and a MTJ;

FIG. 2

depicts cascaded FET and MTJ amplifiers;

FIG. 3

a

depicts a dual voltage amplifier employing the duality concept of the present invention;

FIG. 3

b

depicts a dual current amplifier employing the duality concept of the present invention;

FIG. 3

c

depicts a cascaded dual voltage amplifier employing the duality concept of the present invention;

FIG. 3

d

depicts a small signal model for the amplifier in

FIG. 3

a;

FIG. 4

is a schematic of a MTJ in accordance with the present invention;

FIG. 5

is a magnetoresistive response curve of the

FIG. 4

MTJ; and

FIG. 6

is a portion of the

FIG. 5

magnetoresistive response curve that is applicable to an operation of the

FIG. 3

a

amplifying circuit.

DETAILED DESCRIPTION OF THE PRESENTLY PREFERRED EMBODIMENTS

Two electrical circuits are said to be dual of one another if they obey identical circuit equations, but with the roles of current and voltages interchanged. In general, a dual circuit can be constructed by the parameter/configuration interchanges set forth in TABLE 1.

TABLE 1

FIRST ELECTICAL CIRCUIT

SECOND ELECTRICAL CIRCUIT

current I

voltage V

electric field E

magnetic field M

resistance R

conductance G

inductance L

capacitance C

charge Q

magnetic flux &PHgr;

open circuit

close circuit

series connection

parallel connection

node

Mesh

The semiconductor field-effect transistors and the magnetic tunnel junction behave like active dual elements. The FETs are voltage-controlled, i.e. the voltage at the gates control the channel (output) currents, the gate poses a capacitive impedance, and the differential channel impedance is high—ideally a current source. The MTJs are current-controlled, i.e. current through the control lines controls the output voltages, the control lines poses an inductive impedance, and the differential channel impedance is low—ideally a voltage source.

The important small-signal parameters for the FET and MTJ are listed in TABLE 2.

TABLE 2

FET

MTJ

Transconductance g

m

Transresistance r

m

Input capacitance C

i

Input inductance L

i

GB produce &ohgr;

v

= g

m

/C

i

GB produce &ohgr;

v

= r

m

/L

i

Voltage gain A

v

= g

m

r

m

Current gain A

c

= r

m

g

c

Output resistance r

v

= ∂V

ds

/ ∂I

ds

Output conductance g

c

= ∂V

J

/ ∂I

J

If one were to cascade individual FET amplifier stages or the MTJ stages as depicted in

FIG. 2

, one would always have amplifiers with maximum GB product &ohgr;

v

or &ohgr;

c

, and noise characteristics worse than that of individual stage.

Given a semiconductor FET

20

with GB product &ohgr;

v

and a MTJ

30

dual with GB product &ohgr;

c

, the dual amplifier

10

in

FIG. 3

a

can attain signal gain and power gain for a bandwidth &ohgr;

h

, which is greater than either &ohgr;

v

or &ohgr;

c

. A unique characteristic of this amplifier

10

is that is has no “load” elements; the dual devices FET

20

and MJT

30

simply transduce voltages to currents and vice versa.

The voltage gain of dual voltage amplifier

10

in

FIG. 3

a

and the current gain of dual current amplifier

40

in

FIG. 3

b

are represented by the following equation (1):

A

h

=g

m

r

m

  (1)

where g

m

is the transconductance of FET

20

and r

m

is the transresistance of MTJ

30

at the operating point. The FET

20

stage with high output impedance drives the low (inductive) input impedance of the MTJ

30

and the low output impedance of the MTJ

50

drive the high (capacitive) input impedance of the FET

60

. This results in the ultra-wide bandwidth response with good gain flatness. If r

v

is the small-signal output impedance of the FET (

20

or

60

), and g

c

is the small-signal output conductance of the MTJ (

30

or

50

), the GB product of the hybrid amplifier (

10

or

40

) is given by the following equation (2):

&ohgr;

h

=(

g

m

r

m

)/((

L

i

/r

v

)+(

C

i

/g

c

)  (2)

where L

i

and C

i

are the input inductance of the magnetically coupled MTJ (

30

or

50

) and the input capacitance of the FET (

10

or

40

), respectively. Interestingly, &ohgr;

h

is independent of the width of the FET (

10

or

40

) and the length or number of the series-connected MTJs (

30

or

50

). This is because g

m

, C

i

, and r

v

−1

are proportional to the width of the FET (

10

or

40

), and r

m

, L

i

, and g

c

−1

are proportional to the length of the MTJ (

30

or

50

). The dual amplifier (

10

or

40

) each comprising a FET and a MTJ acts like a single stage with the GB product representing the correct performance measure. By algebraic manipulations, &ohgr;

h

can be expressed in terms of the (maximum possible) voltage gain of the FET (A

v

=g

m

r

v

) and the (maximum possible) current gain of the magnetically coupled MTJ (A

c

=r

m

g

c

), the GB product of the FET (&ohgr;

v

), and the BF product of the MTJ (&ohgr;

c

) as represented by the following equation (3):

1/&ohgr;

h

=(1/

A

v&ohgr;c

)+(1/

A

c&ohgr;v

)  (3)

If both A

v

and A

c

are much larger than unity, it follows that &ohgr;

h

is much larger than &ohgr;

v

and &ohgr;

c

. This is a remarkable result since GB product is the more important parameter of a wideband amplifier.

There are three specific reasons why the noise of the dual amplifiers (

10

or

40

) is low: First, an absence of load resistors, and the Johnson noise associated with the resistors. Second, the individual stages are coupled magnetically. Hence the ground bounce or voltage disturbances in the power supply or ground leads of each individual stage can be isolated and not propagated through the cascaded chain. Finally, the widths of the transistors and the lengths of the MTJ or number of MTJs can be increased without significantly affecting the gain-bandwidth product. Wide transistors or increasing the number of MTJs can reduce both the Johnson noise and the 1/f noise.

FIG. 3

c

depicts a multiple stage cascaded configuration of dual amplifiers

10

further utilizing the duality concept in each successively connected stage. Thereby, the MTJ output of each dual amplifier stage is connected to the FET input of the successive dual amplifier stage. A corresponding cascade configuration is attainable using dual amplifier

40

as depicted in

FIG. 3

b.

The schematic in

FIG. 3

d

depicts a small signal model for dual amplifier

10

in

FIG. 3

a.

The selective match of device characteristics is readily apparent when compared to the individual FET and MTJ small signal models depicted in FIG.

1

.

Referring to

FIG. 4

, MTJ

30

is shown in detail. MTJ

30

includes electrode

21

, a free ferromagnet

22

, a tunnel barrier

23

, a pinned ferromagnet

24

, an antiferromagnet

25

, and electrode

26

. Electrode

26

, e.g. Ti, Ti/PD or Ta/Pt, formed on a substrate

27

, e.g. Si, quartz, N58. Antiferromagnet

25

, e.g. MnFe or IrMn, is formed on electrode

26

. Pinned ferromagnet

24

, e.g. CoFe, or NiFe/CoFe, is formed on antiferromagnet

25

. Tunnel barrier

23

, e.g. Al

2

O

3

, is formed on pinned ferromagnet

24

. Free ferromagnet

22

, e.g. CoFe/NiFe, is formed on tunnel barrier

23

. Electrode

21

, e.g. Ti, Ti/PD or Ta/Pt, formed on free ferromagnet

22

.

Referring to

FIGS. 5 and 6

, curves

28

are representative of a change in the magnetoresistance of MTJ

30

as an internal magnetic field decreasing in strength is applied parallel to free ferromagnet

22

and pinned ferromagnet

24

. Curves

29

are representative of a change in the magnetoresistance of MTJ

30

as the internal magnetic field of increasing strength is applied parallel to free ferromagnet

22

and pinned ferromagnet

24

. Curves

28

and

29

illustrate an approximate 36% change over a range of ±20 Oe. Accordingly, for dual amplifying circuit

10

(

FIG. 3

a

), the current through FET

20

must be maintained in a range of current levels that generates the internal magnetic field over the range of ±20 Oe, and for dual amplifying circuit

40

(

FIG. 3

b

), a current input signal I

i

must be maintained in a range of current levels that generates the internal magnetic field over the range of ±20 Oe.

From the description of desirable electronic characteristics attributed to FET

20

in connection with

FIGS. 3

a

and

3

b

, one skilled in the art will be able to make and use dual amplifying circuits in accordance with the present invention wherein the FETs are replaced by a different type of field effect device. Additionally, from the description of MTJs

30

and

50

in connection with

FIGS. 3

a

and

3

b

, one skilled in the art will be able to make and use dual amplifying circuits in accordance with the present invention wherein the MTJs are replaced by a different type of active magnet or spintronic device.

While the embodiments of the present invention disclosed herein are presently considered to be preferred, various changes and modifications can be made without departing from the spirit and scope of the invention. The scope of the invention is indicated in the appended claims, and all changes that come within the meaning and range of equivalents are intended to be embraced therein.