Modulation signal generator and apparatus using such generator |
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申请号 | US27718772 | 申请日 | 1972-08-02 | 公开(公告)号 | US3794995A | 公开(公告)日 | 1974-02-26 |
申请人 | RAYTHEON CO; | 发明人 | THOMPSON B; | ||||
摘要 | Improved apparatus for generating a time-varying analog signal, as for example, a chirp modulation signal for a pulse compression radar, is shown. The disclosed apparatus incorporates: a memory for storing a set of digital words representative of samples of the time-varying analog signal; at least two digital-to-analog converters having their outputs connected to a common bus; and means for distributing, at a predetermined rate, successively read digital words from the memory to the digital-to-analog converters. Each one of the latter elements is actuated also by a time-varying weighting signal so the frequency spectrum of the desired time-varying analog signal is within predetermined limits. | ||||||
权利要求 | 1. In a pulse radar system periodically transmitting a coded modulation signal, such modulation signal being generated by conversion of a set of digital words stored in a memory, improved conversion apparatus comprising: a. means for periodically reading the set of digital words out of the memory at a first rate and dividing such set into equal interlaced subsets of digital words; b. a number, corresponding to the number of subsets of digital words, of digital-to-analog converters, each one thereof being responsive to a different one of the equal interleaved sets of digital words to produce a different analog signal at a second rate lower than the first rate; c. weighting means for applying a different time-varying signal at the second rate to each one of the diGital-to-analog converters to weight each different analog signal; and d. means for combining each different analog signal to produce the coded modulation signal. 2. Improved conversion apparatus as in claim 1 wherein the first-named means includes: a. a clock pulse generator producing clock pulses at a first rate; and, b. means for periodically dividing the clock pulses into a number, corresponding to the number of digital-to-analog converters, of equal interlaced subsets of clock pulses and applying such subsets of clock pulses to the memory to actuate each one of the digital-to-analog converters at a second rate, lower than the first rate. 3. Improved conversion apparatus as in claim 2 wherein the weighting means includes: a. a source of DC voltage; b. a number of oscillator means corresponding in number to the number of D/A converters, each one of such means being synchronized by a different one of the equal interlaced subsets of clock pulses, for producing cosinusoidal signals having different relative phases; and c. summing means to combine the DC voltage and each one of the cosinusoidal signals. |
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