| Document | Document Title |
|---|---|
| US11509912B2 |
Method and system for adaptive image transferring for enhancing image quality
An adaptive image transmission method for improving image quality, and a system thereof. The adaptive image transmission method for improving image quality includes the steps of: generating a reduced image by reducing an image for measuring a quality of an original image to be transmitted, by an image transmission system; measuring a restored image quality of the reduced image restored by decoding after performing pre-encoding on the reduced image, by the image transmission system; selectively resizing the original image based on the restored image quality, by the image transmission system; and encoding the selectively resized original image and transmitting the encoded image to an image reception system, by the image transmission system. |
| US11509910B2 |
Video coding method and device for avoiding small chroma block intra prediction
A method for controlling block intra prediction is provided for a decoder. The method includes: obtaining a coded video bitstream; decoding, prediction information of a current coding unit (CU) in a segment of a current picture from the coded video bitstream; determining, according to the prediction information, a prediction type of a chroma coding block (CB) of the current CU, the prediction type being intra prediction or inter prediction; and reconstructing the chroma CB according to the prediction information, where a width of any reconstructed chroma CB intra-predicted from the coded video bitstream is greater than 2. |
| US11509905B2 |
Method and device for signaling information related to slice in image/video encoding/decoding system
A method by which a video decoding device decodes a video, according to the present document, can comprise the steps of: parsing, from a bitstream, number information related to the number of slices of which the height within a tile of a current picture is explicitly signaled; parsing, from the bitstream, on the basis of the number information, height information related to the height of the slices of which the height is explicitly signaled; deriving the number of slices in the tile on the basis of the number information and the height information; generating prediction samples by predicting the current block of the current picture on the basis of the slices within the tile; generating reconstructed samples on the basis of the prediction samples; and generating a reconstructed picture for the current picture on the basis of the reconstructed samples. |
| US11509904B2 |
Interactions among multiple intra coding methods
Techniques, devices, and systems for video processing are described. In one example aspect, a video processing method includes determining, for a conversion between a block of a video and a bitstream representation of the video, a manner in which information for a Matrix-based Intra Prediction (MIP) coding technique is coded in the bitstream representation. A prediction block of the block is determined using the MIP coding technique based on performing a matrix vector multiplication operation on previously coded samples of the video. The method also includes performing the conversion based on the determining. |
| US11509903B2 |
Method and device for coding transform skip flag
An image decoding method according to the present document may include: a step for determining whether a current block is a dual-tree type in which individual division structures are applied to a luma component block and a chroma component block of the current block; a step for determining whether the current block is the luma component block to which the dual-tree type is applied, when the current block is determined to be the dual-tree type; a step for parsing a transform skip flag indicating whether a transform skip is applied to the luma component block, when the current block is the luma component block; a step for deriving whether a transform skip is applied to the chroma component block according to a preset condition, when the current block is not the luma component block; and a step for deriving a residual sample on the basis of the transform skip flag and residual information on the current block. |
| US11509891B2 |
Intra prediction method and apparatus in image coding system
An image decoding method performed by a decoding apparatus according to the present disclosure comprises the steps of: obtaining a reference sample line index of a current block and most probable mode (MPM)-related information; constructing an alternative MPM list on the basis of the reference sample line index; deriving an intra prediction mode of the current block on the basis of the alternative MPM list and the MPM-related information; and generating a predicted block of the current block on the basis of the intra prediction mode, wherein the alternative MPM list is constructed on the basis of an intra prediction mode of an upper adjacent block of the current block and an intra prediction mode of a left adjacent block of the current block. |
| US11509890B2 |
Methods and apparatus for entropy coding and decoding aspects of video data
The techniques described herein relate to methods, apparatus, and computer readable media configured to encode and/or decode video data. A prediction mode is determined for intra prediction coding a current data unit, where the determined prediction mode is a most probable mode of a plurality of most probable modes determined for the current data unit. The MPM information of the determined prediction mode is encoded using a coding bin, including context encoding the bin based on whether the bin is a first coding bin for the MPM information. |
| US11509886B2 |
Photoelectric conversion device and photoelectric conversion system
A photoelectric conversion device includes a first pixel including a photoelectric converter, a first node to which charge is transferred from the photoelectric converter, and a first transistor that resets a voltage of the first node, and configured to output a first signal in accordance with a voltage of the first node, a second pixel including a second node to which a predetermined voltage is supplied and a second transistor that resets a voltage of the second node, and configured to output a second signal in accordance with a voltage of the second node; and a control line connected to the first transistor and the second transistor. The first transistor resets the first node to a first voltage, and the second transistor resets the second node to a second voltage having a smaller amplitude than the first voltage. |
| US11509880B2 |
Dynamic adjustment of light source power in structured light active depth sensing systems
A method and device is provided that compensates for different reflectivity/absorption coefficients of objects in a scene/object when performing active depth sensing using structured light. A receiver sensor captures an image of a scene onto which a code mask is projected. One or more parameters are ascertained from the captured image. Then a light source power for a projecting light source is dynamically adjusted according to the one or more parameters to improve decoding of the code mask in a subsequently captured image. Depth information for the scene may then be ascertained based on the captured image based on the code mask. In one example, the light source power is fixed at a particular illumination while an exposure time for the receiver sensor is adjusted. In another example, an exposure time for the receiver sensor is maintained/kept at a fixed value while the light source power is adjusted. |
| US11509878B2 |
Methods and apparatus for using track derivations for network based media processing
The techniques described herein relate to methods, apparatus, and computer readable media configured to perform media processing. A media processing entity includes at least one processor in communication with a memory, wherein the memory stores computer-readable instructions that, when executed by the at least one processor, cause the at least one processor to perform receiving, from a remote computing device, multi-view multimedia data comprising a hierarchical track structure comprising at least a first track comprising first media data at a first level of the hierarchical track structure, and metadata associated with a second track at a second level in the hierarchical track structure that is different than the first level of the first track. The instructions further cause the processor to perform processing the first media data of the first track based on the metadata associated with the second track to generate second media data for the second track. |
| US11509874B2 |
Video projector and video display method
To provide a video projector which improves visibility in response to changes in projection environment, a video projector has an initial level setter, a level adjuster, a projection display, an image capture, and a projection histogram calculator. The initial level setter performs a prescribed initial level setting on an input video signal and outputs an initial display signal. The level adjuster adjusts the level of the initial display signal on the basis of a projection image and outputs a display signal. The image capture captures the projection image projected on a projection surface by the projection display based on the display signal. The projection histogram calculator prepares a projection histogram for each color. The level adjuster adjusts the level of the initial display signal for each color on the basis of the projection histogram. |
| US11509869B2 |
Pixel array reducing loss of image information and image sensor including same
A pixel array including; color filter array (CFA) cells, each respectively including CFA blocks, each CFA block including color pixels, and the color pixels include a sub-block. The sub-block includes at least one first color pixel sensing a first color, at least one second color pixel sensing a second color different from the first color, and at least one third color pixel sensing a third color different from the first color and the second color. |
| US11509868B2 |
Method and apparatus for failover in a video surveillance system
Implementations of the present disclosure provide a method and apparatus for failover in a video surveillance system. The video surveillance system includes a plurality of cameras hosted by a plurality of machines. At a first machine, a message indicating that a second machine has failure is received, the first machine and the second machine hosting a first set of cameras and a second set of cameras among the plurality of cameras, respectively; available resources of the first machine and loads of the first and second machines are determined; based on the available resources and the loads, parameters of at least one set of the first and second sets of cameras are configured, to enable the second set of cameras to be taken over by the first machine. |
| US11509865B2 |
Touchups, denoising and makeup related to a 3D virtual conference
A method for conducting a virtual three dimensional (3D) video conference between multiple participants, the method may include receiving by a user device of a first participant of the virtual 3D video conference, reference second participant 3D representation information for generating a second participant 3D representation under different constraints. The different constraints include at least one out of (a) a touch up constraint, (b) a makeup constraint, and (c) one or more circumstances constraint. The method may also include receiving, by the user device of the first participant and during the 3D video conference call, second participant constraints metadata indicative of one or more current constraints regarding a second participant; updating, based on the second participant constraints metadata, and by the user device of the first participant, a 3D participant representation of the second participant, within a first representation of virtual 3D video conference environment; and generating an avatar of the second participate based on 3D participant representation information of the second participant. |
| US11509860B2 |
Video adaptation method, related device, and storage medium
Embodiments of the present disclosure disclose a video adaptation method, a related device, and a related storage medium. The method in the embodiments of the present disclosure includes: receiving indication information sent by a video receiving device, where the indication information is used to indicate an image super-resolution capability of the video receiving device; and if the indication information indicates that the image super-resolution capability of the video receiving device is enabled, obtaining a video having a target frame rate and a target resolution that correspond to the indication information and sending the video having the target frame rate and the target resolution to the video receiving device. |
| US11509856B2 |
Image processing apparatus, image capturing apparatus, image processing method, control method, and storage medium
There is provided an image processing apparatus. An obtaining unit obtains an image, and first NR information defining noise reduction processing using a first noise reduction processing method which an external apparatus can apply to the image. A generating unit generates, on the basis of the first NR information, second NR information defining noise reduction processing using a second noise reduction processing method which is different from the first noise reduction processing method. A noise reducing unit applies the noise reduction processing using the second noise reduction processing method to the image in accordance with the second NR information. |
| US11509853B2 |
Image sensor and image collection system
The present disclosure provides an image sensor and an image collection system. The image sensor includes: a pixel collection circuitry array including a plurality of pixel collection circuitries, each pixel collection circuitry being configured to monitor a change in a light intensity in a field of view and enter a triggered state when the change in the light intensity meets a predetermined condition; a boundary triggered pixel determination array configured to determine a boundary triggered pixel collection circuitry in the pixel collection circuitries in the triggered state; and a reading unit configured to respond to the boundary triggered pixel collection circuitry and output address information about the boundary triggered pixel collection circuitry. |
| US11509852B2 |
Imaging device, imaging system, and method of driving imaging device
The imaging device includes a pixel including a photoelectric converter, a first switch, a charge holding portion, and an output unit, an output line, a readout circuit unit connected to the output line, and a control unit. The readout circuit unit includes an amplifier circuit, a second switch between the output line and the amplifier circuit, and a comparator comparing the amplified pixel signal with a reference signal. The control unit performs outputting a pixel signal by transferring the charge in the photoelectric converter to the charge holding portion, determining a level of the pixel signal amplified by the amplifier circuit, and setting a gain of the amplifier circuit in accordance with a result of determination, and sets the second switch to off during the first switch is in on and until the output unit is settled after the first switch transitions from on to off. |
| US11509848B2 |
Photodiode assembly
A photodiode assembly comprises a photoconductive substrate, including a P-doped region coupled with a controllable voltage biasing source, and an adjacent N-doped well. The photodiode assembly further comprises first and second capacitors coupled with the photoconductive substrate on first and second sides of the N-doped well. First and second control inputs are also coupled with the photoconductive substrate, wherein activation of the first control input causes electrons to flow through a first multiplication region of the N-doped well toward the first capacitor in response to photons striking the photoconductive substrate, and activation of the second control input causes electrons to flow through a second multiplication region of the N-doped well toward the second capacitor in response to photons striking the photoconductive substrate. Selectively controlling a voltage provided by the voltage biasing source changes a multiplication effect provided by the first and second multiplication regions of the N-doped well. |
| US11509846B2 |
Solid-state imaging device and electronic apparatus for miniturization of pixels and improving light detection sensitivity
There is provided a solid-state imaging device including a substrate having a pixel array unit sectioned into a matrix, a plurality of normal pixels, a plurality of phase difference detection pixels, and a plurality of adjacent pixels adjacent to the phase difference detection pixels, each provided in each of the plurality of sections, in which each of the normal pixel, the phase difference detection pixel, and the adjacent pixel has a photoelectric conversion film, and an upper electrode and a lower electrode that sandwich the photoelectric conversion film in a thickness direction of the photoelectric conversion film, and the lower electrode, in the adjacent pixel, extends from the section in which the adjacent pixel is provided to cover the section in which the phase difference detection pixel adjacent to the adjacent pixel is provided, when viewed from above the substrate. |
| US11509845B2 |
Multiple frame defect pixel detection and correction
A method of defect pixel correction, includes, receiving at least one center pixel signal in a plurality of frames, receiving a plurality of neighboring pixel signals adjacent the center pixel in the plurality of frames, determining a brightness of the center pixel signal, determining the brightness of the plurality of neighboring pixel signals, determining if the brightness of the center pixel signal exceeds a wounded pixel threshold of the plurality of neighboring pixel signals, determining a location of the center pixel having the brightness greater than the wounded pixel threshold in at least one frame, determining a number of reoccurrences of the center pixel having the brightness greater than the wounded pixel threshold, determining if the number of reoccurrences exceeds a defect pixel threshold and updating the at least one center pixel signal to a mean of the plurality of neighboring pixel signals. |
| US11509844B2 |
Image sensor with active capacitance cancellation circuitry to reduce pixel output settling time
An image sensor may include an array of image pixels arranged in rows and columns. Each column of pixels may be coupled to current source transistors and capacitance cancellation circuitry. The capacitance cancellation circuitry may include capacitors, a common source amplifier transistor, an autozero switch, a switch for selectively deactivating at least one of the capacitors during sample-and-hold reset and sample-and-hold signal operations. |
| US11509839B2 |
Multimedia distribution system for multimedia files with packed frames
A multimedia file and methods of generating, distributing and using the multimedia file are described. Multimedia files in accordance with embodiments of the present invention can contain multiple video tracks, multiple audio tracks, multiple subtitle tracks, data that can be used to generate a menu interface to access the contents of the file and ‘meta data’ concerning the contents of the file. Multimedia files in accordance with several embodiments of the present invention also include references to video tracks, audio tracks, subtitle tracks and ‘meta data’ external to the file. One embodiment of a multimedia file in accordance with the present invention includes a series of encoded video frames and encoded menu information. |
| US11509837B2 |
Camera transition blending
In general, techniques are described regarding initiating a recursive blending of a plurality of frames following a camera transition. One or more processors may, subsequent to a transition from a first camera mode to a second camera mode, blend one or more pixels of a first frame with one or more pixels of a second frame to produce a first blended frame, the first frame captured via a first camera, and the second frame captured via a second camera. The one or more processors may then output the first blended frame. |
| US11509833B2 |
Illumination control for vehicle sensors
A system includes an illumination source, a camera arranged to detect illumination from the illumination source, and a computer communicatively coupled to the illumination source and the camera. The computer is programmed to detect an object in image data from the camera, identify landmarks of the object in the image data, determine a distance from the camera to the object based on a pixel distance between the landmarks in the image data, and adjust a brightness of the illumination source based on the distance. |
| US11509830B2 |
Electronic device and method for changing magnification of image using multiple cameras
An electronic device and method are disclosed. The device includes a display, a plurality of cameras, a memory storing instructions, and at least one processor. The processor implements the method, including: displaying on the display, a preview of a first image acquired using a first camera from among the plurality of cameras, receiving a first input while the preview is displayed, wherein the first input is received before reception of a second input adjusting a magnification level of the preview, in response to receiving the first input, activating a second camera from among the plurality of cameras, receiving the second input for adjusting the magnification of the preview when a second image, distinct from the first image, is acquired using the activated second camera, and displaying the preview, based on at least a part of the second image and at least partially based on receiving the second input. |
| US11509824B2 |
Method for tracking target in panoramic video, and panoramic camera
The present invention relates to the field of panoramic cameras, and provides a method for tracking a target in a panoramic video, and a panoramic camera. The method is used to track a target in a panoramic video on the basis of a multi-scale correlation filter, and employs automatic electronic pan-tilt-zoom technology. The present invention provides more robust tracking, faster processing speeds, a greater range of application in different tracking scenarios, and can be used to ensure that a tracked target is always at the center of the screen. |
| US11509823B2 |
Imaging element, imaging apparatus, imaging method, and program
An imaging element incorporates a reading portion that reads out captured image data at a first frame rate, a storage portion that stores the image data, a processing portion that processes the image data, and an output portion that outputs the processed image data at a second frame rate lower than the first frame rate. The reading portion reads out the image data of each of a plurality of frames in parallel. The storage portion stores, in parallel, each image data read out in parallel by the reading portion. The processing portion performs generation processing of generating output image data of one frame using the image data of each of the plurality of frames stored in the storage portion. |
| US11509822B2 |
Imaging device and imaging method
An imaging device includes a light emitter, an optical diffraction plate, a pair of wedge prisms, a rotation unit, a light receiver, and a processing unit. The light emitter emits a light beam. The optical diffraction plate is for converting the light beam into a plurality of diffracted light rays that forms a first light spot. The pair of wedge prisms is for adjusting an emission direction of the first light spot. The rotation unit is connected to the pair of wedge prisms and is for rotating the pair of wedge prisms relative to each other. The light receiver is for receiving a plurality of second light spots reflected from the plurality of first light spots. The processing unit is connected to the light receiver and is for generating a plurality of pieces of light spot information and processing the plurality of pieces of light spot information into image information. |
| US11509817B2 |
Autonomous media capturing
A media capture device (MCD) that provides a multi-sensor, free flight camera platform with advanced learning technology to replicate the desires and skills of the purchaser/owner is provided. Advanced algorithms may uniquely enable many functions for autonomous and revolutionary photography. The device may learn about the user, the environment, and/or how to optimize a photographic experience so that compelling events may be captured and composed into efficient and emotional sharing. The device may capture better photos and videos as perceived by one's social circle of friends, and/or may greatly simplify the process of using a camera to the ultimate convenience of full autonomous operation. |
| US11509812B2 |
Facilitation of collaborative camera field of view mapping
A system of cameras can be used to generate a complete field of view within an edge network. For example, one camera can have a field of view where part of the view is obstructed by an object and/or by the camera's orientation. Yet another camera that is a part of the edge network can supplement the view of the first camera by providing an alternate view. The two views can be stitched together by a coordinate system such that a complete field of view can be utilized by both cameras. Additionally, where a field of view is not available by any stationary camera, the system can dispatch a mobile camera to help supplement the views. |
| US11509808B2 |
Electric shaver with imaging capability
System and method for improving the shaving experience by providing improved visibility of the skin shaving area. A digital camera is integrated with the electric shaver for close image capturing of shaving area, and displaying it on a display unit. The display unit can be integral part of the electric shaver casing, or housed in a separated device which receives the image via a communication channel. The communication channel can be wireless (using radio, audio or light) or wired, such as dedicated cabling or using powerline communication. A light source is used to better illuminate the shaving area. Video compression and digital image processing techniques are used for providing for improved shaving results. The wired communication medium can simultaneously be used also for carrying power from the electric shaver assembly to the display unit, or from the display unit to the electric shaver. |
| US11509807B2 |
Electronic device and method for generating thumbnails based on captured images
An electronic device includes a first image sensor, a second image sensor, one or more image processing modules, and a display. The first image sensor generates first image data. The second image sensor generates second image data. The one or more image processing modules process one or more image data among the first image and the second image data. The display displays the one or more image data among the first image data or second image data processed by the one or more image processing modules. The thumbnail generation module generates thumbnail data using the one or more image data among the first image data and second image data processed by the one or more image processing modules. A method includes converting the plurality of image data into a format displayable on a display, and generating thumbnail data using the image data of the displayable format. |
| US11509794B2 |
Machine-learning command interaction
Examples disclosed herein relate to receiving a query via a chat interaction, translating the received query into one of a set of predefined commands according to a trained machine-learning model, and providing a result of the one of the set of predefined commands to the chat interaction. |
| US11509790B2 |
Electronic apparatus allowing running of extended app and computer readable non-transitory recording medium storing program
An image forming apparatus provided with a storage and a random access memory (RAM) includes an extended app manager that performs management of an extended app as an application for implementing a function other than the standard functions of the image forming apparatus in itself, and an extended app platform as a platform of the extended app. The extended app manager stores a source for extended app application program interface (API) that is a program for an extended app API as an API usable to the extended app, in a region for dynamic addition that is a region provided on the storage for purposes of dynamic addition of the source for extended app API, and the extended app platform uses the source for extended app API in the region for dynamic addition to load the extended app API on the RAM. |
| US11509787B2 |
Image reading device and image forming system
Then image reading device includes a transparent document table, a frame, a reading unit, a moving mechanism, a white reference member, and a controller. The frame is provided around a peripheral of the document table. The white reference member is provided on the frame adjacent to the document table in the sub scanning direction and has a length in the main scanning direction longer than the document table. The reading unit includes a first reading part which reads an area corresponding to the document table and a second reading part which reads an area corresponding to the frame. The controller detects a boundary between the frame and the reference member based on a read value of the second reading part while moving the reading unit by the moving mechanism, and positions the reading unit at a home position apart from the boundary by a predetermined distance. |
| US11509786B2 |
Document feeder and image forming apparatus
A document feeder includes an apparatus body to which a document feed unit is attached, a sheet feed tray that moves up and down toward the document feed unit, an open/close cover attached openably and closably to the apparatus body and opens the document transport path and the document feed unit when opened, and a unit pressing arm attached to the open/close cover. When the open/close cover is closed, the unit pressing arm presses the document feed unit toward the sheet feed tray. |
| US11509782B2 |
Image forming apparatus
An image forming apparatus includes an image forming unit, an intermediate transfer member, a transfer member, a power source, a fixing unit, a photo sensor photosensor, and a control unit configured to perform a mode to output a test chart which is formed by transferring a plurality of test toner images from the intermediate transfer member onto a plurality of sheets of the recording material, the test chart being used to adjust the transfer voltage applied to the transfer member. The control unit is configured to adjust the transfer voltage based on a detection result of the photo sensor photosensor detecting the plurality of test toner images recovered fixed on the recording material. In a case where a jam occurred during execution of the mode, the control unit is configured to resume the mode after the jam has been recovered. |
| US11509779B2 |
Image processing apparatus for setting a notification destination user when scanning an image
An image processing apparatus that communicates with a chat server which controls displaying of received image data in a talk room of a chat service provided by the chat server, based on received information about the talk room, and controls transmission of a notification, based on received user information on a notification destination user, the image processing apparatus includes a reading unit configured to read an image of a document to generate image data based on the image, a registration unit configured to register the talk room of the chat service and the notification destination user in association with an object, and a transmission unit configured to transmit the image data generated by reading of the reading unit, the information about the talk room, and the user information on the communication destination user to the chat server, in response to selection of the object. |
| US11509778B2 |
Communication system and printing apparatus
A communication system includes an information terminal, and a printing apparatus configured to perform intergroup communication with the information terminal belonging to a group. The printing apparatus includes a printing part configured to perform printing, a data receiver configured to receive print data from the information terminal via the intergroup communication, and a print controller configured to control the printing part using the received print data. |
| US11509775B2 |
System, network, device and stacked spectrum method for implementing spectrum sharing of multiple contiguous and non-contiguous spectrum bands utilizing universal wireless access gateways to enable dynamic security and bandwidth policy management
A system and method in various embodiments implements a virtual spectrum band stacking technique facilitating spectrum sharing by converting and combining spectrum bands consisting of several different RF channels, common air interfaces, and radio channel protocols in the radio frequency channel domain to form IP Virtual Radio Channels (IP-VRCs) in the packet data domain. This virtual spectrum stacking technique combines the transmissions of contiguous and non-contiguous RF channels with differing physical layers into IP-VRCs. This technique enables simultaneous parallel high-speed wireless transmission; virtual radio channel hopping for enhanced security; and customized security schemes for different IP-VRC Groups. The deployment of the combination of IP-VRC Groups; Universal “Small Cell” Base Stations; and Universal Wireless End-Point Devices allows the aggregation of all available spectrum bands for use within a building environment. Some benefits of this deployment include expansion of spectrum utilization, service quality, security, applications and transmission throughput for wireless end-point devices. |
| US11509771B1 |
System and method for managing routing of customer calls
A call management system of a call center identifies an inbound caller based upon computer analysis of customer identifiers, which may include at least two of customer name, street address, and zip code. Approximate string matching analysis matches n-grams generated from strings within customer identifiers, with n-grams generated from customer identification fields while searching one or more databases. Approximate string matching can incorporate a closeness metric based on Jaccard distance, and a Gaussian mixture model of best matches. In one embodiment, a polymr search engine analyzes customer identifiers of inbound callers to retrieve customer data, such as customer demographic data, matched to the customer identifiers. In another embodiment, the polymr search engine analyzes customer identifiers of inbound callers to identify repeat callers and retrieve previously collected customer data. Retrieved customer data is used in predictive modeling and scoring value of the inbound call, and in routing the scored inbound call. |
| US11509770B2 |
Live agent recommendation for a human-robot symbiosis conversation system
A computer-implemented method is presented for selecting a preferred live agent from a plurality of live agents. The method includes constructing, via the processor, a human expertise matrix pertaining to each of the plurality of live agents by determining an average net promoter score (NPS) for each of the plurality of live agents for each category of a plurality of categories, and in response to a voice call by a user, determining, via the processor, a predicted human expertise on average by collectively assessing the human expertise matrix, a predicted NPS derived from a first deep neural network, and a predicted category derived from a second deep neural network. The method further includes, based on the predicted human expertise on average determined, triggering communication via the live agent communication network between the user and the preferred live agent to initiate a conversation between the user and the preferred live agent. |
| US11509768B2 |
Techniques for hybrid behavioral pairing in a contact center system
Techniques for hybrid behavioral pairing in a contact center system are disclosed. In one embodiment, the techniques may be realized as a method for hybrid behavioral pairing in a contact center system comprising: determining a first ordering of a plurality of contacts according to a behavioral pairing strategy with a balanced contact utilization; determining a second ordering of the plurality of contacts according to a performance-based routing strategy with an unbalanced contact utilization; determining a third ordering of the plurality of agents according to a combination of the first ordering and the second ordering having a skewed contact utilization between the balanced contact utilization and the unbalanced contact utilization; and outputting a hybrid behavioral pairing model based on the third ordering for connecting an agent to a contact of the plurality of contacts in the contact center system. |
| US11509767B2 |
Status prompt multimedia playing method and system, and apparatus
Example status prompt multimedia playing methods and apparatus are described. One example method includes receiving a first multimedia request by a status prompt application server, where the first multimedia request includes a non-idle identifier and is sent by a TAS. The status prompt application server sends a first multimedia response including a status prompt multimedia session description protocol (SDP) to the TAS, and receives a first multimedia acknowledgement message that includes a calling-side multimedia SDP and that is sent by the TAS. In this way, the status prompt application server obtains the calling-side multimedia SDP, and implements negotiation and acknowledgement of multimedia capability sets between the status prompt application server and a calling terminal device. The status prompt application server can play corresponding status prompt multimedia for the calling terminal device based on different non-idle identifiers. This implements playing of personalized status prompt multimedia in a non-idle state scenario. |
| US11509763B1 |
Using calling party number for caller authentication
Embodiments include a system, method, and computer program product that authenticates a caller using calling party information. In an embodiment, an authentication device receives the call request and associated calling party information that includes a calling party number. The authentication device retrieves parameters associated with the calling party number, where a retrieved parameter is a number of accounts linked to the calling party number. The authentication device determines whether the number of accounts is between one and a threshold value, inclusive, and verifies that the call request originates from a location or a device associated with the calling party number. Based on the verifying and determining, the authentication device generates an authentication result that indicates whether the calling party number is authenticated. Then, the authentication device sends the authentication result to a call processing device that processes the call request from the caller according to the authentication result. |
| US11509757B2 |
Wireless internet monitoring application
A wireless internet monitoring system comprising an application on a plurality of mobile devices recording the strength of a wireless internet signal received at a mobile device along with a GPS coordinates of the mobile device at time of said recording, wherein said application transmits the monitored signal strength along with said GPS coordinates to a backend application executed on a server. The backend application consolidates the monitored signal strength and said GPS coordinates with one or more previously monitored signal strength and GPS coordinate and preparing a geographical map of the monitored signal strength to be displayed by the application on the mobile device. |
| US11509752B2 |
Foldable mobile device
An embodiment of the disclosure involves a foldable mobile device. The foldable mobile device includes a housing having a first portion and a second portion foldable around a folding axis of the housing to allow a folded state of the device; an antenna operatively assembled to the housing; and a display mounted on a front side of the first portion and a front side of the second portion. The first portion has a first plate configured on a back side of the first portion opposite to the front side of the first portion, a contacting structure defined on the first plate. The second portion has a second plate configured on a back side of the second portion opposite to the front side of the second portion. When the mobile device operates is folded, the first plate and the second plate are conductively coupled with each other via the contacting structure. |
| US11509744B2 |
Resource request management using bandwidth allocation and time slots
A resource management system may use information regarding the bandwidth status of a downstream communication path to determine what portion of queued content should be sent in the current available bandwidth timeslot. In some embodiments, multiple versions of the same requested content may be available, and the system may select a lower-quality version to send if needed to meet a time deadline included in the original content request. |
| US11509742B2 |
Method and apparatus for edge computing service
Methods and apparatuses for edge computing services are provided, and a method of caching, by an edge data network, data from a service server includes obtaining information about a location of a terminal from a 3rd Generation Partnership Project (3GPP) network, generating movement information of the terminal in a region of interest based on information about correspondence between the information about the location of the terminal and a configured region of interest, and caching data from the service server, the data being determined based on the movement information of the terminal in the region of interest and a configured cache rule. |
| US11509738B2 |
System for migration of data from legacy computer system using wireless peer-to-peer connection
A method, system and computer-usable medium are disclosed for migrating data from a legacy computer system to a new computer system. Certain aspects include instantiating a wireless portal at a new computer system using a passcode and a randomly generated key, wherein the passcode is generated using the randomly generated key and a private key; displaying the randomly generated key at the new computer system; setting up a wireless peer-to-peer connection between a legacy computer system and the wireless portal by entering the randomly generated key in a second application executed at the legacy computer system; and migrating data from the legacy computer system to the new computer system using the peer-to-peer wireless connection. |
| US11509736B2 |
Systems and methods for matching electronic activities directly to record objects of systems of record with node profiles
The system described herein can automatically match, link, or otherwise associate electronic activities with one or more record objects. For an electronic activity that is eligible or qualifies to be matched with one or more record objects, the system can identify one or more set of rules or rule sets. Using the rule sets, the system can identify candidate record objects. The system can then rank the identified candidate record objects to select one or more record objects with which to associate the electronic activity. The system can then store an association between the electronic activity and the selected one or more record objects. |
| US11509733B2 |
Determining a location context of a device
Disclosed are a method and devices for determining a location context of a first device. The method includes receiving, at the first device, a wireless signal from a second device, determining a proximity of the first device to the second device based on the wireless signal, and determining an area inference based on characteristics of the second device and based on the determined proximity of the first device to the second device. The area inference includes a category of the area. The method also includes assigning an area label to the first device based on the area inference, and providing the area label to an application to enhance the performance of the application. |
| US11509732B2 |
Smart service orchestrator
A method for executing a service sequence, comprising: selecting, by a service orchestrator, a service that is part of the service sequence; detecting, by the service orchestrator, whether a load metric exceeds a threshold; when the load metric does not exceed the threshold, executing the service to obtain a real response, and continuing execution of the service sequence based on the real response; when the load metric exceeds the threshold, identifying, by the service orchestrator, a deviation behavior identifier that is associated with the service, obtaining an estimated response for the service based on the deviation behavior identifier, and continuing execution of the service sequence based on the estimated response. |
| US11509727B1 |
Continuous task-based communication sessions
A method for managing a communication session includes receiving a request to perform a task. The task is divided into one or more steps. One or more user devices are identified that can be used to perform one or more of the steps. One or more communication channels are identified that are available to the one or more user devices. The communication session is permitted to switch from one or more of the user devices and communication channels to complete the one or more steps of the task while maintaining a continuity of the communication session. |
| US11509726B2 |
Encapsulating and synchronizing state interactions between devices
Techniques are disclosed for managing media playback among an ad hoc group of playback devices. Such techniques may involve building a session among the playback devices in which playback devices communicate information regarding their playback capabilities. Based on the playback capabilities of the devices, playback mode may be derived for the session. Playback operations may be synchronized among the devices that are members of the session, in which devices receive identification of asset(s) to be rendered pursuant to the playback operation and timing information of playback of the asset. The devices may stream the playback assets directly from media sources when they are capable of doing so. In this manner, communication resources are conserved. |
| US11509724B2 |
Virtual connected vehicle infrastructure
A system and method for remote execution of applications for a connected vehicle infotainment system (CVIS). The method comprises establishing a network connection between the CVIS and a cloud server hosted in a cloud computing platform, sending a remote execution request for at least one application, wherein the at least one application is executed by the cloud server, receiving execution results from the at least one application cloud server, and rendering the execution results on the CVIS while allowing interoperability with applications executed over at least one other computing environment included in the vehicle. |
| US11509723B1 |
Systems and methods for dynamic and efficient device monitoring via a network
A system described herein may provide a technique for the monitoring of one or more devices, such as Internet of Things (“IoT”) devices or other suitable types of devices, via one or more networks. The system may maintain readings associated with the IoT devices, and may identify a demand for a set of readings from a particular IoT device. The system may output a request to the particular IoT device. The request may indicate a maximum data size for a response to the request, as well as an indication of the latest time associated with readings received from the particular IoT device. The IoT device may respond with readings that were collected after the indicated latest time. The response may be restricted to the maximum data size. As such, the IoT device may refrain from providing a full set of readings that were collected after the indicated latest time. |
| US11509722B2 |
Server
Provided is a server. The server comprises a communicator configured to receive or transmit data from or to an external network and a processor configured to receive, through the communicator, service data of an electronic device, device data of the electronic device, and weather data for the electronic device and to calculate emotion index data based on the service data, the device data, and the weather data. Accordingly, customer's emotion index data may be efficiently calculated. |
| US11509717B2 |
Cross datacenter read-write consistency in a distributed cloud computing platform
A distributed storage system including a server is configured to accept a request including a consistency indicator that flags for the server that cross datacenter consistency is desired. The server may be required to detect the consistency indicator and in response, to determine a consistency key based at least in part on the request. In an example aspect, the consistency key may comprise a hash value determined by a hash function shared across datacenters, whereby every datacenter may determine the same consistency key for a given resource and datacenter combination. The server may be further configured to determine a preferred datacenter for handling the request based at least in part on the consistency key, and thereafter to redirect the request to the preferred datacenter. In embodiments, the consistency indicator may also denote a scope of the strong consistency required by the calling client. |
| US11509715B2 |
Proactive replication of software containers using geographic location affinity to predicted clusters in a distributed computing environment
An apparatus comprises a processing device configured to monitor, over time intervals each comprising multiple time slices, client requests to access software container instances hosted by container host devices of a geographically-distributed software container platform, and to generate cluster pattern data comprising geographic clusters for the software container instances in each of the time slices. The processing device is also configured to predict, for a given time slice in a given subsequent time interval, formation of a geographic cluster of client requests for a given software container instance based on the cluster pattern data. The processing device is further configured to calculate network distances from the predicted geographic cluster to each of the container host devices, to select one of the container host devices based on the calculated network distances, and to proactively replicate the given software container instance in the selected container host device. |
| US11509707B1 |
Embedding remote applications into HTML pages
Systems and methods for embedding remote applications into HyperText Markup Language (HTML) pages. An example method comprises: identifying, within a HTML page rendered by a browser, a frame referencing a remote application; determining at least one of: a size of a window for rendering output of the remote application on a virtual desktop produced by a virtual execution environment running the remote application or a position of the window on the virtual desktop; causing a remote access session to be established with the virtual execution environment; transmitting a first message specifying at least one of: the size of the window on the virtual desktop or the position of the window on the virtual desktop; and causing the frame to be displayed within the HTML page by the browser for rendering output of the remote application. |
| US11509706B1 |
Customizable load balancing in a user behavior analytics deployment
A deployment manager executing in a distributed computing environment generates a user behavior analytics (UBA) deployment to process structured event data. The deployment manager configures a streaming cluster to perform streaming processing on real-time data and configures a batch cluster to perform batch processing on aggregated data. A configuration manager executing in the distributed computing environment interoperates with the deployment manager to update the UBA deployment with user-provided code and configurations that define streaming and batch models, among other things. In this manner, the deployment manager provides a scalable UBA deployment that can be customized, via the configuration manager, by a user. |
| US11509705B2 |
Automated delivery of medical device support software
Embodiments of the present invention include a portable medical device with an integrated web server. The portable medical device is configured to establish a communication session with a user device. The integrated web server is configured to load software onto the user computing device for exchanging data with the portable medical device. |
| US11509703B2 |
System and method for widescale adaptive bitrate selection
A system and method for training and executing an adaptive bitrate (ABR) controller can include clustering content into content clusters based on content metadata, clustering network scenarios based on network information, normalizing input measurements, training the ABR controller for each content within at least one of a given content cluster and a given network scenario cluster by determining network information and network metadata, associated with the respective content, determining a content bitrate, determining a reward associated with the content bitrate, and training the ABR controller based on the reward. |
| US11509702B2 |
Method and apparatus for selecting and receiving stream in distribution network-based multimedia streaming service
A method and an apparatus for selecting and receiving a stream in a distribution network-based multimedia streaming service are disclosed. According to the method, a receiving apparatus receives an index file for a channel from an index server and obtains a time difference between a current time of the receiving apparatus and the start time of the first streaming from the index file. Then, the receiving apparatus selects a fragment including a stream to be received among a plurality of fragments in which multimedia streams are divided and requests the selected fragment. |
| US11509701B2 |
Extended relationship signaling between events in event message tracks
Systems, devices, and methods for Dynamic Adaptive Streaming over HTTP (DASH) is provided. A method includes: obtaining an event message track including a plurality of event message instance boxes, the event message track configured to be processed by a DASH client for displaying media content; obtaining a first event message instance box included in the event message track; obtaining a second event message instance box included in the event message track, wherein the second event message instance box includes first information identifying the first event message instance box, and second information specifying a relationship between the first event message instance box and the second event message instance box; modifying the first event message instance box based on the first information and the second information; and providing the event message track to the DASH client or displaying media content based on the event message track. |
| US11509698B2 |
Method and system for interactive usage of product or service cards implemented in real-time communication system
The present disclosure is directed to a system and method for a content display located in the chat messaging system. It facilitates communication between at least a first and a second user and further enables content sending in a more efficient and faster way. This disclosure enables users to work with complimentary and different real-time communication systems and enables the display of interactive elements presenting objects in an application. Such display may be personalized and lead to external sources like a web page or other catalog of data with further explanation necessary to purchase or order. Furthermore, the disclosure improves the storage of content that will be displayed upon a frequency of usage and distribute such storage upon two types of memory that communicate over the network. |
| US11509695B1 |
Management of controlled-environment facility resident image and/or background during video visitation
Information associated with a controlled-environment facility resident communications and/or data device, such as device location within the controlled-environment facility, may be used to determine whether the resident device is approved for two-way video visitation or restricted to on-way video visitation. Video visitation may be initiated and voice and video captured and streamed by a non-resident communications and/or data device, as well as voice and/or video captured and streamed by the resident device, is received by a controlled-environment facility electronic communications management system. Voice and video captured at the non-resident device is transmitted to the resident device and, if the resident device is permitted two-way video visitation, voice and video captured by the resident device is transmitted to the non-resident device, if the resident device is restricted to one-way video visitation, only voice is transmitted to the non-resident device. |
| US11509692B2 |
Creation and optimization of security applications for cyber threats detection, investigation and mitigation
A system and method for optimizing a defense model using available security capabilities are provided. The method includes obtaining a defense model and an optimal security application implementation associated with the defense model; evaluating available security capabilities deployed in an enterprise environment to determine a plurality of variant security applications implementing the defense model; determining a quality score for each of the plurality of the variant security applications; selecting, from the plurality of variant security applications, a variant security application having a highest quality score; and executing the selected variant security application. |
| US11509690B2 |
Management of botnet attacks to a computer network
A system and computer-implemented method of monitoring a network is provided. The method includes receiving a packet of network traffic, wherein the packet has an associated source and destination address pair, where this pair constitutes a connection pair. The method further includes comparing the packet to a plurality of patterns and/or compare a source or destination address of the packet to known malicious addresses, and upon determining that the packet matches a pattern of the plurality of patterns or the source or destination address of the packet matches a known malicious address. The method further includes deploying a honeypot in a container for the pattern matching the packet, if not yet deployed, and forwarding all network traffic for the connection pair to the honeypot. |
| US11509687B2 |
Detection of a malicious entity within a network
Techniques and systems for determining a malicious derivative entity within a network are provided herein. A method for determining a malicious derivative entity may include receiving, by a network-based authentication system, a plurality of network transactions. A first attribute of a network transaction within the plurality of network transactions may be identified. The method may also include identifying a plurality of entities for the first attribute. The network-based authentication system may generate a first visual representation of a relationship between the first attribute and the plurality of derivative entities. Each of the derivative entities and the first attribute may be represented as nodes within the first visual representation. A first score for each of the nodes may be determined based on a degree of centrality of the nodes within the first visual representation. One network transaction may be blocked based on at least one node exceeding a first threshold. |
| US11509676B2 |
Detecting untracked software components on an asset
In an embodiment, an asset may utilize one or more scanning techniques to detect a first set of software components that is not being natively tracked by an operating system of the asset, the one or more scanning techniques comprising one or more of an evaluation of metadata associated with one or more running processes of the asset, and an evaluation of file system information that characterizes the first set of software components. The asset may further store an indication of the first set of software components detected in accordance with the one or more scanning techniques, and may optionally report the indication to an external entity (e.g., a vulnerability management system). |
| US11509675B2 |
Systems and methods for cyber monitoring and alerting for connected aircraft
A method of monitoring network traffic of a connected vehicle. The method includes receiving network traffic information from a vehicle gateway, the network traffic information including malicious and/or benign information. The method also includes storing the network traffic information on a data server and periodically updating the network traffic information stored on the data server. The method further includes: pre-processing the network traffic information, the pre-processing the network traffic information including filtering and normalizing the network traffic information; generating a learning model based on the pre-processed network traffic information, the learning model being generated by an artificial intelligence learning; updating the learning model based on additional network traffic information, the additional network traffic information including real-time network data; in accordance with the updated learning model, detecting an anomaly event in the incoming network data; and generating a notification and/or blocking one or more packets associated with the incoming network data. |
| US11509670B2 |
Detecting anomalous network activity
Methods and systems for detecting anomalous network activity. The system may receive network metadata regarding activity on a network and generate at least one of a z-score and a directionality magnitude related to the network activity. The system may then issue an alert upon detecting an anomaly exists on the network based upon at least one of the generated z-score exceeding a z-score threshold and the generated directionality magnitude deviating from a baseline directionality magnitude. |
| US11509667B2 |
Predictive internet resource reputation assessment
IPRID reputation assessment enhances cybersecurity. IPRIDs include IP addresses, domain names, and other network resource identities. A convolutional neural network or other machine learning model is trained with data including aggregate features or rollup features or both. Aggregate features may include aggregated submission counts, classification counts, HTTP code counts, detonation statistics, and redirect counts, for instance. Rollup features reflect hierarchical rollups of data using |
| US11509665B2 |
System, method and computer readable medium for message authentication to subscribers of an internet service provider
An internet service provider (ISP) is configured to provide notification messages such as service updates to subscribers via redirected web pages. In order for the web pages to be treated as originating from the ISP, the ISP provides a shared secret in the browser message. The shared secret may be a secret not derivable by viruses or trojans in the subscriber computer, such as a MAC address of the subscriber modem. |
| US11509664B2 |
Secure sent message identifier
A message management service allows a user to access and manage messages from various message services. The user can access the message management service using a message management client application executing on a client device and can draft messages using the message management client application and send the messages through the different message services. The message management service can add information to messages sent using the message management client application that can be used to identify and organize the messages. A secure sent-message identifier can be added to messages sent by the message management service to reliably indicate that the messages were sent by the message management service. |
| US11509661B2 |
Dynamic authorization rule stacking and routing across multiple systems
A system includes a hardware processor that executes a software code to receive an authorization request on behalf of a user for a stacked resource including resources offered separately by multiple resource providers, determine resource provider computers associated with the stacked resource, and send a look-up request including an electronic identity of the user to those computers, where the electronic identity is used as a look-up key for determining user attribute(s) of the user. The software code further receives the user attribute(s) from the resource provider computers, generates an accumulated access profile of the user based on the user attribute(s), applies the profile to a rules engine to determine a stacked access result, and routes the authorization request and the stacked access result to one of the resource provider computers, where that computer completes an authorization process for access to the stacked resource based on the stacked access result. |
| US11509657B2 |
Determination device, determination method, and determination program
A determination apparatus according to a first embodiment collects information regarding communication performed by an IoT device. The determination apparatus extracts patterns used for detecting unauthorized communication performed by the IoT device from information that has been collected. Also, the determination apparatus approximates a change in the cumulative value of the number of patterns to a function that expresses a predetermined curve, thereby calculating the degree of convergence of the change. Also, the determination apparatus determines whether or not the degree of convergence is no less than a predetermined value. |
| US11509655B2 |
Authentication system and authentication method
An authentication system and an authentication method are provided. The electronic device of the authentication system includes a controller, a processor and a key module, wherein the processor performs an application program. In a binding phase, the application device generates a digest file according to key factor information and a selection strategy, and stores the digest file in a digest table of the electronic device. In a checking phase, the application program determines whether the controller corresponds to a binding device according to the digest file and the key factor information. If the controller corresponded to the binding device, in an authentication phase, the controller performs an authentication operation of a U2F service with a server device according to the digest file corresponding to the binding device in response to a pressing of the key module. |
| US11509654B2 |
Securing communication of devices in the internet of things
It is recognized herein that current messaging protocols for internet of things (IoT) architectures are often weak from a security perspective, and are often poorly suited for resource-constrained devices. An example IoT system described herein combines device authentication and application-layer key establishment using facilities of IoT messaging protocols. The IoT system may include a Trust Broker, which acts as a registration point for devices, and an edge gateway, which manages communication between a given device and the trust broker (and IoT servers). The edge gateway may acquire a trusted role, such that it may be a secure intermediary for device-server messaging, and such that it can facilitate authentication of devices to services. |
| US11509650B2 |
One-time password for secure share mapping
Methods and systems for mapping a sharable resource using a one-time password are disclosed. An identifier included in a set of provided credentials uniquely associates the one-time password with an executable within a computing environment that hosts the sharable resource. When credentials are received in association with a mapping request, it is determined whether a supplied username corresponds to a user authorized to access the sharable resource and whether a representation of a supplied password received in association with the mapping request matches a representation of the one-time password. Validating the mapping request provides access to the sharable resource. |
| US11509640B2 |
Method for protecting an electronic control unit
A method for operating an electronic control unit (ECU) includes a normal mode and a protected mode. In the protected mode a new security artifact is stored in a microcontroller. The security artifact is transferred from the microcontroller to a microprocessor, and, after having received the security artifact, the microprocessor uses the security artifact for authenticating a program. |
| US11509639B2 |
IPsec anti-replay window with quality of service
In some examples, an example method to provide an IPsec anti-replay window with quality of service (QoS) at a first network endpoint may include configuring a multiple number of anti-replay windows, generating a first security association (SA), and establishing the first SA with a second network endpoint. The first SA may include a first multiple number of security parameter indexes (SPIs), where each of the first multiple number of SPIs may be assigned to a specific QoS level, and each of the first multiple number of SPIs may be assigned to one of the multiple number of anti-replay windows. Establishing the first SA with the second network endpoint may include assigning the first SA to a first encryption key, and providing the first encryption key to the second network endpoint. |
| US11509634B2 |
Secure messaging systems and methods
Systems and methods for secure messaging and automation are disclosed herein. An example method includes providing, by an application server layer, a user-facing application that accesses a data retention system and a predictive analytics system through a web services layer, the user-facing application being secured through use of a security token cached on a web browser that provides the user-facing application, establishing a security protocol or security token utilized between the application server layer and the web services layer that is different from the security token cached on the web browser; and performing asynchronous processing based on user interaction with a goal-based planning application that processes data from a plurality of user accounts. |
| US11509631B2 |
One-armed inline decryption/encryption proxy operating in transparent bridge mode
A proxy device coupled to a network receives communications between a client and a server on the network. The proxy device operates transparently to the client and the server, while coupled to receive and process the communications from a node on the network via a network port in a one-armed configuration. The proxy device communicates packets of the communications with an external tool coupled to the proxy device via a tool port and operates transparently to the nod and the tool. In certain embodiments, the tool may be a network security device, such as a firewall. |
| US11509630B2 |
Interface proxy device for cyber security
A system for providing cyber protection to medical devices in a medical environment is presented. The system comprises a medical device comprising software services, a backend server to maintain and provide software updates to medical devices, and an interface proxy box connected to the medical device and in communication with the backend server. The interface proxy box determines the software services resident on the medical device. The interface proxy box installs the software services determined to be resident on the medical device on the interface proxy box and configures the installed software services to match the software services resident on the medical device. The interface proxy box communicates periodically with the backend server and receives and applies security updates to the software services installed and configured on the interface proxy box. The medical device utilizes the updated software services on the interface proxy box. |
| US11509627B2 |
MAC mobility for 802.1x addresses for physical machines
A system and method for provisionally authenticating a host moving from a source port of a switch device to a destination port of the switch device is disclosed. The host is initially authenticated at the source port and blocked from forwarding network traffic at the destination port. During a provisional authentication session, an authentication agent executing on the switch intercepts one or more authentication packets sourced by the host and headed for the destination port of the switch device and redirects the authentication packets to an authentication server for validating the host at the destination port of the switch device. The switch device removes the block at the destination port in response to receiving an acknowledgment of successful authentication at the destination port from the authentication server. |
| US11509625B2 |
Communication apparatus, control method, and computer-readable storage medium
A communication apparatus sets a first obtaining method for obtaining IP addresses of a first network interface and an external server with which the communication apparatus communicates via the first network interface, and a second obtaining method for obtaining IP addresses of a second network interface and an external server with which the communication apparatus communicates via the second network interface. If the first obtaining method is manual obtaining, if the second obtaining method is automatic obtaining, and if setting of a default gateway has been set with respect to the first network interface, the communication apparatus controls communications by using at least the IP address of the second network interface obtained by the automatic obtaining without using the IP address of the external server obtained by the automatic obtaining via the second network interface. |
| US11509623B2 |
Communication system architecture and method of processing data therein
A method includes identifying a plurality of local tracklets from a plurality of targets, creating a plurality of global tracklets from the plurality of local tracklets, wherein each global tracklet comprises a set of local tracklet of the plurality of local tracklets, wherein the set of local tracklet corresponds to a target of the plurality of targets; extracting motion features of the target from the each global tracklet of the plurality of global tracklets, wherein the motion features of each target of the plurality of targets from each global tracklet of the plurality of global tracklets are distinguishable from the motion features of remaining targets of the plurality of targets from remaining global tracklets; transforming the motion features into an address code by using a hashing process; and transmitting a plurality of address codes and a transformation parameter of the hashing process to a communication device. |
| US11509622B2 |
Facilitating communication between resources in different network environments
Some embodiments provide a method for connecting a client of a first network to a service of a second network. The method includes registering the service of the second network. The method then receives, from a client of the first network, a request to communicate with the service, the client not having an address of the service. The method further assigns an IP address to the service and sends the IP address to the client. Additionally, the method sends, to an inter-network hub that connects the first network and the second network, a message in order for the inter-network hub to establish a first tunnel between the inter-network hub and a first gateway associated with the client and a second tunnel between the inter-network hub and a second gateway associated with the service. |
| US11509619B2 |
Techniques to provide streaming data resiliency utilizing a distributed message queue system
Embodiments include techniques to receive and process data from a data service provider, communicate a plurality of messages comprising the data to a streaming data platform and detect a failure of delivery of the plurality of messages to the streaming data platform. Embodiments further include techniques communicate the plurality of messages to a distributed message queue service of a distributed message queue system, publish each of the plurality of messages to the streaming data platform, determine each of the plurality of messages published to the streaming data platform was successful or unsuccessful, and retry publication of each unsuccessfully published message of plurality of messages to the streaming data platform. |
| US11509618B2 |
Maintaining a message thread with opt-in permanence for entries
A server has a processor and a memory storing a message thread module with instructions executed by the processor to maintain a message thread between users of client devices. The message thread module serves a message thread with a new text entry to a client device in response to a request for the message thread from a user. Message thread state change is collected from the client device, where the message thread state change represents an indication to automatically delete the new text entry of the message thread after the duration of a transitory display period on the client device unless an indication of a gesture applied to a display screen presenting the new text entry of the message thread is received from the client device during the transitory display period. The message thread state change is queued at the server along with additional message thread state changes associated with the collecting operation performed for additional users associated with the message thread. The message thread is revised based upon the message thread state change and the additional message thread state changes to form shared message thread state. The shared message thread state is stored. The shared message thread state is supplied in response to a request for the message thread from a user. |
| US11509617B2 |
System and method for inmate notification and training in a controlled environment facility
A messaging system for relaying messages to groups of inmates located in one or more controlled-environment facilities. The system receives a message from a user and a recipient designation identifying those inmates designated for receiving the message. The system performs a content check of the message or requests administrator authorization of the message, and then packages the message in a format designated by the facility. The packaged message includes the message itself, and also recipient information and other delivery information. The message may be packaged uniquely according to facility specifications. At the facility, the received message is unpacked. Recipients are identified from the recipient designation in the message, and delivery methods are retrieved for each of the intended recipients. Delivery of the message is then carried out, at a time designated in the message, according to the retrieved delivery methods. |
| US11509616B2 |
Assistance during audio and video calls
Implementations relate to providing information items for display during a communication session. In some implementations, a computer-implemented method includes receiving, during a communication session between a first computing device and a second computing device, first media content from the communication session. The method further includes determining a first information item for display in the communication session based at least in part on the first media content. The method further includes sending a first command to at least one of the first computing device and the second computing device to display the first information item. |
| US11509615B2 |
Generating customized electronic messaging graphics
A system according to various exemplary embodiments includes a processor and a user interface coupled to the processor, the user interface comprising an input device and a display screen. The system further comprises a sensor component coupled to the processor, the sensor component comprising a location sensor for determining location information associated with the system, and memory coupled to the processor and storing instructions that, when executed by the processor, cause the system to perform operations comprising: retrieving sensor information from the sensor component, the sensor information including location information from the location sensor; retrieving, from the memory, avatar information associated with a user of the system; generating a customized graphic based on the sensor information and the user's avatar information; and presenting the customized graphic within an electronic message via the display screen of the user interface. |
| US11509614B2 |
Method and system for image sharing and feedback
A method for providing a service for image sharing and feedback is provided. The method includes providing a software application to execute on a computing device wherein the software application includes a photo war component and a photo contest component. The photo war component provides for presenting users multiple photos and receiving a selection of one of the multiple photos and the photo contest component provides for presenting users with multiple photos and receiving votes or likes for the photo. |
| US11509613B2 |
System and method for enabling an external-system view of email attachments
A method and email application enable email attachments to be viewed through a system external to the email application itself in accordance with select categories. The email application creates categories and categorizes the email attachments according to such categories. The email application then maps the categories into a format understandable by the external system for category information and provides the mapped categories to the external system in such format In response to receiving a request from the external system for the contents of one of the mapped categories and in response to such category having no further subcategories, the email application identifies the email attachments under such category and maps the identified email attachments to file names. The file names are then provided to the external system as the contents of such category. |
| US11509612B2 |
Modifying an avatar to reflect a user's expression in a messaging platform
Systems and methods are provided for facilitating the presentation of expressive intent and other status information with messaging and other communication applications. The expressive intent is based on expressive effect data associated with the message recipients and/or message senders. The expressive intent can be conveyed through avatars and modified message content. The avatars convey gestures, emotions and other status information and the presentation of the avatars can be reactive to detected state information of the message recipient(s), message sender(s) and/or corresponding messaging device(s). |
| US11509593B2 |
Congestion control for low latency datacenter networks
Systems and methods for controlling congestion of a data network are provided. An engine round-trip time (RTT) and a fabric RTT for a network flow are determined. An engine-based congestion window size for the flow is determined based on the engine RTT and a target engine RTT. A fabric-based congestion window size for the flow is determined based on the fabric RTT and a target fabric RTT. The smaller of the engine-based congestion window size and the fabric-based window size is selected for use in transmitting a future packet associated with the flow. The target engine RTT is determined based in part on the current congestion window used to transmit packets for the flow and/or the target fabric RTT is determined based on a number of hops packets associated with the flow traverse from a source to a destination associated with the flow. |
| US11509592B2 |
Dynamic network receiver-driven data scheduling over a datacenter network for managing endpoint resources and congestion mitigation
A network endpoint receiver controls packet flow from a transmitter. Packets are received via a network in packet traffic according to a push mode, where the transmitter controls pacing of transmitting the packets. Characteristics related to the packet traffic are monitored at the receiver. The monitored characteristics are compared to reception performance parameters, and based on the comparison, a decision is made to switch from the push mode to a pull mode for controlling the packet flow. The receiver transmits a pull mode request packet to the transmitter, where the pull mode request packet indicates a pacing of subsequent packets transmitted by the transmitter to the receiver in accordance with the pull mode. Pacing of further transmitted packets may be controlled by subsequent pull mode request packets sent over time to the transmitter by the receiver. Similarly, the receiver may control additional transmitters to transmit at equal or different rates. |
| US11509588B2 |
Method and apparatus for service provision in a communication network
A method (100) for managing the provision of a service between origin and destination endpoints over a communication network is disclosed. The communication network comprises at least two Autonomous Systems (ASs) and an Abstraction and Control of Traffic Engineered Networks Virtual Network (VN) between the origin and destination endpoints. The method comprises defining, at each of the origin and destination endpoints, a service segregation loopback interface corresponding to a subset of traffic belonging to the service (110). The method further comprises binding the subset of traffic to the VN by exposing the service segregation loopback interface defined at the destination endpoint as routing next hop only to traffic belonging to the subset (120). |
| US11509587B2 |
Multiple QoS traffic splitting over multiple heterogeneous links
A system, method, and computer-readable medium are disclosed for performing an intelligent connectivity operation. The intelligent connectivity operation includes: identifying a plurality of quality parameters associated with respective network traffic types of an application, each respective network traffic type having an associated traffic stream; constructing a preference mapping, the preference mapping being based upon the plurality of quality parameters associated with the respective aspects of the application; identifying a best-suited network link for each of the traffic streams, the determining using the preference mapping; and, assigning each network traffic stream to a particular network link based upon the identifying the best-suited network link for each of the traffic streams. |
| US11509586B2 |
Management device, communication system, and non-transitory computer-readable recording medium
A management device includes an obtaining unit that obtains the attribute data of at least a communication performed among terminal devices in a communication system; a determining unit that performs a predetermined determination operation based on the attribute data obtained by the obtaining unit, and outputs the likelihood of the communication being followed by other communication relevant to the communication; and a communication control unit that, based on the output of the determining unit, controls the period of time during which the terminal devices involved in the communication are able to use the line of the communication system on a priority basis. |
| US11509585B1 |
Balancing traffic of multiple realms across multiple resources
Methods, computer readable media, and devices for balancing traffic of multiple realms across multiple resources such that a load balancing algorithm delivers equal flows of traffic to the multiple resources are disclosed. One method may include identifying a high risk realm and two low risk realms from among a plurality of realms, identifying three resources from among a plurality of resources, and distributing the high risk realm, the first low risk realm, and the second low risk realm across the three resources such that the high risk realm and a first low risk realm share a first resource, the high risk realm and a second low risk realm share a second resource, the two low risk realms share a third resource, traffic of the high risk realm is load balanced equally, and traffic of the two low risk realms is load balanced unequally. |
| US11509575B2 |
Selection of a transport protocol for supporting a label distribution protocol
Various example embodiments for supporting selection of a transport protocol for use in supporting a label distribution protocol in a label switching network are presented. Various example embodiments for supporting selection of a transport protocol for use in supporting a label distribution protocol in a label switching network may be configured to support multiple transport protocol options for use in supporting use of the label distribution protocol between a pair of label switched routers in the label switching network. Various example embodiments for supporting selection of a transport protocol for use in supporting a label distribution protocol in a label switching network may be configured to use the selected transport protocol to support various aspects of the label distribution protocol (e.g., establishment of a label distribution protocol session based on the label distribution protocol, label distribution based on the label distribution protocol, and so forth). |
| US11509571B1 |
Cost-based routing mesh for facilitating routing through an SD-WAN
Some embodiments of the invention provide a method of facilitating routing through a software-defined wide area network (SD-WAN) defined for an entity. A first edge forwarding node located at a first multi-machine site of the entity, the first multi-machine site at a first physical location and including a first set of machines, serves as an edge forwarding node for the first set of machines by forwarding packets between the first set of machines and other machines associated with the entity via other forwarding nodes in the SD-WAN. The first edge forwarding node receives configuration data specifying for the first edge forwarding node to serve as a hub forwarding node for forwarding a set of packets from a second set of machines associated with the entity and operating at a second multi-machine site at a second physical location to a third set of machines associated with the entity and operating at a third multi-machine site at a third physical location. The first edge forwarding node serves as a hub forwarding node to forward the set of packets from the second set of machines to the third set of machines. |
| US11509568B2 |
Protocol independent multicast designated networking device election system
A Protocol Independent Multicast (PIM) designated networking device election system includes a first networking device and a second networking device that are coupled to the first edge device. The second networking device receives a first PIM message from the first networking device and determines that the first PIM message indicates that the first networking device supports designated networking device election based on an interface performance property. The second networking device then determines whether a first interface performance property indication indicates that a first interface performance property of the first networking device or a second interface performance property of the second networking device satisfy an interface performance property condition. In response to determining that the second interface performance property satisfies the interface performance property condition, the second networking device forwards first data traffic received at the second networking device toward the first edge device. |
| US11509563B2 |
Systems and methods for testing electronic devices using master-slave test architectures
A master test system may comprise cable modem termination systems, resource servers, provisioning/Session Initiation Protocol (SIP) servers, call management system (CMS) servers, Data over Cable Service Interface Specification/Wide Area Network (DOCSIS/WAN) servers, test controller servers, etc. Servers on the master test system may facilitate tests of devices under test (DUTs) coupled to the master test system. Servers on the master test system and/or slave test systems may facilitate tests of DUTs coupled to slave test systems that are coupled to the master test system. The slave test system(s) may comprise resource servers and test controller servers. In various implementations, the servers on the slave test system(s) may facilitate tests of DUTs coupled to the slave test system(s). |
| US11509561B2 |
Performance measurement using extended bidirectional forwarding control packet
Techniques are described for generating and using an extended Bi-directional Forwarding Detection (BFD) control packet in a network. The extended BFD control packet includes a control message that includes a BFD session information, an identifier associated with the device sending the BFD control packet, and a payload part. The extended BFD control packet may be used to perform packet loss and/or packet delay related measurements. |
| US11509560B2 |
Information processing apparatus, communication system, and information processing method
An information processing apparatus includes circuitry; and a memory storing computer-executable instructions that cause the circuitry to generate a password for connecting to a communication relay apparatus based on an operation to use the communication relay apparatus; transmit, to the communication relay apparatus, an addition request signal representing a request to add an identifier for identifying the communication relay apparatus, the addition request signal including the identifier and the generated password for connecting to a network that is set in association with the identifier on a per-identifier basis; and transmit, to the communication relay apparatus, a deletion request signal, which includes the identifier, representing a request to delete the identifier upon determining that an elapsed time from when the communication relay apparatus has added the identifier has exceeded a possible usage time of using the network. |
| US11509558B2 |
Estimating network latency for traffic transported with encrypted internet transport protocol
A method of estimating network latency including receiving intercept data (representing observations of requests sent by a client node and responses to the respective requests from a host node), detecting a burst of network traffic bounded by a first idle interval and/or second idle interval, and estimating download and/or upload latencies associated with the burst, wherein the download latency is estimated to be an amount of time between observation of an inferred first request of the burst from the client node until observation of a first response from the host node following the inferred first request, and the upload latency is estimated to be an amount of time between observation of a last inferred data packet of the burst from the host node to the client node until observation of a last inferred ACK packet from the client node following the last inferred data packet from the host node. |
| US11509556B2 |
Determining packet loss in a fronthaul link
It is presented a method for determining packet loss in a fronthaul link of a radio access network. The method being performed in a packet loss determiner and comprising the steps of: obtaining a set of user equipments, UEs, that are all scheduled to communicate over a radio interface in a scheduling interval; creating a subset of UEs, comprising a number of UEs, from the set of UEs, that are the UEs in the set being most vulnerable to fronthaul packet loss; determining, for each UE in the subset of UEs, whether the communication in the scheduling interval was unsuccessful; and determining a packet loss in the fronthaul link depending on to what extent each one of the UEs in the subset of UEs is determined to have had unsuccessful use of the radio interface. |
| US11509551B2 |
Monitoring spectral efficiency
A method for monitoring spectral efficiency in a wireless network includes determining total number of resource blocks or resource elements allocated for each of one or more calls in the wireless network during a given time period and determining a corresponding total number of bits transmitted for each of the one or more calls during the given time period.A spectral efficiency metric is calculated for each of the one or more calls based at least in part on the total number of bits transmitted during the given time period and the total number of resource blocks or resource elements allocated for transmission during the given time period. A heat map for each of the one or more calls is generated based on geographic locations of the one or more calls. |
| US11509550B2 |
Cooperative learning system and monitoring system
A cooperative learning system usable for process monitoring in which a monitoring model is provided for each of plural processes arranged in chronological order at predetermined transition time period intervals. The system stores, in chronological order, first monitoring data in a first process, second monitoring data in a second process, and at least one monitoring result from the first process output from a first monitoring model using the first monitoring data as an input parameter. The system performs parent model learning processing for the first monitoring model using the first monitoring data and the monitoring result from the first monitoring model, and performs child model learning processing for a second monitoring model using a monitoring result from the first monitoring model at a first time as teacher data and using the second monitoring data at a second time shifted from the first time by a transition period as an input parameter. |
| US11509546B2 |
Method for feedback of streaming session
A method of operating a UE to provide feedback on a streaming session. The method includes determining when a streaming session used by an application layer of the UE is being started and/or ended. Responsive to the determination, the method transmits an indication to a RAN that the streaming session is being started and/or ended. A corresponding method of operating a network node is provided to control reporting relating to streaming sessions of UEs. The method by the network node receives an indication from an UE that a streaming session is being started and/or ended, and controls whether a Quality of Experience (QoE) configuration file is sent to the UE responsive to the indication. |
| US11509544B2 |
Determining a service level in a communication network
A method of determining an end-to-end, E2E, service level for a communications network (100) by a network management entity (101). The communications network (100) comprises one or more network domain. The method comprises obtaining (201) a first set of service level data for the one or more network domain. The first set of service level data for said one or more network domain comprises a summarized set of data derived from service level data monitored by said one or more network domain. The method further comprises determining (202) the end-to-end service level based on the obtained first set of service level data from the one or more network domain. |
| US11509542B2 |
First network node, third network node, and methods performed thereby, for handling a performance of a radio access network
A method performed by a first network node operating in a communications network is disclosed. The method is for handling a performance of a radio access network (RAN) including one or more radio network nodes. The first network node determines a configuration of one or more parameters in the RAN based on one or more machine-implemented reinforcement learning (RL) procedures to optimize the performance of the RAN based on the one or more parameters. The RL procedures are further based on at least one of: i) one or more physical characteristics of a deployment of the RAN, ii) one or more radio characteristics of the RAN, and iii) a location of users or traffic load in the RAN. The first network node then initiates providing one or more indicators of the determined configuration to a second network node. |
| US11509537B2 |
Internet of things device discovery and deployment
Disclosed are various examples for Internet of Things (IoT) device discovery and deployment. In some embodiments, a device identifier is received from an IoT device. The IoT device is determined, based on the device identifier, to be associated with a device account with a management service. An enrollment of the IoT device is performed. A capabilities declaration is received from the IoT device. IoT device instructions are determined based on the capabilities declaration. IoT device instructions are transmitted to the IoT device, causing it to perform a capability specified in the capabilities declaration. |
| US11509533B2 |
Methods and systems for network device name management
Embodiments of a device and method are disclosed. In an embodiment, a method of network device name management involves at a cloud server, determining a device name of a network device to be deployed at a customer site based on site survey result information of the customer site, at the cloud server, receiving network device information of the network device after the network device is deployed at the customer site, and at the cloud server, associating the device name of the network device with the network device information of the network device. |
| US11509531B2 |
Configuration sharing and validation for nodes in a grid network
A command and response messaging mechanism for use between nodes of a homogeneous data grid can allow a configuration state to be quickly provisioned to the nodes of a cluster at run time for an application running on the data grid. For example, a processing device of a node can receive a global configuration state from a peer node in the grid network. The processing device can apply common values for symmetrical attributes from the global configuration state to a local configuration. The processing device can also apply individual node values for asymmetrical attributes from the global configuration state to the local configuration. The processing device can then run the application on the local node using the local configuration. |
| US11509530B2 |
Impartial buffering in stream processing
Techniques for generating a stream processing pipeline are provided. In one embodiment, a method includes generating a plurality of pipeline stages of a stream processing pipeline in accordance with a configuration file. The plurality of pipeline stages includes a first processing stage designated for a first data service and a second processing stage designated for a second data service and operating in parallel to the first processing stage. |
| US11509529B2 |
Switch component secure upgrade system
A switch component secure upgrade system includes a dual-ported switch component, a central processing system that is connected to the switch component via the components read-only port, and a management controller system that is connected to the switch component via the components read-write port. The management controller system receives a component upgrade request that is encrypted with a management controller public key, decrypts the component upgrade request using a management controller private key, and validates the component upgrade request, which is signed with a release management private key, using a release management public key. In response to validating the component upgrade request, the management controller system validates a component upgrade payload that is included in the component upgrade request and, in response, upgrades the switch component via the read-write port using the component upgrade payload. |
| US11509527B1 |
Assisted and context-driven network changes
Systems and methods described herein provide an assisted network change service. A network device stores a record of network resources for a customer network and generates, based on the record, a visual representation of the network topology for a selected site of the customer network. The network device receives, from the customer, input for a change to configuration parameters of one of the network resources and verifies if the change to the configuration parameters is compatible with other settings in the customer network. When the change to the configuration parameters is compatible with other settings in the customer network, the network device generates a change request based on the configuration parameters and invokes provisioning to implement the change request for the customer network. |
| US11509525B1 |
Device configuration by natural language processing system
Systems and methods for device control by a natural language processing system are disclosed. A user may desire to utilize a voice-enabled device to associate an accessory device with a hub device without having to utilize third-party software associated with the accessory device and/or the hub device. The user may provide a user utterance to associate the accessory device with the hub device. Audio data corresponding to the user utterance may be analyzed and utilized to generate and send directive data to a third-party remote system to transition the hub device to a join mode. Upon association completion, audio may be output confirming that the association has been established successfully. |
| US11509524B2 |
Flexible interface between a baseband controller and remote units of a C-RAN
In one embodiment, a method comprises determining which functional splits between processing performed in a baseband controller and processing performed in a remote unit are supported by each remote unit served by the baseband controller. The method further comprises determining at least one functional split in the processing performed in the baseband controller and the processing performed in the remote units to use. The method further comprises, for each said at least one functional split and each remote unit associated with that functional split, configuring the processing performed in the baseband controller and the processing performed in that remote unit are configured to use that functional split and configuring a respective interface between the baseband controller and that remote unit are configured for communicating front-haul data therebetween using that functional split. |
| US11509523B2 |
Automated scripting for managed devices
Systems and methods are included for providing feature sets to groups of managed user devices within an enterprise mobility management (EMM) system. A feature set can enable a user device to detect one or more triggering events, and in response, automatically perform a specified action. An administrator can request a feature set using an interface provided by a management server. The management server can enroll the user device, install a management agent on the user device, and automatically build and deliver the requested feature set to the user device. After receiving the feature set, the management agent of the user device can monitor for recurring triggering events without further intervention from the management server. |
| US11509520B1 |
System for providing autonomous remediation within a data center
A system, method, and computer-readable medium for performing a data center monitoring and management operation. The data center monitoring and management operation includes: monitoring data center assets within a data center; identifying an issue within the data center, the issue being associated with an operational situation associated with a particular component of the data center; notifying an administrator of the issue within the data center; identifying a remediation task, the remediation task being designed to address the issue within the data center; and, generating a remediation rule to autonomously perform the remediation task. |
| US11509518B2 |
Network fault diagnosis
A method of diagnosing faults in a utility supply network involves receiving performance data indicative of performance of the utility supply network, and receiving historical performance data indicative of a historical performance of the utility supply network and a fault associated with the historical performance data. A fault in the utility supply network is determined based on a comparison of the performance data with the historical performance data. |
| US11509516B2 |
MIMO-OFDM wireless signal detection method and system capable of channel matrix pre-processing during detection
A signal detection method for a MIMO-OFDM wireless communication system includes obtaining a channel matrix of each subcarrier for each MIMO-OFDM data packet; receiving a reception vector of each subcarrier; performing MIMO detection for a first OFDM symbol and channel matrix preprocessing to generate a global dynamic K-value table; performing MIMO detection for each subsequent OFDM symbol, the MIMO detection includes: performing the following steps for each subcarrier of a current OFDM symbol: transforming the reception vector of the current subcarrier into a LR search domain; and obtaining a LR domain candidate transmission vector of the current subcarrier, a K-value applied to each search layer of the current subcarrier during the K-best search is a global dynamic K-value in the global dynamic K-value table corresponding to the search layer. |
| US11509513B2 |
Amplitude-shift keying demodulation for wireless chargers
A power transmitter includes: a first switch coupled between a first node and a reference voltage node; a second switch configured to be coupled between a power supply and the first node; a coil and a capacitor coupled in series between the first node and the reference voltage node; a first sample-and-hold (S&H) circuit having an input coupled to the first node; and a timing control circuit configured to generate a first control signal, a second control signal, and a third control signal that have a same frequency, where the first control signal is configured to turn ON and OFF the first switch alternately, the second control signal is configured to turn ON and OFF the second switch alternately, and where the third control signal determines a sampling time of the first S&H circuit and has a first pre-determined delay from a first edge of the first control signal. |
| US11509509B2 |
Environmentally-aware run-time configuration of filters in a high-speed data channel
A physical layer transceiver, for connecting a host device to a wireline channel medium having a cable length, includes a host interface for coupling to a host device, a line interface for coupling to the channel medium, and filter circuitry operatively coupled to the line interface. The filter circuitry includes a plurality of filter segments, fewer in number than a total number of link segments in the cable length. Individual filter segments in the plurality of filter segments are configurable to correspond to individual link segments, and are separately controllable from other filter segments. Control circuitry detects a change of transmission conditions in a particular link segment, and upon detection of the change of transmission conditions, changes a configuration of one of the plurality of filter segments to cause an alteration in filtering of signals in the particular link segment at which the change of transmission conditions is detected. |
| US11509501B2 |
Automatic port verification and policy application for rogue devices
Systems, methods, and computer-readable storage media for automatic port identification. The present technology can involve determining that a wireless device has connected to a network device on a network, and determining which of the ports on the network device the wireless device has connected to. The determining the port connected to the wireless device can involve determining respective traffic patterns to be provided to selected ports on the network device, determining a traffic pattern transmitted by the wireless device, determining that the traffic pattern transmitted by the wireless device has a similarity to a traffic pattern from the respective traffic patterns, and based on the similarity, determining that a port associated with the traffic pattern is connected to the wireless device. The present technology can also involve selecting a port policy for the port. |
| US11509499B2 |
Detecting abnormal events in vehicle operation based on machine learning analysis of messages transmitted over communication channels
A computer implemented method of identifying an abnormal event in an operational environment of a vehicle, comprising using one or more processors adapted for receiving a plurality of messages intercepted by one or more devices adapted to monitor messages transmitted via one or more segments of one or more communication channels of a vehicle, applying a plurality of trained machine learning models to evaluate compliance of each of the intercepted messages with one or more baseline models according to feature(s) identified for each intercepted message, the baseline model(s) defining learned message patterns is created by training the plurality of machine learning models with a plurality of training datasets comprising training messages reflecting valid operation of the vehicle, identifying incompliant intercepted message(s) which is incompliant with the baseline model(s), the incompliant message(s) is transmitted as result of one or more abnormal event and generating an alert indicative of the abnormal event(s). |
| US11509491B2 |
Power-over-ethernet (POE) breakout module
Presented herein are embodiments of a power-over-Ethernet (PoE) breakout system that may be used to breakout a PoE port from a PoE information handling system into a number of breakout ports. In one or more embodiments, a PoE breakout system comprises: a PoE port for connecting to a PoE information handling system, such as a PoE switch; a plurality of breakout ports for connecting to powered devices, wherein each breakout port is configured to supply power to a powered device; and a power management module electrically coupled to the PoE port and configured to supply power to each breakout port according to a configuration that sets a power level for that breakout port. In one or more embodiments. the PoE breakout system comprises a data communications module that switches data traffic to a correct PoE breakout port according to its intended powered device. |
| US11509484B1 |
Security settlement using group signatures
Systems and methods relating to settlement of securities without revealing ownership including the end owner are described. In some implementations, ownership or control of a security may be managed by using group membership technology to revoke the signing rights of the seller and adding signing rights to the buyer. Group membership with group signatures allow for one group public key and a plurality of private keys, where each private key is associated with a group member. Signatures create by different group members are indistinguishable to verifiers but a group manager is able to determine which member has signed, link member signatures, implement controls and/or limits, and revoke and add signatory capability when needed. In some implementations, revocation of signatory capability is done with the cooperation of a Digital Certificate Authority. |
| US11509481B2 |
Token processing with selective de-tokenization for proximity based access device interactions
A method includes providing an initial communication, by an access device to a user device. The access device can receive the user identifier and the access token and receive a secret associated with the user. The access device can determine, using the user identifier and/or the access token, if the transaction is authorized by an authorizing entity computer associated with the access device or by an authorizing entity not associated with the access device. If the transaction is authorized by the authorizing entity computer associated with the access device, the access device can transmit an authorization request message comprising the user identifier, the secret, and the access token to the authorizing entity computer. The authorizing entity computer validates the secret, retrieves a real credential of the user using the user identifier, and authorizes the transaction. |
| US11509478B2 |
Password based threshold token generation
Embodiments disclosed herein are directed to methods and systems of password-based threshold authentication, which distributes the role of an authentication server among multiple servers. Any t servers can collectively verify passwords and generate authentication tokens, while no t−1 servers can forge a valid token or mount offline dictionary attacks. |
| US11509477B1 |
User data validation for digital identifications
In general, one innovative aspect of the subject matter described in this specification may be embodied in methods that may include validating user data pages extracted from a digital identification in circumstances where a user device that includes the digital identification is either unavailable or presently lacks network connectivity. For instance, an authorized device may be used to extract user data pages from the digital identification by either exchanging communications with the user device using a proximity-based data exchange protocol, or by using a physical identification card to identify the digital identification on a user record. The user data pages may then be validated by comparing checksums associated with user data pages against the checksums within the user record, and decrypting the user data pages using a decryption key that is variably designated by a security status assigned to the digital identification. |
| US11509474B2 |
Method and apparatus for obtaining privacy set intersection, device and storage medium
A method and apparatus for obtaining a privacy set intersection are provided. The method may include: encrypting a privacy set of an intersection initiator by using a homomorphic encryption algorithm to generate a cipher text, a cipher text function, a public key, and a private key of the intersection initiator; delivering the cipher text, the cipher text function, and the public key of the intersection initiator to an intersection server; receiving a to-be-decrypted function value of a privacy set of the intersection server from the intersection server; and decrypting the to-be-decrypted function value of the privacy set of the intersection initiator by using the private key, to obtain an intersection element of the privacy set of the intersection initiator and the privacy set of the intersection server. |
| US11509473B2 |
Architecture and method for hybrid isogeny-based cryptosystems
At least one computer processor configured with a single prime field accelerator having software-based instructions operably configured to compute both isogeny-based cryptography equations and elliptic curve cryptography equations using a plurality of shared computations resident on a shared memory storage and that include finite field arithmetic and elliptic curve group arithmetic sequentially computed with an architecture controller. |
| US11509469B2 |
Methods and systems for password recovery based on user location
A secure method and/or system allowing a user to import, export, recover and use their private keys based in part on the user's location information, to allow for reliable, consistent, and easy management of user identity and private keys across all of a user's devices and eliminate of traditional username/password authentication schemes. |
| US11509467B2 |
Story assisted mnemonic phrase
Embodiments disclosed herein are related to generating and using a private key recovery seed based on random words extracted from a generated story to recover the private key. An input story is received from a user. The story includes random words and filler words that were previously generated. The number of random words generated is based on an entropy level. The random words included in the story are extracted. This means that the user does not need to enter any random words that are not included in the story to recover the private key. The random words are input into a first key recovery mechanism to thereby generate a private key recovery seed. The private key recovery seed is then input into a second private key recovery mechanism, the second private key recovery mechanism generating a recovered private key upon performing a recovery operation on the private key recovery seed. |
| US11509465B2 |
Computing device and related methods providing virtual session access using group connection leases and user interface (UI) caches
A computing device may include a memory configured to store a group connection lease and a group user interface (UI) cache shared by different users within a user delivery group. The computing device may also include a processor coupled to the memory and configured to establish communications links with a plurality of smart card devices associated with different users within the user delivery group, initiate virtual sessions for the different users based upon the group connection lease responsive to establishing the communications links with the smart card devices, and launch the virtual sessions for the different users based upon the group UI cache. |
| US11509461B2 |
System and method for obfuscating opcode commands in a semiconductor device
A method for securing an integrated circuit chip includes obtaining a first value from a first storage area in the chip, obtaining a second value from a second storage area in the chip, generating a third value based on the first value and the second value, and converting a first opcode command obfuscated as a second opcode command into a non-obfuscated form of the first opcode command based on the third value. The first value corresponds to a physically unclonable function (PUF) of the chip. The second value is a key including information indicating a type of obfuscation performed to obfuscate the first opcode command as the second opcode command. The third value may be an inversion flag indicating a type of obfuscation performed to obfuscate the first opcode command as the second opcode command. |
| US11509458B2 |
Method and system for securely replicating encrypted deduplicated storages
A method and system for securely replicating encrypted deduplicated storages. Specifically, the method and system disclosed herein entail the replication and migration of encrypted data between storage systems that support deduplication. More specifically, a first encrypted data, which may have been encrypted using a first public cryptographic key and consolidated on a source storage system, may be translated into an interim (yet still encrypted) state using a first split private cryptographic key. Thereafter, using a compound conversion key, the interim state data may be further translated into a second encrypted data, which may be characterized as being encrypted by a second public cryptographic key. Therefore, substantively, the method and system disclosed herein may be directed to the translation of encrypted data from one encryption scheme to another while in-flight from a source storage system to a target storage system. |
| US11509455B2 |
Blockchain for general computation
There may be provided a computer-implemented method. It may be implemented using a blockchain network such as, for example, the Bitcoin network. The computer-implemented method includes: i) monitoring a computational task distribution system to detect a challenge to a proposer string provided by a proposer computer system in response to a request made by a requester computer system, the request specifying a computational task and a first digital asset associated with the request, the proposer string indicated by a hash of a solution to the computational task, the proposer string specifying a second digital asset referenced in an input to a proposer transaction associated with the proposer string; and ii) as a result of detecting the challenge, at least: a) resolving the challenge using a first blockchain network by at least selecting a solution from a set of solutions provided to the first blockchain network, the set of solutions at least including the proposer string; and b) distributing digital assets from the first digital asset and the second digital asset to one or more parties of the computational task distribution system based at least in part on the solution. |
| US11509454B2 |
Apparatus for processing modular multiply operation and methods thereof
Disclosed is a ciphertext computation method. The ciphertext computation method includes: receiving a modular computation command for a plurality of ciphertexts; performing a modular computation for the plurality of ciphertexts by using a lookup table storing a plurality of predetermined prime number information; and outputting a result of the computation. |
| US11509453B2 |
Apparatus and method for data analysis
A method for data analysis according to an embodiment includes acquiring, from a client device, a ciphertext for a precomputation result generated by applying some of a plurality of operations for performing an analysis algorithm based on target data to the target data, and generating an encrypted computation result for remaining operations of the plurality of operations by using the ciphertext. |
| US11509452B2 |
Method for generating digital quantum chaotic wavepacket signals
A method for generating digital quantum chaotic orthonormal wavepacket signals includes the following steps: construct a N-dimensional Hermitian matrix Ĥ; calculate N eigen-wavefunctions φj of a quantum Hamiltonian system with the Hamiltonian Ĥ by some numerical calculation methods, wherein the Hamiltonian is the Hermitian matrix Ĥ; extract some or all of the eigen-functions φj with obvious chaos features as quantum chaotic eigen-wavefunctions according to a chaos criterion; generate some semi-classical digital quantum chaotic wavepacket signals φj(n) with the same mathematical form as the quantum chaotic eigen-wavefunctions and length N from the selected quantum chaotic eigen-wavefunctions according to the mathematical correspondence between the classical signal and the wavefunction in quantum mechanics. By combining the quantum state chaotic transition theory and the classical time-frequency analysis, some semi-classical quantum chaotic wavepacket digital signals are generated according to the mathematical correspondence between the classical time-frequency signal and the wavefunction in quantum mechanics. |
| US11509450B2 |
Clock frequency adjustment for semi-conductor devices
A method and an apparatus for clocking data processing modules, with different average clock frequencies and for transferring data between the modules are provided. The apparatus includes a device for providing a common clock signal to the modules. Clock pulses are deleted from the common clock signal to individual modules in dependence on the clocking frequency required by each module. The clock pulses are applied to the modules between which the data is to be transferred at times consistent with the data transfer. |
| US11509448B2 |
Method and apparatus of handling multiple active BWPs
The present disclosure relates to a communication method and system for converging a 5th-Generation (5G) communication system for supporting higher data rates beyond a 4th-Generation (4G) system with a technology for Internet of Things (IoT). The present disclosure may be applied to intelligent services based on the 5G communication technology and the IoT-related technology, such as, one or more of: a smart home, a smart building, a smart city, a smart car, a connected car, health care technologies, digital education technologies, smart retail technologies, and security and safety services. A method and apparatus for handling of multiple active bandwidth parts (BWPs) are provided. |
| US11509446B2 |
Dynamic resource allocation among different OFDM numerology schemes
The present disclosure relates to a resource allocation procedure for allocating time-frequency radio resources by a scheduler in a mobile communication system. A plurality of numerology schemes are defined, each partitioning a plurality of radio resources of the mobile communication system into resource scheduling units in a different manner. A reference resource set is defined per numerology scheme, each being associated to a set of radio resources usable for being allocated according to the respective numerology scheme. The reference resource set of at least one numerology scheme overlaps with the reference resource set of at least another numerology scheme in the frequency and/or time domain. The resource allocation procedure is performed for allocating radio resources to one or more user terminals according to the numerology schemes. The resource allocation procedure is performed for each numerology scheme based on a scheduling time interval defined for the respective numerology scheme. |
| US11509445B2 |
Information indication method, terminal device, and network device
This disclosure discloses an information indication method, a terminal device, and a network device. The method includes determining a transmission feature parameter, where the transmission feature parameter is used to send a physical channel on a sidelink (SL), and the transmission feature parameter includes at least one of a subcarrier spacing (SCS), a cyclic prefix (CP), a bandwidth part (BWP), or a demodulation reference signal (DMRS) configuration parameter; and sending transmission feature information, where the transmission feature information is used to indicate the transmission feature parameter. |
| US11509444B2 |
Method for receiving aperiodic tracking reference signal and terminal
A method for receiving an aperiodic tracking reference signal and a terminal are provided. The method includes: receiving downlink control information, where the downlink control information includes information used for triggering an aperiodic tracking reference signal in a secondary cell; receiving the aperiodic tracking reference signal in the secondary cell based on the downlink control information; and if a validation condition of the aperiodic tracking reference signal is met, determining that the aperiodic tracking reference signal is valid, where the validation condition includes at least that a receiving moment of the aperiodic tracking reference signal is after completion of radio frequency retuning between the terminal and the secondary cell. |
| US11509443B2 |
Method and device in node for wireless communication
The disclosure provides a method and a device in a communication node for wireless communication. The communication node first receives first information and second information, and then transmits a first radio signal in W1 time sub-window(s); the first information is used for determining X candidate time window(s), any one of the X candidate time window(s) has a time length equal to a first time length, and the first time length is fixed; for a subcarrier spacing of a subcarrier occupied by the first radio signal, one of the X candidate time window(s) comprises Y candidate time sub-window(s), and the Y is related to the subcarrier spacing of the subcarrier occupied by the first radio signal; the second information is used for indicating W candidate time sub-window(s) out of the Y candidate time sub-window(s); and each of the W1 time sub-window(s) is one of the W candidate time sub-window(s). |
| US11509440B2 |
Method and apparatus for indicating synchronization signal block group indication information within synchronization signal blocks
Embodiments of the present invention provide a synchronization signal block indication method, a synchronization signal block determining method, a network device, and a terminal device. The method includes: generating, by a network device, a synchronization signal block indication message, where the synchronization signal block indication message includes synchronization signal block group indication information which is used to indicate an synchronization signal block group sent by the network device, and synchronization signal block indication information is used to indicate an synchronization signal block sent by the network device in each synchronization signal block group, and locations of a synchronization signal block sent by the network device in synchronization signal block groups sent by the network device are the same; and sending, by the network device, the synchronization signal block indication message. |
| US11509433B2 |
Communication device and communication method
[Object] To provide a communication device that enables degradation in the quality of communication between a base station device and a terminal device to be avoided when a sidelink channel is set.[Solution] There is provided a communication device including: a control unit configured to allocate a predetermined gap to a boundary of a resource of a channel to be used in inter-device communication with a resource other than the resource of the channel in a communication system in which signals from different transmission sources are mixed and placed. |
| US11509431B2 |
Methods and systems for resource allocation
Various methods and systems are provided for allocating time-frequency resources for downlink (DL) and uplink (UL) communications between base stations and mobile stations. Different forms of resource allocation messages including combinations of bitmaps and bitfields provide additional information about the resources and/or how they are assigned. In some implementations the resource allocation messages enable reduced overhead, which may ultimately improve transmission rates and/or the quality of transmissions. |
| US11509430B2 |
Method for operating an automation network having packet-based communication between a host and client
An automation network provides packet-based communication between the host and a client, wherein the client determines output values from the host in the event of errors in the communication between the host and the client, where the determination of output data can be performed in a separate local processing module in accordance with a less complex method than on the host, such that it becomes possible to perform complex open-loop and closed-loop control tasks on the host even in the case of mobile clients or other clients that are difficult to wire. |
| US11509429B2 |
Initial and retransmissions of data for V2X transmissions
The invention relates to a transmitting device for performing an initial and one or more retransmissions of data via a sidelink interface. A receiver and processor perform a resource sensing procedure to acquire information about radio resources usable for the device to transmit data at a later point in time. The processor performs an autonomous radio resource allocation to select time-frequency radio resources within a transmission window to be used for performing a first transmission of the data, based on information acquired by the resource sensing procedure. The processor determines a data transmission timing pattern, that indicates a transmission timing for performing one or more transmissions of data. A transmitter performs the first data transmission using the selected time-frequency radio resources and performs the data retransmissions at the transmission timing defined by the determined data transmission timing pattern with respect to the first data transmission. |
| US11509428B2 |
Data transmission method and apparatus having data reuse mechanism
The present invention discloses a data transmission method having data reuse mechanism that includes the steps outlined below. A driver corresponding to a communication circuit is operated as a transmission terminal to analyze under-transmitted data to generate reuse setting information, indication information and packets having a complete packet and incomplete packets so as to be transmitted by the transmission terminal through a transmission interface to be received by the communication circuit as a receiving terminal. The receiving terminal identifies the complete packet and the incomplete packets according to the indication information. A data location that a reusable data section corresponds to is determined according to the reuse information. The complete packet is outputted. A non-reusable data section of each of the incomplete packets and the reusable data section of the complete packet are reconstructed to output reconstructed packets according to the data location. |
| US11509426B2 |
URLLC HARQ processes
A wireless device receives configuration parameters indicating: a plurality of hybrid automatic repeat request (HARQ) processes of a cell; a subset of the plurality of HARQ processes; and a HARQ process identifier offset. A downlink control information (DCI) comprising a first HARQ process identifier and a resource assignment is received. The first HARQ process identifier indicates a HARQ process in the subset of the plurality of HARQ processes. A second HARQ process identifier is determined based on the first HARQ process identifier and the HARQ process identifier offset. The second HARQ process identifier indicates a second HARQ process of the plurality of HARQ processes. Based on the resource assignment, a transport block of a HARQ buffer associated with the second HARQ process is transmitted. |
| US11509425B2 |
Method for determining HARQ-ACK feedback time, method for indicating HARQ-ACK feedback time, terminal device and network device
A method for determining a HARQ-ACK feedback time, a method for indicating a HARQ-ACK feedback time, a terminal device, and a network device are provided. The method includes: receiving a downlink control signaling, wherein the downlink control signaling carries a HARQ-ACK feedback time parameter, and the downlink control signaling is used to activate a downlink semi-persistent scheduling configuration; receiving semi-persistent scheduling data for downlink transmission on a first time-domain resource; and determining the HARQ-ACK feedback time of the semi-persistent scheduling data for the downlink transmission, based on the HARQ-ACK feedback time parameter and the first time-domain resource. |
| US11509421B2 |
Distribution matching circuit, distribution dematching circuit, distribution matching method, distribution dematching method, and optical transmission system
In a distribution matching circuit, output data of a plurality of LUTs forming a hierarchical tree structure sequentially designates a combination of signal point groups in a signal space managed by an LUT in an immediately lower level, and signal point information after distribution matching is output for each LUT in the lowermost level. |
| US11509416B1 |
Duplicate transmissions with channel puncturing
This disclosure provides methods, devices and systems for increasing the transmit power of wireless communication devices operating on power spectral density (PSD)-limited wireless channels. Some implementations more specifically relate to tone mapping techniques and physical layer convergence protocol (PLCP) protocol data unit (PPDU) designs that support duplicate (or “DUP mode”) transmissions with channel puncturing. In some implementations, a wireless communication device may transmit a PPDU carrying user data over a wireless channel excluding one or more punctured subchannels, where the user data is transmitted in a DUP mode. As such, the user data may be mapped to a number (N) of tones spanning a first portion of the wireless channel and a duplicate copy of the user data may be mapped to N tones spanning a second portion of the wireless channel. |
| US11509412B2 |
Fast initial acquisition by transmitting non-orthogonal synchronization signal blocks in 5G new radio
Systems and methods of initial acquisition in a NR system are described. A UE receives time and frequency superposed SSBs from a gNB. If the PSS and SSS of each SSB is independent of a block index of the SSB, the UE receives an additional reference signal scrambled by a beam index of the SSB and uses the reference signal to discriminate between the SSBs. The reference signal is FDMed within a null-subcarrier region of the SSB or outside of the SSB. If the PSS and SSS of each SSB is scrambled using the block index, the UE separates the PBCH measurements, iteratively identifies a block index associated with a DMRS of the PBCH with the highest L1-RSRP level measurement, decodes and reconstructs the PBCH, and subtracts the reconstructed PBCH from the SSB before transmitting an indication of the PBCH with the highest L1-RSRP level measurement to the gNB. |
| US11509405B2 |
Mobile terminal testing apparatus, mobile terminal testing system, and control method for mobile terminal testing apparatus
A test control unit controls a mobile terminal such that a first period T1, T3, T5, and T7 in which power of a transmission signal is maintained constant, and a second period T2, T4, T6, and T8 in which the power of the transmission signal is changed stepwise are alternately and continuously repeated, and changes a maximum value of signal power that is receivable by a pseudo base station unit in each first period T1, T3, T5, and T7, according to a power range of the transmission signal to be changed in each second period T2, T4, T6, and T8. A minimum value of the signal power that is receivable by the pseudo base station unit is determined, according to a maximum value of the signal power that is receivable by the pseudo base station unit and a reception dynamic range of a mobile terminal testing apparatus. |
| US11509404B2 |
Automated calibration unit, frequency conversion circuit and method of performing calibration of a test and measurement instrument
An automated calibration unit has several ports for connecting with respective ports of a test and measurement instrument to be calibrated. The automated calibration unit has a frequency conversion circuit that is non-linear and reciprocal in amplitude and phase. The automated calibration unit has at least one switching circuit with several switch states. The automated calibration unit is configured to selectively connect each one of the several ports to another one of the several ports depending on the switch state, thereby providing a through connection via the frequency conversion circuit. The automated calibration unit is configured to selectively connect each one of the several ports to at least one of several calibration standards respectively depending on the switch state. Further, a frequency conversion circuit and a method of performing calibration of a test and measurement instrument are described. Moreover, a method of absolute power calibration transfer is described. |
| US11509395B2 |
Data transmission method, related apparatus, and system
A data transmission method includes receiving, by an optical line terminal (OLT) from an optical network unit (ONU), uplink burst data that includes a synchronization data block and a payload, where the synchronization data block includes first synchronization data, wherein the first synchronization data includes a first preamble and an ONU identifier, and a first bandwidth occupied by the first frequency distribution of the first synchronization data is narrower than a second bandwidth occupied by the second frequency distribution of the payload, and obtaining, by the OLT from the first synchronization data, the ONU identifier. |
| US11509394B2 |
Controller and control method for Raman amplifier
A controller for a front-exciting Raman-amplifier that amplifies an optical signal transmitted from one end of an optical fiber to other end by inputting an excitation light to the one end, the controller includes a memory, and a processor coupled to the memory and configured to acquire communication-related information regarding communication of the optical signal in the optical fiber, when the acquired communication-related information does not indicate the communication of the optical signal, set a Raman gain of the front-exciting Raman amplifier based on a first light intensity of an amplified spontaneous scattered light of the excitation light, and when the acquired communication-related information indicates the communication of the optical signal, set the Raman gain based on a second light intensity of the optical signal output from the optical fiber. |
| US11509388B2 |
Method and an apparatus for use in a satellite communications network
A method is provided for off-loading MAC (medium access control) functionalities that were previously carried out by satellites, and carry out these functionalities by control gateways that are located on the ground, and by implementing that to simplify the operation and maintenance of the satellite communications network. |
| US11509379B2 |
Techniques for dynamic sidelink waveform selection
Techniques for dynamic sidelink waveform selection are disclosed. In an example, a user equipment (UE) may determine capabilities of the UE and at least one other UE. The UE may also dynamically select a waveform for sidelink beam training based on the capabilities. The UE may also communicate with the at least one other UE based on the selected waveform. |
| US11509377B2 |
Method and apparatus for adjusting half-power angle of antenna
A method for adjusting a half-power angle of an antenna, to adjust a maximum half-power angle or a maximum beam gain of an individual transceiver channel, includes: first determining that M antenna elements in N antenna elements connected to a first transceiver channel of an access network device need to be turned on or off, where N>M≥1, and both N and M are integers, that is, a quantity of antenna elements driven by the first transceiver channel needs to be adjusted; and then sending first indication information to the access network device, where the first indication information is used to indicate to turn on or off the M antenna elements. |
| US11509375B2 |
Multi-band beam codebook design and operations
An electronic device and method for managing an antenna operating in a combination of frequency bands. The electronic device comprises at least one antenna including a plurality of antenna elements, a transceiver operably connected with the at least one antenna and configured for communication over multiple frequency parts. The electronic device also comprises a processor operably connected to the transceiver, the processor configured to determine the multiple frequency parts; identify, from a configuration received in response to the multiple frequency parts reported in the PUCCH, a combination of one or more frequency parts from the multiple frequency parts for performing the communication; obtain a beamforming codebook; and apply one or more beams within the beamforming codebook for performing the communication. |
| US11509373B2 |
System and method for configuring a multi-mode antenna based on network performance indicators for a wireless network
A system for configuring a multi-mode antenna onboard one or more of a plurality of network devices on a wireless network is provided. The system includes one or more processors configured to obtain data indicative of a channel quality indicator associated with one or more antenna modes of a plurality of antenna modes in which the multi-mode antenna onboard one or more of the network devices is configurable. Each of the plurality of antenna modes can have a distinct radiation pattern. The one or more processors can be configured to determine one or more network performance indicators for the wireless network based on the data. The one or more processors can be configured to provide one or more control signals over the wireless network based on the one or more network performance indicators. The control signal(s) can be associated with reconfiguring an antenna mode of the multi-mode antenna. |
| US11509372B2 |
Capability information for sounding reference signal improvements
Certain aspects of the present disclosure provide techniques for capability information for sounding reference signal (SRS) improvements. An exemplary method generally includes determining a capability of the UE related to additional sounding reference signal (SRS) transmissions in a normal uplink (UL) subframe; transmitting, to a base station (BS), capability information indicating the determined capability of the UE; receiving SRS configuration information, wherein the SRS configuration information is based, at least in part, on the capability information; and transmitting at least one SRS in accordance with the SRS configuration information. |
| US11509371B2 |
Information feedback method and device, storage medium, and electronic device
Provided are an information feedback method and device, a storage medium, and an electronic device. The method includes that: N pieces of feedback information are determined according to one Channel State Information (CSI) report configuration, wherein the N pieces of feedback information includes N Rank Indications (RIs) and N Precoding Matrix Indications (PMIs), and N is an integer greater than or equal to 1; and the N pieces of feedback information are sent to a base station. |
| US11509368B1 |
Techniques for line-of-sight MIMO communications using rectangular antenna arrays
Methods, systems, and devices for wireless communications are described. A first wireless device may receive a request for beamforming information associated with line-of-sight (LoS) multiple input multiple output (MIMO) communication from a second wireless device. The first wireless device may generate a channel estimation matrix for a channel between rectangular antenna arrays of the respective wireless devices, the channel estimation matrix including one or more quadratic terms for the LoS MIMO communication. The first wireless device may generate a first sub-matrix and a second sub-matrix based on the channel estimation matrix. The first wireless device may transmit an indication of a set of precoders for the LoS MIMO communication, the set of precoders based on a symmetry associated with the first and second sub-matrices, and may receive the LoS MIMO communication from the second wireless device based on the set of precoders. |
| US11509363B2 |
Compression and decompression of downlink channel estimates
A network node (501) determines parameters (503) indicating a compression function for compressing downlink channel estimates, and a decompression function. The network node transmits the parameters, receives compressed downlink channel estimates (504), and decompresses the compressed downlink channel estimates using the decompression function. A terminal device (502) receives the parameters, forms the compression function, compresses downlink channel estimates using the compression function, and transmits the compressed downlink channel estimates. The compression function comprises a first function formed based on at least some of the parameters, a second function which is non-linear, and a quantizer. The first function is configured to receive input data, and to reduce a dimension of the input data. The decompression function comprises a first function configured to receive input data and provide output data in a higher dimensional space than the input data, and a second function which is non-linear. |
| US11509357B2 |
Relay apparatus and relay method
A relay device for relaying communications between a plurality of radio devices that perform radio communications with a terminal and a radio control apparatus that controls the plurality of radio devices, the relay device including a plurality of signal combiners that are each provided for one of functional splitting points between the plurality of radio devices and the radio control apparatus, and are each configured to convert signal data transmitted from one of the plurality of radio devices based on a signal format in accordance with the one of the functional splitting points, and transmit the converted signal data to the radio control apparatus, and a signal switcher configured to output the signal data transmitted from the one of the plurality of radio devices, to one of the plurality of signal combiners supporting one of the functional splitting points that corresponds to the one of the plurality of radio devices. |
| US11509355B2 |
Method and apparatus for transmitting and receiving reference signals in wireless communication
A base station includes a controller configured to configure an MRS resource set comprising a group of MRS resources, each MRS resource comprising a set of MRS antenna ports. If at least two MRS antenna ports belong to a same MRS resource, then the at least two MRS antenna ports are quasi co-located with respect to a first set of QCL parameters, else if the at least two MRS antenna ports belong to a same MRS resource set, then the at least two MRS antenna ports are quasi co-located with respect to a second set of QCL parameters, and else the at least two MRS antenna ports are not quasi co-located with respect to either the first set or the second set of QCL parameters. The MRS is a CSI-RS for estimating a CSI and at least one of the first set and the second set of QCL parameters. |
| US11509354B2 |
Vehicle control apparatus
A vehicle control apparatus is to be provided in a vehicle including a wireless charger that charges a mobile device placed on the wireless charger. The vehicle control apparatus includes an interruption detector, a cause determination unit, and a notification controller. The interruption detector detects interruption of charging of the mobile device by the wireless charger, based on an operating state of the wireless charger. The cause determination unit determines whether a cause of the interruption of the charging is a first or second cause. The first cause is that the mobile device is moved by inertia during traveling. The second cause is that the mobile device is moved by a passenger. When the cause is determined as being the first cause, the notification controller notifies information about the interruption of the charging in a more prominent manner than when the cause is determined as being the second cause. |
| US11509352B2 |
High frequency based beamforming antenna and communication method therefor
A method for transmitting signals using a high frequency based integrated circuit beamforming antenna is disclosed. The method may comprise transferring an output signal of a radio frequency (RF) module to an RF transceiving unit; transferring an output signal of the RF transceiving unit to a signal converting unit including a feeding pillar; and transferring a wave signal from the signal converting unit to a traveling wave antenna unit, and the feeding pillar may convert the output signal of the RF transceiving unit to the wave signal. |
| US11509351B2 |
Earth fault localization
A method and system of determining the location of an earth fault within a loop of devices is disclosed. Upon the detection of an earth fault within the loop comprising a plurality of devices, a first device within the loop is isolated along with a second device. While the first device and the second device are isolated, it is determined if the earth fault still exists. If the earth fault no longer exists, then determine that the earth fault is located between the first device and the second device. This can be iterated through each adjacent pair of devices in the loop to localize the earth fault between the devices. |
| US11509345B2 |
Wireless communication module
A wireless communication module includes a wireless module board including an antenna, a frequency converter mounted on the wireless module board and configured to change a frequency of a wireless signal, an amplifier phase shifter mounted on the wireless module board and configured to change a phase and an intensity of the wireless signal, a band-pass filter mounted on the wireless module board so as to be provided between the frequency converter and the amplifier phase shifter, and a band-rejection filter formed on the wireless module board and composed of at least a portion of a plurality of wiring layers electrically connecting the frequency converter, the amplifier phase shifter, and the band-pass filter to each other. |
| US11509344B2 |
Radio frequency module and communication device
A radio frequency module includes: a first low-noise amplifier including a first amplification element as an input stage and a second amplification element as an output stage; a second low-noise amplifier including a third amplification element as an input stage and the second amplification element as an output stage, the third amplification element being different from the first amplification element; a first matching circuit connected to an input terminal of the first low-noise amplifier; and a module substrate including a first principal surface and a second principal surface opposite to each other, wherein the first amplification element is disposed on one of the first principal surface and the second principal surface, and the first matching circuit is disposed on the other of the first principal surface and the second principal surface. |
| US11509343B2 |
Adaptive eyewear antenna
An eyewear device that includes a lens; a support structure adapted to be worn on the head of a user, the support structure including a rim configured to support the lens in a viewing area visible to the user when wearing the support structure; an antenna embedded into or forming part of the support structure, the antenna at least partially extending into the rim; a transceiver adapter to send and receive signals; and a tuner coupled between the transceiver and the antenna, the tuner adapted to match impedance between the antenna and the transceiver to improve power transfer. |
| US11509340B2 |
Small antenna apparatus and method for controlling the same
An antenna apparatus for a mobile terminal is provided. The antenna apparatus includes an antenna pattern, a first electric circuit and a second electric circuit respectively connected between both ends of the antenna pattern and a system ground, and a third electric circuit disposed between the antenna pattern and a feeding line, wherein the first electric circuit and the second electric circuit extend electrical wavelengths of the antenna pattern and the third electric circuit increases input impedance matching. |
| US11509339B2 |
Method of constructing and training a neural network
A method of processing a radio frequency signal includes: receiving the radio frequency signal at an antenna of a receiver device; processing, by a radio frequency front-end device, the radio frequency signal; converting, by an analog-to-digital converter, the analog signal to a digital signal; receiving, by a neural network, the digital signal; and processing, by the neural network, the digital signal to produce an output. |
| US11509334B2 |
Decoding apparatus and decoding method for decoding operation in channel coding
The present disclosure relates to a decoding method. The decoding method includes a sequentially determining series of source bits from a codeword by performing a first decoding operation and a second decoding operation. For instance, a series of N source bits may be divided into a first bit group of X source bits and a second bit group of Y source bits. The initial X source bits are sequentially determined in the first decoding operation and the remaining Y source bits are sequentially determined in the second decoding operation. The first decoding operation includes sorting at least 2L reliability values, which are calculated from L bit sequences, where L is an integer greater than 0. The second decoding operation includes determining a source bit in each of the L bit sequences, based on the at least 2L reliability values. |
| US11509333B2 |
Masked fault detection for reliable low voltage cache operation
Systems, apparatuses, and methods for implementing masked fault detection for reliable low voltage cache operation are disclosed. A processor includes a cache that can operate at a relatively low voltage level to conserve power. However, at low voltage levels, the cache is more likely to suffer from bit errors. To mitigate the bit errors occurring in cache lines at low voltage levels, the cache employs a strategy to uncover masked faults during runtime accesses to data by actual software applications. For example, on the first read of a given cache line, the data of the given cache line is inverted and written back to the same data array entry. Also, the error correction bits are regenerated for the inverted data. On a second read of the given cache line, if the fault population of the given cache line changes, then the given cache line's error protection level is updated. |
| US11509332B2 |
Error detection
A datum is written to a memory, by splitting a binary word, representative of the datum and an error correcting or detecting code, into a first part and a second part. The first part is written at a logical address in a first memory circuit. The second part is written at the logical address in a second memory circuit. The error correcting or detecting code is dependent on both the datum and the logical address. |
| US11509327B2 |
System and method to enhance noise performance in a delta sigma converter
Systems and methods for a power-efficient 3-level digital-to-analog converter. A converter cell using a current starving technique keeps a portion of the converter cell turned on in a low power mode, as opposed to completely turning off current in selected modes. A conversion system keeps a first set of converters active while allowing a second set of converters to be powered down. Systems and methods presented save power and allow for efficient reactivation of converters. |
| US11509325B2 |
Radio-frequency digital-to-analog converter system
A digital-to-analog converter system has digital-to-analog converters, a common output, and a digital controller for transmitting first codes to one of the converters at a radio-frequency digital rate, and for transmitting second codes to another one of the converters at the same rate. The digital controller includes a timing system for operating each converter at the digital rate in a return-to-zero configuration, such that a signal from the first converter is transmitted to the common output while the second converter is reset, and vice versa. The digital-to-analog converter system can generate a radio-frequency analog signal having signals in first and second Nyquist zones simultaneously. |
| US11509322B2 |
Light sensor circuit
A light sensor circuit, which comprising a photodiode and a voltage follower. By setting the voltage follower to reduce the influence from the junction capacitance of the photodiode, a required time of a repeat integration module will not be influenced by the photodiode to efficiently keep the performance and the accuracy of the analog to digital converting device when the light sensor circuit is used to the analog to digital converting device in repeat operation. |
| US11509321B2 |
Receiving circuit and associated signal processing method
The present invention provides a receiving circuit, wherein the receiving circuit includes a first ADC, an attenuator, a second ADC, a harmonic generation circuit and an output circuit. In the operations of the receiving circuit, the first ADC performs an analog-to-digital operation on an analog input signal to generate a first digital output signal, the attenuator reduces strength of the analog input signal to generate an attenuated analog input signal, the second ADC performs the analog-to-digital operation on the attenuated analog input signal to generate a second digital input signal, the harmonic generation circuit generates at least one harmonic signal according to the second digital input signal, and the output circuit deletes a harmonic component of the first digital input signal by using the at least one harmonic signal to generate an output signal. |
| US11509316B2 |
Injection-locked oscillator distribution systems, methods, and devices
Systems and methods for integrating injection-locked oscillators into transceiver arrays are disclosed. In one aspect, there is provided an injection-locked oscillator (ILO) distribution system including a master clock generator configured to generate a master clock signal. The ILO distribution system also includes an ILO distribution circuit including an ILO and configured to receive the master clock signal. The ILO is configured to generate a reference clock signal based on the master clock signal. The ILO distribution circuit is further configured to generate an output signal indicative of an operating frequency of the ILO. The ILO distribution system further includes an injection-locked detector (ILD) configured to receive the master clock signal and the output signal. The ILD is further configured to determine whether the ILO is in a locked state or in an unlocked state based on the master clock signal and the output signal. |
| US11509311B1 |
Temperature-controlled oscillating device
A temperature-controlled oscillating device includes a supporting base, a mounting glue, an IC, at least one conducting medium, a temperature sensor, a quartz crystal package, and a heater. The mounting glue is formed on the supporting base. The IC is formed on the mounting glue. The conducting medium and the temperature sensor are formed on the IC. The quartz crystal package is formed on the conducting medium. The quartz crystal package includes a first quartz substrate, a second quartz substrate, and a third quartz substrate. The heater is formed on the quartz crystal package or the IC. There is no base arranged between the IC and the quartz crystal package. |
| US11509307B1 |
NBTI protection for differential pairs
In examples, a system includes a differential input device having a first input and a second input. The system includes a window generator configured to output, at a first output, a first voltage above a reference voltage and a second voltage, at a second output, below the reference voltage. The system includes a multiplexer coupled to the first output and the second output, the multiplexer configured to receive the first voltage, the second voltage, and an input voltage. The system includes a selector coupled to the multiplexer and configured to select the first voltage, the second voltage, or the input voltage based on a value of the input voltage, where the selector is configured to cause the multiplexer to provide the selected voltage to the first input of the differential input device, where a voltage source provides the reference voltage to the second input of the differential input device. |
| US11509304B2 |
Power supply circuits
A power supply circuit portion for supplying power comprises a first power rail, a second power rail, first and second output terminals, an energy storage device connected in parallel with the first and second output terminals; and first and second switching portions. The power supply circuit portion has a first mode in which power is supplied to the first and second output terminals by the first and second power rails, and a second mode in which the first switching portion is arranged such that power is not supplied to the first and second output terminals and the second switching portion is arranged to disconnect the energy storage device from the first power rail. |
| US11509296B2 |
Clock generator for frequency multiplication
A clock generator includes a pulse generator and a duty cycle correction circuit. The pulse generator is configured to receive an input clock signal and generate a pulse signal according to the input clock signal. The duty cycle correction circuit, coupled to the pulse generator, is configured to adjust a duty cycle of the pulse signal to generate an output clock signal. |
| US11509292B2 |
Identifying mechanical impedance of an electromagnetic load using least-mean-squares filter
A method for identifying a mechanical impedance of an electromagnetic load may include generating a waveform signal for driving an electromagnetic load and, during driving of the electromagnetic load by the waveform signal or a signal derived therefrom, receiving a current signal representative of a current associated with the electromagnetic load and a back electromotive force signal representative of a back electromotive force associated with the electromagnetic load. The method may also include implementing an adaptive filter to identify parameters of the mechanical impedance of the electromagnetic load, wherein an input of a coefficient control for adapting coefficients of the adaptive filter is a first signal derived from the back electromotive force signal and a target of the coefficient control for adapting coefficients of the adaptive filter is a second signal derived from the current signal. |
| US11509291B2 |
Digital filtering for a signal with target and secondary signal bands
A zero-insertion FIR filter architecture for filtering a signal with a target band and a secondary band. Digital filter circuitry includes an L-tap FIR (finite impulse response) filter, with a number L filter tap elements (L=0, 1, 2, . . . (L−1)), each with an assigned coefficient from a defined coefficient sequence. The L-tap FIR filter is configurable with a defined zero-insertion coefficient sequence of a repeating sub-sequence of a nonzero coefficient followed by one or more zero-inserted coefficients, with a number Nj of nonzero coefficients, and a number Nk of zero-inserted coefficients, so that L=Nj+Nk. The L-tap FIR filter is configurable as an M-tap FIR filter with a nonzero coefficient sequence in which each of the L filter tap elements is assigned a non-zero coefficient, the M-tap FIR filter having an effective length of M=(Nj+Nk) non-zero coefficients. |
| US11509283B2 |
Resonance device
A resonance device with improved precision of temperature control. The resonance device includes a platform; a resonator including a vibrator and one or more holding arms that connect the vibrator and the platform to each other such that a first groove is provided around the vibrator. Moreover, the resonance device includes a sensor with a measurement portion that measures temperature and a heater formed on the platform. A second groove is provided between the measurement portion and the heater. |
| US11509278B2 |
Common-mode noise filter
A common-mode noise filter is provided, and comprises a first transmission structure and a second transmission structure. At least one first transmission unit is connected between a first signal input end and a first signal output end of the first transmission structure in series. At least one second transmission unit is connected between a second signal input end and a second signal output end of the second transmission structure in series. Two first capacitors are connected between the first signal input end and the second signal input end in series, and connected at a first node together. A first common-mode noise suppression unit is connected between the first node and a reference potential, and comprises a second capacitor and a first lossy element connected to the second capacitor in series or parallel. The first common-mode noise suppression unit can absorb a common-mode noise via the first lossy element. |
| US11509276B2 |
Multilayer filter including a return signal reducing protrusion
A multilayer filter may include a signal path having an input, an output, and a conductive layer overlying at least one of a plurality of dielectric layers. The conductive layer may be elongated in the first direction and may have a first edge aligned with the first direction and a second edge parallel with the first edge. The conductive layer may include a protrusion extending in the second direction and having an end edge that is parallel with the first edge and offset from the first edge in the second direction by a protrusion length that is greater than about 50 microns. The multilayer filter may include an inductor that is electrically connected at a first location with the signal path and electrically connected at a second location with at least one of the signal path or a ground. |
| US11509275B2 |
Method and apparatus for bias control with a large dynamic range for Mach-Zehnder modulators
Improved dither detection, measurement, and voltage bias adjustments for an electro-optical modulator are described. The electro-optical modulator generally includes RF electrodes and phase heaters interfaced with semi-conductor waveguides on the arms of Mach-Zehnder interferometers, where a processor is connected to output a bias tuning voltage to the electro-optical modulator for controlling optical modulation. A variable gain amplifier (VGA) can be configured with AC coupling connected to receive a signal from a transimpediance amplifier (TIA) that is configured to amply a photodetector signal from an optical tap that is used to measure an optical signal with a dither signal. The analog to digital converter (ADC) can be connected to receive output from the VGA. The processor can be connected to receive the signal from the ADC and to output the bias tuning voltage based on evaluation of the signal from the tap. |
| US11509274B2 |
Automatic gain control system for processing of clipped signal samples
Techniques are provided for automatic gain control processing to reduce adverse effects associated with clipped samples resulting from conversion of analog signals to digital signals. A methodology according to an embodiment includes identifying a clipped sample of the digital signal, for example by comparison of the digitized sample values to a threshold value associated with a full scale value of the converter. The method also includes applying a window function to portions of the digital signal. The window function is configured to attenuate samples of the digital signal within a region centered on the identified clipped sample. A Hilbert finite impulse response (FIR) filter may be applied to the digital signal prior to applying the window function. Parameters of the window function are selected based on frequency response characteristics of the FIR filter and on signal to noise ratio requirements of an application that receives the windowed digital signal. |
| US11509259B2 |
Plate folding and unfolding device and solar panel structure
A plate folding and unfolding device and a solar panel structure are provided. The plate folding and unfolding device includes a cam fixed with first plate piece, and a rotating shaft is disposed inside the cam in an axial direction of the cam; a connecting rod, where the connecting rod includes a first end and a second end that are opposite to each other, the first end is connected vertically to the rotating shaft, and the second end is fixed to a second plate piece; a positioning shaft, where the positioning shaft is disposed, on the connecting rod; and an elastic piece, where the elastic piece is disposed on the connecting rod, one end of the elastic piece is connected to the positioning shaft, where a groove that accommodates the positioning shaft is disposed at at least one location of the outer peripheral surface of the cam. |
| US11509257B2 |
Motor protector and method for operating the same
A motor protector and a method for operating the same. The motor protector includes: a power supply unit adapted to receive electric power from power supply lines of a motor to power the motor protector; a measuring unit adapted to measure electric parameters of the motor; and a controller configured to at least perform steps of: receiving from the measuring unit the electric parameters; determining, based on the electric parameters, whether the motor experiences a first failure related to overheating of the motor; enabling, in accordance with determination of the first failure of the motor, the power supply unit to power a closing mechanism of the motor protector after a predetermined time, thereby closing the closing mechanism to power the motor by the power supply lines; determining, based on the electric parameters, whether the motor experiences a second failure different from the first failure; and enabling, in accordance with determination of the second failure of the motor, the power supply unit to stop powering the closing mechanism. Hence, the motor protector can discriminate types of the motor failures and adopt corresponding measures for different failures. |
| US11509254B2 |
Method for detecting a motor phase fault of a motor arrangement and drive circuit for driving an electronically commutated motor
In a method for detecting a motor phase fault of a motor arrangement, the motor phases of which are connected to a drive circuit having a DC voltage intermediate circuit and an inverter. A motor phase voltage at at least one of the motor phases with respect to a reference potential is captured while the inverter is switched off; and a voltage profile of the captured motor phase voltage is used to determine whether there is a motor phase fault on one of the motor phases of the motor arrangement. |
| US11509250B2 |
Control device
A control device controls a motor which includes a first stator coil and a second stator coil insulated from each other. The control device includes: a first drive circuit that is connected to the first stator coil; a second drive circuit that is connected to the second stator coil; a first processing circuit; and a second processing circuit. The first processing circuit increases an output of an integral element according to the number of control systems when the second processing circuit performs a process of switching a first use and operation process to a second use and operation process. |
| US11509246B2 |
Brake device
The disclosure relates to a brake device for an electric motor, which has at least one armature winding and at least one field winding, comprising at least one open-loop and/or closed-loop control unit at least for open-loop control and/or closed-loop control of at least one electric current through the armature winding and/or through the field winding. According to the disclosure, in the event of short-circuit braking of the electric motor, the open-loop and/or control-loop unit is intended to reduce, at least temporarily, an electric armature current flowing through the armature winding. |
| US11509244B2 |
Piezoelectric material, piezoelectric element, and electronic equipment
A lead-free piezoelectric material includes perovskite-type metal oxide containing Na, Nb, Ba, Ti, and Mg and indicates excellent piezoelectric properties. The piezoelectric material satisfies the following relational expression (1): 0.430≤a≤0.460, 0.433≤b≤0.479, 0.040≤c≤0.070, 0.0125≤d≤0.0650, 0.0015≤e≤0.0092, 0.9×3e≤c−d≤1.1×3e, a+b+c+d+e=1, where a, b, c, d, and e denote the relative numbers of Na, Nb, Ba, Ti, and Mg atoms, respectively. |
| US11509243B2 |
Moving body, station, movement system, moving method, and program
To make it possible to freely move a moving body between level surfaces located at different heights that are not connected by a vertical member. A moving body includes a movable moving part, an expansion/contraction part disposed in the moving part and configured to expand and contract in a vertical direction, a first engagement part disposed at a tip of the expansion/contraction part and configured to engage with a member located in a surrounding environment, and a control unit configured to control the moving part and the expansion/contraction part. The control unit moves the moving part to a target height position by engaging the first engagement part with a member located at the target height position and then expanding or contracting the expansion/contraction part. |
| US11509242B2 |
Power conversion apparatus
An apparatus according to an embodiment includes an upper and lower arm connected between a high and a low potential end; a first capacitor connected at one end to the high potential end; a second capacitor connected at one end to the low potential end; a first regenerative rectifier circuit connected to another end of the first capacitor; a second regenerative rectifier circuit connected to another end of the second capacitor; a first conversion circuit to cause energy stored in the first capacitor to be discharged; and a second conversion circuit to cause energy stored in the second capacitor to be discharged. |
| US11509239B2 |
Conversion device having reduced size and cost
A conversion device includes: an inductor electrically connected to the AC power grid; a first-stage converter configured to output a bus voltage according to the AC power grid, wherein the first-stage converter includes an N-level alternating current-direct current (AC-DC) converter, and the N-level AC-DC converter includes a plurality of switch bridge arms, wherein both an upper bridge arm and a lower bridge arm of each of the plurality of switch bridge arms of the N-level AC-DC converter include a plurality of semiconductor devices connected in series, and a rated withstand voltage Vsemi of each of the semiconductor devices is greater than or equal to (Vbus*δ)/((N−1)*Nseries*λ); and a second-stage converter configured to convert the bus voltage into an output voltage to supply energy to the load. |
| US11509238B2 |
AC/DC power supply, rectifier circuit and control method
A rectifier circuit applied in an AC/AC power supply, the rectifier circuit including: a filter circuit configured to receive a DC pulsating voltage, and to generate a supply voltage, where the supply voltage follows the DC pulsating voltage during a first time interval of an operation cycle; and where during a second time interval of the operation cycle, a value of the supply voltage is greater than the value of the supply voltage at an end of the first time interval, in order to reduce a size of the filter circuit. |
| US11509233B1 |
Surge voltage protection for a power conversion system
In one embodiment, an apparatus includes a surge voltage blocker circuit to couple between a distribution grid network and a grid-side power converter of a power conversion system. The surge voltage blocker circuit may include a plurality of series-coupled AC switch circuits, each including: a bidirectional switch formed of a first power transistor and a second power transistor; and a transient voltage suppression device coupled in parallel with the bidirectional switch. |
| US11509232B2 |
Power converter and air-conditioning apparatus using the same
A power converter includes a rectifier configured to rectify an AC voltage supplied from an AC power supply, a booster circuit configured to boost the voltage rectified by the rectifier, a smoothing capacitor configured to smooth the voltage output from the booster circuit, a power module configured to convert a DC voltage obtained by smoothing the output voltage by the smoothing capacitor into an AC voltage, and a snubber capacitor configured to absorb a surge voltage superimposed on the DC voltage to be input to the power module. The snubber capacitor is mounted in the power module. |
| US11509228B2 |
Dynamic regulation resonant power converter
According to one configuration, a power system includes a resonant power converter, a monitor resource, and a controller. During operation, the resonant power converter converts an input voltage to an output voltage. The monitor resource monitors a magnitude of the input voltage. The controller dynamically controls a corresponding resonant frequency of the resonant power converter and a switching frequency of switches in the resonant power converter depending on a magnitude of the input voltage. |
| US11509227B2 |
Active clamp flyback converter
A converter system (100) includes a transformer (102) having a primary side (104) and a secondary side (106), a first switch (114) with a first terminal (1151) coupled to the primary side (104) and a second terminal (1152) coupled to a voltage supply terminal, a second switch (116) coupled to the first terminal (1151) of the first switch (114), loop control circuitry (119), coupled to the secondary side (106), and configured to generate an offset signal based on an output voltage provided at the secondary side (106) and to generate a compensated signal by compensating the offset signal to a sensed signal being representative of a first current flowing through the primary side (104), and switch control circuitry (120), coupled to the loop control circuitry (119), and configured to operate the first and second switches (114, 116) based on the compensated signal. |
| US11509224B2 |
Dual mode supply circuit and method
A circuit includes a first passive device between supply and bias nodes, a first switching device and a second passive device between the bias and a reference node, a transistor between the supply and an output node, a third passive device and a second switching device between the output and a feedback node, a fourth passive device between the feedback and reference nodes, a third switching device between the supply and output nodes, and an amplifier controlling the transistor based on bias node and feedback node voltages. In a first mode, the first and second switching devices are off, the third switching device is on, and the supply node receives a first voltage level. In a second mode, the first and second switching devices are on, the third switching device is off, and a second voltage level greater than the first voltage level is received on the supply node. |
| US11509221B2 |
Systems and methods for controlling DC-DC converters using partial resets
Direct current-direct current (DC-DC) converters including buck converters are described. These DC-DC converters may be configured to reduce oscillations that would otherwise arise in the output reference voltage due to ringing effects without significantly lengthening the duration of the transient period. These DC converters may leverage a feedback voltage generated by sensing the current flowing through the inductor of the buck converter. The feedback voltage may compared to a threshold, and the signal resulting from the comparison may be used to vary the reference voltage. The DC-DC converter may be operated in a “partial reset mode,” in which the voltage generated by sensing the inductor's current is reduced to a value greater than zero in response to the feedback voltage reaching the threshold. Reducing the sense voltage in this manner may reduce the duration of the transient period. |
| US11509220B2 |
Electronic device with reduced parasitic inductance
An electronic device comprises a switching regulator. Here, the switching regulator has a first wiring portion (including a parasitic inductance) coupling the high-side element and the low-side element, and a second wiring portion (including a parasitic inductance) coupled with the low-side element. Also, the switching regulator has a first region in where the first wiring portion and the second wiring portion are lined up with each other. As a result, the performance of the electronic device can be improved. |
| US11509218B2 |
Wireless power receiver
A wireless power receiver includes a rectifier configured to convert a radio frequency (RF) voltage signal generated based on an RF input to a direct current (DC) voltage, and a boost converter configured to generate a voltage for battery charging using the RF voltage signal as a switching signal. |
| US11509217B2 |
Stable digital integrator circuit for boost converter
An electrical device includes an integrated circuit having device circuitry and a boost converter coupled to the device circuitry. The boost converter includes a digital integrator circuit having: a first comparator; a second comparator; a counter configured to count up, count down, and pause based on a first output signal provided by the first comparator and based on a second output signal provided by the second comparator; and a digital-to-analog converter (DAC) configured to provide a feedback adjustment signal for the boost converter based on a count value provided by the counter. |
| US11509214B2 |
Apparatuses and methods for controlling charge pump circuits
An apparatus and a method that provide a bias voltage to a charge pump circuit are described. An example apparatus includes: a bias voltage generator that receives a first voltage and provides a second voltage responsive to the first voltage; a charge pump circuit that receives an input signal and provides the first voltage. The charge pump circuit includes an inverter and a bias transistor. The inverter receives the input signal and provides a third voltage. The bias transistor coupled between a power node having a power supply voltage and a slew rate driver of the inverter. The bias transistor receives the second voltage and provides a power supply voltage to the slew rate driver responsive to the second voltage less than a threshold voltage and stops providing the power supply voltage to the slew rate driver responsive to the second voltage greater than the threshold voltage. |
| US11509209B2 |
Generator using permanent magnets
A permanent magnet generator consisting of a stator including a pendulating master permanent magnet and a push button. The master permanent magnet is restricted in its oscillation. The master permanent magnet is oriented with a predetermined polarity towards a rotor. The rotor including a plurality of oscillating slave permanent magnets and an axel. The slave permanent magnets are equivalently spaced around an outer edge of said rotor. The slave permanent magnets are restricted in their oscillations and the slave permanent magnets are oriented with the predetermined polarity the outer edge of the rotor. When the push button is engaged, the master permanent magnet and a first of the plurality of the slave permanent magnet's magnetic fields come into contact and repel each other, driving a circular rotation of the rotor. When the circular rotation of the rotor aligns the master permanent magnet and the plurality of the slave permanent magnet's magnetic fields in sequence. |
| US11509208B2 |
Actuator with increased torque-to-weight ratio
An actuator capable of achieving high output with a smaller number of parts is proposed. An actuator including a stator that has teeth arranged on an outer peripheral surface, a rotor that rotates around a central axis of the stator while teeth arranged on an outer peripheral surface mesh with the teeth arranged on the outer peripheral surface of the stator, and a second gear that rotates while meshing with a first gear coupled to the rotor coaxially with a central axis of the rotor and is coupled to an output shaft, in which the stator has an electromagnet, the rotor has a magnet, and a magnetic pole of the electromagnet corresponding to a position of the rotor moves along a circumferential direction of the stator. |
| US11509207B2 |
Wire bonding machines including linear motor systems
A wire bonding system is provided including a bond head assembly carrying a wire bonding tool. A wire bonding system also includes a linear motor system for driving the bond head assembly along a first horizontal axis. The linear motor system includes a moving magnet assembly including a magnet track and a plurality of permanent magnets coupled to the magnet track; a coil assembly arranged around the moving magnet assembly, the coil assembly including a plurality of teeth having first slots therebetween, the coil assembly also including a plurality of coils at least partially disposed in at least a portion of the slots; a position encoder system; a damper element positioned between the coil assembly and a base structure of the linear motor system; and a spring element positioned between the coil assembly and the base structure of the linear motor system. |
| US11509205B2 |
Magnetic pole module, electric motor rotor and method for manufacturing electric motor rotor
A magnetic pole module, an electric motor rotor and a method for manufacturing the electric motor rotor are provided. The electric motor rotor includes a rotor yoke and multiple magnetic pole modules disposed on the rotor yoke, each of the magnetic pole modules including a base plate, a housing, and a pair of magnetic pole units that are accommodated in an accommodating space formed by the base plate and the housing and have opposite polarities, and a pair of magnetic pole units in each of the magnetic pole modules are spaced apart from each other by a first distance in a circumferential direction of the rotor yoke. The electric motor rotor can give consideration to the properties, such as cogging torque and torque pulsation, of a generator, the protection of magnetic poles and the mechanical fixation of the magnetic pole. |
| US11509197B2 |
Electric propellor drive and vehicle using the same
An electrically powered propellor apparatus comprising an axial flux electric machine. The axial flux electric machine comprises a rotor, at least one stator and a shaft. The shaft mounts the rotor and the shaft is mounted in at least two spaced apart thrust bearings. Each of the thrust bearings is configured to resist thrust in opposing axial directions of the shaft. The shaft has a propellor mounted on at least one end thereof. |
| US11509196B2 |
Motor vehicle and power converter device for a motor vehicle
Motor vehicle comprising an electric motor for driving the motor vehicle and a power converter device for supplying an alternating current to the electric motor, the power converter device having a cooling device, and the cooling device comprising at least one coolant connection, which is fluidically connected to a coolant port of the electric motor to form a common cooling circuit. |
| US11509195B2 |
Column type coreless motor
A column type coreless motor is provided, having has no iron loss, low heat loss and high efficiency. The motor includes a stator, a rotor and a motor housing, wherein the rotor is a column type structure with a U-shaped annular groove, and the stator is placed in the U-shaped annular magnetic field of the rotor. In some embodiments, the stator is made by solidifying a coil therein with a thermosetting material through a pressure device, and the coil is wound by combining multiple enameled wires into a phase line, successively superposing three-phase lines, and winding each phase line in a toothed circle shape. The rotor is provided with a heat dissipation fan, and the fan discharges the heat generated by the coil out of the motor through a heat dissipation air passage in the motor housing, effectively ensuring the heat dissipation effect of the motor. |
| US11509194B2 |
Motor with rotor and endplates with blade parts and cooling hole
A motor comprises a rotor including: a rotor core to rotate on a rotary shaft; a permanent magnet inserted in a magnet insertion hole formed in the rotor core; first and second end plates provided on both end faces of the rotor core respectively in a direction of the rotary shaft; and a blade part provided on a surface of the first end plate to surround the rotary shaft. The rotor includes a cooling hole having an opening between the blade part of the first end plate and the rotary shaft and passing through the rotor core and the second end plate. |
| US11509193B2 |
Power tool with compact motor assembly
A brushless direct-current (BLDC) motor is provided with a stator assembly including a stator core and stator windings wound around stator teeth, a rotor shaft extending along a longitudinal axis, and a rotor including a rotor core mounted on the rotor shaft supporting at least one permanent magnet. A circuit board is provided including a main body and at least one leg radially projecting from the main body to support at least one magnetic sensor near the permanent magnet. The leg of the circuit board oriented along a radial plane that intersects the stator windings. |
| US11509191B2 |
Electric assembly and vehicle having the same
The present disclosure discloses an electric assembly and a vehicle having the same. The electric assembly includes: a box assembly; a motor, disposed in the box assembly; a transmission, disposed in the box assembly, where the transmission is power-coupled to the motor; and a controller, disposed outside the box assembly, and fixedly connected to the box assembly. |
| US11509186B2 |
Capacitor unit, and electric compressor
A capacitor unit (20) includes: a harness side terminal (23) provided in a housing (22) for accommodating a capacitor main body therein and connectable to an electric power harness for supplying DC power from an outside; and a board side terminal (24) connectable to a circuit board from which the DC power is output via the capacitor main body. The board side terminal (24) extends in a plate shape from a base portion (24b) held in the housing (22) toward a distal end portion (24a) connected to the circuit board, and has a notch portion (40) recessed inward of the board side terminal (24) in a width direction between the base portion (24b) and the distal end portion (24a). |
| US11509184B2 |
Electric motor with housing fixed to end face of stator core
A feed axis motor includes a front-side housing fixed to an end face of a stator core. The stator core is formed of a material with iron as a main component. The front-side housing is formed of a material with aluminum as a main component. The stator core and the front-side housing are coupled with each other at a welding mark generated by laser welding. The welding mark extends in a circumferential direction so as to cover a line of contact between the stator core and the front-side housing. The welding mark seals the boundary portion between the stator core and the front-side housing. |
| US11509183B2 |
Inverter comprising a part forming a set-back from a first part of the inverter
The invention relates to an inverter, notably configured to be on-board an automobile vehicle, comprising: power components configured to convert DC electrical energy into AC electrical energy so as to supply an electric motor, notably configured to drive the vehicle, a casing housing the components of the inverter and comprising a first part forming a first housing, housing said power components and a second part forming a second housing, housing filtering components configured to filter DC electrical energy supplied to the power components, notably from a battery of the vehicle, said second casing part being formed at least in part by a set-back with respect to said first part from an outer face of the casing comprised in the first part. |
| US11509180B2 |
Stator
In this stator, a first coil portion, a second coil portion, a third coil portion, and a fourth coil portion each include a one-side coil part that is disposed so as to extend over a first slot and a third slot, and an other-side coil part that is disposed so as to extend over a second slot and a fourth slot. |
| US11509169B2 |
Sub-surface wireless charging
In an embodiment, a sub-surface wireless charger includes a transmitter coil and a controller. The controller is configured to generate a protective pulse having a first energy, determine a characteristic of the transmitter coil based on the generated protective pulse, determine whether it is safe to begin wireless charging based on the determined characteristic, and when the controller determines that it is safe to begin wireless charging, generate an operating pulse having a second energy, where the second energy is higher than the first energy. |
| US11509161B2 |
Method for controlling an accumulator on a charging device
Charging an accumulator having an energy storage cell, a data interface and a wake-up circuit. A charging apparatus contains a data interface, a controller, a timer and a switch apparatus. The data interfaces connected to one another via a communication line for differential communication between the accumulator and charging apparatus. Setting the timer to a predetermined period of time; setting the control electronics of the accumulator to a deactivation mode; sending at least one signal from the charging apparatus to the accumulator via the communication line after the predetermined period of time has elapsed; activating the wake-up circuit for activating control electronics by detecting a voltage value from the communication line, the voltage value is consistent with either the dominant or recessive state of the communication line; setting the control electronics to an activation mode; and requesting or releasing a charging current from the charging apparatus using the accumulator. |
| US11509158B2 |
Information processing apparatus, control method of information processing apparatus, and non-transitory computer-readable storage medium
An information processing apparatus includes a power processor, an interface, a first detector that detects at least one of a voltage value and a current value on an electric power line which connects the power processor and the interface, a second detector that detects at least one of a voltage value and a current value on the electric power line, a switch that switches a supply of electric power supplied from the interface to an outside, and a controller. The controller controls the switch to restrict the electric power supplied from the interface to an outside in a case where at least one of a detection value of the first detector and a detection value of the second detector is equal to or greater than a threshold value. |
| US11509157B2 |
Charging management chip for charging battery based on switching charging and direct charging, and operating method of charging management chip
A charging management chip includes a switching charging circuit and a direct charging circuit. The switching charging circuit receives charging power, and passes through the charging power to a first node, and charges a battery according to a switching charging method and controls generation of a system voltage provided to an electronic system. The direct charging circuit receives the charging power applied to the first node via an input node, and charges the battery according to a direct charging method by providing the charging power to an output node based on a switching circuit therein. The switching charging circuit charges the battery through a first charging path including an inductor arranged outside the charging management chip, and the direct charging circuit charges the battery through a second charging path through which the charging power transferred to the output node is directly provided to the battery. |
| US11509155B2 |
Power electronics-based battery management
Methods, systems, and devices for power electronics-based (PE-based) battery management. A system may include a set of battery strings, where each battery string may include a set of battery modules, and where each battery module may include a set of battery cells. The system may also include a set of power converters, where each power converter may be coupled with at least one battery string. A power electronics-based (PE-based) BMS may provide one or more battery management functions for at least one corresponding battery string while also monitoring or controlling a corresponding power converter. |
| US11509152B2 |
Base station
A base station comprising: a wireless power receiver module to wirelessly receive energy from a portable device; a wireless transceiver module adapted to establish a wireless data communication with the portable device so as to wirelessly receive/transmit data; a wired interface for wired connection to an accessory device; a power distribution module coupled to the wireless power receiver module and adapted to supply the energy received from the portable device both to the accessory device, via the wired interface, and to the wireless transceiver module; a communication module coupled to the wireless transceiver module and to the wired interface, adapted to adapt data wirelessly received from the portable device, via the wireless transceiver module, into data suitable to be transmitted in a wired way to the accessory device, via the wired interface, and vice versa, to adapt data received in a wired way from the accessory device, via the wired interface, into data suitable to be transmitted wirelessly to the portable device, via the wireless transceiver module; wherein the base station is passive, devoid of any internal power source. |
| US11509150B2 |
Methods and apparatus for inhibiting excessive battery discharge
A system for it inhibiting the excessive discharge of a battery in an electronic device, in some embodiments, comprises: a battery to supply power to the electronic device; and a fuel gauge coupled to the battery to monitor said power, wherein the fuel gauge enters a standby mode upon determining that a voltage supplied by the battery is at or below a voltage threshold and that a capacity of the battery is at or below a capacity threshold. |
| US11509148B2 |
Distributed charging station
A device charging system including a battery module and a central charging station. The battery module is configured to supply a type of power to at least one load device. The central charging station is in communication with the battery module. The central charging station includes an electronic processor configured to define a virtual boundary, determine a location of the battery module, determine, based the location of the battery module, whether the battery module is within the virtual boundary, and transmit a command to the battery module causing the battery module to stop supplying power to the load device when the battery module is not within the virtual boundary. |
| US11509143B2 |
Virtual inverter controller for a nanogrid and the nanogrid thereof
A nanogrid and a virtual inverter controller for the nanogrid are disclosed. The nanogrid includes at least one parallel branch, and at least one branch is equipped with a protector. At least one of the protectors is equipped with one virtual inverter controller. The virtual inverter controller includes a sensor component configured to detect at least one characteristic parameter on the branch, and a control component affecting the electrical connection state of the corresponding protector of the virtual inverter controller according to the characteristic parameter. |
| US11509142B2 |
Electrical power system
An electrical power system includes: a solar battery panel; a first electrical power conversion device; a secondary battery; and a second electrical power conversion device. The first electrical power conversion device and the second electrical power conversion device selectively execute a first mode in which the first electrical power conversion device performs MPPT control on the solar battery panel and the second electrical power conversion device performs the charging-discharging control and a second mode in which the first electrical power conversion device performs output limit control to restrict output electrical power from exceeding a predetermined output limiter value and the second electrical power conversion device performs MPPT control on the solar battery panel. |
| US11509141B2 |
Wind turbine power consumption control
A power management module and method for controlling power consumption of consumers in a wind turbine system. Each power management module in the wind turbine system is configured to determine a voltage level of a power supply bus of the wind turbine system and then control a level of power consumption of one or more consumers coupled to the power supply bus based at least in part on the determined voltage level of the power supply bus. Power consumption may thereby be managed throughout the wind turbine system, without requiring a dedicated centralised controller and communications infrastructure. |
| US11509136B2 |
Scalable systems and methods for assessing healthy condition scores in renewable asset management
An example method comprises receiving historical wind turbine failure data and asset data from SCADA systems, receiving first historical sensor data, determining healthy assets of the renewable energy assets by comparing signals to known healthy operating signals, training at least one machine learning model to indicate assets that may potentially fail and to a second set of assets that are operating within a healthy threshold, receiving first current sensor data of a second time period, applying a machine learning model to the current sensor data to generate a first failure prediction a failure and generate a list of assets that are operating within a healthy threshold, comparing the first failure prediction to a trigger criteria, generating and transmitting a first alert if comparing the first failure prediction to the trigger criteria indicates a failure prediction, and updating a list of assets to perform surveillance if within a healthy threshold. |
| US11509133B2 |
Transient voltage suppression device
A transient voltage suppression device includes at least one diode string, a power clamp device, at least one first bypass diode, and at least two second bypass diodes. The diode string is coupled between a power terminal and a common bus and coupled to an input output (I/O) port. The power clamp device is coupled between the power terminal and the common bus. The first bypass diode is coupled between the common bus and a ground terminal. The second bypass diodes are coupled in series, coupled between the common bus and the ground terminal, and coupled to the first bypass diode in reverse parallel. Alternatively, the first bypass diode and the second bypass diodes are replaced with at least one bi-directional electrostatic discharge (ESD) device. |
| US11509122B2 |
Electrical installation housing
An electrical installation housing has a top wall, a left side wall, the right side wall, a bottom wall, a rear wall, and a rear beveled wall. A first mounting flange extends from the right side wall. The first mounting flange includes a first mounting flange hole. A second mounting flange extends from the right side wall. The second mounting flange includes a second mounting flange hole. A third mounting flange extends from the left side wall. The third mounting flange includes a third mounting flange hole. A fourth mounting flange extends from the left side wall. The fourth mounting flange includes a fourth mounting flange hole. |
| US11509120B2 |
Dual spark plug
A dual spark plug may include: a metal body made of metal material, an insulating body provided inside of the metal body and made of an insulating material, a pair of central electrodes provided inside of the insulating body and electrically connected with an ignition coil, and a pair of ground electrodes respectively extended from both ends the metal body, and spaced apart from ends of the pair of central electrodes by a predetermined distance. |
| US11509116B2 |
Athermal angular output by combining a laser with a grating based antenna
An internal laser component of an optical device comprises: a waveguide that defines a guided mode of a first optical wave characterized by a first propagation constant associated with a first effective refractive index. An optical antenna grating comprises: a waveguide that defines a guided mode of a second optical wave characterized by a second propagation constant associated with a second effective refractive index, and a grating structure configured to emit a portion of the second optical wave in a selected direction. The internal laser component and the optical antenna grating are configured to provide a relationship between the first effective refractive index and the second effective refractive index such that the selected direction is substantially insensitive to a change in a temperature of a thermal environment in which the internal laser component and the optical antenna grating are thermally coupled. |
| US11509111B2 |
All-solid-state high-power slab laser based on phonon band edge emission
A kind of all-solid-state high-power slab laser based on phonon band-edge emission, which is comprised of a pumping source, a focusing system, a resonant cavity and a self-frequency-doubling crystal; the said self-frequency-doubling crystal is a Yb-doped RECOB crystal cut into slab shape along the direction of the crystal's maximum effective nonlinear coefficient of its non-principal plane; by changing the cutting direction of the crystal, the phase matching of different wavelengths is realized, thus realizing laser output at the band of 560-600 nm; the said pumping source is a diode laser matrix with a wavelength of 880 nm-980 nm; the input cavity mirror and the output cavity mirror are coated with films to obtain laser output at the band of 560-600 nm; the two large faces of the said self-frequency-doubling crystal is cooled by heat sink and located between the input cavity mirror and the output cavity mirror. |
| US11509105B2 |
Connector with separable lacing fixture
A connector assembly has a connector part and a cable manager part. The cable manager part can be provided with a separable lacing fixture that functions to retain the severed portions of the wires that result from the termination process, rather than allowing the severed wire portions to fall to the floor in an uncollected state. In one aspect, the cable manager part has a main body to which the separable lacing fixture is attached via a plurality of breakaway portions. |
| US11509101B1 |
Locking electrical device
An electrical receptacle including a body having a plurality of electrical connections, a device face connected to the body and movable with respect to the body, a plurality of electrical plug contacts positioned behind the device face, and wherein the electrical plug contacts retain an electrical plug prong at a first tension when the device face is in a first position and the electrical plug contacts retain the electrical plug prong at a second tension when the device face is in a second position. |
| US11509096B2 |
Connector with interface part mounted to rotate in the casing and adapted to be actuated by a tool to slide a cap locking it onto a complementary connector
The application comprises a mechanism for transformation of the movement in rotation by a tool of an interface part housed in the casing of a connector into movement in translation in a plane perpendicular to the coupling direction of a locking cap for locking the casing of the connector to that of a complementary connector. |
| US11509095B2 |
Quick release plug pack assembly
A cassette assembly includes a housing for plugs having release latches, the housing including a support surface and first hinge feature. The assembly also includes a compression lever including a post and a second hinge feature configured to cooperate with the first hinge feature to form a hinge. The assembly also includes a latch depressor including first and second ends, the latch depressor having a channel configured to receive the post. In response to a force applied to the compression lever with the first and second hinge features in cooperation, the channel in receipt of the post, and a plug in the housing, the compression lever rotates about the hinge, the post translates the force to the channel, the first end of the latch depressor abuts and pivots at the support surface, and the second end of the latch depressor contacts the release latch of the plug in the housing. |
| US11509094B2 |
Connector and connector assembly
Provided is a housing including a bottom wall, a front-end wall, side walls, and a mating space. Each of the side walls includes a locking protrusion configured to engage with a counterpart locking protrusion locking protrusion of a counterpart housing when the counterpart housing is inserted into the mating space. Each of the side walls also includes an auxiliary-metal-fixture mounting portion configured to be loaded with an auxiliary metal fixture having a bottom end that is to be fixed to a surface of a board. The terminal is configured to be loaded in the front-end wall, and includes a connection part having a bottom end that is to be fixed to the surface of the board. The bottom wall has a surface facing the surface of the board, slanted surfaces are formed respectively on the left side edge and the right side edge of the surface of the bottom wall so that each slanted surface extends, in the front-to-rear direction of the sidewall, towards the outer side of the housing with a gradually widening gap with the surface of the board. |
| US11509090B2 |
Electrical connector with bulging portion at a bend to discharge water
A connector includes: a terminal fitting; a housing containing the terminal fitting inside and provided with a fitting portion inserted and fitted into inside of a hole-shaped counterpart fitting portion of a counterpart wall member; and a shield shell including a cylindrical portion covering, from outside, a projecting portion of the housing projecting from the counterpart fitting portion, a flange portion projecting outer than an outer circumferential surface of the cylindrical portion and a fixed portion bent from an end portion of the flange portion and fixed on an end surface of the counterpart wall member. The shield shell is provided with a bent portion between the flange portion and the fixed portion, and a bulging portion including an inner wall surface positioned inside a curve of the bent portion at an end portion in an extending direction of a bending line of the bent portion. |
| US11509087B1 |
Electrical connector having a barrel enclosing a coil spring which pushes on a spherical ball movable within the barrel
An electrical connector having a barrel or hollow cylindrical sleeve into which is inserted a cylindrical interface member adapted to accept a coil spring member on one end thereof. The interface member on its other end acts upon a cylindrical sphere or ball captured with the other end of the sleeve member. The ball is movable axially and rotationally within the sleeve to make electrical and mechanical contact with an external surface which may be either movable with respect to the ball or not perpendicular to the ball. The connector is formed to direct current to pass primarily through the sleeve and to bypass the spring. |
| US11509083B2 |
Electrical connection device and electronic device comprising same
The present invention suggests an electrical connection device having a noise blocking and damage preventing structure by comprising: a receptacle consisting of a plurality of conductive terminals and a plurality of conductive members; and a connector comprising a plurality of connector terminals corresponding to the plurality of conductive terminals. |
| US11509078B2 |
Compliant pin structure for discrete electrical components
A discrete electrical component is disclosed, including a component member having at least one lead; and a base member on which the component member is supported. The electrical component further includes at least one compliant pin member, each compliant pin member having a first end portion configured for press-fit engagement in a printed circuit board and a second end portion electrically connected to the at least one lead of the component member. The at least one compliant pin at least partly extends through or into the base member. |
| US11509076B2 |
Quick change battery clamp
A quick change battery clamp includes a first clamp body, a second clamp body, and a handle assembly. The second clamp body is coupled to the first clamp body. The handle assembly is selectively disposed through each of the first clamp body and the second clamp body. Each of the first clamp body and the second clamp body define an aperture having a substantially polygonal cross-section configured to receive a battery post. Each of the first clamp body and the second clamp body have an internal wall with a plurality of ridges configured to selectively abut the battery post. The first clamp body and the second clamp body are hingedly connected. |
| US11509073B2 |
MIMO antenna array with wide field of view
An antenna array apparatus includes: first antenna elements arranged to form a first radiation pattern with a recessed portion at the center of the first radiation pattern; and second antenna elements arranged to form a second radiation pattern with a convex portion at the center of the second radiation pattern. |
| US11509069B2 |
Distributed on-package millimeter-wave radio
Embodiments described herein generally relate to phased array antenna systems or packages and techniques of making and using the systems and packages. A phased array antenna package may include a distributed phased array antenna comprising (1) a plurality of antenna sub-arrays, which may each include a plurality of antennas, (2) a plurality of Radio Frequency Dies (RFDs), each of the RFDs located proximate and electrically coupled by a trace of a plurality of traces to a corresponding antenna sub-array of the plurality of antenna sub-arrays, and (3) wherein each trace of the plurality of traces configured to electrically couple an antenna of the plurality of antennas to the RFD located proximate the antenna, wherein each trace of the plurality of traces is configured to transmit millimeter wave (mm-wave) radio signals, and wherein the plurality of traces are each of a substantially uniform length. |
| US11509064B2 |
Traveling wave array having longitudinally polarized elements
An apparatus and method for orthogonal rotation of a radiation E-field polarization rely on a radiating element including an offset-ridge waveguide and a single-mode first ridge waveguide functionally adjacent to the offset-ridge waveguide. |
| US11509053B2 |
Dual broadband antenna system for vehicles
A dual broadband and multiband antenna system of reduced dimension is preferably an external antenna for vehicles. The antenna system comprises first and second radiating elements and a flat ground plane in common for the two radiating elements. The two radiating elements are placed above the ground plane, with each radiating element being folded to form vertical and horizontal surfaces. The two vertical surfaces are orthogonal to the ground plane and parallel to each other. The horizontal surfaces are coplanar between vertical surfaces and parallel to the ground plane. Two parasitic elements are connected with the ground plane, and are parallel or coplanar with the horizontal surfaces, and extend partially around respectively the first and second radiating elements. The antenna system is preferably adapted to operate on the LTE communication network and provides 5G communication services. |
| US11509051B2 |
Radar sensor
A reception power supplying unit generates each of reception signals before and after a switching operation. A signal processing circuit generates each of difference signals before and after the switching operation on the basis of the reception signal and a reference signal. A phase difference detector calculates, as a transmission phase difference, the phase difference between transmission power supplying units on the basis of the respective difference signals, and adjusts a phase shift amount on the basis of the transmission phase difference and a set phase difference that is previously set. |
| US11509050B2 |
Multi-bay antenna apparatus and its operation method
There are provided a multi-bay antenna apparatus and an operation method thereof. A multi-bay antenna apparatus may include a first section, a first array antenna mounted in the first section to receive a signal in a predetermined frequency band, a second section movably coupled with the first section, and a second array antenna mounted in the second section to receive a signal in a predetermined frequency band. |
| US11509049B2 |
Touch sensor-antenna module and display device including the same
A touch sensor-antenna module according to exemplary embodiments of the present invention includes a substrate layer, a touch sensor electrode layer disposed on a central portion of an upper surface of the substrate layer, and antenna patterns disposed on a peripheral portion of the upper surface of the substrate layer at the same level as that of the touch sensor electrode layer. Mutual interference between the touch sensor electrode layer and the antenna pattern may be reduced to improve signal reliability and process efficiency. |
| US11509047B2 |
Series-connected antenna structure
A series-connected antenna structure is provided. The series-connected antenna structure includes an insulating substrate, a first connecting line, two first antennas, a second connecting line, two second antennas, and a load point. Two sub-antennas of one of the two first antennas are electrically coupled to a main section of the first connecting line, and two sub-antennas of another one of the two first antennas are respectively and electrically coupled to two subordinate sections of the first connecting line. Two sub-antennas of one of the two second antennas are electrically coupled to a main section of the second connecting line, and two sub-antennas of another one of the two second antennas are respectively and electrically coupled to two subordinate sections of the second connecting line. Each of the two second antennas and each of the two first antennas face opposite directions. |
| US11509037B2 |
Integrated circuit packages, antenna modules, and communication devices
Disclosed herein are antenna boards, integrated circuit (IC) packages, antenna modules, and communication devices. For example, in some embodiments, an antenna module may include: an IC package having a die and a package substrate, and the package substrate has a recess therein; and an antenna patch, coupled to the package substrate, such that the antenna patch is over or at least partially in the recess. |
| US11509032B2 |
Radio frequency waveguide system including control remote node thermal cooling
A radio frequency waveguide communication system includes a guided electromagnetic transmission network, and a cooling air source. The guided electromagnetic transmission network includes one or more remote node in fluid communication with one or more waveguides. The cooling air source is in fluid communication with the guided electromagnetic transmission network and is configured to provide pressurized cooling air to the waveguide. The waveguides direct the pressurized cooling air to the remote node. |
| US11509027B2 |
Battery
A battery includes an electrode layer, a counter electrode layer, and a solid electrolyte layer between the electrode layer and the counter electrode layer. The solid electrolyte layer has a first region containing a first solid electrolyte material and a second region containing a second solid electrolyte material. The first region is within a region where the electrode layer and the counter electrode layer face each other. With respect to the first region, the second region is positioned on an outer peripheral side of the region where the electrode layer and the counter electrode layer face each other, and is in contact with the first region. A second density, which is the density of the second solid electrolyte material in the second region, is higher than a first density, which is the density of the first solid electrolyte material in the first region. |
| US11509026B2 |
Cap assembly and secondary battery
The disclosure relates to a cap assembly and a secondary battery. The cap assembly includes: a cap plate including a main portion and a convex portion, wherein the main portion includes a first surface, a second surface and an electrode lead-out hole; an electrode terminal including an extension portion that extends beyond a hole wall of the electrode lead-out hole and extends in a circumferential direction of the electrode lead-out hole to form a ring structure, and the extension portion is arranged on a side of the first surface away from the second surface; and a sealing ring at least partially disposed between the extension portion and the main portion, wherein the convex portion is disposed on the second surface and around the electrode lead-out hole and has a thickness of 0.01 mm to 2 mm, a top surface of the convex portion extends out of the second surface. |
| US11509023B2 |
Battery wiring module
Provided is a battery wiring module that allows module-side terminals to be easily mounted to a housing. The battery wiring module includes module-side terminals that are electrically connected to bus bars connecting battery terminals of a plurality of battery cells; wires with ends on one side connected to the module-side terminals; and a housing for accommodating the wires and the module-side terminals. The housing includes a plurality of terminal accommodating portions for accommodating the module-side terminals. The terminal accommodating portions include insertion ports into which the module-side terminals are partially inserted, and recesses that are located upstream of the insertion ports in a direction in which the module-side terminals are inserted and that are lower than terminal seat surfaces on which the module-side terminals can be placed. |
| US11509018B2 |
Battery package including fixing member, a device including the same and manufacturing method of battery package
A battery package including a fixing member, a device including the same, and a battery package manufacturing method are provided. The battery package includes: a battery module including a plurality of battery cells; a tray disposed at a lower end of the battery module and receiving the battery module; and a bracket adjacent to one side of the tray and mounted and coupled to one side surface of the lower end of the battery module, wherein at least one of a surface of the bracket in contact with the battery module and a surface of the tray in contact with the one side surface of the lower end of the battery module and disposed adjacent to the bracket may have a wedge shape. |
| US11509009B2 |
Battery module with enhanced cooling efficiency, and battery pack comprising same
A battery module includes: a plurality of battery cells stacked to face each other; a plurality of cell cartridges stacked to surround the plurality of battery cells; and a plurality of PCM capsules disposed in the cell cartridges and each containing a phase change material (PCM) therein. |
| US11508997B2 |
Battery control device and abnormality sensing method
A battery control device, which controls a battery, including cell blocks connected in series in which battery cells are connected in parallel, to execute voltage equalization of the cell blocks, includes a detection unit that detects voltage between positive and negative electrodes of each cell block, a voltage equalization circuit that includes a plurality of discharge units in which at least one discharge element and a switching element are connected in series, and a control unit that controls the switching elements to equalize the voltages of the cell blocks. The discharge units are connected between the positive and negative electrodes of the cell blocks, respectively. The control unit controls the switching elements at a predetermined timing to execute discharge of the cell blocks, and determines whether there is an abnormality in the cell blocks based on voltage differences between the cell blocks before and after the discharge. |
| US11508995B2 |
Battery device, battery management device, electronic device, electric motor vehicle, power storage device, and power system
A battery device includes a battery unit which has a plurality of batteries connected in series; first and second lines each led from a cathode and an anode of the battery unit; first and second semiconductor switch elements which are inserted into the first line; a driver configured to generate a drive signal to turn off one of the first and second semiconductor switch elements when a protective operation is performed; a third semiconductor switch element which is inserted between a gate of at least one of the first and second semiconductor switch elements and an intermediate voltage point of the battery unit; and a semiconductor switch controller including a detector configured to turn on the third semiconductor switch element when the drive signal is detected and to apply a potential smaller than a source potential to a gate of one of the first. |
| US11508994B2 |
Method for producing a lithium-ion cell
A method for producing a lithium-ion cell is provided. The electrochemically active coating of an electrode is brought into contact with an electrolyte or an auxiliary liquid before a winding or cutting operation. This method is suitable in particular for continuously producing lithium-ion cells by means of processes proceeding at high speed, such as winding processes. |
| US11508990B2 |
Lithium secondary battery
A lithium secondary battery includes: a cathode, an anode; and an electrolyte between the cathode and the anode, wherein the cathode includes a cathode active material represented by Formula 1 below, and the electrolyte includes a lithium salt, a non-aqueous solvent, and a compound represented by Formula 2, where x, y, z, M, A, L1, a1, and R1 to R4 are defined as described in the disclosure. |
| US11508989B2 |
Solid electrolyte film for all-solid state secondary battery, solid electrolyte sheet for all-solid state secondary battery, positive electrode active material film for all-solid state secondary battery, negative electrode active material film for all-solid state secondary battery, electrode sheet for all-solid state secondary battery, all-solid state secondary battery, and method for manufacturing all-solid state secondary battery
Provided are an inorganic solid electrolyte material including a sulfide-based inorganic solid electrolyte and an electron-insulating inorganic material that coats a surface of the sulfide-based inorganic solid electrolyte, is solid at 100° C., and fuses at a specific temperature, a slurry using the same, a solid electrolyte film for an all-solid state secondary battery, a solid electrolyte sheet for an all-solid state secondary battery, a positive electrode active material film for an all-solid state secondary battery, a negative electrode active material film for an all-solid state secondary battery, an electrode sheet for an all-solid state secondary battery, an all-solid state secondary battery, and a method for manufacturing an all-solid state secondary battery. |
| US11508988B2 |
Lithium anode device stack manufacturing
Metal electrodes, more specifically lithium-containing anodes, high performance electrochemical devices, such as secondary batteries, including the aforementioned lithium-containing electrodes, and methods for fabricating the same are provided. In one implementation, an anode electrode structure is provided. The anode electrode structure comprises a current collector comprising copper, a lithium metal film formed on the current collector, a copper film formed on the lithium metal film, and a protective film formed on the copper film. The protective film is a lithium-ion conducting film selected from the group comprising lithium-ion conducting ceramic, a lithium-ion conducting glass, or ion conducting liquid crystal. |
| US11508984B2 |
Thin film pattern layer battery systems
A battery assembly can be formed on a base layer provided on a substrate, with a thin film battery stack including an anode layer, a cathode layer, and an electrolyte layer between the anode and cathode layers. The thin film battery stack can be attached to a pattern film layer with holes for electrical connection to the anode and cathode layers. |
| US11508979B2 |
Aircraft fuel cell system without the use of a buffer battery
In one or more embodiments of the novel aircraft fuel cell system without the use of a buffer battery, the fuel cell and compressor would be sized sufficiently larger for the intended application, allowing the compressor to change speeds much faster. This in turn would allow power outputs to change much quicker. If power outputs can change as quickly as the application dictates, then a buffer battery is not necessary. In one or more embodiments, because the system is mostly electronically controlled, software can be written to protect the fuel cell from instantaneous power spikes. If a large power output is suddenly requested of the fuel cell, the software can smooth out the demand curve to provide an easier load profile to follow. |
| US11508978B2 |
Fuel cell system
A fuel cell system includes a fuel cell stack, an oxidizing gas supply system, a cooling medium circulation pump, a stack temperature acquisition unit, and a control unit. After a first time point when a change in an acquisition temperature turns from downward to upward after the change in the acquisition temperature turns from upward to downward for the first time after the start of the warm-up operation processing, the control unit sets a decrease speed in cases of decreasing a rotational speed of the cooling medium circulation pump to a smaller value than a value set before the first time point. |
| US11508973B2 |
Fuel cell system for vehicle
A fuel cell system for a vehicle includes: a first cooling line to pass through a fuel cell stack in the vehicle and to circulate a first coolant therethrough; a second cooling line to pass through a power electronic part in the vehicle and to circulate a second coolant therethrough; and a heat exchanger to allow the first coolant and the second coolant to exchange heat. |
| US11508972B2 |
Manufacturing method and manufacturing apparatus for fuel cell member
A manufacturing apparatus for a fuel cell member includes a positioning device for positioning a resin frame equipped membrane electrode assembly and a separator member. This positioning device includes a base and positioning pins which are inserted into positioning holes formed in the resin frame equipped membrane electrode assembly and the separator member. Lifting members are provided around the positioning pins. The lifting member is lifted and lowered by a lifting mechanism. |
| US11508969B2 |
Structured anodes for lithium-based energy storage devices
An anode for an energy storage device includes a current collector. The current collector includes: i) an electrically conductive substrate including a first electrically conductive material; ii) a plurality of electrically conductive structures in electrical communication with the electrically conductive substrate, wherein each electrically conductive structure includes a second electrically conductive material; and iii) a metal oxide coating. The metal oxide coating includes one or both of: a) a first metal oxide material in contact with the electrically conductive substrate; or b) a second metal oxide material in contact with the electrically conductive structures; or both (a) and (b). The anode further includes lithium storage coating overlaying the metal oxide coating, the lithium storage layer including a total content of silicon, germanium, or a combination thereof, of at least 40 atomic %. The electrically conductive structures are at least partially embedded within the lithium storage coating. |
| US11508968B2 |
Microporous carbon nanofibers
A composition can include a carbon nanofiber, wherein a precursor for the carbon nanofiber includes an alcohol and an aldehyde crosslinked by a primary amine. In certain embodiments, the carbon nanofiber can be biotemplated. Biotemplating enables precise control of morphology at the nanometer scale, while molecular templating allows control of carbon nanotexture and structure at the sub-nanometer scale. |
| US11508966B2 |
Protective carbon layer for lithium (Li) metal anodes
This disclosure provides a battery including a cathode, an anode positioned opposite the cathode and a carbon interface layer. The carbon interface layer includes an electrically insulating flaky carbon layer conformally encapsulating the anode. A plurality of carbon nano-onions (CNOs) defining a plurality of interstitial pore volumes are interspersed throughout the electrically insulating flaky carbon layer. An electrolyte is in contact with the carbon interface layer and the cathode. A separator is positioned between the anode and the cathode. The electrically insulating flaky carbon layer can include graphene oxide (GO). The plurality of interstitial pore volumes can be configured to transport lithium (Li) ions between the anode and the cathode via the plurality of interstitial pore volumes in a bulk phase of the electrolyte. The carbon interface layer can be configured to inhibit growth of Li dendritic structures from the anode towards the cathode. |
| US11508963B2 |
Lithium secondary battery and thick film electrode for the same
A thick film electrode for a lithium secondary battery is provided. The lithium secondary battery includes a thick film electrode including a cathode including a cathode active material and an anode including an anode active material. The cathode and the anode have a thickness in a range of 250 μm to 1500 μm, and are laser-etched such that one or more grooves are formed in the cathode and the anode. |
| US11508961B2 |
Method of preparing positive electrode active material for secondary battery
A method of preparing a positive electrode active material for a secondary battery includes preparing a positive electrode active material precursor including nickel (Ni), cobalt (Co), and at least one selected from the group consisting of manganese (Mn) and aluminum (Al); and forming a lithium composite transition metal oxide by mixing the positive electrode active material precursor and a lithium source and performing calcination, wherein the positive electrode active material precursor includes nickel (Ni) in an amount of 60 mol % or more out of the entire metal element, and a molar ratio (Li/M) of lithium (Li) of the lithium source to the entire metal element (M) of the positive electrode active material precursor is greater than 1.1. |
| US11508959B2 |
Battery electrode comprising lithium-coated metallic material, and method for manufacturing same
A lithium coating method includes: coating an oxide layer having lithiophilic properties on a metal material by heating the metal material at a certain temperature; and coating a lithium layer on the oxide layer by bringing the metal material coated with the oxide layer into contact with molten lithium. |
| US11508957B2 |
Electrode, secondary battery, battery pack, vehicle and stationary power source
An electrode comprises a current collector; and an active material-containing layer having active materials on the current collector. The active material-containing layer has a first surface contacting the current collector and a second surface which is opposite side of the first surface. At least one part of the second surface is covered by a compound containing Zn. When an image of the second surface is taken by Scanning Electron Microscope, the image is divided into 100 blocks, a ratio of existence of blocks having hexagonal platelet shaped compound containing Zn to the 100 blocks is calculated, and the ratio of existence of blocks is calculated with respect to 10 images, an average of the ratio of existence of blocks with respect to the 10 images is 20% or less (including 0). |
| US11508956B2 |
Dry electrode manufacture with lubricated active material mixture
A method of manufacturing a free-standing electrode film includes preparing a mixture including an electrode active material, a binder, and an additive solution or conductive paste, the additive solution or conductive paste being in an amount less than 5% by weight of the mixture and including a polymer additive and a liquid carrier, as well as a conductive material in the case of a conductive paste. The mixture may have total solid contents greater than 95% by weight. Preparing the mixture may include mixing the additive solution or conductive paste with the electrode active material to lubricate the electrode active material and subsequently adding and mixing in the binder. The method may further include subjecting the mixture to a shear force and, after the mixture has been subjected to the shear force, pressing the mixture into a free-standing film. |
| US11508955B2 |
Conductive carbon material dispersing agent and high-conductivity slurry for lithium battery
The invention relates to the technical field of lithium battery slurry materials, in particular to a conductive carbon material dispersing agent which comprises one of modified polyvinyl alcohol, alkyl ammonium salt copolymer, olefin block maleic anhydride copolymer and pyrrolidone copolymer, or mixtures thereof, and can effectively disperse carbon nanotube, graphene and other conductive carbon materials in a solvent to obtain uniform conductive slurry; further disclosed is a high-conductivity slurry for the lithium battery, which comprises 0.5-15.0% by weight of a conductive carbon material and 0.1-3.0% by weight of a dispersing agent, and can remarkably reduce the bulk resistivity of a positive electrode system of the lithium battery and improve the conductivity of a pole piece. |
| US11508951B2 |
Solid-state energy storage devices and methods of making the same
An aspect of the present disclosure is a system that includes a first deposition system that includes a first cylinder having a first outer surface configured to hold a first substrate, a first spray nozzle configured to receive at least a first fluid, and a first fiber nozzle configured to receive at least a second fluid, where the first spray nozzle is configured to operate at a first voltage, the first fiber nozzle is configured to operate at a second voltage, the first cylinder is configured to be electrically connected to ground, the first spray nozzle is configured to apply onto the substrate a first plurality of at least one of particles or droplets from the first fluid, the first fiber nozzle is configured to apply onto the substrate a first fiber from the second fluid, and the first plurality of particles or droplets and the first fiber combine to form a first composite layer on the substrate. |
| US11508949B2 |
Display panel and display device
The present disclosure provides a display panel and a display device including the same. The display panel comprises a transparent substrate and a display structure arranged on the transparent substrate, the display structure comprises a pixel unit array and a lead metal layer, a laser barrier layer is arranged on the lead metal layer, and an orthogonal projection of the laser barrier layer on the transparent substrate partially covers that of the lead metal layer on the transparent substrate. |
| US11508944B2 |
Display device
A display device includes a display circuit layer including a first surface and a second surface and including a display area in which an image is displayed on the first surface, a heat conductive sheet overlapping the display circuit layer below the second surface, and an optical fingerprint sensor inside the display area below the heat conductive sheet and overlapping the display circuit layer. The heat conductive sheet includes a first area overlapping the optical fingerprint sensor and a second area overlapping the display area around the optical fingerprint sensor. The heat conductive sheet includes a heat conductive material, has a shape having a light transmittance required for sensing by the optical fingerprint sensor in the first area, and has no light transmittance in the second area. |
| US11508936B2 |
Display device including block patterns
A display device includes a substrate on which an active region and a non-active region disposed are defined. The non-active region at least partially surrounds the active region. A light-emitting element is disposed in the active region on the substrate. An encapsulation layer is disposed on the light-emitting element. Block patterns are disposed in the non-active region on the substrate and at least partially surround the active region. The non-active region includes a first non-active region positioned at a first side of the active region and a second non-active region positioned at a second side of the active region. There are more block patterns disposed in the first non-active region than in the second non-active region. |
| US11508933B2 |
Display panel and display device
A display panel, a method for manufacturing the same, and a display device are provided. The display panel includes a first substrate and a second substrate opposite to each other; a display structure on a side of the first substrate facing the second substrate; a sealant surrounding the display structure; and a barrier structure surrounding the display structure and located between the display structure and the sealant, the barrier structure being disposed on one of the first substrate or the second substrate and being spaced apart from the other of the first substrate or the second substrate. |
| US11508930B2 |
Ultrathin metal electrode with auxiliary electrode for light-emitting device
A light-emitting device having a first electrode, a second electrode, and an emissive layer (EML) in electrical contact with the first electrode and the second electrode. A charge transport layer (CTL) is positioned between the EML and the second electrode, with the second electrode being an ultrathin transparent metal layer of less than five nanometers, and including an auxiliary electrode metal grid formed by wet etching. The ultrathin transparent metal layer is positioned between the CTL and the auxiliary electrode metal grid, and the ultrathin metal layer is preferably a metal with an etchant selectivity such that it is unaffected by the wet etching of the auxiliary electrode. |
| US11508929B2 |
Conductor and method of manufacturing the same
A conductor includes a plurality of metal nanostructures and an organic material, where a portion of the organic material surrounding each of the metal nanostructures is selectively removed, and the conductor has a haze of less than or equal to about 1.1, a light transmittance of greater than or equal to about 85% at about 550 nm, and a sheet resistance of less than or equal to about 100 Ω/sq. An electronic device includes the conductor, and a method of manufacturing a conductor includes preparing a conductive film including a metal nanostructure and an organic material, and selectively removing the organic material from the conductive film using a cluster ion beam sputtering. |
| US11508926B2 |
Light-emitting element, display device, electronic device, and lighting device
A light-emitting element including a fluorescent material as a light-emitting material and having high emission efficiency is provided. The light-emitting element includes a pair of electrodes and an EL layer provided between the pair of electrodes. The EL layer includes a host material and a guest material. The host material is capable of exhibiting thermally activated delayed fluorescence at room temperature. The guest material is capable of exhibiting fluorescence. The second triplet excitation energy level of the guest material is higher than or equal to the lowest singlet excitation energy level of the guest material. |
| US11508923B2 |
Semiconductor devices
A technique, comprising: forming in situ on a support substrate: a first metal layer; a light-absorbing layer after the first metal layer; a conductor pattern after the light-absorbing layer; and a semiconductor layer after the conductor pattern; patterning the semiconductor layer using a resist mask to form a semiconductor pattern defining one or more semiconductor channels of one or more semiconductor devices; and patterning the light-absorbing layer using the resist mask and the conductor pattern, so as to selectively retain the light-absorbing layer in regions that are occupied by at least one of the resist mask and the conductor pattern. |
| US11508922B2 |
Display device including elastic member
A display device including a display panel having a folding area and a bending area, a support member disposed on a bottom surface of the display panel and including a plurality of openings formed in the folding area, an elastic member disposed on a bottom surface of the support member and overlapping the openings in the folding area, and a first adhesive member disposed between the support member and the elastic member. |
| US11508921B2 |
Display device and method for manufacturing same where a resin layer containing air bubbles
Provided is an organic EL display device including a resin substrate layer, a TFT layer provided on the resin substrate layer, and a light-emitting element that is provided on the TFT layer and constitutes a display region. The resin substrate layer includes a first resin layer, an inorganic layer, and a second resin layer, which are provided in that order from a side opposite to the TFT layer. The interior of the first resin layer contains a plurality of air bubbles. |
| US11508920B2 |
Display device and flexible OLED panel thereof
A display device and a flexible OLED panel. The flexible OLED panel includes: a flexible substrate, and OLED light emitting elements on the substrate. The OLED light emitting elements include pixel circuits and functional layers including anodes disposed above the pixel circuits. The flexible OLED panel further includes pixel unit regions and non-pixel unit regions. The pixel unit regions are arranged in an array, the non-pixel unit regions are disposed between adjacent pixel unit regions. At least one of the anodes, and corresponding transistors in the pixel circuits are located in one pixel unit region, respective transistors in the adjacent pixel unit regions are connected via electrical connection lines, so that the electrical connection lines pass through at least one non-pixel unit region, and a portion of the electrical connection lines in the at least one non-pixel unit region is coated by an organic film layer. |
| US11508919B2 |
Stretchable electronic material and devices
Devices and methods relating stretchable electronics are disclosed. Some disclosed embodiments relate to a stretchable electronic film comprising an insulating polymer and less than 1 wt % of a semiconducting polymer. Other disclosed embodiments relate to manufacturing a multi-layered, stretchable electronic device characterized by a single peel-off step for integrating all components of the device rather than a multi-peel synthesis of the device. |
| US11508910B2 |
Organic semiconducting compounds
The invention relates to novel organic semiconducting compounds containing a polycyclic unit, to methods for their preparation and educts or intermediates used therein, to compositions, polymer blends and formulations containing them, to the use of the compounds, compositions and polymer blends as organic semiconductors in, or for the preparation of, organic electronic (OE) devices, especially organic photovoltaic (OPV) devices, perovskite-based solar cell (PSC) devices, organic photodetectors (OPD), organic field effect transistors (OFET) and organic light emitting diodes (OLED), and to OE, OPV, PSC, OPD, OFET and OLED devices comprising these compounds, compositions or polymer blends. |
| US11508907B2 |
Functional layer forming ink and self-luminous element manufacturing method
An ink used in forming a functional layer of a self-luminous element by a printing method, the ink including a functional material and a mixed solvent. The mixed solvent includes solvents each having different vapor pressures. The functional material is dissolved or dispersed in the mixed solvent. A solvent that has a lowest vapor pressure among the solvents has a viscosity of at least 53 mPa·s, and a viscosity of the mixed solvent is 15 mPa·s or less. |
| US11508906B2 |
Semiconductor memory device
According to one embodiment, a semiconductor memory device includes: a first and a second wirings; a third wiring disposed between them; a first phase change layer disposed between the first and the third wirings; a first conducting layer disposed on a first wiring side surface of the first phase change layer; a second conducting layer disposed on a third wiring side surface of the first phase change layer; a second phase change layer disposed between the third and the second wirings; a third conducting layer disposed on a third wiring side surface of the second phase change layer; and a fourth conducting layer disposed on a second wiring side surface of the second phase change layer. The first and the fourth conducting layers have coefficients of thermal conductivity larger or smaller than the coefficients of thermal conductivity of the second and the third conducting layers. |
| US11508903B2 |
Spin orbit torque device with insertion layer between spin orbit torque electrode and free layer for improved performance
An insertion layer for perpendicular spin orbit torque (SOT) memory devices between the SOT electrode and the free magnetic layer, memory devices and computing platforms employing such insertion layers, and methods for forming them are discussed. The insertion layer is predominantly tungsten and improves thermal stability and perpendicular magnetic anisotropy in the free magnetic layer. |
| US11508901B2 |
Piezoelectric component, sensor, and actuator
A piezoelectric component that has a piezoelectric element including a piezoelectric ceramic layer and a sintered metal layer on at least a first main surface of the piezoelectric ceramic layer and containing a non-precious metal, and a protective layer containing an elastic body covering first and second opposed main surfaces of the piezoelectric element. The piezoelectric ceramic layer contains 90 mol % or more of a perovskite compound that contains niobium, an alkali metal, and oxygen. A thickness of the piezoelectric element is 100 μm or less. |
| US11508900B2 |
Human joint energy harvesting apparatus and wearable electronic device comprising the same
The present application provides a human joint energy harvesting apparatus for capturing the biomechanical energy of a joint to generate electrical energy. The generated electrical energy may provide a real-time power supply to the wearable electronics. The apparatus employs a linear slide rail mechanism and cooperates with the user's first limb and second limb to form a slider-crank mechanism, which converts the rotating motion of the joint into a linear motion of the linear slide rail mechanism. The bending beam converts the linear motion of the linear slide rail mechanism into a bending motion. A piezoelectric film may be bonded to the upper and lower surfaces of the bending beam. During walking, the bending beam is deformed, causing the piezoelectric film to be stretched or compressed to generate electrical energy. To harvest more energy, the bending beam used in the apparatus is designed to be subjected to forced motion and free vibration, and a proof mass is attached to it. The present application also provides a wearable electronic device equipped with the human joint energy harvesting apparatus. |
| US11508898B2 |
Piezoelectric devices fabricated in packaging build-up layers
Piezoelectric devices are described fabricated in packaging buildup layers. In one example, a package has a plurality of conductive routing layers and a plurality of organic dielectric layers between the conductive routing layers. A die attach area has a plurality of vias to connect to a microelectronic die, the vias connecting to respective conductive routing layers. A piezoelectric device is formed on an organic dielectric layer, the piezoelectric device having at least one electrode coupled to a conductive routing layer. |
| US11508897B2 |
Driver for a circuit with a capacitive load
A driver for a circuit with a capacitive load, includes a power converter configured to receive a DC input voltage from an input stage, generate a switching voltage at a switching node, and output an output voltage forming an analog waveform at an output stage. The power converter includes a first switch connected between an inductive device and a ground, a second switch connected between the inductive device and the output stage, and a controller to control the first switch and the second switch. The analog waveform has an amplitude at least two times greater than the input voltage. |
| US11508895B2 |
Reducing dissipation and frequency noise in quantum devices using a local vacuum cavity
A device includes: a substrate including a superconductor quantum device, the superconductor quantum device including a superconductor material that exhibits superconducting properties at or below a corresponding critical temperature; a cap layer bonded to the substrate; and a sealed cavity between the cap layer and the substrate. |
| US11508889B2 |
Light emitting device including light emitting unit arranged in a tube
A light-emitting device includes a carrier with a first surface and a second surface opposite to the first surface; and a light-emitting unit disposed on the first surface and configured to emit a light toward but not passing through the first surface. When emitting the light, the light-emitting device has a first light intensity above the first surface, and a second light intensity under the second surface, a ratio of the first light intensity to the second light intensity is in a range of 2˜9. |
| US11508882B2 |
Quantum dot LED, manufacturing method thereof and display device
Disclosed in the present application are a quantum dot LED, a manufacturing method thereof, and a display device, belonging to the technical field of LED light sources. The quantum dot LED includes an LED support, an LED chip, a filling layer, and a quantum dot layer, where the LED support comprises a chamber; the LED chip is arranged on a bottom surface of the chamber; the filling layer covers the bottom surface of the chamber and the LED chip, and is engaged with walls of the chamber; and the quantum dot layer is arranged at an opening on a top surface of the chamber, a light incident side of the quantum dot layer abuts against a surface of the filling layer away from the bottom surface of the chamber, and a shortest distance h between the LED chip and the quantum dot layer meets h≥0.03 mm. |
| US11508877B2 |
Red light emitting diode and manufacturing method thereof
A red light emitting diode including an epitaxial stacked layer, a first and a second electrodes and a first and a second electrode pads is provided. The epitaxial stacked layer includes a first-type and a second-type semiconductor layers and a light emitting layer. A main light emitting wavelength of the light emitting layer falls in a red light range. The epitaxial stacked layer has a first side adjacent to the first semiconductor layer and a second side adjacent to the second semiconductor layer. The first and the second electrodes are respectively electrically connected to the first-type and the second-type semiconductor layers, and respectively located to the first and the second sides. The first and a second electrode pads are respectively disposed on the first and the second electrodes and respectively electrically connected to the first and the second electrodes. The first and the second electrode pads are located at the first side of the epitaxial stacked layer. Furthermore, a manufacturing method of the red light emitting diode is also provided. |
| US11508874B2 |
Light emitting apparatus and projector
A light emitting apparatus including a substrate, a first and a second light emitter, a first mirror that reflects light from first light emitter, a second mirror that reflects light from second light emitter, and a support member that has a first and second hole and supports the first and second mirror. The first and second light emitter each include a first semiconductor layer, a second semiconductor layer having conductivity type different from the conductivity type of first semiconductor layer, and a light emitting layer provided between the first and second semiconductor layer. The first semiconductor layer forms a plurality of columnar sections. The plurality of columnar sections of the first light emitter and the second light emitter are disposed in the first and second hole respectively. The first mirror and second mirror are provided at the side surface of support member that defines the first and second hole respectively. |
| US11508873B2 |
Light emitting device and projector
There is provided a light emitting device including: a substrate; a laminated structure provided on the substrate and having a plurality of columnar portions, in which the columnar portion includes an n-type first semiconductor layer, a p-type second semiconductor layer, a light emitting layer provided between the first semiconductor layer and the second semiconductor layer, and a third semiconductor layer having a band gap larger than that of the light emitting layer, and the third semiconductor layer includes a first part provided between the light emitting layer and the second semiconductor layer, and a second part that is in contact with a side surface of the light emitting layer. |
| US11508862B2 |
Thick-film conductive paste, and their use in the manufacture of solar cells
The invention discloses a conductive paste for forming the electrode on the surface of solar cell, which contains conductive powder, mixed glass and organic phase; wherein, the mixed glass comprises the following two types of glass components: the first type of glass is at least one selected from the tellurium glass which does not contain lead substantially and having tellurium, bismuth, lithium as the essential component;The second type of glass is at least one kind of lead silicate glass, which having lead and silicon as essential components and does not contain tellurium substantially. The invention also provides a solar cell prepared by printing the conductive paste as a surface electrode and a manufacturing method of the solar cell. The solar cell made of the conductive paste of this invention has good EL performance in inspection, excellent ohmic contact of the cell, high cell conversion efficiency, better reliability, and strong bonding strength, the adhesion performance is taken into account while improving reliability and ohmic contact. |
| US11508861B1 |
Photovoltaic module with light-scattering encapsulant providing shingle-mimicking appearance
A method of making a photovoltaic module includes the step of obtaining a frontsheet having a glass layer, a light scattering encapsulant layer, and a polymer layer. The light scattering encapsulant layer includes a first region, a plurality of first portions extending from the first region, and at least one area located between the first portions. The first portions of the light scattering encapsulant layer has a first light scattering value and a second portion defined by the area has a second light scattering value different from the first light scattering value. The method includes the steps of obtaining at least one solar cell, an encapsulant, and a backsheet, and laminating the frontsheet, the encapsulant, the at least one solar cell, and the backsheet. |
| US11508853B2 |
Vertical bipolar transistor device
A vertical bipolar transistor device includes a heavily-doped semiconductor substrate, a first semiconductor epitaxial layer, at least one doped well, an isolation structure, and an external conductor. The heavily-doped semiconductor substrate and the doped well have a first conductivity type, and the first semiconductor epitaxial layer has a second conductivity type. The first semiconductor epitaxial layer is formed on the heavily-doped semiconductor substrate. The doped well is formed in the first semiconductor epitaxial layer. The isolation structure, formed in the heavily-doped semiconductor substrate and the first semiconductor epitaxial layer, surrounds the first semiconductor epitaxial layer and the at least one doped well. The external conductor is arranged outside the first semiconductor epitaxial layer and the doped well and electrically connected to the first semiconductor epitaxial layer and the doped well. |
| US11508849B2 |
Semiconductor device and methods of manufacture
A semiconductor device and method of manufacture are provided. In an embodiment a first contact is formed to a source/drain region and a dielectric layer is formed over the first contact. An opening is formed to expose the first contact, and the opening is lined with a dielectric material. A second contact is formed in electrical contact with the first contact through the dielectric material. |
| US11508847B2 |
Transistor arrangements with metal gate cuts and recessed power rails
Described herein are transistor arrangements fabricated by forming a metal gate cut as a trench that is non-selective to the gate sidewalls, in an etch process that can remove both the gate electrode materials and the surrounding dielectrics. Such an etch process may provide improvements in terms of accuracy, cost-efficiency, and device performance, compared to conventional approaches to forming metal gate cuts. In addition, such a process may be used to provide power rails, if the trench of a metal gate cut is to be at least partially filled with an electrically conductive material. Because the electrically conductive material is in the trench and may be in between the fins, as opposed to being provided over the fins, such power rails may be referred to as “recessed.” Providing recessed power rails may provide improvements in terms of reduced metal line resistance and reduced voltage droop. |
| US11508846B2 |
Ferroelectric memory device
A ferroelectric memory device according to one embodiment includes a semiconductor substrate, a fin structure disposed on the semiconductor substrate and having a trench, the trench having a bottom surface and a sidewall surface; a ferroelectric layer disposed on the bottom surface and the sidewall surface of the trench; a plurality of resistor layers stacked vertically in the trench, each resistor layer of the plurality of resistor layers having a different electrical resistance; and a gate electrode layer electrically connected to the each resistor layer in the plurality of resistor layers. The plurality of resistor layers are disposed between the gate electrode layer and the ferroelectric layer. |
| US11508845B2 |
Semiconductor structure and associated fabricating method
A semiconductor structure is disclosed. The semiconductor structure includes: a substrate of a first conductivity; a first region of the first conductivity formed in the substrate; a second region of the first conductivity formed in the first region, wherein the second region has a higher doping density than the first region; a source region of a second conductivity formed in the second region; a drain region of the second conductivity formed in the substrate; a pickup region of the first conductivity formed in the second region and adjacent to the source region; and a resist protective oxide (RPO) layer formed on a top surface of the second region. An associated fabricating method is also disclosed. |
| US11508844B2 |
Semiconductor device
A semiconductor device (300) comprising: a doped semiconductor substrate (302); an epitaxial layer (304), disposed on top of the substrate, the epitaxial layer having a lower concentration of dopant than the substrate; a switching region disposed on top of the epitaxial layer; and a contact diffusion (350) disposed on top of the epitaxial layer, the contact diffusion having a higher concentration of dopant than the epitaxial layer; wherein the epitaxial layer forms a barrier between the contact diffusion and the substrate. |
| US11508836B2 |
Semiconductor device including trench gate structure with specific volume ratio of gate electrodes
A semiconductor device includes a semiconductor substrate, multiple trench gate structures and an emitter region. The semiconductor substrate includes: a drift layer of a first conductivity type; a base layer of a second conductivity type disposed on the drift layer; and a collector layer of the second conductivity type, the collector layer disposed at a position opposite to the base layer with the drift layer sandwiched between the base layer and the collector layer. Each of the trench gate structures includes: a trench penetrating the base layer and reaching the drift layer; a gate insulation film is disposed at a wall surface of the trench; and a gate electrode disposed on the gate insulation film. The emitter region is disposed on a surface layer portion of the base layer and is in contact with the trench. |
| US11508830B2 |
Transistor with buffer structure having carbon doped profile
In a described example, an integrated circuit (IC) is disclosed that includes a transistor. The transistor includes a substrate, and a buffer structure overlying the substrate. The buffer structure has a first buffer layer, a second buffer layer overlying the first buffer layer, and a third buffer layer overlying the second buffer layer. The first buffer layer has a first carbon concentration, the second buffer layer has a second carbon concentration lower than the first carbon concentration, and the third buffer layer has a third carbon concentration higher than the second carbon concentration. An active structure overlies the buffer structure. |
| US11508826B2 |
Composite work function layer formation using same work function material
A method includes forming a gate dielectric layer on a semiconductor region, and depositing a first aluminum-containing work function layer using a first aluminum-containing precursor. The first aluminum-containing work function layer is over the gate dielectric layer. A second aluminum-containing work function layer is deposited using a second aluminum-containing precursor, which is different from the first aluminum-containing precursor. The second aluminum-containing work function layer is deposited over the first aluminum-containing work function layer. A conductive region is formed over the second aluminum-containing work function layer. |
| US11508818B2 |
Semiconductor device with strain relaxed layer
A semiconductor device includes an epitaxial substrate. The epitaxial substrate includes a substrate. A strain relaxed layer covers and contacts the substrate. A III-V compound stacked layer covers and contacts the strain relaxed layer. The III-V compound stacked layer is a multilayer epitaxial structure formed by aluminum nitride, aluminum gallium nitride or a combination of aluminum nitride and aluminum gallium nitride. |
| US11508815B2 |
Semiconductor device including two-dimensional semiconductor material
Provided is a semiconductor device which use a two-dimensional semiconductor material as a channel layer. The semiconductor device includes: a gate electrode on a substrate; a gate dielectric on the gate electrode; a channel layer on the gate dielectric; and a source electrode and a drain electrode that may be electrically connected to the channel layer. The gate dielectric has a shape with a height greater than a width, and the channel layer includes a two-dimensional semiconductor material. |
| US11508813B2 |
Column IV transistors for PMOS integration
Techniques are disclosed for forming column IV transistor devices having source/drain regions with high concentrations of germanium, and exhibiting reduced parasitic resistance relative to conventional devices. In some example embodiments, the source/drain regions each includes a thin p-type silicon or germanium or SiGe deposition with the remainder of the source/drain material deposition being p-type germanium or a germanium alloy (e.g., germanium:tin or other suitable strain inducer, and having a germanium content of at least 80 atomic % and 20 atomic % or less other components). In some cases, evidence of strain relaxation may be observed in the germanium rich cap layer, including misfit dislocations and/or threading dislocations and/or twins. Numerous transistor configurations can be used, including both planar and non-planar transistor structures (e.g., FinFETs and nanowire transistors), as well as strained and unstrained channel structures. |
| US11508812B2 |
Multi-step lateral epitaxial overgrowth for low defect density III-N films
Techniques related to forming low defect density III-N films, device structures, and systems incorporating such films are discussed. Such techniques include epitaxially growing a first crystalline III-N structure within an opening of a first dielectric layer and extending onto the first dielectric layer, forming a second dielectric layer over the first dielectric layer and laterally adjacent to a portion of the first structure, and epitaxially growing a second crystalline III-N structure extending laterally onto a region of the second dielectric layer. |
| US11508810B2 |
Diode structures
The present disclosure relates to semiconductor structures and, more particularly, to high voltage diode structures and methods of manufacture. The structure includes: a diode structure composed of first well of a first dopant type in a substrate; and a well ring structure of the first dopant type in the substrate which completely surrounds the first well of the first dopant type, and spaced a distance “x” from the first well to cut a leakage path to a shallower second well of a second dopant type. |
| US11508805B2 |
Display panel and display device including the same
A display panel includes: a plurality of divided driving parts, wherein at least a divided driving part of the divided driving parts includes: a first connection line extending in a first direction; a second connecting line extending in the first direction and spaced apart from the first connection line in a second direction crossing the first direction; a first gate line extending in the second direction and electrically connected to the first connection line; a second gate line extending in the second direction, being spaced apart from the first gate line, and being electrically connected to the second connection line; a first pixel in a first pixel column and a first pixel row and electrically connected to the first gate line; and a second pixel in the first pixel column and a second pixel row and electrically connected to the second gate line. |
| US11508797B2 |
Display device including island-shaped inorganic films
A display device includes: a resin substrate; a TFT layer; a bending portion; at least one inorganic film forming the TFT layer; an interlayer insulating film forming the TFT layer; and a plurality of wires forming the TFT layer, wherein the at least one inorganic film and the interlayer insulating film include an opening disposed at the bending portion, the at least one inorganic film includes a plurality of island-shaped inorganic films remaining in the opening, each of the plurality of wires overlaps a corresponding island-shaped inorganic film among the plurality of island-shaped inorganic films, and the display device includes a metal layer in a form of islands disposed between each of the plurality of wires and the corresponding island-shaped inorganic film overlapping each of the plurality of wires, the metal layer being in contact with each of the plurality of wires. |
| US11508796B2 |
Display device with pixel electrode connected to electrode pattern and protective layer
A display device including a substrate including a display area and an opening area therein, a data conductive layer on the substrate and including a source electrode and a voltage wiring in the opening area, a protective layer on the data conductive layer and covering the source electrode and the voltage wiring, a pixel electrode layer including a pixel electrode connected to the source electrode through a first contact hole, and an electrode pattern connected to the voltage wiring through a second contact hole, a pixel defining layer including an opening exposing the pixel electrode and a hole exposing the electrode pattern, a light emitting layer on the pixel defining layer and a common electrode on the light emitting layer, wherein the hole does not overlap the first and second contact holes. |
| US11508795B2 |
Display device
A display device includes a display panel having a general area including first subpixels, and a sensor area including second subpixels and light-transmitting area. Each of the first subpixels and the second subpixels includes a first active layer disposed on a substrate and formed of a first material, a first gate layer disposed on the first active layer, a second gate layer disposed on the first gate layer, a second active layer disposed on the second gate layer and formed of a second material different from the first material, a third gate layer disposed on the second active layer, and a light-blocking layer disposed between the substrate and the first active layer and overlapping the second active layer in a thickness direction. |
| US11508788B2 |
Display device
A display device including a display panel including a light emitting element configured to generate light, and an input detection layer disposed on the display panel and including a plurality of sensing electrodes disposed on the display panel and arranged in one direction, and a plurality of trace lines electrically connected to the plurality of sensing electrodes, respectively, in which at least one of the trace lines includes a single layer part including one conductive layer, and a multilayer part including at least two conductive layers disposed on different layers. |
| US11508786B2 |
Display backplane, method of manufacturing the same and display device using the same
The disclosure provides a display backplane, a method of manufacturing the same, and a display device using the same. The display backplane includes a substrate; a thin film transistor structure layer disposed on one side of the substrate and including thin film transistors, a gate insulating layer, and an interlayer dielectric layer, where an etching rate of the interlayer dielectric layer carried out under an HF atmosphere condition is less than 2 Å/S; and photosensitive devices spaced apart from the thin film transistor structure layer and disposed on one side of the thin film transistor structure layer away from the substrate. The interlayer dielectric layer has a high compactness, and can effectively block H from entering the active layer of the thin film transistor to conductorize the active layer, thus guaranteeing good optical characteristics of the thin film transistor while carrying out optical compensation. |
| US11508783B2 |
Method for fabricating memory device
A method for fabricating memory device is provided. The method includes forming a transistor on a substrate. Further, a contact structure is formed on a source/drain region of the transistor. A conductive layer is formed on the contact structure. Four memory structures are formed on the conductive layer to form a quadrilateral structure. |
| US11508781B2 |
Integrating circuit elements in a stacked quantum computing device
A stacked quantum computing device including: a first chip including a superconducting qubit, where the superconducting qubit includes a superconducting quantum interference device (SQUID) region, a control region, and a readout region, and a second chip bonded to the first chip, where the second chip includes a first control element overlapping with the SQUID region, a second control element displaced laterally from the control region and without overlapping the control region, and a readout device overlapping the readout region. |
| US11508779B2 |
Light emitting element
A light emitting element includes: a Si substrate including: a first semiconductor layer, a plurality of light emitting layers arranged in a matrix on part of an upper surface of the first semiconductor layer, and a plurality of second semiconductor layers respectively disposed on upper surfaces of the light emitting layers; a first external connection part disposed on the Si substrate at a first end of the Si substrate in a longitudinal direction; a second external connection part disposed on the Si substrate at a second end of the Si substrate opposite to the first end in the longitudinal direction; and a plurality of wiring electrodes disposed on the Si substrate, the plurality of wiring electrodes including a first wiring electrode electrically connected to the first external connection part, and a second wiring electrode electrically connected to the second external connection part. |
| US11508778B2 |
Light emitting device for display and display apparatus having the same
A light emitting device for a display including a first LED stack, a second LED stack disposed thereunder, a third LED stack disposed thereunder and including first and second conductivity type semiconductor layers, a first bonding layer between the second and third LED stacks, a second bonding layer between the first and second LED stacks, an insulation layer between the second bonding layer and the second LED stack, lower buried layers passing through the second LED stack and the insulation layer and electrically connected to the first and second conductivity type semiconductor layers of the third LED stack, respectively, upper buried layers passing through the first LED stack and the second bonding layer and electrically connected to the lower buried layers, and upper connectors disposed on the first LED stack and including upper connectors covering and electrically connected to the upper buried layers, respectively. |
| US11508776B2 |
Image sensor semiconductor packages and related methods
An image sensor semiconductor package (package) includes a printed circuit board (PCB) having a first surface and a second surface opposite the first surface. A complementary metal-oxide semiconductor (CMOS) image sensor (CIS) die has a first surface with a photosensitive region and a second surface opposite the first surface of the CIS die. The second surface of the CIS die is coupled with the first surface of the PCB. A transparent cover is coupled over the photosensitive region of the CIS die. An image signal processor (ISP) is embedded within the PCB. One or more electrical couplers electrically couple the CIS die with the PCB. A plurality of electrical contacts on the second surface of the PCB are electrically coupled with the CIS die and with the ISP. The ISP is located between the plurality of electrical contacts of the second surface of the PCB and the CIS die. |
| US11508775B2 |
Three-dimensional image sensor based on structured light
The inventive concepts provide a three-dimensional (3D) image sensor, based on structured light (SL), having a structure in which difficulty in a manufacturing process of a wiring layer is decreased and/or an area of a bottom pad of a capacitor is increased. The 3D image sensor includes: a pixel area including a photodiode in a semiconductor substrate and a gate group including a plurality of gates; a multiple wiring layer on an upper portion of the pixel area, the multiple wiring layer including at least two wiring layers; and a capacitor structure between a first wiring layer on a lowermost wiring layer of the multiple wiring layer and a second wiring layer on the first wiring layer, the capacitor structure including a bottom pad, a top pad, and a plurality of capacitors, wherein the bottom pad is connected to the first wiring layer. |
| US11508774B2 |
Image sensor device
An image sensor device is disclosed, which blocks noise of a pad region. The image sensor device includes a substrate including a first surface and a second surface that are arranged to face each other, a pad disposed over the first surface of the substrate, and a through silicon via (TSV) formed to penetrate the substrate, and disposed at both sides of the pad in a first direction. |
| US11508769B2 |
Image sensing device
An image sensing device is disclosed. The image sensing device includes a semiconductor substrate, a plurality of signal detectors, an insulation layer, and at least one gate. The semiconductor substrate includes a first surface and a second surface opposite to the first surface, and generates signal carriers in response to light incident upon the first surface. The signal detectors are formed on the semiconductor substrate and located closer to the second surface than the first surface of the semiconductor substrate, and detect the signal carriers using a difference in electric potential. The insulation layer is disposed at the second surface of the semiconductor substrate, and isolates the signal detectors from each other. The at least one gate is disposed at the insulation layer interposed between the signal detectors, and reflects light arriving at the second surface of the semiconductor substrate back to the semiconductor substrate. |
| US11508768B2 |
Solid-state imaging device and electronic apparatus
The present technology relates to a solid-state imaging device and an electronic apparatus capable of improving sensitivity while suppressing deterioration of color mixing. The solid-state imaging device includes a substrate, a first photoelectric conversion region in the substrate, a second photoelectric conversion region in the substrate, a trench between the first photoelectric conversion region and the second photoelectric conversion region and penetrates through the substrate, a first concave portion region that has a plurality of concave portions provided on a light receiving surface side of the substrate, above the first photoelectric conversion regions, and a second concave portion region that has a plurality of concave portions provided on the light receiving surface side of the substrate, above the second photoelectric conversion region. The technology of the present disclosure can be applied to, for example, a backside illumination solid-state imaging device and the like. |
| US11508761B2 |
Inverter circuit structure, gate driving circuit and display panel
Provided are an inverter circuit structure, a gate driving circuit and a display panel. The inverter circuit structure includes a PMOS transistor and an NMOS transistor, and further includes a first active layer, a gate layer, a second active layer, a first insulating layer between the gate layer and the first active layer, and a second insulating layer between the gate layer and the second active layer. An orthographic projection of the gate on the first active layer is a first region, and a portion of the first active layer in the first region has substantially a same thickness. An orthographic projection of the gate on the second active layer is a second region, and a portion of the second active layer in the second region has substantially a same thickness. |
| US11508757B2 |
Breakdown voltage capability of high voltage device
Various embodiments of the present disclosure are directed towards an integrated chip. The integrated chip includes a semiconductor substrate having a device substrate overlying a handle substrate and an insulator layer disposed between the device substrate and the handle substrate. A gate electrode overlies the device substrate between a drain region and a source region. A conductive via extends through the device substrate and the insulator layer to contact the handle substrate. A first isolation structure is disposed within the device substrate and comprises a first isolation segment disposed laterally between the gate electrode and the conductive via. A contact region is disposed within the device substrate between the first isolation segment and the conductive via. A conductive gate electrode directly overlies the first isolation segment and is electrically coupled to the contact region. |
| US11508756B2 |
Memory cell arrangement and methods thereof
A memory cell arrangement is provided that may include: a plurality of electrode layers, wherein each of the plurality of electrode layers comprises a plurality of through holes, each of the plurality of through holes extending from a first surface to a second surface of a respective electrode layer; a plurality of electrode pillars, wherein each of the plurality of electrode pillars comprises a plurality of electrode portions, wherein each of the plurality of electrode portions is disposed within a corresponding one of the plurality of through holes; wherein the respective electrode layer and a respective electrode portion of the plurality of electrode portions form a first electrode and a second electrode of a capacitor and wherein at least one memory material portion is disposed in each of the plurality of through holes in a gap between the respective electrode layer and the respective electrode portion. |
| US11508751B2 |
Semiconductor device
A semiconductor device includes an active fin on a substrate, a gate electrode and intersecting the active fin, gate spacer layers on both side walls of the gate electrode, and a source/drain region in a recess region of the active fin at at least one side of the gate electrode. The source/drain region may include a base layer in contact with the active fin, and having an inner end and an outer end opposing each other in the first direction on an inner sidewall of the recess region. The source/drain region may include a first layer on the base layer. The first layer may include germanium (Ge) having a concentration higher than a concentration of germanium (Ge) included in the base layer. The outer end of the base layer may contact the first layer, and may have a shape convex toward outside of the gate electrode on a plane. |
| US11508748B2 |
Three-dimensional memory device containing III-V compound semiconductor channel and contacts and method of making the same
A three-dimensional memory device includes an alternating stack of insulating layers and electrically conductive layers, and a memory stack structure vertically extending through the alternating stack. The memory stack structure includes a vertical semiconductor channel and a memory film. The vertical semiconductor channel can include a III-V compound semiconductor channel material. A III-V compound substrate semiconductor layer or a III-V compound semiconductor source region can be used to provide low-resistance electrical connection to a bottom end of the vertical semiconductor channel, and a drain region including a graded III-V compound semiconductor material can be used to provide low-resistance electrical connection to a top end of the vertical semiconductor channel. |
| US11508744B2 |
Memory devices and methods of manufacturing the same
A memory device may include a substrate; a first stack structure comprising a plurality of first gate layers and a plurality of first interlayer insulating layers alternately stacked on the substrate; a second stack structure comprising a plurality of second gate layers and a plurality of second interlayer insulating layers alternately stacked on the first stack structure; and a channel structure penetrating the first stack structure and the second stack structure, wherein the channel structure comprises a first portion in a first channel hole penetrating the first stack structure, a second portion in a second channel hole penetrating the second stack structure, and a first protrusion located in a first recess recessed into one layer of the plurality of first interlayer insulating layers from a side portion of the first channel hole. |
| US11508742B2 |
Devices including stair step structures adjacent substantially planar, vertically extending surfaces of a stack structure
A method of forming a semiconductor device structure comprises forming a stack structure over a substrate, the stack structure comprising tiers each independently comprising a sacrificial structure and an insulating structure and longitudinally adjacent the sacrificial structure. A masking structure is formed over a portion of the stack structure. A photoresist is formed over the masking structure and over additional portions of the stack structure not covered by the masking structure. The photoresist and the stack structure are subjected to a series of material removal processes to selectively remove portions of the photoresist and portions of the stack structure not covered by one or more of the masking structure and remaining portions of the photoresist to form a stair step structure. Semiconductor devices and additional methods of forming a semiconductor device structure are also described. |
| US11508741B2 |
Nonvolatile memory device having resistance change structure
A nonvolatile memory device according to an embodiment includes a substrate having an upper surface, a gate line structure disposed over the substrate, a gate dielectric layer covering one sidewall surface of the gate line structure and disposed over the substrate, a channel layer disposed to cover the gate dielectric layer and disposed over the substrate, a bit line structure and a resistance change structure to contact different portions of the channel layer over the substrate, and a source line structure disposed in the resistance change structure. The gate line structure includes at least one gate electrode layer pattern and interlayer insulation layer pattern that are alternately stacked along a first direction perpendicular to the substrate, and extends in a second direction perpendicular to the first direction. |
| US11508740B2 |
Semiconductor device including contact structure and method of manufacturing semiconductor device
A semiconductor device may include a plurality of first contact structures, plug-shaped second contact structures configured to be connected to a first number of the plurality of first contact structures, respectively, a slit-shaped second contact structure configured to be connected to a second number of the plurality of first contact structures, adjacent in a first direction, and a third contact structure configured to be connected to sidewalls of the plug-shaped second contact structures, adjacent in the first direction. |
| US11508736B2 |
Method for forming different types of devices
A semiconductor device according to the present disclosure includes a gate-all-around (GAA) transistor in a first device area and a fin-type field effect transistor (FinFET) in a second device area. The GAA transistor includes a plurality of vertically stacked channel members and a first gate structure over and around the plurality of vertically stacked channel members. The FinFET includes a fin-shaped channel member and a second gate structure over the fin-shaped channel member. The fin-shaped channel member includes semiconductor layers interleaved by sacrificial layers. |
| US11508735B2 |
Cell manufacturing
A semiconductor device includes a first Static Random Access Memory (SRAM) array including a first SRAM cell and a second SRAM array including a second SRAM cell. The first SRAM cell includes a first pull-down (PD) device including a single fin N-type FinFET. The single fin N-type FinFET includes a first gate dielectric having a first thickness. The second SRAM cell includes a second PD device including a multiple fin N-type FinFET. The multiple fin N-type FinFET includes a second gate dielectric having a second thickness. The first thickness is greater than the second thickness. |
| US11508733B2 |
Integrated circuit device with ion doped regions that provide dopant ions to gate dielectric film
An integrated circuit device includes: a substrate including active regions; a device isolation film defining the active regions; a word line arranged over the active regions and the device isolation film and extending in a first horizontal direction; and a gate dielectric film arranged between the substrate and the word line and between the device isolation film and the word line, in which, in a second horizontal direction orthogonal to the first horizontal direction, a width of a second portion of the word line over the device isolation film is greater than a width of a first portion of the word line over the active regions. To manufacture the integrated circuit device, an impurity region is formed in the substrate and the device isolation film by implanting dopant ions into the substrate and the device isolation film, and a thickness of a portion of the impurity region is reduced. |
| US11508731B1 |
Semiconductor structure and manufacturing method thereof
The present application provides a semiconductor structure and a manufacturing method thereof, relates to the technical field of semiconductors. The manufacturing method of a semiconductor structure includes: providing a substrate; forming a plurality of laminated structures arranged at intervals on the substrate, the laminated structure includes a first conductive layer, an insulating layer, and a second conductive layer, and at least one of the first conductive layer and the second conductive layer is a semi-metal layer; forming a channel layer covering the laminated structures, and a dielectric layer covering the channel layer; and forming word lines (WLs) extending along a first direction, the WL includes a plurality of contact parts and a connecting part connecting adjacent contact parts, the contact part surrounds and is in contact with a side surface of the dielectric layer, and the contact part is opposite to at least a part of the insulating layer. |
| US11508730B2 |
Memory devices with vertical channels
Memory devices may include a source region, channels, a gate insulation layer pattern, a selection gate pattern, a first gate pattern, a second gate pattern and a drain region. The source region may include first impurities having a first conductivity type at an upper portion of a substrate. The channels may contact the source region. Each of the channels may extend in a vertical direction that is perpendicular to an upper surface of the substrate. The selection gate pattern may be on sidewalls of the channels. The first gate pattern may be on the sidewalls of the channels. The first gate pattern may be a common electrode of all of multiple channels. The second gate patterns may be on the sidewalls of the channels. The drain region may include second impurities having a second conductivity type that is different from the first conductivity type at an upper portion of each of the channels. |
| US11508729B2 |
Semiconductor die with decoupling capacitor and manufacturing method thereof
The present application provides a semiconductor die with decoupling capacitors and a manufacturing method of the semiconductor die. The semiconductor die includes first bonding pads, second bonding pads, bond metals and decoupling capacitors. The first bonding pads are coupled to a power supply voltage. The second bonding pads are coupled to a reference voltage. The bond metals are disposed on central portions of the first and second bonding pads. The decoupling capacitors are disposed under the first and second bonding pads, and overlapped with peripheral portions of the first and second bonding pads. The decoupling capacitors are in parallel connection with one another. First terminals of the decoupling capacitors are electrically connected to the first bonding pads, and second terminals of the decoupling capacitors are electrically connected to the second bonding pads. |
| US11508723B2 |
Power semiconductor device with a temperature sensor
We describe herein a high voltage semiconductor device comprising a power semiconductor device portion (100) and a temperature sensing device portion (185). The temperature sensing device portion comprises: an anode region (140), a cathode region (150), a body region (160) in which the anode region and the cathode region are formed. The temperature sensing device portion also comprises a semiconductor isolation region (165) in which the body region is formed, the semiconductor isolation region having an opposite conductivity type to the body region, the semiconductor isolation region being formed between the power semiconductor device portion and the temperature sensing device portion. |
| US11508719B2 |
Electrostatic discharge circuit
An ESD circuit is connected between an I/O pad and a first node. The ESD circuit includes a bi-directional buck circuit, a triggering circuit and a discharging circuit. The bi-directional buck circuit includes a forward path and a reverse path. The forward path and the reverse path are connected between the I/O pad and a second node. The triggering circuit is connected between the second node and the first node. The discharging circuit is connected between the second node and the first node, and connected with the triggering circuit. When the I/O pad receives negative ESD zap, the ESD current flows from the first node to the I/O pad through the discharging circuit and the reverse path. When the I/O pad receives positive ESD zap, the ESD current flows from the I/O pad to the first node through the forward path and the discharging circuit. |
| US11508716B2 |
Integrated circuit and electrostatic discharge protection method
An integrated circuit includes a load circuit and an electrostatic discharge (ESD) circuit. The load circuit includes a first and a second I/O terminal. The ESD circuit is coupled to the first and the second I/O terminal. The ESD circuit includes a first protection circuit configured to conduct a first ESD current from the first to the second I/O terminal. The first protection circuit includes a first, a second, a third doped region, and a well. The first doped region is coupled to the first I/O terminal, and has a first conductive type. The well is coupled to the first doped region, and has a second conductive type different from the first conductive type. The second doped region is coupled to the well, and has the first conductive type. The third doped region couples the second doped region to the second I/O terminal, and has the second conductive type. |
| US11508715B2 |
Light-emitting diode chip with electrical overstress protection
Solid-state lighting devices including light-emitting diodes (LEDs) and more particularly LED chip structures with electrical overstress protection are disclosed. LED chip structures are disclosed that include built-in electrical overstress protection. An exemplary LED chip may include an active LED structure that is arranged as a primary light-emitting structure and a separate active LED structure that is arranged as an electrical overstress protection structure. The electrical overstress protection structure may be electrically connected in reverse relative to the primary light-emitting structure. In this manner, under normal operating conditions, forward current will flow through the primary light-emitting structure to generate desired light emissions, and during an electrical overstress event, reverse current may flow through the electrical overstress protection structure, thereby protecting the light-emitting structure from damage. |
| US11508709B2 |
Light-emitting arrangement and method for the production thereof
The invention relates to a method, an arrangement and an array, in which a structured contact layer and an elastic carrier layer arranged on a first side of the structured contact layer and connected to the structure contact layer by means of a bonded connection is produced, and in which at least one optoelectronic semiconductor component is arranged on the structured contact layer, on a second side of the structured contact layer, opposing the first side, and is electrically and mechanically connected to the structured contact layer, an elastic conversion layer in an irradiation region being applied to the structured contact layer and the elastic carrier layer in such a way that at least the optoelectronic semiconductor component is embedded in the conversion layer, at least in sections, and a connection region of the structure contact layer remains uncovered. |
| US11508708B2 |
Semiconductor module, display apparatus, and semiconductor module manufacturing method
A semiconductor module includes a ground substrate that is provided with a drive circuit, and a plurality of light emitting elements that are electrically coupled to the drive circuit, in which a distance between the light emitting elements adjacent to each other is equal to or less than 20 μm in a top view. |
| US11508703B2 |
Light emitting device for monitoring system
A light emitting device is provided. The light emitting device includes a package structure, a first light emitting chip, a second light emitting chip, a third light emitting chip, a first encapsulant, a second encapsulant, and a third encapsulant. The first light emitting chip, the second light emitting chip, and the third light emitting chip are disposed in a first cavity, a second cavity, and a third cavity of a body of the package structure, and electrically connected with a first electrode pair, a second electrode pair, and a third electrode pair that are covered by the body. The first encapsulant, the second encapsulant, and the third encapsulant are filled in the first cavity, the second cavity, and the third cavity. A first opening of the first cavity is larger in size than a second opening of the second cavity and a third opening of the third cavity. |
| US11508698B2 |
Semiconductor package and semiconductor device
Each of a plurality of semiconductor elements included in a semiconductor package includes a front-surface electrode being provided on a semiconductor substrate on a side opposite to a conductor substrate, a back-surface electrode being joined to the conductor substrate, a control pad configured to control current flowing between the front-surface electrode and the back-surface electrode, a frame being electrically connected to the front-surface electrode, a portion of the frame being exposed from a surface of a sealing material from which a lower surface of the conductor substrate is exposed, and a plurality of terminal blocks being electrically connected to a plurality of first pads, a portion of the plurality of terminal blocks being exposed from a surface of the sealing material, the surface being provided on a side opposite to the surface of the sealing material from which the lower surface of the conductor substrate is exposed. |
| US11508695B2 |
Redistribution layers in semiconductor packages and methods of forming same
An embodiment package includes a first integrated circuit die, an encapsulant around the first integrated circuit die, and a conductive line electrically connecting a first conductive via to a second conductive via. The conductive line includes a first segment over the first integrated circuit die and having a first lengthwise dimension extending in a first direction and a second segment having a second lengthwise dimension extending in a second direction different than the first direction. The second segment extends over a boundary between the first integrated circuit die and the encapsulant. |
| US11508693B2 |
High capacity memory module including wafer-section memory circuit
A memory device includes a first semiconductor wafer portion including two or more adjacent quasi-volatile memory circuits formed on a common semiconductor substrate where each quasi-volatile memory circuit being isolated from an adjacent quasi-volatile memory circuit by scribe lines; and a second semiconductor wafer portion including at least one memory controller circuit formed on a semiconductor substrate. The memory controller circuit includes logic circuits and interface circuits. The memory controller circuit is interconnected to the two or more adjacent quasi-volatile memory circuits of the first semiconductor wafer portion through interconnect structures and the memory controller circuit operates the two or more quasi-volatile memory circuits as one or more quasi-volatile memories. |
| US11508686B2 |
Semiconductor device, receiver and transmitter
A semiconductor device includes a semiconductor chip and a package. The semiconductor chip includes a signal processing circuit, a plurality of pads, and a first resistor which arc formed on a semiconductor substrate. On the semiconductor chip, there is no shot-circuiting between a first pad and a second pad of the plurality of pads. A signal input terminal of the signal processing circuit is connected to the second pad. The first resistor is provided between a reference potential supply terminal for supplying a power supply potential and the first pad. A specific terminal of the plurality of terminals of the package is connected to the first pad by a first bonding wire, and is connected to the second pad by a second bonding wire. |
| US11508684B2 |
Structure for bonding and electrical contact for direct bond hybridization
A direct bond hybridization (DBH) method is provided. The DBH method includes preparing a first underlying layer, a first contact layer disposed on the first underlying layer and a first contact electrically communicative with the first underlying layer and protruding through the first contact layer, preparing a second underlying layer, a second contact electrically communicative with the second underlying layer and formed of softer material than the first contact and a second contact layer disposed on the second underlying layer and defining an aperture about the second contact and a moat at least partially surrounding the second contact and bonding the first and second contact layers whereby the first contact contacts the second contact such that the second contact deforms and expands into the moat. |
| US11508683B2 |
Semiconductor device with die bumps aligned with substrate balls
A semiconductor device is disclosed including a semiconductor die mounted on a substrate. The substrate includes a pattern of solder balls which is complementary and aligned to a pattern of solder bumps on the semiconductor die. These complementary and aligned patterns of solder balls and solder bumps minimize the lengths of current paths between the solder balls and solder bumps, and provide current paths between the solder balls and solder bumps of relatively uniform lengths. |
| US11508677B2 |
Semiconductor package for high-speed data transmission and manufacturing method thereof
A semiconductor structure and a method of forming the same are provided. A method of manufacturing the semiconductor structure includes: providing a substrate; depositing a first dielectric layer over the substrate; attaching a waveguide to the first dielectric layer; depositing a second dielectric layer to laterally surround the waveguide; and forming a first conductive member and a second conductive member over the second dielectric layer and the waveguide, wherein the first conductive member and the second conductive member are in contact with the waveguide. The waveguide is configured to transmit an electromagnetic signal between the first conductive member and the second conductive member. |
| US11508672B2 |
Semiconductor device
A semiconductor device including a base, a buffer member, a frame, a lid, and a semiconductor element, is disclosed. The ceramic frame is mounted on the copper base with the molybdenum buffer member interposed therebetween. The semiconductor element is sealed in a space within the frame defined by the lid. The frame includes a top portion, a lower stage portion that is disposed below the top portion and is provided with an input electrode and an output electrode, and an upper stage portion. The upper stage portion is formed in an arrangement direction of the input electrode and the output electrode, and is formed below the top portion and above the lower stage portion. The upper stage portion includes an upper stage connection portion formed on the periphery of the lower stage portion in a direction intersecting the arrangement direction of the input electrode and the output electrode. |
| US11508671B2 |
Semiconductor package and manufacturing method thereof
A manufacturing method of a semiconductor package includes at least the following steps. A rear surface of a semiconductor die is attached to a patterned dielectric layer of a first redistribution structure through a die attach material, where a thickness of a portion of the die attach material filling a gap between the rear surface of the semiconductor die and a recessed area of the patterned dielectric layer is greater than a thickness of another portion of the die attach material interposed between the rear surface of the semiconductor die and a non-recessed area of the patterned dielectric layer. An insulating encapsulant is formed on the patterned dielectric layer of the first redistribution structure to cover the semiconductor die and the die attach material. Other methods for forming a semiconductor package are also provided. |
| US11508667B1 |
Embedded shield for protection of memory cells
Some examples described herein provide for a shield in an integrated circuit (IC) structure for memory protection. In an example, an IC structure includes a semiconductor material, an interconnect structure, and a shield. The semiconductor material has a protected region. Devices are disposed in a first side of the semiconductor material in the protected region. The interconnect structure is disposed on the first side of the semiconductor material. The interconnect structure interconnects the devices in the protected region. The shield is disposed on a second side of the semiconductor material opposite from the first side of the semiconductor material. The shield is positioned aligned with the protected region. |
| US11508666B2 |
Semiconductor package
A semiconductor package is provided. The semiconductor package includes a semiconductor die, a stack of polymer layers, redistribution elements and a passive filter. The polymer layers cover a front surface of the semiconductor die. The redistribution elements and the passive filter are disposed in the stack of polymer layers. The passive filter includes a ground plane and conductive patches. The ground plane is overlapped with the conductive patches, and the conductive patches are laterally separated from one another. The ground plane is electrically coupled to a reference voltage. The conductive patches are electrically connected to the ground plane, electrically floated, or electrically coupled to a direct current (DC) voltage. |
| US11508663B2 |
PCB module on package
Aspects of the disclosure provide a printed circuit board (PCB) system that includes an integrated circuit (IC) package, a first PCB and a PCB module. The IC package has a package substrate and an IC chip that is coupled to a top surface of the package substrate. The first PCB is configured to electrically couple with first contact structures that are disposed on a bottom surface of the package substrate. The PCB module includes a second PCB and one or more electronic components electrically coupled to the second PCB. The PCB module is configured to electrically couple with second contact structures that are disposed on the top surface of the package substrate. |
| US11508662B2 |
Device and method of very high density routing used with embedded multi-die interconnect bridge
A device and method for providing enhanced bridge structures is disclosed. A set of conducting and insulating layers are deposited and lithographically processed. The conducting layers have uFLS routing. A bridge with uFLS contacts and die disposed on the underlying structure such that the die are connected with the uFLS contacts and uFLS routing. For core-based structures, the layers are formed after the bridge is placed on the underlying structure and the die connected to the bridge through intervening conductive layers. For coreless structures, the layers are formed over the bridge and carrier, which is removed prior to bonding the die to the bridge, and the die bonded directly to the bridge. |
| US11508660B2 |
Molded power delivery interconnect module for improved Imax and power integrity
A semiconductor package including a molded power delivery module arranged between a package substrate and a semiconductor chip and including a plurality of input conductive structures and a plurality of reference conductive structures, wherein the input conductive structures alternate between the plurality of reference conductive structures, wherein the input conductive structure is electrically coupled with a chip input voltage terminal and a package input voltage terminal, wherein each of the plurality of reference conductive structures are electrically coupled with a semiconductor chip reference terminal and a package reference terminal. |
| US11508659B2 |
Interconnect structure in semiconductor device and method of forming the same
A semiconductor device includes a gate electrode extending in a first direction in a first layer over an active region, a first conductive line extending in the first layer adjacent to the gate electrode, a first power rail extending in a second direction perpendicular to the first direction in a second layer over the first layer, a second conductive line arranged in a third layer over the second layer, and a conductive via extending through the first power rail and electrically connecting the second conductive line to one of the gate electrode and the first conductive line. The conductive via is electrically insulated from the first power rail. |
| US11508656B2 |
Semiconductor package and method
In an embodiment, a device includes: a first redistribution structure including a first dielectric layer; a die adhered to a first side of the first redistribution structure; an encapsulant laterally encapsulating the die, the encapsulant being bonded to the first dielectric layer with first covalent bonds; a through via extending through the encapsulant; and first conductive connectors electrically connected to a second side of the first redistribution structure, a subset of the first conductive connectors overlapping an interface of the encapsulant and the die. |
| US11508653B2 |
Interconnection structure having reduced capacitance
The present disclosure provides a semiconductor component including a substrate, a plurality of metallic lines, a passivation layer and a spacer. The metallic lines are disposed on the substrate, the passivation layer is disposed over the substrate and the metallic lines, and the spacer is interposed between the substrate and the dielectric layer and between the metallic lines and the dielectric layer. The passivation layer has a first dielectric constant, and the spacer has a second dielectric constant less than the first dielectric constant. |
| US11508652B2 |
Semiconductor package
A semiconductor package includes a package substrate, a semiconductor chip on the package substrate, and a plurality of underfills between the package substrate and the semiconductor chip. The package substrate includes a trench formed in the package substrate and a plurality of dams on both sides of the trench, respectively. The top surfaces of the plurality of dams may be positioned at a lower level than the bottom surface of the semiconductor chip in a cross-sectional view of the semiconductor package with the package substrate providing a base reference level. |
| US11508648B2 |
Coupling mechanisms for substrates, semiconductor packages, and/or printed circuit boards
Techniques directed to forming and using coupling mechanisms for substrates, semiconductor packages, and/or printed circuit boards are described. One technique includes forming a substrate (205) comprising: first and second interconnect pads (213A, 213B) in or on a build-up layer (203); and first and second interconnects (211A, 211B) on the first and second interconnect pads (213A, 213B). The first interconnect pad (213A) can be located at a lower position than the second interconnect pad (213B) with regard to a z-position. The techniques described herein can assist with minimizing or eliminating solder ball bridge defects (SBBDs) that may be creating during performance of coupling technique (e.g., a reflow process, etc.). |
| US11508645B2 |
Modular technique for die-level liquid cooling
An integrated circuit assembly including a first die including a device side and a backside opposite the device side; and a second die including a plurality of fluidly accessible channels therein, wherein the second die is coupled to a backside of the first die. A method of fabricating an integrated circuit assembly including coupling a first die to a second die, wherein the first die includes a device side and an opposite backside, wherein the device side includes a plurality of integrated circuits and wherein the second die includes a plurality of fluidly accessible channels therein. |
| US11508644B2 |
Semiconductor device package having thermally conductive pathways
A semiconductor device package includes a substrate, a first heat-generating component positioned on a surface of the substrate, an encapsulant at least partially encapsulating the first heat-generating component, and one or more channels extending through a portion of the encapsulant toward the first heat-generating component. Each of the one or more channels contains a thermally conductive material having a thermal conductivity greater than a thermal conductivity of the encapsulant. |
| US11508642B2 |
Power module package structure
A power module package structure includes, from top to bottom, a layer of power chips, an upper bonding layer, a thermally-conductive and electrically-insulating composite layer, and a heat dissipation layer. The thermally-conductive and electrically-insulating composite layer contains an insulating layer and an upper copper layer that is formed on the insulating layer. One or more layers of upper packaging materials are covered over the layer of power chips and the upper bonding layer and are in contact with an upper surface of the upper copper layer. One or more layers of lower packaging materials are in contact with the insulating layer and are in contact with sidewalls of the upper copper layer. The lower packaging material has a higher rigidity than the upper packaging material. |
| US11508641B2 |
Thermally conductive and electrically insulative material
A monolithic substrate including a silica material fused to bulk copper is provided for coupling with electronic components, along with methods for making the same. The method includes arranging a base mixture in a die mold. The base mixture includes a bottom portion with copper micron powder and an upper portion with copper nanoparticles. The method includes arranging a secondary mixture on the upper portion of the base mixture. The secondary mixture includes a bottom portion with silica-coated copper nanoparticles and an upper portion with silica nanoparticles. The method includes heating and compressing the base mixture and the secondary mixture in the die mold at a temperature, pressure, and time sufficient to sinter and fuse the base mixture with the secondary mixture to form a monolithic substrate. The resulting monolithic substrate defines a first major surface providing thermal conductivity, and a second major surface providing an electrically resistive surface. |
| US11508635B2 |
Semiconductor package having routable encapsulated conductive substrate and method
A packaged semiconductor device includes a routable molded lead frame structure with a surface finish layer. In one embodiment, the routable molded lead frame structure includes a first laminated layer including the surface finish layer, vias connected to the surface finish layer, and a first resin layer covering the vias leaving the top surface of the surface finish layer exposed. A second laminated layer includes second conductive patterns connected to the vias, bump pads connected to the second conductive patterns, and a second resin layer covering one side of the first resin layer, the second conductive patterns and the bump pads. A semiconductor die is electrically connected to the surface finish layer and an encapsulant covers the semiconductor die and another side of the first resin layer. The surface finish layer provides a customizable and improved bonding structure for connecting the semiconductor die to the routable molded lead frame structure. |
| US11508634B2 |
Semiconductor package structure, electronic device, and method for manufacturing the same
A semiconductor package structure, an electronic device, and method for manufacturing the same are provided. The semiconductor package structure includes a wiring structure, a first electronic device, a second electronic device, and a protection material. The first electronic device is disposed on the wiring structure. The second electronic device is disposed on the wiring structure. The second electronic device defines a plurality of recesses on a first lateral side surface thereof. The protection material is disposed on the wiring structure and encapsulates the recesses of the second electronic device. |
| US11508633B2 |
Package structure having taper-shaped conductive pillar and method of forming thereof
A conductive structure, includes: a plurality of conductive layers; a plurality of conductive pillars being formed on the plurality of conductive layers, respectively; and a molding compound laterally coating the plurality of conductive pillars. Each of the plurality of conductive pillars is a taper-shaped conductive pillar, and is tapered from the conductive layers. |
| US11508625B2 |
Method of making a continuous channel between 3D CMOS
A semiconductor device includes a first n-type transistor and a first p-type transistor that are positioned side by side over a substrate. The first n-type transistor includes a first n-type source/drain (S/D) region, a first n-type channel region, and a second n-type S/D region that are formed based on a first continuous channel structure extending along a horizontal direction parallel to the substrate. The first n-type channel region is positioned between the first n-type S/D region and the second n-type S/D region. The first p-type transistor includes a first p-type S/D region, a first p-type channel region, and a second p-type S/D region that are formed based on the first continuous channel structure. The first p-type channel region is positioned between the first p-type S/D region and the second p-type S/D region. The second n-type S/D region is in contact with the first p-type S/D region. |
| US11508623B2 |
Local gate height tuning by CMP and dummy gate design
The present disclosure describes fabricating devices with tunable gate height and effective capacitance. A method includes forming a first metal gate stack in a dummy region of a semiconductor substrate, the first metal gate stack including a first work function metal (WFM) layer; forming a second metal gate stack in an active device region of the semiconductor substrate, the second metal gate stack including a second WFM layer different than the first WFM layer; and performing a CMP process using a slurry including a charged abrasive nanoparticles. The charged abrasive nanoparticles include a first concentration in the active device region different from a second concentration in the dummy region causing different polish rates in the active device region and dummy region. After the performing of the CMP process, the first metal gate stack has a first height greater different from a second height of the second metal gate stack. |
| US11508620B2 |
Method of removing a substrate with a cleaving technique
A method of removing a substrate from III-nitride based semiconductor layers with a cleaving technique. A growth restrict mask is formed on or above a substrate, and one or more III-nitride based semiconductor layers are grown on or above the substrate using the growth restrict mask. The III-nitride based semiconductor layers are bonded to a support substrate or film, and the III-nitride based semiconductor layers are removed from the substrate using a cleaving technique on a surface of the substrate. Stress may be applied to the III-nitride based semiconductor layers, due to differences in thermal expansion between the III-nitride substrate and the support substrate or film bonded to the III-nitride based semiconductor layers, before the III-nitride based semiconductor layers are removed from the substrate. Once removed, the substrate can be recycled, resulting in cost savings for device fabrication. |
| US11508607B2 |
Method of processing workpiece and resin sheet unit
A method of processing a workpiece includes sticking an adhesive layer side of a resin sheet having a layered structure that includes an adhesive layer and a base material layer, to an annular frame having an opening in covering relation to the opening, forming surface irregularities on a face side of the base material layer that is opposite the adhesive layer, placing the face side of the workpiece and the face side of the base material layer in facing relation to each other and pressing the workpiece against the resin sheet or pressing the resin sheet against the workpiece, thereby bringing the workpiece into intimate contact with the resin sheet to fix the workpiece to the resin sheet, holding the face side of the workpiece fixed to the resin sheet on a holding surface of a chuck table, and grinding the reverse side of the workpiece with a grinding stone. |
| US11508606B2 |
Technique for handling diced wafers of integrated circuits
A technique for handling an integrated circuit/tape assembly having a plurality of integrated circuits supported by underlying dicing tape involves placing the integrated circuit/tape assembly on a bottom file frame carrier (FFC) frame having structure (e.g., an inner rim or flexible pegs), placing a top FFC frame having a central opening over the integrated circuit/tape assembly, and mating the top and bottom FFC frames such that the dicing tape is pulled over the structure thereby laterally stretching the dicing tape, which breaks wafer saw bows holding the integrated circuits together. The lateral stretching of the dicing tape increases distance between adjacent integrated circuits in at least two mutually orthogonal lateral directions, thereby inhibiting the adjacent integrated circuits from colliding during shipment or storage for subsequent processing. The resulting assembly can be thinner than conventional FFC configurations, which results in more efficient shipment and storage. |
| US11508603B2 |
Substrate placing table and substrate processing apparatus
A substrate placing table according to an exemplary embodiment includes a base and an electrostatic chuck provided on the base. The electrostatic chuck includes a lamination layer portion, an intermediate layer, and a covering layer. The lamination layer portion is provided on the base. The intermediate layer is provided on the lamination layer portion. The covering layer is provided on the intermediate layer. The lamination layer portion includes a first layer, an electrode layer, and a second layer. The first layer is provided on the base. The electrode layer is provided on the first layer. The second layer is provided on the electrode layer. The intermediate layer is provided between the second layer and the covering layer and is in close contact with the second layer and the covering layer. The second layer is a resin layer. The covering layer is ceramics. |
| US11508601B2 |
Electrostatic holding apparatus with a layered composite electrode device and method for the production thereof
Holding apparatus 100 for electrostatic holding component 1 (e.g., semiconductor wafer), includes base body 10 with at least one plate 10A, protruding burls 11 on upper side of plate and end faces 12 of which span a burls support plane for supporting component, and electrode device 20 in layered form in spacings between burls and insulator layer 21 which is connected to plate, dielectric layer 23 of inorganic dielectric and electrode layer 22 between insulator and dielectric layers. Between burls support plane and dielectric layer upper side, predetermined gap spacing A is set. Electrode device has openings 24 and is on plate upper side between burls, which protrude therethrough. Insulator layer includes inorganic dielectric and is connected with adhesive 13 to base body upper side between burls. Electrode device is embedded in adhesive. Spacing between burls and electrode device is filled with adhesive. A production method is also described. |
| US11508596B2 |
Apparatus and methods for automatically handling die carriers
Apparatus and methods for automatically handling die carriers are disclosed. In one example, a disclosed apparatus includes: at least one load port each configured for loading a die carrier operable to hold a plurality of dies; and an interface tool coupled to the at least one load port and a semiconductor processing unit. The interface tool comprises: a first robotic arm configured for transporting the die carrier from the at least one load port to the interface tool, and a second robotic arm configured for transporting the die carrier from the interface tool to the semiconductor processing unit for processing at least one die in the die carrier. |
| US11508593B2 |
Side storage pods, electronic device processing systems, and methods for operating the same
Electronic device processing systems including an equipment front end module with at least one side storage pod are described. The side storage pod has a chamber including a top substrate holder and a bottom substrate holder. In some embodiments, an exhaust port is located at a midpoint between the top substrate holder and the bottom substrate holder. Methods and systems in accordance with these and other embodiments are also disclosed. |
| US11508587B2 |
Microelectronic assemblies
Microelectronic assemblies, and related devices and methods, are disclosed herein. For example, in some embodiments, a microelectronic assembly may include a package substrate having a first surface and an opposing second surface; and a die embedded in the package substrate, wherein the die has a first surface and an opposing second surface, the die has first conductive contacts at the first surface and second conductive contacts at the second surface, and the first conductive contacts and the second conductive contacts are electrically coupled to conductive pathways in the package substrate. |
| US11508586B2 |
Aluminum nitride sintered body and member for semiconductor manufacuting apparatus comprising same
An aluminum nitride sintered body contains 1 to 5% by weight of yttrium oxide (Y2O3), 10 to 100 ppm by weight of titanium (Ti), and the balance being aluminum nitride (AlN). Accordingly, a volume resistance value and thermal conductivity at a high temperature are improved, and the generation of impurities during a semiconductor manufacturing process can be suppressed. |
| US11508580B2 |
Method for forming mask pattern, storage medium, and apparatus for processing substrate
A technique for suppressing a metal component from remaining at a bottom of a mask pattern when the mask pattern is formed using a metal-containing resist film. A developable anti reflection film 103 is previously formed below a resist film 104. Further, after exposing and developing the wafer W, TMAH is supplied to the wafer W to remove a surface of the anti-reflection film 103 facing a bottom of the recess pattern 110 of the resist film 104. Therefore, the metal component 105 can be suppressed from remaining at the bottom of the recess pattern 110. Therefore, when the SiO2 film 102 is subsequently etched using the pattern of the resist film 104, the etching is not hindered, so that defects such as bridges can be suppressed. |
| US11508577B2 |
Channel layer formation for III-V metal-oxide-semiconductor field effect transistors (MOSFETs)
Embodiments herein describe techniques, systems, and method for a semiconductor device. Embodiments herein may present a semiconductor device including a substrate and an insulator layer above the substrate. A channel area may include an III-V material relaxed grown on the insulator layer. A source area may be above the insulator layer, in contact with the insulator layer, and adjacent to a first end of the channel area. A drain area may be above the insulator layer, in contact with the insulator layer, and adjacent to a second end of the channel area that is opposite to the first end of the channel area. The source area or the drain area may include one or more seed components including a seed material with free surface. Other embodiments may be described and/or claimed. |
| US11508573B2 |
Plasma doping of gap fill materials
In a variety of processes for forming electronic devices that use spin-on dielectric materials, properties of the spin-on dielectric materials can be enhanced by curing these materials using plasma doping. For example, hardness and Young's modulus can be increased for the cured material. Other properties may be enhanced. The plasma doping to cure the spin-on dielectric materials uses a mechanism that is a combination of plasma ion implant and high energy radiation associated with the species ionized. In addition, physical properties of the spin-on dielectric materials can be modified along a length of the spin-on dielectric materials by selection of an implant energy and dopant dose for the particular dopant used, corresponding to a selection variation with respect to length. |
| US11508572B2 |
Semiconductor device and manufacturing method thereof
A method includes forming a dummy gate structure over a wafer. Gate spacers are formed on either side of the dummy gate structure. The dummy gate structure is removed to form a gate trench between the gate spacers. A gate dielectric layer is formed in the gate trench. A gate electrode is formed over the gate dielectric layer. Forming the gate dielectric layer includes applying a first bias to the wafer. With the first bias turned on, first precursors are fed to the wafer. The first bias is turned off. After turning off the first bias, second precursors are fed to the wafer. |
| US11508571B2 |
Film forming method and film forming apparatus
A film forming method includes: rotating a rotary table to revolve a substrate which is placed on the rotary table and has a recess in its surface; supplying a raw material gas to a first region on the rotary table; supplying an ammonia gas to a second region on the rotary table; forming a first SiN film in the recess by supplying the raw material gas to the first region and supplying the ammonia gas to the second region at a first flow rate, while the rotary table rotates at a first rotation speed; and forming a second SiN film in the recess such that the second SiN film is laminated on the first SiN film by supplying the raw material gas to the first region and supplying the ammonia gas to the second region at a second flow rate, while the rotary table rotates at a second rotation speed. |
| US11508567B2 |
Methods and apparatus for ion fragmentation in a mass spectrometer
A mass spectrometer includes a controller operable to: transfer first ions of a first charge into an ion trap; apply an RF pseudopotential that radially confines the first ions in an elongate ion channel of the trap; generate a first potential well that confines the first ions within a first volume; after a specified pre-cooling time, transfer second ions of a second, opposite charge into the trap; apply one or more additional DC potentials that generate a second potential well that confines the second ions within a second volume, the first potential well being within the second potential well; cause, after cooling the second ions, the first ions and the second ions to interact and generate product ions; and generate at least one third potential well that confines the product ions, that is adjacent to the second potential well and that has a same polarity as the first potential well. |
| US11508563B1 |
Methods and apparatus for processing a substrate using improved shield configurations
Methods and apparatus for processing a substrate using improved shield configurations are provided herein. For example, a process kit for use in a physical vapor deposition chamber comprises a shield comprising an inner wall comprising an upper portion having a first wavy fin configuration and a bottom portion having a second wavy fin configuration different from the first wavy fin configuration such that a surface area of the shield is about 1400 in2 to about 1410 in2. |
| US11508553B2 |
Multi-charged particle beam writing apparatus, and multi-charged particle beam writing method
A multi-charged particle beam writing apparatus according to one aspect of the present invention includes a region setting unit configured to set, as an irradiation region for a beam array to be used, the region of the central portion of an irradiation region for all of multiple beams of charged particle beams implemented to be emittable by a multiple beam irradiation mechanism, and a writing mechanism, including the multiple beam irradiation mechanism, configured to write a pattern on a target object with the beam array in the region of the central portion having been set in the multiple beams implemented. |
| US11508543B2 |
Fuse box for battery of vehicle
A fuse box for a battery of a vehicle includes: a lower housing having a space in which a fuse is housed and a bus bar for electrically connecting the battery and the fuse is seated; a plate-shaped upper housing having a through hole formed at a central portion thereof and a first extending portion extending upward along a circumference of the through hole, where the upper housing is assembled on an upper side of the lower housing; and a fuse cover that is coupled to an upper side of the upper housing to cover the fuse exposed through the through hole of the upper housing. |
| US11508541B2 |
Fuse having an integrated measuring function, and fuse body
A fuse includes an integrated measuring function. In an embodiment, the fuse includes a fuse housing which in turn has a first receiving space delimited by a pressure body and a second receiving space which is spatially separated from the first receiving space and is delimited by a protective body, the first and second receiving spaces being arranged one behind the other in a direction of longitudinal extent. A fusible conductor is accommodated and mounted in the first receiving space and a measuring device is accommodated and mounted in the second receiving space. The measuring device has a current transformer and an electronic assembly which is electrically conductively connected to the current transformer. The current transformer and the electronic assembly are arranged one behind the other in the direction of longitudinal extent. |
| US11508540B2 |
Circuit breaker
A circuit breaker includes a first fixed contact and a first movable contact which can be switched between a closed status and a tripped status, a signaling device for signaling when the circuit breaker is in a tripped status, a trip actuator movable from an initial position to an end-stroke position when the first movable contact is switched from the closed status to the tripped status, a tripping bar which is connected to the first movable contact so as when the trip actuator moves from the initial position, the tripping bar moves and triggers switching of the first movable contact from the closed status into the tripped status, and a trip member having a single-piece shaped body, which includes a first portion actuated by the trip actuator, a second portion spaced apart from the first portion, and a third portion spaced apart from the first and second portions. |
| US11508539B2 |
Voltage readings using high voltage resistor across vacuum interrupter
A switch assembly including a switch and a high impedance element used for energy harvesting purposes that are connected to a power line and assembly electronics. The high impedance element has higher impedance than the switch so that current flows through the switch from the power line when the switch is closed and through the high impedance element from the power line when the switch is open. The switch assembly also includes a current sensing device, such as a current sensing resistor, electrically coupled in series with the high impedance element and the electronics. By measuring the current flow using the current sensing device, it is possible to infer the voltage across the high impedance element since its impedance is known. This voltage can be used to provide point on wave closing of the switch and to determine the line voltage magnitude. |
| US11508535B2 |
Spring unit and a diverter switch
A spring unit includes a mechanical spring means having a spring direction and being located between a first spring support and a second spring support, which first and second spring supports are movable in relation to each other in the spring direction. The spring unit further includes a first actuation member facing the rear side of the first spring support and a second actuation member facing the rear side of the second spring support, which first and second actuating members are movable relative to each other and relative to the first and second spring supports in the spring direction. |
| US11508534B2 |
Switch and changeover switch with compact structure
A switch includes a switch body, for containing switch components, at least two terminal contacts, protruding from the switch body, at least one movable contact, which is movable from an operative position, wherein the movable contact is electrically coupled between the at least two terminal contacts, and a disconnecting position, wherein the movable contact is electrically uncoupled between the at least two terminal contacts. The switch also includes a moving mechanism including an electric motor and a support sliding element for the movable contact, driven by the moving mechanism and the electric motor, to move the movable contact between the operative condition and the disconnecting position. |
| US11508530B2 |
Electrolytic capacitor
An electrolytic capacitor includes an anode body having a dielectric layer; a solid electrolyte layer in contact with the dielectric layer of the anode body; and an electrolytic solution. The electrolytic solution contains a solvent and a solute. The solvent contains a glycol compound. The solute contains an acid component and a base component. A mass of the acid component in the solute is greater than a mass of the base component in the solute. The acid component contains a first aromatic compound having a hydroxyl group. |
| US11508529B2 |
Anodes containing spherical powder and capacitors
Anodes made from powder, such as tantalum powder, that is highly spherical is described. Methods to make the anodes are further described. |
| US11508527B2 |
Capacitor, assembly comprising a capacitor and a busbar and method of manufacturing a capacitor
A capacitor, an assembly comprising a capacitor and a busbar and a method for manufacturing a capacitor are disclosed. In an embodiment a capacitor includes a winding element and a terminal having a first part of a first material and a second part of a second material, the second material being different than the first material, wherein the first part is electrically contacted to the winding element, and wherein the second part is an external contact of the capacitor. |
| US11508525B2 |
Capacitor having trenches on both surfaces
A capacitor according to an embodiment includes a substrate having a first surface and a second surface and provided with one or more first through holes each extending from the first surface to the second surface, a first conductive layer covering the first surface, the second surface, and side walls of the one or more first through holes, a second conductive layer facing the first surface, the second surface, and the side walls of the one or more first through holes, with the first conductive layer interposed therebetween, and a dielectric layer interposed between the first conductive layer and the second conductive layer. |
| US11508524B2 |
Multilayer ceramic capacitor
In a multilayer ceramic capacitor, an intersection of an interface is defined by a second dielectric ceramic layer, a first internal electrode layer or a second internal electrode layer, and a third dielectric ceramic layer, on a plane including a length direction and a width direction, the second dielectric ceramic layer and the third dielectric ceramic layer include a near intersection region at or near the intersection, and an average particle size of dielectric particles in the near intersection region is smaller than average particle sizes of dielectric particles in the first dielectric ceramic layer, the second dielectric ceramic layer, and the third dielectric ceramic layer. |
| US11508514B2 |
Multilayer inductor component and method for manufacturing multilayer inductor component
A multilayer inductor component includes an element body that is an insulator and a coil in which a plurality of coil conductor layers that extend along planes in the element body are electrically connected to each other. Also, each of the coil conductor layers includes metal part and glass part, and the glass part include internal glass portion that is entirely included in the metal part. |
| US11508508B2 |
Liquid cooled inductor
A vehicle, an inductor assembly for power electronics in a vehicle, and a method of providing and cooling an inductor assembly are provided. According to one example, the vehicle is provided with an inductor assembly in a vehicle electrical system with a variable voltage converter (VVC). The inductor assembly includes a core formed from a plurality of core segments spaced apart from one another to define gaps therebetween, with each of the plurality of core segments forming an internal fluid passage extending therethrough. The inductor assembly has a winding surrounding at least one of the plurality of core segments. A fluid system is connected to the core to provide pressurized fluid to the fluid passages of the plurality of core segments to circulate fluid through the core of the inductor assembly. |
| US11508505B2 |
Superconducting coil having spiral structure for current limiter
Provided is a superconducting coil having a spiral structure for a current limiter. The coil includes: a first superconducting tape, a second superconducting tape, and an insulating isolation layer, where the first superconducting tape and the second superconducting tape have spiral structures, an end of the first superconducting tape at a spiral center is connected to an end of the second superconducting tape at the spiral center, the instating isolation laser is filled between the first superconducting tape and the second superconducting tape, and a spacing between the first superconducting tape and the second superconducting tape gradually increases from the spiral center to an outer spiral periphery. |
| US11508501B2 |
Grain-oriented electrical steel sheet and method for manufacturing grain-oriented electrical steel sheet
Provided is an oriented electrical steel sheet including: a forsterite film formed on one side or both sides of an oriented electrical steel sheet substrate; and a ceramic layer formed on an entire or partial region of the forsterite film. Provided is a manufacturing method for an oriented electrical steel sheet including: preparing an oriented electrical steel sheet having a forsterite film formed on one surface or both surfaces thereof; and forming a ceramic layer by spraying ceramic powder on the forsterite film. |
| US11508498B2 |
Cables and methods thereof
A cable and methods of making cables are disclosed. In at least one embodiment, a method for making a cable includes introducing a conductive material onto a sheet including a heat-shrink material. The method includes compressing a first portion of the sheet onto a second portion of the sheet to form a sheath having an interior volume, where the conductive material is disposed in the interior volume. In at least one embodiment, a cable includes a sheath including a heat-shrink material. The cable includes an interior volume including a conductive material including a conductive carbon material. |
| US11508497B2 |
Communication cable and wire harness
A communication cable includes two-core communication wires, a drain wire, and a metal foil collectively covering the two-core communication wires and the drain wire. The two-core communication wires are twisted, and the metal foil is wound around the two-core communication wires with an adhesion strength of 1.21 MPa or more. Preferably, the two-core communication wires are twisted with a twist pitch of 20 mm or more and 60 mm or less. The communication cable further may include a restraint formed of a resin coating extruded around the metal foil or a resin film laterally wound around the metal foil. |
| US11508492B2 |
Radioisotope battery
Provided is a radioisotope battery. A radioisotope battery according to exemplary embodiments may include: a substrate; a shield layer disposed on the substrate and including a first material; a source layer embedded in the shield layer and including a second material which is a radioisotope of the first material; a PN junction layer on the shield layer and the source layer; and a window layer between the PN junction layer and the source layer. |
| US11508490B2 |
Managing volatiles in nuclear waste vitrification
Dangerous, toxic, and/or radioactive volatiles are produced from nuclear fission, nuclear decay, and/or as a byproduct from vitrification of radioactive wastes. Such volatiles are treated during and after vitrification of the radioactive waste, to be converted into fixed-chemicals, that are retained in, on, and/or proximate to a cold-cap located vertically above vitrified melt. The cold-cap may have one or more volatile fixing additives (VFAs) for retaining the fixed-chemicals. The VFAs are located in and/or the cold-cap. The vitrification may occur within at least one human-made cavern. The human-made cavern may be located within a deep geologic rock formation. The deep geologic rock formation may be located at least 2,000 feet below a terrestrial surface of the Earth. The human-made cavern may be formed by first drilling a wellbore from the terrestrial surface to the deep geologic rock formation and then underreaming the wellbore into the deep geologic rock formation. |
| US11508487B2 |
Full-digital rod position measurement devices and methods thereof
A full-digital control rod position measurement device and a method thereof. The full-digital rod position measurement device transforms the core process of rod position measurement that is normally processed by an analog circuit or analog-to-digital mixed circuit into a digital processing. The full-digital rod position measurement device comprises an excitation power supply, an integrated interface board, and a universal signal processor. The universal signal processor processes output signals of detectors according to a preset numerical processing algorithm and outputs Gray code rod position signals. The full-digital rod position measurement device and method disclosed by the present disclosure may effectively reduce the complexity of the primary excitation circuit and the secondary measurement signal processing circuit of the detectors, and improve the operation reliability and measurement accuracy of the rod position processing equipment. |
| US11508485B2 |
Automated risk of disease calculation system for mobile devices
A computer-implemented method including receiving, at a processing device of a disease risk calculation server, a request from a user mobile device for a disease risk calculation and including an answer, determining at the processing device, diseases the user is likely to contract, providing, from the processing device, the determined diseases, receiving, at the processing device, a user selection of a disease that user is likely to contract, providing, from the processing device, a question related to a proven risk factor of the user selected disease, receiving, at the processing device, a user answer, calculating, at the processing device, a risk that the user will contract the selected disease, providing, from the processing device, the calculated risk to the mobile device, and receiving and processing electronic payment from the user device after receipt by the user mobile device of the calculated risk, the electronic payment being governed by blockchain technology. |
| US11508484B1 |
Prediction of respiratory therapy compliance
Systems and methods have been developed to increase user compliance and adherence to respiratory therapy devices. For instance, in some examples the disclosed technology may monitor usage data output from a respiratory therapy device to determine, based on the trends of usage, when a user is likely to terminate or reduce usage within a specified time window. Flagging a user may also trigger further actions to automatically intervene before the user terminates engagement with the service. |
| US11508480B2 |
Online partially rewarded learning
A feature vector characterizing a system to be analyzed via online partially rewarded machine learning is obtained. Based on the feature vector, a decision is made, via the machine learning, using an online policy. The system is observed for environmental feedback. In at least a first instance, wherein the observing indicates that the environmental feedback is available, the environmental feedback is obtained. In at least a second instance, wherein the observing indicates that the environmental feedback is missing, the environmental feedback is imputed via an online imputation method. the online policy is updated based on results of the obtained environmental feedback and the online imputation method. A decision is output based on the updated online policy. |
| US11508471B1 |
Methods and systems for managing prescriptions
Methods and systems for classifying and editing insurance claims records are described. In one embodiment, a method, which can be performed by a processor, includes determining that a first prescription drug prescribed to a first patient should be filled by a pharmacy, determining a first guidepost date and a second guidepost date related to the first prescription, determining a third guidepost date associated with a second prescription, comparing the third guidepost date to the first and second guidepost dates to determine whether the third guidepost date occurs after the first guidepost date and before the second guidepost date, and filling and dispensing the first prescription drug as a full prescription supply and the second prescription drug as a full prescription supply on the same dispense date when the third guidepost date occurs after the first guidepost date and before the second guidepost date. |
| US11508468B2 |
Apparatus for preventing unauthorized access to computer files and for securing medical records
Apparatus for identifying the persons participating in an encounter, where identifying information for each of a plurality of registered human individuals is stored in a database, calls for capturing local images of an individual and determining whether this individual is the same as one of the registered individuals whose identifying information is stored in the database. The identifying information stored in the database includes at least one image of a unique, visually observable biologic identifier on a body portion of each registered individual. The accuracy of user identification is enhanced by allowing the sender of information to supply visual content which modulates the appearance of a biologic identifier of the user. Utilization of the system for the document of critical encounters such as medical events is provided. |
| US11508463B2 |
Method of identifying properties of molecules under open boundary conditions
A method of determining at least one property of a liquid system using a modeling system, the liquid system including at least one molecule in a solvent, the modeling system including a processor, comprises generating a quantum model of the liquid system using the processor of the modeling system, the quantum model including a device region and a lead region, the device region being spherical, paraboloid, cubic or arbitrary in shape and encompassing the at least one molecule and a portion of the solvent of the liquid system, the lead region encompassing a region of the solvent surrounding the device region, determining a first property of the device region by solving a first quantum equation for the device region using the processor of the system, determining the first property of the lead region by solving the first quantum equation under open boundary conditions for the lead region using the processor of the system, and combining the first property of the device region with the first property of the lead region to arrive at a total first property for the liquid system using the processor of the system. |
| US11508459B2 |
Modified FBA in a production network
A method for matching production of FBA metabolism to supply and demand within a larger production network is described herein. An objective function of FBA metabolism is modified to include an upstream supply generated in upstream sub-units, as well as a downstream demand generated within downstream sub-units in the production network. FBA metabolism and the upstream and downstream sub-units are iteratively solved with updated initial conditions, producing a time series solution to the production network. |
| US11508458B2 |
Access schemes for access line faults in a memory device
Methods, systems, and devices related to access schemes for access line faults in a memory device are described. In one example, a method may include isolating a first word line of a section of a memory device from a voltage source (e.g., a deselection voltage source) during a first portion of a period when the first word line is deselected, and coupling the first word line with the voltage source during a second portion of the period when the first word line is deselected based on determining that an access operation is performed during the second portion of the period when the word line is deselected. In some examples, the method may include identifying that the first word line is associated with a fault, such as a short circuit fault with a digit line of the memory device. |
| US11508452B2 |
Circuit and associated chip
The present application provides a circuit and an associated chip. The circuit is coupled to a memory. The circuit includes: a first scan flip-flop (FF), being a previous-stage scan FF of an input terminal of the memory and having an output terminal coupled to an input terminal of the memory; and a second scan FF, being a next-stage scan FF of an output terminal of the memory and having an input terminal coupled to an output terminal of the memory; wherein a scan mode of the circuit has a load phase and a capture phase, during the capture phase, data output from the output terminal of the first scan FF loops back to a data input terminal of the first scan FF via a first loop, and the first loop is free from passing through the second scan FF. |
| US11508448B2 |
Memory system including memory device and operating method thereof
A memory system including a memory device suitable for performing, in stages, a program loop including a program operation and a program verification operation on each page within a memory block selected among a plurality of memory blocks, updating a maximum number of program loops for the selected memory block by comparing a number of program loops on each page, which are performed until the program verification operation is processed as a pass on the page, with a current maximum number of program loops for the selected memory block, and storing the updated maximum number of program loops for the selected memory block as program pass information of the selected memory block; and a controller suitable for managing the selected memory block as a bad block based on the program pass information of the selected memory block. |
| US11508447B2 |
Memories for determining data states of memory cells
Memories might include a plurality of strings of memory cells, a plurality of access lines each connected to the strings of memory cells, and a controller configured to cause the memory to determine a particular voltage level applied to each of the access lines that is deemed to activate each memory cell of a first subset of the strings of series-connected memory cells programmed to store respective data states that are each lower than or equal to a first data state of a plurality of data states, apply the particular voltage level to a particular access line of the plurality of access lines, and for each memory cell connected to the particular access line that is contained in a second subset of the strings of series-connected memory cells, determine whether that memory cell is deemed to be activated while applying the particular voltage level to the particular access line. |
| US11508446B2 |
Method for accessing flash memory module and associated flash memory controller and electronic device
The present invention provides a method for access a flash memory module, wherein the method includes the steps of: sending a read command to the flash memory module to read a plurality of memory cells of at least one word line of the flash memory module by using a plurality of read voltages, wherein each memory cell is configured to store a plurality of bits, each memory cell has a plurality of states, the states are used to indicate different combinations of the plurality of bits; obtaining readout information from the flash memory module; analyzing the readout information to determine numbers of the states of the memory cells; determining if the memory cells are balance or unbalance according the numbers of the states of the memory cells to generate a determination result; and referring to the determination result to adjust voltage levels of the plurality of read voltages. |
| US11508445B2 |
Capacitive-coupled non-volatile thin-film transistor strings in three dimensional arrays
Multi-gate NOR flash thin-film transistor (TFT) string arrays are organized as three dimensional stacks of active strips. Each active strip includes a shared source sublayer and a shared drain sublayer that is connected to substrate circuits. Data storage in the active strip is provided by charge-storage elements between the active strip and a multiplicity of control gates provided by adjacent local word-lines. The parasitic capacitance of each active strip is used to eliminate hard-wire ground connection to the shared source making it a semi-floating, or virtual source. Pre-charge voltages temporarily supplied from the substrate through a single port per active strip provide the appropriate voltages on the source and drain required during read, program, program-inhibit and erase operations. TFTs on multiple active strips can be pre-charged separately and then read, programmed or erased together in a massively parallel operation. |
| US11508442B2 |
Non-volatile memory system using strap cells in source line pull down circuits
The present invention relates to a flash memory device that uses strap cells in a memory array of non-volatile memory cells as source line pull down circuits. In one embodiment, the strap cells are erase gate strap cells. In another embodiment, the strap cells are source line strap cells. In another embodiment, the strap cells are control gate strap cells. In another embodiment, the strap cells are word line strap cells. |
| US11508441B2 |
Memory device and program operation thereof
In certain aspects, a memory device includes a first memory string including a first drain, a first drain select gate (DSG) transistor, first memory cells, and a first drain dummy transistor between the first drain and the first DSG transistor. The memory device also includes a first bit line coupled to the first drain, a first drain dummy line coupled to the first drain dummy transistor, a first DSG line coupled to the first DSG transistor, word lines respectively coupled to the first memory cells, and a peripheral circuit configured to perform a program operation on a target memory cell of the first memory cells coupled to a selected word line of the word lines. To perform the program operation, the peripheral circuit includes a bit line driver coupled to the first bit line and configured to apply a first bit line voltage to select the first bit line, and a word line driver coupled to the first drain dummy line and the first DSG line and configured to apply a DSG voltage to the first DSG line to turn on the first DSG transistor, and apply a drain dummy line voltage to the first drain dummy line to turn on the first drain dummy transistor. The drain dummy line voltage is greater than the DSG voltage. |
| US11508439B2 |
Memory device having a control logic to control program operations and method of operating the same
Provided herein may be a memory device and a method of operating the same. The memory device may include a memory cell array including a plurality of memory cells, a peripheral circuit configured to program the plurality of memory cells to a plurality of program states, and a control logic configured to control the peripheral circuit so that program operations corresponding to the plurality of program states are performed, wherein the control logic controls the peripheral circuit so that, during a program operation for a target program state, among the plurality of program states, memory cells to be programmed to an immediately higher program state than the target program state are programmed to the target program state. |
| US11508436B2 |
Memory device
A memory device includes: a cell array that includes a first region including first memory cells and a second region including second memory cells; first word lines connected to each of the first memory cells; second word lines connected to each of the second memory cells; a first bit line commonly connected to the first memory cells and the second memory cells; a row decoder that selects one of the first word lines and one of the second word lines in parallel during a data read operation; and a sense amplifier between the first region and the second region and electrically connected to the first bit line during the data read operation. |
| US11508430B2 |
Data circuit for a low swing data bus
Methods, systems, and devices for a data circuit for a low swing data bus are described. An apparatus may include a data bus that may transfer data at a first voltage different than a second voltage that is associated with one or more components of the memory array. A transistor, coupled with the data bus, may receive the second voltage and send a third voltage. A first in first out (FIFO), coupled with the transistor, may receive the third voltage from the transistor. The FIFO circuit may include one or more precharge components that drive an input voltage of the FIFO circuit to the second voltage associated with the one or more components of the memory array based on receiving the third voltage. |
| US11508429B2 |
Memory system performing hammer refresh operation and method of controlling refresh of memory device
A memory system includes a memory controller and a memory device. The memory controller generates refresh commands periodically by an average refresh interval. The memory device performs a normal refresh operation and a hammer refresh operation during a refresh cycle time. The memory device includes a memory cell array including memory cells connected to a plurality of wordlines, a temperature sensor configured to provide temperature information by measuring an operation temperature of the memory cell array and a refresh controller configured to control the normal refresh operation and the hammer refresh operation. The refresh controller varies a hammer ratio of a unit hammer execution number of the hammer refresh operation executed during the refresh cycle time with respect to a unit normal execution number of the normal refresh operation executed during the refresh cycle time. |
| US11508427B2 |
Memory circuit and write method
A memory circuit includes a memory array including a plurality of memory cells, each memory cell including a gate structure including a ferroelectric layer and a channel layer adjacent to the gate structure, the channel layer including a metal oxide material. A driver circuit is configured to output a gate voltage to the gate structure of a memory cell, the gate voltage having a positive polarity and a first magnitude in in a first write operation and a negative polarity and a second magnitude in in a second write operation, and to control the second magnitude to be greater than the first magnitude. |
| US11508425B2 |
Memory cell array of programmable non-volatile memory
A memory cell of a memory cell array includes a well region, a first doped region, a second doped region, a first gate structure, and a storage structure. The first doped region and the second doped region are formed in the well region. The first gate structure is formed over a first surface between the first doped region and the second doped region. The storage structure is formed over a second surface and the second surface is between the first surface and the second doped region. The storage structure is covered on a portion of the first gate structure, the second surface and an isolation structure. |
| US11508424B2 |
Variable resistance memory device
A first memory cell is coupled to first and third interconnects. A second memory cell is coupled to second and fourth interconnects. A first sense amplifier has a first terminal coupled to the first interconnect and a node of a first potential and a second terminal located close to a node of a second potential and coupled to the third interconnect and has a potential difference between the first and second terminals. A second sense amplifier has a third terminal coupled to the fourth interconnect and a node of a third potential and a fourth terminal located close to a node of a fourth potential and coupled to the second interconnect and has a potential difference between the third and fourth terminals. |
| US11508412B2 |
Video editing apparatus, method and program for the same
A video image editing device or the like, capable of editing a wraparound video image generated by using a plurality of video images captured by multi-viewpoint cameras to be comfortably viewable by viewers, is provided. Based on information about the positions and the sizes of X subjects, a polynomial expression regarding the position of the subject and a polynomial expression regarding the size of the subject are generated. Correction or interpolation of the positions of the H subjects is performed by a polynomial approximation curve using the polynomial expression regarding the position of the subject, correction or interpolation of the sizes of the N subjects is performed by a polynomial approximation curve using the polynomial expression regarding the size of the subject, and the sizes of the N subjects are expanded or contracted with an expansion/contraction parameter p. An intermediate image is generated from two images of the same size corresponding to the photographing devices adjacent to each other, and a wraparound video image is generated, with a parameter indicating the length of the wraparound video image being represented by Tp. |
| US11508409B2 |
Magnetic disk device and write processing method
According to one embodiment, a magnetic disk device includes a disk including a normal recording region written in a normal recording and a shingled recording region written in a shingled recording, a head including a write head and a plurality of read heads, the head moving on the disk by rotation about a rotation axis, and a controller which selects and executes the normal recording and the shingled recording, wherein a first minimum value of a cross track interval in the radial direction of the disk between two read heads in the plurality of read heads in the normal recording region is smaller than a first maximum value of the cross track interval in the shingled recording region. |
| US11508408B2 |
Magnetic tape having characterized magnetic layer, magnetic tape cartridge, and magnetic tape apparatus
The magnetic tape in which a difference (S0.1−S1.6) between a spacing S0.1 and a spacing S1.6 obtained after n-hexane cleaning on a surface of the magnetic layer is equal to or less than 32 nm. The S0.1 is a value obtained as a spacing under a pressing force of 0.1 atm from a relational expression between a pressure and a spacing obtained by performing a spacing measurement on the surface of the magnetic layer by an optical interference method under a pressing force of each of a plurality of different pressures after the n-hexane cleaning, and S1.6 is a spacing measured on the surface of the magnetic layer by the optical interference method under the pressing force of 1.6 atm after the n-hexane cleaning. |
| US11508407B2 |
Magnetic recording medium having controlled dimensional characteristics
A magnetic recording medium is a magnetic recording medium having a tape-like shape and includes a base substrate and a magnetic layer provided on the base substrate. A plurality of data tracks can be formed in the magnetic layer, a width of a data track is 2900 nm or less, and in a case of defining, as wmax and wmin, a maximum value and a minimum value respectively out of average values of a width of the magnetic recording medium measured under four kinds of environment in which temperature and relative humidity are set to (10° C., 10%), (10° C., 80%), (29° C., 80%), and (45° C., 10%), wmax and wmin satisfy a relation of (wmax−wmin)/wmin≤400 [ppm]. |
| US11508404B1 |
Magnetic disk device and method of compensating for harmonic corresponding to harmonic disturbance
According to one embodiment, a magnetic disk device includes a disk, a head that writes data to the disk and reads data from the disk, an actuator that is rotationally driven and controls movement of the head mounted on the disk, and a controller that estimates a fundamental frequency of a position error signal generated in positioning control of the head, the fundamental frequency corresponding to a disturbance having harmonics, determines the fundamental frequency, determines the number of delay samples based on the fundamental frequency, and suppresses a multiplied frequency that is a harmonic of the fundamental frequency according to the number of the delay samples. |
| US11508403B1 |
Reducing the effect of actuator cross-coupling in split actuator drives
Motion of a first actuator in a multi-actuator drive is prevented from affecting a second actuator in the drive or from being affected by the second actuator. A coupling coordinator generates a hold command for the second actuator based on an operation to be carried out using the first actuator, where the hold command is generated before commands to carry out the operation are issued. The hold command may cause an aggressor actuator in the drive to halt a disturbance-generating operation being performed by the aggressor actuator or delay initiation of such an operation that is to be performed by the aggressor actuator. The hold command may cause a victim actuator in the drive to pause the execution of a sensitive operation being performed by the victim actuator or delay initiation of such an operation that is to be performed by the victim actuator. |
| US11508396B2 |
Acquiring speech features for predicting emotional severity of adverse events on individuals
Systems and methods of related to a voice-based system used to determine the severity of emotional distress within an audio recording of an individual is provided. In one non-limiting example, a system comprises a computing device that is configured to receive an audio sample that includes an utterance of a user. Feature extraction is performed on the audio sample to extract a plurality of acoustic emotion features using a base model. Emotion level predictions are generated for an emotion type based at least in part on the acoustic emotion features provided to an emotion specific model. An emotion classification for the audio sample is determined based on the emotion level predictions. The emotion classification comprises the emotion type and a level associated with the emotion type. |
| US11508394B2 |
Device and method for wirelessly communicating on basis of neural network model
Disclosed are a device and method for wirelessly communicating. The device according to one example embodiment of the present disclosure may comprise a transceiver and a controller connected to the transceiver, wherein the controller is configured to identify at least one additional sample on the basis of a digital signal by using a neural network model and upscale the digital signal by adding the at least one identified additional sample to a plurality of samples of the digital signal. |
| US11508393B2 |
Controller for real-time visual display of music
A controller for real-time visual display of music includes a music analysis module and a display control module. The music analysis module receives an audio input, determines human perceived musical structures, human felt affect and emotion as a function of the audio input, and outputs a signal corresponding to the determined structure, affect and emotion. The display control module is operatively coupled to the music analysis module and receives the signal and controls a visual display as a function thereof to express the determined musical structure, affect and emotion in a visual manner. |
| US11508389B2 |
Audio signal processing apparatus, audio signal processing system, and audio signal processing method
To provide an audio signal processing apparatus, an audio signal processing system, and an audio signal processing method that include: a first converting part that converts an input data sequence of an audio signal into frequency data using an IIR system DFT at each processing timing, a window processing part that performs window processing on the frequency data using a window function, a signal processing part that performs predetermined signal processing on the frequency data on which window processing has been performed, and a second converting part that converts the frequency data, on which the signal processing has been performed, into a time-axis data sequence. |
| US11508385B2 |
Method of processing residual signal for audio coding, and audio processing apparatus
Disclosed is a method of processing a residual signal for audio coding and an audio coding apparatus. The method learns a feature map of a reference signal through a residual signal learning engine including a convolutional layer and a neural network and performs learning based on a result obtained by mapping a node of an output layer of the neural network and a quantization level of index of the residual signal. |
| US11508378B2 |
Electronic device and method for controlling the same
An electronic device is provided. The electronic device includes a microphone to receive audio, a communicator, a memory configured to store computer-executable instructions, and a processor configured to execute the computer-executable instructions. The processor is configured to determine whether the received audio includes a predetermined trigger word; based on determining that the predetermined trigger word is included in the received audio; activate a speech recognition function of the electronic device; detect a movement of a user while the speech recognition function is activated; and based on detecting the movement of the user, transmit a control signal, to a second electronic device to activate a speech recognition function of the second electronic device. |
| US11508371B2 |
Digital assistant processing of stacked data structures
Processing stacked data structures is provided. A system receives an input audio signal detected by a sensor of a local computing device, identifies an acoustic signature, and identifies an account corresponding to the signature. The system establishes a session and a profile stack data structure including a first profile layer having policies configured by a third-party device. The system pushes, to the profile stack data structure, a second profile layer retrieved from the account. The system parses the input audio signal to identify a request and a trigger keyword. The system generates, based on the trigger keyword and the second profile layer, a first action data structure compatible with the first profile layer. The system provides the first action data structure for execution. The system disassembles the profile stack data structure to remove the first profile layer or the second profile layer from the profile stack data structure. |
| US11508370B2 |
On-board agent system, on-board agent system control method, and storage medium
An on-board agent system includes: a plurality of agent functional units, each of the plurality of agent functional units being configured to provide a service including outputting a response using voice to an output unit according to an utterance of an occupant of a vehicle; and a common operator configured to be shared by the plurality of agent functional units and provided in the vehicle, wherein, when an operation is executed on the common operator with an operation pattern set to correspond to each of the plurality of agent functional units, an agent functional unit corresponding to the operation pattern of the executed operation is activated. |
| US11508367B2 |
Dialogue system and dialogue processing method
A dialogue system includes: a storage configured to store a parameter tree including at least one parameter used for performing an action; a speech input device configured to receive speech from a user; an input processor configured to apply a natural language understanding algorithm to the received speech to generate a speech recognition result; a dialogue manager configured to determine an action corresponding to the received speech based on the speech recognition result, to retrieve a parameter tree corresponding to the action from the storage, and to determine additional information needed to perform the action based on the retrieved parameter tree; and a result processor configured to generate a dialogue response for requesting the additional information. |
| US11508361B2 |
Sentiment aware voice user interface
Described herein is a system for responding to a frustrated user with a response determined based on spoken language understanding (SLU) processing of a user input. The system detects user frustration and responds to a repeated user input by confirming an action to be performed or presenting an alternative action, instead of performing the action responsive to the user input. The system also detects poor audio quality of the captured user input, and responds by requesting the user to repeat the user input. The system processes sentiment data and signal quality data to respond to user inputs. |
| US11508360B2 |
Synthetic data generation for training of natural language understanding models
This document relates to machine learning. One example includes a method or technique that can be performed on a computing device. The method or technique can include obtaining a task-adapted generative model that has been tuned using one or more task-specific seed examples. The method or technique can also include inputting dialog acts into the task-adapted generative model and obtaining synthetic utterances that are output by the task-adapted generative model. The method or technique can also include populating a synthetic training corpus with synthetic training examples that include the synthetic utterances. The synthetic training corpus may be suitable for training a natural language understanding model. |
| US11508358B2 |
Artificial intelligence apparatus and method for recognizing speech in consideration of utterance style
Disclosed herein an artificial intelligence apparatus for recognizing speech in consideration of an utterance style including a microphone, and a processor configured to obtain, via the microphone, speech data including speech of a user, extract an utterance feature vector from the obtained speech data, determine an utterance style corresponding to the speech based on the extracted utterance feature vector, and generate a speech recognition result using a speech recognition model corresponding to the determined utterance style. |
| US11508354B2 |
Method and apparatus for correcting failures in automated speech recognition systems
Systems and methods are disclosed and described for correcting errors in ASR transcriptions. For an incorrect transcription, different words or phrases from the transcription, and/or related words or phrases, are submitted as hint words to the ASR system, and the voice query is submitted again, to determine new transcriptions. This process is repeated with different transcription terms, until a different and more proper transcription is generated. This increases the accuracy of ASR systems. |
| US11508353B2 |
Real time popularity based audible content acquisition
A personalized news service provides personalized news programs for its users by generating personalized combinations of audible versions of news stories derived from text-based based versions of the news stories. The audible versions may be generated from the text-based version by a text-to-speech system, or may by recording a person reading aloud the text-based version. To acquire recordings, the personalized news service can make a determination that a particular news story has a threshold extent of popularity. The news service can then transmit a request to a remote recording station for a recording of a verbal reading of the particular news story. The news service can then receive the requested recording from the remote recording station. |
| US11508348B2 |
Directional noise suppression
Systems and methods of providing improved directional noise suppression in an electronic device implement a technique that specifies a direction or speaker of interest, determines the directions corresponding to speakers not lying in the direction of interest, beam forms the reception pattern of the device microphone array to focus in the direction of interest and suppresses signals from the other directions, creating beam formed reception data. A spatial mask is generated as a function of direction relative to the direction of interest. The spatial mask emphasizes audio reception in the direction of interest and attenuates audio reception in the other directions. The beam formed reception data is then multiplied by the spatial mask to generate an audio signal with directional noise suppression. |
| US11508342B2 |
Shoulder rest with haptic feedback
Disclosed herein are various embodiments of haptic systems for digital musical instruments. In embodiments, the haptic systems comprise a shoulder rest that has been modified with haptic elements capable of generating a feedback signal to a user of a digital musical instrument. |
| US11508339B2 |
Electronic device for changing displayed image associated with camera positioned below display and operating method thereof
An electronic device is provided. The electronic device includes a display, a camera module configured to be positioned below the display, a memory configured to store instructions, and a processor configured to be functionally connected to the display, the camera module, and the memory, wherein the processor is configured, by executing the instructions, to cause the electronic device to identify a change in an operating state of the camera module while displaying a predetermined image in an area of the display surrounding the camera module, change a size of the area surrounding the camera module in response to identifying the change in the operating state of the camera module, and display the predetermined image in the changed area. |
| US11508337B2 |
Image processing apparatus, image processing method, and non-transitory computer readable medium
An image processing apparatus according to the present invention, includes: an input unit configured to receive a predetermined user operation for an image displayed on a display; a change unit configured to perform control of increasing a display range of the display in a case where the predetermined user operation is received by the input unit; a processing unit configured to perform gradation conversion on the image to improve gradation of a high brightness portion, based on the display range increased by the change unit; and a control unit configured to perform control of enabling the increase in the display range in accordance with the predetermined user operation in a case where the image satisfies a predetermined condition and disabling the increase in the display range in accordance with the predetermined user operation in a case where the image does not satisfy the predetermined condition. |
| US11508332B2 |
Optical sensor and electronic device
An optical sensor, an electronic device and a manufacturing method for the same are provided. The electronic device includes a light-permeable display screen and an optical sensor. The light-permeable display screen has a first surface and a second surface facing away from the first surface. The optical sensor is arranged opposite to the second surface of the light-permeable display screen. The optical sensor includes a base plate, an emitter and a receiver. The emitter is coupled to the base plate and faces the second surface of the light-permeable display screen. The receiver surrounds the emitter and is configured to communicate with the emitter. |
| US11508328B2 |
Circular display device with narrow bezel and driving method thereof
Provided is a display device having the following structure and driving method thereof. The display device comprises a circular display panel including an active area on which an image is displayed and a non-active area on which no image is displayed, a gate driving circuit disposed in the non-active area to drive a plurality of gate lines, a first data driving circuit disposed in the non-active area to drive first-group data lines in the circular display panel, and a second data driving circuit disposed in the non-active area, in a position opposite to the first data driving circuit with respect to the active area, to drive second-group data lines in the circular display panel. The frequency of a data clock is reduced using a plurality of data driving circuits in a pad area. The bezel size of a circular display panel is reduced. |
| US11508321B2 |
Electro-optical device having a storage capacitor formed by a data line and a potential line
An electro-optical device is provided with a plurality of data lines, a plurality of potential lines supplied with a predetermined potential, a driving transistor controlling a current level according to the voltage between the gate and the source, a first storage capacitor which holds the voltage between the gate and a source of the driving transistor, and a light-emitting element. One data line among the plurality of data lines and one potential line among the plurality of potential lines are arranged to be adjacent to each other, and a second storage capacitor holding the potential of the one data line is formed by the one data line and the one potential line. |