| Document | Document Title |
|---|---|
| US11411747B2 |
Nonvolatile memory device with regions having separately programmable secure access features and related methods and systems
A device can include a plurality of regions, each region including a plurality of nonvolatile memory cells; a permission store configured to store a set of permission values, including at least one permission value for each region in a nonvolatile fashion; and access control circuits configured to control access to each region according to the permission value for the region, including one or more of requiring authentication to access the region, encrypting data read from the region, and decrypting data for storage in the region. Related methods and systems are also disclosed. |
| US11411739B2 |
Smart device to impose trust at the edge of a blockchain
A processor-implemented method imposes trust at the edge of a blockchain. A hardware interrogator in a terminal interrogates an Internet of Things Smart Device (IoTSD). The IoTSD is an off-line device that is associated with a physical product. The IoTSD includes a cryptographic processor and one or more state sensors that monitor a state of the physical product. The hardware interrogator detects an event that is described by an encrypted entry in the IoTSD. The terminal transmits, to a blockchain, a transaction that describes the event that is detected by the hardware interrogator, such that the blockchain adds the transaction to a blockchain that is dedicated to the physical product, and the blockchain establishes a state of the physical product. |
| US11411738B2 |
Leveraging multiple devices to enhance security of biometric authentication
Systems, methods, and apparatuses of using biometric information to authenticate a first device of a user to a second device are described herein. A method includes storing, by the first device, a first key share of a private key and a first template share of a biometric template of the user. The second device stores a public key, and one or more other devices of the user store other key shares and other template shares. The first device receives a challenge message from the second device, measures biometric features of the user to obtain a measurement vector, and sends the measurement vector and the challenge message to the other devices. The first device receives partial computations, generated using a respective template share, key share, and the challenge message, from the other devices, uses them to generate a signature of the challenge message and send the signature to the second device. |
| US11411734B2 |
Maintaining data confidentiality in communications involving voice-enabled devices in a distributed computing environment
The disclosed exemplary embodiments include computer-implemented systems, devices, apparatuses, and processes that maintain data confidentiality in communications involving voice-enabled devices operating within a distributed computing environment. By way of example, an apparatus may receive, from a communications system across a public communications network, a request for an element of data generated by the computing system based on first audio content obtained at a device. The apparatus may obtain the requested data element and further, may generate acoustic data representative of at least a portion of the requested data element. The apparatus may also generate an encrypted response to the received request that includes the acoustic data, and transmit the encrypted response to the device across the public communications network. The device may execute an application program that causes the device to decrypt the encrypted response and to perform operations that present the acoustic data through an acoustic interface. |
| US11411733B1 |
Systems and methods for identity and access control
Identity and access control systems and methods employ a registry that receives a request for confidential data from a client, together with a secure enrollment profile identifier for the client, and generates and sends a challenge token to the client, which encrypts and returns the encrypted challenge token to the registry. Thereafter, the registry confirms that the encrypted challenge token is validly encrypted and calls up a security backend with authorization to provide the requested confidential data to client, and the security backend sends the requested confidential data to the client. |
| US11411732B2 |
Prime number generation for encryption
A device may select a first pseudorandom integer within a range of integers. The device may generate a first candidate prime, based on the first pseudorandom integer, for primality testing. Based on determining that the first candidate prime fails a primality test, the device may select a second pseudorandom integer within the range of integers. The device may generate a second candidate prime, based on the second pseudorandom integer, for primality testing. The device may determine whether the second candidate prime satisfies the primality test. The device may selectively: re-perform, based on the second candidate prime failing the primality test, the selecting the second pseudorandom integer, the generating the second candidate prime, and the determining whether the second candidate prime satisfies the primality test, or using, based on the second candidate prime satisfying the primality test, the second candidate prime as a prime integer in a cryptographic protocol. |
| US11411730B2 |
Cryptoasset custodial system with different rules governing access to logically separated cryptoassets and proof-of-stake blockchain support
Methods, and systems for secure storage and retrieval of information, such as private keys, useable to control access to a blockchain, include: receiving a request to take an action with respect to a vault of multiple different vaults in a cryptoasset custodial system, and each of the multiple different vaults has an associated policy map that defines vault control rules; authenticating, by a hardware security module, a policy map for the vault on which the action is requested based on a cryptographic key controlled by the hardware security module; checking the action against the policy map for the vault when the policy map for the vault is authenticated based on the cryptographic key controlled by the hardware security module; and effecting the action when the action is confirmed to be in accordance with the policy map for the vault. |
| US11411729B2 |
Receiving circuit and signal processing method for high definition multimedia interface
A receiving circuit includes a first channel, a second channel, a third channel and a control circuit, wherein the first channel is arranged to decode and descramble a first data stream to generate first data corresponding to first color information of an image frame, the second channel is arranged to decode and descramble a second data stream to generate second data corresponding to second color information of the image frame, and the third channel is arranged to decode and descramble a third data stream to generate third data corresponding to third color information of the image frame. The control circuit is configured to enable the first channel to make the first channel decode the first data stream, and enable or disable at least part of functions of the second channel and the third channel according to whether or not the image frame is displayed on a display panel. |
| US11411728B2 |
Proof-of-work key wrapping with individual key fragments
The technology disclosed herein provides a proof-of-work key wrapping system that uses key fragments to cryptographically control access to data. An example method may include: encrypting a first cryptographic key to produce a wrapped key, wherein the first cryptographic key enables a computing device to access content; splitting a second cryptographic key into a plurality of key fragments, wherein the second cryptographic key is for decrypting the wrapped key; selecting a set of cryptographic attributes for deriving at least one of the plurality of key fragments, wherein the set of cryptographic attributes are selected in view of a characteristic of the computing device; and providing the wrapped key and the set of cryptographic attributes to the computing device, the set of cryptographic attributes facilitating determination of the second cryptographic key. |
| US11411723B2 |
Apparatus and method for quantum enhanced physical layer security
Free-Space key distribution method comprising exchanging information between an emitter (100) and a receiver (200) based on the physical layer wiretap channel model, comprising the steps of randomly preparing (710), at the emitter (100), one qubit encoded with one of two possible non-identical quantum states, sending (720) the encoded qubit to the receiver (200) through a physical layer quantum-enhanced wiretap channel (500), such that an eavesdropper (300) tapping said channel is provided with partial information about the said states only, detecting and measuring (730) the received quantum states, key sifting (740) between the emitter and the receiver through a classical channel, calculating (750, 760) an amount of information available to any eavesdropper (300) based on the detected and received quantum states. |
| US11411722B2 |
Method of operation of a quantum key controller
A quantum communication system has a plurality of trusted nodes. Each trusted node has a quantum key controller, and a quantum transmitter or a quantum receiver. The trusted nodes are configurable as first and second endpoint trusted nodes and middle-trusted nodes between endpoint trusted nodes. The first endpoint trusted node encrypt data comprising a first key, using a first quantum key. Each middle-trusted node decrypts, using a preceding quantum key, and re-encrypts using a succeeding quantum key. The second endpoint trusted node decrypts using a quantum key, so that the first and second endpoint trusted nodes each have the first key. |
| US11411719B2 |
Security system and method thereof using both KMS and HSM
The present disclosure in some embodiments provides a security system using both key management service (KMS) and a hardware security module (HSM), and a method of operating the security system. At least one embodiment provides a security system including an HSM, a bootstrapping enclave, and one or more KMS enclaves. The HSM is configured to generate, replace or remove a root key, the HSM being physically independent. The bootstrapping enclave is configured to receive the root key from the HSM. The one or more KMSs are configured to perform an attestation procedure with the bootstrapping enclave, to receive the root key from the bootstrapping enclave, and to utilize the root key for establishing a secure channel with the HSM. |
| US11411716B2 |
Alignment of blockchains to a generic blockchain
A system, method, and computer-readable storage medium is provided for creating a blockchain instance and aligning the instance blockchain to a generic blockchain for tracking a multi-step process. Aspects of the invention comprise performing by a blockchain system: accessing data for the creation of a block in a blockchain instance; comparing said data with data associated with a block in a generic blockchain; and for each block in the generic blockchain where the data in the block corresponds to the accessed data, creating a block in the blockchain instance for the accessed data; and performing an alignment operation to indicate that the created block is equivalent to the block in the generic blockchain. |
| US11411712B2 |
Criterion method of GCCS for three-node VCSEL networks with delay coupling
A criterion method of GCCS (Globally Complete Chaos Synchronization) for three-node VCSEL (Vertical Cavity Surface Emitting Laser) networks with delay coupling is provided, including steps of: providing a delay-coupled VCSEL network consisting of three identical units and dynamic equations of the VCSEL network; providing assumptions of an outer-coupling matrix and a unitary matrix under the dynamic equations of the VCSEL network; in the three-node VCSEL network, determining rate equations of i-VCSEL, determining dynamic equations of a synchronization manifold, and determining a master-stability equation; calculating three maximum Lyapunov exponents; determining a stability of a synchronization state of the three-node VCSEL network, and determining whether the synchronization manifold of the VCSEL network is a chaotic waveform. Through a master-stability function, the method for determining whether the GCCS is achieved among all node lasers is provided, which solves a difficult problem of GCCS criterion for the VCSEL networks. |
| US11411710B2 |
Subscriber of a data network
A subscriber of a wired data network, in particular of a local bus system, having internal clock generator for generating a clock generator signal having a clock generator frequency for the subscriber, a receive circuit for receiving a serial receive data stream, a processing circuit for inputting parallel receive data and for outputting parallel transmit data, and a transmit circuit for transmitting a serial transmit data stream. The receive circuit has a serial-to-parallel converter for converting serial receive data of the serial receive data stream into the parallel receive data. The receive circuit has a synchronization unit for synchronizing the internal clock generator to the data clock frequency contained in the serial receive data stream. The synchronization unit is configured for detecting transitions in the received serial receive data stream and for controlling the clock generator frequency of the internal clock generator as a function of the detected transitions. |
| US11411706B2 |
Resource block group partitioning method and user equipment
A resource block group partitioning method and user equipment are provided. The method includes: determining a resource block included in a first resource block group in a bandwidth part; determining a resource block included in other resource block group in the bandwidth part according to a pre-acquired resource block group size, wherein the other RBG is a resource block group other than the first resource block group in the bandwidth part. |
| US11411705B2 |
Method and apparatus for handling starting subframe of control channel for MTC UE in wireless communication system
A method and apparatus for transmitting a control channel to a machine-type communication (MTC) user equipment (UE) in a wireless communication system is provided. A base station (BS) configures a period of a control channel by using a first set of subframes which can be used for a MTC UE and a second set of subframes which cannot be used for the MTC UE, and transmits the control channel to the MTC UE in the first set of subframes within the period. A user equipment (UE) derives a starting subframe of the control channel among starting subframe sets of the control channel within the period of the control channel, and monitors the control channel from the starting subframe of the control channel. |
| US11411704B2 |
Apparatuses and methods for prioritization between physical downlink shared channel and synchronization signal block reception
Systems, methods, apparatuses, and computer program products for selecting or prioritizing between a physical downlink shared channel (PDSCH) and synchronization signal PBCH block (SSB) reception are provided. One method may include, when outside a SMTC window and when PDSCH resource allocation overlaps with an occupied SSB location, selecting between the PDSCH and SSB reception according to defined rules. |
| US11411703B2 |
Signal transmission and detection method and device
Disclosed are a method and a device for transmitting and detecting a signal. The method provided in the present application: includes determining time-frequency resource for sending a dedicated reference signal sequence; sending the dedicated reference signal sequence on the time-frequency resources; and identifying remote interference by detecting the dedicated reference signal sequence. The time-frequency resources include a time slot of a downlink radio frame in a time domain and a frequency sub-band obtained by dividing a maximum frequency bandwidth available to a base station in a frequency domain. |
| US11411702B2 |
Method and apparatus for generating pilot tone in orthogonal frequency division multiplexing access system, and method and apparatus for estimating channel using it
The present invention relates to a pilot tone generating method and apparatus of an orthogonal frequency division multiple access system and method, and a channel estimation method and apparatus using the same. The channel estimation apparatus includes a pilot tone extracting unit for extracting a pilot tone, which is inserted within a frame with data tone, masked with an orthogonal code; a pilot tone unmasking unit for unmasking of the pilot tone extracted from the pilot tone extracting unit by using an orthogonal code information; and a channel estimation operating unit for estimating a channel by calculating an average of the pilot tones which is unmasked in the unmasking unit. |
| US11411700B2 |
Method and device for supporting repetitive CSI-RS resource transmission in mobile communication system
The disclosure relates to a communication technique for convergence of a 5G communication system for supporting a higher data transmission rate beyond a 4G system with an IoT technology, and a system therefor. The disclosure may be applied to an intelligent service (e.g., smart home, smart building, smart city, smart car or connected car, health care, digital education, retail business, security- and safety-related service, etc.) on the basis of a 5G communication technology and an IoT-related technology. A method is provided for receiving a CSI-RS. The method includes acquiring, by a UE, a configuration for a resource set including a resource set identifier, information for at least one CSI-RS resource, and repetition information, wherein a number of the at least one CSI-RS resource is up to a maximum number of CSI-RS resources per resource set, and the repetition information is set as either on or off; acquiring, by the UE, a CSI-RS resource configuration per CSI-RS resource including a CSI-RS resource identifier, information for a number of CSI-RS ports, and information for an OFDM symbol; acquiring, by the UE, from the base station, a CSI report configuration including information for reporting parameters and information for a reporting method, wherein the information for the reporting parameters indicates at least one of a CRI, a RI, a PMI, or a CQI, and the information for the reporting method corresponds to periodic, semi-persistent, or aperiodic; and transmitting, by the UE, to the base station, CSI based on the configuration for the resource set and the CSI report configuration. |
| US11411699B2 |
Shared demodulation reference signal design for control channels in 5G or other next generation networks
Facilitating shared demodulation reference signal design for control channels in a wireless communications system is provided herein. A system can comprise a processor and a memory that stores executable instructions that, when executed by the processor, facilitate performance of operations. The operations can comprise evaluating a usage parameter of a mobile device for application of channel demodulation reference signal reuse by the mobile device. In response to a first determination that the usage parameter satisfies a condition relative to a threshold usage parameter, the operations can comprise facilitating a first transmission to the mobile device to implement the channel demodulation reference signal reuse by the mobile device. In response to a second determination that the usage parameter does not satisfy the condition relative to the threshold usage parameter, the operations can comprise facilitating a second transmission to the mobile device to implement usage of separate channel demodulation reference signals. |
| US11411698B2 |
Demodulation Reference Signal transmission method, network device and User Equipment
A DMRS transmission method, a network device and a UE are provided. The DMRS transmission method includes: configuring DMRS of a service channel within a mini-slot; mapping parts of or all of the DMRS of the service channel to a time-domain transmission resource, the time-domain transmission resource being offset by M time-domain symbols relative to a time-domain transmission resource corresponding to a control channel within the mini-slot, M being an integer greater than or equal to 1; and transmitting the DMRS of the service channel through the time-domain transmission resource. |
| US11411696B2 |
Resource indication method, terminal device, network device, non-transitory computer-readable medium and chip
This application provides a resource indication method, a terminal device, and a network device. The method includes: receiving, by the terminal device, the first indication information, and determining time domain positions of demodulation reference signals (DMRSs) based on the mapping type of the physical shared channel and with reference to a position index of the last symbol occupied by the physical shared channel or a quantity of symbols occupied by the physical shared channel in the resource unit, where the position index of the last symbol occupied by the physical shared channel in the resource unit corresponds to the first type, and the quantity of symbols occupied by the physical shared channel in the resource unit corresponds to the second type. |
| US11411690B2 |
Method for transmitting and receiving data channel based on a plurality of physical uplink shared channels in communication system and apparatus for the same
Disclosed are methods and apparatuses for transmitting and receiving data channels in a communication system. An operation method of a terminal in a communication system may comprise receiving, from a base station, resource allocation information of a plurality of physical uplink shared channels (PUSCHs) used for repetitive transmission of a same transport block (TB); identifying a position of each of the plurality of PUSCHs in a time domain based on the resource allocation information; and repeatedly transmitting the same TB to the base station at the position of each of the plurality of PUSCHs. Therefore, performance of the communication system can be improved. |
| US11411685B2 |
User terminal and radio communication method
A terminal is disclosed including a processor that, when an uplink shared channel is used to transmit a delivery acknowledgement signal (HARQ-ACK) and an uplink data (UL-SCH), controls a mapping of the delivery acknowledgement signal based on whether bundling is applied to the delivery acknowledgement signal and based on a number of bits of the delivery acknowledgement signal; and a transmitter that transmits the delivery acknowledgement signal and the uplink data. In other aspects, a radio communication method and a base station are also disclosed. |
| US11411684B2 |
Ceasing transmission repetitions
Apparatuses, methods, and systems are disclosed for ceasing transmission repetition. One apparatus includes a transmitter that transmits data to a base unit in a first transmission time interval (“TTI”). Here, the data is configured for transmission with a predetermined number of repetitions. The apparatus includes a receiver that receives a control signal from the base unit in a second TTI. The apparatus includes a processor that determines whether the control signal corresponds to the data and, in response to the control signal corresponding to the data, determines whether to cease at least one transmission repetition of the data before the number of repetitions reaches the predetermined number. |
| US11411682B2 |
Transmission information for a configured periodic grant of a wireless device
A wireless device receives, from a base station, at least one first message comprising a first periodicity of resources of a configured periodic grant of a first type. A request for transmission information associated with the configured periodic grant is received. A response is transmitted. The response comprises: a first value based on a number of transmissions via the resources the configured periodic grant; and a second value based on a number of times that the wireless device received no corresponding acknowledgement from the base station in response to the transmissions. |
| US11411681B2 |
In-vehicle information processing for unauthorized data
An information processing method performed by an information processing system including a storage device to process a plurality of data frames flowing in an in-vehicle network including at least one electronic control unit includes a receiving step of sequentially receiving a plurality of data frames flowing in the in-vehicle network, a frame collection step of recording, in a reception log held in the storage device, reception interval information indicating reception intervals between the plurality of data frames as frame information, a feature acquisition step of acquiring, from the reception interval information, a feature relating to distribution of the reception intervals between the plurality of data frames, and an unauthorized data presence determination step of determining the presence/absence of an unauthorized data frame among the plurality of data frames. |
| US11411678B2 |
Equivalent puncture sets for polar coded re-transmissions
Wireless devices may use polar codes for encoding transmissions and may support combining transmissions to improve decoding reliability (e.g., by achieving chase combining and incremental redundancy (IR) gains). For example, an encoding device may puncture a set of mother code bits using different puncturing patterns to obtain different redundancy versions for a first transmission and a re-transmission. Each puncturing pattern may correspond to an equivalent decoding performance. In some cases, to obtain equivalent puncture sets, the encoding device may perform punctured index manipulation procedures on an initial puncturing pattern. A punctured index manipulation procedure may involve switching a binary state for a binary bit at a same binary bit index for each puncture index in a puncturing pattern. A device may receive the transmissions generated using the equivalent puncture sets and may combine the information for improved decoding reliability. |
| US11411676B2 |
Method and apparatus for transmitting and receiving multicast unicast overlapped transmission signal in wireless communication system
The present disclosure relates to a communication method and system for converging a 5th-Generation (5G) communication system for supporting higher data rates beyond a 4th-Generation (4G) system with a technology for Internet of Things (IoT). The present disclosure may be applied to intelligent services based on the 5G communication technology and the IoT-related technology, such as smart home, smart building, smart city, smart car, connected car, health care, digital education, smart retail, security and safety services. A method of controlling a terminal according to one embodiment of the present invention may comprise the steps of receiving, from a base station, set information including information on a location of at least one resource to which a demodulation reference signal (DMRS) of a unicast signal is to be mapped; receiving a multicast signal and the unicast signal from the base station; decoding the multicast signal on the basis of the set information; and decoding the unicast signal on the basis of the decoded multicast signal. |
| US11411675B2 |
Method and device in communication nodes for wireless communication with large propagation delay difference
A method and a device in communication nodes used for wireless communications. A communication node receives first information, transmits a first radio signal, and monitors a first-type signaling in a first time window. Wherein an end time for a transmission of the first radio signal is used for determining a start of the first time window, and a time-domain resource occupied by the first radio signal is used for determining a first characteristic identity. The first characteristic identity is one of M characteristic identities, M being a positive integer greater than 1, and the first information is used for determining the M characteristic identities. The first-type signaling carries one of the M characteristic identities, and the communication node determines a characteristic identity carried by the first-type signaling out of the M characteristic identities through blind detection. The random access performance is therefore improved. |
| US11411673B2 |
Method and apparatus for transmitting information, and method and apparatus for receiving information
A transmission method or a transmission apparatus maps input information of K+n bits to a polar code, encodes the input information on the basis of the polar code, and transmits the encoded input information. The input information includes n parity check bits. n1 bits of the n parity check bits are mapped to least reliable bit positions of K+n bit positions of the polar code, and n−n1 parity check bits (where n−n1>0) are mapped to n−n1 bit positions having a minimum row weight among K+n−n1 bit positions excluding the n1 least reliable bit positions among the K+n bit positions. |
| US11411670B1 |
Chirp noise generation device and method for compression pulse signal
A chirp noise generation device for a compressed pulse signal includes: a receiving antenna; a signal analysis unit configured to determine whether to perform an electronic attack by analyzing a receipt signal that is inputted through the receiving antenna; and a digital frequency storage configured to store the receipt signal that is inputted through the receiving antenna, to generate a chirp noise by using the receipt signal, to generate a jamming signal by synthesizing the receipt signal and the chirp noise, and to transmit the jamming signal when a control command indicating that the electronic attack needs to be performed is received from the signal analysis unit. |
| US11411668B2 |
Multi-codeword transmission method and apparatus
This application discloses a multi-codeword transmission method and an apparatus. The method includes: generating, by a network device, downlink control information corresponding to each of a plurality of code words to be sent to a terminal device, where the downlink control information corresponding to each code word includes at least one of the following: a physical downlink shared channel resource element mapping and quasi-co-location indicator, and an antenna port(s), scrambling identity and number of layers; and sending, by the network device, downlink control information corresponding to the plurality of code words to the terminal device. Corresponding apparatuses are further disclosed. According to the technical solutions of this application, the network device generates the downlink control information corresponding to each of the plurality of code words to be sent to the terminal device, and the terminal device may demodulate data for the plurality of code words based on downlink control information corresponding to the plurality of code words. This ensures that the terminal device correctly demodulates data in a multi-codeword transmission scenario. |
| US11411661B2 |
Calibration circuits for beam-forming antennas and related base station antennas
A base station antenna includes a backplane and a plurality of radiating elements that extend forwardly from the backplane. The antenna further includes a plurality of feed boards, and each of the feed boards has a respective group of one or more of the radiating elements mounted thereon. The antenna also includes a calibration port and a calibration circuit that has a calibration combiner that has an output that is coupled to the calibration port and a plurality of directional couplers that are coupled to the calibration combiner. At least a first portion of a first of the first directional couplers is implemented on a first of the feed boards. |
| US11411658B1 |
Entangled quantum state receiver
An entangled quantum state receiver includes an optical detector that generates an electrical signal having a signal characteristic in response to detection of a single photon. A first electrical circuit generates an electrical signal having a predetermined duration at an output when the signal characteristic is present. A clock generates a clock with a period, wherein the predetermined duration is greater than the period. A second electrical circuit generates and stores a state or a time in a memory location, where the state has a first state value when the electrical signal having the predetermined duration is present during a clock cycle and has a second state value when the electrical signal having the predetermined duration is not present during the clock cycle. A processor determines received entangled state information from the state value stored in the memory location or from time stored in the memory location. |
| US11411656B2 |
Impedance correcting method and apparatus, and impedance-corrected signal line for optical transceiver
Disclosed are an impedance correcting method and apparatus, and an impedance-corrected signal line for an optical transceiver. The impedance correction method includes receiving an impedance according to an error of a resin applying process of a signal line for an optical transceiver, acquiring a correction parameter for generating a correction impedance based on the impedance according to the error, and determining the correction impedance for correcting the impedance according to the error based on the correction parameter. |
| US11411654B1 |
Method for generating a constant envelope waveform when encoding multiple sub channels on the same carrier
Communications systems and methods of controlling the same include generating and processing a constant envelope phase-modulated optical signal, the systems including an optical source configured to provide a carrier waveform, an encoding module configured to encode the data as a plurality of symbol sequences, a mapping module configured to convert the plurality of symbol sequences to a plurality of phase state changes and a plurality of directions according to a path-dependent phase modulation scheme, and a phase modulator configured to modulate the carrier waveform with the plurality of phase state changes and directions to generate the constant envelope phase-modulated optical signal. |
| US11411653B2 |
Optical transmitter input resistance measurement and encoder/driver modulation current configuration techniques
Techniques for automatically determining an input resistance of an optical modulator and configuring a modulation current source can include applying a first bias current to an input of the optical transmitter and measuring a corresponding first voltage at the input of the optical transmitter. A second bias current can also be applied to the input of the optical transmitter and a corresponding second voltage at the input of the optical transmitter can be measured. An input resistance of the specific optical transmitter can be determined from the difference between the first and second voltages divided by the difference between the first and second bias currents. The technique can further include setting one or more configuration settings in one or more registers of a modulation current source based on the determined input resistance of the optical transmitter. Thereafter, the output modulation current for driving the specific optical transmitter can be configured based on the one or more configuration settings in the one or more registers. |
| US11411650B2 |
Component bridge for increasing mounting surface area on feedthrough device and an optical subassembly implementing same
The present disclosure is generally directed to a component bridge that couples to a feedthrough device to provide additional component mounting surface area within a TOSA housing, and preferably, within a hermetically-sealed TOSA housing. The component bridge includes a body that defines a component mounting surface to couple to electrical components, e.g., one or more filtering capacitors, and a notched portion to provide an accommodation groove. The component bridge includes at least one projection/leg for coupling to a mounting surface of a feedthrough device. The accommodation groove of the component bridge allows for other electrical components, e.g., RF traces, to be patterned/disposed on to the mounting surface and extend at least partially through the accommodation groove while remaining electrically isolated from the same. Accordingly, the component bridge further increases available component mounting surface area for existing feedthrough devices without necessity of re-design and/or modification. |
| US11411646B2 |
Optical-RF hybrid wireless communication system and control method
The purpose of the present invention is to provide an optical/RF wireless hybrid communication system and a control method capable of solving the instability of link conditions of an RF wireless link and an optical wireless link. In the optical/RF wireless hybrid communication system and the control method according to the present invention, links for data transmission are not limited to one of an RF wireless link and an optical wireless link, the quality of link conditions is determined from signal quality received through channels of both the RF wireless link and the optical wireless link, and the distribution of data to be transmitted through the respective links is determined on the basis of the determination result. Thus, the links can be flexibly switched depending on the transmission conditions such as disturbance. |
| US11411645B2 |
Signal switch and method of operating a signal switch
A signal switch comprises a switch arrangement for selectively passing optical wireless communication, OWC, signals received from a plurality of photodetectors for output to an external device. A signal strength detector is arranged to measure a signal strength of OWC signals as passed by the switch arrangement. While an OWC signal received from a first one of the photodetectors with a signal strength is being passed by the switch arrangement, a selection unit controls the switch arrangement to pass a combination of the OWC signal from the first photodetector and the OWC signal from another photodetector, determines a signal strength of the combination of OWC signals, and estimates the signal strength of the OWC signal from the other photodetector based on the signal strength of the OWC signal from the first photodetector and the signal strength of the combination of OWC signals. |
| US11411644B2 |
Multi-lane optical-electrical device testing using automated testing equipment
A hybrid automated testing equipment (ATE) system can simultaneously test electrical and optical components of a device under test, such as an optical transceiver. The device under test can be a multilane optical transceiver that transmits different channels of data on different lanes. The hybrid ATE system can include one or more light sources and optical switches in an optical test lane selector to selectively test and calibrate each optical and electrical components of each lane of the device under test. |
| US11411635B2 |
Spatial reuse in WLAN multi-AP network
Systems and methods of WLAN communication including efficient spatial reuse mechanisms for relay transmissions between a repeater network and non-AP STAs in OFDMA. The non-AP STAs are grouped based on their connectivity with the individual repeaters and the radio coverage regions of the repeaters. Each group is either a non-overlapping group with the constituent non-AP STAs located in a non-overlapping coverage region of a particular repeater, or an overlapping group with the constituent non-AP STAs located in an overlapping coverage region of two or more repeaters. Based on the grouping, certain RUs (or subchannels) are reused for multiple groups without causing inter-group interference, thereby expanding the bandwidths used in the relay operations. RU allocation based on grouping can be used in combination with transmit power adjustment to achieve efficient spatial reuse in OFDMA. |
| US11411634B2 |
Beam failure reporting
This document describes reporting beam failure by a user equipment (110) to a base station (121) in a radio access network (140), in which the user equipment (110) receives a first uplink grant (502) and initiates a beam recovery procedure (504). Based on the beam recovery procedure determining that a beam has failed, the user equipment (110) transmits, using the first uplink grant, a first Media Access Control Protocol Data Unit including a first MAC Control Element that indicates a first Synchronization Signal Block and a second Synchronization Signal Block, the transmission being effective to cause the base station (121) to determine that, based on receiving the first Synchronization Signal Block, the beam failure was detected by the user equipment (110) on the first Synchronization Signal Block (506). |
| US11411631B2 |
Selecting physical uplink control channel (PUCCH) resources for channel state information
Various aspects of the present disclosure generally relate to wireless communication. In some aspects, a user equipment may determine a set of physical uplink control channel (PUCCH) resources to be used to transmit a channel state information (CSI) payload based at least in part on a first rank that is independent of a second rank used to construct the CSI payload; and transmit the CSI payload, to a base station (BS), using one or more resources from the set of PUCCH resources. Numerous other aspects are provided. |
| US11411630B2 |
Beam-strength related type-II channel state information coefficient feedback
Certain aspects of the present disclosure provide techniques for reporting beam-strength related Type-II channel state information (CSI) coefficient feedback. |
| US11411624B2 |
Systems and methods for correction of beam direction due to self-coupling
Systems and methods for correcting beam weighting factors for a radio system include obtaining measurements of cross-polarization transfer functions between respective pairs of dual-polarized antenna elements in the antenna system and computing coupling values for the respective pairs and reflection coefficient values by numerically solving a system of equations in which a subset of the coupling values are set to zero and the measurements of the cross-polarization transfer functions of the respective pairs are a function of the coupling values for the respective pairs of the dual-polarized antenna elements and the reflection coefficient values. Correction factors are computed for the antenna elements based on the computed coupling values and reflection coefficients. Based on the respective correction factors, beam weighting factors are calculated for at least some of the antenna elements for a desired beam direction. |
| US11411622B2 |
Adaptive cell shaping in codebook based full dimension multiple input-multiple output communications
Methods, network nodes and wireless device for setting an electrical tilt of an antenna array toward a distribution of wireless devices are disclosed. According to one aspect, a method includes for each of at least one sector of an area covered by the antenna array, determining a function of precoding matrix indicators, PMIs, received from a plurality of WDs in the sector. The method includes determining a current electrical tilt angle of the sector based on the function of PMIs. The method further includes comparing a difference between the current electrical tilt angle of the sector and a previously determined electrical tilt angle of the antenna array to a first threshold, and setting the electrical tilt angle of the antenna array based on the comparison. |
| US11411619B2 |
Determining a precoder for PTRS ports
Apparatuses, methods, and systems are disclosed for determining a precoder for PTRS ports. One method (800) includes receiving (802) information indicating a precoder for transmission. The method (800) includes determining (804) a precoder for each phase tracking reference signal port based on the information. Another method (900) includes transmitting (902) information indicating a precoder for transmission. The method (900) includes receiving (904) one or more phase tracking reference signal ports precoded with the precoder. |
| US11411616B2 |
Trusted WLAN connectivity to 3GPP evolved packet core
Systems, devices, and configurations to implement trusted connections within wireless networks and associated devices and systems are generally disclosed herein. In some examples, a wireless local area network (WLAN) may be attached to a 3GPP evolved packet core (EPC) as a trusted access network, without use of an evolved packet data gateway (ePDG) and overhead from related tunneling and encryption. Information to create the trusted attachment between a mobile device and a WLAN may be exchanged using Access Network Query Protocol (ANQP) extensions defined by IEEE standard 802.11u-2011, or using other protocols or standards such as DHCP or EAP. A trusted WLAN container with defined data structure fields may be transferred in the ANQP elements to exchange information used in the establishment and operation of the trusted attachment. |
| US11411613B2 |
Adaptation of coordinated radio frequency transmissions and receptions
A communication system is disclosed. The communication system includes a plurality of antennas disposed on one or more platforms, at least one transmitter, at least one receiver, and a control module communicatively coupled to the at least one receiver and at least one transmitter, and disposed on a separate platform than at least one antenna of the plurality of antennas. The control module is configured to control received and transmitted signals. The control module includes a controller, one or more processors, and a memory communicatively coupled to the one or more processors and having instructions stored upon. The instructions, when executed by the one or more processors, cause the one or more processors to receive antenna attribute data, and instruct the controller to configure the communication system for at least one of the diversity signal processing, the adaptive antenna processing, or the relay communication processing. |
| US11411600B2 |
Processing of uplink data streams
An apparatus is disclosed, comprising means for identifying a plurality of user equipment (UE), each transmitting one or more uplink packets for decoding at a base station associated with a given cell of a radio network. The apparatus further comprises means for clustering the identified user equipment into joint processing groups, each joint processing group comprising the identities of two or more user equipment as clustered and means for performing, in a first processing stage, joint processing of the uplink data streams for identified user equipment within common joint processing groups using one or more first processing algorithms to produce corresponding first processed uplink data streams. The apparatus further discloses means for performing one or more subsequent processing stages on the first processed uplink data streams, subsequent to the joint processing, to produce decoded uplink data streams, the one or more subsequent processing stages using one or more second processing algorithms, different from the first processing algorithm. |
| US11411594B2 |
Vehicle trainable transceiver having a programmable oscillator
A trainable transceiver is provided for a vehicle for transmitting signals to a device remote from the vehicle. The trainable transceiver includes a programmable oscillator for generating a signal having a selected reference frequency; an RF transceiver that receives an RF signal during a training mode in order to learn characteristics of the received RF signal, and transmits an RF signal to the remote device in an operating mode where the transmitted RF signal includes the learned characteristics of the received RF signal, wherein the RF transceiver receives the reference frequency from the programmable oscillator and uses the reference frequency to learn the characteristics of the received RF signal and for generating the transmitted RF signal; and a controller that, during the operating mode, selects frequency control data representing a frequency and selects the selected reference frequency for the programmable oscillator as a function of the frequency control data. |
| US11411593B2 |
Radio frequency (RF) system including programmable processing circuit performing butterfly computations and related methods
A radio frequency (RF) system may include an RF transceiver, and a baseband engine, application specific integrated circuit (ASIC) coupled to the RF transceiver and configured to perform a given baseband engine operation from among different baseband engine operations. The baseband engine ASIC may include a memory and a state machine coupled thereto and configured to store a respective set of programming instructions for each of the different baseband engine operations and to permit selection of the given set of programming instructions. The baseband engine ASIC may also include a programmable processing circuit coupled to the memory and the state machine and configured to perform butterfly computations responsive to the given set of programming instructions. |
| US11411587B2 |
Signal processing method and system
A signal processing method and system includes a baseband signal baseband signal processing module configured to perform slow envelope processing on a first signal, to obtain an envelope value E(n) of the first signal on which the slow envelope processing has been performed, obtain a phase value θ(n) based on E(n), where θ(n) and E(n) are in a linear relationship, and separate the first signal into a second signal and a third signal based on θ(n), where a phase difference between the second signal and the third signal is 2 θ(n), an amplifier configured to amplify the second signal and the third signal, and a synthesizer is configured to combine the amplified second signal and third signal to obtain a fourth signal. |
| US11411586B2 |
Radio frequency module and communication device
A radio frequency module includes: a module board that includes a first principal surface and a second principal surface on opposite sides of the module board; a power amplifier; a first circuit component; and a power amplifier (PA) control circuit configured to control the power amplifier. The power amplifier includes: an input terminal; an output terminal; first and second amplifying elements disposed parallel to the input terminal; and an output transformer connected between the output terminal and output terminals of the first and second amplifying elements. The PA control circuit is disposed on the second principal surface, and the first and second amplifying elements are both disposed on the first principal surface. |
| US11411584B2 |
Data storage device channel encoding current data using redundancy bits generated over preceding data
A data storage device is disclosed comprising a non-volatile storage medium (NVSM). A first block of data is channel encoded into first channel data based on a channel code constraint, and the first channel data is error correction encoded to generate first redundancy bits. A second block of data is channel encoded into second channel data based on the channel code constraint and the first redundancy bits, and the first channel data and the second channel data are error correction encode to generate second redundancy bits. A third block of data is channel encoded into third channel data based on the channel code constraint and the second redundancy bits. The first, second and third channel data and the first and second redundancy bits are stored in the NVSM. |
| US11411583B2 |
Deinterleaving method and deinterleaving system performing the same
A deinterleaving method and a deinterleaving system performing the same are disclosed. According to an example embodiment, a data processing method includes dividing data into first data blocks of a first number of bits, performing deinterleaving on the first data blocks, and dividing deinterleaved data into second data blocks of a second number of bits and outputting the second data blocks, wherein the first number of bits is determined based on a minimum switching unit of a deinterleaving operation and the second number of bits. |
| US11411580B2 |
LDPC code matrices
An LDPC parity check matrix, includes a systematic portion having a plurality of systematic elements having a value, the value each systematic element determining a cyclic shift to be applied to rows of an identity submatrix corresponding to that element; and a parity portion having a plurality of panty elements having a value, the value of each parity element determining a cyclic shift to be applied to rows of an identity submatrix corresponding to that element; wherein the weights of each column of a group of columns of the parity portion is the same. The LDPC parity check matrix may be used for data access, communication and storage, and may be used, for example for communications among a plurality of network nodes. |
| US11411579B2 |
Efficient data encoding
Circuits, methods, and apparatus for efficiently implementing encoding and decoding between binary and multilevel data. |
| US11411577B2 |
Data compression method, data decompression method, and related apparatus
A data compression method includes obtaining N to-be-compressed data blocks and N pieces of protection information (PI), where the N to-be-compressed data blocks are in a one-to-one correspondence with the N pieces of PI, and N is a positive integer greater than or equal to 2, compressing the N to-be-compressed data blocks to obtain a compressed data block, and compressing the N pieces of PI to obtain compressed PI. |
| US11411571B2 |
Phase-locked loop monitor circuit
A clock distribution circuit configured to output a clock signal includes a first circuit configured to use a reference clock signal to provide first and second reference signals, wherein the second reference signal indicates whether the first reference signal is locked with the reference clock signal; a second circuit configured to use the reference clock signal to provide an output signal and an indication signal indicative whether the output signal is locked with the reference clock signal; and a monitor circuit, coupled to the first and second circuits, and configured to use at least one of the first reference signal, the second reference signal, the output signal, and the indication signal to determine whether the second circuit is functioning correctly. |
| US11411570B1 |
Multi modulus frequency divider and electronic device
The present disclosure provides a multi modulus frequency divider and an electronic device. The duty cycle adjusting circuit in the multi modulus frequency divider is configured to generate a second output clock signal according to a first output clock signal and an input modulus signal received by one or more frequency division units, the frequency of the second output clock signal is the same as that of the first output clock signal, and the duty cycle of the second output clock signal is different from that of the first output clock signal. The duty cycle of the clock signal output by the multi modulus frequency divider provided in the present disclosure is generally closer to 50%. |
| US11411568B1 |
Beidou signal tracking system with nonlinear phase-locked loop
The present disclosure discloses a Beidou signal tracking system with a nonlinear phase-locked loop. A nonlinear element and a low-pass filter are added behind a loop filter to adapt to an output from control of the loop filter, and then to control a phase of an output signal. An in-phase branch pre-filtering link is added before the loop filter to smoothly processing an input signal, and a loop filter of a third-order phase-locked loop assisted by a second-order frequency-locked loop is selected to ensure basic performance index of an algorithm. The in-phase branch pre-filtering link controls signal change of an in-phase branch signal within a reasonable range. The nonlinear element and the low-pass filter behind the loop filter, after proper selection of parameters, can make the phase-locked loop quickly lock within the range where the phase-locked loop could not be locked originally. |
| US11411566B2 |
Charge pump
In described examples, a method of operating a charge pump includes a first control signal deactivating a first transistor, and the first control signal's logical complement activating a second transistor to reset the first transistor's DC bias voltage. The first control signal's logical complement deactivates the second transistor, and the first control signal provides a bias voltage to the first transistor to activate it, causing current to be transmitted from an input voltage to an output terminal. A second control signal deactivates a third transistor, and the second control signal's logical complement activates a fourth transistor to reset the second transistor's DC bias voltage. The second control signal's logical complement deactivates the fourth transistor, and the second control signal provides a bias voltage to the third transistor to activate it, causing current to be transmitted from the output terminal to a ground. |
| US11411560B1 |
Electronic system, integrated circuit die and operation method thereof
An electronic system, an integrated circuit die and an operation method thereof are provided. The integrated circuit die includes a plurality of interface circuit slices and a merging circuit. The transmission data stream sent from the transmitter die is split into a plurality of sub-data streams. Each of the interface circuit slices provides a physical layer to receive the corresponding one of the sub-data streams. The merging circuit is coupled to the interface circuit slices to receive the sub-data streams. The merging circuit merges the sub-data streams from the interface circuit slices back to the original data corresponding to the transmission data stream to be provided to an application layer. The merging circuit aligns the sub-data streams from the interface circuit slices in timing to mitigate different delays of the interface circuit slices. |
| US11411559B2 |
Multi-voltage domain actuator signal network
Networks, methods, and circuitries are provided that propagate an actuator signal to a plurality of devices in a respective plurality of voltage domains. The network includes a first signal path disposed between an actuator signal source and a first device. The first signal path includes a first point at which the actuator signal is in a first voltage domain. A second signal path is disposed between the actuator signal source and a second device. The second signal path includes a second point at which the actuator signal is in a second voltage domain. The first voltage domain is different from, and has a fixed relationship to, the second voltage domain. A multi-domain coupling circuitry is connected to the first point and the second point. The multi-domain coupling circuitry is configured to maintain the fixed relationship between the actuator signal at the first point and the second point. |
| US11411557B2 |
Method and system of operating a bi-directional double-base bipolar junction transistor (B-TRAN)
Operating a bi-directional double-base bipolar junction transistor (B-TRAN). One example is a method comprising: injecting charge carriers at a first rate into an upper base of the transistor, the injecting at the first rate results in current flow through the transistor from an upper collector-emitter to a lower collector-emitter, and the current flow results in first voltage drop measured across the upper collector-emitter and the lower collector-emitter; and then, within a predetermined period of time before the end of a first conduction period of the transistor, injecting charge carriers into the upper base at a second rate lower than the first rate, the injecting at the second rate results in second voltage drop measured across the upper collector-emitter and the lower collector-emitter, the second voltage drop higher than the first voltage drop; and then making the transistor non-conductive at the end of the conduction period. |
| US11411554B2 |
Comparing device and method of controlling comparing device
A comparing device includes a first current generating circuit arranged to selectively generate a first current and a second current different from the first current, according to a first control signal. The comparing device also includes a comparing circuit having a common node coupled to the first current generating circuit for comparing a first input signal and a second input signal to generate an output signal according to the first current, the second current, and a second control signal. The second control signal and the first control signal are in-phase with each other. |
| US11411551B2 |
Electromechanical resonators based on metal-chalcogenide nanotubes
This invention provides electromechanical resonators based on metal chalcogenide nanotubes. The invention further provides methods of fabrication of electromechanical resonators and methods of use of such electromechanical resonators. |
| US11411549B2 |
Crystal resonator plate and crystal resonator device
In a crystal resonator plate (2), a support part (24) extends from only one corner part positioned in the +X direction and in the −Z′ direction of a vibrating part (22) to an external frame part (23) in the −Z′ direction. The vibrating part (22) and at least part of the support part (24) form an etching region (Eg) having a thickness thinner than a thickness of the external frame part (23). A stepped part is formed at a boundary of the etching region (Eg), and a first lead-out wiring (223) is formed over the support part (24) to the external frame part (23) so as to overlap with the stepped part. At least part of the stepped part that is superimposed on the first lead-out wiring (223) is formed so as not to be parallel to the X axis in plan view. |
| US11411548B2 |
Bulk acoustic wave resonator and bulk acoustic wave filter
A bulk acoustic wave resonator and a bulk acoustic wave filter are provided. The bulk acoustic wave resonator includes: a piezoelectric layer; an electrode layer located at both sides of the piezoelectric layer; and an electrode edge frame structure located at an edge of the electrode layer and located at one side of the electrode layer away from the piezoelectric layer. The electrode edge frame structure includes a laminated structure, the laminated structure includes an edge convex layer and a passivation layer laminated in a longitudinal direction, and the passivation layer is located at one side of the edge convex layer away from the piezoelectric layer; in a transverse direction, the laminated structure includes a cantilever member and a convex structure connected with each other; a cantilever gap is arranged between the cantilever member and at least one of the piezoelectric layer and the electrode layer. |
| US11411546B2 |
Resonance device and method for manufacturing resonance device
A resonator is provided that includes a vibrating section that vibrates in a contour vibration mode, a frame that surrounds at least a portion of the vibrating section, supporting sections extending along a Y-axis direction and connecting the vibrating section and the frame. The vibrating section includes a through hole that extends along an X-axis direction perpendicular to the Y-axis direction such that a coupling section is disposed between the through hole and each of the supporting sections. The length SL of the through hole in the X-axis direction is longer than the length Sd of the coupling section in the Y-axis direction. |
| US11411545B2 |
Multiplexer, and radio frequency front-end circuit and communication device that use the same
A multiplexer (100) includes a first filter (FLT1) that passes a signal in a first frequency band, a second filter (FLT2) that passes a signal in a second frequency band lower than the first frequency band, and a third filter (FLT3) that passes a signal in a third frequency band. The third frequency band is a frequency band higher than the first frequency band, or a frequency band lower than the second frequency band. The first filter includes a first inductor (L11) that forms a first attenuation pole on a low-frequency side of the first frequency band. The second filter includes a second inductor (L23) that forms a second attenuation pole on a high-frequency side of the second frequency band. At least a portion of a component constituting the third filter is disposed between the first inductor and the second inductor. |
| US11411543B2 |
Power efficiency in an audio playback path
Systems and methods are provided for circuit configurations that maintain audio playback performance while reducing power consumption. In particular, a gain for a current analog-to-digital converter in an audio playback path is adjusted based on an amplitude of the input signal. Additionally, systems and methods are provided for transitioning between a modes of operation for large signals and mode of operation for small signals. |
| US11411527B2 |
Window mounted support platform for an electrical generator
A window mounted support platform for an electrical generator. The support platform is securable to a window frame and provides a movable platform that can be orientated on the interior side of the window frame for ease of accessing a generator secured to the platform. The movable platform can further be moved to a position external the window frame where the generator can operate without introducing fumes inside the window frame. The generator is secured to the top of the platform. The support platform employs a runner extending from a bracket configured for placement on the inside of a window frame, allowing movement of the shelf platform from an internal orientation to an external orientation. Doors are used to isolate the generator from the interior living space. An electrical cord can be routed through a sealing mechanism in the doors. |
| US11411526B2 |
Infrastructure energy generation system comprising photovoltaic structures
An infrastructure energy generation system comprising plurality of photovoltaic structures installed along a road or transportation route to generate electricity from solar energy. An electricity transmission line is installed along said road or transportation route which is connected to vehicle charging facilities, electric trains, electric buses, electric trucks, transportation facilities and roadside lights. The electricity transmission line is connected to at least one electricity generation source such as a generator or an electric battery. The infrastructure energy generation system is configured as a Distributed Energy Resource (DER), a microgrid, a grid-tied electrical system or an off-grid electrical system. |
| US11411521B2 |
Method for static eccentricity fault detection of induction motors
A system for controlling an operation of an induction motor (IM). A controller processor detects a spectrum of a current signal from received sensor data using a module. Obtain a number of rotor bars and a number of pole pairs of the IM to identify a principle slot harmonics (PSH) type IM from stored IM data. Use the PSH-type IM to identify a static eccentricity (SE) fault signature signal located at a secondary PSH frequency of the PSH-type IM. Determine a level of signal strength in the spectrum of the current signal at a location of the secondary PSH frequency, and compare to a SE fault table database to obtain a SE fault level of the PSH-type IM. Compare the SE fault level to a database to obtain a SE fault threshold, and if the SE fault level is outside the SE threshold, generate an interrupt command to the controller. |
| US11411519B2 |
Method for handling sub-synchronous resonances
The present invention relates to a method of controlling a doubly fed induction generator wind turbine converter system in case of a sub-synchronous resonance event, the method comprising the steps of detecting the sub-synchronous resonance event, and switching from a first control mode to a second control mode in response to detecting the predetermined event, wherein the second control mode comprises the step of setting at least one rotor current controller parameter on the basis of a generator speed of the doubly fed induction generator. The predetermined event may also be a fault ride through event. The present invention further relates to a doubly fed induction generator wind turbine converter system being capable of handling such events. |
| US11411516B2 |
Detection and control of electric machine with any combination of position sensor number of pole pairs and electric machine number of pole pairs
A vehicle includes an electric machine having a number of pole pairs, N, a position sensor having a number of pole pairs, M, that generates output indicative of a rotational position of the electric machine, and one or more controllers. The one or more controllers generate a remapped rotational position according to a product of the rotational position and L/N, generate a scaled position according to a product of the remapped rotational position and N/M, and command the electric machine to produce a specified torque or speed based on the scaled position. M is not equal to and not a factor of N, and L is a minimum common multiplier of N and M. |
| US11411508B2 |
Power conversion device and power conversion method
A power conversion device includes: a voltage conversion circuit that converts an AC voltage input into a DC voltage by PWM control and outputs the DC voltage; an input voltage detection circuit that detects the AC voltage input to the voltage conversion circuit and outputs a detection signal; an input current detection circuit that detects an AC current input to the voltage conversion circuit and outputs a detection signal; an output voltage detection circuit that detects the DC voltage output from the voltage conversion circuit and outputs a detection signal; and a control circuit that corrects a phase of a PWM signal for the PWM control based on the detection signal from the input voltage detection circuit, the detection signal from the input current detection circuit, and the detection signal from the output voltage detection circuit, and outputs the PWM signal corrected to the voltage conversion circuit. |
| US11411502B2 |
Single-stage isolated DC-DC converters
According to one aspect of the present disclosure, a single-stage converter includes a rectifying circuit and a buck-boost circuit. The buck-boost circuit includes an inductor with a center tap configured to supply an output of the buck-boost circuit to the rectifying circuit. The buck-boost circuit also includes first and second interleaved arms arranged in parallel with a voltage input of the single-stage converter. The first and second interleaved arms are each coupled to the inductor and include a plurality of switches operable to control the output of the buck-boost circuit. |
| US11411501B2 |
Slew-controlled switched capacitors for AC-DC applications
In a power converter, a regulator that receives a first voltage couples to a switched-capacitor converter that provides a second voltage. Slew-control circuitry controls slew rate within the switched-capacitor converter during operation thereof. A controller controls the operation of both the regulator and the switched-capacitor converter. |
| US11411499B2 |
Integrated circuit and power supply circuit
A power supply circuit includes an inductor, a power transistor configured to control an inductor current flowing through the inductor, and an integrated circuit driving the power transistor. The integrated circuit includes a first terminal that receives a power supply voltage for operating the integrated circuit, generated according to a variation in the inductor current, a second terminal to which a control electrode of the power transistor is coupled, a first drive circuit configured to drive the power transistor via the second terminal during a first time period to turn on the power transistor, and a second drive circuit configured to drive the power transistor via the second terminal during a second time period to turn on the power transistor, the second time period including at least a part of the first time period, driving capability of the second drive circuit being lower than that of the first drive circuit. |
| US11411498B2 |
Controller of switching power supply apparatus
A controller of a current resonance switching power supply apparatus configured to supply a constant output voltage to a load. The current resonance switching power supply apparatus includes a resonance circuit, and generates a feedback signal indicative of an error between the output voltage and a target voltage. The controller includes a load current detection circuit that receives a part of a resonance current of the resonance circuit, performs averaging and outputs a load current signal, and a standby detection circuit that receives the feedback signal and the load current signal, and determines that the load is in a standby mode upon detecting that the load current signal is lower than a first threshold and the feedback signal is lower than a second threshold, and is in a normal mode upon detecting that the feedback signal continues to be higher than the second threshold for more than a predetermined time. |
| US11411493B2 |
Two-stage power converter
A two-stage power converter includes: a resonant switched-capacitor converter (RSCC) receiving an input voltage and generating a first stage voltage; a voltage regulator receiving the first stage voltage and generating an output voltage; and a communication interface and control circuit generating a charging operation signal, at least one discharging operation signal and a switching signal. The charging operation signal and the discharging operation signal are employed to control the RSCC to perform a charging process and at least one discharging process respectively, and the switching signal is employed to control the voltage regulator, so as to synchronize a resonant frequency of the RSCC and a switching frequency of the voltage regulator. The communication interface and control circuit adjusts a delay interval after the discharging process ends, and starts the charging process at an end time point of the delay interval. |
| US11411491B2 |
Multiple output voltage conversion
Voltage dividing circuitry is provided for use in a voltage converter for converting at least one input Direct Current, DC voltage to a plurality of output DC voltages. The voltage dividing circuitry including a voltage input port to receive an input DC voltage and an inductor having an input-side switch node and an output-side switch node. The output side switch node is connectable to one of a plurality of voltage output ports to supply a converted value of the input DC voltage as an output DC voltage. The flying capacitor interface has a plurality of switching elements and at least one flying capacitor, the flying capacitor interface to divide the input DC voltage to provide a predetermined fixed ratio of the input DC voltage at the input-side switch node of the inductor. A voltage converter and a power management integrated circuit having the voltage dividing circuitry are also provided. |
| US11411490B2 |
Charge pumps with accurate output current limiting
Charge pumps with accurate output current limiting are provided herein. In certain embodiments, a charge pump includes an output terminal for providing a regulated output voltage, a switched capacitor, and switches that control connectivity of the switched capacitor to selectively charge or discharge the switched capacitor. The switches are operable in two or more phases including a charging phase in which the switched capacitor is charged with a charging current and a discharging phase in which the switched capacitor is coupled to the output terminal. The charge pump further includes an output current limiting circuit that controls the charging current to limit an amount of output current delivered by the charge pump to the output terminal. The output current limiting circuit limits the output current based on comparing a reference signal to an integral of an observation current that changes in relation to the charging current. |
| US11411489B2 |
Resonant half-bridge flyback power converter and primary controller circuit and control method thereof
A resonant half-bridge flyback power converter includes: a power transformer and a resonant capacitor which are coupled in series between a half-bridge power stage and an output power; and a primary controller circuit controlling a high side power switch and a low side power switch of the half-bridge power stage. When the high side switch is OFF, the control signal of the low side power switch includes a resonant switching pulse for achieving resonant switching of the low side switch and a soft switching pulse for achieving ZVS of the high side switch. When the output power is lower than a delay threshold, the primary controller circuit determines a delay period which is between the resonant switching pulse and the soft switching pulse to control both the high side power switch and the low side power switch to be OFF. The delay period is negatively correlated with the output power. |
| US11411478B2 |
High starting torque direct line operated energy efficient motor
The high efficiency motor employing the principle of three phase induction motor and permanent magnet synchronous motor includes a stator assembly and a rotor assembly. The rotor assembly includes a rotor shaft, a rotor stack assembly, a rotor cover and end ring. The rotor stack assembly includes a stamping stack, a conductor bar and a magnet. The stamping stack has dedicated slots for the conductor bar and the magnet. The rotor cover is fitted on the rotor stack, wherein both axial ends of the rotor cover are closed by end rings. |
| US11411475B2 |
Method for producing a rotor for an electric rotating machine
A method for producing a rotor for an electric rotating machine includes spraying in a rolling manner a first metallic material and a second metallic material, which is different from the first metallic material, onto at least part of a substantially cylindrical outer surface of a shaft body by a thermal spraying method to form on the shaft body a coating which forms at least part of a squirrel cage. |
| US11411474B1 |
Systems and methods for monitoring health of a motor
In an aspect of the present disclosure is a system for monitoring health of a motor, including at least one sensor configured to detect at least a motor metric and send motor datum based on the at least a motor metric, an augmented reality display configured to display a visual representation of the motor datum, and a computing device communicatively connected to the at least one sensor and the augmented reality display, wherein the computing device is configured to: receive the motor datum from the at least one sensor; and command the augmented reality display to display the visual representation of the motor datum. |
| US11411473B2 |
Stator for rotating electric machine and rotating electric machine
The degree of freedom in attachment of a temperature sensor is improved. A stator for a rotating electric machine includes: a temperature sensor; and a temperature sensor holder that grips a stator winding portion at a coil end (a portion of a stator winding protruding from both ends of a stator iron core) and the temperature sensor. The temperature sensor holder can be deformed in a direction other than a gripping direction in addition to the gripping direction. |
| US11411467B2 |
Electric motor for a power tool
A power tool includes a housing, a battery connection portion supported by the housing, a drive mechanism configured to operate a working element, and a brushless DC motor positioned within the housing and connected to the drive mechanism. The motor includes a rotor, stator surrounding the motor, and an output shaft fixed to the rotor such that movement of the rotor is transmitted to the output shaft. The motor also includes a fan coupled to the output shaft to rotate with the output shaft and the rotor, and a brass bushing fixed to the output shaft to rotate with the rotor and the output shaft relative to the stator. The bushing includes a balancing feature. |
| US11411466B2 |
Rotating device
A rotating device 1 according to the present application includes a motor 3, a gear 5 that transmits rotation of the motor 3 to an external device, and a sensor 7. The sensor 7 includes a sensor part 70 and a housing 72 that accommodates the sensor part 70. The sensor part 70 is capable of detecting a rotational speed or a rotational angle of the gear 5. The gear 5 includes a recess 50 in a rotational axis direction of the gear 5. The recess 50 accommodates a part of the housing 72. |
| US11411464B2 |
Braking device for an electric drive motor
The invention relates to a braking mechanism (10) for an electric drive motor (1), in particular a drive motor (2) comprising an armature shaft (5) that protrudes from a motor housing (2); the braking mechanism (10) comprises at least one braking element (17) and an energy store, the energy store permanently applying a braking power to a frictional surface of the braking element. The braking mechanism (10) is characterized in that the energy store and the braking element (17) are made of the same material as a single piece. |
| US11411461B2 |
Motor device having a grommet member
A motor device is provided. A grommet member (80) is equipped with a pair of motor-side lip seals (82a1, 82a2) which elastically deform in the insertion direction of an external connector (CN) into a connector member (60), and are adhered to a connector cover part (71) (contact surface 70a) of the cover member (70); hence, it is possible to configure in a manner such that the mounting direction of the grommet member (80) onto a gear case (31), and the adhesion direction of the pair of motor-side lip seals (82a1, 82a2) to the cover member (70), or in other words, the direction in which sealing properties increase, are the same direction. |
| US11411457B2 |
Electric motor
An electric motor suitable for an electric camshaft phaser comprises a main motor module and a plug-in module electrically and mechanically connected thereto. The main motor module comprises a housing shell, a stator and a rotor mounted in the housing shell by way of a rolling bearing. The main motor module is inserted into the plug-in module, and electrical connections between the plug module and the main motor module are established by insulation displacement connections, which can be produced by joining the modules in the axial direction. |
| US11411455B2 |
Motor device and method for producing same
A wide section 71d which contacts a connector member and positions the connector member relative to a connector housing part is provided in a section where a first securing part 71b of a cover member 70 is provided and is configured so as to be wider than the other parts of the section where the first securing part 71b of the cover member 70 is provided; hence, it is possible to use the wide section 71d in the pressing section (pressing point OP) of an extrusion pin. As a result, it is possible to suppress distortion of the cover member 70 and to sufficiently smooth the welded section (first securing part 71b) of the cover member 70 even when the shape of the cover member 70 is complicated. |
| US11411452B2 |
Coil and motor using same
A coil is a coil of a conductive wire that has a quadrangular cross section, that is spirally wound and laminated to have a series of turns including first to n-th turns (n is an integer of 3 or more), and that is provided, on at least some of the first to n-th turns in the coil, with deformed portions representing recesses each having a shape different from a shape of another portion of the conductive wire. In each of the first and n-th turns respectively lying at both ends of the series of turns, an outer surface lying on a side opposite to a center of the series of turns extends flush along with a plane intersecting the series of turns. |
| US11411451B2 |
Rotor
A rotor includes: a rotor core having: a plurality of magnet insertion holes; and a punched portion; and a plurality of magnetic pole portions. The punched portion is provided so as to pinch a q-axis magnetic path of each magnet pole portion in the radial direction with the plurality of magnet pole portions. The punched portion includes: a first punched hole located on a d-axis of each magnet pole portion; a pair of second punched holes facing each other across the first punched hole in the circumferential direction; and a pair of ribs formed between the first punched hole and the pair of second punched holes. The pair of ribs is provided such that a distance between the pair of ribs is increased from an outer side to an inner side in the radial direction. |
| US11411450B2 |
Sealed axial flux motor with integrated cooling
Conventional axial flux motors typically include multiple rotors and stators resulting in a larger and heavier motor. Additionally, conventional axial flux motors include a housing to protect the rotors and stators, but the housing is often difficult to seal from the environment leading to risks of contaminants (e.g., dirt, water) infiltrating the motor and causing failure over time. The present invention overcomes these limitations by disclosing an axial flux motor with a single rotor and two stators. The use of a single rotor reduces the size and weight of the motor. An inboard housing and an outboard housing mechanically support the two stators and are joined together to define an interior cavity. A ring seal is disposed between the two housings to ensure the interior cavity is sealed. Additionally, the two stators may actuate multiple degrees of freedom (DOF) including the rotation of a wheel and actuation of a suspension. |
| US11411445B2 |
Permanent-magnet synchronous motor and electric power steering device
A permanent-magnet synchronous motor and an electric power steering device are driven by a first system including a first armature winding and a first control apparatus and by a second system including a second armature winding and a second control apparatus and are configured in such a way that if one system fails, driving by the one system is stopped but the driving is continued by the other system. |
| US11411443B2 |
Electronic device and method for wirelessly transmitting or receiving power
An electronic device according to various embodiments may be configured to cause a control circuit to: control a first switch, a second switch, or a combination of the first switch and the second switch, in order to electrically connect a ground terminal to a first capacitor, a second capacitor, or a combination of the first capacitor and the second capacitor, while the electronic device operates in a first mode for providing power to a first external electronic device; control the first switch and the second switch in order to electrically disconnect the first capacitor and the second capacitor from the ground terminal, and control the third switch in order to control a path of an electrical signal which passes through the fourth capacitor, while the electronic device operates in a second mode for acquiring power from a second external electronic device. |
| US11411432B2 |
Method for disabling wireless power reception circuit on basis of state of electronic device, and electronic device thereof
An electronic device according to various embodiments of the present invention comprises a wireless power reception circuit and a processor, wherein the processor can be set so as to receive power transmitted from an external electronic device by using the wireless power reception circuit, detect a state related with the reception during the reception of the power, and disable at least a part of the wireless power reception circuit such that the external electronic device stops the transmission when the state satisfies a designated condition. Other examples are also possible. |
| US11411428B2 |
Power converter, power conversion system
In a power converter including: a first DC-DC converter, an inverter, and a control circuit, a second DC-DC converter that controls an input and an output of a power storage unit is connectable to a DC bus. The control circuit deactivates a reverse power flow suppression function for suppressing a reverse power flow from the inverter to a power system when the second DC-DC converter is not connected to the DC bus and activates the reverse power flow suppression function when the second DC-DC converter is connected to the DC bus. |
| US11411425B2 |
Wireless charging device for simultaneously charging a plurality of user terminals by performing tilt function
The present disclosure relates to a wireless charging device capable of efficiently charging one or more user terminals by performing a tilt function with respect to a portion where the user terminal is held. According to an embodiment of the present disclosure, the wireless charging device include a first body, a depression defined in the first body, a terminal holder that is coupled to an inner surface at both sides of the depression using a hinge and rotates with respect to the first body, a wireless charger disposed in the terminal holder, a second body connected to the first body and inclined with respect to the first body, and a display provided in the second body. |
| US11411417B2 |
Rechargeable battery kiosk for light electric vehicles
This disclosure generally relates to a battery kiosk that houses and distributes rechargeable batteries for light electric vehicles. The battery kiosk includes various visual indicators that are activated based on the individual's progress with a rechargeable battery exchange process. |
| US11411415B2 |
Charging apparatus for a cleaner
A charging apparatus includes a main body including a charging electrode for charging a robot cleaner, a sensing unit for sensing that the robot cleaner is docked to the main body, and the robot cleaner is electrically connected to the charging electrode, a power supply unit for supplying charging current to the charging electrode, a measuring unit for measuring the magnitude of the charging current provided to the robot cleaner, and a MICOM for recognizing whether the robot cleaner is docked based on information on the magnitude of the charging current measured in the measuring unit. When the measured magnitude of the charging current is less than the magnitude of a set current, the MICOM transmits a first setting signal to the robot cleaner, and based on whether a second setting signal corresponding to the first setting signal is received, the MICOM checks whether the robot cleaner has been docked. |
| US11411414B2 |
Power supply device that performs malfunctioned determination
There is provided a power supply device including a plurality of battery modules, the battery modules being connected in series with one another according to a gate driving signal from a controller, the power supply device transmitting the gate driving signal from upstream of the series connection toward downstream of the series connection after the gate driving signal is delayed at delay circuits included in the respective battery modules, and returning the gate driving signal to the controller from a most downstream battery module, wherein the power supply device performs malfunction determination of the delay circuits based on a time difference from a transmission time of a signal from the controller to a reception time of the signal. |
| US11411413B2 |
Battery pack charging system having structure capable of preventing overcharging, and vehicle comprising same
A battery pack charging system includes a battery pack comprising a plurality of battery cells; a charging device connected to both electrodes of the battery pack to supply a charging current to the battery pack; a switch connected between the battery pack and the charging device to allow or block a flow of the charging current; and a current blocking member mechanically connected to the switch and configured to turn off the switch by causing a bending deformation when a potential difference formed between both electrodes of the battery pack is equal to or greater than a reference value. |
| US11411412B2 |
Battery charging control base on recurring interactions with an electronic device
An electronic device may include a battery, and a charging system in electronic communication with the battery. The charging system may be configured to initiate a charging of the batter when the battery is in a partially-depleted state. The charging system may then discontinue the charging in response to the battery being charged to the threshold charge value, and may monitor the function of the electronic device to predict an event of the electronic device. After the event is predicted, the charging system may determine when to initiate a recharging process, so that the battery is fully charged when the event occurs. |
| US11411411B2 |
Device and method for balancing an energy storage module
A device balances an energy storage module having multiple energy storage cells connected in series. The device includes: an interface for communication with a monitoring electronics system of the energy storage module; a charge determining device for determining a relative electrical charge quantity based on respective cell voltages and a respective resting voltage characteristic curve for each energy storage cell; a balancing requirement calculation unit for determining a respective relative balancing requirement by forming a difference between the relative electrical charge quantity of a respective energy storage cell and the relative electrical charge quantity of the energy storage cell for which the lowest relative electrical charge quantity was determined, for every energy storage cell with the exception of the energy storage cell for which the lowest relative electrical charge quantity was determined, and for determining an absolute balancing requirement for each energy storage cell; a discharging circuit which is configured to be connected to the energy storage module in such a way that a respective energy storage cell can be separately discharged by the discharging circuit; and a control device that can control the discharging circuit in such a way that the respective determined absolute balancing requirement can be removed from the respective energy storage cells. |
| US11411410B2 |
Charging device
A charging device includes: a power supply circuit including a first inverter connected between a first storage battery and a load, and a second inverter connected between a second storage battery and the load, the power supply circuit being configured to drive the one load; a charging port configured to be connected to an external power supply when the first storage battery and the second storage battery are charged with power from the external power supply; and a relay configured to allow current to bypass the first inverter, the second inverter, and the load between a positive electrode terminal of the charging port and a negative electrode terminal of the charging port, when the first storage battery and the second storage battery are charged with the power from the external power supply. |
| US11411405B2 |
Method of feeding electric power by means of a wind energy system
Provided is a method of feeding electric power at a grid connection point into an electric power grid having a grid voltage using a converter-controlled feeder, in particular using a wind energy system and/or of a storage unit. The method includes feeding the electric power into the electric power grid in a normal operating mode when no grid fault or grid malfunction has been detected in the electric power grid, and switching to a fault mode when a grid fault or grid malfunction has been detected, in which the grid voltage is increased or decreased. In the normal operating mode an active current is fed in in order to feed active electric power into the grid and if the need arises a reactive electric power is additionally fed into the grid by a reactive current. The combination of the active and reactive currents results in an apparent current. |
| US11411403B2 |
Controlling power distribution at deadband states
Aspects of the present invention relate to a method for controlling one or more wind turbine generators. The method comprises: monitoring an electrical parameter of a power network to which the wind turbine generators are connected with respect to a deadband for the electrical parameter; and determining that the monitored electrical parameter is deviating outside of the deadband. In response to determining that the electrical parameter is deviating outside of the deadband, the method comprises: quantifying a severity of the deviation; and selectively implementing a parameter control mode when the quantified severity of the deviation is at or above a threshold level. In the parameter control mode, one or more power set points are determined based on the value of the electrical parameter and are dispatched to control the wind turbine generators. |
| US11411400B2 |
DC power supply system
A DC power supply system includes: a natural energy power generator connected to a DC bus through a first DC-DC converter; a load device connected to the DC bus through a second DC-DC converter; a storage battery connected to the DC bus through a third DC-DC converter and configured to be charged with a generated power when the generated power is larger than a load power and to be discharged to supply power to the load device when the generated power is smaller than the load power; and a power management apparatus that manages operations of the first to third DC-DC converters based on current power generation amount and load power amount, prediction values for future power generation amount and load power amount, a remaining capacity of the storage battery, preset target values for respective blackout rate, battery lifetime, and power suppression rate, and the priorities among the target values. |
| US11411399B2 |
Arrangement and method for a power bus
A method for a direct current (DC) power distribution arrangement and a direct current (DC) power distribution arrangement, comprising a plurality of DC power distribution subsystems. Each DC power distribution subsystem comprises an inverter unit (INU) configured to operate as a subsystem-specific circuit breaker for intercoupling/separating the DC power distribution subsystem to/from the rest of the DC power distribution arrangement. |
| US11411397B2 |
Polarity reversal protection circuit
A polarity reversal protection circuit includes a MOSFET and a turn-off circuit, which turns off the MOSFET in the case of a polarity reversal. The turn-off circuit includes a detector for detecting the case in which the voltage at the source terminal of the MOSFET undershoots the voltage at the drain terminal of said MOSFET. Furthermore, it includes a quick-break switch for turning off the MOSFET in the event of detected voltage undershooting, a comparator for comparing the voltages present at source terminal and drain terminal of the MOSFET after detected voltage undershooting, wherein the output of the comparator is connected to the gate terminal of the MOSFET, a boost converter, a buck converter and a charge pump for voltage supply, and a switch for switching off the comparator. |
| US11411391B2 |
Energy storage system protection system
An energy storage system (ESS) protection system includes: a battery monitoring system (BMS) configured to transmit a protection signal when an internal state or an external state of a battery cell is abnormal; a power conversion system (PCS) connected to the BMS through a hard wire, and configured to receive the protection signal through the hard wire; and an energy management system (EMS) connected between the BMS and the PCS through a universal communication line, and configured to receive the protection signal from the BMS and transmit the protection signal to the PCS. The PCS may be configured to perform an ESS shutdown when the PCS receives the protection signal through the hard wire or the universal communication line. |
| US11411387B2 |
Over/under voltage detection circuit
An over/under voltage protection circuit includes a voltage input terminal, a digital-to analog converter, a comparator, and a control circuit. The comparator includes a first input coupled to an output of the digital-to-analog converter, and a second input coupled to the voltage input terminal. The control circuit includes an output coupled to an input of the digital-to-analog converter, and an input coupled to an output of the comparator. The control circuit is configured to set the digital-to-analog converter to generate an overvoltage fault threshold responsive to the output of the comparator indicating that voltage of a signal at the voltage input terminal exceeds a threshold currently generated by the digital-to-analog converter. |
| US11411382B1 |
Arc flash suppressor, system, and method
An arc flash suppressor, system, and method are disclosed. The arc flash suppressor includes a main processor, a current sensor processor, a voltage sensor processor, a plasma ignition detector, and an arc flash extinguishing circuit. The current sensor processor is configured to detect a slew rate of an input current from a power source. The voltage sensor processor is configured to detect a slew rate of an input voltage from the power source. The main processor is configured to cause the arc flash extinguishing circuit to create a short circuit condition over the power source to extinguish an arc flash upon detection of a critical current slew rate, a critical voltage slew rate, and plasma ignition. |
| US11411378B2 |
Cable screw connection
Disclosed is a cable screw connection with a cable screw connection insert for inserting into a housing opening of a housing having at least two housing shells, and for securing the cable screw connection insert to the housing. The cable screw connection insert includes an insert element which is equipped with a thread on the exterior of the housing, wherein a mating nut sits on the thread such that the cable screw connection insert can be fixed to the housing by the screw connection of the mating nut against the outer wall in the surroundings of the housing opening. The flange is equipped with a contour which corresponds to an inner contour of at least one of the housing shells in a formfitting and rotationally fixed manner. |
| US11411376B2 |
Pull-in head assembly
A pull-in head assembly (8) for releasably connecting a pulling arrangement (112) to an elongate flexible structure (4, 6). The pull-in head assembly 8 comprises a pull-in head having a body (30) which defines a pulling axis X of the pull-in head. The body (30) has a front end and a rear end and a bore (48) which extends through the body (30) along the pulling axis X. The bore (48) is configured such that a pulling line (28) can be threaded through the body (30). |
| US11411375B2 |
Edge-emitting laser bar
An edge emitting laser bar is disclosed. In an embodiment an edge-emitting laser bar includes an AlInGaN-based semiconductor layer sequence having a contact side and an active layer configured to generate laser radiation, a plurality of individual emitters arranged next to each other and spaced apart from one another in a lateral transverse direction, each emitter configured to emit laser radiation and a plurality of contact elements arranged next to each other and spaced apart from one another in the lateral transverse direction on the contact side for making electrical contact with the individual emitters, each contact element being assigned to an individual emitter, wherein each contact element is electrically conductively coupled to the semiconductor layer sequence via a contiguous contact region of the contact side so that a current flow between the semiconductor layer sequence and the contact element is possible via the contact region. |
| US11411369B2 |
Method for manufacturing semiconductor device
A method for manufacturing a semiconductor device includes: heating solder to wetly spread toward a first end face or a second end face of a submount substrate under restriction on the wet spreading by a burr to form an extending part, so that the extending part directly connects a laser chip and a barrier layer. |
| US11411368B2 |
Technique of high-speed magnetic recording based on manipulating pinning layer in magnetic tunnel junction-based memory by using terahertz magnon laser
An apparatus for novel technique of high-speed magnetic recording based on manipulating pinning layer in magnetic tunnel junction-based memory by using terahertz magnon laser is provided. The apparatus comprises a terahertz writing head configured to generate a tunable terahertz writing signal and a memory cell including a spacer that comprises a thickness configured based on Ruderman-Kittel-Kasuya-Yosida (RKKY) interaction. The memory cell comprises two separate memory states: a first binary state and a second binary state; wherein the first binary memory state corresponds to a ferromagnetic sign of the Ruderman-Kittel-Kasuya-Yosida (RKKY) interaction corresponding to a first thickness value of the spacer; and wherein the second binary memory state corresponds to an antiferromagnetic sign of the Ruderman-Kittel-Kasuya-Yosida (RKKY) interaction corresponding to a second thickness value of the spacer. The thickness of the spacer is manipulated by the tunable terahertz writing signal. |
| US11411366B2 |
Combined laser architecture using wavelength multiplexed seed source
A WDM seed beam source for a fiber laser amplifier system that includes a number of master oscillators that generate seed beams at different wavelengths and a spectral multiplexer that multiplexes all of the seed beams onto a single fiber. An EOM modulates the combined seed beams on the single fiber and a spectral demultiplexer then separates the modulated seed beams into their constituent wavelengths on separate fibers before the seed beams are amplified and spectrally combined. The fiber laser amplifier system includes a separate fiber amplifier that amplifies the separated seed beams, an emitter array that directs the amplified beams into free space, beam collimating optics that focuses the uncombined beams, and an SBC grating responsive to the collimated uncombined beams that spatially combines the collimated uncombined beams. |
| US11411365B2 |
System-level optical amplifier efficiency performance metric
Systems and methods for a system-level Erbium-Doped Fiber Amplifier (EDFA) optical amplifier efficiency metric. The efficiency metric is a single metric that summarizes optical amplifier behavior and has a predictable behavior over various different optical amplifier settings. Specifically, the efficiency metric is simple and elegant. The simplicity is based on the fact the efficiency metric is determined from available data in an optical amplifier, not requiring external monitoring equipment, dithering, etc. The elegance is based on the fact the efficiency metric covers different optical amplifier settings, multiple pumps, etc. and is shown to reflect degradation with these differences in real-world systems accurately. Specifically, the efficiency metric is designed to reflect health in a multiple pump optical amplifier, providing a single value that represents the total pump currents across all of the multiple pumps. |
| US11411364B2 |
Line narrowing module, gas laser apparatus, and electronic device manufacturing method
A line narrowing module includes a prism including an entrance side surface that light enters, an exit side surface from which the light is emitted, and a bottom surface, and configured to wavelength-disperse the light having entered the entrance side surface and to emit the light from the exit side surface; a holder portion having a stationary surface on which the bottom surface of the prism is secured; a rotary mechanism portion including a rotary stage on which the holder portion is secured, the rotary stage being configured to rotate the prism around an axis perpendicular to a dispersion plane of the light emitted from the prism; a drive unit configured to rotate the rotary stage; and a grating configured to reflect the light emitted from the prism, centroids of the prism, the holder portion, and the rotary stage being located on the axis. |
| US11411363B2 |
Method for manufacturing an electrical contact
Electrical contact for an electrical connector, produced by cutting and bending at least one strip of electrically conducting material. This electrical contact comprises a first wall itself comprising an edge that is adjacent to an edge of a second wall. The first wall has at least one cutout, open onto the edge of the first wall. The second wall has at least one tooth projecting from the edge of the second wall. The tooth is forcibly inserted into the cutout and extends in the plane of the first wall. |
| US11411362B2 |
Compression tool with reversible block
A compression tool for fastening a cable to a connector comprising an elongated tool frame, an anvil secured to one end of the tool frame, a compression plunger slidable along a portion of the tool frame, a handle set adapted to move the compression plunger toward and away from the anvil and a spacer block for securing the connector a distance from the anvil. The handle set may include a first handle movable from a first position wherein the plunger is a first distance from the anvil to a second position wherein the plunger is a second distance from the anvil. The spacer block may include a first end and a second end having a different depth from the first end and be rotatable so that the first end when rotated to the active position secures the connector a first distance from the anvil and the second end, when rotated to the active position secures the connector a second distance from the anvil. |
| US11411361B2 |
Tool for installing electrical connectors with an extendible reach tool
The present disclosure provides embodiments of a tool adapted to electrically and mechanically connect an electrical connector to electrical conductors using an extendable reach tool. The tool permits one or more lineman to remotely connect an electrical connector to electrical conductors. The tool includes a glide track assembly, a connector holding member, a gear assembly and a fastener head driver. |
| US11411358B2 |
Outlet connection schema for a PDU
A power distribution unit including an elongate housing and a power input penetrating said elongate housing. The power input can comprise a ground buss wire, a neutral buss wire and at least one line buss wire. A plurality of electrical outlets can be disposed along the housing. Each electrical outlet can comprise a receptacle and a plurality of spaced apart outlet pins protruding from the receptacle. The plurality of outlet pins can include a ground outlet pin receiving the ground buss wire, a neutral outlet pin receiving the neutral buss wire, and a line outlet pin receiving the line buss wire. |
| US11411356B2 |
Electrical cable connector assembly with a grounding layer clamped to a circuit board
A cable connector assembly includes a circuit board, a plurality of grounding elements and a plurality of cables. Rear ends of an upper surface and a lower surface of the circuit board are equipped with a plurality of contact pads and a plurality of grounding pads. The plurality of grounding elements are soldered to the plurality of the grounding pads. Two sides of each grounding element have two clamping portions. Each cable includes an inner conductor, an inner insulating layer, a shielding layer and an outer insulating layer arranged in an inside-to-outside direction. The inner conductors of the plurality of the cables are electrically connected with the plurality of the contact pads, the shielding layer of each cable is mounted in one grounding element. The shielding layer of each cable is clamped between the two clamping portions of the one grounding element. |
| US11411355B2 |
Electrical connector assembly
A receptacle connector for mating with a plug connector having a mating tongue and a latch thereof, includes an insulative housing defining a mating slot extending along a longitudinal direction to receive the mating tongue of the plug connector, and an outer metallic shield defining a primary space to receive the housing and a secondary space communicatively beside the primary space to receive the latch of the plug connector. A plurality of contacts are disposed in the housing to mechanically and electrically connect to the mating tongue. An inner metallic shield is attached upon a long side of the housing to separate the primary space and the secondary space from each other in a transverse direction perpendicular to the longitudinal direction. |
| US11411353B2 |
Board-connecting electric connector device
Electromagnetic shielding about both of electric connectors, which are in a mutually mated state, can be sufficiently carried out by a simple configuration. Shield wall portions composed of electrically-conductive members opposed to contact connecting portions (board connecting portions) of a plurality of contact members arranged in multipolar shapes are provided; electromagnetic shielding functions with respect to the contact connecting portions in the respective electric connectors are obtained well by the respective shield wall portions; and, when both of the electric connectors are mated with each other, the shield wall portions are configured to be in an inner/outer double disposition relation in which they are opposed to each other and efficiently block the gaps between the shield wall portions and wiring boards so that sufficient EMI measures can be expected. |
| US11411351B2 |
Interposer having shielded contacts and traces
A separable and reconnectable connector for semiconductor devices is provided that is scalable for devices having very small contact pitch. Connectors of the present disclosure include signal pins shielded by pins electrically-coupled to ground. Embodiments provide one or more signal pins in a contact array electrically-shielded by at least one ground pin coupled to a ground plane. Embodiments thereby provide signal pins, either single-ended or a differential pair, usable to transmit signals with reduced noise or cross-talk and thus improved signal integrity. Embodiments further provide inner ground planes coupled to connector ground pins to shield pairs of differential signal pins without increasing the size of the connector. Inner grounding layers can be formed within isolation substrates incorporated into connector embodiments between adjacent pairs of signal pins. These buried ground layers provide additional crosstalk isolation in close proximity to signal pins, resulting in improved signal integrity in a significantly reduced space. |
| US11411348B2 |
Stress mechanism and connector including the same
A stress mechanism and a connector including the stress mechanism are provided. When a stress portion of a stress component of the stress mechanism is loaded to a lateral stress or a longitudinal stress, the extent of deformation of a bent structure of the stress portion can be reduced so as to prevent the stress portion from producing yield deformation. This advantageously prolongs lifetime of the connector formed by the stress mechanism, and assures desirable electrical connection performance between the connector and an external device. |
| US11411347B2 |
Coaxial connector and board-to-board connector assembly
In a coaxial connector and a board-to-board connector assembly, the coaxial connector includes: a first coaxial connector portion including a first outer conductor, a first inner conductor, and a first dielectric spacer disposed between the first outer conductor and the first inner conductor; a second coaxial connector portion including a second outer conductor, a second inner conductor, and a second dielectric spacer disposed between the second outer conductor and the second inner conductor; and a first elastic element disposed between the first outer conductor of the first coaxial connector portion and the second outer conductor of the second coaxial connector portion. The first elastic element is configured such that the second coaxial connector portion is floatable axially and radially relative to the first coaxial connector portion, and the first elastic element is adapted to form an electrical connection between the first outer conductor and the second outer conductor. |
| US11411341B2 |
Metallic outer shell of an electrical connector having curvilinear flaps and interposed springy flaps
An electrical connector includes: an insulative housing having a base; a center conductor secured to the insulative housing; and a metallic shell secured to the insulative housing and surrounding the center conductor, the metallic shell including a sleeve having a lower part secured to the base of the insulative housing and an upper part extending upwardly beyond the base of the insulative housing; wherein the upper part includes plural curvilinear flaps coplanar with the lower part of the sleeve and plural springy flaps interposed between adjacent curvilinear flaps and extending upwardly beyond the curvilinear flaps. |
| US11411336B2 |
Spring-actuated electrical connector for high-power applications
A spring-actuated electrical connector assembly for electrically and mechanically connecting a device to a power source in high-power, high-voltage applications is disclosed. The connector assembly includes a first connector with an internal receiver, a plurality of side walls, and at least one contact beam. The contact beam integrally extends to an outer surface of the side wall and includes a free end that extends inward of the outer surface of the side wall. An internal spring member is dimensioned to reside within the receiver of the first connector. This assembly also includes a second electrically conductive connector with a receptacle dimensioned to receive both the first connector and the spring member to define a connected position during operation of the device. In the connected position, at least one spring arm of the spring member exerts an outwardly directed force on the contact beam of the first connector to outwardly displace the contact beam into engagement with the second connector. |
| US11411331B2 |
Hybrid type wire-to-wire connector structure and power supply device having the same
A power supply device includes a power supply housing having an accommodating space and an accommodating opening, a hybrid wire-to-wire connector structure and a circuit board disposed in the accommodating space. The hybrid wire-to-wire connector structure includes a connecting seat and an adapter seat. The connecting seat has a signal line terminal and a power line terminal. The connecting seat is disposed in the accommodating opening through an annular rib. The adapter seat has a signal conduction end and a power conduction end. The adapter seat has formed a hook corresponding to the annular rib. The connecting seat and the adapter seat are combined through the signal conduction end inserted in the signal line terminal, the power conduction end inserted in the power line terminal and the hook clamped with the annular rib. Therefore, the power and signal connectors are integrated so as to simplify the assembly. |
| US11411330B2 |
Connector
A connector includes: a number of busbars; a housing holding of the busbars; and a cover mounted on the housing. The busbars each have a fastening target portion to connect a terminal metal fitting by using a bolt. The fastening target portion is housed in a housing room, and a number of the housing rooms is defined between the housing and the cover. One of the housing rooms corresponding to the fastening target portion of one of the busbars and another of the housing rooms corresponding to the fastening target portion of another of the busbars are separated with a partition wall, and at least part of the partition wall has a liquid-tight portion formed by engaging a projection of one of the housing and the cover with a recess of the other of the housing and the cover. |
| US11411327B1 |
Dual-beam antenna and hybrid antenna
A dual-beam antenna includes an element array and a feed network. The element array includes a first element set and a second element set. The first element set includes at least three first elements arranged in a row. The second element set includes at least three second elements arranged in a row. The at least three first elements of the first element set and the at least three second elements of the second element set are independent of each other. The feed network includes a first feed network and a second feed network. The first feed network includes a first cable set and a first power divider. The second feed network includes a second cable set and a second power divider. |
| US11411326B2 |
Broadbeam dielectric resonator antenna
A dielectric resonator antenna and a dielectric resonator antenna array. The dielectric resonator antenna includes a ground plane, a dielectric resonator element operably coupled with the ground plane, and a feed network operably coupled with the dielectric resonator element for exciting the dielectric resonator antenna. The dielectric resonator element includes a first portion with a first shape and a second portion with a second shape different from the first shape. The dielectric resonator antenna, when excited, is arranged to provide wide half-power beam-widths in both E-plane and H-plane. |
| US11411322B2 |
Concentric pentagonal slot based MIMO antenna system
Aspects of the disclosure provide an antenna system. The antenna system can include a dielectric substrate that has a top surface and a bottom surface covered by a ground plane, and four identical antenna elements symmetrically distributed on each corner of the bottom surface. Each antenna element can have a concentric-pentagonal-slot-based structure that is etched out of the ground plane, and includes an outer pentagonal slot and an inner pentagonal slot. Each side of the outer pentagonal slot can be parallel with a corresponding side of the inner pentagonal slot. |
| US11411317B2 |
Dual band antenna
The present embodiments provide a dual band antenna which divides a feed signal into two levels by a feed layer in which two layers are stacked and disposes an antenna slot in an antenna layer connected to a feed layer in a dual mode to minimize a space for an antenna. |
| US11411316B2 |
Anti-jamming and reduced interference global positioning system receiver methods and devices
Global navigation satellite system (GNSS) radio frequency signals broadcast from geo-stationary satellites 20,000 km above the earth when received by GNSS receivers are fundamentally weak. Accordingly, these GNSS receivers are vulnerable to accidental and deliberate interference from a range of manmade sources as well as natural sources. Existing anti-jamming technologies such as controlled reception pattern antennas, adaptive antennas, null-steering antennas, and beamforming antennas etc. are expensive and incompatible with many lower cost and footprint limited applications. However, in many applications the GNSS antenna is mounted upon a fixed or mobile element such that accidental and intentional jammers tend to be in the plane of the antenna or below it. Accordingly, there are presented designs and techniques to improve the anti-jamming or interference performance of GNSS receivers by further reducing the responsivity of the GNSS receiver to signals in-plane or below the plane of the antenna. |
| US11411315B2 |
Antenna module and antenna device
An antenna module includes a plurality of antenna devices. Each of the plurality of antenna devices includes a dielectric substrate on which an antenna element is placed and a feed line that transmits a radio frequency signal from a RFIC to the antenna element. The feed line is divided within the dielectric substrate and transmits a radio frequency signal to a feed point (122A-1) and a feed point (122A-2) of the antenna element, a phase of the radio frequency signal to the feed point (122A-1) and a phase of the radio frequency signal to the feed point (122A-2) being substantially opposite to one another. |
| US11411313B2 |
Electronic device and communication method
An electronic device comprises first and second array antennas, and first and second wireless communication devices. An orientation of the first array antenna is different from an orientation of the second array antenna. A frequency band of the second wireless communication device is lower than a frequency band of the first wireless communication device. An electromagnetic wave power of the second wireless communication device is larger than an electromagnetic wave power of the first wireless communication device. A size or distance of antenna elements of the second array antenna is larger than a size or distance of antenna elements of the first array antenna. |
| US11411312B2 |
Phase adjusting circuit and phase adjusting method
A phase adjusting circuit is provided, including a signal generation circuit receiving a frequency adjusting signal and generating a reference signal having a frequency corresponding to the frequency adjusting signal; a first path receiving the reference signal and providing a first signal; a second path receiving the reference signal and providing a second signal, and time for the reference signal passing through the second path is different from time for the reference passing through the first path; a phase shifter disposed on the first path or the second path and shifting a phase of the reference signal based on a phase adjusting signal; a phase difference detection circuit detecting a phase difference between the first and the second signals; and an adjusting signal generation circuit generating the frequency adjusting signal and the phase adjusting signal based on the phase difference so that the phase difference becomes a target value. |
| US11411311B2 |
System and method for measuring a plurality of RF signal paths
An embodiment method for signal path measurement includes providing a first signal at a common node coupled to a plurality of signal paths that each includes a respective phase rotation circuit. The method also includes providing a second signal, over a first test path, to a first node coupled to a first signal path of the plurality of signal paths, providing the second signal, over a second test path, to a second node coupled to a second signal path of the plurality of signal paths, selecting a signal path from the plurality of signal paths, transmitting, over the selected signal path, one of the first signal and the second signal, and mixing the first signal with the second signal to obtain a measurement signal of the selected signal path. A difference in phase delay between the second test path and the first test path includes a first known phase delay. |
| US11411308B2 |
Isolation structure of a large array antenna and an antenna
The present disclosure discloses an isolation structure of a large array antenna and an antenna. According to an embodiment of the present disclosure, a boundary plate is disposed between array elements of a large array antenna. The boundary plate has hollowed-out areas and is perpendicular to a plane where the array elements are located. The hollowed-out areas of the boundary plate form sub-areas with staggered patterns in the boundary plate to allow a coupling path of signals of array elements generated at the boundary plate and a radiation path of the array elements to counteract with each other, so as to weaken the coupling between the array elements and improve the isolation between the array elements, especially the isolation between 3-5 db array elements. |
| US11411305B2 |
System and apparatus for driving antenna
A multiple-antenna positioning system with a single drive element, providing reduced weight and complexity over systems that have a drive element for each antenna. In certain examples, each antenna can be coupled with a rotating spindle, with each antenna spindle being coupled with a pair of link arms. By driving a single drive spindle, each of the antenna spindles in the system can be rotated by the associated pair of link arms. The link arms can have an adjustable length, such as through a turnbuckle mechanism, to reduce backlash in the system, and in some examples can apply a preload to the system. By reducing backlash, the multiple antenna positioning system can have improved responsiveness to a rotation of the single drive element, as well as improved stability of the positioning of each antenna when the drive element is held in a fixed position. |
| US11411303B2 |
Antenna assembly for a wrist worn device
The invention concerns an antenna assembly for a wearable or wrist worn device, the device being suitable for underwater communications, comprising a casing, comprising an inductive coil antenna, wherein the inductive coil antenna is attachable to a housing and said housing, comprising a first radio operating on a first frequency band for communication underwater and a second radio operating on a second frequency band for communication over air interface, wherein the second frequency band is higher than the first frequency band, and the first and the second radio operate using the inductive coil antenna when said casing is attached to said housing. |
| US11411292B2 |
Waveguide device, electromagnetic radiation confinement device, antenna device, microwave chemical reaction device, and radar device
A waveguide device includes a first electrical conductor including a first electrically conductive surface extending along first and second directions, a second electrical conductor including a second electrically conductive surface opposing the first electrically conductive surface, a waveguide located between the first electrical conductor and the second electrical conductor and extending along the first direction, the waveguide including an electrically-conductive waveguide surface opposing the first electrically conductive surface, and a plurality of electrically-conductive rod rows located on opposite sides of the waveguide, each rod row including a plurality of electrically conductive rods arranged along the first direction. At least one of the first electrical conductor and the second electrical conductor includes at least one hole. |
| US11411288B2 |
Battery pack
A battery pack includes stacked battery cells, each battery cell including a first outer surface having an electrode tab protruding therefrom and a second outer surface that is a side surface intersecting the first outer surface, and a first case that surrounds the battery cells along the first outer surface and the second outer surface. An opening exposing the electrode tab is formed in the first case. The opening includes an inner surface that faces a side surface of all of the electrode tabs exposed through the opening and that is capable of abutting against the electrode tabs when the battery cells are inserted in the first case. |
| US11411287B2 |
Three-electrode-system-type electrode potential measurement device including short-circuit prevention member
Disclosed herein is a three-electrode-system-type electrode potential measurement device for measuring the electrode potential of a cylindrical battery cell in which a beading portion is in a divided condition, the beading portion provided between a top cap assembly and a battery case, a first electrode terminal of the cylindrical battery cell located at the top cap assembly, and a second electrode terminal of the cylindrical battery cell located at the battery case, the electrode potential measurement device including a working electrode connection unit connected to one of the first electrode terminal or the second electrode terminal; a counter electrode connection unit connected to the other of the first electrode terminal or the second electrode terminal; a reference electrode connection unit connected to a reference electrode; a measurement unit connected to the working electrode connection unit; and a short-circuit prevention member located between the top cap assembly and the battery case. |
| US11411285B2 |
Electrode assemby and radical unit for the same
According to the present disclosure, there is provided an electrode assembly comprising (a) a structure in which one kind of radical unit is repeatedly disposed, the one kind of radical unit having a same number of electrodes and separators which are alternately disposed and integrally combined, or (b) a structure in which at least two kinds of radical units are disposed in a predetermined order, the at least two kinds of radical units each having a same number of electrodes and separators which are alternately disposed and integrally combined. |
| US11411282B2 |
Porous separator including porous layer including plate-type inorganic particles and porous coating layer including spherical inorganic particles and electrochemical device including the same
A porous separator including a porous layer including plate-type inorganic particles, and a first binder polymer located on a part of or all surfaces of the plate-type inorganic particles, wherein the first binder polymer connects and fixes the plate-type inorganic particles, and an electrochemical device including the same. |
| US11411281B2 |
Multi-layered composite functional separator for lithium-ion battery
A multi-layer composite functional separator for lithium ion battery includes four layers. Layer A is a base separator. Layer B is a porous structural layer composed of insulating inorganic compounds or high temperature resistant polymers. Layer C is a porous layer composed of polymer microspheres with temperature-induced expansion characteristics. Layer D is a thermoplastic resin with a melting point of 80-110° C. and a crystallinity of <50%. Layer B, Layer C and Layer D are sequentially attached on either or both sides of Layer A. Compared with the existing lithium-ion battery separator, the multi-Layer Composite functional separator has excellent heat resistance. The thermal shrinkage rate is less than 1% when heated for less than one hour at 200° C. Inclusion of organic polymer microspheres produces thermal closure of the batteries, which improves the safety of the batteries. |
| US11411280B2 |
Absorbent glass mat battery
A lead-acid battery is disclosed. The lead-acid storage battery has a container with a cover, the container including one or more compartments. One or more cell elements are provided in the one or more compartments. The one or more cell elements include a positive plate, the positive plate having a positive grid and a positive electrochemically active material on the positive grid; a negative plate, the negative plate having a negative grid and a negative electrochemically active material on the negative grid, wherein the negative electrochemically active material comprises barium sulfate and an organic expander; and a separator between the positive plate and the negative plate. Electrolyte is provided within the container. One or more terminal posts extend from the cover and are electrically coupled to the one or more cell elements. |
| US11411279B2 |
Power storage module and method for manufacturing power storage module
A power storage module 12 according to a first aspect includes: a laminated body 30 in which bipolar electrodes 32 including an electrode plate 34, a positive electrode 36, and a negative electrode 38, are laminated; a frame body 50 provided with an opening 50a communicated with a plurality of internal spaces V; and a pressure adjustment valve 60 connected to the opening 50a. The pressure adjustment valve 60 includes a base member 70 connected to the opening 50a and provided with a plurality of communication holes 74 respectively communicated with the plurality of internal spaces V, a valve body 80 arranged to shut opening ends 76a of the plurality of communication holes 74, and a cover member 90 pressing the valve body 80 against the base member 70. |
| US11411270B2 |
Battery system and moving body
While lithium-air batteries have been known, in which oxygen in the air is used as a positive electrode active material and lithium is used as a negative electrode active material, it is desired to provide a battery system capable of efficient utilization of oxygen. A battery system is provided, including: a lithium-oxygen battery; an oxygen compressing unit configured to compress oxygen released from the lithium-oxygen battery; a storage unit configured to store oxygen compressed by the oxygen compressing unit; and an oxygen supplying unit configured to supply oxygen stored in the storage unit to the lithium-oxygen battery. |
| US11411269B2 |
High-voltage battery for a motor vehicle, and motor vehicle
A high-voltage battery for a motor vehicle includes at least one battery module including a cell block with stacked battery cells, wherein the battery cells are embodied as solid-body cells, the internal resistance of which decreases as the temperature rises, a battery housing having a receiving space for receiving the at least one battery module, and a heat-insulating holding device for holding the at least one battery module in the receiving space. The heat-insulating holding device is designed to minimize heat exchange between the at least one battery module and the battery housing for preventing cooling of the battery cells. A motor vehicle with the high-voltage battery is also provided. |
| US11411265B2 |
Cover for electrically coupling multiple storage cells of an electrical energy storage module
A cover electrically couples multiple storage cells of an electrical energy storage module. The cover has electrically conductive contact sockets which are embedded in an electrically insulating material of the cover and taper inwards on their insides, and into which terminals of the storage cells can be inserted to make electrical contact. Two connections are provided, one of which forms a positive terminal and the other of which forms a negative terminal of the electrically coupled storage cells. Multiple conductors electrically couple the storage cells, in particular for coupling the storage cells in series, in a predefined manner. The conductors are completely accommodated inside the cover, and the cover can be mounted on the storage cells such that it can be detached non-destructively. |
| US11411263B2 |
Thermal management and/or EMI mitigation materials including coated fillers
Disclosed are exemplary embodiments of thermal management and/or electromagnetic interference (EMI) mitigation materials including coated fillers (e.g., coated thermally-conductive, electrically-conductive, dielectric absorbing, and/or electromagnetic wave absorbing particles, sand particles coated with a binder, other coated functional fillers, combinations thereof, etc.). For example, a thermal management and/or EMI mitigation material may comprise a thermal interface material (TIM) including one or more coated fillers (e.g., coated thermally-conductive particles, sand particles coated with a binder, etc.), whereby the TIM is suitable for providing a thermal management solution for one or more batteries and/or battery packs (e.g., a battery pack for electric vehicle, etc.), or other device(s), etc. |
| US11411254B2 |
Molten salt battery with solid metal cathode
The present disclosure provides an energy storage device comprising at least one electrochemical cell comprising a negative current collector, a negative electrode in electrical communication with the negative current collector, an electrolyte in electrical communication with the negative electrode, a positive current collector, and a positive electrode in electrical communication with the positive current collector and electrolyte. The positive electrode comprises a material that is solid at the operating temperature of the energy storage device. |
| US11411253B2 |
Apparatus, systems and methods for the production of electrodes, electrode stacks and batteries
A process for merging webs for the production of an electrode assembly for a secondary battery, the process comprising: moving a first web comprising a population of first components for electrode sub-units, the first components delineated by corresponding weakened patterns, and a population of first conveying features. Moving a second web comprising a population of second components for the electrode sub-units, the second components delineated by corresponding weakened patterns, and a population of second conveying features. Conveying a receiving member, the receiving member comprising a plurality of projections. Receiving the first web on the receiving member. Overlaying, the second web on the first web such that the first components are aligned with the second components and the conveying features of the second web are engaged by the plurality of projections on the receiving member. The second web merge location being spaced from the first web merge location. |
| US11411244B2 |
All-solid secondary battery
A solid electrolyte according to an embodiment includes a lithium-containing phosphoric acid compound with a cubic crystal structure. |
| US11411241B2 |
Secondary battery
A secondary battery in which an electrode assembly including positive electrodes, negative electrodes, and separators disposed between the positive electrodes and the negative electrodes, and an electrolyte are housed in an exterior body. The electrode assembly has a step structure including a first region having a relatively high cross-sectional height and a second region having a relatively low cross-sectional height adjacent to the first region. The electrode assembly includes at least one of a positive electrode side connecting portion and a negative electrode side connecting portion in the first region. At least one of a positive electrode side extended portion and a negative electrode side extended portion in the second region is configured to be electrically connected to an external terminal. |
| US11411239B2 |
Fuel cell system
A fuel cell system includes at least one pressure reducing valve connected to a downstream side of a hydrogen gas tank, a hydrogen gas flow path including a first flow path connected to a downstream side of the pressure reducing valve and a plurality of second flow paths connected to a downstream side of the first flow path and branched from the first flow path, a plurality of injector units, each of which is connected to each of the second flow paths, a plurality of fuel cell stacks, each of which is connected to each of the injector units, and a control unit controlling opening and closing of the injector units. The control unit sets valve closing periods of the injector units to periods deviating from each other such that at least one of the injector units is always opened when the fuel cell system satisfies a predetermined operating condition. |
| US11411234B2 |
Fuel cell system and method for detecting abnormality of fuel cell system
The present disclosure relates to a fuel cell system. In abnormality detection control, a control unit of the fuel cell system obtains a maximum filling pressure that is a maximum value of the pressure in a filling flow path during filling, and determines that both of first and second pressure sensors are normal when the difference between a supply start pressure and the maximum filling pressure is equal to or smaller than a reference value. When this difference is larger than the reference value, the control unit determines that there is a possibility that at least one of the first and second pressure sensors may be abnormal. The supply start pressure is a detection value of the second pressure sensor at the time when supply of fuel gas to a fuel cell is started for the first time after filling of a fuel tank with the fuel gas is finished. |
| US11411231B2 |
Auxiliary electrode mediated membrane-free redox electrochemical cell for energy storage
The invention provides a membrane-free redox cell utilizing auxiliary electrodes that facilitate fast charging and discharging of anolyte and catholyte for electrochemical energy storage. The anode and cathode chambers are ionically separated, and electrically connected through a conductor joining auxiliary electrodes comprised of a redox material. In use, charging/discharging of the galvanic cell takes place between primary electrodes, and the redox material is immersed in the electrolyte in both anode and cathode chambers. |
| US11411230B2 |
Fuel cell system
A gas liquid separator of a fuel cell system includes a first gas liquid separation chamber capable of storing water content separated from an oxygen-containing exhaust gas, a second gas liquid separation chamber positioned above the first gas liquid separation chamber, and connected to the first gas liquid separation chamber, an inlet, an outlet, and a gas inlet channel for guiding a dry gas into the first gas liquid separation chamber. A gas inlet section forming the gas inlet channel includes an inner protrusion protruding into an upper space of the first gas liquid separation chamber, and a bottom surface of the first gas liquid separation chamber is inclined downward in a direction in which the inner protrusion extends. |
| US11411228B2 |
Heat exchanger for a cooling circuit
A heat exchanger for a cooling circuit which is flowed through by an aqueous temperature-control fluid may include at least two channel bodies, through which a flow path of the temperature-control fluid leads; at least one tank, which has a base and through which the flow path leads; and at least one ion exchange structure having ion-exchanging fibres for reducing ions in the temperature-control fluid. The at least two channel bodies may be fluidically connected with the at least one tank on a longitudinal end side via the base of the at least one tank. |
| US11411225B2 |
Chambered frame insert
A chambered frame insert (2) for an electrolyte chamber of a battery (200) includes a plurality of ribs (4) laterally and defining a plurality of chambers (6), and a plurality of voids (8) each formed in a corresponding rib and configured to allow gas to travel between the plurality of chambers. The plurality of ribs are angled with respect to a horizontal lateral axis (H) of the frame insert. |
| US11411217B2 |
Positive electrode active material and secondary cell comprising the positive electrode active material
The positive electrode active material for a secondary cell disclosed herein comprises a base portion including a compound capable of occluding and releasing charge carriers; an electron conductor disposed on at least a part of a surface of the base portion; and a dielectric disposed on at least a part of the surface of the base portion. |
| US11411209B2 |
Method for manufacturing storage battery electrode, storage battery electrode, storage battery, and electronic device
To provide a method for forming a storage battery electrode including an active material layer with high density in which the proportion of conductive additive is low and the proportion of the active material is high. To provide a storage battery having a higher capacity per unit volume of an electrode with the use of a storage battery electrode formed by the formation method. A method for forming a storage battery electrode includes the steps of forming a mixture including an active material, graphene oxide, and a binder; providing a mixture over a current collector; and immersing the mixture provided over the current collector in a polar solvent containing a reducer, so that the graphene oxide is reduced. |
| US11411208B2 |
Manufacturing method of light-emitting device, light-emitting device, module, and electronic device
A highly reliable light-emitting device is provided. A yield in a manufacturing process of a light-emitting device is increased. A light-emitting device is provided in which a non-light-emitting portion having a frame-like shape outside a light-emitting portion includes a portion thinner than the light-emitting portion. A light-emitting element and a bonding layer are formed over a substrate. The light-emitting element is sealed by overlapping a pair of substrates and curing the bonding layer. Then, while the cured bonding layer is heated, pressure is applied to at least a portion of the non-light-emitting portion with a member having a projection. |
| US11411207B2 |
Display panel and method of manufacturing same
A display panel and a method of manufacturing the display panel are provided. The display panel includes an array substrate, a pixel definition layer, and spacers. Each of spacers includes a bottom surface and a top surface. A cross-sectional area of the top surface is less than a cross-sectional area of the bottom surface. A horizontal distance from a center to a side of the spacer gradually increases from the top surface to the bottom surface. Moreover, holes of the mask plate corresponding to positions of the spacers are defined, which ensures accuracy of photolithography and display effect of the display panel. |
| US11411206B2 |
Circularly polarizing plate
The present application relates to a circularly polarizing plate and a use thereof. The present application can provide a circularly polarizing plate, which can be applied to a display device such as an organic light emitting display device to minimize blocking of light in the visible light region affecting image quality while blocking harmful ultraviolet rays appropriately and also has excellent durability. In addition, the present application can provide a circularly polarizing plate having excellent compensation characteristics at a viewing angle while ensuring process simplification and cost competitiveness. |
| US11411203B2 |
Barrier film, organic el device, flexible substrate, and method for manufacturing barrier film
An organic EL device including a first barrier film that contains primarily silicon nitride, a second barrier film that contains primarily silicon nitride, an organic EL element that is disposed between the first barrier film and the second barrier film, a first flexible substrate that is disposed opposite the organic EL element with the first barrier film interposed therebetween, a second flexible substrate that is disposed opposite the organic EL element with the second barrier film interposed therebetween, and a third barrier film that is disposed between the second barrier film and the organic EL element, and contains primarily silicon nitride. |
| US11411198B2 |
Electronic device
An electronic device having an active region and a non-active region includes a first substrate, a second substrate, and a sealing layer. The first substrate includes a plurality of light-emitting units in the active region. The second substrate includes a plurality of light conversion units in the active region. The sealing layer is disposed between the first substrate and the second substrate, on the active region and the non-active region. |
| US11411194B2 |
Light-emitting device
A light-emitting device (20) includes a first light-emitting member (10a) and a second light-emitting member (10b). Each of the first light-emitting member (10a) and the second light-emitting member (10b) includes a first surface (12) and a second surface (14), and light is emitted from the first surface (12). The first light-emitting member (10a) includes a first region (16a) and a second region (16b), the first region (16a) of the first light-emitting member (10a) being located on the second surface (14) side of the second light-emitting member (10b) and the second region (16b) of the first light-emitting member (10a) being located on the first surface (12) side of the second light-emitting member (10b). |
| US11411193B2 |
Organic light emitting element, comprising at least first and second light emitting layers with satisfying lowest unoccupied molecular orbital (LUMO) and highest occupied molecular orbital (HOMO) relations
An organic light emitting element includes, in sequence, an anode, a first light emitting layer, a second light emitting layer, and a cathode. The first light emitting layer includes a first compound and a first light emitting material. The second light emitting layer includes a second compound and a second light emitting material having an energy gap different from an energy gap of the first light emitting material. The organic light emitting element satisfies relations (a) to (c). LUMO(H1)>LUMO(D1) (a) LUMO(H2)>LUMO(D2) (b) LUMO(H2)−LUMO(D2)>LUMO(H1)−LUMO(D1) (c) Where LUMO (H1), LUMO (D1), LUMO (H2), and LUMO (D2) represent a LUMO level of the first compound, a LUMO level of the first light emitting material, a LUMO level of the second compound, and a LUMO level of the second light emitting material, respectively. |
| US11411192B2 |
Devices and sensors and electronic devices
A device includes a first electrode and a second electrode, an active layer between the first electrode and the second electrode and a plurality of auxiliary layers between the first electrode and the active layer. The auxiliary layers include first and second auxiliary layers, the first auxiliary layer proximate to the active layer, the second auxiliary layer proximate to the second electrode. An energy level of the active layer, an energy level of the first auxiliary layer, an energy level of the second auxiliary layer, and a work function of the first electrode become deeper sequentially or shallower sequentially. |
| US11411191B2 |
Selenium-fullerene heterojunction solar cell
Selenium-fullerene heterojunction solar cells and techniques for fabrication thereof are provided. In one aspect, a method of forming a solar cell includes: forming a front contact on a substrate; depositing an n-type semiconducting layer on the front contact, wherein the n-type semiconducting layer comprises a fullerene or fullerene derivative; forming a p-type chalcogen absorber layer on the n-type semiconducting layer; depositing a high workfunction material onto the p-type chalcogen absorber layer, wherein the high workfunction material has a workfunction of greater than about 5.2 electron volts; and forming a back contact on the high workfunction material. Solar cells and other methods for formation thereof are also provided. |
| US11411190B2 |
Conformal organic field-effect transistor, transistor array, and preparation method thereof
A conformal organic field-effect transistor includes an elastic substrate, a gate electrode, a polymer insulating layer, an organic semiconductor layer, and a source electrode and a drain electrode from the bottom up, the source electrode and the drain electrode being embedded in the organic semiconductor layer. A method of forming the conformal organic field-effect transistor includes depositing an organic semiconductor on a substrate surface to form an organic semiconductor layer, the source electrode and the drain electrode are embedded in the organic semiconductor layer; then preparing the polymer insulating layer on a surface of the organic semiconductor layer; transferring the gate electrode from the substrate; forming hydroxyl groups on a metal electrode surface of the gate electrode, a polymer insulating layer surface of the source electrode, and a polymer insulating layer surface of the drain electrode, respectively; and then performing alignment and heating to obtain the conformal organic field-effect transistor. |
| US11411188B2 |
Arylamine polymer including silicone, and electroluminescence device material and electroluminescence device using the polymer
An electroluminescent device with an improved luminous efficiency. The device includes a light emitting layer with an arylamine polymer including a structural unit (A) represented by Chemical Formula (1). |
| US11411185B2 |
Organic electroluminescent device
An organic electroluminescent device includes a pair of electrodes; and an organic layer between the pair of electrodes, which includes a light-emitting layer, wherein the organic layer contains a compound represented by the following formula (I); and the light-emitting layer contains a iridium complex phosphorescent material: wherein R1, R2, R3, R4, R5, R6, R7 and R8 each represents a hydrogen atom or a substituent, and contiguous substituents of R1 to R8 may be bonded to each other to form a condensed ring; R9 represents an alkyl group, an alkenyl group, an aryl group, a hetero-aryl group, or a silyl group, and each of which group may be substituted with a substituent; and at least one of R1 to R9 represents a deuterium atom or a substituent containing a deuterium atom. |
| US11411180B2 |
Phase-change memory device and method
A method includes forming a dielectric layer over a substrate, the dielectric layer having a top surface; etching an opening in the dielectric layer; forming a bottom electrode within the opening, the bottom electrode including a barrier layer; forming a phase-change material (PCM) layer within the opening and on the bottom electrode, wherein a top surface of the PCM layer is level with or below the top surface of the dielectric layer; and forming a top electrode on the PCM layer. |
| US11411179B2 |
Variable resistance memory device and method of fabricating the same
A method of fabricating a variable resistance memory device that includes forming a plurality of memory cells on a substrate. Each of the plurality of memory cells in a switching device and a variable resistance pattern. A capping structure is formed that commonly covers lateral side surfaces of the plurality of memory cells. An insulating gapfill layer is formed that covers the capping structure and fills a region between adjacent memory cells of the plurality of memory cells. The forming of the capping structure includes forming a second capping layer including silicon oxide that covers the lateral side surfaces of the plurality of memory cells. At least a partial portion of the second capping layer is nitrided by performing a first decoupled plasma process to form a third capping layer that includes silicon oxynitride. |
| US11411177B2 |
Phase-change memory with insulated walls
The present disclosure concerns a phase-change memory manufacturing method and a phase-change memory device. The method includes forming a first insulating layer in cavities located vertically in line with strips of phase-change material, and anisotropically etching the portions of the first insulating layer located at the bottom of the cavities; and a phase-change memory device including a first insulating layer against lateral walls of cavities located vertically in line with strips of phase-change material. |
| US11411173B2 |
Perpendicular spin transfer torque devices with improved retention and thermal stability
Material stacks for perpendicular spin transfer torque memory (pSTTM) devices, pSTTM devices and computing platforms employing such material stacks, and methods for forming them are discussed. The material stacks include a cladding layer of predominantly tungsten on a protective layer, which is in turn on an oxide capping layer over a magnetic junction stack. The cladding layer reduces oxygen dissociation from the oxide capping layer for improved thermal stability and retention. |
| US11411163B2 |
Packaging for ultrasonic transducers
Aspects of the embodiments are directed to systems and devices that include a piezo-electric element comprising a top-side electrode and a bottom-side electrode; a metal contact pad electrically connected to the bottom-side electrode; an electrode electrically connected to the top-side electrode; and an encasement encasing the piezo-electric element. The piezo-electric element can be prepared to include steps and metallization for use in one or more types of packaging. |
| US11411162B2 |
Thin-film piezoelectric-material element, method of manufacturing the same, head gimbal assembly and hard disk drive
A thin-film piezoelectric-material element includes a laminated structure part having a lower electrode film, a piezoelectric-material film laminated on the lower electrode film and an upper electrode film laminated on the piezoelectric-material film, a lower piezoelectric-material protective-film being formed with alloy material, and an upper piezoelectric-material protective-film being formed with alloy material. The piezoelectric-material film includes a size larger than the upper electrode film, a riser end-surface and step-surface formed on a top-surface of the upper electrode film side. The riser end-surface connects smoothly with a peripheral end-surface of the upper electrode film and vertically intersects with the top-surface. The step-surface intersects vertically with the riser end-surface. The lower piezoelectric-material protective-film, and the upper piezoelectric-material protective-film are formed with alloy material including Fe as main ingredient and having Co and Mo, by Ion beam deposition. |
| US11411161B2 |
Piezoelectric sensing system and piezoelectric sensing circuit
A piezoelectric system comprises a piezoelectric sensor, a voltage stabilizer, a discharger and an operation sensor. The piezoelectric sensor outputs a sensing signal through a sensor output terminal according to a rate of change of pressure. The voltage stabilizer has a positive terminal electrically connecting with the sensor output terminal. The voltage stabilizer receives the sensing signal, stores the energy of the sensing signal, and keeps the voltage of the sensing signal as a constant when the rate of change of pressure is zero. The discharger has a first terminal connecting with the positive terminal, a second terminal coupled to ground, and a control terminal receiving a trigger signal to control the first terminal to conduct with or not conduct with the second terminal. The operation sensor electrically connects to the control terminal for sensing an operation generating the pressure and outputs the trigger signal accordingly. |
| US11411155B2 |
Thermoelectric conversion material, thermoelectric conversion module using same, and method of manufacturing thermoelectric conversion material
A thermoelectric conversion material includes a sintered body including a main phase including a plurality of crystal grains including Ce, Mn, Fe, and Sb and forming a skutterudite structure, and a grain boundary between crystal grains adjacent to each other. The grain boundary includes a sintering aid phase including at least Mn, Sb, and O. Thus, with respect to a skutterudite-type thermoelectric conversion material including Sb, which is a sintering-resistant material, it is possible to improve sinterability while maintaining a practical dimensionless figure-of-merit ZT, and to reduce processing cost. |
| US11411151B2 |
Light emitting panel and display device
A light emitting panel and a display device are provided. The light emitting panel includes a carrier substrate, and multiple connection electrodes, multiple first electrode leads and multiple second electrode leads that are arranged on the carrier substrate. Each connection electrode includes a first sub-connection electrode and a second sub-connection electrode isolated from each other. The connection electrodes are divided into a first connection electrode group to an N-th connection electrode group. An i-th connection electrode group includes connection electrodes. N is an integer greater than or equal to 2, and i is a positive integer less than or equal to N. First sub-connection electrodes in the i-th connection electrode group are electrically connected with a same first electrode lead, and second sub-connection electrodes in the i-th connection electrode group are respectively connected with different second electrode leads. |
| US11411149B2 |
Array substrate, display panel, and manufacturing method of display panel
The present invention discloses an array substrate, a display panel, and a manufacturing method of the display panel. The display panel includes the array substrate and a light-emitting element. The array substrate includes a substrate layer, a driving circuit layer, and a cover layer stacked in order from bottom to top. The cover layer is a gray light-absorbing material for absorbing ambient light and reflected light of the driving circuit layer. |
| US11411128B2 |
Manufacturing method of flexible thin film solar cell module and the flexible thin film solar cell module using the same
Provided is a method of manufacturing a high efficiency flexible thin film solar cell module including a see-thru pattern. The method of manufacturing a flexible thin film solar cell module includes: sequentially forming a light-absorbing layer, a first buffer layer, and a first transparent electrode layer on the release layer; forming a second buffer layer on the exposed bottom surface of the light-absorbing layer; forming a P2 scribing pattern by removing at least one portion of each of the first buffer layer, the light-absorbing layer, and the second buffer layer; forming a second transparent electrode layer on the second buffer layer and the first transparent electrode layer exposed by the P2 scribing pattern; and forming a P4 see-thru pattern by selectively removing at least one portion of the first buffer layer, the light-absorbing layer, the second buffer layer, and the second transparent electrode layer. |
| US11411127B2 |
Multi-dimensional integrated circuits having semiconductors mounted on multi-dimensional planes and multi-dimensional memory structure
Monolithic multi-dimensional integrated circuits and memory architecture are provided. Exemplary integrated circuits comprise an electronic board having a first side and a second side, a multi-dimensional electronic package having multiple planes, and one or more semiconductor wafers mounted on the first side and the second side of the electronic board and on the multiple planes of the electronic package. Exemplary monolithic multi-dimensional memory architecture comprises one or more tiers, one or more monolithic inter-tier vias spanning the one or more tiers, at least one multiplexer disposed in one of the tiers, and control logic determining whether memory cells are active and which memory cells are active and controlling usage of the memory cells based on such determination. Each tier has a memory cell, and the inter-tier vias act as crossbars in multiple directions. The multiplexer is communicatively coupled to the memory cell in the respective tier. In exemplary embodiments, the one or more semiconductor wafers include one or more solar cells. The solar cells may comprise MEMS and/or on-chip solar cells. |
| US11411124B2 |
Semiconductor devices
A semiconductor device includes a first transistor having a first threshold voltage, and including first channels, first source/drain layers connected to opposite sidewalls of the first channels, and a first gate structure surrounding the first channels and including a first gate insulation pattern, a first threshold voltage control pattern, and a first workfunction metal pattern sequentially stacked. The semiconductor device includes a second transistor having a second threshold voltage greater than the first threshold voltage, and including second channels, second source/drain layers connected to opposite sidewalls of the second channels, and a second gate structure surrounding the second channels and including a second gate insulation pattern, a second threshold voltage control pattern, and a second workfunction metal pattern sequentially stacked. A thickness of the second threshold voltage control pattern is equal to or less than a thickness of the first threshold voltage control pattern. |
| US11411123B2 |
Semiconductor device and method of formation
A semiconductor device includes a channel region between a source region and a drain region, a gate over the channel region, a dielectric layer over the gate, a capacitive field plate over the dielectric layer, and a word line electrically coupled to the capacitive field plate. |
| US11411122B2 |
Display device
A display device including: a first thin film transistor (TFT) including a first semiconductor layer and a first gate electrode, the first semiconductor layer including a first channel region, a first source region, and a first drain region; a third TFT including a third semiconductor layer and a third gate electrode, the third semiconductor layer including a third channel region, a third source region, and a third drain region, wherein a leakage current of the third TFT in an off-state is less than a leakage current of the first TFT in an off-state; and a pixel electrode connected to one of the first source region and the first drain region, wherein the one of the first source region and the first drain region is connected to the third TFT. |
| US11411117B2 |
TFT device, manufacturing method thereof, and TFT array substrate
A thin film transistor (TFT) device, a manufacturing method thereof, and a TFT array substrate are provided. A light-shielding layer is provided with a barrier layer for preventing copper ions in a metal layer from diffusing into a buffer layer and an active layer. The barrier layer is also provided with an etch barrier layer for preventing the copper ions of the metal layer being oxidized by a fluorine-based oxidizing gas due to the fluorine-based oxidizing gas is used to dry etch the buffer layer for forming a signal via hole, so as to improve a performance stability of the TFT device. A source is electrically connected to the light-shielding layer through the signal via hole to eliminate a threshold voltage drift of the TFT. |
| US11411116B2 |
Doped polar layers and semiconductor device incorporating same
The disclosed technology generally relates to ferroelectric materials and semiconductor devices, and more particularly to semiconductor memory devices incorporating doped polar materials. In one aspect, a semiconductor device comprises a capacitor which in turn comprises a polar layer comprising a base polar material doped with a dopant. The base polar material includes one or more metal elements and one or both of oxygen or nitrogen. The dopant comprises a metal element that is different from the one or more metal elements and is present at a concentration such that a ferroelectric switching voltage of the capacitor is different from that of the capacitor having the base polar material without being doped with the dopant by more than about 100 mV. The capacitor stack additionally comprises first and second crystalline conductive oxide electrodes on opposing sides of the polar layer. The capacitor stack further comprises first and second barrier metal layers on respective ones of the first and second crystalline conductive oxide electrodes on opposing sides of the polar layer. |
| US11411113B2 |
FinFETs and methods of forming FinFETs
An embodiment is a method including recessing a gate electrode over a semiconductor fin on a substrate to form a first recess from a top surface of a dielectric layer, forming a first mask in the first recess over the recessed gate electrode, recessing a first conductive contact over a source/drain region of the semiconductor fin to form a second recess from the top surface of the dielectric layer, and forming a second mask in the second recess over the recessed first conductive contact. |
| US11411104B2 |
Semiconductor device
According to one embodiment, a semiconductor device includes a first electrode, a semiconductor layer, a first conductive part, a second conductive part, and a second electrode. The semiconductor layer includes a first semiconductor region, a second semiconductor region, and a third semiconductor region. The first semiconductor region is electrically connected to the first electrode. The second semiconductor region is provided on the first semiconductor region. The third semiconductor region is provided on the second semiconductor region. The first conductive part includes a buried electrode provided in the first semiconductor region with a first insulator interposed. The second conductive part includes a gate electrode provided on the buried electrode with a second insulator interposed. The first conductive part is electrically connected to the second conductive part. An electrical resistance of the first conductive part is greater than an electrical resistance of the second conductive part. |
| US11411101B2 |
Manufacturing method of TFT substrate
A TFT substrate and a manufacturing method thereof are provided. In the manufacturing method, a metal oxide semiconductor layer is irradiated with UV light by using a gate as a shielding layer, such that a portion of the metal oxide semiconductor layer irradiated by the UV light is conductorized to form a source, a drain, and a pixel electrode, and a portion of the metal oxide semiconductor layer shielded by the gate still retains semiconductor properties to form a semiconductor channel. The invention achieves the alignment of the source and the drain with the gate by processes of self-alignment of the gate and conductorization of the metal oxide semiconductor layer, and can effectively control an overlapping region of the source and drain and the gate. Thereby, the parasitic capacitance is reduced, and the display quality is improved. Also, the manufacturing method is simple, and the production efficiency is improved. |
| US11411097B2 |
Semiconductor device
Provided is a semiconductor device including a substrate, a plurality of memory cells, and at least one dummy gate structure. The substrate has a memory cell region and a dummy region. The memory cells are disposed on the substrate in the memory cell region. Each memory cell includes: adjacent two stack structures disposed on the substrate; two select gates respectively disposed outside the adjacent two stack structures; and an erase gate disposed between the adjacent two stack structures. The erase gate has a step between a topmost top surface and a lowermost top surface of the erase gate. The at least one dummy gate structure is disposed on the substrate in the dummy region. |
| US11411096B2 |
Source electrode and drain electrode protection for nanowire transistors
Embodiments herein describe techniques, systems, and method for a semiconductor device. A nanowire transistor may include a channel region including a nanowire above a substrate, a source electrode coupled to a first end of the nanowire through a first etch stop layer, and a drain electrode coupled to a second end of the nanowire through a second etch stop layer. A gate electrode may be above the substrate to control conductivity in at least a portion of the channel region. A first spacer may be above the substrate between the gate electrode and the source electrode, and a second spacer may be above the substrate between the gate electrode and the drain electrode. A gate dielectric layer may be between the channel region and the gate electrode. Other embodiments may be described and/or claimed. |
| US11411092B2 |
Field effect transistor (FET) comprising inner spacers and voids between channels
An integrated device that includes a substrate and a first transistor formed over the substrate. The first transistor includes a first source disposed over the substrate, a first drain disposed over the substrate, a first plurality of channels coupled to the first source and the first drain, where the first plurality of channels is located between the first source and the first drain; at least one inner spacer located between two adjacent channels from the first plurality of channels; at least two voids located between the two adjacent channels; and a first gate surrounding the first plurality of channels. |
| US11411091B2 |
Structure of stacked gate-all-around nano-sheet CMOS device and method for manufacturing the same
A method for manufacturing a stacked gate-all-around nano-sheet CMOS device, including: providing a substrate with a fin structure, where a channel layer for an NMOS is a sacrificial layer for a PMOS, a channel layer for the PMOS is a sacrificial layer for the NMOS; and mobility of holes in the second material is greater than mobility of holes in the first material; forming a dummy gate stack extending across the fin structure; forming source-or-drain regions in the fin structure at two sides of the dummy gate stack; removing the dummy gate stack and the sacrificial layers covered by the dummy gate stack, to expose a surface of a part of the channel layer that is located between the source-or-drain regions, where a nano-sheet array is formed by the channel layer with the exposed surface; and forming a gate stack structure surrounding each nano sheet in the nano-sheet array. |
| US11411087B2 |
Integrated circuit (IC) structure with high impedance semiconductor material between substrate and transistor
Embodiments of the disclosure provide an integrated circuit (IC) structure with a high impedance semiconductor material between a substrate and transistor. The IC structure may include: a substrate, a high impedance semiconductor material on a portion of the substrate, and a transistor on a top surface of the high impedance semiconductor material. The transistor includes a semiconductor channel region horizontally between a first source/drain (S/D) region and a second S/D region. The high impedance semiconductor material is vertically between the transistor and the substrate; a first insulator region is on the substrate and horizontally adjacent the first S/D region; and a first doped well is on the substrate and horizontally adjacent the first insulator region. The first insulator region is horizontally between the first doped well and the transistor. |
| US11411085B2 |
Devices comprising floating gate materials, tier control gates, charge blocking materials, and channel materials
Methods of fabricating a semiconductor structure comprise forming an opening through a stack of alternating tier dielectric materials and tier control gate materials, and laterally removing a portion of each of the tier control gate materials to form control gate recesses. A charge blocking material comprising a charge trapping portion is formed on exposed surfaces of the tier dielectric materials and tier control gate materials in the opening. The control gate recesses are filled with a charge storage material. The method further comprises removing the charge trapping portion of the charge blocking material disposed horizontally between the charge storage material and an adjacent tier dielectric material to produce air gaps between the charge storage material and the adjacent tier dielectric material. The air gaps may be substantially filled with dielectric material or conductive material. Also disclosed are semiconductor structures obtained from such methods. |
| US11411083B2 |
Semiconductor structure
Semiconductor structures and methods for forming the same are provided. The semiconductor structure includes a substrate and a first fin and a second fin formed over the substrate. The semiconductor structure further includes a first anti-punch through region formed in the first fin and a second anti-punch through region formed in the second fin and first nanostructures formed over the first fin and second nanostructures formed over the second fin. The semiconductor structure further includes a barrier layer formed over the second anti-punch through region and a first gate formed around the first nanostructures. The semiconductor structure further includes a second gate formed around the second nanostructures. In addition, an interface between the barrier layer and the second anti-punch through region is higher than an interface between the first anti-punch through region and the first gate. |
| US11411082B2 |
Nanowire stack GAA device with selectable numbers of channel strips
The current disclosure describes techniques for individually selecting the number of channel strips for a device. The channel strips are selected by defining a three-dimensional active region that include a surface active area and a depth/height. Semiconductor strips in the active region are selected as channel strips. Semiconductor strips contained in the active region will be configured to be channel strips. Semiconductor strips not included in the active region are not selected as channel strips and are separated from source/drain structures by an auxiliary buffer layer. |
| US11411081B2 |
Field effect transistor (FET) stack and methods to form same
The disclosure provides a field effect transistor (FET) stack with methods to form the same. The FET stack includes a first transistor over a substrate. The first transistor includes a first active semiconductor material including a first channel region between a first set of source/drain terminals, and a first gate structure over the first channel region. The first gate structure includes a first gate insulator of a first thickness above the first channel region. A second transistor is over the substrate and horizontally separated from the first transistor. A second gate structure of the second transistor may include a second gate insulator of a second thickness above a second channel region, the second thickness being greater than the first thickness. A shared gate node may be coupled to each of the first gate structure and the second gate structure. |
| US11411078B2 |
Semiconductor devices including dummy patterns for discharging effects
A semiconductor device including a substrate having a cell, peripheral, and boundary area; a stack structure on the cell area and including insulating and interconnection layers that are alternately stacked; a molding layer on the peripheral area boundary areas; a selection line isolation pattern extending into the stack structure; a cell channel structure passing through the stack structure; and first dummy patterns extending into the molding layer on the peripheral area, wherein upper surfaces of the first dummy patterns, an upper surface of the selection line isolation pattern, and an upper surface of the cell channel structure are coplanar, and at least one of the first dummy patterns extends in parallel with the selection line isolation pattern or cell channel structure from upper surfaces of the first dummy patterns, the upper surface of the selection line isolation pattern, and the upper surface of the cell channel structure toward the substrate. |
| US11411077B2 |
Electronic device including doped regions and a trench between the doped regions
An electronic device can include doped regions and a trench disposed between the doped regions, wherein the trench can include a conductive member. In an embodiment, a parasitic transistor can include doped regions as drain/source regions and the conductive member as a gate electrode. A semiconductor material can lie along a bottom or sidewall of the trench and be a channel region of the parasitic transistor. The voltage on the gate electrode or the dopant concentration can be selected so that the channel region does not reach inversion during the normal operation of the electronic device. |
| US11411075B2 |
Semiconductor device and method of manufacturing the same
A semiconductor device and a method of manufacturing the same, the device including a plurality of lower electrodes on a semiconductor substrate; a support pattern connecting the lower electrodes at sides of the lower electrodes; and a dielectric layer covering the lower electrodes and the support pattern, wherein each of the plurality of lower electrodes includes a pillar portion extending in a vertical direction perpendicular to a top surface of the semiconductor substrate; and a protrusion protruding from a sidewall of the pillar portion so as to be in contact with the support pattern, the pillar portion includes a conductive material, the protrusion includes a same conductive material as the pillar portion and is further doped with impurities. |
| US11411074B2 |
Structure and method of producing the same
According to an embodiment, a structure includes a substrate including a semiconductor material, wherein the substrate is provided with one or more recesses each of which has a depth direction that is equal to a thickness direction of the substrate, and the one or more recesses include a sidewall on which a plurality of grooves each extending in the depth direction are provided. |
| US11411072B2 |
Display substrate, display device, manufacturing method, and repair method for display substrate
Disclosed are a display substrate, a display device, a manufacturing method and a repairing method. A capacitor structure in the display substrate includes a first electrode and a second electrode. The first electrode includes a first main body portion extending in a first direction, first branch portions extending in a second direction, and a first connection portion connecting the first branch portions to the first main body portion. The second electrode includes a second main body portion extending in the first direction, second branch portions extending in the second direction, and a second connection portion connecting the second branch portions to the second main body portion. One side of the first electrode having the first branch portions faces one side of the second electrode having the second branch portions, and each first branch portion and a corresponding second branch portion form a capacitor. |
| US11411065B2 |
Display device including symmetrically disposed transistors
A display device includes a first pixel including a first transistor, a second transistor, and a third transistor, a second pixel disposed adjacent to the first pixel in a first direction, and including a first transistor, a second transistor, and a third transistor, and an initialization voltage line disposed between the first pixel and the second pixel, and extending in a second direction crossing the first direction. The second transistor of the first pixel and the second transistor of the second pixel are connected to the initialization voltage line. The first, second, and third transistors of the first pixel and the first, second, and third transistors of the second pixel are symmetrical with respect to the initialization voltage line. |
| US11411064B2 |
Display device comprising sub-pixels separated by through holes and having specified orientations
A display device and a method of manufacturing the same are disclosed. In one aspect, the display device includes a substrate including a separation area and a plurality of pixel formed over the substrate. The separation area is formed between adjacent pixels, and a plurality of through holes are respectively defined by a plurality of surrounding inner surfaces of the separation area, and wherein each of the inner surfaces passes through the substrate. The display device also includes an encapsulation layer formed over the substrate and covering the inner surfaces of the separation area. |
| US11411060B2 |
Organic light-emitting display device having multiple wirings and an encapsulation layer including stacked layers
An organic light-emitting display device includes a substrate having a display region and a peripheral region, a plurality of pixels on the substrate in the display region, a first wiring and a second wiring on the substrate in the peripheral region, An insulation layer on the first and second wirings, the insulation layer covering a top surface and a sidewall of each of the first and second wirings, and an encapsulation layer on the plurality of pixels and on the insulation layer. |
| US11411059B2 |
Display substrate motherboard with blocking region and manufacturing method thereof, display panel motherboard and manufacturing method of display substrate
The disclosure provides a display substrate motherboard, a manufacturing method thereof, a display panel motherboard and a manufacturing method of a display substrate. The display substrate motherboard includes a base substrate including multiple substrate areas, each substrate area including a display region and a pad region; a display structure layer located on the base substrate and including a pixel defining layer and multiple film layers located between the pixel defining layer and the base substrate, a blocking region is arranged between any two adjacent substrate areas; a portion of the display structure layer in the blocking region has a first groove therein, a portion of the display structure layer between the first groove and the pad region adjacent thereto constitutes a first spacer region; a thickness of the portion of the display structure layer in the first spacer region is less than that in the display region. |
| US11411058B2 |
Flexible display device
A flexible display device includes a flexible display panel and a chip on film (COF) bonded to the flexible display panel; wherein the flexible display panel is divided into a display region, a bonding region on a side of the display region, and a bending region between the display region and the bonding region; wherein the COF comprises a main body portion and two expansion bonding portions respectively disposed at two ends of one side of the main body portion; wherein an edge of the main body portion adjacent to the two expansion bonding portions are disposed with a plurality of connection pins; wherein the COF is bonded to the bonding region of the flexible display panel through the plurality of connection pins. |
| US11411055B2 |
Display device
A display device includes: a light-emitting substrate including a base substrate having a non-display area and a display area that surrounds the non-display area; an input sensing unit disposed on the light-emitting substrate; and a hole penetrating front and rear surfaces of each of the light-emitting substrate and the input sensing unit, wherein the light-emitting substrate includes a plurality of recesses, the non-display area includes a hole area which overlaps with the hole, a recess area in which the plurality of recesses are disposed and surrounds the hole area, and a peripheral area which surrounds the recess area, and the input sensing unit includes a plurality of first sensor members overlapping the display area and a first connector connecting the first sensor members and overlapping the groove area. |
| US11411053B2 |
Color filter structure doped with nanoparticle and OLED display panel
The invention provides a color filter structure and an OLED display panel. The color filter structure includes a base layer, a color filter, a black matrix, a protective film, and a transparent conductive film, wherein the color filter includes nanoparticles. The OLED display panel includes a base substrate, a TFT structure, a color resistor retaining wall, a light-emitting layer, a pixel definition layer, a black retaining wall, a cathode layer, the color filter structure, and an encapsulation layer, wherein a height of the color filter structure is slightly lower than or equal to a height of the black retaining wall. |
| US11411047B2 |
Stacked transistor bit-cell for magnetic random access memory
An apparatus is provided which comprises: a magnetic junction (e.g., a magnetic tunneling junction or spin valve). The apparatus further includes a structure (e.g., an interconnect) comprising spin orbit material, the structure adjacent to the magnetic junction; first and second transistors. The first transistor is coupled to a bit-line and a first word-line, wherein the first transistor is adjacent to the magnetic junction. The second transistor is coupled to a first select-line and a second word-line, wherein the second transistor is adjacent to the structure, wherein the interconnect is coupled to a second select-line, and wherein the magnetic junction is between the first and second transistors. |
| US11411046B2 |
Semiconductor device heat extraction by spin thermoelectrics
Electrical devices with an integral thermoelectric generator comprising a spin-Seebeck insulator and a spin orbit coupling material, and associated methods of fabrication. A spin-Seebeck thermoelectric material stack may be integrated into macroscale power cabling as well as nanoscale device structures. The resulting structures are to leverage the spin-Seebeck effect (SSE), in which magnons may transport heat from a source (an active device or passive interconnect) and through the spin-Seebeck insulator, which develops a resulting spin voltage. The SOC material is to further convert the spin voltage into an electric voltage to complete the thermoelectric generation process. The resulting electric voltage may then be coupled into an electric circuit. |
| US11411045B2 |
Light emitting device and display
A light emitting device including a light emitting layer that is provided between a first face and a second face, a first electrode that is provided on the first face and is electrically coupled to the light emitting layer, a second electrode that is provided on the second face and is electrically coupled to the light emitting layer, and a non-selected electrode that is provided on the first face and is in a state not electrically coupled to a potential supply source. |
| US11411043B2 |
Pigmented and scattering particles in side coating materials for LED applications
Phosphor-converted LED side reflectors disclosed herein comprise pigments that are photochemically stable under illumination by light from the pcLED. The pigments absorb light in at least a portion of the spectrum of light emitted by the first phosphor converted LED. The side reflector may also comprise light scattering particles or air voids. The pigments, light scattering particles, or air voids may be homogeneously distributed in the reflector. Alternatively the side reflector may be layered, with the pigments, light scattering particles, or air voids inhomogeneously distributed in the reflector. The side reflector can include phosphor particles. |
| US11411040B2 |
Methods for fabricating mechanically stacked multicolor focal plane arrays and detection devices
Methods of fabricating multicolor, stacked detector devices and focal plane arrays are disclosed. In one embodiment, a method of fabricating a stacked multicolor device includes forming a first detector by depositing a first detector structure on a first detector substrate, and depositing a first ground plane on the first detector structure, wherein the first ground plane is transmissive to radiation in a predetermined spectral band. The method further includes bonding an optical carrier wafer to the first ground plane, removing the first detector substrate, and forming a second detector. The second detector is formed by depositing a second detector structure on a second detector substrate, and depositing a second ground plane on the second detector structure. The method further includes depositing a dielectric layer on one of the first detector structure and the second ground plane, bonding the first detector to the second detector, and removing the second detector substrate. |
| US11411033B2 |
Image sensor device and manufacturing method thereof
A method includes forming a first photoresist layer on a front side of a device substrate and having first trenches spaced apart from each other. A first implantation process is performed using the first photoresist layer as a mask to form first isolation regions in the device substrate. A second photoresist layer is formed on the front side and has second trenches. A second implantation process is performed using the second photoresist layer as a mask to form second isolation regions in the device substrate and crossing over the first isolation regions. A third photoresist layer is formed on the front side and has third trenches spaced apart from each other. A third implantation process is performed using the third photoresist layer as a mask to form third isolation regions in the device substrate and crossing over the first isolation regions but spaced apart from the second isolation regions. |
| US11411032B2 |
Sensor chip and electronic device
An imaging device comprises a sensor substrate including a pixel array that includes at least a first pixel. The first pixel includes an avalanche photodiode including a light receiving region, a cathode, and an anode. The first pixel includes a wiring layer electrically connected to the cathode and arranged in the sensor substrate such that the wiring layer is in a path of incident light that exits the light receiving region. |
| US11411031B2 |
Image pickup element, image pickup device, manufacturing device and method
There is provided an image pickup element including a non-planar layer having a non-planar light incident surface in a light receiving region, and a microlens of an inorganic material which is provided on a side of the light incident surface of the non-planar layer, and collects incident light. |
| US11411030B2 |
Imaging element and electronic apparatus
The present disclosure relates to an imaging element and an electronic apparatus configured to achieve higher-resolution image taking. The imaging element includes: a photoelectric conversion portion provided in a semiconductor substrate for each pixel that performs photoelectric conversion on light that enters through a filter layer; an element isolation portion configured to separate the photoelectric conversion portions of adjacent pixels; and an inter-pixel light shielding portion disposed between the pixels in a layer and provided between the semiconductor substrate and the filter layer and separated from a light receiving surface of the semiconductor substrate by a predetermined interval. Moreover, an interval between the light receiving surface of the semiconductor substrate and a tip end surface of the inter-pixel light shielding portion is smaller than a width of the tip end surface of the inter-pixel light shielding portion. The present technology is applicable to back-illuminated CMOS image sensors, for example. |
| US11411029B2 |
Image sensing chip package structure including adhesive loop
An image sensing chip package structure includes a chip, an adhesive loop and a light-transmissible substrate member. The chip includes an image sensing region. The adhesive loop is connected to the chip, and has an inner peripheral surface that defines a plurality of protrusions which surround the image sensing region of the chip. The light-transmissible substrate member is connected to the adhesive loop oppositely of the chip to cover the image sensing region of the chip. Methods of manufacturing the image sensing chip package structures are also provided. |
| US11411019B2 |
Vertical memory structure with air gaps and method for preparing the same
The present disclosure provides a vertical memory structure with air gaps and a method for preparing the vertical memory structure. The vertical memory structure includes a semiconductor stack including a lower semiconductor pattern structure filling a recess on a substrate and protruding from an upper surface of the substrate in a first direction substantially perpendicular to the upper surface of the substrate; a plurality of gate electrodes surrounding a sidewall of the semiconductor stack, the plurality of gate electrodes being at a plurality of levels, respectively, so as to be spaced apart from each other in the first direction; and a plurality of air gap structures disposed at outer sides of the plurality of gate electrodes respectively. |
| US11411018B2 |
Integrated circuit device
An integrated circuit (IC) device includes a peripheral circuit structure, a memory stack including a plurality of gate lines overlapping the peripheral circuit structure in a vertical direction on the peripheral circuit structure, an upper substrate between the peripheral circuit structure and the memory stack, the upper substrate including a through hole positioned below a memory cell region of the memory stack, a word line cut region extending lengthwise in a first lateral direction across the memory stack and the through hole, and a common source line located in the word line cut region, the common source line including a first portion extending lengthwise in the first lateral direction on the upper substrate and a second portion integrally connected to the first portion, the second portion penetrating the upper substrate through the through hole from an upper portion of the upper substrate and extending into the peripheral circuit structure. |
| US11411016B2 |
Semiconductor memory device
A semiconductor memory device includes a first chip and a second chip overlaid on the first chip. The second chip includes a memory cell array provided between a second semiconductor substrate and the first chip in a first direction, and first and second wires between the memory cell array and the first chip. The memory cell array includes three or more stacked bodies regularly arranged in a second direction perpendicular to the first direction and semiconductor layers extending in the stacked bodies in the first direction. Each of the stacked bodies includes gate electrodes stacked in the first direction. The first and second wires are aligned in the second direction with a gap therebetween. |
| US11411015B2 |
Memory arrays and methods used in forming a memory array
A method used in forming a memory array comprises forming a substrate comprising a conductor tier comprising upper conductor material, lower metal material, and intervening metal material vertically between the upper conductor material and the lower metal material. The intervening metal material, the upper conductor material, and the lower metal material are of different compositions relative one another. The intervening metal material has a reduction potential that is less than 0.7V away from the reduction potential of the upper conductor material. A stack comprising vertically-alternating insulative tiers and conductive tiers is formed above the conductor tier. Channel material is formed through the insulative tiers and the conductive tiers. Horizontally-elongated trenches are formed through the stack to the conductor tier. Elevationally-extending strings of memory cells are formed in the stack. Individual of the memory cells comprise the channel material, a gate region that is part of a conductive line in individual of the conductive tiers, and a memory structure laterally between the gate region and the channel material in the individual conductive tiers. Other methods and structure independent of method are disclosed. |
| US11411011B2 |
Semiconductor structure having memory device and method of forming the same
A semiconductor structure includes a substrate, an interconnection structure disposed over the substrate and a first memory cell. The first memory cell is disposed over the substrate and embedded in dielectric layers of the interconnection structure. The first memory cell includes a first transistor and a first data storage structure. The first transistor is disposed on a first base dielectric layer and embedded in a first dielectric layer. The first data storage structure is embedded in a second dielectric layer and electrically connected to the first transistor. The first data storage structure includes a first electrode, a second electrode and a storage layer sandwiched between the first electrode and the second electrode. |
| US11411006B1 |
Manufacturing method of memory structure
The present disclosure provides a manufacturing method of a memory structure. The manufacturing method includes the operations of: receiving a substrate; forming a landing pad layer in the substrate; forming trenches over the landing pad layer; and forming a top pad over the trenches to form the capacitor array. The operation of forming the trenches over the landing pad layer includes the operations of: forming an integrated layer having an array pattern over the landing pad layer; forming, by a chop mask, a masking layer to mask an edge portion of the array pattern so as to define a rectangle portion of the array pattern; and etching the integrated layer according to the rectangle portion of the array pattern to form the plurality of trenches. The edge portion of the array pattern surrounds the rectangle portion of the array pattern. |
| US11411002B2 |
Memory arrays comprising vertically-alternating tiers of insulative material and memory cells and methods of forming a memory array
A memory array comprises vertically-alternating tiers of insulative material and memory cells. The memory cells individually comprise a transistor and a capacitor. The capacitor comprises a first electrode electrically coupled to a source/drain region of the transistor. The first electrode comprises an annulus in a straight-line horizontal cross-section and a capacitor insulator radially inward of the first electrode annulus. A second electrode is radially inward of the capacitor insulator. A capacitor-electrode structure extends elevationally through the vertically-alternating tiers. Individual of the second electrodes of individual of the capacitors are electrically coupled to the elevationally-extending capacitor-electrode structure. A sense line is electrically coupled to another source/drain region of multiple of the transistors that are in different memory-cell tiers. Additional embodiments and aspects are disclosed, including methods. |
| US11410987B2 |
Chip and method for manufacturing a chip
A chip is described including a semiconductor layer including doped regions; a metallization layer on the semiconductor layer and at least one cell row including p-channel field effect transistors and n-channel field effect transistors, wherein the doped regions form source regions and drain regions of the p-channel field effect transistors and the n-channel field effect transistors; contacts extending from the source regions, the drain regions and gate regions of the p-channel field effect transistors and the n-channel field effect transistors to the metallization layer, wherein the metallization layer is structured in accordance with a metallization grid such that the p-channel field effect transistors and the n-channel field effect transistors are connected to form one or more logic gates. |
| US11410986B2 |
Power cell for semiconductor devices
A semiconductor device includes an electrical circuit having a first set of circuit elements, wherein the electrical circuit is in a circuit area on a first side of a substrate, and a first set of conductive pillars over the first side of the substrate. In the semiconductor device, a first conductive rail electrically connects to each of the first set of conductive pillars, wherein each of the first set of conductive pillars is electrically connected to each of the first set of circuit elements by the first conductive rail; and a first power cell extending through the substrate, wherein the first power cell includes a first number of power pillars extending through the substrate, wherein each of the first number of power pillars electrically connects to the first conductive rail in parallel. |
| US11410982B2 |
Semiconductor devices and methods of manufacturing
A method includes forming a redistribution structure including metallization patterns; attaching a semiconductor device to a first side of the redistribution structure; encapsulating the semiconductor device with a first encapsulant; forming openings in the first encapsulant, the openings exposing a metallization pattern of the redistribution structure; forming a conductive material in the openings, comprising at least partially filling the openings with a conductive paste; after forming the conductive material, attaching integrated devices to a second side of the redistribution structure; encapsulating the integrated devices with a second encapsulant; and after encapsulating the integrated devices, forming a pre-solder material on the conductive material. |
| US11410977B2 |
Electronic module for high power applications
An electronic module can include a first integrated device package comprising a first substrate and an electronic component mounted to the first substrate. A first vertical interconnect can be mounted to and electrically connected to the first substrate. The first vertical interconnect can extend outwardly from the first substrate. The electronic module can include a second integrated device package comprising a second substrate and a second vertical interconnect having a first end mounted to and electrically connected to the second substrate. The second vertical interconnect can have a second end electrically connected to the first vertical interconnect. The first and second vertical interconnects can be disposed between the first and second substrates. |
| US11410975B2 |
Display device and method of manufacturing display device
A method of manufacturing a display device 1 includes: providing a substrate including at least one sub-pixel defined therein and a first wiring disposed for the sub-pixel, and the light-emitting element that includes a first electrode disposed on a lower surface and a second electrode disposed on at least two lateral surfaces intersecting with each other; mounting the light-emitting element on the substrate and electrically connecting the first electrode to the first wiring; forming a resin member covering the at least one light-emitting element, on the substrate, exposing a portion of the second electrode from an upper surface of the resin member by removing an upper portion of the resin member; and forming a second wiring with a mesh shape on the resin member such that a portion of the second wiring is disposed on the light-emitting element to electrically connect the second wiring to the second electrode. |
| US11410973B2 |
Microelectronic device assemblies and packages and related methods and systems
Disclosed is a microelectronic device assembly comprising a substrate having conductors exposed on a surface thereof. Two or more microelectronic devices are stacked on the substrate, each microelectronic device comprising an active surface having bond pads operably coupled to conductive traces extending over a dielectric material to via locations beyond at least one side of the stack, and vias extending through the dielectric materials at the via locations and comprising conductive material in contact with at least some of the conductive traces of each of the two or more electronic devices and extending to exposed conductors of the substrate. Methods of fabrication and related electronic systems are also disclosed. |
| US11410971B2 |
Chip package structure
A chip package structure includes a substrate, a first chip, a second chip, a bridge, a plurality of first bumps, a plurality of second bumps, a plurality of third bumps and a plurality of solder balls. A first active surface of the first chip and a second active surface of the second chip face a first surface of the substrate. The bridge includes a high-molecular polymer layer and a pad layer located on the high-molecular polymer layer. The first chip is electrically connected to the substrate through the first bumps. The second chip is electrically connected to the substrate through the second bumps. The first chip and the second chip are electrically connected to the pad layer through the third bumps. The first bumps and the second bumps have the same size. The solder balls are disposed on a second surface of the substrate and electrically connected to the substrate. |
| US11410970B2 |
Semiconductor module
The present invention provides a semiconductor module capable of improving a bandwidth between a logic chip and a RAM. According to the present invention, a semiconductor module 1 is provided with: a logic chip; a pair of RAM units 30 each composed of a lamination-type RAM module; a first interposer 10 electrically connected to the logic chip and to each of the pair of RAM units 30; and a connection unit 40 that communicatively connects the logic chip and each of the pair of RAM units 30, wherein one RAM unit 30a is placed on the first interposer 10, and has one end portion disposed so as to overlap, in the lamination direction C, one end portion of the logic chip with the connection unit 40 therebetween, and the other RAM unit 30b is disposed so as to overlap the one RAM unit 30a with the connection unit 40 therebetween, and is also disposed along the outer periphery of the logic chip. |
| US11410969B2 |
Semiconductor device assemblies including multiple stacks of different semiconductor dies
A semiconductor device assembly is provided. The assembly comprises a package substrate, a first stack of semiconductor dies having a first set of planform dimensions disposed over a first location on the substrate, a second stack of semiconductor dies having a second set of planform dimensions different from the first set disposed over a second location on the substrate, and an encapsulant at least partially encapsulating the substrate, the first stack and the second stack. The first stack of semiconductor dies has a first planform area, the second stack of semiconductor dies has a second planform area, and a sum of the first and second planform areas can be at least 50%, 67%, 75%, or even more of an area of the package substrate. |
| US11410965B2 |
Electronic device with embedded component carrier
An electronic device having a first component carrier and an electronic component which is surface mounted on or embedded within the first component carrier. The electronic device further has a second component carrier. The first component carrier together with the electronic component is at least partially embedded within the second component carrier. |
| US11410961B2 |
Methods and apparatus for temperature modification in bonding stacked microelectronic components and related substrates and assemblies
This patent application relates to methods and apparatus for temperature modification within a stack of microelectronic devices for mutual collective bonding of the microelectronic devices, and to related substrates and assemblies. |
| US11410960B2 |
Bonding apparatus
A bonding apparatus includes a bonding stage on which either a rectangular substrate or a circular substrate can be installed; a first transport mechanism which transports the rectangular substrate from a first carry-in unit to the bonding stage and from the bonding stage to a first carry-out unit; and a second transport mechanism which transports the circular substrate from a second carry-in/out unit to the bonding stage and from the bonding stage to the second carry-in/out unit, in which a first transport path determined by the first transport mechanism and a second transport path determined by the second transport mechanism partially overlap. |
| US11410954B2 |
Electronic package, manufacturing method thereof and conductive structure
Provided is an electronic package, including a first substrate of a first conductive structure and a second substrate of a second conductive structure, where a first conductive layer, a bump body and a metal auxiliary layer of the first conductive structure are sequentially formed on the first substrate, and a metal pillar, a second conductive layer, a metal layer and a solder layer of the second conductive structure are sequentially formed on the second substrate, such that the solder layer is combined with the bump body and the metal auxiliary layer to stack the first substrate and the second substrate. |
| US11410953B2 |
Via structure for packaging and a method of forming
A via or pillar structure, and a method of forming, is provided. In an embodiment, a polymer layer is formed having openings exposing portions of an underlying conductive pad. A conductive layer is formed over the polymer layer, filling the openings. The dies are covered with a molding material and a planarization process is performed to form pillars in the openings. In another embodiment, pillars are formed and then a polymer layer is formed over the pillars. The dies are covered with a molding material and a planarization process is performed to expose the pillars. In yet another embodiment, pillars are formed and a molding material is formed directly over the pillars. A planarization process is performed to expose the pillars. In still yet another embodiment, bumps are formed and a molding material is formed directly over the bumps. A planarization process is performed to expose the bumps. |
| US11410952B2 |
Filter and capacitor using redistribution layer and micro bump layer
An integrated circuit package includes a die. An electrically conductive layer comprises a redistribution layer (RDL) in the die, or a micro-bump layer above the die, or both. The micro bump layer comprises at least one micro-bump line. A filter comprises the electrically conductive layer. A capacitor comprises an electrode formed in the electrically conductive layer. |
| US11410950B2 |
Semiconductor substrate having a bond pad material based on aluminum
A semiconductor substrate has a bond pad. The bond pad includes a layer of an aluminum alloy having a chemical composition including at least 0.3% by weight of at least one of Zn, Mg, Sc, Zr, Ti, Ag and/or Mn, with the balance being at least Al and incidental impurities. |
| US11410946B2 |
Semiconductor apparatus
A semiconductor apparatus including a bonding region in which a wire is bonded, includes: a semiconductor substrate; an oxide film provided on a principal surface of the semiconductor substrate in the bonding region; a polysilicon layer provided on the oxide film; an interlayer film partially provided on the polysilicon layer; a barrier metal directly provided on the polysilicon layer and the interlayer film; and an electrode provided on the barrier metal. |
| US11410945B2 |
Semiconductor package having partial outer metal layer and packaging method thereof
A semiconductor package having a partial outer metal layer and packaging method thereof is disclosed. In the method, a specific packaging substrate or a specific positioning plate is used to package multiple semiconductor devices and a partial outer metal layer is quickly formed on an encapsulation of each semiconductor device in the same step. |
| US11410937B2 |
Semiconductor device with aluminum nitride anti-deflection layer
A semiconductor device includes a substrate with both a compressive layer and an aluminum nitride tensile layer overlying at least a portion of the substrate. The aluminum nitride tensile layer is configured to counteract the compressive layer stress in the device to thereby control an amount of substrate bow in the device. The device includes a temperature-sensitive material supported by the substrate, in which the temperature-sensitive material has a relatively low thermal degradation temperature. The aluminum nitride tensile layer is formed at a temperature below the thermal degradation temperature of the temperature-sensitive material. |
| US11410931B2 |
Crystallographic orientations of ruthenium films
Crystallographic orientations of ruthenium films and related methods are disclosed. Single crystal ruthenium films are provided with crystallographic orientations that arrange a c-axis of the ruthenium crystal structure in a direction that corresponds with a plane of the film or along a direction that corresponds with a surface of a substrate on which the film is formed. While ruthenium films typically form with the c-axis perpendicular to the surface of the substrate or as a polycrystalline film with a random crystallographic orientation, substrate surfaces may be configured with a crystallographic surface net that promotes non-perpendicular c-axis orientations of ruthenium. The substrate may be formed with a metal-terminated surface in certain arrangements. In this regard, ruthenium films may be configured as metallic interconnects for devices where directions of lowest electrical resistivity within the crystal structure are arranged to correspond with the direction of current flow in the devices. |
| US11410930B2 |
Semiconductor device and method
In an embodiment, a device includes: a first fin; a gate structure over the first fin; a first source/drain region adjacent the gate structure; an etch stop layer over the first source/drain region; a conductive line over the etch stop layer, the conductive line isolated from the first source/drain region by the etch stop layer, a top surface of the conductive line being coplanar with a top surface of the gate structure; and a power rail contact extending through the first fin, the power rail contact connected to the first source/drain region. |
| US11410929B2 |
Semiconductor device and method of manufacture
Semiconductor devices and methods of manufacture are provided wherein a metallization layer is located over a substrate, and a power grid line is located within the metallization layer. A signal pad is located within the metallization layer and the signal pad is surrounded by the power grid line. A signal external connection is electrically connected to the signal pad. |
| US11410927B2 |
Semiconductor structure and method for forming thereof
A semiconductor structure and a method for forming the semiconductor structure are disclosed. The method includes receiving a first integrated circuit component having a seal ring and a fuse structure, wherein the fuse structure is electrically connected to a ground through the seal ring; receiving a second integrated circuit component having an inductor; bonding the second integrated circuit component to the first integrated circuit component; electrically connecting the inductor to the fuse structure, wherein the inductor is electrically connected to the ground through the fuse structure; and blowing the fuse structure after a treatment. |
| US11410926B2 |
E-fuse enhancement by underlayer layout design
In the present disclosure, a semiconductor structure includes an Mx-1 layer including a first dielectric layer and first metal features, wherein the first metal features include a first set of first metal features in a first region and a second set of first metal features in a second region, wherein the first set has a first pattern density and the second set has a second pattern density being greater than the first pattern density. The structure further includes a Vx layer disposed over the Mx-1 layer, the Vx layer including first vias contacting the first set of the first metal features. The structure further includes an Mx layer disposed over the Vx layer, the Mx layer including a fuse element, wherein the fuse element has a first thickness in the first region less than a second thickness in the second region. |
| US11410925B2 |
Electrical fuse structure and method of formation
Various fuse structures are disclosed herein that exhibit improved performance, such as reduced electro-migration. An exemplary fuse structure includes an anode, a cathode, and a fuse link extending between the anode and the cathode. A plurality of anode contacts are coupled to the anode, and a plurality of cathode contacts are coupled to the cathode. The plurality of cathode contacts are arranged symmetrically with respect to a centerline of the fuse link. |
| US11410922B2 |
Semiconductor device comprising a capacitor
A capacitor includes a case including a capacitor element, a first connection terminal, a second connection terminal, and a second insulating sheet formed between the first connection terminal and the second connection terminal, and the first connection terminal, the second insulating sheet, and the second connection terminal extend to the outside from the case. A semiconductor module includes a multi-layer terminal portion in which a first power terminal, a first insulating sheet, and a second power terminal are sequentially stacked. The first power terminal includes a first bonding area electrically connected to the first connection terminal, and the second power terminal includes a second bonding area electrically connected to the second connection terminal. The first insulating sheet includes a terrace portion that extends in a direction from the second bonding area towards the first bonding area in a planar view. |
| US11410918B2 |
Method of making an integrated circuit package including an integrated circuit die soldered to a bond pad of a carrier
An integrated circuit package and a method of forming the same are provided. A method includes forming a first redistribution layer over a carrier, the first redistribution layer including a contact pad and a bond pad. A conductive pillar is formed over the contact pad. A backside surface of an integrated circuit die is attached to the bond pad using a solder joint. An encapsulant is formed along a sidewall of the conductive pillar and a sidewall of the integrated circuit die, a front-side surface of the integrated circuit die being substantially level with a topmost surface of the encapsulant and a topmost surface of the conductive pillar. A second redistribution layer is formed over the front-side surface of the integrated circuit die, the topmost surface of the encapsulant and the topmost surface of the conductive pillar. |
| US11410911B2 |
Semiconductor module
A semiconductor module such that warping or distortion is prevented, and reliability can be increased, is obtained. The semiconductor module includes a base configuring a multiple of terminals or wires, a semiconductor switching element mounted on a mounting portion of the terminal, and a molded resin that seals the semiconductor switching element, wherein a wide portion having a width greater than that of the terminal or the wire is formed in one portion of the terminal or the wire in an outer peripheral side end portion of the molded resin, and the wide portion is embedded and fixed in an interior of the molded resin in a state extended toward the interior from the outer peripheral side end portion of the molded resin. |
| US11410910B2 |
Packaged semiconductor device including liquid-cooled lid and methods of forming the same
Semiconductor devices including lids having liquid-cooled channels and methods of forming the same are disclosed. In an embodiment, a semiconductor device includes a first integrated circuit die; a lid coupled to the first integrated circuit die, the lid including a plurality of channels in a surface of the lid opposite the first integrated circuit die; a cooling cover coupled to the lid opposite the first integrated circuit die; and a heat transfer unit coupled to the cooling cover through a pipe fitting, the heat transfer unit being configured to supply a liquid coolant to the plurality of channels through the cooling cover. |
| US11410907B2 |
Semiconductor module
A semiconductor module includes a multilayer substrate having an insulating plate on which first to third conductive layers respectively connected to positive, negative and output electrode terminals are arranged in a first direction, a plurality of first semiconductor elements each having top and bottom electrodes on the first conductive layer and arranged in a second direction orthogonal to the first direction, a plurality of second semiconductor elements each having top and bottom electrodes on the second conductive layer and arranged in the second direction, first and second main wiring members each connecting the top electrode of each first and second semiconductor element to the second and third conductive layers. The multilayer substrate includes a first control wiring layer extending in the second direction and passing under the first main wiring member, and a second control wiring layer extending in the second direction and passing under the second main wiring member. |
| US11410904B2 |
Thermally enhanced semiconductor package with at least one heat extractor and process for making the same
The present disclosure relates to a thermally enhanced package, which includes a carrier, a thinned die over the carrier, a mold compound, and a heat extractor. The thinned die includes a device layer over the carrier and a dielectric layer over the device layer. The mold compound resides over the carrier, surrounds the thinned die, and extends beyond a top surface of the thinned die to define an opening within the mold compound and over the thinned die. The top surface of the thinned die is at a bottom of the opening. At least a portion of the heat extractor is inserted into the opening and in thermal contact with the thinned die. Herein the heat extractor is formed of a metal or an alloy. |
| US11410901B2 |
Package structure and manufacturing method thereof
A package structure and a manufacturing method thereof are provided. The package structure includes a circuit board, a barrier structure and a molding layer. The circuit board includes a substrate and a component disposed on the substrate. The substrate includes a molding area and a non-molding area, and the component is disposed on the molding area. The barrier structure is disposed on the substrate and located between the molding area and the non-molding area. The barrier structure has a first predetermined height. The molding layer is disposed on the molding area and covers the component. The molding layer has a second predetermined height. The first predetermined height of the barrier structure is less than or equal to the second predetermined height of the molding layer. |
| US11410900B2 |
Semiconductor device having electrode pads arranged between groups of external electrodes
The semiconductor device has the CSP structure, and may include a plurality of electrode pads formed on a semiconductor integrated circuit in order to input/output signals from/to exterior; solder bumps for making external lead electrodes; and rewiring. The solder bumps may be arranged in two rows along the periphery of the semiconductor device. The electrode pads may be arranged inside the outermost solder bumps so as to be interposed between the two rows of solder bumps. Each trace of the rewiring may be extended from an electrode pad, and may be connected to any one of the outermost solder bumps or any one of the inner solder bumps. |
| US11410895B2 |
Wiring board
A wiring board has a metal-made base having a front surface and a back surface, an insulating frame body bonded to the front surface of the base through a bonding layer made of bonding material, a seating provided in an area that is located at an inner side with respect to the frame body on the front surface of the base, a mounting area where a component is supposed to be mounted on the front surface of the base, and a groove formed on the front surface of the base. The groove is arranged in at least an area between the mounting area and the seating on the front surface in plan view, and extends in a direction crossing an opposing direction of the mounting area and the seating. |
| US11410894B2 |
Polygon integrated circuit (IC) packaging
An electronic system includes two integrated circuit (IC) packages that are connected by a package to package (PP) connector. The PP connector may include cabling between a first cabling connector and a second cabling connector. The first cabling connector may be seated to a first carrier connector upon a first IC device carrier of the first IC device package. The second cabling connector may be seated to a second carrier connector upon a second IC device carrier of the second IC device package. The electronic system may further include a heat sink connected to the IC packages, to the first cabling connector, and to the second cabling connector. An IC device may route I/O data through the PP connector, effectively increasing the number of I/O routes. |
| US11410893B1 |
Semiconductor structure
The semiconductor structure includes a substrate, a deep well, a first doped region, a source/drain region, and a first heavily doped region. The substrate has a first conductivity type. The deep well has a second conductivity type disposed on the substrate. The first doped region has the first conductivity type disposed on the deep well. The source/drain region has the second conductivity type disposed on the first doped region. The first heavily doped region has the second conductivity type disposed in a first top region of the source/drain region, in which the first conductivity type is opposite to the second conductivity type. |
| US11410890B2 |
Epitaxial layers in source/drain contacts and methods of forming the same
A method includes providing a p-type S/D epitaxial feature and an n-type source/drain (S/D) epitaxial feature, forming a semiconductor material layer over the n-type S/D epitaxial feature and the p-type S/D epitaxial feature, processing the semiconductor material layer with a germanium-containing gas, where the processing of the semiconductor material layer forms a germanium-containing layer over the semiconductor material layer, etching the germanium-containing layer, where the etching of the germanium-containing layer removes the germanium-containing layer formed over the n-type S/D epitaxial feature and the semiconductor material layer formed over the p-type S/D epitaxial feature, and forming a first S/D contact over the semiconductor material layer remaining over the n-type S/D epitaxial feature and a second S/D contact over the p-type S/D epitaxial feature. The semiconductor material layer may have a composition similar to that of the n-type S/D epitaxial feature. |
| US11410885B2 |
Fully aligned subtractive processes and electronic devices therefrom
Methods of forming fully aligned vias connecting two metal lines extending in two directions are described. The fully aligned via is aligned with the first metal line and the second metal line along both directions. A third metal layer is patterned on a top of a second metal layer in electrical contact with a first metal layer. The patterned third metal layer is misaligned from the top of the second metal layer. The second metal layer is recessed to expose sides of the second metal layer and remove portions not aligned sides of the third metal layer. |
| US11410883B2 |
Tungsten feature fill with nucleation inhibition
Described herein are methods of filling features with tungsten, and related systems and apparatus, involving inhibition of tungsten nucleation. In some embodiments, the methods involve selective inhibition along a feature profile. Methods of selectively inhibiting tungsten nucleation can include exposing the feature to a direct or remote plasma. In certain embodiments, the substrate can be biased during selective inhibition. Process parameters including bias power, exposure time, plasma power, process pressure and plasma chemistry can be used to tune the inhibition profile. The methods described herein can be used to fill vertical features, such as in tungsten vias, and horizontal features, such as vertical NAND (VNAND) wordlines. The methods may be used for both conformal fill and bottom-up/inside-out fill. Examples of applications include logic and memory contact fill, DRAM buried wordline fill, vertically integrated memory gate/wordline fill, and 3-D integration using through-silicon vias. |
| US11410879B2 |
Subtractive back-end-of-line vias
Integrated chips and methods of forming the same include forming a conductive layer over a lower conductive line. The conductive layer is etched to form a via on the lower conductive line. A first insulating layer is formed around the via. The first insulating layer is etched back to a height below a height of the via. An upper conductive line is formed on the via, making contact with at least a top surface and a side surface of the via. |
| US11410877B2 |
Source/drain contact spacers and methods of forming same
Source/drain contact spacers for improving integrated circuit device performance and methods of forming such are disclosed herein. An exemplary method includes etching an interlayer dielectric (ILD) layer to form a source/drain contact opening that exposes a contact etch stop layer (CESL) disposed over a source/drain feature, depositing a source/drain contact spacer layer that partially fills the source/drain contact opening and covers the ILD layer and the exposed CESL, and etching the source/drain contact spacer layer and the CESL to extend the source/drain contact opening to expose the source/drain feature. The etching forms source/drain contact spacers. The method further includes forming a source/drain contact to the exposed source/drain feature in the extended source/drain contact opening. The source/drain contact is formed over the source/drain contact spacers and fills the extended source/drain contact opening. A silicide feature can be formed over the exposed source/drain feature before forming the source/drain contact. |
| US11410875B2 |
Fan-out electronic device
An electronic device (100) includes a substrate (110) and an integrated circuit (120) provided on the substrate (110) having a surface facing away from the substrate (110). An insulating layer (150) extends over the substrate (110) and around the integrated circuit (120) to define an interface (154) between the insulating layer (150) and the integrated circuit (120). An electrically conductive via (130) is provided on the surface of the integrated circuit (120). An insulating material (140) extends over the via (130) and includes an opening (142) exposing a portion of the via (130). A repassivation member (162) extends over the insulating layer (150) and has a surface (164) aligned with the interface (154). An electrically conductive redistribution member (181) is electrically connected to the via (130) and extends over the repassivation member (162) into contact with the insulating layer (150). |
| US11410872B2 |
Oxidized cavity structures within and under semiconductor devices
The present disclosure relates to semiconductor structures and, more particularly, to oxidized cavity structures within and under semiconductor devices and methods of manufacture. The structure includes: a substrate material; active devices over the substrate material; an oxidized trench structure extending into the substrate and surrounding the active devices; and one or more oxidized cavity structures extending from the oxidized trench structure and formed in the substrate material under the active devices. |
| US11410870B2 |
Die attach systems, and methods of attaching a die to a substrate
A die attach system is provided. The die attach system includes: a support structure for supporting a substrate; a die supply source including a plurality of die for attaching to the substrate; a bond head for bonding a die from the die supply source to the substrate, the bond head including a bond tool for contacting the die during a transfer from the die supply source to the substrate; a first motion system for moving the bond head along a first axis; and a second motion system, independent of the first motion system, for moving the bond tool along the first axis. |
| US11410867B2 |
Electrostatic chuck
According to one embodiment, an electrostatic chuck includes a ceramic dielectric, a base plate, a first electrode layer, and a second electrode layer. The ceramic dielectric substrate has a first major surface and a second major surface. The first electrode layer is provided between the first major surface and the second major surface. The second electrode layer is provided between the first electrode layer and the first major surface. The first electrode layer has a first surface and a second surface. A distance between the first surface and the first major surface is constant. A distance between the second surface and the first surface at an end portion of the first electrode layer is shorter than a distance between the second surface and the first surface at a central portion of the first electrode layer. |
| US11410866B2 |
Apparatus and method for linearly moving movable body relative to object
The present invention is provided with: a base moving linearly relative to a substrate and having a first and second positions that are spaced apart from each other by a predetermined interval a in the movement direction; a linear scale where a plurality of graduations having a predetermined pitch are provided along the movement direction; encoder heads which respectively are disposed at the first and second positions of the base and detect first and second graduation numbers of the linear scale with respect to the first and second positions, wherein, as the base is moved along the linear scale, the first and second graduation numbers are detected in this order in the respective encoder heads, and the movement amount of the base is controlled on the basis of the ratio between the predetermined interval and the distance between the first graduation number and the second graduation number on the scale. |
| US11410856B2 |
Chip packaging method
A chip packaging method begins by fixing a chip to the top side of a substrate. The chip is then encapsulated in an encapsulant. After that, the encapsulant is drilled from its top side in order to have a through hole adjacent to the chip. Lastly, an area extending between the chip and the through hole and the hole wall of the through hole are plated with an electrically conductive metal to enable electrical connection between the chip and the substrate through the electrically conductive metal. The chip packaging method solves the problems of the conventional wire bonding method, simplifies the packaging process, and provides the packaged chips with high transmission efficiency. |
| US11410855B2 |
Method of producing electroconductive substrate, electronic device and display device
A method of producing an electroconductive substrate including a base material, and an electroconductive pattern disposed on one main surface side of the base material includes: a step of forming a trench including a bottom surface to which a foundation layer is exposed, and a lateral surface which includes a surface of a trench formation layer, according to an imprint method; and a step of forming an electroconductive pattern layer by growing metal plating from the foundation layer which is exposed to the bottom surface of the trench. |
| US11410849B2 |
Device and method for measuring film longitudinal temperature field during nitride epitaxial growth
The present invention designs a measurement scheme for the longitudinal temperature of the film during nitride epitaxial growth, belongs to the field of semiconductor measurement technology. Epitaxial growth technology is one of the most effective methods for preparing nitride materials. The temperature during the growth process restricts the performance of the device. The non-contact temperature measurement method is generally used to measure the temperature of the graphite disk as the base, which can't obtain the longitudinal temperature. The present invention respectively measures the surface temperature of the epitaxial layer and the temperature of the graphite disk by ultraviolet and infrared radiation temperature measurement technologies, and then uses the finite element simulation method to perform thermal field analysis from the bottom surface of the substrate to the surface of the epitaxial layer, so that the longitudinal temperature is obtained, thereby providing a favorable basis for temperature regulation during nitride growth. |
| US11410848B2 |
Method of forming pattern, method of manufacturing semiconductor device, and pattern-forming material
A method of forming a pattern of an embodiment includes: forming an etch mask on a film to be processed by using a pattern-forming material containing an organic polymer; and patterning the etch mask. In the method of the embodiment, the organic polymer contains 70 atom % or more carbon atoms having an sp2 orbital and 5 atom % or more carbon atoms having an sp3 orbital among the carbon atoms constituting the organic polymer. The patterned etch mask is used for etching of the film to be processed with a gas containing a fluorine atom. |
| US11410846B2 |
Method for metal gate surface clean
The present disclosure provides a method for forming an integrated circuit (IC) structure. The method includes providing a metal gate (MG), an etch stop layer (ESL) formed on the MG, and a dielectric layer formed on the ESL. The method further includes etching the ESL and the dielectric layer to form a trench. A surface of the MG exposed in the trench is oxidized to form a first oxide layer on the MG. The method further includes removing the first oxide layer using a H3PO4 solution. |
| US11410843B1 |
Mass spectrometry system and measuring method thereof
Provided are a mass spectrometry system and a measuring method thereof. The mass spectrometry system comprises an ion source subsystem, an ion accelerator subsystem, a high-energy analyzer subsystem and a particle identification and detector subsystem which are sequentially connected. The ion source subsystem comprises a sampler component and a super-strong ionization ion source component connected with the sampler component; the high-energy analyzer subsystem comprises an analyzer component connected with the ion accelerator subsystem and a beam measuring component connected with the analyzer component; and the detector subsystem comprises a film connected with the beam measuring component and a detector connected with the film. A super-strong ionization technology is employed to eliminate interference of molecular ions; and an atomic number Z can be detected by using a particle identification technology, so as to obtain isobaric ions and information of ions with different mass numbers but the same M/q. |
| US11410842B2 |
Time-frequency analysis
Apparatus and method for processing an image-charge/current signal for an ion(s) undergoing oscillatory motion within an ion analyser apparatus. The method comprises: obtaining a recording of the image-charge/current signal (20a-20e) in the time domain. Then, by a signal processing unit, a value for the period (T) of a periodic signal component is determined within the recorded signal. Subsequently, the recorded signal is segmented into a number of successive time segments [0;T] of duration corresponding to the period (T). These lime segments are then co-registered in a first time dimension (t1) defining the period (T). The co-registered time segments are then separated along a second time dimension (t2) transverse to the first time dimension (t1). This generates a stack of time segments collectively defining a 2-dimensional (2D) function. The 2D function varies both across the stack in the first time dimension and along the stack in the second time dimension. |
| US11410839B2 |
Electron multipliers internal regions
An electron multiplier apparatus of the type used in ion detectors, and modifications thereto for extending the operational lifetime or otherwise improving performance. The electron multiplier includes a series of discrete electron emissive surfaces configured to provide an electron amplification chain, the electron multiplier being configured so as to inhibit or prevent a contaminant from entering into, or passing partially through, or passing completely through the electron multiplier. The electron multiplier may include one or more baffles configured so as to decrease vacuum conductance of the electron multiplier compared to the same or similar electron multiplier not having one or more baffles. |
| US11410837B2 |
Film-forming device
A film-forming device according to one embodiment includes a chamber body, a support, a moving device, a shielding member, a first holder and a second holder, in the film-forming device, a substrate supported by the support is linearly moved. The shielding member is disposed above an area where the substrate is moved, and includes a slit extending in a direction perpendicular to a movement direction of the substrate. The first holder and the second holder hold a first target and a second target, respectively, above the shielding member. The first target and the second target are arranged symmetrically with respect to a vertical plane including a linear path on which the center of the substrate is moved. |
| US11410833B2 |
Lower electrode mechanism and reaction chamber
The present disclosure provides a lower electrode mechanism and a reaction chamber, the lower electrode mechanism includes a base for carrying a workpiece to be processed and a lower electrode chamber disposed under the base, the lower electrode chamber includes an electromagnetic shielding space and a non-electromagnetic shielding space isolated from each other, the chamber of the lower electrode chamber includes a first through hole and a second through hole, and the electromagnetic shielding space and the non-electromagnetic shielding space are respectively connected to outside through the first through hole and the second through hole to prevent a plurality of first components disposed in the electromagnetic shielding space from being interfered by a second component disposed in the non-electromagnetic shielding space. |
| US11410832B2 |
RF measurement system and method
In accordance with an embodiment, a measurement system includes a sensor circuit configured to provide a voltage sense signal proportional to an electric field sensed by the RF sensor and a current sense signal proportional to a magnetic field sensed by the RF sensor; an analysis circuit comprising a frequency selective demodulator circuit configured to: demodulate the voltage sense signal into a first set of analog demodulated signals according to a set of demodulation frequencies, demodulate the current sense signal into a second set of analog demodulated signals according to the set of demodulation frequencies, and determine a phase shift between the voltage sense signal and the current sense signal for at least one frequency of the set of demodulation frequencies; and analog-to-digital converters configured to receive the first and second sets of analog demodulated signals. |
| US11410828B2 |
X-ray source device comprising an anode for generating x-rays
An x-ray source device includes an anode for generating x-rays via an electron beam striking a focal point of the anode, the anode being rotatable about an axis of rotation via an electric motor including a stator and a rotor, the stator including a first coil end, relatively nearer to the anode and a second coil end, relatively further from the anode. A laminated core of the stator is arranged between the first and second coil ends. The first coil end includes a first intersection area, relatively further from the focal point and a second intersection area, relatively nearer to the focal point, with respect to the focal plane. A maximal external radius of the second intersection area is relatively smaller than a maximal external radius of the laminated core in the focal plane. |
| US11410825B2 |
Disconnecting device for interrupting a direct current of a current path as well as a circuit breaker
A disconnecting device interrupts a direct current of a current path containing a hybrid switch which has a current-carrying mechanical contact system and a semiconductor switching system connected in parallel thereto. The contact system has a fixed contact and a moving contact. The moving contact is mounted on a contact bridge being coupled to a drive system moving the moving contact in a switching movement from an open position into a closed position resting against the fixed contact with a contact force. A first magnet element is mounted on the contact bridge and spaced apart from a stationary second magnet element by an air gap such that, when a current flows through the contact bridge, a magnetic field is produced in the first magnet element and the first and second magnet elements are magnetically attracted. The attraction produces a magnetic force directed in the same direction as the contact force. |
| US11410824B2 |
Key structure
A key structure includes a base plate, a key cap, a positioning base, a positioning cover, and a spring. The key cap is disposed above the base plate and has a bottom surface. The positioning base is connected to the bottom surface of the key cap and has a positioning recess. The positioning cover is slidably connected to the positioning base, is inserted into the positioning recess, and includes a bottom portion and a side wall. The spring includes a first spring portion and a second spring portion. The first spring portion is located in the positioning recess and is in contact with the bottom surface of the key cap. The second spring portion is located in the positioning cover. An orthographic projection of the first spring portion on the bottom surface of the key cap is overlapped with an orthographic projection of the side wall of the positioning cover on the bottom surface of the key cap. |
| US11410820B2 |
Composite electrode
An apparatus is disclosed that includes an active storage layer including: a network of carbon nanotubes defining void spaces; and a carbonaceous material located in the void spaces and bound by the network of carbon nanotubes. In some cases, the active layer provides energy storage, e.g., in an ultracapacitor device. |
| US11410819B2 |
Method for preparing super capacitor electrode material Ni doped CoP3/foam nickel
A method for preparing a supercapacitor electrode material Ni doped CoP3/Ni foam is provided, and the CoP3 is applied to the supercapacitor for the first time. The method belongs to a technical field of synthesis and preparation of supercapacitor materials. The present invention adopts a low-temperature phosphating process to prepare the Ni-doped CoP3/foamed nickel as the electrode material of the supercapacitor, so as to provide advantages such as simple synthesis process, easy control, low cost and high specific capacity. The supercapacitor electrode material Ni doped CoP3/Ni foam prepared by the present invention has a hierarchical structure and a large specific surface area, which is beneficial to shorten an ion transmission path, reduce an interface resistance between the electrode material and electrolyte, provide more active sites, and provide a higher specific capacity in alkaline electrolyte. The electrode material shows great potential in electrochemical energy storage. |
| US11410818B2 |
Semiconductor elements and method for manufacturing the same
The present embodiments provide a semiconductor element comprising a first electrode, an active layer, a second electrode comprising a homogeneous metal layer, and further a barrier layer comprising a transparent metal oxide. The barrier layer is placed between the active layer and the second electrode. The present embodiments also provide a method for manufacturing said semiconductor element. |
| US11410816B2 |
Multilayer ceramic electronic component including metal terminals connected to outer electrodes
A multilayer ceramic electronic component includes a multilayer ceramic electronic component body and a pair of metal terminals. The multilayer ceramic electronic component body includes a multilayer body including laminated ceramic layers and inner electrode layers and first and second outer electrodes provided on both end surfaces of the multilayer body. The metal terminals are connected to the outer electrodes. The inner electrode layers are perpendicular or substantially perpendicular to a mounting surface and include extended portions that extend to the end surfaces and portions of the first and second side surfaces. The distance between ends of the first and second outer electrodes on one of the first and second side surfaces is in a range from about 1.8% to about 31.3% of a length dimension of the multilayer ceramic electronic component in a direction connecting both end surfaces of the multilayer ceramic electronic component body. |
| US11410812B2 |
Embedded magnetic component device
In a method of manufacturing an embedded magnetic component, a cavity is formed in an insulating substrate. One or more drops of adhesive are applied to the cavity and a magnetic core is inserted in the cavity. The cavity and the magnetic core are then covered with a first insulating layer. Through holes are formed through the first insulating layer and the insulating substrate, and plated up to form conductive vias. Metallic traces are added to exterior surfaces of the first insulating layer and the insulating substrate to form upper and lower winding layers. The metallic traces and the conductive vias form the windings for an embedded magnetic component, such as a transformer or an inductor. |
| US11410810B2 |
Distributed demagnetizing coil system, shielding device, and demagnetizing method
A distributed demagnetizing coil system, a shielding device, and a demagnetizing method. The system includes turns of demagnetizing coils evenly wound on each shielding surface of a shielding body in the shielding device at intervals and connecting wires provided on outer side of the shielding surface in an inflection manner. One half of each turn is located on inner side of the wound shielding body and the other half of each turn s located on outer side of the wound shielding body for providing corresponding demagnetizing magnetic fields to form a closed magnetic flux loop. One half of each connecting wire is connected to the corresponding demagnetizing coil, the other half of each connecting wire is reversely inflected along an original path and is connected to a power supply module, so that corresponding demagnetizing current is introduced into each demagnetizing coil connected to the connecting wire. |
| US11410807B2 |
Ferrite composition and multilayer electronic component
A ferrite composition includes main-phase particles, first sub-phase particles, second sub-phase particles, and a grain boundary. At least 10% or more of the main-phase particles contain a portion whose Zn concentrations monotonously decrease from a particle surface toward a particle central part along a length of 50 nm or more. The first sub-phase particles contain Zn2SiO4. The second sub-phase particles contain SiO2. A total area ratio of the first sub-phase particles and the second sub-phase particles is 30.5% or more. |
| US11410800B2 |
Low cost extrudable isolator from slit-tape
A dielectric isolator for a twisted pair cable includes a body formed as an elongate strip with a top surface, bottom surface, a first side edge and a second side edge. A first slot is formed in the first side edge and extends at least half way toward the center of the isolator. A second slot is formed in the second side edge and extends at least half way toward the center of the isolator. During cable manufacturing, first and second wedges open the first and second slots. First and second twisted pairs are inserted into the first and second opened slots, respectively. Third and fourth twisted pairs reside at the top and bottom surface, respectively. |
| US11410799B2 |
Method and apparatus for sealing a wiring harness
A method of sealing a wiring-harness includes the steps of: a) dispensing a length of a sealing-tape onto a platform, the sealing-tape having a first-surface and a second-surface opposite the first-surface. b) separating a plurality of wire-cables from a portion of the wiring-harness. c) applying the plurality of wire-cables to a first-half of the first-surface of the sealing-tape. d) folding a second-half of the sealing-tape over the separated plurality of wire-cables such that the second-half overlays the first-half. e) pressing the second-half of the sealing-tape such that the second-half contacts the first-half between the separated plurality of wire-cables, thereby forming a cable-band. f) coiling the cable-band into a generally cylindrical-shaped seal. g) compressing the cylindrical-shaped seal isostatically such that interstitial-voids within the cylindrical-shaped seal are reduced in size.An apparatus for sealing a wiring-harness is also provided. |
| US11410797B2 |
Methods and systems for fabricating high quality superconducting tapes
An MOCVD system fabricates high quality superconductor tapes with variable thicknesses. The MOCVD system can include a gas flow chamber between two parallel channels in a housing. A substrate tape is heated and then passed through the MOCVD housing such that the gas flow is perpendicular to the tape's surface. Precursors are injected into the gas flow for deposition on the substrate tape. In this way, superconductor tapes can be fabricated with variable thicknesses, uniform precursor deposition, and high critical current densities. |
| US11410786B2 |
Radioisotope production apparatus
A radioisotope production apparatus includes a particle accelerator, a first target portion on which a charged particle beam emitted from the particle accelerator is incident and through which the charged particle beam passes, and a second target portion on which the charged particle beam passing through the first target portion is incident. In the first target portion, a target material is held in a beam passage, and a cooling gas supply unit which blows a cooling gas to the target material is provided. In a second target portion, a target substrate is held on a beam axis and a downstream-side surface of the target substrate with respect to the charged particle beam is cooled by cooling water. A total thickness of target foils of the first target portion on the beam axis is smaller than a thickness of the target substrate of the second target portion on the beam axis. |
| US11410783B1 |
Underground nuclear power reactor with a blast mitigation chamber
An underground nuclear power reactor having a hollow blast tunnel which extends from one end of a containment member which houses a nuclear reactor, heat exchanger, generator, etc. A hollow blast tunnel extends from one end of the containment member with a normally closed door positioned therebetween. The blast tunnel defines a blast chamber having a plurality of spaced-apart debris deflectors positioned therein. The blast chamber has an upper wall with a roof opening formed therein which is selectively closed by a roof portion. If the reactor needs to be repaired or replaced, the door is opened so that the reactor will pass therethrough into the blast chamber and outwardly through the roof opening. If the reactor explodes, the blast therefrom drives the debris therefrom through the door and into the blast chamber where the deflectors reduce the blast force as the debris passes through the blast chamber. |
| US11410782B2 |
High density UO2 and high thermal conductivity UO2 composites by spark plasma sintering (SPS)
Embodiments of the invention are directed to a method for production of a nuclear fuel pellet by spark plasma sintering (SPS), wherein a fuel pellet with more than 80% TD or more than 90% TD is formed. The SPS can be performed with the imposition of a controlled uniaxial pressure applied at the maximum temperature of the processing to achieve a very high density, in excess of 95% TD, at temperatures of 850 to 1600° C. The formation of a fuel pellet can be carried out in one hour or less. In an embodiment of the invention, a nuclear fuel pellet comprises UO2 and a highly thermally conductive material, such as SiC or diamond. |
| US11410774B2 |
Computer system, cognitive function evaluation method, and program
A computer system supplies a health service using body information measured by a measurement instrument. The computer system includes a computer that includes an analysis unit analyzing memory of a user. The analysis unit analyzes an error pattern based on a history of a matching-determination process for body information transmitted by the measurement instrument and body information input by the user, calculates a first evaluation value for evaluating a cognitive function based on an analysis result of the error pattern, analyzes an action pattern related to an input action of body information of the user, calculates a second evaluation value for evaluating the cognitive function based on an analysis result of the action pattern, and evaluates the cognitive function of the user based on the first evaluation value and the second evaluation value. |
| US11410764B1 |
Smart medication dispenser
An aspect of the present disclosure is related to a medication dispensing device that includes a housing with an interior. A plurality of cartridge slots are located in the interior, and each of the cartridge slots includes a drive mechanism. A plurality of cartridges are removably disposed in respective ones of the cartridge slots. Each cartridge includes a stationary hub and a rotational wheel. The stationary hub has a window, and the rotational wheel has a plurality of medication chambers that contain medications. The rotational wheel is disposed in the stationary hub. The drive mechanism of the respective cartridge slot is operably connected with the drive wheel and is configured to rotate the rotational wheel relative to the stationary hub to selectively align the medication chambers with the window to dispense the medications contained in the medication chambers out of the cartridge. |
| US11410763B2 |
Method and system for assessing drug efficacy using multiple graph kernel fusion
Embodiments of the present systems and methods may provide techniques to predict the success or failure of a drug used for disease treatment. For example, a method of determining drug efficacy may include, for a plurality of patients, generating a directed acyclic graph from health related information of each patient comprising nodes representing a medical event of the patient, at least one first edge connecting the first node to an additional node, each additional edge connecting nodes representing two consecutive medical events, the edge having a weight based on a time difference between the two consecutive medical events, capturing a plurality of features from each directed acyclic graph, generating a binary graph classification model on captured features of each directed acyclic graph, determining a probability that a drug or treatment will be effective using the binary graph classification model, and determining a drug to be prescribed to a patient based on the determined probability. |
| US11410762B2 |
Medication requisition fulfillment system and method
A system and associated method are provided for fulfillment of medication requisitions corresponding to contained medication units. Requisition fulfillment logic may be included to provide decision data to a patient care provider for use in selecting one of a plurality of different fulfillment sites to fill a given medication requisition. A requisition router may route the medication requisition to a selected one of the plurality of fulfillment sites. The fulfillment sites may provide medication requisition metadata (e.g., data relating to the preparation and handling of medication units) to a medication requisition database in corresponding relation to the corresponding medication requisitions fulfilled by the fulfillment sites. The medication requisition metadata may be stored in the medication requisition database and accessed to facilitate enhanced management functionalities in relation to medication units dispensed by patient care providers. |
| US11410759B2 |
Method and system for capturing healthcare data, using a buffer to temporarily store the data for analysis, and storing proof of service delivery data without deletion, including time, date, and location of service
A system and method for recording video healthcare information of an individual under care without deleting data, includes a device for capturing data and configured to transmit a signal identifying the device, a memory for storing rules, a buffer, a database; and a processor. The processor receives the device identification signal and said data, and retrieves the rules from the memory. Based on the rules, the processor determines, whether the data is to be stored in the database or the buffer. Based on the content of the data, the processor determines the device location, the data recordation time and date, whether the individual under care is identified, and the individual's activity, and based on the rules and the location, time and date, individual identification, and activity, whether the data is proof of service delivery data to be stored in the database or eliminated from the buffer. |
| US11410758B2 |
Medical scan artifact detection system
A medical scan artifact detection system is operable to receive, via a receiver, a medical scan of a patient. Artifact detection data is generated by executing an artifact detection function on the medical scan, where the artifact detection data indicates at least one artifact detected in the medical scan. A notification is transmitted, via a transmitter, a client device for display via a display device, where the notification indicates the at least one artifact. |
| US11410755B2 |
Computer-based system for providing psychological therapy
Apparatus for use in a computer-based system for providing psychological therapy, the apparatus comprising: an access system configured to control access to features and data by users of remote devices, wherein the users comprise patients, therapists and supervisors; and a therapy system configured to enable text-based instant messages to be sent between patients and therapists; wherein the access system is configured to allow patients to retrieve messages sent and received by the patient, therapists to retrieve messages sent and received by the therapist, and supervisors to retrieve messages sent and received by particular patients and/or therapists. |
| US11410753B2 |
System and methods of capturing medical imaging data using a mobile device
Methods for associating medical images to a patient using a mobile image-capturing device and transmitting the medical images to a storage location are disclosed. One example method includes accessing by a user identifying information associated with a patient through an electronic health record (EHR) application installed in the mobile device, launching a second application on the mobile device from the EHR application, and upon the launching of the application from the EHR application, transmitting the patient identifying information accessed by the user from the EHR application to the second application. The second application may then retrieve one or more medical images stored in the mobile device, associate the one or more retrieved medical images with the patient using the identifying information, and transmit the one or more retrieved medical images with the associated patient identifying information from the mobile device to a storage location. |
| US11410749B2 |
Stable genes in comparative transcriptomics
Various embodiments perform stable gene analysis of transcriptome sequencing data. In one embodiment, a plurality of datasets each including transcriptome sequencing data are received by a processor. Each of the plurality of datasets includes a plurality of genes and a respective ranking value for each of the plurality of genes. A plurality of rank normalized input datasets is generated based on assigning, for each of the plurality of datasets, a rank to each of the plurality of genes. One or more longest increasing subsequence (LIS) of ranks are identified between each pair of the plurality of rank normalized input datasets. A set of stable genes from the plurality of genes is identified based on each of the one or more LIS of ranks across the plurality of rank normalized input datasets. |
| US11410748B2 |
Methods for prostate cancer detection and treatment
The present invention is directed to methods for detecting a prostate cancer, methods for determining whether a prostate cancer is stable or progressive, low or high Gleason score, methods for differentiating benign prostate hyperplasia (BPH) from prostate cancer, methods for determining the completeness of surgery, and methods for evaluating the response to a prostate cancer therapy. |
| US11410742B1 |
Microelectronic device testing, and related devices, systems, and methods
Microelectronic device testing, and related methods, devices, and systems, are described herein. A device may include a memory array including a number of rows and a number of columns. The memory device may further include circuitry coupled to the memory array. The circuitry may be configured to perform a testing operation on each row of the number of rows to detect: a first fail of a first row of the number of rows; and a set of additional fails associated with a set of rows of the number of rows. The circuitry may also be configured to determine whether the set of rows is adjacent the first row. Further, in response to determining that the set of rows is adjacent the first row, the circuitry may be configured to generate a signal indicative of a failure of a column of the number of columns. |
| US11410741B2 |
Memory controller and flash memory system
A memory controller includes a control circuit. The control circuit configures a plurality of physical blocks in a flash memory into a group. The control circuit allocates the plurality of physical blocks constituting the group to a data block and a redundant block. The control circuit writes data required to be saved into the data block. The control circuit writes redundant data based on the data required to be saved into the redundant block belonging to the same group as the data block. When all the data required to be saved are successfully written into the data block, the control circuit releases from the group at least one redundant block belonging to the same group as the data block. |
| US11410737B2 |
Power regulation for memory systems
Methods, systems, and devices for power regulation for memory systems are described. In one example, a memory system, such as a memory module, may include a substrate, and an input/output component coupled with the substrate and operable to communicate signals with a host system. The memory system may also include one or more memory devices coupled with the substrate and the input/output component and operable to store data for the host system. A memory device of the one or more memory devices may include a power management component in its package with one or more memory dies. The power management component may be coupled with the one or more memory dies, and feedback component, and may be operable to provide one or more supply voltages for the one or more memory dies based on one or more voltages associated with the memory system. |
| US11410736B2 |
Semiconductor memory device
A semiconductor memory device includes a memory cell array, a page buffer, a control logic, and a voltage generator. The memory cell array includes memory cells. The page buffer is connected to the memory cells through a bit line and configure to read data of the memory cells. The control logic generates control signals for controlling the page buffer. The voltage generator generates activation voltages of the control signals. The page buffer includes a first transistor between the bit line and a first node, a second transistor between a power voltage and a second node, a third transistor between the first node and the second node, a fourth transistor between the second node and a third node, and a fifth transistor between the first node and the third node. The voltage generator controls a first control signal controlling the fifth transistor based on temperature of the semiconductor memory device. |
| US11410731B2 |
Semiconductor memory device and method of operating the same
Provided herein is a semiconductor memory device and a method of operating the same. The semiconductor memory device includes a memory block, a peripheral circuit, and a control logic. The memory block includes a plurality of sub-blocks coupled to a plurality of source select lines, respectively. The peripheral circuit performs a program operation on the memory block. The control logic is configured to control the peripheral circuit to increase a voltage of a common source line that is coupled to the memory block, increase a voltage of at least one source select line, among the plurality of source select lines, to a first voltage level, and set a voltage of a bit line that is coupled to the memory block and increase the voltage of at least one source select line from the first voltage level to a second voltage level. |
| US11410725B2 |
Memory system
A memory system includes: a nonvolatile memory and a memory controller. The nonvolatile memory includes: a first memory cell and a second memory cell each configured to store data and coupled in parallel to a bit line, a first word line coupled to the first memory cell, and a second word line coupled to the second memory cell and differing from the first word line. The first and second memory cell face each other between the first word line and the second word line. The memory controller is configured to read first data from the first memory cell, read second data from the second memory cell, and decode data stored in the first memory cell based on the first data and the second data. |
| US11410724B2 |
Semiconductor device and data reading method using the same
A semiconductor device is provided. The device includes a memory that stores data in a non-volatile and volatile manner and a memory controller configured to control the memory. The memory includes a word line pair including a first and second word line, a first bit line pair orthogonal to the first and the second word line and including a first bit line and a first complementary bit line, and a memory cell pair including first and second memory cells adjacent to the first memory cell in a word line direction. A left node of the first memory cell, and a right node of the first memory cell and a left node of the second memory cell, are all connected to the first word line, and a value of the data stored in the memory cell pair in the non-volatile manner is determined according to the selected first word line. |
| US11410722B2 |
Phase-change memory device for improving resistance drift and dynamic resistance drift compensation method of the same
A phase-change memory device and a dynamic resistance drift compensation method thereof are provided. The phase-change memory device includes a plurality of bit lines; a plurality of source lines crossing the plurality of bit lines; a plurality of memory cells at respective intersections between the plurality of bit lines and the plurality of source lines, the plurality of memory cells each including a phase-change layer; a current generator connected to the plurality of bit lines and configured to generate a set current to be supplied to each of the plurality of memory cells; and a control driver configured to control the current generator and the plurality of bit lines to supply the set current to each of the plurality of memory cells. |
| US11410717B2 |
Apparatuses and methods for in-memory operations
The present disclosure includes apparatuses and methods for in-memory operations. An example apparatus includes a memory device including a plurality of subarrays of memory cells, where the plurality of subarrays includes a first subset of the respective plurality of subarrays and a second subset of the respective plurality of subarrays. The memory device includes first sensing circuitry coupled to the first subset, the first sensing circuitry including a sense amplifier and a compute component configured to perform an in-memory operation. The memory device includes second sensing circuitry coupled to the second subset, the second sensing circuitry including a sense amplifier. The memory device also includes a controller configured to direct a first movement of a data value to a selected subarray in the first subset based on the first sensing circuitry including the compute component. |
| US11410716B2 |
Storage device, semiconductor device, and electronic device
A novel storage device and a novel semiconductor device are provided.In the storage device, a cell array including a plurality of memory cells is stacked above a control circuit, and the cell array operates separately in a plurality of blocks. Furthermore, a plurality of electrodes are included between the control circuit and the cell array. The electrode is provided for a corresponding block to overlap with the block, and a potential of the electrode can be changed for each block. The electrode has a function of aback gate of a transistor included in the memory cell, and a potential of the electrode is changed for each block, whereby the electrical characteristics of the transistor included in the memory cell can be changed. Moreover, the electrode can reduce noise caused in the control circuit. |
| US11410714B2 |
Magnetoresistive memory device and manufacturing method thereof
A magnetoresistive memory device includes a plurality of bottom conductive lines, a plurality of top conductive lines, a first memory cell, and a second memory cell. The top conductive lines are over the bottom conductive lines. The first memory cell is between the bottom conductive lines and the top conductive lines and includes a first magnetic tunnel junction (MTJ) stack. The second memory cell is adjacent the first memory cell and between the bottom conductive lines and the top conductive lines. The second memory cell includes a second MTJ stack, and a top surface of the second MTJ stack is higher than a top surface of the first MTJ stack. |
| US11410708B2 |
Semiconductor memory device and manufacturing method of the semiconductor memory device
Provided herein is a semiconductor memory device and a manufacturing method of the semiconductor memory device. The semiconductor memory device includes a contact pattern including a vertical contact part, and a sidewall contact part extending from the vertical contact part in a direction crossing the vertical contact part, a lower conductive pattern having a hole into which the vertical contact part is inserted, and an upper conductive pattern overlapping a portion of the lower conductive pattern. The upper conductive pattern includes a first side portion in contact with the sidewall contact part, and a second side portion facing the vertical contact part and spaced apart from the vertical contact part. |
| US11410707B2 |
Suspension for disk device
A suspension includes a load beam with first and second openings, a flexure including first and second outriggers, and first and second damper members. The first damper member is attached to the load beam and part of the first outrigger that overlaps the first opening of the load beam. The second damper member is attached to the load beam and part of the second outrigger that overlaps the second opening of the load beam. The first opening includes a region which is not covered by the first damper member, and the second opening includes a region which is not covered by the second damper member. |
| US11410704B2 |
Generation and use of user-selected scenes playlist from distributed digital content
A digital content package includes first content comprising a video feature such as a motion picture or the like, and a user-selectable application configured to operate as follows. When activated using an icon off of a menu screen, the application records an identifier for scenes (discrete portions) of the first content that are selected by a user to generate a playlist. The user may select the scenes by indicating a start and end of each scene. The application saves the playlist locally, then uploads to a server. Via a user account at the server, a user may publish the playlist to a user-created distribution list, webpage, or other electronic publication, and modify the playlist by deleting or reordering scenes. |
| US11410700B2 |
Video playback buffer adjustment
A video playback buffer adjustment system is disclosed. The video playback buffer has a target size, measured in units of time of content, and includes a compressed frames queue and an uncompressed frames queue. The uncompressed frames queue has a minimum threshold queue size. If the size of the uncompressed frames queue falls below the minimum threshold size, then a next encoded frame in the compressed frames queue is removed from the compressed frames queue, decoded, and enqueued in the uncompressed frames queue. If a current size of the playback queue exceeds the target size plus Δ (a hysteresis value), then a playback frame rate is increased, and a presentation time of one or more frames in the uncompressed frames queue is adjusted according to the increased playback frame rate. If the playback queue size is less than the target size minus Δ, the playback speed can be reduced. |
| US11410698B1 |
Sliding disk drive recording head with wireless power and data interfaces
A disk drive has a recording head slidably coupled to a rail and in magnetic communication with a disk surface. The recording head has an optical power interface and an optical data interface. An optical transceiver is fixably mounted proximate an end of the rail and optically coupled to the optical power interface and/or the optical data interface of the recording head. The coupling between the optical transceiver and the interfaces facilitates writing data to the disk surface and/or reading data from the disk surface via the recording head. |
| US11410697B2 |
Process for forming underlayer for tape media
A method, according to one approach, includes forming an underlayer of a magnetic recording medium. The underlayer includes encapsulated nanoparticles each comprising a magnetic nanoparticle encapsulated by an aromatic polymer, and a polymeric binder binding the encapsulated nanoparticles. A method, according to another approach, includes mixing encapsulated nanoparticles with a polymeric binder and a solvent to form a mixture, the encapsulated nanoparticles each comprising a magnetic nanoparticle encapsulated by an aromatic polymer. The mixture is applied onto a structure. The applied mixture is at least partially dried and cured. |
| US11410694B2 |
Axial flux permanent magnet motor for ball screw cam elevator mechanism for reduced-head hard disk drive
An approach to a reduced-head hard disk drive (HDD) involves an actuator elevator subsystem that includes a ball screw cam assembly with an axial flux permanent magnet (AFPM) motor affixed to a cam screw to drive rotation of the screw, which drives translation of an actuator arm assembly so that a corresponding pair of read-write heads can access different magnetic-recording disks of a multiple-disk stack. |
| US11410691B2 |
Wiring board unit for disk devices, actuator assembly for disk devices and disk device comprising the same
According to one embodiment, a wiring board unit includes a reinforcing board, a flexible printed circuit board includes a joint portion including a first plane and a second plane and attached on the reinforcing board, a relay unit extending from the first plane, a plurality of connection pad groups located on one of the first plane and the second plane and a first IC chip mounted on the first plane, and the joint portion is bent on a boundary between the first plane and the second plane. |
| US11410682B2 |
Method for detecting and recognizing an emotional state of a user
A method includes: prompting a user to recite a story associated with a first target emotion; recording the user reciting the story and recording a first timeseries of biosignal data via a set of sensors integrated into a wearable device worn by the user; accessing a first timeseries of emotion markers extracted from the voice recording; labeling the first timeseries of biosignal data according to the first timeseries of emotion markers; generating an emotion model linking biosignals to emotion markers for the user based on the first emotion-labeled timeseries of biosignal data; detecting a second instance of the first target emotion exhibited by the user based on a second timeseries of biosignal data and the emotion model; and notifying the user of the second instance of the first target emotion. |
| US11410680B2 |
Source classification using HDMI audio metadata
Methods, apparatus, systems and articles of manufacture are disclosed for source classification using HDMI audio metadata. An example apparatus includes a metadata extractor to extract values of audio encoding parameters from HDMI metadata obtained from a monitored HDMI port of a media device, the HDMI metadata corresponding to media being output from the monitored HDMI port; map the extracted values of the audio encoding parameters to a first unique encoding class (UEC) in a set of defined UECs, different ones of the set of defined UECs corresponding to different combinations of possible values of the audio encoding parameters capable of being included in the HDMI metadata; and identify a media source corresponding to the media output from the HDMI port based on one or more possible media sources mapped to the first UEC. |
| US11410678B2 |
Methods and apparatus for detecting singing
A method of detecting singing of a user of a personal audio device, the method comprising: receiving a first audio signal comprising bone-conducted speech of the user from a first transducer of the personal audio device; monitoring a second audio signal output to a speaker of the personal audio device; and determining whether the user is singing based on the first audio signal and the second audio signal. |
| US11410674B2 |
Method and device for recognizing state of meridian
The present application relates to a method and device for recognizing the state of a human body meridian by utilizing a voice recognition technology, the method comprising: receiving an input voice of a user; preprocessing the input voice; extracting a stable feature of the preprocessed input voice; primarily classifying the stable feature on the basis of a feature recognition model, and determining a basic classification pitch, wherein the basic classification pitch comprises Gong, Shang, Jue, Zhi and Yu (respectively equivalent to do, re, mi, sol and la); secondarily classifying the stable feature on the basis of the feature recognition model, and determining a secondary classification tone in the basic classification pitch; and recognizing the state of a meridian according to the secondary classification tone. The method for recognizing the state of a human body meridian of the present invention can accurately recognize the state of a human body meridian by classifying individual voices, thus solving the problem that conventional voice recognition and classification are completely dependent on human experience. |
| US11410673B2 |
Audio processing for vehicle sensory systems
Audio-derived information is provided to a vehicle control system of a vehicle by attaching a microphone externally to a vehicle to generate an analog signal in response to sound waves external to the vehicle. An enclosure containing sound-attenuating material mechanically filters low frequency sounds from reaching the microphone transducer. An analog-to-digital converter converts the analog signal to a digital signal. A vehicle data bus transfers the digital signal to the vehicle control system. |
| US11410672B2 |
Organization of signal segments supporting sensed features
The managing of sensed signals used to sense features of physical entities over time. A computer-navigable graph of sensed features is generated. For each sensed feature, a signal segment that was used to sense that feature is computer-associated with the sensed feature. Later, the graph of sensed features may be navigated to that features. The resulting signal segment(s) may then be access allowing for rendering of the signal evidence that resulted in the sensed feature. Accordingly, the principles described herein allow for sophisticated and organized navigation to sensed features of physical entities in the physical world, and allow for rapid rendering of the signals that evidence that sensed features. |
| US11410670B2 |
Method and system for acoustic communication of data
The present invention relates to a method for receiving data transmitted acoustically. The method includes receiving an acoustically transmitted signal encoding data; processing the received signal to minimise environmental interference within the received signal; and decoding the processed signal to extract the data. The data encoded within the signal using a sequence of tones. A method for encoding data for acoustic transmission is also disclosed. This method includes encoding data into an audio signal using a sequence of tones. The audio signal in this method is configured to minimise environmental interference. A system and software are also disclosed. |
| US11410666B2 |
Transforming audio signals captured in different formats into a reduced number of formats for simplifying encoding and decoding operations
The disclosed embodiments enable converting audio signals captured in various formats by various capture devices into a limited number of formats that can be processed by an audio codec (e.g., an Immersive Voice and Audio Services (IVAS) codec). In an embodiment, a simplification unit of the audio device receives an audio signal captured by one or more audio capture devices coupled to the audio device. The simplification unit determines whether the audio signal is in a format that is supported/not supported by an encoding unit of the audio device. Based on the determining, the simplification unit, converts the audio signal into a format that is supported by the encoding unit. In an embodiment, if the simplification unit determines that the audio signal is in a spatial format, the simplification unit can convert the audio signal into a spatial “mezzanine” format supported by the encoding. |
| US11410665B2 |
Methods and apparatus for decoding encoded audio signal(s)
There are provided decoding and encoding methods for encoding and decoding of multichannel audio content for playback on a speaker configuration with N channels. The decoding method comprises decoding, in a first decoding module, M input audio signals into M mid signals which are suitable for playback on a speaker configuration with M channels; and for each of the N channels in excess of M channels, receiving an additional input audio signal corresponding to one of the M mid signals and decoding the input audio signal and its corresponding mid signal so as to generate a stereo signal including a first and a second audio signal which are suitable for playback on two of the N channels of the speaker configuration. |
| US11410664B2 |
Apparatus and method for estimating an inter-channel time difference
An apparatus for estimating an inter-channel time difference between a first channel signal and a second channel signal, includes: a calculator for calculating a cross-correlation spectrum for a time block from the first channel signal in the time block and the second channel signal in the time block; a spectral characteristic estimator for estimating a characteristic of a spectrum of the first channel signal or the second channel signal for the time block; a smoothing filter for smoothing the cross-correlation spectrum over time using the spectral characteristic to obtain a smoothed cross-correlation spectrum; and a processor for processing the smoothed cross-correlation spectrum to obtain the inter-channel time difference. |
| US11410660B2 |
Voice recognition system
Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for voice recognition. In one aspect, a method includes the actions of receiving a voice input; determining a transcription for the voice input, wherein determining the transcription for the voice input includes, for a plurality of segments of the voice input: obtaining a first candidate transcription for a first segment of the voice input; determining one or more contexts associated with the first candidate transcription; adjusting a respective weight for each of the one or more contexts; and determining a second candidate transcription for a second segment of the voice input based in part on the adjusted weights; and providing the transcription of the plurality of segments of the voice input for output. |
| US11410658B1 |
Maintainable and scalable pipeline for automatic speech recognition language modeling
Audio data saved at the end of client interactions are sampled, analyzed for pauses in speech, and sliced into stretches of acoustic data containing human speech between those pauses. The acoustic data are accompanied by machine transcripts made by VoiceAI. A suitable distribution of data useful for training and testing are stipulated during data sampling by applying certain filtering criteria. The resulting datasets are sent for transcription by a human transcriber team. The human transcripts are retrieved, some post-transcription processing and cleaning are performed, and the results are added to datastores for training and testing an acoustic model. |
| US11410656B2 |
Systems and methods for managing voice queries using pronunciation information
The system identifies one or more entities or content items among a plurality of stored information. The system generates an audio file based on a first text string that represents the entity or content item. Based on the first text string and at least one speech criterion, the system generating, using a speech-to-text module a second text string based on the audio file. The system then compares the text strings and stores the second text string if it is not identical to the first text string. The system generates metadata that includes results from text-speech-text conversions to forecast possible misidentifications when responding to voice queries during search operations. The metadata includes alternative representations of the entity. |
| US11410654B2 |
Sound system of vehicle and control method thereof
A vehicle that efficiently prevents a driver from eavesdropping a voice of a passenger may include: a driver's seat having a headrest speaker in a headrest thereof; the headrest speaker configured to output a sound, a front passenger seat, at least one rear passenger seat; a microphone configured to detect a voice of the passenger seated on the at least one rear passenger seat; and a controller configured to generate a masking curve based on the voice of the passenger and output a masking sound corresponding to the masking curve by controlling the headrest speaker. |
| US11410652B2 |
Multi-look enhancement modeling and application for keyword spotting
A method, computer system, and computer readable medium are provided for activating speech recognition based on keyword spotting (KWS). Waveform data corresponding to one or more speakers is received. One or more direction features are extracted from the received waveform data. One or more keywords are determined from the received waveform data based on the one or more extracted features. Speech recognition is activated based on detecting the determined keyword. |
| US11410651B2 |
Network source identification via audio signals
Network source identification via audio signals is provided. A system receives data packets with an input audio signal from a client device. The system identifies a request. The system selects a digital component provided by a digital component provider device. The system identifies audio chimes stored in memory of the client device. The system matches, based on a policy, an identifier of the digital component provider device to a first audio chime stored in the memory of the client device. The system determines, based on a characteristic of the first audio chime, a configuration to combine the digital component with the first audio chime. The system generates an action data structure with the digital component, an indication of the first audio chime, and the configuration. The system transmits the action data structure to the client device to cause the client device to generate an output audio signal. |
| US11410645B2 |
Techniques for language independent wake-up word detection
A user device configured to perform wake-up word detection in a target language. The user device comprises at least one microphone (430) configured to obtain acoustic information from the environment of the user device, at least one computer readable medium (435) storing an acoustic model (150) trained on a corpus of training data (105) in a source language different than the target language, and storing a first sequence of speech units obtained by providing acoustic features (110) derived from audio comprising the user speaking a wake-up word in the target language to the acoustic model (150), and at least one processor (415,425) coupled to the at least one computer readable medium (435) and programmed to perform receiving, from the at least one microphone (430), acoustic input from the user speaking in the target language while the user device is operating in a low-power mode, applying acoustic features derived from the acoustic input to the acoustic model (150) to obtain a second sequence of speech units corresponding to the acoustic input, determining if the user spoke the wake-up word at least in part by comparing the first sequence of speech units to the second sequence of speech units, and exiting the low-power mode if it is determined that the user spoke the wake-up word. |
| US11410643B2 |
Response generation for conversational computing interface
A computer-implemented method of responding to a conversational event. The method comprises enacting, by a conversational computing interface, an initial computer-executable plan based on a conversational event received by the conversational computing interface, wherein the initial computer-executable plan is configured to output an initial value based on the conversational event. The method further comprises selecting, by the conversational computing interface, an extended computer-executable plan based on determining that the initial value is insufficient for generating an extended description responsive to the conversational event. The method further comprises enacting, by the conversational computing interface, the extended computer-executable plan to output additional information beyond what the initial computer-executable plan is configured to output, the additional information sufficient for generating the extended description responsive to the conversational event. The method further comprises outputting, via the conversational computing interface, a response to the conversational event including the extended description. |
| US11410642B2 |
Method and system using phoneme embedding
A system and method for creating an embedded phoneme map from a corpus of speech in accordance with a multiplicity of acoustic features of the speech. The embedded phoneme map is used to determine how to pronounce borrowed words from a lending language in the borrowing language, using the phonemes of the borrowing language that are closest to the phonemes of the lending language. The embedded phoneme map is also used to help linguists visualize the phonemes being pronounced by a speaker in real-time and to help non-native speakers practice pronunciation by displaying the differences between proper pronunciation and actual pronunciation for open-ended speech by the speaker. |
| US11410641B2 |
Training and/or using a language selection model for automatically determining language for speech recognition of spoken utterance
Methods and systems for training and/or using a language selection model for use in determining a particular language of a spoken utterance captured in audio data. Features of the audio data can be processed using the trained language selection model to generate a predicted probability for each of N different languages, and a particular language selected based on the generated probabilities. Speech recognition results for the particular language can be utilized responsive to selecting the particular language of the spoken utterance. Many implementations are directed to training the language selection model utilizing tuple losses in lieu of traditional cross-entropy losses. Training the language selection model utilizing the tuple losses can result in more efficient training and/or can result in a more accurate and/or robust model—thereby mitigating erroneous language selections for spoken utterances. |
| US11410638B1 |
Voice user interface for nested content
Methods and systems for causing a voice-activated electronic device to identify that a step of a series of steps can begin while a previous step is ongoing. In some embodiments, a first step will have a waiting period. The methods and systems, in some embodiments, identify this waiting period and determine that a second step can begin during the waiting period of step one. In some embodiments, nested sets of sequential steps are identified within the series of steps. The nested sets of sequential steps, in some embodiments, can be called upon. |
| US11410637B2 |
Voice synthesis method, voice synthesis device, and storage medium
A voice synthesis method according to an embodiment includes altering a series of synthesis spectra in a partial period of a synthesis voice based on a series of amplitude spectrum envelope contours of a voice expression to obtain a series of altered spectra to which the voice expression has been imparted, and synthesizing a series of voice samples to which the voice expression has been imparted, based on the series of altered spectra. |
| US11410636B2 |
Tonal musical instruments for outdoor installation
Tonal musical instruments configured for outdoor installation are disclosed. The tonal musical instrument may comprise a support post, wherein the support post is configured for attachment to an outdoor surface, at least one a non-vibrating guard, a metal plate tuned to produce at least one note on a musical scale when struck by a user, and one or more fasteners securing the at least one non-vibrating guard and the metal plate to the support post. |
| US11410635B1 |
Adjustable capstan for an electric piano action
An adjustable action for an electric piano is provided with a keystick having an adjustable bottom capstan at an end thereof opposite the key, which is adjustable so that the rest position of the hammer of each such key may be independently adjusted, and an adjustable top capstan and hammer jack on the top of the keystick, which may be adjusted so that the stop-lock (depressed key) position of the hammer of each such key may be independently adjusted. |
| US11410634B2 |
Information processing apparatus, information processing method, display system, and mobile object
An information processing apparatus according to an embodiment of the present technology includes an acquisition unit and a display control unit. The acquisition unit acquires posture information regarding a posture of a user. The display control unit controls display locations of first information and second information on a display screen on the basis of the acquired posture information, the second information having a different kind from the first information, the display screen being disposed to cover a surrounding of the user at least from a front toward an upper side. |
| US11410628B2 |
Pixel voltage compensation method for liquid crystal display to suppress pixel electrode voltage cross-talk
A pixel voltage compensation method, a pixel voltage compensator device and a display device are provided. The compensation method includes: determining a capacitance between at least one data line adjacent to a target pixel electrode and the target pixel electrode; detecting a voltage difference between a driving voltage of the data line and a driving voltage of the target pixel electrode in a period from a start of present charging of the target pixel electrode to a start of next charging; calculating a variation of the driving voltage of the target pixel electrode caused by the capacitance and the voltage difference; and compensating for the driving voltage of the target pixel electrode according to the variation. This compensation method can suppress the phenomenon of voltage cross-talk, and thus can improve the display effect of the display device. |
| US11410627B2 |
Dual gate array substrate and display device
The embodiment of the present disclosure provides a dual gate array substrate and a display device. The dual gate array substrate includes pairs of gate lines and data lines. The pairs of gate lines and the data lines intersect perpendicularly to define multiple display units arranged in an array. The display units include two sub-pixels of a same color, and the sub-pixels of the same color on both sides of one data line are coupled to the one data line. |
| US11410626B1 |
Method for driving display panel, display panel and display device
The present application provides a method for driving a display panel, including: providing data signals to M rows of sub-pixels, wherein providing data signals to an X-th row of sub-pixels includes: determining, for each sub-pixel in the X-th row, a grayscale compensation value for a data signal provided to the sub-pixel; determining, for each sub-pixel, an actual grayscale corresponding to the sub-pixel according to the grayscale compensation value and a theoretical grayscale value Lx of the sub-pixel; and providing the data signals to the X-th row of sub-pixels according to the actual grayscales corresponding to the respective sub-pixels in the X-th row. The grayscale compensation value is determined by: calculating a grayscale difference δ by a formula δ=Lx−Lx-1, where grayscale Lx-1 is a theoretical grayscale of an adjacent sub-pixel in an (X−1)-th row; and determining the grayscale compensation value according to the grayscale difference and a grayscale compensation look-up table. |
| US11410623B2 |
Control method of time sequential control signal and driving circuit
A control method of a time sequential control signal and a driving circuit are provided. A main TCON chip and an assist TCON chip compute corresponding frame rates according to pixel clock signal frequencies, then call a corresponding table, and transmit the table to a first driving unit and a second driving unit respectively. The first driving unit and the second driving unit respectively perform scanning on rows and columns of pixels to allow complicated dynamic images to be displayed with smooth motions. |
| US11410622B2 |
Display method and device, and storage medium
A display method is applied to electronic equipment including a display assembly. A display content displayed by the display assembly includes a background and an object for reading located on the background. The display method includes: differentiating grayscales of background pixels of the background; and displaying the background based on the background pixels with the differentiated grayscales, and displaying the object for reading. |
| US11410620B2 |
Adaptive gate driving for high frequency AC driving of EWoD arrays
A method of driving an active matrix electrowetting on dielectric device including thin-film-transistors to increase the switching frequency of the propulsion electrodes beyond what is typical for line-by-line active matrix driving. By grouping gate lines and simultaneously driving those gate lines as a gate block, a frame update can be completed much faster and, as a consequence, the overall drive frequency at the propulsion electrodes can be increased substantially. The faster drive frequency improves the performance of electrowetting devices, especially when used with aqueous droplets having a high ionic strength. |
| US11410619B2 |
Display apparatus and light apparatus thereof
A display apparatus includes: a liquid crystal panel; and a light apparatus on which the liquid crystal panel is disposed, the light apparatus including: a substrate; a plurality of dimming blocks including a first dimming block and a second dimming block disposed immediately next to the first dimming block, each of the plurality of dimming blocks including at least one respective light source disposed on a first side of the substrate; and a plurality of driving devices disposed on the first side of the substrate and including a first driving device disposed in the first dimming block and a second driving device disposed in the second dimming block, each driving device of the plurality of driving devices being configured to provide a driving current to the at least one respective light source included in a respective one of the plurality of dimming blocks, wherein the first driving device and the second driving device are disposed at relatively different positions respectively within the first dimming block and the second dimming block. |
| US11410617B2 |
Light source control for displaying video
A method for controlling a light source of a display is provided. In the method, maximum frame rates are determined for different portions of video content to be displayed on the display. The light source of the display is controlled to blink according to a blinking frequency when a first portion of the video content having a first maximum frame rate is displayed. First metadata of high dynamic range is received. The light source of the display is controlled to not blink when a second portion of the video content having a second maximum frame rate is displayed. The video content is displayed at the maximum frame rates and in the high dynamic range. |
| US11410611B2 |
Ambient light sensor system
An apparatus includes a display screen, an ambient light sensor disposed behind the display screen, and an electronic control unit operable to control a brightness of the display screen based on a duty cycle of a PWM signal. The electronic control unit is operable to sample an output of the ambient light sensor, identify a pair of consecutive samples of the ambient light sensor output that represent a greatest difference in magnitudes of their values, and to estimate a brightness of the display screen based on the difference. |
| US11410609B2 |
Output control device, output control circuit and display panel
Provided is an output control device for providing control signals for a pixel circuit, which includes: a first output device configured to output a first control signal for controlling writing of a data signal into the pixel circuit, a second output device configured to output a second control signal for controlling a light emitting element to emit light, and a third output device configured to output a third control signal for controlling resetting of the light emitting element. A frequency of the third control signal is higher than a frequency of the first control signal. In a first period, the second control signal is an active level signal and the third control signal is an inactive level signal. In a second period, the second control signal is an inactive level signal and the third control signal is an active level signal. |
| US11410608B2 |
Shift register circuitry, gate driving circuit, display device, and driving method thereof
Embodiments of the present disclosure provide a shift register circuitry, a gate driving circuit, a display device, and a driving method. The shift register circuitry includes a blanking input circuit, a display input circuit, an output circuit, and a first control circuit. The blanking input circuit provides a blanking input signal to the pull-up control node and supplies a blanking pull-up signal to the pull-up node. The display input circuit provides a display pull-up signal to the pull-up node in response to the display input signal. The output circuit outputs the output signal to the shift signal output terminal and the pixel signal output terminal under the control of the voltage of the pull-up node. The first control circuit couples the shift signal output terminal to the pixel signal output terminal in response to the display input signal. |
| US11410605B2 |
Organic light emitting display device having improved pixel structure configuration
An organic light emitting display device can include an organic light emitting diode (OLED), a driving transistor connected to an anode electrode of the OLED, a scan transistor, a digital-to-analog converter (DAC) and a sensing unit. The scan transistor is connected the anode electrode of the OLED and a data line. The DAC supplies a data voltage for displaying to the data line in a displaying period and supplies a data voltage for sensing to the data line in a sensing period. The sensing unit obtains an anode voltage of the OLED as a sensing voltage through the data line in the sensing period. |
| US11410603B2 |
Method for driving a display panel and display device
Provided are a method for driving a display panel and a display device. In the method for driving a display panel, at least one picture update period includes a data write stage, a data retention stage, and a data compensation stage; the data compensation stage precedes the data write stage; at the data compensation stage, a gate scanning signal is provided for and a compensation data voltage is written to a pixel unit, where the compensation data voltage is less than a target data voltage which is a theoretical data voltage corresponding to target brightness of a current picture update period; at the data write stage, the gate scanning signal is provided for and the target data voltage is written to the pixel unit; and at the data retention stage, no data voltage is written to the pixel unit. |
| US11410602B2 |
Display device and method of driving the same
A display device includes a driving circuit that drives a pixel, and a display region including the pixel. The pixel includes a light emitting element electrically connected between a first power source and a second power source, a first transistor electrically connected between the first power source and the light emitting element to control a driving current, the first transistor including a first gate electrode electrically connected to a first node, and a second gate electrode electrically connected to a bias control line, and a switching transistor electrically connected between a data line and the first node, the switching transistor including a gate electrode electrically connected to a scan line. The driving circuit varies a control signal provided to the bias control line in a second period based on a first data signal provided to the data line during a first period. |
| US11410597B2 |
Shift register, gate driving circuit, display apparatus and driving method
Disclosed is a shift register including a first input sub-circuit, configured to receive a first input signal from a first input terminal and output a blanking output control signal to a first node in a blanking period of time of a frame; a second input sub-circuit, configured to receive a second input signal from a second input terminal and output a display output control signal to the first node in a display period of time of the frame; an output sub-circuit, configured to output a composite output signal via an output terminal under control of the first node, the composite output signal including a display output signal outputted in a display period of time and a blanking output signal outputted in a blanking period of time which are independent of each other. |
| US11410596B2 |
Display device preventing a flow of static electricity
Disclosed is a display device, including a first substrate and a second substrate facing the first substrate. A first electrode is positioned on a first surface of the first substrate facing the second substrate. A second electrode is positioned along a border of the second substrate facing the first substrate. The second electrode faces the first electrode. One or more short electrodes electrically connect the first electrode and the second electrode. |
| US11410594B1 |
Dynamic bias control of source driver based on data swing level for power saving
A method of dynamic bias control of a source driver bases on data wing level for power-saving. In order to cover the operating conditions of various loads under normal operations, the output buffer circuit operation is biased. The method utilizes the display gray scale difference between a previous data line and an immediately subsequent data line to determine the bias current to be used for the output buffer. When the difference between the current data line display gray scale and the previous data line display gray scale is not large, the bias current of the output buffer can be reduced. When the difference between the current data line display gray scale and the previous data line display gray scale is large, the bias current of the output buffer is increased and the current of the output buffer is adjusted according to different load conditions to save power. |
| US11410589B2 |
Display device
A display device includes a display panel, a first connection film, and a second connection film. The display panel includes first pads and second pads. The first connection film includes a first film, which includes a first region connected to the first pads and having a first width and a second region adjacent to the first region and having a second width different from the first width, and a first driving chip mounted on the first film. The second connection film includes a second film, which includes a third region connected to the second pads and having a third width and a fourth region adjacent to the third region and having a fourth width different from the third width and less than the second width, and a second driving chip mounted on the second film. |
| US11410581B2 |
Electro-optical apparatus
A display apparatus includes: an inspection TFT of which a drive output of a gate driver circuit is connected to a gate electrode and a drive output of a source driver circuit is connected to a source electrode; and an abnormality detection circuit unit that receives an output from a drain electrode of the inspection TFT to detect an abnormality of the gate driver circuit or the source driver circuit, and, in a period in which the drive output of the gate driver circuit is high, the abnormality detection circuit unit determines as abnormal when an output voltage from the drain electrode of the inspection TFT is out of a predetermined voltage range. |
| US11410580B2 |
Display non-uniformity correction
In one embodiment, a computing system may access a first mask associated with a first color component and a first pixel in an image, and a second mask associated with a second color component and a second pixel in the image. The system may access first component values of the first color component in a first pixel region containing the first pixel, and second component values of the second color component in a second pixel region containing the second pixel. The system may modify the first component values using the first mask, and the second component values using the second mask. The system may cause the modified first and second component values to be displayed by light-emitting elements of the first and second color components. The first and second masks may be generated based on relative positions of the first light-emitting elements and the second light-emitting elements. |
| US11410579B2 |
Display device
A display device includes a base substrate including a first folding portion, a first portion, and a second portion, a display element layer including first display elements, which are disposed on the first portion to emit a first light, and second display elements, which are disposed on the second portion to emit a second light, and a light control layer including a first region, which is disposed on the second portion and causes a first diffraction of the second light emitted from the second display elements, a second region, which guides the second light provided from the first region, and a third region, which is spaced apart from the first region with the second region interposed therebetween and emits the second light to an outside through a second diffraction of the second light. |
| US11410577B1 |
Privacy label system and method of protecting privacy
A privacy label system includes a single sheet of label material configured to be removably attached to a container of a product in an unfolded single layer configuration. The label material includes a top surface area configured to receive personal information of a recipient of the product and an opposing bottom surface area configured to receive advertising information associated with the product. An attachment system of the privacy label system is operable to removably attach the label material to the container in an unfolded single layer configuration such that the bottom surface area is positioned between the top surface area and the container, once the label material is attached to the container. The label material is operable to be removed from the container by the recipient by hand, in order to remove the personal information from the container and to reveal the advertising information to the recipient. |
| US11410572B2 |
Systems and methods for computer implemented treatment of behavioral disorders
A system and method are provided for treating excessive or problematic computer use. In at least one embodiment, a method is employed to treat excessive or problematic computer use by acquiring information about the unwanted user activity, monitoring user activity for the unwanted behavior, controlling the behavior when it occurs, enabling the user to record self-observations and evaluating the results. This method may employ a computer based system to treat excessive or problematic computer use which includes configuring a user activity monitor with constraints, programmatically enforcing those constraints, reporting the activities monitored and restricted, and enabling a user to input self-observations. Potential constraints include a complete bar on the user activity, as well as, progressively decreasing the amount of time the user may engage in the activity, i.e. titrating the user activity. |
| US11410570B1 |
Comprehensive three-dimensional teaching field system and method for operating same
A method for operating a comprehensive three-dimensional teaching field, including: collecting, by a sensor, a depth data of a real teaching space, point cloud data of a teacher and voice data of the teacher; performing calculation and caching of an architecture for data storage, transmission and rendering of a virtual teaching space based on edge cloud; building a database model of the virtual teaching space by using a R-tree spatial index structure to realize distributed data storage; generating a virtual avatar model updating in real time by positioning and tracking an action of a user; displaying an image of the virtual teaching space on terminals of the teacher and a student through encoding, uploading, 5G rendering and decoding by using a 5G link. |
| US11410568B2 |
Dynamic evaluation of event participants using a smart context-based quiz system
Methods, apparatus, and processor-readable storage media for generating context-based question-answer pairs by applying artificial intelligence techniques to context-related data are provided herein. An example computer-implemented method includes obtaining multi-modal data pertaining to a given event, and removing noise from the multi-modal data by applying filtering techniques to the multi-modal data, thereby generating filtered multi-modal data; creating a comprehensive set of multi-modal data pertaining to at least a portion of the given event by aggregating the filtered multi-modal data in accordance with topic modelling techniques and removing any items of duplicate filtered multi-modal data; dynamically generating question-answer pairs related to the given event by applying machine reading comprehension-based artificial intelligence models to the comprehensive set of multi-modal data; and outputting at least a portion of the questions from the question-answer pairs to one or more participants of the given event. |
| US11410564B2 |
System and method for creating immersive interactive application
The present disclosure provides a development system to permit a developer to generate mixed reality (MR) streaming content for display on a VR headset worn by a viewer. The system allows development and generation of the content steam by non-technical personnel, where such developers are not required to possess computer skills or engineering knowledge. The streaming content generated includes embedded pre-recorded video files originally recorded in a 360 degree format, which significantly reduces computer processing time, memory requirements, and significantly speeds up the development time required to produce a final executable streaming content. |
| US11410556B2 |
Vehicle front blind spot detection and warning system
A front blind spot detection and warning system for vehicle comprising: a monitoring element mounted to a front portion of a host vehicle for monitoring the condition of a current lane and a neighboring lane in front of the host vehicle, the monitoring element defining a detectable blind spot zone in a front area of the neighboring lane; and a controller connected with the monitoring element for receiving detected information from the monitoring element; wherein the controller is configured to obtain the running state of the host vehicle and the detected information of the monitoring element and to determine there is a blind spot risk. |
| US11410550B2 |
Warning message routing for infrastructures
This disclosure describes an infrastructure management system and method for identifying risk potentials within the infrastructure or for the infrastructure. A dedicated sensor system for identifying risk potentials is provided within the infrastructure or for the infrastructure. A gateway (for example an interface) is configured to receive sensor values that originate from sensors of mobile devices that are temporarily located within the infrastructure or within a defined range (radius) from the infrastructure. A processing unit (for example a server) is configured to receive the sensor values that are reported by the dedicated sensor system and to receive the sensor values of the mobile devices that are provided by the gateway and further to analyze the received sensor values in order to identify risk potentials for the infrastructure or within the infrastructure. |
| US11410549B2 |
Method, device, readable medium and electronic device for identifying traffic light signal
The present disclosure relates to a method, device, computer readable media, and electronic devices for identifying a traffic light signal from an image. The method for identifying a traffic light signal from an image includes extracting, based on a deep neural network, multiple layers of first feature maps corresponding to different layers of the deep neural network from the image. The method includes selecting at least two layers of the first feature maps having different scales from the multiple layers of the first feature maps. The method includes inputting the at least two layers of the first feature maps to a convolution layer having a convolution kernel matching a shape of a traffic light to obtain a second feature map. The method includes obtaining a detection result of the traffic light signal based on the second feature map. |
| US11410542B2 |
System and method for optimized appliance control
In response to a detected presence of an intended target appliance within a logical topography of controllable appliances identity information associated with the intended target appliance is used to automatically add to a graphical user interface of a controlling device an icon representative of the intended target appliance and to create at a Universal Control Engine a listing of communication methods for use in controlling corresponding functional operations of the intended target appliance. When the icon is later activated, the controlling device is placed into an operating state appropriate for controlling functional operations of the intended target appliance while the Universal Control Engine uses at least one of the communication methods to transmit at least one command to place the intended target appliance into a predetermined operating state. |
| US11410539B2 |
Internet of things (IoT) based integrated device to monitor and control events in an environment
The present disclosure relates to real-time surveillance/monitoring of an environment using an Internet of Things (IoT) based integrated device. The integrated device comprises replaceable sensors and programmable image/video capturing device, that are communicatively connected to a processor. The processor correlates sensor data and data related to the images, audios and videos received from the replaceable sensors and the programmable image/video capturing device to validate occurrence of event in the environment. Later, information related to the validated events are transmitted to edge nodes, cloud servers, user devices or other sensor nodes for effective monitoring of occurred events. The integration of programmable image/video capturing device with the replaceable sensors helps in reducing chances of false event detection, as well as allows users to program the image capturing device for detection of various events. Also, integration of various sensors helps in reducing electrical wirings and overall complexity of the device. |
| US11410538B2 |
System and method for monitoring an individual
A system for monitoring an individual within predetermined facilities in order to determine whether there is a need for setting an alert is provided. The system includes: a personal module to be worn by the monitored individual, the personal module including at least one motion sensor; at least one node module, with which the personal module is arranged to communicate; storage; and at least one processing device. The at least one processing device may be arranged to: receive sensor data from the at least one motion sensor in the personal module; determine whether the received sensor data indicates a specific alert state among a plurality of predetermined alert states, the alert states including at least a FALL alert state, to be used if a probable fall has been detected for the monitored individual, and an OUT OF BED alert state, to be used if it has been detected that the monitored individual is probably getting out of bed; determine the distance between the personal module and the at least one node module; determine the location of the personal module within the facilities based at least on the determined distance together with information retrieved from the storage regarding the layout of the facilities within which the monitoring of the individual takes place; and set an alert based at least on whether the received sensor data indicates an alert state and whether the determined location fulfils a predetermined location condition, indicating whether the individual is located in a certain room, such as e.g. the bedroom. |
| US11410535B1 |
Monitoring system control technology using multiple sensors, cameras, lighting devices, and a thermostat
Techniques are described for providing control of a monitoring system (e.g., a home alarm or security system) using one or more mobile devices. In some implementations, a native mobile device application enables use of a mobile device as a security/automation system keypad and controller for a home security system. In these implementations, the mobile device, using the native mobile device application, checks real time status of system and sensors, arms/disarms system, turns lights on/off, looks in on live video of security cameras, reviews history of system events, reviews saved video clips, monitors/changes thermostat settings, and performs other features of a traditional security keypad in a home security system. |
| US11410533B1 |
Smart cities map-based alert visualization
A server generates and displays a map of a geographic region that includes a map representation of the geographic region and a plurality of asset icons each positioned at a location on the map representation that corresponds to a physical location of the corresponding asset in the geographic region. The map includes one or more alert icons each corresponding to an active alert generated by one of the plurality of assets in the geographic region. At least some of the one or more alert icons visually identify an alert type of the corresponding active alert and at least some of the one or more alert icons visually identify a priority level of the corresponding active alert. |
| US11410528B2 |
Method and system for providing emergency rescue request and loss prevention
The present invention relates to a method and system for an emergency rescue request and loss prevention. The method includes checking an operation mode activation signal by the electronic device connected to a portable device through Bluetooth low energy (BLE) communication, activating a loss prevention mode and outputting an alarm when the operation mode activation signal that a strength of a BLE signal transmitted from the portable device is a threshold value or less and transmitting to a pre-stored contact number a message which is generated on the basis of surroundings data acquired from at least one of a camera and a microphone provided in the electronic device, activating an emergency rescue request mode when the operation mode activation signal is generated from an outside of the portable device. The method and system can also be applied to other embodiments. |
| US11410525B2 |
Systems and methods for generating hazard alerts for a site using wearable sensors
A system for generating hazard alerts is provided. The system includes a plurality of sensor units including a plurality of sensors and a locating device, and a hazard analyzing (HA) computing device configured to communicate with the sensor units and including at least one memory device configured to store a scene definition, the scene definition defining a coordinate space of a worksite, and at least one processor configured to receive, from the sensors, a plurality of sensor measurements, receive, from the locating device of each sensor unit, at least one coordinate of the coordinate space, determine, based on the at least one coordinate, a location of the sensor unit during each sensor measurement, and determine, for at least a first sensor unit, that an alert condition is present based on the scene definition, the sensor measurements, and the determined location associated with the first sensor unit. |
| US11410522B2 |
Updating object inverse kinematics from multiple radio signals
In one embodiment, a service receives signal characteristic data indicative of characteristics of wireless signals received by one or more antennas located in a particular area. The service identifies an object in the particular area, based on the received signal characteristic data. The service associates the identified object with an object kinematics model. The service updates the object kinematics model over time by applying Bayesian inference to changes in the signal characteristic data. |
| US11410518B2 |
Cross-reality safety service
Concepts and technologies are disclosed herein for a cross-reality safety service. A device can detect a cross-reality session associated with a user device. The cross-reality session can include a rendered environment and the user device can be located in a physical environment. Data associated with the cross-reality session can be obtained. It can be determined if a safety issue exists for the cross-reality session. If the safety issue is determined to exist for the cross-reality session, a communication can be directed to the user device, where the communication can include an update to the rendered environment, a command to end the cross-reality session, or an alert. |
| US11410513B2 |
System and device for video-based vehicle surrounding awareness monitoring for air cargo transit security under all-weather driving conditions
A video-based security system for providing video security to cargo transport vehicle. The security system includes a camera support configured at the exterior of a cargo storage area; a camera system attached to the camera support for covering a top plane, front plane, left plane, right plane, and back plane of a cargo area; and a main unit connecting to the camera system for logging incident records. |
| US11410507B2 |
Localized projection of audible noises in medical settings
A localized sound projection system can coordinate the sounds of speakers to simulate the placement of an auditory cue in a 3D space. The system can include a plurality of speakers configured to output auditory signals and a sound localization controller configured to control the plurality of speakers to coordinate the auditory signals to simulate an origination location of a patient alarm. The sound localization controller can determine adjusted auditory signals and control a plurality of speakers to output the plurality of adjusted auditory signals. A method for dynamically controlling speaker settings in a medical environment can include determining volume settings corresponding to a speaker, monitoring a level of ambient noise corresponding to a room of a patient, controlling the volume settings of the speaker to reduce or increase a sound level output of a speaker. A patient monitoring system can be configured to physically manipulate medical devices in response to audible commands. The system can receive a plurality of vocal commands from a user and can manipulate various settings after confirmation from a user. |
| US11410506B2 |
Processing system for providing enhanced reality interfaces at an automated teller machine (ATM) terminal platform
Aspects of the disclosure relate to processing systems that implement an enhanced reality device to facilitate transactions at a screen-less automated teller machine (ATM). A computing platform may receive a request to initiate a transaction with a screen-less automated ATM. Based on the request to initiate the transaction, the computing platform may send pre-transaction interface information and commands directing the enhanced reality device to generate a pre-transaction interface. The computing platform may receive an authentication request from the screen-less ATM indicating its availability and requesting authentication information. In response to validating the authentication information, the computing platform may generate transaction interface information. The computing platform may send the transaction interface information to the enhanced reality device. The computing platform may receive a transaction completion indication from the screen-less ATM. After receiving the transaction completion indication, the computing platform may send haptic feedback indicating that the transaction is complete. |
| US11410498B2 |
Gaming system and method for providing poker games with alternative gaming presentations
Gaming systems that determine a total award based on a play of a card game and a play of a supplemental game and then display the determined total award via an alternative gaming presentation different from the play of the card game and the play of the supplemental game. |
| US11410496B2 |
System and method for collecting and using filtered facial biometric data
Disclosed are a system and method for the application of filtering in the collection and application of facial biometrics to a number of problems common to the vending and gaming environments. A succession of video frames of a scene are analyzed to determine if one or more faces are present. If so, the face most relevant to the application based in its position in the scene is selected. The selected face in each of the succession of video frames is then quality rated according to certain criteria to select the best frame for computing a biometric value of the selected face. One the biometric value has been computed, the value may be compared against a database to determine if a biometric value for a matching face was previously stored. If so, the quality rating of the new image and a quality rating previously stored with the stored biometric are compared. If the new image has a higher quality rating than the stored quality rating, the new biometric replaces the stored biometric and its quality rating replaces the associated quality rating in storage. The biometric may then be applied to solving problems of patron analytics, patron loyalty, security and the like. |
| US11410490B2 |
Gaming system including a gaming table and a plurality of user input devices
Intelligent gaming tables and methods of providing game play through the gaming tables are described herein. The gaming table includes a table having a table surface, a plurality of player stations, and a common display configured to display gaming content to a plurality of players. The gaming table further includes an interface configured to communicate with a plurality of user input devices. The gaming table includes a gaming controller. The gaming controller is configured to communicate with the plurality of user input devices through the interface, receive location information relating to touches or contacts detected on the table surface, analyze the information relating to the touches or contacts, identify a user performing each of the touches or contacts with the table surface, and implement player input instructions contained within the information relating to the touches or contacts. |
| US11410488B2 |
Augmented reality virtual object collection based on symbol combinations
Systems and methods are provided. A system is operable to provide, via a communication interface and to an augmented reality (AR) device that is associated with a user, symbol combination data that defines a first combination of symbols that are displayable on a gaming device. The system further provides a first virtual symbol that is collected by the AR device responsive to an image capture device of the AR device capturing image data that corresponds to the first combination of symbols. The system receives virtual symbol data from the AR device indicating that the AR device has collected the first virtual symbol. The system sends award data that corresponds to the first virtual symbol and that is redeemable by the user to the AR device. |
| US11410487B2 |
Augmented reality brand-based virtual scavenger hunt
Systems and methods are provided. A system includes a communication interface, a processing circuit, and a memory coupled to the processing circuit. The memory includes machine readable instructions that, when executed by the processing circuit, cause the processing circuit to provide, via the communication interface and to an augmented reality (AR) device that is associated with a user, information regarding a first physical location of a first virtual object that is one of multiple virtual objects that are in a collection that is based on a brand and that are viewable by via the AR device. The processing circuit receives, via the communication interface and from the AR device, data corresponding to the first virtual object that is collected via an image capture device in the AR device and provides the user with an award that corresponds to the brand. |
| US11410484B2 |
Commodity delivery and microwave system for popcorn vending machine
A commodity delivery and microwave system for a popcorn vending machine includes: a storage rack, adapted to mount popcorn kernel packages, an opening configured on a lower side of the storage rack, the opening allowing the popcorn kernel package to be moved out therethrough; a delivering device, configured below the storage rack, and adapted to push the popcorn kernel package out of the storage rack and send the popcorn kernel package into a microwave heating device; and the microwave heating device, configured beside the storage rack and including a support bracket, the support bracket configured with a microwave heater having a side door corresponding to storage rack and an open bottom, a door opening and closing device configured on the microwave heater and adapted to open or close the side door, a lower cover plate coupled pivotally to the support bracket. |
| US11410481B2 |
Systems, methods and devices for processing batches of coins utilizing coin imaging sensor assemblies
Currency processing systems, coin processing machines, coin imaging sensor assemblies and methods of making and methods of using the same are presented herein. A currency processing system is disclosed which includes a housing with a coin input area for receiving coins and coin receptacles for stowing processed coins. A disk-type coin processing unit, which is coupled to the coin input area and coin receptacles, includes a rotatable disk for imparting motion to coins, and a sorting head for separating and discharging coins to the coin receptacles. A sensor assembly is mounted to, adjacent or within the sorting head adjacent the rotatable disk. The sensor assembly includes a linear array of sensors, wherein the linear array of sensors is configured to sense coins processed by the coin processing unit, and to output a signal indicative of coin image information for processing the coins. |
| US11410476B2 |
Monitoring device
A monitoring apparatus provides vehicle telematics data. The monitoring apparatus includes a sensor for sensing vehicle and engine motion induced vibration in part of a vehicle and for generating vibration associated data. The sensor is coupled to part of the vehicle. Engine motion induced vibration associated data is processed to extract a characteristic of the vehicle or the engine. |
| US11410474B2 |
Vehicle inspection using augmented reality (AR)
A device causes an augmented reality (AR) scene to be presented on a display that depicts a vehicle subject to a vehicle inspection, captures an image of the vehicle, and identifies a ground plane in the AR scene. The device identifies a location in the image that is part of the ground plane and that is known relative to the vehicle. The device superimposes a three-dimensional representation corresponding to the vehicle based on the location identified as part of the ground plane. The device generates, based on a user interaction with the display, vehicle inspection data that describes a state of a component of the vehicle. The device causes a vehicle inspection report to be created based on the vehicle inspection data. |
| US11410473B2 |
Predictive part maintenance
The present disclosure provides for predictive part maintenance by identifying component service programs indicating one or more components to track usage of in one or more aircraft for a given time period; tracking component usage in the one or more aircraft for the one or more components to identify scheduled removals for instances of the one or more components within the given time period; amalgamating component removals across the one or more aircraft for the one or more components; amalgamating component demand across the component service programs for the one or more components based on the scheduled removals and the component removals; and generating and transmitting an inventory alert based on the component demand. |
| US11410471B2 |
Systems and methods for providing a data flow for sensor sharing
Systems and methods for providing a data flow for sensor sharing are described. According to one embodiment, an apparatus configured to be employed in a host vehicle includes a memory and a processor. The processor includes a receiving module, a metadata module, a packet module, and a transmission module. The receiving module is configured to receive sensor data from at least one vehicle sensor of the host vehicle. The metadata module is configured to generate metadata for sensor data. The packet module is configured to form a metadata packet including the metadata and a sensor data packet including the sensor data. The transmission module is configured to transmit the metadata packet at a first carrier frequency and the sensor data packet at a second carrier frequency that is different than the first carrier frequency. |
| US11410465B2 |
Face identification system and method
The present disclosure discloses a face identification system that includes an image-retrieving circuit, an invisible light source and a processing circuit. The image-retrieving circuit includes light-sensing elements each including a plurality of visible light sensors and an invisible light sensor. The processing circuit executes software and firmware executable commands to execute a face identification method that includes the steps outlined below. An invisible light is emitted to an object to be identified by the invisible light source. A visible light sensed frame and an invisible light sensed frame are retrieved by using the visible and invisible light sensors. Determine whether a light reflection related parameter of the invisible light sensed frame is within a predetermined range is determined only according to the invisible light sensed frame. When the light reflection related parameter is within the predetermined range, the object to be identified is determined to be a real face. |
| US11410460B2 |
Dynamic lighting for image-based verification processing
A facial recognition system may monitor a light source that causes a unique pattern of light to be projected on the subject during image capture. The lighting pattern may include intensity, color, source location, pattern, modulation, or combinations of these. The lighting pattern may also encode a signal used to further identify a location, time, or identity associated with the facial recognition process. In some embodiments the light source may be infrared or another frequency outside the visible spectrum but within the detection range of a sensor capturing the image. |
| US11410459B2 |
Face detection and recognition method using light field camera system
A method of detecting and recognizing faces using a light field camera array is provided. The method includes capturing multi-view color images using the light field camera array; obtaining a depth map; conducting light field rendering using a weight function comprising a depth component and a sematic component, where the weight function assigns a ray in the light field with a weight; and detecting and recognizing a face. |
| US11410455B2 |
Method and device for fingerprint image recognition, and computer-readable medium
A method for fingerprint image recognition according to an embodiment includes ranking a plurality of target feature points acquired from a target fingerprint image according to a feature point attribute, comparing the ranked plurality of target feature points with a plurality of reference feature points in a reference fingerprint image to form an entropy map, and determining whether the target fingerprint image matches the reference fingerprint image according to the entropy map, wherein the entropy map indicates similarity between the target fingerprint image and the reference fingerprint image. The solution of the present disclosure makes full use of the acquired image information of the target fingerprint image for fingerprint recognition, thereby significantly improving the accuracy and effectiveness of fingerprint recognition. |
| US11410454B2 |
Electronic device for recognizing fingerprint using display
According to an embodiment disclosed herein, an electronic device may include a housing, a display panel including a plurality of pixels housed in the housing, a flexible printed circuit board electrically connected to the display panel, a fingerprint sensor disposed under at least a portion of the display panel and on the flexible printed circuit board, a display driver integrated circuit (IC) and a processor electrically connected to the fingerprint sensor and the display driver IC. |
| US11410452B2 |
Texture recognition device and manufacturing method thereof, color filter substrate and manufacturing method thereof
A texture recognition device and a manufacturing method of the texture recognition device, a color filter substrate and a manufacturing method of the color filter substrate are provided. The texture recognition device has a touch side, and includes: a light source array, a light valve structure and an image sensor array. The light valve structure includes a first substrate, a second substrate, and a light adjustment layer, and is configured to control a first region to be in a light transmission state in response to a control signal, so as to allow light emitted from the light source array to pass through the first region in the light transmission state to form a first photosensitive light source. The second substrate of the light valve structure is closer to the touch side than the first substrate, and the image sensor array is on the second substrate. |
| US11410451B2 |
Display device
A display panel including a display function layer displaying an image in a display area, a cover member including a first face and a second face disposed on an opposite side of the first face and faces the display panel, and a fingerprint sensor including a plurality of first detection electrodes disposed in a sensor base and configured to detect unevenness of an object brought into contact with or approaching the first face of the cover member, a shield electrode disposed to face the plurality of first detection electrodes and configured to suppress a change in capacitance between the first detection electrodes and the shield electrode, and switching elements disposed in correspondence with the first detection electrodes, the fingerprint sensor being arranged between the cover member and the display panel and arranged to overlap with the display area when viewed in a direction perpendicular to the first face are included. |
| US11410448B2 |
Predictive analysis systems and methods using machine learning
Systems and methods may utilize a predictive analysis model to analyze a contract or other document. A system may parse a document and/or a repository of information associated with the document. The system may identify one or more terms in the document and corresponding terms in the repository. The system may determine a difference parameter between a first term extracted from the document and a second term extracted from the repository. The system may determine whether the difference between the first term and the second term, represented by the difference parameter, is likely to be acceptable to the user using a predictive analysis model. The system may report a validation parameter indicating a level of acceptability associated with the difference. User feedback on the accuracy of the predictive analysis model is used to train, modify, and improve the predictive analysis model. |
| US11410446B2 |
Methods, systems, apparatus and articles of manufacture for receipt decoding
Methods, apparatus, systems and articles of manufacture are disclosed for receipt decoding. An example apparatus for processing a receipt associated with a user disclosed herein includes an optical character recognition engine to generate bounding boxes, respective ones of the bounding boxes associated with groups of characters detected in the receipt, the bounding boxes including a first bounding box, a second bounding box and a third bounding box, a word connector to connect the first bounding box to the second bounding box based on (1) an adjacency of the first bounding box to the second bounding box and (2) a difference value from a comparison of a location of the first bounding box to a location of the second bounding box, a line connector to form a line of the ones of the bounding boxes by connecting the third bounding box to the second bounding based on a relationship between the first bounding box and the second bounding box, the line of the ones of the bounding boxes indicative of related receipt fields, and a creditor to generate a report based on the line. |
| US11410445B2 |
System and method for obtaining documents from a composite file
A system for obtaining documents from a composite file comprising a stream of multiple pages is provided. The system may comprise one or more processors configured to receive the composite file comprising the multiple pages and split the composite file to obtain individual pages of the composite file, wherein image of each of the individual pages and image vector for each of the individual pages from the image of the respective page may be obtained. The processor may further obtain text present in each of the individual pages and text vector for each of the individual pages from the text of the respective page. The processor may further determine continuity pattern between pages that are consecutive based on the image vector and the text vector of the consecutive pages and may categorize the consecutive pages as belonging to the same document in case the determined continuity pattern between the consecutive pages indicate that the consecutive pages belong to the same document. |
| US11410442B2 |
Information processing apparatus and non-transitory computer readable medium
An information processing apparatus includes a processor. The processor is configured to receive first image data representing a document, and generate, by processing corresponding to appearance characteristics of the document, second image data not representing information of a deletion target out of information represented in the first image data but representing information other than the information of the deletion target. |
| US11410441B2 |
Information processing apparatus and non-transitory computer readable medium
An information processing apparatus includes a processor. The processor is configured to extract from a memory an image concerning a user in accordance with content of a document and to attach the extracted image to the document. |
| US11410440B2 |
Systems and methods for classifying activated T cells
Systems and methods for classifying and/or sorting T cells by activation state are disclosed. The system includes a cell classifying pathway, a single-cell autofluorescence image sensor, a processor, and a non-transitory computer-readable memory. The memory is accessible to the processor and has stored thereon a trained convolutional neural network and instructions. The instructions, when executed by the processor, cause the processor to: a) receive the autofluorescence intensity image; b) optionally pre-process the autofluorescence intensity image to produce an adjusted autofluorescence intensity image; c) input the autofluorescence intensity image or the adjusted autofluorescence intensity image into the trained convolutional neural network to produce an activation prediction for the T cell. |
| US11410439B2 |
Sequence-of-sequences model for 3D object recognition
Systems and methods are disclosed for capturing multiple sequences of views of a three-dimensional object using a plurality of virtual cameras. The systems and methods generate aligned sequences from the multiple sequences based on an arrangement of the plurality of virtual cameras in relation to the three-dimensional object. Using a convolutional network, the systems and methods classify the three-dimensional object based on the aligned sequences and identify the three-dimensional object using the classification. |
| US11410438B2 |
Image analysis using a semiconductor processor for facial evaluation in vehicles
Analysis for convolutional processing is performed using logic encoded in a semiconductor processor. The semiconductor chip evaluates pixels within an image of a person in a vehicle, where the analysis identifies a facial portion of the person. The facial portion of the person can include facial landmarks or regions. The semiconductor chip identifies one or more facial expressions based on the facial portion. The facial expressions can include a smile, frown, smirk, or grimace. The semiconductor chip classifies the one or more facial expressions for cognitive response content. The semiconductor chip evaluates the cognitive response content to produce cognitive state information for the person. The semiconductor chip enables manipulation of the vehicle based on communication of the cognitive state information to a component of the vehicle. |
| US11410433B2 |
Semantically-consistent augmented training data for traffic light detection
Methods, systems, and non-transitory computer-readable media for generating augmented data to train a deep neural network to detect traffic lights in image data. The method includes receiving a plurality of real roadway scene images and selecting a subset of the plurality of real roadway scene images. The method also includes selecting an image from the subset and determining a distribution indicting how likely each location in the selected image can contain a traffic light. The method further includes selecting a location in the selected image by sampling the distribution and superimposing a traffic light image onto the selected image at the selected location to generate an augmented roadway scene image. The method also includes processing each image in the subset to generate a plurality of augmented roadway scene images. The method further includes training a deep neural network model using the pluralities of real and augmented roadway scene images. |
| US11410432B2 |
Methods and systems for displaying animal encounter warnings in vehicles
A method of displaying a message associated with a likelihood of an animal appearing within a proximity of vehicle is provided. The method includes detecting, using a sensor of a vehicle, an animal warning sign in an area external to the vehicle at a particular time. The method further includes accessing in real time, using a computing device, a database including data associated with the animal depicted on the animal warning sign, determining in real time, using the computing device of the vehicle, a likelihood of the animal appearing within a proximity of the vehicle based on the accessed data, and displaying in real time, on a user interface associated with the computing device of the vehicle, a message based on the likelihood of the animal appearing within the proximity of the vehicle. |
| US11410431B2 |
Vehicular control system with trailering assist function
A vehicular control system includes a rear backup camera viewing at least rearward of the vehicle. With a trailer hitched to the vehicle, and based at least in part on image processing of captured image data during a backing-up maneuver, the image processor determines a distance between an axle of the trailer and the hitch of the vehicle and determines a trailer angle of the trailer hitched to the vehicle. During the backing-up maneuver of the trailer hitched to the vehicle, the vehicular control system determines a path of the trailer responsive to (i) a steering angle of the vehicle, (ii) the determined trailer angle of the trailer and (iii) the determined distance between the axle of the trailer and the hitch of the vehicle. The vehicular control system displays information to assist the driver in backing up the trailer hitched to the vehicle. |
| US11410430B2 |
Surround view system having an adapted projection surface
A surround view system for a vehicle includes a detection unit and an evaluation unit. The detection unit is designed to detect data relating to the surroundings. The evaluation unit is designed to identify an object in the detected surroundings data and to determine the 3D shape of this object. The evaluation unit is additionally designed to add the determined 3D shape to a projection surface of the surround view system to produce a modified projection surface. The evaluation unit is designed to project the surroundings data onto the modified projection surface. |
| US11410429B2 |
Image collection system, image collection method, image collection device, recording medium, and vehicle communication device
An image collection system includes an image obtainment unit configured to obtain an image of a landmark object captured by an imaging unit installed on a vehicle; a positional relationship information obtainment unit configured to obtain positional relationship information representing a positional relationship between the landmark object and the vehicle when the image was captured; and a save processing unit configured to associate the image obtained by the image obtainment unit with the positional relationship information obtained by the positional relationship information obtainment unit, so as to save the associated image on a database. |
| US11410421B2 |
Scanning test system for assessing hand cleanliness in a medical pre-treatment protocol
A light, such as an ultraviolet (UV) light, is used with a scanning test device in a scanning process of one or more of a user's hands to assess hand cleanliness according to a medical pre-treatment protocol for a medical treatment device, such as for a dialysis treatment using a home dialysis machine. If the scanning process results in a determination that the hands do not pass a cleanliness standard, the user is requested to perform a cleaning protocol and re-perform a scanning test. The scanning test device may be a smartphone, tablet device and/or other smart device running a software app that obtains and scans an image of the user's hand(s) illuminated by the UV light and makes an assessment of hand cleanliness according to an assessment algorithm. After passing the scanning test, the scanning test device signals to the treatment machine that the medical pre-treatment protocol may continue. |
| US11410418B2 |
Methods and systems for tagged image generation
A method, system, and computer program product generate at least one tagged image, and include the feature of determining at least one user content image from at least one subject image. There are also the features of identifying at least one product in the obtained user content image using at least one artificial intelligence model, and generating at least one tagged image with the identified product or products in the obtained user content image or images. |
| US11410417B2 |
Modular system for automatic hard disk processing and verification
A method of using a conveyor system comprising capturing, with a first camera of the conveyor system, a first image of a server tray and a plurality of hard disks received along a first conveyor belt of the conveyor system, checking, with one or more processors of the conveyor system, a first serial number associated with the server tray and a second set of serial numbers associated with the plurality of hard disks against a reference list of serial numbers, capturing, with a second camera of the conveyor system, a second image of the server tray and the plurality of hard disks, and verifying an integrity status of the server tray and plurality of hard disks based on the second image. |
| US11410415B2 |
Processing method for augmented reality scene, terminal device, system, and computer storage medium
A processing method that is performed by one or more processor is provided. The processing method includes determining a target video frame in a currently captured video; determining an object area in the target video frame based on a box selection model; determining a category of a target object in the object area based on a classification model used to classify an object in the object area; obtaining augmented reality scene information associated with the category of the target object; and performing augmented reality processing on the object area in the target video frame and the augmented reality scene information, to obtain the augmented reality scene. |
| US11410414B2 |
Systems and methods for detection and localization of image and document forgery
Systems and methods for detection and localization of image and document forgery. The method can include the step of receiving a dataset having a plurality of authentic images and a plurality of manipulated images. The method can also include the step of benchmarking a plurality of image forgery algorithms using the dataset. The method can further include the step of generating a plurality of receiver operating characteristic (ROC) curves for each of the plurality of image forgery algorithms. The method also includes the step of calculating a plurality of area under curve metrics for each of the plurality of ROC curves. The method further includes the step of training a neural network for image forgery based on the plurality of area under curve metrics. |
| US11410408B2 |
Information processing apparatus and non-transitory computer readable medium storing program
An information processing apparatus includes a processor configured to execute first acquisition processing for acquiring a first recognition result and a first recognition probability on target data from a first recognizer, execute second acquisition processing for acquiring a second recognition probability for the first recognition result on the target data from a second recognizer, and execute control for determining which of first processing and second processing with a necessary human workload greater than in the first processing is to be executed for the first recognition result based on the first recognition probability and the second recognition probability. |
| US11410405B2 |
Imaging-based sensor calibration
A sensor calibration target configured for sensor calibration relative to a common frame of reference is disclosed. The sensor calibration target comprises a first surface at a first predefined depth bearing a first set of indicia at respective first heights and having respective first predefined shifts, each of the first indicia encoding a corresponding first height. The sensor calibration target further comprises a second surface at a second predefined depth bearing a second set of indicia at respective second heights and having respective second predefined shifts, each of the second indicia encoding a corresponding second height. |
| US11410400B2 |
Method and system for maintaining color calibration using common objects
Described herein are systems and methods for maintaining color calibration using common objects. In an exemplary embodiment, an AR system includes a forward-facing camera, an AR display, a processor, and a user interface. The processor is configured to receive image data from the forward-facing camera and identify any known objects depicted in the image data. The processor then determines RGB information at least one test rendering of the identified known object and displays it via the AR display. Input from a user interface, indicating which of the at least one test renderings was a closest match to the real-world object, and a level of satisfaction with the match are received by the processor and used to update an AR display color calibration model. More test renderings may be iteratively provided to improve the accuracy of the calibration. |
| US11410397B2 |
VR correctional outreach system
This present invention relates to a virtual reality (VR) based outreach program operational using a VR headset and a 360-degree camera. The VR outreach program enables the incarcerated or detained individuals to connect with their families, friends and other interested individuals and allows them to witness birthdays, sporting events, and other events, while spending time in a correctional or detention facility. The VR outreach program ensures the inmates, prisoners or detainees can reach their family, friends and others thereby helping their family and others to adjust to the absence of the incarcerated or detained individual. Also, the outreach program provides a unique way of overcoming the effects incarceration and prevents the inmates or detainees from developing mental illness due to prolonged periods of solitary or isolated confinement. |
| US11410394B2 |
Method for interactive catalog for 3D objects within the 2D environment
Example systems and methods for virtual visualization of a three-dimensional (3D) model of an object in a two-dimensional (2D) environment. The method may include providing an interactive catalog associated with the 3D model of the object while positioning the 3D model of the object onto the 2D environment. In one aspect, the method may include price and product detail information associated with the 3D model of the object. |
| US11410391B2 |
Method for representing virtual information in a view of a real environment
A method for representing virtual information in a view of a real environment comprises providing a virtual object having a global position and orientation with respect to a geographic global coordinate system, with first pose data on the global position and orientation of the virtual object, in a database of a server, taking an image of a real environment by a mobile device and providing second pose data as to at which position and with which orientation with respect to the geographic global coordinate system the image was taken. The method further includes displaying the image on a display of the mobile device, accessing the virtual object in the database and positioning the virtual object in the image on the basis of the first and second pose data, manipulating the virtual object or adding a further virtual object, and providing the manipulated virtual object with modified first pose data or the further virtual object with third pose data in the database. |
| US11410388B1 |
Devices, systems, methods, and media for adaptive augmentation for a point cloud dataset used for training
Devices, systems, methods, and media are described for adaptive scene augmentation of a point cloud frame for inclusion in a labeled point cloud dataset used for training a machine learned model for a prediction task for point cloud frames, such as object detection or segmentation. A formal method is described for generating new point cloud frames based on pre-existing annotated large-scale labeled point cloud frames included in a point cloud dataset to generate new, augmented point cloud frames. A policy is generated for large-scale data augmentation using detailed quantitative metrics such as confusion matrices. The policy is a detailed and stepwise set of rules, procedures, and/or conditions that may be used to generate augmented data specifically targeted to mitigate the existing inaccuracies in the trained model. The augmented point cloud frames may then be used to further train the model to improve the prediction accuracy of the model. |
| US11410382B2 |
Representing traffic along a route
Some embodiments provide a mapping application that has a novel way of displaying traffic congestion along roads in the map. The mapping application in some embodiments defines a traffic congestion representation to run parallel to its corresponding road portion when the map is viewed at a particular zoom level, and defines a traffic congestion representation to be placed over its corresponding road portion when the map is viewed at another zoom level. The mapping application in some embodiments differentiates the appearance of the traffic congestion representation that signifies heavy traffic congestion from the appearance of the traffic congestion representation that signifies moderate traffic congestion. In some of these embodiments, the mapping application does not generate a traffic congestion representation for areas along a road that are not congested. |
| US11410378B1 |
Image processing for generating three-dimensional shape and spatially-varying reflectance of the object using a deep neural network
A method of image processing is described. The method comprises receiving a set of at least three images of an object including at least two linearly-polarized images and at least one color image, wherein the three images have the same view of the object and are acquired under the same illumination condition in which either diffuse polarization or specular polarization dominates in surface reflectance, and wherein a set of Stokes parameters s0, s1 and s2 is determinable from the at least three images. The method further comprises generating three-dimensional shape and spatially-varying reflectance of the object from the set of at least three images using a deep neural network trained with a plurality of sets of training images, each of the plurality of sets of training images including at least three training images including at least two linearly-polarized training images and at least one color image from which a respective set of Stokes parameters s0, s1 and s2 is determinable and storing said three-dimensional shape and spatially-varying reflectance generated by the deep neural network. |
| US11410376B2 |
Systems and methods for end to end scene reconstruction from multiview images
Systems and methods of generating a three-dimensional (3D) reconstruction of a scene or environment surrounding a user of a spatial computing system, such as a virtual reality, augmented reality or mixed reality system, using only multiview images comprising RGB images, and without the need for depth sensors or depth data from sensors. Features are extracted from a sequence of frames of RGB images and back-projected using known camera intrinsics and extrinsics into a 3D voxel volume wherein each pixel of the voxel volume is mapped to a ray in the voxel volume. The back-projected features are fused into the 3D voxel volume. The 3D voxel volume is passed through a 3D convolutional neural network to refine the and regress truncated signed distance function values at each voxel of the 3D voxel volume. |
| US11410374B2 |
Synthetic parameterized computed tomography from surface data in medical imaging
Synthetic CT is estimated for planning or other purposes from surface data (e.g., depth camera information). The estimation uses parameterization, such as landmark and/or segmentation information, in addition to the surface data. In training and/or application, the parameterization may be used to correct the predicted CT volume. The CT volume may be predicted as a sub-part of the patient, such as estimating the CT volume for scanning one system, organ, or type of tissue separately from other system, organ, or type of tissue. |
| US11410372B2 |
Artificial intelligence based virtual object aging
Embodiments of the systems and methods described herein provide a virtual object aging system. The virtual object aging system can utilize artificial intelligence to modify virtual objects within a video game to age and/or deteriorate for a certain time period. The virtual object aging system can be used to determine erosion, melting ice, and/or other environmental effects on virtual objects within the game. The virtual object aging system can apply aging, rust, weathering, and/or other effects that cause persistent change to object meshes and textures. |
| US11410370B1 |
Systems and methods for computer animation of an artificial character using facial poses from a live actor
Embodiments described herein provide an approach of animating a character face of an artificial character based on facial poses performed by a live actor. Geometric characteristics of the facial surface corresponding to each facial pose performed the live actor may be learnt by a machine learning system, which in turn build a mesh of a facial rig of an array of controllable elements applicable on a character face of an artificial character. |
| US11410366B2 |
Systems and methods for generating a skull surface for computer animation
An animation system wherein a machine learning model is adopted to generate animated facial actions based on parameters obtained from a live actor. Specifically, the anatomical structure such as a facial muscle topology and a skull surface topology that are specific to the live actor may be used. A skull surface that is specific to a live actor based on facial scans of the live actor and generic tissue depth data. For example, the facial scans of the live actor may provide a skin surface topology of the live actor, based on which the skull surface underneath the skin surface can be derived by “offsetting” the skin surface with corresponding soft tissue depth at different sampled points on the skin surface. |
| US11410360B2 |
Techniques for managing multi-user content in augmented reality applications
In some embodiments, a method of providing visual cues for private virtual objects is provided. In response to determining that presentation of a protected characteristic of a virtual object is not permitted by an augmented reality system, the augmented reality system presents a placeholder object. In some embodiments, a method of protecting a location from undesirable virtual objects is provided. In response to determining that a location for a virtual object is associated with a protected location, a low-invasiveness version of a mesh of the virtual object is presented. In some embodiments, a method of decoupling a virtual object from a static physical location is provided. |
| US11410359B2 |
Content and context morphing avatars
Systems and methods disclosed herein create or modify a personalized mixed reality environment by taking into consideration both a user preferences and the actual location characteristics of the user. |
| US11410356B2 |
Systems and methods for representing objects using a six-point bounding box
System, methods, and other embodiments described herein relate to improving a representation of objects in a surrounding environment. In one embodiment, a method includes, in response to receiving sensor data depicting the surrounding environment including a corridor that defines a left boundary and a right boundary, identifying at least one object from the sensor data. The method includes transforming segmented data from the sensor data that represents the object into a bounding box by defining the bounding box according to six points relative to the corridor. The method includes providing the six points of the bounding box as a reduced representation of the object. |
| US11410355B2 |
Method and apparatus for creating digital clothing
A computer simulation technology that processes 2D clothing patterns and thus creates digital clothing.The purpose of the present disclosure is to easily adjust a length of another segment to be sewn the same as a length of a selected segment on a pattern when free-sewing. |
| US11410354B2 |
System and method for motion signal recalibration
The present disclosure is related to systems and methods for motion signal recalibration. The method includes obtaining a motion signal of a subject based on positron emission tomography (PET) data of the subject. The motion signal may represent a plurality of motion cycles. The method includes determining a distribution of the motion cycles. The distribution of the motion cycles may indicate a probability that each motion cycle of the plurality of motion cycles corresponds to an actual motion cycle. The method includes correcting the motion cycles of the motion signal based on the distribution of the motion cycles to obtain corrected motion cycles. The method includes reconstructing a PET image by gating the PET data based on the corrected motion cycles. |
| US11410349B2 |
Methods for data driven respiratory motion estimation
A respiratory motion estimation method (30) includes reconstructing emission imaging data (22) to generate a reconstructed image (50). The emission imaging data comprises lines of response (LORs) acquired by a positron emission tomography (PET) imaging device or projections acquired by a gamma camera. One or several assessment volumes (66) are defined within the reconstructed images. The emission imaging data are binned into time interval bins based on time stamps of the LORs or projections. A displacement versus time curve (70) is generated by computing, for each time interval bin, a statistical displacement metric of the LORs or projections that both are binned in the time interval bin and intersect the motion assessment volume. The motion assessment volume may be selected to overlap a motion assessment image feature (60) identified in the reconstructed image. |
| US11410348B2 |
Imaging method and device
An imaging method. The method comprises the following steps: determining a target by identifying target-related position information or characteristic information (S101); implementing a two-dimensional scan of the target to collect image data of the target in a three-dimensional space (S102); processing, during the scanning, and on a real-time basis, the image data and relevant spatial information to obtain a plurality of image contents of the target, and displaying the image content on a real-time basis (S103); and arranging the plurality of image contents in an incremental sequence to form an image of the target (S104). The imaging method prevents collection of unusable image information, shortens image data collection time, and increases the speed of an imaging process. The application further provides an imaging device. |
| US11410347B2 |
Node-based image colorization on image/video editing applications
A system and method for node-based image colorization is provided. The system receives a first user input via a Graphical User Interface (GUI) of an image/video editing application and controls a display device to display a node graph on the GUI based on the first user input. The node graph includes an input node to select grayscale images and a colorization node which may represent a workflow for colorization of at least a first object in the grayscale images. The system receives a second user input associated with a setting of the colorization node and selects an image colorization model based on the second user input. The system executes the workflow associated with the colorization node to transmit the grayscale images to a computing device that hosts the selected image colorization model, and to receive colorized images including at least the first object colorized based on a color effect. |
| US11410344B2 |
Method for image generation, electronic device, and storage medium
A method for image generation, an electronic device and a storage medium are provided. The method includes: a first image of a target object is generated according to a line image of the target object; structure extraction is performed on the first image to obtain at least one of texture information or orientation information of the first image; and a second image of the target object is generated according to the at least one of the texture information or the orientation information. |
| US11410343B2 |
Information processing apparatus, information processing method, and non-transitory computer readable medium
An information processing apparatus according to the present invention includes at least one memory and at least one processor which function as: an acquiring unit configured to acquire information related to a brightness level of each pixel in an image; a determining unit configured to determine, on a basis of the information, a ratio of a number of corresponding pixels in the image with respect to at least one of Standard Dynamic Range (SDR) and a brightness range obtained by excluding SDR from High Dynamic Range (HDR); and an outputting unit configured to output the ratio. |
| US11410333B2 |
Method, device, and storage medium for providing visual representation of set of objects
A method, a device and a computer-readable storage medium for providing a visual representation of a set of objects are provided. The method includes determining a first position in a drawing area, the first position for providing first display information of a first object in the set of objects; determining a usable position associated with the first position from a plurality of preset positions in the drawing area; determining a second object associated with the first object from the set of objects; and providing second display information of the second object in the usable position. |
| US11410332B2 |
Map system, method and non-transitory computer-readable storage medium for autonomously navigating vehicle
A map system is a system for autonomously navigating a vehicle along a road segment and includes at least one processor. The processor acquires at least one image representing the environment of the vehicle from the imaging device, acquires the brightness of the environment of the vehicle, analyzes the image to calculate the position of the landmark with respect to the road on which the vehicle travels, determines the position of the own vehicle based on the position of the landmark calculated from the image and the map information stored in the server, and emits an illumination light in a direction in which a presence of the landmark is estimated when the brightness is equal to or less than a predetermined threshold value. |
| US11410331B2 |
Systems and methods for video communication using a virtual camera
A method for using a virtual camera location to display image data to one device from another device associated with a plurality of cameras. The method includes receiving image data from a plurality of cameras associated with a second user device associated with a second user. The method further includes establishing a virtual camera location different from positions of the plurality of cameras. The method further includes providing an image using the image data on a first user display of a first user device based at least on a viewpoint of the virtual camera location. |
| US11410328B1 |
Techniques for maintaining feature point maps
This disclosure relates to maintaining a feature point map. The maintaining can include selectively updating feature points in the feature point map based on an assigned classification of the feature points. For example, when a feature points is assigned a first classification, the feature point is updated whenever information indicates that the feature point should be updated. In such an example, when the feature point is assigned a second classification different from the first classification, the feature point forgoes being updated whenever information indicates that the feature point should be updated. A classification can be assigned to a feature point using a classification system on one or more pixels of an image corresponding to the feature point. |
| US11410325B2 |
Configuration of audio reproduction system
An electronic apparatus and method for configuration of an audio reproduction system is provided. The electronic apparatus captures a set of stereo images of the listening environment and identifies a plurality of objects, including a display device and a plurality of audio devices, in the set of stereo images. The electronic apparatus estimates first location information of the plurality of audio devices and second location information of the display device. Based on first location information and the second location information, the electronic apparatus identifies a layout of the plurality of audio devices. The electronic apparatus receives an audio signal from each audio device and determines a distance between each audio device of the plurality of audio devices and a user location based on the received audio signal. The electronic apparatus determines an anomaly in connection of at least one audio device and generates connection information based on the determined anomaly. |
| US11410324B2 |
System and method for determining operating deflection shapes of a structure using optical techniques
A system for measuring total operating deflection shapes of a structure includes one or more imagers, each including two cameras spaced apart from one another and each oriented and positioned to have corresponding fields of view of a different corresponding section of the structure, with the corresponding sections that may include overlap area of the structure within each of the different sections of the structure. Each of the cameras generates a corresponding data stream, which is communicated to a controller, which is configured to measure the response of the structure to an excitation, such as a vibration or an impulse. The system is configured to convert time-domain data from each of the data streams to the frequency-domain data using a Fourier Transform algorithm and stitching the shapes to obtain the total operating deflection shapes of the structure by scaling and stitching together the frequency-domain data. |
| US11410323B2 |
Method for training convolutional neural network to reconstruct an image and system for depth map generation from an image
A method for training a convolutional neural network to reconstruct an image. The method includes forming a common loss function basing on the left and right images (IL, IR), reconstructed left and right images (I′L, I′R), disparity maps (dL, dR), reconstructed disparity maps (d′L, d′R) for the left and right images (IL, IR) and the auxiliary images (I″L, I″R) and training the neural network based on the formed loss function. |
| US11410321B2 |
Distance measuring camera
The distance-measuring camera contains a first optical system for forming a first subject image, a second optical system for forming a second subject image, an imaging part for imaging the first subject image and the second subject image and a distance calculating part for calculating a first candidate for a distance to the subject based on an image magnification ratio between a magnification of the first subject image imaged by the imaging part and a magnification of the second subject image imaged by the imaging part and a second candidate for the distance to the subject based on a parallel disparity between the first subject image and the second subject image. The distance calculating part selects either one of the first candidate and the second candidate as the distance to the subject according to a predetermined condition. |
| US11410313B2 |
Method and system for fast approximate region bisection
Methods and systems in accordance with the present invention automatically subdivide an area having an arbitrary shape into multiple sub-regions that have approximately equal area under a threshold, with compact shapes having minimal perimeter length. These systems input an arbitrarily shaped zone and recursively bisect it until all of the new sub-zones are smaller than a particular threshold. A data processing system subdivides a two-dimensional region, such as a digital image of a landmass. The data processing system loads the region into memory, determines a minor axis of the region, and splits the region along the minor axis into a first sub-region and a second sub-region. The sub-regions are evaluated to determine if they are under the threshold area. The steps of the process are repeated until all resulting sub-regions are under the threshold area. Consistently compact sub-regions with minimal perimeter are achieved by splitting along the minor axis. |
| US11410307B2 |
Second reader
The present invention relates to a method and system that automatically determines malignancy in mammograms in parallel with a human operator. More particularly, the present invention relates to providing a reliable automated malignancy determination in parallel to a human operator to reduce the need for two human operators in a mammography analysis workflow.Aspects and/or embodiments seek to provide a method of automatically assessing mammography data in parallel with a human operator. Aspects and/or embodiments also seek to address the problems relating to providing a substantially reliable second reader to allow a single operator to analyse and diagnose mammography data. |
| US11410298B2 |
System and method for determining part damage
A process for automated component inspection includes the steps of calibrating an imaging device mounted on a table; calibrating a coordinate measuring machine mounted on the table, the coordinate measuring machine comprising a fixture coupled to an arm of the coordinate measuring machine; coupling a component to the fixture; acquiring an image of said component with said imaging device; registering a baseline dimensioned image to the component image; applying the baseline dimensioned image to a damage detection algorithm; and determining component damage by the damage detection algorithm. |
| US11410290B2 |
Machine learning for metrology measurements
Metrology methods, modules and systems are provided, for using machine learning algorithms to improve the metrology accuracy and the overall process throughput. Methods comprise calculating training data concerning metrology metric(s) from initial metrology measurements, applying machine learning algorithm(s) to the calculated training data to derive an estimation model of the metrology metric(s), deriving measurement data from images of sites on received wafers, and using the estimation model to provide estimations of the metrology metric(s) with respect to the measurement data. While the training data may use two images per site, in operation a single image per site may suffice—reducing the measurement time to less than half the current measurement time. Moreover, confidence score(s) may be derived as an additional metrology and process control, and deep learning may be used to enhance the accuracy and/or speed of the metrology module. |
| US11410288B2 |
Image processing apparatus
An image processing apparatus includes: a determiner that determines whether or not a vehicle in which a camera is mounted is located at a specific place where a traveling direction of the vehicle changes, the camera picking up an image of an entire image pickup range with first image quality and picking up an image of a partial region in the image pickup range with second image quality that is higher image quality than the first image quality; and a region changer that, when it is determined that the vehicle is located at the specific place, changes a position of the partial region in the image pickup range such that an image of a region of attention that is included in the image pickup range and an image of which is to be picked up with the second image quality is picked up. |
| US11410284B2 |
Face beautification method and apparatus, computer device, and storage medium
A face beautification method is performed by a computer device, the method including: obtaining a target face contained in a target image and a user-selected reference face; generating adjustment parameters corresponding to the target face based on a comparison of the target face and the reference face, the adjustment parameters comprising face shape adjustment parameters and facial part adjustment parameters; generating a displacement vector according to the face shape adjustment parameters and the facial part adjustment parameters, the displacement vector being used for representing a size change, a position change and an angle change in a face shape and facial parts of the target face during an adjustment process; adjusting the face shape and the facial parts of the target face according to the displacement vector; and displaying the adjusted target face. |
| US11410283B2 |
Electronic device and control method thereof
Disclosed is an electronic device. The electronic device obtains a first histogram regarding a difference in gradation between adjacent pixels of an input image based on the first maximum output brightness, obtains a second histogram regarding a difference in gradation between the adjacent pixels of the input image based on the second maximum output brightness, obtains a third histogram regarding a difference in brightness between the adjacent pixels of the input image based on the first HVS recognition information, obtains a fourth histogram regarding a difference in brightness between the adjacent pixels of the input image based on the second HVS recognition information, and obtains a brightness value regarding the input image corresponding to the second maximum output brightness based on a difference between a first value obtained based on information on the first and third histograms and a second value obtained based on the second and fourth histograms. |
| US11410280B2 |
Salt and pepper noise filtering method and device based on morphological component analysis
The present application provides a salt and pepper noise filtering method and device based on morphological component analysis. The method comprises: obtaining a to-be-filtered image containing salt and pepper noise; calculating the dimension of the to-be-filtered image, labeled as [n, m]; initializing an n*m-dimensional all-1 labeled matrix as a salt and pepper noise labeled map; obtaining a preset region centered on a pixel point with a pixel value of 0 or 255, and calculating a noise variance between the pixel points in the preset region; labeling the position of a salt and pepper noise point in the salt and pepper noise labeled map according to the noise variance between the pixel points in the preset region, and updating and determining the salt and pepper noise labeled map. The salt and pepper noise is filtered through the method based on morphological component analysis, which improves the quality of the image. |
| US11410278B2 |
Automatic artifact removal in a digital image
Techniques and systems are described for automatic artifact removal in a digital image. A segmentation map is generated that describes a magnitude of difference among pixels in a digital image. Contours may be generated that describe boundaries of objects described in the segmentation map. The contours may be filtered according to two-dimensional and three-dimensional cues to identify contours corresponding to artifacts in the digital image. For each contour corresponding to an artifact, an object mask and a sampling mask may be generated. The object mask and the sampling mask may be utilized as part of a content filling operation upon the digital image to remove the artifact, and a corrected digital image is generated that does not include the artifact. |
| US11410269B2 |
Mixed reality system with virtual content warping and method of generating virtual content using same
A computer implemented method for warping virtual content includes generating warped virtual content by transforming source virtual content. The method also includes determining whether a memory location corresponding to an X, Y location of the warped virtual content in an output frame of reference is occupied by pre-existing virtual content. The method further includes storing the warped virtual content in the memory location if the memory location is not occupied. Moreover, the method includes comparing respective Z locations of the warped virtual content and the pre-existing virtual content to identify virtual content with a Z location closer to a viewing location if the memory location is occupied. The method also includes storing the warped virtual content in the memory location corresponding to the X, Y location if a Z location of warped virtual content is closer to the viewing location than a pre-existing Z location of pre-existing virtual content. |
| US11410259B2 |
Adaptive control program updates for surgical devices
Various analytics systems are disclosed. An analytics system is configured to communicably couple to a surgical hub. The surgical hub is configured to communicably couple to a modular device that is controlled by a control program. The analytics system comprises a processor and a memory coupled to the processor. The memory stores instructions that, when executed by the processor, causes the analytics system to: receive perioperative data indicative of an operational behavior of the modular device, wherein the perioperative data comprises data detected by the modular device during a surgical procedure; receive procedural outcome data associated with the surgical procedure; analyze the perioperative data and the procedural outcome data to determine whether the operational behavior is suboptimal; generate a control program update configured to alter the manner in which the control program operates the modular device during the surgical procedure for the operational behavior; and transmit the control program update to the modular device. |
| US11410258B2 |
Method and system for distribution of university student degree completion data
The invention is directed to a system and method for collection, distribution and delivery of university student enrollment, progress, and degree completion data, media content, and other data to campus students, faculty, users, employees, and external stakeholders, and more particularly to an integrated distribution system and method that obtains data from multiple sources into a single database, extracts and validates relevant data from the multiple sources and removes legacy formatting and non-essential information, provides user-centric reports, and distributes graphic media from one or more filtered special-purpose user-centric reports that is published to user display devices. |