| Document | Document Title |
|---|---|
| US11310544B2 |
Systems and methods for playout of fragmented video content
A playout system for providing playout of fragmented video content is provided. The system includes a non-transitory data store and a processor. The processor is configured to playout content for video origination using a fragmented format. The processor can receive a playlist and generate a plurality of video fragments from source content. A transcoder can process video fragments based on one or more program scheduling requirements from the playlist to generate new video fragments. A manifest is updated to reference the new video fragments. The process can output a video stream based on the new video fragments. |
| US11310541B2 |
Methods and apparatus for monitoring the insertion of local media into a program stream
Methods and apparatus for monitoring locally inserted media are disclosed. A disclosed method includes detecting, at a media device at a media presentation location, a cue in media received at the media device; in response to the detection of the cue, receiving separately form the media an advertisement associated with a user of the media device; presenting, by the media device, the media at a first time and the advertisement at a second time indicated by the detected cue; responsive to presenting the advertisement at the second time, recording a log including first identifying information for the media and second identifying information for the advertisement; and transmitting the log to a data collection facility. |
| US11310534B2 |
Image coding method and device using deblocking filtering
A method by which a decoding device decodes an image, according to the present document, comprises the steps of: generating a restoration picture on the basis of prediction samples of a coding block; deriving a boundary strength (BS) for a boundary of the coding block in the restoration picture; performing deblocking filtering on the boundary of the coding block on the basis of the boundary strength; and deriving a modified restoration picture for the restoration picture on the basis of the deblocking filtering, wherein the boundary strength is derived on the basis of a prediction mode of a first block and a second block that are adjacent to the boundary of the coding block, and the prediction mode of the first block or the second block is derived on the basis of whether the prediction mode of the first block or the second block is a current picture referencing (CPR) mode to be coded in reference to a current picture. |
| US11310531B2 |
Video coding method on basis of secondary transform, and device for same
A video decoding method according to the present document is characterized by comprising: a step for deriving transform coefficients through inverse quantization on the basis of quantized transform coefficients for a target block; a step for deriving modified transform coefficients on the basis of an inverse reduced secondary transform (RST) of the transform coefficients; and a step for generating a reconstructed picture on the basis of residual samples for the target block on the basis of an inverse primary transform of the modified transform coefficients, wherein the inverse RST using a transform kernel matrix is performed on transform coefficients of the upper-left 4×4 region of an 8×8 region of the target block, and the modified transform coefficients of the upper-left 4×4 region, upper-right 4×4 region, and lower-left 4×4 region of the 8×8 region are derived through the inverse RST. |
| US11310525B2 |
Predictor-copy coding mode for coding of point clouds
Methods and devices for encoding a point cloud. A predictor-copy coding mode is described in which an encoder copies the predicted points for a sub-volume rather than encoding the occupancy data for the original points in the sub-volume. A predictor-copy coding mode flag is coded in the bitstream to signal to the decoder whether predictor-copy coding mode is active or inactive. The predictor-copy coding mode flag may only be coded for sub-volumes that are eligible to use the mode. Eligibility may be based on depth within the coding tree and/or size of the sub-volume. Predictor-copy coding mode has the result of early termination of a branch of the coding tree. Instead of decoding the occupancy for the remainder of the branch, a decoder copies the predicted points that are positioned within the sub-volume as the reconstructed points of the point cloud for that sub-volume. |
| US11310524B2 |
Method and apparatus for determining motion vector of affine code block
A method includes obtaining a first motion vector of a motion compensation unit included in an affine code block. The method also includes determining a second motion vector based on the first motion vector, where a precision of the second motion vector matches a motion vector precision of a storage unit corresponding to the motion compensation unit. The method further includes determining a third motion vector based on the second motion vector, where there is a preset correspondence between the third motion vector and the second motion vector, and the third motion vector is used for subsequent encoding/decoding processing. |
| US11310520B2 |
Method and apparatus of motion-vector rounding unification for video coding system
Method and apparatus for coding system using Inter coding tools are disclosed. According to one method, a same conversion process is applied to the MVs associated with a current block to generate the converted MVs at the video encoder side or at the video decoder side when the target Inter coding tool belongs to at least two tools of a group, wherein the group comprises at least one of inherited affine Merge candidate derivation and affine sub-block MV derivation. According to another method, a simplified conversion process is applied to the MV to generate a rounded MV, MV_rounded according to MV_rounded=(MV+offset−(MV>=0))>>shift. |
| US11310518B2 |
Image processing apparatus and method
An image processing apparatus and method that make it possible to decode encoded data of 3D data with increased ease. A bit stream is generated which includes projection direction information including information relating to a projection direction of position information of 3D data representative of a three-dimensional structure on a two-dimensional plane and encoded data of a geometry image obtained by projecting the position information on the two-dimensional plane. |
| US11310517B2 |
Method and apparatus for encoding and decoding using selective information sharing between channels
Disclosed herein are a video decoding method and apparatus and a video encoding method and apparatus. Coding decision information of a representative channel of a target block is shared as coding decision information of a target channel of the target block, and decoding of the target block is performed using the coding decision information of the target channel. Since the coding decision information of the representative channel is shared with an additional channel, repeated signaling of identical coding decision information may be prevented. By means of this prevention, the efficiency of encoding and decoding of the target block or the like may be improved. |
| US11310511B2 |
Method and apparatus for video coding
Aspects of the disclosure provide a method and an apparatus including processing circuitry for video decoding. The processing circuitry receives, from a coded video bitstream, coding information for a current picture. At least one flag in the coding information indicates one or more allowable coding types for sub-partitions in the current picture. The one or more allowable coding types include at least one of intra coding and inter coding for the sub-partitions. The processing circuitry determines, based on the at least one flag, whether to decode intra syntax elements used only for coding intra sub-partitions and whether to decode inter syntax elements used only for coding inter sub-partitions. The processing circuitry decodes the intra syntax elements in the coding information when the intra syntax elements are determined to be decoded and decodes the inter syntax elements in the coding information when the inter syntax elements are determined to be decoded. |
| US11310510B2 |
Video encoding device, video decoding device, video encoding method, video decoding method, and program
A video decoding device and method, including extracting PCM block size information including a threshold, from a bitstream, determining the threshold based on the extracted PCM block size information; parsing a PCM header from the bitstream with respect to an encoded block, only when said encoded block is prediction mode of intra prediction and a block size of said encoded block is equal to or greater than the determined threshold, controlling an entropy decoding process and a PCM decoding process based on the parsed PCM header; parsing transformed data of a prediction error data of an image in the bitstream; and PCM-decoding PCM data of the image in the bitstream, wherein the decoding performs the decoding operation based on the prediction mode being intra prediction and based on the block size of the encoded block being equal to or greater than the determined threshold. |
| US11310505B2 |
Method and apparatus for adaptive context modeling in video encoding and decoding
A significance-coefficient flag indicates whether a given quantized transform coefficient is equal to zero or not. To encode the significant-coefficient flags, context-based entropy coding can be used. To adapt to the characteristics of a video sequence, the context model is selected based on the statistics of the transform coefficients. In one embodiment, the non-zero probabilities of transform coefficients are compared to different thresholds to divide a transform block into several context regions, where all coefficients in a context region use the same set of context models. In another embodiment, the transform block is first divided into several context regions based on the positions of the transform coefficients, and the non-zero probabilities of transform coefficients are compared with a threshold to divide each context region into two sub-regions, where all coefficients in a sub-region share the same set of context models. |
| US11310504B2 |
Complexity reduction for 32-p and 64-p LGT
A method of coding image data performed by at least one processor, may include: receiving information regarding a data block of an image; determining whether at least one of a height or a width of a residual coding block corresponding to the data block of the image is greater than or equal to a pre-defined threshold; and based on determining that the at least one of the height or the width of the residual coding block is greater than or equal to the pre-defined threshold: identifying or generating a reduced-complexity residual coding block by reducing the number of non-zero coefficients in the residual coding block; and performing transform coding of the reduced-complexity residual coding block using a line graph transform (LGT) core to perform direct matrix multiplications for each of the horizontal and vertical dimensions of the reduced-complexity coding block. |
| US11310485B2 |
Goggle imaging systems and methods
A goggle system is provided. The goggle system includes a computing device, a goggle device configured to be worn by a user and including a detector configured to simultaneously acquire image data of a subject in a first image mode and a second image mode, at least one eye assembly configured to display at least one of an image in the first image mode, an image in the second image mode, and a hybrid image including pixels of image data from the first image mode and pixels of image data from the second image mode, and a communications module configured to transmit acquired image data from the goggle device to the computing device. |
| US11310484B1 |
System and method for providing multiple sub-channels within a video-audio stream
System and methods for allowing a person or a process to select between multiple spatial-temporal sub-channels provided within a multi-sub-channel video-audio stream being output to a viewer, where selection causes a specific sub-channel within the stream to be received when viewing through an active filter device. A single image of the stream comprises at least two spatial sub-channels and the stream comprises at least two temporal sub-channels, where spatial sub-channels are formed using polarization and restrictive narrow-band color filtering. The stream is output by a display or projector and viewed using an active filter device. The active filter device comprises a combination of an active spatial channel filter and an active temporal channel filter and is responsive to sub-channel selections indicated through either a manual or automatic content selection means, where an automatic selection means includes a program for example directing the person through an adjustable story movie. |
| US11310482B2 |
Display panel, display apparatus, three-dimensional display method and three-dimensional display system
Embodiments of the present disclosure provide a display panel, a display apparatus, a three-dimensional display method and a three-dimensional display system. The display panel includes: a base substrate, a controller, a plurality of light emitting structures, and a plurality of adjusting bodies, wherein the adjusting bodies are disposed below a side of the light emitting structures close to the base substrate, at least a part of the adjusting bodies are configured to move in a direction toward or away from the light emitting structures and drive the light emitting structures to move under a control of the controller. |
| US11310479B2 |
Non-uniform spatial resource allocation for depth mapping
A method for depth mapping includes projecting a pattern of optical radiation into a volume of interest containing an object while varying an aspect of the pattern over the volume of interest. The optical radiation reflected from the object responsively to the pattern is sensed, and a depth map of the object is generated based on the sensed optical radiation. |
| US11310473B2 |
Generating videos with short audio
An image capture device may capture visual content during a visual capture duration and audio content during an audio capture duration. The audio capture duration may be shorter than the visual capture duration. The captured audio content may provide audio for playback of the captured visual content. |
| US11310472B2 |
Information processing device and image generation method for projecting a subject image onto a virtual screen
An image acquisition unit 40 acquires a subject image in which a subject is positioned in front of a background with a single color. An eye gaze information determination unit 32 determines an eye direction and a viewpoint position of a user wearing an HMD and provides the eye direction and the viewpoint position for a display control unit 50. The display control unit 50 performs chroma-key composition such that the subject included in the subject image may become a foreground image with respect to a background image and thereby generates a display image according to the viewpoint position of the user. The display control unit 50 determines an orientation of the subject such that the subject may be made to face the viewpoint position of the user, in a case where the viewpoint position has been changed. |
| US11310468B2 |
System and method for dynamic and centralized interactive resource management
Systems and methods for interactive site resource management are disclosed. In certain embodiments, the system and method collects and accesses local geospatially-referenced landscape and site survey data in the field as facilitated by selectable content views, the gathered landscape and site survey data synthesized with baseline geospatially-referenced landscape and site survey data. In one aspect, the synthesized landscape and site geospatially-referenced survey data may be used by a project lead or authority agent, to create a landscape and/or site report, an authorized development plan, a master landscape and/or site survey, and/or as-built development plans. In certain embodiments, the synthesized landscape site survey data is presented as an augmented reality display. |
| US11310466B2 |
Device for monitoring vehicle occupant(s)
A device for monitoring occupants of seats in a passenger compartment of a vehicle comprises a heat sink divided into a plurality of sections. Each of the sections comprises a base and cooling fins. The bases extend along a common axis and define a central niche therebetween. Structured light sources are attached to the sections. The structured light sources have an optical element for forming a structured light pattern. The structured light sources are oriented along the common axis and at oblique angles to the central niche, such that the structured light patterns, in combination, are directed such that they would cover occupants of seats of the vehicle. A camera is attached to the niche and configured to capture image patterns resulting from distortion of the plurality of structured light patterns by the occupants of the seats. |
| US11310461B2 |
Imaging apparatus, imaging system, and display system
An imaging apparatus is attached to a side of a moving body (for example, vehicle). The imaging apparatus includes an image sensor and an optical system that forms a subject image in a range of a predetermined vertical view angle and a predetermined horizontal view angle on an imaging surface. The optical system forms an image on the imaging surface so as to cause resolution in first region (R1) of the imaging surface to be higher than resolution in second region (R2) different from the first region. A position of center (G1) of first region (R1) is at least one of a position horizontally shifted from a center of the horizontal view angle and a position vertically shifted from a center of the vertical view angle. |
| US11310457B2 |
Display device and method for manufacturing the same
The present invention provides a method for manufacturing a highly reliable display device at a low cost with high yield. According to the present invention, a step due to an opening in a contact is covered with an insulating layer to reduce the step, and is processed into a gentle shape. A wiring or the like is formed to be in contact with the insulating layer and thus the coverage of the wiring or the like is enhanced. In addition, deterioration of a light-emitting element due to contaminants such as water can be prevented by sealing a layer including an organic material that has water permeability in a display device with a sealing material. Since the sealing material is formed in a portion of a driver circuit region in the display device, the frame margin of the display device can be narrowed. |
| US11310455B2 |
Tail current boost circuit
An image sensor and electronic apparatus comprise a pixel circuit configured to generate an analog signal; a vertical signal line configured to convey the analog signal from the pixel circuit; an analog amplifier circuit configured to receive the analog signal via the vertical signal line and generate an amplified signal; and a tail current boost circuit configured to modify an instantaneous gain bandwidth product of the analog amplifier circuit by temporarily modifying a tail current of the analog amplifier circuit. |
| US11310454B2 |
Pixel circuit and image sensor having the same
Provided are a pixel circuit and an associated image sensor, including an inverting input circuit, an active load and a signal reading circuit. Each pixel circuit includes a light sensing component, a transmission switch, a reset switch and a unity gain buffer. The transmission switch is series-connected between the light sensing component and the transmission switch. The unity gain buffer is connected to a node of connection of the transmission switch and the reset switch. The signal read circuit reads a sensing signal of the light sensing component through the unity gain buffer. An output signal of the unity gain buffer varies with an input signal of the unity gain buffer, attaining a linear relationship between the output signal and the input signal. Therefore, the photoelectric conversion curve of each pixel circuit is linear. |
| US11310453B2 |
Photoelectric conversion device and imaging system
A photoelectric conversion device includes a pixel that outputs a pixel signal in accordance with an incident light, a plurality of signal holding units each configured to hold the pixel signal, an AD conversion unit that converts the pixel signal from analog signal to digital signal, a first switch circuit provided between the pixel and the plurality of signal holding units, and a second switch circuit provided between the plurality of signal holding units and the AD conversion unit. The first switch circuit is configured to connect the pixels to the plurality of signal holding units individually to hold one pixel signal in the plurality of signal holding units, respectively, in different sampling periods, the second switch circuit is configured to switch connection between the plurality of signal holding units and the AD conversion unit, and pixel signals held in the plurality of signal holding units are averaged and output. |
| US11310451B1 |
Smart sensor with region of interest capabilities
An apparatus includes an image sensor having a plurality of pixels that form regions of interest (ROIs), analog-to-digital converter (ADC) banks, and multiplexers. Each respective multiplexer is electrically connected to (i) a corresponding ADC bank and (ii) a corresponding subset of the ROIs. The apparatus also includes control circuitry configured to obtain a full-resolution image of an environment by electrically connecting, by way of the multiplexers, each respective ADC bank to the associated respective ROI. The control circuitry is also configured to select a particular ROI based on the full-resolution image and obtain a plurality of ROI images of the particular ROI by (i) electrically connecting, to the particular ROI, a first ADC bank associated with the particular ROI and a second ADC bank associated with another ROI and (ii) digitizing pixels of the particular ROI by way of parallel operation of the first and second ADC banks. |
| US11310449B2 |
Solid-state imaging device and electronic apparatus
Provided is a new solid-state imaging device and electronic apparatus capable of eliminating streaking. Provided is a solid-state imaging device including: plurality of pixels provided in a pixel region on a substrate in a matrix form; a plurality of first wirings commonly provided to each of the plurality of pixels arranged along a first direction; a second wiring capacitively coupled to each of the plurality of first wirings; and a second detection unit that is electrically connected to the second wiring and detects a second signal appearing on the second wiring. |
| US11310445B2 |
Dynamic vision sensor
This application provides a dynamic vision sensor. The sensor converts an optical signal into an electrical signal by using a photoelectric conversion unit, to generate a photovoltage; performs second-order difference on the photovoltage by using a second-order differential circuit; and generates a second-order event signal based on a result of second-order difference. A camera including the sensor can generate an image based on the second-order event signal, where the image represents a change of a light change speed. |
| US11310444B2 |
Solid-state image pickup element, image pickup device, and method of manufacturing solid-state image pickup element
Provided is a solid-state image pickup element that includes a pixel, a light-receiving-surface-sided trench, and a light-receiving-surface-sided shielding member. A plurality of protrusions is formed on the light-receiving surface of the pixel in the solid-state image pickup element. In addition, the light-receiving-surface-sided trench is formed around the pixel having the plurality of protrusions formed, at the light-receiving surface in the solid-state image pickup element. In addition, the light-receiving-surface-sided member is buried in the light-receiving-surface-sided trench formed around the pixel having the plurality of protrusions formed on the light-receiving surface in the solid-state image pickup element. In addition, the photoelectric conversion region of a near-infrared-light pixel expands to the surface side opposed to the light-receiving surface of the photoelectric conversion region of a visible-light pixel. In addition, a trench is further formed inside the pixel at a surface opposed to the light-receiving surface. |
| US11310442B2 |
Display control apparatus for displaying image with/without a frame and control method thereof
A display control apparatus displays an image on a display unit in such a manner that, in a second shooting, the image to be displayed on the display unit is reduced to a smaller size in a case where a frame display setting is ON than in a case where the frame display setting is OFF, and, in a first shooting, the image to be displayed on the display unit in the case where the frame display setting is ON is not reduced to a size smaller than that of the image to be displayed on the display unit in the case where the frame display setting is OFF, the frame display setting being a display setting for information. |
| US11310439B2 |
Privacy device and method for use with network enabled cameras
The invention disclosed herein concerns a privacy enhancing device for use with IP cameras and related methods. The privacy device includes an adjustable light filter and is configured to be placed over the lens of an IP camera such that the image captured by the IP camera passes through the filter. The transparency of the light filter is controlled using a control module in response to user inputs received using an on-board user interface so as to provide varying levels of privacy ranging from an opaque state and a transparent state. Inputs that serve to facilitate and enhance operation of the device can also be received from other input sources such as connected computing devices. For security, the control path defined by the control module and the on-board user input device can be isolated from other more sophisticated control devices that can be prone to hacking and remote control. |
| US11310435B2 |
Image pickup apparatus having auto day-night function, control method therefor, and storage medium storing control program therefor
An image pickup apparatus that is capable of preventing hunching certainly at low cost and of switching between the day mode and the night mode at an optimal timing. An image sensor outputs an image signal depending on an optical image formed through an image pickup optical system. A mode setting unit sets a photographing mode for photographing using the image sensor from among a day mode and a night mode in which sensitivity for a wavelength range corresponding to infrared light is higher than that in the day mode. An obtaining unit obtains ratio information about the ratios of the infrared light and visible light based on the image signal in the night mode. A condition setting unit sets a determination condition that is used for switching the photographing mode to the day mode from the night mode based on the ratio information. |
| US11310434B2 |
Image sensor for camera module of electronic device having a pixel array with an imaging area and a light sensing area
An image sensor, a camera module, and an electronic device are provided. The image sensor includes a pixel array and a control circuit. The pixel array includes a light sensing area and an imaging area. The light sensing area is configured to detect an illumination intensity, and the imaging area is configured to acquire an image. The control circuit is configured to receive a first instruction to control the light sensing area to detect an illumination intensity, and to receive a second instruction to control the imaging area to acquire an image. |
| US11310429B2 |
Thermal image monitoring apparatus and distributing panel having the same
The present disclosure relates to a thermal image monitoring apparatus and a distributing panel having the same. According to the present disclosure, a rotation-vibration reduction unit and a horizontal vibration reduction unit can prevent relative sliding between a base and a bracket and between the bracket and a thermal image camera, and also reduce vibration in a rotating direction or one direction by virtue of contact with each other. |
| US11310428B2 |
Camera shooting method and mobile terminal
A camera shooting method and a mobile terminal are provided. The mobile terminal includes a dual camera module and a motion sensor connected with the dual camera module, the motion sensor is configured to detect an angular velocity and/or acceleration, two cameras in the dual camera module constitutes respective anti-shaking components along with the motion sensor, so as to use the same motion sensor to collect shaking information of the mobile terminal. Thus, the dual camera module of the mobile terminal may collect the shaking information of the mobile terminal by using the same motion sensor, so that each camera of the dual camera module has an anti-shaking function. |
| US11310426B2 |
Control device, controlling method, and imaging apparatus
The present technology relates to a control device, a controlling method, and an imaging apparatus that make it possible to reduce a weight of a movable body while simplifying a structure and to improve control accuracy. A moving body that moves in two or more directions, and a controller that controls movement of the moving body are provided. The controller sets a control value directed to controlling of the movement of the moving body on the basis of an initial position of the moving body and an instructed position of the moving body. A parameter directed to setting of the control value is set on the basis of the initial position and the instructed position. The present technology is applicable, for example, to a shake correction device that corrects a hand shake of an imaging apparatus or a technique that achieves super-resolution by shifting a sensor to capturing a plurality of images. |
| US11310424B2 |
Image capturing device, image capturing method, and program
An image capturing device includes an imaging lens, an image capturing device main body including an imaging element that captures an optical image transmitting through the imaging lens, a first correction unit that performs correction of an image shake by a correction lens, and a second correction unit that performs correction of the image shake by the image capturing device main body, and performs a control of causing the first correction unit or the second correction unit to correct a low frequency portion of a shake amount of the image shake having a frequency lower than a predetermined frequency and causing the first correction unit and the second correction unit to share and correct a high frequency portion of the shake amount of the image shake having a frequency equal to or higher than the predetermined frequency. |
| US11310423B2 |
Image capturing method and image capturing apparatus
An image capturing method and an image capturing apparatus are provided. An inspection region image of an inspection region is captured by a first image capturing device at a first time point. A control signal is received at a second time point after the first time point. A relative translation relationship and/or a relative rotation relationship of the first image capturing device at the first time point and a second image capturing device at a second time point are calculated. A first three-dimensional coordinate value of the local region relative to the first image capturing device is calculated and the first three-dimensional coordinate value is transformed to a second three-dimensional coordinate value relative to the second image capturing device according to the relative translation relationship and the relative rotation relationship. The second image capturing device is driven to rotate. A local region image of the local region is captured. |
| US11310420B2 |
Generating panoramic images
What is described are a method and a device, wherein two types of individual images are captured, namely a set of individual images captured simultaneously, and a further set of individual images captured in temporal succession. Among said two sets of individual images, individual images are selected which in combination result in a panoramic image. |
| US11310413B2 |
Device and method for photo and video capture
A single user input element in an image capture device is used for both photo and video capture. Based on a first user interface activity, a timing reference is engaged at a first reference time. In a first case, photo capture is performed. In the first case, a second reference time is based on a second user interface activity, and the timing reference indicates a passage of time between the two reference times is shorter than a particular time interval. In a second case, video capture is performed. In the second case, the timing reference indicates a passage of time since the first reference time is equal to or longer than the particular time interval. Video capture is stopped based on a subsequent user interface activity. The user interface activities may comprise detecting actions based on the same type of physical manipulation of the single user input. |
| US11310411B2 |
Distance measuring device and method of controlling distance measuring device
Image quality of a depth map is improved in a distance measuring device for receiving intermittent light.In a pixel array unit, a plurality of pixels for receiving predetermined intermittent light is arranged in a two-dimensional lattice pattern. A continuous light image data generating unit generates continuous light image data in which a plurality of pieces of pixel data indicating a luminance of predetermined continuous light is arranged in a two-dimensional lattice pattern on the basis of received light data of each of the plurality of pixels. A depth map generating unit generates a depth map in which distance information corresponding to each of the plurality of pixels is arranged, from the received light data and the continuous light image data. |
| US11310406B2 |
Photographing module with leaf spring and electronic device including same module
A photographing module includes a metal cover, a base, a lens portion and a leaf spring. The lens portion is displaceably disposed in an inner space. The leaf spring is assembled with the lens portion and includes an inner fixing portion, an outer fixing portion and an elastic portion. The inner fixing portion is assembled with the lens portion. The outer fixing portion contacts and is fixedly disposed with the metal cover. The elastic portion connects the inner fixing portion and the outer fixing portion. The leaf spring further includes a plurality of contact portions and a plurality of auxiliary elastic portions. Each of the auxiliary elastic portions connects the outer fixing portion and one of the contact portions. For the leaf spring, only the contact portions thereof contact side plates of the metal cover. |
| US11310402B2 |
Image capturing device and fingerprint image capturing device
An image capturing device including a cover plate, an image capturing module, a frame body, a first adhesive layer, and a second adhesive layer is provided. The frame body and the image capturing module are located on the same side of the cover plate. The frame body is joined to the cover plate through the first adhesive layer. The image capturing module is joined to the frame body through the second adhesive layer. An orthographic projection of the second adhesive layer on the cover plate falls within an orthographic projection of the frame body on the cover plate. |
| US11310397B2 |
Image forming apparatus capable of updating profiles on respective printing sheets of plurality of sheet types
In an image forming apparatus, an arithmetic processing device functioning as a profile manager executes profile update processing: (a) by selecting one of a plurality of sheet types as a reference sheet type, allowing a printing device to print a colorimetric patch on a printing sheet of the reference sheet type to create an adjustment chart, generating a profile on the printing sheet of the reference sheet type based on a colorimetric result of the colorimetric patch, and updating the profile on the printing sheet of the reference sheet type stored in a storage device with the generated profile; and (b) by selecting each of the remaining sheet types as a target sheet type and calibrating the profile on a printing sheet of the target sheet type stored in the storage device, based on respective correspondence relation characteristics before and after the profile on the reference sheet type is updated. |
| US11310395B2 |
Image forming apparatus performing color revision using color recognition information of a user
An example image forming apparatus includes a communication device to receive print data, a print engine to form an image, a memory to store information on a saturation that allows to recognition of a predetermined hue for each user, and a processor to identify a user corresponding to the received print data, and control the print engine to print the received print data based on saturation information of the identified user. |
| US11310393B2 |
Clustering colors for halftoning
Certain examples described herein relate to a color processing apparatus and a method of generating configuration data for a color rendering device. The color rendering device operates based on color state instructions indicating output color states for portions of a rendered output. Render data may be generated by applying a halftone matrix and color data may indicate probability values for the output color states for input image areas corresponding to the portions of the rendered output. In described examples, configuration data defines an order of output color states for application of the halftone matrix. In the order, the output color states are grouped within the data based on color properties of a rendered output and an order within the clusters is based on colorant composition. |
| US11310387B2 |
Color image forming apparatus and color material cartridge
An image forming apparatus is provided, for which a color material cartridge that contains color material and has a storage unit can be attached/detached. The apparatus comprises an obtaining unit that obtains color material information related to a color of the color material stored in the storage unit, a generator that generates a color conversion parameter based on the color material information, and a color convertor that converts the input image signal into a color signal for the color material using the color conversion parameter. If the color material information is not changed, the generator does not generate the color conversion parameter, otherwise the apparatus generates the color conversion parameter based on the color material information after the change. |
| US11310384B2 |
Image processing apparatus, image processing system, and non-transitory computer readable medium storing program
An image processing apparatus includes a document reading section, a reading controller, an image transfer section, and a transfer controller. The document reading section reads documents. The reading controller controls the document reading section so as to read document images subsequent to a first sheet independently of a command from a host apparatus. The image transfer section transfers the document images which are read by the document reading section. The transfer controller controls the image transfer section based on the number of pages of the documents, which are read by the document reading section, and the number of pages of the document images, which are transferred by the image transfer section, in a case where the document images are transferred by the image transfer section whenever the document reading section reads one sheet of document. |
| US11310383B2 |
Lid position determinations based on scans of zones
A first zone and a second zone of a scan surface may be scanned by an image sensor. A lid may be coupled to the scan surface and have an open position and a closed position, the lid being to cover the first zone and the second zone when in the closed position. The position of a lid may be determined based on a comparison of a scan of the first zone and a scan of the second zone. |
| US11310377B2 |
Information processing terminal and information processing system
An information processing terminal and an information processing system. The information processing terminal displays on a display, a plurality of screens in a sequential order, one or more of the plurality of screens being configured to receive a user operation, displays on the display, a symbol indicating degree of progress of the user operation on the plurality of screens, and at least one object for receiving a screen transition request that requests transition from one screen to another screen of the plurality of screens in the sequential order, and changes appearance of the symbol indicating the degree of progress of the user operation in response to the transition request. |
| US11310374B2 |
System and processing apparatus
This system includes: an apparatus; a first server; and a second server connectable to the apparatus and the first server. The first server includes a voice receiver that receives a voice from a user, a command transmitter that transmits a command based on the voice to the second server, and an output part that, responsive to a response signal received from the second server, provides an output based on the response signal. The second server includes a command processor that transmits a response signal to the first server responsive to a first command received from the first server, and that acquires a status of the apparatus, and a status transmitter that transmits a response signal based on the acquired status of the apparatus to the first server responsive to a second command received from the first server. |
| US11310372B2 |
Service providing system, information processing system, and information processing method for transmitting data to application with authority to store in external service system
A service providing system includes a device; and an information processing system. The information processing system stores each user of the information processing system and each user of an external service system in association with each other. The device accepts a specification of a first application and a user of the information processing system; acquires data for which a user of the external service system, associated with the user of the information processing system, has an authority, among data relating to the first application included in the external service system; displays a screen to accept a selection of one piece of data from the acquired data; accepts the one piece of data for which the selection is accepted via the screen; and requests the external service system to store information acquired by the device in association with the accepted one piece of data. |
| US11310369B2 |
Electronic apparatus and computer readable recording medium storing guidance notification program
When a multifunction peripheral (MFP) that notifies guidance indicating how to resolve an abnormal state that occurs in itself detects the abnormal state, the MFP notifies a log-in user of the MFP of guidance according to the combination of the detected abnormal state and authority of the log-in user of the MFP. |
| US11310368B2 |
Time-based nano-transaction system for reducing unsolicited communications
A telecommunications system for selectively connecting originator nodes to recipient nodes includes an account database with one or more accounts each associated with corresponding ones of the originator nodes and the recipient nodes. There is a contacts database with recipient contact lists each associated with a specific one of the accounts of the recipient nodes. A transaction processor is receptive to an incoming telecommunications initiation request, which includes a recipient node identifier and a nano-transaction payment submission defined at least by a payment amount. The transaction processor responsively directs the establishment of the telecommunications link between the one of the originator nodes and the one of the recipient nodes upon receipt of the telecommunications initiation request. The nano-transaction payment submission is settled based at least in part upon an active duration of the telecommunications link. |
| US11310367B2 |
Wireless network installation analyzer and reporting
An analyzer resource receives density information indicating mobile device usage in each of multiple geographical regions. The analyzer resource further receives resource information indicating locations of physical network resources available to support installation of wireless access points in the geographical regions and the location of any existing wireless access points already installed. The analyzer resource then uses at least the density information and the resource information to produce a respective metric for each of the multiple geographical regions. The respective metric for a corresponding geographical region indicates a desirability of installing a respective wireless access point in the corresponding geographical region. Further disclosed embodiments herein include generating a respective map indicating in which respective geographical regions it is desirable to install a respective wireless access point. |
| US11310364B2 |
Upfront customer time consideration along with optimized agent desktop in a contact center
A computerized-method using a cloud-based computing environment for improving client service, in a contact center is provided herein. The computerized-method includes: retrieving a context of a query and a time-limit from a CTI event and attempting to retrieve data to evaluate average resolution time for the received context. When the data is found, comparing the evaluated average resolution time with the received time-limit and when the received time-limit is below the evaluated average resolution time, sending a delay notice and providing the client a menu of options for querying through other channels. When the data is not found, or when the received time-limit is above the evaluated average resolution time, presenting on an agent dashboard, the time-limit of the client and accordingly updating parameters in the agent dashboard during the inbound call, thus, improving client service, by considering the time-limit of the client before the agent addresses a query. |
| US11310360B2 |
System and methods thereof for real-time fraud detection of a telephone call transaction
A method for detecting of fraudulent calls is provided. The method includes initiating, by an origin node, a call to a target node, and generating, by the origin node, a first call data record (CDR) for the call, wherein the CDR includes at least one call parameter of the call recorded by the origin node upon termination of the call. The method also includes generating, by the origin node, a first secure CDR that contains the first CDR, sending, by the origin node, the first secure CDR to the target node, and generating, by the origin node, a fraud notification based on a second secure CDR received from a first node and the first secure CDR. |
| US11310359B2 |
Options presented on a device other than accept and decline for an incoming call
A data processing system that, in one embodiment, uses smart reminders to allow a user to decline an incoming phone or messaging call and to cause the system to set a smart reminder about the call. In one embodiment, the system can use the system's current state or context (e.g. the system is in a car or is playing a movie) to determine the type of reminder options to present to the user and to determine when to trigger the reminder based on the reminder option that is selected by the user. |
| US11310358B2 |
Smart phone case combination keyboard for blind
The present invention relates to a smart phone case combination keyboard for the blind that includes: a cover main body having a mounting space to which a smart phone is mounted so as to expose a display unit on an upper surface, a plurality of lower key holes formed toward downward on a lower surface, and a front key hole respectively formed on a left and right of a surface toward frontward; a keyboard cover embedded in the main body, having a plurality of keys respectively protruded through the lower key holes and operated by a thumb of a hand gripping the cover main body as a first front key and a second front key are protruded through each of the front key holes; a communication module performing communication between the smart phone and the keyboard; and a controller that controls to perform pairing with the smart phone through the communication module and to transmit a key input signal of the keyboard to the smart phone through the communication by the communication module. According to the present invention, the smart phone may be stably gripped and the stable typing enable due to the keyboard arrangement on the lower surface while protecting the smart phone from external impact, and it is possible to provide the call mode along with the keyboard arrangement to enable the convenient use of the blind and improve the speed and accuracy of the typing through the use of the thumb that is not normally used for the typing, the unwanted separation may be prevented by the comfortable and stable gripping. |
| US11310350B2 |
Network bridge between different network communication protocols
A network coordinator device comprises a processor, a memory, a first port to operatively couple the processor to first network that uses media access control (MAC) addresses of a first size, and a second port to operatively couple the processor to second network that uses MAC addresses of a second size. The processor is configured to perform a network bridging protocol to bridge data frames communicated between the first network and the second network, including to translate communications between a device of the first network having the first size MAC address and a device of the second network having the second size MAC address, and adapt a frame format of the first network protocol to a frame format of the second network protocol. The adapting the frame formatting includes fragmenting data frames of the first network protocol when needed using a fragmentation format of the second network protocol. |
| US11310349B1 |
Transforming multivariate time series data into image data to generate image-based predictions
An image-based prediction service of a provider network may receive multivariate time series data (e.g., from different sensors for a machine) from a remote network of the client. The multivariate time series data includes different time series of data that are obtained from different data sources (e.g., sensors) over a time period. The image-based prediction service may transform the multivariate time series data into image data that represents an image. The image-based prediction service may then process the image data using one or more image processing models to generate a prediction (e.g., machine failure within a week). The image-based prediction service may send the prediction to the remote network. |
| US11310341B2 |
System and method for improving internet communication by using intermediate nodes
A method for fetching a content from a web server to a client device is disclosed, using tunnel devices serving as intermediate devices. The client device accesses an acceleration server to receive a list of available tunnel devices. The requested content is partitioned into slices, and the client device sends a request for the slices to the available tunnel devices. The tunnel devices in turn fetch the slices from the data server, and send the slices to the client device, where the content is reconstructed from the received slices. A client device may also serve as a tunnel device, serving as an intermediate device to other client devices. Similarly, a tunnel device may also serve as a client device for fetching content from a data server. The selection of tunnel devices to be used by a client device may be in the acceleration server, in the client device, or in both. The partition into slices may be overlapping or non-overlapping, and the same slice (or the whole content) may be fetched via multiple tunnel devices. |
| US11310338B1 |
Method and system for topic disambiguation and classification
A method for generating recommendations involves selecting a first platform message, making a first determination that the first platform message is potentially associated with a plurality of topics including a first topic and a second topic, obtaining additional information associated with the first platform message including at least one of information about an account that authored the first platform message and information about third party accounts engaging with the first platform message, making a second determining that the first platform message is associated with the first topic using the plurality of topics and at least a portion of the additional information, wherein the first topic is an initial classification of the first platform message, generating a recommendation for at least one account based on the second determination, and providing the recommendation to at least one account. |
| US11310337B2 |
Interactive contact center menu traversal via text stream interaction
Interactive contact center menu traversal via text stream interaction is disclosed. A user device establishes an interactive session with a server device. The user device receives, from the server device, a first text stream comprising a first contact center prompt. The user device scrolls a plurality of text components of the first text stream on a display over a first text stream presentation period of time, with text components presented earlier in time being replaced on the display with subsequent text components. The user device receives, from a user, a first user input in response to the first text stream and communicates the first user input to the server device. |
| US11310336B2 |
Curating proxy server pools
A system and method of forming proxy server pools is provided. The method comprises several steps, such as requesting a pool to execute the user's request and retrieving an initial group. The system checks the service history of an initial group, including whether any of the proxy servers in an initial group are exclusive to existing pools. The exclusive proxy servers in an initial group with eligible proxy servers are replaced when needed and new proxy server pools are formed. The system also records the service history of proxy servers and pools before and after the pools are created. The method can also involve predicting the pool health in relation with the thresholds foreseen and replacing the proxy servers below the threshold. |
| US11310335B2 |
Function as a service gateway
Embodiments disclosed herein provide for systems and methods of efficiently scheduling the execution of user-provided functions on available serverless computing vendor platforms using a Function as a Service (“FaaS”) gateway, wherein the FaaS gateway provides the function code to one of the available serverless computing vendor platforms based on service parameters provided by each platform. |
| US11310333B2 |
Server-machine-driven hint generation for improved web page loading using client-machine-driven feedback
Embodiments seek to improve web page loading time using server-machine-driven hint generation for based on client-machine-driven feedback. For example, client computers having page renderers are in communication with content servers and hinting processors. The hinting processors can use hinting feedback from multiple page rendering instances to automatically generate hints for optimizing loading and/or rendering of those pages. In some implementations, in response to page requests from the page renderers, content servers can request hints from hinting processors and send those hints to the requesting page renderers for use in improving the page loading experience. In other implementations, in response to page requests from the page renderers, content servers can instruct the requesting page renderers to contact an appropriate hinting processor and to retrieve appropriate hints therefrom for use in improving the page loading experience. |
| US11310332B2 |
Prefetching with a dynamic cloud packager
Provided is an intelligent prefetcher for prefetching media content segments following a non-sequential naming convention. The prefetching is initiated in response to a server receiving a user request for a particular segment that is not cached. The server passes the request to an origin. The origin scans metadata of a file from which the particular segment is produced. The scanning identifies time or frame offsets for subsequent segments to be prefetched. The origin constructs the requested segment and includes in the segment header, identifiers corresponding to the offset of each subsequent segment selected for prefetching. The segment passes to the server. The server detects the modified header and generates prefetch requests based on each identifier in the modified header. The server issues the prefetch request to the origin and caches the prefetched segments returned by the origin for distribution in response to subsequent user requests for the prefetched segments. |
| US11310328B2 |
Generic command line interface to an extensible list of cloud platform services
Methods and systems are used for providing a generic command line interface to an extensible list of cloud platform services. As an example, a generic command request including a command and command input data is received from a client. A platform service for the command is determined based on command metadata associated with the command. The command input data is mapped to a platform service application programming interface (API) associated with the platform service based on the command metadata associated with the command. The platform service API is called based on the mapping. Response data from the platform service API is mapped to command output data in a generic command response based on the command metadata associated with the command. The generic command response is transmitted to the client. |
| US11310327B2 |
Configuration of content site user interaction monitoring in data networks
A collection configuration management system can be used to manage one or more monitoring objects, such as tags, included in one or more content objects. The collection configuration management system can compartmentalize monitoring object configurations into a monitoring object bundle that may be executed as a result of loading the one or more content objects. The monitoring object bundle can be generated to include one or more monitoring objects, as well as monitoring object management loader functionality. |
| US11310325B2 |
Application session event inference from network activity
A computing system may automatically infer one or more events that occur during an application session involving activity on a network, such as the Internet. Such an application session may be interactions with, for example, social networking websites, banking websites, news websites, and so on. Events are any of a number of activities or transactions that may occur during the application session. The computing system may automatically infer an event by gathering network transaction data for network transactions performed by one or more client devices of a wireless communication network. The computing system may generate a network activity signature based, at least in part, on the network transaction data and apply pattern recognition and/or machine learning to the network activity signature to infer events associated with the network activity signature. |
| US11310323B2 |
Message processing method, apparatus, and system
This application provides a message processing method, an apparatus, and a system. The method includes: establishing a first HTTP interaction procedure between a first network element and a second network element; sending, by the first network element, a first request message to the second network element in the first HTTP interaction procedure; before the first network element receives a first response message for the first request message in the first HTTP interaction procedure, initiating, by the second network element, establishment of a second HTTP interaction procedure between the first network element and the second network element; and receiving, by the first network element, a second request message sent by the second network element. The first network element performs an operation on the second request message based on a relationship between the first HTTP interaction procedure and the second HTTP interaction procedure. |
| US11310321B2 |
Methods and devices for establishing communication between nodes in blockchain system
Disclosed herein are methods, devices, and apparatuses, including computer programs stored on computer-readable media, for establishing communication between a first node and a second node in a blockchain system. One of the methods includes: the first node providing a node identifier of the first node to the second node and receiving a node identifier of the second node from the second node, to cause a first communication session to be established between the first node and the second node; the first node determining whether a second communication session exists between the first node and the second node; and in response to a determination that the second communication session exists between the first node and the second node, terminating one of the first communication session and the second communication session based on the node identifier of the first node and the node identifier of the second node. |
| US11310318B2 |
Method and apparatus for zero-touch bulk identity assignment, provisioning and network slice orchestration for massive IoT (MIoT) deployments
In one illustrated example, automated or semi-automated system operations for Massive IoT (MIoT) deployment may involve the automatic assignment of external IDs, subscriber IDs (e.g. IMSIs), and mobile network IDs (e.g. MSISDNs) to IoT devices of a group, followed by the provisioning of assigned identities at the relevant network nodes and the IoT devices themselves. The process may continue seamlessly with network slice orchestration for the creation of a network slice instance (NSI) and the provisioning of its associated Network Slice Selection Assistance Information (NSSAI) and NSI ID at the relevant network nodes. Network Slice Selection Policies (NSSP) may be derived and sent to a policy function and subsequently to IoT devices of the group. Signaling efficiency may be achieved by performing operations on a group basis. |
| US11310317B1 |
Efficient load balancing
A storage system is provided. The storage system includes a first storage cluster, the first storage cluster having a first plurality of storage nodes coupled together and a second storage cluster, the second storage cluster having a second plurality of storage nodes coupled together. The system includes an interconnect coupling the first storage cluster and the second storage cluster and a first pathway coupling the interconnect to each storage cluster. The system includes a second pathway, the second pathway coupling at least one fabric module within a chassis to each blade within the chassis. |
| US11310313B2 |
Multi-threaded processing of search responses returned by search peers
Multi-threaded processing of search responses returned by search peers is disclosed. An example method may include transmitting, by a computer system, a search request to a plurality of search peers of a data aggregation and analysis system; receiving, by a first processing thread, a plurality of data packets from the plurality of search peers; parsing, by a second processing thread operating asynchronously with respect to the first processing thread, one or more data packets of the plurality of data packets, to produce a partial response to the search request; splitting the partial response into two or more fields; and generating, based on the two or more fields of the partial response, an aggregated response to the search request. |
| US11310311B2 |
Media obfuscation
An example operation may include one or more of receiving a request to access a file from a user node, by a file processor node, generating, by the file processor node, a file storage plan based on a distribution of file chunks throughout a peer-to-peer network, authenticating, by the file processor node, the user node based on blockchain credentials, acquiring, by the file processor node, a permission to access the file from a file owner node, and sending the file storage plan to the user node. |
| US11310308B2 |
Method for managing resources of a computer cluster by means of historical data
A method for managing resources of a computer cluster, wherein automated means allocate to a job at least one resource among several resources from the cluster, the automated means selecting the resource based on at least one historical data relative to previous uses of the resources and/or data relative to the arrangement, temperature, power consumption, bandwidth, or maintenance of the cluster or one or more components thereof, the automated mechanism thus determining the wear of the various resources available and choosing the resources with the lowest wear to perform the job, thereby avoiding the over-utilization of resources, one of the main causes of failures in a computer cluster, and increasing the lifetime of the cluster. |
| US11310288B2 |
System and method for determining establishment causes for emergency sessions
A method for initiating a Packet Switched emergency call using a user equipment (UE) is presented. The UE includes a plurality of protocol layers. The plurality of protocol layers including an IMS sublayer, a non-access stratum (NAS) layer and an access stratum (AS) layer. The method includes generating an ATTACH REQUEST using the UE. The ATTACH REQUEST has an attach type. The method includes retrieving the attach type of the ATTACH REQUEST using the NAS layer of the UE, and generating an RRC CONNECTION REQUEST. The RRC CONNECTION REQUEST includes an RRC establishment cause based upon the attach type of the attach request. |
| US11310285B2 |
Adaptive network security policies
Adaptive network security policies can be selected by assigning a number of risk values to security intelligence associated with network traffic, and identifying a number of security policies to implement based on the risk values. |
| US11310282B1 |
Scoring confidence in user compliance with an organization's security policies
The disclosed technology teaches a method for evaluating user compliance with an organization's security policies, formulating a user confidence or risk score, comprising scoring for each user a sum of alert weights, categorized by severity, and generated over time. Each contribution to an alert weight is generated due to an activity by the user that the organization's security policies treat as risky. Alert weights, over time, are subject to a decay factor that attenuates the alert weights as time passes. Also disclosed is reporting the user confidence score, comprising causing display of a time series of the user confidence or risk scores over a predetermined time and/or a current user confidence or risk score and/or at least some details of the activity by the user that contributed to the alert weights over time. |
| US11310280B2 |
Implementation of selected enterprise policies
Access is temporarily allowed to selected enterprise resources. A request to carry out an action is received from a private device. The private device is associated with an enterprise device, which has one or more enterprise policies in place. One or more steps for carrying out the requested action are defined, and it is determined that at least one policy from the enterprise policies is required for at least one of the steps. It is also determined that the at least one policy is in place on the private device. The private device is then allowed to carry out the requested action according to the at least one policy. |
| US11310274B2 |
Information infrastructure management tools with extractor, secure storage, content analysis and classification and method therefor
Method of creating data stores by either processing data throughput or a method for processing data throughput or data mining in a distributed computing system works. The system and method operates on sensitive content (e.g., trade secrets) or select content (e.g., critical content) and applies configurable filters (expanding, contracting, hierarchical/orthogonal classifier filters) to separate and store sensitive/select data in designated, distributed data stores or to supplement data collections. Sensitive/select data stores may have security clearance requirements. |
| US11310272B2 |
Method and system creating and using data confidence fabric processing paths
In general, in one aspect, the invention relates to a method for managing data, the method includes performing, by a data confidence fabric (DCF) node, a trust operation with a remote DCF node, updating, based on the trust operation, a trust level associated with the remote DCF node to obtain an updated trust level, integrating, based on the updated trust level, the remote DCF node into a DCF processing path to obtain a second DCF processing path, wherein the DCF processing path comprises the DCF node, and processing data using the second DCF processing path. |
| US11310270B1 |
Systems and methods for intelligent phishing threat detection and phishing threat remediation in a cyber security threat detection and mitigation platform
A system and method for accelerating a cybersecurity event detection and remediation includes extracting corpora of feature data from a suspicious electronic communication, wherein the corpora of feature data comprise at least one corpus of text data extracted from a body of the suspicious electronic communication; computing at least one text embedding value for the suspicious electronic communication; evaluating the text embedding values of the corpus of text data against an n-dimensional mapping of adverse electronic communication vectors, the n-dimensional mapping comprising a plurality of historical electronic communication vectors derived for a plurality of historical electronic communications; identifying whether the suspicious electronic communication comprises one of an adverse electronic communication based on the evaluation of the text embedding value, and accelerating a cybersecurity event detection by routing data associated with the suspicious electronic communication to one of a plurality of distinct threat mitigation routes. |
| US11310269B2 |
Methods to detect spoofing attacks on automated driving systems
Systems and methods are disclosed for an ADV to leverage pre-defined static objects along a planned route of travel to detect and counter attacks that attempt to change the destination or the planned route. The ADV may detect updates to the static objects if the planned route is changed. Based on the updated static objects, the ADV determines if there is an abnormal re-routing of the planned route or if there is a new route due to a suspicious destination change. The ADV may also leverage the static objects to detect spoofing attacks against the sensor system. The ADV may evaluate if sensors of the sensor system are able to detect and identify the static objects to identify an impaired sensor. The ADV may perform cross-check on the ability of the sensors to detect and identify dynamic objects to gain confidence that the impaired sensor is due to spoofing attacks. |
| US11310259B2 |
Cybersecurity architectural network based on artificial intelligence
A system for using artificial intelligence to generate a computing network architecture diagram based on user inputs, applicable vulnerability/cyber threat data and internal/external compliance/audit regulation data. In addition, machine-learning techniques may be used that leverage previously implemented computing network architectures. The computing network architecture diagram may be generated absent a baseline diagram or the user inputs may define at least a portion of an initial/baseline network architecture diagram that is modified based on the vulnerability/cyber threat data, the internal/external compliance/audit regulation data and/or the previously implemented computing network architectures. In additional embodiments of the invention, new/emerging vulnerabilities and cyber threats are detected, and in real-time response, adjustments to the computing network infrastructure and determined and implemented. |
| US11310255B2 |
Systems and methods for network traffic analysis
Systems and methods are disclosed for identifying malicious traffic associated with a website. One method includes receiving website traffic metadata comprising a plurality of variables, the website traffic metadata being associated with a plurality of website visitors to the website; determining a total number of occurrences associated with at least two of the plurality of variables of the website traffic metadata; generating a plurality of pairs comprising combinations of the plurality of variables of the website traffic metadata; determining a total number of occurrences associated with each pair of the plurality of pairs of combinations of the plurality of variables of the website traffic metadata; determining a plurality of visitor actions associated with the plurality of variables of the website traffic metadata; clustering each of the plurality of pairs and the plurality of visitor actions associated with the plurality of variables of the website traffic metadata into groups; and determining, based on the clustering of the plurality of pairs and the plurality of visitor actions, whether each of the plurality of website visitors are malicious visitors. |
| US11310253B1 |
Detection of anomalous computer behavior
A computer-implemented method for detecting anomalous behavior of one or more computers in a large group of computers comprises (1) receiving log files including a plurality of entries of data regarding connections between a plurality of computers belonging to an organization and a plurality of websites outside the organization, each entry being associated with the actions of one computer, (2) applying a first plurality of algorithms to determine features of the data which may contribute to anomalous behavior of the computers, and (3) applying a second plurality of algorithms to determine which computers are behaving anomalously based upon the features. |
| US11310252B2 |
Methods and apparatus for application isolation
Processor(s) for detecting malicious software. A hardware virtual machine monitor (HVMM) operates under a host OS. Container(s) initialized with network application template(s) operate under a guest OS VM. A detection module operates under the guest OS VM includes a trigger detection module, a logging module and a container command module. The trigger detection module monitors activity on container(s) for a trigger event. The logging module writes activity report(s) in response to trigger event(s). The container command module issues command(s) in response to trigger event(s). The command(s) include a container start, stop and revert commands. A virtual machine control console operates under the host OS and starts/stops the HVMM. A container control module operates under the guest OSVM and controls container(s) in response to the command(s). The server communication module sends activity report(s) to a central collection network appliance that maintains a repository of activities for infected devices. |
| US11310250B2 |
System and method for machine learning-based real-time electronic data quality checks in online machine learning and AI systems
A system for machine learning-based real-time electronic data quality checks in online machine learning and AI systems is provided. In particular, the system may comprise a machine learning module which receives input data from a data quality learning module which serves to perform filtering or alteration functions on incoming data during the training and/or live phases of the machine learning module. Over time, the data quality module may increasingly become efficient and accurate at assessing incoming data to determine the data quality. In turn, improving data quality of input data may ensure that the various neural networks within the system produce adaptively accurate output values to drive the decisioning processes of the system. |
| US11310249B2 |
Systems, methods, and media for defending computing systems from attack
Mechanisms for defending a computing system from attack are presented. The mechanisms include: maintaining a round counter that tracks a round number for a local host; determining a location in a graph for each of a plurality of hosts including the local host; determining monitor hosts of the plurality of hosts that are monitoring the local host; determining monitoree hosts of the plurality of hosts that are being monitored by the local host; sending a message to each of the monitor hosts identifying a value of the round counter; forwarding a first set of heartbeat messages from previous monitoree hosts to the monitor hosts; attempting to receive messages from the monitoree hosts; determining whether any messages were not received from the monitoree hosts; and in response to determining that one or more messages were not received from the monitoree hosts, generating an alert. |
| US11310248B2 |
Computer-security event analysis
Example techniques herein filter and classify security-relevant events from monitored computing devices. A control unit can receive event records of various types, each event record associated with a monitored device. The control unit can provide, for each event record matching a corresponding pattern of a pattern set associated with the respective event type, a respective match record. Each match record can include an identifier of the corresponding pattern and data of the respective event record. The control unit can provide, for each match record satisfying a corresponding condition of a condition set, a respective candidate record including a tag associated with the corresponding condition. The control unit can provide, for each candidate record satisfying a tag criterion, a result record. Some examples can receive a modification record and use it to provide an updated condition set used for determining candidate records. |
| US11310245B2 |
Indicator of compromise calculation system
This disclosure describes techniques for calculating a vulnerability score for a malicious threat based on Indicator of Compromise (IoC) metadata retrieved from a computing device or underlying network. Further, an Indicator of Compromise (IoC) Calculation (IoC-C) system is described that may monitor a client interaction on a computing device, and further identify IoC metadata that may relate to a malicious threat. The IoC-C system may further generate a vulnerability score that numerically quantifies a risk that the malicious threat poses to the computing device or underlying network. The vulnerability score may account for environmental criteria that mitigate an effect of the malicious threat. The IoC-C system may also generate a reporting data packet that includes an informational message identifying a potential risk posed by a malicious threat, or a response protocol that dynamically prevents, mitigates or quarantines an effect of the malicious threat on a computing device or underlying network. |
| US11310241B2 |
Mirroring virtual network traffic
The disclosed system implements techniques to enable a tenant of a cloud-based platform to effectively and efficiently apply a policy that copies data packets communicated to or from a virtual machine in the tenant's own virtual network. When applied, the policy mirrors data traffic associated with a workload executing on a virtual machine in the tenant's virtual network. To mirror the data traffic, a copy of a data packet is streamed to another virtual machine so that network analytics can be performed (e.g., performance analytics, security analytics, etc.). In various examples, the policy can be a role-based mirroring policy that defines a plurality of roles in association with a role-based access model that scales operations and that provides improved security for a tenant's virtual network. |
| US11310238B1 |
System and method for retrieval and analysis of operational data from customer, cloud-hosted virtual resources
A system for protecting public cloud-hosted virtual resources features cloud visibility logic. According to one embodiment, the cloud visibility logic includes credential evaluation logic, data collection logic, correlation logic and reporting logic. The credential evaluation logic is configured to gain authorized access to a cloud account within a first public cloud network. The data collection logic is configured to retrieve account data from the cloud account, while the correlation logic is configured to conduct analytics on the account data to determine whether the cloud account is subject to a cybersecurity threat or misconfiguration. The reporting logic is configured to generate an alert when the cloud account is determined by the correlation logic to be subject to the cybersecurity threat or misconfiguration. |
| US11310236B2 |
Deriving confidence scores based on device sharing
Systems and methods for deriving confidence scores based on device sharing are disclosed. In embodiments, a method includes receiving, by a computing device, sharing event data from a remote computing device in a comparative confidence environment, the sharing event data including usage data regarding the sharing of an electronic device between a first participant and a second participant obtained by the remote computing device during a sharing event; calculating, by the computing device, a comparative confidence score for the first participant and the second participant based on the sharing event data; and enabling, by the computing device, the first participant to gain access to a resource of the second participant based on the comparative confidence score. |
| US11310233B2 |
Method for authenticating smart glasses in a data network
A method for authenticating smart glasses in a data network includes transmitting a message to an authentication computer of the data network, generating a first transaction code and transmitting to the smart glasses, reading authorization data of a user, without involving the smart glasses, into the data network and processing by the authentication computer, which carries out an authentication of the user on the basis of the authorization data, and in case of a successful authentication, reading a second transaction code into the data network, wherein if a check performed by the authentication computer shows that the second transaction code matches the first, an access right is provided for the smart glasses and stored in the smart glasses, the access right enabling the smart glasses to access one or a plurality of predetermined services in the data network. |
| US11310230B2 |
System for electronic authentication with live user determination
Systems, computer products, and methods are described herein for improved authentication utilizing two factor authentication of a user. The two factors include a verified identification and a liveness identification. The verified identification may be a governmental verified identification, and the liveness identification may be a video of the user. The user may capture the verified identification and the liveness identification using the user's mobile device. The organization may authenticate the user by identifying the user from the verified identification image and identifying that the user is active by identifying movement from the liveness identification image. Additional authentication may include requiring and/or identifying an identifier from the liveness identification image (e.g., movement, object, characters, or the like), and/or capture image data related to a time or a location at which the images were captured. |
| US11310228B1 |
Systems and methods for continuous authentication and monitoring
Systems, apparatuses, methods, and computer program products are disclosed for providing continuous session authentication and monitoring. An example method includes authenticating, at a first time, a session for a user of the client device based on an authentication image data structure and a plurality of first video frames captured before the first time. The example method further includes extracting sample data from a monitor region for each of a plurality of second video frames captured after the first time and generating motion data based on the extracted sample data. The example method further includes detecting, at a second time, a re-authentication trigger event based on the motion data. Subsequently, the example method includes re-authenticating the session based on the authentication image data structure and a plurality of third video frames captured after the second time. |
| US11310225B2 |
Access to telecom blockchain-based services with digital passport
The disclosure relates to user-centric access to blockchain-based services accessed through a telecom network. User devices may each include a Digital Passport Application (“DPA”), which may be stored at an eSIM of the user device. The DPA may be directed to and anchor to an Edge Digital Gate (“EDG”) entitled to provide access to blockchain-based services. The DPA may store a digital persona that digitally represents an entity such as a user or machine so that the DPA may access and interact with blockchain-based services on behalf of the entity. For instance, the digital persona may bind a physical identity of the entity with a digital identity through a private key of the entity. The private key may be used to digitally signed the access token. The digital persona may further link the digital identity with one or more (typically multiple) virtual identities each associated with a blockchain-based service. |
| US11310223B2 |
Identity authentication method and apparatus
An identity authentication method, includes: at an electronic device having one or more processors and memory, the electronic device coupled with a display and one or more input devices: receiving an identity authentication request; in response to receiving the identity authentication request, performing an interactive authentication information exchange between the electronic device and a user, including: displaying, on the display, first visual information in a first manner; displaying, on the display, the first visual information in a second manner that is distinct from the first manner, wherein the first visual information displayed in the second manner includes a timing characteristic that is absent from the first visual information displayed in the first manner; receiving user input entered in accordance with the first visual information displayed in the second manner; and verifying that the user input conforms to the timing characteristic in the first visual information displayed in the second manner. |
| US11310221B2 |
Alternate user communication routing for a one-time credential
The invention relates to alternate user communication routing for a one-time credential. When a user is determined to be an unauthorized user, the unauthorized user may be provided with an alternative one-time credential (e.g., one-time password, or the like) in response to the user trying to take an action (e.g., to access the organization systems in order to access information). When the unauthorized user tries to utilize the alternative one-time credential, the organization may identify the user as unauthorized and determine how to respond to the unauthorized user. In addition to the alternative one-time credential, one or more additional alternate treatments may be presented to the unauthorized user in order to identify, track, and/or prevent access by the unauthorized user. |
| US11310218B2 |
Password streaming
Embodiments described herein are related to a method for password streaming. The method comprises: upon receiving, at the first device, a first entry corresponding to a password in the password user interface, the first entry adding a first character to the password: adding the first character to an editing placeholder stored in memory of the password user interface; transmitting a command to a password storage component separate from the memory of the password user interface, wherein the command represents the first entry, wherein the password storage component is configured to store the password and edit the password to include the first character based on the command; and overwriting the first character with a first masking character in the editing placeholder based on transmitting the command. |
| US11310214B2 |
Electronic device
Disclosed is an electronic device including: an input unit including buttons; a plurality of sensors; and a controller configured to generate at least one authentication information based on at least some of the plurality of sensors, calculate a final security level score based on a security level score corresponding to the at least one authentication information, and determine whether a target service or a target external device is accessible, depending on the final security level score, wherein the security level score is set differently based on a type of the at least one authentication information. Accordingly, it is possible to easily access the target service or the target external device through multi-factor authentication. |
| US11310211B2 |
Securely sharing data between a hearing device, hearing device user, and data storage
The disclosed technology relates to securely sharing data between a hearing care professional (HCP) and a hearing device user. For example, the disclosed technology relates to securely accessing fitting data for a hearing device. The disclosed technology includes a hearing device that has a memory, where the memory stores a key that can be used for encryption and decryption. The key can be a symmetrical key. In addition to storing a key, the hearing device can store a uniform resource indicator (URI) in its memory. |
| US11310210B2 |
Applying unified governance and integration platform to social media data
A computer-implemented method, system and computer program product for applying a unified governance and integration platform to social media data. Data integration definitions for managing and protecting social media data are received. After receiving the data integration definitions for social media data, data integration externalization, governance catalog externalization or lineage externalization may be performed. For example, social media data may be extracted from a database system by a governance and integration unit (“unit”) using the data integration definitions. The extracted social media data is then transformed and loaded to the social media data system via a connector linking the data from the unit to the social media data system. In another example, social media data is extracted from the social media data system by the unit, such as via the connector, using the data integration definitions and then transformed and loaded to the database system for analysis. |
| US11310208B1 |
Secure time service
Methods and apparatus for a secure time service are disclosed. A time server including a time source, a cryptographic key and a cryptographic engine is instantiated within a provider network. A time service endpoint receives a timestamp request from a client. The endpoint transmits a representation of the request to the time server, and receives, from the time server, an encryption of at least a timestamp generated using the time source. A response comprising the encryption of at least the timestamp is transmitted to the requesting client. |
| US11310206B2 |
In-line cognitive network security plugin device
Systems, methods, and computer program products providing network security leveraging analytics and physical separation between computer systems and a network to prevent threats from infecting network devices. A specialized pluggable dongle like security device is inserted between ports of computer system(s) connecting to the network and port(s) of network hardware facilitating connections between the computer system and computer network. The security device uses a combination of onboard analytics and cloud-based analytic services to detect incoming threats from network traffic and whether to allow network traffic to pass through the security device and/or prevent network traffic from entering the computer system. In response to detected network threats, an out of band management network communicating with the security device can open or close a physical gate onboard the security device, which, when opened introduces an air gap between the network and computer system, preventing harmful network traffic from entering the computer system. |
| US11310205B2 |
Detecting evasive network behaviors using machine learning
In one embodiment, a traffic analysis service identifies a client in a network having an associated traffic flow that was blocked by a firewall. The traffic analysis service obtains traffic telemetry data regarding one or more subsequent traffic flows associated with the identified client that are subsequent to the blocked flow. The traffic analysis service uses a machine learning-based classifier to determine that the identified client is exhibiting evasive network behavior, based on the obtained traffic telemetry data. The traffic analysis service initiates a mitigation action in the network, based on the determination that the identified client is exhibiting evasive network behavior. |
| US11310204B2 |
Centralized access to data repository from a multi-cloud computing environment
A method for accessing a web-based repository service from a cloud platform is provided. The method may include receiving, at a gateway controller, a first request from an endpoint to access the web-based repository service. Upon successfully verifying the first request, a redirect request to a reverse proxy at the gateway controller may be returned to the endpoint. The redirect request may include a cryptographic signature and the first request. The reverse proxy may respond to the redirect request from the endpoint by accessing, on behalf of the endpoint, the web-based repository service to store and/or retrieve data. The web-based repository service may be accessed by sending, to the web-based repository service, an encrypted second request corresponding to the first request. Related systems and articles of manufacture, including computer program products, are also provided. |
| US11310202B2 |
Sharing of firewall rules among multiple workloads in a hypervisor
In some embodiments, a method receives a packet at an instance of a distributed firewall associated with one of a plurality of workloads running on a hypervisor. Each of the plurality of workloads has an associated instance of the distributed firewall. An index table is accessed for the workload where the index table includes a set of references to a set of rules in a rules table. Each workload in the plurality of workloads is associated with an index table that references rules that are applicable to each respective workload. The method then accesses at least one rule in a set of rules associated with the set of references from the rules table and compares one or more attributes for the packet to information stored for the at least one rule in the set of rules to determine a rule in the set of rules to apply to the packet. |
| US11310199B2 |
Premises management configuration and control
Disclosed are methods, systems, and devices for management of a premises. The premises may comprise one or more devices, such as a gateway device, a control device, or a premises device. A computing device, such as a server external to the premises, may receive data indicative of the premises device. The computing device may determine to update a configuration of one or more devices at the premises, such as the gateway device or the control device. Configuration data may be sent to the gateway device to update the configuration. |
| US11310198B2 |
Integrated multi-level or cross-domain network security management appliance, platform and system, and remote management method and system therefor
Described are various embodiments of an integrated multi-level or cross-domain network security appliance and system. In one embodiment, a cross-domain network traffic management appliance comprises: an external hardware network domain port to interface with an external network corresponding with a first network security domain, and exchange domain-specific data therethrough; a cross-domain hardware port to interface with a second network security domain and exchange cross-domain data therethrough; one or more hardware-integrated processing engines; and a hardware-integrated interconnection matrix configured to define, in hardware, designated data communication paths to interconnect said processing engines; wherein said one or more hardware-integrated processing engines are operable to: process and validate ingress first domain data received from said first network security domain via said external hardware port for cross-domain egress via said cross-domain hardware port; and process cross-domain ingress data received via said cross-domain hardware port for dispatch to said first network security domain via said external hardware network port; wherein cross-domain egress and ingress data is internally encrypted and decrypted, respectively, in accordance with a designated destination-domain encryption process. |
| US11310196B2 |
Manufacturing line computer system and network setup method of the same
Disclosed herein is a manufacturing line computer system including: first and second computers. The first computer includes a storage section adapted to store a template that associates role information of the second computer and a network address of the second computer; and a reply section adapted to return the network address of the second computer associated with the role information to the second computer in response to reception of the role information from the second computer. The second computer includes an input section adapted to input the role information of the second computer; a transmission section adapted to send the input role information of the second computer to the first computer; and a network address setup section adapted to specify the network address, returned from the first computer, for the second computer. |
| US11310193B2 |
Information processing apparatus and non-transitory computer readable medium
An information processing apparatus includes: a notification unit that performs notification to a first person when the first person differs from a second person and refrains from performing the notification when the first person is the same as the second person, wherein the first person is one who instructs execution of an application for transmitting data to a preset transmission destination, the second person is one who has changed information on the transmission destination included in an address book, and the notification indicates that the information on the transmission destination has been changed. |
| US11310192B1 |
Systems and methods for second protocol communication over LDAP
A monitoring device is described. The monitoring device includes a processor. The monitoring device also includes memory in electronic communication with the processor. The monitoring device further includes instructions stored in the memory. The instructions are executable to intercept a lightweight directory access protocol (LDAP) search request sent to an LDAP search handler of a security subsystem from a calling device. The LDAP search request includes a query string containing data for a second protocol. The instructions are also executable to generate response data for the second protocol to substitute for a response by the LDAP search handler. The instructions are further executable to send an LDAP search result to the calling device, the LDAP search result comprising the response data for the second protocol. |
| US11310188B2 |
Text message integration with a computer-implemented collaboration platform
The present disclosure describes integrating SMS/MMS messaging with a collaboration platform, and filtering SMS/MMS messages within a collaboration platform. One embodiment includes associating a phone number with a project within a collaboration platform; receiving an SMS/MMS message at the phone number from a client device; and based on receiving the SMS/MMS message at the phone number, adding the content of the message to the project. In another embodiment, a phone number can be associated with a plurality of projects. Attributes of SMS/MMS messages received at this phone number are compared to project data of the plurality of projects to route the message content to a project of the plurality of projects. |
| US11310184B1 |
Communication response analyzer
Methods are presented for classifying responses to communications. One method includes presenting, in a first user interface (UI), a message from a sender to a recipient requesting a response. The first UI includes response options of a first classification, a second classification, and an entry field for entering a free text message. Another operation is for receiving a recipient response with a selection of: (a) the first or the second button and (b) the free text message entered in the text entry field. The method further includes generating a featurized recipient response based on the free text message and the selection. An acceptance machine-learning (ML) model calculates a classification value of the recipient response from a set of possible classification values based on the featurized recipient response. The method further includes presenting, in a second UI for the sender, an indicator for the message and the calculated classification value. |
| US11310183B2 |
Dynamic configuration of application component tiles
A server with a tile construction module has instructions executed by a processor to collect communication threads associated with a user. Tiles representative of the communication threads are dynamically configured in accordance with specified policies to form a tile configuration. The tile configuration is supplied to the user. |
| US11310171B2 |
Wireless communication device for communicating with multiple external devices via a wireless communication unit
A method and wireless communication device use a first processing unit to perform a first communication event within a first communication window by use of a first communication protocol, a second processing unit to perform a second communication event within a second communication window by use of a second communication protocol, and a wireless communication unit connected to a radio-frequency antenna to transmit and/or receive a packet wirelessly. The first and second processing units may perform the first and second communication events via the wireless communication unit. The second processing unit or the wireless communication unit may transmit an event signal to the first processing unit when performing the second communication event or receiving a packet, respectively, to allow the first processing unit to arrange the first communication window (or first communication event) with respect to the second communication window (or second communication event) to minimize interference. |
| US11310165B1 |
Scalable production test service
A network-based scalable production load test service may be implemented on a provider network including a plurality of computing devices in order to provide load testing for network-based production systems. In some embodiments, the plurality of computing devices is configured to receive a request to capture to a load test data repository items of transaction data for a network-based production service. In some embodiments, the plurality of computing devices is configured to capture to the load test data repository the items of transaction data. The transaction data include input to the network-based production service over a network. In some embodiments, in response to a load test specification received by the scalable production load test service, the plurality of computing devices is configured to dynamically allocate one or more resources to perform a load test of the network-based production service according to the load test specification. |
| US11310163B1 |
Network flow sampling fairness
In one embodiment, a network flow sampling system includes data communication apparatus, which includes packet processing circuitry configured to process data packets of multiple network flows, and an adaptive policer configured to sample respective ones of the data packets of respective ones of the network flows yielding sampled data, while applying sampling fairness among the respective network flows, wherein at least one of the data packets from each of the respective network flows is sampled. |
| US11310159B2 |
Packet sending method and apparatus, and storage device
A packet sending method is applied to a data transmission system and comprising: receiving, by a network interface card of a second device, a first packet that is from a first QP of a first device and that is forwarded by using a switch; obtaining, by the network interface card of the second device, an instant rate of the first QP and a maximum sending rate of the first QP; determining, by the network interface card of the second device, an adjustment rate of the first QP based on the instant rate of the first QP and the maximum sending rate of the first QP; sending, by the network interface card of the second device, a congestion notification packet to the first device, where the congestion notification packet carries the adjustment rate of the first QP. |
| US11310158B2 |
Packet classification using fingerprint hash table
A key is descriptive of a data packet, and a fingerprint hash function is applied to such a key to generate a fixed length fingerprint of the key. An index value is determined based on a portion of the fingerprint. A hash table could be populated by storing in a memory, at a memory location associated with the index value: a remainder of the fingerprint other than the portion of the fingerprint that was used to determine the index value, to indicate that data packets consistent with the key are to be handled in accordance with packet handling metadata. During packet processing, if a memory location associated with an index value stores a remainder of the fingerprint other than the portion of the fingerprint that was used to determine the index value, a data packet is handled according to packet handling metadata associated with the fingerprint. |
| US11310157B2 |
Dynamic segment routing mapping server for a multiprotocol label switching network
A dynamic SRMS (DSRMS) in a MPLS network generates unique segment identifiers for nodes of the network lacking segment identifiers (SIDs). The DSRMS receives network information from other nodes of the network that may include, for example, Internal Gateway Protocol (IGP) routing information, advertised prefix values for the nodes, and label values used in MPLS routing. The DSRMS analyzes the information and identifies nodes of the network that are not associated with a SID. For each identified node, the DSRMS generates a unique SID and then announces the SID to other nodes within the network. Generating the unique SID may include executing a hashing function using the IP address of the identified node as an input. |
| US11310154B2 |
Enabling multicast-label-distribution-protocol (mLDP) on non-mLDP devices
In one embodiment, a first label-distribution-protocol (LDP) session is established between a first interface of a first computing device and a second computing device, while a second LDP session is established between a second interface and the second computing device. The method may further comprise receiving a request from a third computing device to subscribe to a multicast group, storing an association between a first label, the multicast group, and the first interface, and sending, to the second computing device via the first LDP session, an indication that the first label is associated with the multicast group. Further, the method may include receiving a request from a fourth computing device to subscribe to the multicast group, storing an association between a second label, the multicast group and, the second interface, and sending, via the second LDP session, an indication that the second label is associated with the multicast group. |
| US11310153B2 |
Packet processing method and network device
A packet processing method and a network device, where the method includes: receiving, by a network device, a packet, where the packet includes classification information, and the classification information includes M fields; determining, by the network device, K fields in the M fields according to indication information stored by the network device; determining, by the network device, a target classification rule based on a first classification rule set stored by the network device and the K fields, and processing the packet according to the target classification rule. |
| US11310145B1 |
Apparatus, system, and method for achieving shortest path forwarding in connection with clusters of active-standby service appliances
A disclosed method may include (1) identifying, by a PE router, a conditional advertisement policy that requires installation of at least one address of an active service appliance within a routing table to trigger advertising a route for the active service appliance to one or more additional PE routers, (2) inspecting the routing table for the installation of the address of the active service appliance, (3) determining, based at least in part on the inspection, that the address of the active service appliance is installed in the routing table, (4) determining that the PE router has satisfied the conditional advertisement policy due at least in part to the address of the active service appliance being installed in the routing table, and then in response, (5) directing the PE router to advertise the route to the additional PE routers. Various other apparatuses, systems, and methods are also disclosed. |
| US11310144B2 |
Information processing apparatus and non-transitory computer readable medium
An information processing apparatus includes a processor configured to acquire information regarding multiple transient states of a network including multiple nodes when the network undergoes clustering in which the multiple nodes are classified into multiple clusters. The multiple transient states each represent a transient state of the network on a way to a final result of the clustering. The processor is also configured to determine a common node by using the information regarding the acquired multiple transient states. The common node is used in the clustering in the multiple transient states. |
| US11310137B2 |
System and method to propagate information across a connected set of entities irrespective of the specific entity type
Various systems and methods are provided for propagating information throughout a data center or other network environment. For instance, in certain embodiments, the functionality disclosed herein includes determines propagation rules, and then either stores and/or propagates those rules throughout the datacenter or other network environment. Propagation rules define various conditions or other variables that govern propagation of information throughout a system, such as those systems described herein. The propagation rules can then be used to perform various other functionality. For instance, the functionality described herein can be used to process updates to entities. The functionality described herein can also be used to process updates to propagation metadata. Additionally, the functionality described herein can be used to process the creation of new relationships. The functionality described herein can also be used to process the deletion of objects and/or relationships. All of the foregoing functionality can be performed automatically. |
| US11310136B2 |
Method, device and medium for handing network connection abnormality of terminal
The present disclosure relates to a method, a device, and a medium for handing network connection abnormality of a terminal. The method can include determining that a network link of the terminal is abnormal, determining a reason why the network link is abnormal, and performing a corresponding network link repair operation based on the reason why the network link is abnormal. |
| US11310131B2 |
Data network analysis system and method for a communication network
A data network analysis system includes a computer-executable set of instructions that obtain service account information associated with a route provided to a customer through a data communication network having network elements. Using the service account information, the instructions identify a termination port that terminates the route to a customer premises equipment of the customer, and at least one target port of the route and those network elements that are assigned to convey the route through one or more of the network elements. The instructions then obtain the routing information for the route from each of the network elements that are assigned to convey the route. |
| US11310122B2 |
Portable and flexible deployment of servers
A method and system of portable and flexible deployment of dedicated servers in cloud computing. A user input of a selection of a server image template pertaining to a dedicated server to be deployed is received at a first screen at a user interface. The dedicated server is selected according to the user input of the selected server image template. The selected dedicated server is deployed, and an operating system is specified for the selected dedicated server in response to having deployed a server image associated with the selected server image template in the data center at each geographic location of one or more geographic locations. Deploying the selected dedicated server includes booting the selected dedicated server using the specified operating system. |
| US11310117B2 |
Pairing of a probe entity with another entity in a cloud computing environment
A cloud orchestration system (COS) receives a request to initiate a first entity. The COS accesses configuration data that indicates the first entity is paired with a probe entity, the probe entity being configured to analyze network traffic associated with the first entity. The COS identifies a first computing host of a plurality of computing hosts on which to initiate the first entity and the probe entity. The COS causes the generation on a virtual network device of a first port and a replication port to which traffic associated with the first port is replicated. The COS causes the first entity and the probe entity to be initiated and communicatively coupled to the first port and the replication port, respectively. |
| US11310116B2 |
Scaling of remote network directory management resources
Features are disclosed for facilitating remote management of network directories of organizations by a directory management system. The network directories may change over time, experiencing growth in size and number of current connections, increased latency, reduced performance, and the like. The network directories may also shrink over time, experience fewer connections, etc. Organizations can define scaling policies by which the directory management system can automatically respond to the occurrence of various events, such as changes in the size or usage of the organizations' network directories, by scaling resources associated with the directories. The directory management system can perform various scaling actions on-demand or without requiring additional action by the organizations, thereby reducing the time and effort required by the organizations to monitor their own directories and implement (or request implementation of) changes. |
| US11310113B2 |
Methods, systems and apparatus to improve cluster efficiency
Methods, apparatus, systems and articles of manufacture are disclosed to improve cluster efficiency. An example apparatus includes a cluster manager to identify cluster resource details to execute a workload, a workload manager to parse the workload to identify services to be executed by cluster resources, and an optimization formula manager to identify service optimization formulas associated with respective ones of the identified services, and improve cluster resource efficiency by generating a cluster formula configuration to calculate cluster parameter values for the cluster resources. |
| US11310112B2 |
Automatic server configuration using a switch
Automatic server configuration by a switch may include determining, by a firmware interface application of the switch, a configuration pattern for a plurality of servers; generating, by a network caching application of the switch, a network cache; receiving, based on the configuration pattern, a solution stack; storing the solution stack in the network cache; and providing, from the network cache, the solution stack to the plurality of servers. |
| US11310111B2 |
Method for configuring a firewall equipment in a communication network, method for updating a configuration of a firewall equipment, and corresponding device, access equipment, firewall equipment and computer programs
A method for configuring a firewall equipment in a first communication network managed by an access equipment for accessing a second communication network. Such a method implements: obtaining characteristic information of a user equipment in the first network by analyzing its active interfaces in the network; generating configuration rules for configuring the firewall equipment on the basis of the obtained features and of a predetermined configuration model; and transmitting, to the firewall equipment, an update command message to update a configuration, including the determined configuration rules. |
| US11310110B2 |
Provisional modes for multi-mode network devices
Techniques for implementing a provisional mode in a multi-mode network device (i.e., a network device that supports at least first and second modes of operation) are provided. According to one embodiment, the network device can receive, while running in the first mode, a request to enter the second mode. In response to the request, the network device can enter a third mode that is a provisional version of the second mode. Then, while running in the third mode, the network device can accept one or more configuration commands or settings for the second mode while simultaneously processing live network traffic according to the first mode. |
| US11310104B2 |
Management of persistent network slices by a distributed learning system in a 5G or other next generation wireless network
The technologies described herein are generally directed to facilitating the allocation, scheduling, and management of network slice resources. According to an embodiment, a system can comprise a processor and a memory that can store executable instructions that, when executed by the processor, facilitate performance of operations. The operations can include selecting a resource configuration for a network slice based on characteristics of a user device and historical data related to the user device, resulting in a selected resource configuration. The operations can further include facilitating communicating resource configuration data representative of the selected resource configuration for the network slice to a network device for allocation to the user device connected to the network device. The operations can further include facilitating allocating resources to the network slice in accordance with the selected resource configuration. |
| US11310102B2 |
Retaining active operations, administration, and maintenance (OAM) sessions across multiple devices operating as a single logical device
A logical Network Interface Device (NID) includes a first NID connected to a peer NID; a second NID connected to the peer NID and communicatively coupled to the first NID, wherein the first NID and the second NID are each connected to a network element for redundant communication to the peer NID, and wherein the first NID actively operates an active maintenance endpoint in an Operations, Administration, and Maintenance (OAM) session with the peer NID, and wherein the active maintenance endpoint synchronizes OAM session data with a dormant maintenance endpoint at the second NID. The dormant maintenance endpoint becomes the active maintenance endpoint responsive to a protection switch, and the dormant maintenance endpoint has the OAM session data in a database based on synchronization with the first NID. |
| US11310101B1 |
EMS resolution of split-brain virtual network function components
An example operation may include a system, comprising one or more of receiving a virtual network function component instance (VNFCI) status notification resumption message with an active state when a peer VNFCI operational state is active, retrieving a timestamp of a VNFCI state change to an active state from an element VNFCI state database, retrieving a timestamp of a peer VNFCI state change to active from an element VNFCI state database, sending one or more of: a request to a virtual network function manager (VNFM) to determine if the VNFCI network is isolating while an operating state was active, and a request to the VNFM to determine if the peer VNFCI network is isolating while an operating state was active, sending a state change request with standby state to the peer VNFCI when the VNFCI is not network isolated and the peer VNFCI is network isolated, and a VNFM response is received regarding the VNFCI, a timeout response from the VNFM, and a VNFM response is received regarding the peer VNFCI, and sending a state change request with standby to the VNFCI with one or more of: the VNFCI network isolate and peer VNFCI is not network isolated, and the VNFCI is network isolated or the peer VNFCI is not network isolated, and the VNFCI is not network isolated and the peer VNFCI is network isolated and the VNFCI is in preferred standby. |
| US11310100B1 |
EMS resolution of split-brain virtual network function components
An example operation may include a system, comprising one or more of receiving a virtual network function component instance (VNFCI) status notification resumption message with an active state when a peer VNFCI operational state is active, retrieving a timestamp of a VNFCI state change to an active state from an element VNFCI state database, retrieving a timestamp of a peer VNFCI state change to active from an element VNFCI state database, sending one or more of: a request to a virtual network function manager (VNFM) to determine if the VNFCI network is isolating while an operating state was active, and a request to the VNFM to determine if the peer VNFCI network is isolating while an operating state was active, sending a state change request with standby state to the peer VNFCI when the VNFCI is not network isolated and the peer VNFCI is network isolated, and a VNFM response is received regarding the VNFCI, a timeout response from the VNFM, and a VNFM response is received regarding the peer VNFCI, and sending a state change request with standby to the VNFCI with one or more of: the VNFCI network isolate and peer VNFCI is not network isolated, and the VNFCI is network isolated or the peer VNFCI is not network isolated, and the VNFCI is not network isolated and the peer VNFCI is network isolated and the VNFCI is in preferred standby. |
| US11310098B2 |
Diagnosing intermediary network nodes
This disclosure describes techniques for diagnosing a presence or malfunction of a network node. In an example method, a first network node receives an indication of a diagnostic transmission originating from a second network node. The second network node further receives a forwarded transmission corresponding to the diagnostic transmission. The first network node diagnoses at least one of a presence or a malfunction of an intermediary node between the first network node and the second network node based on at least one of the indications of the diagnostic transmission or the forwarded transmission. |
| US11310096B2 |
Notification system and method of monitoring a multi-component system
A notification system for monitoring a multi-component system is disclosed. The notification system comprises a notification processing module and an event processing module. The event processing module comprises an event input and an event classifier module. The event input is configured to receive an event signal that comprises at least one status parameter being indicative of at least one of a status and a status change of at least one component of the multi-component system. The event classifier module is configured to classify the event signal into at least one event class based on the at least one status parameter. The notification processing module is configured to generate no user notification or at least one user notification based on the at least one event class. Further, a method of monitoring a multi-component system is disclosed. |
| US11310090B2 |
Systems, transmitters, and methods employing waveform bandwidth compression to transmit information
Systems, transmitters, and methods employing waveform bandwidth compression to transmit information are provided. Transmitters may include an encoder to generate a time-domain amplitude sequence from information in a constant amplitude sinusoidal modulation format; fit a polynomial to the time-domain amplitude sequence, the fitted polynomial spanning at least one transmission time interval; and convert the polynomial to a transmission signal, the transmission signal comprising a sum of sinusoids of differing frequencies, each sinusoid having a continuously time-varying amplitude. A carrier source providing a carrier that is modulated with the transmission signal and transmitted through the system to a receiver, which receives the signal in the constant amplitude sinusoidal modulation format. The sum of sinusoids of differing frequencies having a continuously time-varying amplitude may be generated using instantaneous spectral analysis, to reduce the spectral occupancy of the transmission signal. |
| US11310089B2 |
Method and apparatus for synchronization signal design
A method of a base station (BS) for transmitting synchronization signals in a wireless communication system. The method comprises generating a primary synchronization signal (PSS) including one of multiple PSS sequences that is generated based on a M-sequence of length 127 in a frequency domain, wherein the PSS indicates part of cell identification (ID) information using a cyclic shift performed on the M-sequence generating the PSS; generating a secondary synchronization signal (SSS) including one of multiple SSS sequences that is generated based on multiple BPSK modulated M-sequences of length 127 in the frequency domain, wherein the SSS indicates the cell ID information using cyclic shifts performed on the M-sequences generating the SSS; and transmitting, to a user equipment (UE), the PSS and SSS over downlink channels. |
| US11310086B2 |
Compensating for frequency-dependent I-Q phase imbalance
Methods, systems, and apparatus, including computer programs encoded on computer-storage media, for compensating for frequency-dependent I-Q imbalance. In some implementations, a radio receiver includes an in-phase mixer configured to generate an in-phase (I) signal and a quadrature mixer configured to generate a quadrature (Q) signal. A first analog-to-digital (A/D) converter is configured to generate first digital samples from one of the I signal and the Q signal. A second analog-to-digital (A/D) converter is configured to generate second digital samples from the other of the I signal and the Q signal. A compensation system includes a feedback loop configured to compensate for frequency-dependent I-Q imbalance based on results, for each of multiple of the first digital samples, of cross-correlation of the first digital sample with each of multiple of the second digital samples. |
| US11310084B2 |
Distributed dynamic power savings for adaptive filters in a high-speed data channel
A physical layer transceiver for a wireline channel medium includes a host interface to a host device, a line interface to the medium, encoding/decoding circuitry for interfacing between the host device and the medium, and adaptive filter circuitry coupled to the encoding/decoding circuitry. The adaptive filter circuitry includes a plurality of filter taps, each corresponding to a segment of the medium, and capable of being powered ON and OFF separately from each other filter tap. Adaptive control circuitry can power ON a first subset, fewer than all the filter taps, corresponding to segments distributed along the medium, monitor powered-ON filter taps for occurrence of interference events, and upon detection of an interference event at a particular segment to which a particular powered-ON filter tap corresponds, power ON one or more additional filter taps corresponding to one or more segments in a vicinity of the particular segment. |
| US11310079B2 |
EVPN packet processing method, device, and system for MAC learning via MAC/IP advertisement route
A method includes a second provider edge (PE) device sending, to a first PE device, a media access control (MAC) route learned from a customer edge (CE) device, wherein the first PE device generates a MAC forwarding entry based on the MAC route, wherein the first PE device may forward, based on the MAC forwarding entry using the CE device, a packet whose destination MAC address is the CE device or a MAC address of a terminal device accessing the CE device, and wherein an outbound interface identifier included in the MAC forwarding entry is an identifier of an interface connected to the CE device. |
| US11310070B2 |
Network hub, transfer method, and onboard network system
A network hub is provided for an onboard network system. The onboard network system includes first and second networks for transmission of first-type and second-type frames following first and second communication protocols. The network hub includes a receiver that receives a first-type frame. A processor determines whether or not the first-type frame received by the receiver includes first information that is a base for a second-type frame to be transmitted to the second network, to obtain a determination result, and selects a port to send a frame based on the first-type frame based on the determination result. A transmitter sends the frame based on the first-type frame to a wired transmission path connected to the port selected by the processor based on the first-type frame received by the receiver. |
| US11310069B2 |
Variable termination in a vehicle communication bus
Disclosed are systems, methods, and non-transitory computer-readable media for variable termination in a vehicle communication bus. To provide compatibility with multiple vehicles, a device may include a software selectable terminator resistor that can be programmatically enabled or disabled to add or remove resistance as needed. For example, the software selectable terminator resistor may be enabled when the device is added as an end node in a high-speed communication bus and operates as a terminator resistor. Alternatively, the software selectable terminator resistor may be disabled when the device is added as an intermediate node positioned between terminator resistors in the high-speed communication bus. |
| US11310068B2 |
Device of controlling related device using artificial intelligence based on operation situation, schedule bot and server controlling thereof
This application is a technology with regard to a device that controls a related device based on an operation situation using artificial intelligence, a schedule bot and a server that controls the same, and the device that receives a control of the related device based on the operation situation by an exemplary embodiment of this application includes a function unit that performs a physical function of the device, a communication unit that receives a time schedule and function information from a related device or a schedule management device, and control unit that controls the function unit to maintain a ready state so that a function unit performs a first function at a point that is indicated in the time schedule by using the time schedule and the function information that the communication unit receives. |
| US11310067B1 |
Adaptive power flux density control for aeronautical broadband system reducing interference to terrestrial communication systems
A broadband communication system aboard an aircraft includes a steerable antenna, a modem, and processing circuitry. The processing circuitry determines a region on the ground where sidelobes of the radiated signal power pattern are incident. A regulatory power flux density (PFD) envelope is determined. PFD generated by the sidelobes in the region on the ground is estimated based on the ESD pattern of the steerable antenna and the aircraft altitude, attitude, and location. The processing circuitry determines, based on the estimate of the PFD generated by the sidelobes in the region on the ground and based on the regulatory PFD envelope, a target ESD pattern for the steerable antenna. The processing circuitry further controls at least one of: 1) output power of the modem based on the target ESD pattern; and 2) bandwidth of the data traffic output by the modem based on the target ESD pattern. |
| US11310063B2 |
Ultra-low power mesh network
A mesh receiver has a wakeup receiver for reception of a wakeup sequence formed by keyed RF or a sequence of wireless packets and gaps, a transmitter forming low speed RF wakeup sequence to other mesh stations, a mesh receiver for reception of high speed WLAN packets, the transmitter sending a wireless ACK packet in response to a wakeup sequence, the mesh receiver thereafter receiving wireless packets from a remote station, the mesh transmitter sending an ACK, the mesh station thereafter identifying a next hop station, and sending a wakeup sequence to that station, after receipt of an ACK, sending the data, the mesh receiver and mesh transmitter thereafter going to sleep. |
| US11310059B2 |
Ephemeral cryptography keys for authenticating computing services
Techniques of data authentication in a distributed computing system are disclosed herein. One example technique includes receiving a request for performing an operation along with a data package that includes a security token, a first digital signature of the security token generated using an ephemeral private key, and an ephemeral public key with a second digital signature generated using a master private key stored at a secure location. The example technique can also include initially validating the second digital signature using a public key corresponding to the master private key, and upon validating the second digital signature, validating the first digital signature of the security token using the ephemeral public key included in the data package. Upon validating that the first digital signature of the security token, the request can be authenticated, and the requested operation can be performed. |
| US11310058B2 |
Methods for digitally signing an electronic file and authentication method
The invention is a method for digitally signing an electronic file (48), comprising the steps carried out by a server: generating a challenge value (50) comprising a projection parameter (52), transferring the challenge value (50) to a client device through a communications channel, receiving, through a communications channel, an evidence record (70), the electronic file (48) to be signed, and a user's biometric data (54) from the client device, generating reduced biometric verification data by applying a projection utilising the projection parameter (52), generating a verification evidence record and comparing it against the evidence record (70) sent by the client device, generating a server certificate, signing the server certificate applying the server's private signing key, thereby generating a signed server certificate, generating a digital signature by associating at least the signed server certificate and the hash (49) of the electronic file (48), and associating the digital signature with the electronic file (48), thereby generating a digitally signed electronic file. The invention is further an authentication method. |
| US11310049B2 |
Homomorphic encryption for password authentication
Some embodiments are directed to a server device (100) and a client device (200) arranged to authenticating a user of client device (200). The user has access to an authentication string. Server device (100) is configured to encrypt a set of character/position data according to a homomorphic encryption algorithm. The client device allows the user to select a subset from the encrypted set from which a verification number is computed using the homomorphic operation. |
| US11310046B2 |
Systems and methods for secure identification retrieval
The present disclosure provides systems and methods for secure identification retrieval. The method includes retrieving a value of a periodic variable and calculating a plurality of query tokens from a corresponding plurality of client device identifiers and the value of the periodic variable. Each query token is associated with a corresponding client device identifier in a first database. The method further includes receiving a first query token calculated from a client device identifier of the first client device and the value of the periodic variable and identifying a second query token of the calculated plurality of query tokens in the first database matching the first query token. The method further includes, responsive to the identification, retrieving the associated client device identifier and retrieving one or more characteristics of the first client device according to the associated client device identifier. The method further includes transmitting the retrieved one or more characteristics. |
| US11310043B2 |
Frequency encryption for communication signals
A receiver in a communication system may include a buffer and hardware. The buffer may be configured to store a communication signal comprising one or more pulses representative of data. The hardware may be configured to determine whether a data authentication pulse has been superimposed over at least one of the one or more pulses, and authenticate, based on the determination of whether the data authentication pulse has been superimposed over at least one of the one or more pulses, the one or more pulses as a valid representation of the data. |
| US11310040B2 |
Quantum cipher based on phase inversion
Methods, systems and computer readable media are disclosed for providing a quantum cipher based on phase inversion, A shared key is established between a first party and a second party. A Hadamard transformation is applied to a message intended for a second party from the first party to produce an equal superposition state. A key phase inversion is applied to the output of the Hadamard transformation. A multiple phase inversion transformation is applied to the output of the key phase inversion to produce an encrypted quantum state with a uniform probability and relative phase distributions. The result is sent to the second party. |
| US11310037B2 |
Cloud container security framework
A containerized application is initialized in a cloud-based computing environment. Thereafter, the containerized application obtains environment variables encapsulating credentials. The containerized application stores the environment variables in a secret store of the containerized application. The environment variables are later wiped upon completion of the storing of the environment variables. Related apparatus, systems, techniques and articles are also described. |
| US11310035B2 |
Securing data at rest utilizing cloud provider service agnostic encrypted data transportability
Securing at rest data on a cloud hosted server includes, for each cloud hosted instance of a computer program, creating a key encrypted key (KEK) using a unique customer master key (CMK) corresponding to the instance, but only an encrypted form of the KEK is persisted in a database for the corresponding instance whereas the unencrypted KEK is retained in memory of the encryption process only. Thereafter, in response to a request to persist data by a corresponding instance of the computer program, a data key (DK) is randomly generated and encrypted with the KEK in memory for the corresponding instance. The data itself also is encrypted with the DK and an envelope with the encrypted DK and the encrypted data returned to the requestor, thus ensuring that the data and the encryption keys are never moved or persisted in an un-encrypted form. |
| US11310034B2 |
Systems and methods for securing offline data
Described embodiments provide systems and methods for securing offline data for shared accounts of a shared computing device. Cache files can be generated for a plurality of users of an application executable on the device to store user data corresponding to individual users of the application. An encryption key can be generated for one or more of the cache files and the encryption key can be associated with at least one user of the application. The encryption key can be associated with a user identifier so that the encryption key is not accessible by other users of the computing device. The user data can be encrypted in one of the cache files with the encryption key. The encrypted user data can be presented to a user via the shared computing device based on receipt of a user identifier that enables access to the encryption key. |
| US11310029B2 |
Communication apparatus, operation procedure management method, and computer readable medium
A second encrypted communication apparatus (300) operates as a PANA authentication client. If any of a plurality of events associated with PANA authentication occurs, a timer management unit (14) activates a timer among a plurality of timers that corresponds to the event that has occurred. When the timer activated by the timer management unit (14) expires, an authentication control unit (13) refers to management information which describes an operation procedure to be taken at timer expiration for each of the plurality of events and executes the operation procedure described in the management information regarding the event that has occurred. |
| US11310024B2 |
Repeater methods and apparatus
Methods and apparatus for implementing a repeater are described. In various embodiments the repeater determines uplink/downlink timing information either from information broadcast from a base station or from monitoring received signals and/or gaps between received signals. In various embodiments while the repeater may decode control information to determine uplink/downlink time periods, user data is not decoded and re-encoded. In various embodiments interference between uplink and downlink circuitry is reduced or minimized by controlling gains, combining weights and/or power to amplifiers in the repeater based on the mode of operation. A stored information can include sets of different weights and/or parameters for the mode of operation and/or beam forming antenna pattern in use at a given time. |
| US11310023B2 |
Non-uniform demodulation reference signal bundling
Methods, systems, and devices for wireless communications are described. Generally, the described techniques provide for signaling a semi-static configuration for demodulation reference signal (DMRS) bundling across non-uniform bundles of transmission time intervals (TTIs). A base station may transmit control signaling to a user equipment (UE) that schedules resources for DMRSs and associated data channels across the TTIs. For example, the base station may transmit a bundling configuration to the UE that may configure a bundling sequence defining an order for the bundles and a number of TTIs for each bundle. Based on the control signaling, the UE may determine a reference signal bundling pattern for receiving the DMRSs and the associated data channels, where the reference signal bundling pattern may indicate the bundling sequence. The UE may accordingly receive the DMRSs and the associated data channels and perform channel estimation on the data channels. |
| US11310022B2 |
Demodulation reference signal bundling
Various aspects of the present disclosure generally relate to wireless communication. In some aspects, a receiver may receive an indication that a plurality of time-domain resources are associated for purposes of demodulation reference signal (DMRS) bundling of a physical channel. The receiver may determine, based at least in part on receiving the indication, a first DMRS pattern for a first subset of time-domain resources of the plurality of time-domain resources of the physical channel, and a second DMRS pattern for a second subset of time-domain resources of the plurality of time-domain resources of the physical channel, the first DMRS pattern and the second DMRS pattern being different DMRS patterns. Numerous other aspects are provided. |
| US11310019B2 |
Method and device for transmitting uplink demodulation reference signal
A method for transmitting uplink demodulation reference signal (DMRS) includes: receiving, by a terminal device, first DMRS configuration information sent by a network device, the first DMRS configuration information indicating a type of a DMRS sequence; receiving, by the terminal device, second DMRS configuration information sent by the network device, the second DMRS configuration information indicating at least one configuration parameter of: an antenna port configuration of DMRS, a physical resource configuration of DMRS, or a sequence configuration of DMRS; determining, by the terminal device, a configuration parameter indicated by the second DMRS configuration information according to the first DMRS configuration information; determining, by the terminal device, a transmission parameter of DMRS according to the configuration parameter indicated by the second DMRS configuration information; and transmitting, by the terminal device, DMRS to the network device according to the transmission parameter. |
| US11310018B2 |
Method for transmitting uplink signal of terminal in wireless communication system and terminal using same method
Provided are a method for transmitting an uplink signal of a terminal in a wireless communication system and a terminal using the same method. The method comprises: receiving activation information that activates or deactivates a specific resource set from among a plurality of resource sets; and performing a grant-less uplink transmission using the resources belonging to the specific resource set when the activation information activates the specific resource set. |
| US11310012B2 |
Method and apparatus for generating reference signal sequence in wireless communication system
A user equipment (UE) for receiving information on a length of a reference signal (RS) sequence and information on an offset of the RS sequence and performing an RS sequence mapping to map the RS sequence to a physical resource block 0 (PRB0) of the UE within a bandwidth part (BWP) based on the length of the RS sequence and the offset of the RS sequence. The UE also transmits, to the network, the RS sequence. |
| US11310010B2 |
Hybrid-SRS combination signaling
Some embodiments include a method in a wireless device capable of uplink transmission in a wireless communication network. The wireless device comprises a plurality of antenna ports. The method comprises determining one or more subsets of the plurality of antenna ports. Each subset of antenna ports comprises antenna ports that can be coherently combined to form a precoding of a transmission layer for transmitting from the subset of antenna ports. The method further comprises communicating an indication of the one or more subsets to a network node, and receiving, from the network node, an instruction of a precoding to use for an uplink transmission. The instruction is based on the indicated one or more subsets. The method further comprises precoding an uplink transmission based on the received instruction, and transmitting the transmission to the network node. |
| US11310008B2 |
Data transmission with multiple numerologies for multiple devices with common geographical location dependent control information
A base station transmits a transmission signal to a first device and a second device where the transmission signal includes time-frequency resources using different numerologies and conveys first data to the first device and second data to the second device and common geographic location dependent control information to both devices. The transmission comprises a first set of time-frequency resources having a first numerology and a second set of time-frequency resources having a second numerology. The first data is transmitted over the first set of time-frequency resources and the common geographic location dependent control information is transmitted over the second set of time-frequency resources. |
| US11310002B2 |
Interference mitigation for sensor panel
An electronic device is described which has a sensor panel comprising a plurality of receive electrodes configured to measure signals received from one or more transmit electrodes. The device has a sensor panel control module configured to: receive signals from the plurality of receive electrodes in the presence of at least one tone interferer. The module is configured to convert the received signals from a time domain into a frequency domain; and to process the received signals in the frequency domain in order to mitigate the effect of the tone interferer. |
| US11309997B2 |
Generation of polar codes with a variable block length utilizing puncturing
Polar codes may be generated with a variable block length utilizing puncturing. Some puncturing schemes consider punctured bits as unknown bits, and set the log likelihood ratio (LLR) for those bits to zero; while other puncturing schemes consider punctured bits as known bits, and set the LLR for those bits to infinity. Each of these puncturing schemes has been observed to provide benefits over the other under different circumstances, especially corresponding to different coding rates or different signal to noise ratio (SNR). According to aspects of the present disclosure, both puncturing schemes are compared, and the puncturing scheme resulting in the better performance is utilized for transmission. |
| US11309996B2 |
Low-latency, low-overhead data framing method for capacity-limited delay-sensitive long distance communication
A communication method is configured to increase speed of messages reception over a bandwidth limited channel such as high frequency (HF) radio. User data arriving from a high-speed network is transformed into a format suitable for transmission over the radio channel. Message packets that will take longer to reach a destination via the radio channel as compared to alternative channels, such as a fiber optic network, are rejected for radio transmission. When the packet is received, the receiver deduces message length by using information from various error handling techniques, such as forward error correction (FEC) and cyclic redundancy check (CRC) techniques. Fill data is transmitted between message packets when no data is available. The FEC and CRC information for the fill data is modified so that the fill data will fail FEC and CRC checks at the receiving station. |
| US11309994B2 |
Highly parallel and scalable cyclic redundancy check
Techniques for calculation of CRC values for very large Ethernet packets in a quick manner are disclosed. Portions of CRC values are calculated each frame and are combined to arrive at a final CRC value for the frame. The CRC values for each frame are also combined to arrive at the final value for the packet. The use of the zero-wheeling function allows for each CRC value calculation to be a calculation of a limited set of data (e.g., one chunk of a frame), which allows such calculations to be completed quickly. |
| US11309992B2 |
Using lattice reduction for reduced decoder complexity
Methods, systems, and devices for wireless communications are described. Some wireless communications systems may utilize beamforming techniques to process wireless communications transmitted in millimeter wave (mmW) frequency ranges. In such cases, a user equipment (UE) may perform lattice reduction (LR)-based preprocessing for a received resource element (RE), which allows the UE to utilize demapping techniques (e.g., minimum mean square error (MMSE)-based demapping techniques or successive interference cancellation (SIC) demapping techniques) that are less computationally-complex than conventional demapping techniques (e.g., maximum likelihood (ML)-based demapping techniques) while providing a similar performance as conventional techniques. Further, due to mmW systems' robustness to time-dispersion, the UE may apply the same LR to multiple REs across multiple symbols in the time domain and across multiple sub-carriers in the frequency domain. The computational cost of performing the LR calculation may be spread across multiple REs and further increase the efficiency of utilizing low-complexity demapping techniques. |
| US11309985B2 |
Light source device that includes a plurality of light sources with different wavelengths and method of controlling wavelengths
A light source device includes: a plurality of light sources that generate rays of light with different wavelengths corresponding to a plurality of target wavelengths located on a designated wavelength grid; a plurality of photodetectors that detect output powers of the plurality of light sources; a plurality of optical bandpass filters that are provided between the plurality of light sources and the plurality of photodetectors; a temperature adjustment unit that adjusts a temperature of an area around the plurality of light sources; and a processor that controls the temperature adjustment unit based on output signals of the plurality of photodetectors. Widths of passbands of the optical bandpass filters are less than a wavelength spacing in the wavelength grid. |
| US11309984B2 |
TCM control for physical layer on OTU ports
Systems and methods for Tandem Connection Monitor (TCM) control for the physical layer on Optical Transport Unit (OTU) ports provide the ability of the TCM status to directly control client laser state (on/off) so that protection engines and coordination between modules is not required. The systems and methods include receiving a specific defect such as a Tandem Connection Monitor (TCM) defect or a Server Signal Fail (SSF) defect from interface circuitry; propagating the TCM defect or the SSF defect from the interface circuitry to an interface associated with a modem including a physical port connected to a network; and selectively disabling a laser in the modem based on the specific defect, e.g., the TCM defect or the SSF defect from the interface circuitry. |
| US11309980B2 |
System for synthesizing signal of user equipment and method thereof
A system for synthesizing signal of user equipment and a method thereof are provided. The system includes a physical channel modeler and a physical channel training module. The physical channel modeler receives geo information of a field under test of and a sparse real physical field channel feature to build a physical channel model. The physical channel modeler estimates a plurality of predefined positions of the geo information to obtain a plurality of simulated physical field channel features corresponding to the predefined positions. The physical channel training module receives and performs training on the geo information, the sparse real physical field channel feature and the simulated physical field channel features by using an AI algorithm to perform an inference of a fully real physical field channel feature. |
| US11309975B2 |
Fiber-optically powered antenna
An optically powered Global Navigation Satellite System (GNSS) antenna may use a fiber-optic link to receive optical power and transmit an optical signal that contains a common time signal from one or more satellites, which may allow long-distance power and signal transmission with high efficiency and reliability. The common time signal may be used to synchronize intelligent electronic devices (IEDs) of an electric power delivery system. |
| US11309968B2 |
Optical transmission device and optical transmission method
Optical transmission device is provided in one of a plurality of nodes in an optical network. Different carrier frequencies are respectively allocated to the plurality of nodes. The optical transmission device includes: transmitter, splitter and receiver. The transmitter generates a first subcarrier optical signal with a first subcarrier established on a low-frequency side of a first carrier frequency and a second subcarrier optical signal with a second subcarrier established on a high-frequency side of the first carrier frequency. The splitter splits an optical signal including the first subcarrier optical signal and the second subcarrier optical signal. The output of the splitter is guided to first and second adjacent nodes. The receiver recovers data carried by the first subcarrier and data carried by the second subcarrier from received optical signal. A difference between carrier frequencies of adjacent nodes corresponds to a bandwidth of the subcarrier. |
| US11309966B2 |
Latency control in a passive optical network
A method and apparatus for latency control in an optical network. A management node such as an OLT in a PON sends a discovery message intending to prompt joining network nodes such as ONUs to send a response on a first wavelength during a quiet window established for this purpose. When a response is received, a secondary upstream-transmission wavelength is assigned to the ONU. When the ONU sends data upstream according to a schedule calculated by the ONT, which schedule may include transmission times using the assigned secondary wavelength. In this case, the assigned secondary wavelength will be scheduled using a relatively smaller or no quiet window. This scheduling may be determined in part by the service or services used by the ONU. |
| US11309961B2 |
Commissioning a luminaire with location information
Techniques are disclosed for programming a luminaire with location information, referred to herein as commissioning. Location information may include relative location information (e.g., the position of the luminaire relative to a reference point) and/or absolute location information (e.g., global coordinates for the luminaire). A commissioned luminaire can be configured to emit its location information via light-based communication (LCom). In some cases, the luminaire can be commissioned manually, by hard coding the luminaire with its location either at the luminaire itself or using a device (e.g., a smartphone, tablet, or a dedicated luminaire commissioning device) to program the luminaire with location information. In some cases, the luminaire can be commissioned automatically. In some cases, the luminaire may be configured to provide visual, aural, or tactile feedback to indicate that the luminaire has not received location data or that the luminaire has been moved. |
| US11309952B2 |
Beamforming transmission device and method
A beamforming transmission device includes a baseband processing unit, at least one radio frequency unit, and an antenna array unit. The baseband processing unit provides at least one data stream and generates a control signal according to channel state information of at least two pieces of user equipment, wherein the data stream includes data of at least two pieces of user equipment. The radio frequency unit receives the data stream signal and generates at least one radio frequency signal. The antenna array unit receives the radio frequency signal and the control signal and adjusts gains and phases of the antenna array unit according to the control signal such that the radio frequency signal can be formed as a shared beamforming signal for transmitting to at least two pieces of user equipment, wherein the shared beamforming signal includes the data of at least two pieces of user equipment. |
| US11309950B2 |
Data transmission method and apparatus
A data transmission method and an apparatus are disclosed. The method includes: generating, by a first transmit device, a data frame sequence, where the first data frame sequence includes a first data frame, the first data frame includes a switching interval, the switching interval includes first identification information, and the first data frame corresponds to a first data period; detecting, by the first transmit device, whether a beam adjustment request is received within the first data period, and if the beam adjustment request is received, setting the first identification information in the switching interval of the first data frame to invalid; or if no beam adjustment request is received, setting the first identification information to valid; and sending, by the first transmit device, the first data frame. |
| US11309948B1 |
Detecting a presence of a person using a preamble and an echo associated with the preamble
Various aspects of the present disclosure generally relate to wireless communication. In some aspects, a user equipment (UE) may transmit a preamble in a direction using beamforming. The UE may receive an echo based at least in part on the preamble transmitted in the direction. The UE may detect a presence of a person based at least in part on a power level associated with the echo satisfying a threshold. Numerous other aspects are described. |
| US11309947B2 |
Systems and methods for maintaining directional wireless links of motile devices
The disclosed computer-implemented method may include (1) establishing a directional wireless link between a first computing device and a second computing device in a first direction, (2) exchanging, over the directional wireless link in the first direction, first data between the first computing device and the second computing device, (3) determining, via a sensor of the first computing device, a change to a position or an orientation of the first computing device, (4) redirecting, based on the change, the directional wireless link to a second direction, and (5) exchanging, over the directional wireless link in the second direction, second data between the first computing device and the second computing device. Various other methods and systems are also disclosed. |
| US11309946B2 |
Wireless communication system with switch combining and simplex operation modes
Disclosed herein are various examples of architectures, circuits, devices and methods that provide wireless communication systems that can switch between switch combining and simplex operating modes. The switch combining modes utilize switching to dynamically route transmit and receive signals from a first antenna while the simplex operating modes route transmit signals to the first antenna and route receive signals from a second antenna. A controller is configured to control a duplexer to switch between the switch combining and the simplex operating modes. |
| US11309944B2 |
Method and device for assigning transmission power
A method and device for allocating transmission powers, wherein the method and the device are applied to a base station. The method includes: acquiring channel data of terminals that are connected to the base station; according to the channel data of the terminals, from the terminals, virtually pre-dispatching first terminals of a first preset quantity; performing interference suppression to the first terminals, to obtain beamforming-weight-amplitude factors of the first terminals; dispatching second terminals of a second preset quantity from the first terminals, and, from the beamforming-weight-amplitude factors of the first terminals, screening out beamforming-weight-amplitude factors of the second terminals; and according to the beamforming-weight-amplitude factors of the second terminals, allocating transmission powers to the second terminals. The embodiments of the present application ensure that the frequency-deviation efficiency that is reported to the MAC layer of the base station has a smaller difference from that of the actual dispatching. |
| US11309937B2 |
Electronic decoupling impedance
An active decoupling device for stabilizing the impedance on an electric line in a determined band of frequency. The decoupling device of the invention is inductively coupled to the power line and comprises a transformer with a primary winding connectable to the power line, and a secondary winding closed on a burden network. In an application, the invention, is used to decouple a smart meter from variations of the load impedance. |
| US11309930B2 |
Method for controlling antenna characteristics and an electronic device thereof
To control antenna characteristics in an electronic device, a method for operating the electronic device may include identifying communication states related to a first radio access technology (RAT) and a second RAT, determining a mode of a tuner which controls characteristics of an antenna for the second RAT, based on the communication states, and controlling the tuner according to the mode. |
| US11309929B2 |
Output power adjustments based on sensors
An example electronic device includes a wireless communication component and a controller. The controller is to set an output power of the wireless communication component based on: whether a first external object is in proximity to a first side of the electronic device; whether the electronic device is stationary; and whether a second external object is in proximity to a second side of the electronic device, where the second side is opposite to the first side. |
| US11309928B2 |
Receiver and channel estimation method
A receiver includes an equalizer circuit, a radio frequency interference cancellation circuitry, and a channel estimation circuitry. The equalizer circuit is configured to process a first data signal according to a control signal, in order to generate a second data signal. The radio frequency interference cancellation circuitry is configured to detect a radio frequency interference signal according to the second data signal to generate radio frequency interference information, and to output a correction signal according to the radio frequency interference information, in order to correct the second data signal. The channel estimation circuitry configured to analyze a plurality of sets of signal components in the second data signal, and to utilize a power ratio of one of the plurality of sets of signal components to generate the control signal. |
| US11309924B1 |
Methods and apparatuses for mitigating an impact of settling times of components in matching networks
Aspects of the subject disclosure may include, for example, changing a tuning value of a tunable component coupled to an antenna from a first tuning value to a second tuning value during a first stage, and changing the tuning value of the tunable component from the second tuning value to a third tuning value during a second stage that occurs subsequent to the first stage, wherein during each of the first stage and the second stage the antenna is not utilized by a transmitter for communication purposes, wherein the first stage and the second stage are separated from one another by a first active region, and wherein during the first active region the transmitter causes a first signal to be transmitted from the antenna for communication purposes. Other embodiments are disclosed. |
| US11309923B2 |
Method using signal component of multiplied frequency and electronic device therefor
An electronic device is provided. The electronic device includes an antenna, a transmission path electrically connected to the antenna and including at least one amplifier, a transceiver connected to the transmission path and converting a signal, a feedback path connected between the transmission path and the transceiver, at least one processor connected to the transceiver and communicating with at least one external electronic device by using the transceiver, and a memory connected to the at least one processor. The processor may obtain first information about a first phase and a first magnitude, which are associated with the first frequency, and second information about a second phase and a second magnitude, which are associated with a multiplied frequency of the first frequency, from the transmission signal and the reflection signal using the transceiver, and may determine a state of the electronic device based on the first information and the second information. |
| US11309921B2 |
Interference level map of radio frequency signals
A system and method for generating a temporal map of radio frequency (RF) signals detected from a vehicle. The method includes: detecting a plurality of RF signals over a predetermined spectrum of frequencies at a first longitude, a first latitude and a first altitude; analyzing the plurality of RF signals to determine at least a first parameter associated with at least a first RF signal of the plurality of RF signals; and adding to the temporal map the first RF signal frequency, the at least a first parameter associated with the first RF signal, the first longitude, the first latitude and the first altitude. |
| US11309919B2 |
Apparatuses and methods for pipelining memory operations with error correction coding
Apparatuses and methods for pipelining memory operations with error correction coding are disclosed. A method for pipelining consecutive write mask operations is disclosed wherein a second read operation of a second write mask operation occurs during error correction code calculation of a first write mask operation. The method may further including writing data from the first write mask operation during the error correction code calculation of the second write mask operation. A method for pipelining consecutive operations is disclosed where a first read operation may be cancelled if the first operation is not a write mask operation. An apparatus including a memory having separate global read and write input-output lines is disclosed. |
| US11309916B2 |
Error correction circuit and memory controller having the same
Disclosed are devices, systems and methods for error correction encoding and decoding. A memory controller includes an error correction encoder for generating a codeword by performing error correction encoding, using a parity check matrix including a plurality of sub-matrices; and an error correction decoder for performing error correction decoding on a read vector corresponding to the codeword on a column layer basis while sequentially selecting column layers of the parity check matrix used for the error correction encoding, in the error correction decoding, the column layer including a set of columns of the parity check matrix. Rows included in the parity check matrix are grouped into a plurality of row groups, and at most one cyclic permutation matrix (CPM) is included for each column layer in each of the row groups. |
| US11309914B2 |
Transmitting apparatus and mapping method thereof
A transmitting apparatus is disclosed. The transmitting apparatus includes an encoder to perform channel encoding with respect to bits and generate a codeword, an interleaver to interleave the codeword, and a modulator to map the interleaved codeword onto a non-uniform constellation according to a modulation scheme, and the constellation may include constellation points defined based on various tables according to the modulation scheme. |
| US11309912B2 |
Reducing error in data compression
Systems and methods are provided for reducing error in data compression and decompression when data is transmitted over low bandwidth communication links, such as satellite links. Embodiments of the present disclosure provide systems and methods for variable block size compression for gridded data, efficiently storing null values in gridded data, and eliminating growth of error in compressed time series data. |
| US11309906B2 |
Method, field device and cloud infrastructure for data acquisition
A sensor data are compressed on field devices using a representation is provided. The field device immediately decompresses the compressed data in order to detect a deviation. If there is a deviation, then a cloud storage receives the sensor data as raw uncompressed data. A cloud component receives a trigger signal from the field device, indicating that the representation used by the field device for compression does not sufficiently describe the sensor data. The cloud component then learns a new representation by retrieving and analyzing all data stored in the cloud storage. The method and field device provide robust, compression-based data acquisition. They improve quality and precision of the data captured by the field devices. As the representation in the field device can be updated, it becomes possible to accommodate changes in the device setup. The cloud infrastructure provides automatic learning of the representation in the cloud. |
| US11309903B1 |
Sampling network with dynamic voltage detector for delay output
A dynamic voltage-to-delay device may have voltage lines for receiving input signals during reset phases, and a current source, connected to the first and second voltage lines, for increasing voltages on the voltage lines during active phases. The voltage-to-delay device may also have comparators, connected to the voltage lines, for generating first and second output signals during the active phases when the voltages on the voltage lines reach a threshold voltage, such that a delay between the output signals is representative of a difference between voltages of the input signals. The voltage-to-delay device may have at least two current sources. The comparators may have a tail node to which a voltage is applied during a reset phase, and a current source for reducing the voltage at the tail node, and thereby reducing a threshold voltage during an active phase. |
| US11309902B2 |
Gain and memory error estimation in a pipeline analog to digital converter
In described examples, a stochastic comparator includes a first comparator that compares an input signal and a primary threshold to generate a first signal. A second comparator compares the input signal and the primary threshold to generate a second signal. A decision block generates a control signal in response to the first signal, the second signal and a PRBS (pseudo random binary sequence) signal. A XOR gate generates a detection signal in response the first signal and the second signal. |
| US11309899B2 |
Time-to-digital conversion circuit and method of the same
The application discloses a time-to-digital conversion circuit (100) including a first oscillator (110), a second oscillator (120), a first counting circuit (130), a second counting circuit (140), a first conversion circuit (150) and a processing circuit (160). The first oscillator is activated by a first signal and includes oscillating units having a first delay amount, wherein the first counting circuit is configured to count a number of times that the first tail end output signal of the first oscillator changes and store the same as a first counting result; the second counting circuit counts a number of oscillating units with an output change, other than the first tail end oscillating unit and stores the same as a second counting result; the first conversion circuit generates a first conversion signal according to the first counting result and the second counting result; the processing circuit generates the output signal at least according to the first conversion signal. |
| US11309897B2 |
Lightning strike counter and lightning strike counting method
A lightning strike counter and a lightning strike counting method are disclosed. The lightning strike counter includes a lightning strike input circuit, a bipolar waveform generating circuit, and a counting circuit. The lightning strike input circuit receives a lightning strike signal from a first lightning strike input end and a second lightning strike input end. The bipolar waveform generating circuit outputs a bipolar waveform signal from a bipolar waveform output end to the counting circuit in response to the lightning strike input circuit receiving the lightning strike signal. The counting circuit outputs a counting output signal from a counting output end in response to receiving the bipolar waveform signal from a counting input end. |
| US11309891B2 |
Level shifting circuit
The present application is directed to a level shifting circuit. In one form, a level shifting circuit includes a first inverter, a level shifting unit, and a fast driving unit. The first inverter is configured to invert an input signal received at an input node and to output an inverted input signal to a second input node. The level shifting unit is configured to perform amplitude up-shifting processing on a received input signal. The fast driving unit is configured to pull up an output signal of an output node of the level shifting unit by increasing a discharge current of the level shifting unit when receiving the input signal. |
| US11309890B1 |
Pre-emphasis circuit, method and display device
The present disclosure provides a pre-emphasis circuit, method and display device, and belongs to a field of display driving. The pre-emphasis circuit according to the disclosure can determine whether to output a pre-emphasis voltage corresponding to grayscale of current input data via an input terminal of an amplifier according to data input to a data terminal by adding an amplifier input pre-emphasis module. Rapid conversion of output voltage can be realized without increasing the quiescent current of the amplifier, while the stability of temperature of the IC is ensured. |
| US11309884B1 |
Switching circuits having drain connected ferrite beads
A circuit includes an electronic component package that comprises a first lead, a second lead, and a third lead; and a III-N transistor encased in the electronic component package, the III-N transistor including a drain, a gate, and a source, where the source is coupled to the first lead, the gate is coupled to the second lead, and the drain is coupled to the third lead. The circuit includes a high voltage node and a resistor, the resistor having a first terminal coupled to the high voltage node and a second terminal coupled to the third lead. The circuit further includes a ferrite bead connected in parallel to the resistor and coupled between the third lead and the high voltage node. When switching, the deleterious effects of a parasitic inductance of the circuit's power loop are mitigated by the ferrite bead and the resistor. |
| US11309882B2 |
OPAMP overload power limit circuit, system, and a method thereof
An amplifier overload power limit circuit, system, and a method thereof comprising a monitoring of a current gain of a BJT based on a current detector and limiting power to the BJT based on the monitored current gain to prevent the BJT from driven into a saturation mode and the amplifier overdrive. |
| US11309876B2 |
Digitally programmable analog duty-cycle correction circuit
Various aspects provide for a digitally programmable analog duty-cycle correction circuit. For example, a system includes a duty-cycle correction circuit and a duty-cycle distortion detector circuit. The duty-cycle correction circuit adjusts a clock associated with the transmitter. The duty-cycle distortion detector circuit facilitates digital control of a duty-cycle of the clock associated with the duty-cycle correction circuit based on duty-cycle distortion error associated with output of the transmitter. |
| US11309872B2 |
Oscillator apparatus and oscillation method
The present technology relates to an oscillation apparatus and an oscillation method allowing a variation in a frequency of a clock signal to fall within a predetermined range without using a reference clock signal. An oscillation apparatus includes an oscillation section oscillating a clock signal, an adjustment section changing a parameter of a constituent element constituting the oscillation section to thereby adjust a frequency of the clock signal, and a calibration control section controlling the adjustment section to perform frequency calibration of the oscillation section in a case in which a variation in a frequency of the clock signal oscillated by the oscillation section falls within a second range exceeding a first range permitted in an application of the clock signal. |
| US11309871B2 |
Narrow pulse generation circuit used in sequential equivalent sampling system
A narrow pulse generation circuit used in a sequential equivalent sampling system. The circuit comprises a crystal oscillator, an edge sharpening circuit, an avalanche transistor single-tube amplifying circuit and a shaping network connected in sequence, wherein the edge sharpening circuit is used for carrying out edge sharpening on a square wave signal generated by the crystal oscillator; the avalanche transistor single-tube amplifying circuit is used for carrying out avalanche amplification on the sharpened square wave signal to generate a Gaussian pulse signal to adjust the amplitude of a pulse; and the RC shaping network is used for shaping the Gaussian pulse signal to adjust the pulse width at the bottom of the pulse to form a narrow pulse signal. The narrow pulse circuit has a simple structure and narrow pulse width at the bottom and facilitates increasing a signal-to-noise ratio of a whole sequential sampling system. |
| US11309869B1 |
Oscillating signal generator and filter circuit
A filtering circuit includes a filter, a frequency divider, and a control circuit. The filter is configured to generate a first oscillating signal according to a control signal in a first mode, and perform a filtering process according to the control signal in a second mode. A frequency of the first oscillating signal is determined according to the control signal. The frequency divider is coupled to the filter and configured to divide the frequency of the first oscillating signal to generate a frequency-divided signal. The control circuit is coupled to the filter and the frequency divider, and configured to compare a frequency of the frequency-divided signal and a frequency of a second oscillating signal so as to adjust the control signal in the first mode. A center frequency of a passband of the filter in the second mode is determined according to the adjusted control signal. |
| US11309866B2 |
Acoustic wave device and method for manufacturing acoustic wave device
An acoustic wave device includes a first acoustic impedance layer and a second acoustic impedance layer, an IDT electrode, and an electrode. At least a portion of the IDT electrode overlaps the first acoustic impedance layer. At least a portion of the electrode overlaps the second acoustic impedance layer. In each of the first acoustic impedance layer and the second acoustic impedance layer, at least one of a high acoustic impedance layer and a low acoustic impedance layer is a conductive layer. A capacitor is formed by using the conductive layer of the second acoustic impedance layer and the electrode. The conductive layer in the first acoustic impedance layer is electrically insulated from the conductive layer in the second acoustic impedance layer. |
| US11309863B2 |
Multi-function frequency control device
A single frequency control device incorporating a high frequency resonator, a low frequency resonator and a temperature sensing element, the latter thermally coupled closely to the said resonators to facilitate temperature sensing with higher resolution and accuracy. Additional benefits offered by the structure include smaller size and lower cost. |
| US11309861B2 |
Guided surface acoustic wave device providing spurious mode rejection
Embodiments of a Surface Acoustic Wave (SAW) device having a guided SAW structure that provides spurious mode suppression and methods of fabrication thereof are disclosed. In some embodiments, a SAW device includes a non-semiconductor support substrate, a piezoelectric layer on a surface of the non-semiconductor support substrate, and at least one interdigitated transducer on a surface of the piezoelectric layer opposite the non-semiconductor support substrate. A thickness of the piezoelectric layer, a SAW velocity of the piezoelectric layer, and an acoustic velocity of the non-semiconductor support substrate are such that a frequency of spurious modes above a resonance frequency of the SAW device is above a bulk wave cut-off frequency of the SAW device. In this manner, the spurious modes above the resonance frequency of the SAW device are suppressed. |
| US11309860B1 |
Single ladder duplexer with impedance gradient
Embodiments presented herein relate to isolating a receiver circuit of an electronic device from a transmission signal and from a noise signal at a frequency range of a received signal. To do so, an isolation circuit is disposed between the receiver circuit and a transmission circuit. The isolation circuit may include multiple variable impedance devices and one or more antennas. The impedances of the variable impedance devices and the one or more antennas may be balanced such that the receiver circuit is effectively removed from the transceiver circuitry and isolated from the transmission signal. The impedance of the variable impedance devices and the one or more antennas may also be configured to isolate the receiver circuit from a noise signal generated at the transmission circuit having a frequency in the range of the receive signal. |
| US11309857B2 |
Audio playback device and method
A device is provided that includes a plurality of signal processing paths coupled in parallel, an adding circuit and an amplifier circuit. The number of the signal processing paths is N and each of the signal processing paths receives a same input signal to generate an output analog signal after a signal processing is performed, wherein each of the signal processing paths at least includes a DAC circuit and the signal processing at least includes a digital to analog conversion corresponding to the DAC circuit. The adding circuit adds the output analog signal generated from each of the signal processing paths to generate a total output analog signal. The amplifier circuit receives the total output analog signal to adjust a signal intensity of the total output analog signal according to a gain to generate an output audio signal, wherein the gain is 1/N. |
| US11309855B2 |
Charge amplifier circuit for high-temperature piezoelectric transducers
A circuit has an input and a two-wire output. The circuit is designed for use with HTPE transducers and comprised of four stages. The first stage is a charge amplifier based on operational amplifier, the second stage is a 1-pole passive low-pass filter, the third stage is an active 2-pole low-pass filter based on two JFETs, and the fourth stage is an emitter follower comprising two bipolar junction transistors connected to each other in Darlington configuration. |
| US11309854B1 |
Digitally controlled grounded capacitance multiplier
A digitally controlled grounded capacitance multiplier circuit system and method is disclosed. The capacitance multiplier (CM) circuit comprises an op-amp, a digitally controlled current amplifier and two resistors in addition to a reference capacitor. The CM circuit is designed using complementary metal-oxide-semiconductor (CMOS) technology. The value of the equivalent capacitance can be adjusted through digitally programming the gain of the current amplifier. The CM circuit provides a significant multiplication factor while using two active devices. |
| US11309848B2 |
Class D transconductance amplifier
An amplifier circuit includes: a Schmidt trigger having an input electrically coupled to an input of the amplifier circuit, a switching network electrically coupled to an output of the Schmidt trigger, an inductor electrically coupled to the switching network, a first resistor electrically coupled to the inductor, a capacitor electrically coupled to the first resistor, a first feedback circuit that provides a first feedback signal to the input of the Schmidt trigger based on a voltage at a first node electrically coupled to the first resistor and to the capacitor, a second resistor electrically coupled to the output of the amplifier circuit, a third resistor electrically coupled to the second resistor, and a second feedback circuit that provides a second feedback signal to the input of the Schmidt trigger based on a voltage at a second node electrically coupled to the second resistor and to the third resistor. |
| US11309847B2 |
Amplifier circuit
An amplifier circuit has an amplification path including an amplifier and a bypass path configured to bypass at least the amplifier. The bypass path includes a switch coupled in series on the bypass path and another switch coupled in series between the bypass path and ground. The amplification path further includes an inductor coupled on an output side with respect to the amplifier and a switch coupled between the inductor and ground on a path between the inductor and the amplifier. |
| US11309843B2 |
Input receiver
An input receiver includes a first current source circuit, a second current source circuit, a first rail-to-rail amplifier circuit, a first inverter circuit, and a second inverter circuit. The first current source circuit adjusts an operating current flowing through a first node according to a first bias signal. The second current source circuit adjusts a ground current flowing through a second node according to a second bias signal. The first rail-to-rail amplifier circuit and the first inverter circuit are connected in parallel between the first node and the second node. The first rail-to-rail amplifier circuit receives an input signal and compares the input signal with a reference voltage and accordingly outputs an amplified signal. The second inverter circuit is coupled between an operating voltage and a ground voltage. The second inverter circuit generates an output signal according to an inverted signal outputted by the first inverter circuit. |
| US11309838B2 |
Self-oscillating spread spectrum frequency control loop
A self-oscillating spread spectrum frequency control loop contains a gated voltage-controlled oscillator (VCO) which receives a digital signal that can start or stop its oscillation. The VCO generates a spread spectrum carrier by receiving a triangle wave signal from a delaying ramp generator in a loop, its ramp direction controlled by a frequency comparator. The loop generates a spectrum spread as wide as possible above a minimum frequency. RF isolators that utilize low-pass filters in the transmitter and high-pass filters in the receiver, where the F-3 dB cutoff frequencies of both filters vary in a correlated manner, are used to not produce spread spectrum frequencies below the minimum frequency. Die from a given wafer lot, when designed such that the low- and high-pass cutoff frequencies track, can be used to form RF digital isolators whose minimum spread spectrum frequency does not go below the minimum frequency required by that wafer lot. |
| US11309837B2 |
Resonant filter using mm wave cavity
Systems and methods for forming a mm wave resonant filter include a lithographically fabricated high Q resonant structure. The resonant structure may include a plurality of cavities, each cavity having a characteristic frequency that defines its passband. A filter may include a plurality of resonant structures, and each resonant structure may include a plurality of cavities. These cavities and filters may be fabricated lithographically. |
| US11309836B1 |
Differential crystal oscillator with large voltage swing
A differential crystal oscillator includes a source follower configured to receive an oscillatory signal and output a regenerated signal; a resonant network having a crystal and configured to terminate the oscillatory signal and determine an oscillation frequency of the oscillatory signal; a regenerative network configured to regenerate the regenerated signal; and a capacitive feedback network configured to provide a feedback from the regenerated signal to the oscillatory signal. |
| US11309835B2 |
Crystal oscillator and phase noise reduction method thereof
A crystal oscillator and a phase noise reduction method thereof are provided. The crystal oscillator may include a crystal oscillator core circuit, a first bias circuit and a phase noise reduction circuit, the first bias circuit is coupled to an output terminal of the crystal oscillator core circuit, and the phase noise reduction circuit is coupled to the output terminal of the crystal oscillator core circuit. In operations of the crystal oscillator, the crystal oscillator core circuit is configured to generate a sinusoidal wave. The first bias circuit is configured to provide a first voltage level to be a bias voltage of the sinusoidal wave. The phase noise reduction circuit is configured to reset the bias voltage of the sinusoidal wave in response to a voltage level of the sinusoidal wave exceeding a specific voltage range. |
| US11309833B2 |
LC oscillator capable of temperature compensation
An LC oscillator capable of temperature compensation includes a differential voltage supplier providing a positive differential voltage to a positive node and a negative differential voltage to a negative node and a differential oscillation frequency signal output unit outputting a positive oscillation frequency signal using the positive differential voltage provided to the positive node by the differential voltage supplier and a negative oscillation frequency signal using the negative differential voltage provided to the negative node by the differential voltage supplier. |
| US11309832B2 |
Distributed power harvesting systems using DC power sources
A photovoltaic panel with multiple photovoltaic sub-strings including serially-connected photovoltaic cells and having direct current (DC) outputs adapted for interconnection in parallel into a parallel-connected DC power source. A direct current (DC) power converter including input terminals and output terminals is adapted for coupling to the parallel-connected DC power source and for converting an input power received at the input terminals to an output power at the output terminals. The direct current (DC) power converter optionally has a control loop configured to set the input power received at the input terminals according to a previously determined criterion. The control loop may be adapted to receive a feedback signal from the input terminals for maximizing the input power. A bypass diode is typically connected in shunt across the input terminals of the converter. The bypass diode functions by passing current during a failure of any of the sub-strings and/or a partial shading of the sub-strings. The bypass diode may be a single bypass diode connected across the parallel-connected DC power source. The DC power converter may convert the input power at high current to the output power at a lower current. The output terminals may be connectible with wire cables to a load, and the DC power converter is configured to reduce energy loss through the wire cables to the load. |
| US11309824B2 |
Motor device
A gear motor (motor device) comprising a three-phase motor and a terminal box housing a power supply connection terminal for connecting the three phase motor to an alternating current power supply, comprises: a power detection circuit that detects power to be supplied to the three-phase motor; a control unit that executes predetermined control if a load abnormality related to the three-phase motor or a driven device is detected based on power detected by the power detection circuit. The power detection circuit and the control unit are housed in the terminal box. |
| US11309823B2 |
Three phase motor control with variable RPM and variable synchronized PWM
The three phase motor control with variable RPM and variable synchronized PWM is a new concept or method to drive a DC/AC invertor is a triggering pulse revolving circuit having a variable speed of revolving output triggering pulses to rotate commutating and duty cycling circuits to enable/disable power mosfets and to rotate current directions in three phase induction motor stator coils. The RPM control and PWM control are simplified using this method. All interconnections between circuits are conventional, not traditional. |
| US11309821B2 |
Brushless DC motor control device for ceiling fan
A brushless DC motor control device for a ceiling fan is electrically connected to a brushless DC motor and includes at least one switch, a processor, and a driving module. The processor includes at least one detection module and a processing module. The switch transmits a switch signal to the detection module for detection. After the detection module detects an operating electric potential and a normal electric potential of the switch signal, the detection module outputs a detection signal to the processing module. The processing module outputs a control signal to the driving module, so that the driving module transmits a driving signal to the brushless DC motor to control the rotational speed, stop and rotational direction of the brushless DC motor. |
| US11309819B2 |
Initial rotor position detection in a brushless DC motor
A method of operating a Brushless Direct Current Motor (BLDCM), the BLDCM of the type including: a series of concentric independently activated electromagnetic phase coils interacting with a series of permanent magnets to provide relative movement therebetween, the phase coils having temporal periods of activation time and deactivation time, the method including the steps of: (a) activating at least one of the phase coils for a short period of activation; and (b) measuring the voltage response across the phase coil of the deactivated phase coil during the short period of activation to determine the rotor position. |
| US11309818B2 |
Motor variable frequency driving system and multi-split central air conditioner
Disclosed are a motor variable frequency driving system and a multi-split central air conditioner. The motor variable frequency driving system includes: a three-phase alternating-current input, a rectification module, a thin-film capacitor, an inverter, a vector control module, an A/D sampling module and a steady state processing module. The rectification module is connected to the three-phase alternating-current input; the thin-film capacitor is arranged between output ends of a direct current output; an input end of the inverter is connected to an output end of the direct current output; an output end of the inverter is connected to a three-phase alternating current motor; the vector control module is connected to the inverter; the A/D sampling module is used for collecting direct current bus voltages of two ends of the thin-film capacitor; and the steady state processing module is connected to the A/D sampling module. |
| US11309817B2 |
Control device of rotating machine, and control device of electric vehicle
Provided is a control device for a rotating machine including a magnetic pole position estimation unit, a vector calculation unit, a current command correction unit configured to correct a first d-axis current command and a first q-axis current command, to thereby output a second d-axis current command and a second q-axis current command, a voltage application unit configured to superimpose a high-frequency voltage including a specific frequency component on voltage commands on rotational coordinates. The magnetic pole position estimation unit is configured to estimate the position of the magnetic pole based on a state quantity of the specific frequency component. The current command correction unit is configured to correct the current commands so that a current amplitude of electrical angle frequency components is equal to or larger than a half of a current amplitude of the specific frequency component. |
| US11309812B1 |
Motor system
The present invention discloses a motor system without a hall sensing element. The motor system comprises a first output pin, a second output pin, an auxiliary pin, a stator, a rotor, a primary coil, and an auxiliary coil. Both the primary coil and the auxiliary coil surround the stator. The primary coil is coupled to the first output pin and the second output pin. The auxiliary coil is coupled to the auxiliary pin. The auxiliary coil is configured to determine a phase switching time point. The motor system detects the zero point of the voltage of the auxiliary pin, so as to detect the position of the rotor and determine the phase switching time point. |
| US11309807B2 |
Power conversion system and power conversion device
A power conversion device includes: a power converter circuit which converts a direct-current power, output from a decentralized power supply, into an alternating-current power, and outputs the alternating-current power to a power distribution grid; a voltage target value generation unit which removes a high-frequency variation from a root mean square of a voltage detected by a voltage detection unit to generate a voltage target value; a correction unit which corrects the voltage target value when the correction unit detects that the automatic voltage regulator has performed an action; and a command unit which, if the voltage at the point of interconnection detected by the voltage detection unit deviates from a voltage control deadband referenced to the voltage target value, commands the power converter circuit to output a reactive power based on a magnitude of the deviated amount of voltage. |
| US11309806B2 |
Modified pulse-width modulation control zero-voltage-switching power inversion circuits
To disclose several zero-voltage-switching (ZVS) power inversion circuits, a modified pulse-width modulation control scheme is employed. It includes two driver-signal pairs. Each pair has a near 50% duty ratio driver signal and a pulse-width modulation driver signal. Because the combination timing waveform of the two driver signals of each pair resembles to a letter T, the control scheme is thus briefly named as double T (TT) control. In addition to achieving zero-voltage switching performance for high frequency operation, the disclosed power inversion circuits can alleviate the potential shoot-through problem existed in phase-shift control full-bridge power inversion circuits. Consequently, reliability performance can be improved. |
| US11309804B2 |
PoDL powered device with active rectifier bridge and shunting switch
A Power over Data Lines (PoDL) system includes a Powered Device (PD) logic circuit for conveying classification information to Power Sourcing Equipment (PSE), during a classification phase, via a wire pair. The logic circuit controls a shunting switch for selectively shunting the wires together for communication with the PSE during the classification phase. A holdup capacitor supplies power to the logic circuit during the classification phase. The logic circuit controls a full-bridge rectifier to ensure the capacitor is charged with a proper polarity voltage and to ensure a proper polarity voltage is supplied to a PD load. The PD has a controller for controlling the rectifier to cause a current path between terminals of the capacitor, via the shunting switch, when the shunting switch is to be turned on. |
| US11309799B2 |
Power supply device
The present disclosure concerns a device comprising: a voltage converter supplying, from a first DC voltage, a second DC voltage on an output terminal of the converter having a current value determined by a third voltage on a control terminal of the converter; a circuit configured, when a set point value of the second voltage switches from a first to a second set point value smaller than the first value, to generate a ramp signal successively representative of the first value, of a plurality of decreasing intermediate values between the first and second values, and of the second value; and an amplifier supplying a first signal representative of a difference between the ramp signal and a signal representative of the current value of the second voltage, the third voltage being determined by the first signal. |
| US11309793B2 |
Latch-type charge pump
According to various aspects, a latch-type charge pump may include: an input node and an output node; a first charge storage and a second charge storage coupled in parallel to each other, a first switch coupled to the input node and a second switch coupled to the output node, wherein the first charge storage couples the first switch with the second switch; and a control circuit configured to control the first switch based on a state of the second charge storage, and to control the second switch based on a state of the first charge storage. |
| US11309792B2 |
Voltage converter circuit
A voltage converter circuit may include: a first input node; a second input node; a first output node; a second output node; one or more charge pumps that convert a first input voltage supplied to the first input node up to a first output voltage and convert a second input voltage supplied to the second input node down to a second output voltage; and a control circuit to control the one or more charge pumps according to two operational modes. In the first operation mode, the control circuit supplies the first input voltage to the first input node, leaves the second input node floating, and outputs the first output voltage at the first output node. In the second operation mode, the control circuit supplies the second input voltage to the second input node, leaves the first input node floating, and outputs the second output voltage at the second output node. |
| US11309786B2 |
Controller for power inverter
Herein provided is a controller for a current inverter. The controller comprises a reference generator configured for obtaining source voltage and current values from an electrical source, generating a voltage error function based on source and reference voltages, and generating a current error function based on source and reference currents. The controller also comprises an output controller for receiving from the reference generator the voltage and current error functions and configured for producing at least one control signal based on the voltage and current error functions. The controller also comprises a state feedback controller configured for: adjusting the at least one control signal, based on parameters of the electrical source, to produce at least one adjusted control signal, and outputting the at least one adjusted control signal to the current inverter. |
| US11309785B2 |
Control circuit for controlling a power switch and associated control method
A control circuit for controlling a power switch in a SMPS has a signal jittering circuit and a comparing circuit. The signal jittering circuit adds an overlapping signal into a current sensing signal indicative of current flowing through the power switch or into a current threshold signal, wherein the overlapping signal has a first frequency and an enveloping line of the overlapping signal has a second frequency, and wherein the second frequency is lower than the first frequency. The comparing circuit compares the current sensing signal and the current threshold signal, wherein when the current sensing signal is higher than the current threshold signal, the control circuit c turns off the power switch. |
| US11309783B2 |
Electromagnetic propulsion system
An electromagnetic propulsion system comprises a plurality of stator coils wound about a first axis, a plurality of support structures, a coupler that surrounds a portion of the stator coils, and a plurality of rotor coils wound about an axis that is parallel to the first axis. The stator coils are configured to receive electric current to induce a first magnetic field. The support structures support the stator coils. The coupler includes a notch oriented so that one of the support structures can pass through the notch when the coupler moves along the stator coils. The rotor coils are attached to the coupler and are configured to receive electric current to induce a magnetic field that interacts with the first magnetic field so that a magnetic force is applied to the rotor coils, thereby propelling the coupler and the rotor coils along the stator coils. |
| US11309779B2 |
Brush-less DC dynamo and a vehicle comprising the same
This invention provides a brushless dc dynamo, which is characterized by using semiconductor switches to replace commutators used in conventional brush DC dynamo, wherein the periodically mechanical contact of the armature and different electrodes are replaced with static electronic switching array to periodically switch electrically without any mechanical contact switching between the armature and electrodes. Meanwhile, the armature can work as conventional mode to always maintain the distribution of the armature current such that the magnetic field of the rotator is perpendicular to the magnetic field of the stator during rotating, and the damage of switched contacts caused by mechanical contact of the armature and electrodes can be avoided. |
| US11309778B2 |
Multi-tunnel electric motor/generator
Disclosed are various embodiments for a motor/generator where the stator is a coil assembly and the rotor is a magnetic toroidal cylindrical tunnel or where the rotor is a coil assembly and the stator is a magnetic toroidal cylindrical tunnel. |
| US11309776B2 |
Manufacturing method of core for rotary electric machine
A manufacturing method of a core for a rotary electric machine includes: a step of forming a stator side release hole in at least a first portion of a portion of an electric steel plate in which a slot portion is formed; a step of forming a rotor side hole portion in at least a part of a portion of the electric steel plate in which a hole portion is formed; a step of forming a flattened portion; and a step of forming a rotor plate member and a stator plate member by blanking the electric steel plate. |
| US11309774B2 |
Electric motor with busbar unit
An electric motor includes a rotor rotatable about a rotation axis, and a stator that externally surrounds the rotor and includes a stator core and coils wound on the stator core. The windings are defined by a winding wire including winding wire end portions that are electrically contacted at end surfaces thereof by busbars held at least partially in a busbar holder, and include a ground contact to connect the stator to a ground potential. The ground contact includes a first end region received in a longitudinal groove on an outside of the stator core. |
| US11309771B2 |
Cooling jacket and cooling unit
A cooling jacket has cooling units coupled in a row. The cooling unit comprises a plate-shaped cooling unit body with flow channel, a socket joint extending from one end of the flow channel, and a spigot joint extending from one end of the flow channel. The spigot joint is fitted to the socket joint to connect the cooling units to each other. The socket joint has a spherical-shaped inner surface, and the spigot joint has a spherical-shaped outer surface that matches the inner surface of the socket joint to detachably connect the cooling units to each other and be rotatable about an axis orthogonal to a coupling direction of the cooling units. The socket joint and the spigot joint are provided with through-holes that penetrate through the socket joint and the spigot joint, respectively, to communicate with the flow channels of the cooling units. |
| US11309765B2 |
Electric motor having a motor housing
An electric motor, in particular for a motor vehicle, having a cylindrical motor housing and having a fastening flange, the motor housing having a housing shell which is open both on a first end side and on the opposite second end sides, the fastening flange being configured with a bearing seat, and the fastening flange being connected to the housing shell on the second end sides. |
| US11309760B2 |
Rotary electric machine
A rotary electric machine includes a stator core having a plurality of teeth arranged in a row along a circumferential direction of the stator core, and a stator coil composed of a winding wire wound around the teeth. The stator coil includes coil end portions extending, outside the stator core in an axial direction thereof, along a substantially circumferential direction of the stator core, and straight portions extending along the axial direction, the straight portions being at least partially housed in a slot which is a void defined by two adjacent teeth of the plurality of teeth. In the rotary electric machine, a cooling groove is formed at least in the straight portion, the cooling groove functioning as a cooling channel through which a cooling fluid flows, and each straight portion includes only one cooling channel. |
| US11309758B2 |
Rotating electric machine
A rotating electric machine includes a rotor and a stator. The rotor includes: a rotor core having a refrigerant flow path; and an end surface plate arranged at least on one side of the rotor core. The refrigerant flow path includes: a first refrigerant flow path; and a second refrigerant flow path which is disposed further on a radial inner side than the first refrigerant flow pat. The stator includes: a stator core; and a coil end portion protruding from at least one side of the stator core. The end surface plate includes: a root side refrigerant supply portion which communicates with the first refrigerant flow path and supplies the refrigerant to a root region of the coil end portion; and a distal side refrigerant supply portion which communicates with the second refrigerant flow path and supplies the refrigerant to a distal region of the coil end portion. |
| US11309757B2 |
Rotor of rotating electrical machine
A rotor of a rotating electrical machine includes: a rotor core with a plurality of magnet insertion holes; and a plurality of magnetic pole portions including permanent magnets inserted into the plurality of magnet insertion holes. A space portion is provided between a space portion forming surface of at least one of the outer diameter surface and the inner diameter surface of the permanent magnet and a wall surface of the magnet insertion hole facing the space portion forming surface. The space portion includes: a liquid medium storage region provided in a center in the circumferential direction, and liquid medium throttle regions provided at both end portions in the circumferential direction, and a distance between the permanent magnet and the magnet insertion hole in the liquid medium throttle region is shorter than a distance between the permanent magnet and the magnet insertion hole in the liquid medium storage region. |
| US11309750B2 |
Motor with optimized dimensional relationships
A driving apparatus according to an embodiment includes an arm, an operation target, and a brake unit. The arm has one end supported by a support mechanism, and includes an electric driving source. The operation target is attached to the other end of the arm, the other end being an end on the opposite side of the one end, and is enabled to be pivoted by the driving source about one rotational axis intersecting with a direction from the one end to the other end. The brake unit secures immobility of a target gear that is a gear disposed in the arm, and that is a gear being rotated as the operation target is pivoted, when the power supply to the driving source stops. |
| US11309749B2 |
Stator assembly with teeth having different cross-sectional profiles with stem and head portions
A stator assembly includes a stator having a plurality of teeth which are distributed around a circumference of the stator and point toward a central axis of the stator. The teeth alternately have a first cross-sectional profile and a second cross-sectional profile, and a plurality of slots being formed between the teeth. A plurality of coils are disposed around the teeth having the first cross-sectional profile. The second cross-sectional profile has a parallel-sided stem portion and an adjoining tapered head portion. A height of the stem portion of the second cross-sectional profile is less than a height of a respective one of the coils that is disposed around an adjacent one of the teeth having the first cross-sectional profile. |
| US11309748B2 |
Wireless and contactless electrical energy transfer assembly comprising an improved system for regulating the transferred energy
The application comprises a system for regulating the transfer of energy in a contactless and wireless assembly, the regulation that is implemented in continuously measuring the voltage and/or the current directly at the output of the rectifier of the receiving part Rx of the assembly, and then in generating error signals from this/these measurement(s) and in transmitting them back to the transmitting part Tx via a communication that is independent of the transmitted power. |
| US11309744B2 |
Systems and methods for providing wireless power to deep implanted devices
The present disclosure relates to systems and methods for providing wireless power to implanted devices. Consistent with some embodiments, a power system for providing wireless power to a device implanted in a body of an individual includes a first antenna loop that produces a first electromagnetic wave and at least one second antenna loop that produces a second electromagnetic wave. The first and second electromagnetic waves may interfere with one another to produce an interference pattern including interference maxima. Further, a location of at least one of the interference maxima may be at or substantially close to the device implanted in the body of the individual. A broad distribution pattern at the surface of the skin can reduce the specific absorption rate of the transmission, while focusing the transmission toward the implanted device improves the antenna system's transfer efficiency. |
| US11309735B1 |
Non-vibrational electromagnetic energy harvester
An electromagnetic energy harvester circuit to obtain unrealized potential energy employs an E-I inductor having a primary coil winding and a secondary coil winding. A capacitor is electrically coupled to a main power source and upper lead to the primary coil winding, wherein a lower lead of the primary coil winding is coupled to a primary AC load. The secondary coil winding has an upper lead coupled to a first input of a secondary load and a lower lead coupled to a second input of the secondary load. The circuit harvester's electrical current produced through the windings to allow operation of the secondary load. |
| US11309732B2 |
Controlled power transitions between electrical power supplies
A power system includes first and second power supplies, and a control circuit. The control circuit is configured to control the first power supply to regulate its output voltage at a first value, enable the second power supply, increase the output voltage of the first power supply to a second value in response to the second power supply being enabled, increase an output voltage of the second power supply to a third value, and decrease an output current of the first power supply and increase an output current of the second power supply to transition between electrically powering the load with the first power supply and electrically powering the load with the second power supply. Other example power system and methods for controlling a power transition between power supplies are also disclosed. |
| US11309731B1 |
Solar powered smart device
Solar Powered display screen for electronic devices including but not limited to smart phones, media players, portable radios . . . is disclosed. Expands battery life of a battery and product usage and can produce two way radio for emergency purposes. (The two way radio is optional). |
| US11309729B2 |
Apparatus comprising a first and second layer of conductive material and methods of manufacturing and operating such apparatus
Apparatus comprising a first layer of electrically conductive material and a second layer of electrically conductive material, and a plurality of impedance elements connecting said first layer with said second layer, wherein an impedance value of at least some of said plurality of impedance elements is controllable. |
| US11309719B2 |
Battery for a motor vehicle and method for operating a battery
A battery for a motor vehicle, having multiple battery cells which include respective battery cell housings with electric terminals via which the battery cells are electrically connected to one another. In the battery cell housings, in each case a cell branch connecting the terminals, with a galvanic cell, is arranged, and in each case several of the battery cells are connected to one another in parallel connection to form respective cell blocks. Each cell branch includes a switching element for opening and closing the cell branch; the battery has a control device which is configured in order to actuate the switching elements of the cell branches for opening or closing the switching elements as a function of a performance requirement of an electric drive of the motor vehicle. |
| US11309718B2 |
Battery monitoring system and battery monitoring apparatus
A battery monitoring system according to an embodiment includes a plurality of battery monitoring apparatuses provided in accordance with battery packs. Each of the battery monitoring apparatuses includes a setting unit and a communication unit. The setting unit sets a communication system to at least one of a first communication system and a second communication system having a shorter communication period than that of the first communication system, sets the communication system to the second communication system during a failure diagnosis to be performed in a start-up of the corresponding battery monitoring apparatus, and sets the communication system to the first communication system after the failure diagnosis. The communication unit communicates with another battery monitoring apparatus of the plurality of battery monitoring apparatuses by using the communication system set by the setting unit. |
| US11309712B2 |
Methods and apparatus including an energy management system
An energy management system is provided and includes a smart switch includes an input that is configured to connect to one of meter at a service entrance or a main load panel; a storage system connected to the smart switch; and a combiner connected to one of the smart switch or the main load panel and one or more photovoltaics (PVs). |
| US11309709B2 |
High-frequency current compensator and air-conditioning system
A harmonic current compensating device according to an embodiment of the present disclosure is a harmonic current compensating device including a power converter including at least a pair of arms each including a switching element, the harmonic current compensating device being configured to drive the switching element and supply compensating current to load current flowing between a system power source and a harmonic generating load, in which the switching element includes a unipolar device using a wide bandgap semiconductor. |
| US11309702B2 |
Systems and methods for islanding protection
Illustrative embodiments of systems and methods for detecting and responding to islanding of distributed energy resources are disclosed. In at least one illustrative embodiment, a method may include measuring voltage and current at a connection point between a distributed energy resource and an electrical grid, determining a Thévenin impedance of the electrical grid based upon the voltage and current measurements, and determining whether the Thévenin impedance has exceeded a predetermined threshold. In some embodiments, the method may further include disconnecting the distributed energy resource from the electrical grid in response to determining that the Thévenin impedance has exceeded the predetermined threshold. |
| US11309690B2 |
Distribution panel for intelligently controlled solid-state circuit breakers
An electrical distribution panel for controlling the distribution of electrical power to a plurality of loads includes a plurality of solid-state circuit breakers (SSCBs), each including a thermally conductive heatspreader and one or more power semiconductor devices that control whether electrical current is able to flow to an attached load; a distribution panel heatsink configured in thermal contact with the SSCB heatspreaders; one or more cooling fans that blow air onto the distribution panel heatsink; a stacked bus bar with quick-fit pin-mount receptacles for receiving mating/matching press-fit connection pins located on line-side terminals of the SSCBs; a communications and control (comm/control) bus communicatively coupled to the plurality of SSCBs; and a head-end interface and gateway to which an external computer can connect, to, among other things, set and alter trip settings of the plurality of SSCBs via the comm/control bus. |
| US11309688B2 |
Nitride semiconductor light-emitting element, method for manufacturing nitride semiconductor light-emitting element, and nitride semiconductor light-emitting device
In a method for manufacturing a nitride semiconductor light-emitting element by splitting a semiconductor layer stacked substrate including a semiconductor layer stacked body with a plurality of waveguides extending along the Y-axis to fabricate a bar-shaped substrate, and splitting the bar-shaped substrate along a lengthwise split line to fabricate an individual element, the waveguide in the individual element has different widths at one end portion and the other end portion and the center line of the waveguide is located off the center of the individual element along the X-axis, and in the semiconductor layer stacked substrate including a first element forming region and a second element forming region which are adjacent to each other along the X-axis, two lengthwise split lines sandwiching the first element forming region and two lengthwise split lines sandwiching the second element forming region are misaligned along the X-axis. |
| US11309685B2 |
Techniques for vertical cavity surface emitting laser oxidation
Some embodiments relate to a vertical cavity surface emitting laser (VCSEL) device including a VCSEL structure overlying a substrate. The VCSEL structure includes a first reflector, a second reflector, and an optically active region disposed between the first and second reflectors. A first spacer laterally encloses the second reflector. The first spacer comprises a first plurality of protrusions disposed along a sidewall of the second reflector. |
| US11309680B2 |
Light source device including lead terminals that cross space defined by base and cap
A light source device includes: a base comprising a bottom portion and a peripheral wall portion; a semiconductor laser located on the bottom portion; a cap connected to an upper surface of the peripheral wall portion, wherein the cap and the base define a sealed space; a translucent portion located in the peripheral wall portion or the cap, the translucent portion being configured to transmit a beam emitted from the semiconductor laser; and first and second lead terminals located in the sealed space and crossing from a first inner surface of the peripheral wall portion to a second inner surface of the peripheral wall portion. The semiconductor laser is located between the two lead terminals. The translucent portion is located on an optical axis of the beam emitted from the semiconductor laser. |
| US11309679B2 |
External optical feedback element for tuning a multi-wavelength gas laser
An external optical feedback element (108) for tuning an output beam of a gas laser (102) having multiple wavelengths includes a partially reflective optical element (108) positioned on a beam path of the output beam (106) outside of an internal optical cavity of the gas laser (102), and a stage (114) to support the optical element and adjust rotation, horizontal tilt angle, and vertical tilt angle of the optical element with respect to the beam path. The output beam (106) is partially reflected at the optical element (108) and fed back into the internal optical cavity of the gas laser (102), with the intensity varying for multiple wavelengths and adjusted by changing rotation, horizontal tilt angle and vertical tilt angle of the optical element. Thereby, a variable feedback of the output beam into the internal optical cavity of the gas laser is provided, which leads to a selective output wavelength of the gas laser, either at a single line or at multiple lines simultaneously. This setup may allow to control the wavelength of a commercial CO2 gas laser without a modification of the laser itself by adding a coupled cavity with a wavelength selective element like a grating to the given gas laser resonator. |
| US11309676B2 |
Integrated multilayer structure and a method for manufacturing a multilayer structure
An integrated multilayer structure includes a substrate film including an electrically insulating material; a circuit design including electrically conductive elements provided on the substrate film, the conductive elements defining a number of contact areas; a connector at the edge of the substrate film, the connector including a number of electrically conductive elongated contact elements, such as pins, connected to the contact areas of the conductive elements of the circuit design on the substrate film while further extending from the substrate film to couple to an external connecting element responsive to mating the external connecting element with the connector; and at least one plastic layer molded onto the substrate film so as to at least partially cover the circuit design and only partially cover the connector. |
| US11309674B2 |
Brush holder assembly monitoring apparatus, assembly, system and method
Methods and systems for monitoring a brush holder assembly and/or detecting wear of a brush in a brush holder assembly are disclosed. One method includes sending data from a plurality of remote monitoring locations to a central control unit, where the data may be evaluated in order to monitor states of brushes at a plurality of remote electrical facilities. For example, multiple images of a marker tracking longitudinal movement of the brush may be acquired. A comparison of the images, for example, a comparative imaging technique, such as pixel-by-pixel comparison, may then be performed in order to evaluate a condition of the brush, such as the wear rate, wear state, or life expectancy of the brush. |
| US11309671B2 |
Connecting structure and adapter
A connecting structure comprising: a connecting plate that has an abutting surface abutting with an electronic device and a fixing surface abutting with an adapter, a first fixing plate arranged at one end of the connecting plate, the first fixing plate protruding towards the electronic device from the abutting surface; and a second fixing plate arranged at the other end of the connecting plate, the second fixing plate protruding towards the electronic device from the abutting surface, wherein the second fixing plate is arranged opposite to the first fixing plate to define an accommodating slot for receiving an end of the electronic device having an interface. The connecting structure and the adapter reinforce the connection force between the plug and the interface, thus reducing the possibility of separation and preventing the plug from being broken. |
| US11309670B2 |
System and method for compact electro-optical interface
An electro-optical interface system is disclosed which incorporates a housing, an electrical circuit supported from the housing and configured to interface to a plurality of remote electrical components, an electronics subsystem and an optical subsystem. The electronics subsystem is housed within the housing and in communication with the electrical circuit. The optical subsystem is housed within the housing and in communication with the electronics subsystem. The optical subsystem receives electrical signals from the electronics subsystem which are representative of electrical signals received from the remote electrical components, and converts the received electrical signals into optical signals for transmission to a remote subsystem. |
| US11309669B2 |
Lug assemblies and related electrical apparatus and methods
Lug assemblies include a housing with at least one internal printed circuit board with electronics and lugs. The lugs attach to cables providing power/current. The printed circuit board includes at least one electrical ground connector and at least one electrical contact connector. The lug assemblies include terminals that indirectly electrically couple the cables to terminals of switching devices such as circuit breakers. |
| US11309665B1 |
Active cable arrangement for connecting medical devices to a display
A customized active dongle plus cable arrangement is used to show combined and time synchronized data from different medical devices in realtime or from a specified point in time on a connected medical grade standard display monitor. The active cable arrangement of the invention is capable of communicating with a plurality of legacy and third-party medical devices via their designed physical and proprietary semantic protocols. Using the active cable arrangement, the user has the sensation of “plug and play”, by simply connecting the medical device to the monitor USB port (or to the USB hub extending the monitor USB port). The active cable arrangement of the invention transforms the proprietary protocol of the medical device, providing the monitor with standardized output for data, waveforms, alarms, setting, notifications, values and other useful information. The standard medical grade display monitor will support the display of such information according to the software API and specifications of the normalized JSON protocol. |
| US11309659B2 |
Drip-proof structure, connector with drip-proof structure and electric connection box
A drip-proof structure includes an upper wall of a connector body and an inclined face, the connector body being configured to be mounted to protrude in a canopy-like fashion from a panel-like object extending in a vertical direction and to extend in a traverse direction for a length equal to or greater than a width of a component mount area located below to block liquid from falling onto the component mount area, the inclined face being provided on an upper face of the upper wall and extending from a tip portion side to the panel-like object side of the connector body, the inclined face being inclined downward, with respect to the traverse direction, from a top position toward a side edge of the upper face to a terminal position positioned with a gap from the side edge to guide liquid received by the upper wall to the terminal position. |
| US11309656B2 |
Method for assembling a plug on a multi-core sheathed cable, and electrical plug
A method assembles a plug on a multi-core sheathed cable which extends in a longitudinal direction and has multiple wires surrounded by a cable sheath. A sealing element made of a sealing material is applied to the multiple wires. The sealing element has individual passages formed through the sealing material for the wires. Subsequently, the wires are assembled in a plug housing, wherein the plug housing has an opening at a rear end thereof, and the sealing element is inserted into the opening and shifted preferably along the wires such that the sealing element sits in the opening in a sealing manner. A sealing coating is then applied, which extends from the rear end of the plug housing to the cable sheath. |
| US11309649B2 |
Floating connector assembly
An electronic device includes a housing having a front wall and a floating connector assembly coupled to the front wall. The connector assembly includes a panel and a connector. The connector includes a frame attached to the panel and defines first and second alignment openings. A sleeve extends from the frame and extends through the front wall. A removable cover for the electronic device includes first and second connector alignment pins that align with the first and second alignment openings to align the connector sleeve with a connector aperture defined by the cover. The first and second connector alignment pins and the first and second alignment openings can each include tapered portions to move the connector assembly into alignment with the connector aperture as the cover is attached with the housing. |
| US11309645B2 |
Electronic device including flexible printed circuit board
An electronic device includes a housing; a first circuit board, and a flexible circuit board. The first circuit board is disposed in an internal space of the housing and includes a plurality of first conductive terminals. The flexible circuit board includes a first connection portion including a plurality of second conductive terminals configured to connect to the plurality of first conductive terminals. The flexible circuit board also includes a connection portion extended from the first connection portion, and at least one conductive layer extended from the connection portion to at least a portion of the first connection portion. Additionally, the flexible circuit board includes at least one transmissive area in which light may be transmitted and the at least one conductive layer is at least partially omitted. At least some of the plurality of second conductive terminals are visible from the outside through the at least one transmissive area. |
| US11309643B2 |
Substrate connecting structure
A substrate connecting structure includes a first substrate, a second substrate facing the first substrate, and a terminal through which electricity is supplied to the first substrate and the second substrate. The terminal has a first substrate connecting part that is connected to the first substrate from a side opposite from the second substrate, and a second substrate connecting part that is provided by splitting from the first substrate connecting part at an intermediate point in the terminal and connected to the second substrate by extending contactlessly through the first substrate from the side opposite from the second substrate toward the second substrate. |
| US11309641B2 |
Antenna and wireless module
An antenna (101) includes a grounded conductive foil (110) disposed on a module substrate (140), a first conductive foil (111), and a second conductive foil (112). The first conductive foil (111) and the second conductive foil (112) are disposed on the module substrate (140), are elongated, and do not overlap with the grounded conductive foil (110) in a plan view of the module substrate (140). The first conductive foil (111) has one end supplied with an antenna signal and the other end that is open. The second conductive foil (112) has one end connected to the grounded conductive foil (110) and the other end that is open. A wireless module (120) includes a circuit unit (130) including a communication circuit and provided to the module substrate (140) on which the antenna (101) is formed. |
| US11309640B2 |
Wireless communication device
A wireless communication device includes a housing, a substrate provided inside the housing, an antenna provided on the substrate, a switching unit configured to switch directivity of the antenna between a first state and a second state, a detection unit configured to detect switching of the switching unit, and an output unit configured to output a detection result of the detection unit. |
| US11309639B2 |
Antenna and communications apparatus
An antenna and a communications apparatus, where the antenna includes surface radiating patches, inner radiating patches, a first dielectric substrate disposed between the surface radiating patches and the inner radiating patches, and a second dielectric substrate disposed below the inner radiating patches and configured to carry antenna feeders coupled to the inner radiating patches. A dielectric constant or dielectric loss of the first dielectric substrate is lower than that of an organic resin substrate, and a coefficient of thermal expansion of the second dielectric substrate is lower than that of the organic resin substrate. |
| US11309636B2 |
Antenna structure for reducing beam squint and sidelobes
An example radar system includes a transmission array and a reception array, each aligned as a linear array. The radar system also includes a transmitter configured to cause transmission of radar signals having a center frequency by the transmission array. The radar system also includes a receiver configured to receive radar signals having the center frequency that are received by the reception array. The radar system also includes a processor configured to process received radar signals from the receiver, and adjust the center frequency from a first center frequency to a second center frequency. The adjusting of the center frequency from the first center frequency to the second center frequency causes the frequency-dependent transmission radiation pattern of the transmission array to tilt in a first direction and the frequency-dependent reception radiation pattern of the reception array to tilt in an opposite direction from the first direction. |
| US11309634B2 |
Method for synthesizing vortex electromagnetic wave carrying high orbital angular momentum (OAM) mode
A novel synthetic uniform circular array (SUCA) method for generating vortex electromagnetic (EM) wave carrying high orbital angular momentum (OAM) mode has the following steps. N antenna elements are placed radially to form a uniform circular array (UCA), where N is a positive integer. By rotating the array elements to various spatial locations, modifying their feeding phases, and superimposing the generated fields at various spatial locations, SUCA can beat the limit of space and configure more array elements to generate vortex electromagnetic (EM) waves carrying high mode OAMs. Meanwhile, due to the more synthetic array elements and smaller aperture than the traditional UCA, the purity of OAM mode is higher and it is more flexible to adjust the main lobe directions of these vortex waves carrying different OAM modes, and can generate vortex EM waves. |
| US11309630B2 |
Antenna
An antenna for a communication device is disclosed. The antenna has a structure including a ground plane and a lid component. The lid component is conductive, substantially planar and has a planform shape which is lesser in a first lid component dimension (L1) than it is in a second lid component dimension (L2) perpendicular to the first lid component dimension (L1). The ground plane is conductive and substantially planar, and the size of the ground plane is greater than the size of the lid component. The lid component is conductively connected to the ground plane but also spaced apart from the ground plane, such that there is a space between the lid component and the ground plane, and the antenna is center fed. |
| US11309629B2 |
Multiplexed antennas that sector-split in a first band and operate as MIMO antennas in a second band
Base station antennas include a plurality of multiplexer filters and a multi-column array of radiating elements that includes a plurality of sub-arrays. Each filter may have a first and second ports that are configured to pass RF signals in respective first and second frequency bands and a third common port that is coupled to a respective one of a plurality of sub-arrays. These antennas also include first frequency band ports that are coupled to the first ports of respective subsets of the multiplexer filters and second frequency band ports that are coupled to the second ports of at least some of the multiplexer filters. The antenna may operate as a MIMO sector antenna in the first frequency band and as a sector-splitting antenna in the second frequency band. |
| US11309624B2 |
Nozzle cap encapsulated antenna system
A nozzle cap includes a cap body defining a first body end and a second body end, the cap body defining a circumferential wall extending from the first body end towards the second body end; an antenna cover circumferentially overlapping a portion of the circumferential wall, the antenna cover defining an inner cover surface facing the circumferential wall, an antenna cavity defined between the inner cover surface and the portion of the circumferential wall; and an antenna printed circuit board (“PCB”) strip positioned within the antenna cavity, the antenna PCB strip secured in facing engagement with the inner cover surface. |
| US11309622B2 |
Apparatus for attaching an orthogonal mode transducer to an antenna
Apparatus for attaching an orthogonal mode transducer, OMT, to an antenna, wherein said apparatus comprises a frame for receiving said OMT, and an antenna interface device for establishing a radio frequency, RF, signal connection between said OMT and said antenna, wherein said frame comprises a supporting surface for releasably attaching said antenna interface device to said frame. |
| US11309621B2 |
Antenna module and electronic device including the same
The present disclosure relates to a communication method and system for converging a 5th-Generation (5G) communication system for supporting higher data rates beyond a 4th-Generation (4G) system with a technology for Internet of Things (IoT). The present disclosure may be applied to intelligent services based on the 5G communication technology and the IoT-related technology, such as smart home, smart building, smart city, smart car, connected car, health care, digital education, smart retail, security and safety services. An antenna module includes a first printed circuit board (PCB) stacked at least one layer, and a second PCB disposed on an upper surface of the first PCB and stacked at least one layer. The antenna module further includes a wireless communication chip disposed on an upper surface of the second PCB and controlling an electrical signal for a radio frequency, a first structure disposed on the upper surface of the first PCB and surrounding the upper surface of the first PCB, a first antenna disposed on an inner surface of the first structure to face the first PCB, and a feed line electrically connecting the first antenna and the wireless communication chip. |
| US11309609B2 |
Battery module, and vehicle equipped with same
A pair of end plates of a battery module are disposed respectively at end faces of a battery stack. Each of the end plates includes a first metal sheet, a second metal sheet, and a metal rod. The first metal sheet includes a plate part corresponding to a shape of each of the end faces of the battery stack, and a bent side piece provided at each of widthwise sides of the plate part. The second metal sheet includes a parallel plate part stacked on and fixed to the plate part of the first metal sheet, and a bending ridge that connects with each of sides of the parallel plate part and extends along widths of the end plates. A tubular reinforcement is defined on an inner side of the bending ridge. A metal rod is disposed in the tubular reinforcement and has ends connected to the bind bar. |
| US11309608B2 |
Battery case and battery cooling system
The present invention relates to a battery case and a battery cooling system. The battery case includes an outer case; an inner case spaced apart from the outer case; and an intermediate member in a separation space between the outer case and the inner case, wherein the intermediate member includes: a plurality of peak portions which protrudes upward in a shape corresponding to a shape of a plurality of lower pins; a plurality of valley portions which protrudes downward in a shape corresponding to a shape of a plurality of upper pins; and a connection portion disposed between the peak portion and the valley portion. |
| US11309607B2 |
Battery pack
A battery pack includes a first core pack and a second core pack each holding a plurality of unit cells. The unit cells of a first cell group or second cell group that is closest to a connector are electrically connected to the connector through a third busbar. The unit cells of the first cell group or second cell group that is most distant from the connector are electrically connected to the connector through a fourth busbar. |
| US11309601B2 |
Battery system
A battery system for holding battery cells in order to form a motor vehicle battery, includes a housing, system components for fastening and contacting the battery cells in the housing, and a foam body held in the housing for displacing air volume. The foam body has a recess for receiving a system component. |
| US11309596B1 |
Infrared thermal run-away detection for battery packs
Systems and methods for identifying thermal run-away events in a battery pack can include using infrared sensors to measure infrared radiation emitted by and reflected by subsets of the battery cells arrayed in a battery pack. Each infrared sensor can generate temperature data based on the received infrared radiation, which includes reflected infrared radiation for several and potentially many individual battery cells aligned in rows or columns within the battery pack. Each infrared sensor can sense the beginning of a thermal run-away event by sensing when an individual battery cell in the array has a temperature exceeding a threshold, and can generate a signal indicative of a thermal run-away event based on the detected excessive temperature. |
| US11309593B2 |
Flexible circuit board and frame assembly including same
Provided is a flexible circuit board installed on a frame to which a bus bar is coupled. The flexible circuit board may include a central portion having a band shape, first connection circuit portions formed at both ends of the central portion and disposed to face each other, second connection circuit portions extending from the first connection circuit portions in parallel with the central portion, and third connection circuit portions extending from the first connection circuit portions and the second connection circuit portions and connected to the bus bar. An overlapped may be formed when each of the second connection circuit portions is folded toward one side of each of the first connection circuit portions. |
| US11309592B2 |
Load power supply circuit and terminal
Embodiments of the present invention relate to the battery monitoring field, and provide a load power supply circuit and a terminal. The load power supply circuit includes a charging manager and a step-up circuit. The charging manager includes a first pin, a second pin, and a third pin. The first pin of the charging manager is electrically connected to a load, and the second pin of the charging manager is electrically connected to a battery. The step-up circuit includes a first end, a second end, and a control end. The first end of the step-up circuit is electrically connected to the load, the second end of the step-up circuit is electrically connected to the battery, and the control end of the step-up circuit is electrically connected to the third pin of the charging manager. |
| US11309589B1 |
Motion-generating pumps for desulfation of lead-acid batteries
The present disclosure pertains to motion-generating pumps, energy storage devices including such motion-generating pumps, and methods of making and using the same for the desulfation of lead-acid batteries. The energy storage device includes a battery casing defining a plurality of chambers, each of the plurality of chambers may include one or more electroactive plates disposed therein and an electrolyte disposed so as to surround the one or more electroactive plates. The energy storage device further includes one or more circulating systems configured to agitate the electrolyte in each of the plurality of chambers. A method for desulfation in a lead-acid battery may include using one or more circulating systems to circulate an electrolyte so as to prevent precipitation. |
| US11309586B2 |
Power storage device discharge circuit, power storage system, and vehicle equipped with same
A discharge circuit includes a plurality of burden circuits that are electrically connected in parallel to a plurality of power storage units, respectively. Each of the plurality of burden circuits includes (i) a resistor and a switch that are electrically connected in series between both ends of a corresponding one of the plurality of power storage units, and (ii) a control terminal that controls the switch according to a potential of the control terminal. The plurality of burden circuits are electrically connected in series between a positive electrode and a negative electrode. The control terminal of a n+1-th burden circuit from a reference point is electrically connected, via the switch of the n-th burden circuit from the reference point, to a reference point side terminal of a n-th power storage unit from the reference point. The reference point is the positive electrode or the negative electrode. |
| US11309584B2 |
Electrolyte solution for lithium secondary batteries, and lithium secondary battery
Provided is an electrolyte solution for lithium secondary batteries that allows lowering the resistance of a lithium secondary battery, and suppressing characteristic degradation of the lithium secondary battery under high temperature. The electrolyte solution for lithium secondary batteries disclosed herein contains 0.05 mass % to 2.0 mass % of a compound represented by Formula (1) below. (In the formula, M+ represents a quaternary ammonium cation or a nitrogen-containing heteroaromatic ring cation, and R1 represents a C1-C5 alkyl group in which an ether oxygen is optionally inserted.) |
| US11309579B2 |
Lithium ion secondary battery and method for producing the same
Provided is a lithium ion secondary battery with enhanced charge-discharge characteristics. Disclosed is a lithium ion secondary battery comprising: a columnar anode comprising a carbon fiber assembly having an assembled carbon fiber structure, a cathode, and an ion-conducting, insulating separation film disposed between the cathode and the anode to insulate the cathode and the anode from each other, wherein a void content of the carbon fiber assembly is 20% or more and 40% or less, and wherein at least one of a lithium metal and a lithium alloy is contained in voids of the carbon fiber assembly, when the lithium ion secondary battery is in a fully charged state. |
| US11309574B2 |
Systems and methods for electrical energy storage
The present disclosure relates to an electrical energy storage apparatus which forms an interpenetrating, three dimensional structure. The structure may have a first non-planar channel filled with an anode material to form an anode, and a second non-planar channel adjacent the first non-planar channel filled with a cathode material to form a cathode. A third non-planar channel may be formed adjacent the first and second non-planar channels and filled with an electrolyte. The first, second and third channels are formed so as to be interpenetrating and form a spatially dense, three dimensional structure. A first current collector is in communication with the first non-planar channel and forms a first electrode, while a second current collector is in communication with the second non-planar channel and forms a second electrode. A separator layers separates the current collectors. |
| US11309566B2 |
Electrolyte solution tank for redox flow battery and redox flow battery system
An electrolyte solution tank has a tank body, an electrolyte solution supply part, and electrolyte solution drain part and a flow guide mechanism. The electrolyte solution supply part supplies the electrolyte solution into an interior chamber in the tank body. The electrolyte solution is drained from the tank body to the outside of the tank through the electrolyte solution drain part. The flow guide mechanism is arranged in the interior chamber of the tank body. The flow guide mechanism guides the flow of the electrolyte solution in the interior chamber to the electrolyte solution drain part along a vertically downward direction. |
| US11309563B2 |
High efficiency fuel cell system with hydrogen and syngas export
A fuel cell system includes at least one topping fuel cell module including a topping anode portion configured to output a topping anode exhaust, and a topping cathode portion configured to output a topping cathode exhaust; at least one bottoming fuel cell module including a bottoming anode portion configured to output a bottoming anode exhaust, and a bottoming cathode portion configured to output a bottoming cathode exhaust; and an electrochemical hydrogen separation unit configured to receive at least a portion of the topping anode exhaust, to output a hydrogen-rich stream, and to output a CO2-rich stream. The bottoming anode portion is configured to receive the CO2-rich stream from the electrochemical hydrogen separation unit. |
| US11309562B2 |
Method for operating a fuel cell device
The invention relates to a method for operating a fuel cell device (10), wherein the fuel cell device (10) is operated in accordance with a quality characteristic of a fuel that is used. According to the invention, the quality characteristic is determined from a partial analysis of the constituents of the fuel that is used. The invention further relates to a fuel cell device (10) that is operated by means of such a method. |
| US11309554B2 |
Method and device for recycling electrolyte of flow battery
The present invention relates to a method for regenerating an electrolyte liquid of a flow battery, and a device for regenerating an electrolyte liquid of a flow battery. The method involves operating a flow battery, stopping the operation of the flow battery, mixing the anode electrolyte liquid and the cathode electrolyte liquid of the flow battery, electrically oxidizing or reducing the mixed electrolyte liquid and dividing the oxidized or reduced electrolyte liquid into each of a cathode electrolyte liquid storage unit and a anode electrolyte liquid storage unit. The device includes a flow battery and a flow battery for regeneration. |
| US11309553B2 |
Fuel cell system including exhaust heat recovery components
A fuel cell system including power modules including fuel cells, and an exhaust flue connected to the power modules. The exhaust flue includes an outer duct configured to receive relatively cool cabinet exhaust from the power modules, and an inner duct disposed inside of the outer duct and configured to receive relatively hot reaction exhaust from the power modules. |
| US11309548B2 |
Fluid flow plate for a fuel cell
A fluid flow plate having first and second fluid flow channels on a fluid flow plate with an active area of fluid flow fields having one or more arrays of fluid transfer points (301, 302, 303) disposed along an edge of the flow field for communicating fluid into or out of flow channels. A first and second distribution gallery (15, 16, 21) with peripheral edge portions bounded by the arrays including at least one pair of inlets in external edges of the fluid flow plate and wherein the first fluid distribution gallery is shaped such that the combined lengths of the first-gallery second peripheral edge portions are longer than the first-gallery first peripheral edge portion, and wherein the internal edges of the flow plate comprise edges of a hole, aperture, or port passing through the flow plate, and the external edges of the flow plate comprise an outer peripheral edge of the plate. The edges each may comprise a castellated structure (31, 32, 34). |
| US11309547B2 |
Fuel cell separator member and fuel cell stack
A fuel cell separator member of a fuel cell stack includes a metal separator on which a seal bead is formed, and a pressure receiving member provided on a surface of the metal separator, separately from the metal separator. The pressure receiving member is provided along a seal bead, and the height of the pressure receiving member is lower than the height of the seal bead in the state where the tightening load is applied and no impact load is applied. |
| US11309546B2 |
Gas diffusion electrode, method for manufacturing gas diffusion electrode, membrane electrode assembly, and fuel cell
A low-cost gas diffusion electrode is described that overcomes defects of conventional techniques, that achieves both dry-up resistance and flooding resistance, and that has satisfactory power generation performance, where the gas diffusion electrode includes a conductive porous substrate, and a microporous layer containing conductive fine particles and provided on at least one surface of the conductive porous substrate. The gas diffusion electrode has, based on the number of fine pores having an area of 0.25 μm2 or more that are observed in a cross section of the microporous layer in a thickness direction, a percentage of fine pores having a circularity of 0.5 or more of 50% or more and 100% or less. |
| US11309545B2 |
Carbonaceous materials for lithium-sulfur batteries
A composition of matter may include pores and non-tri-zone particles and tri-zone particles. In one implementation, each tri-zone particle may include carbon fragments intertwined with each other and separated from one another by mesopores. Each tri-zone particle may also include a deformable perimeter that may coalesce with adjacent non-tri-zone particles or tri-zone particles. In some aspects, the tri-zone particles may include aggregates formed by a multitude of the tri-zone particles joined together. In some aspects, mesopores may be interspersed throughout the aggregates. Each tri-zone particle may also include agglomerates, where each agglomerate includes a multitude of the aggregates joined together. In some aspects, macropores may be interspersed throughout the aggregates. |
| US11309543B2 |
Electrode active composition with reduced amount of cobalt
The present invention provides an electrode active composition represented by formula (I). Li1+xMnaNibO2+x.LiyCoyO2y.D*C (I), wherein x>0, 0 |
| US11309540B1 |
Anode structure for a lithium metal battery
An anode for a lithium metal battery includes a host structure configured to be between an anode current collector and a separator, the host structure having void spaces configured to host metallic lithium during charging, wherein the host structure has a void space of ≥60% and ≤80%. Another anode for a lithium metal battery includes a current collector, a separator, and a host structure between the current collector and the separator, the host structure having void spaces configured to host metallic lithium during charging, wherein the host structure is formed of fibers. |
| US11309536B2 |
Silicon particles for battery electrodes
Silicon particles for use in an electrode in an electrochemical cell are provided. The silicon particles may have outer regions extending about 20 nm deep from the surfaces, the outer regions comprising an amount of aluminum such that a bulk measurement of the aluminum comprises at least about 0.01% by weight of the silicon particles. The bulk measurement of the aluminum may provide the amount of aluminum present at least in the outer regions. |
| US11309535B2 |
Electrodes for batteries
Provided herein are a lithium electrode and a sulfur electrode for batteries. The lithium electrode comprises lithium metal and a metal-coated fabric. The fibers of the metal-coated fabric are covered by a metal layer, on which the lithium metal is attached. The sulfur electrode comprises a sulfur composite and a nickel-coated fabric. The fibers of the nickel-coated fabric are covered by a nickel layer, on which the sulfur composite is attached. The lithium electrode can inhibit dendrite formation and the sulfur electrode can speed up the redox kinetics of soluble polysulfides. |
| US11309533B2 |
Composite oxide, active material composite material, electrode, battery, battery pack, and vehicle
According to one embodiment, provided is a composite oxide containing lithium, niobium, and tantalum. A mass ratio of tantalum with respect to niobium is in a range of from 0.01% to 1.0%. |
| US11309531B2 |
Stationary semi-solid battery module and method of manufacture
A method of manufacturing an electrochemical cell includes transferring an anode semi-solid suspension to an anode compartment defined at least in part by an anode current collector and an separator spaced apart from the anode collector. The method also includes transferring a cathode semi-solid suspension to a cathode compartment defined at least in part by a cathode current collector and the separator spaced apart from the cathode collector. The transferring of the anode semi-solid suspension to the anode compartment and the cathode semi-solid to the cathode compartment is such that a difference between a minimum distance and a maximum distance between the anode current collector and the separator is maintained within a predetermined tolerance. The method includes sealing the anode compartment and the cathode compartment. |
| US11309528B2 |
Flexible display panel and fabricating method thereof, flexible display apparatus
The present disclosure relates to a method of fabricating a flexible display panel. The method of fabricating the flexible display panel may include forming a photosensitive layer comprising at least one azo group on a carrier substrate; forming a flexible substrate on the photosensitive layer; irradiating the photosensitive layer with ultraviolet light; and peeling off the flexible substrate from the carrier substrate. |
| US11309526B2 |
Display apparatus having a light-emitting device
A display device having a light-emitting device is provided. The display device can include a buffer insulating layer disposed on a path of light emitted from the light-emitting device. The buffer insulating layer can have a stacked structure of a first buffer insulating layer having the refractive index which decreases in a direction away from the light-emitting device, and a second buffer insulating layer having the refractive index which increases in a direction away from the light-emitting device. Thus, in the display device, the unintended constructive and destructive interference of the light emitted from the light-emitting device can be prevented. Therefore, in the display device, the luminous efficacy can be increased, and the variation of color coordinates can be prevented. |
| US11309521B2 |
Flexible display module having a hollow defined middle
A flexible display module and a manufacturing method thereof are disclosed. The flexible display module includes a first flexible material layer and a second flexible material layer stacked on the first flexible layer, a sealing layer disposed between the first flexible material layer and the second flexible material layer, and a module layer disposed in the hollow of the sealing layer. The sealing layer has a hollow defined in a middle of the sealing layer. The area of the bottom area of the hollow is larger than the area of the module layer. |
| US11309520B2 |
Encapsulation structure, and display apparatus
An encapsulation structure includes a first inorganic layer, a first organic layer and a second inorganic layer, all of which are sequentially stacked in a thickness direction of the encapsulation structure. At least one of the first inorganic layer or the second inorganic layer is a crack-resistant layer. |
| US11309517B2 |
Display apparatus including a groove surrounding a through portion
A display apparatus includes: a substrate including a display area and a peripheral area outside the display area; an inorganic insulating layer stacked on the substrate and located in the display area and the peripheral area; an organic insulating layer on the inorganic insulating layer; a through portion located in the display area and penetrating through the substrate, the inorganic insulating layer, and the organic insulating layer; and at least one groove surrounding the through portion, wherein an end portion of the inorganic insulating layer is covered by the organic insulating layer at an outer side of the at least one groove, and the end portion faces the through portion. |
| US11309513B2 |
Anode, light emitting device, display substrate and method of manufacturing the same, and display device
An anode includes at least one first electrode, and a reflecting electrode disposed on a side of the at least one first electrode configured to face a light emitting portion of the light emitting device. |
| US11309510B2 |
Light emitting device (LED) and multi-stacked LED including charge generation junction (CGJ) layer, and manufacturing method thereof
Provided is a light emitting diode (LED) and a multi-stacked LED including a charge generation junction (CGJ) layer, and a manufacturing method thereof. An LED including an anode, a hole transport layer, a light emitting layer, and a cathode, includes a CGJ layer in a layer-by-layer structure in which an n-type oxide and a p-type oxide formed on at least one surface of the light emitting layer are sequentially stacked. Here, the n-type oxide includes zinc oxide (ZnO) and the p-type oxide is represented by the following Formula: Cu2Sn2-XS3—(GaX)2O3. Here, 0.2 |
| US11309508B2 |
Multi-functional optical composite board having quantum dots of high uniformity
A multi-functional optical composite board having quantum dots of high uniformity is provided herein, the multi-functional optical composite board comprises a diffusion base layer, a first quantum dot-containing layer disposed on the lower surface of the diffusion base layer, and a second quantum dot-containing layer disposed on the upper surface of the diffusion base layer, wherein the first quantum dot-containing layer comprises a red quantum dot-containing layer and a green quantum dot-containing layer, and the second quantum dot-containing layer is sequentially deposited on the upper surface of the diffusion base layer by coating repeatedly. The present invention improves the optical composite board from the structure, raw material and compositions thereof, and obtains a multi-functional optical composite board having a high light diffusion, a high uniformity of emitting-light, and the emitting-light of the resultant product appears much whiter and brighter. |
| US11309504B2 |
Quantum dot light-emitting device and preparation method thereof
The present disclosure relates to the technical field of display, and discloses a quantum dot light-emitting device and a preparation method thereof. The quantum dot light-emitting device includes a first electrode layer, a quantum dot light-emitting layer, an electron transport layer, a second electrode layer and a third electrode layer which are sequentially arranged in a stacked manner, wherein the side, facing away from the first electrode layer, of the third electrode layer is configured as a light exiting side; the second electrode layer and the third electrode layer are transparent electrode layers; and the work function of the second electrode layer is greater than the LUMO energy level of the electron transport layer and smaller than the work function of the third electrode layer. |
| US11309501B2 |
Flexible display device
A flexible display device includes a display panel including a bending area, a first non-bending area, and a second non-bending area, an outer member over a first surface of the display panel, and a stress control member between the display panel and the outer member, and including a first control area overlapping with the bending area, and a second control area and a third control area overlapping with the first non-bending area and the second non-bending area, respectively, such that the first control area is between the second control area and the third control area, and a maximum thickness of the first control area is less than a thickness of an end of the second control area and a thickness of an end of the third control area spaced apart from a bending axis in the second direction. |
| US11309498B2 |
Photoelectric conversion film, solid-state image sensor, and electronic device
[Object] To provide a photoelectric conversion film, a solid-state image sensor, and an electronic device which have an increased imaging characteristic.[Solution] Provided is a photoelectric conversion film including: a subphthalocyanine derivative represented by the following General Formula (1), where, in General Formula (1), X represents any substituent selected from among the group consisting of a halogen, a hydroxy group, a thiol group, an amino group, a substituted or unsubstituted alkoxy group, a substituted or unsubstituted aryloxy group, a substituted or unsubstituted alkyl group, a substituted or unsubstituted alkyl amine group, a substituted or unsubstituted aryl amine group, a substituted or unsubstituted alkylthio group and a substituted or unsubstituted arylthio group, R1 to R3 each independently represent a substituted or unsubstituted ring structure, and at least one of R1 to R3 includes at least one hetero atom in the ring structure. |
| US11309494B2 |
Copolymer and organic light emitting device comprising same
The present specification provides a copolymer including a unit of Chemical Formula 1 and a unit of Chemical Formula 2; and an organic light emitting device including the same. |
| US11309493B2 |
Formulations with a low particle content
The present invention relates to formulations comprising at least one organic semiconductor and at least one organic solvent, characterized in that the formulation contains less than 10,000 particles per liter formulation having an average size in the range from 0.1 to 20 μm, to their use for the preparation of electronic devices, to methods for preparing electronic devices using the formulations of the present invention, and to electronic devices prepared from such methods and formulations. |
| US11309489B2 |
Magnetic tunnel junction with low defect rate after high temperature anneal for magnetic device applications
A magnetic tunnel junction is disclosed wherein the reference layer and free layer each comprise one layer having a boron content from 25 to 50 atomic %, and an adjoining second layer with a boron content from 1 to 20 atomic %. One of the first and second layers in each of the free layer and reference layer contacts the tunnel barrier. Each boron containing layer has a thickness of 1 to 10 Angstroms and may include one or more B layers and one or more Co, Fe, CoFe, or CoFeB layers. As a result, migration of non-magnetic metals along crystalline boundaries to the tunnel barrier is prevented, and the MTJ has a low defect count of around 10 ppm while maintaining an acceptable TMR ratio following annealing to temperatures of about 400° C. The boron containing layers are selected from CoB, FeB, CoFeB and alloys thereof including CoFeNiB. |
| US11309488B2 |
Double spin filter tunnel junction
A memory device that includes a first magnetic insulating tunnel barrier reference layer present on a first non-magnetic metal electrode, and a free magnetic metal layer present on the first magnetic insulating tunnel barrier reference layer. A second magnetic insulating tunnel barrier reference layer may be present on the free magnetic metal layer, and a second non-magnetic metal electrode may be present on the second magnetic insulating tunnel barrier. The first and second magnetic insulating tunnel barrier reference layers are arranged so that their magnetizations are aligned to be anti-parallel. |
| US11309485B2 |
Magnetostrictive material and magnetostriction type device using the same
A magnetostrictive material includes a FeGaSm alloy that is represented by Expression (1), Fe(100-x-y)GaxSmy (1) (in Expression (1), x and y are respectively a content rate (at. %) of Ga and a content rate (at. %) of Sm, and satisfy that y≤0.35x−4.2, y≤−x+20.1, and y≥−0.1x+2.1). |
| US11309481B2 |
Multi-layer piezoelectric ceramic component-mounted piezoelectric device
A multi-layer piezoelectric ceramic component includes: a piezoelectric ceramic body having a cuboid shape, having upper and lower surfaces facing in a thickness direction, first and second end surfaces facing in a length direction, and a pair of side surfaces facing in a width direction, and including first and second regions; first internal electrodes in the first region; second internal electrodes in the second region; third internal electrodes in the first and second regions; a first terminal electrode formed on the first end surface and electrically connected to the first internal electrodes; a second terminal electrode formed on the first end surface and electrically connected to the second internal electrodes; and a third terminal electrode formed on the second end surface and electrically connected to the third internal electrodes, the first, second, and third internal electrodes each having a width equal to a distance between the pair of side surfaces. |
| US11309473B2 |
Light emitting platform (LEP) with phononic structured nanowires
A semiconductor-based light emitting platform (LEP) comprising a heated blackbody radiator wherein the light emitting platform is thermally isolated by nanowires having ultra-low thermal conductivity. In embodiments, the pixel is structured for broadband emission with a platform comprising an infrared surface structured for high emissivity within a broadband wavelength range. In other embodiments radiation is confined to a limited bandwidth by metamaterial and other resonant filters. In embodiments, the internal efficiency of the LEP configured for broadband operation can be higher compared with an LED. |
| US11309468B2 |
Method of fabricating micro light emitting diode array substrate, micro light emitting diode array substrate, micro light emitting diode display apparatus
A method of fabricating a micro light emitting diode (micro LED) array substrate having a plurality of micro LEDs. The method includes forming a plurality of signal lines on a base substrate; depositing a semiconductor material on the base substrate to form a semiconductor material layer; and patterning the semiconductor material layer to form a semiconductor layer of the plurality of micro LEDs. A surface of the plurality of signal lines away from the base substrate is uncovered during depositing the semiconductor material. The plurality of signal lines form a grid for facilitating epitaxial growth of the semiconductor material. |
| US11309467B2 |
Method for manufacturing light emitting device
A method for manufacturing a light emitting device includes preparing a light transmissive member block including a first light transmissive member block having a plate like shape and including a resin containing at least one phosphor and a second light transmissive member block including a material harder than a material of the first light transmissive member block. Grooves are formed on an upper face of the second light transmissive member block. The light transmissive member block is divided at the grooves to obtain a plurality of light transmissive members each having a first light transmissive member and a second light transmissive member. A lower face of the first light transmissive member and an upper face of a light emitting element are bonded together such that a lower face perimeter of the first light transmissive member is located outside of an upper face perimeter of the light emitting element. |
| US11309466B2 |
Light emitting unit
A light emitting unit includes a reflective structure, a light transmitting body and a light emitting chip. The reflective structure has a recess formed by inner side surfaces thereof, and the reflective structure includes a side opening and a bottom opening corresponding to the recess. The side opening and the bottom opening are adjacent to each other, and the inner side surfaces are defined as a top surface and a surrounding side surface. The light transmitting body is disposed within the recess and doped with fluorescent powder. The light transmitting body includes a light emitting surface and an electrode exposing surface. The light emitting surface is corresponding to the side opening; and the electrode exposing surface is corresponding to the bottom opening. The light emitting chip is partially disposed within the light transmitting body and has a bottom, a top light emitting and side light emitting surfaces. |
| US11309463B2 |
Light emitting device, light illuminating module and light illuminating apparatus
A light emitting device includes a substrate, a LED element placed on the substrate, and a lens placed on an optical path of the LED element, wherein the lens has a convex part protruding in a direction of an optical axis of the lens in a central part of an exit surface of the lens. |
| US11309462B2 |
Semiconductor light emitting devices including superstrates with patterned surfaces
A semiconductor light emitting device includes a light emitting diode (LED) chip, a recipient luminophoric medium on the LED chip, a patterned superstrate on the recipient luminophoric medium opposite the LED chip, the patterned superstrate comprising a patterned superstrate on the recipient luminophoric medium opposite the LED chip, the patterned superstrate comprising a patterned surface that is configured to reduce a variation in a color point of a light emitted by the semiconductor light emitting device as a function of an angle off an optical axis of the LED chip. |
| US11309460B2 |
Light-emitting device
A light-emitting device includes a first lead having a first lateral surface, a second lead having a second lateral surface, and a resin portion. The first lateral surface of a first lead facing a second lead has a first recess that is recessed so as to be away from the second lead toward the first lead in a top view, and is continuous with an end of a first groove. The second lateral surface of the second lead facing the first lead has a second recess that is recessed so as to be away from the first lead toward the second lead in the top view, and is continuous with an end of a second groove. In the top view, a part of the resin portion is continuously disposed between the end of the first groove and the end of the second groove. |
| US11309459B2 |
Optoelectronic semiconductor device and method of operating an optoelectronic semiconductor device
An optoelectronic semiconductor device includes a semiconductor layer sequence including an active zone that generates radiation by electroluminescence; a p-electrode and an n-electrode; an electrically insulating passivation layer on side surfaces of the semiconductor layer sequence; and an edge field generating device on the side surfaces on a side of the passivation layer facing away from the semiconductor layer sequence at the active zone, wherein the edge field generating device is configured to generate an electric field at least temporarily in an edge region of the active zone so that, during operation, a current flow through the semiconductor layer sequence is controllable in the edge region. |
| US11309456B2 |
Nitride semiconductor light emitting device, ultraviolet light emitting module
This invention provides a nitride semiconductor light emitting device in which current concentration is suppressed without excessively increasing resistance at a low cost without increasing a manufacturing process.The planar shape of a mesa portion configuring a nitride semiconductor light emitting device is a shape containing a convex-shaped tip portion 352b formed by a curved line or a plurality of straight lines and abase portion 352a continuous to the convex-shaped tip portion 352b, in which an obtuse angle is formed by adjacent two straight lines in the convex-shaped tip portion formed by the plurality of straight lines. The first electrode layer 4 has visible outlines 411 and 412 along a visible outline 302 of the mesa portion through a gap 9 in planar view. The relationship between a gap W1 in the convex-shaped tip portion 352b and a gap W2 in the base portion 352a is W1>W2. |
| US11309453B2 |
Combining light-emitting elements of differing divergence on the same substrate
An optoelectronic device includes a semiconductor substrate and a monolithic array of light-emitting elements formed on the substrate. The light-emitting elements include a first plurality of first emitters, configured to emit respective first beams of light with a first angular divergence, at respective first positions in the array, and a second plurality of second emitters, configured to emit respective second beams of light with a second angular divergence that is at least 50% greater than the first angular divergence, at respective second positions in the array. |
| US11309451B2 |
Flat panel detector and manufacturing method thereof
A flat panel detector and a manufacturing method thereof. The flat panel detector includes a first substrate and a second substrate. The first substrate includes a driving circuit, the second substrate includes a photosensitive element, the first substrate and the second substrate are arranged opposite to each other so as to be assembled, and the driving circuit is electrically connected with the photosensitive element to drive the photosensitive element. The flat panel detector not only can improve the filling rate of a photodiode in a pixel unit and increase the photosensitive area of the pixel unit in the flat panel detector, but also can effectively prevent static electricity and scratches generated during use and improve the photoelectric characteristics and yield of the flat panel detector. |
| US11309447B2 |
Separate absorption charge and multiplication avalanche photodiode structure and method of making such a structure
One illustrative photodiode disclosed herein includes an N-doped anode region, a P-doped cathode region and at least one P-doped charge region positioned laterally between the N-doped anode region and the P-doped cathode region. In this example, the photodiode also includes a plurality of quantum dots embedded within the at least one P-doped charge region and an N-doped impact ionization region positioned laterally between the N-doped anode region and the at least one P-doped charge region. |
| US11309445B2 |
Thin-film photovoltaic cell series structure and preparation process of thin-film photovoltaic cell series structure
A thin-film photovoltaic cell series structure is disposed on a display surface side of a display module and includes a transparent substrate, as well as a first single-junction cell and a second single-junction cell which are disposed on the transparent substrate and connected in series. The first single-junction cell includes a first front electrode, a first photovoltaic layer, and a first back electrode which are sequentially laminated and disposed on the transparent substrate, the second single-junction cell includes a second front electrode, a second photovoltaic layer, and a second back electrode which are sequentially laminated and disposed on the transparent substrate, and the first front electrode and the second back electrode are electrically connected through a metal auxiliary electrode to realize series connection of the first single-junction cell and the second single-junction cell. |
| US11309439B2 |
Package structure for semiconductor device, and semiconductor device
A package structure comprises a metal plate (20) where a slot is formed, a ceramic piece (60), and a metal heat sink (70) welded onto the back surface of the ceramic piece (60). The ceramic piece (60) and the metal heat sink (70) are vertically inserted into the slot and welded to the metal plate (20). A semiconductor and a matching circuit may be disposed on the metal heat sink (70). The ceramic piece (60) replaces a glass seal; metalized interconnection is provided inside the ceramic piece (60) for fabricating a metalized pattern having complex connection relations, and the electrical interconnection is more flexible. In the package structure, metalized wiring is carried out by using the ceramic piece. Compared with round lead machining, higher precision is achieved. |
| US11309435B2 |
Bandgap reference circuit including vertically stacked active SOI devices
Embodiments of the disclosure provide a bandgap reference circuit, including: first and second vertically stacked structures, the first and second vertically stacked structures each including: a P-type substrate; a P-well region within the P-type substrate; an N-type barrier region between the P-type substrate and the P-well region, the P-well region and the N-type barrier region forming a PN junction; a field effect transistor (FET) above the P-well region, separated from the P-well region by a buried insulator layer, the P-well region forming a back gate of the FET; and a first voltage source coupled to the P-well and applying a forward bias to a diode formed at the PN junction between the P-well region and the N-type barrier region. |
| US11309433B2 |
Non-volatile memory structure and manufacturing method thereof
A non-volatile memory structure including a substrate, a plurality of charge storage layers, a first dielectric layer, and a control gate is provided. The charge storage layers are located on the substrate. An opening is provided between two adjacent charge storage layers. The first dielectric layer is located on the charge storage layers and on a surface of the opening. A bottom cross-sectional profile of the first dielectric layer located in the opening is a profile that is recessed on both sides. The control gate is located on the first dielectric layer and fills the opening. |
| US11309429B2 |
Thin film transistor and display device including the same
A thin film transistor includes an active layer over a substrate, a gate electrode over the active layer, a gate line connected with the gate electrode, and a gate insulation film between the active layer and the gate electrode. The active layer includes a channel region overlapping the gate electrode, and a drain region and a source region on respective sides of the channel region. A length of a straight line connecting the drain region and the source region by a shortest distance may be greater than a width of the gate line parallel to the straight line. |
| US11309423B2 |
Fin field effect transistor (finFET) device structure and method for forming the same
A FinFET device structure and method for forming the same are provided. The FinFET device structure includes a first fin structure over a substrate, and a second fin structure over the substrate. The FinFET device structure also includes a first isolation structure over the substrate and surrounding the first fin structure. The first fin structure is protruded from a top surface of the first isolation structure. The FinFET device structure further includes a second isolation structure over the substrate and surrounding the second fin structure. The second fin structure is protruded from a top surface of the second isolation structure, and the first fin structure has a vertical sidewall surface and the second fin structure has a sloped sidewall surface. |
| US11309422B2 |
Semiconductor structure and method for forming the same
A semiconductor structure and a method for forming the same are provided. One form of the method includes: providing a base, where a channel stack and a tear-off structure span the channel stack being formed on the base, and the channel stack including a sacrificial layer and a channel layer; forming a groove in channel stacks on both sides of a gate structure; laterally etching the sacrificial layer exposed from the groove to form a remaining sacrificial layer; forming a source/drain doped region in the channel layer exposed from the remaining sacrificial layer; forming an interlayer dielectric layer on the base; etching the interlayer dielectric layer on one side of the source region to expose a surface of the channel layer corresponding to the source region; etching the interlayer dielectric layer on one side of the drain region to expose the surface of the channel layer corresponding to the drain region; forming a first metal silicide layer on a surface of the channel layer corresponding to the source region; forming a second metal silicide layer on a surface of the channel layer corresponding to the drain region; forming a first conductive plug covering the first metal silicide layer and a second conductive plug covering the second metal silicide layer. In the present disclosure, contact resistance of the first conductive plug, the second conductive plug, and the source/drain doped region is reduced. |
| US11309421B2 |
Semiconductor devices
A semiconductor device includes channels, a gate structure, and a source/drain layer. The channels are disposed at a plurality of levels, respectively, and spaced apart from each other in a vertical direction on an upper surface of a substrate. The gate structure is disposed on the substrate, at least partially surrounds a surface of each of the channels, and extends in a first direction substantially parallel to the upper surface of the substrate. The source/drain layer is disposed at each of opposite sides of the gate structure in a second direction substantially parallel to the upper surface of the substrate and substantially perpendicular to the first direction and is connected to sidewalls of the channels. A length of the gate structure in the second direction changes along the first direction at a first height from the upper surface of the substrate in the vertical direction. |
| US11309420B2 |
Semiconductor device and fabrication method thereof
The present disclosure provides a semiconductor device and a fabrication method. The method includes: providing a substrate having fins and forming an initial gate structure across the fins, which covers a portion of a top surface and sidewall surfaces of the fins, and includes an initial first region and an initial second region on the initial first region. A bottom boundary of the initial second region is higher than the top surface of the fins, and a size of the initial first region is larger than a size of the initial second region. A first etching process is performed on sidewalls of the initial gate structure to form a gate structure, which includes a first region formed by etching the initial first region, and a second region formed by etching the initial second region. A size of the first region is smaller than a size of the second region. |
| US11309417B2 |
Method of manufacturing a semiconductor device and a semiconductor device
In a method of manufacturing a semiconductor device, an opening is formed in an interlayer dielectric layer such that a source/drain region is exposed in the opening. A first semiconductor layer is formed to fully cover the exposed source/drain region within the opening. A heating process is performed to make an upper surface of the first semiconductor layer substantially flat. A conductive contact layer is formed over the first semiconductor layer. |
| US11309416B2 |
Semiconductor device
A drift layer has a first conductivity type. A well region has a second conductivity type. A well contact region has a resistivity lower than that of the well region. A source contact region is provided on the well region, separated from the drift layer by the well region, and has the first conductivity type. A source resistance region is provided on the well region, separated from the drift layer by the well region, is adjacent to the source contact region, has the first conductivity type, and has a sheet resistance higher than that of the source contact region. A source electrode contacts the source contact region, the well contact region, and the source resistance region, and is continuous with the channel at least through the source resistance region. |
| US11309415B2 |
Wide gap semiconductor device
A wide gap semiconductor device has: a first MOSFET region (M0) having a first gate electrode 10 and a first source region 30 provided in a first well region 20 made of a second conductivity type; a second MOSFET region (M1) provided below a gate pad 100 and having a second gate electrode 110 and a second source region 130 provided in a second well region 120 made of the second conductivity type; and a built-in diode region electrically connected to the second gate electrode 110. The second source region 130 of the second MOSFET region (M1) is electrically connected to the gate pad 100. |
| US11309413B2 |
Semiconductor device with improved short circuit withstand time and methods for manufacturing the same
A semiconductor device includes a substrate, a drift layer, a well region, and a source region. The substrate has a first conductivity type. The drift layer has the first conductivity type and is on the substrate. The well region has a second conductivity type opposite the first conductivity type and provides a channel region. The source region is in the well region and has the first conductivity type. A doping concentration of the well region along a surface of the drift layer opposite the substrate is variable such that the well region includes a region of increased doping concentration at a distance from a junction between the source region and the well region. |
| US11309412B1 |
Shifting the pinch-off voltage of an InP high electron mobility transistor with a metal ring
A high electron mobility transistor (HEMT) device comprising a substrate, a plurality of semiconductor layers provided on the substrate, and a source terminal, a drain terminal and at least one gate terminal provided on the plurality of semiconductor layers. The HEMT also includes a metal ring formed on the plurality of semiconductor layers around the source terminal, the drain terminal and the at least one gate terminal, where the metal ring operates to shift the pinch-off voltage of the device. In one embodiment, the metal ring includes an ohmic portion and an electrode portion, where both the ohmic portion and the electrode portion include a lower titanium layer, a middle platinum layer and an upper gold layer. |
| US11309409B2 |
Pseudo Schottky diode
This disclosure relates to a semiconductor device and corresponding method of manufacturing the semiconductor device. The semiconductor device includes a MOS transistor device die and a SiGe diode. The SiGe diode is integrally arranged on the MOS transistor device die, so that the SiGe diode is electrically connected between a source connection and drain connection of the MOS transistor device die. |
| US11309406B2 |
Method of manufacturing an LDMOS device having a well region below a groove
A manufacturing method of an LDMOS device comprises: obtaining a wafer formed with a doped region having a first conductivity type, wherein a top buried layer is formed inside the doped region having the first conductivity type, and a field oxide insulation layer structure is formed on the top buried layer; disposing a trench on the doped region having the first conductivity type, wherein the trench extends to the top buried layer and the field oxide insulation layer structure such that a portion of the top buried layer is removed; injecting an ion of a second conductivity type to form a well region below the trench; and forming a doped source region in the well region. The first conductivity type and the second conductivity type are opposite conductivity types. |
| US11309403B2 |
Fin field-effect transistor device and method of forming the same
A method of forming a semiconductor device includes: forming a fin protruding above a substrate; forming isolation regions on opposing sides of the fin; forming a dummy gate electrode over the fin; removing lower portions of the dummy gate electrode proximate to the isolation regions, where after removing the lower portions, there is a gap between the isolation regions and a lower surface of the dummy gate electrode facing the isolation regions; filling the gap with a gate fill material; after filling the gap, forming gate spacers along sidewalls of the dummy gate electrode and along sidewalls of the gate fill material; and replacing the dummy gate electrode and the gate fill material with a metal gate. |
| US11309396B2 |
Semiconductor device and manufacturing method thereof
A semiconductor device includes a first device formed over a substrate. The first device includes a first gate stack encircling a first nanostructure, and the first device is a logic circuit device. The semiconductor device includes a second device formed over the first device. The second device includes a second gate stack encircling a second nanostructure, and the second device is a static random access memory (SRAM). |
| US11309395B2 |
1.5T SONOS memory structure and manufacturing method
The present invention provides a 1.5T SONOS memory structure and a manufacturing method, comprises a P-well and a storage well on its side, gates of a select transistor and a storage transistor; the height of the select transistor gate is less than the height of the storage transistor gate, an stack layer is between the gats of the select transistor and the storage transistor which height is same as the storage transistor gate; the top of the select transistor gate has a first sidewall; the sidewall of the select transistor gate has a second sidewall. The present invention strengthens the isolation between the gates of the select transistor and the storage transistor, reduces the risk of current leakage, enables the metal silicide to also grow on the gate of the select transistor, reduces the resistance of the select transistor and improves the performance of the device. |
| US11309394B2 |
Semiconductor memory device, memory system, and defect detection method
A semiconductor memory device includes: a first wiring and a second wiring; a first selection transistor, a memory transistor, and a second selection transistor connected between the first wiring and the second wiring; and a third wiring and a fourth wiring connected to gate electrodes of the first selection transistor and the second selection transistor. From a first timing to a second timing, a first voltage that turns the first selection transistor ON is supplied to the third wiring, and a second voltage that turns the second selection transistor OFF is supplied to the fourth wiring. From the second timing to a third timing, a third voltage that turns the first selection transistor OFF is supplied to the third wiring, and at a fourth timing between the first timing and the third timing, at least one of a voltage and a current of the first wiring is detected. |
| US11309386B2 |
Semiconductor device
Each of a plurality of IGBT cells includes an n base layer formed in a semiconductor layer, a p base layer formed in a surface portion of the n base layer on a side of the first main surface, an n emitter layer formed in a surface portion of the p base layer, and a p collector layer formed in a surface portion of the semiconductor layer on a side of the second main surface. On a first main surface of the semiconductor layer, a gate electrode and an emitter electrode are formed. On a second main surface of the semiconductor layer, a collector electrode is formed. A pitch of the plurality of IGBT cells is 1/40 or more and 1/20 or less of a distance between the p base layer and the p collector layer. |
| US11309385B2 |
Strained nanowire CMOS device and method of forming
Transistor structures and methods of forming transistor structures are provided. The transistor structures include alternating layers of a first epitaxial material and a second epitaxial material. In some embodiments, one of the first epitaxial material and the second epitaxial material may be removed for one of an n-type or p-type transistor. A bottommost layer of the first epitaxial material and the second epitaxial material maybe be removed, and sidewalls of one of the first epitaxial material and the second epitaxial material may be indented or recessed. |
| US11309384B2 |
Super junction semiconductor device and method of manufacturing the same
A super junction semiconductor device includes a substrate having a first conductive type, a blocking layer positioned on the substrate, the blocking layer including first conductive type pillars and second conductive type pillars, each extending in a vertical direction and arranging alternatively in a horizontal direction, and a gate structure disposed on the blocking layer, the gate structure extending in the horizontal direction and being electrically connected to ones of the first and second conductive type pillars. Thus, oscillation phenomena may be suppressed. |
| US11309383B1 |
Quad-layer high-k for metal-insulator-metal capacitors
A semiconductor structure, and a method of making the same includes a multiple electrode stacked capacitor containing a sequence of first metal layers interleaved with second metal layers. A quad-layer stack separates each of the first metal layers from each of the second metal layers, the quad-layer dielectric stack includes a first dielectric layer made of Al2O3, a second dielectric layer made of HfO2, a third dielectric layer made of Al2O3, and a fourth dielectric layer made of HfO2. |
| US11309382B2 |
Electronic product comprising a component having triskelion-pillars, and corresponding fabrication method
An electronic product that includes a component having a first electrode with a first surface and a pillar extending from the first surface in a first direction, the pillar having three protrusions, the three protrusions forming angles of about 120 degrees with each other around a central line of the pillar where the three protrusions meet, and the three protrusions being bent so that the pillar has a triskelion cross-section in a plane perpendicular to the first direction. |
| US11309381B2 |
Liquid crystal display device
A display device having a display region and a peripheral region in contact with the display region above a substrate is provided. The display region has a plurality of pixels each including a transistor, an insulating film above the transistor, a pixel electrode arranged above the insulating film and electrically connected to the transistor, and a common electrode above the insulating film, a video signal line and a gate signal line electrically connected to the transistor, and liquid crystal layer above the plurality of pixels. The peripheral region has a terminal electrically connected to the video signal line, a wiring arranged parallel to the gate wiring between the display region and the terminal, and a plurality of first electrodes above the wiring. The insulating film covers the wiring, and the wiring is electrically connected to the plurality of first electrodes via an opening in the insulating film. |
| US11309379B2 |
Organic light emitting diode display device including a power supply wire
An organic light emitting diode display includes a lower substrate, a sub-pixel structure, an upper substrate, a sealant, and a first power supply wire. The lower substrate has a display area, a peripheral area, and a pad area. The sub-pixel structure is disposed in the display area on the lower substrate. The upper substrate is disposed on the sub-pixel structure. The sealant is disposed in the peripheral area between the lower substrate and the upper substrate. The first power supply wire is disposed between the lower substrate and the sealant, and overlaps the lower substrate and the sealant. The first power supply wire includes a first protrusion protruding in a first direction that is a direction from the pad area to the display area in the first peripheral area. |
| US11309378B2 |
Method of manufacturing flexible display
A method of manufacturing flexible display is disclosed. The method includes the steps of: providing a substrate, wherein the substrate includes a display area and a bending area; forming an inorganic layer on the substrate; etching the inorganic layer of the bending area of the substrate, and replacing the inorganic layer with a first organic layer; forming a metal wiring layer on the first organic layer; patterning the metal wiring layer; and forming a second organic layer on the metal wiring layer. By utilizing the method of manufacturing flexible display, the risk of metal wiring peeling and cracking during the bending process of the flexible display is reduced. |
| US11309376B2 |
Display device
A display device is disclosed that includes one or more crack detection units. The crack detection units can detect a crack position in the display device without requiring the disassembly of the display device. The crack detection units may be disposed across one or more non-active areas of the display device. |
| US11309373B2 |
Display device and method of manufacturing the same
A display device includes: a pixel at a display region. The pixel includes: a light-emitting element connected between a first power source and a second power source; and a first transistor connected between the first power source and the light-emitting element, the first transistor to control a driving current of the light-emitting element in response to a voltage of a first node. The first transistor includes a first driving transistor and a second driving transistor that are connected in series with each other between the first power source and the light-emitting element, and the first driving transistor and the second driving transistor have structures that are asymmetric with each other in a cross-sectional view. |
| US11309369B2 |
Display apparatus
Provided is a display apparatus including a substrate having a display area including a main pixel, and a sensor area including a sub-pixel and a transmission portion, a plurality of first lines arranged in the sensor area, extending in a first direction, and bypassing the transmission portion, and a first electrode layer under the plurality of first lines, between the sub-pixel and the transmission portion, and at least partially overlapping a spacing region between the plurality of first lines. |
| US11309366B2 |
Resistive touch screen, organic light emitting diode display, and manufacturing method thereof
A resistive touch screen includes: a cover plate; conductive traces formed on the cover plate; a carbon resistance layer printed on the cover plate between the conductive traces, wherein the conductive traces are electrically connected to the carbon resistance layer to form an inductive resistive layer, and a resistance value can be changed by external pressure to achieve touch control. |
| US11309365B2 |
Optical fingerprint sensor and display module
The present disclosure provides an optical fingerprint sensor and a display module. The optical fingerprint sensor includes a photodiode and a switching thin film transistor connected to the photodiode, in which the photodiode includes a first electrode made of a light-absorbing conductive nano-material; the first electrode is located in a same layer as a second electrode of the switching thin film transistor, and the first electrode includes a light-entering end surface facing a light-entering side and a side surface connected to the light-entering end surface, the side surface includes a curved portion, and the second electrode is at least connected to the curved portion. |
| US11309361B2 |
Display device having reduced mixture of colors between neighboring pixels
A display device includes a substrate including a plurality of light-emitting devices, a first color filter, a second color filter, and a third color filter that overlap one of the light-emitting devices, and a first color converting layer that overlaps the first color filter, a second color converting layer that overlaps the second color filter, and a transmission layer that overlaps the third color filter. A plurality of the first color filters, a plurality of the second color filters, and a plurality of the third color filters are arranged in a first direction. A gap between adjacent second color filters in a second direction overlaps the first color filter in the first direction. |
| US11309355B2 |
Display device
The present disclosure provides a display device including a cathode electrode, a first anode electrode, a second anode electrode, a first light emitting layer, a first light conversion layer, a second light emitting layer, a second light conversion layer and an auxiliary electrode. The first light emitting layer is disposed between the cathode electrode and the first anode electrode. The first light conversion layer is disposed above the first light emitting layer. The second light emitting layer is disposed between the cathode electrode and the second anode electrode. The second light conversion layer is disposed above the second light emitting layer. The auxiliary electrode is electrically connected to the cathode electrode, and a portion of the auxiliary electrode is between the first light conversion layer and the second light conversion layer in a top view direction of the display device. |
| US11309353B2 |
Spacer-defined back-end transistor as memory selector
The present disclosure, in some embodiments, relates to a memory device. In some embodiments, the memory device comprises a substrate and an interconnect structure disposed over the substrate. The interconnect structure comprises stacked interconnect metal layers disposed within stacked interlayer dielectric (ILD) layers. A memory cell is disposed between an upper interconnect metal layer and an intermediate interconnect metal layer. A selecting transistor is connected to the memory cell and disposed between the intermediate interconnect metal layer and a lower interconnect metal layer. By placing the selecting transistor within the back-end interconnect structure between two interconnect metal layers, front-end space is saved, and more integration flexibility is provided. |
| US11309351B2 |
Micro light-emitting diode and manufacturing method of micro light-emitting diode
A micro light-emitting diode includes a first micro light-emitting diode including a first light-emitting layer and emitting light at a first wavelength, and a second micro light-emitting diode including the first light-emitting layer and a second light-emitting layer emitting light at a second wavelength longer than the first wavelength, in which the second light-emitting layer is a nitride semiconductor layer doped with a second rare earth element, and a nitride semiconductor of the first micro light-emitting diode and the nitride semiconductor of the second micro light-emitting diode are separated from each other. |
| US11309344B2 |
Imaging device, solid state image sensor, and electronic device
To suppress generation of flare and ghosts. A solid state image sensor includes: a pixel array configured to generate a pixel signal according to an amount of incident light by photoelectric conversion in units of pixels arranged in an array manner; a glass substrate bonded with a light-receiving surface of the pixel array; and a light-shielding film formed on a peripheral portion that is an outside of an effective pixel region of the pixel array, in which the light-shielding film is formed at a front stage of the glass substrate. The present disclosure can be adapted to an imaging device. |
| US11309342B2 |
Dummy vertical transistor structure to reduce cross talk in pixel sensor
Various embodiments of the present disclosure are directed towards a pixel sensor including a dummy vertical transistor structure underlying a photodetector. The pixel sensor includes a substrate having a front-side surface opposite a back-side surface. The photodetector is disposed within the substrate. A deep trench isolation (DTI) structure extends from the back-side surface of the substrate to a first point below the back-side surface. The DTI structure wraps around an outer perimeter of the photodetector. The dummy vertical transistor structure is laterally spaced between inner sidewalls of the DTI structure. The dummy vertical transistor structure includes a dummy vertical gate electrode having a dummy conductive body and a dummy embedded conductive structure. The dummy embedded conductive structure extends from the front-side surface of the substrate to a second point vertically above the first point and the dummy conductive body extends along the front-side surface of the substrate. |
| US11309332B2 |
Three-dimensional memory device containing ferroelectric memory elements encapsulated by transition metal-containing conductive elements and method of making thereof
A three-dimensional ferroelectric memory device includes an alternating stack of insulating layers and electrically conductive layers located over a substrate, where each of the electrically conductive layers contains a transition metal element-containing conductive liner and a conductive fill material portion, a vertical semiconductor channel extending vertically through the alternating stack, a vertical stack of tubular transition metal element-containing conductive spacers laterally surrounding the vertical semiconductor channel and located at levels of the electrically conductive layers, and a ferroelectric material layer located between the vertical stack of tubular transition metal element-containing conductive spacers and the transition metal element-containing conductive liner. |
| US11309330B2 |
Semiconductor device and manufacturing method of the semiconductor device
A semiconductor device includes: a stack structure including insulating layers and conductive layers, which are alternately stacked; a channel structure penetrating the stack structure; data storage patterns respectively interposed between the conductive layers and the channel structure; blocking patterns respectively interposed between the conductive layers and the data storage patterns; insulating patterns respectively interposed between the insulating layers and the channel structure; and insulative liners interposed between the insulating layers and the insulating patterns, the insulative liners respectively surrounding the insulating patterns. |
| US11309329B2 |
Three-dimensional NOR-type memory device and method of making the same
A NOR-type three-dimensional memory device includes a vertically alternating stack of insulating layers and electrically conductive layers located over a substrate, and laterally alternating sequences of respective active region pillars and respective memory stack structures. Each laterally alternating sequence is electrically isolated from the electrically conductive layers by a respective blocking dielectric layer at each level of the electrically conductive layers. Each memory stack structures include a memory film and a semiconductor channel material portion that vertically extend through the vertically alternating stack. The active region pillars include an alternating sequence of source pillar and drain pillars. |
| US11309324B2 |
Compact memory cell with a shared conductive word line and methods of making such a memory cell
An illustrative device disclosed herein includes a first memory cell comprising a first memory gate positioned above an upper surface of a semiconductor substrate and a second memory cell comprising a second memory gate positioned above the upper surface of the semiconductor substrate. In this example, the device also includes a conductive word line structure positioned above the upper surface of the semiconductor substrate between the first and second memory gates, wherein the conductive word line structure is shared by the first and second memory cells. |
| US11309323B2 |
Three-dimensional memory devices with drain select gate cut and methods for forming the same
Embodiments of 3D memory devices and methods for forming the same are disclosed. In an example, a 3D memory device includes a memory stack and a plurality of memory strings. The memory stack includes interleaved conductive layers and dielectric layers. Each memory string extends vertically through the memory stack. The plurality of memory strings are divided into a plurality of regions of the memory stack in a plan view. The conductive layers include one or more drain select gate (DSG) lines configured to control drains of the plurality of memory strings. The numbers of the DSG lines are different among the plurality of regions. Each of the plurality of memory strings has a nominally same height. |
| US11309322B2 |
Semiconductor memory device
A semiconductor memory device according to an embodiment includes a semiconductor substrate; a laminated body formed by laminating a plurality of electrode layers on the semiconductor substrate; a memory film provided in the laminated body and including a first block insulation film disposed in a direction perpendicular to the electrode layer, a charge storage film facing the first block insulation film, a tunnel insulation film facing the charge storage film, and a channel film facing the tunnel insulation film; and a barrier layer provided at at least one of interface between the plurality of electrode layers and the memory film and an interface in the memory film and mainly composed of carbon. |
| US11309321B2 |
Integrated structures containing vertically-stacked memory cells
Some embodiments include an integrated structure having a stack of alternating dielectric levels and conductive levels, and having vertically-stacked memory cells within the conductive levels. An opening extends through the stack. Channel material is within the opening and along the memory cells. At least some of the channel material contains germanium. |
| US11309320B2 |
Semiconductor storage device
A nonvolatile memory cell using vertical nanowire (VNW) FETs includes a program element of which a gate is connected to a word line, and a switch element that is provided between the program element and a bit line and of which a gate is connected to the word line. The program element and the switch element are each constituted by one or a plurality of VNW FETs, and these VNW FETs are arranged in a line in a first direction. |
| US11309316B1 |
Semiconductor device with single step height and method for fabricating the same
The present application discloses a semiconductor device and a method for fabricating the semiconductor device. The method for fabricating the semiconductor device includes providing a substrate including an array area and a peripheral area adjacent to the array area, forming word line structures and source/drain regions in the array area, and a word line protection layer on the array area, forming a first hard mask layer over the substrate and having a step height adjacent to a border between the array area and the peripheral area, forming a bit line contact in the array area and between the word line structures by using the first hard mask layer as a pattern guide, and forming a gate electrode layer on the peripheral area. |
| US11309315B2 |
Digit line formation for horizontally oriented access devices
Systems, methods, and apparatuses are provided for digit line formation for horizontally oriented access devices. One example method includes forming layers of a first dielectric material, a low doped semiconductor material, and a second dielectric material, in repeating iterations vertically to form a vertical stack, forming a vertical opening in the vertical stack, selectively etching the second dielectric material to form a horizontal opening in the second dielectric material, gas phase doping a dopant on a top surface of the low doped semiconductor material in the horizontal opening to form a source/drain region, forming a high doped semiconductor material in the horizontal opening, selectively etching the high doped semiconductor material formed in the horizontal opening such that a portion of the high doped semiconductor material remains, and converting the remaining high doped semiconductor material to a conductive material having a different characteristic from the remaining high doped semiconductor material. |
| US11309314B2 |
Array of capacitors and method used in forming an array of capacitors
A method used in forming an array of capacitors comprises forming an array of vertically-elongated first capacitor electrodes that project vertically relative to an outer surface. An insulative ring is formed circumferentially about individual vertically-projecting portions of the first capacitor electrodes. The insulative rings about immediately-adjacent of the first capacitor electrodes in a first straight-line direction are laterally directly against one another. The insulative rings about immediately-adjacent of the first capacitor electrodes in a second straight-line direction that is angled relative to the first straight-line direction are laterally-spaced from one another. A capacitor insulator is formed over sidewalls of the first capacitor electrodes. At least one second capacitor electrode is formed over the capacitor insulator. Additional methods, including structure independent of method, are disclosed. |
| US11309312B2 |
Semiconductor device
The present application discloses a semiconductor device and a method for fabricating the semiconductor device. The semiconductor device includes a substrate including a center area and a peripheral area surrounding the center area, a first gate stack positioned on the peripheral area of the substrate, and an active column positioned in the center area of the substrate. A top surface of the first gate stack and a top surface of the active column are at a same vertical level. |
| US11309311B2 |
Methods of resistance and capacitance reduction to circuit output nodes
An integrated circuit is disclosed, including a first conductive pattern and a second conductive pattern that are disposed in a first layer and extend in a first direction, at least one first conductive segment disposed in a second layer different from the first layer, and at least one via disposed between the first layer and the second layer. The at least one via is coupled between the at least one first conductive segment and one or both of the first conductive pattern and the second conductive pattern, at an output node of the integrated circuit. The at least one via comprises a tapered shape with a width that decreases from a first width to a second width narrower than the first width. The first width of the at least one via is greater than widths of the first conductive pattern and the second conductive pattern. |
| US11309305B2 |
Optical systems fabricated by printing-based assembly
Provided are optical devices and systems fabricated, at least in part, via printing-based assembly and integration of device components. In specific embodiments the present invention provides light emitting systems, light collecting systems, light sensing systems and photovoltaic systems comprising printable semiconductor elements, including large area, high performance macroelectronic devices. Optical systems of the present invention comprise semiconductor elements assembled, organized and/or integrated with other device components via printing techniques that exhibit performance characteristics and functionality comparable to single crystalline semiconductor based devices fabricated using conventional high temperature processing methods. Optical systems of the present invention have device geometries and configurations, such as form factors, component densities, and component positions, accessed by printing that provide a range of useful device functionalities. Optical systems of the present invention include devices and device arrays exhibiting a range of useful physical and mechanical properties including flexibility, shapeability, conformability and stretchablity. |
| US11309304B2 |
Stackable electronic package and method of fabricating same
An electronic package includes a first layer having a first surface, the first layer includes a first device having a first electrical node, and a first contact pad in electrical communication with the first electrical node and positioned within the first surface. The package includes a second layer having a second surface and a third surface, the second layer includes a first conductor positioned within the second surface and a second contact pad positioned within the third surface and in electrical communication with the first conductor. A first anisotropic conducting paste (ACP) is positioned between the first contact pad and the first conductor to electrically connect the first contact pad to the first conductor such that an electrical signal may pass therebetween. |
| US11309302B2 |
Manufacturing method of semiconductor package including thermal conductive block
Manufacturing method of semiconductor package includes following steps. Bottom package is provided. The bottom package includes a die and a redistribution structure electrically connected to die. A first top package and a second top package are disposed on a surface of the redistribution structure further away from the die. An underfill is formed into the space between the first and second top packages and between the first and second top packages and the bottom package. The underfill covers at least a side surface of the first top package and a side surface of the second top package. A hole is opened in the underfill within an area overlapping with the die between the side surface of the first top package and the side surface of the second top package. A thermally conductive block is formed in the hole by filling the hole with a thermally conductive material. |
| US11309301B2 |
Stacked die assembly including double-sided inter-die bonding connections and methods of forming the same
Multiple bonded units are provided, each of which includes a respective front-side die and a backside die. The two dies in each bonded unit may be a memory die and a logic die configured to control operation of memory elements in the memory die. Alternatively, the two dies may be memory dies. The multiple bonded units can be attached such that front-side external bonding pads have physically exposed surfaces that face upward and backside external bonding pads of each bonded unit have physically exposed surfaces that face downward. A first set of bonding wires can connect a respective pair of front-side external bonding pads, and a second set of bonding wires can connect a respective pair of backside external bonding pads. |
| US11309298B2 |
Light-emitting diode device with driving mechanism
A light-emitting diode device with a driving mechanism is provided. A first light-emitting diode chip, a second light-emitting diode chip and a third light-emitting diode chip are arranged on a driver circuit chip, and respectively configured to emit red light, green light and blue light. A first contact of the light-emitting diode chip, a first contact of the second light-emitting diode chip and a first contact of the third light-emitting diode chip are respectively in direct electrical contact with a first output contact, a second output contact and a third output contact of the driver circuit chip in a flip-chip manner. A second contact of the first light-emitting diode chip, a second contact of the second light-emitting diode chip and a second contact of the third light-emitting diode chip are in direct electrical contact with a common contact of the driver circuit chip. |
| US11309295B2 |
Semiconductor device package
A semiconductor device package includes a first passive component having a first surface and a second passive component having a second surface facing the first surface of the first passive component. The first surface has a recessing portion and the second surface includes a protruding portion within the recessing portion of the first surface of the first passive component. A contour of the protruding portion and a contour of the recessing portion are substantially matched. A method of manufacturing a semiconductor device package is also disclosed. |
| US11309293B2 |
Backlight module and manufacturing method thereof, and display device
The present disclosure provides a backlight module, a manufacturing method thereof, and a display device. The backlight module including a substrate, a plurality of LED chips disposed on the substrate, a plurality of encapsulation units encapsulating the LED chips in a one-to-one correspondence; each of the encapsulation units includes at least two encapsulation layers, an innermost one of the encapsulation layers completely covers the LED chip, and a refractive index of an encapsulation layer far from the LED chip is less than a refractive index of an encapsulation layer near the LED chip. |
| US11309290B2 |
Semiconductor apparatus including penetration electrodes connecting laminated semiconductor chips
A semiconductor apparatus according to an embodiment of the present invention includes: a plurality of semiconductor chips that are laminated; and a plurality of penetration electrodes that penetrate in a lamination direction through the plurality of semiconductor chips and that electrically connect together the plurality of semiconductor chips, wherein a semiconductor chip has at least one sub-memory array, and a penetration electrode penetrates through an outer circumferential part of the sub-memory array. |
| US11309289B2 |
Integrated circuit package having heat dissipation structure
A package and a method of forming the same are provided. A method includes forming a first die structure. The first die structure includes a die stack and a stacked dummy structure bonded to a carrier. A second die structure is formed. The second die structure includes a first integrated circuit die. The first die structure is bonded to the second die structure by bonding a topmost integrated circuit die of the die stack to the first integrated circuit die. The topmost integrated circuit die of the die stack is a farthest integrated circuit die of the die stack from the carrier. A singulation process is performed on the first die structure to form a plurality of individual die structures. The singulation process singulates the stacked dummy structure into a plurality of individual stacked dummy structures. |
| US11309288B2 |
Electronic system, die assembly and device die
The present disclosure provides a device die, a die assembly and an electronic system. The device die includes a package and a plurality of transfer pads disposed on a functional surface of the package. The transfer pads are divided into a plurality of segments electrically isolated from each other. In an adjacent pair of transfer pads, there is only one electrical connection between the transfer pads, comprising one segment in one transfer pad electrically connected to one segment in the other transfer pad. The die assembly includes a pair of device dies stacked in a stepped configuration. The electronic system includes a supporting member having at least one metallic layer, and a plurality of device dies disposed on the supporting member and mechanically and electrically coupled to the metallic layer by a plurality of conductive strings. |
| US11309287B2 |
RF devices with enhanced performance and methods of forming the same
The present disclosure relates to a radio frequency device that includes a transfer device die and a multilayer redistribution structure underneath the transfer device die. The transfer device die includes a device region with a back-end-of-line (BEOL) portion and a front-end-of-line (FEOL) portion over the BEOL portion and a transfer substrate. The FEOL portion includes isolation sections and an active layer surrounded by the isolation sections. A top surface of the device region is planarized. The transfer substrate including a porous silicon (PSi) region resides over the top surface of the device region. Herein, the PSi region has a porosity between 1% and 80%. The multilayer redistribution structure includes a number of bump structures, which are at a bottom of the multilayer redistribution structure and electrically coupled to the FEOL portion of the transfer device die. |
| US11309286B2 |
Stack packages including a hybrid wire bonding structure
A stack package includes first and second sub-chip stacks stacked on a package substrate and bonding wires. The first sub-chip stack includes first and second sub-chips. The first sub-chip has a first surface on which a first common pad is disposed. The second sub-chip has a third surface on which a second common pad is disposed. The third surface is bonded to the first surface such that the second common pad is bonded to the first common pad. The second sub-chip includes a fourth surface opposite to the second common pad and a through hole extending from the fourth surface to reveal the second common pad. The bonding wire is connected to the second common pad via the through hole and electrically connects both of the first and second common pads to the package substrate. |
| US11309283B2 |
Packaging structure and manufacturing method thereof
A packaging structure includes a bridge die, a through silicon via die, a first encapsulant, a first active die, a second active die, a second encapsulant, and a redistribution circuit structure. The first encapsulant covers the through silicon via die and the bridge die. The first active die is electrically connected to the bridge die and the through silicon via die. The second active die is electrically connected to the bridge die. The second encapsulant covers the first active die and the second active die. The redistribution circuit structure is electrically connected to the through silicon via die. The through silicon via die is disposed between the first active die and the redistribution circuit structure. A manufacturing method of a packaging structure is also provided. |
| US11309277B2 |
Chip assembling on adhesion layer or dielectric layer, extending beyond chip, on substrate
Electronic module, which comprises a first substrate, a first dielectric layer on the first substrate, at least one electronic chip, which is mounted with a first main surface directly or indirectly on partial region of the first dielectric layer, a second substrate over a second main surface of the at least one electronic chip, and an electrical contacting for the electric contact of the at least one electronic chip through the first dielectric layer, wherein the first adhesion layer on the first substrate extends over an area, which exceeds the first main surface. |
| US11309276B2 |
Semiconductor module
A semiconductor module includes a case with a side wall in a first direction in which gate and source terminals are embodied and exposed therefrom, first and second semiconductor elements each having gate and source electrodes, gate and source relay layers positioned at a center between the first and second semiconductor elements in the first direction at a side of the semiconductor elements farther from the side wall, first gate and source wires respectively connecting the gate and source terminals to the gate and source relay layers, second gate and source wires, and third gate and source wires, respectively connecting the gate and source electrodes of the first semiconductor element, and the gate and source electrode of the second semiconductor element, to the gate and source relay layers. The first to third source wires are respectively located closer to the first to third gate wires than any other gate wires. |
| US11309272B2 |
Adhesive attaching apparatus, method of manufacturing display device using the same, and display device manufactured by the same
A method of manufacturing a display device, includes: providing an adhesive tape including: an adhesive conductive layer on a base film, a cutting width corresponding to a width of an adhesive tape attaching area of a substrate and provided in plurality including cutting widths adjacent to each other along the base film, and an interval between the cutting widths adjacent to each other; within the interval, providing a plurality of half-cuts in the adhesive tape, to provide a multi-cut adhesive tape; and pressing the multi-cut adhesive tape to the substrate, at a first portion of the multi-cut adhesive tape which corresponds to the cutting width, to separate the first portion of the multi-cut adhesive tape from the base film and attach the first portion of the multi-cut adhesive tape to the substrate at the adhesive tape attaching area thereof. |
| US11309271B2 |
Chip structure and manufacturing method thereof
A chip structure includes a first substrate, a second substrate, a conductive via, and a redistribution layer. The first substrate has a first inclined sidewall. The second substrate is located on a bottom surface of the first substrate, and has an upper portion and a lower portion. The lower portion extends from the upper portion. The upper portion is between the first substrate and the lower portion. The upper portion has a second inclined sidewall, and a slope of the first inclined sidewall is substantially equal to a slope of the second inclined sidewall. The conductive via is in the lower portion. The redistribution layer extends from a top surface of the first substrate to a top surface of the lower portion of the second substrate sequentially along the first inclined sidewall and the second inclined sidewall, and is electrically connected to the conductive via. |
| US11309269B2 |
Method for producing a solder bump on a substrate surface
A serigraphy method for producing a soulder bump on the front surface of a substrate includes: forming a film on the front surface, forming an opening in the film, filling the opening with a souldering material, and removing the film. Forming a film on the front surface is preceded by the formation of an intermediate layer between the film and the front surface, the intermediate layer being adapted to exhibit a force of adherence at one and/or the other interface formed with the first front surface and the film lower than the force of adherence that can be formed between the film and the first front surface. |
| US11309267B2 |
Semiconductor device including uneven contact in passivation layer and method of manufacturing the same
Provided is a semiconductor device including a substrate, a passivation layer, and a connector. The passivation layer is disposed on the substrate. The connector is embedded in the passivation. An interface of the connector in contact with the passivation layer is uneven, thereby improving the structural stability of the connector. A method of manufacturing the semiconductor is also provided. |
| US11309261B2 |
Enhanced bonding between III-V material and oxide material
When III-V semiconductor material is bonded to an oxide material, water molecules can degrade the bonding if they become trapped at the interface between the III-V material and the oxide material. Because water molecules can diffuse readily through oxide material, and may not diffuse as readily through III-V material or through silicon, forcing the III-V material against the oxide material can force water molecules at the interface into the oxide material and away from the interface. Water molecules present at the interface can be forced during manufacturing through vertical channels in a silicon layer into a buried oxide layer thereby to enhance bonding between the III-V material and the oxide material. Water molecules can be also forced through lateral channels in the oxide material, past a periphery of the III-V material, and, through diffusion, out of the oxide material into the atmosphere. |
| US11309260B2 |
Chip on film structure and display device
A chip on film structure and a display device including chip on film structure, the chip on film structure including a film substrate including a body area, a plurality of traces, and a bonding area at opposite ends of the film substrate; at least one chip, the chip disposed in the body area through bonding and electrically connected to the display panel through the plurality of traces and the bonding area; and a guiding member disposed at one end of the film substrate connected to the display panel and covering the bonding area. |
| US11309255B2 |
Very thin embedded trace substrate-system in package (SIP)
A system in package is provided comprising an embedded trace substrate having redistribution layers therein, at least one passive component mounted on one side of the embedded trace substrate and embedded in a first molding compound, at least one silicon die mounted on an opposite side of the embedded trace substrate and embedded in a second molding compound wherein electrical connections are made between the at least one silicon die and the at least one passive component through the redistribution layers, and solder balls mounted through openings in the second molding layer to the redistribution layers wherein the solder balls provide package output. |
| US11309251B2 |
Selective metallization of integrated circuit packages
The disclosed technology generally relates to metallization of substrates, and more particularly to selective metallization of ceramic substrates. A method of selectively metallizing a substrate includes forming a base metal layer comprising a refractory metal on a substrate, forming a base nickel (Ni) layer over the base metal layer by a vapor phase process, forming a palladium (Pd) layer on the base Ni layer by electroless plating, and forming a gold (Au) layer on the Pd layer. |
| US11309250B2 |
Electronic module
An electronic module has a first substrate 11; an electronic element 13, 23 provided on one side of the first substrate 11; a sealing part 90 that seals at least the electronic element 13, 23; a connection terminal 110 electrically connected to the electronic element 13, 23 and exposed from a side surface of the sealing part 90; and a stress relaxation terminal 150, which is not electrically connected to the electronic element 13, 23, exposed from the side surface of the sealing part 90. |
| US11309249B2 |
Semiconductor package with air gap and manufacturing method thereof
The present application provides a semiconductor package with air gaps for reducing capacitive coupling between conductive features and a method for manufacturing the semiconductor package. The semiconductor package includes a first semiconductor structure and a second semiconductor structure bonded with the first semiconductor structure. The first semiconductor structure has a first bonding surface. The second semiconductor structure has a second bonding surface partially in contact with the first bonding surface. A portion of the first bonding surface is separated from a portion of the second bonding surface, a space between the portions to of the first and second bonding surfaces is sealed and forms an air gap in the semiconductor package. |
| US11309246B2 |
High density 3D interconnect configuration
Electronic package structures and systems are described in which a 3D interconnect structure is integrated into a package redistribution layer and/or chiplet for power and signal delivery to a die. Such structures may significantly improve input output (IO) density and routing quality for signals, while keeping power delivery feasible. |
| US11309245B2 |
Semiconductor device with metal spacers and method for fabricating the same
The present application discloses a semiconductor device and a method for fabricating the semiconductor device. The semiconductor device includes a substrate having a plurality of contacts, a plurality of plugs positioned above the plurality of contacts, a plurality of metal spacers positioned above the plurality of plugs; and a plurality of air gaps respectively positioned between the plurality of metal spacers. |
| US11309243B2 |
Package having different metal densities in different regions and manufacturing method thereof
A package has a first region and a second region. The package includes a first die, a second die, an encapsulant, and an inductor. The second die is stacked on and bonded to the first die. The encapsulant is aside the second die. At least a portion of the encapsulant is located in the second region. The inductor is located in the second region. A metal density in the first region is greater than a metal density in the second region. |
| US11309240B2 |
Conductive rail structure for semiconductor devices
The present disclosure describes a semiconductor structure and a method for forming the same. The semiconductor structure can include a substrate, a first vertical structure and a second vertical structure formed over the substrate, and a conductive rail structure between the first and second vertical structures. A top surface of the conductive rail structure can be substantially coplanar with top surfaces of the first and the second vertical structures. |
| US11309238B2 |
Layout structure of a flexible circuit board
A layout structure of flexible circuit board includes a flexible substrate, a chip and a circuit layer. A chip mounting area and a circuit area are defined on a top surface of the flexible substrate, the circuit area surrounds the chip mounting area. The chip is mounted on the chip mounting area of the top surface and includes a bump. The circuit layer is disposed on the top surface. A connection portion of the circuit layer extends across a first side of the chip mounting area and into the chip mounting area. A transmission portion of the circuit layer is located on the circuit area and electrically connected to the connection portion. A stress release portion of the circuit layer is located between the transmission portion and a second side of the chip mounting area and is a comb-shaped structure. |
| US11309230B1 |
Power electronic modules including one or more layers including a polymer produced via a frontal ring-opening polymerization process
In one or more embodiments of the present disclosure, a power electronic module may be described. The power electronic module may comprise a power semiconductor device, a substrate coupled to the power semiconductor device, and a base plate coupled to the substrate. The substrate may include from 50 weight percent (wt. %) to 99.9 wt. % of a poly(dicyclopentadiene) polymer. In one or more other embodiments of the present disclosure, a method for manufacturing a power electronic module may be described. The method may include disposing a solution on a base plate. The solution may include dicyclopentadiene monomer, a ruthenium-based catalyst, and a trialkyl phosphite initiator. The method may further include initiating a polymerization front within the solution to produce a substrate formed directly on the base plate. Furthermore, the method may include coupling a power semiconductor device on the substrate to produce the power electronic module. |
| US11309222B2 |
Semiconductor chip with solder cap probe test pads
Various semiconductor chips with solder capped probe test pads are disclosed. In accordance with one aspect of the present invention, a semiconductor chip is provided that includes a substrate, plural input/output (I/O) structures on the substrate and plural test pads on the substrate. Each of the test pads includes a first conductor pad and a first solder cap on the first conductor pad. |
| US11309221B2 |
Single metallization scheme for gate, source, and drain contact integration
A technique relates to a semiconductor device. One or more N-type field effect transistor (NFET) gates and one or more P-type field effect transistor (PFET) gates are formed. Source and drain (S/D) contacts are formed, at least one material of the S/D contacts being formed in the PFET gates. Insulating material is deposited as self-aligned caps above the NFET gates and the PFET gates, while the insulating material is also formed as insulator portions adjacent to the S/D contacts. Middle of the line (MOL) contacts are formed above the S/D contacts. |
| US11309219B2 |
Method for manufacturing semiconductor device
A method for manufacturing a semiconductor device of an embodiment includes: dividing a semiconductor wafer including a plurality of chip areas each having a columnar electrode and dicing areas, along the dicing areas to form a plurality of semiconductor chips; sticking a first resin film on the plurality of semiconductor chips while filling parts of the first resin film in gaps each present between adjacent ones of the plurality of semiconductor chips; forming trenches narrower in width than the gaps in the first resin film filled in the gaps; and sequentially picking up the plurality of semiconductor chips each having the first resin film, and mounting the picked semiconductor chip on a substrate. |
| US11309217B2 |
Contact plug and method of formation
A method of making a semiconductor device that includes forming a dielectric stack over a substrate and patterning a contact region in the dielectric stack, the contact region having side portions and a bottom portion that exposes the substrate. The method also includes forming a dielectric barrier layer in the contact region to cover the side portions and forming a conductive blocking layer to cover the dielectric barrier layer, the dielectric stack, and the bottom portion of the contact region. The method can include forming a conductive layer over the conductive blocking layer and forming a conductive barrier layer over the conductive layer. The method can further include forming a silicide region in the substrate beneath the conductive layer. |
| US11309216B2 |
Large grain copper interconnect lines for MRAM
Large grain metal bitlines are formed above magnetic tunnel junction pillars used as MRAM bits without materially affecting the magnetic properties of the magnetic tunnel junctions. A copper or copper alloy bitline having relatively small grains is formed over the pillars. Laser annealing is employed to melt the bitline. Subsequent cooling and recrystallization results in a reduction of the number of grain boundaries in the bitline and a reduction in bitline effective resistivity. Multiple melt/cool cycles may be used. Bitline grains are vertically aligned with the pillars in a resulting structure. |
| US11309214B2 |
Semiconductor device with graphene-based element and method for fabricating the same
The present application discloses a semiconductor device and a method for fabricating the semiconductor device. The semiconductor device includes a first substrate, a buried dielectric layer inwardly positioned in the first substrate, a buried conductive layer including a lower portion positioned on the buried dielectric layer and an upper portion positioned on the lower portion, a buried capping layer positioned on the upper portion, and buried covering layers positioned between the buried capping layer and the buried dielectric layer and between the upper portion of the buried conductive layer and the buried dielectric layer. The buried conductive layer includes graphene. |
| US11309212B2 |
Semiconductor device structure and methods of forming the same
A semiconductor device structure, along with methods of forming such, are described. The semiconductor device structure includes a device, a first conductive structure disposed over the device, and the first conductive structure includes a first sidewall having a first portion and a second portion. The semiconductor device structure further includes a first spacer layer disposed on the first portion, a second conductive structure disposed adjacent the first conductive structure, and the second conductive structure includes a second sidewall having a third portion and a fourth portion. The semiconductor device structure further includes a second spacer layer disposed on the third portion, and an air gap is formed between the first conductive structure and the second conductive structure. The second portion, the first spacer layer, the fourth portion, and the second spacer layer are exposed to the air gap. |
| US11309211B2 |
Method for forming semiconductor device with buried gate structure
A method for forming a semiconductor device includes forming a trench extending from a top surface of a semiconductor substrate into the semiconductor substrate, and forming a gate dielectric layer lining the trench. The method also includes forming a gate electrode layer in the trench and over the top surface of the semiconductor substrate. The formation of the gate electrode layer includes performing a first deposition process, performing a first etching process after the first deposition process, and performing a second deposition process after the first etching process. |
| US11309208B2 |
Electrostatic chuck and method for manufacturing protrusions thereof
The present disclosure provides an electrostatic chuck (ESC) and a method for manufacturing the plurality of protrusions of the ESC. The electrostatic chuck includes a support surface for carrying a workpiece and the plurality of protrusions distributed at intervals on the support surface. The protrusions are formed by a hydrogen-free amorphous carbon with a resistivity ranging from 10−4 Ω·cm˜109Ω·cm. For the ESC provided by the present disclosure, the protrusions are formed by the hydrogen-free amorphous carbon and have a high hardness and a good wear resistance, which may effectively prevent a generation of particles. As such, the negative impact of the particles on the semiconductor process may be avoided, and the hydrogen does not dissociate in a high-temperature environment. Thereby, a problem that the protrusions may easily fall off and may not be suitable in the high-temperature environment (above 250° C.) may be solved. |
| US11309205B2 |
Electrostatic chuck and electrostatic adsorption apparatus having the same
An electrostatic chuck and an electrostatic adsorption apparatus including the same are disclosed. The electrostatic chuck includes a base, a cushion layer on the base, an electrode layer on the cushion layer, and a dielectric layer on the electrode layer, the base, the cushion layer, the electrode layer, and the dielectric layer have through holes. The through holes each have a rectangular shape, and each corner region of the dielectric layer has a pair of the through holes, and the central axes of the pair of the through holes respectively intersect two adjacent sides of the dielectric layer at the respective corner region. |
| US11309202B2 |
Overlay metrology on bonded wafers
A metrology system for characterizing a sample formed from a first wafer and a second wafer bonded at an interface with a metrology target near the interface may include a metrology tool and a controller. The metrology tool may include one or more illumination sources and an illumination sub-system to direct illumination from the one or more illumination sources to the metrology target, a detector, and a collection sub-system to collect light from the sample. The light collected from the sample may include light from the metrology target and light from a top surface of the first wafer, and the collection sub-system is may direct the light from the metrology target to the detector. The controller may execute program instructions causing the one or more processors to generate estimates of one or more parameters associated with the sample based on data received from the detector. |
| US11309200B2 |
Substrate storage container
A back side substrate support portion 6 includes a lower side inclined face 622 on which an end of a back face of a substrate W slides, and a substrate support portion 632 that is located above the lower side inclined face 622 and can support an edge portion of the substrate W. When a container main body opening portion 21 is closed by a lid body 3, the edge portion of the substrate W slides on the lower side inclined face 622 and reaches the substrate support portion 632. At least a portion of the lower side inclined face 622 is configured from a second member that is different from a first member that configures the substrate support portion 632, and the second member has a lower maximum static friction coefficient and lower wear resistance than the first member. |
| US11309192B2 |
Integrated circuit package supports
Disclosed herein are integrated circuit (IC) package supports and related apparatuses and methods. For example, in some embodiments, an IC package support may include a non-photoimageable dielectric, and a conductive via through the non-photoimageable dielectric, wherein the conductive via has a diameter that is less than 20 microns. Other embodiments are also disclosed. |
| US11309182B2 |
Semiconductor structure and method for forming the same
A semiconductor structure and a method for forming the same are provided. In one form, the method includes: providing a base, where a bottom core material layer is formed on the base, a plurality of discrete top core layers is formed on the bottom core material layer, an area between top core layers of the plurality of adjacent top core layers is a groove, and the groove includes a connecting groove; forming a first spacer film conformally covering the plurality of discrete top core layers and the bottom core material layer; forming a blocking structure in a remainder of the connecting groove exposed from the first spacer film; removing first spacer films on a top of the top core layers of the plurality of discrete top core layers and on the bottom core material layer using the blocking structure as a mask, to form a first mask spacer; removing the plurality of top core layers; patterning the bottom core material layer using the first mask spacer and the blocking structure as a mask, to form a bottom core layer; forming a second mask spacer on a side wall of the bottom core layer; and removing the bottom core layer. Through the blocking structure, a bottom core layer at a position corresponding to the connecting groove has a relatively large width, thereby directly forming target patterns with different spacings. |
| US11309181B2 |
Sputtering apparatus, sputtering target, and method for forming semiconductor film with the sputtering apparatus
To provide a sputtering apparatus capable of forming a semiconductor film in which impurities such as hydrogen or water are reduced. The sputtering apparatus is capable of forming a semiconductor film and includes a deposition chamber, a gas supply device connected to the deposition chamber, a gas refining device connected to the gas supply device, a vacuum pump for evacuating the deposition chamber, a target disposed in the deposition chamber, and a cathode disposed to face the target. The gas supply device is configured to supply at least one of an argon gas, an oxygen gas, and a nitrogen gas. The partial pressure of hydrogen molecules is lower than or equal to 0.01 Pa and the partial pressure of water molecules is lower than or equal to 0.0001 Pa in the deposition chamber. |
| US11309180B2 |
Ultra-low k dielectric layer and manufacturing method thereof
The disclosure provides an ultra-low K dielectric layer and a manufacturing method thereof, the manufacturing method comprising: forming an ultra-low K dielectric layer on a substrate; forming a thin oxygen layer on the upper surface of the ultra-low K dielectric layer; performing plasma purge on the ultra-low K dielectric layer after forming the thin oxygen layer using oxygen; and the plasma purge lasts for more than 2 seconds. The ultra-low K dielectric layer manufactured according to the manufacturing method provided by the disclosure has a smooth surface, overcomes the original bump defects of the ultra-low K dielectric layer, and improves the performance of the ultra-low K dielectric layer. The manufacturing method of the ultra-low K dielectric layer provided by the disclosure has a simple process, is compatible with the manufacturing process of the existing ultra-low K dielectric layer, and has operability. |
| US11309174B2 |
Ionization method, ionization device, imaging spectrometry method, and imaging spectrometer
Provided is an ionization method for ionizing a sample 21 adhered to a tip of a probe 11 that is electrically conductive, by applying an ionization voltage to the probe 11 to electrically charge the sample 21. The ionization method includes: subjecting the probe 11 to treatment to make a surface of the probe 11 homogenous; causing adhesion of the sample 21 to the tip of the probe 11; and ionizing the sample 21 by applying the ionization voltage to the probe 11 to electrically charge the sample 21. The treatment for making the surface of the probe 11 homogenous can be implemented by, for example, causing corona discharge at the probe 11. |
| US11309167B2 |
Active gas generation apparatus and deposition processing apparatus
In the present invention, a gas passing groove, a high-voltage electrode groove and a ground electrode groove formed in an electrode unit base are each spiral in plan view. A high-voltage electrode is embedded in the high-voltage electrode grove, and a ground electrode is embedded in the ground electrode groove. The high-voltage electrode and the ground electrode are arranged on sides of opposite side surfaces of the gas passing groove in the electrode unit base to oppose each other with a portion of the electrode unit base and the gas passing groove therebetween, and are spiral in plan view along with the gas passing groove. |
| US11309165B2 |
Gas showerhead, manufacturing method, and plasma apparatus including the gas showerhead
Disclosed are a gas showerhead, a method of manufacturing the same, and a plasma apparatus provided with the gas showerhead. The gas showerhead comprises a back plate and a gas distribution plate, the gas distribution plate including a plurality of annular gas distribution regions with the center of the gas distribution plate as their center; on each annular gas distribution region are provided a plurality of gas through-holes penetrating through the gas inlet face and the gas outlet face, the gas through-holes at least including a plurality of first gas through-holes inclined at a certain angle, and the gas through-holes further include a plurality of second gas through-holes, the second gas through-holes being parallel to the central axis or having a radial inclination direction different from the first gas through-holes; and in the same annular gas distribution region, gas flowing out of the first gas through-holes and gas flowing out of the second gas through-holes are kept away from each other. |
| US11309160B2 |
Methods and systems for a magnetic motor X-ray assembly
Various methods and systems are provided for an x-ray imaging system. In one example, an x-ray tube of the imaging system includes a rotor with a core forming a continuous unit with at least one of a retention sleeve and a bearing assembly sleeve. The rotor further includes one or more magnets disposed in the core and maintained in place by the retention sleeve. |
| US11309159B2 |
Structure of emitter electrode for enhancing ion currents
The present invention discloses a structure of an emitter electrode for enhancing ion currents, including a tip end part and a shank part. The tip end part has a pinpoint, a first diameter, and a radius of curvature. A length of the tip end part with the shank part is from the pinpoint to a first position of the shank part and a distance between the first position and the pinpoint is 300 times the first diameter. The radius of curvature of the tip end part ranges from 50 nanometers to 5 micrometers. The first diameter is 2 times the radius of curvature. |
| US11309158B2 |
Arc extinguishing unit of molded case circuit breaker
The present disclosure relates to an arc extinguishing unit of a molded case circuit breaker with a barrier provided between a fixed contact and a movable contact when a circuit is cut off, including fixed contacts fixed to part of a base assembly case; movable contacts that come contact or are separated from the fixed contacts; and an arc extinguishing part that extinguishes an arc generated when the movable contacts are separated from the fixed contacts. The arc extinguishing part includes a pair of side plates; multiple grids installed at a fixed interval between the pair of side plates; and arc barriers each installed on a base assembly case in a slidable manner, and configured to be in an open state of being separated from the movable contacts when a normal current flows on the circuit or is cutoff, and to close when a fault current is cutoff. |
| US11309155B2 |
Molded case circuit breaker
The present disclosure relates to a molded case circuit breaker, and particularly, to a molded case circuit breaker having an enhanced arc protecting function. The molded case circuit breaker includes: a power side terminal portion provided at a front side of an enclosure and having a fixed contact arm; a finger assembly coupled to the fixed contact arm, and disposed on a front surface of the power side terminal portion; and a base bus supporter coupled to an upper surface and a lower surface of the power side terminal portion, and having a finger hole through which the finger assembly is exposed. The base bus supporter is provided with a protection unit configured to enclose the finger assembly around the finger hole. |
| US11309153B2 |
Contact switching device
The contact switching device includes a first terminal, a first contact, a second terminal, and a base. The first contact is attached to the first terminal. The base includes a first attachment portion, a second attachment portion, and a groove portion. The first terminal is attached to the first attachment portion. The second terminal is attached to the second attachment portion. The groove portion is arranged between the first attachment portion and the second attachment portion. The groove portion has a shape in which the inside is larger than the entrance. |
| US11309151B2 |
Direct current electric circuit interrupting switch assembly
A direct current interrupting switch assembly comprising a primary conductor and a secondary conductor integrated with a direct voltage source and a load. The primary conductor of the switch assembly has two branches, the first branch including a fuse with a melting member and the second branch including a pyroswitch with an interrupting member. In a first position, the second branch of the primary conductor is uninterrupted, and the interrupting member is a sufficient distance apart from the secondary conductor. When the interrupting member is moved to a second position, the current in second branch of the primary conductor is interrupted and the interrupting member contacts the secondary conductor of the switch assembly. |
| US11309149B2 |
Rocker switch
A rocker switch includes: a knob that rocks when an operational input is made; a case that supports the knob; a pair of switches that are provided on opposite end part sides respectively with respect to a middle part of the knob within the case; a rubber contact (an urging part) that urges opposite end parts of the knob toward a non-operated position; a pair of operation input parts that turn the respective switches ON/OFF; and a pair of fulcrum parts that are provided on the middle part side of the knob with respect to the pair of operation input parts respectively. In the pair of fulcrum parts, the fulcrum part on a side opposite to the operation input part, of the pair of operation input parts, that has turned the switch ON/OFF by an operational input being made serves as a rocking axis of the knob. |
| US11309147B2 |
Linear slide switch used for speed-control
Disclosed embodiments relate to a socket. A speed-control switch, including: a housing including a top plate provided with a central opening extending in a length direction; a push rod at least partially contained in the housing, and a first end of the push rod protruding out of the housing from the central opening and capable of sliding in the central opening; a plurality of connection terminals provided in pairs in the housing and configured to: selectively engage with a second end of the push rod opposite to the first end to limit a plurality of speed indications of the speed-control switch; and a speed selection assembly with a part thereof set on the top plate and configured to allow a selection for a plurality of speed indications of the speed-control switch as the push rod slides in the central opening. The speed-control switch achieve speed switching with a small force. The speed-control switch is suitable for high-power electrical appliances, requires a small number of components, reducing manufacturing costs and assembly time and assembly difficulty. |
| US11309145B2 |
Switch device for regulating movement of operation member
A switch device reduces an impact sound generated when the operation member returns to its original position. The switch device includes a housing member, an operation knob accommodated in the housing member and capable of being pushed, and a spring that urges the operation knob in a direction opposite to the pushing direction. The housing member includes a two-pronged stopper that regulates the movement of the operation knob in the opposite direction. The operation knob includes a tab that abuts on the two-pronged stopper. When the movement of the operation knob in the opposite direction is regulated, the two-pronged stopper and the tab make a line contact first. |
| US11309140B2 |
Contact switch coating
Switch assemblies and switching methods are disclosed. In some embodiments, a switch assembly may include a first blade having a first contact within an enclosed cavity, and a second blade having a second contact within the enclosed cavity. The first and second contacts are operable to make or break contact with one another in response to a magnetic field. The switch assembly may further include a coating formed over each of the first and second contacts, the coating including a titanium layer, a second layer formed over the titanium layer, and a tungsten-copper layer formed over the second layer. In some embodiments, the second layer is copper or molybdenum. |
| US11309133B2 |
Multilayer electronic component and board having the same mounted thereon
The multilayer electronic component includes a capacitor body having first to sixth surfaces; first and second external electrodes including first and second connecting portions, and first and second band portions; first and second connection terminals connected to the first band portion; and third and fourth connection terminals connected to the second band portion. The first and second connection terminals include a first connection surface facing the first band portion, a second connection surface opposing the first connection surface, and a first circumferential surface connecting the first and second connection surfaces, a cross section of the first circumferential surface being circular. The third and fourth connection terminals include a third connection surface facing the second band portion, a fourth connection surface opposing the third connection surface, and a second circumferential surface connecting the third and fourth connection surfaces, a cross section of the second circumferential surface being circular. |
| US11309131B2 |
Multilayer ceramic capacitor
A multilayer ceramic capacitor includes a body including a dielectric layer and first and second internal electrodes disposed with the dielectric layer interposed therebetween and disposed in point-symmetry with each other; first and second connection electrodes penetrating the body in a direction perpendicular to the dielectric layer and connected to the first internal electrode; third and fourth connection electrodes penetrating the body in a direction perpendicular to the dielectric layer and connected to the second internal electrode; first and second external electrodes disposed on both surfaces of the body and connected to the first and second connection electrodes; and third and fourth external electrodes spaced apart from the first and second external electrodes and connected to the third and fourth connection electrodes, and the first and second internal electrodes include a region in which an electrode is not disposed. |
| US11309123B2 |
Fully integrated inversely weakly coupled power inductor
A filter assembly includes a first self-inductance core, a second self-inductance core, a coupled inductor core, and a first plurality of inductor coil windings. Each of the first plurality of inductor coil windings has a series of first turns in a vertically stacked relation around the first self-inductance core, and a series of second turns in a vertically stacked relation around the first self-inductance core and the coupled inductor core. The filter assembly further includes a second plurality of inductor coil windings. Each of the second plurality of inductor coil windings has a series of first turns in a vertically stacked relation around the second self-inductance core, and a series of second turns in a vertically stacked relation around the second self-inductance core and the coupled inductor core. |
| US11309118B2 |
Coil component and inductor
There is provided a coil component which includes a core; and a plurality of leg portions provided at respective ends of the core, wherein each of the leg portions includes a protrusion which protrudes inward with respect to a joint between the core and the leg portion. |
| US11309114B2 |
Stacked body and method of producing stacked body
A stacked body includes a base including a plurality of insulating base material layers, a coil including a winding-shaped conductive pattern located on at least one of the plurality of the insulating base material layers, and an electrically isolated dummy pattern extending along at least a portion of the coil outside of the coil on at least one of the plurality of the insulating base material layers in a plan view, wherein the stacked body includes a step at which a thickness of the stacked body is different in a stacking direction, and the dummy pattern is located between the coil and the step at a portion defining the step where the thickness of the stacked body is larger. |
| US11309113B2 |
Multilayer substrate, actuator, and method of manufacturing multilayer substrate
A multilayer substrate includes a stacked body including a principal surface and insulating base material layers made of a thermoplastic resin that are stacked, and a coil including coil conductors. The coil includes a winding axis in a stacking direction. The coil conductors includes a first coil conductor closest to the principal surface, and a second coil conductor adjacent to or in a vicinity of the first coil conductor. The second coil conductor includes a wide portion of which a line width is larger than a line width of the first coil conductor. The wide portion includes an overlapping portion that overlaps with the first coil conductor, and a non-overlapping portion that does not overlap with the first coil conductor, when viewed from the stacking direction. The non-overlapping portion is curved to be closer to the principal surface than to the overlapping portion. |
| US11309111B2 |
Magnetic sensing system for a rotary control device
A control device includes a moving portion, a magnetic element coupled to the moving portion, at least one magnetic sensing circuit responsive to magnetic fields, and at least one magnetic flux pipe structure. The magnetic element may comprise alternating positive and negative sections configured to generate a magnetic field. The magnetic element may be any shape, such as circular, linear, etc. The magnetic sensing circuit may be radially offset from the magnetic element, and the magnetic flux pipe structure may be configured to conduct the magnetic field generated by the magnetic element towards the magnetic sensing circuit. The magnetic element may generate the magnetic field in a first plane, and the magnetic sensing may be responsive to magnetic fields in a second direction that is angularly offset from the first plane. The magnetic flux pipe structure may redirect the magnetic field towards the magnetic sensing circuit in the second direction. |
| US11309100B1 |
Highly conductive strain resilient material and method for making the material
An electrically conductive, flexible, strain resilient product is produced by mixing metal coated carbon nanotube networks with a liquid polymeric resin to produce a liquid mixture, and the mixture is cured to produce the product. The networks may include welded junctions between nanotubes formed by depositing and melting metal nanoparticles on the nanotubes to form the metal coating. After the mixing step the liquid mixture may be deposited on a flexible substrate in the form of an electrical circuit. The mixing step may further include mixing the composite with a volatile solvent to produce a selected viscosity. Then, a three-dimensional printer may be used to print the product, such as an electrical circuit, on a substrate. The product is cured in an atmosphere that absorbs the solvent. The conductivity of the mixture may be adjusted by adjusting the weight percentage of the metal coated carbon nanotube networks from 50% to 90%, but a preferred range is between 75% and 85%. |
| US11309099B2 |
Disposal container for high-level radioactive waste using multiple barriers and barrier system using thereof
The present invention relates to a disposal container and a storage system for high-level radioactive waste and, more specifically, to a disposal container for high-level radioactive waste using multiple barriers and a barrier system using thereof, the disposal container having the multiple barriers consisting of an inner wall made of carbon steel for excellent corrosion resistance and ease of manufacture, a middle wall made of Inconel, which is bonded to a lateral surface of the inner wall, and an outer wall made of copper, which is bonded to a lateral surface of the middle wall. |
| US11309094B2 |
Controlling a power output of a nuclear reaction without control rods
A nuclear power system includes a reactor vessel that includes a reactor core that includes nuclear fuel assemblies configured to generate a nuclear fission reaction. A representative nuclear power system further includes a riser positioned above the reactor core and a primary coolant flow path that extends from a bottom portion of the reactor vessel, through the reactor core, and through an annulus between the riser and the reactor vessel. A primary coolant circulates through the primary coolant flow path to receive heat from the nuclear fission reaction and release the heat to a power generation system configured to generate electric power. The nuclear power system further includes a control rod assembly system positioned in the reactor vessel and configured to position control rods in only two discrete positions. |
| US11309093B2 |
Lower end fitting locknut for nuclear fuel assembly
An apparatus including a lower end fitting having a top planar surface, a bottom planar surface, a counterbore defined therebetween, an opening extending from the counterbore to the top planar surface, and a lock recess that extends both radially outwardly from the counterbore and extends inwardly into the lower end fitting from the bottom planar surface. The apparatus includes a guide tube having a lower end and an end plug configured to connect with the lower end of the guide tube. The end plug has a threaded shaft sized to pass through the opening of the lower end fitting, and a female lock nut has a deformable side wall configured to be swaged into the recess of the lower end fitting. The lock recess remains visible as viewed from the bottom planar surface of the lower end fitting when the female lock nut is fully disposed in the counterbore. |
| US11309092B2 |
Target irradiation systems for the production of radioisotopes
A target irradiation system for irradiating a radioisotope target in a vessel penetration of a fission reactor, including a target elevator assembly including a body portion defining a central bore and an open bottom end, a center tube that is disposed within the central bore of the body portion, a target basket that is slidably receivable within the center tube, and a winch that is connected to the target basket by a cable, wherein the target basket is configured to receive the radioisotope target therein and be lowered into the vessel penetration of the reactor when irradiating the radioisotope target. |
| US11309087B2 |
Method for the computation of voronoi diagrams
Two methods are provided for the automated derivation of Voronoi diagrams in 3D. The invention, implementable via various means such as a processing system, method, or data structure in a recording medium such as memory or as a self-contained electronic circuit, has wide ranging applicability to numerous fields such as big data analysis, computer graphics and animation, route planning, collision avoidance, computer vision, robotic vision, and etc. The first method of the invention details steps necessary to segment data according to a set of generators so as to produce a Voronoi partitioning of the data. The second method of the invention includes steps associated with the derivation of the mathematical specification of a 3D Voronoi diagram. |
| US11309084B1 |
Intelligent location estimation for assets in clinical environments
A system can identify a first position of a tag in a clinical environment based on first times at which first receivers received a first wireless signal from the tag. The system can estimate a second position of the tag in the clinical environment based on second times at which second receivers received a second wireless signal from the tag. The system determines that a boundary is located between the first position and the second position, defines a path range around the first position of the tag based on an expected movement of the tag during a time interval between the first and second wireless signals, determines that the boundary lacks a door within the path range, adjusts the second position of the tag based on the boundary map, and transmits a message indicating that the tag is located at the adjusted position at the second time. |
| US11309078B2 |
Method and system for updating a medical device
The present disclosure includes methods, devices and systems for establishing a connection between a medical device and a remote computing device, receiving an upgrade command at the medical device, storing a current version of persistent data and a current version of executable code in a first storage area of the medical device, transmitting at least the current version of the persistent data to the remote computing device, receiving a second format of the current version of the persistent data and an upgraded version of executable code at the medical device, storing the second format of the current version of the persistent data and the upgraded version of the executable code in a second storage area of the medical device, and executing the upgraded version of the executable code with the second format of the current version of the persistent data. |
| US11309075B2 |
Generation of a transaction set
Systems and methods are provided to electronically generate an Electronic Data Interchange (EDI) 835 transmission to test 835 processing systems. EDI 835 transmissions include vast amounts of data that are input into the transmission in a unique way. If even one space is off, the 835 transmission will not be correctly processed and may be kicked back by the system. This has serious consequences as it may result in incorrect or non-recording of a payment on a claim. Unfortunately, most systems are not tested for 835 processing capabilities before going live due to the time intensive nature of generating 835 transmissions for testing. The present application describes an innovative way to electronically generate 835 transmissions. |
| US11309068B2 |
Electronic prescription delivery system and method
The invention is a computer-implemented method and apparatus that delivers information to a prescriber that is prescribing medication via an electronic prescription system, the information is delivered at the time of entering the prescription and prior to completion of entering the prescription information. The information delivered is responsive to information about the prescriber, the patient, and/or other relevant conditions from any or all of a number of sources. The information delivered to the prescriber may include drug interaction information, warnings, legally required statements, potential alternative medications, advertisements, coupons, etc. The data to which the specific information delivered to the prescriber is responsive may include prescriber information, such as the location, age, gender, medical specialty, practice size, geographic location etc, information about the patient, such as age, gender, insurance information, location, previous medical history, height, weight, etc. The data also may include information not specific to the prescriber or patient per se, such as local or national laws, current local weather, local allergen counts, etc. The data may be collected from various sources, including the prescriber's medical records database, insurance carrier databases, public information available over the internet or from other sources, purchased information such as subscription lists, weather, pollution, and allergy information, etc. |
| US11309064B2 |
Individualized dosing technique with multiple variables
A method to quantify and correct for drug-drug interaction, physiologic change, diet, weight, genetic data and compliance on Warfarin dosing. The International Normalized Ratio (INR), a lab value used to follow Warfarin use, will fluctuate in an unpredictable manner due to factors other than the current Warfarin dose. The method mathematically describes these changes and eventually adjusts for these interacting factors through the use of logistic regression (LR) or multiple linear regression analysis. By anticipating changes in INR, Warfarin dosing can be adjusted resulting in patients having their INR be therapeutic range. The technique can be used in any field that requires a specific measured quantity, with variables that change and the need to correct for changes with a mathematical model. |
| US11309062B2 |
Hierarchical optimized detection of relatives
A system for evaluating a DNA sample and determining whether the sample contains related individuals and/or unrelated individuals with high levels of alleles sharing. Trained and pre-validated machine learning algorithms are to rapidly and probabilistically assess the presence of relatives in a DNA mixture. To make a probabilistic determination, the system evaluates aspect of the sample that have not be considered before, such as peak heights, peak height ratios, maximum peak heights, minimum peak heights, ratios of allele heights to one another, number of contributors using maximum allele count method, and quantitative measures of the amount of DNA contributed by the male and female organisms. The system identifies whether a DNA sample has contributors that are not readily identifiable based on the data and can thus improve downstream analysis. |
| US11309059B2 |
Medical prognosis and prediction of treatment response using multiple cellular signalling pathway activities
A method for determining a risk score that indicates a risk that a clinical event will occur within a certain period of time. The risk score is based at least in part on a combination of inferred activities of two or more cellular signaling pathways in a tissue and/or cells and/or a body fluid of a subject. The cellular signaling pathways comprise a Wnt pathway, an ER pathway, an HH pathway, and/or an AR pathway. The risk score is defined such that the indicated risk that the clinical event will occur within the certain period of time decreases with an increasing PER and increases with an increasing max(PWnt, PHH), wherein PER, PWnt, and PHH denote the inferred activity of the ER pathway, the Wnt pathway, and the HH pathway, respectively. |
| US11309056B2 |
Automatic test equipment method for testing system in a package devices
Systems, methods, and computer program products directed to testing a System-in-a-Package (SIP) using an Automatic Test Equipment (ATE) machine. A functional representation of one or more tests to be performed in the SIP is loaded in a memory located on a load board, the load board located on the ATE machine. A test controller located on at least one of the SIP and the load board is caused to retrieve and store the one or more tests to be performed in the SIP. The test controller is instructed to conduct the one or more tests in the SIP. |
| US11309055B2 |
Power loss test engine device and method
Apparatus and methods are disclosed, including test systems for memory devices. Example test systems and methods include power loss logic to determine when one or more test conditions have been met in a memory operation between a host device and a memory device under test. Example test systems and methods include a function to then instruct a power management device to trigger a power loss event. |
| US11309054B2 |
Method of controlling repair of volatile memory device and storage device performing the same
A test operation condition of a volatile memory device is set such that an error probability is increased based on the test operation condition, compared to a normal operation condition for a normal operation of the volatile memory device. A test mode is set with respect to a test object region corresponding to at least a portion of a memory cell array included in the volatile memory device. A test operation of the volatile memory device is performed based on the test operation condition during the test mode to detect error position information of errors in data stored in the test object region. A runtime repair operation is performed with respect to the volatile memory device based on the error position information. |
| US11309052B2 |
Read voltage calibration for copyback operation
A system includes a memory device having a plurality of groups of memory cells and a processing device communicatively coupled to the memory device. The processing device is be configured to read a first group of memory cells of the plurality to determine a calibrated read voltage associated with the group of memory cells. The processing device is further configured to determine, using the calibrated read voltage associated with the first group of memory cells, a bit error rate (BER) of a second group of memory cells of the plurality. Prior to causing the memory device to perform a copyback operation on the plurality of groups of memory cells, the processing device is further configured to determine whether to perform a subsequent read voltage calibration on at least the second group of the plurality based, at least partially, on a comparison between the determined BER and a threshold BER. |
| US11309049B2 |
Direct memory access using JTAG cell addressing
The present disclosure relates to a Flash memory component having a structurally independent structure and coupled to a System-on-Chip through a plurality of interconnection pads, comprising: a memory array including a plurality of independently addressable sub arrays; sense amplifiers coupled to corresponding outputs of said sub arrays and coupled to a communication channel of said System-on-Chip; a scan-chain comprising modified JTAG cells coupled in parallel between the output of the sense amplifiers and said communication channel to allow performing read operations in a Direct Memory Access. A method for retrieving data from the memory component is also disclosed. |
| US11309046B2 |
Semiconductor devices and semiconductor systems including the same
A semiconductor system includes a first semiconductor device and a second semiconductor device. The first semiconductor device outputs an error check enablement signal, an input clock signal, and input data to the second semiconductor device. The first semiconductor device receives an error check signal from the second semiconductor device. The second semiconductor device performs an error check operation for the input data based on the error check enablement signal and the input clock signal to generate the error check signal which is enabled when an error in the input data occurs. |
| US11309041B2 |
Smart erase verify test to detect slow-erasing blocks of memory cells
Apparatuses and techniques are described for determining if a block of memory cells is slow-erasing during an erase operation for the block. An erase operation performs an additional verify test in a specified erase-verify iteration to check the position of the upper tail of the threshold voltage distribution of the memory cells of a block. If the upper tail is too high, this indicates a slow-erasing block, even if the erase operation is successfully completed within an allowable number of erase-verify iterations. The additional verify test can be initiated using a prefix command which is transmitted with an erase command to the memory chip. Or, it can be initiated by a device parameter on the memory chip. |
| US11309035B1 |
All bit line sensing for determining word line-to-memory hole short circuit
Apparatuses and techniques for detecting short circuits in a memory device, and in particular, word line-to-channel short circuits and short circuits between bit line contacts at the top of NAND strings. A short circuit detection operation includes a channel pre-clean phase which discharges a channel of a non-short circuited NAND string while boosting a bit line of a short circuited NAND string, followed by a bit line pre-charge phase which boosts a bit line of the non-short circuited NAND string, followed by a bit line discharge phase which discharges the bit line of the non-short circuited NAND string, followed by a sensing phase which identifies the short circuited NAND strings as being in a programmed or non-conductive state. |
| US11309033B2 |
Memory device
A memory device including: a memory area having a first memory block and a second memory block; and a control logic configured to control the first memory block and the second memory block in a first mode and a second mode, wherein in the first mode only a control operation for the first memory block is executable, and in the second mode control operations for the first memory block and the second memory block are executable, wherein the control logic counts the number of accesses made to the second memory block in the first mode, and stores the number of accesses as scan data in the second memory block. |
| US11309028B2 |
Inference operation method and controlling circuit of 3D NAND artificial intelligence accelerator
An inference operation method and a controlling circuit of a 3D NAND artificial intelligence accelerator are provided. The 3D NAND artificial intelligence accelerator includes a plurality of memory cells, a plurality of bit lines, a plurality of word lines and a plurality of string selecting line groups each of which includes at least one string selecting line. The inference operation method includes the following steps: The patterns are inputted to the bit lines. The word lines are switched to switch the filters. The string selecting line groups are switched to switch the filters. In a word line pioneering scheme and a string selecting line group pioneering scheme, when the patterns inputted to each of the bit lines are switched, any one of the word lines is not switched and any one of the string selecting line groups is not switched. |
| US11309026B2 |
Convolution operation method based on NOR flash array
The present disclosure relates to the field of semiconductor integrated circuits and manufacturing technologies thereof, and discloses a method and device for realizing a convolution operation based on an NOR flash storage structure. The NOR flash array has a structure of an array composed of a plurality of NOR flash cells. The convolution operation method includes: storing elements of a convolution kernel matrix into the NOR flash cells; converting elements of an input matrix into voltages and applying the voltages to gate terminals of the NOR flash cells; applying a driving voltage to source terminals of the NOR flash cells; and collecting, via drain terminals of the NOR flash cells, current values of each column to obtain a convolution operation result. |
| US11309024B2 |
Memory cell programming that cancels threshold voltage drift
The present disclosure includes apparatuses, methods, and systems for memory cell programming that cancels threshold voltage drift. An embodiment includes a memory having a plurality of memory cells, and circuitry configured to program a memory cell of the plurality of memory cells to one of two possible data states by applying a first voltage pulse to the memory cell, wherein the first voltage pulse has a first polarity and a first magnitude, and applying a second voltage pulse to the memory cell, wherein the second voltage pulse has a second polarity that is opposite the first polarity and a second magnitude that can be greater than the first magnitude. |
| US11309018B2 |
Stable memory cell identification for hardware security
A method includes setting an output of each memory cell in an array of memory cells to a same first value, decreasing power to the array of memory cells and then increasing power to the array of memory cells. Memory cells in the array of memory cells with outputs that switched to a second value different from the first value are then identified in response to decreasing and then increasing the power. A set of memory cells is then selected from the identified memory cells to use in hardware security. |
| US11309004B2 |
Mechanism to improve driver capability with fine tuned calibration resistor
Aspects of a storage device including a controller, a calibration resistor and a die having an output driver and a calibration circuit are provided, which allow for an output impedance of the output driver to be calibrated to a lower impedance than a minimum required for reading data across PVT variations of the die at maximum loading of the controller. To check whether slow corners may operate using the lower impedance, the controller determines whether the output impedance of the output driver can be calibrated to the lower impedance at a maximum temperature and minimum voltage applied to the die, or whether a calibration code generated from the calibration circuit exceeds a threshold at a nominal temperature and voltage applied to the die. Thus, slow corners are screened out from lower impedance use, while faster devices are designed with a smaller calibration resistance to benefit from increased memory and speed. |
| US11309001B2 |
Apparatuses and methods for setting a duty cycle adjuster for improving clock duty cycle
Apparatuses and methods for setting a duty cycler adjuster for improving clock duty cycle are disclosed. The duty cycle adjuster may be adjusted by different amounts, at least one smaller than another. Determining when to use the smaller adjustment may be based on duty cycle results. A duty cycle monitor may have an offset. A duty cycle code for the duty cycle adjuster may be set to an intermediate value of a duty cycle monitor offset. The duty cycle monitor offset may be determined by identifying duty cycle codes for an upper and for a lower boundary of the duty cycle monitor offset. |