| Document | Document Title |
|---|---|
| US11121894B2 |
Direct sequence detection and equalization
Methods and apparatuses for direct sequence detection can receive an input signal over a communication channel. Next, the input signal can be sampled based on a clock signal to obtain a sampled voltage. A set of reference voltages can be generated based on a main cursor, a set of pre-cursors, and a set of post-cursors associated with the communication channel. Each generated reference voltage in the set of reference voltages can correspond to a particular sequence of symbols. A sequence corresponding to the sampled voltage can be selected based on comparing the sampled voltage with the set of reference voltages. |
| US11121893B2 |
Equalizing transmitter and method of operation
A transmitter for providing channel equalization that includes a first driver and second driver having a high pass filter. The first driver generates a first output signal representing a digital input signal. The second driver generates a second output signal representing a high pass filtered version of the digital input signal. The first and second output signals are summed to provide a third output signal that is channel equalized for transmission over a channel. |
| US11121890B2 |
Channel prediction system and channel prediction method for OFDM wireless communication system
A channel prediction system and a channel prediction method for an OFDM wireless communication system include a standard echo state network and a two-layer adaptive elastic network. In the method, with respect to each subcarrier of a pilot OFDM symbol, an echo state network is trained by using frequency domain channel information of each subcarrier obtained by channel estimation. The trained echo state network may realize short-term prediction of the frequency domain channel information. To overcome a likely ill-conditioned solution of an output weight in an echo state network, the output weight in the echo state network is estimated by using a two-layer adaptive elastic network. |
| US11121885B2 |
Data analysis system and method for predicting meeting invitees
Computer implemented method and a system that includes receiving a list of invitees for a future meeting, accessing electronically stored relationship data that includes information identifying a plurality of individuals and existing relationships between the individuals, wherein the individuals include at least some of the invitees and also additional individuals, selecting one or more of the additional individuals that are identified in the relationship data as having existing relationships with one or more of the invitees, and adding the one or more selected additional individuals to a potential invitee list for the future meeting. |
| US11121873B2 |
System and method for hardening security between web services using protected forwarded access tokens
Methods for hardening security between web services using protected forwarded access tokens are implemented via systems and devices. User applications receive user tokens with user information from an identity provider and provide the user tokens to first services with data requests. Each first service extracts and transforms a portion of a user token to validate a user token signature, and determines a target service for the data request. The first services acquire actor tokens from the identity provider that uniquely identify the first services using public keys, and then generate authentication tokens, signed with corresponding private keys, that encapsulate the actor tokens and the transformed user tokens. The signed authentication tokens are provided to target services which validate the authentication tokens as well as the encapsulated tokens and their respective signatures. Upon validation, requested data is retrieved and provided back for the user applications from the target services. |
| US11121870B2 |
Method and system for interacting public and private blockchains with controlled participation
A method for controlling participation in a blockchain based on time includes: storing participant profiles, each including a public key of a cryptographic key pair and a period of time; storing a blockchain comprised of a plurality of blocks, each including at a block header and data values; receiving a block submission from a specific computing system including a digital signature and a new data value; verifying the digital signature based on the public key stored in a specific participant profile related to the specific computing system; verifying that the specific computing system is eligible for participation in the blockchain based on the period of time included in the specific participant profile and a present time; generating a new block comprised of a block header and the new data value; and transmitting the generated new block to nodes associated with the blockchain. |
| US11121869B1 |
Decentralized cryptographic key derivation
Cryptographic keys are generated for components of a distributed system in a decentralized manner. A root key is generated for a universe of components, including capturing data and components for processing the data. A cryptographic key for a processing component is derived from the root key and one or more attributes or identifiers of the processing component, which may be provided in a specific region or domain. Cryptographic keys for capturing components (e.g., cameras) within the region or domain are derived from the cryptographic keys of the processing component and one or more attributes or identifiers of the respective capturing components. The capturing components encrypt data using their respective cryptographic keys and transfer the encrypted data to the processing component, which re-derives the cryptographic keys for such capturing components and decrypts the encrypted data using the re-derived cryptographic keys. |
| US11121867B2 |
Encryption methods based on plaintext length
Examples discussed herein disclose, among other things, a method. The method includes, among other things, obtaining a plaintext, obtaining a key from a plurality of keys, and determining whether the plaintext is longer than a predefined threshold length. If the plaintext is longer than the predefined threshold length, the method may encrypt the plaintext with the key to generate a first ciphertext having a length of the plaintext, where the character at a predefined position within the first ciphertext belongs to a first subset of characters. And if the plaintext is not longer than the predefined threshold length, the method may encrypt the plaintext with the key to generate a second ciphertext, which is longer than the plaintext, where the character at the same predefined position in the second ciphertext belongs to a second subset of characters. |
| US11121865B2 |
Method and apparatus for establishing trusted channel between user and trusted computing cluster
Some embodiments of the present specification provide a method and an apparatus for establishing a trusted channel between a user and a trusted computing cluster. According to the method, when a user wants to establish a trusted channel with a trusted computing cluster, the user only negotiates a session key with any first trusted computing unit in the cluster to establish the trusted channel. Then, the first trusted computing unit encrypts the session key using a cluster key common to the trusted computing cluster to which the first trusted computing unit belongs, and sends the encrypted session key to a cluster manager. The cluster manager transmits the encrypted session key in the trusted computing cluster, so that other trusted computing units in the cluster obtain the session key and join the trusted channel. Thus, the user establishes a trusted channel with the entire trusted computing cluster. |
| US11121864B1 |
Secure private key distribution between endpoint instances
A method, a computer program product, and a system for distributing a private signature key between authorization instances. The method includes registering a plurality of authorization instances in a configuration file and generating host instance key pairs by each of the authorization instances. The method also includes storing the public host keys in the shared database and electing one of the authorization instances to be a signature key leader instance. The method includes generating, by the signature key leader instance, a signature key pair. The signature key pair includes a public signature key and a private signature key. The method also includes storing the public signature key in the shared database and transmitting an encrypted private signature key to a requesting authorization instance of the authorization instances. The method further includes decrypting the encrypted private signature key using the private host key generated by the requesting authorization instance. |
| US11121859B1 |
Efficient incremental consensus for block commit in blockchain network
Systems and techniques are disclosed for an efficient consensus protocol for block commits in a blockchain network. One of the methods includes obtaining, from a system, information indicating occurrence of a particular event, the particular event causing generation, by the entities, of respective block proposals for inclusions in the blockchain network. Attribution information is accessed, the information being generated including information describing the entities interactions with a user associated with the particular event. Incremental values are determined for inclusion in a block proposal associated with the entity. The block proposal is evaluated by remaining entities. The block proposal is included in the blockchain network based on greater than a threshold number of entities approving the block proposal. |
| US11121858B2 |
Blockchain analytics
A blockchain analytics system facilitates determination of parameters of blockchain objects for analytics. Examples of parameters of the blockchain object may include an identity of a participant, a role of a participant, a type of the blockchain object and the like. The system may store parameters of blockchain objects in the data repository. The system may use the determined parameters to generate a machine learning blockchain analytics model. The system may generate visualizations, detect patterns and/or for detecting anomalies based on the machine learning blockchain analytics model. |
| US11121852B2 |
Partial unrolling for software security
The present invention relates to a method to intrinsically protect a computer program having a driving value dedicated to handle sensitive data, said driving value comprising a plurality of N computation units to perform computations using sensitive data and susceptible to let sensitive data leak, each unit having V possible values, said method comprising a step of unrolling k parts of P units, with P>1 and P |
| US11121847B2 |
Communication method and communications device
The present disclosure relates to communication methods and communications devices. In one example communication method, control information is sent to a terminal device. The control information includes a resource identifier. The resource identifier indicates that allocated frequency domain resources are all frequency domain resources that can be supported by the terminal device on one carrier or that some of all frequency domain resources that can be supported by the terminal device on one carrier. |
| US11121846B2 |
Method and apparatus for transmitting data or control information in wireless communication system
The present disclosure relates to a pre-5th-Generation (5G) or 5G communication system to be provided for supporting higher data rates Beyond 4th-Generation (4G) communication system such as Long Term Evolution (LTE). A method for operating a base station in a wireless communication system includes allocating a first resource to a first service, allocating a part of the first resource, as a second resource, to a second service, and transmitting indication information for the second resource. |
| US11121841B2 |
Method and system for transmitting and receiving protocol data unit in communication networks
The present disclosure relates to a pre-5th-Generation (5G) or 5G communication system to be provided for supporting higher data rates Beyond 4th-Generation (4G) communication system such as Long Term Evolution (LTE). A method and system for managing data transmission in a communication network is provided. During Data Resource Bearer (DRB) creation, network signals to a transmitting node, the data transfer requirement. The network uses a signaling parameter to indicate a large data transfer requirement. Based on the data transfer requirement information collected from the network, the transmitting node determines the type of data format that needs to be used for the data transmission. If the network signals large data transfer requirement, then the transmitting node selects a Subheader format in which the length field of the data format suits the large data transfer requirement. Further, data communication is initiated using the selected Subheader format. |
| US11121840B2 |
Method for reporting power headroom for SRS, terminal device, and computer storage medium
A method for reporting PH for an SRS, terminal device and computer storage medium are provided. The method includes: the terminal device calculates at least one expected SRS transmit power on at least one SRS resource in a target SRS resource set, the target SRS resource set is an SRS resource set on a target BWP; when the terminal device does not transmit an SRS on the target BWP at a moment of calculating the PH, the target SRS resource set is an SRS resource set with a lowest set index on the target BWP; the terminal device obtains the PH of the target SRS resource set through calculation according to the at least one expected SRS transmit power on the at least one SRS resource; and the terminal device reports the PH of the target SRS resource set obtained through calculation. |
| US11121837B2 |
User equipment and method of SRS transmission
A user equipment (UE) is disclosed including a receiver that receives Sounding Reference Symbol (SRS) configuration information that indicates a first resource used for transmission of a predetermined reference signal from a base station (BS). The UE includes a transmitter that transmits an SRS using a second resource that is the first resource. The UE further includes a processor that determines a precoder applied to the SRS based on the predetermined reference signal. The transmitter transmits the SRS precoded using the determined precoder. The predetermined reference signal is a Channel State Information Reference Signal (CSI-RS), an SRS, or a Synchronization Signal Block (SSB)/Physical Broadcast Channel (PBCH). |
| US11121832B2 |
Method and apparatus for transmitting data using a multi-carrier in a mobile communication system
The present disclosure relates to a method and apparatus for transmitting data using a multi-carrier in a mobile communication system. The method of transmitting data in user equipment of a wireless communication system using a carrier aggregation technique according to an embodiment of the present disclosure includes the steps of setting secondary cells included in an S-TAG (Secondary-Timing Advance Group) configured of only secondary cells (SCells), deactivating a downlink timing reference cell in the S-TAG; determining whether other activated secondary cells exist besides the deactivated downlink timing reference cell in the S-TAG, and when the other activated secondary cells exist in the S-TAG, setting one of the other activated secondary cells as a new downlink timing reference cell. According to the present disclosure, uplink transmission speed can be increased in the user equipment and user QoS can be improved by transmitting data using one or more uplink carriers in the terminal. |
| US11121830B2 |
Communication system having a central aggregation device and a remote device
Provided is a communication system that can sustain a reduction in delay in FFT/IFFT processing by code blocking user data, even in a case where the functions of upper layers such as a MAC scheduler and the function of the radio physical layer are implemented separately. In a radio base station (communication system) including a central aggregation device 210 and a remote device 220, the central aggregation device 210 transmits code blocks in a number necessary for generating an OFDM symbol as a piece of data to the remote device 220, the code blocks being produced by dividing user data into units of encoding processing. |
| US11121815B2 |
Shared data channel design
Systems, methods and instrumentalities are disclosed for decoding data. For example, it may be determined, in a current slot, whether data received in a previous slot is decoded successfully. The data received in the previous slot may be included in a Physical Downlink Shared Channel (PDSCH). If the data received in the previous slot is not decoded successfully, preemptive multiplexing information may be detected in a first search space. The data received in the previous slot may be decoded, for example, using detected preemptive multiplexing information. The preemptive multiplexing information may be of a current slot. The preemptive multiplexing information may be comprised in a first DCI. A second search space of the current slot may be searched. For example, the second search space may be searched for a second DCI. The first DCI and the second DCI may be different. |
| US11121814B2 |
Techniques of CSI feedback with unequal error protection messages
In an aspect of the disclosure, a method, a computer-readable medium, and an apparatus are provided. The apparatus may be a UE. The UE determines priority levels of a plurality of messages based on at least one predetermined rule. The plurality of messages contain channel state information to be reported to a base station. The at least one predetermined rule specifies that a message including an indicator indicating at least one of a beam selection at a particular dimension and an orthogonal beam group selection has a priority level higher than a priority level of a message including an indicator indicating at least one of a beam direction from a group of beam candidates or co-phasing between two sets of antennas for two polarizations. The UE sends, to the base station, one or more messages of the plurality of messages based on the priority levels of the plurality of messages. |
| US11121813B2 |
Method and system for wireless local area network (WLAN) long symbol duration migration
A method performed by an AP may comprise transmitting a MU-HE-PPDU, on a first 20 MHz channel and a second 20 MHz channel, to a plurality of STAs. The MU-HE-PPDU may comprise an HE-SIG-A portion carried on the first 20 MHz channel and the second 20 MHz channel. The MU-HE-PPDU may comprise a first HE-SIG-B portion carried on the first 20 MHz channel and a second HE-SIG-B portion carried on the second 20 MHz channel. |
| US11121809B2 |
Channel coding method and apparatus in wireless communications
This application provides a channel encoding method and apparatus in wireless communications. The method includes: performing CRC encoding on A to-be-encoded information bits, to obtain a first bit sequence, where the first bit sequence includes L CRC bits and A information bits; performing a interleaving operation on the first bit sequence, to obtain a second bit sequence, where a first interleaving sequence used for the interleaving operation is obtained based on a system-supported maximum-length interleaving sequence with the length of Kmax+L, and Kmax is a maximum information bit quantity corresponding to the maximum-length interleaving sequence ad a preset rule, and a length of the first interleaving sequence is equal to A+L. Therefore, during distributed CRC encoding, when an information bit quantity is less than the maximum information bit quantity, an interleaving sequence required for completing an interleaving process is obtained based on the system-supported maximum-length interleaving sequence. |
| US11121806B2 |
Decoding performance
This disclosure provides systems, methods and apparatus, including computer programs encoded on computer storage media, for low density parity check (LDPC)-based incremental redundancy (IR) hybrid automatic repeat request (HARQ) transmission processing. In one aspect, an apparatus for wireless communications is configured to generate a first packet using a LDPC encoding process. The apparatus is further configured to generate coded bits using a second LDPC encoding process if the first packet is not successfully decoded by a wireless device, generate a second packet including at least some of the coded bits generated using the second LDPC encoding process, and output the second packet for transmission. |
| US11121804B2 |
Base station, radio terminal, radio communication system, radio communication control method, and program
A radio communication system (1000) according to the present disclosure includes a base station (100) that transmits transmission data, a radio terminal (200) that receives the transmission data from the base station (100) and transmits an acknowledgement for the transmission data to the base station (100). The radio terminal (200) transmits communication quality information measured for a communication status between the radio terminal (200) and the base station (100) to the base station (100). The base station (100) determines control information for controlling a process of the radio terminal (200) to transmit the acknowledgement based on the communication quality information received from the radio terminal (200), and transmits the control information to the radio terminal (200). The radio terminal (200) receives the control information from the base station (100), and transmits the acknowledgement to the base station (100) based on the control information. |
| US11121802B2 |
CSI obtaining method, server, terminal, and AP
A method includes determining at least one first measurement AP in first storage APs according to the address of the first AP, sending a second CSI measurement request to the at least one first measurement AP, where the second CSI measurement request includes the address of the terminal, receiving first measurement data, where the first measurement data includes first CSI, the first CSI is obtained after a target measurement AP performs channel estimation on the first service data, and sending the first measurement data or a first processing result to the terminal, where the first processing result is obtained by using the first measurement data. |
| US11121799B2 |
Method for determining modulation and coding scheme in wireless communication system, and device therefor
The present invention provides a method for determining a modulation and coding scheme (MCS) to be applied to data in a wireless communication system, and a device therefor. Specifically, the method may comprise the steps of: reporting, to a base station, channel state information including a first measurement value related to a channel state between a terminal and the base station; receiving at least one downlink reference signal from the base station; calculating a second measurement value related to the channel state by using the received at least one downlink reference signal; when the second measurement values is equal to or smaller than a preconfigured threshold value in comparison with the first measurement value, transmitting, to the base station, a specific uplink signal requesting a change of an MCS designated to downlink data; and receiving the downlink data, to which the changed MCS has been applied, from the base station. |
| US11121798B2 |
Control method for communication device, and communication device
A method of controlling a communication device including a communication interface that communicates with a wireless terminal includes successively selecting one transmission scheme included in a plurality of transmission schemes according to schedule information and using the selected one transmission scheme for a trial of communications with the wireless terminal via a communication interface in a first period; determining which transmission scheme of the plurality of transmission schemes has succeeded in communicating with the wireless terminal in the first period; and adjusting the schedule information so that a trial of communications using a transmission scheme determined as having succeeded in communicating with the wireless terminal is started earlier in a second period subsequent to the first period than in the first period. |
| US11121794B2 |
Configurable synchronization in next generation wireless networks
Aspects of the present disclosure provide for the transmission of various synchronization signals with variable periodicity. For synchronization signals with long periodicity, in some aspects of the disclosure, the synchronization signals may be transmitted as single-frequency-network (SFN) synchronization signals and/or the synchronization signals may be repeated a number (N) of times within a synchronization burst to reduce user equipment (UE) search latency and improve UE measurement accuracy. In some examples, the synchronization signals may be repeated within a synchronization burst using a repetition pattern that may be configurable based on the periodicity of transmission or fixed for one or more periodicities of transmission. |
| US11121790B2 |
Latency reduction in ethernet frames
A bitstream representing an Ethernet frame is received over a physical medium. Encoded Ethernet blocks are recovered from the bitstream. The Ethernet blocks are descrambled and provided to downstream switching logic, intact, without removing the synchronization bits that were added during the encoding process. More particularly, the intact descrambled Ethernet block is divided into smaller-sized data words; the size of the data words being an integer multiple of the size of the Ethernet block. |
| US11121788B1 |
Channel prediction method and system for MIMO wireless communication system
The disclosure discloses a channel prediction method and system for a MIMO wireless communication system. The method includes the following steps: obtaining frequency domain channel information of each antenna pair of the MIMO wireless communication system through channel estimation; processing, by inverse Fourier transform, frequency domain channel information of each antenna pair to obtain information of each effective delay path of the MIMO wireless communication system; training the width learning system; utilizing the trained width learning system to predict each effective delay path of each antenna pair, so as to obtain the information of the next moment of each effective delay path of each antenna pair; after summarizing the information of the next moment of each effective delay path of each antenna pair obtained through prediction, the Fourier transform is utilized to convert the information into predicted frequency domain channel information. The invention can provide satisfactory prediction performance. |
| US11121786B2 |
Method and apparatus for measuring interference in wireless communication system
An operating method and an apparatus for measuring interference of a user equipment in a wireless communication system are provided. The operating method includes receiving configuration information for interference measurement, from a base station of a serving cell, detecting a downlink reception timing based on a downlink signal received from the base station, determining an interference measurement timing based on the downlink reception timing and a timing advance (TA) offset of the serving cell, and performing interference measurement according to the configuration information at the determined interference measurement timing. |
| US11121783B2 |
Jitter determination method and measurement instrument
A jitter determination method for determining at least one jitter component of an input signal is described. The input signal is generated by a signal source, including: receiving the input signal; determining a step response based on the decoded input signal, the step response being associated with at least the signal source; and determining the at least one jitter component of the input signal based on at least one of the input signal and the determined step response. Further, a measurement instrument is described. |
| US11121781B2 |
Calibration method and apparatus
This application provides a calibration method: receiving, by a control apparatus of an RRU, resource configuration information, where a time-frequency resource indicated by the resource configuration information is used to send and receive a calibration signal between the RRU and n other RRUs, the n other RRUs are RRUs in a calibration path topology, a quantity of hops of a calibration path between the RRU and each of the n other RRUs is 1; controlling, based on the resource configuration information, the RRU to send and receive a calibration signal on the time-frequency resource; obtaining m groups of path information based on the calibration signal; obtaining m calibration coefficients based on the m groups of path information; and compensating M channels of the RRU by using the m calibration coefficients. |
| US11121776B2 |
Faceplate pluggable remote laser source and system incorporating same
A faceplate pluggable remote laser source and system incorporating such a laser source. The system may include an enclosure having a faceplate; a first optical connector, in the faceplate; a laser module; and a loopback fiber cable, connected between the laser module and the first optical connector. The faceplate may form an exterior boundary of the enclosure. The laser module may have a first end including an electrical interface, and a second end including an optical interface. The first end of the laser module may be engaged in a receptacle in the faceplate, and the second end of the laser module may extend outside the faceplate. The laser module may be configured to receive electrical power through the electrical interface, and to produce unmodulated light at the optical interface. The loopback fiber cable and the first optical connector may be configured to route the unmodulated light back into the enclosure. |
| US11121773B2 |
Split power-control electronics with fiber-optic multiplexing
Provided are embodiments of a system for split power-control electronics with fiber-optic multiplexing. The system includes one or more power electronics modules configured to provide power to a load, and a control card configured to control the one or more power electronics modules. The system also includes a control module configured to receive and process the control card, and one or more connections, the one or more connections configured to connect a control module to the one or more power electronics modules. Also provided are embodiments of a method for operating power electronics modules in a redundant mode. |
| US11121771B2 |
System and method for providing integrated projection service of plurality of smart devices in vehicle
A system and method for providing an integrated projection service of a plurality of smart devices, for controlling services for the respective smart devices in the vehicle based on preset priorities of the services when a plurality of smart devices is connected to one vehicle using Wi-Fi, may include providing an integrated projection service of a plurality of smart devices in a vehicle may include making a request to a head unit of the vehicle for connection to enable wired or wireless data communication using Wi-Fi wireless communication technology provided in the vehicle, by at least one smart device positioned in the vehicle, and approving connection of a smart device, searching for service information to be provided by each smart device, and listing retrieved services to be integrated. |
| US11121767B2 |
Handling signals received on paths with differing numbers of hops
A wireless communication system includes a first wireless communication node for transmitting a data signal that is sent to a second wireless communication node by skywave propagation over at least two different data transmission paths. The first data transmission path includes at least one reflection point where the data signal is reflected by the atmosphere and the second data transmission path includes more reflection points than the first data transmission path. The data signal that travelled along the first data transmission path is decoded before the data signal that travelled along the second data transmission path. |
| US11121766B2 |
Wideband transceiver
A wideband transceiver for a gateway is presented. The wideband transceiver may interface with the gateway's processors over an interface that carries data encapsulated in baseband frames. The wideband transceiver may comprise a modulator and a high power amplifier and may improve a transmitted signal quality and may utilize a wideband for wireless communications, for example, for a satellite communication system. |
| US11121763B1 |
System and method for downlink scheduling that optimizes downlink (DL) capacity
An illustrated embodiment disclosed herein is a method including maintaining, by a satellite, a plurality of physical data units (PDUs). Each PDU has a corresponding spreading factor (SF). The method includes selecting, by the satellite, a lowest SF, adding, by the satellite, all PDUs associated with the lowest SF to a slot, and determining, by the satellite and until the determination is affirmative, whether available capacity of the slot is less than a predetermined threshold. The method includes, responsive to determining that the available capacity of the slot is not less than the predetermined threshold, selecting, by the satellite, a greater SF and adding, by the satellite, one or more PDUs associated with the greater SF to the slot. The method includes responsive to determining that the available capacity of the slot is less than that the predetermined threshold, sending, by the satellite, the slot to an endpoint. |
| US11121759B2 |
Techniques for interference-aware beam pair selection
A processing device in a transmit-receive point for interference-aware beam pair selection, a transmit-receive point and a method are disclosed. The processing device is configured to select a beam pair from a set of candidate beam pairs (i, j), for setting up a communication link from a serving transmit device to a receive device via the selected beam pair, wherein each of the candidate beam pairs comprises a transmit beam j of the serving transmit device and a receive beam i of the receive device, wherein the selection is based on statistics of a usage of one or more interfering transmit beams (m, k) of one or more interfering transmit devices m, and k represents one or more transmit beams. |
| US11121756B2 |
Method for transmitting and receiving channel state information in wireless communication system and apparatus therefor
Disclosed are a method for transmitting and receiving a radio signal in a wireless communication system and an apparatus therefor. Particularly, a method for performing, by a terminal, channel state information (CSI) reporting in a wireless communication system comprises the steps of: receiving, from a base station, bandwidth part (BWP) configuration information on a BWP for uplink and/or downlink transmission; receiving, from the base station, reporting configuration information including a reporting configuration for the CSI reporting; and performing the CSI reporting on the basis of the BWP configuration information and the reporting configuration information, wherein the reporting configuration is associated with the BWP, and whether or not the reporting configuration is activated may be determined on the basis of whether or not the BWP is activated. |
| US11121754B2 |
Method for measuring and reporting channel state information in wireless communication system and device for same
The present specification provides a method for measuring and reporting channel state information (CSI) in a wireless communication system and a device for same. More particularly, in a method for reporting channel state information in a wireless communication system, the method which is carried out by means of a base station can comprise the steps of: transmitting CSI report configuration information associated with a CSI report to a terminal, wherein the CSI report configuration information comprises information indicating a time offset for the CSI report; transmitting a channel state information reference signal (CSI-RS) to the terminal; transmitting control information, which is for triggering the CSI report, to the terminal; and receiving from the terminal the CSI report which is generated on the basis of the measurement with respect to the CSI-RS. Here, if the information indicating the time offset for the CSI report is configured in “0” value, the CSI-RS can be transmitted periodically or semi-continuously. |
| US11121753B2 |
Method and device for receiving channel state information in mobile communication system
Disclosed is a 5G or pre-5G communication system for supporting a data transmission rate higher than that of a 4G communication system such as LTE. According to an embodiment of the present invention, a method for reporting channel state information of a terminal in a wireless communication system comprises the steps of: determining whether a resource for transmitting a reference signal for channel measurement overlaps with a resource for a specific type of transmission; generating channel state information on the basis of the determination result; and transmitting the generated channel state information to a base station. |
| US11121747B2 |
Wireless communication device and wireless communication method
A wireless communication device includes: a receiving unit that receives a first signal storing first information with which precision or accuracy of transmission power is recognized; and a transmission unit that transmits a second signal regarding permission of multiple access that allows simultaneous communication with at least one first wireless communication device identified on the basis of the first information. A wireless communication device includes: a transmission unit that transmits a first signal storing first information with which precision or accuracy of transmission power is recognized; a receiving unit that receives a second signal regarding permission of multiple access that allows simultaneous communication after the transmission of the first signal; and a control unit that controls transmission of a third signal on the basis of the second signal. |
| US11121746B2 |
Dynamic switching between SU-MIMO and MU-MIMO transmission
Disclosed herein are system, method, and computer program product embodiments for indicating a preference to receive a single-user multiple input multiple output (SU-MIMO) or multi-user multiple input multiple output (MU-MIMO) transmission from an access point (AP). Embodiments include generating a standard action frame that contains an action field that species a preference to receive a SU-MIMO or MU-MIMO transmission from the AP. A station (STA) can transmit the generated action frame to the AP. The STA can receive an acknowledgement frame from the AP that indicates the AP is configured to use the requested transmission method. The STA can then receive data from the AP using the requested transmission method. |
| US11121745B2 |
Method for transmitting plurality of beamformed reference signals for open-loop MIMO transmission in wireless communication system and apparatus therefor
Disclosed is a method for a terminal to report channel state information to a base station in a wireless communication system. The method comprises the steps of: receiving a first reference signal and a second reference signal which are cyclically beamformed in different directions in a predetermined resource unit from the base station; and reporting the channel state information to the base station on the basis of the first reference signal and the second reference signal, wherein the channel state information comprises a first precoder group corresponding to the first reference signal and a second precoder group corresponding to the second reference signal. |
| US11121742B2 |
Self-detaching anti-theft device with a multi-purpose transceiver for energy harvesting and communication
Systems and methods for operating a security tag. The methods comprise: performing communication operations by the security tag at a communications frequency; using a receive circuit of the security tag to harvest energy emitted from a transmit circuit of an external device at an energy harvesting frequency. The communications frequency is out of band of the energy harvesting frequency. |
| US11121741B2 |
Systems and methods for configuring and communicating with HVAC devices
A sensor in a building HVAC system includes a transducer configured to measure a variable in the building HVAC system and to generate a sensor reading indicating a value of the measured variable. The sensor includes a communications interface configured to provide the sensor reading to a control device in the building HVAC system and a near field communication (NFC) circuit separate from the communications interface. The NFC circuit is configured to facilitate bidirectional NFC data communications between the sensor and a mobile device. The sensor includes a processing circuit having a processor and memory. The processing circuit is configured to wirelessly transmit data stored in the memory of the sensor to the mobile device via the NFC circuit, wirelessly receive data from the mobile device via the NFC circuit, and store the data received from the mobile device in the memory of the sensor. |
| US11121740B2 |
Near field, full duplex data link for resonant induction wireless charging
A full duplex, low latency, near field data link controls a resonant induction, wireless power transfer system for recharging batteries. In an electric vehicle embodiment, an assembly is aligned with respect to a ground assembly to receive a charging signal. The vehicle assembly includes one or more charging coils and a first full duplex inductively coupled data communication system that communicates with a ground assembly including one or more charging coils and a second fill duplex inductively coupled data communications system. The charging coils of the ground assembly and the vehicle assembly are selectively enabled based on geometric positioning of the vehicle assembly relative to the ground assembly for charging. As appropriate, the transmit/receive system of the ground assembly and/or the vehicle assembly are adjusted to be of the same type to enable communication of charging management and control data between the ground assembly and the vehicle assembly during charging. |
| US11121739B2 |
Sounding reference signal (SRS) configurations for one or more frequency hops
In an aspect, a UE receives an SRS configuration that indicates, for at least one frequency hop, an allocation of less than all subcarriers of a sounding bandwidth to SRS per OFDM symbol in a respective frequency hop. The UE transmits, to a BS in a first frequency hop, OFDM symbols with SRS across all subcarriers of a first sounding bandwidth associated with the first frequency hop. In another aspect, the UE receives an SRS configuration that indicates, for frequency hops associated with the same comb-type, a sequence of resource element offsets that is based on a number of OFDM symbols used in the respective frequency hop. The UE transmits OFDM symbols with SRS in accordance with the sequence of resource element offsets indicated by the SRS configuration for the respective frequency hop. |
| US11121737B2 |
Systems and methods for intelligently-tuned digital self-interference cancellation
A system for digital self-interference cancellation includes a filter that generates a reduced-noise digital residue signal; a channel estimator that generates a current self-interference channel estimate from a digital transmit signal, the reduced-noise digital residue signal, and past self-interference channel estimates; a controller that dynamically sets the digital transform configuration in response to changes in a controller-sampled digital residue signal; a predictor that modifies output of the channel estimator to compensate for a first time delay incurred in tuning the system for digital self-interference cancellation; and a channel memory that stores the past self-interference channel estimates. |
| US11121736B2 |
Radio frequency circuit supporting carrier aggregation
A radio frequency (RF) circuit is provided. The RF circuit may include a variety of RF filters organized into a number of filter banks and configured to support carrier aggregation (CA) in a variety of band combinations. In examples discussed herein, the RF circuit is configured to utilize separate receive and transmit filters for filtering an RF receive signal and an RF transmit signal in a time-division duplex (TDD) band, respectively. By employing separate receive and transmit filters for the TDD band, as opposed to using an integrated receive-transmit filter, it may be possible to implement the receive and transmit filters in the RF circuit with improved impedance matching, interference rejection, and insertion loss without increasing a footprint of the RF circuit. |
| US11121731B2 |
Digital radio head control
Techniques are described related to digital radio control and operation. The various techniques described herein enable high-frequency local oscillator (LO) signal generation using injection locked cock multipliers (ILCMs). The techniques also include the use of LO signals for carrier aggregation applications for phased array front ends. Furthermore, the disclosed techniques include the use of array element-level control using per-chain DC-DC converters. Still further, the disclosed techniques include the use of adaptive spatial filtering and optimal combining of analog-to-digital converters (ADCs) to maximize dynamic range in digital beamforming systems. |
| US11121730B2 |
Radio frequency circuit, multiplexer, and communication device
A radio frequency circuit includes: an antenna connection terminal; a UHB transfer circuit that transfers a signal of a first frequency band including at least a part of a frequency band higher than or equal to 3.3 GHz and under 5 GHz; a NR-U transfer circuit that transfers a signal of a second frequency band including at least a part of a frequency band higher than or equal to 6.6 GHz; and a filter having a frequency band including the first frequency band and the second frequency band as a passband. The filter is disposed between the antenna connection terminal and a connection node of the UHB transfer circuit and the NR-U transfer circuit. |
| US11121728B2 |
Pre-coding and decoding polar codes using local feedback
Disclosed are devices, systems and methods for precoding and decoding polar codes using local feedback are described. One example method for improving an error correction capability of a decoder includes receiving a noisy codeword vector of length n, the codeword having been generated based on a concatenation of a convolutional encoding operation and a polar encoding operation and provided to a communication channel prior to reception by the decoder, performing a successive-cancellation decoding operation on the noisy codeword vector to generate a plurality of polar decoded symbols (n), generating a plurality of information symbols (k) by performing a convolutional decoding operation on the plurality of polar decoded symbols, wherein k/n is a rate of the concatenation of the convolutional encoding operation and the polar encoding operation, and performing a bidirectional communication between the successive-cancellation decoding operation and the convolutional decoding operation. |
| US11121721B2 |
Method of error concealment, and associated device
In an embodiment, a method includes: receiving an audio frame; decomposing the received audio frame into M sub-band pulse-code modulation (PCM) audio frames, where M is a positive integer number; predicting a PCM sample of one sub-band PCM audio frame of the M sub-band PCM audio frames; comparing the predicted PCM sample with a corresponding received PCM sample to generate a prediction error sample; comparing an instantaneous absolute value of the prediction error sample with a threshold; and replacing the corresponding received PCM sample with a value based on the predicted PCM sample when the instantaneous absolute value of the prediction error sample is greater than the threshold. |
| US11121720B2 |
Analog-to-digital converter having quantization error duplicate mechanism
The present invention provides an ADC including a first switched capacitor array, a second switched capacitor array, a third switched capacitor array, an integrator and a quantizer. The first switched capacitor array is configured to sample the input signal to generate a first sampled signal. The second switched capacitor array is configured to sample the input signal to generate a second sampled signal and generate a first quantization error. The third switched capacitor array is configured to sample the input signal to generate a third sampled signal and generate a second quantization error. The integrator is configured to receive the first quantization error and the second quantization error in a time-interleaving manner, and integrate the first/second quantization error to generate an integrated quantization error. The quantizer is configured to quantize the first sampled signal by using the integrated quantization error as a reference voltage to generate a digital output signal. |
| US11121718B1 |
Multi-stage sigma-delta analog-to-digital converter with dither
Techniques to implement subtractive dither in a multi-stage ADC. Subtractive dither involves adding a first dither signal at a first node and adding a second dither signal at a second node (which can be the same as the first node), where the first and second dither signal combine and sum to approximately zero. By utilizing subtractive dither in a multi-stage ADC, the headroom requirements of a loop filter in a main loop of the ADC and the range requirements of a feedback DAC in the main loop can both be relaxed. |
| US11121714B2 |
Apparatuses and methods for identifying memory devices of a semiconductor device sharing an external resistance
Apparatuses and methods for identifying memory devices of a semiconductor device sharing an external resistance are disclosed. A memory device of a semiconductor device may be set in an identification mode and provide an identification request to other memory devices that are coupled to a common communication channel. The memory devices that are coupled to the common communication channel may share an external resistance, for example, for calibration of respective programmable termination components of the memory devices. The memory devices that receive the identification request set a respective identification flag which can be read to determine which memory devices share an external resistance with the memory device having the set identification mode. |
| US11121711B2 |
Method for multiplexing between power supply signals for voltage limited circuits
In an embodiment, a system includes a plurality of functional circuits, a power supply circuit, and a power management circuit. The power supply circuit may generate a shared power signal coupled to each of the functional circuits, and to generate a plurality of adjustable power signals. One adjustable power signal may be coupled to a particular functional circuit of the functional circuits. The power management circuit may a request to the power supply circuit to change a voltage level of the one particular adjustable power signal from a first voltage to a second voltage. The particular functional circuit may couple a respective power node for a sub-circuit of the particular functional circuit to either of the shared power signal or the particular adjustable power signal. The particular functional circuit may also be configured to maintain an operational voltage level on the power node. |
| US11121706B1 |
Duty cycle correction circuit and semiconductor system
A duty cycle correction circuit may include a data alignment circuit, a correction value generation circuit, and a dock generation circuit. The data alignment circuit may align unit pattern data based on a strobe clock signal. The correction value generation circuit may generate a duty correction value by measuring the amount of charges corresponding to the aligned data. The clock generation circuit may correct the duty ratio of the strobe clock signal based on the duty correction value. |
| US11121702B1 |
Digital step attenuator
Various embodiments of the invention relate to attenuators with reduced temperature variation. By coordinating first-order resistance temperature (FORT) coefficients of resistors, embodiments of attenuator or attenuator cells are capable of achieving desired attenuation with reduced or minimized temperature variation. Such achievements in reducing temperature variation may be obtained without relying on resistors with large negative FORT coefficients. Attenuator cells may be configured as T-type attenuator cells, π-type attenuator cells, bridged-T attenuator cells, or shunt attenuators with various FORT coefficient combinations for the resistors incorporated within the attenuator cells. Furthermore, various attenuator cells may be cascaded together into a digital step attenuator with the temperature variation of those cells compensating or offsetting each other for an overall minimum temperature variation. |
| US11121696B2 |
Electrode defined resonator
A bulk acoustic resonator operable in a bulk acoustic mode includes a resonator body mounted to a separate carrier that is not part of the resonator body. The resonator body includes a piezoelectric layer, a device layer, and a top conductive layer on the piezoelectric layer opposite the device layer. A surface of the device layer opposite the piezoelectric layer is for mounting the resonator body to the carrier. |
| US11121692B2 |
Noise filter circuit
An input loop line (5) is disposed in a region inside or outside the loop of an output loop line (9) as viewed in the thickness direction of a dielectric layer (2). |
| US11121690B2 |
Class D amplifier circuit
This application relates to Class D amplifier circuits. A modulator controls a Class D output stage based on a modulator input signal (Dm) to generate an output signal (Vout) which is representative of an input signal (Din). An error block, which may comprise an ADC, generates an error signal (ε) from the output signal and the input signal. In various embodiments the extent to which the error signal (ε) contributes to the modulator input signal (Dm) is variable based on an indication of the amplitude of the input signal (Din). The error signal may be received at a first input of a signal selector block. The input signal may be received at a second input of the signal selector block. The signal selector block may be operable in first and second modes of operation, wherein in the first mode the modulator input signal is based at least in part on the error signal; and in the second mode the modulator input signal is based on the digital input signal and is independent of the error signal. The error signal can be used to reduce distortion at high signal levels but is not used at low signal levels and so the noise floor at low signal levels does not depend on the component of the error block. |
| US11121687B1 |
Voltage gain amplifier architecture for automotive radar
Disclosed herein is a circuit including a differential amplifier having a pair of input transistors coupled in a differential arrangement between adjustable current sources and receiving input differential signals from a pair of input voltage regulators. The adjustable current sources are configured to source more current to the pair of input transistors than current that is sunk from the pair of input transistors. A first amplifier has inputs coupled to receive differential output voltages from the differential amplifier. A second amplifier has inputs coupled to receive amplified differential output voltages from the first amplifier. A low pass filter has inputs coupled to receive further amplified differential output voltages from the second amplifier and produce final differential output voltages. |
| US11121684B2 |
Method and apparatus for digital envelope tracking with dynamically changing voltage levels for power amplifier
A device for digital envelope tracking with dynamically changing voltage levels for a radio frequency (RF) power amplifier is disclosed. A power management unit generates a set of supply voltages for a power amplifier based on a control signal. A setpoint generator in the power management integrated circuit gradually increases or decreases a target voltage such that the set of supply voltages output from the voltage converter gradually increase or decrease in response to a gradual transition of the target voltage. A transceiver includes digital models for replicating a behavior of the setpoint generator and a voltage regulator in the voltage converter such that a signal pre-distortion unit may use an instantaneous voltage level for signal predistortion. |
| US11121679B2 |
Amplifying apparatus with improved linearity
An amplifying apparatus is provided. The amplifying apparatus comprises an amplifying circuit comprising a power amplifier and a bias circuit, the bias circuit is configured to detect an ambient temperature of the power amplifier to output a temperature voltage and regulate an internal current based on an input control signal to supply a bias current obtained by the regulation to the power amplifier; and a temperature control circuit that generates the control signal based on the temperature voltage during initial driving from a transmission mode starting point in time to an input point in time at which an input signal is input and outputting the control signal to the amplifying circuit. |
| US11121676B1 |
Methods and circuits for harmonic suppression
The present document discloses circuits and methods for providing an output voltage at an output port. In one of the embodiments, a circuit has a power amplifier having an output. In particular, the circuit may have a first transformer including a first coil and a second coil. Moreover, the circuit may have a first capacitor connected in parallel to the first coil and a second capacitor connected in parallel to the second coil. More particularly, the circuit may be adapted to have a first end of the first coil connected to the output of the power amplifier, and a second end of the first coil connected to the output port of the circuit. |
| US11121675B2 |
Remotely powered low power oscillator
A remotely powered low power oscillator. According to an embodiment of the present invention, a method comprises an oscillator core, in a first environment, generating an oscillating signal; a power management system, in a second environment, supplying power to the oscillator core to operate the oscillator core; a sensing system, in the first environment, sensing one or more parameters of the oscillator core, and generating one or more signals representing said one or more parameters; transmitting the one or more signals from the sensing system to the second environment; and using the one or more signals in the second environment to control the power supplied to the oscillator core from the power management system. |
| US11121672B2 |
Solar energy harvesting apparatus with turbulent airflow cleaning
A photovoltaic system includes a photovoltaic cell including a sun tracker, a top surface configured to generate electrical energy from the incident sunlight, and a bottom surface configured to thermally dispel heat generated by the photovoltaic cell; at least one mirror including a reflective surface; a plurality of actuators securing the at least one mirror the photovoltaic cell; at least one actuator pump connected to the plurality of actuators and configured to extend or retract the plurality of actuators and adjust the distance of the at least one mirror from the top surface; a heat exchanger thermally coupled to the bottom surface of the photovoltaic cell; and a fluid pump connected to the heat exchanger and configured to circulate the fluid through the heat exchanger. |
| US11121671B2 |
A-frame foundation system for single-axis trackers with weak axis support
A single-axis tracker supported by multiple A-frame-shaped single-truss foundations that translate lateral loads into axial forces of tension and compression, and at least one truss foundation supporting the torque tube drive motor or other tracker component subject to axial loads to provide support for lateral loads as well as loads oriented along the axis of the torque tube. |
| US11121670B2 |
Smart shingles
At least one shingle is integrated with logic circuitry and various other components which enable high-level functionality and automated system diagnostics. Each shingle can automatically determine its absolute position on a rooftop and/or its position relative to other shingles in the smart shingle system. Each shingle can also detect various changes in its own power generation, efficiency, and/or operating conditions, as well as those of neighboring shingles. Each shingle can then leverage this information to conduct system diagnostics and possibly to generate and/or execute recommended solutions. In another embodiment, each shingle can be coupled to a centralized controller which can perform the same automapping and diagnostic functions. The controller can also monitor the power usage of the building to help optimize the power generation of the smart shingle system. In some embodiments, the smart shingle system can be outfitted with heating components and/or actuators to help automate the process of keeping the smart shingles clear of debris. |
| US11121668B2 |
Clamps for solar system
A solar power system can include a rail and a solar module disposed on the rail. A clamp assembly can couple the solar module to the rail. The clamp assembly can have a clamped configuration in which the solar module is secured to the rail and an unclamped configuration. The clamp assembly can comprise an upper clamp member, a lower clamp member coupled to the rail, and a stabilization member mechanically engaging the upper clamp member and the lower clamp member. The stabilization member can prevent rotation of the lower clamp member relative to the rail when the clamp assembly is in the clamped and unclamped configurations. In the unclamped configuration, the stabilization member can be biased such that the upper clamp member is disposed at a sufficient clearance above the rail to permit the insertion of the solar module between the upper clamp member and the rail. |
| US11121667B2 |
Mounting system for roof mounted solar panels
A method and apparatus for efficiently securing flexible solar panels on a roof surface that does not require penetration of the roof membrane. The apparatus is composed of extruded aluminum bars with two grooves. The apparatus has a low profile relative to the surface of the roof. The aluminum bars' streamlined design allows free drainage between and over the aluminum structure, as well as an aerodynamic profile to counteract air flow resistance in a high wind environment. |
| US11121665B1 |
Current measurement apparatus
Integrated circuitry, such as a microcontroller, for controlling an electric motor includes circuitry for measuring a bi-directional current flowing within a coil of the electric motor. The current is sensed by an externally implemented current sensing element, such as a shunt resistor, to produce a differential voltage that is delivered to input pins of the microcontroller, which are protected by electrostatic discharge protection circuits. Current sources implemented within the microcontroller are coupled to the input pins, and work in concert with external resistors to shift the differential voltage so that it is maintained within an appropriate voltage operating range so that an accurate measurement of the bi-directional current can be made by the microcontroller. |
| US11121664B2 |
Signal conversion device and motor drive system
A signal conversion device includes a first signal input terminal, a second signal input terminal, and a detector. A first AC signal is supplied to the first signal input terminal from a signal source. The second signal input terminal is supplied with an in-phase signal that is in phase with the first AC signal and an opposite-phase signal that is opposite in phase with the first AC signal. The second signal input terminal is supplied with a second AC signal whose phase has been switched by a switchover between the in-phase signal and the opposite-phase signal from the signal source. The detector detects, using the supplied first AC signal, whether the supplied second AC signal is the in-phase signal or the opposite-phase signal. |
| US11121660B2 |
System and method for improving drive efficiency in an industrial automation system
Provided herein are systems, methods, and software for improving drive efficiency in an industrial automation system. In one implementation, a system comprises a mechanical load, an electromechanical device attached to the mechanical load, and a drive coupled to the electromechanical device. A processor is programmed to generate and display an acceleration curve, a duplicate acceleration curve, an energy curve and a duplicate energy curve. A user input is received indicating a change to at least a portion of the duplicate acceleration curve, and a change to the duplicate energy curve is calculated and displayed. A modified command signal based on the user input is calculated, and the drive is configured to control the electromechanical device via the modified command signal to mechanically operate the mechanical load perform a task. |
| US11121659B2 |
Evaluation device, evaluation method and control device
Provided is an evaluation device that determines the necessity of a notch filter inserted in a control system that controls an electric motor by closed loop control. The evaluation device includes: a characteristic acquisition parts for changing a parameter associated with a characteristic of the notch filter from a first value, which is a prescribed value, to a second value, and acquiring a change in a frequency response characteristic of the electric motor when the notch filter is applied; and a determination parts for determining the necessity of the notch filter based on the change in the frequency response characteristic that has been acquired. |
| US11121658B2 |
Motor control apparatus, image forming apparatus, and control method of motor control apparatus
A parameter concerning rotation of a motor is estimated (first estimation). A parameter concerning rotation of the motor is estimated, based on a model representing a prescribed change in a rotation speed of the motor (second estimation). It is determined whether an anomaly has occurred in the rotation of the motor, based on the parameter estimated in the first estimation and the parameter estimated in the second estimation. |
| US11121656B2 |
Method of controlling an electrical machine
A method of controlling an electrical machine, wherein the method includes: a) injecting a first voltage waveform (uhx) with a first fundamental frequency into the electrical machine in a first axis of a rotor reference frame, combined with a voltage signal for controlling the electrical machine, b) determining a second axis current component (iqhx) of a second axis of the rotor reference frame, having the first fundamental frequency, generated in response to the injection of the first voltage waveform (uhx), c) controlling based on the second axis current component (iqhx) a second axis voltage component (uqhx) of the second axis, having the first fundamental frequency, to obtain an adjusted second axis voltage component for controlling the second axis current component (iqhx) towards zero, d) feeding back the adjusted second axis voltage component to combine the adjusted second axis voltage component with the voltage signal and the injected first voltage waveform (uhx), and repeating steps b)-d) until the second axis current component is smaller than a threshold value (iqhx), e) determining a differential cross-coupling parameter of the electrical machine based on the second axis voltage component (uqhx) and a first axis current component (idhx) having the first fundamental frequency, when the second axis current component is smaller than the threshold value (iqhx), and g) controlling the electrical machine based on the differential cross-coupling parameter. |
| US11121654B2 |
Dynamic stability control for electric motor drives using stator flux oriented control
Dynamic stability control for electric motors is provided. The system determines, for an electric motor of the electric vehicle, a slip frequency indicating a difference between a synchronous speed of a magnetic field of the electric motor and a rotating speed of a rotor of the electric motor. The system compares the slip frequency with a threshold. The system activates, responsive to the slip frequency greater than or equal to the threshold, a slip limiter to adjust a current command to generate an adjusted current command that causes a reduction in the slip frequency. The system deactivates, responsive to an external torque command less than a subsequent current command received subsequent to transmission of the adjusted current command, the slip limiter. |
| US11121653B2 |
Inverter generator
In an inverter generator having a generator unit including three phase windings driven by an engine, a converter having multiple switching elements and configured to convert alternating current outputted from the generator unit to direct current, an inverter configured to convert direct current outputted from the converter to alternating current and output the alternating current to a load, and a converter control unit configured to determine PWM control ON-time period and drive the multiple switching elements so that inter-terminal voltage of direct current outputted from the converter stays constant with respect to increase/decrease of the load, the converter control unit is configured to detect, with respect to voltage waveforms occurring in the three-phase windings in cycle (t−n), crossing angle between voltage waveform of one phase and voltage waveform of a phase adjacent thereto and to drive the multiple switching elements of either the one phase and the adjacent phase in cycle (t) such that the detected crossing angle is included in the PWM control signal ON-time period. |
| US11121651B2 |
Driving force control method and device for hybrid vehicle
Provided are a driving force control method and device for a hybrid vehicle, each capable of effectively absorbing torque fluctuation of an engine while suppressing deterioration in energy efficiency. The driving force control device for a hybrid vehicle comprises a PCM configured to: estimate an average torque output by an engine; estimate a torque fluctuation component of the torque output by the engine; set a countertorque for suppressing the estimated torque fluctuation component; and control an electric motor to output the set countertorque, wherein the PCM is operable, under a condition that an engine speed is constant, to set the countertorque such that, as the average torque output by an engine becomes larger, the absolute value of the countertorque becomes smaller. |
| US11121650B2 |
Direct current motor combinations for electric vehicles
A vehicular propulsion system is described that uses a plurality of direct current (DC) motors operatively attached to a common drive shaft or shafts of an electric vehicle (EV) or boat. Each motor is powered separately by direct current from a battery cassette or trays swappably inserted into the chassis of the vehicle. The battery cassettes are secured in racks, with one or more individual battery cassettes connected to each of individual motors. The individual battery cassettes are sized to have a weight suitable so as to be readily swapped out as needed for recharging, maintenance or replacement, enabling vehicle range to be extended en route by exchanging depleted battery cassettes for new batteries whenever needed. DC motors may be selected to obtain efficiencies greater than obtainable with AC motors, but require no expensive inverter unit. |
| US11121648B2 |
Piezoelectric generator
A piezoelectric generator including: a piezoelectric element; a circuit for shorting and placing in open circuit the piezoelectric element; and an inductive converter. |
| US11121647B2 |
Contact pad features
An electrical connection structure for connecting a piezoelectric element and an electrical circuit to each other with a conductive adhesive is described. The electrical connection structure includes an epoxy, a conductive component surrounded by the epoxy, and a trace feature implemented on top of the electrical connection structure. |
| US11121641B1 |
High-power machine drive system based on modular multilevel converter
The present invention discloses a high-power machine drive system based on a modular multilevel converter (MMC), which belongs to the technical field of power generation, power transformation, or power distribution. The high-power machine drive system consists of a modular multilevel converter and a multi-pulse cycloconverter. The MMC outputs k phases of high-frequency AC voltages with a phase difference of 2π/k, and the multi-pulse cycloconverter outputs a low-frequency voltage to drive a corresponding machine. According to the present invention, the MMC is combined with the multi-pulse cycloconverter, and by adopting the MMC that operates at a high frequency, the capacity, the volume, and the weight of the energy storage capacitor of the MMC are reduced, the voltage level at the DC side of the MMC is increased, and the capacity of the drive system is increased. By adopting the multi-pulse cycloconverter, quality of an output waveform at a machine side can be guaranteed, thereby implementing low frequency control on the machine. The present invention may be adapted to drive a high-power low-speed machine. |
| US11121637B2 |
Power conversion device and power conversion system including a power converter capable of converting between alternating-current (AC) power and direct-current (DC) power
A power conversion system includes a first power converter and a second power converter which are capable of converting an alternating-current power into a direct-current power or converting a DC power into an AC power. The first power converter is interconnectable to a first AC system via a first AC circuit breaker. The second power converter is interconnectable to a second AC system via a second AC circuit breaker. A first DC terminal of the first power converter and a second DC terminal of the second power converter are connectable. The first power converter begins operation prior to the second power converter. A first control device controls a voltage of the first DC terminal, based on a status of the second power converter sent from a second control device. |
| US11121635B2 |
Accurate valley detection for secondary controlled flyback converter
An AC-DC converter with synchronous rectifier (SR) architecture and method for operating the same are described. Generally, a secondary side IC controller of the AC-DC converter includes a SR-SNS pin coupled to a peak-detector block, a zero-crossing block, and a calibration block. The calibration block is configured to: measure a loop turn-around delay (Tloop), a time (Tpkpk) between two successive peak voltages detected on the SR-SNS pin, and a time (Tzpk) from when the voltage sensed on the SR-SNS pin crosses zero voltage to when a peak voltage is detected on the SR-SNS pin; and set timing for a signal to turn on a power switch in a primary side of the AC-DC converter based at least on Tloop, Tpkpk, and Tzpk. |
| US11121633B2 |
Low common mode noise transformers and switch-mode DC-DC power converters
A switch-mode DC-DC power converter includes one or more input terminals and output terminals, and a transformer coupled between the input and output terminals. The transformer includes a plurality of winding sets. Each winding set includes a primary winding and a secondary winding magnetically coupled with one another. The primary winding and the secondary winding include the same number of turns. The primary windings of the plurality of winding sets are connected in series and the secondary windings of the plurality of winding sets are connected in parallel. The power converter also includes at least one spacer positioned to separate an adjacent pair of the plurality of winding sets. A magnetic coupling between the adjacent pair of the plurality of winding sets is less than the magnetic coupling between the primary winding and the secondary winding within each winding set. |
| US11121630B2 |
In-vehicle DC-DC converter
An in-vehicle DC-DC converter includes a gain setting unit that sets a gain to be used for feedback computation, a duty ratio determination unit that determines a duty ratio, and a drive unit that outputs, to a switching element, a PWM signal that is based on the duty ratio to be used determined by the duty ratio determination unit. The duty ratio determination unit includes a computation unit that repeatedly performs feedback computation for calculating a duty ratio of a PWM signal, so as to approximate a voltage value of an output-side conductive path to a target voltage value, based on a voltage value detected by the voltage detection unit and the gain to be used set by the gain setting unit. The gain setting unit sets the gain to be used, based on a voltage value detected by the voltage detection unit. |
| US11121628B2 |
Switch control circuit and buck converter comprising the same
A buck converter includes a power switch having a first end to receive an input voltage, a synchronous switch connected between a second end of the power switch and the ground, an inductor having a first end connected to the other end of the power switch, and a switch control circuit configured to turn off the synchronous switch when a zero voltage delay time passes after an inductor current flowing through the inductor reaches a predetermined reference value, calculate a dead time based on the input voltage and the zero voltage delay time, and turn on the power switch when the dead time passes following the turn-off time of the synchronous switch. |
| US11121625B2 |
Voltage doubler using a switching regulator and voltage limiter
A voltage doubler circuit configuration includes a switching regulator having a variable input voltage and a regulated voltage, and a voltage doubler circuit that utilizes the regulated voltage of the switching regulator. The voltage doubler circuit includes an output capacitor that receives an elevated voltage from a voltage doubler capacitor and an electrical clamp that limits the voltage doubler capacitor from exceeding the regulated voltage. The output voltage is twice the regulated voltage minus circuit losses. |
| US11121624B1 |
Configurable multi-output charge pump
A configurable multi-output charge pump for power supply generation includes one or more flying capacitors (FCs) arranged to be switchably connected into a plurality of circuit configurations operative to provide respective output voltages at a common charging node. A configuration logic circuit is operative to generate one or more configuration setting control signals to effectuate a particular circuit configuration. One or more storage capacitors (SC) are independently and individually connectable to the common charging node depending on a selection control logic having a configurable duty cycle, wherein each SC is operative to supply a respective voltage output to drive a corresponding electrical load. |
| US11121621B1 |
Low-power-consumption protection circuit
A low-power-consumption protection circuit includes a load detection module, a secondary feedback control module, and a primary control module. The load detection module is coupled to a current detection unit. The secondary feedback control module is coupled to the load detection module and an isolation unit. The primary control module is coupled to the isolation unit and an isolation switch. When the load detection module detects that the current detection unit outputs a voltage level, the secondary feedback control module transmits a protection signal to the primary control module through the isolation unit. |
| US11121615B2 |
Actuator and linear motion module
An actuator is provided, including a fixed assembly and a movable assembly. The fixed assembly includes a coil module, a base, a first screwing member, and a linear rail. The first screwing member passes through the base and the linear rail, and the linear rail is positioned on the base. The movable assembly includes a U-shaped back board having an inner space, a first magnetic module, a second magnetic module aligned with the first magnetic module, and a sliding block. The first and second magnetic modules are disposed on the U-shaped back board and accommodated in the inner space. The coil module is disposed between the first magnetic module and the second magnetic module. The sliding block is positioned on the U-shaped back board in the inner space, and slidably connected to the linear rail. |
| US11121614B2 |
Pre-warped rotors for control of magnet-stator gap in axial flux machines
An assembly for use in an axial flux motor or generator includes a rotor plate and a magnet, the magnet having a surface that is orthogonal to a magnetization direction of the magnet. The rotor plate is adapted to engage a rotor shaft that rotates about an axis of rotation, and the magnet is attached to the rotor plate. The rotor plate and magnet are configured and arranged such that, if the rotor plate and the magnet are separated from all other magnetic field generating components, then a distance between a first plane that intercepts a first point on the surface and to which the axis of rotation is normal and a second plane that intercepts a second point on the surface and to which the axis of rotation is normal is substantially greater than zero. |
| US11121606B2 |
Motor, circuit board, and engine cooling module including the motor
The present disclosure relates to a motor, a circuit board and an engine cooling module including the motor. The motor includes a stator, the stator includes a control module and a heat sink, the control module includes a circuit board and a plurality of heat generating electronic components mounted on a top surface of the circuit board, a plurality of ceramic heat conducting members is embedded inside the circuit board at positions facing the heat generating electronic components, and the heat sink is attached on a bottom surface of the circuit board. The motor has improved heat dissipation effect. |
| US11121603B2 |
Drive unit
A circuit unit of a drive unit includes a plate-shaped heat sink that extends in a direction perpendicular to an axis of rotation of a motor, and a lower case arranged on a lower side of the heat sink. In the drive unit, a fastening member, which is formed on the lower case, is fastened to a housing, and a height of a fastening surface, which is located on an upper end of the fastening member, is positioned within a height range that spans from a lower surface to an upper surface of the heat sink. |
| US11121599B2 |
Slot sealing compound, slot seal, and method for producing a slot seal
The invention relates to a slot sealing compound (7) for an electrical machine that comprises at least one slot (2) with a slot opening (5) for receiving an electrical conductor arrangement (3). Said slot sealing compound (7) contains a magnetic filler material, particularly a soft-magnetic filler material, and a reactive resin mixture that comprises at least one resin component. In the interests of improving storage stability for said slot sealing compound (7), the components thereof are selected to be suitable for cationic polymerisation. A catalyst, provided to accelerate the cationic polymerisation of said reactive resin mixture, is also added to said slot sealing compound (7). |
| US11121592B2 |
Electric machine core with arcuate grain orientation
A rotary electric machine, e.g., a cycloidal reluctance motor, includes a stator having stator teeth connected to a cylindrical stator core, and a rotor having a cylindrical rotor core. The stator core and/or rotor core are constructed of grain-oriented, spirally-wound ferrous material having a circular or annular grain orientation. The stator teeth may be constructed of grain-oriented steel having a linear grain orientation. Notches may be spaced around an inner circumferential surface of the stator core, with each stator tooth engaged with a respective notch. The rotor may be eccentrically positioned radially within the stator. The rotor core may define notches spaced around its outer circumferential surface, with salient rotor projections engaged with a respective rotor notch. The machine in such an embodiment may be a switched reluctance rotor. An electrical system using the machine and a method of manufacturing the machine are also disclosed. |
| US11121591B2 |
Hollow metal part of stator of rotating electrical machine, rotating electrical machine, and manufacturing process of hollow metal part
A hollow metal part is used as a pipe component for a refrigerant flow path of a rotating electrical machine adapted to cool a stator coil with a refrigerant. The rotating electrical machine includes a connection arm that couples the stator coil and a power supply terminal at a stator coil end portion of the stator coil, and an insulating hose that is coupled to the stator coil and the connection arm through a first hollow metal part in order to supply the refrigerant to the stator coil and the connection arm. The first hollow metal part is formed integrally by joining a part formed of stainless steel to a part made of oxygen-free copper. |
| US11121588B2 |
System, method, and apparatus for wireless charging
Using inductive currents to wirelessly charge a device via a device connected to a power source. This inductive charging may result when a first mobile device recognizes a second mobile device via a wireless connection (e.g., Bluetooth, Bluetooth Low Energy (BLE), Near-Field Communication (NFC), or the like). An application stored on the first mobile device may recognize a second mobile device by transmitting an advertising packet when the first mobile device is connected to a power source. An advertising packet may be received by the second mobile device and the second mobile device may transmit a response to the advertising packet in order to generate a connection between the first and second mobile devices. The response may include data such as, connection strength, response time, connection preferences, and the like. Upon detection and connection, the second mobile device may be wirelessly charged by the first device via inductive charging. |
| US11121586B2 |
Systems and methods for wirelessly transmitting power and data to an implantable stimulator
A system includes an interface assembly and electronic circuitry. The interface assembly is configured to receive DC power and a self-clocking differential signal comprising a data signal encoded with a clock signal at a clock frequency. The electronic circuitry is configured to recover, from the self-clocking differential signal, the data signal and the clock signal at the clock frequency, and to generate, based on the recovered clock signal at the clock frequency, a first synthesized clock signal at a first carrier frequency and a second synthesized clock signal at a second carrier frequency. The electronic circuitry is also configured to wirelessly transmit AC power and a data-modulated AC signal to an implantable stimulator implanted within a patient. The AC power is at the first carrier frequency and based on the DC power, while the data-modulated AC signal is at the second carrier frequency and based on the recovered data signal. |
| US11121585B2 |
Wireless power reception method of a wireless power receiver in which first demanded power of the wireless power receiver is adjusted within a first available power of the wireless power tansmitter
A method for transmitting wireless power from a wireless power transmitter, the method can include performing a negotiation process with a wireless power receiver for generating a negotiated power transmission condition, the negotiation process including receiving a request signal from the wireless power receiver to retrieve a capability of the wireless power transmitter, the capability including an available amount of power of the wireless power transmitter, transmitting the available amount of power to the wireless power receiver, in response to the request signal, to allow the wireless power receiver to determine a demanded amount of power based on the available amount of power of the wireless power transmitter, and subsequently, receiving the demanded amount of power as the negotiated power transmission condition from the wireless power receiver; and transmitting wireless power to the wireless power receiver based on the negotiated power transmission condition when the demanded amount of power is allowable by the wireless power transmitter based on the capability of the wireless power transmitter. |
| US11121583B2 |
Operating room wireless power transfer
A surgical room power system including at least one source of power wired to a power source for a surgical room, the at least one source of power being wired to the surgical room; at least one power receiver; and a surgical power consumer wired to the at least one power receiver, the surgical power consumer being configured to assist a surgeon during a surgical procedure on a patient. The at least one source of power wirelessly transfers power to the at least one power receiver for powering the surgical power consumer. |
| US11121582B2 |
Smart rectenna design for passive wireless power harvesting
The present technology is directed to a system and method for implementing passive power harvesting from ambient electromagnetic emissions with a smart rectenna that incorporates automatic frequency response tuning features. The disclosed system incorporates a tunable High Pass Filter and voltage multiplier rectifier with a front-end ultra wide band antenna unit. The frequency response of tunable components can be actively adjusted to match the frequency band containing most of the energy in the incident electromagnetic emission. A look up table is used for determining the appropriate biasing levels of the tunable components for each frequency in a frequency band of interest. By tuning a frequency response of impedance matching, filtering and rectifying components to correspond to a frequency region of maximum power spectral density in the incident energy signal, the system facilitates the scavenging of ambient electromagnetic energy from the spectral region with the highest power spectral density. |
| US11121580B2 |
Power source, charging system, and inductive receiver for mobile devices
A power source, charging system, and inductive receiver for mobile devices. A pad or similar base unit comprises a primary, which creates a magnetic field by applying an alternating current to a winding, coil, or any type of current carrying wire. A receiver comprises a means for receiving the energy from the alternating magnetic field and transferring it to a mobile or other device. The receiver can also comprise electronic components or logic to set the voltage and current to the appropriate levels required by the mobile device, or to communicate information or data to and from the pad. The system may also incorporate efficiency measures that improve the efficiency of power transfer between the charger and receiver. |
| US11121579B2 |
Circuit for power supply and electronic device using same
A power supply circuit supplying power to components of a fixed or mobile electrical or electronic device includes a main battery, an auxiliary battery, and main and auxiliary switch units. The main battery and the main switch unit form a main power supply circuit, and the auxiliary battery and the auxiliary switch unit form an auxiliary power supply circuit. The main switch unit includes a lighting unit controlling the switching on or off of the auxiliary switch unit. When the lighting unit is switched on, the auxiliary switch unit is switched off and the auxiliary power supply circuit is disabled. When the lighting unit is switched off, the auxiliary switch unit is switched on and the auxiliary power supply circuit is enabled. An electronic device including such a power supply circuit is also provided. |
| US11121578B2 |
Image forming apparatus in which wiring pattern for withstand voltage test is laid out
An interlock power supply stops supplying a voltage if AC power supply is supplying AC voltage and an interlock condition is satisfied, and supplies a voltage if AC power supply is supplying AC voltage and the condition is not satisfied. A non-interlock power supply supplies a voltage independently of the condition, if AC power supply is supplying AC voltage. A first wiring pattern that connects an interface and a switch drive circuit. A second wiring pattern is connected to the non-interlock power supply. A constant-voltage element is provided between a first section of the first wiring pattern and a second section of the first wiring pattern. |
| US11121574B2 |
Method for transmitting power and electronic device supporting the same
An electronic device which is wirelessly charged through an external power transmitting device includes a conductive pattern in which a current is induced depending on a power signal transmitted by the external power transmitting device, an adjustment circuit that configured to generate a voltage signal using the current, a load configured to be charged through the voltage signal, and a control circuit electrically connected with the conductive pattern, the adjustment circuit, and the load. Upon recognizing the external power transmitting device, the control circuit is configured to generate a power control signal including information about intensity of the power signal and to transmit the power control signal to the external power transmitting device through the conductive pattern, and the conductive pattern is configured to receive the power signal, the intensity of which is changed depending on the power control signal. |
| US11121571B2 |
Method and battery management system for smoothing power limit of battery
Provided is a method and a battery management system for smoothing the power limit when charging or discharging a battery. The method according to an embodiment of the present disclosure includes determining a first weighting factor based on a maximum charge voltage and a terminal voltage of the battery, determining a second weighting factor based on a previous smoothed charge power limit, a current charge power limit and a current instantaneous power, setting a smaller one of the first weighting factor and the second weighting factor as a first reference weighting factor, and smoothing the current charge power limit based on the previous smoothed charge power limit and the first reference weighting factor. |
| US11121570B2 |
Battery disconnecting device
A battery disconnecting device has a first input and a second input to which a battery can be connected, whereby the disconnecting device also has a first output and a second output to which an electric component can be connected, whereby at least one first circuit breaker is arranged between the first input and the first output, and at least one second circuit breaker is arranged between the second input and the second output, whereby the first circuit breaker is at least a transistor and the second circuit breaker is a relay. |
| US11121565B2 |
High reliability hybrid energy storage system
Combination fuel cell stack and electrochemical battery system provides stable and redundant electrical power to one or more traction motors. The electrochemical battery packs comprise modules that are switched between a low-voltage parallel configuration connecting to the fuel cell stack and a high-voltage series configuration connecting to the traction motors, thereby harvesting low-voltage energy from the fuel cells and deploying that energy as high-voltage power to the motor. The plurality of electrochemical battery packs can be switched such that at least one is always connected to the traction motor for continuity of power. |
| US11121564B2 |
Power supply device having hierarchical structure
Provided is a power supply device for supplying power to load elements. The power supply device includes a main power module including a main battery, a main power controller configured to control charging and discharging of the main power module, a sub-power module including sub-batteries respectively corresponding to the load elements, and a sub-power controller configured to control charging and discharging of the sub-power module, Based on a remaining capacity of the main battery and a remaining capacity of the sub-batteries, the power supply device is selectively operated in a first mode in which charging and discharging are possible for both the main power module and the sub-power module, a second mode in which charging and discharging are possible only for the sub-power module, or a third mode in which charging and discharging are possible only for the main power module. |
| US11121560B2 |
Hot-pluggable dual battery with pass through charging
Techniques of charging electronic devices involve directing electrical power from a first device to the battery of a second device in response to the first device being in a first state, and directing electrical power from the second device to the battery of the first device in response to the first device being in a second state. For example, in response to a connection being established between a first device (e.g., a tablet computer) and a second device (e.g., a monitor), a charger of the first device detects a state of charge of the battery of the first device and a state of charge of the second device. |
| US11121558B2 |
Charging device
A charging device includes: a switch configured to perform connection and disconnection between a positive bus and a negative bus of a charging line; a low-voltage power storage device having a normal voltage lower than a normal voltage of a power storage device; and a converter configured to exchange electric power between a power line and the low-voltage power storage device with a change of a voltage. At the time of system activation, a control device controls the switch so that the positive bus and the negative bus of the charging line are connected to each other, and after that, the control device performs a welding diagnosis to determine whether or not welding occurs in a charging relay, based on a voltage of a capacitor, while the control device controls the converter so that the capacitor is charged with electric power from the low-voltage power storage device. |
| US11121556B2 |
Magnetically coupled solar power supply system for battery based loads
A high efficiency solar power system combining photovoltaic sources of power (1) can be converted by a base phase DC-DC photovoltaic converter (6) and an altered phase DC-DC photovoltaic converter (8) that have outputs combined through low energy storage combiner circuitry (9). The converters can be synchronously controlled through a synchronous phase control (11) that synchronously operates switches to provide a conversion combined photovoltaic DC output (10). Converters can be provided for individual source conversion or phased operational modes, the latter presenting a combined low photovoltaic energy storage DC-DC photovoltaic converter (15) at string or individual panel levels. |
| US11121554B2 |
Electrical power control apparatus, electrical power control method and electrical power control system
An electrical power control apparatus controls electrical power supply from an electrical power source unit and a battery unit to a target of supply. The electrical power control apparatus includes a supply control circuit. The supply control circuit supplies electrical power of the battery unit in preference to electrical power of the electric power source unit to the target of supply when an amount of charge of the battery unit is equal to or higher than a threshold. |
| US11121552B2 |
Demand setpoint management in electrical system control and related systems, apparatuses, and methods
The present disclosure is directed to systems and methods for controlling an electrical system using setpoints. Some embodiments include control methods that monitor an adjusted net power associated with the electrical system and adjust the setpoint based on a comparison of the adjusted demand to the setpoint. If the adjusted demand has not exceeded the demand setpoint, the setpoint is reduced. If the adjusted demand has exceeded the demand setpoint, the setpoint is increased. |
| US11121540B2 |
System, method, and apparatus for multi-port power converter and inverter assembly
A multi-port power converter includes a housing that includes a plurality of ports structured to electrically interface to a plurality of loads, the plurality of loads having distinct electrical characteristics. The multi-port power converter also includes a plurality of solid state components configured to provide selected electrical power outputs and to accept selected electrical power inputs and a plurality of solid state switches configured to provide selected connectivity between the plurality of solid state components and the plurality of ports. |
| US11121539B2 |
DC solid-state circuit breaker with self-adapt current limiting capability and the control method thereof
The present invention discloses a DC solid-state circuit breaker with self-adapt fault current limiting capability. The topology of the DC solid-state circuit breaker is a H-bridge circuit consisting of two unidirectional breakable bridge arms and two series-connected diode bridge arms, wherein the two unidirectional breakable bridge arms are connected in series to the two series-connected diode bridge arms in a same direction to form two series branches, respectively; the series branches are connected in parallel; a series branch formed by a DC reactor L and a DC biased power supply is connected to the PCC between the two unidirectional breakable bridge arms and the PCC between the two series-connected diode bridge arms; the DC line is connected to the two PCCs, respectively. |
| US11121538B2 |
Electronic circuit arrangement for use in an area exposed to explosion hazards
An electronic circuit arrangement may include first and second electric connections connectable to first and second electronic devices, respectively. A first electric conduction path may connect the first and second electric connections, and a second electric conduction path may connect a tee point provided in the first electric conduction path to an electric ground connection. First and second switching elements may be provided in the first and second electric conduction paths, respectively, between the tee point and the respective electric connection. Each switching element may switch between an open state, in which the switching element may interrupt the respective electric conduction path, and a closed state. In response to connecting the second electronic device to the second electronic connection, the second switching element may switch to the open state, and the first switching element to the closed state only after the second switching element is already in the open state. |
| US11121537B2 |
System and method for locating faults and communicating network operational status to a utility crew using an intelligent fuse
An intelligent fuse provides the operational status of the power network upon which the fuse is installed to a mobile device of a remote user. A fuse electronic circuit embedded in the fuse holder of the fuse captures the characteristic values of the power network and transmits the data to the mobile device. The mobile device has an application installed thereon to calculate the distance to fault location from the recording fuse using the fuse electronic circuit-captured data. The fuse electronic circuit-captured data is further used to visualize the data collected at the measurement points of the electrical system upon which the fuse is installed. |
| US11121529B2 |
Switchgear or control gear
A switchgear or control gear includes: at least one first compartment; at least one second compartment; a plurality of main switchgear or control gear components including a main busbar system, a three position linear or rotational movement disconnector, a circuit breaker, and at least a first part of an insulated cable connection; and a plurality of auxiliary switchgear or control gear components including a disconnector drive and a circuit breaker drive. The plurality of main switchgear or control gear components are housed in the at least one first compartment. The plurality of auxiliary switchgear or control gear components are housed in the at least one second compartment. When one or more of the plurality of main switchgear or control gear components is energized, the at least one first compartment is hermetically sealable or maintainable at an internal air pressure greater than ambient air pressure. |
| US11121527B2 |
Meter socket adapter with integral automatic transfer switch
A power management system includes a generator, a meter mounted transfer switch, and a power management module. The generator includes a controller positioned in the housing of the generator. The generator connects to the power management module to provide power to one or more electrical loads. The controller is configured to selectively disconnect at least one of the electrical loads by communicating, via a wireless gateway, to a transfer switch of the power management module to move between first and second positions for connecting the generator to the one or more electrical loads. |
| US11121525B2 |
Quantum cascade laser
A quantum cascade laser including: a laser structure having a first region including a first facet, a second region including a second facet, an epitaxial surface, and a substrate surface; an insulating film disposed on the second facet and the epitaxial surface; an electrode disposed on the epitaxial surface and the insulating film and in contact with the epitaxial surface; and a metal film disposed over the second facet and the epitaxial surface and separated from the electrode and the substrate surface. The insulating film is disposed between the metal film and the second facet and between the metal film and the epitaxial surface. The second region includes a semiconductor mesa. The second facet is located at a boundary between the first region and the second region. The first region includes a connecting surface. The connecting surface connects the second facet to the first facet. |
| US11121519B2 |
Utilization of time and spatial division multiplexing in high power ultrafast optical amplifiers
In an example amplifier system, an input pulse train is passed through an optical stage that splits each pulse into two or more pulses. These divided pulses are then injected into at least two amplifiers for amplification. The amplified pulses are subsequently passed back through the same optical stage in order to combine the pulses back into one high energy pulse. The amplifier system can use time division multiplexing (TDM) and/or spatial division multiplexing (SDM) to produce, e.g., four pulses in conjunction with two amplifiers and propagation through two optical beam splitters, which are coherently combined into a single output pulse after amplification. The amplifiers can comprise fiber amplifiers or bulk amplifiers. |
| US11121518B1 |
Systems and methods for laser beam expander alignment and stabilization
An optical transmitter includes a beam steering system configured to direct an optical beam through a first optical element towards a second optical element. The beam steering system includes an adjustable optical element. The second optical element is susceptible to thermal and vibrational loads that disrupt an alignment between the first and second optical elements. The second optical element includes a main portion configured to direct the optical beam down a propagation path including a communications target. The second optical element also includes a reflective portion configured to direct an alignment portion of the optical beam back to the beam steering system through the first optical element. A detector is configured to receive the alignment portion and generate an alignment signal. A controller is configured to adjust the adjustable optical element based on the alignment signal to counteract the loads. |
| US11121513B2 |
LED night light or cover light has multiple functions
The LED night light or cover light has multiple Functions has built-in LED(s) for pre-determined illumination shown on housing, window, hole(s) of night or cover light which connect by prong to an existing wall inner-kit's receptacle to get AC power source to circuit(s) for predetermined at least LED(s) illumination functions. The night or cover light further incorporate with at least one USB charger, Outlet(s), IC, photo sensor, motion sensor, power fail sensor, surge or other protection system. |
| US11121507B2 |
Electrical connector with the tail segment of the second terminal of the shielding plate and the tail segments of the first terminals arranged in a same row
An electrical connector including a base member and a plurality of first terminals disposed in the base member is provided. Each of the first terminals has an contact segment and an tail segment opposite to each other. The contact segments respectively belong to two different parallel planes, and the tail segments are located on a same plane. The first terminals form a plurality of terminal sets in the tail segments, and each of the terminal sets includes a ground terminal, a pair of super speed differential terminals, and a power terminal which are adjacent to each other and are sequentially arranged. |
| US11121505B2 |
Locking device for a plug connection
A system is provided comprising of a first plug module and a second plug module, which can be plugged together, wherein the first plug module has a locking arrangement, whereby the plug modules can be reversely locked to each other. The system can be arranged within the housings of industrial plugs and is thus better protected from mechanical loads. |
| US11121499B2 |
Cover system and method
Embodiments of the present invention provide a cover system (300) for at least temporarily preventing access to one or more terminals (402, 404) of an electrical connector (400). The system (300) comprises a first cover part (100) and a second cover part (200). The first cover part (100) comprises sealing means (104) for sealing the first cover part (100) about the one or more terminals (402, 404) of the electrical connector (400). The first cover part also comprises a member (106) comprising an aperture (118) for receiving a locking means. The second cover part (200) is receivable about at least a portion of the first cover part (100) and at least part of the electrical connector (400). The second cover part (200) comprises engaging means (204) for engaging with the electrical connector (400) to at least partially retain the second cover part (200) about the first cover part (100) and at least part of the electrical connector (400). The second cover part (200) also comprises an opening (202) for receiving the member (106) of the first cover part (100). The aperture (106) of the first cover part (100) is arranged such that when the cover system (300) is assembled with the electrical connector (400) and a locking means is received by said aperture (118), disengagement of the engaging means (204) from the electrical connector (400) is substantially prevented. Embodiments of the invention also relate to a method for at least temporarily preventing access to one or more terminals (402, 404) of an electrical connector (400). |
| US11121496B2 |
Connection device for charging a battery device on a vehicle
A connection device for charging a battery device on a vehicle has an alternating current (AC) interface for receiving an AC plug and a direct current (DC) interface for receiving a DC plug. The DC interface has a cover flap mounted movably between a closed position that covers the DC interface and an open position that exposes the DC interface. The direct current interface has a latching mechanism with a latching means on the cover flap. The latching means locks with a mating latching means of the cover flap when in the open position. The mating latching means has an actuating section with which the DC plug makes a contact thereby unlocking the latching means of the latching mechanism when the DC plug is received in the DC interface. |
| US11121494B2 |
Contact
A contact includes a thin plate member having elasticity and conductivity, is disposed between a first member and a second member, and electrically connects the first member and the second member via the thin plate member, and the contact includes a base portion and a movable portion. The base portion has a bonding surface to be bonded to the first member by soldering. The movable portion includes: a contact portion that contacts with the second member; and a connecting portion that connects to the base portion, and is configured to be elastically deformable with respect to the base portion. The connecting portion is gradually separated from the first member. A predetermined range from a connecting position of the connecting portion with the base portion is lower in solder wettability than the bonding surface. |
| US11121493B2 |
Replaceable pin for terminal of charging inlet assembly
A terminal for a charging inlet assembly includes a head, a mating shaft, and a replaceable pin removably coupled to the head. The head is secured in a terminal channel of a housing of the charging inlet assembly having a terminating end configured to be terminated to a power cable. The mating shaft has threads. The replaceable pin has an outer surface defining a separable mating interface for mating engagement with a charging conductor of a charging connector. The replaceable pin has a drive base at the rear including drive teeth configured to be engaged by a socket tool to rotate the replaceable pin relative to the head for installing or removing the replaceable pin. The mating shaft is threadably coupled to at least one of the head or the replaceable pin in a corresponding threaded bore of the head or the replaceable pin. |
| US11121491B2 |
Receptacle connector for detecting connection states
A receptacle connector includes a receptacle including an insertion port into which a plug is inserted, a lid configured to open and close the insertion port and maintain, while the plug is inserted into the insertion port, a state in which the lid is opened by the plug, and a switch configured to change over according to the opening and closing of the lid. |
| US11121490B1 |
Circuit board fixing structure
A circuit board fixing structure comprising a first fixing element and a first circuit board is provided. The first fixing element includes a shaft, a first flange and a second flange. One end of the shaft is provided with a receiving portion. The first flange is connected with a side surface of the shaft. The second flange is connected with the side surface of the shaft and is spaced apart from the first flange. The first circuit board is fixed on a surface of the first flange away from the second flange. |
| US11121489B2 |
Electrical connector with flexible circuit and stiffener
An electrical connector includes a flexible circuit with a flexible material and traces at least partially embedded in the flexible material. The electrical connector further includes a first set of conductive bumps, a second set of conductive bumps, and a stiffener. The first set of conductive bumps is coupled to respective first end portions of the traces and extends from a first side of the flexible circuit. The second set of conductive bumps is coupled to respective second end portions of the traces. The stiffener is coupled to the flexible circuit on a second side of the flexible circuit opposite the first side. |
| US11121488B2 |
Connector assembly
An assembly includes a circuit carrier having a first surface and a second surface opposite to the first surface, a first sub-assembly detachably connected to the first surface of the circuit carrier, and a second sub-assembly detachably connected to the second surface of the circuit carrier. The circuit carrier has an electrically conductive lead interconnecting the first sub-assembly and the second sub-assembly. |
| US11121486B2 |
Conductor terminal and set formed of the conductor terminal and an actuation tool
A conductor terminal with an insulating material housing and a spring-force terminal connection. The spring-force terminal connection has a contact body which is shaped out of a sheet element and has a base portion, lateral wall portions that protrude from the base portion and are mutually spaced, and solder connection contact tongues. The base portion together with the lateral wall portions forms a conductor receiving channel for receiving an electric conductor, and leaf spring tongues protrude from the lateral wall portions so as to face one another, each leaf spring tongue has a clamping edge for clamping an electric conductor received in the conductor receiving channel. The insulating material housing has a conductor insertion opening which leads to the conductor receiving channel on the front face. |
| US11121479B2 |
Connector and connecting method
A connector includes a base member having two or more projections, two or more contacts, a housing holding the contacts and facing the base member, and a cutting portion for cutting the flexible conductor between a pair of contacts to divide the flexible conductor into a pair of flexible conductor pieces, when projections corresponding to the contacts are separately inserted into projection accommodating portions of the contacts together with the flexible conductor, the flexible conductor being arranged between the base member and the housing and extending over the contacts adjacent to each other, the flexible conductor pieces divided by the cutting portion being sandwiched between lateral surfaces of the projections and inner surfaces of the projection accommodating portions of the contacts and coming into contact with the inner surfaces of the projection accommodating portions of the contacts, whereby the contacts are electrically connected to the flexible conductor pieces. |
| US11121478B2 |
Crimp contact with structured region for preventing conductor slippage during crimping
A crimp contact for crimping a conductor includes a crimp flank and a receptacle receiving the conductor and extending in a longitudinal direction of the crimp contact up to a receiving end. The crimp flank extends in the longitudinal direction over the receiving end up to a front end. The crimp flank encloses the conductor after crimping. The crimp contact has a structured region in a front region of the crimp contact arranged between the receiving end and the front end. |
| US11121473B2 |
Compact cavity-backed discone array
A compact shallow cavity-backed discone antenna array for conformal omnidirectional antenna applications is disclosed. The antenna array comprises a plurality of discone antennas arranged in a ring array within a circular contoured conical cavity. The cavity is covered with an electrically transparent radome. The individual discone antenna elements are fed with coaxial transmission lines. Good performance is demonstrated by simulation and by experiment in terms of reflection coefficient and omnidirectional gain radiation patterns from about 960 MHz to 1220 MHz. In one embodiment, the shallow cavity-backed discone antenna array may be used as a flush-mounted antenna that conforms to the outer mold line of an aircraft. |
| US11121467B2 |
Semiconductor package with compact antenna formed using three-dimensional additive manufacturing process
A semiconductor device package is provided that incorporates an antenna structure within the package through use of three-dimensional additive manufacturing processes. Embodiments can provide semiconductor device packages that are thinner than traditional device packages by depositing specific metal and dielectric layers within the package in desired positions with precision that cannot be provided by other manufacturing techniques. Further, embodiments can provide antenna geometries and orientations that cannot be provided by other manufacturing techniques. |
| US11121465B2 |
Steerable beam antenna with controllably variable polarization
A steerable beam antenna includes a feed line and first and second arrays of switchable scatterers along opposite sides of the feed line. The first array scatters an electromagnetic wave propagating through the feed line to form a first beam portion with a first polarization, and the second array scatters the propagating wave to form a second beam portion with a second polarization orthogonal to the first polarization. Each scatterer in the first and second arrays is switchable between a high state and a low state, the high state scatterers and the low-state scatterers in each of the first and second arrays defining a periodic pattern. The scatterers in the first and second arrays are switchable to shift the pattern of scatterers in one of the arrays relative to the pattern in the other array by a selectable period shift that yields a desired polarization for the beam. |
| US11121464B2 |
Phased array correction and testing method and correction and testing apparatus
This application discloses a correction and testing system, comprising a first phased array, a second phased array, and a test instrument, wherein the first phased array comprises a first radio frequency RF channel, the test instrument is configured to: determine, based on a coupling signal, an amplitude deviation value and a phase deviation value that correspond to the first RF channel; if the amplitude deviation value and the phase deviation value satisfy a preset error correction condition, correct an amplitude coefficient and a phase coefficient that correspond to the first RF channel to obtain a target amplitude coefficient and a target phase coefficient; and measure performance indicator parameters of the first phased array by using the target amplitude coefficient and the target phase coefficient. The correction and testing system can improve test efficiency, reducing a floor area, and lowering costs. |
| US11121461B2 |
Antenna device
An antenna device includes a dielectric substrate, a ground plane, an antenna unit, and an additional functional unit. The dielectric substrate includes a plurality of pattern formation layers. The ground plane is formed on a first pattern formation layer included in the plurality of pattern formation layers, and acts as an antenna grounding surface. The antenna unit is formed on a pattern formation layer that is included in the plurality of pattern formation layers and that is different from the first pattern formation layer. The antenna unit includes one or more antenna patterns configured to act as radiation elements. The additional functional unit includes one or more parasitic patterns provided on a propagation path for a surface propagating over the dielectric substrate, and causes the surface wave to generate a radiation wave with polarization different from polarization of a radio wave transmitted and received by the antenna unit. |
| US11121459B2 |
IoT gateway/cellular base station assemblies
An assembly includes: a small cell antenna base station comprising a radio, an antenna, and a mounting structure; and an IoT gateway assembly mounted to the mounting structure, the IoT gateway assembly comprising: an IoT gateway module configured for aggregation and backhaul of data from IoT sensors; and an loT antenna connected with the IoT gateway module. |
| US11121455B2 |
Space-independent coupling antenna
A transport mechanism and an antenna arrangement for facilitating the transmission/reception of a portable wireless communication device temporarily arranged in a passenger compartment of a transport. The antenna arrangement includes a supporting body having a shelf area and a flat antenna having an interface, wherein the shelf area holds the wireless communication terminal, the flat antenna is arranged parallel to the shelf area on or in the supporting body, and the interface connects via a wiring harness of the transport to an external antenna of the transport. |
| US11121453B2 |
Antenna and electronic device
An antenna adapted for an electronic device is provided. The antenna includes a chamber, a first liquid conductor, a second liquid conductor, and a feeding portion. The first liquid conductor is located in the chamber. The second liquid conductor is located in the chamber. A specific gravity of the second liquid conductor is larger than a specific gravity of the first liquid conductor, and a conductivity of the second liquid conductor is smaller than a conductivity of the first liquid conductor. The feeding portion extends into the chamber from an outside of the chamber. The feeding portion contacts with one of the first liquid conductor and the second liquid conductor. |
| US11121450B1 |
Electronic apparatus
An electronic apparatus includes: a chassis composed at least of an upper plate, a lower plate, and a side face; at least one plate-like antenna having a radio wave transmission/reception part which deals with radio waves in a millimeter wave band and forms one surface of the antenna; and a conductive reflection member having a main part with a reflection surface reflecting the radio waves in the millimeter wave band. The antenna is placed in an outer peripheral edge area including an outer peripheral edge of the upper plate in plan view in such a manner that the radio wave transmission/reception part faces the upper plate. The reflection member is so placed that the antenna is sandwiched between the reflection member and the side face in plan view. At least the side face transmits the radio waves. The reflection surface is directed toward the antenna. |
| US11121449B2 |
Electronic device
An electronic device includes a proximity sensor, an antenna structure, and a sensing pad. The antenna structure includes a first radiation element and a second radiation element which are separate from and adjacent to each other. The first radiation element has a feeding point. The second radiation element is coupled to a ground voltage. The sensing pad is adjacent to the antenna structure. The sensing pad includes a main branch, a first branch, and a second branch. The main branch is coupled to the proximity sensor. The first branch and the second branch are coupled to the main branch. The second branch has a meandering shape. The antenna structure covers a first frequency band and a second frequency band. The resonant frequency of the sensing pad is neither within the first frequency band nor within the second frequency band. |
| US11121447B2 |
Dielectric covers for antennas
An electronic device may be provided with wireless communications circuitry and control circuitry. The wireless communications circuitry may include centimeter and millimeter wave transceiver circuitry and a phased antenna array. A dielectric cover may be formed over the phased antenna array. The phased antenna array may transmit and receive wireless radio-frequency signals through the dielectric cover. The dielectric cover may have first and second opposing surfaces. The second surface may face the phased antenna array and may have a curvature. The curvature of the second surface may include one or more recessed regions of the dielectric cover. The one or more recessed regions of the second surface may serve to maximize and broaden the coverage area for the phased antenna array. The first surface may be conformal to other structures in the electronic device. |
| US11121445B2 |
Resonator for radio frequency signals
A resonator for radio frequency, RF, signals, said resonator comprising a cavity having a longitudinal axis, a first wall, at least one side wall, and a lid arranged opposite the first wall, wherein said resonator further comprises a guiding device which is arranged at said at least one side wall and is configured to guide an axial movement of said lid along said longitudinal axis. |
| US11121444B2 |
Directional coupler
A directional coupler includes a main line for transmitting a high frequency signal, a sub line electromagnetically coupled to the main line, a termination circuit for terminating one end portion of the sub line, and a variable filter that has an input terminal and an output terminal and the input terminal is connected to another end portion of the sub line. The variable filter is a filter unit circuit having one frequency band as a pass band or a stop band, and in the filter unit circuit, a variable passive element for shifting a frequency in the pass band or the stop band is disposed. |
| US11121443B2 |
Bandpass filter
Realized is a post-wall waveguide bandpass filter in which a bypass phenomenon is less likely to occur. In a post-wall waveguide bandpass filter (1) including an input part (10a) and an output part (10b), each of a first distance (distance X11), a second distance (not illustrated in FIG. 2), a third distance (distance X21), and a fourth distance (not illustrated in FIG. 2) is not more than 1.5 times a post interval (d). |
| US11121440B2 |
Electricity storage device
Provided is an electricity storage device having a high volumetric energy density and high reliability. The electricity storage device includes: an electrode assembly including first and second electrode plates and a separator interposed therebetween; an exterior housing that houses the electrode assembly; a lid that covers an opening of the exterior housing; and electrode terminals that are electrically connected to the electrode assembly and partially protrude from the lid to the outside. The lid has a liquid injection hole for injecting an electrolytic solution into the exterior housing. A tubular member extending from the lid toward the electrode assembly is provided between the outer surface of the lid and the electrode assembly so as to surround an opening of the liquid injection hole. A covering member connected to the tubular member and interposed between the liquid injection hole and the electrode assembly is provided. |
| US11121430B2 |
Block copolymer separators with nano-channels for lithium-ion batteries
Embodiments disclosed herein generally relate to a microporous separator with a pore geometry that creates a low or no tortuosity architecture. In one embodiment, a battery cell may comprise of an anode layer, a cathode layer, and a separator layer positioned between the cathode layer and the anode layer. The separator layer may be comprised of one or more block copolymers. The block copolymers that make up the separator layer may be materials that self-align into a vertical nanostructure. The vertical nanostructures may allow ions within the battery cell to flow in a vertical path between the cathode and anode. This vertical path my create a low or no tortuosity environment within the battery cell. |
| US11121421B2 |
Battery thermal management system
An example system is disclosed for thermal management of batteries. The system may include a cell bank that includes first and second cell frame sections, a heat bus, and thermal interface material. The first and second cell frame sections may define opposite surfaces of the cell bank. Each cell frame section may include recesses to align battery cells for welding and provided conductive connections between the cells to create a string of cells with a combined power output. Each recess may include a divider between the battery cells to preload the cells against a thermal junction during assembly. The heat bus may be provided between the cell frame sections. The heat bus may include heat pipes that extend between the battery cells and across the cell frame sections. The thermal interface material may be positioned to transfer heat from the cells to the heat pipes at their thermal junction. |
| US11121416B2 |
Adsorption assembly and battery
An adsorption assembly and a battery are provided. The adsorption assembly includes: a housing including a gas permeable portion; and an adsorbent encapsulated by the housing. The adsorption assembly can effectively isolate the adsorbent from the external environment by providing the housing, thereby preventing the adsorption performance of the adsorbent from being affected, and the housing includes a gas permeable portion, which can make the produced gas in the external environment enter the housing and be effectively adsorbed by the adsorbent. In particular, when the adsorbent is used for a battery, especially a soft pack battery, the gas produced inside the battery can be effectively adsorbed to prevent liquid leakage of the battery seal caused by breakage of the battery seal by gas, improving reliability and safety of the battery and extending lifetime of the battery. |
| US11121413B2 |
Advance indication of short-circuit conditions in a wetcell battery
A wet-cell in a battery is configured with a set of i-electrodes. A collection surface inside the wet-cell is identified where electrically conductive debris accumulates to an expected height. A first i-electrode of a first polarity in the set of i-electrodes is configured to be located at substantially the expected height inside the wet-cell. A second i-electrode of a second polarity in the set of i-electrodes is configured to be located at substantially the expected height inside the wet-cell. A first indication device is installed where the first i-electrode and the second i-electrode are configured in an electrical circuit via the first indication device, wherein when the electrically conductive debris has accumulated up to the expected height, makes simultaneous electrical contact with the first i-electrode and the second i-electrode and activates the first indication device. |
| US11121412B2 |
Secondary battery safety evaluation method and device
A safety evaluation method according to the present disclosure includes preparing a sample for secondary battery electrode evaluation in which a short circuit will occur by contact between components included in the sample, applying a predetermined pressure that will cause the contact between the components to an area of the sample set as a secondary battery internal short circuit simulation contact area, applying a current between I probes in contact with the sample, obtaining resistance by measuring a potential difference between V probes which are separate from the I probes, obtaining a graph of a change in resistance with a change in distance between the V probes, calculating a short circuit resistance of the area from y-intercept of the graph, and predicting a heat generation amount of the area from the short circuit resistance. |
| US11121407B2 |
Electrolytes for stable cycling of high capacity lithium based batteries
Electrolytes are described with additives that provide good shelf life with improved cycling stability properties. The electrolytes can provide appropriate high voltage stability for high capacity positive electrode active materials. The core electrolyte generally can comprise from about 1.1M to about 2.5M lithium electrolyte salt and a solvent that consists essentially of fluoroethylene carbonate and/or ethylene carbonate, dimethyl carbonate and optionally no more than about 40 volume percent methyl ethyl carbonate, and wherein the lithium electrolyte salt is selected from the group consisting of LiPF6, LiBF4 and combinations thereof. Desirable stabilizing additives include, for example, dimethyl methylphosphonate, thiophene or thiophene derivatives, and/or LiF with an anion complexing agent. |
| US11121406B2 |
Electrolyte and battery
This application provides an electrolyte and a battery. The electrolyte comprises an electrolytic salt and an organic solvent comprising a cyclic carbonate and a chain carbonate. The electrolyte further comprises an additive A and an additive B, wherein the additive A is a positive-electrode film-forming additive, the additive B is a negative-electrode film-forming additive, and the reduction potential of the additive B is higher than that of the cyclic carbonate, and the electrolyte has a conductivity of 6 mS/cm to 10 mS/cm at 25° C. The electrolyte of the present application can improve the cycle performance and storage performance of the battery, in particular, improve the cycle performance and storage performance of the battery under high temperature and high voltage conditions, and at the same time balance the low-temperature performance of the battery. |
| US11121405B2 |
Secondary battery
A gel electrolyte and a separator are provided between the positive electrode current collector and the negative electrode current collector. The plurality of positive electrode current collectors and the plurality of negative electrode current collectors are stacked such that surfaces of negative electrodes with which active material layers are not coated or surfaces of positive electrodes with which active material layers are not coated are in contact with each other. |
| US11121402B2 |
Aqueous manganese ion battery
An alternative grid energy storage system is described herein. In one embodiment, an electrochemical cell comprises a high specific surface area cathode (e.g., a cathode comprising a carbon nanofoam paper, a carbon nanotube mesh, a particulate carbon material, electrolytic manganese dioxide, or a manganese dioxide film), a zinc or lead anode (e.g., Zn or Pb foil), a selective ion-conductive separator that does not conduct zinc ions (e.g., a NAFION sulfonated tetrafluoroethylene based fluoropolymer-copolymer separator) between the anode and the cathode, and an aqueous electrolyte comprising a manganese salt (e.g., aqueous manganese sulfate) contacting the electrodes and the separator. A battery comprising two or more of the electrochemical cells electrically connected together in series, parallel, or both, also is described. |
| US11121397B2 |
Application of force in electrochemical cells
The present invention relates to the application of a force to enhance the performance of an electrochemical cell. The force may comprise, in some instances, an anisotropic force with a component normal to an active surface of the anode of the electrochemical cell. In the embodiments described herein, electrochemical cells (e.g., rechargeable batteries) may undergo a charge/discharge cycle involving deposition of metal (e.g., lithium metal) on a surface of the anode upon charging and reaction of the metal on the anode surface, wherein the metal diffuses from the anode surface, upon discharging. The uniformity with which the metal is deposited on the anode may affect cell performance. For example, when lithium metal is redeposited on an anode, it may, in some cases, deposit unevenly forming a rough surface. The roughened surface may increase the amount of lithium metal available for undesired chemical reactions which may result in decreased cycling lifetime and/or poor cell performance. The application of force to the electrochemical cell has been found, in accordance with the invention, to reduce such behavior and to improve the cycling lifetime and/or performance of the cell. |
| US11121396B2 |
Intermediate layers for electrode fabrication
An electrode includes one or more intermediate layers positioned between a substrate and an electrochemically active material. Intermediate layers may be made from chromium, titanium, tantalum, tungsten, nickel, molybdenum, lithium, as well as other materials and their combinations. In certain embodiments, an active material includes one or more high capacity active materials, such as silicon, tin, and germanium. These materials tend to swell during cycling and may loose mechanical and/or electrical connection to the substrate. A flexible intermediate layer may compensate for swelling and provide a robust adhesion interface. Methods of fabricating electrodes involve forming metal silicide nanostructures. |
| US11121391B2 |
Direct isopropanol fuel cell
A direct isopropanol fuel cell adapted for use in ambient conditions and utilizing as fuel isopropanol and water preferably with isopropanol at relatively high concentrations representing 30% to 90% isopropanol. |
| US11121385B2 |
Fuel cell purge systems and related processes
A fuel cell purge system includes a primary fuel cell in fluid communication with a purge cell. Fuel and oxidant purged with inert gas impurities from the primary fuel cell react in the purge cell, thereby decreasing the volume of purged gases and facilitating storage while maintaining fuel cell electrochemical performance. |
| US11121382B2 |
Solid oxide fuel cell stacks having a barrier layer and associated methods thereof
A solid oxide fuel cell stack having a metallic layer and a glass layer, and a method for preventing or reducing a chemical reaction between the metallic layer and the glass layer are disclosed. The solid oxide fuel cell stack has a barrier layer disposed between the metallic layer and the glass layer. The barrier layer includes alumina and a phosphate. The phosphate includes an aluminum dihydrogen phosphate, an aluminum-containing phosphate, a phosphate of an element of the metallic layer, a phosphate of an element of the glass layer, or combinations thereof. The method includes disposing a barrier layer between the metallic layer and the glass layer. |
| US11121380B2 |
Fuel cell stack
The present disclosure relates to a fuel cell stack having a cathode-side separator and an anode-side separator which are made of different materials to prevent performance degradation of stacks and corrosion and damage of components. A fuel cell stack according to exemplary embodiments of the present disclosure may have multiple unit cells stacked therein, in which each unit cell of the multiple unit cells may include: a membrane electrode assembly (MEA); a pair of gas diffusion layers (GDLs) disposed on opposite surfaces of the MEA; and an anode-side separator and a cathode-side separator disposed to face each other, the MEA and the pair of GDLs being disposed therebetween, in which the cathode-side separator has a corrosion resistance higher than a corrosion resistance of the anode-side separator. |
| US11121378B2 |
Mixed conductor, electrochemical device including the same, and method of preparing mixed conductor
A mixed conductor represented by Formula 1: A4+xM5-yM′yO12-δ, Formula 1 wherein, in Formula 1, A is a monovalent cation, M is at least one of a divalent cation, a trivalent cation, or a tetravalent cation, M′ is at least one of a monovalent cation, a divalent cation, a trivalent cation, a tetravalent cation, a pentavalent cation, or a hexavalent cation, M and M′ are different from each other, and 0.3≤x<3, 0.01 |
| US11121376B2 |
Positive electrode, non-aqueous electrolyte secondary battery, and method of producing positive electrode
A positive electrode includes at least a positive electrode current collector and a positive electrode active material layer. The positive electrode current collector includes an aluminum foil and an aluminum hydrated oxide film. The aluminum hydrated oxide film covers a surface of the aluminum foil. The positive electrode active material layer is formed on a surface of the aluminum hydrated oxide film. The aluminum hydrated oxide film has a thickness not smaller than 50 nm and not greater than 1000 nm. The aluminum hydrated oxide film contains at least one selected from the group consisting of phosphorus, fluorine, and sulfur. |
| US11121375B2 |
Solid-state electrodes with non-carbon electronic conductive additives
Individual electrodes for a solid-state lithium-ion battery cell may be formed, for example, by elevated temperature consolidation in air of a mixture of resin-bonded, electrode active material particles, oxide solid electrolyte particles, and particles of a non-carbon electronic conductive additive. Depending on the selected compositions of the electrode materials and the solid electrolyte, one or both of the cathode and anode layer members may be formed to include the non-carbon electronic conductive additive. The battery cell is assembled with the solid-state electrodes placed on opposite sides of a consolidated layer of oxide electrolyte particles. The electronic conductivity of at least one of the cathode and anode is increased by the incorporation of particles of a selected non-carbon electronic conducive additive with the respective electrode particles. |
| US11121374B2 |
Positive electrode for lithium secondary battery and lithium secondary battery including same
The present disclosure relates to a positive electrode for a lithium secondary battery comprising a positive electrode current collector and a positive electrode active material layer coated and formed on at least one surface of the positive electrode current collector, wherein the positive electrode current collector includes a non-coated portion protruded with no positive electrode active material layer coated thereon, and wherein an irreversible material composed of lithium oxide is coated on the non-coated portion, and a lithium secondary battery including the same. |
| US11121371B2 |
Cathode active material and fluoride ion battery
A main object of the present disclosure is to provide a cathode active material used for a fluoride ion battery, the cathode active material comprising: a first active material having a composition represented by Pb2−xCu1+xF6, wherein 0≤x<2; and a second active material containing a Bi element and a F element. |
| US11121368B2 |
Positive electrode material for nonaqueous electrolyte secondary battery and method for producing the same, and positive electrode composite material paste, and nonaqueous electrolyte secondary battery
An object of the present invention is to provide a positive electrode material for a nonaqueous electrolyte secondary battery, which is capable of inhibiting the gelation of a positive electrode composite material paste without decreasing the charge and discharge capacity and the output characteristics, when used as a positive electrode material for batteries. The positive electrode active material for a nonaqueous electrolyte secondary battery comprises a mixture containing a lithium metal composite oxide represented by a general formula LiaNi1-x-y-zCoxMnyMzO2 (wherein, 0.03≤x≤0.35, 0≤y≤0.35, 0≤z≤0.05, 0.97≤a≤1.30, and M is at least one type of element selected from V, Fe, Cu, Mg, Mo, Nb, Ti, Zr, W and Al) and an ammonium tungstate powder, wherein when 5 g of the positive electrode material is mixed with 100 ml of pure water, the mixture is stirred for 10 minutes and then left to stand for 30 minutes, and then the pH of a supernatant fluid at 25° C. was measured, the pH ranges from 11.2 to 11.8. |
| US11121361B2 |
Method of preparing slurry for secondary battery positive electrode
The present invention provides a method of preparing a slurry for a secondary battery positive electrode which includes forming a first mixture in a paste state by adding a lithium iron phosphate-based positive electrode active material, a conductive agent, a binder, and a solvent, and preparing a slurry for a positive electrode by mixing while further adding a solvent to the first mixture in the paste state. |
| US11121355B2 |
Metal fluoride passivation coatings prepared by atomic layer deposition for Li-ion batteries
The fabrication of robust interfaces between transition metal oxides and non-aqueous electrolytes is one of the great challenges of lithium ion batteries. Atomic layer deposition (ALD) of aluminum tungsten fluoride (AlWxFy) improves the electrochemical stability of LiCoO2. AlWxFy thin films were deposited by combining trimethylaluminum and tungsten hexafluoride. in-situ quartz crystal microbalance and transmission electron microscopy studies show that the films grow in a layer-by-layer fashion and are amorphous nature. Ultrathin AlWxFy coatings (<10 Å) on LiCoO2 significantly enhance stability relative to bare LiCoO2 when cycled to 4.4 V. The coated LiCoO2 exhibited superior rate capability (up to 400 mA/g) and discharge capacities at a current of 400 mA/g were 51% and 92% of the first cycle capacities for the bare and AlWxFy coated materials. These results open new possibilities for designing ultrathin and electrochemically robust coatings of metal fluorides via ALD to enhance the stability of Li-ion electrodes. |
| US11121353B2 |
Systems and methods for potassium enhancing silicon-containing anodes for improved cyclability
Various methods and techniques for enhancing a silicon-containing anode for a battery cell are presented. The methods may include providing a silicon-containing anode having reversible electrochemical capabilities including a silicon-containing material and an anode material compatible with a lithium-ion battery chemistry having porous and conductive mechanical properties. The methods may also include enriching a surface layer of the silicon-containing anode with sodium ions to intersperse the sodium ions between silicon atoms of the silicon-containing matieral. The methods may also include displacing the sodium ions with potassium ions to form a comrpession layer in the silicon-containing anode. The potassium ions may place the silicon atoms of the silicon-containing material in a pre-compressive state to counteract internal stress exerted on the silicon-containing material. |
| US11121348B2 |
Rotary polarized light emitting body, rotary polarized light emitting device, and manufacturing method therefor
Provided is a display. A rotary polarized light emitting device includes: a first electrode; a second electrode; a light exiting layer, first light having a polarization state in which the first light rotates in a first direction, and exit, toward the second electrode, second light having a polarization state in which the second light rotates in a second direction that is opposite to the first direction. |
| US11121343B2 |
Display device
A display device includes a substrate, a plurality of pixels above the substrate, each of the pixels including a light emitting element, a display region including the plurality of pixels, a thin film transistor which each of the plurality of pixels includes, a protective film including a first inorganic insulating material and located between the thin film transistor and the light emitting element, a sealing film including a second inorganic insulating material and covering the light emitting element, and at least one through hole located in the display region and passing through the substrate, the protective film, and the sealing film, wherein the second inorganic insulating material is in direct contact with the protective film in a first region located between the through hole and the pixels. |
| US11121339B2 |
Quantum dot LED design based on resonant energy transfer
Embodiments of the present application relate to illumination devices using luminescent nanostructures. An illumination device includes a first conductive layer, a second conductive layer, a hole transport layer, an electron transport layer and a material layer that includes a plurality of luminescent nanostructures. The hole transport layer and the electron transport layer are each disposed between the first conductive layer and the second conductive layer. The material layer is disposed between the hole transport layer and the electron transport layer and includes one or more discontinuities in its thickness such that the hole transport layer and the electron transport layer contact each other at the one or more discontinuities. Resonant energy transfer occurs between the luminescent nanostructures and excitons at the discontinuities. |
| US11121335B2 |
Carbon nanotube transistor and logic with end-bonded metal contacts
A method for manufacturing a semiconductor device includes forming a dielectric layer on a substrate, forming a first carbon nanotube (CNT) layer on the dielectric layer at a first portion of the device corresponding to a first doping type, forming a second CNT layer on the dielectric layer at a second portion of the device corresponding to a second doping type, forming a plurality of first contacts on the first CNT layer, and a plurality of second contacts on the second CNT layer, performing a thermal annealing process to create end-bonds between the plurality of the first and second contacts and the first and second CNT layers, respectively, depositing a passivation layer on the plurality of the first and second contacts, and selectively removing a portion of the passivation layer from the plurality of first contacts. |
| US11121332B2 |
Foldable array substrate, preparation method thereof and display device
The present application provides a foldable array substrate, a preparation method thereof and a display device. The foldable array substrate includes a base substrate, a gate metal layer disposed on one side of the base substrate, a source-drain metal layer disposed on the side of the gate metal layer opposite to the base substrate, and an insulating layer disposed between the gate metal layer and the source-drain metal layer. A plurality of holes are disposed on the foldable array substrate, and the holes are disposed between adjacent pixel units of a plurality of pixel units, and extend from the side of the insulating layer opposite to the base substrate toward the base substrate. |
| US11121330B2 |
Organic light-emitting diode display panel and display device having substrate through holes
An organic light-emitting diode (OLED) display panel and a display device are provided. The OLED display panel includes a substrate, a driving circuit layer formed on a side of the substrate, a light-emitting material layer formed on a side of the driving circuit layer away from the substrate, a sensing unit formed on another side of the substrate away from the driving circuit layer and configured to receive light reflected by a fingerprint surface. In a fingerprint identifying region of the OLED display panel, the substrate includes a through hole, and the light emitted from the light-emitting material layer and reflected by the fingerprint surface travels through the through hole and arrivals the sensing unit. |
| US11121329B2 |
Amine compound and organic electroluminescence device including the same
An amine compound which improves emission efficiency and an organic electroluminescence device including the same are provided. The amine compound is represented by the structure below, wherein X is O or S, Y is C or Si, each of Ar1 and Ar2 is independently a substituted or unsubstituted alkyl group having 1 to 50 carbon atoms, a substituted or unsubstituted aryl group having 6 to 50 carbon atoms for forming a ring, or a substituted or unsubstituted heteroaryl group having 2 to 50 carbon atoms for forming a ring, which includes O or S as a heteroatom, and each of L1 and L2 is independently a direct linkage, a substituted or unsubstituted arylene group having 6 to 30 carbon atoms for forming a ring, or a substituted or unsubstituted heteroarylene group having 2 to 30 carbon atoms for forming a ring. R1 through R5 are defined in the description. |
| US11121328B2 |
Synthesis of platinum and palladium complexes as narrow-band phosphorescent emitters for full color displays
Platinum and palladium complexes are disclosed that can be useful as narrow band phosphorescent emitters. Also disclosed are methods for preparing and using the platinum and palladium complexes. |
| US11121325B2 |
Organic light emitting display device
An organic light emitting display device is provided. The organic light emitting display device includes at least two or more light emitting parts between an anode and a cathode and each having a light emitting layer. At least one of the at least two or more light emitting parts includes an organic layer. The organic layer is formed of a compound comprising a functional group that reacts with alkali metals or alkali earth metals and a functional group with electron transport properties. |
| US11121316B2 |
Symmetric tunable PCM resistor for artificial intelligence circuits
A method of tuning a PCM device is disclosed. The method includes receiving a command and determining if the command is a SET command or a RESET command. When the command is a RESET command, the method provides a short pulse across a resistive electrode and a top electrode through a phase change material generating amorphous PCM at the point of highest voltage across the PCM region. |
| US11121315B2 |
Structure improving reliability of top electrode contact for resistance switching RAM having cells of varying height
The problem of forming top electrode vias that provide consistent results in devices that include resistance switching RAM cells of varying heights is solved using a dielectric composite that fills areas between resistance switching RAM cells and varies in height to align with the tops of both the taller and the shorter resistance switching RAM cells. An etch stop layer may be formed over the dielectric composite providing an equal thickness of etch-resistant dielectric over both taller and shorter resistance switching RAM cells. The dielectric composite causes the etch stop layer to extend laterally away from the resistance switching RAM cells to maintain separation between the via openings and the resistance switching RAM cell sides even when the openings are misaligned. |
| US11121314B2 |
Large height tree-like sub 30nm vias to reduce conductive material re-deposition for sub 60nm MRAM devices
A stack of connecting metal vias is formed on a bottom electrode by repeating steps of depositing a conductive via layer, patterning and trimming the conductive via layer to form a sub 30 nm conductive via, encapsulating the conductive via with a dielectric layer, and exposing a top surface of the conductive via. A MTJ stack is deposited on the encapsulated via stack. A top electrode layer is deposited on the MTJ stack and patterned and trimmed to form a sub 60 nm hard mask. The MTJ stack is etched using the hard mask to form an MTJ device and over etched into the encapsulation layers but not into the bottom electrode wherein metal re-deposition material is formed on sidewalls of the encapsulation layers underlying the MTJ device and not on sidewalls of a barrier layer of the MTJ device. |
| US11121305B2 |
Microelectronic structures with suspended lithium-based thin films
In one aspect, a microelectronic device comprises: a suspended lithium-based thin film; and one or more electrodes disposed on the suspended lithium-based thin film, wherein the one or more electrodes comprises one or more fingers, and a width of at least one outer finger of the one or more fingers is smaller than a width of at least one inner finger of the one or more fingers. |
| US11121304B2 |
Junction fabrication method for forming qubits
A method of making a Josephson junction for a superconducting qubit includes providing a substructure having a surface with first and second trenches perpendicular to each other defined therein. The method further includes evaporating a first superconducting material to deposit the first superconducting material and evaporating a second superconducting material to deposit the second superconducting material in the first trench to provide a first lead, and forming an oxidized layer on the first and second superconducting materials. The method includes evaporating a third superconducting material at an angle substantially perpendicular to the surface of the substructure to deposit the third superconducting material in the second trench without rotating the substructure to form a second lead. A vertical Josephson junction is formed at the intersection of the first and second trenches electrically connected through the first lead and through the second lead. |
| US11121303B2 |
Treatment during fabrication of a quantum computing device to increase channel mobility
Methods related to the treatment of a quantum computing device to increase channel mobility are described. An example method includes forming a superconducting metal layer on a surface of a wafer. The method further includes selectively removing a portion of the superconducting metal layer to allow a subsequent formation of a gate dielectric associated with the device, where the selectively removing causes a decrease in channel mobility associated with the quantum computing device. The method further includes prior to forming the gate dielectric, subjecting the wafer to a plasma treatment, where a set of parameters associated with the plasma treatment is selected to increase the channel mobility. |
| US11121302B2 |
System and method for superconducting multi-chip module
A method for bonding two superconducting integrated circuits (“chips”), such that the bonds electrically interconnect the chips. A plurality of indium-coated metallic posts may be deposited on each chip. The indium bumps are aligned and compressed with moderate pressure at a temperature at which the indium is deformable but not molten, forming fully superconducting connections between the two chips when the indium is cooled down to the superconducting state. An anti-diffusion layer may be applied below the indium bumps to block reaction with underlying layers. The method is scalable to a large number of small contacts on the wafer scale, and may be used to manufacture a multi-chip module comprising a plurality of chips on a common carrier. Superconducting classical and quantum computers and superconducting sensor arrays may be packaged. |
| US11121300B2 |
Method of producing optoelectronic semiconductor devices and optoelectronic semiconductor device
A method of producing optoelectronic semiconductor devices includes in the stated order: A) providing a semiconductor layer sequence on a transparent wafer, the semiconductor layer sequence including an active layer; B) applying electrical contact pads on a mounting face of the semiconductor layer sequence; C) coating the semiconductor layer sequence at the mounting face and/or on the electrical contact pads with a protective layer; D) dicing the semiconductor layer sequence and the wafer to form semiconductor chips with side faces; E) forming a casting body all around the semiconductor chips directly on the side faces, the protective layer having anti-wetting properties towards a material of the casting body; and F) dicing the casting body to the optoelectronic semiconductor devices, wherein the protective layer remains on the mounting face and/or on the electrical contact pads in the finished optoelectronic semiconductor devices. |
| US11121299B2 |
Semiconductor device and method
A method includes depositing a photonic structure over a substrate, the photonic structure including photonic semiconductor layer, forming conductive pads over the photonic structure, forming a hard mask over the conductive pads, wherein the hard mask is patterned to cover each conductive pad with a hard mask region, etching the photonic structure using the hard mask as an etching mask to form multiple mesa structures protruding from the substrate, each mesa structure including a portion of the photonic structure, a contact pad, and a hard mask region, depositing a first photoresist over the multiple mesa structures, depositing a second photoresist over the first photoresist, patterning the second photoresist to expose the hard mask regions of the multiple mesa structures, and etching the hard mask regions to expose portions of the contact pads of the multiple mesa structures. |
| US11121298B2 |
Light-emitting diode packages with individually controllable light-emitting diode chips
Solid-state light emitting devices including light-emitting diodes (LEDs), and more particularly packaged LEDs that include individually controllable LED chips are disclosed. In some embodiments, an LED package includes electrical connections configured to reduce corrosion of metals within the package; or decrease the overall forward voltage of the LED package; or provide an electrical path for electrostatic discharge (ESD) chips. In some embodiments, an LED package includes an array of LED chips, each of which is individually controllable such that individual LED chips or subgroups of LED chips may be selectively activated or deactivated. A single wavelength conversion element may be provided over the array of LED chips, or separate wavelength conversion elements may be provided over one or more individual LED chips of the array. Representative LED packages may be beneficial for applications where a high luminous intensity with a controllable brightness or adaptable emission pattern is desired. |
| US11121297B2 |
Method of manufacturing light emitting device that includes a first reflecting layer and a second reflecting layer
A method of manufacturing a light emitting device includes: mounting a light emitting element in a package in which a recess is defined, the light emitting element being mounted on a bottom surface defining the recess; forming a first reflecting layer by covering lateral surfaces defining the recess with a first resin containing a first reflecting material; forming a second reflecting layer covering the bottom surface defining the recess, wherein the step of forming the second reflecting layer comprises settling the second reflecting material in the second resin by a centrifugal force so as to form (i) a layer containing a second reflecting material on the bottom surface defining the recess, and (ii) a light-transmissive layer above the layer containing the second reflecting material; and disposing a phosphor-containing layer on the second reflecting layer and the light emitting element, the phosphor-containing layer comprising a third resin that contains a phosphor. |
| US11121292B2 |
LED light bulb having filament with being partially coated by light conversion layer
An LED light bulb, consisting of: a lamp housing doped with a golden yellow material or its surface coated with a yellow film; a bulb base connected to the lamp housing; a stem connected to the bulb base and located in the lamp housing, the stem comprises a stand extending to the center of the lamp housing; and a single LED filament, disposed in the lamp housing, the LED filament comprising: a light conversion layer, coated on at least two sides of the LED chip and the conductive electrodes, and a portion of each of the conductive electrodes is not coated with the light conversion layer, the light conversion layer has at least one top layer and one base layer, the top layer and the base layer are disposed on the opposing surface of the LED chip, wherein the top layer of the light conversion layer in the conductive section comprises a wavy concave structure with groove, the two adjacent grooves of the wavy concave structure have different width at the positions aligned in the axial direction of the LED filament. |
| US11121289B2 |
Ultra-dense quantum dot color converters
Quantum dot-based color converters having a high density of sub-pixels. The sub-pixels have a high density of quantum dots that provide for high conversion efficiency within small sub-pixel aspect ratios and small volumes. The color converter can be used in optical displays. |
| US11121286B2 |
Semiconductor device
A semiconductor device according to an embodiment includes a substrate, first and second light emitting structures disposed on the substrate, a first reflective electrode disposed on the first light emitting structure, a second reflective electrode disposed on the second light emitting structure, a connection electrode, a first electrode pad, and a second electrode pad. According to the embodiment, the first light emitting structure includes a first semiconductor layer of a first conductivity type, a first active layer disposed on the first semiconductor layer, a second semiconductor layer of a second conductivity type and disposed on the first active layer, and a first through hole provided through the second semiconductor layer and the first active layer to expose the first semiconductor layer. The second light emitting structure is spaced apart from the first light emitting structure and includes a third semiconductor layer of the first conductivity type, a second active layer disposed on the third semiconductor layer, and a fourth semiconductor layer of the second conductivity type and disposed on the second active layer. |
| US11121281B2 |
Systems and methods for light direction detection microchips
Embodiments of an improved light-direction detection (LDD) device are described herein. The LDD device includes a substrate and at least one predefined structure formed along the substrate by stacking metal layers, contacts, and vias available in the manufacturing process of the device. The predefined structure is formed along a photodiode pair to collectively define an optical sensor configured to detect direction of incident light without need for off-chip components. The device accommodates light direction detection in two or more orthogonal planes. |
| US11121280B2 |
Display device with image sensor
A display device is provided. The display device includes a display panel that has a display region. The display device also includes at least one image sensor that overlaps with the display region. The at least one image sensor includes a light-sensing element and at least one light-receiving element disposed on the light-sensing element. |
| US11121272B2 |
Self-bypass diode function for gallium arsenide photovoltaic devices
Embodiments of the invention generally relate to photovoltaic devices. In one embodiment, a method for forming a gallium arsenide based photovoltaic device includes providing a semiconductor structure, the structure including an absorber layer comprising gallium arsenide and an emitter layer. A bypass function is provided in a p-n junction of the semiconductor structure, where under reverse-bias conditions the p-n junction breaks down in a controlled manner by a Zener breakdown effect. The absorber or base layer has a grading in doping concentration from a first doping level closest to the emitter layer to a second doping level away from the emitter layer, the second doping level being greater than the first doping level. |
| US11121270B2 |
Photoelectric conversion element, photoelectric conversion module, and solar photovoltaic power generation system
There is provided a photoelectric conversion element which can prevent the contact resistance between a non-crystalline semiconductor layer containing impurities and an electrode formed on the non-crystalline semiconductor layer from increasing, and can improve the element characteristics. A photoelectric conversion element (10) includes a semiconductor substrate (12), a first semiconductor layer (20n), a second semiconductor layer (20p), a first electrode (22n), and a second electrode (22p). The first semiconductor layer (20n) has a first conductive type. The second semiconductor layer (20p) has a second conductive type opposite to the first conductive type. The first electrode (22n) is formed on the first semiconductor layer (20n). The second electrode (22p) is formed on the second semiconductor layer (20p). At least one electrode of the first electrode (22n) and the second electrode (22p) includes a plurality of metal crystal grains. The average crystal grain size of the metal crystal grains in the in-surface direction of electrode is greater than the thickness of the electrode. |
| US11121269B2 |
Solar cell
A solar cell includes a semiconductor substrate; a conductive region on or at the semiconductor substrate; an electrode electrically connected to the conductive region; and a silicon oxynitride layer on a light incident surface of the semiconductor substrate, wherein the silicon oxynitride layer comprises a first phase region having a first oxygen content and a first nitrogen content; a second phase region having a second oxygen content higher than the first oxygen content and a second nitrogen content lower than the first nitrogen content; and a third phase region having a third oxygen content lower than the second oxygen content and a third nitrogen content lower than the second nitrogen content. |
| US11121268B2 |
Semiconductor light-receiving element and manufacturing method of semiconductor light-receiving element
A semiconductor light-receiving element includes a substrate; a light-receiving mesa portion, formed on top of the substrate, including a first semiconductor layer of a first conductivity type, an absorption layer, and a second semiconductor layer of a second conductivity type; a light-receiving portion electrode, formed above the light-receiving mesa portion, connected to the first semiconductor layer; a pad electrode formed on top of the substrate; and a bridge electrode, placed so that an insulating gap is interposed between the bridge electrode and the second semiconductor layer, configured to connect the light-receiving portion electrode and the pad electrode on top of the substrate, the bridge electrode being formed in a layer separate from layers of the light-receiving portion electrode and the pad electrode. |
| US11121267B2 |
Antireflective coating for glass applications and method of forming same
One aspect of the disclosure is directed to a method for forming an antireflective coating on a substrate, which includes providing a polymer solution and a silica solution, depositing the polymer solution on a surface of the substrate to forming a polymer film thereon, depositing the silica solution on the formed polymer film on the substrate to form a silica film thereon, thereby forming a stack structure having the silica film formed on the polymer film that is, in turn, formed on the substrate, and drying the stack structure to form the antireflective coating on the substrate, wherein the antireflective coating comprises silica nanoparticles. |
| US11121263B2 |
Hydrogen trap layer for display device and the same
Display panels with hydrogen trap layers are described. The hydrogen trap layers may be incorporated into a variety of locations to getter or block hydrogen diffusion into the semiconductor oxide layer of an oxide transistor. |
| US11121262B2 |
Semiconductor device including thin film transistor and method for manufacturing the same
A semiconductor device includes a thin film transistor including: a substrate 1; a gate electrode 2 supported on the substrate 1; a semiconductor layer 4 provided on the gate electrode with a gate insulating layer 3 therebetween, wherein the semiconductor layer includes a first region Rs, a second region Rd, and a source-drain interval region SG that is located between the first region and the second region and overlaps with the gate electrode as seen from a direction normal to the substrate; a first contact layer Cs in contact with the first region and a second contact layer Cd in contact with the second region; a source electrode 8s electrically connected to the first region with the first contact layer therebetween; and a drain electrode 8d electrically connected to the second region with the second contact layer therebetween, wherein: the semiconductor layer includes a crystalline silicon region 4c, and at least a portion of the crystalline silicon region is located in the source-drain interval region SG; and the semiconductor layer has at least one opening P that is located in the source-drain interval region SG and reaches the gate insulating layer. |
| US11121257B2 |
Thin film transistor, pixel structure, display device and manufacturing method
The present disclosure provides a thin film transistor, a pixel structure, a display device, and a manufacturing method. The thin film transistor includes: a gate on the substrate; a gate insulating layer covering the gate and the substrate; a first support portion and a second support portion, which are provided on the gate insulating layer covering the substrate and located on both sides of the gate, wherein the first support portion is not connected to the second support portion; a semiconductor layer on the first support portion, the second support portion, and the gate insulating layer covering the gate; and a source and a drain respectively connected to the semiconductor layer. The first support portion and the second support portion are respectively configured to support the semiconductor layer. |
| US11121254B2 |
Transistor with strained superlattice as source/drain region
A transistor with strained superlattices as source/drain regions includes a substrate. A gate structure is disposed on the substrate. Two superlattices are respectively disposed at two sides of the gate structure and embedded in the substrate. The superlattices are strained. Each of the superlattices is formed by a repeated alternating stacked structure including a first epitaxial silicon germanium and a second epitaxial silicon germanium. The superlattices serve as source/drain regions of the transistor. |
| US11121250B2 |
Silicon carbide semiconductor device
In an element region and a non-element region, a silicon carbide semiconductor device includes a drift layer having a first conductivity type provided on a silicon carbide semiconductor substrate. In the element region, the silicon carbide semiconductor device includes a first trench that reaches the drift layer, and a gate electrode provided in the first trench through a gate insulation film and electrically connected to a gate pad electrode. In the non-element region, the silicon carbide semiconductor device includes a second trench whose bottom surface reaches the drift layer, a second relaxation region having a second conductivity type disposed below the second trench, an inner-surface insulation film provided on a side surface and on the bottom surface of the second trench, and a low-resistance region provided in the second trench through the inner-surface insulation film and electrically insulated from the gate pad electrode. |
| US11121247B2 |
Semiconductor device and method for manufacturing same
A semiconductor device includes a semiconductor portion, a first insulating film, a second insulating film, a first contact, a second contact, and a gate electrode. The first insulating film is provided on the semiconductor portion. The second insulating film is contacting the first insulating film, is provided on the semiconductor portion, and is thicker than the first insulating film. A through-hole is formed in the second insulating film. The first contact has a lower end connected to the semiconductor portion. The second contact has a lower portion disposed inside the through-hole and a lower end connected to the semiconductor portion. The gate electrode is positioned between the first contact and the second contact, is provided on the first insulating film, and is provided on a portion of the second insulating film other than the through-hole. |
| US11121246B2 |
3D semiconductor device and structure with memory
A 3D semiconductor device including: a first level including a first single-crystal layer, a plurality of first transistors, and at least one metal layer, the metal layer overlaying the first single crystal layer with interconnects between the first transistors forming control circuits; a second level overlaying the metal layer, a plurality of second transistors, and a plurality of first memory cells including at least one of the second transistors; a third level overlaying the second level and including a plurality of third transistors, including second memory cells each including at least one third transistor, where at least one of the second memory cells is at least partially atop of the control circuits, where the control circuits are connected so to control second transistors and third transistors, where the second level is bonded to the third level and to the first level, where the bonded includes oxide to oxide bonds; and a fourth level above the third level, including a second single-crystal layer. |
| US11121241B2 |
Semiconductor device
A semiconductor device includes a semiconductor substrate having first and second main surfaces, a first region formed in a surface layer of the first main surface, a drift layer disposed adjacent to the first region, a charge accumulation region having a higher concentration than the drift region, and a trench gate including a trench penetrating the first region and the charge accumulation region, and a gate electrode formed in the trench. The trench gate includes a main trench having a gate electrode to which a gate voltage is applied, and a dummy trench having a gate electrode to which a voltage different from the main trench is applied. The main trench and the dummy trench sandwiches the charge accumulation region, and a contact area S1 between the dummy trench and the charge accumulation region is larger than a contact area S2 between the main trench and the charge accumulation region. |
| US11121239B2 |
Spin to photon transducer
Methods, devices, and systems are described for storing and transferring quantum information. An example device may comprise at least one semiconducting layer, one or more conducting layers configured to define at least two quantum states in the at least one semiconducting layer and confine an electron in or more of the at least two quantum states, and a magnetic field source configured to generate an inhomogeneous magnetic field. The inhomogeneous magnetic field may cause a first coupling of an electric charge state of the electron and a spin state of the electron. The device may comprise a resonator configured to confine a photon. An electric-dipole interaction may cause a second coupling of an electric charge state of the electron to an electric field of the photon. |
| US11121237B2 |
Manufacturing method for FinFET device
The invention discloses a manufacturing method for FinFET device, comprises following steps: S01: providing an SOI substrate; S02: covering a middle part of the top silicon layer by using a barrier layer, and performing a silicon ion implantation on the top silicon layer, so that the buried insulator layer under the top silicon layer not covered by the barrier layer is converted into silicon-rich silicon dioxide, wherein in the top silicon layer, the part not covered by the barrier layer is called an implanted region, and the part covered by the barrier layer is called a non-implanted region; S03: removing the barrier layer, define a fin structure in the top silicon layer, the fin structure includes a channel and a source and drain, the source and drain are located on opposite sides of the channel; and the channel in the fin structure is located in the non-implanted region of the top silicon layer, the source and drain are located in the implanted region of the top silicon layer; removing the top silicon layer outside the fin structure; S04: removing the buried insulator layer under the channel in the fin structure to form a suspended channel; S05: forming a completely surrounded dielectric film and a gate in sequence around the suspended channel; S06: forming spacers and a source-drain doping in the structure. |
| US11121233B2 |
Forming nanosheet transistor using sacrificial spacer and inner spacers
Fabricating a nanosheet transistor includes receiving a substrate structure having a set of nanosheet layers stacked upon a substrate, the set of nanosheet layers including at least one silicon (Si) layer, at least one silicon-germanium (SiGe) layer, a fin formed in the nanosheet layers, a gate region formed within the fin, and a trench region adjacent to the fin. A top sacrificial spacer is formed upon the fin and the trench region and etched to form a trench in the trench region. An indentation is formed within the SiGe layer in the trench region, and a sacrificial inner spacer is formed within the indentation. A source/drain (S/D) region is formed within the trench. The sacrificial top spacer and sacrificial inner spacer are etched to form an inner spacer cavity between the S/D region and the SiGe layer. An inner spacer is formed within the inner spacer cavity. |
| US11121232B2 |
Stacked nanosheets with self-aligned inner spacers and metallic source/drain
Semiconductor devices include vertically stacked channel layers formed from a semiconductor material. A metallic interface layer is formed between metal source/drain regions and the vertically stacked channel layers. The metallic interface layer includes the semiconductor material and a metal. A gate stack is formed between and around the channel layers. |
| US11121230B2 |
Structures and methods for controlling dopant diffusion and activation
Structures and methods for controlling dopant diffusion and activation are disclosed. In one example, a semiconductor structure is disclosed. The semiconductor structure includes: a channel layer; a barrier layer over the channel layer; a gate electrode over the barrier layer; and a doped layer formed between the barrier layer and the gate electrode. The doped layer includes (a) an interface layer in contact with the barrier layer and (b) a main layer between the interface layer and the gate electrode. The doped layer comprises a dopant whose doping concentration in the interface layer is lower than that in the main layer. |
| US11121223B2 |
Control gate structures for field-effect transistors
Field-effect transistors, and apparatus including such field-effect transistors, including a gate dielectric overlying a semiconductor and a control gate overlying the gate dielectric. The control gate might include an instance of a first polycrystalline silicon-containing material containing polycrystalline silicon, and an instance of a second polycrystalline silicon-containing material containing polycrystalline silicon-germanium or polycrystalline silicon-germanium-carbon. |
| US11121222B2 |
Semiconductor devices with graded dopant regions
Most semiconductor devices manufactured today, have uniform dopant concentration, either in the lateral or vertical device active (and isolation) regions. By grading the dopant concentration, the performance in various semiconductor devices can be significantly improved. Performance improvements can be obtained in application specific areas like increase in frequency of operation for digital logic, various power MOSFET and IGBT ICs, improvement in refresh time for DRAMs, decrease in programming time for nonvolatile memory, better visual quality including pixel resolution and color sensitivity for imaging ICs, better sensitivity for varactors in tunable filters, higher drive capabilities for JFETs, and a host of other applications. |
| US11121220B2 |
Semiconductor device including trench structures and manufacturing method
A semiconductor device includes a silicon carbide semiconductor body including a source region of a first conductivity type, a body region of a second conductivity type, shielding regions of the second conductivity type and compensation regions of the second conductivity type. Trench structures extend from a first surface into the silicon carbide semiconductor body along a vertical direction. Each of the trench structures includes an auxiliary electrode at a bottom of the trench structure and a gate electrode between the auxiliary electrode and the first surface. The auxiliary electrode is electrically insulated from the gate electrode. The auxiliary electrode of each of the trench structures is adjoined by at least one of the shielding regions at the bottom of the trench structure. Each of the shielding regions is adjoined by at least one of the compensation regions at the bottom of the shielding region. |
| US11121219B2 |
Elastic strain engineering of defect doped materials
Compositions and methods related to straining defect doped materials as well as their methods of use in electrical circuits are generally described. |
| US11121218B2 |
Gate-all-around transistor structure
A semiconductor device and method of forming the same including a plurality of vertically aligned semiconductor channel layers disposed above a substrate layer, a gate stack formed on, and around the vertically aligned semiconductor channel layers and source and drain elements disposed in contact with sidewalls of the vertically aligned semiconductor channel layers. An uppermost vertically aligned semiconductor channel layer has a first thickness of semiconductor material and the remaining vertically aligned semiconductor channel layers have a second thickness of semiconductor material different from the first thickness. |
| US11121213B2 |
Fin recess last process for FinFET fabrication
A method includes forming isolation regions extending from a top surface of a semiconductor substrate into the semiconductor substrate, and forming a hard mask strip over the isolation regions and a semiconductor strip, wherein the semiconductor strip is between two neighboring ones of the isolation regions. A dummy gate strip is formed over the hard mask strip, wherein a lengthwise direction of the dummy gate strip is perpendicular to a lengthwise direction of the semiconductor strip, and wherein a portion of the dummy gate strip is aligned to a portion of the semiconductor strip. The method further includes removing the dummy gate strip, removing the hard mask strip, and recessing first portions of the isolation regions that are overlapped by the removed hard mask strip. A portion of the semiconductor strip between and contacting the removed first portions of the isolation regions forms a semiconductor fin. |
| US11121207B2 |
Integrated trench capacitor with top plate having reduced voids
A method for forming trench capacitors includes forming a silicon nitride layer over a first region of a semiconductor surface doped a first type and over a second region doped a second type. A patterned photoresist layer is directly formed on the silicon nitride layer. An etch forms a plurality of deep trenches (DTs) within the first region. A liner oxide is formed that lines the DTs. The silicon nitride layer is etched forming an opening through the silicon nitride layer that is at least as large in area as the area of an opening in the semiconductor surface of the DT below the silicon nitride layer. The liner oxide is removed, a dielectric layer(s) on a surface of the DTs is formed, a top plate material layer is deposited to fill the DTs, and the top plate material layer is removed beyond the DT to form a top plate. |
| US11121206B2 |
Integrated circuit resistor with passive breakdown protection circuit
An electrical device includes an integrated circuit having device circuitry, a passive breakdown protection circuit, and a resistor coupled to or included with the device circuitry. The resistor includes: a polysilicon layer coupled between a first terminal and a second terminal; an epitaxial layer terminal; and a buried layer terminal. The passive breakdown protection circuit is coupled between the second terminal and the epitaxial layer terminal. The passive breakdown protection circuit is also coupled between the epitaxial layer terminal and the buried layer terminal. |
| US11121205B2 |
Display panel and display panel test system
A display panel measures a contact resistance of an adhesive portion to evaluate adhesion quality of an integrated circuit mounted thereon. The display panel includes a plurality of light-emitting elements, a first pad part including a plurality of first effective pads electrically connected to the light-emitting elements, and n (n being a natural number equal to or greater than 2) first measuring pads insulated from the light-emitting elements, a conductive adhesive film on the first pad part and including a plurality of conductive balls, an integrated circuit on the conductive adhesive film, and including an internal line electrically connected to the first measuring pads by the conductive balls, and a second pad part including a plurality of second effective pads electrically connected to the first effective pads, and 2n second measuring pads electrically connected to the first measuring pads. |
| US11121202B2 |
Display apparatus
A display apparatus includes a substrate on which a first indented portion indented inward along one side of the substrate is formed; a first pad unit and a second pad unit spaced apart from each other on the substrate along the one side; a display unit above the substrate and having a shape indented inward between the first pad unit and the second pad unit; an encapsulating unit encapsulating the display unit; and a wiring film bent from a first surface of the substrate to a second surface of the substrate, the wiring film including a third pad unit and a fourth pad unit connected to the first pad unit and the second pad unit, respectively, and a second indented portion indented inward between the third pad unit and the fourth pad unit. |
| US11121193B2 |
Electronic panel and electronic apparatus including the same
An electronic panel may include a plurality of sensing electrodes and a plurality of sensing lines. The sensing lines may include a plurality of first group sensing lines and a plurality of second group sensing lines, which are spaced apart from each other in a specific direction and are alternately arranged with respect to each other. Each of the first group sensing lines and the second group sensing lines may include a first pattern layer and a second pattern layer, which are spaced apart from each other with an insulating layer interposed therebetween and are coupled to each other through the insulating layer. Each of the first group sensing lines may include a first pattern layer in a specific region, and each of the second group sensing lines may include a second pattern layer in the specific region. |
| US11121192B2 |
Display device
A display device includes a substrate including an opening area and a display area at least partially surrounding the opening area; and a metal layer including a first region and a second region adjacent to a non-display area between the opening area and the display area, the first region and the second region are spaced apart from each other, and one of the first region and the second region includes a protrusion extending toward the other of the first region and the second region, and the other of the first region and the second region has a shape to receive the protrusion. |
| US11121186B2 |
Transparent display device including a transmissive electrode and a capping structure at an emission portion and a transmission portion
Disclosed is a transparent display device which has improved transmittance and luminous uniformity according to wavelength. The transparent display device includes a capping structure. The capping structure is formed by stacking a high refractive index first capping layer having destructive interference properties and a low refractive index second capping layer. |
| US11121183B2 |
Display panel
A display panel is provided, including a display area and a plurality of pixel units disposed in the display area. Each pixel unit includes at least one red pixel, at least one green pixel, and at least one blue pixel. The red pixel includes a red optical resonant cavity, and the green pixel includes a green optical resonant cavity. The display panel is provided to eliminate a color shift caused by a difference in light changes between different color pixels. |
| US11121182B2 |
Organic photoelectric conversion element, optical area sensor, image pickup device, and image pickup apparatus
An organic photoelectric conversion element includes an electron-collecting electrode, a hole-collecting electrode, and a photoelectric conversion portion which is disposed between the electron-collecting electrode and the hole-collecting electrode. The photoelectric conversion portion includes a first organic compound layer. A second organic compound layer is disposed between the hole-collecting electrode and the photoelectric conversion portion. The first organic compound layer contains a first compound having at least a fullerene skeleton and a second compound having a fluoranthene skeleton. |
| US11121174B2 |
MRAM integration into the MOL for fast 1T1M cells
A memory cell is provided in which a bottom electrode of a magnetoresistive random access memory (MRAM) device is connected to one of the source/drain contact structures of a transistor, and a lower contact structure is connected to another of the source/drain contact structures of the transistor. In the present application, the MRAM device and the lower contact structure are present in the middle-of-the-line ((MOL) not the back-end-of-the-line (BEOL). Moreover, the bottom electrode of the MRAM device, and a lower portion of the lower contact structure are present in a same dielectric material (i.e., a MOL dielectric material). |
| US11121173B2 |
Preserving underlying dielectric layer during MRAM device formation
Techniques for preserving the underlying dielectric layer during MRAM device formation are provided. In one aspect, a method of forming an MRAM device includes: depositing a first dielectric cap layer onto a substrate over logic and memory areas of the substrate; depositing a sacrificial metal layer onto the first dielectric cap layer; patterning the sacrificial metal layer, wherein the patterned sacrificial metal layer is present over the first dielectric cap layer in at least the logic area; depositing a second dielectric cap layer onto the first dielectric cap layer; forming an MRAM stack on the second dielectric cap layer; patterning the MRAM stack using ion beam etching into at least one memory cell, wherein the patterned sacrificial metal layer protects the first dielectric cap layer in the logic area; and removing the patterned sacrificial metal layer. An MRAM device is also provided. |
| US11121170B2 |
Method for manufacturing micro array light emitting diode and lighting device
The present invention suggests a method for manufacturing a micro-array light emitting diode comprising: a step for forming a semiconductor lamination structure by stacking an n-type semiconductor layer, an active layer, and a p-type semiconductor layer on a substrate; a step for forming a plurality of p-type electrodes so as to be arranged two-dimensionally apart from each other on the p-type semiconductor layer; and a step for forming an isolation part in the p-type semiconductor layer exposed between the plurality of p-type electrodes in a self-aligning manner. |
| US11121169B2 |
Metal vertical transfer gate with high-k dielectric passivation lining
A method for manufacturing an image sensor includes, for each of a plurality of photosensitive pixels of the image sensor, forming a trench in a semiconductor substrate of the image sensor, and depositing temporary transfer gate material in and above the trench. The method further includes, after the step of depositing temporary transfer gate material, high-temperature annealing at least a portion of the semiconductor substrate. In addition, the method includes, after the step of high-temperature annealing, (a) removing the temporary transfer gate material, thereby reopening the trench, (b) depositing a passivation lining, having a high-k dielectric, in the reopened trench, and (c) depositing metal on the high-k dielectric passivation lining to form a metal vertical transfer gate in the trench and extending above the trench. |
| US11121168B2 |
Stacked grid design for improved optical performance and isolation
A back side illumination (BSI) image sensor with a dielectric grid opening having a planar lower surface is provided. A pixel sensor is arranged within a semiconductor substrate. A metallic grid is arranged over the pixel sensor and defines a sidewall of a metallic grid opening. A dielectric grid is arranged over the metallic grid and defines a sidewall of the dielectric grid opening. A capping layer is arranged over the metallic grid, and defines the planar lower surface of the dielectric grid opening. |
| US11121166B2 |
Image sensor device
An image sensor device is provided. The image sensor device includes a semiconductor substrate including a front surface, a back surface opposite to the front surface, and a light-sensing region extending from the front surface into the semiconductor substrate. The image sensor device includes a light-blocking structure in the semiconductor substrate and surrounding the light-sensing region. The light-blocking structure includes a conductive light reflection structure and a light absorption structure, and the light absorption structure is between the conductive light reflection structure and the back surface. The image sensor device includes an insulating layer between the light-blocking structure and the semiconductor substrate. |
| US11121164B2 |
Semiconductor device and method for production of semiconductor device
A semiconductor device with a connection pad in a substrate, the connection pad having an exposed surface made of a metallic material that diffuses less readily into a dielectric layer than does a metal of a wiring layer connected thereto. |
| US11121163B2 |
Image sensor
An image sensor includes a semiconductor substrate of first conductivity type having first and second surfaces and including pixel regions, photoelectric conversion regions of second conductivity type respectively provided in the pixel regions, and a pixel isolation structure disposed in the semiconductor substrate to define the pixel regions and surrounding each of the photoelectric conversion regions. The pixel isolation structure includes a semiconductor pattern extending from the first surface to the second surface of the semiconductor substrate, a sidewall insulating pattern between a sidewall of the semiconductor pattern and the semiconductor substrate, and a dopant region in at least a portion of the semiconductor pattern. |
| US11121162B2 |
Light pipe structure with high quantum efficiency
Various embodiments of the present disclosure are directed towards an image sensor including a light pipe structure. A photodetector disposed within a semiconductor substrate. A gate electrode is over the semiconductor substrate and borders the photodetector. An inter-level dielectric (ILD) layer overlies the semiconductor substrate. A conductive contact is disposed within the ILD layer such that a bottom surface of the conductive contact is below a top surface of the gate electrode. The light pipe structure overlies the photodetector such that a bottom surface of the light pipe structure is recessed below a top surface of the conductive contact. |
| US11121161B2 |
Solid-state imaging sensor
The present technology relates to a solid state imaging sensor that is possible to suppress the reflection of incident light with a wide wavelength band. A reflectance adjusting layer is provided on the substrate in an incident direction of the incident light with respect to the substrate such as Si and configured to adjust reflection of the incident light on the substrate. The reflectance adjusting layer includes a first layer formed on the substrate and a second layer formed on the first layer. The first layer includes a concavo-convex structure provided on the substrate and a material which is filled into a concave portion of the concavo-convex structure and has a refractive index lower than that of the substrate, and the second layer includes a material having a refractive index lower than that of the first layer. It is possible to reduce the reflection on the substrate such as Si by using the principle of the interference of the thin film. Such a technology can be applied to solid state imaging sensors. |
| US11121160B2 |
Photoelectric conversion apparatus and equipment comprising a light shielding part in a light receiving region and a light shielding film in a light shielded region
Photoelectric conversion apparatus includes semiconductor layer having photoelectric converters in light-receiving region and photoelectric converters in light-shielded region, light-shielding part arranged above the semiconductor layer in the light-receiving region to surround light paths of the photoelectric converters in the light-receiving region, and light-shielding film arranged above the semiconductor layer in the light-shielded region to cover the photoelectric converters in the light-shielded region. The light-shielding part includes lower and upper ends. The light-shielding film includes lower and upper surfaces. Distance between the upper end and the semiconductor layer is larger than that between the upper surface and the semiconductor layer. Distance between the lower end and the semiconductor layer is smaller than that between the upper surface and the semiconductor layer and is larger than that between the lower surface and the semiconductor layer. |
| US11121159B2 |
Pixel structure of image sensor having dielectric layer surrounding photo conversion layer and color filter
A photo diode includes a pixel unit, a photo conversion layer, and a dielectric layer. The pixel unit includes a pair of pixels. The photo conversion layer is above the pixel unit and has a pair of portions, each of which corresponds to a respective one of the pixels. The dielectric layer is between the portions of the photo conversion layer. A method of manufacturing the photo diode is also disclosed. |
| US11121158B2 |
Solid-state image pickup apparatus and electronic equipment
The present technology relates to a solid-state image pickup apparatus and electronic equipment that makes it possible to suppress read noise. A solid-state image pickup apparatus according to a first aspect of the present technology includes a photoelectric conversion section that generates and holds a charge in response to incident light, a transfer section that includes a V-NW transistor (Vertical Nano Wire transistor) and transfers the charge held in the photoelectric conversion section, and an accumulation section that includes a wiring layer connected to a drain of the transfer section including the V-NW transistor and accumulates the charge transferred by the transfer section. The present technology is applicable to a CMOS image sensor, for example. |
| US11121157B2 |
Image sensors
Image sensors are provided. The image sensors may include a substrate including first, second, third and fourth regions, a first photoelectric conversion element in the first region, a second photoelectric conversion element in the second region, a third photoelectric conversion element in the third region, a fourth photoelectric conversion element in the fourth region, a first microlens at least partially overlapping both the first and second photoelectric conversion elements, and a second microlens at least partially overlapping both the third and fourth photoelectric conversion elements. The image sensors may also include a floating diffusion region and first, second and third pixel transistors configured to perform different functions from each other. Each of the first, second and third pixel transistors may be disposed in at least one of first, second, third and fourth pixel regions. The first pixel transistor may include multiple first pixel transistors. |
| US11121152B2 |
Three-dimensional memory device and manufacturing method thereof
A three-dimensional (3D) memory device and a manufacturing method thereof are provided. The method includes the following steps. An alternating dielectric stack is formed on a substrate. An opening is formed penetrating the alternating dielectric stack in a thickness direction of the substrate. A blocking layer is formed on a sidewall of the opening. A trapping layer is formed in the opening, and the trapping layer is formed on the blocking layer. The trapping layer includes a lower portion and an upper portion disposed above the lower portion. A thickness of the upper portion in a horizontal direction is greater than a thickness of the lower portion in the horizontal direction. The thickness distribution of the trapping layer is modified for improving the electrical performance of the 3D memory device. |
| US11121149B2 |
Three-dimensional memory device containing direct contact drain-select-level semiconductor channel portions and methods of making the same
An alternating stack of insulating layers and word-line-level spacer material layers is formed over a substrate. Memory opening fill structures including a respective memory film, a respective word-line-level semiconductor channel portion, a respective word-line-level dielectric core laterally, and a respective sacrificial dielectric material portion are formed through the alternating stack. Drain-select-level material layers are formed over the alternating stack and the memory opening fill structures. Drain-select-level openings are formed through the drain-select-level material layers and over the memory opening fill structures. The sacrificial dielectric material portions are removed selective to the word-line-level semiconductor channel portions underneath the drain-select-level openings. Drain-select-level semiconductor channel portions are formed directly on a respective one of the word-line-level semiconductor channel portions. |
| US11121145B1 |
Memory arrays comprising strings of memory cells and methods used in forming a memory array comprising strings of memory cells
A memory array comprising strings of memory cells comprises a conductor tier comprising conductor material. The memory array comprises laterally-spaced memory blocks individually comprising a vertical stack comprising alternating insulative tiers and conductive tiers directly above the conductor tier. Conducting material of a lowest of the conductive tiers is directly against the conductor material of the conductor tier. Channel-material strings of memory cells extend through the insulative tiers and the conductive tiers. Intervening material is laterally-between and longitudinally-along immediately-laterally-adjacent of the memory blocks. The conducting material in the lowest conductive tier is directly against the channel material of individual of the channel-material strings. Conductive material is of different composition from that of the conducting material above and directly against the conducting material. Other embodiments, including method, are disclosed. |
| US11121144B2 |
Memory arrays and methods used in forming a memory array comprising strings of memory cells
A method used in forming a memory array comprises forming a stack comprising vertically-alternating first tiers and second tiers. First insulator material is above the stack. The first insulator material comprises at least one of (a) and (b), where (a): silicon, nitrogen, and one or more of carbon, oxygen, boron, and phosphorus, and (b): silicon carbide. Channel-material strings are in and upwardly project from an uppermost material that is directly above the stack. Conducting material is directly against laterally-inner sides of individual of the upwardly-projecting channel-material strings and project upwardly from the individual upwardly-projecting channel-material strings. A ring comprising insulating material is formed individually circumferentially about the upwardly-projecting conducting material. Second insulator material is formed above the first insulator material, the ring, and the upwardly-projecting conducting material. The first and second insulator materials comprise different compositions relative one another. Conductive vias are formed in the second insulator material that are individually directly electrically coupled to the individual channel-material strings through the upwardly-projecting conducting material. Other embodiments, including structure, are disclosed. |
| US11121140B2 |
Ferroelectric tunnel junction memory device with integrated ovonic threshold switches
A ferroelectric tunnel junction memory device includes a bit line, a word line and a memory cell located between the bit line and the word line. The memory cell includes a ferroelectric tunneling dielectric portion and an ovonic threshold switch material portion. |
| US11121139B2 |
Hafnium oxide and zirconium oxide based ferroelectric devices with textured iridium bottom electrodes
A method of forming a ferroelectric/anti-ferroelectric (FE/AFE) dielectric layer is provided. The method includes forming a metal electrode layer on a substrate, wherein the metal electrode layer has an exposed surface with at least 80% {111} crystal face, and forming an FE/AFE dielectric layer on the exposed surface of the metal electrode layer, wherein the FE/AFE dielectric layer is a group 4 transition metal oxide. |
| US11121138B1 |
Low resistance pickup cells for SRAM
A semiconductor device includes a transistor and a memory pickup cell formed over a well in a substrate. The transistor includes a first fin having a first width and two first source/drain features on the first fin. The pickup cell includes a second fin having a second width and two second source/drain features on the second fin. The well, the first fin, the second fin, and the second source/drain feature are of a first conductivity type. The first source/drain features are of a second conductivity type opposite to the first conductivity type. The second width is at least three times of the first width. The pickup cell further includes a stack of semiconductor layers over the second fin and connecting the two second source/drain features. |
| US11121131B2 |
Semiconductor device and method of manufacturing the same
Disclosed are semiconductor devices and methods of manufacturing the same. The semiconductor device comprises a first transistor on a substrate, and a second transistor on the substrate. Each of the first and second transistors includes a plurality of semiconductor patterns vertically stacked on the substrate and vertically spaced apart from each other, and a gate dielectric pattern and a work function pattern filling a space between the semiconductor patterns. The work function pattern of the first transistor includes a first work function metal layer, the work function pattern of the second transistor includes the first work function metal layer and a second work function metal layer, the first work function metal layer of each of the first and second transistors has a work function greater than that of the second work function metal layer, and the first transistor has a threshold voltage less than that of the second transistor. |
| US11121129B2 |
Semiconductor device
Provided is a semiconductor device including a substrate, a gate structure, a first metal layer, and a gate via. The substrate has at least three semiconductor fins to define an active region. The gate structure is across the at least three semiconductor fins and extends along a first direction. The first metal layer extends along a second direction and is disposed over the gate structure. The gate via is disposed between the gate structure and the first metal layer. The gate via has a longitudinal axis extending along the first direction and across the first metal layer. A length of the longitudinal axis of the gate via is greater than a width of the first metal layer. |
| US11121124B2 |
Display device with a plurality of separately operable pixels formed in a grid
A display device is disclosed. In an embodiment a display device having a plurality of pixels separately operable from each other includes a semiconductor layer sequence including a first semiconductor layer, an active layer and a second semiconductor layer, a first contact structure contacting the first semiconductor layer and a second contact structure contacting the second semiconductor layer and at least one separating region extending through the first contact structure, the first semiconductor layer and the active layer into the second semiconductor layer, wherein the semiconductor layer sequence and the first contact structure have at least one first recess laterally adjacent with respect to a respective pixel, the first recess extending through the first contact structure, the first semiconductor layer and the active layer into the second semiconductor layer, and wherein the second contact structure includes second contacts extending through the at least one first recess. |
| US11121123B2 |
Semiconductor composite device and package board used therein
A semiconductor composite device is provided that includes a voltage regulator, a package board, and a load, and converts an input DC voltage into a different DC voltage to supply the converted DC voltage to the load. The VR includes a semiconductor active element. The package board includes a C layer in which a capacitor is formed, and an L layer in which an inductor is formed. A plurality of through holes penetrate the C layer and the L layer in a direction perpendicular to the mounting face in the package board. The capacitor is connected to the load through the through hole. The inductor is connected to the load through the through hole and to the VR through the through hole. |
| US11121122B2 |
Flexible light-emitting diode lighting strip with interposer
A method for producing a flexible lighting strip comprising multitude of functional elements, which are light-emitting diodes, comprise light-emitting diodes, or are interposers with light-emitting diodes. The functional elements are in at least two groups, each comprising at least two functional elements in electrical series connection. The groups are in an electrical circuit having at least an anode and a cathode track as outer lines. The functional elements are in an electrical parallel connection to the anode and cathode tracks. The groups are in a longitudinal arrangement so a first group's last functional element is next to a second group's first functional element. Each of the outer lines has a wire line having substantially circular wires that are bent building zones capable of receiving compressive and tensile stress. The electrical circuit provides a third wire line having a substantially circular wire as a center line arranged between the outer lines. |
| US11121121B2 |
3D semiconductor device and structure
A 3D semiconductor device, the device including: a first level; a second level; and a third level, where the first level includes single crystal silicon and a plurality of logic circuits, where the plurality of logic circuits includes a first logic circuit and a second logic circuit, where the second level is disposed directly above the first level and includes a first plurality of arrays of memory cells, where the third level is disposed directly above the second level and includes a plurality of on-chip RF circuits, and where a portion of interconnections between the first logic circuit and the second logic circuit includes the plurality of on-chip RF circuits. |
| US11121120B2 |
Method and system for electronic devices with polycrystalline substrate structure interposer
An interposer includes a polycrystalline ceramic core disposed between a first surface and a second surface of the interposer, an adhesion layer encapsulating the polycrystalline ceramic core, a barrier layer encapsulating the adhesion layer, and one or more electrically conductive vias extending from the first surface to the second surface through the polycrystalline ceramic core, the adhesion layer, and the barrier layer. |
| US11121119B2 |
Semiconductor package
The present disclosure provides a semiconductor package including a substrate, a display unit, a flexible substrate, a driving circuit, and a memory. The substrate has a first surface and a second surface opposite to each other, and the first surface has a display region and a bonding region. The display unit is disposed on the display region of the first surface. The flexible substrate is disposed below the second surface and has a connection portion extended to the bonding region of the first surface. The driving circuit is disposed on the flexible substrate and electrically connects with the display unit. The memory is disposed on the flexible substrate and electrically connects with the driving circuit. |
| US11121112B2 |
Solid-state image pickup element with dam to control resin outflow
The present technology relates to a solid-state image pickup element, electronic equipment, and a semiconductor apparatus that make it possible to reduce a surface reflection in an area in which a slit is formed and improve flare characteristics. A solid-state image pickup element includes a pixel area in which a plurality of pixels is two-dimensionally arranged in a matrix, a chip mounting area in which a chip is flip-chip mounted, and a dam area that is arranged around the chip mounting area and in which one or more slits that block an outflow of a resin are formed. In the dam area, the same OCL as that in the pixel area is formed. The present technology can be applied to a solid-state image pickup element etc. in which a chip is flip-chip mounted, for example. |
| US11121109B2 |
Innovative interconnect design for package architecture to improve latency
An integrated circuit includes a package substrate that includes first and second electrical traces. The integrated circuit includes first, second, third, and fourth configurable dies, which are mounted on the package substrate. The first and second configurable dies are arranged in a first row. The third and fourth configurable dies are arranged in a second row, which is approximately parallel to the first row. The first and third configurable dies are arranged in a first column. The second and fourth configurable dies are arranged in a second column, which is approximately parallel to the first column. The first electrical trace couples the first and third configurable dies, and the second electrical trace couples the second and third configurable dies. The second electrical trace is oblique with respect to the first electrical trace. The oblique trace improves the latency of signals transmitted between dies and thereby increases the circuit operating speed. |
| US11121107B2 |
Interconnect substrate having columnar electrodes
An interconnect substrate includes a substrate, and a first connection terminal and a second connection terminal that are disposed on a surface of the substrate, wherein the first connection terminal includes a first columnar electrode and a first bump disposed on the first columnar electrode, the first columnar electrode having a flat or convex surface and having a first diameter, wherein the second connection terminal includes a second columnar electrode and a second bump disposed on the second columnar electrode, the second columnar electrode having a concave surface and having a second diameter larger than the first diameter, and wherein a melting point of the first bump and the second bump is lower than a melting point of the first columnar electrode and the second columnar electrode. |
| US11121100B2 |
Trap layer substrate stacking technique to improve performance for RF devices
Some embodiments of the present disclosure are directed to a device. The device includes a substrate comprising a silicon layer disposed over an insulating layer. The substrate includes a transistor device region and a radio-frequency (RF) region. An interconnect structure is disposed over the substrate and includes a plurality of metal layers disposed within a dielectric structure. A handle substrate is disposed over an upper surface of the interconnect structure. A trapping layer separates the interconnect structure and the handle substrate. |
| US11121098B2 |
Trap layer substrate stacking technique to improve performance for RF devices
Some embodiments of the present disclosure are directed to a device. The device includes a substrate comprising a silicon layer disposed over an insulating layer. The substrate includes a transistor device region and a radio-frequency (RF) region. An interconnect structure is disposed over the substrate and includes a plurality of metal layers disposed within a dielectric structure. A handle substrate is disposed over an upper surface of the interconnect structure. A trapping layer separates the interconnect structure and the handle substrate. |
| US11121092B2 |
Marking pattern in forming staircase structure of three-dimensional memory device
Embodiments of a marking pattern in forming the staircase structure of a three-dimensional (3D) memory device are provided. In an example, a semiconductor device includes a stack structure having a plurality of insulating layers and a plurality of conductor layers arranged alternatingly over a substrate along a vertical direction. In some embodiments, the semiconductor device also includes a marking pattern having a plurality of interleaved layers of different materials over the substrate and neighboring the stack structure. The marking pattern includes a central marking structure located in a marking area, the central marking structure dividing the marking area into a first marking sub-area farther from the stack structure and a second marking sub-area closer to the stack structure, a first pattern density of the first marking sub-area being higher than or equal to a second pattern density of the second marking sub-area. |
| US11121090B2 |
Fan-out semiconductor package
This invention provides a fan-out semiconductor package, the fan-out semiconductor package includes a frame including one or more insulating layers and having a penetration portion, a semiconductor chip disposed in the penetration portion of the frame and having a connection pad, a connection structure disposed on a lower side of the frame and the semiconductor chip and including a redistribution layer, a first encapsulant covering a back surface of the semiconductor chip and a first region of a top surface of an uppermost insulating layer among the one or more insulating layers of the frame and extending between a sidewall of the penetration portion and a side surface of the semiconductor chip, and a second encapsulant covering a second region of the top surface of the uppermost insulating layer among the one or more insulating layers of the frame and being in contact with a side surface of the first encapsulant on the frame. |
| US11121088B2 |
Semiconductor package structure and method of manufacturing the same
A method of manufacturing a semiconductor package structure is provided. The method includes providing a first carrier, forming a patterned buffer layer over the first carrier, forming a first redistribution structure that includes forming a first dielectric layer on the patterned buffer layer, after an electrical testing by applying an electric signal towards the first redistribution structure, removing the first carrier, removing portions of the first dielectric layer, resulting in a patterned first dielectric layer, the patterned first dielectric layer exposing portions of the first circuit layer, removing the exposed portions of the first circuit layer, using the patterned first dielectric layer as a mask, resulting in a patterned first circuit layer, and forming an electric conductor in a recess defined by the patterned first dielectric layer and the patterned first circuit layer. |
| US11121087B2 |
Methods of forming a conductive contact structure to an embedded memory device on an IC product and a corresponding IC product
One illustrative device disclosed herein includes a layer of insulating material having an upper surface positioned at a first level and a recessed conductive interconnect structure positioned at least partially within the layer of insulating material, wherein the recessed conductive interconnect structure has a recessed upper surface that is positioned at a second level that is below the first level. In this example, the device also includes a recess defined in the recessed conductive interconnect structure, a memory cell positioned above the recessed conductive interconnect structure and a conductive via plug that is conductively coupled to the recessed conductive interconnect structure and a lower conductive material of the memory cell, wherein at least a portion of the conductive via plug is positioned in the recess defined in the recessed conductive interconnect. |
| US11121083B2 |
Semiconductor device with fuse-detecting structure
A semiconductor device includes a substrate; an insulating layer positioned above the substrate, wherein the insulating layer has two ends; a first doped region formed in the substrate and positioned at one end of the two ends of the insulating layer; a second doped region formed in the substrate and positioned at the other end of the two ends of the insulating layer, wherein the second doped region is opposite to the first doped region; a control terminal positioned above the insulating layer; a first fuse head positioned above the control terminal and electrically coupled to the first doped region; a second fuse head positioned above the first fuse head; and a fuse area positioned between the first fuse head and the second fuse head. |
| US11121081B2 |
Antifuse element
An antifuse element includes a conductive region formed in a semiconductor substrate extending in a first direction, a dielectric layer formed on a portion of the conductive region, a first conductive plug formed on the dielectric layer, a second conductive plug formed on another portion of the conductive region, a first conductive member formed over the first conductive plug, and a second conductive member formed over the second conductive plug. The dielectric layer has a first dielectric portion extending in a second direction, and a second dielectric portion extending in the first direction, in which the dielectric layer implements an electrical isolation between the conductive region and the first conductive plug. The first conductive plug has a first region of a first width and a second region of a second width, and the first width is greater than the second width. |
| US11121079B2 |
Fan-out semiconductor package
A fan-out semiconductor package includes a first connection structure having first and second surfaces, a first semiconductor chip disposed on the first surface, a first encapsulant disposed on the first surface and covering at least a portion of the first semiconductor chip, a second semiconductor chip disposed on the second surface, one or more first metal members disposed on the second surface, one or more second metal members disposed on the second surface, a second encapsulant disposed on the second surface and respectively covering at least portions of the second semiconductor chip and the first and second metal members, and a second connection structure disposed on an opposite side of a side of the second encapsulant, on which the first connection structure is disposed. |
| US11121076B2 |
Semiconductor die with conversion coating
A die includes a semiconductor layer, an electrical contact on a first side of the semiconductor layer, a backside electrical contact layer on second side of the semiconductor layer. The die further includes a zinc layer over at least one of the electrical contact or the backside electrical contact layer of the die, and a conversion coating over the zinc layer. The conversion coating includes at least one of zirconium and vanadium. As part of an embedded die package including the die, at least a portion of the conversion coating may adjacent to an electrically insulating substrate of the embedded die package. |
| US11121075B2 |
Hybrid metallization interconnects for power distribution and signaling
Aspects of the disclosure are directed to an integrated circuit. The integrated circuit may include a signaling interconnect having a narrow trench disposed within a metallization layer, and a power rail having a wide trench disposed within the metallization layer, wherein the signaling interconnect comprises non-copper material and the power rail comprises copper. The non-copper material may include at least one of ruthenium (Ru), tungsten (W), aluminum (Al), and cobalt (Co). The signaling interconnect and power rail may be processed in a common chemical mechanical polishing step and have approximately the same trench depth. A metal cap may be deposited on top of the power rail. |
| US11121060B2 |
Electronics assemblies and cooling structures having metalized exterior surface
An electronics assembly includes a semiconductor device having a first device surface and at least one device conductive layer disposed directly thereon. A cooling structure coupled to the semiconductor device includes a manifold layer, a microchannel layer bonded to the manifold layer, at least one planar side cooling structure, and one or more cooling structure conductive layers. The manifold layer includes a fluid inlet and a fluid outlet and defines a first cooling structure surface. The microchannel layer comprises at least one microchannel fluidly coupled to the fluid inlet and the fluid outlet and defines a second cooling structure surface opposite from the first cooling structure surface. The planar side cooling structure surface is transverse to the first and the second cooling structure surfaces. The cooling structure conductive layers are disposed directly on the first cooling structure surface, the second cooling structure surface, and the planar side cooling structure surface. |
| US11121056B2 |
Semiconductor device and manufacturing method of the same
A semiconductor device includes a semiconductive substrate, a dielectric stack disposed over the semiconductive substrate, a probe pad formed on the dielectric stack, a test key embedded in the semiconductor device and a single via string stacking extending along a direction from a level of the probe pad to the semiconductive substrate and electrically connecting the periphery of the probe pad to the test key. A semiconductor device includes a semiconductive substrate, a dielectric stack, a probe pad, a test key, an extension segment electrically connected to the periphery of the probe pad and laterally extending from the probe pad from a top view, and a single via string stacking extending along a direction from the probe pad to the semiconductive substrate and electrically connecting the extension segment to the test key. The single via string stacking and the probe pad are laterally offset from a top view. |
| US11121055B2 |
Leadframe spacer for double-sided power module
A semiconductor device module may include a leadframe spacer that provides the functions of both a leadframe and a spacer, while enabling a double-sided cooling configuration. Such a leadframe spacer may include a leadframe surface that provides a die attach pad (DAP) that is shared by at least two semiconductor devices. The leadframe spacer may include at least one downset, where the semiconductor devices may be attached within a recess defined by the at least one downset. A first substrate may be connected to a first side of the leadframe. A second substrate may be connected to downset surfaces of the at least one downset, and positioned for further connection to the semiconductor devices in a double-sided assembly. |
| US11121052B2 |
Integrated fan-out device, 3D-IC system, and method
A three dimensional integrated circuit (3D-IC) module socket system includes an integrated Fan-Out (InFO) adapter having one or more integrated passive devices (IPDs) embedded in the InFO adapter. The InFO adapter is also integrated into the 3D-IC module socket system by stacking the InFO adapter between a socket and a SoW package. The InFO adapter with embedded IPDs allows for more planar area of the SoW package to be available for interfacing the socket and provides a short distance between the embedded IPDs and computing dies of the SoW package which enhances a power distribution network (PDN) performance and improves current handling of the 3D-IC module socket system. |
| US11121050B2 |
Method of manufacture of a semiconductor device
In order to prevent cracks from occurring at the corners of semiconductor dies after the semiconductor dies have been bonded to other substrates, an opening is formed adjacent to the corners of the semiconductor dies, and the openings are filled and overfilled with a buffer material that has physical properties that are between the physical properties of the semiconductor die and an underfill material that is placed adjacent to the buffer material. |
| US11121048B1 |
System and method for a device package
A packaged power device includes a ceramic package body having a top drain pad having a first area, a top source pad having a second area smaller than the first area, and a top gate pad having a third area smaller than the second area; a power device having a bottom surface affixed to a top drain pad, a die source pad coupled to the top source pad, and a die gate pad coupled to the top gate pad; and a ceramic lid affixed to the ceramic package body to form the packaged power device. |
| US11121047B2 |
Semiconductor structure
A semiconductor structure includes a substrate, a device, a contact via, a metal/dielectric layer, and a test structure. The device is over the substrate. The contact via is connected to the device. The metal/dielectric layer is over the contact via. The metal/dielectric layer includes a first portion and a second portion. The first portion of the metal/dielectric layer has a metallization pattern connected to the contact via. The second portion of the metal/dielectric layer is void of metal. The test structure is over the second portion of the metal/dielectric layer. |
| US11121044B2 |
Vertically stacked nanosheet CMOS transistor
Embodiments of the present invention are directed to techniques for generating vertically stacked nanosheet CMOS (Complementary Metal Oxide Semiconductor) transistor architectures. In a non-limiting embodiment of the invention, a first rare earth oxide layer is formed over a substrate. An n-FET nanosheet stack is formed on the rare earth oxide layer. The n-FET nanosheet stack includes a first nanosheet. A second rare earth oxide layer is formed on the n-FET nanosheet stack. A p-FET nanosheet stack is formed on the second rare earth oxide layer. The p-FET nanosheet stack includes a second nanosheet. |
| US11121041B2 |
Methods for threshold voltage tuning and structure formed thereby
Generally, the present disclosure provides example embodiments relating to tuning threshold voltages in transistor devices and the transistor devices formed thereby. Various examples implementing various mechanisms for tuning threshold voltages are described. In an example method, a gate dielectric layer is deposited over an active area in a device region of a substrate. A dipole layer is deposited over the gate dielectric layer in the device region. A dipole dopant species is diffused from the dipole layer into the gate dielectric layer in the device region. |
| US11121035B2 |
Semiconductor substrate processing methods
Implementations of a method of forming a plurality of semiconductor devices on a semiconductor substrate may include: providing a semiconductor substrate having a first surface, a second surface, a size, and a thickness where the second surface opposes the first surface and the thickness is between the first surface and the second surface. The method may include processing the semiconductor substrate through a plurality of semiconductor device fabrication processes to form a plurality of semiconductor devices on the first surface. The thickness may be between 100 microns and 575 microns and the size may be 150 mm. The semiconductor substrate may not be coupled with a carrier or support. |
| US11121031B2 |
Manufacturing method of chip package and chip package
A manufacturing method of a chip package includes patterning a wafer to form a scribe trench, in which a light-transmissive function layer below the wafer is in the scribe trench, the light-transmissive function layer is between the wafer and a carrier, and a first included angle is formed between an outer wall surface and a surface of the wafer facing the light-transmissive function layer; cutting the light-transmissive function layer and the carrier along the scribe trench to form a chip package that includes a chip, the light-transmissive function layer, and the carrier; and patterning the chip to form an opening, in which the light-transmissive function layer is in the opening, a second included angle is formed between an inner wall surface of the chip and a surface of the chip facing the light-transmissive function layer, and is different from the first included angle. |
| US11121030B2 |
Transistors employing carbon-based etch stop layer for preserving source/drain material during contact trench etch
Techniques are disclosed for forming transistors employing a carbon-based etch stop layer (ESL) for preserving source and drain (S/D) material during contact trench etch processing. As can be understood based on this disclosure, carbon-based layers can provide increased resistance for etch processing, such that employing a carbon-based ESL on S/D material can preserve that S/D material during contact trench etch processing. This is due to carbon-based layers being able to provide more robust (e.g., more selective) etch selectivity during contact trench etch processing than the S/D material it is preserving (e.g., Si, SiGe, Ge, group III-V semiconductor material) and other etch stop layers (e.g., insulator material-based etch stop layers). Employing a carbon-based ESL enables a given S/D region to protrude from shallow trench isolation (STI) material prior to contact metal deposition, thereby providing more surface area for making contact to the given S/D region, which improves transistor performance. |
| US11121029B2 |
Semiconductor device with air spacer and method for preparing the same
The present disclosure provides a semiconductor device and a method for preparing the semiconductor device. The method includes forming a first conductive layer over a substrate, forming a first dielectric structure over the first conductive layer, transforming a sidewall portion of the first conductive layer into a first transformed portion, removing the first transformed portion such that a width of the first dielectric structure is greater than a width of a remaining portion of the first conductive layer, and forming an inter-layer dielectric (ILD) layer covering sidewalls of the first dielectric structure such that a first air spacer is formed between the ILD layer and the remaining portion of the first conductive layer. |
| US11121024B2 |
Tunable hardmask for overlayer metrology contrast
A tunable amorphous silicon layer for use with multilayer patterning stacks can be used to maximize transparency and minimize reflections so as to improve overlay metrology contrast. By increasing the hydrogen content in the amorphous silicon layer, the extinction coefficient (k) value and the refractive index (n) value can be decreased to desired values. Methods for improving overlay metrology contrast with the tunable amorphous silicon layer are disclosed. |
| US11121021B2 |
3D semiconductor device and structure
A 3D semiconductor device, including: a first level including a single crystal layer, a plurality of first transistors, and a first metal layer, forming memory control circuits; a second level overlaying the single crystal layer, and including a plurality of second transistors and a plurality of first memory cells; a third level overlaying the second level, and including a plurality of third transistors and a plurality of second memory cells; where the second transistors are aligned to the first transistors with less than 40 nm alignment error, where the memory cells include a NAND non-volatile memory type, where some of the memory control circuits can control at least one of the memory cells, and where some of the memory control circuits are designed to perform a verify read after a write pulse so to detect if the at least one of the memory cells has been successfully written. |
| US11121020B2 |
Support, adhesive sheet, laminated structure, semiconductor device, and method for manufacturing printed wiring board
A method for manufacturing a printed wiring board which includes: Step (A) of laminating an adhesive sheet including a support and a resin composition layer bonded to the support to an inner layer board so that the resin composition layer is bonded to the inner layer board; Step (B) of thermally curing the resin composition layer to form an insulating layer; and Step (C) of removing the support, in this order, in which the support satisfies a condition (MD1): a maximum expansion coefficient EMD in an MD direction at 120° C. or more is less than 0.2% and a condition (TD1): a maximum expansion coefficient ETD in a TD direction at 120° C. or more is less than 0.2% below, when being heated under predetermined heating conditions, does not lower the yield even when the insulating layer is formed by thermally curing the resin composition layer with a support attached to the resin composition layer. |
| US11121018B2 |
Method and apparatus for lithography in semiconductor fabrication
A reticle holding tool is provided. The reticle holding tool includes a housing, a reticle chuck, and a gas delivery assembly. The housing includes an opening, a top housing member, and a lateral housing member extending from the top housing member and terminating at a lower edge which is located on a predetermined plane. The reticle chuck is positioned in the housing and has an effective surface configured to secure a reticle. The effective surface is located between the predetermined plane and the top housing member. The reticle chuck is movable between two boundary lines that are perpendicular to the effective surface. A width of the opening is greater than a distance between the two boundary lines. The gas delivery assembly is positioned within the housing and configured to supply gas into the housing. |
| US11121012B2 |
Substrate cleaning apparatus and cleaning method using the same
A substrate cleaning method includes: sequentially loading each of a plurality of substrates, one substrate substantially immediately after a preceding substrate, into an input unit, in which adjacent substrates of the plurality of substrates are spaced apart from each other by a predetermined first interval; sequentially transferring each of the plurality of substrates in which adjacent substrates of the plurality of substrates are separated by a predetermined second interval that is greater than the predetermined first interval; cleaning each of the plurality of substrates in a cleaning unit; and aligning, in an output unit, adjacent substrates to be separated by the predetermined first interval. |
| US11121007B2 |
Apparatus for supplying chemical liquid
An apparatus for supplying chemical liquid may include a chemical liquid discharging member, a reservoir, a chemical liquid supplying member and a chemical liquid circulating member. The chemical liquid discharging member may discharge a chemical liquid onto a substrate. The reservoir may store the chemical liquid supplied to the chemical liquid discharging member. The chemical liquid supplying member may supply the chemical liquid stored in the reservoir. The chemical liquid circulating member may circulate the chemical liquid from the chemical liquid discharging member to the reservoir. |
| US11121004B2 |
Semiconductor module and method for producing the same
A method for producing a power semiconductor module arrangement includes forming a pre-layer by depositing inorganic filler on a first surface within a housing, the inorganic filler being impermeable to corrosive gases. The method further includes filling casting material into the housing to fill spaces present in the inorganic filler of the pre-layer with the casting material, and hardening the casting material to form a first layer. |
| US11121002B2 |
Systems and methods for etching metals and metal derivatives
Exemplary etching methods may include flowing a halogen-containing precursor into a substrate processing region of a semiconductor processing chamber. The methods may include contacting a substrate housed in the substrate processing region with the halogen-containing precursor. The substrate may define an exposed region of a transition-metal-containing material. The methods may also include removing the transition-metal-containing material. The flowing and the contacting may be plasma-free operations. |
| US11121001B2 |
Method of etching, device manufacturing method, and plasma processing apparatus
In a disclosed method, etching a film by using plasma of a first processing gas and etching the film by using plasma of a second processing gas are alternately repeated. The first processing gas and the second processing gas each include a fluorocarbon gas. In etching the film by using the plasma of the first processing gas and etching the film by using the plasma of the second processing gas, radio frequency power is used to attract ions to the substrate. The first processing gas further includes an additive gas that is a source for nitrogen or sulfur and fluorine. In the first processing gas, the flow rate of the additive gas is smaller than the flow rate of the fluorocarbon gas. |
| US11121000B2 |
Etching method and substrate processing apparatus
There is provision of a method for etching a substrate above which a first underlying film, a second underlying film positioned deeper than the first underlying film, a silicon oxide film formed on the first and second underlying films, and a mask on the silicon oxide film are provided. In the mask, first and second openings are formed above the first and second underlying films respectively. After the first underlying film is exposed by etching the silicon oxide film using a first gas, the silicon oxide film is etched by using a second gas while depositing deposits on the first underlying film, and the silicon oxide film is etched by using a third gas while removing the deposits on the first underlying film. The etching using the second gas and the etching using the third gas are repeated multiple times. |
| US11120993B2 |
Diffusing agent composition and method of manufacturing semiconductor substrate
A diffusing agent composition that can form a coating film in which the unevenness thereof is lowered, which is uniform and which has excellent stability, and a method of manufacturing a semiconductor substrate in which an impurity diffusing component is diffused into the semiconductor substrate from the coating film formed of the diffusing agent composition. An aliphatic amine which satisfies predetermined conditions is contained as an aliphatic amine compound in a diffusing agent composition including an impurity diffusing component. When the number of primary amino groups included in the amine compound is NA, the number of secondary amino groups included in the compound is NB, and the number of tertiary amino groups included in the amine compound is NC, NA, NB and NC satisfy predetermined formulas. |
| US11120991B2 |
Lateral semiconductor nanotube with hexagonal shape
A method of forming a semiconductor structure includes forming one or more fins disposed on a substrate, rounding surfaces of the one or more fins, forming faceted sidewalk from the rounded surfaces of the one or more fins, and forming a lateral semiconductor nanotube shell on the faceted sidewalk. The lateral semiconductor nanotube shell comprises a hexagonal shape. |
| US11120989B2 |
Systems and methods for UV-based suppression of plasma instability
A substrate is positioned in exposure to a plasma generation region within a plasma processing chamber. A first plasma is generated within the plasma generation region. The first plasma is configured to cause deposition of a film on the substrate until the film deposited on the substrate reaches a threshold film thickness. The substrate is then exposed to ultraviolet radiation to resolve defects within the film deposited on the substrate. The ultraviolet radiation can be supplied in-situ using either a second plasma configured to generate ultraviolet radiation or an ultraviolet irradiation device disposed in exposure to the plasma generation region. The ultraviolet radiation can also be supplied ex-situ by moving the substrate to an ultraviolet irradiation device separate from the plasma processing chamber. The substrate can be exposed to the ultraviolet radiation in a repeated manner to resolve defects within the deposited film as the film thickness increases. |
| US11120987B2 |
Nonstoichiometric structures with multiple controlled bandgap energy levels and methods thereof
A method and resulting structure that includes depositing two or more elements on a substrate. A rate of one of the two or more elements provided during the depositing is restricted to target where one or more energy levels are set within a bandgap of a nonstoichiometric structure generated by the depositing. The generated nonstoichiometric bandgap structure with the one or more set energy levels within the bandgap is provided. |
| US11120981B2 |
Laser desorption/ionization method and mass spectrometry method
A laser desorption/ionization method includes: a first process of preparing a sample support body that includes a substrate in which a plurality of through-holes are formed and a conductive layer that is provided on the first surface of the substrate; a second process of mounting a frozen sample on a mounting surface of a mount under a sub-freezing atmosphere, and fixing the sample support body to the mount in a state in which the second surface is in contact with the frozen sample; a third process of thawing the sample, and moving components of the thawed sample toward the first surface via the plurality of through-holes due to a capillary phenomenon; and a fourth process of irradiating the first surface with a laser beam while applying a voltage to the conductive layer, and ionizing the components that have moved toward the first surface. |
| US11120976B2 |
Apparatus and methods for removing contaminant particles in a plasma process
A method and apparatus for operating a plasma processing chamber includes performing a plasma process at a process pressure and a pressure power to generate a plasma. A first ramping-down stage starts in which the process power and the process pressure are ramped down substantially simultaneously to an intermediate power level and an intermediate pressure level, respectively. The intermediate power level and intermediate pressure level are preselected so as to raise a plasma sheath boundary above a threshold height from a surface of a substrate. A purge gas is flowed from a showerhead assembly at a sufficiently high rate to sweep away contaminant particles trapped in the plasma such that one or more contaminant particles move outwardly of an edge of the substrate. A second ramping-down stage starts where the intermediate power level and the intermediate pressure level decline to a zero level and a base pressure, respectively. |
| US11120974B2 |
Semiconductor device
A dry etching apparatus includes a process chamber, a stage, a gas supply device and a plasma generating device. The stage is in the process chamber and is configured to support a wafer, wherein the wafer has a center region and a periphery region surrounding the center region. The gas supply device is configured to supply a first flow of an etching gas to the center region and supply a second flow of the etching gas to the periphery region. The plasma generating device is configured to generate plasma from the etching gas. |
| US11120973B2 |
Plasma processing apparatus and techniques
An apparatus may include a main chamber, a substrate holder, disposed in a lower region of the main chamber, and defining a substrate region, as well as an RF applicator, disposed adjacent an upper region of the main chamber, to generate an upper plasma within the upper region. The apparatus may further include a central chamber structure, disposed in a central portion of the main chamber, where the central chamber structure is disposed to shield at least a portion of the substrate position from the upper plasma. The apparatus may include a bias source, electrically coupled between the central chamber structure and the substrate holder, to generate a glow discharge plasma in the central portion of the main chamber, wherein the substrate region faces the glow discharge region. |
| US11120971B2 |
Diagnostics for impedance matching network
In one embodiment, the present disclosure is directed to a method for performing diagnostics on a matching network that utilizes an electronically variable capacitor (EVC). According to the method, all the discrete capacitors of the EVC are switched out. At a first node, a parameter associated with a current flowing between a power supply and one or more of the switches of the discrete capacitors is measured. The method then switches in, one at a time, each discrete capacitor of the EVC. Upon the switching in of each discrete capacitor, the method remeasures the parameter at the first node and determines whether a change to the parameter at the first node is within a predetermined range to determine whether the corresponding switch, driver circuit, or filter of the discrete capacitor most recently switch in has failed. |
| US11120967B2 |
Charged particle beam apparatus and sample observation method using superimposed comparison image display
In the case of an in situ observation with a charged particle beam apparatus, an observer who is not an expert in the charged particle beam apparatus needs to maintain the field of view of the observation that changes from moment to moment while watching a monitor, and thus, adjustment of the field of view needs to be controllable in real time with a good operability. In order to eliminate the need for an observer to move the line of sight, a live image and a comparison image are overlapped and displayed. At this time, an interface is devised, such that overlapping of two images can be executed without giving stress to the observer. The observer presses a button on an operation screen, thereby displaying a superimposed image, which is obtained by making the comparison image matching the size of a first display area configured to display the live image translucent and superimposing the translucent comparison image on the live image, at the position of the first display area of the image display device. |
| US11120966B2 |
System and method for improved beam current from an ion source
An IHC ion source that employs a negatively biased cathode and one or more side electrodes is disclosed. The one or more side electrodes are biased using an electrode power supply, which supplies a voltage of between 0 and −50 volts, relative to the chamber. By adjusting the output from the electrode power supply, beam current can be optimized for different species. For example, certain species, such as arsenic, may be optimized when the side electrodes are at the same voltage as the chamber. Other species, such as boron, may be optimized when the side electrodes are at a negative voltage relative to the chamber. In certain embodiments, a controller is in communication with the electrode power supply so as to control the output of the electrode power supply, based on the desired feed gas. |
| US11120965B2 |
Beam blanking device for a multi-beamlet charged particle beam apparatus
A beam blanking device for a multi-beamlet charged particle beam apparatus is provided. The beam blanking device includes a first blanking unit, a second blanking unit and a third blanking unit. The first blanking unit includes a first blanking electrode and a first aperture. The second blanking unit includes a second blanking electrode and a second aperture. The third blanking unit includes a third blanking electrode and a third aperture. The beam blanking device includes a common electrode forming a first counter electrode for the first blanking electrode, a second counter electrode for the second blanking electrode and a third counter electrode for the third blanking electrode. The first blanking unit, the second blanking unit and the third blanking unit are arranged in a planar array and define a plane of the planar array. The first blanking electrode is arranged for generating a first electric field between the first blanking electrode and the common electrode in the first aperture for deflecting a first beamlet of the multi-beamlet charged particle beam apparatus into a first deflection direction. The second blanking electrode is arranged for generating a second electric field between the second blanking electrode and the common electrode in the second aperture for deflecting a second beamlet of the multi-beamlet charged particle beam apparatus into a second deflection direction. The third blanking electrode is arranged for generating a third electric field between the third blanking electrode and the common electrode in the third aperture for deflecting a third beamlet of the multi-beamlet charged particle beam apparatus into a third deflection direction. A dividing plane intersecting the planar array separates the first blanking unit from the second blanking unit and the third blanking unit, wherein the first deflection direction, the second deflection direction and the third deflection direction point away from the dividing plane. |
| US11120959B2 |
System and method for quick and low noise relay switching operation
A hybrid relay (1) comprises an electromechanical part (10) with a movable contact (103), a solid state relay (11) and a control unit (2) for applying a drive signal (S′,S″) to the drivable coil (101) of the electromechanical part. A method for operating the hybrid relay comprises steps of determining a first minimum voltage (V1) for the drive signal above which the movable contact (103) starts to move away from an open position (Po) and a second minimum voltage (V2) for the drive signal above which the movable contact (103) reaches the closed position (Pc), and a step of shaping a waveform (W) for the drive signal comprising a portion (W1) consisting of a vertical segment jumping from zero to the first minimum voltage value, a portion (W2) wherein the voltage gradually increases from the first minimum value to the second minimum voltage value, and a portion (W3) consisting of another vertical segment jumping from the second minimum voltage value to an upper voltage boundary (Vsup). |
| US11120958B2 |
Relay holding circuit and battery management system
The embodiments of the present disclosure disclose a relay holding circuit and a battery management system. the relay holding circuit may include: a high-voltage isolated power source, a power source driving module, and a microprocessor of a battery management system; the high-voltage isolated power source may be respectively connected to two electrodes of a battery pack, an output terminal of the power source driving module, the microprocessor, and a first terminal of a first switching device; an input terminal of the power source driving module may be connected to the microprocessor; the microprocessor may be further connected to a primary battery, the microprocessor may output a low-level signal to the power source driving module when the primary battery supplies power abnormally. |
| US11120954B2 |
Integrated switch
An integrated switch is provided in the present application, comprising: a housing; a first circuit board, arranged in the housing; a movable stand, movably connected in the housing; a contact component; a second circuit board, arranged in the housing and connected with an inner wall thereof, and electrically connected with the first circuit board; an electric brush, arranged between the movable stand and the second circuit board, having one end connected with the movable stand and the other end slidably connected with the second circuit board, driven by the movable stand, the electric brush has a connection state after sliding to a first position of the second circuit board, and a disconnection state after sliding to a second position of the second circuit board, and the moving contact shifts from a power-on state to a power-off state after the electric brush slides to the disconnection state. |
| US11120951B2 |
Electrode foil, winding capacitor, electrode foil manufacturing method, and winding capacitor manufacturing method
An electrode foil that progresses an enlargement of the surface area of a dielectric film and that barely causes cracks at the time of winding, a winding capacitor obtained by winding the electrode foil, an electrode foil manufacturing method, and a winding capacitor manufacturing method are provided. An electrode foil 1 is formed of a belt-like foil, and has a surface enlarged part 3, a core part 2, and a plurality of separation parts 4. The surface enlarged part 3 is formed on the surface of the foil, and the core part 2 is a part remained when excluding the surface enlarged part 3 within the foil. The separation part 4 extends on the surface enlarged part 3, dividing the surface enlarged part 3. The plurality of separation parts 4 share bending stress when the electrode foil 1 is wound, preventing concentration of stress. |
| US11120948B2 |
Electrolyte for aluminum electrolytic capacitor and aluminum electrolytic capacitor using electrolyte
An electrolyte for an aluminum electrolysis capacitor and the aluminum electrolysis capacitor using the electrolyte are provided. The electrolyte comprises a primary solute, a primary solvent, and an additive as shown in a structural formula 1, wherein, R1 and R2 are each independently selected from —CH3, —CH2CH3 or —OH; R3 and R4 are each in selected from —(CH2CH2O)mH or —H, and n and m are integrals ranging from 1 to 10000, respectively. The electrolyte has excellent anti-corrosive performance and is capable of maintaining long load service life under the condition of relatively high chlorine ion content, and there is no evidence of corrosion in the capacitor after it is disassembled. |
| US11120946B2 |
Micro-electronic electrode assembly
A micro-electronic electrode assembly having a first electrode arranged on a substrate is provided, wherein the first electrode has a thin layer made of a first electrode material having a solid state lattice, wherein the first electrode material oxidizes upon contact with oxygen-containing compounds and has a perovskite or perovskite-derived crystal structure, and wherein the electrode has a functional surface facing away from the substrate, a separation layer is arranged on the functional surface of the electrode, which prevents an oxidation of the electrode material in the region of the functional surface, the oxidation changing the properties of the electrode. An electrically insulating functional layer is arranged on the separation layer and a second electrode is arranged on the electrically insulating functional layer. According to the invention, advantageously the first electrode material has one of the compounds SrMoO3, SrMoO3-aNa BaMoO3, SrVO3, Of Sr2MoO4, and the separation layer has one of the compounds SeTiO3, DyScO3, GdScO3 or SrHfO3. The functional layer is a compound with the molecular formula BaxSr1−xTi1±yO3±z, preferably Ba0.5Sr0.5TiO3. The electrode assembly forms a varactor. |
| US11120938B2 |
Current transformer apparatus that is mountable to a circuit board
A current transformer apparatus is configured to enable it to be electrically connected with and physically mounted to a circuit board. The current transformer apparatus includes a support upon which a coil is situated and upon which a plurality of approximately U-shaped electrical connectors are also situated. The electrical connectors each include an electrical contact that is biased toward a reaction structure. A circuit board is received between the electrical contact and the reaction structure, and the bias between the electrical contact and the reaction structure mounts current transformer apparatus to the circuit board and provides an electrical connection therebetween. |
| US11120930B2 |
Method for manufacturing high-sensitivity piezoresistive sensor using multi-level structure design
The present invention discloses a method for manufacturing a high-sensitivity piezoresistive sensor using a multi-level structure design, including the following steps: forming first-level basic geometrical units formed of basic structural units on a substrate, where each first-level basic geometrical unit is a two-dimensional or three-dimensional network structure formed by stacking several basic structural units; stacking and combining several first-level basic geometrical units in an array to form a second-level geometrical structure, and forming a contact connection area located between adjacent first-level basic geometrical units; and dispensing a conductive adhesive in at least two positions on the substrate to form electrodes of a piezoresistive sensor, so as to obtain the piezoresistive sensor. A high-sensitivity piezoresistive sensor obtained by using the method of the present invention has flexible design and simple fabrication, can be desirably combined with various existing sensor fabrication methods, and has general applicability. |
| US11120924B2 |
Cable and a combined cable
A cable includes a pair of wires each having a conductor and a wire insulation layer wrapped around the conductor, an inner insulation layer wrapped around the wire insulation layer of each of the wires and fixing the wires, a metal shielding layer wrapped around an outer surface of the inner insulation layer, and an outer insulation layer wrapped around an outer surface of the metal shielding layer. The metal shielding layer has an insulating substrate and a metal conductive layer coated on the insulating substrate. The metal conductive layer of the metal shielding layer faces the outer insulation layer. |
| US11120921B2 |
In-containment spent fuel storage to limit spent fuel pool water makeup
A method and apparatus for extending the period a nuclear steam supply system spent fuel pool can be safely passively cooled by storing the spent fuel offloaded from the reactor, in the containment for one reactor operating cycle. During a refueling the spent fuel that is not to be returned to the reactor and the spent fuel that will be returned to the reactor are stored separately in shielded locations within the containment. After one operating cycle, the spent fuel stored within the containment that was not returned to the reactor just prior to the last operating cycle, is offloaded to the spent fuel pool and replaced by the newly offloaded spent fuel that is being retired. |
| US11120918B2 |
Nuclear fuel assembly debris filtering bottom nozzle
A base portion for use in a bottom nozzle of a fuel assembly in a nuclear reactor includes a top surface, a bottom surface, and a plurality of vertical wall portions arranged in a generally squared grid-like pattern which extend between the bottom surface and the top surface and which define a plurality of non-circular passages passing between the bottom surface and the top surface through the base portion. |
| US11120915B2 |
Evidence analysis and presentation to indicate reasons for membership in populations
A method, a machine-readable storage medium and at least one processing device are provided for analyzing and tracking results of multiple conditions associated with a population criteria, which is evaluated for each entity of at least one entity. The at least one processing device performs analytics associated with the population criteria, which is evaluated for each entity. Results of the analyzing of the multiple conditions are selectively tracked by the at least one processing device. The at least one processing device presents the tracked results to indicate a status of the at least one entity with respect to the tracked analytics. |
| US11120914B2 |
Evaluating drug-adverse event causality based on an integration of heterogeneous drug safety causality models
Mechanisms are provided that implement a plurality of heterogeneous causality models and a metaclassifier for predicting a likelihood of causality between a drug and an adverse event (AE). The plurality of heterogenous causality models process drug information for the drug to generate a plurality of risk predictions for a drug and AE pair. The risk predictions include at least one of a risk score or a risk label indicating a probability of the AE occurring with use of the drug. The plurality of heterogenous causality models provide the risk predictions, associated with the drug and AE pair, to a metaclassifier which generates a single causality score value indicative of a probability of causality between the drug and the AE, of the drug and AE pair, based on an aggregation of the risk predictions from the plurality of heterogenous causality models. The metaclassifier outputs the single causality score value in association with information identifying the drug and AE pair. |
| US11120909B2 |
Smartphone-controlled active configuration of footwear, including with concavely rounded soles
A smartphone or other mobile computer device, general purpose or specialized, wherein the smartphone device is configured to actively control the configuration of one or more bladders, compartments, chambers or internal sipes and one or more sensors located in either one or both of a sole or a removable inner sole insert of the footwear of the user and/or located in an apparatus worn or carried by the user, glued unto the user, or implanted in the user. The one or more bladders, compartments, chambers, or sipes, and one or more sensors are configured for computer control. A sole and/or a removable inner sole insert for footwear, including one or more bladders, compartments, chambers, internal sipes and sensors in the sole and/or in a removable insert; or on an insole; all being configured for control by a smartphone or other mobile computer device, general purpose or specialized. |
| US11120908B2 |
Data storage and retrieval system for non-contiguous medical device operational data
A web-based interface enables medical personnel to remotely monitor medical devices. A monitoring system records operational data and alarms from the medical devices in a file. However, since network connections between the medical devices and the monitoring system are intermittent, the file does not contain a contiguous stream of data for each medical device. The file pauses recording during gaps in network connectivity. The system displays current data, as well as a list of alarms. If medical personnel wish to view more detail about an earlier time or one of the alarms, the system calculates where in the file the medical device data was recorded. This calculation accounts for the discontiguous nature of the data. The system uses times the network connection is made and broken to calculate an index into the file that corresponds to the time of the user-selected alarm. |
| US11120904B2 |
Imaging modality maintenance smart dispatch systems and methods
Methods, apparatus, systems and articles of manufacture are disclosed. An example apparatus includes a technician selector to: identify at least one of a skill level, tools list, or replacement part list to fix a problem based on an identified problem corresponding to a service request from an imaging device; and access resources from a database of resources available to service the imaging device; a multiplier to weight resources based on at least one of the skill level, possessed tools in comparison to the tools list, possessed replacement parts in comparison to the replacement part list, distance to service location, or availability; and an interface to transmit the service request using a wireless communication to a repair device of the highest weighed resource, the service request to be augmented to include a configuration for the repair device to facilitate addressing of the service request by the highest weighted resource. |
| US11120898B1 |
Flexible encounter tracking systems and methods
Embodiments include a customizable encounter document whose contents are populated based on a template for the current patient, a template for all the user's patients, or a combination of templates. The contents include data modules retrieved from various databases and are arranged according to the user's work flow. The contents are presented in one view, a scrollable pane, to assist the user when making medical decisions. The user can make changes to the contents on the scrollable pane in real time that may affect one or more of the templates. Once the customizable encounter document is signed, the contents are captured, de-identified, and saved, along with a link of the captured contents with the user, and/or the patient's EHR. |
| US11120895B2 |
Systems and methods for mental health assessment
The present disclosure provides systems and methods for assessing a mental state of a subject in a single session or over multiple different sessions, using for example an automated module to present and/or formulate at least one query based in part on one or more target mental states to be assessed. The query may be configured to elicit at least one response from the subject. The query may be transmitted in an audio, visual, and/or textual format to the subject to elicit the response. Data comprising the response from the subject can be received. The data can be processed using one or more individual, joint, or fused models. One or more assessments of the mental state associated with the subject can be generated for the single session, for each of the multiple different sessions, or upon completion of one or more sessions of the multiple different sessions. |
| US11120887B2 |
Method for writing in a volatile memory and corresponding integrated circuit
An embodiment method for writing to a volatile memory comprises at least receiving a request to write to the memory, and, in response to each request to write to the memory: preparation of data to be written to the memory, this comprising computing an error correction code; storing in a buffer register the data to be written to the memory; and, if no new request to write to or to read from the memory is received after the storage, writing to the memory of the data to be written stored in the buffer register. |
| US11120885B2 |
Using a status indicator in a memory sub-system to detect an event
An indication of an initialization of power to a memory device is received. Responsive to receiving the indication of the initialization of power to the memory device, whether a status indicator associated with a written page of the memory device can be read is determined. Responsive to determining that the status indicator cannot be read, a programming of data to the memory device did not complete based on a prior loss of power to the memory device is determined. |
| US11120884B2 |
Implementing logic function and generating analog signals using NOR memory strings
NOR memory strings may be used for implementations of logic functions involving many Boolean variables, or to generate analog signals whose magnitudes are each representative of the bit values of many Boolean variables. The advantage of using NOR memory strings in these manners is that the logic function or analog signal generation may be accomplished within one simultaneous read operation on the NOR memory strings. |
| US11120883B2 |
Semiconductor storage device
A semiconductor storage device includes a first semiconductor extending above a substrate and including a first part and a second part, a first word line at a first level above the substrate and facing the first part of the first semiconductor, a second word line at the first level above the substrate and facing the second part of the first semiconductor, a first cell transistor including a first area of the first part of the first semiconductor that faces the first word line, and a second cell transistor including a second area of the second part of the first semiconductor that faces the second word line, wherein during an operation of reading data from the first cell transistor, a first voltage that is less than a threshold voltage of the second cell transistor and greater than or equal to zero voltage is applied to the second word line. |
| US11120882B2 |
Error recovery of data in non-volatile memory during read
A method of optimizing a read threshold voltage shift value for non-volatile memory units organized as memory pages may be provided. An ECC check is performed for active page reads. The method comprises, as part of the read operation, determining a status of the memory page, and reading a memory page with a current threshold voltage shift (TVS) value. Additionally, the method comprises, upon determining that a read memory page command passed an ECC check, returning corrected data read, and upon determining that the read memory page did not pass the ECC check, adjusting the current TVS value based on the status of the memory page to be read. Furthermore, the method comprises, while the read memory pages continues to not pass the ECC check, repeating the adjusting the current TVS value and the determining that the read memory page passes ECC check until a stop condition is met. |
| US11120880B1 |
Command sequence for hybrid erase mode for high data retention in memory device
Apparatuses and techniques are described for performing an erase operation for a set of memory cells, where the erase operation includes an all word line erase phase to save time followed by an odd-even word line erase phase to improve data retention. A transition to the odd-even word line erase phase can be triggered when the memory cells pass a first verify test which indicates that the threshold voltages of the memory cells have decreased below a first voltage. Or, the transition can be triggered when a threshold number of erase-verify iterations have been performed. The erase operation may be completed when the memory cells pass a second verify test which indicates that the threshold voltages of the memory cells have decreased below a second voltage which is less than the first voltage. |
| US11120878B2 |
Method for writing in EEPROM memory and corresponding integrated circuit
A method for programming a non-volatile memory (NVM) and an integrated circuit is disclosed. In an embodiment an integrated circuit includes a memory plane organized into rows and columns of memory words, each memory word comprising memory cells and each memory cell including a state transistor having a control gate and a floating gate and write circuitry configured to program a selected memory word during a programming phase by applying a first nonzero positive voltage to control gates of the state transistors of the memory cells that do not belong to the selected memory word. |
| US11120874B2 |
Electronic memory device and a method of manipulating the electronic memory device
An electronic memory device and a method of manipulating the electronic memory device. The electronic memory device includes a plurality of basic memory blocks connected together with a modular structure, wherein each of the basic memory blocks includes a plurality lookup tables (LUT) arranged to operate as an memory element for storing a plurality of bits of logic levels; and a plurality of registers each pairing up with a respective lookup table in the basic memory blocks; wherein the plurality of pairs of lookup tables and registers combine to form a pipelining memory structure. |
| US11120872B2 |
Resistive memory devices and methods of operating resistive memory devices
A resistive memory device includes a memory cell array of resistive memory cells connected to word and bit lines, each bay of the memory cell array including K tiles; a write/read circuit connected to the memory cell array through a row decoder and a column decoder, the write/read circuit being configured to perform a write operation in a target tile of the memory cell array, the write/read circuit comprising write drivers corresponding to the bays; a control voltage generator configured to generate first and second control voltages based on a reference current; and a control circuit configured to control the write/read circuit and the control voltage generator. A first write driver that corresponds to a first bay of the bays is configured to provide the target tile with a write current corresponding to a physical position of a selected memory cell of the target tile in the memory cell array. |
| US11120869B2 |
Quantizing loop memory cell system
One example includes a memory cell system. The memory cell system includes a quantizing loop configured to conduct a quantizing current in a first direction corresponding to storage of a first state of a stored memory state of the memory cell system and to conduct the quantizing current in a second direction opposite the first direction corresponding to storage of a second state of the stored memory state of the memory cell system. The memory cell system also includes a bias element arranged in the quantizing loop and which is configured to provide a substantially constant flux bias of the quantizing loop in each of the first and second states of the stored memory state. |
| US11120866B1 |
Memory device
According to one embodiment, a driver that sequentially supplies a first voltage, a second voltage higher than the first voltage, and the first voltage to the bit line, during the writing operation to the first memory cell. The driver supplies a third voltage to the second word line and a fourth voltage to the second selecting gate line while changing the voltage of the bit line from the second voltage to the first voltage if a data is a first data. The driver supplies a fifth voltage to the second word line and a sixth voltage to the second selecting gate line while changing the voltage of the bit line from the second voltage to the first voltage if the data is a second data. At least the sixth voltage is larger than the fourth voltage or the fifth voltage is larger than the third voltage. |
| US11120862B2 |
Non-volatile memory read method for improving read margin
A semiconductor device capable of enlarging a read margin of a memory cell and a method of surrounding a read of a memory are provided. The reference word line RWL is activated in a time division manner with respect to the plurality of word lines WL. The precharge circuit PRE applies the read potential VRD to the bit line BL, and the precharge circuit PRE flows the read current Icel from the selected memory cell MC and the read reference current Iref from the reference cell RC to the bit line BL in a time division manner. A detection currents Ird2a, Irr2a, each of which is a current proportional to the current flowing through the bitline BL, flows through the current detection line CDL. |
| US11120860B1 |
Staggering refresh address counters of a number of memory devices, and related methods, devices, and systems
Methods of operating a number of memory devices are disclosed. A method may include adjusting a count of a refresh address counter of at least one memory device of a number of memory devices such that the count of the refresh address counter of the at least one memory device is offset from a count of a refresh address counter of at least one other memory device of the number of memory devices. The method may also include receiving, at each of the number of memory devices, a refresh command. Further, the method may include refreshing, at each of the number of memory devices, a row of memory cells indicated by the count of an associated refresh address counter. Related systems and memory modules are also described. |
| US11120859B2 |
Memory cell sensing with storage component isolation
Methods, systems, and devices for operating a ferroelectric memory cell or cells are described. A ferroelectric memory cell may be selected using a selection component that is in electronic communication with a sense amplifier and a ferroelectric capacitor of a ferroelectric memory cell. A voltage applied to the ferroelectric capacitor may be sized to increase the signal sensed during a read operation. The ferroelectric capacitor may be isolated from the sense amplifier during the read operation. This isolation may avoid stressing the ferroelectric capacitor which may otherwise occur due to the applied read voltage and voltage introduce by the sense amplifier during the read operation. |
| US11120858B2 |
Magnetic memory
A magnetic memory according to an embodiment includes: a first wiring; a second wiring; a first switching element disposed between the first wiring and the second wiring; a first magnetic member extending in a first direction and disposed between the first switching element and the second wiring; a third wiring disposed between the first magnetic member and the second wiring; a first magnetoresistive element disposed between the third wiring and the second wiring; and a second switching element disposed between the first magnetoresistive element and the second wiring. |
| US11120854B2 |
Semiconductor device
A semiconductor device includes an internal clock generation circuit configured to generate first to fourth internal clocks from first and third divided clocks and a ground voltage in first and second modes. The semiconductor device also includes a data processing circuit configured to latch first to fourth internal data according to first to fourth input control signals. The data processing circuit is additionally configured to generate first to fourth output data by determining the output priority of the latched first and third internal data and the latched second and fourth internal data according to the first to fourth internal clocks, first to fourth rising output control signals, and first to fourth falling output control signals. |
| US11120853B2 |
Semiconductor memory apparatus with a write voltage level detection
A semiconductor memory apparatus includes a write control circuit suitable for generating a write cancel signal and a rewrite signal in response to a voltage level of a write voltage in a write operation, and a driving circuit suitable for transferring data to a data storage region in response to the write cancel signal and the rewrite signal in the write operation. |
| US11120851B1 |
Memory apparatus and burst read and burst write method thereof
A memory apparatus includes a pseudo static random access memory and a controller. The controller is configured to provide an external command to the pseudo static random access memory. When the memory apparatus starts a burst read operation or a burst write operation, the controller provides a plurality of page starting addresses to the pseudo static random access memory, and the pseudo static random access memory sequentially performs the burst read operation or the burst write operation according to a sequence of receiving the page starting addresses. |
| US11120850B2 |
Performing logical operations using sensing circuitry
The present disclosure includes apparatuses and methods related to performing logical operations using sensing circuitry. An example apparatus comprises an array of memory cells and sensing circuitry coupled to the array of memory cells. The sensing circuitry includes a primary latch and a secondary latch. The primary latch is coupled to a pair of complementary sense lines and selectively coupled to a pair of adjacent complementary sense lines. The secondary latch is selectively coupled to the primary latch. The primary latch and secondary latch are configured to shift a data value between the pair of adjacent complementary sense lines and the primary latch. The primary latch and secondary latch are configured to shift the data value from the pair of adjacent complementary sense lines without activating a row line. |
| US11120842B2 |
Memory system having plural circuits separately disposed from memories
A memory system includes a first substrate including a first signal terminal and a second signal terminal electrically connected to a bus, a first circuit in which a first switching element and a first resistor are connected in series between a first terminal and a second terminal, the first terminal connected to the first signal terminal, a second circuit in which a second switching element and a second resistor are connected in series between a third terminal and a fourth terminal, the third terminal connected to the second signal terminal, a first memory electrically connected to the second terminal, a second memory electrically connected to the fourth terminal, and a controller electrically connected to the bus and configured to control the first and second switching elements. |
| US11120841B2 |
Method for automatically detecting video incidents on an electronic video playback device
A method for automatically detecting video incidents on a video played back by an electronic video playback device, includes acquiring a message; subtracting a counter included in the message previously acquired from a counter included in a message saved in a database to obtain a transition state of the electronic video playback device; classifying, by a supervised automatic learning algorithm, the transition state as a normal state of the played back video or as a video incident on the played back video; performing a video incident detection including the creation of an incident message; transmitting the incident message to a remote system; and recording the acquired message in the database. |
| US11120839B1 |
Segmenting and classifying video content using conversation
Disclosed are various embodiments for segmenting and classifying video content using conversation. In one embodiment, a plurality of segments of a video content item are generated by analyzing audio accompanying the video content item. A subset of the plurality of segments that correspond to conversation segments are selected. Individual segments of the subset of the plurality of segments are processed to determine whether a classification applies to the individual segments. A list of segments of the video content item to which the classification applies is generated. |
| US11120837B2 |
System and method for use in playing back panorama video content
Some embodiments provide methods of playing back content, comprising: accessing video content comprising a series of frames that if fully decoded would extend beyond a viewer's field of view, and wherein each encoded frame comprises multiple encoded sections; determining a field of view of the viewer; identifying one or more sections of the first frame that are at least partially within the field of view; decoding the one or more sections of the first frame while not decoding one or more of the sections of the first frame that are not within the field of view; and displaying the one or more decoded sections of the first frame such that the portion of the first frame is displayed, and wherein less than all of the first frame is decoded and less than all of the first frame is displayed during playback. |
| US11120835B2 |
Collage of interesting moments in a video
A computer-implemented method includes determining interesting moments in a video. The method further includes generating video segments based on the interesting moments, wherein each of the video segments includes at least one of the interesting moments from the video. The method further includes generating a collage from the video segments, where the collage includes at least two windows and wherein each window includes one of the video segments. |
| US11120832B2 |
Recording and reproducing device, recording and reproducing method, and magnetic tape cartridge
A recording and reproducing device includes: a reading unit that reads production information from a recording medium of a magnetic tape cartridge, the magnetic tape cartridge including a magnetic tape, and the recording medium other than the magnetic tape and on which the production information is recorded, the production information being information regarding the magnetic tape obtained in a production process of the magnetic tape cartridge; and a control unit that performs, as an initialization process of the magnetic tape cartridge, control of recording the production information on the magnetic tape and invalidating the production information in the recording medium. |
| US11120825B1 |
Modifying seek operations mid-seek
Illustrative systems and methods disclosed herein may change or modify a seek during mid-seek for various reasons and may set seek speeds for various seeks to less than the maximum possible seek speed to, for example, facilitate seek target change or modifications mid-seek. For instance, the seek speeds for lower priority commands or commands at risk for deprioritization may be set to speeds less than the maximum possible seek speed. |
| US11120824B1 |
Bolometric sensor for a heat-assisted magnetic recording device
An apparatus comprises a slider configured for heat-assisted magnetic recording comprising an air bearing surface (ABS). The slider comprises a write pole at or near the ABS, and a near-field transducer (NFT) at or near the ABS and proximate the write pole. A main waveguide is configured to receive light from a laser source and communicate the light to the NFT. An optical power sensor comprises a tap waveguide optically coupled to the main waveguide and comprising a first end and an opposing second end. The optical power sensor also comprises a bolometer optically coupled to the tap waveguide and configured to receive a portion of the light extracted from the main waveguide by the tap waveguide. |
| US11120820B2 |
Detection of signal tone in audio signal
A technique for detecting a signal tone in an audio signal is disclosed. A determination is made as to whether a peak modulation frequency in the audio signal is in a specific range or not to obtain a determination result. A measure regarding a modulation spectrum of the audio signal is calculated. The measure is calculated based on at least components of the modulation spectrum above a specific limit of modulation frequency. By using the determination result and the measure regarding the modulation spectrum, a judgement is done as to whether the audio signal contains a signal tone or not. |
| US11120817B2 |
Sound recognition apparatus
A sound recognition apparatus (100) comprises a microphone (110) for capturing a posterior sound signal; and a processing circuit comprising a processor (180). The processing circuit is configured to process the posterior sound signal to derive posterior data, generate, using the processor (180), amalgamated data from the posterior data and anterior data derived from a previously captured anterior signal, determine, by the processor (180), whether there are correlations between the amalgamated data, the posterior data, and the anterior data that indicate that the posterior data matches the anterior data by comparing the posterior data and the amalgamated data, and the anterior data and the amalgamated data, and upon the posterior data matching the anterior data, output, by the processor (180), an indication that the posterior data matches the anterior data. |
| US11120814B2 |
Multi-microphone signal enhancement
Microphone signals are received from microphones of a computer device. Each microphone signal of the microphone signals is acquired by a respective microphone of the microphones. A previously unselected microphone is selected from the microphones as a reference microphone, which generates a reference microphone signal. An adaptive filter is used to create, based on microphone signals of the microphones other than the reference microphone, predicted microphone signals for the reference microphone. Based on the predicted microphone signals for the reference microphone, an enhanced microphone signal is outputted for the reference microphone. The enhanced microphone signal may be used as microphone signal for the reference microphone in subsequent audio processing operations. |
| US11120813B2 |
Image processing device, operation method of image processing device, and computer-readable recording medium
The present disclosure relates to an image processing device, an operation method of the image processing device, and a computer-readable recording medium. The image processing device according to an embodiment in the present disclosure may comprise: a voice-obtaining unit for obtaining the voice of a user and generating a first voice signal; a communication interface unit for receiving a second voice signal of the user from an external device; and a processor which, after the first voice signal is received from the voice-obtaining unit, performs a first pre-processing operation employing voice amplification of the received first voice signal, and, after the second voice signal is received via the communication interface unit, performs a second pre-processing operation employing noise amplification of the second voice signal. |
| US11120809B2 |
Coding device, decoding device, and method and program thereof
A coding method and a decoding method are provided which can use in combination a predictive coding and decoding method which is a coding and decoding method that can accurately express coefficients which are convertible into linear prediction coefficients with a small code amount and a coding and decoding method that can obtain correctly, by decoding, coefficients which are convertible into linear prediction coefficients of the present frame if a linear prediction coefficient code of the present frame is correctly input to a decoding device. A coding device includes: a predictive coding unit that obtains a first code by coding a differential vector formed of differentials between a vector of coefficients which are convertible into linear prediction coefficients of more than one order of the present frame and a prediction vector containing at least a predicted vector from a past frame, and obtains a quantization differential vector corresponding to the first code; and a non-predictive coding unit that generates a second code by coding a correction vector which is formed of differentials between the vector of the coefficients which are convertible into the linear prediction coefficients of more than one order of the present frame and the quantization differential vector or formed of some of elements of the differentials. |
| US11120805B1 |
Intelligent microphone having deep learning accelerator and random access memory
Systems, devices, and methods related to a Deep Learning Accelerator and memory are described. For example, a microphone may be configured to execute instructions with matrix operands and configured with: a transducer to convert sound waves to electrical signals; an analog to digital converter to generate audio data according to the electrical signals; random access memory to store instructions executable by the Deep Learning Accelerator and store matrices of an Artificial Neural Network; and a controller to store the audio data in the random access memory as an input to the Artificial Neural Network. The Deep Learning Accelerator can execute the instructions to generate an output of the Artificial Neural Network, which may be provided as the primary output of the microphone to a computer system, such as a voice-based digital assistant. |
| US11120802B2 |
Diarization driven by the ASR based segmentation
An approach is provided that receives an audio stream and utilizes a voice activation detection (VAD) process to create a digital audio stream of voices from at least two different speakers. An automatic speech recognition (ASR) process is applied to the digital stream with the ASR process resulting in the spoken words to which a speaker turn detection (STD) process is applied to identify a number of speaker segments with each speaker segment ending at a word boundary. A speaker clustering algorithm is then applied to the speaker segments to associate one of the speakers with each of the speaker segments. |
| US11120801B2 |
Generating dialogue responses utilizing an independent context-dependent additive recurrent neural network
The present disclosure relates to systems, methods, and non-transitory computer readable media for generating dialogue responses based on received utterances utilizing an independent gate context-dependent additive recurrent neural network. For example, the disclosed systems can utilize a neural network model to generate a dialogue history vector based on received utterances and can use the dialogue history vector to generate a dialogue response. The independent gate context-dependent additive recurrent neural network can remove local context to reduce computation complexity and allow for gates at all time steps to be computed in parallel. The independent gate context-dependent additive recurrent neural network maintains the sequential nature of a recurrent neural network using the hidden vector output. |
| US11120800B1 |
Event based feature computation
Techniques for performing feature computation are described. A system may gather and analyze event data to generate a timeline of the event data and corresponding feature data (e.g., statistical values representing the event data). The system can create a customized timeline that allows information to be sorted and aggregated in different timescales to improve speech processing and other functionality. For example, a feature computation system may calculate statistics and other information based on interactions with a speech processing system. These statistics provide information about previous interactions that may be leveraged to interpret future voice commands. |
| US11120793B2 |
Automatic speech recognition
It is depicts a method of speech recognition, sequentially executed by a processor on consecutive speech segments that comprises: obtaining digital information, which is a spectrogram representation, of a speech segment, and extracting from it speech features that characterizes the segment from the spectrogram representation. Then, a consistent structure segment vector based on the speech features is determined onto which machine learning is deployed to determine at least one label of the segment vector. A method of voice recognition and image recognition sequentially executed by a processor, on consecutive voice segments is also described. A system for executing speech, voice, and image recognition is also provided that comprises client devices to obtain and display information, a segment vector generator to determine a consistent structure segment vector based on features, and a machine learning server to determine at least one label of the segment vector. |
| US11120787B2 |
Job record specifying device, image processing apparatus, server, job record specifying method, and recording medium
A user inputs a speech including a keyword via a speech input device; a first processor searches a job history by the keyword, the job history being stored on a storage, the job history including a job record, the job record including a set of values having ever been used for a job executed by an image processing apparatus. A job record specifying device includes a second processor that conducts an analysis on different values in multiple job records; selects a speech with reference to the different values; transfers the speech to a speech generator; and finds a specific job record from the multiple job records using a keyword extracted from a speech inputted via the speech input device in response to the speech outputted by the speech generator. The image processing apparatus reflects a target set of values in the specific job record, to the setting of a job. |
| US11120786B2 |
Method and system of automatic speech recognition with highly efficient decoding
A system, article, and method of automatic speech recognition with highly efficient decoding is accomplished by frequent beam width adjustment. |
| US11120785B2 |
Voice synthesis device
A voice synthesis device which includes a database configured to store a voice and a text corresponding to the voice and a processor configured to extract characteristic information and a tone of a first-language voice stored in the database, classify an utterance style of an utterer on basis of the extracted characteristic information, generate utterer analysis information including the utterance style and the tone, translate a text corresponding to the first-language voice into a second language, and synthesize the text, translated into the second language, in a second-language voice by using the utterer analysis information. |
| US11120783B2 |
Composite article for mitigating noise, vibration, and harshness
A composite article configured for mitigating noise, vibration, and harshness includes a substrate having a first stiffness. The composite article includes a structural film formed from a composition and disposed on the substrate in a pattern that is arranged to dampen a sound wave having a first frequency and a first amplitude and propagatable in a first direction to a second frequency that is less than the first frequency and a second amplitude that is less than the first amplitude. The composite article includes a coating layer disposed on the pattern and configured to dampen the sound wave in the first direction and in a second direction that is perpendicular to the first direction. The composite article has a second stiffness that is greater than the first stiffness. A method of forming the composite article is also described. |
| US11120779B1 |
Structure for adjusting angle of pedal to be folded or unfolded
A structure for adjusting an angle of a pedal to be folded or unfolded includes a pedal seat, a rotating block and a locking element, wherein the pedal seat includes an upright post with a through lug, and the through lug is provided with a through hole, the rotating block includes a pivot hole to provide the through lug passing through and corresponding to the through hole, the rotating block and the upright post are provided with at least one contact surface, the rotating block and the upright post are respectively provided with at least one matched clamping structure to be correspondingly clamped at the at least one contact surface, the rotating block and the upright post are clamped by the locking element, so that matched clamping structures of the rotating block and matched clamping structures of the upright post are together engaged in a pairwise manner. |
| US11120778B1 |
Quick release bass drum beater thumb screw
In one example, the disclosed quick release bass drum beater thumb screw comprises a male threaded bolt portion for attachment to a rocker component of a beater assembly. The rocker having a female threaded void therein configured to engage the bolt portion such that rotation of the bolt portion relative to the rocker results in linear/axial movement of the bolt portion relative to the rocker; the bolt portion having a pressure surface on one axial end thereof to frictionally engage an exterior surface of the rotation shaft; the quick release thumb screw comprising a user engagement portion attached to the bolt portion and configured to axially move relative thereto; the user engagement portion comprising a female non-cylindrical surface configured to selectively engage and disengage from the bolt portion to facilitate a ratcheting action; and an elastic member configured to bias the female non-cylindrical surface of the user engagement portion relative to the male non-cylindrical surface on the bolt portion. |
| US11120777B2 |
Cap-style locking stud
An upper cap for a component mounting stud assembly for mounting a component to a stringed instrument. The upper cap includes a receiving shaft and a head. An external diameter of the receiving shaft is smaller than an external diameter of the head. The upper cap includes an internally-threaded portion configured for engagement with an externally-threaded portion. The upper cap also includes a through-hole in the upper cap, wherein the through-hole passes through the receiving shaft and the head. |
| US11120775B2 |
Compositing an image for display
A method for compositing display data at a remote device to form an image for display involves the remote device receiving (S62) elements of the image, where the image includes display data forming a background layer, display elements forming a foreground layers and an overlay data layer. The remote device receives (S63) sensor information indicating one or more of a position of an eye of a viewer, a direction of focus of the eye of the viewer, and/or a position of a display. It then determines (S64) movement of a line of sight between the eye of the viewer and the display, determines an estimate of a future position of the line of sight at a future time based on the determined movement of the line of sight, and determines (S65) an adjustment to be made to the image based on the future position of the line of sight. The display elements of the foreground layer are composited (S66) relative to the display data of the background layer according to the determined adjustment and the composited image is forwarded (S67) for display at the future time. |
| US11120773B2 |
Placement of graphic elements of GUI with region of interest
Apparatuses, methods, and storage media associated with placing graphical elements in a graphical user interface (GUI) in view of a region of interests (ROI) are disclosed herein. An apparatus may comprise a GUI manager to receive a designation of a region of interest, ROI, of a first graphical element of a GUI to be rendered on a display device; and to place a second graphical element into the GUI in view of the ROI of the first graphical element. The GUI manager may be loaded into the memory and executed by the processor circuitry of a computing device. The first graphical element may have one or more ROIs, and there may be one or more instances of the first graphical element, placed over one or more display devices. |
| US11120772B1 |
Source driving circuit, display apparatus and operation method of display apparatus
A source driving circuit, a display apparatus and an operation method are provided. The source driving circuit includes a reference voltage generating circuit, a plurality of compensation circuits, a gamma voltage generating circuit and a digital to analog converter. The reference voltage generating circuit is configured to generate a plurality of gamma reference voltages. The plurality of compensation circuits are coupled to the reference voltage generating circuit and configured to generate a plurality of compensated gamma reference voltages according to the plurality of gamma reference voltages and a voltage associated with a common voltage. The gamma voltage generating circuit is configured to generate a plurality of gamma voltages according to the plurality of compensated gamma reference voltages. The digital to analog converter is configured to generate a plurality of data driving voltages corresponding to image data according to the plurality of gamma voltages. |
| US11120770B2 |
Systems and methods for hiding dead pixels
In one embodiment, a computing system may access a dead pixel position corresponding to a dead pixel of a display. The system may access an image and modify the image by applying a mask to a pixel region of the image containing a particular pixel value with a position that corresponds to the dead pixel position. The mask may include an array of first scaling factors for scaling pixels values in the pixel region. The array of first scaling factors may be configured to brighten one or more of the pixel values surrounding the particular pixel value. The system may cause the modified image to be output by the display. |
| US11120769B2 |
Brightness compensation method and related product
A brightness compensation method and related product are disclosed. The method includes steps of receiving at least one compensation table sent from a mobile terminal by a driving device, and obtaining a target grayscale value of a target pixel point in a first display picture of the display device, determining a fixing value corresponding to the target pixel point according to the at least one compensation table, performing a brightness compensation to the target pixel point according to the fixing value, and driving the display device to display the first display picture after performing the brightness compensation. The embodiment of the present application can eliminate a brightness uneven phenomenon in the first display picture caused by attenuation of the luminous efficiency of the OLED device. |
| US11120768B2 |
Frame drop processing method and system for played PPT
A method and system for handling frame dropping during playback of a PPT file. The method comprises operating the DXGI screen capturing module to acquire a prepositioned frame in a graphics card cache (S100); acquiring screen data according to the prepositioned frame (S200); monitoring the screen data and timing a duration in which the screen data does not change (S300); and modifying the screen data when the duration exceeds a preset threshold (S400); performing screen capture by the DXGI screen capturing module when the screen data changes (S500). During the whole process, when the duration in which the screen data does not change exceeds the preset threshold, the screen data is actively modified, so that the frame dropping that occurs when there is no change in the screen data may be avoided, thereby enabling effective handling of the frame dropping during playback of the PPT file. |
| US11120763B1 |
Display panel, gate driving method and display device
A display pane, a gate driving method and a display device are provided. The display panel comprises a pixel driving circuit in a display area and a gate driving circuit in a non-display area. The gate driving circuit is electrically connected to a first voltage end and a second voltage end. The first voltage end is configured to turn off a driving transistor of the pixel driving circuit electrically connected to an output end of the gate driving circuit. The second voltage end is configured to turn off an output transistor of the gate driving circuit to suppress the gate voltage shift of the driving transistor in the pixel driving circuit such that the reliability of the driving transistor and the fault tolerance of the display panel could be raised. |
| US11120759B2 |
Display control apparatus and display device
A display control apparatus includes a data driver, a timing controller, and a control circuit. The data driver is configured to output a data signal. The timing controller includes a timing output circuit configured to output a frame start signal located at the start of a frame. The control circuit is electrically connected to the timing output circuit and to the data driver. The control circuit is configured to detect whether a frame start signal exists and to output a compensation signal according to the detection result. If the control circuit detects that a frame start signal exists, the control circuit outputs a compensation signal to the data driver. |
| US11120756B2 |
Liquid crystal panel
A liquid crystal panel includes a liquid crystal layer, a pixel electrode, and a common electrode. In a case where the AC voltage of a certain amplitude is supplied to the pixel electrode, an optimum common voltage fluctuates from a first optimum common voltage to a second optimum common voltage, the optimum common voltage being the common voltage that minimizes a transmittance difference between the transmittance of the pixel before a reversal of polarity of the pixel voltage and the transmittance of the pixel after the reversal of polarity of the pixel voltage. The common voltage is a voltage that is higher than the first optimum common voltage and lower than the second optimum common voltage or a voltage that is lower than the first optimum common voltage and higher than the second optimum common voltage. |
| US11120744B2 |
Display device and method of driving the same
A display device includes a pixel circuit including a first pixel and a second pixel. The first pixel arranged in a first row and the second pixel arranged in a second row are commonly connected to one scan line, the number of the scan lines required by the display device may be reduced to half. An active period of the first selection signal does not overlap an active period of the second selection signal. A scan on time of the scan signal overlaps one of the active period of the first selection signal and the active period of the second selection signal. |
| US11120743B2 |
Pixel driving circuit and display device
A pixel driving circuit includes a driving transistor connected in series between a first power supply voltage terminal and a second power supply voltage terminal. The driving transistor has a control terminal electrically connected to a first node, a first terminal electrically connected to a second node, and a second terminal electrically connected to a third node. The second node is located between the first power supply voltage terminal and the driving transistor. The third node is located between the second power supply voltage terminal and the driving transistor. A light-emitting element is connected in series between the third node and the second power supply voltage terminal. A voltage maintaining module is configured to maintain a voltage of the third node unchanged. |
| US11120741B2 |
Display device and method for driving same
The present application discloses a current-driven display device which employs internal compensation, by which a non-emission period can be shortened without causing the luminance of display elements to be unstable. During a period in which a voltage on a data signal line Dj is written to a pixel circuit, transistors M4 and M6 are controlled to be in an OFF state, and transistors M2, M3, and M5 are controlled to be in an ON state. As a result, a drive transistor M1 is diode-connected, a source terminal thereof is disconnected from a high-level power line ELVDD, and a gate terminal thereof and an anode of an organic EL element OLED are connected to an initialization voltage supply line Vini. Consequently, a gate voltage Vg of the drive transistor M1 and an anode voltage Va of the organic EL element OLED are initialized, and first and second capacitors C1 and C2 respectively hold a voltage corresponding to the voltage on the data signal line Dj and a threshold voltage of the drive transistor M1. |
| US11120736B2 |
Pixel circuit, pixel structure, and related pixel array
A pixel circuit including a driving transistor, a light emission element, a compensation circuit, a storage capacitor, and a writing circuit is provided. The light emission control circuit is configured to selectively conduct the light emission element to the driving transistor. The compensation circuit is coupled with the light emission control circuit and a control terminal of the driving transistor, and is configured to form a diode-connected structure with the driving transistor. The storage capacitor includes a first terminal and a second terminal. The first terminal of the storage capacitor is coupled with the control terminal of the driving transistor, and the light emission control circuit is configured to selectively conduct the second terminal of the storage capacitor to a first power terminal. The writing circuit is configured to provide different voltages to the first terminal of the storage capacitor and the second terminal of the storage capacitor. |
| US11120735B2 |
Light emitting device package and display device including the same
A light emitting device package includes a first light emitting diode pixel, the first light emitting diode pixel including first light emitting diode chips that each emit light, and a first pixel driving integrated circuit under the first light emitting diode chips of the first light emitting diode pixel, the first pixel driving integrated circuit configured to drive the first light emitting diode chips based on an active matrix scheme, in which each of the first light emitting diode chips is driven using an entire one frame interval, and based on a pulse width modulation scheme, in which a time during which each of first driving currents is applied to a respective one of the first light emitting diode chips is controlled within the entire one frame interval. |
| US11120733B2 |
Display device switched to different driving modes according to gray level
A display device includes a plurality of pixels. Each pixel includes a light emitting unit and a driving circuit. The driving circuit drives the light emitting unit in a pulse width modulation mode to present a first gray level lower than or equal to a predetermined gray level, and drives the light emitting unit in a current mode to present a second gray level higher than the predetermined gray level. |
| US11120732B2 |
Device and method for driving display in response to image data
A display driver includes: a receiver configured to receive image data of each line of a display panel from an external device; a line latch circuit having a line latch configured to latch the image data of each line received by the receiver in response to a strobe signal; a driving circuit section which drives the display panel in response to the image data latched by the line latch; and a timing controller configured to generate the strobe signal. The receiver is configured to detect occurrence of transmission error in data transmission about each line. The timing controller is configured to generate the strobe signal in response to a detection result of the occurrence of transmission error. |
| US11120729B1 |
Shift register, driving method thereof, gate driving circuit and display apparatus
A shift register includes a node control circuit configured to set a potential at a first node under control of an input signal, a reset signal, and a potential at a second node, and to set the potential at the second node under control of a second clock signal and the potential at the first node. Also included is an output circuit and a threshold voltage control circuit configured. The output circuit includes a de-noising transistor to achieve a balance between a gate voltage and a source voltage of the de-noising transistor during a time interval. |
| US11120728B2 |
Display device and image capturing device
A display device includes plurality of pixels arranged to form rows and columns, row selection circuit, and signal supply circuit for supplying signal to pixels of a row selected from the plurality of pixels by the row selection circuit The signal supply circuit includes first holder including first data holders, scanning circuit for sequentially selecting the first data holders and causing each selected first data holder to receive data, a second holder including blocks each including second data holders, the second holder being configured to time-divisionally receive a plurality of data held by the first holder, and DA converter for supplying a plurality of analog signals corresponding to the plurality of data held by the second holder to the pixels of the row selected from the plurality of pixels by the row selection circuit. |
| US11120726B2 |
Method and device for driving display panel, and display apparatus
Embodiments of the present disclosure provide a method and device for driving a display panel, and a display device. The display panel includes a first display area having a first pixel density and a second display area having a second pixel density, the second pixel density being greater than the first pixel density. The driving method of the display panel comprises receiving first color gamut input data; converting the first color gamut input data corresponding to the first display area into second color gamut intermediate data; converting the second color gamut intermediate data into first color gamut output data; and converting the first color gamut output data into a driving signal that drives the first display area. |
| US11120725B2 |
Method and apparatus for color gamut mapping color gradient preservation
A method and apparatus for gamut mapping color gradient preservation is described. In one example, the method and apparatus obtains a source image having a plurality of source color gamut pixels in a source color gamut, wherein the plurality of source color gamut pixels include a same hue value and a same luminance value and define a color gradient, and converts the plurality of source color gamut pixels to a plurality of target color gamut pixels such that the color gradient of the plurality of source color gamut pixels is preserved by the plurality of target color gamut pixels in a target color gamut. The method and apparatus provides the plurality of target color gamut pixels for display on a target color gamut display. |
| US11120722B2 |
Data transmission method and display driving system
A data transmission method applied in a display, which includes a display panel, is provided. The data transmission method includes the following steps of: providing a host controller and n display drivers, n is a natural number greater than 1; providing a communication link under mobile industry processor interface (MIPI), connecting the host controller to the n display drivers; determining n virtual channel values Vc1-Vcn corresponding to the respective n display drivers; employing the host controller for providing a command with a virtual channel parameter through the communication link under MIPI; when the virtual channel parameter corresponds to an ith virtual channel values Vci, an ith display driver executing corresponding operations in response to the command, while the rest n−1 display drivers ignoring the command, wherein i is a natural number smaller than or equal to n. |
| US11120716B2 |
Method for detecting gamma voltage value, gamma chip, and computer-readable storage medium
The present application discloses a method for detecting a gamma voltage value, a gamma chip, and a computer-readable storage medium, which includes: when the gamma voltage value generated by the gamma chip being not within a preset voltage range, outputting prompt information corresponding to the gamma voltage value to allow detection by a tester. |
| US11120714B2 |
Circuit for detecting crack in display and electronic device including same
An electronic device disclosed herein includes a cover glass, a display panel exposed through the cover glass, a flexible substrate extending from a periphery of the display panel and bent and positioned on a rear surface of the display panel, a display driver integrated circuit (DDI) disposed on the flexible substrate, a sensing circuit disposed on the flexible substrate and electrically connected with the display driver integrated circuit, signal lines that transmit a signal to sub-pixels arranged on the display panel, and a sensing line passing through a peripheral portion of the display panel and the flexible substrate and electrically connected with at least some of the signal lines through the sensing circuit. |
| US11120707B2 |
Cognitive snapshots for visually-impaired users
Systems, methods, and computer-readable media are described for providing machine-learning assistance to a user who may be visually-impaired in the form of cognitive snapshots taken of an environment. The visually-impaired user can be guided by a user application executing on a user device to position the user device to capture an image of a desired portion of an environment. Object recognition processing is performed on the captured image to identify objects present in the environment. An audible listing of the identified objects can be presented to the user. A delta between objects identified across different snapshots can be determined and an indication thereof can be presented to the user. The user application can guide the user towards a particular desired object by outputting an audible or haptic signal that increases in intensity as the user scans the user device towards a location of the object in the environment. |
| US11120696B2 |
Control device, program, control method, and flight vehicle
Provided is a control device for controlling a flight vehicle including a solar cell panel, and an antenna for forming a communication area on the ground to provide wireless communication service for a user terminal in the communication area by using electric power generated by the solar cell panel. The control device comprises a control unit for controlling a first flight vehicle and a second flight vehicle so that during a first time period, the second flight vehicle of the first flight vehicle and the second flight vehicle is caused not to cover a first target area and the first flight vehicle is caused to cover the first target area, and during a second time period following the first time period, the first flight vehicle is caused not to cover the first target area and the second flight vehicle is caused to cover the first target area. |
| US11120693B2 |
Providing inter-vehicle data communications for vehicular drafting operations
Systems, methods, and software can be used to provide inter-vehicle data communications for drafting operations. In some aspects, a method is disclosed comprising: selecting, by a hardware processor of a first vehicle, a second vehicle as a candidate for a drafting group; receiving, from the second vehicle, a drafting capability indication; in response to receiving the drafting capability indication, transmitting, from the first vehicle to the second vehicle, a drafting request; receiving, from the second vehicle, a drafting response; determining, by the hardware processor of the first vehicle, to establish the drafting group including the first vehicle and the second vehicle; and transmitting, from the first vehicle to the second vehicle, a drafting confirmation, wherein the drafting confirmation indicates that the first vehicle agrees to establish the drafting group with the second vehicle. |
| US11120692B2 |
Systems and methods for preventing damage to unseen utility assets
Systems and methods are disclosed for preventing damage to underground assets caused by earth work or construction equipment and vehicles. The system includes a central data system, which has access to asset location and map data, and a GPS enabled tracking device provided in the vehicle. The system operates by comparing the real-time vehicle location to the stored asset locations, displaying the map, asset information and vehicle location to the vehicle operator and generating alerts when the vehicle breaches a perimeter around an asset. Preferably, both the central data system and the tracking unit are configured to operate together and in parallel, thereby improving the reliability of the system. In addition, the system is also specifically configured to implement various approaches for using and displaying asset location data during monitoring operations while preserving the confidentiality and security of sensitive information. |
| US11120689B2 |
Systems and methods for connected vehicle and mobile device communications
Systems and methods for connected vehicle and mobile device communications are provided herein. An example method includes determining a distracted condition for at least one of a driver or a pedestrian by evaluating actions occurring within in a vehicle of the driver or on a mobile device of the pedestrian; determining a distraction level for either the driver or the pedestrian based on the actions occurring within in the vehicle or on the mobile device; and providing an alert message to the mobile device or a human machine interface of the vehicle based on the distraction level, the alert message warning of a distracted condition of the pedestrian or the driver. |
| US11120687B2 |
Systems and methods for utilizing a machine learning model to identify public parking spaces and for providing notifications of available public parking spaces
A device may receive geographical data identifying a geographical area, and may receive, from vehicle devices of vehicles, first vehicle data identifying engine off conditions, locations during engine off conditions, and durations of the engine off conditions. The device may divide, based on the geographical data, the geographical area into clusters with particular dimensions, and may process data identifying the clusters and the first vehicle data, with a machine learning model, to determine parking data identifying public parking spaces in the geographical area. The device may receive, from a set of the vehicle devices associated with vehicles parked in the public parking spaces, vehicle data identifying engine on conditions and locations during the engine on conditions, and may identify available public parking spaces based on the second vehicle data and the parking data. The device may perform one or more actions based on data identifying the available public parking spaces. |
| US11120684B2 |
Wireless transfer of data between a communication terminal arranged in a prescribed region and a remote communication station
A system may be used for wirelessly transmitting data between a communication terminal positioned in a prescribed area and a remote communication station connected to a communication network. The system may include a lighting arrangement having a lighting device arranged in the prescribed region and at least one transmission device arranged in or directly on the lighting device. The transmission device may be configured to establish a first wireless optical communication connection to the remote communication stations and a second wireless communication to the communication terminal to transmit the data. |
| US11120679B2 |
System for integrating multiple sensor data to predict a fall risk
A method of determining the likelihood of a slip or fall comprises receiving, by a detection application stored in a non-transitory memory and executed on a processor, a plurality of sensor readings from a plurality of movement sensors, comparing, by the detection application, the plurality of sensor readings with a plurality of movement patterns stored in a database, determining, by the detection application, that at least one of the movement patterns of the plurality of movement patterns matches the plurality of sensor readings, and generating, by the detection application, an indication that a slip or fall is likely based on the plurality of sensor readings. The plurality of movement sensors is associated with different areas of a worker's body. |
| US11120674B2 |
Information processing apparatus, information processing method, and program
There is provided an information processing apparatus, an information processing method, and a program for performing more appropriate haptic presentations. The information processing apparatus includes a signal processing section configured such that in a case where the presentation timing of a first presentation with haptic sensation based on first data overlaps with the presentation timing of a second presentation with either haptic sensation or a sound based on second data, the signal processing section generates a haptic signal for controlling a haptic presentation device performing at least the first presentation based on sensory characteristic data regarding the haptic sensation and on the first data in such a manner that a combined sensory effect on a user receiving both the first presentation and the second presentation becomes an effect merging a first sensory effect of the first presentation with a second sensory effect of the second presentation. |
| US11120667B2 |
Metamorphic persistent symbols using random probability distribution
According to some implementations, when a triggering symbol lands in a defined area of a slot game display during an instance of a base game, there is a chance that the triggering symbol may change to a new symbol. If so, the new symbol may be held in the defined area and may persist during one or more additional purchased base game instances. The new symbol may persist if at least one additional triggering symbol lands in the defined area in subsequent bought games. Each additional triggering symbol may automatically change to a new symbol as the additional triggering symbol lands in the defined area of the slot game display. Whether the triggering symbol will change to a new symbol may involve a random component. In some examples, the greater the number of triggering symbols, the greater the probability the triggering symbol will change to the new symbol. |
| US11120666B2 |
Tower defense wagering game for electronic gaming devices
In response to receiving a wager, a plurality of game elements are displayed as part of the wagering game. The plurality of game elements includes a play area, an enemy element that travels along an enemy path from an enemy entry location toward an enemy goal location, and a defense element that attacks the enemy element when the enemy element is within a defense attack range of the defense element. An enemy health value of the enemy element is reduced based on the defense element attacking the enemy element when the enemy element is within the defense attack range of the defense element. Reducing the enemy health value of the enemy element to zero destroys the enemy element. In response to the enemy element being destroyed, a second monetary amount is credited to the first credit account. |
| US11120664B2 |
Gaming system and gaming machines utilizing tickets having a feature trigger
A casino gaming system includes gaming machines which are configured to accept and read tickets. The ticket may comprise cash-value tickets or non-cash value/promotional tickets. The tickets may also include secondary feature triggering indicia. The player may present the cash-value ticket having a feature triggering indicia or a non-cash value/promotional ticket to a gaming machine, such as by inserting it into a media reader such as a bill acceptor. Associated monetary value or non-monetary credits may be credited to the machine. In addition, if the ticket includes a feature triggering indicia, when such an indicia is detected, the gaming machine preferably triggers or initiates the feature. |
| US11120663B1 |
Gaming machine with remote redemption options
An gaming apparatus, systems and methods with a remote redemption option including a payment acceptance device for accepting payment from a player; at least one display screen that displays symbols, a player's balance and game status information; at least one electronic game module for storing gaming information, operating a game and/or determining a redemption amount to a player; a control electronics in communication with the at least one electronic game module for processing the redemption amount to the player; and a payout dispenser for dispensing a redemption voucher to the player. The disclosure also includes an exchange center having an exchange point of sale within a store having at least one gaming device, wherein the exchange center accepts the redemption voucher as payment for an item of value. |
| US11120658B1 |
Secure and safe access control
For secure and safe access control, a method authenticates the user of an equipment unit with a user credential. The method determines whether the user is authorized to access the equipment unit with an equipment authorization. In response to the user being authenticated and authorized to access the equipment unit, the method releases a unit lock for the equipment unit with a unit lock credential or the user credential. |
| US11120656B2 |
Methods and systems for offline verification code generation based on smart door lock system
The present disclosure provides a method and a system for offline verification code generation based on a smart door lock system. The method may include in response to an unlocking event, recording, by a mobile terminal, a trigger time of the unlocking event; in response to the unlocking event, sending, by the mobile terminal, a request for unlocking verification information to a cloud server, wherein the request for the unlocking verification information is used to request the cloud server to return a verification code of a smart door lock, and the unlocking verification information includes a private key seed of the smart door lock and the trigger time; and receiving, by the mobile terminal, the verification code of the smart door lock for opening the smart door lock generated by the cloud server based on the private key seed and the trigger time. |
| US11120649B2 |
Method for displaying the arrangement of components in a vehicle
A method for displaying the arrangement of components in a transportation vehicle in which the arrangement of the components increases the usage safety when the components are fixedly lockable at one or more fastening points in the transportation vehicle and have at least two different setting positions. |
| US11120648B2 |
Health self learning system and method for electrical distribution systems for automated driving vehicles
In at least one embodiment, an apparatus for adaptively performing diagnostics in a vehicle is provided. The apparatus includes at least one microcontroller and a communication controller. The at least one microcontroller is positioned in a vehicle and is configured to provide first information indicative of operating characteristics for at least one switch in the vehicle. The communication controller is configured to receive the first information from the at least one microcontroller and to wirelessly transmit the first information to a remote server. The communication controller is further configured to receive second information related to a remaining useful life (RUL) for the at least one switch from the remote server and to transmit the second information to the at least one microcontroller to determine when the at least one switch will exhibit a failure. |
| US11120645B2 |
System for remotely monitoring an autonomous vehicle and method using the same
A system for remotely monitoring an autonomous vehicle and a method using the same is disclosed. The system includes a filtering unit, a message converting unit, and an abnormality analyzing module. The filtering unit retrieves the raw vehicle-body data of the on-board system information and filters out the raw vehicle-body data unsatisfying with a threshold value to generate vehicle-parameter information. The message converting unit receives the vehicle-parameter information and estimates vehicle-body environment information based on the vehicle-parameter information. The abnormality analyzing module receives the vehicle-parameter information and the vehicle-body environment information, incorporates the vehicle-parameter information and the vehicle-body environment information into a comparison condition to generate a comparison result, generates an abnormality warning signal corresponding to the comparison result, and transmits the abnormality warning signal to a far-end server to display it. |
| US11120642B2 |
Functional safety critical audio system for autonomous and industrial applications
Methods and apparatus relating to functional safety critical audio system for autonomous and industrial applications are described. In an embodiment, safety island logic circuitry transmits an enable signal to cause initiation of a functional safety test for an audio component in a vehicle. Audio processing logic circuitry receives the enable signal and causes activation of power amplifier logic circuitry, in response to the enable signal, to drive the audio component in accordance with an audio alert test signal. The audio component includes a Parametric Acoustic Array (PAA) transducer. Other embodiments are also disclosed and claimed. |
| US11120639B1 |
Projecting telemetry data to visualization models
A computer system is provided that includes one or more processors configured to define a virtual model of a workspace that is world-locked to a three-dimensional environment by a pair of anchor points. The one or more processors are configured to adjust a fit of the virtual model to the workspace by adjusting a position of a virtual component of the virtual model relative to the pair of anchor points. The one or more processors are configured to receive telemetry data including position information indicating a location of a telemetry event relative to the pair of anchor points in the workspace, and determine a visualization model based on the virtual model of the workspace, and project telemetry data to the visualization model based on a mapping of a pair of points in the visualization model to the pair of anchor points in the virtual model. |
| US11120636B2 |
Smart-home device placement and installation using augmented-reality visualizations
A method for guiding installation of smart-home devices may include capturing, by a camera of a mobile computing device, a view of an installation location for a smart-home device; identifying a wire in the view of the installation location for the smart-home device; determining an instruction for connecting the wire to the smart-home device; and displaying the view of the installation location for a smart-home device with the instruction for connecting the wire to the smart-home device. |
| US11120633B2 |
Interactive virtual reality system for experiencing sound
This disclosure generally relates to a system, which includes a processor to receive video of a cymatic effect. The video of the cymatic effect may be converted into a virtual reality effect which includes a virtual reality representation of the cymatic effect. The virtual reality effect may then be output by the processor to a virtual reality device for display to a user. |
| US11120630B2 |
Virtual environment for sharing information
An electronic device providing information through a virtual environment is disclosed. The device includes: a display; and an information providing module functionally connected with the display, wherein the information providing module displays an object corresponding to an external electronic device for the electronic device through the display, obtains information to be output through the external electronic device, and provides contents corresponding to the information in relation to a region, on which the object is displayed. |
| US11120627B2 |
Content association and history tracking in virtual and augmented realities
A system, apparatus, device, or method to output different iterations of data entities. The method may include establishing a first data entity; establishing a first state for the first data entity. The method may include establishing a second state for the first data entity. The method may include storing the first data entity, the first state, and the second state at a storage device. The method may include retrieving a first iteration of the first data entity exhibiting at least a portion of the first state. The method may include retrieving a second iteration of the first data entity exhibiting at least a portion of the second state. The method may include outputting the first iteration and the second iteration at an output time. |
| US11120624B2 |
Three-dimensional head portrait generating method and electronic device
A three-dimensional head portrait generating method executes on an electronic device. The three-dimensional head portrait generating method establishes a three-dimensional head portrait model with a plurality of feature points according to front face information, wherein feature points form a plurality of first grids on the three-dimensional head portrait model; maps a first part of the feature points of the three-dimensional head portrait model to a left face image to form a plurality of second grids on the left face image; maps a second part of the feature points of the three-dimensional head portrait model to a right face image to form a plurality of third grids on the right face image; and superimposes the left face image and the right face image onto the three-dimensional head portrait model according to a correspondence among the first grids, the second grids and the third grids, to generate a three-dimensional head portrait. |
| US11120619B2 |
Information processing apparatus, non-transitory computer-readable storage medium storing information processing program, information processing system, and information processing method
An example information processing apparatus disposes a flat ground representing a terrain, and an object on the ground, in a virtual space, and performs coordinate conversion on each of vertices of the flat ground and the object on the ground, based on a deformation parameter, so as to change the entire terrain into a drum shape. Thereafter, the information processing apparatus renders an image of the virtual space including the terrain deformed into the drum shape. |
| US11120618B2 |
Display of item information in current space
Provided are a method and an apparatus for displaying item information in a current space, an electronic device, and a non-transitory machine-readable storage medium. The method comprises: obtaining spatial data of a current position in a current space, and obtaining position data and information data of at least one item in the current space according to the spatial data; calculating a display priority of the at least one item in the current space according to the spatial data, the position data, and the information data; and displaying the information data of the at least one item according to the display priority. Through the method, the display priority of the information data of the at least one item in the current space are calculated, and then the information data of the at least one item in the current space is displayed according to the display priority, so that it is convenient for a user to directly view the information data of the at least one item in the current space. |
| US11120614B2 |
Image generation apparatus and image generation method
In an image generation apparatus, a virtual space generation section generates a virtual space in which an object and a virtual camera are arranged in accordance with input information acquired by an input information acquisition section. An intermediate image generation section draws the virtual space by a past technique. A curved surface generation section of a display image generation section generates, for each polygon of an object, a curved surface corresponding to the polygon. A pixel displacement acquisition section acquires a correspondence in pixel position between an image drawn with a planar polygon and a curved surface image. A drawing section determines color values of the pixels of the display image in accordance with the correspondence by referring to an original image. An output section outputs data of the display image generated as described above to a display apparatus. |
| US11120613B2 |
Image generating device and method of generating image
To achieve a balance between responsiveness of image display with respect to movement of a viewing point, and image quality. Reference viewing points are set in respect of a space containing an object to be displayed, and images of the space as viewed from these respective reference viewing points are created as reference images. Meanwhile, when pixel values of display images from a virtual camera are determined, reference images are selected wherein a point on the object represented by the pixel in question is represented as an image, and the values of these pixels are combined using a rule based on the positional relationship etc. of the reference viewing points with the virtual camera. |
| US11120612B2 |
Method and device for tailoring a synthesized reality experience to a physical setting
In one implementation, a method includes: obtaining locality data characterizing objects and relative spatial information of a volumetric region around a user; synthesizing a mesh map of the volumetric region based on the locality data; selecting synthesized reality (SR) content based on the mesh map, wherein the SR content satisfies a dimensional variance threshold relative to one or more portions of the mesh map; compositing at least a portion of the SR content with the mesh map in order to generate composite SR content; and presenting the composite SR content to the user in order to occlude at least a portion of a visual presentation of the volumetric region. In some implementations, the SR content is adapted to fit the one or more portions of the mesh map. In some implementations, the SR content is updated as the user location changes or the user interacts with the SR content. |
| US11120608B2 |
Apparatus and method for cross-instance front-to-back traversal for ray tracing heavily-instanced scenes
Apparatus and method for programmable ray tracing with hardware acceleration on a graphics processor. For example, one embodiment of a graphics processor comprises shader execution circuitry to execute a plurality of programmable ray tracing shaders. The shader execution circuitry includes a plurality of single instruction multiple data (SIMD) execution units. Sorting circuitry regroups data associated with one or more of the programmable ray tracing shaders to increase occupancy for SIMD operations performed by the SIMD execution units; and fixed-function intersection circuitry coupled to the shader execution circuitry detects intersections between rays and bounding volume hierarchies (BVHs) and/or objects contained therein and to provide results indicating the intersections to the sorting circuitry. |
| US11120602B2 |
Acceleration of shader programs by compiler precision selection
Methods and devices for lowering precision of computations used in shader programs may include receiving program code for a shader program to use with a graphics processing unit (GPU) that supports half precision storage and arithmetic in shader programs. The methods and devices may include performing at least one pass on the program code to select a set of operations within the program code to lower a precision of a plurality of computations used by the set of operations and evaluating a risk of precision loss for lowering the precision to a half precision for each computation of the plurality of computations. The methods and devices may include generating edited program code by rewriting the computation to the half precision in response to the risk of precision loss being a precision loss threshold. |
| US11120586B2 |
Visualizing linear assets using client-side processing
A linear asset processing and managing system and method may include receiving a plurality of metrics associated with a linear asset segment from an asset management system over a network, in response to a request by the computing system to the asset management system, calculating an intermediate point on the geospatial context using a geometric analytic tool that analyzes the plurality of metrics received from the asset management system, determining a geospatial length of the linear asset segment, using the intermediate point and at least one metric of the plurality of metrics, and displaying the linear asset segment of the linear asset on the geospatial context. |
| US11120580B2 |
Systems and methods for determining dominant colors in an image
Systems and methods for determining a dominant color in a digital image are provided, including a computing device configured to analyze pixels in a first pixel group of a digital image based on a first sample rate, analyze pixels in a second pixel group of the digital image based on a second sample rate, and determine a dominant color for the digital image based on the analyzed pixels in the first pixel group and the analyzed pixels in the second pixel group. The pixels in the first pixel group are closer to a center of the digital image than the pixels in the second pixel group and the first sample rate is greater than the second sample rate. |
| US11120575B2 |
Method, apparatus and medium for object tracking
A method for object tracking includes: obtaining frames with a number of N of history images of the object; acquiring first predicted feature point information of each frame image by using first network models corresponding to each frame image in the frames with a number of N of history images, and acquiring second predicted feature point information of the each frame image by using second network models corresponding to each frame image; adjusting parameters of the first network model and parameters of the second network model based on the first predicted feature point information and the second predicted feature point information until the first network model and the second network model are trained completely; and performing tracking of the object by using the first completely trained network model and the second completely trained network model. |
| US11120573B2 |
Anchor recognition in reality system
A control method, suitable for head-mounted devices located in a physical environment, includes following operations. Images of the physical environment are captured over time by the head-mounted devices. Candidate objects and object features of the candidate objects are extracted from the images. Local determinations are generated about whether each of the candidate objects is fixed or not. The object features and the local determinations are shared between the head-mounted devices. An updated determination is generated about whether each of the candidate objects is fixed or not according to the local determinations shared between the head-mounted devices. |
| US11120572B2 |
Method, system and apparatus for associating a target object in images
Image association methods, systems and apparatuses are provided. The method includes: obtaining a first image and a second image, where the first image is obtained by capturing a scene by a first image capture device at a first view, the second image is obtained by synchronously capturing the scene by a second image capture device at a second view, and the first view is different from the second view; determining an epipole of the first image capture device on a plane of the second image; determining a projection point of a first target point in a first bounding box on the second image, where the first bounding box is a bounding box of a target in the first image; and determining an association bounding box of the first bounding box in the second image according to the epipole and the projection point. |
| US11120571B2 |
System for measuring deformations and a method for measuring deformations
A system is for measuring the deformations of at least one element of at least one examined construction, with at least one marker (1) fixedly attached to an element of the examined construction, at least one sensor (2) configured and programmed to record data related to the position of the marker (1) in the form of digital data, a processing unit (4) configured and programmed to process the data related to the position of the marker (1), connected communicatively to the sensor (2), preferably via a receiving unit (3), characterised in that the marker (1) comprises at least ten light-emitting characteristic points. A method is also provided for measuring the deformations of the examined construction implemented in such a system. |
| US11120559B2 |
Computer vision based monitoring system and method
A monitoring system includes sensors that monitor activity within a designated territory. The sensors include visual sensors that make video recordings. A local processing system located within or proximate to the designated territory receives signals from the sensors. The local processing system processes and analyzes the signals from the sensors to produce messages that describe activity within the designated territory as monitored by the sensors. The messages do not include audio, visual or other direct identifying information that directly reveal identity of persons within the designated territory. A monitoring station outside the designated territory receives the messages produced by the local processing system and makes the messages available to external observers. |
| US11120554B2 |
Image diagnosis apparatus, image diagnosis method, and program
An image diagnosis apparatus (10) performs a diagnosis assistance process using images (moving image) generated by an endoscope or the like. The image diagnosis apparatus (10) includes a first processing unit (110) and a second processing unit (120). The first processing unit (110) executes preprocessing of deciding whether or not a tumor judgment process is necessary with respect to each of a plurality of input images. The second processing unit (120) performs the tumor judgment process with respect to the input image for which it is decided that “the tumor judgment process is necessary” in the preprocessing executed by the first processing unit (110). |
| US11120551B2 |
Training a CNN with pseudo ground truth for CT artifact reduction
Training a CNN with pseudo ground truth for CT artifact reduction is described. An estimated ground truth apparatus is configured to generate an estimated ground truth image based, at least in part, on an initial CT image that includes an artifact. Feature addition circuitry is configured to add a respective feature to each of a number, N, copies of the estimated ground truth image to create the number, N, initial training images. A computed tomography (CT) simulation circuitry is configured to generate a plurality of simulated training CT images based, at least in part, on at least some of the N initial training images. An artifact reduction circuitry is configured to generate a plurality of input training CT images based, at least in part, on the simulated training CT images. A CNN training circuitry is configured to train the CNN based, at least in part, on the input training CT images and based, at least in part, on the initial training images. |
| US11120545B2 |
Method for measuring hole provided in workpiece
A method for measuring a hole provided in a workpiece is provided and the method comprises: obtaining a three-dimensional point cloud model of the workpiece and a two-dimensional image of the workpiece, defining a first contour in the three-dimensional point cloud model based on an intensity difference of the two-dimensional image, defining a second contour and a third contour respectively based in the first contour, bounding a data point testing region between the second contour and the third contour, respectively defining data point sampling regions along a plurality of cross-section directions of the data point testing region, respectively sampling data points in the data point sampling regions to obtain a turning point set comprising turning points, wherein each of the turning points has the largest turning margin, connecting the turning points which are distributed in the turning point set along a ring direction to obtain an edge of the hole. |
| US11120542B2 |
Wettability estimation by differential multi-phase simulation
Contact angles of multi-phase mixtures in a porous medium are determined by comparing images generated by flow simulations with a measured image of a fluid flow in the porous medium. A measured image can be compared image element by image element with corresponding locations in the flow simulations. A plurality of flow simulations associated with a corresponding plurality of contact angles is used for the comparison, and a contact angle associated with the greatest number of matches between the measured image and the flow simulation is selected. |
| US11120541B2 |
Determination device and determining method thereof
A determination device that determines quality of target portion based on sensor data obtained by a sensor measuring the target object, includes one or more processors configured to acquire sensor data representing the target portion, acquire information indicating a changed portion, determine whether the target portion includes the changed portion based on acquired information, determine a first label of the target portion represented in the sensor data by using a determination model learned from a training dataset based on training target portions, the first label representing target portion as one of good, defect, and a defect candidate, accept a second label of the target portion input via a user interface when the target portion includes the changed portion or when the first label of the target portion is determined as the defect candidate, and perform quality determination of the target portion based on the first label and/or the second label. |
| US11120535B2 |
Image processing method, apparatus, terminal, and storage medium
The present disclosure provides an image processing method, including: recognizing a source object in a source image, and determining, according to feature points of the source object, an orientation and a size of the source object; adjusting, according to matching relationships between the orientation and the size of the source object and the orientation and the size of the target object, the orientation and the size of the source object; adjusting a shape of the source object and a shape of the target object according to an average shape of the source object and an average shape of the target object; and fusing, in real time, the source image and the target image in a manner of aligning the shape of the source object with the shape of the target object. |
| US11120532B2 |
Methods for enhancing image contrast and related image processing systems thereof
An image processing method and corresponding system operate by obtaining a first image and generating a first histogram information based on the first image. The method then obtains a cumulative-distribution-function (CDF) curve according to the first histogram information and generates an adaptive curve according to a high-contrast curve and a low-contrast curve. Finally, the method uses the adaptive curve to adjust the CDF curve to generate a mapping curve, and adjusts the first image by using the mapping curve to generate a second image with contrast enhancement effect. |
| US11120528B1 |
Artificial aperture adjustment for synthetic depth of field rendering
This disclosure relates to various implementations that dynamically adjust one or more shallow depth of field (SDOF) parameters based on a designated, artificial aperture value. The implementations obtain a designated, artificial aperture value that modifies an initial aperture value for an image frame. The designated, artificial aperture value generates a determined amount of synthetically-produced blur within the image frame. The implementations determine an aperture adjustment factor based on the designated, artificial aperture value in relation to a default so-called “tuning aperture value” (for which the camera's operations may have been optimized). The implementations may then modify, based on the aperture adjustment factor, one or more SDOF parameters for an SDOF operation, which may, e.g., be configured to render a determined amount of synthetic bokeh within the image frame. In response the modified SDOF parameters, the implementations may render an updated image frame that corresponds to the designated, artificial aperture value. |
| US11120526B1 |
Deep feature generative adversarial neural networks
A mobile device can implement a neural network-based domain transfer scheme to modify an image in a first domain appearance to a second domain appearance. The domain transfer scheme can be configured to detect an object in the image, apply an effect to the image, and blend the image using color space adjustments and blending schemes to generate a realistic result image. The domain transfer scheme can further be configured to efficiently execute on the constrained device by removing operational layers based on resources available on the mobile device. |
| US11120523B1 |
Vehicle passenger detection system and method
A method and system for image processing of an image captured by an image-capturing device, can involve dividing a region of interest in an image into blocks, wherein the image is captured by an image-capturing device. The region of interest can be associated with one or more faces in the image, and a resulting division of the dividing of the region of interest may be non-uniform. A minimum block size can be defined and the coordinates of each block after dividing of the region of interest in the image into the blocks. The one or more faces in the image can be redacted and reconstructed using the coordinates. In addition, redacting and reconstructing of the image is reversible for use with detecting the one or more faces in the image. The coordinates can specify top left coordinates and bottom right coordinates of each block. |
| US11120522B2 |
System and method for efficient multi-GPU rendering of geometry by subdividing geometry
A method for graphics processing. The method including rendering graphics for an application using graphics processing units (GPUs). The method including using the plurality of GPUs in collaboration to render an image frame including a plurality of pieces of geometry. The method including during the rendering of the image frame, subdividing one or more of the plurality of pieces of geometry into smaller pieces, and dividing the responsibility for rendering these smaller portions of geometry among the plurality of GPUs, wherein each of the smaller portions of geometry is processed by a corresponding GPU. The method including for those pieces of geometry that are not subdivided, dividing the responsibility for rendering the pieces of geometry among the plurality of GPUs, wherein each of these pieces of geometry is processed by a corresponding GPU. |
| US11120519B2 |
Digital identity
A digital identity, which may include a user interface that may be displayed on a mobile computing device, may be generated to include information extracted from a physical identification card (e.g., driver license or passport), as well as information regarding validation of the physical identification card and of the consumer's identity. The digital identity may be used in place of the physical identification card. |
| US11120511B2 |
System and method for universal card acceptance
A method, electronic device, and non-transitory computer readable medium for transmitting information is provided. The method includes creating a card network account for each card network of a plurality of card networks. The method also includes associating with a digital card the created card network accounts and providing to at least one of the card network accounts an account balance of the digital card. Additionally, the method includes receiving, from a mobile device, a selection of the digital card to conduct a transaction at a location. The method also includes providing a suggested card network, determined from the plurality of card networks, to the mobile device, to conduct the transaction. The suggested card network is based in part on which card networks accepted at the location. The method also includes updating the account balance of the digital card on completion of the transaction. |
| US11120510B1 |
Methods and systems to automatically generate insurance policy data based upon life event data
Methods and systems are provided to automatically generate insurance policy data and/or update insurance policies. More particularly, methods and systems are provided to automatically generate insurance policy data and/or update insurance policies based upon life events and/or life event data. The life events and/or life event data may be representative of personal changes and/or life events (e.g., marriage; child birth; divorce; personal injury; purchase of a house; purchase of a vehicle; adoption; move to a different home, apartment, or state; employment change; health change; etc.) related to an insured person. The life events and/or life event data may automatically lead to providing insurance recommendations and/or adjusting insurance policies that provide insurance-based cost savings to insurance customers, more appropriate insurance coverage given the new circumstances, and/or enhance the customer experience. The insurance policies may be auto, home, renters, personal articles, life, health, pet, and/or other types of insurance policies. |
| US11120507B2 |
Confirmation and rating of user generated activities
A method allows third party authentication of confirmation of an activity performed by a user of a computing device that receives first and second datasets of values for a plurality of attributes respectively obtained from a plurality of sensors associated with the computing device. The first and second datasets reflect a user activity obtained over first and second periods of time, respectively, during which the activity occurs. The computing device compares a subset of the attribute values in the first dataset to their corresponding attribute values in the second dataset to confirm whether they match to within a prescribed degree. If the matching is confirmed, a representation is created of an indicia of the confirmation and a set of cryptographic objects is derived from the representation such that a third party is able to authenticate the confirmation without being able to derive the first or second datasets. |
| US11120505B2 |
Image analysis system for verification of property roof damage
A system processes a set of images to verify whether the images depict a type of property damage, such as hail damage from a hail storm. The system receives digital images of a roof or other facet of the property that were taken by an image capturing device after the storm event. The system also receives storm data relating to the storm event and claim data related to a property damage claim. The system uses the claim data to process the digital images to automatically identify damage to the roof or other facet. The system then analyzes the storm data to determine whether the damage is consistent with an actual, naturally-occurring storm event, and it generates a report depicting its findings. |
| US11120502B2 |
Transaction effects
A method comprising creating and storing, in computer memory, a financial graph having nodes and edges, wherein the nodes include first nodes representing assets and second nodes representing any one or more of accounts in which one or more of the assets are held, individuals who own one or more of the assets, or legal entities who own one or more of the assets; obtaining, from an asset custodian data source, asset transaction data associated with one or more of the assets represented by the first nodes of the financial graph; transforming the asset transaction data into one or more stored transaction objects, wherein each transaction object is associated with a plurality of transaction effect objects; wherein each of the plurality of transaction effect objects is associated with a particular edge in the financial graph and represents one of a credit to an account type associated with the particular edge and a debit from an account type associated with the particular edge. |
| US11120500B2 |
Inter-product matrix
Lists of tradeable objects may be generated and displayed to enable a user to define a trading strategy having multiple legs. The lists of tradeable objects may be used to define and display different combinations of the tradeable objects that are included in each of the lists. Each combination of tradeable objects may define the different legs of a spread that may be tradeable on one or more exchanges. A combination of tradeable objects may be selected to display contract information associated with the different legs of the spread. The contract information for each leg may be used to define and display spread information for the legs of the trading strategy. The spread information may allow the user to view information related to the spreads for different combinations of tradeable objects in a display. |
| US11120499B2 |
Systems and methods for trading actively managed funds
Systems and methods for improved intra-day valuations of a first portfolio are disclosed herein. Operations include receiving a listing of first identities for a first set of securities of a first portfolio, generating, a second portfolio configured to track the first portfolio, where the second portfolio has second identities that are identical to the first identities and a second set of weightings, calculating an intra-day value for the first portfolio by applying price feed information to the second portfolio in accordance with the second set of weightings, and publicizing the calculated intra-day value for the first portfolio without disclosing a first set of weightings corresponding to the first portfolio. |
| US11120498B2 |
Computer-implemented systems and methods for real-time risk-informed return item collection using an automated kiosk
Disclosed embodiments provide systems and methods related to collecting return items using an automated kiosk based on a real time risk decision. The automated kiosk captures return item information representing a return item and transmits the return item information and a request for return risk level relating to the return item to a server operable to execute a machine learning model trained on historical information to determine the risk level. The server determines the risk level based on the received return by using the machine learning model and transmits the determined risk level to the kiosk in real-time. Based on the determined risk level and a return amount associated with the return item, the server may also process a refund in real-time. |
| US11120495B2 |
Generating virtual makeup products
Techniques are described for generating virtual makeup products. Virtual makeup products, in this context, may include a predefined effect and a configuration for the effect, wherein the predefined effect includes one or more layered visual filters. In an embodiment, a system in accordance with the present disclosure may acquire makeup product definition data based on characteristics of a real-world makeup product from an entity associated with the real-world product such as a designer, manufacturer, or vendor. Using the makeup product definition data, the system may generate a virtual makeup product includes a configuration of a predefined effect based on the acquired product definition data. The generated virtual makeup product is then passed through a process of internal calibration, internal review, and external review to improve the accuracy of the simulation of the real-world makeup product. In some embodiments, external review is performed by an external reviewing entity (e.g., a designer, manufacturer, or vendor) by using a validation application. |
| US11120494B2 |
Method for dynamic identification of goods and services
A method of dynamically promoting goods and services by providing a display device having an embedded algorithm to make queries to a customer that would commence upon entering a contained environment that would narrowly and effectively communicate promotions of goods and services that are personal and individualized to the consumer is disclosed. |
| US11120488B2 |
System and method for automated network trading platform
A system for trading items comprising a server and user machines connected by a network. The system receives item information and locates available items. The system receives trade relationships and generates trade circles. The system identifies an optimum trade circle solution and causes the exchange of items identified in the optimum trade circle solution. |
| US11120485B2 |
Application purchasing
The present technology provides a purchasing interface within an application that allows users to purchase a product from another source without leaving the application. The application offers a product for purchase, and a user, desiring to purchase the product can provide an input effective to cause a purchasing interface to be displayed. While the purchasing interface, or information presented therein, comes from the product source, which is different than the application source, it is presented in such a fashion that gives the impression to the user that they are purchasing the product directly from the application. |
| US11120483B1 |
Affiliate-based exchange and resource routing
In accordance with one or more aspects, service requesters (e.g., advertisers) and/or affiliates (e.g., providing data traffic) may be set up for operation on a performance exchange. In accordance with other aspects, performance and monitoring may be carried out for such advertisers and/or affiliates. In some embodiments, routing criteria is established for affiliates, and may include information for selecting data traffic resources such as advertisements and network links, to be routed by the affiliates for providing data traffic over disparate networks. Requests for distribution of the data traffic resources (e.g., advertisements, links for obtaining the data traffic) are received and a routing option is selected for the requests based on the routing criteria for affiliates and criteria associated with a service requester from which the request is received. The routing option may specify one or more affiliates via which the data traffic resources are to be routed. |
| US11120481B2 |
Predictive adjusted bidding for electronic advertisements
Methods and systems are described herein for predictive adjusted bidding for electronic advertisements. A bid determination computing device receives, from an ad exchange computing device, a bid request for an available underlying impression opportunity. The bid determination device determines an opportunity value estimate for the impression opportunity based upon the bid request, and determines a probability of a submission of one or more other bid requests for the same impression opportunity by the same ad exchange device or by one or more other ad exchange devices. When the determined probability indicates a submission of one or more other bid requests for the same impression opportunity, the bid determination device adjusts the opportunity value estimate for the impression opportunity based upon the determined probability and transmits the opportunity value estimate to the ad exchange device in response to the bid request. |
| US11120477B2 |
System and method for personalized preference optimization
A system and method is provided for using biometric data from an individual to determine at least one emotion, mood, physical state, or mental state (“state”) of the individual, which is then used, either alone or together with other data, to provide the individual with certain web-based data. In one embodiment of the present invention, a Web host is in communication with at least one network device, where each network device is operated by an individual and is configured to communicate biometric data of the individual to the Web host. The Web host is then configured to use the biometric data to determine at least one state of the individual. The determined state, either alone or together with other data (e.g., interest data), is then used to provide the individual with certain content (e.g., web-based data) or to perform a particular action. |
| US11120476B2 |
Systems and methods for generating personalized advertisements
In an aspect of the disclosure, a method, a computer-readable medium, and an apparatus are provided. The apparatus may receive digital data associated with digital media communications. The apparatus may input the textual data into a NLP model. The apparatus may obtain intent data associated with an item as an output of the NLP model. The apparatus may input the intent data into a tagging model. The apparatus may obtain an attribute tag as an output of the tagging model. The apparatus may determine whether the intent data meets a likelihood threshold. The apparatus may determine whether the attribute tag meet a relevance threshold. The apparatus may output the intent data and the attribute tag to an external device upon determining that the intent data meets the likelihood threshold and that the attribute tag meets the relevance threshold. |
| US11120475B2 |
Systems and methods for ad-supported mobile data plans or in-app purchases
Methods are disclosed for providing an ad-supported mobile data plan, where ad display may be tied to data usage levels and user input. A method includes receiving, using at least one processor, user interaction with advertisement content displayed on a device; retrieving, using the at least one processor, a data usage limit associated with the device; and causing a change in the data usage limit based on the user interaction with the advertisement content displayed on the device. |
| US11120473B2 |
Geographic and keyword context in embedded applications
A computer-implemented method includes generating, using an embedded client application, a keyword context for a container document holding the embedded client application; generating, using the embedded client application, a geographic context associated with a device on which the container document is displayed; submitting the keyword context and the geographic context to a remote server; and displaying an interactive application using information obtained in response to the submission of the keyword context and geographic criteria. |
| US11120467B2 |
Systems and methods for predicting and pricing of gross rating point scores by modeling viewer data
Systems and methods are disclosed for characterizing websites and viewers, for predicting GRPs (Gross Rating Points) for online advertising media campaigns, and for pricing media campaigns according to GRPs delivered as opposed to impressions delivered. To predict GRPs for a campaign, systems and methods are disclosed for first characterizing polarized websites and then characterizing polarized viewers. To accomplish this, a truth set of viewers with known characteristics is first established and then compared with historic and current media viewing activity to determine a degree of polarity for different Media Properties (MPs)—typically websites offering ads—with respect to gender and age bias. A broader base of polarized viewers is then characterized for age and gender bias, and their propensity to visit a polarized MP is rated. Based on observed and calculated parameters, a GRP total is then predicted and priced to a client/advertiser for an online ad campaign. |
| US11120466B2 |
Deal scoring system and method
Prospective deals for a deal vendor's deal inventory may be scored according to one or more population-specific expected-yield scores, such as expected revenue yield, expected new customers yield, and the like. A prospective deal is categorized and characterized according to a number of yield-related characteristics. Some or all of the prospective deal's characteristics are mapped to yield components derived from completed deals that have been offered to a particular population. An expected-yield score for a prospective deal with regard to that population is obtained by combining the mapped yield components. |
| US11120465B1 |
Omni-channel digital coupon clipping and redemption
An omni-channel coupon system may link electronic coupons across several couponing channels by storing the electronic coupons in association with a user profile or loyalty account. A user may clip electronic coupons from several couponing channels, such as a mobile application, retail web page, social networking web page, email, short message service (SMS) message, a physical coupon, a manufacturer/third-party web page or other affiliated web page, a manufacturer/third-party application, etc. Each clipped electronic coupon may be stored with a user profile for the user. When the user purchases products or items at an online or retail store, the electronic coupons may be retrieved from the user profile and redeemed. |
| US11120461B1 |
Passive user-generated coupon submission
Successful application of a coupon code on an e-commerce website is detected via network request tracking and page data tracking. Upon coupon application, the coupon code is stored, for example in a server-based database. The coupon code is then automatically applied to subsequent e-commerce purchases whose parameters match the requirements for the coupon. The coupon can be automatically applied to purchases made by the same user and/or other users, as applicable. |
| US11120456B2 |
Authentication systems and methods for generating flight regulations
Systems and methods for UAV safety are provided. An authentication system may be used to confirm UAV and/or user identity and provide secured communications between users and UAVs. The UAVs may operate in accordance with a set of flight regulations. The set of flight regulations may be associated with a geo-fencing device in the vicinity of the UAV. |
| US11120451B2 |
System and method for mobile express return of products
Systems and methods for mobile-initiated in-store return of products are provided. An example system can include: an Order Management Module (OMM) configured to store in a first database completed transactions and associated electronic receipts for customers; a mobile device having a mobile application installed thereon and configured to query and receive from the OMM selection of products for return; a Return Management Module (RMM) configured to apply rules to validate the return based on the information about the selected product; and a return station configured to verify and complete the return. |
| US11120443B2 |
Browser extension with additional capabilities
In one aspect, an expedited payment service is accessed through a browser extension. As an extension operates in a manner in which it has access to the underlying merchant data, the extension may allow an expedited payment service to work with virtually any merchant web site. |
| US11120441B2 |
Apparatus, method, and computer program product for providing a quality control mechanism for the contactless interface of a dual-interface card
Techniques for enabling performance of a quality control function on the contactless interface while the contactless interface is disabled are provided. The techniques include implementing, on a dual-interface payment device, one or more security mechanisms, wherein the dual-interface payment device comprises a first interface and a second interface, using the one or more security mechanisms to prevent a subset of data corresponding to the first interface from being read using the second interface while allowing data corresponding to the second interface to be read using the first interface, and personalizing the dual-interface payment device and the one or more security mechanisms according to one or more requirements of an issuer of the dual-interface payment device. |
| US11120437B2 |
Registry and automated management method for blockchain-enforced smart contracts
The invention relates to the fields of tokenisation, blockchain and smart contract technologies. It provides a technical arrangement which simplifies the automated management of contracts. The invention comprises a method and system which use a computer-based repository for storage of the contract. The contract is then represented by a transaction on the blockchain. Metadata within the transaction's script includes a hash of the contract and a means of identifying its location within the repository. The transaction also includes an unspent output (UTXO) which indicates its status as an open (ie not terminated) contract. The contract is terminated by spending the output at a later point in time, for example, using n Lock Time+Check Lock Time Verify (CLTV). By combining this concept with other techniques and computing components, the invention can provide a powerful mechanism for implementing various tasks such as renewing or rolling over the contract, or dividing it into sub-contracts or conditions. Furthermore, as the status and existence of the contract is evidence via the blockchain, this provides a permanent, publicly visible and non-alterable record of the contract. |
| US11120436B2 |
Authentication system and method for server-based payments
A method of performing a payment transaction employing a two-factor authentication mechanism. The method includes engaging in cryptographic processing with a cryptographic function having a secret key encoded therein. The cryptographic function is stored in a computing device. The secret key serves as a first authentication factor. The method further includes utilizing a second authentication factor in performing the payment transaction. |
| US11120435B2 |
Multi-signature verification network
Systems and methods for authorizing a blockchain transaction. A verification network receives a transaction request for the blockchain transaction from a payer device including a first signature generated by a first private key associated with a payer. The verification network broadcasts a verification request to verification system(s) which assess pre-agreed threshold parameters. If the parameter(s) are satisfied, at least one verification system perfects the transaction by generating a second signature using a second private key, and broadcasts the transaction to the blockchain network. If the parameter(s) are not satisfied, verification offer(s) from among the verification system(s) including the second signature(s) are used to prompt the payer device to confirm the blockchain transaction by selecting at least one of the offer(s). The verification network receives selected offer(s) from the payer device and broadcasts the transaction to the blockchain network, in accordance with the selected offer(s) and the transaction request. |
| US11120434B2 |
System and method for securing transaction in a blockchain network
A method for securing transaction in a blockchain network and a related system with a blockchain network. The blockchain network has information handling devices operably connected with each other. The information handling devices collectively maintain a blockchain ledger containing one or more transaction blocks with transaction information. The method includes validating a new transaction request to be added to the blockchain ledger. The validation includes digitally signing, at two or more of the information handling devices in the blockchain network, respectively, an interim block associated with the new transaction request, using a HASH value of the interim block and respective private keys of the two or more of the information handling devices. The method also includes verifying the one or more signed interim blocks for determining whether to add to the blockchain ledger a new transaction block containing the validated new transaction request and the at least two digital signatures. |
| US11120428B2 |
Stored value card kiosk system and method
A stored value card activation system includes a server in communication with one or more computing devices configured in kiosks. The server receives stored value card type information associated with one of multiple non-activated stored value cards from the computing device. The server also receives monetary amount information to be associated with the selected stored value card from the kiosk, and payment information from a user of the kiosk. From this information, the server conducts a financial transaction with a financial account server associated with an account of the user, and activates the selected stored value card in accordance with the financial transaction. |
| US11120426B1 |
Payment card with budget display
Various examples are directed to payment cards with budget displays including systems and methods for using the same. A payment card may comprise a display and a control circuit. The control circuit may display, at the display of the payment card, a first display state indicating a first unused portion of a budget amount for a current budget period. The control circuit may access first budget status data generated in response to a transaction made with the payment card and modify the display to display a second display state indicating a second unused portion of the budget amount for the current budget period, wherein the second unused portion is based at least in part on the transaction. |
| US11120425B2 |
Generating a sensory indication
A system and method is provided for generating a sensory indication on a transaction card, whereby a user is rewarded with a visual, audial, haptic, or olfactory experience. The method comprises executing a purchase transaction on the card, the transaction relating to an event, charging a power source on the card, receiving an input signal by the card, the signal. indicating an output indication relevant to the event, and generating an output signal using power from the power source, based on the input signal. The card comprises a security component enabling a purchase relating to an event, a power source receiving charging energy at the time of the purchase, an input component receiving an input signal comprising information specifying a desired indication relevant to the event, an output component for generating the desired indication, one or more memories storing instructions and one or more processors executing the instructions to perform the method. |
| US11120423B2 |
Secure data submission via audio transmission
Techniques for managing communications sessions between multiple user devices is provided. The computer system may support a capability of automatically establishing communications sessions between the user devices. For example, the computer system may receive audio data from a voice controlled device (VCD). The audio data may indicate an utterance of a user confirming that information of a payment instrument is needed for transaction. The computer system may initiate a second communications session with a second device of the user to receive the information required for the transaction. In some examples, the computer system may execute the script to synthesize text-to-speech content that requests user input for the information from the second device. Once received, the information may be stored in a user account associated with the user. The VCD may be instructed to resume communications with the user upon termination of the second communications session with the second device. |
| US11120420B2 |
Mobile on-card in-app commerce
At least one next-action relevant to a publisher application and at least one service provider application associated with the at least one next-action is received at the publisher application and from a backend service. The at least one next-action is rendered, where a user's interaction with the rendered at least one next-action enables the user to preview inventory information from the at least one service provider application and to place an order. Payment information of the user is received at the publisher application and from a payment provider. The order and the payment information is sent to the service provider application though the backend service, and a status of the order is presented to the user. |
| US11120419B1 |
Prescient and adaptive point-of-sale systems
Systems, apparatus, methods, and non-transitory media for providing prescient and adaptive point-of-sale services via electronic networks are discussed herein. Some embodiments may include a system with one or more servers. The one or more servers may be configured to generate digital consumer tokens and provide the digital consumer tokens to consumer devices for sharing with merchant devices. When a merchant device receives the digital consumer token, the merchant device may forward the digital consumer token to the one or more servers in exchange for consumer data to facilitate consumer service. In some embodiments, the one or more servers may be configured to provide point-of-sale interfaces that adapt to different consumer preferences or consumer device signals. Some embodiments may provide for consumer interfaces that allow consumers to manage their electronic identity at various (e.g., merchant) locations. |
| US11120418B2 |
Systems and methods for managing a payment terminal via a web browser
The present disclosure relates generally to communication with payment terminals via TCP/IP protocol. Using network technology and novel processes, in particular embodiments, the present systems and methods facilitate local network discovery and communication between a payment terminal and an electronic cash register (“ECR”) via a browser. For example, in certain embodiments, the present systems and methods leverage TCP/IP network technology to securely facilitate communications between SaaS ECR software running in a browser environment and one or more payment terminals. |
| US11120417B2 |
System and method for linking point of sale devices within a virtual network
A system and method for interconnecting multiple point of sale devices creating a mesh-like network structure which reduces connectivity costs while providing greater reliability due to multiple network paths is disclosed. By linking point of sale devices within a virtual network, the need for individual connections to a point of sale controller is eliminated and alternative network paths are provided, thereby ensuring maximum up-time and optimal connection speeds. |
| US11120415B2 |
System and method for a distributed data management system
A distributed data management system is described. Document images stored by a first computing system may be retrieved by a broker system communicating with a user's mobile device that is interacting with a second computing system. The retrieved document images may be transmitted by the broker system for integration into a graphical user interface of the second computing system. |
| US11120414B1 |
Systems and methods for facilitating transactions between payers and merchants
A computer-implemented method for facilitating a transaction between a payer and a merchant comprises identifying one or more merchants that are at or in proximity to a geolocation of the payer, and providing the payer a reward, notification or a reminder of a stored value associated with a merchant to apply to a transaction with the merchant. The reward, notification or reminder of the stored value can be provided based on an inference of intent of the payer to conduct a transaction with the merchant. A request to conduct a transaction with the merchant is received from the payer. The transaction between the payer and the merchant is processed with the reward or stored value applied thereto. A notification can be sent to the payer alerting the payer to a discounted item or proximity of the payer to an item and/or merchant they have saved to a list. |
| US11120413B2 |
Monetary transaction system
Embodiments are directed to monetary transaction system for conducting monetary transactions between transaction system subscribers and other entities. In one scenario, the monetary transaction system includes a mobile device that runs a monetary transaction system application. The monetary transaction system also includes a subscriber that has a profile with the system. The subscriber indicates a transaction that is to be performed with the monetary transaction system. The system further includes a monetary transaction system processor that performs the transactions specified by the subscriber including communicating with a monetary transaction database to determine whether the transaction is permissible based on data indicated in the subscriber's profile. The monetary transaction system also includes at least one entity that is to be involved in the specified transaction, where the entity has a profile with the monetary transaction system. This entity may be a person, a retail store, an agent or other entity. |
| US11120412B2 |
Systems and methods for second tap e-receipt option for NFC-enabled payment vehicles
Systems and methods are disclosed for generating electronic receipts (e-receipts) at point-of-sale (POS) terminals associated with a merchant at a retail location. The systems and methods include a near field communication (NFC) reader and an NFC-enabled payment vehicle. A POS terminal processes a payment transaction after an initial interaction between the NFC reader and the NFC-enabled payment vehicle. An e-receipt is generated when a second interaction is detected between the NFC reader and the NFC-enabled payment vehicle. |
| US11120410B2 |
Communication systems for multi-source robot control
A service robot may be autonomous, with respect to a portion of a customer service task, and coordinated, with respect to another portion of a customer service task. A resource, such as another robot or an agent (human or automated), may monitor or interact with the robot and, in such a combination, perform a customer service task. The robot may be instructed to pause or delay initiation of a robot portion to allow for a resource to become available at a common time that the interaction portion is to be performed to minimize delay and promote better customer service. Should the delay be beyond an acceptable threshold, the robot may engage in a delay task (e.g., slow down, pause, etc.). The delay task may include a social interaction with a human at a service location. |