| Document | Document Title |
|---|---|
| US11122220B2 |
Augmented video reality
At an electronic device coupled to a display, a communication interface, and a first image sensor, first image data is captured from the first image sensor. Second image data is received over the communication interface from a first remote device. The display displays a portion of the second image data with a portion of the first image data. The displayed portion of the second image data obscures some of the first image data. |
| US11122219B2 |
Mid-span device and system
A video processing device which can be implemented as a peripheral device is disclosed. The video processing device is configured to receive one or more videos and audio through a plurality interfaces. Further, the device receives one or more user input corresponding to one or more customization requests of the received video and the audio. The video processing device processes the video and the audio based on the received user input and outputs the processed video and audio via an output interface. |
| US11122218B2 |
Processing and formatting video for interactive presentation
Systems and methods are described for determining that the user interaction with a display of a computing device during display of a video comprising a sequence of frames indicates a region of interest in a current frame of the sequence of frames of the displayed video. For each frame of the sequence of frames after the current frame, the frame is cropped to generate a cropped frame comprising a portion of the frame including the region of interest in the frame, the cropped frame is enlarged based on a display size corresponding to an angle or orientation of the computing device during display of the video, and the enlarged cropped frame replaces the frame such that the enlarged cropped frame is displayed in the sequence of frames of the video on the display of the computing device instead of the frame. |
| US11122212B2 |
Image recording method and image recording apparatus
An image recording method (2) and an image recording apparatus (1) are provided for recording a sequence of individual images of a scene (3), wherein, in a first control loop (6), an exposure parameter (8) is set in dependence on a respective brightness value (21) of an individual image, wherein the scene (3) is illuminated using an illumination device (4), wherein, in a second control loop (7), a maximum value (10) of a control range (9) of the exposure parameter (8) in the first control loop (6) is set, wherein the setting of the maximum value (10) is effected in dependence on an exposure variable (11), which indirectly stands for an expected quantity of light incident on an image sensor. |
| US11122208B2 |
Monitoring system
A monitoring system detects an event happening to a detection target, and includes imaging devices, storage, and a controller. The imaging devices each capture an image of an imaging area including the detection target to generate captured image data indicating a captured image. The storage stores therein a detection range in the captured image. The controller detects a change to the captured image in the detection range based on the captured image data. The controller determines one of the imaging devices that has provided a captured image whose image exhibiting a portion of the detection target has a larger area among the captured images to be a main imaging device. Upon detecting a change to a captured image in the detection range captured by the main imaging device, the controller changes the detection range of the main imaging device so that the detection range encloses the detection target image. |
| US11122202B2 |
Imaging device, image processing system, and image processing method
An imaging device includes a plurality of image sensors configured to capture a plurality of images, and processing circuitry. The processing circuitry is configured to determine whether a difference in brightness between the plurality of images exceeds a predetermined threshold. Based on a determination that the difference in brightness exceeds the predetermined threshold, the processing circuitry arranges the plurality of images side by side in one direction to be output as an output image. |
| US11122200B2 |
Supplying content aware photo filters
A server includes a photo filter module with instructions executed by a processor to identify when a client device captures a photograph. Photograph filters are selected based upon attributes of the client device and attributes of the photograph. The photograph filters are supplied to the client device. |
| US11122198B2 |
Adjusting image capture parameters via machine learning
Techniques are described with respect to adjusting image capture parameters. An associated method includes constructing an image capture learning model based upon data collection. The method further includes receiving, via at least one lens of an image capture device, at least one captured image from a client and parsing the at least one captured image to identify a plurality of discrete objects. The method further includes assigning a relevancy score to each of the plurality of discrete objects in the at least one captured image based upon analysis of a plurality of contextual inputs in view of the image capture learning model and determining at least one captured image modification option. Each of the at least one captured image modification option includes at least one photographic adjustment to the plurality of discrete objects in the at least one captured image based upon assigned relevancy score. |
| US11122195B2 |
Camera parameter estimation device, method, and program
A projection image generation unit 81 applies a plurality of projection schemes that use the radius of a visual field region of a fisheye-lens camera to an image in which an object including a straight line is imaged by the fisheye-lens camera, and generates a plurality of projection images. A projection scheme determination unit 82 selects one of the plurality of projection images on the basis of the linearity of each of the straight lines included in the projection images and determines a projection scheme on the basis of the selected projection image. An output unit 83 outputs an internal parameter of the fisheye-lens camera that corresponds to the determined projection scheme. |
| US11122193B2 |
Focusing lighting module
A lighting module which provides adjustably controllable illumination of a camera field of view of a camera module includes an adjustable collimator which can be adjustably positioned such that the emitted light beam is adjustably directed to illuminate various regions of various camera fields of view. The collimator can be adjusted via an actuator which adjustably positions the collimator relative to static components of the lighting module, including the light emitter. The light beam can be directed to illuminate a selected limited region of a camera field of view, based on identification of a subject within the limited region. The light beam can be adjustably directed based on user interactions with a user interface, including adjusting the light beam according to user-commanded beam angle, intensity, and direction. The light beam can be adjustably directed to illuminate a region according to different fields of view of different camera modules. |
| US11122192B2 |
Dome camera
A camera comprising a housing, a lens, a lens holder and an image sensor is provided. The image sensor is supported by the lens holder. The lens holder comprises a through-going channel configured to coaxially and lockably receive the lens in a position in which a rear end of the lens faces the image sensor. The lens holder is spring loaded in relation to the housing by an elastic member arranged in a position between the housing and the lens holder into a position in which a front portion of the lens is forced into abutment with a first lens stop arranged in the housing, thereby providing a fixed axial distance between a front end of the lens and a front end of the housing. |
| US11122190B2 |
Image pickup apparatus with movable unit and control unit connected together by flexible boards
An image pickup apparatus which makes the load applied to a movable unit when it is displaced nearly uniform. The movable unit controlled by a control unit is capable of being in at least a predetermined direction. A first flexible board has a first connecting portion connected to the movable unit, a first wiring portion extended from the first connecting portion in a first direction different from a direction of an optical axis, and a second connecting portion placed at an end of the first wiring portion and connected to the control unit. A second flexible board has a third connecting portion connected to the movable unit, a second wiring portion extended from the third connecting portion in a second direction different from the direction of the optical axis, and a fourth connecting portion placed at an end of the second wiring portion and connected to the control unit. |
| US11122189B2 |
Wildlife camera with EMF shielding
The present invention is directed to a wildlife surveillance camera comprising EMF shielding material that substantially reduces the electromagnetic field generated by said camera. |
| US11122187B2 |
Transmitter, receiver, transmitter/receiver, and transmitting/receiving system
This embodiment relates to a transmitter and the like that prevent an increase of the number of cables of an external interface even when the types of signals to be transmitted increase. The transmitter includes a latch circuit, an encoder, a serializer, and a selector. The latch circuit keeps a level of each of a plurality of signals at the timing specified by a sampling clock, and then, outputs the plurality of signals as a parallel data signal. The encoder generates an encoded parallel data signal based on the parallel data signal from the latch circuit. The serializer generates a serial data signal based on the encoded parallel data signal from the encoder. The sampling clock has a frequency higher than a transmission rate of the fastest signal of the plurality of signals. |
| US11122184B2 |
Image forming apparatus and data protection method to avoid data corruption or damage to a storage device
An image forming apparatus including a storage device storing, from among data to be retained when the power is shut off, either or both of important protection data, being a type determined to be important in advance, and protection data, to be retained when the power is shut off other than the important protection data, at respective predetermined timings. A detection information acquirer receives detection information from a sensor detecting at least one of: a change in either or both of direction and tilt, vibration, a predetermined operation, an approaching person, a person entering a room, and a person entering a predetermined area. A protection processor starts processing for writing either or both of the important protection data and the protection data into the storage device in response to the detection information received by the detection information acquirer, at timings different from the predetermined timings. |
| US11122182B2 |
Information processing apparatus, storage medium, and control method with voice instruction to peform print settings operation
An information processing apparatus includes a first setting unit and a display control unit. The first setting unit sets a screen reader function to enabled or disabled based on a user instruction. The display control unit performs control to display, after an application installed in the information processing apparatus is started up, a screen regarding a specific function on a display unit where an operation for using the specific function of the application has been received. The display control unit performs control to display a first screen on the display unit as the screen regarding the specific function when the screen reader function is set to disabled, and displays, as the screen, a second screen having a display configuration different from the first screen and including predetermined information as information useful for a visually impaired person regarding the specific function when the screen reader function is set to enabled. |
| US11122181B2 |
Non-transitory computer-readable recording medium storing computer-executable instructions and setup system for selecting a device
A PC APP is configured to cause an information processing apparatus to perform a determining process of determining a device, a setting process of setting the device determined by the determining process as a selected device of the information processing apparatus, a detecting process of detecting that the selected device set to an other information processing apparatus has been changed from a first device to a second device, a changed device information obtaining process of, when detecting the change of the selected device set to the other information processing apparatus by the detecting process, obtaining device information indicating the second device from the other information processing apparatus, and a setting changing process of changing the selected device of the information processing apparatus to the second device indicated by the device information obtained by the changed device information obtaining process. |
| US11122180B2 |
Systems, methods, apparatuses, and computer-readable storage media for collecting color information about an object undergoing a 3D scan
A method of performing a three-dimensional (3D) scan of an object includes applying an optical contrast powder to the object and illuminating the object with light. First and second two-dimensional (2D) color image data corresponding to the object is generated. First and second 2D monochrome image data corresponding to the object is generated using the first and second 2D color image data. 3D data corresponding to the object is generated using the first and second monochrome 2D image data. Color 3D image data corresponding to the object is generated by adding color information to the 3D data. The color 3D image data is displayed. |
| US11122179B2 |
Image processing apparatus and non-transitory computer readable medium
An image processing apparatus includes a display control unit that displays, on a display unit, a first area, in which a display image generated from print data included in a print job subjected to printing performed by an image forming apparatus is to be disposed, a second area, which corresponds to a recording medium on which an image to be printed corresponding to the display image is recorded and in which the display image is to be disposed, and a third area, which corresponds to a background of the recording medium and includes the second area, an identification unit that identifies a color of the recording medium specified by attribute information that specifies a process performed by the image forming apparatus in accordance with the print job, a setting unit that sets a background image of the recording medium, and a generation unit that generates the display image. |
| US11122178B2 |
Image forming apparatus improved in setting process for recording medium, method of controlling the same, and storage medium
An image forming apparatus improved in a setting process for a recording medium to thereby make it possible to prevent print processing from failing to be executed. In the image forming apparatus including a plurality of sheet feeders for storing recording sheets, when recording sheets are stored in one of the sheet feeders, at least one of the recording sheets is conveyed from the corresponding sheet feeder, and the type of the conveyed recording sheet is identified. Then, the identified type of the recording sheet is set as the type of the stored recording sheets. This makes it possible to prevent occurrence of a situation in which print processing is not executed because the identified type of the recording sheet does not match the set type of the recording sheets, whereby it is possible to prevent print processing from failing to be executed. |
| US11122172B2 |
Control apparatus, image forming system and program
A control apparatus may cause an image forming apparatus to execute processing based on contents of the processing instructed by voice. The control apparatus includes a hardware processor that may: cause a display apparatus of the image forming apparatus to display the contents of the processing prior to execution of the processing; acquire an operating state of the display apparatus; and decide contents of voice to be outputted to promote confirmation of the contents of the processing in accordance with the acquired operating state of the display apparatus. |
| US11122170B2 |
Information processing apparatus, control method for information processing apparatus, and program
An information processing apparatus is provided and includes a display unit which displays an operation screen. The information processing apparatus controls whether or not to receive setting for a first application from a different apparatus and use the received setting for the first application, in accordance with a type of a screen being displayed on the display unit. |
| US11122166B1 |
Server generated timing of location updates for call routing decisions
A data-communications (e.g. VoIP-type) server is configured to provide data-communications services such as VoIP services to a plurality of endpoint devices. The server receives, from applications running on the endpoint devices, location updates identifying geographic locations of the endpoint devices. The server may modify a location database to include entries specifying the geographic locations of the endpoint devices. Data/telephone calls are routed based upon the entries specifying geographic locations of the plurality of endpoint devices. Based upon input parameters, a set of periodic update timings are generated and sent to the endpoint devices. |
| US11122164B2 |
Method for providing remote assistance services using mixed and/or augmented reality visors and system for implementing it
A system for providing remote assistance services using mixed and/or augmented reality visors includes the following apparatuses in combination: one or more smartphones/tablets of each user who requests assistance, connectable to any mixed/augmented reality visor on which a specific app is installed; one or more operator stations with PC/tablet configured to be able to communicate in real time with the devices of the user requesting assistance; at least one server configured to manage a database and to be connectable to and interfaceable with the smartphones/tablets of the users and the PCs/tablets of the operators; wherein the smartphones, tablets, PCs, visors and servers are connected to implement the following software components, which are all connectable to an Internet network: ADMINISTRATOR WEB FRONTEND, BACKEND, REAL TIME DATABASE, OPERATOR DESKTOP APP, RELATIONAL DATABASE, CLIENT MOBILE APP, OPTIP MIXED/AUGMENTED REALITY VISOR APP, EMAIL SERVICE. |
| US11122160B1 |
Detecting and correcting audio echo
Apparatuses, methods, systems, and program products are disclosed for detecting and correcting audio echo. An apparatus includes a processor and a memory that stores code executable by the processor. The code is executable by the processor to detect audio that is received through an audio channel of a first user during a conference call being echoed through an audio channel of a second user in the conference call. The code is executable by the processor to identify the second user associated with the audio channel that is echoing the audio of the first user. The code is executable by the processor to perform a corrective action associated with the second user to prevent audio that is received from the first user from being echoed through the audio channel of the second user. |
| US11122156B2 |
Portable and adjustable fastening mechanism
A portable and adjustable fastening mechanism is used to detachably fastening a mobile electronic device to an object. The fastening mechanism includes a gripping members located at end portions of a first support and symmetrically arranged about a geometric center of the first support. The gripping members can hold the electronic device and be fixed to an object in a way that the electronic device can be detached from the fastening mechanism through a single-hand operation. The gripping members include an unlocking component that unlocks the locked gripping members; a taking-out-channel opening component disengaging the unlocking component from the edges of the electronic device; and a restoring assembly storing restoring potential energy when the unlocking component is disengaged from the edges of the electronic device and releasing the restoring potential energy to apply a restoring force to the unlocking component when the gripping members are unlocked. |
| US11122153B2 |
Low-speed signal photoelectric conversion module for DP interface
A low-speed signal conversion module for a DP interface is provided, including a protocol parsing module, an encoding module, a decoding module, a sending link, and a receiving link. The protocol parsing module is configured to parse a DP protocol, and send a low-speed signal of the DP interface to the encoding module, or send an output signal of the decoding module to the DP interface. The encoding module is configured to perform encoding in different forms respectively according to different outputs of the protocol parsing module, and transmit the encoded signal to the sending link. In the present invention, different combinations of combined AUX, HPD and null signals are line-encoded respectively according to characteristics of a DP protocol. |
| US11122152B2 |
Data processing method and apparatus to reduce an overhead in a layer two protocol
Disclosed in the present application are a data processing method and apparatus. The method comprises: on a sending end, receiving a to-be-sent data packet transmitted from a higher layer, and performing “transport-layer layer-1” processing on the to-be-sent data packet, comprising assigning a sequence number; and then performing “transport-layer layer-2” processing, comprising: according to the size of a transmission resource obtained by means of scheduling, transferring the to-be-sent data packet to a physical layer and then sending out the to-be-sent data packet through an air interface; on a reception end, receiving the data packet that is sent from the air interface and then that is transmitted by the physical layer; performing “transport-layer layer-2” processing on the received data packet, comprising: transmitting the data packet transmitted by the physical layer, to the transport-layer layer-2 to perform processing. |
| US11122151B2 |
Multi-protocol gateway for connecting sensor devices to cloud
Methods, systems, apparatuses, and computer program products are provided for connecting sensor devices to cloud servers by a gateway device. The gateway device includes a plurality of sensor adaptors, a sensor data processor, and a network communication interface. The sensor adaptors are configured to receive sensor data in communication signals from sensor devices. Each sensor adaptor is configured to extract sensor data encapsulated according to a respective sensor communication protocol. The sensor data processor is configured to process the extracted sensor data for transmission to a cloud service, such as by extracting unneeded messages data, or inserting additional data such as a time stamp. The network communication interface is configured to transmit the processed sensor data to the cloud service over a network according to a network communication protocol. Sensor data of different types may be transmitted according to corresponding types of network communication protocols. |
| US11122145B2 |
Time series data analysis
The present approach relates to the use of time series analyses to estimate times or time intervals when a user of IT resources is likely to schedule or request that an operation is run on those services. In certain implementations, the present approach performs forecasting using time series data and supervised machine learning techniques. These techniques may be used to help predict future times when an operation or operations may be requested for execution. Based on these predicted future time, automations (e.g., the automated execution of operations) may be scheduled so as to effectively utilize available resources and efficiently perform the operations. |
| US11122143B2 |
Comparison of behavioral populations for security and compliance monitoring
Techniques to compare behavioral populations for security and compliance monitoring are disclosed. In various embodiments, for each of a plurality of implementations of a computing resource a corresponding behavioral profile data is store, which includes for each of a plurality of observed behavioral patterns observed to have been exhibited by the implementation a corresponding summary representation of one or more characteristic traits of the behavioral pattern. At least portions of said behavioral profile data associated with one or more implementations included in a cohort comprising a sub-population of said plurality of implementations identified by configuration data as being associated with said cohort is used to determine that an observed behavior of a member implementation of the cohort deviates from an expected behavior of members of the cohort. |
| US11122141B2 |
Managing or modifying online content according to cognitively identified creator and organization relationships
Embodiments for managing online content by one or more processors are described. An identification of a content creator and an identification of an organization are received. A relationship associated with the content creator and the organization is determined based on at least one online data source associated with at least one of the content creator and the organization. A signal representative of the determined relationship between the content creator and the organization is generated. |
| US11122127B2 |
Techniques and apparatuses for modem-assisted heartbeat transmission
Certain aspects of the present disclosure generally relate to wireless communication. In some aspects, a modem of a user equipment (UE) may receive one or more parameters that configure the modem to perform a periodic communication to maintain a first connection of the UE; and perform the periodic communication based at least in part on the one or more parameters, wherein the periodic communication is performed on a second connection different than the first connection. In some aspects, an application processor of a UE may establish a connection with a server for a plurality of applications, the server to be configured to communicate with respective application servers for the plurality of applications; configure a modem of the UE to perform a periodic communication to maintain the connection; and provide a push notification, received via the connection and associated with an application of the plurality of applications, to the application. |
| US11122124B2 |
Method and apparatus for controlling wireless communication for installing wireless internet in IoT devices
A wireless communication controlling apparatus for installing wireless Internet of an Internet of Things device is provided. There is provided a wireless communication controlling apparatus which supports the setup of an IoT device in connection with a user terminal based on an application, and if it fails, supports the setup of wireless Internet of the IoT device in connection with the user terminal based on an AP mode. A wireless communication controlling apparatus that does not support the above process supports easy setup based on a concurrent mode of a provision AP. |
| US11122122B2 |
Restricting access to a data storage system on a local network
Systems and methods are disclosed for managing access between a data storage server and a client that are on the same local network. Access is managed using a cloud service that is remote from both the data storage server and the client requesting access to the server. The cloud-based management of local connections described herein simplifies the process of connecting to a data storage server on a local network from a client program or device. Connections are authorized based on the use of a local code. The local code is generated by the cloud service and includes a concatenation of a device identifier associated with the data storage server and a time-varying value, such as a timestamp. |
| US11122120B2 |
Object notification wherein compare and swap is performed
A method, computer system, and a computer program product for object notifications is provided. The present invention may include receiving a requestor's operation. The present invention may then include determining that a notification describing the requestor's operation should be sent. The present invention may then include determining whether the requestor's operation is successful or unsuccessful, and the present invention may lastly include deleting an in-memory object. |
| US11122118B2 |
Node clustering configuration
Node clustering configuration is disclosed herein. An example method includes determining nodes of a cluster, each of the nodes having a unique identifier and a cluster identifier for the cluster, determining a voting configuration for the cluster, the voting configuration defining a quorum of master-eligible nodes of the nodes, the voting configuration being adaptable so as to maintain an optimal level of fault tolerance for the cluster, and electing one of the master-eligible nodes as a master node. |
| US11122115B1 |
Workload distribution in a data network
A system for processing packets in a network is provided. The system includes a computing platform running a software framework configured for accessing packets flowing into a packet processing pipeline of a node in the network; and identifying at least one pattern in said packets. Based on this pattern, the systems routes a first portion of the packets into the packet processing pipeline and offloads a second portion of the packets to the computing platform to be processed by the software framework. |
| US11122113B2 |
System and method for transferring value between database records
A computer system for transferring value between database records includes a memory storing instructions that, when executed by a processor, cause the computer system to: receive configuration options for configuring a particular transfer of value between database records and specifying a graphical element to be provided upon completion of the transfer and an email address; send a request to a communications server including the email address for use as a destination for a communication indicating that the transfer has been initiated including an indication of an identifier for the transfer; store an indication of the graphical element in association with the identifier; receive a request to complete the transfer indicating the identifier; retrieve the indication of the graphical element based on the identifier; confirm the transfer; and send a reply indicating completion of the transfer including an indication of the retrieved indication of the graphical element. |
| US11122112B1 |
Systems and methods for distributed micro services using private and external networks
Systems and methods for enhanced organizational transparency using a credit chain are disclosed. In one embodiment, a method for accessing a resource may include (1) a cloud foundry comprising at least one computer processor receiving an application request from an interface provided by an end user electronic device; (2) the cloud foundry determining a location of at least one resource associated with the application request, wherein the location is selected from a private cloud and a public cloud; (3) the cloud foundry retrieving at least one of a microservice and an API necessary to access the resource from the location; and (4) the cloud foundry routing the application request to the location using the at least one of the microservice and the API. |
| US11122111B2 |
Method for managing communication in mission critical data (MCData) communication system
Embodiments herein achieve systems and methods for managing communication in a Mission Critical data (MCData) communication system. The proposed method and system provides file distribution and data streaming in the MCData communication system. The proposed method and system provides a functional model and mechanisms to support mission critical data services. The functional model to support file distribution and data streaming, and associated procedures including one-to-one, one-to-many, and group data communications. Further, the proposed method and system provides mechanisms for optimizing radio resource utilization and backhaul link utilization in the MCData communication system. The proposed method and system provides radio resource utilization of the PC5 interface for the MC service, when multiple group members are under a relay node. Further, the proposed method and system can be used to reduce number of unicast transmissions between the MCData server and the MCData UEs by local routing at the relay node. |
| US11122104B2 |
Surfacing sharing attributes of a link proximate a browser address bar
A browser on a client device is navigated to a hosting computing system that hosts a service that provides access to documents. The browser is navigated to a particular document, to access the document. The document is displayed by the browser. A link to the document is displayed in an address bar generated by the browser, along with a graphical element indicative of the sharing attributes corresponding to the link. |
| US11122103B2 |
Method of sharing contents by using personal cloud device, and electronic device and personal cloud system using the same
A method of sharing content by using a personal cloud device and an electronic device and a personal cloud system using the method are provided. The method includes connecting to a personal cloud device configured to share the content with another electronic device, if a new first content is added to a set first folder, determining an upload condition of the electronic device, and if the upload condition satisfies a set condition, transmitting the first content to the personal cloud device. Accordingly, a user is able to share contents between a plurality of electronic devices by using a personal cloud device in real time. |
| US11122098B2 |
Method and system for detecting errors in local area network
Novel tools and techniques are provided for implementing error detection in a network, and, more particularly, to methods, systems, and apparatuses for implementing error and/or fault detection in a network and/or media stream and providing options to address the error and/or fault in the network and/or media stream. In various embodiments, a computer might detect an error in a first network and send a notification indicating that the error has occurred. The notification might contain one or more options to address the error in the first network. The computer, a user device, a service provider device, or a content provider device might receive and display the notification containing the one or more options. The computer, the user device, the service provider device, or the content provider device might then select at least one of the one or more options to address the error in the first network. |
| US11122095B2 |
Methods for dictionary-based compression and devices thereof
Methods, non-transitory machine readable media, and computing devices that provide improved dictionary-based compression are disclosed. With this technology, a first portion of an input data stream is compressed using a first dictionary. A second dictionary is trained when the first dictionary is determined to be stale. The dictionary can be determined to be stale based on a size of the input data stream compressed using the first dictionary or a compression ratio decreasing by a threshold, for example. The first dictionary can be stored with metadata associated with the compressed first portion of the input data stream. Accordingly, this technology improves compression ratios, eliminates the need for reference counting, and facilitates improved reclamation of orphan dictionaries, among other advantages. |
| US11122092B2 |
System and method for prioritizing SIP registrations
Systems and methods implement prioritized IP Multimedia System (IMS) registration procedures for Emergency and Priority Service users. A network device in an IMS network, receives, from a user equipment device, a Session Initiation Protocol (SIP) Register message that includes a priority indication. The network device detects the priority indication in the SIP Register message and provides, based on the priority indication, priority registration for the user equipment device when the network device is in an overloaded condition. |
| US11122091B2 |
Network security and management system
Systems and methods for managing network security for a plurality of networks. Each of the networks comprises one or more networked devices, and each of the networks includes one or more security devices configured to monitor data traffic into and out of the networks. Abstracted access rules are created to define access between the networked devices. Each of the access rules are compiled into a security rule that uses object definitions of the networked devices to define access between the networked devices. The security rules are compiled and transmitted to the security devices for implementation. |
| US11122085B2 |
Method and apparatus for distributing firewall rules
Some embodiments of the invention provide a novel method for specifying firewall rules. In some embodiments, the method provides the ability to specify for a particular firewall rule, a set of network nodes (also called a set of enforcement points below) at which the particular firewall should be enforced. To provide this ability, the method of some embodiments adds an extra tuple (referred to below as the AppliedTo tuple) to a firewall rule. This added AppliedTo tuple lists the set of enforcement points at which the firewall rule has to be applied (i.e., enforced). |
| US11122083B1 |
Methods for managing network connections based on DNS data and network policies and devices thereof
Methods, non-transitory computer readable media, and network traffic manager apparatus that assists with managing network connections includes obtaining a destination internet protocol (IP) address and a domain name from a received request sent by a client. A determination is made about when the obtained domain name identifies a trusted service and the obtained destination IP address is included in a current host IP address list. The obtained destination IP address is replaced with a new IP address from the current host IP address list when the obtained domain name is determined to be present and the obtained destination IP address is determined to be absent from the current host IP address list. The received request is managed based on one or more network policies, wherein one of the one or more network policies includes providing the client access to the service identified by the obtained domain name hosted at the replaced new IP address. |
| US11122079B1 |
Obfuscation for high-performance computing systems
An example technique includes initializing, by an obfuscation computing system, communications with nodes in a distributed computing platform. The nodes include compute nodes that provide resources in the distributed computing platform and a controller node that performs resource management of the resources. The obfuscation computing system serves as an intermediary between the controller node and the compute nodes. The technique further includes outputting an interactive user interface (UI) providing a selection between a first privilege level and a second privilege level, and performing one of: based on the selection being for the first privilege level, a first obfuscation mechanism for the distributed computing platform to obfuscate digital traffic between a user computing system and the nodes, or based on the selection being for the second privilege level, a second obfuscation mechanism for the distributed computing platform to obfuscate digital traffic between the user computing system and the nodes. |
| US11122075B2 |
Attack mitigation in a packet-switched network
The disclosed computer-implemented method includes applying transport protocol heuristics to selective acknowledgement (SACK) messages received at a network adapter from a network node. The transport protocol heuristics identify threshold values for operational functions that are performed when processing the SACK messages. The method further includes determining, by applying the transport protocol heuristics to the SACK messages received from the network node, that the threshold values for the transport protocol heuristics have been reached. In response to determining that the threshold values have been reached, the method includes identifying the network node as a security threat and taking remedial actions to mitigate the security threat. Various other methods, systems, and computer-readable media are also disclosed. |
| US11122072B2 |
Enhanced browsing with security scanning
A method securely scans a second web page linked to a first web page being displayed by a browser. The method identifies a target link to a second web page from one or more links contained within a first web page. Prior to receiving a user selection of the target link, the method prefetches content from the second web page and loads the prefetched content from the second web page into a safe cache before receiving the user selection of the target link. The method scans the prefetched content from the second web page for a security threat, within the safe cache, wherein the safe cache is configured to prevent the prefetched content from altering a memory location or storage location external to the safe cache. In response to identifying a security threat within the prefetched content, the method displays a warning to the user. |
| US11122071B2 |
Visibility and scanning of a variety of entities
Systems, methods, and related technologies for entity visibility are described. In certain aspects, information associated with a type of entity is accessed and a network is scanned for a plurality of entities. One or more entities are selected from plurality of entities based on the type of entity. Properties associated with the one or more selected entities are accessed. The information associated with the one or more selected entities and the one or more properties associated with the selected one or more entities are stored. |
| US11122069B2 |
Detecting compromised social media accounts by analyzing affinity groups
Devices and methods for detecting a compromised social media account are disclosed. A method includes: receiving, by a computing device, social media content corresponding to a plurality of social media accounts; determining, by the computing device, a plurality of affinity groups, each including two or more social media accounts from the plurality of social media accounts, based upon the received social media content; determining, by the computing device, whether or not a particular social media account of the plurality of social media accounts is compromised using the received social media content and the determined plurality of affinity groups; and in response to determining that the particular social media account is compromised, the computing device providing a notification indicating that the particular social media account is compromised. |
| US11122067B2 |
Methods for detecting and mitigating malicious network behavior and devices thereof
Methods, non-transitory computer readable media, anomaly detection apparatuses, and network traffic management systems that generate, based on the application of one or more models and for a first flow associated with a received first set of network traffic, one or more likelihood scores and at least one flow score based on the likelihood scores. One or more of the one or more models are associated with one or more browsing patterns for a web application to which the first set of network traffic is directed. A determination is made when the flow score exceeds a threshold. A mitigation action is initiated, based on a stored policy, with respect to the first set of network traffic, when the determining indicates that the flow score exceeds the established threshold. |
| US11122066B2 |
Cyber security enhanced monitoring
Systems for and methods of detecting cyber-attacks by selecting a group of users and monitoring those user's computer systems for behavior that indicates a series of actions reflecting behavior indicative of a cyber-attack. |
| US11122065B2 |
Adaptive anomaly detection for computer systems
Feature vectors are abstracted from data describing application processes. The feature vectors are grouped to define non-anomalous clusters of feature vectors corresponding to normal application behavior. Subsequent feature vectors are considered anomalous if they do not fall within one of the non-anomalous clusters; alerts are issued for anomalous feature vectors. In addition, the subsequent feature vectors may be used to regroup feature vectors to adapt to changes in what constitutes normal application behavior. |
| US11122060B2 |
Detection of security threats in a mesh network
Disclosed are techniques for detecting a security threat in a wireless mesh network. In an aspect, a monitoring device in the wireless mesh network detects a first message transmitted by a source node in the wireless mesh network to a destination node in the wireless mesh network via at least one relay node in the wireless mesh network, collects information from the first message as it is transmitted in the wireless mesh network, determines that the first message has been corrupted based on analysis of the information from the first message, and detects the security threat in the wireless mesh network based on the first message being corrupted. |
| US11122057B2 |
Systems, methods and computer program products for ingress email security
An ingress server is operable to perform, through a multi-list evaluator, two different validations: one utilizes a sender network address of a sender's server to determine whether to trust, accept, or reject a connection and one utilizes a domain of a sender email address from an envelope to determine whether to accept or reject a message. The multi-list evaluator may perform the validations in two phases. If a connection can be trusted, the connection is accepted and any message over the connection (in a single session) is accepted and no further validation is necessary. Further, in both phases, the multi-list evaluator can utilize a whitelist maintained by the ingress server to override a blacklist provided by a blacklist supplier. This override can reduce false-positives and drastically reduce delays usually associated with correcting false-positives and improve system throughput. |
| US11122052B2 |
Sensitive information accessibility in blockchain
A method, computer system, and a computer program product for accessing data in a network is provided. The present invention may include reading a control blockchain, by a non-trusted node, to enable the non-trusted node to read an asset from a trusted node blockchain on a trusted node. The present invention may also include reading the trusted node blockchain by the non-trusted node. The present invention may then include creating, by the non-trusted node, a new block on a temporary blockchain based on the read trusted node blockchain. The present invention may further include transmitting, by the non-trusted node, the created new block to the trusted node, wherein transmitting the created new block causes the created new block to be added to the trusted node blockchain. |
| US11122051B2 |
Using smart groups for computer-based security awareness training systems
This disclosure describes embodiments of an improvement to the static group solution because all the administrator needs to do is specify the criteria they care about. Unlike static groups, where the administrator needs to keep track of the status of individual users and move them between static groups as their status changes, smart groups allows for automatic identification of the relevant users at the moment that action needs to be taken. This feature automates user management for the purposes of enrollment in either phishing and training campaigns. Because the smart group membership is determined as the group is about to be used for something, the smart group membership is always accurate and never outdated. The query that determines the smart group membership gets run at the time when you are about to do a campaign or perform some other action that needs to know the membership of the smart group. |
| US11122048B2 |
User profile access from engaging applications with privacy assurance associated with an API
An approach to secure API access for distinct types of users. A request for access to an API from a user is initiated and followed by sending a request for a login credential to the user based on a type of API requested: Data API or Interaction API. The login credential is received along with the network location of the user. Authenticating the login credential and create an API specific token. Assigning the API specific token to a user activity and granting the user access to the specific API. |
| US11122045B2 |
Authentication using credentials submitted via a user premises device
An authentication system can be operable to receive from a user premises device credentials associated with a user identity, wherein the user premises device can also be operable to monitor and control a premise of the user identity. The authentication system can process the credentials and transmit an authentication verification to an on-line system to enable access to the on-line system by a user equipment of the user identity. The authentication system can be used as a factor (or additional factor) of authentication, for example, to gain sooner access to an on-line system that has locked out a user identity in response to a personal denial of service (PDoS) attack. |
| US11122036B2 |
Systems and methods for managing digital identities associated with mobile devices
Systems and methods are provided for use in enabling, providing, and managing digital identities in association with mobile communication devices. One exemplary method includes capturing an image of a physical document comprising a biometric of a user associated with the physical document, and extracting the biometric from the image and converting it to a biometric template. The method also includes capturing a biometric of the user and comparing it to the biometric template. The method then includes, when the captured biometric matches the biometric template, transmitting a message to an identification provider comprising at least the image of the physical document and the biometric template, whereby the biometric template is verified against a repository, and binding data representative of the mobile communication device, a mobile application included therein, and the biometric template and/or the captured biometric of the user into a token. |
| US11122033B2 |
Multi factor authentication
A method and system of authenticating a user are provided. A request for a resource is received by a server, from a user device. A predefined number is received from the user device. A first number and a second number are created. The first number is sent to the user device. A first discrete logarithm is determined based on a challenge code and the first number and sent to the user device. A first pass code is calculated via a second discrete logarithm based on the first discrete logarithm, the predefined number, and the first number. A second pass code based on the second discrete logarithm, is received from the user device. The first pass code is compared to the second pass code. Upon determining that the first pass code is identical to the second pass code, the user device is allowed access a resource associated with the computing device. |
| US11122032B2 |
Call authorization and verification via a service provider code
One example method of operation may include receiving a call message associated with a call, determining a service provider network identifier based on a telephone number of a call origination device, identifying, from the call message, an identity header with a link to a public certificate repository storing a public certificate assigned to a service provider network hosting the call origination device, retrieving a service provider code assigned to the service provider network from the public certificate, and determining whether the service provider code matches the service provider network identifier as identified from a verification table. |
| US11122030B2 |
Methods, systems, devices, and products for web services
A login session server establishes a communications session between an application executing on a device and a service provided by a web services gateway. A temporary login session socket is established and a token is sent to the device. The temporary login session socket may be used to verify a service provided by the web services gateway. |
| US11122029B2 |
Secure cloud computing
Methods and systems for securely using a web application to invoke an application to complete a task are described herein. The application may use identity information provided by the web application to determine whether to comply with requests from the web application. The web application may send the request to the application via a browser. The request may include the origin of the request in an origin header to prevent malicious websites from spoofing the origin of the request. The application may exchange information with a trust service to determine whether the web application domain is trusted and/or belongs to the same organization of the user. |
| US11122028B2 |
Control method for authentication/authorization server, resource server, and authentication/authorization system
An authorization server to issue an access token for accessing a resource provided by a resource server performs operations. A client receives an issuance request having a predetermined parameter identifying a type of access token to be issued. Based on the predetermined parameter, one of a first type or second type of access token to be verified by the resource server is issued. The first type of access token or the second type of access token is transmitted to the client from which the issuance request was received. The second type of access token is verified at the authorization server by receipt of a verification request received together with the second type of access token from the resource server. The received verification request is transmitted from the resource server based on the resource server determining that a request for service from the client includes the second type of access token. |
| US11122027B2 |
End-to-end M2M service layer sessions
Mechanisms support machine-to-machine service layer sessions that can span multiple service layer hops where a machine-to-machine service layer hop is a direct machine-to-machine service layer communication session between two machine-to-machine service layer instances or between a machine-to-machine service layer instance and a machine-to-machine application. Mechanisms are also disclosed that illustrate machine-to-machine session establishment procedures for oneM2M Session Management Service supporting multiple resources. |
| US11122026B2 |
Queue management and load shedding for complex authentication schemes
Adjustments to be made to a system for authenticating users may be made by performing the following operations: obtaining a stochastic model of the system, wherein the stochastic model includes two or more classes of requests; obtaining a set of preferences for handling authentication requests and a set of operational parameter values; determining, based at least in part on the stochastic model and the set of operational parameter values, that adjusting an authentication scheme will improve a probable degree to which the authentication system will meet the set of preferences; responsive to the determination that adjusting the authentication scheme will improve the probable degree to which the system for authenticating users will meet the set of preferences, adjusting the authentication scheme of the system for authenticating users; and performing an authentication of a user based on the adjusted authentication scheme. |
| US11122022B2 |
Network connection automation
A computing resource service provider receives a request from a customer to establish a physical connection between a provider network device and a customer network device in a colocation center. Once the connection has been established, the customer may transmit cryptographic authentication information, through the physical connection, to the provider network device. The provider network device transmits this information to an authentication service operated by the computing resource service provider to verify the authenticity of the information. If the information is authentic, the authentication service may re-configure the provider network device to allow the customer to access one or more services provided by the computing resource service provider. The authentication service may transmit cryptographic authentication information to the customer to verify the identity of the computing resource service provider. |
| US11122021B1 |
Server for handling multi-encrypted messages
An apparatus is configured to receive an email message that is addressed to a plurality of recipients. The email message comprises a first portion with a first level of encryption and a second portion with a second level of encryption. The apparatus creates a first instance of the message to be sent to a first recipient from among the plurality of recipients. In the first instance, the apparatus masks the portions of the message that are not of the first level of encryption. The apparatus creates a second instance of the message to be sent to a second recipient from among the plurality of recipients. In the second instance, the apparatus masks the portions of the message that are not of the first or second levels of encryption. The apparatus is further configured to transmit the first instance to the first recipient and the second instance to the second recipient. |
| US11122020B2 |
Streaming image encryption method and computer program, streaming image decryption method and computer program
A method of decrypting a streaming image includes: receiving a packet including at least an item which is encrypted, the item including at least one parameter used for decoding image data included in the streaming image; decrypting the item; and decoding the image data included in the streaming image based on the decrypted item, wherein the image data is not encrypted. |
| US11122016B2 |
Wireless display streaming of protected content
A system and method of wireless display, including a transmitter processing a first encrypted content into a second encrypted content without decoding, and transferring the second encrypted content over a wireless display connection to a receiver. |
| US11122015B2 |
Data transmitting apparatus
According to an aspect of the invention, a data transmitting apparatus includes a transmitting unit that transmits a first packet through a unidirectional communication based on an instruction to transmit the first packet, and that transmits a second packet through a unidirectional communication based on an instruction to transmit the second packet. |
| US11122010B2 |
Data hub for a cross-domain communication system
Some embodiments are directed to a cross-domain communication system and method. The system includes a data hub connectable to first domain and to a second domain, the first and second domains being isolated from one another. The data hub may be connected independently to the first domain and to the second domain, such that it is able to receive data from the first domain and transmit data to the second domain. The data hub includes a processor, and optionally a data diode, the processor being adapted to inspect packet data received from the first domain, and to run a set of user-defined rules, such that commands are applied to the packet data in accordance with the rules. When a command applied to packet data received from the first domain it creates packet data transmittable to the second domain in real time, such that the first and second domains communicate indirectly via the data hub. |
| US11122009B2 |
Systems and methods for identifying geographic locations of social media content collected over social networks
A new approach is proposed that contemplates systems and methods to identify geographic locations of all social media content items retrieved form a social network in real time, wherein the geographic locations are physical locations from which the social media content items are originated or authored. If the latitude/longitude (geographic) coordinates of the content item are available, the geographic location of the social media content item can be identified using such geographic coordinates. For content items which geographic coordinates are not available, historical archive of content items with high-confidence of geographic locations are utilized to train a location classifier to predict geographic locations of such content items with high accuracy. Finally, the identified locations of the content items are confirmed to be accurate and are presented to a user together with the content items. |
| US11122007B2 |
Data routing through a gateway cluster of a wide area network
An example includes a manager gateway of a gateway cluster, comprising processing circuitry and a memory including instructions that cause the gateway to generate a virtual IP address for each gateway of the gateway cluster. The instructions further cause the gateway to receive an indication that a client device has joined a LAN. The instructions further cause the gateway to determine an anchor gateway to which the client device is to be anchored. The instructions further cause the gateway to transmit a first message anchoring the client device to the anchor gateway. The instructions further cause the gateway to transmit a second message offering an address to the client device. |
| US11122005B2 |
Secure dynamic address resolution and communication system, method, and device
The present invention is directed to systems and methods for providing secure dynamic address resolution and communication. Accordingly, a node may include processor and memory having instructions thereon, that when executed, cause the node to pair with another node. The pairing may include creating a DNS record on the node including a current address associated with the second node, this current address may be dynamically updated. The instructions may further allow the node to transmit a message to the second node, based on a resolved address from the DNS record on the first node. Authentication, dynamic message encryption and the provision of a DNS cache may further be implemented on the node. |
| US11121999B2 |
Communication interface for wearable devices
Technologies are described related to communication interfaces for wearable devices. User experience with wearable devices may be enhanced through tailored views for communications, calendar items, actions associated with those, where the views and presentations may be dynamically selected and adjusted based on context, user, location, and device capabilities. Smart notifications and user-friendly note taking, functionality may be enabled also based on context, user, location, and device capabilities. Other scenarios may be unlocked based on proximity and/or sensor data. |
| US11121995B2 |
Encoding executable instructions and computational state in email headers
Among other things, we describe techniques for encoding data that is included in electronic communications. In one aspect, a first electronic communication system sends, to an entity, a first email message that includes a Message-ID field including data that identifies an action to be carried out by a second electronic communication system. The first electronic communication system receives, from the entity, a second email message that includes an In-Reply-To field containing the data that identifies the action to be carried out by the second electronic communication system. The first electronic communication extracts the data from the In-Reply-To field in a message header of the first electronic communication. The second electronic communication system may be the same as the first electronic communication system, or may be an electronic communication system other than the first electronic communication system. |
| US11121994B2 |
Media object distribution
A method that comprises receiving at a network connected server from a first client terminal, a message comprising, an user application ID of a user selecting a media object using a user interface presented on a display of the first client terminal and the media object, generating a web document which presents a browser user interface and the media object when accessed by a browser, the web document having a network accessible storage address, sending the network accessible storage address from the network connected server to allow a browser installed in a second client terminal to use of the network accessible storage address to display the media object the browser user interface, identifying a usage of the browser user interface for inputting a reaction to the media object by a user of the second client terminal, and forwarding the reaction to the first client terminal using the sender user ID. |
| US11121993B2 |
Driving contextually-aware user collaboration based on user insights
The techniques disclosed herein enable a system to drive collaboration between users by analyzing user interactions with productivity applications. The system provides intelligence mechanisms that work in concert with telemetry mechanisms to create interactive experiences that encourage users to embrace technology, improve productivity, and increase collaboration. In some configurations, the system can drive collaboration between users by correlating signals that define user interactions with individual productivity applications with contextual data that indicates how time has been allocated. During, or upon completion of a group activity, the system can identify individuals of interest and enable a user to readily share relevant files with the identified individuals. |
| US11121992B2 |
Information processing method, device and electronic apparatus
An information processing method includes detecting a specified input directed to one or more members of a current chat group, determining the one or more members directed to by the specified input as target members, and sending private content to the target members, where the private content is not visible by other members of the current chat group. |
| US11121986B2 |
Generating process flow models using unstructure conversation bots
In an example computer-implemented method, unstructured interactions between an unstructured conversation bot and a plurality of users are logged. A process flow model is generated based on the logged unstructured interactions. Instructions based on the process flow model are presented to a user in real time via the conversation bot. |
| US11121983B1 |
Reactive throttle infrastructure
Systems and methods provide a reactive throttle architecture for managing traffic to shared resources. A system comprises an interface subsystem configured to communicate with a client operatively coupled with a resource, an implementation subsystem configured to throttle traffic from the client to the resource based on a throttling policy, a monitor subsystem configured to monitor resource performance, and a policy subsystem configured to define the throttling policy based on a performance of the resource and a lane of the client. |
| US11121981B1 |
Optimistically granting permission to host computing resources
A system that hosts computing resources may implement optimistically granting permission to host computing resources. A request for permission to host a computing resource may be received by a control plane. If the control plane determines that the resource host is the first to request permission to host the resource, then the control plane may store an indication of permission that blocks other resource hosts from obtaining permission to host the computing resource and sending an acknowledgement of permission to the resource host that requested permission. |
| US11121977B2 |
Contention window size adjustment in a wireless communication system
Apparatuses, methods, and systems are disclosed for contention window size adjustment. One apparatus includes a transmitter that transmits data on a carrier to a set of devices in a first transmission burst having a duration of at least one subframe. In some embodiments, the set of devices includes one or more devices. In various embodiments, the apparatus includes a receiver that receives feedback information from each device. In certain embodiments, the apparatus includes a processor that determines, based on the feedback information, whether interference above a predetermined level exists on the carrier during the first transmission burst at each device, adjusts a contention window size based on the determination of whether interference above the predetermined level exists on the carrier during the first transmission burst at each device, and determines a value N between a predetermined minimum contention window size and the adjusted contention window size. |
| US11121976B2 |
System, device, and method for providing distributed quality-of-service control and policy enforcement
System, device, and method for providing distributed quality-of-service control and policy enforcement. A tree hierarchy representation is constructed for distributed enforcement of a Quality-of-Service (QoS) policy on incoming packets that are intended for transmission towards a destination, by at least two separate Processing Units (PUs) that separately process different packets that are intended for transmission towards that destination. A cross-PU Instances Synchronization Unit automatically determines that a first PU caused modification of a first set of instances of parent-child Policy Objects that are utilized by the first PU, and dynamically causes a corresponding modification to a second set of instances of parent-child Policy Objects that are utilized by a second PU. The QoS policy is enforced, on a packet-by-packet basis, by different member entities of the tree hierarchy representation, to achieve the overall QoS policy. |
| US11121975B2 |
Framework for temporal label switched path tunnel services
A method for establishing a temporal label switched path (T-LSP) implemented in a node in a network. The method includes receiving a path request including a time interval and a set of constraints; obtaining traffic engineering information from a first database; computing, by the node, a path satisfying the time interval and the set of constraints based on the traffic engineering information obtained; storing the time interval and the set of constraints in a second database; and instructing an ingress node of the temporal LSP to signal the temporal LSP in the network along the path computed at a start of the time interval identified in the path request and to tear down the temporal LSP at an end of the time interval identified in the path request. |
| US11121974B2 |
Adaptive private network asynchronous distributed shared memory services
A highly predicable quality shared distributed memory process is achieved using less than predicable public and private internet protocol networks as the means for communications within the processing interconnect. An adaptive private network (APN) service provides the ability for the distributed memory process to communicate data via an APN conduit service, to use high throughput paths by bandwidth allocation to higher quality paths avoiding lower quality paths, to deliver reliability via fast retransmissions on single packet loss detection, to deliver reliability and timely communication through redundancy transmissions via duplicate transmissions on high a best path and on a most independent path from the best path, to lower latency via high resolution clock synchronized path monitoring and high latency path avoidance, to monitor packet loss and provide loss prone path avoidance, and to avoid congestion by use of high resolution clock synchronized enabled congestion monitoring and avoidance. |
| US11121971B2 |
Method and apparatus for switching data between virtual machines, and communications system
A method for switching data between virtual machines is provided, the method includes acquiring data that is inside a physical host and needs to be sent to a destination node; determining, according to the data, whether the destination node is a node inside the physical host or a node outside the physical host; and when the destination node is a node inside the physical host, determining a destination virtual network interface card (NIC) port, and sending the data to a corresponding destination virtual machine using a virtual NIC corresponding to the destination virtual NIC port; or when the destination node is a node outside the physical host, determining a physical NIC port, and sending the data outside the physical host using a physical NIC corresponding to the physical NIC port. A corresponding apparatus and system are also provided. |
| US11121969B2 |
Routing between software defined networks and physical networks
A method includes receiving, at a data link layer (layer 2) gateway device configured to connect the physical network to the SDN network, routing data to a computing device, the computing device selected to receive a packet transmitted from the physical network to the SDN network; receiving, from a source element in the physical network, an address request for a layer 2 address of a router element in the SDN network, the address request including a networking layer address of the router element; transmitting, to the source element in response to receiving the address request, a layer 2 address of the router element using the routing data; receiving, from the source element, a routing request to route a packet to a destination element in the SDN network using the layer 2 address; routing, using the routing data, the received packet to the computing device to route to the destination element. |
| US11121966B2 |
Centralized application-layer routing at the edge of an online application service provider network
Techniques for centralized application-layer routing at the edge of an online application service provider network. In one embodiment, for example, a method comprises storing data representing a directed graph; based at least on a respective cost and the respective capacity associated with directed edges in the directed graph, determining a respective edge flow value for each directed edge; based at least on the respective edge flow value for a particular directed edge that connects a first node in directed graph to a second node in the directed graph, determining a weight for a location in a data communications network represented by the second node; receiving an application-layer request message at a location in the network represented by the first node; and selecting, based at least on the weight, the location represented by the second node to which to route the application-layer request message in the network. |
| US11121965B2 |
Network resource isolation method for container network and system thereof
A network resource isolation method for container networks and a system thereof, including a computation system for network resource isolation, or a system using network resource isolation, or a network resource isolation system for container networks, and methods of implementation thereof. The system provides container overlay networks with a resource isolation scheme that also reduces the use threshold for isolation of network resources and optimizes the utilization rate of network resources. |
| US11121964B2 |
Data path retention during control plane failures in a multiprotocol label switching network
Systems and methods for data path retention during control plane failures in a Multiprotocol Label Switching (MPLS) network include, in a network element, operating an MPLS service on a data path in the MPLS network in an initial stage with both a control plane and a data plane operating normally; responsive to a failure affecting only the control plane, switching the MPLS service to an Ethernet Line (ELINE) service which is configured on the data path; and, responsive to a recovery of the control plane, switching the ELINE service back to the MPLS service. |
| US11121962B2 |
High performance software-defined core network
A method comprising instantiating virtual routers (VRs) at each of a set of nodes that form a network. Each VR is coupled to the network and to a tenant of the node. The network comprises virtual links in an overlay network provisioned over an underlay network including servers of a public network. The method comprises configuring at least one VR to include a feedback control system comprising at least one objective function that characterizes the network. The method comprises configuring the VR to receive link state data of a set of virtual links of the virtual links, and control routing of a tenant traffic flow of each tenant according to a best route of the network determined by the at least one objective function using the link state data. |
| US11121961B2 |
Systems and methods for determining secure network elements using flexible algorithm technology
In one embodiment, an apparatus includes one or more processors and one or more computer-readable non-transitory storage media coupled to the one or more processors. The one or more computer-readable non-transitory storage media include instructions that, when executed by the one or more processors, cause the apparatus to perform operations including receiving a first type-length-value (TLV) associated with a winning flexible algorithm definition (FAD) from a first element of a network. The operations also include determining a security level for the winning FAD based on the TLV. The operations further include determining a data transmission route through a plurality of elements of the network based on the security level for the winning FAD. |
| US11121952B2 |
Device health assessment data summarization using machine learning
In one embodiment, a device health assessment service extracts device health status indicators from health assessment data that the service uses to determine a device health status of a networking device. The service forms, using the extracted set of device health status indicators, a health status signature for a particular device health status. The service trains a machine learning-based model to classify whether a networking device has the particular device health status, based in part on the health status signature. The service deploys the machine learning-based model to a target network for local device health assessment of one or more networking devices in the target network. |
| US11121949B2 |
Distributed assignment of video analytics tasks in cloud computing environments to reduce bandwidth utilization
Example task assignment methods disclosed herein for video analytics processing in a cloud computing environment include determining a graph, such as a directed acyclic graph, including nodes and edges to represent a plurality of video sources, a cloud computing platform, and a plurality of intermediate network devices in the cloud computing environment. Disclosed example task assignment methods also include specifying task orderings for respective sequences of video analytics processing tasks to be executed in the cloud computing environment on respective video source data generated by respective ones of the video sources. Disclosed example task assignment methods further include assigning, based on the graph and the task orderings, combinations of the video sources, the intermediate network devices and the cloud computing platform to execute the respective sequences of video analytics processing tasks to reduce an overall bandwidth utilized by the sequences of video analytics processing tasks in the cloud computing environment. |
| US11121947B2 |
Monitoring and analysis of interactions between network endpoints
Techniques for monitoring and analysis of interactions between network endpoints are disclosed. In some embodiments, a process for monitoring and analysis of interactions between network endpoints includes collecting Domain Name System (DNS) response data from a network device; determining network endpoint interactions based on an analysis of the DNS response data (e.g., using a processor); and generating a graph corresponding to the network endpoint interactions. For example, the network device can include a DNS device and/or a software-defined networking (SDN) device (e.g., an SDN switch, such as an OpenFlow switch). |
| US11121946B2 |
Capturing packets in a virtual switch
Described herein are systems, methods, and software to capture packets of interest in a virtual switch. In one implementation, a method of capturing packets of interest in a virtual switch includes identifying a request to capture packets associated with first packet attributes. The method further includes, in response to the request, assigning a virtual port for forwarding the packets associated with the first packet attributes, and implementing a forwarding rule in the virtual switch to forward the packets associated with the first packet attributes to at least the virtual port. The method further provides for directing traffic over the virtual switch using the forwarding rule. |
| US11121941B1 |
Monitoring communications to identify performance degradation
This disclosure describes techniques for monitoring communications in an application cloud infrastructure. The techniques may include determining whether a performance issue associated with the communications is related to an application server for a hosted application, or to a computing network that transmits the communications across the application cloud infrastructure. The techniques may also further include testing to define a performance issue, and/or taking action in response to a performance issue, including potentially mitigating the performance issue. As such, monitoring communications may help improve network performance by efficiently identifying and isolating instances of potential performance degradation. |
| US11121940B2 |
Techniques to meet quality of service requirements for a fabric point to point connection
Examples include techniques to meet quality of service (QoS) requirements for a fabric point to point connection. Examples include an application hosted by a compute node coupled with a fabric requesting bandwidth for a point to point connection through the fabric and the request being granted or not granted based at least partially on whether bandwidth is available for allocation to meet one or more QoS requirements. |
| US11121934B1 |
Network verification systems and methods
A network verification system uses general-purpose programming language to create network verification tests. A test orchestrator builds a model of the network only using data from the network verification test. An optimization testing manager creates symbolic packets for verification tests using assertions based on a packet library embedded into the testing manager and the general-purpose programming language. |
| US11121932B2 |
Method and apparatus for model mapping and dynamically enabling external model on the network device
A data model can be customized by a user and executed in real-time at a network device. The user provides definitions for the customized data model based on a data model locally stored on the network device. The user provided definitions are used to generate a mapping contract which is processed by a mapping package generator to generate a mapping package. The mapping package can then be processed by a translation engine to dynamically execute a customized data model in real-time. |
| US11121928B2 |
Opportunistic block transmission with time constraints
A technique for determining a data window size allows a set of predicted blocks to be transmitted along with requested blocks. A stream enabled application executing in a virtual execution environment may use the blocks when needed. |
| US11121927B2 |
Automatically determining an optimal amount of time for analyzing a distributed network environment
Aspects of the technology provide solutions for determining a time period (“epoch”) required to monitor or analyze a tenant network. Some implementations of the technology include a process for making automatic epoch determinations, which includes steps for identifying one or more network parameters for a tenant network, analyzing the tenant network using the network parameters to discover one or more configuration settings of the tenant network, and determining a first epoch for the tenant network, the first epoch corresponding with a period of time to complete analysis of the tenant network using the network parameters. In some aspects, the process can further include steps for generating a tenant profile for the tenant network, the tenant profile based on the network parameters, the first epoch, and the one or more configuration settings of the tenant network. Systems and machine-readable media are also provided. |
| US11121923B2 |
Automatic provisioning of network components
The present disclosure is directed to systems and methods that enable automatic provisioning of access points within an enterprise network by a controller of the enterprise network. In one aspect, a method includes detecting, at a network controller, attachment of a first access point to a network; identifying, by the network controller, a profile of a second access point, the second access point having being replaced with the first access point, the profile including at least one of identification parameters and configuration parameters of the second access point; and provisioning, by the network controller, the first access point with the profile of the second access point. |
| US11121921B2 |
Dynamic auto-configuration of multi-tenant PaaS components
Embodiments of the present disclosure describe configuration agents, or “config-agents,” that can identify new PaaS component configuration information when a software system instance is deployed or updated without requiring a developer to manually configure each PaaS component instance whenever a new software system instance is installed or updated. In some examples, config-agents retrieve new configuration information from configuration files associated with the software system instances such as ConfigMaps and/or Custom Resource Objects of a Custom Resource Definition type operated on by the config-agents. The config-agents can keep track of each software system instance and PaaS component instance and ensure that necessary configurations are passed onto PaaS component instances. |
| US11121920B2 |
Cloud management connectivity assurance
The disclosed technology relates a system is configured to generate a protected configuration for a network device based on network connectivity data for a plurality of devices in a managed network associated with a cloud management system. The system is further configured to receive a configuration change for the managed network, determine that the configuration change is incompatible with the protected configuration, and generate a notification that the configuration change is incompatible with the protected configuration. |
| US11121917B1 |
Systems and methods for dynamically allocating resources based on configurable resource priority
A system described herein may provide a technique for the dynamic selection of configurable resources in an environment that includes a hierarchical or otherwise differentiated arrangement of configurable resources. The environment may include, or may be implemented by, a Distributed Resource Network (“DRN”), which may include hardware or virtual resources that may be configured, including the instantiation of containers, virtual machines, Virtualized Network Functions (“VNFs”), or the like. The DRN may be hierarchical in that some resources of the DRN may provide services to, and/or may otherwise be accessible to, a greater quantity of elements of the DRN or some other network. |
| US11121916B2 |
Uplink transmission method and apparatus
The present disclosure relates to uplink transmission methods and apparatus. One example method includes sending, by a first device, a quality criterion event of at least one link between the first device and a second device to the second device, where a quality criterion event of each link includes at least one parameter, and receiving report information determined by the second device based on a quality criterion of the at least one link and the parameter in the quality criterion event of each link. |
| US11121915B2 |
FPGA-enabled compute instances
A resource manager of a virtualized computing service indicates to a client that FPGA-enabled compute instances are supported at the service. From a set of virtualization hosts of the service, a particular host from which an FPGA is accessible is selected for the client based on an indication of computation objectives of the client. Configuration operations are performed to prepare the host for the application, and an FPGA-enabled compute instance is launched at the host for the client. |
| US11121907B2 |
Operation, administration and maintenance OAM data transmission method and apparatus
The present disclosure relates to operation, administration and maintenance (OAM) data transmission methods and apparatus. One example method includes obtaining a first data flow and sending the first data flow. The first data flow includes at least one first OAM data block. The at least one first OAM data block is a code block that carries first OAM data. The first data flow is a data flow obtained by deleting at least one redundant block or at least one second OAM data block from a second data flow and inserting the at least one first OAM data block, or the first data flow is a data flow obtained by modifying at least one second OAM data block in a second data flow. The second data flow is an aggregated data flow. The second OAM data block carries second OAM data. |
| US11121906B2 |
Data plane API in a distributed computing network
Embodiments are directed to a distributed computing system comprising a plurality of compute nodes for providing resources to users and a hierarchy of two or more layers of controllers coupling the compute nodes to a user interface via a control plane, wherein at least one compute node receives a local application program interface (API) call from an application running on the at least one compute node, the local API call causing the at least one compute node to configure a local resource without requiring commands from the control plane. |
| US11121905B2 |
Managing data schema differences by path deterministic finite automata
A method for migrating a data schema comprising combining a first deterministic finite automaton with a second deterministic finite automaton to generate a modified deterministic finite automation. Identifying a state of the modified deterministic finite automaton without computed followers. Computing a new vector of original states for each state of the modified deterministic finite automaton corresponding to the identified state. |
| US11121902B2 |
Signal generation for OFDM-based systems
Methods, systems, and devices for wireless communications are described. A transmitting device may identify a first signal in a time domain, the first signal including multiple sequences spanning a bandwidth for multiple symbol periods. The transmitting device may segment the first signal into signal segments, where each signal segment corresponds to a respective symbol period of the multiple symbol periods. The transmitting device may apply a first transform operation to each signal segment of the signal segments and apply a bandwidth restriction in the frequency domain to the transformed signal segments. Then, the transmitting device may apply a second transform operation to each transformed signal segment to return the bandwidth-restricted segments to the time domain. The transmitting device may generate a second signal in the time domain based on the bandwidth-restricted segments. The transmitting device may then transmit the second signal to a receiving device. |
| US11121900B2 |
Discrete Fourier transform size decomposition
Various aspects of the present disclosure generally relate to wireless communication. In some aspects, a user equipment (UE) may determine, based at least in part on a decomposition rule for a discrete Fourier transform (DFT) block, a plurality of decomposition groups for tones, corresponding to a plurality of antenna ports of the UE, of a transmission. The UE may map the tones to the plurality of decomposition groups for transmission processing, and transmit, using the plurality of antenna ports, the transmission based at least in part on transmission processing. Numerous other aspects are provided. |
| US11121897B2 |
System and method for PUCCH transmission scheme
Technology for a user equipment (UE) configured for communication of sounding reference signal (SRS) resources is disclosed. The UE can decode a radio resource control (RRC) signal indicating an SRS to transmit with a physical uplink control channel (PUCCH), wherein the PUCCH and the SRS are quasi co located (QCLed) based on a spatial received parameter. The UE can encode an SRS for transmission using the spatial received parameter. The UE can encode uplink control information (UCI) for transmission in the PUCCH using the spatial received parameter. The UE can have a memory interface configured to send to a memory the spatial received parameter. |
| US11121894B2 |
Direct sequence detection and equalization
Methods and apparatuses for direct sequence detection can receive an input signal over a communication channel. Next, the input signal can be sampled based on a clock signal to obtain a sampled voltage. A set of reference voltages can be generated based on a main cursor, a set of pre-cursors, and a set of post-cursors associated with the communication channel. Each generated reference voltage in the set of reference voltages can correspond to a particular sequence of symbols. A sequence corresponding to the sampled voltage can be selected based on comparing the sampled voltage with the set of reference voltages. |
| US11121893B2 |
Equalizing transmitter and method of operation
A transmitter for providing channel equalization that includes a first driver and second driver having a high pass filter. The first driver generates a first output signal representing a digital input signal. The second driver generates a second output signal representing a high pass filtered version of the digital input signal. The first and second output signals are summed to provide a third output signal that is channel equalized for transmission over a channel. |
| US11121890B2 |
Channel prediction system and channel prediction method for OFDM wireless communication system
A channel prediction system and a channel prediction method for an OFDM wireless communication system include a standard echo state network and a two-layer adaptive elastic network. In the method, with respect to each subcarrier of a pilot OFDM symbol, an echo state network is trained by using frequency domain channel information of each subcarrier obtained by channel estimation. The trained echo state network may realize short-term prediction of the frequency domain channel information. To overcome a likely ill-conditioned solution of an output weight in an echo state network, the output weight in the echo state network is estimated by using a two-layer adaptive elastic network. |
| US11121885B2 |
Data analysis system and method for predicting meeting invitees
Computer implemented method and a system that includes receiving a list of invitees for a future meeting, accessing electronically stored relationship data that includes information identifying a plurality of individuals and existing relationships between the individuals, wherein the individuals include at least some of the invitees and also additional individuals, selecting one or more of the additional individuals that are identified in the relationship data as having existing relationships with one or more of the invitees, and adding the one or more selected additional individuals to a potential invitee list for the future meeting. |
| US11121873B2 |
System and method for hardening security between web services using protected forwarded access tokens
Methods for hardening security between web services using protected forwarded access tokens are implemented via systems and devices. User applications receive user tokens with user information from an identity provider and provide the user tokens to first services with data requests. Each first service extracts and transforms a portion of a user token to validate a user token signature, and determines a target service for the data request. The first services acquire actor tokens from the identity provider that uniquely identify the first services using public keys, and then generate authentication tokens, signed with corresponding private keys, that encapsulate the actor tokens and the transformed user tokens. The signed authentication tokens are provided to target services which validate the authentication tokens as well as the encapsulated tokens and their respective signatures. Upon validation, requested data is retrieved and provided back for the user applications from the target services. |
| US11121870B2 |
Method and system for interacting public and private blockchains with controlled participation
A method for controlling participation in a blockchain based on time includes: storing participant profiles, each including a public key of a cryptographic key pair and a period of time; storing a blockchain comprised of a plurality of blocks, each including at a block header and data values; receiving a block submission from a specific computing system including a digital signature and a new data value; verifying the digital signature based on the public key stored in a specific participant profile related to the specific computing system; verifying that the specific computing system is eligible for participation in the blockchain based on the period of time included in the specific participant profile and a present time; generating a new block comprised of a block header and the new data value; and transmitting the generated new block to nodes associated with the blockchain. |
| US11121869B1 |
Decentralized cryptographic key derivation
Cryptographic keys are generated for components of a distributed system in a decentralized manner. A root key is generated for a universe of components, including capturing data and components for processing the data. A cryptographic key for a processing component is derived from the root key and one or more attributes or identifiers of the processing component, which may be provided in a specific region or domain. Cryptographic keys for capturing components (e.g., cameras) within the region or domain are derived from the cryptographic keys of the processing component and one or more attributes or identifiers of the respective capturing components. The capturing components encrypt data using their respective cryptographic keys and transfer the encrypted data to the processing component, which re-derives the cryptographic keys for such capturing components and decrypts the encrypted data using the re-derived cryptographic keys. |
| US11121867B2 |
Encryption methods based on plaintext length
Examples discussed herein disclose, among other things, a method. The method includes, among other things, obtaining a plaintext, obtaining a key from a plurality of keys, and determining whether the plaintext is longer than a predefined threshold length. If the plaintext is longer than the predefined threshold length, the method may encrypt the plaintext with the key to generate a first ciphertext having a length of the plaintext, where the character at a predefined position within the first ciphertext belongs to a first subset of characters. And if the plaintext is not longer than the predefined threshold length, the method may encrypt the plaintext with the key to generate a second ciphertext, which is longer than the plaintext, where the character at the same predefined position in the second ciphertext belongs to a second subset of characters. |
| US11121865B2 |
Method and apparatus for establishing trusted channel between user and trusted computing cluster
Some embodiments of the present specification provide a method and an apparatus for establishing a trusted channel between a user and a trusted computing cluster. According to the method, when a user wants to establish a trusted channel with a trusted computing cluster, the user only negotiates a session key with any first trusted computing unit in the cluster to establish the trusted channel. Then, the first trusted computing unit encrypts the session key using a cluster key common to the trusted computing cluster to which the first trusted computing unit belongs, and sends the encrypted session key to a cluster manager. The cluster manager transmits the encrypted session key in the trusted computing cluster, so that other trusted computing units in the cluster obtain the session key and join the trusted channel. Thus, the user establishes a trusted channel with the entire trusted computing cluster. |
| US11121864B1 |
Secure private key distribution between endpoint instances
A method, a computer program product, and a system for distributing a private signature key between authorization instances. The method includes registering a plurality of authorization instances in a configuration file and generating host instance key pairs by each of the authorization instances. The method also includes storing the public host keys in the shared database and electing one of the authorization instances to be a signature key leader instance. The method includes generating, by the signature key leader instance, a signature key pair. The signature key pair includes a public signature key and a private signature key. The method also includes storing the public signature key in the shared database and transmitting an encrypted private signature key to a requesting authorization instance of the authorization instances. The method further includes decrypting the encrypted private signature key using the private host key generated by the requesting authorization instance. |
| US11121859B1 |
Efficient incremental consensus for block commit in blockchain network
Systems and techniques are disclosed for an efficient consensus protocol for block commits in a blockchain network. One of the methods includes obtaining, from a system, information indicating occurrence of a particular event, the particular event causing generation, by the entities, of respective block proposals for inclusions in the blockchain network. Attribution information is accessed, the information being generated including information describing the entities interactions with a user associated with the particular event. Incremental values are determined for inclusion in a block proposal associated with the entity. The block proposal is evaluated by remaining entities. The block proposal is included in the blockchain network based on greater than a threshold number of entities approving the block proposal. |
| US11121858B2 |
Blockchain analytics
A blockchain analytics system facilitates determination of parameters of blockchain objects for analytics. Examples of parameters of the blockchain object may include an identity of a participant, a role of a participant, a type of the blockchain object and the like. The system may store parameters of blockchain objects in the data repository. The system may use the determined parameters to generate a machine learning blockchain analytics model. The system may generate visualizations, detect patterns and/or for detecting anomalies based on the machine learning blockchain analytics model. |
| US11121852B2 |
Partial unrolling for software security
The present invention relates to a method to intrinsically protect a computer program having a driving value dedicated to handle sensitive data, said driving value comprising a plurality of N computation units to perform computations using sensitive data and susceptible to let sensitive data leak, each unit having V possible values, said method comprising a step of unrolling k parts of P units, with P>1 and P |
| US11121847B2 |
Communication method and communications device
The present disclosure relates to communication methods and communications devices. In one example communication method, control information is sent to a terminal device. The control information includes a resource identifier. The resource identifier indicates that allocated frequency domain resources are all frequency domain resources that can be supported by the terminal device on one carrier or that some of all frequency domain resources that can be supported by the terminal device on one carrier. |
| US11121846B2 |
Method and apparatus for transmitting data or control information in wireless communication system
The present disclosure relates to a pre-5th-Generation (5G) or 5G communication system to be provided for supporting higher data rates Beyond 4th-Generation (4G) communication system such as Long Term Evolution (LTE). A method for operating a base station in a wireless communication system includes allocating a first resource to a first service, allocating a part of the first resource, as a second resource, to a second service, and transmitting indication information for the second resource. |
| US11121841B2 |
Method and system for transmitting and receiving protocol data unit in communication networks
The present disclosure relates to a pre-5th-Generation (5G) or 5G communication system to be provided for supporting higher data rates Beyond 4th-Generation (4G) communication system such as Long Term Evolution (LTE). A method and system for managing data transmission in a communication network is provided. During Data Resource Bearer (DRB) creation, network signals to a transmitting node, the data transfer requirement. The network uses a signaling parameter to indicate a large data transfer requirement. Based on the data transfer requirement information collected from the network, the transmitting node determines the type of data format that needs to be used for the data transmission. If the network signals large data transfer requirement, then the transmitting node selects a Subheader format in which the length field of the data format suits the large data transfer requirement. Further, data communication is initiated using the selected Subheader format. |
| US11121840B2 |
Method for reporting power headroom for SRS, terminal device, and computer storage medium
A method for reporting PH for an SRS, terminal device and computer storage medium are provided. The method includes: the terminal device calculates at least one expected SRS transmit power on at least one SRS resource in a target SRS resource set, the target SRS resource set is an SRS resource set on a target BWP; when the terminal device does not transmit an SRS on the target BWP at a moment of calculating the PH, the target SRS resource set is an SRS resource set with a lowest set index on the target BWP; the terminal device obtains the PH of the target SRS resource set through calculation according to the at least one expected SRS transmit power on the at least one SRS resource; and the terminal device reports the PH of the target SRS resource set obtained through calculation. |
| US11121837B2 |
User equipment and method of SRS transmission
A user equipment (UE) is disclosed including a receiver that receives Sounding Reference Symbol (SRS) configuration information that indicates a first resource used for transmission of a predetermined reference signal from a base station (BS). The UE includes a transmitter that transmits an SRS using a second resource that is the first resource. The UE further includes a processor that determines a precoder applied to the SRS based on the predetermined reference signal. The transmitter transmits the SRS precoded using the determined precoder. The predetermined reference signal is a Channel State Information Reference Signal (CSI-RS), an SRS, or a Synchronization Signal Block (SSB)/Physical Broadcast Channel (PBCH). |
| US11121832B2 |
Method and apparatus for transmitting data using a multi-carrier in a mobile communication system
The present disclosure relates to a method and apparatus for transmitting data using a multi-carrier in a mobile communication system. The method of transmitting data in user equipment of a wireless communication system using a carrier aggregation technique according to an embodiment of the present disclosure includes the steps of setting secondary cells included in an S-TAG (Secondary-Timing Advance Group) configured of only secondary cells (SCells), deactivating a downlink timing reference cell in the S-TAG; determining whether other activated secondary cells exist besides the deactivated downlink timing reference cell in the S-TAG, and when the other activated secondary cells exist in the S-TAG, setting one of the other activated secondary cells as a new downlink timing reference cell. According to the present disclosure, uplink transmission speed can be increased in the user equipment and user QoS can be improved by transmitting data using one or more uplink carriers in the terminal. |
| US11121830B2 |
Communication system having a central aggregation device and a remote device
Provided is a communication system that can sustain a reduction in delay in FFT/IFFT processing by code blocking user data, even in a case where the functions of upper layers such as a MAC scheduler and the function of the radio physical layer are implemented separately. In a radio base station (communication system) including a central aggregation device 210 and a remote device 220, the central aggregation device 210 transmits code blocks in a number necessary for generating an OFDM symbol as a piece of data to the remote device 220, the code blocks being produced by dividing user data into units of encoding processing. |
| US11121815B2 |
Shared data channel design
Systems, methods and instrumentalities are disclosed for decoding data. For example, it may be determined, in a current slot, whether data received in a previous slot is decoded successfully. The data received in the previous slot may be included in a Physical Downlink Shared Channel (PDSCH). If the data received in the previous slot is not decoded successfully, preemptive multiplexing information may be detected in a first search space. The data received in the previous slot may be decoded, for example, using detected preemptive multiplexing information. The preemptive multiplexing information may be of a current slot. The preemptive multiplexing information may be comprised in a first DCI. A second search space of the current slot may be searched. For example, the second search space may be searched for a second DCI. The first DCI and the second DCI may be different. |
| US11121814B2 |
Techniques of CSI feedback with unequal error protection messages
In an aspect of the disclosure, a method, a computer-readable medium, and an apparatus are provided. The apparatus may be a UE. The UE determines priority levels of a plurality of messages based on at least one predetermined rule. The plurality of messages contain channel state information to be reported to a base station. The at least one predetermined rule specifies that a message including an indicator indicating at least one of a beam selection at a particular dimension and an orthogonal beam group selection has a priority level higher than a priority level of a message including an indicator indicating at least one of a beam direction from a group of beam candidates or co-phasing between two sets of antennas for two polarizations. The UE sends, to the base station, one or more messages of the plurality of messages based on the priority levels of the plurality of messages. |
| US11121813B2 |
Method and system for wireless local area network (WLAN) long symbol duration migration
A method performed by an AP may comprise transmitting a MU-HE-PPDU, on a first 20 MHz channel and a second 20 MHz channel, to a plurality of STAs. The MU-HE-PPDU may comprise an HE-SIG-A portion carried on the first 20 MHz channel and the second 20 MHz channel. The MU-HE-PPDU may comprise a first HE-SIG-B portion carried on the first 20 MHz channel and a second HE-SIG-B portion carried on the second 20 MHz channel. |
| US11121809B2 |
Channel coding method and apparatus in wireless communications
This application provides a channel encoding method and apparatus in wireless communications. The method includes: performing CRC encoding on A to-be-encoded information bits, to obtain a first bit sequence, where the first bit sequence includes L CRC bits and A information bits; performing a interleaving operation on the first bit sequence, to obtain a second bit sequence, where a first interleaving sequence used for the interleaving operation is obtained based on a system-supported maximum-length interleaving sequence with the length of Kmax+L, and Kmax is a maximum information bit quantity corresponding to the maximum-length interleaving sequence ad a preset rule, and a length of the first interleaving sequence is equal to A+L. Therefore, during distributed CRC encoding, when an information bit quantity is less than the maximum information bit quantity, an interleaving sequence required for completing an interleaving process is obtained based on the system-supported maximum-length interleaving sequence. |
| US11121806B2 |
Decoding performance
This disclosure provides systems, methods and apparatus, including computer programs encoded on computer storage media, for low density parity check (LDPC)-based incremental redundancy (IR) hybrid automatic repeat request (HARQ) transmission processing. In one aspect, an apparatus for wireless communications is configured to generate a first packet using a LDPC encoding process. The apparatus is further configured to generate coded bits using a second LDPC encoding process if the first packet is not successfully decoded by a wireless device, generate a second packet including at least some of the coded bits generated using the second LDPC encoding process, and output the second packet for transmission. |
| US11121804B2 |
Base station, radio terminal, radio communication system, radio communication control method, and program
A radio communication system (1000) according to the present disclosure includes a base station (100) that transmits transmission data, a radio terminal (200) that receives the transmission data from the base station (100) and transmits an acknowledgement for the transmission data to the base station (100). The radio terminal (200) transmits communication quality information measured for a communication status between the radio terminal (200) and the base station (100) to the base station (100). The base station (100) determines control information for controlling a process of the radio terminal (200) to transmit the acknowledgement based on the communication quality information received from the radio terminal (200), and transmits the control information to the radio terminal (200). The radio terminal (200) receives the control information from the base station (100), and transmits the acknowledgement to the base station (100) based on the control information. |
| US11121802B2 |
CSI obtaining method, server, terminal, and AP
A method includes determining at least one first measurement AP in first storage APs according to the address of the first AP, sending a second CSI measurement request to the at least one first measurement AP, where the second CSI measurement request includes the address of the terminal, receiving first measurement data, where the first measurement data includes first CSI, the first CSI is obtained after a target measurement AP performs channel estimation on the first service data, and sending the first measurement data or a first processing result to the terminal, where the first processing result is obtained by using the first measurement data. |
| US11121799B2 |
Method for determining modulation and coding scheme in wireless communication system, and device therefor
The present invention provides a method for determining a modulation and coding scheme (MCS) to be applied to data in a wireless communication system, and a device therefor. Specifically, the method may comprise the steps of: reporting, to a base station, channel state information including a first measurement value related to a channel state between a terminal and the base station; receiving at least one downlink reference signal from the base station; calculating a second measurement value related to the channel state by using the received at least one downlink reference signal; when the second measurement values is equal to or smaller than a preconfigured threshold value in comparison with the first measurement value, transmitting, to the base station, a specific uplink signal requesting a change of an MCS designated to downlink data; and receiving the downlink data, to which the changed MCS has been applied, from the base station. |
| US11121798B2 |
Control method for communication device, and communication device
A method of controlling a communication device including a communication interface that communicates with a wireless terminal includes successively selecting one transmission scheme included in a plurality of transmission schemes according to schedule information and using the selected one transmission scheme for a trial of communications with the wireless terminal via a communication interface in a first period; determining which transmission scheme of the plurality of transmission schemes has succeeded in communicating with the wireless terminal in the first period; and adjusting the schedule information so that a trial of communications using a transmission scheme determined as having succeeded in communicating with the wireless terminal is started earlier in a second period subsequent to the first period than in the first period. |
| US11121794B2 |
Configurable synchronization in next generation wireless networks
Aspects of the present disclosure provide for the transmission of various synchronization signals with variable periodicity. For synchronization signals with long periodicity, in some aspects of the disclosure, the synchronization signals may be transmitted as single-frequency-network (SFN) synchronization signals and/or the synchronization signals may be repeated a number (N) of times within a synchronization burst to reduce user equipment (UE) search latency and improve UE measurement accuracy. In some examples, the synchronization signals may be repeated within a synchronization burst using a repetition pattern that may be configurable based on the periodicity of transmission or fixed for one or more periodicities of transmission. |
| US11121790B2 |
Latency reduction in ethernet frames
A bitstream representing an Ethernet frame is received over a physical medium. Encoded Ethernet blocks are recovered from the bitstream. The Ethernet blocks are descrambled and provided to downstream switching logic, intact, without removing the synchronization bits that were added during the encoding process. More particularly, the intact descrambled Ethernet block is divided into smaller-sized data words; the size of the data words being an integer multiple of the size of the Ethernet block. |
| US11121788B1 |
Channel prediction method and system for MIMO wireless communication system
The disclosure discloses a channel prediction method and system for a MIMO wireless communication system. The method includes the following steps: obtaining frequency domain channel information of each antenna pair of the MIMO wireless communication system through channel estimation; processing, by inverse Fourier transform, frequency domain channel information of each antenna pair to obtain information of each effective delay path of the MIMO wireless communication system; training the width learning system; utilizing the trained width learning system to predict each effective delay path of each antenna pair, so as to obtain the information of the next moment of each effective delay path of each antenna pair; after summarizing the information of the next moment of each effective delay path of each antenna pair obtained through prediction, the Fourier transform is utilized to convert the information into predicted frequency domain channel information. The invention can provide satisfactory prediction performance. |
| US11121786B2 |
Method and apparatus for measuring interference in wireless communication system
An operating method and an apparatus for measuring interference of a user equipment in a wireless communication system are provided. The operating method includes receiving configuration information for interference measurement, from a base station of a serving cell, detecting a downlink reception timing based on a downlink signal received from the base station, determining an interference measurement timing based on the downlink reception timing and a timing advance (TA) offset of the serving cell, and performing interference measurement according to the configuration information at the determined interference measurement timing. |
| US11121783B2 |
Jitter determination method and measurement instrument
A jitter determination method for determining at least one jitter component of an input signal is described. The input signal is generated by a signal source, including: receiving the input signal; determining a step response based on the decoded input signal, the step response being associated with at least the signal source; and determining the at least one jitter component of the input signal based on at least one of the input signal and the determined step response. Further, a measurement instrument is described. |
| US11121781B2 |
Calibration method and apparatus
This application provides a calibration method: receiving, by a control apparatus of an RRU, resource configuration information, where a time-frequency resource indicated by the resource configuration information is used to send and receive a calibration signal between the RRU and n other RRUs, the n other RRUs are RRUs in a calibration path topology, a quantity of hops of a calibration path between the RRU and each of the n other RRUs is 1; controlling, based on the resource configuration information, the RRU to send and receive a calibration signal on the time-frequency resource; obtaining m groups of path information based on the calibration signal; obtaining m calibration coefficients based on the m groups of path information; and compensating M channels of the RRU by using the m calibration coefficients. |
| US11121776B2 |
Faceplate pluggable remote laser source and system incorporating same
A faceplate pluggable remote laser source and system incorporating such a laser source. The system may include an enclosure having a faceplate; a first optical connector, in the faceplate; a laser module; and a loopback fiber cable, connected between the laser module and the first optical connector. The faceplate may form an exterior boundary of the enclosure. The laser module may have a first end including an electrical interface, and a second end including an optical interface. The first end of the laser module may be engaged in a receptacle in the faceplate, and the second end of the laser module may extend outside the faceplate. The laser module may be configured to receive electrical power through the electrical interface, and to produce unmodulated light at the optical interface. The loopback fiber cable and the first optical connector may be configured to route the unmodulated light back into the enclosure. |
| US11121773B2 |
Split power-control electronics with fiber-optic multiplexing
Provided are embodiments of a system for split power-control electronics with fiber-optic multiplexing. The system includes one or more power electronics modules configured to provide power to a load, and a control card configured to control the one or more power electronics modules. The system also includes a control module configured to receive and process the control card, and one or more connections, the one or more connections configured to connect a control module to the one or more power electronics modules. Also provided are embodiments of a method for operating power electronics modules in a redundant mode. |
| US11121771B2 |
System and method for providing integrated projection service of plurality of smart devices in vehicle
A system and method for providing an integrated projection service of a plurality of smart devices, for controlling services for the respective smart devices in the vehicle based on preset priorities of the services when a plurality of smart devices is connected to one vehicle using Wi-Fi, may include providing an integrated projection service of a plurality of smart devices in a vehicle may include making a request to a head unit of the vehicle for connection to enable wired or wireless data communication using Wi-Fi wireless communication technology provided in the vehicle, by at least one smart device positioned in the vehicle, and approving connection of a smart device, searching for service information to be provided by each smart device, and listing retrieved services to be integrated. |
| US11121767B2 |
Handling signals received on paths with differing numbers of hops
A wireless communication system includes a first wireless communication node for transmitting a data signal that is sent to a second wireless communication node by skywave propagation over at least two different data transmission paths. The first data transmission path includes at least one reflection point where the data signal is reflected by the atmosphere and the second data transmission path includes more reflection points than the first data transmission path. The data signal that travelled along the first data transmission path is decoded before the data signal that travelled along the second data transmission path. |
| US11121766B2 |
Wideband transceiver
A wideband transceiver for a gateway is presented. The wideband transceiver may interface with the gateway's processors over an interface that carries data encapsulated in baseband frames. The wideband transceiver may comprise a modulator and a high power amplifier and may improve a transmitted signal quality and may utilize a wideband for wireless communications, for example, for a satellite communication system. |
| US11121763B1 |
System and method for downlink scheduling that optimizes downlink (DL) capacity
An illustrated embodiment disclosed herein is a method including maintaining, by a satellite, a plurality of physical data units (PDUs). Each PDU has a corresponding spreading factor (SF). The method includes selecting, by the satellite, a lowest SF, adding, by the satellite, all PDUs associated with the lowest SF to a slot, and determining, by the satellite and until the determination is affirmative, whether available capacity of the slot is less than a predetermined threshold. The method includes, responsive to determining that the available capacity of the slot is not less than the predetermined threshold, selecting, by the satellite, a greater SF and adding, by the satellite, one or more PDUs associated with the greater SF to the slot. The method includes responsive to determining that the available capacity of the slot is less than that the predetermined threshold, sending, by the satellite, the slot to an endpoint. |
| US11121759B2 |
Techniques for interference-aware beam pair selection
A processing device in a transmit-receive point for interference-aware beam pair selection, a transmit-receive point and a method are disclosed. The processing device is configured to select a beam pair from a set of candidate beam pairs (i, j), for setting up a communication link from a serving transmit device to a receive device via the selected beam pair, wherein each of the candidate beam pairs comprises a transmit beam j of the serving transmit device and a receive beam i of the receive device, wherein the selection is based on statistics of a usage of one or more interfering transmit beams (m, k) of one or more interfering transmit devices m, and k represents one or more transmit beams. |
| US11121756B2 |
Method for transmitting and receiving channel state information in wireless communication system and apparatus therefor
Disclosed are a method for transmitting and receiving a radio signal in a wireless communication system and an apparatus therefor. Particularly, a method for performing, by a terminal, channel state information (CSI) reporting in a wireless communication system comprises the steps of: receiving, from a base station, bandwidth part (BWP) configuration information on a BWP for uplink and/or downlink transmission; receiving, from the base station, reporting configuration information including a reporting configuration for the CSI reporting; and performing the CSI reporting on the basis of the BWP configuration information and the reporting configuration information, wherein the reporting configuration is associated with the BWP, and whether or not the reporting configuration is activated may be determined on the basis of whether or not the BWP is activated. |
| US11121754B2 |
Method for measuring and reporting channel state information in wireless communication system and device for same
The present specification provides a method for measuring and reporting channel state information (CSI) in a wireless communication system and a device for same. More particularly, in a method for reporting channel state information in a wireless communication system, the method which is carried out by means of a base station can comprise the steps of: transmitting CSI report configuration information associated with a CSI report to a terminal, wherein the CSI report configuration information comprises information indicating a time offset for the CSI report; transmitting a channel state information reference signal (CSI-RS) to the terminal; transmitting control information, which is for triggering the CSI report, to the terminal; and receiving from the terminal the CSI report which is generated on the basis of the measurement with respect to the CSI-RS. Here, if the information indicating the time offset for the CSI report is configured in “0” value, the CSI-RS can be transmitted periodically or semi-continuously. |
| US11121753B2 |
Method and device for receiving channel state information in mobile communication system
Disclosed is a 5G or pre-5G communication system for supporting a data transmission rate higher than that of a 4G communication system such as LTE. According to an embodiment of the present invention, a method for reporting channel state information of a terminal in a wireless communication system comprises the steps of: determining whether a resource for transmitting a reference signal for channel measurement overlaps with a resource for a specific type of transmission; generating channel state information on the basis of the determination result; and transmitting the generated channel state information to a base station. |
| US11121747B2 |
Wireless communication device and wireless communication method
A wireless communication device includes: a receiving unit that receives a first signal storing first information with which precision or accuracy of transmission power is recognized; and a transmission unit that transmits a second signal regarding permission of multiple access that allows simultaneous communication with at least one first wireless communication device identified on the basis of the first information. A wireless communication device includes: a transmission unit that transmits a first signal storing first information with which precision or accuracy of transmission power is recognized; a receiving unit that receives a second signal regarding permission of multiple access that allows simultaneous communication after the transmission of the first signal; and a control unit that controls transmission of a third signal on the basis of the second signal. |
| US11121746B2 |
Dynamic switching between SU-MIMO and MU-MIMO transmission
Disclosed herein are system, method, and computer program product embodiments for indicating a preference to receive a single-user multiple input multiple output (SU-MIMO) or multi-user multiple input multiple output (MU-MIMO) transmission from an access point (AP). Embodiments include generating a standard action frame that contains an action field that species a preference to receive a SU-MIMO or MU-MIMO transmission from the AP. A station (STA) can transmit the generated action frame to the AP. The STA can receive an acknowledgement frame from the AP that indicates the AP is configured to use the requested transmission method. The STA can then receive data from the AP using the requested transmission method. |
| US11121745B2 |
Method for transmitting plurality of beamformed reference signals for open-loop MIMO transmission in wireless communication system and apparatus therefor
Disclosed is a method for a terminal to report channel state information to a base station in a wireless communication system. The method comprises the steps of: receiving a first reference signal and a second reference signal which are cyclically beamformed in different directions in a predetermined resource unit from the base station; and reporting the channel state information to the base station on the basis of the first reference signal and the second reference signal, wherein the channel state information comprises a first precoder group corresponding to the first reference signal and a second precoder group corresponding to the second reference signal. |
| US11121742B2 |
Self-detaching anti-theft device with a multi-purpose transceiver for energy harvesting and communication
Systems and methods for operating a security tag. The methods comprise: performing communication operations by the security tag at a communications frequency; using a receive circuit of the security tag to harvest energy emitted from a transmit circuit of an external device at an energy harvesting frequency. The communications frequency is out of band of the energy harvesting frequency. |
| US11121741B2 |
Systems and methods for configuring and communicating with HVAC devices
A sensor in a building HVAC system includes a transducer configured to measure a variable in the building HVAC system and to generate a sensor reading indicating a value of the measured variable. The sensor includes a communications interface configured to provide the sensor reading to a control device in the building HVAC system and a near field communication (NFC) circuit separate from the communications interface. The NFC circuit is configured to facilitate bidirectional NFC data communications between the sensor and a mobile device. The sensor includes a processing circuit having a processor and memory. The processing circuit is configured to wirelessly transmit data stored in the memory of the sensor to the mobile device via the NFC circuit, wirelessly receive data from the mobile device via the NFC circuit, and store the data received from the mobile device in the memory of the sensor. |
| US11121740B2 |
Near field, full duplex data link for resonant induction wireless charging
A full duplex, low latency, near field data link controls a resonant induction, wireless power transfer system for recharging batteries. In an electric vehicle embodiment, an assembly is aligned with respect to a ground assembly to receive a charging signal. The vehicle assembly includes one or more charging coils and a first full duplex inductively coupled data communication system that communicates with a ground assembly including one or more charging coils and a second fill duplex inductively coupled data communications system. The charging coils of the ground assembly and the vehicle assembly are selectively enabled based on geometric positioning of the vehicle assembly relative to the ground assembly for charging. As appropriate, the transmit/receive system of the ground assembly and/or the vehicle assembly are adjusted to be of the same type to enable communication of charging management and control data between the ground assembly and the vehicle assembly during charging. |
| US11121739B2 |
Sounding reference signal (SRS) configurations for one or more frequency hops
In an aspect, a UE receives an SRS configuration that indicates, for at least one frequency hop, an allocation of less than all subcarriers of a sounding bandwidth to SRS per OFDM symbol in a respective frequency hop. The UE transmits, to a BS in a first frequency hop, OFDM symbols with SRS across all subcarriers of a first sounding bandwidth associated with the first frequency hop. In another aspect, the UE receives an SRS configuration that indicates, for frequency hops associated with the same comb-type, a sequence of resource element offsets that is based on a number of OFDM symbols used in the respective frequency hop. The UE transmits OFDM symbols with SRS in accordance with the sequence of resource element offsets indicated by the SRS configuration for the respective frequency hop. |
| US11121737B2 |
Systems and methods for intelligently-tuned digital self-interference cancellation
A system for digital self-interference cancellation includes a filter that generates a reduced-noise digital residue signal; a channel estimator that generates a current self-interference channel estimate from a digital transmit signal, the reduced-noise digital residue signal, and past self-interference channel estimates; a controller that dynamically sets the digital transform configuration in response to changes in a controller-sampled digital residue signal; a predictor that modifies output of the channel estimator to compensate for a first time delay incurred in tuning the system for digital self-interference cancellation; and a channel memory that stores the past self-interference channel estimates. |
| US11121736B2 |
Radio frequency circuit supporting carrier aggregation
A radio frequency (RF) circuit is provided. The RF circuit may include a variety of RF filters organized into a number of filter banks and configured to support carrier aggregation (CA) in a variety of band combinations. In examples discussed herein, the RF circuit is configured to utilize separate receive and transmit filters for filtering an RF receive signal and an RF transmit signal in a time-division duplex (TDD) band, respectively. By employing separate receive and transmit filters for the TDD band, as opposed to using an integrated receive-transmit filter, it may be possible to implement the receive and transmit filters in the RF circuit with improved impedance matching, interference rejection, and insertion loss without increasing a footprint of the RF circuit. |
| US11121731B2 |
Digital radio head control
Techniques are described related to digital radio control and operation. The various techniques described herein enable high-frequency local oscillator (LO) signal generation using injection locked cock multipliers (ILCMs). The techniques also include the use of LO signals for carrier aggregation applications for phased array front ends. Furthermore, the disclosed techniques include the use of array element-level control using per-chain DC-DC converters. Still further, the disclosed techniques include the use of adaptive spatial filtering and optimal combining of analog-to-digital converters (ADCs) to maximize dynamic range in digital beamforming systems. |
| US11121730B2 |
Radio frequency circuit, multiplexer, and communication device
A radio frequency circuit includes: an antenna connection terminal; a UHB transfer circuit that transfers a signal of a first frequency band including at least a part of a frequency band higher than or equal to 3.3 GHz and under 5 GHz; a NR-U transfer circuit that transfers a signal of a second frequency band including at least a part of a frequency band higher than or equal to 6.6 GHz; and a filter having a frequency band including the first frequency band and the second frequency band as a passband. The filter is disposed between the antenna connection terminal and a connection node of the UHB transfer circuit and the NR-U transfer circuit. |
| US11121728B2 |
Pre-coding and decoding polar codes using local feedback
Disclosed are devices, systems and methods for precoding and decoding polar codes using local feedback are described. One example method for improving an error correction capability of a decoder includes receiving a noisy codeword vector of length n, the codeword having been generated based on a concatenation of a convolutional encoding operation and a polar encoding operation and provided to a communication channel prior to reception by the decoder, performing a successive-cancellation decoding operation on the noisy codeword vector to generate a plurality of polar decoded symbols (n), generating a plurality of information symbols (k) by performing a convolutional decoding operation on the plurality of polar decoded symbols, wherein k/n is a rate of the concatenation of the convolutional encoding operation and the polar encoding operation, and performing a bidirectional communication between the successive-cancellation decoding operation and the convolutional decoding operation. |
| US11121721B2 |
Method of error concealment, and associated device
In an embodiment, a method includes: receiving an audio frame; decomposing the received audio frame into M sub-band pulse-code modulation (PCM) audio frames, where M is a positive integer number; predicting a PCM sample of one sub-band PCM audio frame of the M sub-band PCM audio frames; comparing the predicted PCM sample with a corresponding received PCM sample to generate a prediction error sample; comparing an instantaneous absolute value of the prediction error sample with a threshold; and replacing the corresponding received PCM sample with a value based on the predicted PCM sample when the instantaneous absolute value of the prediction error sample is greater than the threshold. |
| US11121720B2 |
Analog-to-digital converter having quantization error duplicate mechanism
The present invention provides an ADC including a first switched capacitor array, a second switched capacitor array, a third switched capacitor array, an integrator and a quantizer. The first switched capacitor array is configured to sample the input signal to generate a first sampled signal. The second switched capacitor array is configured to sample the input signal to generate a second sampled signal and generate a first quantization error. The third switched capacitor array is configured to sample the input signal to generate a third sampled signal and generate a second quantization error. The integrator is configured to receive the first quantization error and the second quantization error in a time-interleaving manner, and integrate the first/second quantization error to generate an integrated quantization error. The quantizer is configured to quantize the first sampled signal by using the integrated quantization error as a reference voltage to generate a digital output signal. |
| US11121718B1 |
Multi-stage sigma-delta analog-to-digital converter with dither
Techniques to implement subtractive dither in a multi-stage ADC. Subtractive dither involves adding a first dither signal at a first node and adding a second dither signal at a second node (which can be the same as the first node), where the first and second dither signal combine and sum to approximately zero. By utilizing subtractive dither in a multi-stage ADC, the headroom requirements of a loop filter in a main loop of the ADC and the range requirements of a feedback DAC in the main loop can both be relaxed. |
| US11121714B2 |
Apparatuses and methods for identifying memory devices of a semiconductor device sharing an external resistance
Apparatuses and methods for identifying memory devices of a semiconductor device sharing an external resistance are disclosed. A memory device of a semiconductor device may be set in an identification mode and provide an identification request to other memory devices that are coupled to a common communication channel. The memory devices that are coupled to the common communication channel may share an external resistance, for example, for calibration of respective programmable termination components of the memory devices. The memory devices that receive the identification request set a respective identification flag which can be read to determine which memory devices share an external resistance with the memory device having the set identification mode. |
| US11121711B2 |
Method for multiplexing between power supply signals for voltage limited circuits
In an embodiment, a system includes a plurality of functional circuits, a power supply circuit, and a power management circuit. The power supply circuit may generate a shared power signal coupled to each of the functional circuits, and to generate a plurality of adjustable power signals. One adjustable power signal may be coupled to a particular functional circuit of the functional circuits. The power management circuit may a request to the power supply circuit to change a voltage level of the one particular adjustable power signal from a first voltage to a second voltage. The particular functional circuit may couple a respective power node for a sub-circuit of the particular functional circuit to either of the shared power signal or the particular adjustable power signal. The particular functional circuit may also be configured to maintain an operational voltage level on the power node. |
| US11121706B1 |
Duty cycle correction circuit and semiconductor system
A duty cycle correction circuit may include a data alignment circuit, a correction value generation circuit, and a dock generation circuit. The data alignment circuit may align unit pattern data based on a strobe clock signal. The correction value generation circuit may generate a duty correction value by measuring the amount of charges corresponding to the aligned data. The clock generation circuit may correct the duty ratio of the strobe clock signal based on the duty correction value. |
| US11121702B1 |
Digital step attenuator
Various embodiments of the invention relate to attenuators with reduced temperature variation. By coordinating first-order resistance temperature (FORT) coefficients of resistors, embodiments of attenuator or attenuator cells are capable of achieving desired attenuation with reduced or minimized temperature variation. Such achievements in reducing temperature variation may be obtained without relying on resistors with large negative FORT coefficients. Attenuator cells may be configured as T-type attenuator cells, π-type attenuator cells, bridged-T attenuator cells, or shunt attenuators with various FORT coefficient combinations for the resistors incorporated within the attenuator cells. Furthermore, various attenuator cells may be cascaded together into a digital step attenuator with the temperature variation of those cells compensating or offsetting each other for an overall minimum temperature variation. |
| US11121696B2 |
Electrode defined resonator
A bulk acoustic resonator operable in a bulk acoustic mode includes a resonator body mounted to a separate carrier that is not part of the resonator body. The resonator body includes a piezoelectric layer, a device layer, and a top conductive layer on the piezoelectric layer opposite the device layer. A surface of the device layer opposite the piezoelectric layer is for mounting the resonator body to the carrier. |
| US11121692B2 |
Noise filter circuit
An input loop line (5) is disposed in a region inside or outside the loop of an output loop line (9) as viewed in the thickness direction of a dielectric layer (2). |
| US11121690B2 |
Class D amplifier circuit
This application relates to Class D amplifier circuits. A modulator controls a Class D output stage based on a modulator input signal (Dm) to generate an output signal (Vout) which is representative of an input signal (Din). An error block, which may comprise an ADC, generates an error signal (ε) from the output signal and the input signal. In various embodiments the extent to which the error signal (ε) contributes to the modulator input signal (Dm) is variable based on an indication of the amplitude of the input signal (Din). The error signal may be received at a first input of a signal selector block. The input signal may be received at a second input of the signal selector block. The signal selector block may be operable in first and second modes of operation, wherein in the first mode the modulator input signal is based at least in part on the error signal; and in the second mode the modulator input signal is based on the digital input signal and is independent of the error signal. The error signal can be used to reduce distortion at high signal levels but is not used at low signal levels and so the noise floor at low signal levels does not depend on the component of the error block. |
| US11121687B1 |
Voltage gain amplifier architecture for automotive radar
Disclosed herein is a circuit including a differential amplifier having a pair of input transistors coupled in a differential arrangement between adjustable current sources and receiving input differential signals from a pair of input voltage regulators. The adjustable current sources are configured to source more current to the pair of input transistors than current that is sunk from the pair of input transistors. A first amplifier has inputs coupled to receive differential output voltages from the differential amplifier. A second amplifier has inputs coupled to receive amplified differential output voltages from the first amplifier. A low pass filter has inputs coupled to receive further amplified differential output voltages from the second amplifier and produce final differential output voltages. |
| US11121684B2 |
Method and apparatus for digital envelope tracking with dynamically changing voltage levels for power amplifier
A device for digital envelope tracking with dynamically changing voltage levels for a radio frequency (RF) power amplifier is disclosed. A power management unit generates a set of supply voltages for a power amplifier based on a control signal. A setpoint generator in the power management integrated circuit gradually increases or decreases a target voltage such that the set of supply voltages output from the voltage converter gradually increase or decrease in response to a gradual transition of the target voltage. A transceiver includes digital models for replicating a behavior of the setpoint generator and a voltage regulator in the voltage converter such that a signal pre-distortion unit may use an instantaneous voltage level for signal predistortion. |
| US11121679B2 |
Amplifying apparatus with improved linearity
An amplifying apparatus is provided. The amplifying apparatus comprises an amplifying circuit comprising a power amplifier and a bias circuit, the bias circuit is configured to detect an ambient temperature of the power amplifier to output a temperature voltage and regulate an internal current based on an input control signal to supply a bias current obtained by the regulation to the power amplifier; and a temperature control circuit that generates the control signal based on the temperature voltage during initial driving from a transmission mode starting point in time to an input point in time at which an input signal is input and outputting the control signal to the amplifying circuit. |
| US11121676B1 |
Methods and circuits for harmonic suppression
The present document discloses circuits and methods for providing an output voltage at an output port. In one of the embodiments, a circuit has a power amplifier having an output. In particular, the circuit may have a first transformer including a first coil and a second coil. Moreover, the circuit may have a first capacitor connected in parallel to the first coil and a second capacitor connected in parallel to the second coil. More particularly, the circuit may be adapted to have a first end of the first coil connected to the output of the power amplifier, and a second end of the first coil connected to the output port of the circuit. |
| US11121675B2 |
Remotely powered low power oscillator
A remotely powered low power oscillator. According to an embodiment of the present invention, a method comprises an oscillator core, in a first environment, generating an oscillating signal; a power management system, in a second environment, supplying power to the oscillator core to operate the oscillator core; a sensing system, in the first environment, sensing one or more parameters of the oscillator core, and generating one or more signals representing said one or more parameters; transmitting the one or more signals from the sensing system to the second environment; and using the one or more signals in the second environment to control the power supplied to the oscillator core from the power management system. |
| US11121672B2 |
Solar energy harvesting apparatus with turbulent airflow cleaning
A photovoltaic system includes a photovoltaic cell including a sun tracker, a top surface configured to generate electrical energy from the incident sunlight, and a bottom surface configured to thermally dispel heat generated by the photovoltaic cell; at least one mirror including a reflective surface; a plurality of actuators securing the at least one mirror the photovoltaic cell; at least one actuator pump connected to the plurality of actuators and configured to extend or retract the plurality of actuators and adjust the distance of the at least one mirror from the top surface; a heat exchanger thermally coupled to the bottom surface of the photovoltaic cell; and a fluid pump connected to the heat exchanger and configured to circulate the fluid through the heat exchanger. |
| US11121671B2 |
A-frame foundation system for single-axis trackers with weak axis support
A single-axis tracker supported by multiple A-frame-shaped single-truss foundations that translate lateral loads into axial forces of tension and compression, and at least one truss foundation supporting the torque tube drive motor or other tracker component subject to axial loads to provide support for lateral loads as well as loads oriented along the axis of the torque tube. |
| US11121670B2 |
Smart shingles
At least one shingle is integrated with logic circuitry and various other components which enable high-level functionality and automated system diagnostics. Each shingle can automatically determine its absolute position on a rooftop and/or its position relative to other shingles in the smart shingle system. Each shingle can also detect various changes in its own power generation, efficiency, and/or operating conditions, as well as those of neighboring shingles. Each shingle can then leverage this information to conduct system diagnostics and possibly to generate and/or execute recommended solutions. In another embodiment, each shingle can be coupled to a centralized controller which can perform the same automapping and diagnostic functions. The controller can also monitor the power usage of the building to help optimize the power generation of the smart shingle system. In some embodiments, the smart shingle system can be outfitted with heating components and/or actuators to help automate the process of keeping the smart shingles clear of debris. |
| US11121668B2 |
Clamps for solar system
A solar power system can include a rail and a solar module disposed on the rail. A clamp assembly can couple the solar module to the rail. The clamp assembly can have a clamped configuration in which the solar module is secured to the rail and an unclamped configuration. The clamp assembly can comprise an upper clamp member, a lower clamp member coupled to the rail, and a stabilization member mechanically engaging the upper clamp member and the lower clamp member. The stabilization member can prevent rotation of the lower clamp member relative to the rail when the clamp assembly is in the clamped and unclamped configurations. In the unclamped configuration, the stabilization member can be biased such that the upper clamp member is disposed at a sufficient clearance above the rail to permit the insertion of the solar module between the upper clamp member and the rail. |
| US11121667B2 |
Mounting system for roof mounted solar panels
A method and apparatus for efficiently securing flexible solar panels on a roof surface that does not require penetration of the roof membrane. The apparatus is composed of extruded aluminum bars with two grooves. The apparatus has a low profile relative to the surface of the roof. The aluminum bars' streamlined design allows free drainage between and over the aluminum structure, as well as an aerodynamic profile to counteract air flow resistance in a high wind environment. |
| US11121665B1 |
Current measurement apparatus
Integrated circuitry, such as a microcontroller, for controlling an electric motor includes circuitry for measuring a bi-directional current flowing within a coil of the electric motor. The current is sensed by an externally implemented current sensing element, such as a shunt resistor, to produce a differential voltage that is delivered to input pins of the microcontroller, which are protected by electrostatic discharge protection circuits. Current sources implemented within the microcontroller are coupled to the input pins, and work in concert with external resistors to shift the differential voltage so that it is maintained within an appropriate voltage operating range so that an accurate measurement of the bi-directional current can be made by the microcontroller. |
| US11121664B2 |
Signal conversion device and motor drive system
A signal conversion device includes a first signal input terminal, a second signal input terminal, and a detector. A first AC signal is supplied to the first signal input terminal from a signal source. The second signal input terminal is supplied with an in-phase signal that is in phase with the first AC signal and an opposite-phase signal that is opposite in phase with the first AC signal. The second signal input terminal is supplied with a second AC signal whose phase has been switched by a switchover between the in-phase signal and the opposite-phase signal from the signal source. The detector detects, using the supplied first AC signal, whether the supplied second AC signal is the in-phase signal or the opposite-phase signal. |
| US11121660B2 |
System and method for improving drive efficiency in an industrial automation system
Provided herein are systems, methods, and software for improving drive efficiency in an industrial automation system. In one implementation, a system comprises a mechanical load, an electromechanical device attached to the mechanical load, and a drive coupled to the electromechanical device. A processor is programmed to generate and display an acceleration curve, a duplicate acceleration curve, an energy curve and a duplicate energy curve. A user input is received indicating a change to at least a portion of the duplicate acceleration curve, and a change to the duplicate energy curve is calculated and displayed. A modified command signal based on the user input is calculated, and the drive is configured to control the electromechanical device via the modified command signal to mechanically operate the mechanical load perform a task. |
| US11121659B2 |
Evaluation device, evaluation method and control device
Provided is an evaluation device that determines the necessity of a notch filter inserted in a control system that controls an electric motor by closed loop control. The evaluation device includes: a characteristic acquisition parts for changing a parameter associated with a characteristic of the notch filter from a first value, which is a prescribed value, to a second value, and acquiring a change in a frequency response characteristic of the electric motor when the notch filter is applied; and a determination parts for determining the necessity of the notch filter based on the change in the frequency response characteristic that has been acquired. |
| US11121658B2 |
Motor control apparatus, image forming apparatus, and control method of motor control apparatus
A parameter concerning rotation of a motor is estimated (first estimation). A parameter concerning rotation of the motor is estimated, based on a model representing a prescribed change in a rotation speed of the motor (second estimation). It is determined whether an anomaly has occurred in the rotation of the motor, based on the parameter estimated in the first estimation and the parameter estimated in the second estimation. |
| US11121656B2 |
Method of controlling an electrical machine
A method of controlling an electrical machine, wherein the method includes: a) injecting a first voltage waveform (uhx) with a first fundamental frequency into the electrical machine in a first axis of a rotor reference frame, combined with a voltage signal for controlling the electrical machine, b) determining a second axis current component (iqhx) of a second axis of the rotor reference frame, having the first fundamental frequency, generated in response to the injection of the first voltage waveform (uhx), c) controlling based on the second axis current component (iqhx) a second axis voltage component (uqhx) of the second axis, having the first fundamental frequency, to obtain an adjusted second axis voltage component for controlling the second axis current component (iqhx) towards zero, d) feeding back the adjusted second axis voltage component to combine the adjusted second axis voltage component with the voltage signal and the injected first voltage waveform (uhx), and repeating steps b)-d) until the second axis current component is smaller than a threshold value (iqhx), e) determining a differential cross-coupling parameter of the electrical machine based on the second axis voltage component (uqhx) and a first axis current component (idhx) having the first fundamental frequency, when the second axis current component is smaller than the threshold value (iqhx), and g) controlling the electrical machine based on the differential cross-coupling parameter. |
| US11121654B2 |
Dynamic stability control for electric motor drives using stator flux oriented control
Dynamic stability control for electric motors is provided. The system determines, for an electric motor of the electric vehicle, a slip frequency indicating a difference between a synchronous speed of a magnetic field of the electric motor and a rotating speed of a rotor of the electric motor. The system compares the slip frequency with a threshold. The system activates, responsive to the slip frequency greater than or equal to the threshold, a slip limiter to adjust a current command to generate an adjusted current command that causes a reduction in the slip frequency. The system deactivates, responsive to an external torque command less than a subsequent current command received subsequent to transmission of the adjusted current command, the slip limiter. |
| US11121653B2 |
Inverter generator
In an inverter generator having a generator unit including three phase windings driven by an engine, a converter having multiple switching elements and configured to convert alternating current outputted from the generator unit to direct current, an inverter configured to convert direct current outputted from the converter to alternating current and output the alternating current to a load, and a converter control unit configured to determine PWM control ON-time period and drive the multiple switching elements so that inter-terminal voltage of direct current outputted from the converter stays constant with respect to increase/decrease of the load, the converter control unit is configured to detect, with respect to voltage waveforms occurring in the three-phase windings in cycle (t−n), crossing angle between voltage waveform of one phase and voltage waveform of a phase adjacent thereto and to drive the multiple switching elements of either the one phase and the adjacent phase in cycle (t) such that the detected crossing angle is included in the PWM control signal ON-time period. |
| US11121651B2 |
Driving force control method and device for hybrid vehicle
Provided are a driving force control method and device for a hybrid vehicle, each capable of effectively absorbing torque fluctuation of an engine while suppressing deterioration in energy efficiency. The driving force control device for a hybrid vehicle comprises a PCM configured to: estimate an average torque output by an engine; estimate a torque fluctuation component of the torque output by the engine; set a countertorque for suppressing the estimated torque fluctuation component; and control an electric motor to output the set countertorque, wherein the PCM is operable, under a condition that an engine speed is constant, to set the countertorque such that, as the average torque output by an engine becomes larger, the absolute value of the countertorque becomes smaller. |
| US11121650B2 |
Direct current motor combinations for electric vehicles
A vehicular propulsion system is described that uses a plurality of direct current (DC) motors operatively attached to a common drive shaft or shafts of an electric vehicle (EV) or boat. Each motor is powered separately by direct current from a battery cassette or trays swappably inserted into the chassis of the vehicle. The battery cassettes are secured in racks, with one or more individual battery cassettes connected to each of individual motors. The individual battery cassettes are sized to have a weight suitable so as to be readily swapped out as needed for recharging, maintenance or replacement, enabling vehicle range to be extended en route by exchanging depleted battery cassettes for new batteries whenever needed. DC motors may be selected to obtain efficiencies greater than obtainable with AC motors, but require no expensive inverter unit. |
| US11121648B2 |
Piezoelectric generator
A piezoelectric generator including: a piezoelectric element; a circuit for shorting and placing in open circuit the piezoelectric element; and an inductive converter. |
| US11121647B2 |
Contact pad features
An electrical connection structure for connecting a piezoelectric element and an electrical circuit to each other with a conductive adhesive is described. The electrical connection structure includes an epoxy, a conductive component surrounded by the epoxy, and a trace feature implemented on top of the electrical connection structure. |
| US11121641B1 |
High-power machine drive system based on modular multilevel converter
The present invention discloses a high-power machine drive system based on a modular multilevel converter (MMC), which belongs to the technical field of power generation, power transformation, or power distribution. The high-power machine drive system consists of a modular multilevel converter and a multi-pulse cycloconverter. The MMC outputs k phases of high-frequency AC voltages with a phase difference of 2π/k, and the multi-pulse cycloconverter outputs a low-frequency voltage to drive a corresponding machine. According to the present invention, the MMC is combined with the multi-pulse cycloconverter, and by adopting the MMC that operates at a high frequency, the capacity, the volume, and the weight of the energy storage capacitor of the MMC are reduced, the voltage level at the DC side of the MMC is increased, and the capacity of the drive system is increased. By adopting the multi-pulse cycloconverter, quality of an output waveform at a machine side can be guaranteed, thereby implementing low frequency control on the machine. The present invention may be adapted to drive a high-power low-speed machine. |
| US11121637B2 |
Power conversion device and power conversion system including a power converter capable of converting between alternating-current (AC) power and direct-current (DC) power
A power conversion system includes a first power converter and a second power converter which are capable of converting an alternating-current power into a direct-current power or converting a DC power into an AC power. The first power converter is interconnectable to a first AC system via a first AC circuit breaker. The second power converter is interconnectable to a second AC system via a second AC circuit breaker. A first DC terminal of the first power converter and a second DC terminal of the second power converter are connectable. The first power converter begins operation prior to the second power converter. A first control device controls a voltage of the first DC terminal, based on a status of the second power converter sent from a second control device. |
| US11121635B2 |
Accurate valley detection for secondary controlled flyback converter
An AC-DC converter with synchronous rectifier (SR) architecture and method for operating the same are described. Generally, a secondary side IC controller of the AC-DC converter includes a SR-SNS pin coupled to a peak-detector block, a zero-crossing block, and a calibration block. The calibration block is configured to: measure a loop turn-around delay (Tloop), a time (Tpkpk) between two successive peak voltages detected on the SR-SNS pin, and a time (Tzpk) from when the voltage sensed on the SR-SNS pin crosses zero voltage to when a peak voltage is detected on the SR-SNS pin; and set timing for a signal to turn on a power switch in a primary side of the AC-DC converter based at least on Tloop, Tpkpk, and Tzpk. |
| US11121633B2 |
Low common mode noise transformers and switch-mode DC-DC power converters
A switch-mode DC-DC power converter includes one or more input terminals and output terminals, and a transformer coupled between the input and output terminals. The transformer includes a plurality of winding sets. Each winding set includes a primary winding and a secondary winding magnetically coupled with one another. The primary winding and the secondary winding include the same number of turns. The primary windings of the plurality of winding sets are connected in series and the secondary windings of the plurality of winding sets are connected in parallel. The power converter also includes at least one spacer positioned to separate an adjacent pair of the plurality of winding sets. A magnetic coupling between the adjacent pair of the plurality of winding sets is less than the magnetic coupling between the primary winding and the secondary winding within each winding set. |
| US11121630B2 |
In-vehicle DC-DC converter
An in-vehicle DC-DC converter includes a gain setting unit that sets a gain to be used for feedback computation, a duty ratio determination unit that determines a duty ratio, and a drive unit that outputs, to a switching element, a PWM signal that is based on the duty ratio to be used determined by the duty ratio determination unit. The duty ratio determination unit includes a computation unit that repeatedly performs feedback computation for calculating a duty ratio of a PWM signal, so as to approximate a voltage value of an output-side conductive path to a target voltage value, based on a voltage value detected by the voltage detection unit and the gain to be used set by the gain setting unit. The gain setting unit sets the gain to be used, based on a voltage value detected by the voltage detection unit. |
| US11121628B2 |
Switch control circuit and buck converter comprising the same
A buck converter includes a power switch having a first end to receive an input voltage, a synchronous switch connected between a second end of the power switch and the ground, an inductor having a first end connected to the other end of the power switch, and a switch control circuit configured to turn off the synchronous switch when a zero voltage delay time passes after an inductor current flowing through the inductor reaches a predetermined reference value, calculate a dead time based on the input voltage and the zero voltage delay time, and turn on the power switch when the dead time passes following the turn-off time of the synchronous switch. |
| US11121625B2 |
Voltage doubler using a switching regulator and voltage limiter
A voltage doubler circuit configuration includes a switching regulator having a variable input voltage and a regulated voltage, and a voltage doubler circuit that utilizes the regulated voltage of the switching regulator. The voltage doubler circuit includes an output capacitor that receives an elevated voltage from a voltage doubler capacitor and an electrical clamp that limits the voltage doubler capacitor from exceeding the regulated voltage. The output voltage is twice the regulated voltage minus circuit losses. |
| US11121624B1 |
Configurable multi-output charge pump
A configurable multi-output charge pump for power supply generation includes one or more flying capacitors (FCs) arranged to be switchably connected into a plurality of circuit configurations operative to provide respective output voltages at a common charging node. A configuration logic circuit is operative to generate one or more configuration setting control signals to effectuate a particular circuit configuration. One or more storage capacitors (SC) are independently and individually connectable to the common charging node depending on a selection control logic having a configurable duty cycle, wherein each SC is operative to supply a respective voltage output to drive a corresponding electrical load. |
| US11121621B1 |
Low-power-consumption protection circuit
A low-power-consumption protection circuit includes a load detection module, a secondary feedback control module, and a primary control module. The load detection module is coupled to a current detection unit. The secondary feedback control module is coupled to the load detection module and an isolation unit. The primary control module is coupled to the isolation unit and an isolation switch. When the load detection module detects that the current detection unit outputs a voltage level, the secondary feedback control module transmits a protection signal to the primary control module through the isolation unit. |
| US11121615B2 |
Actuator and linear motion module
An actuator is provided, including a fixed assembly and a movable assembly. The fixed assembly includes a coil module, a base, a first screwing member, and a linear rail. The first screwing member passes through the base and the linear rail, and the linear rail is positioned on the base. The movable assembly includes a U-shaped back board having an inner space, a first magnetic module, a second magnetic module aligned with the first magnetic module, and a sliding block. The first and second magnetic modules are disposed on the U-shaped back board and accommodated in the inner space. The coil module is disposed between the first magnetic module and the second magnetic module. The sliding block is positioned on the U-shaped back board in the inner space, and slidably connected to the linear rail. |
| US11121614B2 |
Pre-warped rotors for control of magnet-stator gap in axial flux machines
An assembly for use in an axial flux motor or generator includes a rotor plate and a magnet, the magnet having a surface that is orthogonal to a magnetization direction of the magnet. The rotor plate is adapted to engage a rotor shaft that rotates about an axis of rotation, and the magnet is attached to the rotor plate. The rotor plate and magnet are configured and arranged such that, if the rotor plate and the magnet are separated from all other magnetic field generating components, then a distance between a first plane that intercepts a first point on the surface and to which the axis of rotation is normal and a second plane that intercepts a second point on the surface and to which the axis of rotation is normal is substantially greater than zero. |
| US11121606B2 |
Motor, circuit board, and engine cooling module including the motor
The present disclosure relates to a motor, a circuit board and an engine cooling module including the motor. The motor includes a stator, the stator includes a control module and a heat sink, the control module includes a circuit board and a plurality of heat generating electronic components mounted on a top surface of the circuit board, a plurality of ceramic heat conducting members is embedded inside the circuit board at positions facing the heat generating electronic components, and the heat sink is attached on a bottom surface of the circuit board. The motor has improved heat dissipation effect. |
| US11121603B2 |
Drive unit
A circuit unit of a drive unit includes a plate-shaped heat sink that extends in a direction perpendicular to an axis of rotation of a motor, and a lower case arranged on a lower side of the heat sink. In the drive unit, a fastening member, which is formed on the lower case, is fastened to a housing, and a height of a fastening surface, which is located on an upper end of the fastening member, is positioned within a height range that spans from a lower surface to an upper surface of the heat sink. |
| US11121599B2 |
Slot sealing compound, slot seal, and method for producing a slot seal
The invention relates to a slot sealing compound (7) for an electrical machine that comprises at least one slot (2) with a slot opening (5) for receiving an electrical conductor arrangement (3). Said slot sealing compound (7) contains a magnetic filler material, particularly a soft-magnetic filler material, and a reactive resin mixture that comprises at least one resin component. In the interests of improving storage stability for said slot sealing compound (7), the components thereof are selected to be suitable for cationic polymerisation. A catalyst, provided to accelerate the cationic polymerisation of said reactive resin mixture, is also added to said slot sealing compound (7). |
| US11121592B2 |
Electric machine core with arcuate grain orientation
A rotary electric machine, e.g., a cycloidal reluctance motor, includes a stator having stator teeth connected to a cylindrical stator core, and a rotor having a cylindrical rotor core. The stator core and/or rotor core are constructed of grain-oriented, spirally-wound ferrous material having a circular or annular grain orientation. The stator teeth may be constructed of grain-oriented steel having a linear grain orientation. Notches may be spaced around an inner circumferential surface of the stator core, with each stator tooth engaged with a respective notch. The rotor may be eccentrically positioned radially within the stator. The rotor core may define notches spaced around its outer circumferential surface, with salient rotor projections engaged with a respective rotor notch. The machine in such an embodiment may be a switched reluctance rotor. An electrical system using the machine and a method of manufacturing the machine are also disclosed. |
| US11121591B2 |
Hollow metal part of stator of rotating electrical machine, rotating electrical machine, and manufacturing process of hollow metal part
A hollow metal part is used as a pipe component for a refrigerant flow path of a rotating electrical machine adapted to cool a stator coil with a refrigerant. The rotating electrical machine includes a connection arm that couples the stator coil and a power supply terminal at a stator coil end portion of the stator coil, and an insulating hose that is coupled to the stator coil and the connection arm through a first hollow metal part in order to supply the refrigerant to the stator coil and the connection arm. The first hollow metal part is formed integrally by joining a part formed of stainless steel to a part made of oxygen-free copper. |
| US11121588B2 |
System, method, and apparatus for wireless charging
Using inductive currents to wirelessly charge a device via a device connected to a power source. This inductive charging may result when a first mobile device recognizes a second mobile device via a wireless connection (e.g., Bluetooth, Bluetooth Low Energy (BLE), Near-Field Communication (NFC), or the like). An application stored on the first mobile device may recognize a second mobile device by transmitting an advertising packet when the first mobile device is connected to a power source. An advertising packet may be received by the second mobile device and the second mobile device may transmit a response to the advertising packet in order to generate a connection between the first and second mobile devices. The response may include data such as, connection strength, response time, connection preferences, and the like. Upon detection and connection, the second mobile device may be wirelessly charged by the first device via inductive charging. |
| US11121586B2 |
Systems and methods for wirelessly transmitting power and data to an implantable stimulator
A system includes an interface assembly and electronic circuitry. The interface assembly is configured to receive DC power and a self-clocking differential signal comprising a data signal encoded with a clock signal at a clock frequency. The electronic circuitry is configured to recover, from the self-clocking differential signal, the data signal and the clock signal at the clock frequency, and to generate, based on the recovered clock signal at the clock frequency, a first synthesized clock signal at a first carrier frequency and a second synthesized clock signal at a second carrier frequency. The electronic circuitry is also configured to wirelessly transmit AC power and a data-modulated AC signal to an implantable stimulator implanted within a patient. The AC power is at the first carrier frequency and based on the DC power, while the data-modulated AC signal is at the second carrier frequency and based on the recovered data signal. |
| US11121585B2 |
Wireless power reception method of a wireless power receiver in which first demanded power of the wireless power receiver is adjusted within a first available power of the wireless power tansmitter
A method for transmitting wireless power from a wireless power transmitter, the method can include performing a negotiation process with a wireless power receiver for generating a negotiated power transmission condition, the negotiation process including receiving a request signal from the wireless power receiver to retrieve a capability of the wireless power transmitter, the capability including an available amount of power of the wireless power transmitter, transmitting the available amount of power to the wireless power receiver, in response to the request signal, to allow the wireless power receiver to determine a demanded amount of power based on the available amount of power of the wireless power transmitter, and subsequently, receiving the demanded amount of power as the negotiated power transmission condition from the wireless power receiver; and transmitting wireless power to the wireless power receiver based on the negotiated power transmission condition when the demanded amount of power is allowable by the wireless power transmitter based on the capability of the wireless power transmitter. |
| US11121583B2 |
Operating room wireless power transfer
A surgical room power system including at least one source of power wired to a power source for a surgical room, the at least one source of power being wired to the surgical room; at least one power receiver; and a surgical power consumer wired to the at least one power receiver, the surgical power consumer being configured to assist a surgeon during a surgical procedure on a patient. The at least one source of power wirelessly transfers power to the at least one power receiver for powering the surgical power consumer. |
| US11121582B2 |
Smart rectenna design for passive wireless power harvesting
The present technology is directed to a system and method for implementing passive power harvesting from ambient electromagnetic emissions with a smart rectenna that incorporates automatic frequency response tuning features. The disclosed system incorporates a tunable High Pass Filter and voltage multiplier rectifier with a front-end ultra wide band antenna unit. The frequency response of tunable components can be actively adjusted to match the frequency band containing most of the energy in the incident electromagnetic emission. A look up table is used for determining the appropriate biasing levels of the tunable components for each frequency in a frequency band of interest. By tuning a frequency response of impedance matching, filtering and rectifying components to correspond to a frequency region of maximum power spectral density in the incident energy signal, the system facilitates the scavenging of ambient electromagnetic energy from the spectral region with the highest power spectral density. |
| US11121580B2 |
Power source, charging system, and inductive receiver for mobile devices
A power source, charging system, and inductive receiver for mobile devices. A pad or similar base unit comprises a primary, which creates a magnetic field by applying an alternating current to a winding, coil, or any type of current carrying wire. A receiver comprises a means for receiving the energy from the alternating magnetic field and transferring it to a mobile or other device. The receiver can also comprise electronic components or logic to set the voltage and current to the appropriate levels required by the mobile device, or to communicate information or data to and from the pad. The system may also incorporate efficiency measures that improve the efficiency of power transfer between the charger and receiver. |
| US11121579B2 |
Circuit for power supply and electronic device using same
A power supply circuit supplying power to components of a fixed or mobile electrical or electronic device includes a main battery, an auxiliary battery, and main and auxiliary switch units. The main battery and the main switch unit form a main power supply circuit, and the auxiliary battery and the auxiliary switch unit form an auxiliary power supply circuit. The main switch unit includes a lighting unit controlling the switching on or off of the auxiliary switch unit. When the lighting unit is switched on, the auxiliary switch unit is switched off and the auxiliary power supply circuit is disabled. When the lighting unit is switched off, the auxiliary switch unit is switched on and the auxiliary power supply circuit is enabled. An electronic device including such a power supply circuit is also provided. |
| US11121578B2 |
Image forming apparatus in which wiring pattern for withstand voltage test is laid out
An interlock power supply stops supplying a voltage if AC power supply is supplying AC voltage and an interlock condition is satisfied, and supplies a voltage if AC power supply is supplying AC voltage and the condition is not satisfied. A non-interlock power supply supplies a voltage independently of the condition, if AC power supply is supplying AC voltage. A first wiring pattern that connects an interface and a switch drive circuit. A second wiring pattern is connected to the non-interlock power supply. A constant-voltage element is provided between a first section of the first wiring pattern and a second section of the first wiring pattern. |
| US11121574B2 |
Method for transmitting power and electronic device supporting the same
An electronic device which is wirelessly charged through an external power transmitting device includes a conductive pattern in which a current is induced depending on a power signal transmitted by the external power transmitting device, an adjustment circuit that configured to generate a voltage signal using the current, a load configured to be charged through the voltage signal, and a control circuit electrically connected with the conductive pattern, the adjustment circuit, and the load. Upon recognizing the external power transmitting device, the control circuit is configured to generate a power control signal including information about intensity of the power signal and to transmit the power control signal to the external power transmitting device through the conductive pattern, and the conductive pattern is configured to receive the power signal, the intensity of which is changed depending on the power control signal. |
| US11121571B2 |
Method and battery management system for smoothing power limit of battery
Provided is a method and a battery management system for smoothing the power limit when charging or discharging a battery. The method according to an embodiment of the present disclosure includes determining a first weighting factor based on a maximum charge voltage and a terminal voltage of the battery, determining a second weighting factor based on a previous smoothed charge power limit, a current charge power limit and a current instantaneous power, setting a smaller one of the first weighting factor and the second weighting factor as a first reference weighting factor, and smoothing the current charge power limit based on the previous smoothed charge power limit and the first reference weighting factor. |
| US11121570B2 |
Battery disconnecting device
A battery disconnecting device has a first input and a second input to which a battery can be connected, whereby the disconnecting device also has a first output and a second output to which an electric component can be connected, whereby at least one first circuit breaker is arranged between the first input and the first output, and at least one second circuit breaker is arranged between the second input and the second output, whereby the first circuit breaker is at least a transistor and the second circuit breaker is a relay. |
| US11121565B2 |
High reliability hybrid energy storage system
Combination fuel cell stack and electrochemical battery system provides stable and redundant electrical power to one or more traction motors. The electrochemical battery packs comprise modules that are switched between a low-voltage parallel configuration connecting to the fuel cell stack and a high-voltage series configuration connecting to the traction motors, thereby harvesting low-voltage energy from the fuel cells and deploying that energy as high-voltage power to the motor. The plurality of electrochemical battery packs can be switched such that at least one is always connected to the traction motor for continuity of power. |
| US11121564B2 |
Power supply device having hierarchical structure
Provided is a power supply device for supplying power to load elements. The power supply device includes a main power module including a main battery, a main power controller configured to control charging and discharging of the main power module, a sub-power module including sub-batteries respectively corresponding to the load elements, and a sub-power controller configured to control charging and discharging of the sub-power module, Based on a remaining capacity of the main battery and a remaining capacity of the sub-batteries, the power supply device is selectively operated in a first mode in which charging and discharging are possible for both the main power module and the sub-power module, a second mode in which charging and discharging are possible only for the sub-power module, or a third mode in which charging and discharging are possible only for the main power module. |
| US11121560B2 |
Hot-pluggable dual battery with pass through charging
Techniques of charging electronic devices involve directing electrical power from a first device to the battery of a second device in response to the first device being in a first state, and directing electrical power from the second device to the battery of the first device in response to the first device being in a second state. For example, in response to a connection being established between a first device (e.g., a tablet computer) and a second device (e.g., a monitor), a charger of the first device detects a state of charge of the battery of the first device and a state of charge of the second device. |
| US11121558B2 |
Charging device
A charging device includes: a switch configured to perform connection and disconnection between a positive bus and a negative bus of a charging line; a low-voltage power storage device having a normal voltage lower than a normal voltage of a power storage device; and a converter configured to exchange electric power between a power line and the low-voltage power storage device with a change of a voltage. At the time of system activation, a control device controls the switch so that the positive bus and the negative bus of the charging line are connected to each other, and after that, the control device performs a welding diagnosis to determine whether or not welding occurs in a charging relay, based on a voltage of a capacitor, while the control device controls the converter so that the capacitor is charged with electric power from the low-voltage power storage device. |
| US11121556B2 |
Magnetically coupled solar power supply system for battery based loads
A high efficiency solar power system combining photovoltaic sources of power (1) can be converted by a base phase DC-DC photovoltaic converter (6) and an altered phase DC-DC photovoltaic converter (8) that have outputs combined through low energy storage combiner circuitry (9). The converters can be synchronously controlled through a synchronous phase control (11) that synchronously operates switches to provide a conversion combined photovoltaic DC output (10). Converters can be provided for individual source conversion or phased operational modes, the latter presenting a combined low photovoltaic energy storage DC-DC photovoltaic converter (15) at string or individual panel levels. |
| US11121554B2 |
Electrical power control apparatus, electrical power control method and electrical power control system
An electrical power control apparatus controls electrical power supply from an electrical power source unit and a battery unit to a target of supply. The electrical power control apparatus includes a supply control circuit. The supply control circuit supplies electrical power of the battery unit in preference to electrical power of the electric power source unit to the target of supply when an amount of charge of the battery unit is equal to or higher than a threshold. |
| US11121552B2 |
Demand setpoint management in electrical system control and related systems, apparatuses, and methods
The present disclosure is directed to systems and methods for controlling an electrical system using setpoints. Some embodiments include control methods that monitor an adjusted net power associated with the electrical system and adjust the setpoint based on a comparison of the adjusted demand to the setpoint. If the adjusted demand has not exceeded the demand setpoint, the setpoint is reduced. If the adjusted demand has exceeded the demand setpoint, the setpoint is increased. |
| US11121540B2 |
System, method, and apparatus for multi-port power converter and inverter assembly
A multi-port power converter includes a housing that includes a plurality of ports structured to electrically interface to a plurality of loads, the plurality of loads having distinct electrical characteristics. The multi-port power converter also includes a plurality of solid state components configured to provide selected electrical power outputs and to accept selected electrical power inputs and a plurality of solid state switches configured to provide selected connectivity between the plurality of solid state components and the plurality of ports. |
| US11121539B2 |
DC solid-state circuit breaker with self-adapt current limiting capability and the control method thereof
The present invention discloses a DC solid-state circuit breaker with self-adapt fault current limiting capability. The topology of the DC solid-state circuit breaker is a H-bridge circuit consisting of two unidirectional breakable bridge arms and two series-connected diode bridge arms, wherein the two unidirectional breakable bridge arms are connected in series to the two series-connected diode bridge arms in a same direction to form two series branches, respectively; the series branches are connected in parallel; a series branch formed by a DC reactor L and a DC biased power supply is connected to the PCC between the two unidirectional breakable bridge arms and the PCC between the two series-connected diode bridge arms; the DC line is connected to the two PCCs, respectively. |
| US11121538B2 |
Electronic circuit arrangement for use in an area exposed to explosion hazards
An electronic circuit arrangement may include first and second electric connections connectable to first and second electronic devices, respectively. A first electric conduction path may connect the first and second electric connections, and a second electric conduction path may connect a tee point provided in the first electric conduction path to an electric ground connection. First and second switching elements may be provided in the first and second electric conduction paths, respectively, between the tee point and the respective electric connection. Each switching element may switch between an open state, in which the switching element may interrupt the respective electric conduction path, and a closed state. In response to connecting the second electronic device to the second electronic connection, the second switching element may switch to the open state, and the first switching element to the closed state only after the second switching element is already in the open state. |
| US11121537B2 |
System and method for locating faults and communicating network operational status to a utility crew using an intelligent fuse
An intelligent fuse provides the operational status of the power network upon which the fuse is installed to a mobile device of a remote user. A fuse electronic circuit embedded in the fuse holder of the fuse captures the characteristic values of the power network and transmits the data to the mobile device. The mobile device has an application installed thereon to calculate the distance to fault location from the recording fuse using the fuse electronic circuit-captured data. The fuse electronic circuit-captured data is further used to visualize the data collected at the measurement points of the electrical system upon which the fuse is installed. |
| US11121529B2 |
Switchgear or control gear
A switchgear or control gear includes: at least one first compartment; at least one second compartment; a plurality of main switchgear or control gear components including a main busbar system, a three position linear or rotational movement disconnector, a circuit breaker, and at least a first part of an insulated cable connection; and a plurality of auxiliary switchgear or control gear components including a disconnector drive and a circuit breaker drive. The plurality of main switchgear or control gear components are housed in the at least one first compartment. The plurality of auxiliary switchgear or control gear components are housed in the at least one second compartment. When one or more of the plurality of main switchgear or control gear components is energized, the at least one first compartment is hermetically sealable or maintainable at an internal air pressure greater than ambient air pressure. |
| US11121527B2 |
Meter socket adapter with integral automatic transfer switch
A power management system includes a generator, a meter mounted transfer switch, and a power management module. The generator includes a controller positioned in the housing of the generator. The generator connects to the power management module to provide power to one or more electrical loads. The controller is configured to selectively disconnect at least one of the electrical loads by communicating, via a wireless gateway, to a transfer switch of the power management module to move between first and second positions for connecting the generator to the one or more electrical loads. |
| US11121525B2 |
Quantum cascade laser
A quantum cascade laser including: a laser structure having a first region including a first facet, a second region including a second facet, an epitaxial surface, and a substrate surface; an insulating film disposed on the second facet and the epitaxial surface; an electrode disposed on the epitaxial surface and the insulating film and in contact with the epitaxial surface; and a metal film disposed over the second facet and the epitaxial surface and separated from the electrode and the substrate surface. The insulating film is disposed between the metal film and the second facet and between the metal film and the epitaxial surface. The second region includes a semiconductor mesa. The second facet is located at a boundary between the first region and the second region. The first region includes a connecting surface. The connecting surface connects the second facet to the first facet. |
| US11121519B2 |
Utilization of time and spatial division multiplexing in high power ultrafast optical amplifiers
In an example amplifier system, an input pulse train is passed through an optical stage that splits each pulse into two or more pulses. These divided pulses are then injected into at least two amplifiers for amplification. The amplified pulses are subsequently passed back through the same optical stage in order to combine the pulses back into one high energy pulse. The amplifier system can use time division multiplexing (TDM) and/or spatial division multiplexing (SDM) to produce, e.g., four pulses in conjunction with two amplifiers and propagation through two optical beam splitters, which are coherently combined into a single output pulse after amplification. The amplifiers can comprise fiber amplifiers or bulk amplifiers. |
| US11121518B1 |
Systems and methods for laser beam expander alignment and stabilization
An optical transmitter includes a beam steering system configured to direct an optical beam through a first optical element towards a second optical element. The beam steering system includes an adjustable optical element. The second optical element is susceptible to thermal and vibrational loads that disrupt an alignment between the first and second optical elements. The second optical element includes a main portion configured to direct the optical beam down a propagation path including a communications target. The second optical element also includes a reflective portion configured to direct an alignment portion of the optical beam back to the beam steering system through the first optical element. A detector is configured to receive the alignment portion and generate an alignment signal. A controller is configured to adjust the adjustable optical element based on the alignment signal to counteract the loads. |
| US11121513B2 |
LED night light or cover light has multiple functions
The LED night light or cover light has multiple Functions has built-in LED(s) for pre-determined illumination shown on housing, window, hole(s) of night or cover light which connect by prong to an existing wall inner-kit's receptacle to get AC power source to circuit(s) for predetermined at least LED(s) illumination functions. The night or cover light further incorporate with at least one USB charger, Outlet(s), IC, photo sensor, motion sensor, power fail sensor, surge or other protection system. |
| US11121507B2 |
Electrical connector with the tail segment of the second terminal of the shielding plate and the tail segments of the first terminals arranged in a same row
An electrical connector including a base member and a plurality of first terminals disposed in the base member is provided. Each of the first terminals has an contact segment and an tail segment opposite to each other. The contact segments respectively belong to two different parallel planes, and the tail segments are located on a same plane. The first terminals form a plurality of terminal sets in the tail segments, and each of the terminal sets includes a ground terminal, a pair of super speed differential terminals, and a power terminal which are adjacent to each other and are sequentially arranged. |
| US11121505B2 |
Locking device for a plug connection
A system is provided comprising of a first plug module and a second plug module, which can be plugged together, wherein the first plug module has a locking arrangement, whereby the plug modules can be reversely locked to each other. The system can be arranged within the housings of industrial plugs and is thus better protected from mechanical loads. |
| US11121499B2 |
Cover system and method
Embodiments of the present invention provide a cover system (300) for at least temporarily preventing access to one or more terminals (402, 404) of an electrical connector (400). The system (300) comprises a first cover part (100) and a second cover part (200). The first cover part (100) comprises sealing means (104) for sealing the first cover part (100) about the one or more terminals (402, 404) of the electrical connector (400). The first cover part also comprises a member (106) comprising an aperture (118) for receiving a locking means. The second cover part (200) is receivable about at least a portion of the first cover part (100) and at least part of the electrical connector (400). The second cover part (200) comprises engaging means (204) for engaging with the electrical connector (400) to at least partially retain the second cover part (200) about the first cover part (100) and at least part of the electrical connector (400). The second cover part (200) also comprises an opening (202) for receiving the member (106) of the first cover part (100). The aperture (106) of the first cover part (100) is arranged such that when the cover system (300) is assembled with the electrical connector (400) and a locking means is received by said aperture (118), disengagement of the engaging means (204) from the electrical connector (400) is substantially prevented. Embodiments of the invention also relate to a method for at least temporarily preventing access to one or more terminals (402, 404) of an electrical connector (400). |
| US11121496B2 |
Connection device for charging a battery device on a vehicle
A connection device for charging a battery device on a vehicle has an alternating current (AC) interface for receiving an AC plug and a direct current (DC) interface for receiving a DC plug. The DC interface has a cover flap mounted movably between a closed position that covers the DC interface and an open position that exposes the DC interface. The direct current interface has a latching mechanism with a latching means on the cover flap. The latching means locks with a mating latching means of the cover flap when in the open position. The mating latching means has an actuating section with which the DC plug makes a contact thereby unlocking the latching means of the latching mechanism when the DC plug is received in the DC interface. |
| US11121494B2 |
Contact
A contact includes a thin plate member having elasticity and conductivity, is disposed between a first member and a second member, and electrically connects the first member and the second member via the thin plate member, and the contact includes a base portion and a movable portion. The base portion has a bonding surface to be bonded to the first member by soldering. The movable portion includes: a contact portion that contacts with the second member; and a connecting portion that connects to the base portion, and is configured to be elastically deformable with respect to the base portion. The connecting portion is gradually separated from the first member. A predetermined range from a connecting position of the connecting portion with the base portion is lower in solder wettability than the bonding surface. |
| US11121493B2 |
Replaceable pin for terminal of charging inlet assembly
A terminal for a charging inlet assembly includes a head, a mating shaft, and a replaceable pin removably coupled to the head. The head is secured in a terminal channel of a housing of the charging inlet assembly having a terminating end configured to be terminated to a power cable. The mating shaft has threads. The replaceable pin has an outer surface defining a separable mating interface for mating engagement with a charging conductor of a charging connector. The replaceable pin has a drive base at the rear including drive teeth configured to be engaged by a socket tool to rotate the replaceable pin relative to the head for installing or removing the replaceable pin. The mating shaft is threadably coupled to at least one of the head or the replaceable pin in a corresponding threaded bore of the head or the replaceable pin. |
| US11121491B2 |
Receptacle connector for detecting connection states
A receptacle connector includes a receptacle including an insertion port into which a plug is inserted, a lid configured to open and close the insertion port and maintain, while the plug is inserted into the insertion port, a state in which the lid is opened by the plug, and a switch configured to change over according to the opening and closing of the lid. |
| US11121490B1 |
Circuit board fixing structure
A circuit board fixing structure comprising a first fixing element and a first circuit board is provided. The first fixing element includes a shaft, a first flange and a second flange. One end of the shaft is provided with a receiving portion. The first flange is connected with a side surface of the shaft. The second flange is connected with the side surface of the shaft and is spaced apart from the first flange. The first circuit board is fixed on a surface of the first flange away from the second flange. |
| US11121489B2 |
Electrical connector with flexible circuit and stiffener
An electrical connector includes a flexible circuit with a flexible material and traces at least partially embedded in the flexible material. The electrical connector further includes a first set of conductive bumps, a second set of conductive bumps, and a stiffener. The first set of conductive bumps is coupled to respective first end portions of the traces and extends from a first side of the flexible circuit. The second set of conductive bumps is coupled to respective second end portions of the traces. The stiffener is coupled to the flexible circuit on a second side of the flexible circuit opposite the first side. |
| US11121488B2 |
Connector assembly
An assembly includes a circuit carrier having a first surface and a second surface opposite to the first surface, a first sub-assembly detachably connected to the first surface of the circuit carrier, and a second sub-assembly detachably connected to the second surface of the circuit carrier. The circuit carrier has an electrically conductive lead interconnecting the first sub-assembly and the second sub-assembly. |
| US11121486B2 |
Conductor terminal and set formed of the conductor terminal and an actuation tool
A conductor terminal with an insulating material housing and a spring-force terminal connection. The spring-force terminal connection has a contact body which is shaped out of a sheet element and has a base portion, lateral wall portions that protrude from the base portion and are mutually spaced, and solder connection contact tongues. The base portion together with the lateral wall portions forms a conductor receiving channel for receiving an electric conductor, and leaf spring tongues protrude from the lateral wall portions so as to face one another, each leaf spring tongue has a clamping edge for clamping an electric conductor received in the conductor receiving channel. The insulating material housing has a conductor insertion opening which leads to the conductor receiving channel on the front face. |
| US11121479B2 |
Connector and connecting method
A connector includes a base member having two or more projections, two or more contacts, a housing holding the contacts and facing the base member, and a cutting portion for cutting the flexible conductor between a pair of contacts to divide the flexible conductor into a pair of flexible conductor pieces, when projections corresponding to the contacts are separately inserted into projection accommodating portions of the contacts together with the flexible conductor, the flexible conductor being arranged between the base member and the housing and extending over the contacts adjacent to each other, the flexible conductor pieces divided by the cutting portion being sandwiched between lateral surfaces of the projections and inner surfaces of the projection accommodating portions of the contacts and coming into contact with the inner surfaces of the projection accommodating portions of the contacts, whereby the contacts are electrically connected to the flexible conductor pieces. |
| US11121478B2 |
Crimp contact with structured region for preventing conductor slippage during crimping
A crimp contact for crimping a conductor includes a crimp flank and a receptacle receiving the conductor and extending in a longitudinal direction of the crimp contact up to a receiving end. The crimp flank extends in the longitudinal direction over the receiving end up to a front end. The crimp flank encloses the conductor after crimping. The crimp contact has a structured region in a front region of the crimp contact arranged between the receiving end and the front end. |
| US11121473B2 |
Compact cavity-backed discone array
A compact shallow cavity-backed discone antenna array for conformal omnidirectional antenna applications is disclosed. The antenna array comprises a plurality of discone antennas arranged in a ring array within a circular contoured conical cavity. The cavity is covered with an electrically transparent radome. The individual discone antenna elements are fed with coaxial transmission lines. Good performance is demonstrated by simulation and by experiment in terms of reflection coefficient and omnidirectional gain radiation patterns from about 960 MHz to 1220 MHz. In one embodiment, the shallow cavity-backed discone antenna array may be used as a flush-mounted antenna that conforms to the outer mold line of an aircraft. |
| US11121467B2 |
Semiconductor package with compact antenna formed using three-dimensional additive manufacturing process
A semiconductor device package is provided that incorporates an antenna structure within the package through use of three-dimensional additive manufacturing processes. Embodiments can provide semiconductor device packages that are thinner than traditional device packages by depositing specific metal and dielectric layers within the package in desired positions with precision that cannot be provided by other manufacturing techniques. Further, embodiments can provide antenna geometries and orientations that cannot be provided by other manufacturing techniques. |
| US11121465B2 |
Steerable beam antenna with controllably variable polarization
A steerable beam antenna includes a feed line and first and second arrays of switchable scatterers along opposite sides of the feed line. The first array scatters an electromagnetic wave propagating through the feed line to form a first beam portion with a first polarization, and the second array scatters the propagating wave to form a second beam portion with a second polarization orthogonal to the first polarization. Each scatterer in the first and second arrays is switchable between a high state and a low state, the high state scatterers and the low-state scatterers in each of the first and second arrays defining a periodic pattern. The scatterers in the first and second arrays are switchable to shift the pattern of scatterers in one of the arrays relative to the pattern in the other array by a selectable period shift that yields a desired polarization for the beam. |
| US11121464B2 |
Phased array correction and testing method and correction and testing apparatus
This application discloses a correction and testing system, comprising a first phased array, a second phased array, and a test instrument, wherein the first phased array comprises a first radio frequency RF channel, the test instrument is configured to: determine, based on a coupling signal, an amplitude deviation value and a phase deviation value that correspond to the first RF channel; if the amplitude deviation value and the phase deviation value satisfy a preset error correction condition, correct an amplitude coefficient and a phase coefficient that correspond to the first RF channel to obtain a target amplitude coefficient and a target phase coefficient; and measure performance indicator parameters of the first phased array by using the target amplitude coefficient and the target phase coefficient. The correction and testing system can improve test efficiency, reducing a floor area, and lowering costs. |
| US11121461B2 |
Antenna device
An antenna device includes a dielectric substrate, a ground plane, an antenna unit, and an additional functional unit. The dielectric substrate includes a plurality of pattern formation layers. The ground plane is formed on a first pattern formation layer included in the plurality of pattern formation layers, and acts as an antenna grounding surface. The antenna unit is formed on a pattern formation layer that is included in the plurality of pattern formation layers and that is different from the first pattern formation layer. The antenna unit includes one or more antenna patterns configured to act as radiation elements. The additional functional unit includes one or more parasitic patterns provided on a propagation path for a surface propagating over the dielectric substrate, and causes the surface wave to generate a radiation wave with polarization different from polarization of a radio wave transmitted and received by the antenna unit. |
| US11121459B2 |
IoT gateway/cellular base station assemblies
An assembly includes: a small cell antenna base station comprising a radio, an antenna, and a mounting structure; and an IoT gateway assembly mounted to the mounting structure, the IoT gateway assembly comprising: an IoT gateway module configured for aggregation and backhaul of data from IoT sensors; and an loT antenna connected with the IoT gateway module. |
| US11121455B2 |
Space-independent coupling antenna
A transport mechanism and an antenna arrangement for facilitating the transmission/reception of a portable wireless communication device temporarily arranged in a passenger compartment of a transport. The antenna arrangement includes a supporting body having a shelf area and a flat antenna having an interface, wherein the shelf area holds the wireless communication terminal, the flat antenna is arranged parallel to the shelf area on or in the supporting body, and the interface connects via a wiring harness of the transport to an external antenna of the transport. |
| US11121453B2 |
Antenna and electronic device
An antenna adapted for an electronic device is provided. The antenna includes a chamber, a first liquid conductor, a second liquid conductor, and a feeding portion. The first liquid conductor is located in the chamber. The second liquid conductor is located in the chamber. A specific gravity of the second liquid conductor is larger than a specific gravity of the first liquid conductor, and a conductivity of the second liquid conductor is smaller than a conductivity of the first liquid conductor. The feeding portion extends into the chamber from an outside of the chamber. The feeding portion contacts with one of the first liquid conductor and the second liquid conductor. |
| US11121450B1 |
Electronic apparatus
An electronic apparatus includes: a chassis composed at least of an upper plate, a lower plate, and a side face; at least one plate-like antenna having a radio wave transmission/reception part which deals with radio waves in a millimeter wave band and forms one surface of the antenna; and a conductive reflection member having a main part with a reflection surface reflecting the radio waves in the millimeter wave band. The antenna is placed in an outer peripheral edge area including an outer peripheral edge of the upper plate in plan view in such a manner that the radio wave transmission/reception part faces the upper plate. The reflection member is so placed that the antenna is sandwiched between the reflection member and the side face in plan view. At least the side face transmits the radio waves. The reflection surface is directed toward the antenna. |
| US11121449B2 |
Electronic device
An electronic device includes a proximity sensor, an antenna structure, and a sensing pad. The antenna structure includes a first radiation element and a second radiation element which are separate from and adjacent to each other. The first radiation element has a feeding point. The second radiation element is coupled to a ground voltage. The sensing pad is adjacent to the antenna structure. The sensing pad includes a main branch, a first branch, and a second branch. The main branch is coupled to the proximity sensor. The first branch and the second branch are coupled to the main branch. The second branch has a meandering shape. The antenna structure covers a first frequency band and a second frequency band. The resonant frequency of the sensing pad is neither within the first frequency band nor within the second frequency band. |
| US11121447B2 |
Dielectric covers for antennas
An electronic device may be provided with wireless communications circuitry and control circuitry. The wireless communications circuitry may include centimeter and millimeter wave transceiver circuitry and a phased antenna array. A dielectric cover may be formed over the phased antenna array. The phased antenna array may transmit and receive wireless radio-frequency signals through the dielectric cover. The dielectric cover may have first and second opposing surfaces. The second surface may face the phased antenna array and may have a curvature. The curvature of the second surface may include one or more recessed regions of the dielectric cover. The one or more recessed regions of the second surface may serve to maximize and broaden the coverage area for the phased antenna array. The first surface may be conformal to other structures in the electronic device. |
| US11121445B2 |
Resonator for radio frequency signals
A resonator for radio frequency, RF, signals, said resonator comprising a cavity having a longitudinal axis, a first wall, at least one side wall, and a lid arranged opposite the first wall, wherein said resonator further comprises a guiding device which is arranged at said at least one side wall and is configured to guide an axial movement of said lid along said longitudinal axis. |
| US11121444B2 |
Directional coupler
A directional coupler includes a main line for transmitting a high frequency signal, a sub line electromagnetically coupled to the main line, a termination circuit for terminating one end portion of the sub line, and a variable filter that has an input terminal and an output terminal and the input terminal is connected to another end portion of the sub line. The variable filter is a filter unit circuit having one frequency band as a pass band or a stop band, and in the filter unit circuit, a variable passive element for shifting a frequency in the pass band or the stop band is disposed. |
| US11121443B2 |
Bandpass filter
Realized is a post-wall waveguide bandpass filter in which a bypass phenomenon is less likely to occur. In a post-wall waveguide bandpass filter (1) including an input part (10a) and an output part (10b), each of a first distance (distance X11), a second distance (not illustrated in FIG. 2), a third distance (distance X21), and a fourth distance (not illustrated in FIG. 2) is not more than 1.5 times a post interval (d). |
| US11121440B2 |
Electricity storage device
Provided is an electricity storage device having a high volumetric energy density and high reliability. The electricity storage device includes: an electrode assembly including first and second electrode plates and a separator interposed therebetween; an exterior housing that houses the electrode assembly; a lid that covers an opening of the exterior housing; and electrode terminals that are electrically connected to the electrode assembly and partially protrude from the lid to the outside. The lid has a liquid injection hole for injecting an electrolytic solution into the exterior housing. A tubular member extending from the lid toward the electrode assembly is provided between the outer surface of the lid and the electrode assembly so as to surround an opening of the liquid injection hole. A covering member connected to the tubular member and interposed between the liquid injection hole and the electrode assembly is provided. |
| US11121430B2 |
Block copolymer separators with nano-channels for lithium-ion batteries
Embodiments disclosed herein generally relate to a microporous separator with a pore geometry that creates a low or no tortuosity architecture. In one embodiment, a battery cell may comprise of an anode layer, a cathode layer, and a separator layer positioned between the cathode layer and the anode layer. The separator layer may be comprised of one or more block copolymers. The block copolymers that make up the separator layer may be materials that self-align into a vertical nanostructure. The vertical nanostructures may allow ions within the battery cell to flow in a vertical path between the cathode and anode. This vertical path my create a low or no tortuosity environment within the battery cell. |
| US11121421B2 |
Battery thermal management system
An example system is disclosed for thermal management of batteries. The system may include a cell bank that includes first and second cell frame sections, a heat bus, and thermal interface material. The first and second cell frame sections may define opposite surfaces of the cell bank. Each cell frame section may include recesses to align battery cells for welding and provided conductive connections between the cells to create a string of cells with a combined power output. Each recess may include a divider between the battery cells to preload the cells against a thermal junction during assembly. The heat bus may be provided between the cell frame sections. The heat bus may include heat pipes that extend between the battery cells and across the cell frame sections. The thermal interface material may be positioned to transfer heat from the cells to the heat pipes at their thermal junction. |
| US11121416B2 |
Adsorption assembly and battery
An adsorption assembly and a battery are provided. The adsorption assembly includes: a housing including a gas permeable portion; and an adsorbent encapsulated by the housing. The adsorption assembly can effectively isolate the adsorbent from the external environment by providing the housing, thereby preventing the adsorption performance of the adsorbent from being affected, and the housing includes a gas permeable portion, which can make the produced gas in the external environment enter the housing and be effectively adsorbed by the adsorbent. In particular, when the adsorbent is used for a battery, especially a soft pack battery, the gas produced inside the battery can be effectively adsorbed to prevent liquid leakage of the battery seal caused by breakage of the battery seal by gas, improving reliability and safety of the battery and extending lifetime of the battery. |
| US11121413B2 |
Advance indication of short-circuit conditions in a wetcell battery
A wet-cell in a battery is configured with a set of i-electrodes. A collection surface inside the wet-cell is identified where electrically conductive debris accumulates to an expected height. A first i-electrode of a first polarity in the set of i-electrodes is configured to be located at substantially the expected height inside the wet-cell. A second i-electrode of a second polarity in the set of i-electrodes is configured to be located at substantially the expected height inside the wet-cell. A first indication device is installed where the first i-electrode and the second i-electrode are configured in an electrical circuit via the first indication device, wherein when the electrically conductive debris has accumulated up to the expected height, makes simultaneous electrical contact with the first i-electrode and the second i-electrode and activates the first indication device. |
| US11121412B2 |
Secondary battery safety evaluation method and device
A safety evaluation method according to the present disclosure includes preparing a sample for secondary battery electrode evaluation in which a short circuit will occur by contact between components included in the sample, applying a predetermined pressure that will cause the contact between the components to an area of the sample set as a secondary battery internal short circuit simulation contact area, applying a current between I probes in contact with the sample, obtaining resistance by measuring a potential difference between V probes which are separate from the I probes, obtaining a graph of a change in resistance with a change in distance between the V probes, calculating a short circuit resistance of the area from y-intercept of the graph, and predicting a heat generation amount of the area from the short circuit resistance. |
| US11121407B2 |
Electrolytes for stable cycling of high capacity lithium based batteries
Electrolytes are described with additives that provide good shelf life with improved cycling stability properties. The electrolytes can provide appropriate high voltage stability for high capacity positive electrode active materials. The core electrolyte generally can comprise from about 1.1M to about 2.5M lithium electrolyte salt and a solvent that consists essentially of fluoroethylene carbonate and/or ethylene carbonate, dimethyl carbonate and optionally no more than about 40 volume percent methyl ethyl carbonate, and wherein the lithium electrolyte salt is selected from the group consisting of LiPF6, LiBF4 and combinations thereof. Desirable stabilizing additives include, for example, dimethyl methylphosphonate, thiophene or thiophene derivatives, and/or LiF with an anion complexing agent. |
| US11121406B2 |
Electrolyte and battery
This application provides an electrolyte and a battery. The electrolyte comprises an electrolytic salt and an organic solvent comprising a cyclic carbonate and a chain carbonate. The electrolyte further comprises an additive A and an additive B, wherein the additive A is a positive-electrode film-forming additive, the additive B is a negative-electrode film-forming additive, and the reduction potential of the additive B is higher than that of the cyclic carbonate, and the electrolyte has a conductivity of 6 mS/cm to 10 mS/cm at 25° C. The electrolyte of the present application can improve the cycle performance and storage performance of the battery, in particular, improve the cycle performance and storage performance of the battery under high temperature and high voltage conditions, and at the same time balance the low-temperature performance of the battery. |
| US11121405B2 |
Secondary battery
A gel electrolyte and a separator are provided between the positive electrode current collector and the negative electrode current collector. The plurality of positive electrode current collectors and the plurality of negative electrode current collectors are stacked such that surfaces of negative electrodes with which active material layers are not coated or surfaces of positive electrodes with which active material layers are not coated are in contact with each other. |
| US11121402B2 |
Aqueous manganese ion battery
An alternative grid energy storage system is described herein. In one embodiment, an electrochemical cell comprises a high specific surface area cathode (e.g., a cathode comprising a carbon nanofoam paper, a carbon nanotube mesh, a particulate carbon material, electrolytic manganese dioxide, or a manganese dioxide film), a zinc or lead anode (e.g., Zn or Pb foil), a selective ion-conductive separator that does not conduct zinc ions (e.g., a NAFION sulfonated tetrafluoroethylene based fluoropolymer-copolymer separator) between the anode and the cathode, and an aqueous electrolyte comprising a manganese salt (e.g., aqueous manganese sulfate) contacting the electrodes and the separator. A battery comprising two or more of the electrochemical cells electrically connected together in series, parallel, or both, also is described. |
| US11121397B2 |
Application of force in electrochemical cells
The present invention relates to the application of a force to enhance the performance of an electrochemical cell. The force may comprise, in some instances, an anisotropic force with a component normal to an active surface of the anode of the electrochemical cell. In the embodiments described herein, electrochemical cells (e.g., rechargeable batteries) may undergo a charge/discharge cycle involving deposition of metal (e.g., lithium metal) on a surface of the anode upon charging and reaction of the metal on the anode surface, wherein the metal diffuses from the anode surface, upon discharging. The uniformity with which the metal is deposited on the anode may affect cell performance. For example, when lithium metal is redeposited on an anode, it may, in some cases, deposit unevenly forming a rough surface. The roughened surface may increase the amount of lithium metal available for undesired chemical reactions which may result in decreased cycling lifetime and/or poor cell performance. The application of force to the electrochemical cell has been found, in accordance with the invention, to reduce such behavior and to improve the cycling lifetime and/or performance of the cell. |
| US11121396B2 |
Intermediate layers for electrode fabrication
An electrode includes one or more intermediate layers positioned between a substrate and an electrochemically active material. Intermediate layers may be made from chromium, titanium, tantalum, tungsten, nickel, molybdenum, lithium, as well as other materials and their combinations. In certain embodiments, an active material includes one or more high capacity active materials, such as silicon, tin, and germanium. These materials tend to swell during cycling and may loose mechanical and/or electrical connection to the substrate. A flexible intermediate layer may compensate for swelling and provide a robust adhesion interface. Methods of fabricating electrodes involve forming metal silicide nanostructures. |
| US11121391B2 |
Direct isopropanol fuel cell
A direct isopropanol fuel cell adapted for use in ambient conditions and utilizing as fuel isopropanol and water preferably with isopropanol at relatively high concentrations representing 30% to 90% isopropanol. |
| US11121385B2 |
Fuel cell purge systems and related processes
A fuel cell purge system includes a primary fuel cell in fluid communication with a purge cell. Fuel and oxidant purged with inert gas impurities from the primary fuel cell react in the purge cell, thereby decreasing the volume of purged gases and facilitating storage while maintaining fuel cell electrochemical performance. |
| US11121382B2 |
Solid oxide fuel cell stacks having a barrier layer and associated methods thereof
A solid oxide fuel cell stack having a metallic layer and a glass layer, and a method for preventing or reducing a chemical reaction between the metallic layer and the glass layer are disclosed. The solid oxide fuel cell stack has a barrier layer disposed between the metallic layer and the glass layer. The barrier layer includes alumina and a phosphate. The phosphate includes an aluminum dihydrogen phosphate, an aluminum-containing phosphate, a phosphate of an element of the metallic layer, a phosphate of an element of the glass layer, or combinations thereof. The method includes disposing a barrier layer between the metallic layer and the glass layer. |
| US11121380B2 |
Fuel cell stack
The present disclosure relates to a fuel cell stack having a cathode-side separator and an anode-side separator which are made of different materials to prevent performance degradation of stacks and corrosion and damage of components. A fuel cell stack according to exemplary embodiments of the present disclosure may have multiple unit cells stacked therein, in which each unit cell of the multiple unit cells may include: a membrane electrode assembly (MEA); a pair of gas diffusion layers (GDLs) disposed on opposite surfaces of the MEA; and an anode-side separator and a cathode-side separator disposed to face each other, the MEA and the pair of GDLs being disposed therebetween, in which the cathode-side separator has a corrosion resistance higher than a corrosion resistance of the anode-side separator. |
| US11121378B2 |
Mixed conductor, electrochemical device including the same, and method of preparing mixed conductor
A mixed conductor represented by Formula 1: A4+xM5-yM′yO12-δ, Formula 1 wherein, in Formula 1, A is a monovalent cation, M is at least one of a divalent cation, a trivalent cation, or a tetravalent cation, M′ is at least one of a monovalent cation, a divalent cation, a trivalent cation, a tetravalent cation, a pentavalent cation, or a hexavalent cation, M and M′ are different from each other, and 0.3≤x<3, 0.01 |
| US11121376B2 |
Positive electrode, non-aqueous electrolyte secondary battery, and method of producing positive electrode
A positive electrode includes at least a positive electrode current collector and a positive electrode active material layer. The positive electrode current collector includes an aluminum foil and an aluminum hydrated oxide film. The aluminum hydrated oxide film covers a surface of the aluminum foil. The positive electrode active material layer is formed on a surface of the aluminum hydrated oxide film. The aluminum hydrated oxide film has a thickness not smaller than 50 nm and not greater than 1000 nm. The aluminum hydrated oxide film contains at least one selected from the group consisting of phosphorus, fluorine, and sulfur. |
| US11121375B2 |
Solid-state electrodes with non-carbon electronic conductive additives
Individual electrodes for a solid-state lithium-ion battery cell may be formed, for example, by elevated temperature consolidation in air of a mixture of resin-bonded, electrode active material particles, oxide solid electrolyte particles, and particles of a non-carbon electronic conductive additive. Depending on the selected compositions of the electrode materials and the solid electrolyte, one or both of the cathode and anode layer members may be formed to include the non-carbon electronic conductive additive. The battery cell is assembled with the solid-state electrodes placed on opposite sides of a consolidated layer of oxide electrolyte particles. The electronic conductivity of at least one of the cathode and anode is increased by the incorporation of particles of a selected non-carbon electronic conducive additive with the respective electrode particles. |
| US11121374B2 |
Positive electrode for lithium secondary battery and lithium secondary battery including same
The present disclosure relates to a positive electrode for a lithium secondary battery comprising a positive electrode current collector and a positive electrode active material layer coated and formed on at least one surface of the positive electrode current collector, wherein the positive electrode current collector includes a non-coated portion protruded with no positive electrode active material layer coated thereon, and wherein an irreversible material composed of lithium oxide is coated on the non-coated portion, and a lithium secondary battery including the same. |
| US11121371B2 |
Cathode active material and fluoride ion battery
A main object of the present disclosure is to provide a cathode active material used for a fluoride ion battery, the cathode active material comprising: a first active material having a composition represented by Pb2−xCu1+xF6, wherein 0≤x<2; and a second active material containing a Bi element and a F element. |
| US11121368B2 |
Positive electrode material for nonaqueous electrolyte secondary battery and method for producing the same, and positive electrode composite material paste, and nonaqueous electrolyte secondary battery
An object of the present invention is to provide a positive electrode material for a nonaqueous electrolyte secondary battery, which is capable of inhibiting the gelation of a positive electrode composite material paste without decreasing the charge and discharge capacity and the output characteristics, when used as a positive electrode material for batteries. The positive electrode active material for a nonaqueous electrolyte secondary battery comprises a mixture containing a lithium metal composite oxide represented by a general formula LiaNi1-x-y-zCoxMnyMzO2 (wherein, 0.03≤x≤0.35, 0≤y≤0.35, 0≤z≤0.05, 0.97≤a≤1.30, and M is at least one type of element selected from V, Fe, Cu, Mg, Mo, Nb, Ti, Zr, W and Al) and an ammonium tungstate powder, wherein when 5 g of the positive electrode material is mixed with 100 ml of pure water, the mixture is stirred for 10 minutes and then left to stand for 30 minutes, and then the pH of a supernatant fluid at 25° C. was measured, the pH ranges from 11.2 to 11.8. |
| US11121361B2 |
Method of preparing slurry for secondary battery positive electrode
The present invention provides a method of preparing a slurry for a secondary battery positive electrode which includes forming a first mixture in a paste state by adding a lithium iron phosphate-based positive electrode active material, a conductive agent, a binder, and a solvent, and preparing a slurry for a positive electrode by mixing while further adding a solvent to the first mixture in the paste state. |
| US11121355B2 |
Metal fluoride passivation coatings prepared by atomic layer deposition for Li-ion batteries
The fabrication of robust interfaces between transition metal oxides and non-aqueous electrolytes is one of the great challenges of lithium ion batteries. Atomic layer deposition (ALD) of aluminum tungsten fluoride (AlWxFy) improves the electrochemical stability of LiCoO2. AlWxFy thin films were deposited by combining trimethylaluminum and tungsten hexafluoride. in-situ quartz crystal microbalance and transmission electron microscopy studies show that the films grow in a layer-by-layer fashion and are amorphous nature. Ultrathin AlWxFy coatings (<10 Å) on LiCoO2 significantly enhance stability relative to bare LiCoO2 when cycled to 4.4 V. The coated LiCoO2 exhibited superior rate capability (up to 400 mA/g) and discharge capacities at a current of 400 mA/g were 51% and 92% of the first cycle capacities for the bare and AlWxFy coated materials. These results open new possibilities for designing ultrathin and electrochemically robust coatings of metal fluorides via ALD to enhance the stability of Li-ion electrodes. |
| US11121353B2 |
Systems and methods for potassium enhancing silicon-containing anodes for improved cyclability
Various methods and techniques for enhancing a silicon-containing anode for a battery cell are presented. The methods may include providing a silicon-containing anode having reversible electrochemical capabilities including a silicon-containing material and an anode material compatible with a lithium-ion battery chemistry having porous and conductive mechanical properties. The methods may also include enriching a surface layer of the silicon-containing anode with sodium ions to intersperse the sodium ions between silicon atoms of the silicon-containing matieral. The methods may also include displacing the sodium ions with potassium ions to form a comrpession layer in the silicon-containing anode. The potassium ions may place the silicon atoms of the silicon-containing material in a pre-compressive state to counteract internal stress exerted on the silicon-containing material. |
| US11121348B2 |
Rotary polarized light emitting body, rotary polarized light emitting device, and manufacturing method therefor
Provided is a display. A rotary polarized light emitting device includes: a first electrode; a second electrode; a light exiting layer, first light having a polarization state in which the first light rotates in a first direction, and exit, toward the second electrode, second light having a polarization state in which the second light rotates in a second direction that is opposite to the first direction. |
| US11121343B2 |
Display device
A display device includes a substrate, a plurality of pixels above the substrate, each of the pixels including a light emitting element, a display region including the plurality of pixels, a thin film transistor which each of the plurality of pixels includes, a protective film including a first inorganic insulating material and located between the thin film transistor and the light emitting element, a sealing film including a second inorganic insulating material and covering the light emitting element, and at least one through hole located in the display region and passing through the substrate, the protective film, and the sealing film, wherein the second inorganic insulating material is in direct contact with the protective film in a first region located between the through hole and the pixels. |
| US11121339B2 |
Quantum dot LED design based on resonant energy transfer
Embodiments of the present application relate to illumination devices using luminescent nanostructures. An illumination device includes a first conductive layer, a second conductive layer, a hole transport layer, an electron transport layer and a material layer that includes a plurality of luminescent nanostructures. The hole transport layer and the electron transport layer are each disposed between the first conductive layer and the second conductive layer. The material layer is disposed between the hole transport layer and the electron transport layer and includes one or more discontinuities in its thickness such that the hole transport layer and the electron transport layer contact each other at the one or more discontinuities. Resonant energy transfer occurs between the luminescent nanostructures and excitons at the discontinuities. |
| US11121335B2 |
Carbon nanotube transistor and logic with end-bonded metal contacts
A method for manufacturing a semiconductor device includes forming a dielectric layer on a substrate, forming a first carbon nanotube (CNT) layer on the dielectric layer at a first portion of the device corresponding to a first doping type, forming a second CNT layer on the dielectric layer at a second portion of the device corresponding to a second doping type, forming a plurality of first contacts on the first CNT layer, and a plurality of second contacts on the second CNT layer, performing a thermal annealing process to create end-bonds between the plurality of the first and second contacts and the first and second CNT layers, respectively, depositing a passivation layer on the plurality of the first and second contacts, and selectively removing a portion of the passivation layer from the plurality of first contacts. |
| US11121332B2 |
Foldable array substrate, preparation method thereof and display device
The present application provides a foldable array substrate, a preparation method thereof and a display device. The foldable array substrate includes a base substrate, a gate metal layer disposed on one side of the base substrate, a source-drain metal layer disposed on the side of the gate metal layer opposite to the base substrate, and an insulating layer disposed between the gate metal layer and the source-drain metal layer. A plurality of holes are disposed on the foldable array substrate, and the holes are disposed between adjacent pixel units of a plurality of pixel units, and extend from the side of the insulating layer opposite to the base substrate toward the base substrate. |
| US11121330B2 |
Organic light-emitting diode display panel and display device having substrate through holes
An organic light-emitting diode (OLED) display panel and a display device are provided. The OLED display panel includes a substrate, a driving circuit layer formed on a side of the substrate, a light-emitting material layer formed on a side of the driving circuit layer away from the substrate, a sensing unit formed on another side of the substrate away from the driving circuit layer and configured to receive light reflected by a fingerprint surface. In a fingerprint identifying region of the OLED display panel, the substrate includes a through hole, and the light emitted from the light-emitting material layer and reflected by the fingerprint surface travels through the through hole and arrivals the sensing unit. |
| US11121329B2 |
Amine compound and organic electroluminescence device including the same
An amine compound which improves emission efficiency and an organic electroluminescence device including the same are provided. The amine compound is represented by the structure below, wherein X is O or S, Y is C or Si, each of Ar1 and Ar2 is independently a substituted or unsubstituted alkyl group having 1 to 50 carbon atoms, a substituted or unsubstituted aryl group having 6 to 50 carbon atoms for forming a ring, or a substituted or unsubstituted heteroaryl group having 2 to 50 carbon atoms for forming a ring, which includes O or S as a heteroatom, and each of L1 and L2 is independently a direct linkage, a substituted or unsubstituted arylene group having 6 to 30 carbon atoms for forming a ring, or a substituted or unsubstituted heteroarylene group having 2 to 30 carbon atoms for forming a ring. R1 through R5 are defined in the description. |
| US11121328B2 |
Synthesis of platinum and palladium complexes as narrow-band phosphorescent emitters for full color displays
Platinum and palladium complexes are disclosed that can be useful as narrow band phosphorescent emitters. Also disclosed are methods for preparing and using the platinum and palladium complexes. |
| US11121325B2 |
Organic light emitting display device
An organic light emitting display device is provided. The organic light emitting display device includes at least two or more light emitting parts between an anode and a cathode and each having a light emitting layer. At least one of the at least two or more light emitting parts includes an organic layer. The organic layer is formed of a compound comprising a functional group that reacts with alkali metals or alkali earth metals and a functional group with electron transport properties. |
| US11121316B2 |
Symmetric tunable PCM resistor for artificial intelligence circuits
A method of tuning a PCM device is disclosed. The method includes receiving a command and determining if the command is a SET command or a RESET command. When the command is a RESET command, the method provides a short pulse across a resistive electrode and a top electrode through a phase change material generating amorphous PCM at the point of highest voltage across the PCM region. |
| US11121315B2 |
Structure improving reliability of top electrode contact for resistance switching RAM having cells of varying height
The problem of forming top electrode vias that provide consistent results in devices that include resistance switching RAM cells of varying heights is solved using a dielectric composite that fills areas between resistance switching RAM cells and varies in height to align with the tops of both the taller and the shorter resistance switching RAM cells. An etch stop layer may be formed over the dielectric composite providing an equal thickness of etch-resistant dielectric over both taller and shorter resistance switching RAM cells. The dielectric composite causes the etch stop layer to extend laterally away from the resistance switching RAM cells to maintain separation between the via openings and the resistance switching RAM cell sides even when the openings are misaligned. |
| US11121314B2 |
Large height tree-like sub 30nm vias to reduce conductive material re-deposition for sub 60nm MRAM devices
A stack of connecting metal vias is formed on a bottom electrode by repeating steps of depositing a conductive via layer, patterning and trimming the conductive via layer to form a sub 30 nm conductive via, encapsulating the conductive via with a dielectric layer, and exposing a top surface of the conductive via. A MTJ stack is deposited on the encapsulated via stack. A top electrode layer is deposited on the MTJ stack and patterned and trimmed to form a sub 60 nm hard mask. The MTJ stack is etched using the hard mask to form an MTJ device and over etched into the encapsulation layers but not into the bottom electrode wherein metal re-deposition material is formed on sidewalls of the encapsulation layers underlying the MTJ device and not on sidewalls of a barrier layer of the MTJ device. |
| US11121305B2 |
Microelectronic structures with suspended lithium-based thin films
In one aspect, a microelectronic device comprises: a suspended lithium-based thin film; and one or more electrodes disposed on the suspended lithium-based thin film, wherein the one or more electrodes comprises one or more fingers, and a width of at least one outer finger of the one or more fingers is smaller than a width of at least one inner finger of the one or more fingers. |
| US11121304B2 |
Junction fabrication method for forming qubits
A method of making a Josephson junction for a superconducting qubit includes providing a substructure having a surface with first and second trenches perpendicular to each other defined therein. The method further includes evaporating a first superconducting material to deposit the first superconducting material and evaporating a second superconducting material to deposit the second superconducting material in the first trench to provide a first lead, and forming an oxidized layer on the first and second superconducting materials. The method includes evaporating a third superconducting material at an angle substantially perpendicular to the surface of the substructure to deposit the third superconducting material in the second trench without rotating the substructure to form a second lead. A vertical Josephson junction is formed at the intersection of the first and second trenches electrically connected through the first lead and through the second lead. |
| US11121303B2 |
Treatment during fabrication of a quantum computing device to increase channel mobility
Methods related to the treatment of a quantum computing device to increase channel mobility are described. An example method includes forming a superconducting metal layer on a surface of a wafer. The method further includes selectively removing a portion of the superconducting metal layer to allow a subsequent formation of a gate dielectric associated with the device, where the selectively removing causes a decrease in channel mobility associated with the quantum computing device. The method further includes prior to forming the gate dielectric, subjecting the wafer to a plasma treatment, where a set of parameters associated with the plasma treatment is selected to increase the channel mobility. |
| US11121302B2 |
System and method for superconducting multi-chip module
A method for bonding two superconducting integrated circuits (“chips”), such that the bonds electrically interconnect the chips. A plurality of indium-coated metallic posts may be deposited on each chip. The indium bumps are aligned and compressed with moderate pressure at a temperature at which the indium is deformable but not molten, forming fully superconducting connections between the two chips when the indium is cooled down to the superconducting state. An anti-diffusion layer may be applied below the indium bumps to block reaction with underlying layers. The method is scalable to a large number of small contacts on the wafer scale, and may be used to manufacture a multi-chip module comprising a plurality of chips on a common carrier. Superconducting classical and quantum computers and superconducting sensor arrays may be packaged. |
| US11121300B2 |
Method of producing optoelectronic semiconductor devices and optoelectronic semiconductor device
A method of producing optoelectronic semiconductor devices includes in the stated order: A) providing a semiconductor layer sequence on a transparent wafer, the semiconductor layer sequence including an active layer; B) applying electrical contact pads on a mounting face of the semiconductor layer sequence; C) coating the semiconductor layer sequence at the mounting face and/or on the electrical contact pads with a protective layer; D) dicing the semiconductor layer sequence and the wafer to form semiconductor chips with side faces; E) forming a casting body all around the semiconductor chips directly on the side faces, the protective layer having anti-wetting properties towards a material of the casting body; and F) dicing the casting body to the optoelectronic semiconductor devices, wherein the protective layer remains on the mounting face and/or on the electrical contact pads in the finished optoelectronic semiconductor devices. |
| US11121299B2 |
Semiconductor device and method
A method includes depositing a photonic structure over a substrate, the photonic structure including photonic semiconductor layer, forming conductive pads over the photonic structure, forming a hard mask over the conductive pads, wherein the hard mask is patterned to cover each conductive pad with a hard mask region, etching the photonic structure using the hard mask as an etching mask to form multiple mesa structures protruding from the substrate, each mesa structure including a portion of the photonic structure, a contact pad, and a hard mask region, depositing a first photoresist over the multiple mesa structures, depositing a second photoresist over the first photoresist, patterning the second photoresist to expose the hard mask regions of the multiple mesa structures, and etching the hard mask regions to expose portions of the contact pads of the multiple mesa structures. |
| US11121298B2 |
Light-emitting diode packages with individually controllable light-emitting diode chips
Solid-state light emitting devices including light-emitting diodes (LEDs), and more particularly packaged LEDs that include individually controllable LED chips are disclosed. In some embodiments, an LED package includes electrical connections configured to reduce corrosion of metals within the package; or decrease the overall forward voltage of the LED package; or provide an electrical path for electrostatic discharge (ESD) chips. In some embodiments, an LED package includes an array of LED chips, each of which is individually controllable such that individual LED chips or subgroups of LED chips may be selectively activated or deactivated. A single wavelength conversion element may be provided over the array of LED chips, or separate wavelength conversion elements may be provided over one or more individual LED chips of the array. Representative LED packages may be beneficial for applications where a high luminous intensity with a controllable brightness or adaptable emission pattern is desired. |
| US11121297B2 |
Method of manufacturing light emitting device that includes a first reflecting layer and a second reflecting layer
A method of manufacturing a light emitting device includes: mounting a light emitting element in a package in which a recess is defined, the light emitting element being mounted on a bottom surface defining the recess; forming a first reflecting layer by covering lateral surfaces defining the recess with a first resin containing a first reflecting material; forming a second reflecting layer covering the bottom surface defining the recess, wherein the step of forming the second reflecting layer comprises settling the second reflecting material in the second resin by a centrifugal force so as to form (i) a layer containing a second reflecting material on the bottom surface defining the recess, and (ii) a light-transmissive layer above the layer containing the second reflecting material; and disposing a phosphor-containing layer on the second reflecting layer and the light emitting element, the phosphor-containing layer comprising a third resin that contains a phosphor. |
| US11121292B2 |
LED light bulb having filament with being partially coated by light conversion layer
An LED light bulb, consisting of: a lamp housing doped with a golden yellow material or its surface coated with a yellow film; a bulb base connected to the lamp housing; a stem connected to the bulb base and located in the lamp housing, the stem comprises a stand extending to the center of the lamp housing; and a single LED filament, disposed in the lamp housing, the LED filament comprising: a light conversion layer, coated on at least two sides of the LED chip and the conductive electrodes, and a portion of each of the conductive electrodes is not coated with the light conversion layer, the light conversion layer has at least one top layer and one base layer, the top layer and the base layer are disposed on the opposing surface of the LED chip, wherein the top layer of the light conversion layer in the conductive section comprises a wavy concave structure with groove, the two adjacent grooves of the wavy concave structure have different width at the positions aligned in the axial direction of the LED filament. |
| US11121289B2 |
Ultra-dense quantum dot color converters
Quantum dot-based color converters having a high density of sub-pixels. The sub-pixels have a high density of quantum dots that provide for high conversion efficiency within small sub-pixel aspect ratios and small volumes. The color converter can be used in optical displays. |
| US11121286B2 |
Semiconductor device
A semiconductor device according to an embodiment includes a substrate, first and second light emitting structures disposed on the substrate, a first reflective electrode disposed on the first light emitting structure, a second reflective electrode disposed on the second light emitting structure, a connection electrode, a first electrode pad, and a second electrode pad. According to the embodiment, the first light emitting structure includes a first semiconductor layer of a first conductivity type, a first active layer disposed on the first semiconductor layer, a second semiconductor layer of a second conductivity type and disposed on the first active layer, and a first through hole provided through the second semiconductor layer and the first active layer to expose the first semiconductor layer. The second light emitting structure is spaced apart from the first light emitting structure and includes a third semiconductor layer of the first conductivity type, a second active layer disposed on the third semiconductor layer, and a fourth semiconductor layer of the second conductivity type and disposed on the second active layer. |
| US11121281B2 |
Systems and methods for light direction detection microchips
Embodiments of an improved light-direction detection (LDD) device are described herein. The LDD device includes a substrate and at least one predefined structure formed along the substrate by stacking metal layers, contacts, and vias available in the manufacturing process of the device. The predefined structure is formed along a photodiode pair to collectively define an optical sensor configured to detect direction of incident light without need for off-chip components. The device accommodates light direction detection in two or more orthogonal planes. |
| US11121280B2 |
Display device with image sensor
A display device is provided. The display device includes a display panel that has a display region. The display device also includes at least one image sensor that overlaps with the display region. The at least one image sensor includes a light-sensing element and at least one light-receiving element disposed on the light-sensing element. |
| US11121272B2 |
Self-bypass diode function for gallium arsenide photovoltaic devices
Embodiments of the invention generally relate to photovoltaic devices. In one embodiment, a method for forming a gallium arsenide based photovoltaic device includes providing a semiconductor structure, the structure including an absorber layer comprising gallium arsenide and an emitter layer. A bypass function is provided in a p-n junction of the semiconductor structure, where under reverse-bias conditions the p-n junction breaks down in a controlled manner by a Zener breakdown effect. The absorber or base layer has a grading in doping concentration from a first doping level closest to the emitter layer to a second doping level away from the emitter layer, the second doping level being greater than the first doping level. |
| US11121270B2 |
Photoelectric conversion element, photoelectric conversion module, and solar photovoltaic power generation system
There is provided a photoelectric conversion element which can prevent the contact resistance between a non-crystalline semiconductor layer containing impurities and an electrode formed on the non-crystalline semiconductor layer from increasing, and can improve the element characteristics. A photoelectric conversion element (10) includes a semiconductor substrate (12), a first semiconductor layer (20n), a second semiconductor layer (20p), a first electrode (22n), and a second electrode (22p). The first semiconductor layer (20n) has a first conductive type. The second semiconductor layer (20p) has a second conductive type opposite to the first conductive type. The first electrode (22n) is formed on the first semiconductor layer (20n). The second electrode (22p) is formed on the second semiconductor layer (20p). At least one electrode of the first electrode (22n) and the second electrode (22p) includes a plurality of metal crystal grains. The average crystal grain size of the metal crystal grains in the in-surface direction of electrode is greater than the thickness of the electrode. |
| US11121269B2 |
Solar cell
A solar cell includes a semiconductor substrate; a conductive region on or at the semiconductor substrate; an electrode electrically connected to the conductive region; and a silicon oxynitride layer on a light incident surface of the semiconductor substrate, wherein the silicon oxynitride layer comprises a first phase region having a first oxygen content and a first nitrogen content; a second phase region having a second oxygen content higher than the first oxygen content and a second nitrogen content lower than the first nitrogen content; and a third phase region having a third oxygen content lower than the second oxygen content and a third nitrogen content lower than the second nitrogen content. |
| US11121268B2 |
Semiconductor light-receiving element and manufacturing method of semiconductor light-receiving element
A semiconductor light-receiving element includes a substrate; a light-receiving mesa portion, formed on top of the substrate, including a first semiconductor layer of a first conductivity type, an absorption layer, and a second semiconductor layer of a second conductivity type; a light-receiving portion electrode, formed above the light-receiving mesa portion, connected to the first semiconductor layer; a pad electrode formed on top of the substrate; and a bridge electrode, placed so that an insulating gap is interposed between the bridge electrode and the second semiconductor layer, configured to connect the light-receiving portion electrode and the pad electrode on top of the substrate, the bridge electrode being formed in a layer separate from layers of the light-receiving portion electrode and the pad electrode. |
| US11121267B2 |
Antireflective coating for glass applications and method of forming same
One aspect of the disclosure is directed to a method for forming an antireflective coating on a substrate, which includes providing a polymer solution and a silica solution, depositing the polymer solution on a surface of the substrate to forming a polymer film thereon, depositing the silica solution on the formed polymer film on the substrate to form a silica film thereon, thereby forming a stack structure having the silica film formed on the polymer film that is, in turn, formed on the substrate, and drying the stack structure to form the antireflective coating on the substrate, wherein the antireflective coating comprises silica nanoparticles. |
| US11121263B2 |
Hydrogen trap layer for display device and the same
Display panels with hydrogen trap layers are described. The hydrogen trap layers may be incorporated into a variety of locations to getter or block hydrogen diffusion into the semiconductor oxide layer of an oxide transistor. |
| US11121262B2 |
Semiconductor device including thin film transistor and method for manufacturing the same
A semiconductor device includes a thin film transistor including: a substrate 1; a gate electrode 2 supported on the substrate 1; a semiconductor layer 4 provided on the gate electrode with a gate insulating layer 3 therebetween, wherein the semiconductor layer includes a first region Rs, a second region Rd, and a source-drain interval region SG that is located between the first region and the second region and overlaps with the gate electrode as seen from a direction normal to the substrate; a first contact layer Cs in contact with the first region and a second contact layer Cd in contact with the second region; a source electrode 8s electrically connected to the first region with the first contact layer therebetween; and a drain electrode 8d electrically connected to the second region with the second contact layer therebetween, wherein: the semiconductor layer includes a crystalline silicon region 4c, and at least a portion of the crystalline silicon region is located in the source-drain interval region SG; and the semiconductor layer has at least one opening P that is located in the source-drain interval region SG and reaches the gate insulating layer. |
| US11121257B2 |
Thin film transistor, pixel structure, display device and manufacturing method
The present disclosure provides a thin film transistor, a pixel structure, a display device, and a manufacturing method. The thin film transistor includes: a gate on the substrate; a gate insulating layer covering the gate and the substrate; a first support portion and a second support portion, which are provided on the gate insulating layer covering the substrate and located on both sides of the gate, wherein the first support portion is not connected to the second support portion; a semiconductor layer on the first support portion, the second support portion, and the gate insulating layer covering the gate; and a source and a drain respectively connected to the semiconductor layer. The first support portion and the second support portion are respectively configured to support the semiconductor layer. |
| US11121254B2 |
Transistor with strained superlattice as source/drain region
A transistor with strained superlattices as source/drain regions includes a substrate. A gate structure is disposed on the substrate. Two superlattices are respectively disposed at two sides of the gate structure and embedded in the substrate. The superlattices are strained. Each of the superlattices is formed by a repeated alternating stacked structure including a first epitaxial silicon germanium and a second epitaxial silicon germanium. The superlattices serve as source/drain regions of the transistor. |
| US11121250B2 |
Silicon carbide semiconductor device
In an element region and a non-element region, a silicon carbide semiconductor device includes a drift layer having a first conductivity type provided on a silicon carbide semiconductor substrate. In the element region, the silicon carbide semiconductor device includes a first trench that reaches the drift layer, and a gate electrode provided in the first trench through a gate insulation film and electrically connected to a gate pad electrode. In the non-element region, the silicon carbide semiconductor device includes a second trench whose bottom surface reaches the drift layer, a second relaxation region having a second conductivity type disposed below the second trench, an inner-surface insulation film provided on a side surface and on the bottom surface of the second trench, and a low-resistance region provided in the second trench through the inner-surface insulation film and electrically insulated from the gate pad electrode. |
| US11121247B2 |
Semiconductor device and method for manufacturing same
A semiconductor device includes a semiconductor portion, a first insulating film, a second insulating film, a first contact, a second contact, and a gate electrode. The first insulating film is provided on the semiconductor portion. The second insulating film is contacting the first insulating film, is provided on the semiconductor portion, and is thicker than the first insulating film. A through-hole is formed in the second insulating film. The first contact has a lower end connected to the semiconductor portion. The second contact has a lower portion disposed inside the through-hole and a lower end connected to the semiconductor portion. The gate electrode is positioned between the first contact and the second contact, is provided on the first insulating film, and is provided on a portion of the second insulating film other than the through-hole. |
| US11121246B2 |
3D semiconductor device and structure with memory
A 3D semiconductor device including: a first level including a first single-crystal layer, a plurality of first transistors, and at least one metal layer, the metal layer overlaying the first single crystal layer with interconnects between the first transistors forming control circuits; a second level overlaying the metal layer, a plurality of second transistors, and a plurality of first memory cells including at least one of the second transistors; a third level overlaying the second level and including a plurality of third transistors, including second memory cells each including at least one third transistor, where at least one of the second memory cells is at least partially atop of the control circuits, where the control circuits are connected so to control second transistors and third transistors, where the second level is bonded to the third level and to the first level, where the bonded includes oxide to oxide bonds; and a fourth level above the third level, including a second single-crystal layer. |
| US11121241B2 |
Semiconductor device
A semiconductor device includes a semiconductor substrate having first and second main surfaces, a first region formed in a surface layer of the first main surface, a drift layer disposed adjacent to the first region, a charge accumulation region having a higher concentration than the drift region, and a trench gate including a trench penetrating the first region and the charge accumulation region, and a gate electrode formed in the trench. The trench gate includes a main trench having a gate electrode to which a gate voltage is applied, and a dummy trench having a gate electrode to which a voltage different from the main trench is applied. The main trench and the dummy trench sandwiches the charge accumulation region, and a contact area S1 between the dummy trench and the charge accumulation region is larger than a contact area S2 between the main trench and the charge accumulation region. |
| US11121239B2 |
Spin to photon transducer
Methods, devices, and systems are described for storing and transferring quantum information. An example device may comprise at least one semiconducting layer, one or more conducting layers configured to define at least two quantum states in the at least one semiconducting layer and confine an electron in or more of the at least two quantum states, and a magnetic field source configured to generate an inhomogeneous magnetic field. The inhomogeneous magnetic field may cause a first coupling of an electric charge state of the electron and a spin state of the electron. The device may comprise a resonator configured to confine a photon. An electric-dipole interaction may cause a second coupling of an electric charge state of the electron to an electric field of the photon. |
| US11121237B2 |
Manufacturing method for FinFET device
The invention discloses a manufacturing method for FinFET device, comprises following steps: S01: providing an SOI substrate; S02: covering a middle part of the top silicon layer by using a barrier layer, and performing a silicon ion implantation on the top silicon layer, so that the buried insulator layer under the top silicon layer not covered by the barrier layer is converted into silicon-rich silicon dioxide, wherein in the top silicon layer, the part not covered by the barrier layer is called an implanted region, and the part covered by the barrier layer is called a non-implanted region; S03: removing the barrier layer, define a fin structure in the top silicon layer, the fin structure includes a channel and a source and drain, the source and drain are located on opposite sides of the channel; and the channel in the fin structure is located in the non-implanted region of the top silicon layer, the source and drain are located in the implanted region of the top silicon layer; removing the top silicon layer outside the fin structure; S04: removing the buried insulator layer under the channel in the fin structure to form a suspended channel; S05: forming a completely surrounded dielectric film and a gate in sequence around the suspended channel; S06: forming spacers and a source-drain doping in the structure. |
| US11121233B2 |
Forming nanosheet transistor using sacrificial spacer and inner spacers
Fabricating a nanosheet transistor includes receiving a substrate structure having a set of nanosheet layers stacked upon a substrate, the set of nanosheet layers including at least one silicon (Si) layer, at least one silicon-germanium (SiGe) layer, a fin formed in the nanosheet layers, a gate region formed within the fin, and a trench region adjacent to the fin. A top sacrificial spacer is formed upon the fin and the trench region and etched to form a trench in the trench region. An indentation is formed within the SiGe layer in the trench region, and a sacrificial inner spacer is formed within the indentation. A source/drain (S/D) region is formed within the trench. The sacrificial top spacer and sacrificial inner spacer are etched to form an inner spacer cavity between the S/D region and the SiGe layer. An inner spacer is formed within the inner spacer cavity. |
| US11121232B2 |
Stacked nanosheets with self-aligned inner spacers and metallic source/drain
Semiconductor devices include vertically stacked channel layers formed from a semiconductor material. A metallic interface layer is formed between metal source/drain regions and the vertically stacked channel layers. The metallic interface layer includes the semiconductor material and a metal. A gate stack is formed between and around the channel layers. |
| US11121230B2 |
Structures and methods for controlling dopant diffusion and activation
Structures and methods for controlling dopant diffusion and activation are disclosed. In one example, a semiconductor structure is disclosed. The semiconductor structure includes: a channel layer; a barrier layer over the channel layer; a gate electrode over the barrier layer; and a doped layer formed between the barrier layer and the gate electrode. The doped layer includes (a) an interface layer in contact with the barrier layer and (b) a main layer between the interface layer and the gate electrode. The doped layer comprises a dopant whose doping concentration in the interface layer is lower than that in the main layer. |
| US11121223B2 |
Control gate structures for field-effect transistors
Field-effect transistors, and apparatus including such field-effect transistors, including a gate dielectric overlying a semiconductor and a control gate overlying the gate dielectric. The control gate might include an instance of a first polycrystalline silicon-containing material containing polycrystalline silicon, and an instance of a second polycrystalline silicon-containing material containing polycrystalline silicon-germanium or polycrystalline silicon-germanium-carbon. |
| US11121222B2 |
Semiconductor devices with graded dopant regions
Most semiconductor devices manufactured today, have uniform dopant concentration, either in the lateral or vertical device active (and isolation) regions. By grading the dopant concentration, the performance in various semiconductor devices can be significantly improved. Performance improvements can be obtained in application specific areas like increase in frequency of operation for digital logic, various power MOSFET and IGBT ICs, improvement in refresh time for DRAMs, decrease in programming time for nonvolatile memory, better visual quality including pixel resolution and color sensitivity for imaging ICs, better sensitivity for varactors in tunable filters, higher drive capabilities for JFETs, and a host of other applications. |
| US11121220B2 |
Semiconductor device including trench structures and manufacturing method
A semiconductor device includes a silicon carbide semiconductor body including a source region of a first conductivity type, a body region of a second conductivity type, shielding regions of the second conductivity type and compensation regions of the second conductivity type. Trench structures extend from a first surface into the silicon carbide semiconductor body along a vertical direction. Each of the trench structures includes an auxiliary electrode at a bottom of the trench structure and a gate electrode between the auxiliary electrode and the first surface. The auxiliary electrode is electrically insulated from the gate electrode. The auxiliary electrode of each of the trench structures is adjoined by at least one of the shielding regions at the bottom of the trench structure. Each of the shielding regions is adjoined by at least one of the compensation regions at the bottom of the shielding region. |
| US11121219B2 |
Elastic strain engineering of defect doped materials
Compositions and methods related to straining defect doped materials as well as their methods of use in electrical circuits are generally described. |
| US11121218B2 |
Gate-all-around transistor structure
A semiconductor device and method of forming the same including a plurality of vertically aligned semiconductor channel layers disposed above a substrate layer, a gate stack formed on, and around the vertically aligned semiconductor channel layers and source and drain elements disposed in contact with sidewalls of the vertically aligned semiconductor channel layers. An uppermost vertically aligned semiconductor channel layer has a first thickness of semiconductor material and the remaining vertically aligned semiconductor channel layers have a second thickness of semiconductor material different from the first thickness. |
| US11121213B2 |
Fin recess last process for FinFET fabrication
A method includes forming isolation regions extending from a top surface of a semiconductor substrate into the semiconductor substrate, and forming a hard mask strip over the isolation regions and a semiconductor strip, wherein the semiconductor strip is between two neighboring ones of the isolation regions. A dummy gate strip is formed over the hard mask strip, wherein a lengthwise direction of the dummy gate strip is perpendicular to a lengthwise direction of the semiconductor strip, and wherein a portion of the dummy gate strip is aligned to a portion of the semiconductor strip. The method further includes removing the dummy gate strip, removing the hard mask strip, and recessing first portions of the isolation regions that are overlapped by the removed hard mask strip. A portion of the semiconductor strip between and contacting the removed first portions of the isolation regions forms a semiconductor fin. |
| US11121207B2 |
Integrated trench capacitor with top plate having reduced voids
A method for forming trench capacitors includes forming a silicon nitride layer over a first region of a semiconductor surface doped a first type and over a second region doped a second type. A patterned photoresist layer is directly formed on the silicon nitride layer. An etch forms a plurality of deep trenches (DTs) within the first region. A liner oxide is formed that lines the DTs. The silicon nitride layer is etched forming an opening through the silicon nitride layer that is at least as large in area as the area of an opening in the semiconductor surface of the DT below the silicon nitride layer. The liner oxide is removed, a dielectric layer(s) on a surface of the DTs is formed, a top plate material layer is deposited to fill the DTs, and the top plate material layer is removed beyond the DT to form a top plate. |
| US11121206B2 |
Integrated circuit resistor with passive breakdown protection circuit
An electrical device includes an integrated circuit having device circuitry, a passive breakdown protection circuit, and a resistor coupled to or included with the device circuitry. The resistor includes: a polysilicon layer coupled between a first terminal and a second terminal; an epitaxial layer terminal; and a buried layer terminal. The passive breakdown protection circuit is coupled between the second terminal and the epitaxial layer terminal. The passive breakdown protection circuit is also coupled between the epitaxial layer terminal and the buried layer terminal. |
| US11121205B2 |
Display panel and display panel test system
A display panel measures a contact resistance of an adhesive portion to evaluate adhesion quality of an integrated circuit mounted thereon. The display panel includes a plurality of light-emitting elements, a first pad part including a plurality of first effective pads electrically connected to the light-emitting elements, and n (n being a natural number equal to or greater than 2) first measuring pads insulated from the light-emitting elements, a conductive adhesive film on the first pad part and including a plurality of conductive balls, an integrated circuit on the conductive adhesive film, and including an internal line electrically connected to the first measuring pads by the conductive balls, and a second pad part including a plurality of second effective pads electrically connected to the first effective pads, and 2n second measuring pads electrically connected to the first measuring pads. |
| US11121202B2 |
Display apparatus
A display apparatus includes a substrate on which a first indented portion indented inward along one side of the substrate is formed; a first pad unit and a second pad unit spaced apart from each other on the substrate along the one side; a display unit above the substrate and having a shape indented inward between the first pad unit and the second pad unit; an encapsulating unit encapsulating the display unit; and a wiring film bent from a first surface of the substrate to a second surface of the substrate, the wiring film including a third pad unit and a fourth pad unit connected to the first pad unit and the second pad unit, respectively, and a second indented portion indented inward between the third pad unit and the fourth pad unit. |
| US11121193B2 |
Electronic panel and electronic apparatus including the same
An electronic panel may include a plurality of sensing electrodes and a plurality of sensing lines. The sensing lines may include a plurality of first group sensing lines and a plurality of second group sensing lines, which are spaced apart from each other in a specific direction and are alternately arranged with respect to each other. Each of the first group sensing lines and the second group sensing lines may include a first pattern layer and a second pattern layer, which are spaced apart from each other with an insulating layer interposed therebetween and are coupled to each other through the insulating layer. Each of the first group sensing lines may include a first pattern layer in a specific region, and each of the second group sensing lines may include a second pattern layer in the specific region. |
| US11121192B2 |
Display device
A display device includes a substrate including an opening area and a display area at least partially surrounding the opening area; and a metal layer including a first region and a second region adjacent to a non-display area between the opening area and the display area, the first region and the second region are spaced apart from each other, and one of the first region and the second region includes a protrusion extending toward the other of the first region and the second region, and the other of the first region and the second region has a shape to receive the protrusion. |
| US11121186B2 |
Transparent display device including a transmissive electrode and a capping structure at an emission portion and a transmission portion
Disclosed is a transparent display device which has improved transmittance and luminous uniformity according to wavelength. The transparent display device includes a capping structure. The capping structure is formed by stacking a high refractive index first capping layer having destructive interference properties and a low refractive index second capping layer. |
| US11121183B2 |
Display panel
A display panel is provided, including a display area and a plurality of pixel units disposed in the display area. Each pixel unit includes at least one red pixel, at least one green pixel, and at least one blue pixel. The red pixel includes a red optical resonant cavity, and the green pixel includes a green optical resonant cavity. The display panel is provided to eliminate a color shift caused by a difference in light changes between different color pixels. |
| US11121182B2 |
Organic photoelectric conversion element, optical area sensor, image pickup device, and image pickup apparatus
An organic photoelectric conversion element includes an electron-collecting electrode, a hole-collecting electrode, and a photoelectric conversion portion which is disposed between the electron-collecting electrode and the hole-collecting electrode. The photoelectric conversion portion includes a first organic compound layer. A second organic compound layer is disposed between the hole-collecting electrode and the photoelectric conversion portion. The first organic compound layer contains a first compound having at least a fullerene skeleton and a second compound having a fluoranthene skeleton. |
| US11121174B2 |
MRAM integration into the MOL for fast 1T1M cells
A memory cell is provided in which a bottom electrode of a magnetoresistive random access memory (MRAM) device is connected to one of the source/drain contact structures of a transistor, and a lower contact structure is connected to another of the source/drain contact structures of the transistor. In the present application, the MRAM device and the lower contact structure are present in the middle-of-the-line ((MOL) not the back-end-of-the-line (BEOL). Moreover, the bottom electrode of the MRAM device, and a lower portion of the lower contact structure are present in a same dielectric material (i.e., a MOL dielectric material). |
| US11121173B2 |
Preserving underlying dielectric layer during MRAM device formation
Techniques for preserving the underlying dielectric layer during MRAM device formation are provided. In one aspect, a method of forming an MRAM device includes: depositing a first dielectric cap layer onto a substrate over logic and memory areas of the substrate; depositing a sacrificial metal layer onto the first dielectric cap layer; patterning the sacrificial metal layer, wherein the patterned sacrificial metal layer is present over the first dielectric cap layer in at least the logic area; depositing a second dielectric cap layer onto the first dielectric cap layer; forming an MRAM stack on the second dielectric cap layer; patterning the MRAM stack using ion beam etching into at least one memory cell, wherein the patterned sacrificial metal layer protects the first dielectric cap layer in the logic area; and removing the patterned sacrificial metal layer. An MRAM device is also provided. |
| US11121170B2 |
Method for manufacturing micro array light emitting diode and lighting device
The present invention suggests a method for manufacturing a micro-array light emitting diode comprising: a step for forming a semiconductor lamination structure by stacking an n-type semiconductor layer, an active layer, and a p-type semiconductor layer on a substrate; a step for forming a plurality of p-type electrodes so as to be arranged two-dimensionally apart from each other on the p-type semiconductor layer; and a step for forming an isolation part in the p-type semiconductor layer exposed between the plurality of p-type electrodes in a self-aligning manner. |
| US11121169B2 |
Metal vertical transfer gate with high-k dielectric passivation lining
A method for manufacturing an image sensor includes, for each of a plurality of photosensitive pixels of the image sensor, forming a trench in a semiconductor substrate of the image sensor, and depositing temporary transfer gate material in and above the trench. The method further includes, after the step of depositing temporary transfer gate material, high-temperature annealing at least a portion of the semiconductor substrate. In addition, the method includes, after the step of high-temperature annealing, (a) removing the temporary transfer gate material, thereby reopening the trench, (b) depositing a passivation lining, having a high-k dielectric, in the reopened trench, and (c) depositing metal on the high-k dielectric passivation lining to form a metal vertical transfer gate in the trench and extending above the trench. |
| US11121168B2 |
Stacked grid design for improved optical performance and isolation
A back side illumination (BSI) image sensor with a dielectric grid opening having a planar lower surface is provided. A pixel sensor is arranged within a semiconductor substrate. A metallic grid is arranged over the pixel sensor and defines a sidewall of a metallic grid opening. A dielectric grid is arranged over the metallic grid and defines a sidewall of the dielectric grid opening. A capping layer is arranged over the metallic grid, and defines the planar lower surface of the dielectric grid opening. |
| US11121166B2 |
Image sensor device
An image sensor device is provided. The image sensor device includes a semiconductor substrate including a front surface, a back surface opposite to the front surface, and a light-sensing region extending from the front surface into the semiconductor substrate. The image sensor device includes a light-blocking structure in the semiconductor substrate and surrounding the light-sensing region. The light-blocking structure includes a conductive light reflection structure and a light absorption structure, and the light absorption structure is between the conductive light reflection structure and the back surface. The image sensor device includes an insulating layer between the light-blocking structure and the semiconductor substrate. |
| US11121164B2 |
Semiconductor device and method for production of semiconductor device
A semiconductor device with a connection pad in a substrate, the connection pad having an exposed surface made of a metallic material that diffuses less readily into a dielectric layer than does a metal of a wiring layer connected thereto. |
| US11121163B2 |
Image sensor
An image sensor includes a semiconductor substrate of first conductivity type having first and second surfaces and including pixel regions, photoelectric conversion regions of second conductivity type respectively provided in the pixel regions, and a pixel isolation structure disposed in the semiconductor substrate to define the pixel regions and surrounding each of the photoelectric conversion regions. The pixel isolation structure includes a semiconductor pattern extending from the first surface to the second surface of the semiconductor substrate, a sidewall insulating pattern between a sidewall of the semiconductor pattern and the semiconductor substrate, and a dopant region in at least a portion of the semiconductor pattern. |
| US11121162B2 |
Light pipe structure with high quantum efficiency
Various embodiments of the present disclosure are directed towards an image sensor including a light pipe structure. A photodetector disposed within a semiconductor substrate. A gate electrode is over the semiconductor substrate and borders the photodetector. An inter-level dielectric (ILD) layer overlies the semiconductor substrate. A conductive contact is disposed within the ILD layer such that a bottom surface of the conductive contact is below a top surface of the gate electrode. The light pipe structure overlies the photodetector such that a bottom surface of the light pipe structure is recessed below a top surface of the conductive contact. |
| US11121161B2 |
Solid-state imaging sensor
The present technology relates to a solid state imaging sensor that is possible to suppress the reflection of incident light with a wide wavelength band. A reflectance adjusting layer is provided on the substrate in an incident direction of the incident light with respect to the substrate such as Si and configured to adjust reflection of the incident light on the substrate. The reflectance adjusting layer includes a first layer formed on the substrate and a second layer formed on the first layer. The first layer includes a concavo-convex structure provided on the substrate and a material which is filled into a concave portion of the concavo-convex structure and has a refractive index lower than that of the substrate, and the second layer includes a material having a refractive index lower than that of the first layer. It is possible to reduce the reflection on the substrate such as Si by using the principle of the interference of the thin film. Such a technology can be applied to solid state imaging sensors. |
| US11121160B2 |
Photoelectric conversion apparatus and equipment comprising a light shielding part in a light receiving region and a light shielding film in a light shielded region
Photoelectric conversion apparatus includes semiconductor layer having photoelectric converters in light-receiving region and photoelectric converters in light-shielded region, light-shielding part arranged above the semiconductor layer in the light-receiving region to surround light paths of the photoelectric converters in the light-receiving region, and light-shielding film arranged above the semiconductor layer in the light-shielded region to cover the photoelectric converters in the light-shielded region. The light-shielding part includes lower and upper ends. The light-shielding film includes lower and upper surfaces. Distance between the upper end and the semiconductor layer is larger than that between the upper surface and the semiconductor layer. Distance between the lower end and the semiconductor layer is smaller than that between the upper surface and the semiconductor layer and is larger than that between the lower surface and the semiconductor layer. |
| US11121159B2 |
Pixel structure of image sensor having dielectric layer surrounding photo conversion layer and color filter
A photo diode includes a pixel unit, a photo conversion layer, and a dielectric layer. The pixel unit includes a pair of pixels. The photo conversion layer is above the pixel unit and has a pair of portions, each of which corresponds to a respective one of the pixels. The dielectric layer is between the portions of the photo conversion layer. A method of manufacturing the photo diode is also disclosed. |
| US11121158B2 |
Solid-state image pickup apparatus and electronic equipment
The present technology relates to a solid-state image pickup apparatus and electronic equipment that makes it possible to suppress read noise. A solid-state image pickup apparatus according to a first aspect of the present technology includes a photoelectric conversion section that generates and holds a charge in response to incident light, a transfer section that includes a V-NW transistor (Vertical Nano Wire transistor) and transfers the charge held in the photoelectric conversion section, and an accumulation section that includes a wiring layer connected to a drain of the transfer section including the V-NW transistor and accumulates the charge transferred by the transfer section. The present technology is applicable to a CMOS image sensor, for example. |
| US11121157B2 |
Image sensors
Image sensors are provided. The image sensors may include a substrate including first, second, third and fourth regions, a first photoelectric conversion element in the first region, a second photoelectric conversion element in the second region, a third photoelectric conversion element in the third region, a fourth photoelectric conversion element in the fourth region, a first microlens at least partially overlapping both the first and second photoelectric conversion elements, and a second microlens at least partially overlapping both the third and fourth photoelectric conversion elements. The image sensors may also include a floating diffusion region and first, second and third pixel transistors configured to perform different functions from each other. Each of the first, second and third pixel transistors may be disposed in at least one of first, second, third and fourth pixel regions. The first pixel transistor may include multiple first pixel transistors. |
| US11121152B2 |
Three-dimensional memory device and manufacturing method thereof
A three-dimensional (3D) memory device and a manufacturing method thereof are provided. The method includes the following steps. An alternating dielectric stack is formed on a substrate. An opening is formed penetrating the alternating dielectric stack in a thickness direction of the substrate. A blocking layer is formed on a sidewall of the opening. A trapping layer is formed in the opening, and the trapping layer is formed on the blocking layer. The trapping layer includes a lower portion and an upper portion disposed above the lower portion. A thickness of the upper portion in a horizontal direction is greater than a thickness of the lower portion in the horizontal direction. The thickness distribution of the trapping layer is modified for improving the electrical performance of the 3D memory device. |
| US11121149B2 |
Three-dimensional memory device containing direct contact drain-select-level semiconductor channel portions and methods of making the same
An alternating stack of insulating layers and word-line-level spacer material layers is formed over a substrate. Memory opening fill structures including a respective memory film, a respective word-line-level semiconductor channel portion, a respective word-line-level dielectric core laterally, and a respective sacrificial dielectric material portion are formed through the alternating stack. Drain-select-level material layers are formed over the alternating stack and the memory opening fill structures. Drain-select-level openings are formed through the drain-select-level material layers and over the memory opening fill structures. The sacrificial dielectric material portions are removed selective to the word-line-level semiconductor channel portions underneath the drain-select-level openings. Drain-select-level semiconductor channel portions are formed directly on a respective one of the word-line-level semiconductor channel portions. |
| US11121145B1 |
Memory arrays comprising strings of memory cells and methods used in forming a memory array comprising strings of memory cells
A memory array comprising strings of memory cells comprises a conductor tier comprising conductor material. The memory array comprises laterally-spaced memory blocks individually comprising a vertical stack comprising alternating insulative tiers and conductive tiers directly above the conductor tier. Conducting material of a lowest of the conductive tiers is directly against the conductor material of the conductor tier. Channel-material strings of memory cells extend through the insulative tiers and the conductive tiers. Intervening material is laterally-between and longitudinally-along immediately-laterally-adjacent of the memory blocks. The conducting material in the lowest conductive tier is directly against the channel material of individual of the channel-material strings. Conductive material is of different composition from that of the conducting material above and directly against the conducting material. Other embodiments, including method, are disclosed. |
| US11121144B2 |
Memory arrays and methods used in forming a memory array comprising strings of memory cells
A method used in forming a memory array comprises forming a stack comprising vertically-alternating first tiers and second tiers. First insulator material is above the stack. The first insulator material comprises at least one of (a) and (b), where (a): silicon, nitrogen, and one or more of carbon, oxygen, boron, and phosphorus, and (b): silicon carbide. Channel-material strings are in and upwardly project from an uppermost material that is directly above the stack. Conducting material is directly against laterally-inner sides of individual of the upwardly-projecting channel-material strings and project upwardly from the individual upwardly-projecting channel-material strings. A ring comprising insulating material is formed individually circumferentially about the upwardly-projecting conducting material. Second insulator material is formed above the first insulator material, the ring, and the upwardly-projecting conducting material. The first and second insulator materials comprise different compositions relative one another. Conductive vias are formed in the second insulator material that are individually directly electrically coupled to the individual channel-material strings through the upwardly-projecting conducting material. Other embodiments, including structure, are disclosed. |
| US11121140B2 |
Ferroelectric tunnel junction memory device with integrated ovonic threshold switches
A ferroelectric tunnel junction memory device includes a bit line, a word line and a memory cell located between the bit line and the word line. The memory cell includes a ferroelectric tunneling dielectric portion and an ovonic threshold switch material portion. |
| US11121139B2 |
Hafnium oxide and zirconium oxide based ferroelectric devices with textured iridium bottom electrodes
A method of forming a ferroelectric/anti-ferroelectric (FE/AFE) dielectric layer is provided. The method includes forming a metal electrode layer on a substrate, wherein the metal electrode layer has an exposed surface with at least 80% {111} crystal face, and forming an FE/AFE dielectric layer on the exposed surface of the metal electrode layer, wherein the FE/AFE dielectric layer is a group 4 transition metal oxide. |
| US11121138B1 |
Low resistance pickup cells for SRAM
A semiconductor device includes a transistor and a memory pickup cell formed over a well in a substrate. The transistor includes a first fin having a first width and two first source/drain features on the first fin. The pickup cell includes a second fin having a second width and two second source/drain features on the second fin. The well, the first fin, the second fin, and the second source/drain feature are of a first conductivity type. The first source/drain features are of a second conductivity type opposite to the first conductivity type. The second width is at least three times of the first width. The pickup cell further includes a stack of semiconductor layers over the second fin and connecting the two second source/drain features. |
| US11121131B2 |
Semiconductor device and method of manufacturing the same
Disclosed are semiconductor devices and methods of manufacturing the same. The semiconductor device comprises a first transistor on a substrate, and a second transistor on the substrate. Each of the first and second transistors includes a plurality of semiconductor patterns vertically stacked on the substrate and vertically spaced apart from each other, and a gate dielectric pattern and a work function pattern filling a space between the semiconductor patterns. The work function pattern of the first transistor includes a first work function metal layer, the work function pattern of the second transistor includes the first work function metal layer and a second work function metal layer, the first work function metal layer of each of the first and second transistors has a work function greater than that of the second work function metal layer, and the first transistor has a threshold voltage less than that of the second transistor. |
| US11121129B2 |
Semiconductor device
Provided is a semiconductor device including a substrate, a gate structure, a first metal layer, and a gate via. The substrate has at least three semiconductor fins to define an active region. The gate structure is across the at least three semiconductor fins and extends along a first direction. The first metal layer extends along a second direction and is disposed over the gate structure. The gate via is disposed between the gate structure and the first metal layer. The gate via has a longitudinal axis extending along the first direction and across the first metal layer. A length of the longitudinal axis of the gate via is greater than a width of the first metal layer. |
| US11121124B2 |
Display device with a plurality of separately operable pixels formed in a grid
A display device is disclosed. In an embodiment a display device having a plurality of pixels separately operable from each other includes a semiconductor layer sequence including a first semiconductor layer, an active layer and a second semiconductor layer, a first contact structure contacting the first semiconductor layer and a second contact structure contacting the second semiconductor layer and at least one separating region extending through the first contact structure, the first semiconductor layer and the active layer into the second semiconductor layer, wherein the semiconductor layer sequence and the first contact structure have at least one first recess laterally adjacent with respect to a respective pixel, the first recess extending through the first contact structure, the first semiconductor layer and the active layer into the second semiconductor layer, and wherein the second contact structure includes second contacts extending through the at least one first recess. |
| US11121123B2 |
Semiconductor composite device and package board used therein
A semiconductor composite device is provided that includes a voltage regulator, a package board, and a load, and converts an input DC voltage into a different DC voltage to supply the converted DC voltage to the load. The VR includes a semiconductor active element. The package board includes a C layer in which a capacitor is formed, and an L layer in which an inductor is formed. A plurality of through holes penetrate the C layer and the L layer in a direction perpendicular to the mounting face in the package board. The capacitor is connected to the load through the through hole. The inductor is connected to the load through the through hole and to the VR through the through hole. |
| US11121122B2 |
Flexible light-emitting diode lighting strip with interposer
A method for producing a flexible lighting strip comprising multitude of functional elements, which are light-emitting diodes, comprise light-emitting diodes, or are interposers with light-emitting diodes. The functional elements are in at least two groups, each comprising at least two functional elements in electrical series connection. The groups are in an electrical circuit having at least an anode and a cathode track as outer lines. The functional elements are in an electrical parallel connection to the anode and cathode tracks. The groups are in a longitudinal arrangement so a first group's last functional element is next to a second group's first functional element. Each of the outer lines has a wire line having substantially circular wires that are bent building zones capable of receiving compressive and tensile stress. The electrical circuit provides a third wire line having a substantially circular wire as a center line arranged between the outer lines. |
| US11121121B2 |
3D semiconductor device and structure
A 3D semiconductor device, the device including: a first level; a second level; and a third level, where the first level includes single crystal silicon and a plurality of logic circuits, where the plurality of logic circuits includes a first logic circuit and a second logic circuit, where the second level is disposed directly above the first level and includes a first plurality of arrays of memory cells, where the third level is disposed directly above the second level and includes a plurality of on-chip RF circuits, and where a portion of interconnections between the first logic circuit and the second logic circuit includes the plurality of on-chip RF circuits. |
| US11121120B2 |
Method and system for electronic devices with polycrystalline substrate structure interposer
An interposer includes a polycrystalline ceramic core disposed between a first surface and a second surface of the interposer, an adhesion layer encapsulating the polycrystalline ceramic core, a barrier layer encapsulating the adhesion layer, and one or more electrically conductive vias extending from the first surface to the second surface through the polycrystalline ceramic core, the adhesion layer, and the barrier layer. |
| US11121119B2 |
Semiconductor package
The present disclosure provides a semiconductor package including a substrate, a display unit, a flexible substrate, a driving circuit, and a memory. The substrate has a first surface and a second surface opposite to each other, and the first surface has a display region and a bonding region. The display unit is disposed on the display region of the first surface. The flexible substrate is disposed below the second surface and has a connection portion extended to the bonding region of the first surface. The driving circuit is disposed on the flexible substrate and electrically connects with the display unit. The memory is disposed on the flexible substrate and electrically connects with the driving circuit. |
| US11121112B2 |
Solid-state image pickup element with dam to control resin outflow
The present technology relates to a solid-state image pickup element, electronic equipment, and a semiconductor apparatus that make it possible to reduce a surface reflection in an area in which a slit is formed and improve flare characteristics. A solid-state image pickup element includes a pixel area in which a plurality of pixels is two-dimensionally arranged in a matrix, a chip mounting area in which a chip is flip-chip mounted, and a dam area that is arranged around the chip mounting area and in which one or more slits that block an outflow of a resin are formed. In the dam area, the same OCL as that in the pixel area is formed. The present technology can be applied to a solid-state image pickup element etc. in which a chip is flip-chip mounted, for example. |
| US11121109B2 |
Innovative interconnect design for package architecture to improve latency
An integrated circuit includes a package substrate that includes first and second electrical traces. The integrated circuit includes first, second, third, and fourth configurable dies, which are mounted on the package substrate. The first and second configurable dies are arranged in a first row. The third and fourth configurable dies are arranged in a second row, which is approximately parallel to the first row. The first and third configurable dies are arranged in a first column. The second and fourth configurable dies are arranged in a second column, which is approximately parallel to the first column. The first electrical trace couples the first and third configurable dies, and the second electrical trace couples the second and third configurable dies. The second electrical trace is oblique with respect to the first electrical trace. The oblique trace improves the latency of signals transmitted between dies and thereby increases the circuit operating speed. |
| US11121107B2 |
Interconnect substrate having columnar electrodes
An interconnect substrate includes a substrate, and a first connection terminal and a second connection terminal that are disposed on a surface of the substrate, wherein the first connection terminal includes a first columnar electrode and a first bump disposed on the first columnar electrode, the first columnar electrode having a flat or convex surface and having a first diameter, wherein the second connection terminal includes a second columnar electrode and a second bump disposed on the second columnar electrode, the second columnar electrode having a concave surface and having a second diameter larger than the first diameter, and wherein a melting point of the first bump and the second bump is lower than a melting point of the first columnar electrode and the second columnar electrode. |
| US11121100B2 |
Trap layer substrate stacking technique to improve performance for RF devices
Some embodiments of the present disclosure are directed to a device. The device includes a substrate comprising a silicon layer disposed over an insulating layer. The substrate includes a transistor device region and a radio-frequency (RF) region. An interconnect structure is disposed over the substrate and includes a plurality of metal layers disposed within a dielectric structure. A handle substrate is disposed over an upper surface of the interconnect structure. A trapping layer separates the interconnect structure and the handle substrate. |
| US11121098B2 |
Trap layer substrate stacking technique to improve performance for RF devices
Some embodiments of the present disclosure are directed to a device. The device includes a substrate comprising a silicon layer disposed over an insulating layer. The substrate includes a transistor device region and a radio-frequency (RF) region. An interconnect structure is disposed over the substrate and includes a plurality of metal layers disposed within a dielectric structure. A handle substrate is disposed over an upper surface of the interconnect structure. A trapping layer separates the interconnect structure and the handle substrate. |
| US11121092B2 |
Marking pattern in forming staircase structure of three-dimensional memory device
Embodiments of a marking pattern in forming the staircase structure of a three-dimensional (3D) memory device are provided. In an example, a semiconductor device includes a stack structure having a plurality of insulating layers and a plurality of conductor layers arranged alternatingly over a substrate along a vertical direction. In some embodiments, the semiconductor device also includes a marking pattern having a plurality of interleaved layers of different materials over the substrate and neighboring the stack structure. The marking pattern includes a central marking structure located in a marking area, the central marking structure dividing the marking area into a first marking sub-area farther from the stack structure and a second marking sub-area closer to the stack structure, a first pattern density of the first marking sub-area being higher than or equal to a second pattern density of the second marking sub-area. |
| US11121090B2 |
Fan-out semiconductor package
This invention provides a fan-out semiconductor package, the fan-out semiconductor package includes a frame including one or more insulating layers and having a penetration portion, a semiconductor chip disposed in the penetration portion of the frame and having a connection pad, a connection structure disposed on a lower side of the frame and the semiconductor chip and including a redistribution layer, a first encapsulant covering a back surface of the semiconductor chip and a first region of a top surface of an uppermost insulating layer among the one or more insulating layers of the frame and extending between a sidewall of the penetration portion and a side surface of the semiconductor chip, and a second encapsulant covering a second region of the top surface of the uppermost insulating layer among the one or more insulating layers of the frame and being in contact with a side surface of the first encapsulant on the frame. |
| US11121088B2 |
Semiconductor package structure and method of manufacturing the same
A method of manufacturing a semiconductor package structure is provided. The method includes providing a first carrier, forming a patterned buffer layer over the first carrier, forming a first redistribution structure that includes forming a first dielectric layer on the patterned buffer layer, after an electrical testing by applying an electric signal towards the first redistribution structure, removing the first carrier, removing portions of the first dielectric layer, resulting in a patterned first dielectric layer, the patterned first dielectric layer exposing portions of the first circuit layer, removing the exposed portions of the first circuit layer, using the patterned first dielectric layer as a mask, resulting in a patterned first circuit layer, and forming an electric conductor in a recess defined by the patterned first dielectric layer and the patterned first circuit layer. |
| US11121087B2 |
Methods of forming a conductive contact structure to an embedded memory device on an IC product and a corresponding IC product
One illustrative device disclosed herein includes a layer of insulating material having an upper surface positioned at a first level and a recessed conductive interconnect structure positioned at least partially within the layer of insulating material, wherein the recessed conductive interconnect structure has a recessed upper surface that is positioned at a second level that is below the first level. In this example, the device also includes a recess defined in the recessed conductive interconnect structure, a memory cell positioned above the recessed conductive interconnect structure and a conductive via plug that is conductively coupled to the recessed conductive interconnect structure and a lower conductive material of the memory cell, wherein at least a portion of the conductive via plug is positioned in the recess defined in the recessed conductive interconnect. |
| US11121083B2 |
Semiconductor device with fuse-detecting structure
A semiconductor device includes a substrate; an insulating layer positioned above the substrate, wherein the insulating layer has two ends; a first doped region formed in the substrate and positioned at one end of the two ends of the insulating layer; a second doped region formed in the substrate and positioned at the other end of the two ends of the insulating layer, wherein the second doped region is opposite to the first doped region; a control terminal positioned above the insulating layer; a first fuse head positioned above the control terminal and electrically coupled to the first doped region; a second fuse head positioned above the first fuse head; and a fuse area positioned between the first fuse head and the second fuse head. |
| US11121081B2 |
Antifuse element
An antifuse element includes a conductive region formed in a semiconductor substrate extending in a first direction, a dielectric layer formed on a portion of the conductive region, a first conductive plug formed on the dielectric layer, a second conductive plug formed on another portion of the conductive region, a first conductive member formed over the first conductive plug, and a second conductive member formed over the second conductive plug. The dielectric layer has a first dielectric portion extending in a second direction, and a second dielectric portion extending in the first direction, in which the dielectric layer implements an electrical isolation between the conductive region and the first conductive plug. The first conductive plug has a first region of a first width and a second region of a second width, and the first width is greater than the second width. |
| US11121079B2 |
Fan-out semiconductor package
A fan-out semiconductor package includes a first connection structure having first and second surfaces, a first semiconductor chip disposed on the first surface, a first encapsulant disposed on the first surface and covering at least a portion of the first semiconductor chip, a second semiconductor chip disposed on the second surface, one or more first metal members disposed on the second surface, one or more second metal members disposed on the second surface, a second encapsulant disposed on the second surface and respectively covering at least portions of the second semiconductor chip and the first and second metal members, and a second connection structure disposed on an opposite side of a side of the second encapsulant, on which the first connection structure is disposed. |
| US11121076B2 |
Semiconductor die with conversion coating
A die includes a semiconductor layer, an electrical contact on a first side of the semiconductor layer, a backside electrical contact layer on second side of the semiconductor layer. The die further includes a zinc layer over at least one of the electrical contact or the backside electrical contact layer of the die, and a conversion coating over the zinc layer. The conversion coating includes at least one of zirconium and vanadium. As part of an embedded die package including the die, at least a portion of the conversion coating may adjacent to an electrically insulating substrate of the embedded die package. |
| US11121075B2 |
Hybrid metallization interconnects for power distribution and signaling
Aspects of the disclosure are directed to an integrated circuit. The integrated circuit may include a signaling interconnect having a narrow trench disposed within a metallization layer, and a power rail having a wide trench disposed within the metallization layer, wherein the signaling interconnect comprises non-copper material and the power rail comprises copper. The non-copper material may include at least one of ruthenium (Ru), tungsten (W), aluminum (Al), and cobalt (Co). The signaling interconnect and power rail may be processed in a common chemical mechanical polishing step and have approximately the same trench depth. A metal cap may be deposited on top of the power rail. |
| US11121060B2 |
Electronics assemblies and cooling structures having metalized exterior surface
An electronics assembly includes a semiconductor device having a first device surface and at least one device conductive layer disposed directly thereon. A cooling structure coupled to the semiconductor device includes a manifold layer, a microchannel layer bonded to the manifold layer, at least one planar side cooling structure, and one or more cooling structure conductive layers. The manifold layer includes a fluid inlet and a fluid outlet and defines a first cooling structure surface. The microchannel layer comprises at least one microchannel fluidly coupled to the fluid inlet and the fluid outlet and defines a second cooling structure surface opposite from the first cooling structure surface. The planar side cooling structure surface is transverse to the first and the second cooling structure surfaces. The cooling structure conductive layers are disposed directly on the first cooling structure surface, the second cooling structure surface, and the planar side cooling structure surface. |
| US11121056B2 |
Semiconductor device and manufacturing method of the same
A semiconductor device includes a semiconductive substrate, a dielectric stack disposed over the semiconductive substrate, a probe pad formed on the dielectric stack, a test key embedded in the semiconductor device and a single via string stacking extending along a direction from a level of the probe pad to the semiconductive substrate and electrically connecting the periphery of the probe pad to the test key. A semiconductor device includes a semiconductive substrate, a dielectric stack, a probe pad, a test key, an extension segment electrically connected to the periphery of the probe pad and laterally extending from the probe pad from a top view, and a single via string stacking extending along a direction from the probe pad to the semiconductive substrate and electrically connecting the extension segment to the test key. The single via string stacking and the probe pad are laterally offset from a top view. |
| US11121055B2 |
Leadframe spacer for double-sided power module
A semiconductor device module may include a leadframe spacer that provides the functions of both a leadframe and a spacer, while enabling a double-sided cooling configuration. Such a leadframe spacer may include a leadframe surface that provides a die attach pad (DAP) that is shared by at least two semiconductor devices. The leadframe spacer may include at least one downset, where the semiconductor devices may be attached within a recess defined by the at least one downset. A first substrate may be connected to a first side of the leadframe. A second substrate may be connected to downset surfaces of the at least one downset, and positioned for further connection to the semiconductor devices in a double-sided assembly. |
| US11121052B2 |
Integrated fan-out device, 3D-IC system, and method
A three dimensional integrated circuit (3D-IC) module socket system includes an integrated Fan-Out (InFO) adapter having one or more integrated passive devices (IPDs) embedded in the InFO adapter. The InFO adapter is also integrated into the 3D-IC module socket system by stacking the InFO adapter between a socket and a SoW package. The InFO adapter with embedded IPDs allows for more planar area of the SoW package to be available for interfacing the socket and provides a short distance between the embedded IPDs and computing dies of the SoW package which enhances a power distribution network (PDN) performance and improves current handling of the 3D-IC module socket system. |
| US11121050B2 |
Method of manufacture of a semiconductor device
In order to prevent cracks from occurring at the corners of semiconductor dies after the semiconductor dies have been bonded to other substrates, an opening is formed adjacent to the corners of the semiconductor dies, and the openings are filled and overfilled with a buffer material that has physical properties that are between the physical properties of the semiconductor die and an underfill material that is placed adjacent to the buffer material. |
| US11121048B1 |
System and method for a device package
A packaged power device includes a ceramic package body having a top drain pad having a first area, a top source pad having a second area smaller than the first area, and a top gate pad having a third area smaller than the second area; a power device having a bottom surface affixed to a top drain pad, a die source pad coupled to the top source pad, and a die gate pad coupled to the top gate pad; and a ceramic lid affixed to the ceramic package body to form the packaged power device. |
| US11121047B2 |
Semiconductor structure
A semiconductor structure includes a substrate, a device, a contact via, a metal/dielectric layer, and a test structure. The device is over the substrate. The contact via is connected to the device. The metal/dielectric layer is over the contact via. The metal/dielectric layer includes a first portion and a second portion. The first portion of the metal/dielectric layer has a metallization pattern connected to the contact via. The second portion of the metal/dielectric layer is void of metal. The test structure is over the second portion of the metal/dielectric layer. |
| US11121044B2 |
Vertically stacked nanosheet CMOS transistor
Embodiments of the present invention are directed to techniques for generating vertically stacked nanosheet CMOS (Complementary Metal Oxide Semiconductor) transistor architectures. In a non-limiting embodiment of the invention, a first rare earth oxide layer is formed over a substrate. An n-FET nanosheet stack is formed on the rare earth oxide layer. The n-FET nanosheet stack includes a first nanosheet. A second rare earth oxide layer is formed on the n-FET nanosheet stack. A p-FET nanosheet stack is formed on the second rare earth oxide layer. The p-FET nanosheet stack includes a second nanosheet. |
| US11121041B2 |
Methods for threshold voltage tuning and structure formed thereby
Generally, the present disclosure provides example embodiments relating to tuning threshold voltages in transistor devices and the transistor devices formed thereby. Various examples implementing various mechanisms for tuning threshold voltages are described. In an example method, a gate dielectric layer is deposited over an active area in a device region of a substrate. A dipole layer is deposited over the gate dielectric layer in the device region. A dipole dopant species is diffused from the dipole layer into the gate dielectric layer in the device region. |
| US11121035B2 |
Semiconductor substrate processing methods
Implementations of a method of forming a plurality of semiconductor devices on a semiconductor substrate may include: providing a semiconductor substrate having a first surface, a second surface, a size, and a thickness where the second surface opposes the first surface and the thickness is between the first surface and the second surface. The method may include processing the semiconductor substrate through a plurality of semiconductor device fabrication processes to form a plurality of semiconductor devices on the first surface. The thickness may be between 100 microns and 575 microns and the size may be 150 mm. The semiconductor substrate may not be coupled with a carrier or support. |
| US11121031B2 |
Manufacturing method of chip package and chip package
A manufacturing method of a chip package includes patterning a wafer to form a scribe trench, in which a light-transmissive function layer below the wafer is in the scribe trench, the light-transmissive function layer is between the wafer and a carrier, and a first included angle is formed between an outer wall surface and a surface of the wafer facing the light-transmissive function layer; cutting the light-transmissive function layer and the carrier along the scribe trench to form a chip package that includes a chip, the light-transmissive function layer, and the carrier; and patterning the chip to form an opening, in which the light-transmissive function layer is in the opening, a second included angle is formed between an inner wall surface of the chip and a surface of the chip facing the light-transmissive function layer, and is different from the first included angle. |
| US11121030B2 |
Transistors employing carbon-based etch stop layer for preserving source/drain material during contact trench etch
Techniques are disclosed for forming transistors employing a carbon-based etch stop layer (ESL) for preserving source and drain (S/D) material during contact trench etch processing. As can be understood based on this disclosure, carbon-based layers can provide increased resistance for etch processing, such that employing a carbon-based ESL on S/D material can preserve that S/D material during contact trench etch processing. This is due to carbon-based layers being able to provide more robust (e.g., more selective) etch selectivity during contact trench etch processing than the S/D material it is preserving (e.g., Si, SiGe, Ge, group III-V semiconductor material) and other etch stop layers (e.g., insulator material-based etch stop layers). Employing a carbon-based ESL enables a given S/D region to protrude from shallow trench isolation (STI) material prior to contact metal deposition, thereby providing more surface area for making contact to the given S/D region, which improves transistor performance. |
| US11121029B2 |
Semiconductor device with air spacer and method for preparing the same
The present disclosure provides a semiconductor device and a method for preparing the semiconductor device. The method includes forming a first conductive layer over a substrate, forming a first dielectric structure over the first conductive layer, transforming a sidewall portion of the first conductive layer into a first transformed portion, removing the first transformed portion such that a width of the first dielectric structure is greater than a width of a remaining portion of the first conductive layer, and forming an inter-layer dielectric (ILD) layer covering sidewalls of the first dielectric structure such that a first air spacer is formed between the ILD layer and the remaining portion of the first conductive layer. |
| US11121024B2 |
Tunable hardmask for overlayer metrology contrast
A tunable amorphous silicon layer for use with multilayer patterning stacks can be used to maximize transparency and minimize reflections so as to improve overlay metrology contrast. By increasing the hydrogen content in the amorphous silicon layer, the extinction coefficient (k) value and the refractive index (n) value can be decreased to desired values. Methods for improving overlay metrology contrast with the tunable amorphous silicon layer are disclosed. |
| US11121021B2 |
3D semiconductor device and structure
A 3D semiconductor device, including: a first level including a single crystal layer, a plurality of first transistors, and a first metal layer, forming memory control circuits; a second level overlaying the single crystal layer, and including a plurality of second transistors and a plurality of first memory cells; a third level overlaying the second level, and including a plurality of third transistors and a plurality of second memory cells; where the second transistors are aligned to the first transistors with less than 40 nm alignment error, where the memory cells include a NAND non-volatile memory type, where some of the memory control circuits can control at least one of the memory cells, and where some of the memory control circuits are designed to perform a verify read after a write pulse so to detect if the at least one of the memory cells has been successfully written. |
| US11121020B2 |
Support, adhesive sheet, laminated structure, semiconductor device, and method for manufacturing printed wiring board
A method for manufacturing a printed wiring board which includes: Step (A) of laminating an adhesive sheet including a support and a resin composition layer bonded to the support to an inner layer board so that the resin composition layer is bonded to the inner layer board; Step (B) of thermally curing the resin composition layer to form an insulating layer; and Step (C) of removing the support, in this order, in which the support satisfies a condition (MD1): a maximum expansion coefficient EMD in an MD direction at 120° C. or more is less than 0.2% and a condition (TD1): a maximum expansion coefficient ETD in a TD direction at 120° C. or more is less than 0.2% below, when being heated under predetermined heating conditions, does not lower the yield even when the insulating layer is formed by thermally curing the resin composition layer with a support attached to the resin composition layer. |
| US11121018B2 |
Method and apparatus for lithography in semiconductor fabrication
A reticle holding tool is provided. The reticle holding tool includes a housing, a reticle chuck, and a gas delivery assembly. The housing includes an opening, a top housing member, and a lateral housing member extending from the top housing member and terminating at a lower edge which is located on a predetermined plane. The reticle chuck is positioned in the housing and has an effective surface configured to secure a reticle. The effective surface is located between the predetermined plane and the top housing member. The reticle chuck is movable between two boundary lines that are perpendicular to the effective surface. A width of the opening is greater than a distance between the two boundary lines. The gas delivery assembly is positioned within the housing and configured to supply gas into the housing. |
| US11121012B2 |
Substrate cleaning apparatus and cleaning method using the same
A substrate cleaning method includes: sequentially loading each of a plurality of substrates, one substrate substantially immediately after a preceding substrate, into an input unit, in which adjacent substrates of the plurality of substrates are spaced apart from each other by a predetermined first interval; sequentially transferring each of the plurality of substrates in which adjacent substrates of the plurality of substrates are separated by a predetermined second interval that is greater than the predetermined first interval; cleaning each of the plurality of substrates in a cleaning unit; and aligning, in an output unit, adjacent substrates to be separated by the predetermined first interval. |
| US11121007B2 |
Apparatus for supplying chemical liquid
An apparatus for supplying chemical liquid may include a chemical liquid discharging member, a reservoir, a chemical liquid supplying member and a chemical liquid circulating member. The chemical liquid discharging member may discharge a chemical liquid onto a substrate. The reservoir may store the chemical liquid supplied to the chemical liquid discharging member. The chemical liquid supplying member may supply the chemical liquid stored in the reservoir. The chemical liquid circulating member may circulate the chemical liquid from the chemical liquid discharging member to the reservoir. |
| US11121004B2 |
Semiconductor module and method for producing the same
A method for producing a power semiconductor module arrangement includes forming a pre-layer by depositing inorganic filler on a first surface within a housing, the inorganic filler being impermeable to corrosive gases. The method further includes filling casting material into the housing to fill spaces present in the inorganic filler of the pre-layer with the casting material, and hardening the casting material to form a first layer. |
| US11121002B2 |
Systems and methods for etching metals and metal derivatives
Exemplary etching methods may include flowing a halogen-containing precursor into a substrate processing region of a semiconductor processing chamber. The methods may include contacting a substrate housed in the substrate processing region with the halogen-containing precursor. The substrate may define an exposed region of a transition-metal-containing material. The methods may also include removing the transition-metal-containing material. The flowing and the contacting may be plasma-free operations. |
| US11121001B2 |
Method of etching, device manufacturing method, and plasma processing apparatus
In a disclosed method, etching a film by using plasma of a first processing gas and etching the film by using plasma of a second processing gas are alternately repeated. The first processing gas and the second processing gas each include a fluorocarbon gas. In etching the film by using the plasma of the first processing gas and etching the film by using the plasma of the second processing gas, radio frequency power is used to attract ions to the substrate. The first processing gas further includes an additive gas that is a source for nitrogen or sulfur and fluorine. In the first processing gas, the flow rate of the additive gas is smaller than the flow rate of the fluorocarbon gas. |
| US11121000B2 |
Etching method and substrate processing apparatus
There is provision of a method for etching a substrate above which a first underlying film, a second underlying film positioned deeper than the first underlying film, a silicon oxide film formed on the first and second underlying films, and a mask on the silicon oxide film are provided. In the mask, first and second openings are formed above the first and second underlying films respectively. After the first underlying film is exposed by etching the silicon oxide film using a first gas, the silicon oxide film is etched by using a second gas while depositing deposits on the first underlying film, and the silicon oxide film is etched by using a third gas while removing the deposits on the first underlying film. The etching using the second gas and the etching using the third gas are repeated multiple times. |
| US11120993B2 |
Diffusing agent composition and method of manufacturing semiconductor substrate
A diffusing agent composition that can form a coating film in which the unevenness thereof is lowered, which is uniform and which has excellent stability, and a method of manufacturing a semiconductor substrate in which an impurity diffusing component is diffused into the semiconductor substrate from the coating film formed of the diffusing agent composition. An aliphatic amine which satisfies predetermined conditions is contained as an aliphatic amine compound in a diffusing agent composition including an impurity diffusing component. When the number of primary amino groups included in the amine compound is NA, the number of secondary amino groups included in the compound is NB, and the number of tertiary amino groups included in the amine compound is NC, NA, NB and NC satisfy predetermined formulas. |
| US11120991B2 |
Lateral semiconductor nanotube with hexagonal shape
A method of forming a semiconductor structure includes forming one or more fins disposed on a substrate, rounding surfaces of the one or more fins, forming faceted sidewalk from the rounded surfaces of the one or more fins, and forming a lateral semiconductor nanotube shell on the faceted sidewalk. The lateral semiconductor nanotube shell comprises a hexagonal shape. |
| US11120989B2 |
Systems and methods for UV-based suppression of plasma instability
A substrate is positioned in exposure to a plasma generation region within a plasma processing chamber. A first plasma is generated within the plasma generation region. The first plasma is configured to cause deposition of a film on the substrate until the film deposited on the substrate reaches a threshold film thickness. The substrate is then exposed to ultraviolet radiation to resolve defects within the film deposited on the substrate. The ultraviolet radiation can be supplied in-situ using either a second plasma configured to generate ultraviolet radiation or an ultraviolet irradiation device disposed in exposure to the plasma generation region. The ultraviolet radiation can also be supplied ex-situ by moving the substrate to an ultraviolet irradiation device separate from the plasma processing chamber. The substrate can be exposed to the ultraviolet radiation in a repeated manner to resolve defects within the deposited film as the film thickness increases. |
| US11120987B2 |
Nonstoichiometric structures with multiple controlled bandgap energy levels and methods thereof
A method and resulting structure that includes depositing two or more elements on a substrate. A rate of one of the two or more elements provided during the depositing is restricted to target where one or more energy levels are set within a bandgap of a nonstoichiometric structure generated by the depositing. The generated nonstoichiometric bandgap structure with the one or more set energy levels within the bandgap is provided. |
| US11120981B2 |
Laser desorption/ionization method and mass spectrometry method
A laser desorption/ionization method includes: a first process of preparing a sample support body that includes a substrate in which a plurality of through-holes are formed and a conductive layer that is provided on the first surface of the substrate; a second process of mounting a frozen sample on a mounting surface of a mount under a sub-freezing atmosphere, and fixing the sample support body to the mount in a state in which the second surface is in contact with the frozen sample; a third process of thawing the sample, and moving components of the thawed sample toward the first surface via the plurality of through-holes due to a capillary phenomenon; and a fourth process of irradiating the first surface with a laser beam while applying a voltage to the conductive layer, and ionizing the components that have moved toward the first surface. |
| US11120976B2 |
Apparatus and methods for removing contaminant particles in a plasma process
A method and apparatus for operating a plasma processing chamber includes performing a plasma process at a process pressure and a pressure power to generate a plasma. A first ramping-down stage starts in which the process power and the process pressure are ramped down substantially simultaneously to an intermediate power level and an intermediate pressure level, respectively. The intermediate power level and intermediate pressure level are preselected so as to raise a plasma sheath boundary above a threshold height from a surface of a substrate. A purge gas is flowed from a showerhead assembly at a sufficiently high rate to sweep away contaminant particles trapped in the plasma such that one or more contaminant particles move outwardly of an edge of the substrate. A second ramping-down stage starts where the intermediate power level and the intermediate pressure level decline to a zero level and a base pressure, respectively. |
| US11120974B2 |
Semiconductor device
A dry etching apparatus includes a process chamber, a stage, a gas supply device and a plasma generating device. The stage is in the process chamber and is configured to support a wafer, wherein the wafer has a center region and a periphery region surrounding the center region. The gas supply device is configured to supply a first flow of an etching gas to the center region and supply a second flow of the etching gas to the periphery region. The plasma generating device is configured to generate plasma from the etching gas. |
| US11120973B2 |
Plasma processing apparatus and techniques
An apparatus may include a main chamber, a substrate holder, disposed in a lower region of the main chamber, and defining a substrate region, as well as an RF applicator, disposed adjacent an upper region of the main chamber, to generate an upper plasma within the upper region. The apparatus may further include a central chamber structure, disposed in a central portion of the main chamber, where the central chamber structure is disposed to shield at least a portion of the substrate position from the upper plasma. The apparatus may include a bias source, electrically coupled between the central chamber structure and the substrate holder, to generate a glow discharge plasma in the central portion of the main chamber, wherein the substrate region faces the glow discharge region. |
| US11120971B2 |
Diagnostics for impedance matching network
In one embodiment, the present disclosure is directed to a method for performing diagnostics on a matching network that utilizes an electronically variable capacitor (EVC). According to the method, all the discrete capacitors of the EVC are switched out. At a first node, a parameter associated with a current flowing between a power supply and one or more of the switches of the discrete capacitors is measured. The method then switches in, one at a time, each discrete capacitor of the EVC. Upon the switching in of each discrete capacitor, the method remeasures the parameter at the first node and determines whether a change to the parameter at the first node is within a predetermined range to determine whether the corresponding switch, driver circuit, or filter of the discrete capacitor most recently switch in has failed. |
| US11120967B2 |
Charged particle beam apparatus and sample observation method using superimposed comparison image display
In the case of an in situ observation with a charged particle beam apparatus, an observer who is not an expert in the charged particle beam apparatus needs to maintain the field of view of the observation that changes from moment to moment while watching a monitor, and thus, adjustment of the field of view needs to be controllable in real time with a good operability. In order to eliminate the need for an observer to move the line of sight, a live image and a comparison image are overlapped and displayed. At this time, an interface is devised, such that overlapping of two images can be executed without giving stress to the observer. The observer presses a button on an operation screen, thereby displaying a superimposed image, which is obtained by making the comparison image matching the size of a first display area configured to display the live image translucent and superimposing the translucent comparison image on the live image, at the position of the first display area of the image display device. |
| US11120966B2 |
System and method for improved beam current from an ion source
An IHC ion source that employs a negatively biased cathode and one or more side electrodes is disclosed. The one or more side electrodes are biased using an electrode power supply, which supplies a voltage of between 0 and −50 volts, relative to the chamber. By adjusting the output from the electrode power supply, beam current can be optimized for different species. For example, certain species, such as arsenic, may be optimized when the side electrodes are at the same voltage as the chamber. Other species, such as boron, may be optimized when the side electrodes are at a negative voltage relative to the chamber. In certain embodiments, a controller is in communication with the electrode power supply so as to control the output of the electrode power supply, based on the desired feed gas. |
| US11120965B2 |
Beam blanking device for a multi-beamlet charged particle beam apparatus
A beam blanking device for a multi-beamlet charged particle beam apparatus is provided. The beam blanking device includes a first blanking unit, a second blanking unit and a third blanking unit. The first blanking unit includes a first blanking electrode and a first aperture. The second blanking unit includes a second blanking electrode and a second aperture. The third blanking unit includes a third blanking electrode and a third aperture. The beam blanking device includes a common electrode forming a first counter electrode for the first blanking electrode, a second counter electrode for the second blanking electrode and a third counter electrode for the third blanking electrode. The first blanking unit, the second blanking unit and the third blanking unit are arranged in a planar array and define a plane of the planar array. The first blanking electrode is arranged for generating a first electric field between the first blanking electrode and the common electrode in the first aperture for deflecting a first beamlet of the multi-beamlet charged particle beam apparatus into a first deflection direction. The second blanking electrode is arranged for generating a second electric field between the second blanking electrode and the common electrode in the second aperture for deflecting a second beamlet of the multi-beamlet charged particle beam apparatus into a second deflection direction. The third blanking electrode is arranged for generating a third electric field between the third blanking electrode and the common electrode in the third aperture for deflecting a third beamlet of the multi-beamlet charged particle beam apparatus into a third deflection direction. A dividing plane intersecting the planar array separates the first blanking unit from the second blanking unit and the third blanking unit, wherein the first deflection direction, the second deflection direction and the third deflection direction point away from the dividing plane. |
| US11120959B2 |
System and method for quick and low noise relay switching operation
A hybrid relay (1) comprises an electromechanical part (10) with a movable contact (103), a solid state relay (11) and a control unit (2) for applying a drive signal (S′,S″) to the drivable coil (101) of the electromechanical part. A method for operating the hybrid relay comprises steps of determining a first minimum voltage (V1) for the drive signal above which the movable contact (103) starts to move away from an open position (Po) and a second minimum voltage (V2) for the drive signal above which the movable contact (103) reaches the closed position (Pc), and a step of shaping a waveform (W) for the drive signal comprising a portion (W1) consisting of a vertical segment jumping from zero to the first minimum voltage value, a portion (W2) wherein the voltage gradually increases from the first minimum value to the second minimum voltage value, and a portion (W3) consisting of another vertical segment jumping from the second minimum voltage value to an upper voltage boundary (Vsup). |
| US11120958B2 |
Relay holding circuit and battery management system
The embodiments of the present disclosure disclose a relay holding circuit and a battery management system. the relay holding circuit may include: a high-voltage isolated power source, a power source driving module, and a microprocessor of a battery management system; the high-voltage isolated power source may be respectively connected to two electrodes of a battery pack, an output terminal of the power source driving module, the microprocessor, and a first terminal of a first switching device; an input terminal of the power source driving module may be connected to the microprocessor; the microprocessor may be further connected to a primary battery, the microprocessor may output a low-level signal to the power source driving module when the primary battery supplies power abnormally. |
| US11120954B2 |
Integrated switch
An integrated switch is provided in the present application, comprising: a housing; a first circuit board, arranged in the housing; a movable stand, movably connected in the housing; a contact component; a second circuit board, arranged in the housing and connected with an inner wall thereof, and electrically connected with the first circuit board; an electric brush, arranged between the movable stand and the second circuit board, having one end connected with the movable stand and the other end slidably connected with the second circuit board, driven by the movable stand, the electric brush has a connection state after sliding to a first position of the second circuit board, and a disconnection state after sliding to a second position of the second circuit board, and the moving contact shifts from a power-on state to a power-off state after the electric brush slides to the disconnection state. |
| US11120951B2 |
Electrode foil, winding capacitor, electrode foil manufacturing method, and winding capacitor manufacturing method
An electrode foil that progresses an enlargement of the surface area of a dielectric film and that barely causes cracks at the time of winding, a winding capacitor obtained by winding the electrode foil, an electrode foil manufacturing method, and a winding capacitor manufacturing method are provided. An electrode foil 1 is formed of a belt-like foil, and has a surface enlarged part 3, a core part 2, and a plurality of separation parts 4. The surface enlarged part 3 is formed on the surface of the foil, and the core part 2 is a part remained when excluding the surface enlarged part 3 within the foil. The separation part 4 extends on the surface enlarged part 3, dividing the surface enlarged part 3. The plurality of separation parts 4 share bending stress when the electrode foil 1 is wound, preventing concentration of stress. |
| US11120948B2 |
Electrolyte for aluminum electrolytic capacitor and aluminum electrolytic capacitor using electrolyte
An electrolyte for an aluminum electrolysis capacitor and the aluminum electrolysis capacitor using the electrolyte are provided. The electrolyte comprises a primary solute, a primary solvent, and an additive as shown in a structural formula 1, wherein, R1 and R2 are each independently selected from —CH3, —CH2CH3 or —OH; R3 and R4 are each in selected from —(CH2CH2O)mH or —H, and n and m are integrals ranging from 1 to 10000, respectively. The electrolyte has excellent anti-corrosive performance and is capable of maintaining long load service life under the condition of relatively high chlorine ion content, and there is no evidence of corrosion in the capacitor after it is disassembled. |
| US11120946B2 |
Micro-electronic electrode assembly
A micro-electronic electrode assembly having a first electrode arranged on a substrate is provided, wherein the first electrode has a thin layer made of a first electrode material having a solid state lattice, wherein the first electrode material oxidizes upon contact with oxygen-containing compounds and has a perovskite or perovskite-derived crystal structure, and wherein the electrode has a functional surface facing away from the substrate, a separation layer is arranged on the functional surface of the electrode, which prevents an oxidation of the electrode material in the region of the functional surface, the oxidation changing the properties of the electrode. An electrically insulating functional layer is arranged on the separation layer and a second electrode is arranged on the electrically insulating functional layer. According to the invention, advantageously the first electrode material has one of the compounds SrMoO3, SrMoO3-aNa BaMoO3, SrVO3, Of Sr2MoO4, and the separation layer has one of the compounds SeTiO3, DyScO3, GdScO3 or SrHfO3. The functional layer is a compound with the molecular formula BaxSr1−xTi1±yO3±z, preferably Ba0.5Sr0.5TiO3. The electrode assembly forms a varactor. |
| US11120938B2 |
Current transformer apparatus that is mountable to a circuit board
A current transformer apparatus is configured to enable it to be electrically connected with and physically mounted to a circuit board. The current transformer apparatus includes a support upon which a coil is situated and upon which a plurality of approximately U-shaped electrical connectors are also situated. The electrical connectors each include an electrical contact that is biased toward a reaction structure. A circuit board is received between the electrical contact and the reaction structure, and the bias between the electrical contact and the reaction structure mounts current transformer apparatus to the circuit board and provides an electrical connection therebetween. |
| US11120930B2 |
Method for manufacturing high-sensitivity piezoresistive sensor using multi-level structure design
The present invention discloses a method for manufacturing a high-sensitivity piezoresistive sensor using a multi-level structure design, including the following steps: forming first-level basic geometrical units formed of basic structural units on a substrate, where each first-level basic geometrical unit is a two-dimensional or three-dimensional network structure formed by stacking several basic structural units; stacking and combining several first-level basic geometrical units in an array to form a second-level geometrical structure, and forming a contact connection area located between adjacent first-level basic geometrical units; and dispensing a conductive adhesive in at least two positions on the substrate to form electrodes of a piezoresistive sensor, so as to obtain the piezoresistive sensor. A high-sensitivity piezoresistive sensor obtained by using the method of the present invention has flexible design and simple fabrication, can be desirably combined with various existing sensor fabrication methods, and has general applicability. |
| US11120924B2 |
Cable and a combined cable
A cable includes a pair of wires each having a conductor and a wire insulation layer wrapped around the conductor, an inner insulation layer wrapped around the wire insulation layer of each of the wires and fixing the wires, a metal shielding layer wrapped around an outer surface of the inner insulation layer, and an outer insulation layer wrapped around an outer surface of the metal shielding layer. The metal shielding layer has an insulating substrate and a metal conductive layer coated on the insulating substrate. The metal conductive layer of the metal shielding layer faces the outer insulation layer. |
| US11120921B2 |
In-containment spent fuel storage to limit spent fuel pool water makeup
A method and apparatus for extending the period a nuclear steam supply system spent fuel pool can be safely passively cooled by storing the spent fuel offloaded from the reactor, in the containment for one reactor operating cycle. During a refueling the spent fuel that is not to be returned to the reactor and the spent fuel that will be returned to the reactor are stored separately in shielded locations within the containment. After one operating cycle, the spent fuel stored within the containment that was not returned to the reactor just prior to the last operating cycle, is offloaded to the spent fuel pool and replaced by the newly offloaded spent fuel that is being retired. |
| US11120918B2 |
Nuclear fuel assembly debris filtering bottom nozzle
A base portion for use in a bottom nozzle of a fuel assembly in a nuclear reactor includes a top surface, a bottom surface, and a plurality of vertical wall portions arranged in a generally squared grid-like pattern which extend between the bottom surface and the top surface and which define a plurality of non-circular passages passing between the bottom surface and the top surface through the base portion. |
| US11120915B2 |
Evidence analysis and presentation to indicate reasons for membership in populations
A method, a machine-readable storage medium and at least one processing device are provided for analyzing and tracking results of multiple conditions associated with a population criteria, which is evaluated for each entity of at least one entity. The at least one processing device performs analytics associated with the population criteria, which is evaluated for each entity. Results of the analyzing of the multiple conditions are selectively tracked by the at least one processing device. The at least one processing device presents the tracked results to indicate a status of the at least one entity with respect to the tracked analytics. |
| US11120914B2 |
Evaluating drug-adverse event causality based on an integration of heterogeneous drug safety causality models
Mechanisms are provided that implement a plurality of heterogeneous causality models and a metaclassifier for predicting a likelihood of causality between a drug and an adverse event (AE). The plurality of heterogenous causality models process drug information for the drug to generate a plurality of risk predictions for a drug and AE pair. The risk predictions include at least one of a risk score or a risk label indicating a probability of the AE occurring with use of the drug. The plurality of heterogenous causality models provide the risk predictions, associated with the drug and AE pair, to a metaclassifier which generates a single causality score value indicative of a probability of causality between the drug and the AE, of the drug and AE pair, based on an aggregation of the risk predictions from the plurality of heterogenous causality models. The metaclassifier outputs the single causality score value in association with information identifying the drug and AE pair. |
| US11120909B2 |
Smartphone-controlled active configuration of footwear, including with concavely rounded soles
A smartphone or other mobile computer device, general purpose or specialized, wherein the smartphone device is configured to actively control the configuration of one or more bladders, compartments, chambers or internal sipes and one or more sensors located in either one or both of a sole or a removable inner sole insert of the footwear of the user and/or located in an apparatus worn or carried by the user, glued unto the user, or implanted in the user. The one or more bladders, compartments, chambers, or sipes, and one or more sensors are configured for computer control. A sole and/or a removable inner sole insert for footwear, including one or more bladders, compartments, chambers, internal sipes and sensors in the sole and/or in a removable insert; or on an insole; all being configured for control by a smartphone or other mobile computer device, general purpose or specialized. |
| US11120908B2 |
Data storage and retrieval system for non-contiguous medical device operational data
A web-based interface enables medical personnel to remotely monitor medical devices. A monitoring system records operational data and alarms from the medical devices in a file. However, since network connections between the medical devices and the monitoring system are intermittent, the file does not contain a contiguous stream of data for each medical device. The file pauses recording during gaps in network connectivity. The system displays current data, as well as a list of alarms. If medical personnel wish to view more detail about an earlier time or one of the alarms, the system calculates where in the file the medical device data was recorded. This calculation accounts for the discontiguous nature of the data. The system uses times the network connection is made and broken to calculate an index into the file that corresponds to the time of the user-selected alarm. |
| US11120904B2 |
Imaging modality maintenance smart dispatch systems and methods
Methods, apparatus, systems and articles of manufacture are disclosed. An example apparatus includes a technician selector to: identify at least one of a skill level, tools list, or replacement part list to fix a problem based on an identified problem corresponding to a service request from an imaging device; and access resources from a database of resources available to service the imaging device; a multiplier to weight resources based on at least one of the skill level, possessed tools in comparison to the tools list, possessed replacement parts in comparison to the replacement part list, distance to service location, or availability; and an interface to transmit the service request using a wireless communication to a repair device of the highest weighed resource, the service request to be augmented to include a configuration for the repair device to facilitate addressing of the service request by the highest weighted resource. |
| US11120898B1 |
Flexible encounter tracking systems and methods
Embodiments include a customizable encounter document whose contents are populated based on a template for the current patient, a template for all the user's patients, or a combination of templates. The contents include data modules retrieved from various databases and are arranged according to the user's work flow. The contents are presented in one view, a scrollable pane, to assist the user when making medical decisions. The user can make changes to the contents on the scrollable pane in real time that may affect one or more of the templates. Once the customizable encounter document is signed, the contents are captured, de-identified, and saved, along with a link of the captured contents with the user, and/or the patient's EHR. |
| US11120895B2 |
Systems and methods for mental health assessment
The present disclosure provides systems and methods for assessing a mental state of a subject in a single session or over multiple different sessions, using for example an automated module to present and/or formulate at least one query based in part on one or more target mental states to be assessed. The query may be configured to elicit at least one response from the subject. The query may be transmitted in an audio, visual, and/or textual format to the subject to elicit the response. Data comprising the response from the subject can be received. The data can be processed using one or more individual, joint, or fused models. One or more assessments of the mental state associated with the subject can be generated for the single session, for each of the multiple different sessions, or upon completion of one or more sessions of the multiple different sessions. |
| US11120887B2 |
Method for writing in a volatile memory and corresponding integrated circuit
An embodiment method for writing to a volatile memory comprises at least receiving a request to write to the memory, and, in response to each request to write to the memory: preparation of data to be written to the memory, this comprising computing an error correction code; storing in a buffer register the data to be written to the memory; and, if no new request to write to or to read from the memory is received after the storage, writing to the memory of the data to be written stored in the buffer register. |
| US11120885B2 |
Using a status indicator in a memory sub-system to detect an event
An indication of an initialization of power to a memory device is received. Responsive to receiving the indication of the initialization of power to the memory device, whether a status indicator associated with a written page of the memory device can be read is determined. Responsive to determining that the status indicator cannot be read, a programming of data to the memory device did not complete based on a prior loss of power to the memory device is determined. |
| US11120884B2 |
Implementing logic function and generating analog signals using NOR memory strings
NOR memory strings may be used for implementations of logic functions involving many Boolean variables, or to generate analog signals whose magnitudes are each representative of the bit values of many Boolean variables. The advantage of using NOR memory strings in these manners is that the logic function or analog signal generation may be accomplished within one simultaneous read operation on the NOR memory strings. |
| US11120883B2 |
Semiconductor storage device
A semiconductor storage device includes a first semiconductor extending above a substrate and including a first part and a second part, a first word line at a first level above the substrate and facing the first part of the first semiconductor, a second word line at the first level above the substrate and facing the second part of the first semiconductor, a first cell transistor including a first area of the first part of the first semiconductor that faces the first word line, and a second cell transistor including a second area of the second part of the first semiconductor that faces the second word line, wherein during an operation of reading data from the first cell transistor, a first voltage that is less than a threshold voltage of the second cell transistor and greater than or equal to zero voltage is applied to the second word line. |
| US11120882B2 |
Error recovery of data in non-volatile memory during read
A method of optimizing a read threshold voltage shift value for non-volatile memory units organized as memory pages may be provided. An ECC check is performed for active page reads. The method comprises, as part of the read operation, determining a status of the memory page, and reading a memory page with a current threshold voltage shift (TVS) value. Additionally, the method comprises, upon determining that a read memory page command passed an ECC check, returning corrected data read, and upon determining that the read memory page did not pass the ECC check, adjusting the current TVS value based on the status of the memory page to be read. Furthermore, the method comprises, while the read memory pages continues to not pass the ECC check, repeating the adjusting the current TVS value and the determining that the read memory page passes ECC check until a stop condition is met. |
| US11120880B1 |
Command sequence for hybrid erase mode for high data retention in memory device
Apparatuses and techniques are described for performing an erase operation for a set of memory cells, where the erase operation includes an all word line erase phase to save time followed by an odd-even word line erase phase to improve data retention. A transition to the odd-even word line erase phase can be triggered when the memory cells pass a first verify test which indicates that the threshold voltages of the memory cells have decreased below a first voltage. Or, the transition can be triggered when a threshold number of erase-verify iterations have been performed. The erase operation may be completed when the memory cells pass a second verify test which indicates that the threshold voltages of the memory cells have decreased below a second voltage which is less than the first voltage. |
| US11120878B2 |
Method for writing in EEPROM memory and corresponding integrated circuit
A method for programming a non-volatile memory (NVM) and an integrated circuit is disclosed. In an embodiment an integrated circuit includes a memory plane organized into rows and columns of memory words, each memory word comprising memory cells and each memory cell including a state transistor having a control gate and a floating gate and write circuitry configured to program a selected memory word during a programming phase by applying a first nonzero positive voltage to control gates of the state transistors of the memory cells that do not belong to the selected memory word. |
| US11120874B2 |
Electronic memory device and a method of manipulating the electronic memory device
An electronic memory device and a method of manipulating the electronic memory device. The electronic memory device includes a plurality of basic memory blocks connected together with a modular structure, wherein each of the basic memory blocks includes a plurality lookup tables (LUT) arranged to operate as an memory element for storing a plurality of bits of logic levels; and a plurality of registers each pairing up with a respective lookup table in the basic memory blocks; wherein the plurality of pairs of lookup tables and registers combine to form a pipelining memory structure. |
| US11120872B2 |
Resistive memory devices and methods of operating resistive memory devices
A resistive memory device includes a memory cell array of resistive memory cells connected to word and bit lines, each bay of the memory cell array including K tiles; a write/read circuit connected to the memory cell array through a row decoder and a column decoder, the write/read circuit being configured to perform a write operation in a target tile of the memory cell array, the write/read circuit comprising write drivers corresponding to the bays; a control voltage generator configured to generate first and second control voltages based on a reference current; and a control circuit configured to control the write/read circuit and the control voltage generator. A first write driver that corresponds to a first bay of the bays is configured to provide the target tile with a write current corresponding to a physical position of a selected memory cell of the target tile in the memory cell array. |
| US11120869B2 |
Quantizing loop memory cell system
One example includes a memory cell system. The memory cell system includes a quantizing loop configured to conduct a quantizing current in a first direction corresponding to storage of a first state of a stored memory state of the memory cell system and to conduct the quantizing current in a second direction opposite the first direction corresponding to storage of a second state of the stored memory state of the memory cell system. The memory cell system also includes a bias element arranged in the quantizing loop and which is configured to provide a substantially constant flux bias of the quantizing loop in each of the first and second states of the stored memory state. |
| US11120866B1 |
Memory device
According to one embodiment, a driver that sequentially supplies a first voltage, a second voltage higher than the first voltage, and the first voltage to the bit line, during the writing operation to the first memory cell. The driver supplies a third voltage to the second word line and a fourth voltage to the second selecting gate line while changing the voltage of the bit line from the second voltage to the first voltage if a data is a first data. The driver supplies a fifth voltage to the second word line and a sixth voltage to the second selecting gate line while changing the voltage of the bit line from the second voltage to the first voltage if the data is a second data. At least the sixth voltage is larger than the fourth voltage or the fifth voltage is larger than the third voltage. |
| US11120862B2 |
Non-volatile memory read method for improving read margin
A semiconductor device capable of enlarging a read margin of a memory cell and a method of surrounding a read of a memory are provided. The reference word line RWL is activated in a time division manner with respect to the plurality of word lines WL. The precharge circuit PRE applies the read potential VRD to the bit line BL, and the precharge circuit PRE flows the read current Icel from the selected memory cell MC and the read reference current Iref from the reference cell RC to the bit line BL in a time division manner. A detection currents Ird2a, Irr2a, each of which is a current proportional to the current flowing through the bitline BL, flows through the current detection line CDL. |
| US11120860B1 |
Staggering refresh address counters of a number of memory devices, and related methods, devices, and systems
Methods of operating a number of memory devices are disclosed. A method may include adjusting a count of a refresh address counter of at least one memory device of a number of memory devices such that the count of the refresh address counter of the at least one memory device is offset from a count of a refresh address counter of at least one other memory device of the number of memory devices. The method may also include receiving, at each of the number of memory devices, a refresh command. Further, the method may include refreshing, at each of the number of memory devices, a row of memory cells indicated by the count of an associated refresh address counter. Related systems and memory modules are also described. |
| US11120859B2 |
Memory cell sensing with storage component isolation
Methods, systems, and devices for operating a ferroelectric memory cell or cells are described. A ferroelectric memory cell may be selected using a selection component that is in electronic communication with a sense amplifier and a ferroelectric capacitor of a ferroelectric memory cell. A voltage applied to the ferroelectric capacitor may be sized to increase the signal sensed during a read operation. The ferroelectric capacitor may be isolated from the sense amplifier during the read operation. This isolation may avoid stressing the ferroelectric capacitor which may otherwise occur due to the applied read voltage and voltage introduce by the sense amplifier during the read operation. |
| US11120858B2 |
Magnetic memory
A magnetic memory according to an embodiment includes: a first wiring; a second wiring; a first switching element disposed between the first wiring and the second wiring; a first magnetic member extending in a first direction and disposed between the first switching element and the second wiring; a third wiring disposed between the first magnetic member and the second wiring; a first magnetoresistive element disposed between the third wiring and the second wiring; and a second switching element disposed between the first magnetoresistive element and the second wiring. |
| US11120854B2 |
Semiconductor device
A semiconductor device includes an internal clock generation circuit configured to generate first to fourth internal clocks from first and third divided clocks and a ground voltage in first and second modes. The semiconductor device also includes a data processing circuit configured to latch first to fourth internal data according to first to fourth input control signals. The data processing circuit is additionally configured to generate first to fourth output data by determining the output priority of the latched first and third internal data and the latched second and fourth internal data according to the first to fourth internal clocks, first to fourth rising output control signals, and first to fourth falling output control signals. |
| US11120853B2 |
Semiconductor memory apparatus with a write voltage level detection
A semiconductor memory apparatus includes a write control circuit suitable for generating a write cancel signal and a rewrite signal in response to a voltage level of a write voltage in a write operation, and a driving circuit suitable for transferring data to a data storage region in response to the write cancel signal and the rewrite signal in the write operation. |
| US11120851B1 |
Memory apparatus and burst read and burst write method thereof
A memory apparatus includes a pseudo static random access memory and a controller. The controller is configured to provide an external command to the pseudo static random access memory. When the memory apparatus starts a burst read operation or a burst write operation, the controller provides a plurality of page starting addresses to the pseudo static random access memory, and the pseudo static random access memory sequentially performs the burst read operation or the burst write operation according to a sequence of receiving the page starting addresses. |
| US11120850B2 |
Performing logical operations using sensing circuitry
The present disclosure includes apparatuses and methods related to performing logical operations using sensing circuitry. An example apparatus comprises an array of memory cells and sensing circuitry coupled to the array of memory cells. The sensing circuitry includes a primary latch and a secondary latch. The primary latch is coupled to a pair of complementary sense lines and selectively coupled to a pair of adjacent complementary sense lines. The secondary latch is selectively coupled to the primary latch. The primary latch and secondary latch are configured to shift a data value between the pair of adjacent complementary sense lines and the primary latch. The primary latch and secondary latch are configured to shift the data value from the pair of adjacent complementary sense lines without activating a row line. |
| US11120842B2 |
Memory system having plural circuits separately disposed from memories
A memory system includes a first substrate including a first signal terminal and a second signal terminal electrically connected to a bus, a first circuit in which a first switching element and a first resistor are connected in series between a first terminal and a second terminal, the first terminal connected to the first signal terminal, a second circuit in which a second switching element and a second resistor are connected in series between a third terminal and a fourth terminal, the third terminal connected to the second signal terminal, a first memory electrically connected to the second terminal, a second memory electrically connected to the fourth terminal, and a controller electrically connected to the bus and configured to control the first and second switching elements. |
| US11120841B2 |
Method for automatically detecting video incidents on an electronic video playback device
A method for automatically detecting video incidents on a video played back by an electronic video playback device, includes acquiring a message; subtracting a counter included in the message previously acquired from a counter included in a message saved in a database to obtain a transition state of the electronic video playback device; classifying, by a supervised automatic learning algorithm, the transition state as a normal state of the played back video or as a video incident on the played back video; performing a video incident detection including the creation of an incident message; transmitting the incident message to a remote system; and recording the acquired message in the database. |
| US11120839B1 |
Segmenting and classifying video content using conversation
Disclosed are various embodiments for segmenting and classifying video content using conversation. In one embodiment, a plurality of segments of a video content item are generated by analyzing audio accompanying the video content item. A subset of the plurality of segments that correspond to conversation segments are selected. Individual segments of the subset of the plurality of segments are processed to determine whether a classification applies to the individual segments. A list of segments of the video content item to which the classification applies is generated. |
| US11120837B2 |
System and method for use in playing back panorama video content
Some embodiments provide methods of playing back content, comprising: accessing video content comprising a series of frames that if fully decoded would extend beyond a viewer's field of view, and wherein each encoded frame comprises multiple encoded sections; determining a field of view of the viewer; identifying one or more sections of the first frame that are at least partially within the field of view; decoding the one or more sections of the first frame while not decoding one or more of the sections of the first frame that are not within the field of view; and displaying the one or more decoded sections of the first frame such that the portion of the first frame is displayed, and wherein less than all of the first frame is decoded and less than all of the first frame is displayed during playback. |
| US11120835B2 |
Collage of interesting moments in a video
A computer-implemented method includes determining interesting moments in a video. The method further includes generating video segments based on the interesting moments, wherein each of the video segments includes at least one of the interesting moments from the video. The method further includes generating a collage from the video segments, where the collage includes at least two windows and wherein each window includes one of the video segments. |
| US11120832B2 |
Recording and reproducing device, recording and reproducing method, and magnetic tape cartridge
A recording and reproducing device includes: a reading unit that reads production information from a recording medium of a magnetic tape cartridge, the magnetic tape cartridge including a magnetic tape, and the recording medium other than the magnetic tape and on which the production information is recorded, the production information being information regarding the magnetic tape obtained in a production process of the magnetic tape cartridge; and a control unit that performs, as an initialization process of the magnetic tape cartridge, control of recording the production information on the magnetic tape and invalidating the production information in the recording medium. |
| US11120825B1 |
Modifying seek operations mid-seek
Illustrative systems and methods disclosed herein may change or modify a seek during mid-seek for various reasons and may set seek speeds for various seeks to less than the maximum possible seek speed to, for example, facilitate seek target change or modifications mid-seek. For instance, the seek speeds for lower priority commands or commands at risk for deprioritization may be set to speeds less than the maximum possible seek speed. |
| US11120824B1 |
Bolometric sensor for a heat-assisted magnetic recording device
An apparatus comprises a slider configured for heat-assisted magnetic recording comprising an air bearing surface (ABS). The slider comprises a write pole at or near the ABS, and a near-field transducer (NFT) at or near the ABS and proximate the write pole. A main waveguide is configured to receive light from a laser source and communicate the light to the NFT. An optical power sensor comprises a tap waveguide optically coupled to the main waveguide and comprising a first end and an opposing second end. The optical power sensor also comprises a bolometer optically coupled to the tap waveguide and configured to receive a portion of the light extracted from the main waveguide by the tap waveguide. |
| US11120820B2 |
Detection of signal tone in audio signal
A technique for detecting a signal tone in an audio signal is disclosed. A determination is made as to whether a peak modulation frequency in the audio signal is in a specific range or not to obtain a determination result. A measure regarding a modulation spectrum of the audio signal is calculated. The measure is calculated based on at least components of the modulation spectrum above a specific limit of modulation frequency. By using the determination result and the measure regarding the modulation spectrum, a judgement is done as to whether the audio signal contains a signal tone or not. |
| US11120817B2 |
Sound recognition apparatus
A sound recognition apparatus (100) comprises a microphone (110) for capturing a posterior sound signal; and a processing circuit comprising a processor (180). The processing circuit is configured to process the posterior sound signal to derive posterior data, generate, using the processor (180), amalgamated data from the posterior data and anterior data derived from a previously captured anterior signal, determine, by the processor (180), whether there are correlations between the amalgamated data, the posterior data, and the anterior data that indicate that the posterior data matches the anterior data by comparing the posterior data and the amalgamated data, and the anterior data and the amalgamated data, and upon the posterior data matching the anterior data, output, by the processor (180), an indication that the posterior data matches the anterior data. |
| US11120814B2 |
Multi-microphone signal enhancement
Microphone signals are received from microphones of a computer device. Each microphone signal of the microphone signals is acquired by a respective microphone of the microphones. A previously unselected microphone is selected from the microphones as a reference microphone, which generates a reference microphone signal. An adaptive filter is used to create, based on microphone signals of the microphones other than the reference microphone, predicted microphone signals for the reference microphone. Based on the predicted microphone signals for the reference microphone, an enhanced microphone signal is outputted for the reference microphone. The enhanced microphone signal may be used as microphone signal for the reference microphone in subsequent audio processing operations. |
| US11120813B2 |
Image processing device, operation method of image processing device, and computer-readable recording medium
The present disclosure relates to an image processing device, an operation method of the image processing device, and a computer-readable recording medium. The image processing device according to an embodiment in the present disclosure may comprise: a voice-obtaining unit for obtaining the voice of a user and generating a first voice signal; a communication interface unit for receiving a second voice signal of the user from an external device; and a processor which, after the first voice signal is received from the voice-obtaining unit, performs a first pre-processing operation employing voice amplification of the received first voice signal, and, after the second voice signal is received via the communication interface unit, performs a second pre-processing operation employing noise amplification of the second voice signal. |
| US11120809B2 |
Coding device, decoding device, and method and program thereof
A coding method and a decoding method are provided which can use in combination a predictive coding and decoding method which is a coding and decoding method that can accurately express coefficients which are convertible into linear prediction coefficients with a small code amount and a coding and decoding method that can obtain correctly, by decoding, coefficients which are convertible into linear prediction coefficients of the present frame if a linear prediction coefficient code of the present frame is correctly input to a decoding device. A coding device includes: a predictive coding unit that obtains a first code by coding a differential vector formed of differentials between a vector of coefficients which are convertible into linear prediction coefficients of more than one order of the present frame and a prediction vector containing at least a predicted vector from a past frame, and obtains a quantization differential vector corresponding to the first code; and a non-predictive coding unit that generates a second code by coding a correction vector which is formed of differentials between the vector of the coefficients which are convertible into the linear prediction coefficients of more than one order of the present frame and the quantization differential vector or formed of some of elements of the differentials. |
| US11120805B1 |
Intelligent microphone having deep learning accelerator and random access memory
Systems, devices, and methods related to a Deep Learning Accelerator and memory are described. For example, a microphone may be configured to execute instructions with matrix operands and configured with: a transducer to convert sound waves to electrical signals; an analog to digital converter to generate audio data according to the electrical signals; random access memory to store instructions executable by the Deep Learning Accelerator and store matrices of an Artificial Neural Network; and a controller to store the audio data in the random access memory as an input to the Artificial Neural Network. The Deep Learning Accelerator can execute the instructions to generate an output of the Artificial Neural Network, which may be provided as the primary output of the microphone to a computer system, such as a voice-based digital assistant. |
| US11120802B2 |
Diarization driven by the ASR based segmentation
An approach is provided that receives an audio stream and utilizes a voice activation detection (VAD) process to create a digital audio stream of voices from at least two different speakers. An automatic speech recognition (ASR) process is applied to the digital stream with the ASR process resulting in the spoken words to which a speaker turn detection (STD) process is applied to identify a number of speaker segments with each speaker segment ending at a word boundary. A speaker clustering algorithm is then applied to the speaker segments to associate one of the speakers with each of the speaker segments. |
| US11120801B2 |
Generating dialogue responses utilizing an independent context-dependent additive recurrent neural network
The present disclosure relates to systems, methods, and non-transitory computer readable media for generating dialogue responses based on received utterances utilizing an independent gate context-dependent additive recurrent neural network. For example, the disclosed systems can utilize a neural network model to generate a dialogue history vector based on received utterances and can use the dialogue history vector to generate a dialogue response. The independent gate context-dependent additive recurrent neural network can remove local context to reduce computation complexity and allow for gates at all time steps to be computed in parallel. The independent gate context-dependent additive recurrent neural network maintains the sequential nature of a recurrent neural network using the hidden vector output. |
| US11120800B1 |
Event based feature computation
Techniques for performing feature computation are described. A system may gather and analyze event data to generate a timeline of the event data and corresponding feature data (e.g., statistical values representing the event data). The system can create a customized timeline that allows information to be sorted and aggregated in different timescales to improve speech processing and other functionality. For example, a feature computation system may calculate statistics and other information based on interactions with a speech processing system. These statistics provide information about previous interactions that may be leveraged to interpret future voice commands. |
| US11120793B2 |
Automatic speech recognition
It is depicts a method of speech recognition, sequentially executed by a processor on consecutive speech segments that comprises: obtaining digital information, which is a spectrogram representation, of a speech segment, and extracting from it speech features that characterizes the segment from the spectrogram representation. Then, a consistent structure segment vector based on the speech features is determined onto which machine learning is deployed to determine at least one label of the segment vector. A method of voice recognition and image recognition sequentially executed by a processor, on consecutive voice segments is also described. A system for executing speech, voice, and image recognition is also provided that comprises client devices to obtain and display information, a segment vector generator to determine a consistent structure segment vector based on features, and a machine learning server to determine at least one label of the segment vector. |
| US11120787B2 |
Job record specifying device, image processing apparatus, server, job record specifying method, and recording medium
A user inputs a speech including a keyword via a speech input device; a first processor searches a job history by the keyword, the job history being stored on a storage, the job history including a job record, the job record including a set of values having ever been used for a job executed by an image processing apparatus. A job record specifying device includes a second processor that conducts an analysis on different values in multiple job records; selects a speech with reference to the different values; transfers the speech to a speech generator; and finds a specific job record from the multiple job records using a keyword extracted from a speech inputted via the speech input device in response to the speech outputted by the speech generator. The image processing apparatus reflects a target set of values in the specific job record, to the setting of a job. |
| US11120786B2 |
Method and system of automatic speech recognition with highly efficient decoding
A system, article, and method of automatic speech recognition with highly efficient decoding is accomplished by frequent beam width adjustment. |
| US11120785B2 |
Voice synthesis device
A voice synthesis device which includes a database configured to store a voice and a text corresponding to the voice and a processor configured to extract characteristic information and a tone of a first-language voice stored in the database, classify an utterance style of an utterer on basis of the extracted characteristic information, generate utterer analysis information including the utterance style and the tone, translate a text corresponding to the first-language voice into a second language, and synthesize the text, translated into the second language, in a second-language voice by using the utterer analysis information. |