| Document | Document Title |
|---|---|
| US11082235B2 |
Cryptoasset custodial system with different cryptographic keys controlling access to separate groups of private keys
Methods, systems, and apparatus, including medium-encoded computer program products, for secure storage and retrieval of information, such as private keys, useable to control access to a blockchain, include, in at least one aspect, a method including: identifying for an action an associated private-keys group out of different private-keys groups, each having an associated cryptographic group key; decrypting, at a first computer, a first level of encryption of a private key associated with the action using the associated cryptographic group key; decrypting, at a second computer distinct from the first computer, a second level of encryption of the private key associated with the action using a hardware-based cryptographic key used by the second computer; using, at the second computer, the private key associated with the action in a process of digitally signing data to authorize the action; and sending the digitally signed data to a third computer to effect the action. |
| US11082233B2 |
System and method for issuing verifiable claims
Methods, systems, and apparatus, including computer programs encoded on computer storage media, for verifiable-claim issuance. One of the methods includes: receiving, from a first entity, a request for creating a verifiable claim (VC) for a decentralized identifier (DID) associated with a second entity; obtaining, in response to receiving the request, a digital signature associated with the first entity; and generating the VC based on the received request and the obtained digital signature. |
| US11082228B2 |
Reuse system, key generation device, data security device, in-vehicle computer, reuse method, and computer program
A reuse system includes: a key generation device; an in-vehicle computer that is detached from a first vehicle and is installed in a second vehicle; and a data security device that is installed in the second vehicle. The key generation device includes a vehicle interface, and a key generation unit that generates a first key that is the same as a key stored in the in-vehicle computer from a time when being installed in the first vehicle by using an in-vehicle computer identifier, and a master key that is common to the first and second vehicles, and transmits the first key to the second vehicle. The data security device includes a first interface unit, and a first cryptographic processing unit that encrypts first data, which is applied to the in-vehicle computer, with the first key to generate encrypted first data, and transmits the encrypted first data to the in-vehicle computer. |
| US11082219B2 |
Detection and protection of data in API calls
Aspects of the present disclosure relate to detecting and protecting a class of data in an API call including determining a plurality of field names and identifying a field name to search for in the data. The technique further includes generating, in response to the identifying the field name, an encryption key and an expiration, wherein the encryption key is configured to encrypt the data. The technique also comprises encrypting the data, sending the API call to an application server, wherein the application server is configured to process the API call. The technique also includes receiving, from the application server, a request for the encryption key and validating that the encryption key has not expired. The technique also includes, sending, in response to being valid, the encryption key to the application server, and storing, in a database, a set of usage data associated with the encryption key. |
| US11082218B2 |
Key derivation for a module using an embedded universal integrated circuit card
A module with an embedded universal integrated circuit card (eUICC) can include a received eUICC profile and a set of cryptographic algorithms. The received eUICC profile can include an initial shared secret key for authentication with a wireless network. The module can receive a key K network token and send a key K module token to the wireless network. The module can use the key K network token, a derived module private key, and a key derivation function to derive a secret shared network key K that supports communication with the wireless network. The wireless network can use the received key K module token, a network private key, and the key derivation function in order to derive the same secret shared network key K derived by the module. The module and the wireless network can subsequently use the mutually derived key K to communicate using traditional wireless network standards. |
| US11082203B2 |
Method and apparatus for accelerating the blockchain for secure and high throughput applications
Various embodiments relate to a method for accelerating blockchains, the method comprising the steps of waiting for an event to occur, receiving a block, determining whether the block is valid, adding the block to a block tree, determining whether the block is a singular candidate, starting a timer for the block, determining whether the timer has expired for the block, determining whether the block is still singular after the time has expired for the block and processing the singular block. |
| US11082201B1 |
Loop prevention
This disclosure describes techniques for preventing message loops in communications among network devices. The techniques include preventing messages from being returned to a sending node and preventing messages from being sent more than once to any particular node. Such message loops may reverberate among network devices before triage efforts are able to stop the loop. As such, message loop prevention may help decrease the computational load among networked devices. At scale, the techniques may help prevent an exponential increase in data traffic that may propagate widely over the network. Loop prevention techniques may even prevent disabling of a network due to data traffic overload. |
| US11082197B2 |
Control system and control device
Each of a plurality of control devices includes: an upper communication part which transmits/receives first data to/from other control devices via a first network; and a lower communication part which transmits/receives second data to/from one or more equipment via a second network. The upper communication part has a first timer time-synchronized with each other among the plurality of control devices. The lower communication part determines, based on the time of the first timer, a timing to start processing for transmitting the second data to the one or more equipment. |
| US11082193B2 |
Wireless terminals, nodes of wireless communication networks, and methods of operating the same
According to one embodiment, a method may be provided to operate a wireless terminal in communication with a wireless communication network. A first bit map having a first bit map size is received with bits of the first bit map corresponding to respective component carriers of a first group of component carriers and indicating a status of the respective component carriers of the first group. A second bit map having a second bit map size is received with bits of the second bit map corresponding to respective component carriers of a second group of component carriers and indicating a status of the respective component carriers of the second group. Moreover, the first bit map size of the first bit map is different than the second bit map size of the second bit map. |
| US11082192B2 |
Methods and systems for numerology determination of wireless communication systems
A method, system, and device to obtain a basic subcarrier spacing, or a channel bandwidth, or a maximum transmission bandwidth, or a usable subcarrier spacing set via a predefined mapping rule is provided. In an embodiment, a method in a network component to determine a system numerology includes determining, by the network component, one or more subcarrier spacing options from a candidate subcarrier spacing set that is associated with a carrier frequency band. The method also includes transmitting, by the network component, a signal indicating to one or more UEs one or more subcarrier spacing options from the candidate subcarrier spacing set. |
| US11082191B2 |
Serving cell interruption in multicarrier with shortened TTI patterns
A method, wireless device and network node for supporting at least one transmission time interval, TTI, are disclosed. According to one aspect, a method includes communicating with a network node in a first cell on a first carrier. The method further includes determining an operation to be performed by the wireless device in a second cell on a second carrier. The method further includes performing the determined operation in the second cell while interrupting the communication with the network node in the first cell on the first carrier according to an interruption parameter that does not exceed an interruption threshold that depends on a duration of a TTI on the first carrier. |
| US11082189B2 |
Method and apparatus for negotiating a block acknowledgement agreement
A method performed by a STA may comprise transmitting a first negotiation message to an AP and receiving a second negotiation message from the AP. The first negotiation message and the second negotiation message may negotiate a block acknowledgement agreement between the STA and the AP. The method may further comprise receiving a data unit, from the AP, the data unit having a duration field indicating a duration of a block-ACK frame. The duration of the block-ACK frame may be determined based on the negotiated block ACK agreement. A block-ACK frame may be transmitted within the duration indicated by the duration field. |
| US11082186B2 |
Phased array antenna system
A reference signal distribution system is disclosed. The reference signal distribution system can include a power splitter to create, from a frequency-divided reference signal, a counterclockwise divided reference signal and a clockwise divided reference signal. The reference signal distribution system can include a distribution ring to provide the counterclockwise divided reference signal to a ring tap, and provide the clockwise divided reference signal to the ring tap. The reference signal distribution system can include a ring tap to produce a phase synchronization signal based the counterclockwise divided reference signal and the clockwise divided reference signal. The reference signal distribution system can include an analog regenerative frequency divider to produce a common phase reference signal based in part on the phase synchronization signal. |
| US11082183B2 |
Comb shift design
Disclosed are techniques related to wireless communication. In an aspect, a sequence generating entity factorizes a comb size N into prime factors of N, and generates one or more offset sequences for a reference signal for positioning based on one or more sequence lists associated with the prime factors of N and a number of symbols M over which the reference signal is scheduled. |
| US11082182B2 |
Method for transmitting reference signal in NB-IoT system, and device therefor
A method for user equipment (UE) to receive a reference signal in a cellular mobile communication system supporting narrowband Internet of Things (NB-IoT) is disclosed. To this end, the UE receives, via at least one first subframe, a narrowband reference signal (NRS) for signal demodulating or measurement in NB-IoT and receiver, via at least one second subframe, a narrowband positioning reference signal (NPRS) for location-based measurement in the NB-IoT, wherein information on the at least one second subframe is received from a base station as configuration information of the NPRS, and, in accordance with the configuration information of the NPRS, the UE operates by assuming that the NRS is not transmitted in a subframe configured with the second subframe. |
| US11082178B2 |
Message sending method and device, electronic device
Provided are a message sending method and device, and an electronic device. The method includes: sending, by a first node, a message to a second node, wherein the message includes at least one of: a first reference signal carried on a first resource, or a data packet carried on a second resource; wherein the first reference signal belongs to a first reference signal set, and the first resource belongs to a first resource set; the second resource belongs to a second resource set; and the first resource set and the second resource set have a gap in a time domain, and the value of the gap is greater than or equal to 0. |
| US11082174B2 |
Method and system for a repeater network that utilizes distributed transceivers with array processing
A device that comprises a plurality of distributed transceivers, a central processor and a network management engine may be configured to function as relay device, relaying an input data stream from a source device to at least one other device. The relaying may include configuring one or more of the plurality of distributed transceivers to particular mode of relay operation and receiving the input data stream from the source device via at least one of the configured one or more of the plurality of distributed transceivers. The relaying may also include transmitting at least one relay data stream corresponding to the input data stream to the at least one other device, via at least one of the configured one or more of the plurality of distributed transceivers. |
| US11082172B2 |
Methods and apparatus for multi-carrier communications with variable channel bandwidth
Methods and apparatus for multi-carrier communication with variable channel bandwidth are disclosed, where the time frame structure and the OFDM symbol structure are invariant and the frequency-domain signal structure is flexible. In one embodiment, a mobile station, upon entering a geographic area, uses a core-band to initiate communication and obtain essential information and subsequently switches to full operating bandwidth of the area for the remainder of the communication. If the mobile station operates in a wide range of bandwidths, the mobile station divides the full range into sub-ranges and adjusts its sampling frequency and its FFT size in each sub-range. |
| US11082171B2 |
Systems and methods for selecting a spectral segment for a downlink transmission
The present disclosure generally relates to systems, methods and software for selecting a spectral segment for important downlink and/or uplink transmissions. Particularly, the spectral segment may be a set of contiguous subcarriers within a plurality of subcarriers transmitting over a channel to a population of cable modems. In an embodiment, the systems, methods and software disclosed herein optimize placement of a physical link channel (PLC) within an OFDM channel. In an embodiment, the system, methods and software disclosed herein optimize placement of a ranging region within an OFDMA channel. |
| US11082168B1 |
Entropy driven endurance for normalized quality of service
Aspects of a storage device including a memory and a controller are provided which allow for data associated with a media stream and having high entropy to be stored in healthier memory locations, with improved data protection, and with more optimal NAND parameters than for data having low entropy. After receiving data associated with a media stream, the controller identifies an entropy level of the data. When the entropy level meets an entropy threshold, the controller stores the data in a first block of the memory associated with a lower BER, and/or with a higher write latency or a first, more discrete voltage. Alternatively, when the entropy level does not meet the entropy threshold, the controller stores the data in a second block of the memory associated with a higher BER, and/or with a lower write latency or a second, less discrete voltage. |
| US11082161B2 |
Terminal apparatus, base station apparatus, communication method, and integrated circuit
A terminal apparatus receives a PDCCH including a DCI format, and performs PUSCH transmission based on detection of the PDCCH. In an HARQ process corresponding to the PUSCH transmission, a value of an UL HARQ Round Trip Timer (RTT) timer for the HARQ process is provided based at least on a first condition and/or a second condition. The first condition is that a search space for the PDCCH detected is either a common search space or a UE-specific search space. The second condition is that a type of the HARQ process is either a synchronous HARQ or an asynchronous HARQ. |
| US11082160B2 |
Communication apparatus, wireless communication system, and wireless communication method
A communication apparatus includes a radio processing unit configured to transmit or receive a radio signal; and a control unit configured to control application of retransmission control in accordance with information indicating whether or not to apply the retransmission control, the information being included in a radio signal received from another communication apparatus via the radio processing unit. |
| US11082159B2 |
Transmitter apparatus and signal processing method thereof
A transmitter apparatus and a receiver apparatus are provided. The transmitter apparatus includes: an encoder configured to generate a low density parity check (LDPC) by performing LDPC encoding; an interleaver configured to interleave the LDPC codeword; and a modulator configured to map the interleaved LDPC codeword onto a modulation symbol. The modulator maps a bit included in a predetermined group from among a plurality of groups constituting the LDPC codeword onto a predetermined bit in the modulation symbol. |
| US11082158B2 |
Transmitting method and receiving method using non-uniform constellation
A receiving method is disclosed. The receiving method includes receiving a signal from a transmitting apparatus; demodulating the signal to generate values based on 64-quadrature amplitude modulation (QAM); deinterleaving the values; and decoding the deinterleaved values based on a low density parity check (LDPC) code, a code rate of the LDPC code being 5/15, wherein the signal is demodulated based on at least one constellation point among given constellation points. |
| US11082155B2 |
Physical layer (PHY) data unit format for hybrid automatic repeat request (HARQ)
A communication device generates one or more physical layer (PHY) PHY protocol service data units (PSDUs) of a PHY data unit, and individually encodes PSDUs of the one or more PSDUs. The communication device generates a PHY preamble of the PHY data unit, including: generating a first signal field in the PHY preamble, and including in the first signal field an indicator to indicate that the PHY preamble includes a second signal field with HARQ information regarding the PHY data unit, and generating the second signal field to include one or more indications of one or more durations of the one or more respective PSDUs within a PHY data portion of the PHY data unit. |
| US11082152B2 |
Methods, infrastructure equipment and communications device
A method is performed by a wireless communications device of transmitting measurement reports to an infrastructure equipment. The method comprises receiving signals transmitted by the infrastructure equipment, measuring a characteristic associated with the received signals, and selecting an index value from one of a plurality of index values. Each of the index values represents a range of values of the characteristic for which communications parameters of a transmitter in the infrastructure equipment and a receiver in the communication device should have to achieve an acceptable communications performance for values of the characteristic within the range of values of the characteristic. The method further comprises, subject to the selected index value, transmitting the selected index value to the infrastructure equipment. |
| US11082148B2 |
Method for detecting active radiofrequency wireless communication signal in a region
The use of mobile telephones have come into widespread use in such a way that day to day life has become very much dependent on them. This results in unintentional or intentional use of mobile phones in the prohibited areas such as examination centers. A method for detecting active radiofrequency wireless communication signal in a region has been provided. The method involves two stages, calibration stage and mobile phone detection stage. In the calibration stage, the frequency on which the mobile towers in that region are operating are identified. The identified frequency is then used to detect the active wireless RF communication using a plurality of software defined radios (SDR) and the existing client systems present in the region. The method further configured to determine the exact location of the mobile phone from the RF communication signal is generated. |
| US11082145B2 |
Optical branching/coupling device and optical branching/coupling method
An optical branching/coupling device includes: a first optical branching unit that splits first light with a first and a second wavelength, and outputs second light and third light; a wavelength selector that receives the second light, receives fourth light with a third wavelength, output fifth and sixth light, one of the fifth light and the sixth light including an optical signal of the first wavelength of the second light and including the fourth light, and the other including an optical signal of the second wavelength; a first light switch that receives the fifth light and the sixth light, output one of the fifth light and the sixth light as seventh light, and output the other as eighth light; and a second light switch that receives the third light, receives the eighth light, and outputs the third or the eighth light that have been input as ninth light. |
| US11082141B2 |
Wireless apparatus and wireless apparatus processing method
An object of this technology is for one apparatus to effectively notify the other apparatus whether or not synchronization target clocks are correctly synchronized therebetween. A wireless apparatus includes a main control section, a wireless control section, and a clock synchronization management section. The main control section manages time using a first clock (synchronization target clock). The wireless control section manages time using a second clock (reference clock). The synchronization management section manages a clock synchronization state. The wireless control section notifies another wirelessly connected wireless apparatus of information regarding the clock synchronization state through transmission of a frame. |
| US11082138B2 |
Method for channel state measurement in wireless communication system and apparatus therefor
A method for a channel state measurement in a wireless communication system according to an embodiment of the present disclosure is performed by a terminal, and may comprise the steps of: receiving a resource setting related to a reference signal for the channel state measurement from a base station; receiving information related to the number of transport layers of the base station at the time of the channel state measurement or the number of transport layers of the base station at the time of scheduling on the basis of the channel state measurement; and performing the channel state measurement by using the received information. |
| US11082136B2 |
Method for communicating between at least one first system and at least one second system
A method for communicating between a first system and a second system using a full-duplex synchronous serial link capable of simultaneously routing between both systems is disclosed. The data involved includes at least one message from the first system to the second, at least one message from the second system to the first, and a clock signal. The method involves the second system receiving a message and a clock signal sent by the first system, delayed and substantially in phase, the second system sends a message to the first system, the clock signal received by the second system is sent back to the first system with the message sent by the second system, and the first system receives the message sent by the second system and the sent-back clock signal, delayed and substantially in phase. |
| US11082134B2 |
Kramers-Kronig receiver
There is provided a Kramers-Kronig receiver, comprising a reception path; wherein the reception path comprises: a Stokes receiver that is configured to receive a polarization-multiplexed signal and to output a Stokes vector; wherein the polarization-multiplexed signal comprises a first modulated signal, a second modulated signal and a continuous wave signal; wherein the first modulated signal is of a first polarization; wherein the second modulated signal is of a second polarization; wherein the continuous wave signal is of the first modulation or of the second modulation; a set of analog to digital converters that are configured to generate a digital representation of the Stokes vector; and a digital processor that is configured to process the digital representation of the Stokes vector to provide a reconstructed polarization-multiplexed signal, wherein the processing is based on a Kramers-Kronig relationship related to the polarization-multiplexed signal. |
| US11082133B2 |
Optical modulation/demodulation method, optical communication system, optical transmitting device and optical receiving device
An object is to provide an optical modulation/demodulation method, an optical communication system, an optical transmitting device, and an optical receiving device capable of inhibiting an increase in the cost and a decrease in the band at the time of multiplexing services. The optical transmitting device according to the present invention sums a plurality of binary signals that have bit rates having such relation that the bit rate of any higher speed side is twice or more integer multiples of a bit rate of any lower speed side, having smaller amplitude as the corresponding bit rate becomes higher and having matched rise and fall timings, and generates a multi-level signal, and modulates light from one light source. In other words, generating a multi-level signal as a modulation signal enables a plurality of services to be multiplexed by one transmitter. The optical receiving device according to an aspect of the present invention sets a plurality of thresholds that can be used for identifying all the amplitude values of the multi-level signal for an optical signal that is service-multiplexed by the optical transmitting device described above and compares an amplitude of the multi-level signal acquired by performing photoelectric conversion of the received optical signal with the plurality of thresholds. The optical receiving device determines bits of the multiplexed binary signal on the basis of a result of the comparison. |
| US11082129B1 |
Low power light wave communication for mobile and wearable devices
A client device, such as a mobile phone or a mobile phone accessory (e.g., phone case), is provided that receives and transmits data (e.g., a social media code) via light wave communication. The light wave communication may comprise structured light (e.g., projected light patterns). The client device may include a lightbox comprised of LEDs located on a back face of the client device. |
| US11082123B2 |
Active repeater device shared by multiple service providers to facilitate communication with customer premises equipment
An active repeater device including a first antenna array, a controller, and one or more secondary sectors receives or transmits a first beam of input RF signals from or to, respectively, a first base station operated by a first service provider and a second beam of input RF signals from or to, respectively, a second base station operated by a second service provider. A controller assigns a first beam setting to a first group of customer premises equipment (CPEs) and a second beam setting to a second group of CPEs, based on one or more corresponding signal parameters associated with the each corresponding group of CPEs. A second antenna array of the second RH unit concurrently transmits or received a first beam of output RF signals to or from the first group of CPEs and a second beam of output RF signals to the second group of CPEs. |
| US11082121B2 |
“Apparatus and method for tranfering a communication signal while storing a detected preamble pattern”
A communication apparatus includes: a reception unit that receives a communication signal; a preamble detection unit that detects a preamble pattern from the communication signal; and a transfer processing unit that, when the preamble pattern detected by the preamble detection unit is a predetermined preamble pattern, changes the preamble pattern included in the communication signal in accordance with a predetermined rule, and transfers the changed preamble pattern. |
| US11082119B2 |
Detection of weak users in beam selection for massive MIMO receiver
There is disclosed a method of operating a receiver arrangement in a radio access network. The receiver arrangement is adapted for receiving a plurality of antenna signals from a plurality of antennas, wherein the plurality of signals is collected to form a collected signal. The method includes transforming the collected signal into beam space based on a transform base, to provide a set of beams, selecting a subset of beams from the set of beams and evaluating the subset of beams for a quality requirement. If evaluating results in the quality requirement not being fulfilled, either the subset of selected beams is changed and it is returned to evaluating or the transform base is changed and it is returned to transforming. The disclosure also pertains to related methods and devices. |
| US11082114B2 |
Systems and methods for beamforming training in wireless local area networks
Presently disclosed are systems and methods for beamforming training in WLANs. In various embodiments, there are unified MIMO beamforming training procedure, which includes a training period in which an initiator transmits multiple unified training frames for performing a transmit-beamforming training of the initiator and a receive-beamforming training of one or more responders; a feedback period in which each responder replies with a beamforming-feedback response; and an acknowledgement period during which the initiator transmits respective acknowledgement frames to the one or more responders from which responses were received. Rules for restricted random access in various slots of the feedback period may be implemented, to address response contention between multiple qualifying responders. |
| US11082109B2 |
Self-learning based on Wi-Fi-based monitoring and augmentation
Technologies for attestation techniques, systems, and methods for determining an individual's movement are provided. The individual's movement is determined by passive indoor positioning technology using channel state information (CSI). A first set of data associated with an impulse or frequency response determined using channel state information (CSI) may be received from a Wireless access point located in proximity to a monitored space. A second set of data may also be received from an Internet of Things (IoT) device located in proximity to the monitored space. The first set of data may be compared to the second set of data. A profile database may be updated to replace the first set of data with the second set of data when the first and second sets of data are different. |
| US11082108B2 |
Channel state information transmission method, access network device, and terminal device
This application provides a channel state information transmission method, an access network device, and a terminal device. The method includes: receiving, by an access network device, CSI reported by a terminal device, where the CSI includes a first PMI and a second PMI; and determining, by the access network device based on the first PMI and the second PMI, a precoding matrix W whose rank is greater than or equal to 2, where W meets W=W1×W2, and the second PMI is used to indicate some column vectors in W2. According to the method in the embodiment, overheads of feeding back the CSI by the terminal device are effectively reduced. |
| US11082104B2 |
Apparatus for configuring reference signal beams based on accuracy of user equipment localization
A network node for a wireless communication system is configured to localize a user node in a first localization operation carried out at a first frequency; determine an accuracy value associated with the first localization operation; and adjust at least one beam parameter for radio beams to be used in a second localization operation based on the determined accuracy value, the second localization operation carried out at a second frequency that is greater than the first frequency. The network node is configured to determine the accuracy value associated with the first localization operation by tracking a rate of change of an angle of a radio beacon signal transmitted from the user node relative to the network node. |
| US11082103B2 |
Apparatus and method for beam management in wireless communication system
A pre-5th-Generation (5G) or 5G communication system to be provided for supporting higher data rates beyond 4th-Generation (4G) communication system, such as long-term evolution (LTE), is disclosed. The system includes an apparatus of a base station. The apparatus may include: at least one transceiver, and at least one processor connected to the at least one transceiver, where the at least one processor is configured to transmit to a terminal, configuration information of reference signals for beam management regarding a transmit (Tx) beam of the BS or a receive (Rx) beam of the terminal, transmit the reference signals to the terminal, and the configuration information comprises information related to a number of repetitions of the reference signals. |
| US11082102B2 |
Beam forming antenna
A beam forming antenna in which directivity directions of beams can be controlled at higher resolution of control is provided. The beam forming antenna includes a matrix circuit having multiple final output terminals and multiple antenna elements connected to the multiple final output terminals respectively. The matrix circuit includes a first sub-matrix, a second sub-matric, and adders which combine outputs of the first sub-matrix and outputs of the second sub-matrix. By selecting any input terminal out of the multiple input terminals of the first sub-matrix or the multiple input terminals of the second sub-matrix and inputting a signal, a signal having a predetermined phase difference between output terminals is output at the multiple final output terminals and the phase difference between output terminals has a differing value according to a selected input terminal. |
| US11082101B2 |
Channelizing and beamforming a wideband waveform
Methods, systems, and devices for channelizing and beamforming a wideband waveform are described. Generally, the described techniques provide for transmitting and receiving wideband waveforms that are beamformed on a per-channel basis during generation of the wideband waveforms. A transmitter may separate a first wideband signal into segments, with each segment bandwidth corresponding to a channel of the system bandwidth, and may map the segments to channels. The segments may be replicated to generate multiple copies of each segment. The transmitter may beamform and combine the copies of the segments to generate multiple wideband waveforms, and transmit each wideband waveform using a different antenna. A receiver may receive multiple wideband waveforms using multiple antennas and may separate each wideband waveform into segments, then beamform and de-map the segments. The techniques may be used to transmit and receive beamformed wideband waveforms over tactical data links. |
| US11082100B2 |
Signal generation method, transmission device, reception method, and reception device
A signal generation method is used in a transmission device that transmits a plurality of transmission signals from a plurality of antennas at the same frequency and at the same time, in the case where larger power change is performed on a first transmission signal than on a second transmission signal during generation process of the first transmission signal and the second transmission signal, the first transmission signal and the second transmission signal are mapped before the power change such that a minimum Euclidian distance between possible signal points for the first signal is longer than a minimum Euclidian distance between possible signal points for the second signal. |
| US11082099B2 |
Codebook sub-sampling for CSI feedback on PUCCH for 4TX MIMO
Channel state information (CSI) feedback in a wireless communication system is disclosed. User equipment transmits a CSI feedback signal via a Physical Uplink Control Channel (PUCCH). If the UE is configured in a first feedback mode, the CSI comprises a first report jointly coding a Rank Indicator (RI) and a first precoding matrix indicator (PMI1), and a second report coding Channel Quality Indicator (CQI) and a second precoding matrix indicator (PMI2). If the UE is configured in a second feedback mode, the CSI comprises a first report coding RI, and a second report coding CQI, PMI1 and PMI2. The jointly coded RI and PMI1 employs codebook sub-sampling, and the jointly coding PMI1, PMI2 and CQI employs codebook sub-sampling. |
| US11082098B2 |
Methods and apparatus for providing an adaptive beamforming antenna for OFDM-based communication systems
Methods and apparatus for providing an adaptive beamforming antenna for OFDM-based communication systems. In one embodiment, a method includes forming a matrix (A) of cyclic prefix values and a matrix (B) of tail values from an orthogonal frequency division multiplexed (OFDM) symbol, and forming a summation matrix (S) and a difference matrix (D) from the matrix A and the matrix B. The method also includes multiplying a beamformer preset matrix (W) with the matrix S and the matrix D to determine a matrix (P) and a matrix (Q), and determining a beam identifier from the P and Q matrices. |
| US11082096B2 |
Feedback techniques in wireless communications
A user equipment (UE) may be configured to communicate a number of transmissions that may each have separate feedback processes. A feedback configuration for providing feedback for such separate feedback processes may be determined based on semi-static signaling and dynamic signaling. In some cases, semi-static signaling, such as radio resource control (RRC) signaling and dynamic signaling, such as downlink control information (DCI), may together provide a feedback configuration for a particular transmission. The semi-static signaling may provide a number of bits of feedback information, an interpretation of the bits of feedback information, or combinations thereof, and dynamic signaling may indicate that one or more of the bits are to have one of a number of available interpretations, may indicate that one or more additional bits are to be included with feedback, of combinations thereof. These feedback techniques may be used to provide feedback for uplink or downlink transmissions. |
| US11082090B2 |
Time-division duplexing signal booster
A TDD signal booster includes first and second bidirectional terminals and an amplifier circuit arranged in a signal path between said first and second terminals. The amplifier circuit is to amplify TDD signals received at one of said first and second terminals for transmission from the other of said first and second terminals. The amplifier circuit is operable in a first configuration for amplifying TDD signals in one direction along the signal path and a second configuration for amplifying TDD signals in the opposite direction along the signal path. A control circuit is arranged to detect a silent period in said TDD signals, e.g. the guard period, and, in response to detecting the silent period, control said amplifier circuit to change configuration. |
| US11082083B2 |
Node having a multi-user rake receiver for use in a cooperative broadcast multi-hop network that employs broadcast flood routing and multi-hop transmission with cooperative beamforming
A node is provided that is configured to communicate in a cooperative broadcast multi-hop network that employs broadcast flood routing and multi-hop transmission using a direct-sequence spread-spectrum (DSSS) waveform. The node includes an antenna and a waveform module having a receiver processing chain. The antenna can receive a plurality of DSSS signals from other nodes on a particular channel, and output a channel that includes the plurality of DSSS signals. The plurality of DSSS signals include transmissions that are directly received from other nodes and multi-path components of those transmissions. The receiver processing chain can include a multi-user RAKE receiver that can combine, when performing demodulation processing, a plurality of transmissions directly received from the other nodes and multipath components of transmissions received from the other nodes. In some implementations, the node can perform cooperative beamforming and adaptive space-spectrum whitening. |
| US11082082B2 |
Signal calibration method, and device generated based on imbalance of I path and Q path, and storage medium
The present disclosure provides a signal calibration method, apparatus and device generated based on an imbalance of I path and Q path. The method includes sending a cosine signal and a sine signal through a signal generator, transmitting the cosine signal and the sine signal in the I path and the Q path respectively, the cosine signal and the sine signal being configured to loop back to a signal receiving direction after passing through a transmitting amplifier; processing a signal obtained by a down converter in the signal receiving direction; performing a phase adjustment and an amplitude adjustment by adjusting the signal generator, gain amplifiers of I path and Q path analog domains, and a corresponding digital domain, so as to determine an appropriate phase cancellation value and an appropriate amplitude cancellation value for an image signal; and calibrating the image signal corresponding to the signal to be calibrated. |
| US11082081B2 |
Driver for quasi-resonant communication with a mobile transponder
The application relates to methods and a driver for communication with a transponder,in particular a driver for installation in a motor vehicle and for communication with a mobile transponder for a vehicle access and/or start system of a motor vehicle, wherein the driver is designed so that, after a first transmission at a first transmission frequency and after driver-side reception of a response of a transponder at the transponder resonance frequency thereof, and after driver-side determination of the response frequency of the response using a frequency detection apparatus, said response frequency is set, in particular by changing transmission pauses, at the driver as the second transmission frequency, corresponding to the measured transponder resonance frequency, at which the driver is then intended to transmit, wherein the driver has a resonant circuit (2, 3, 4), which has a higher driver resonant frequency than the mentioned first transmission frequency and than the mentioned second transmission frequency of the driver. |
| US11082078B2 |
Detachment mechanism and indicator for mobile mount portable radio
A ruggedized mobile mount for a portable handheld radio, including a detachment mechanism and indicator for removably attaching the handheld radio to the mobile mount is disclosed. In one embodiment, the detachment mechanism includes a mechanical indicator configured to indicate an attached and detached state of the handheld radio. |
| US11082074B2 |
Systems and methods for linearized-mixer out-of-band interference mitigation
A system for linearized-mixer interference mitigation includes first and second linearized frequency downconverters; a sampling analog interference filtering system that, in order to remove interference in the transmit band, filters the sampled BB transmit signal to generate a cleaned BB transmit signal; an analog interference canceller that transforms the cleaned BB transmit signal to a BB interference cancellation signal; and a first signal coupler that combines the BB interference cancellation signal and the BB receive signal in order to remove a first portion of receive-band interference. |
| US11082073B2 |
Method and controller for controlling power amplifier in radio transmitter as well as radio unit and radio device
Method and controller are disclosed for controlling a power amplifier in a radio transmitter. According to an embodiment, a nonlinearity of the power amplifier is determined. A supply voltage to the power amplifier is controlled based on the determined nonlinearity. A radio unit comprising the radio transmitter and a radio device comprising the radio unit are also disclosed. |
| US11082068B2 |
Error correction circuit, memory controller having error correction circuit, and memory system having memory controller
An error correction circuit using a BCH code may include a decoder performing at least one of a first error correction decoding using a first error correction capability or a second error correction decoding using a second error correction capability and an encoder generating a codeword based on a message and a generation matrix corresponding to the first error correction capability and generating an additional parity based on the codeword and one or more rows of a parity check matrix corresponding to the second error correction capability, wherein a syndrome vector generated based on a read vector corresponding to the codeword is used during the first error correction decoding and an additional syndrome generated based on the additional parity is used during the second error correction decoding, and wherein the one or more rows are extended from a parity check matrix corresponding to the first error correction capability. |
| US11082063B2 |
Bit interleaver for low-density parity check codeword having length of 16200 and code rate of 3/15 and 256-symbol mapping, and bit interleaving method using same
A bit interleaver, a bit-interleaved coded modulation (BICM) device and a bit interleaving method are disclosed herein. The bit interleaver includes a first memory, a processor, and a second memory. The first memory stores a low-density parity check (LDPC) codeword having a length of 16200 and a code rate of 3/15. The processor generates an interleaved codeword by interleaving the LDPC codeword on a bit group basis. The size of the bit group corresponds to a parallel factor of the LDPC codeword. The second memory provides the interleaved codeword to a modulator for 256-symbol mapping. |
| US11082061B2 |
High-rate long LDPC codes
Methods and devices for encoding source words and decoding codewords wherein encoding a source word includes: receiving a 1×K source word row vector ū; and generating a 1×N codeword vector c=ū·G, wherein G is a K×N generator matrix derived from a parity check matrix HI; and wherein the parity check matrix HI is derived from a base parity check matrix H by applying an optimized lifting matrix to the base parity check matrix H. |
| US11082057B2 |
Dynamic common mode control
An apparatus such as an electronic circuit includes an input operable to receive an input signal; a dynamic common mode adjustor operable to: i) derive a differential signal from the received input signal, and ii) control an offset of the differential signal as a function of the received input signal to produce an offset differential signal; and an output operable to output the offset differential signal. In one arrangement, the offset differential signal outputted from the output includes a first signal and a second signal; a difference between the second signal and the first signal proportionally varies with respect to the received input signal. |
| US11082056B2 |
Analog to digital converter stage
A stage, suitable for use in an analog to digital converter or a digital to analog converter, can have a plurality of slices that can be operated together to form a composite output. The stage can have reduced thermal noise, while each slice on its own has sufficiently small capacitance to respond quickly to changes in digital codes applied to the slice. This feature allows a fast conversion to be achieved without loss of noise performance. |
| US11082055B1 |
Beamforming using fractional time delay in digitally oversampled sensor systems, apparatuses, and methods
Systems and methods are described to time delay a signal output from an analog-to-digital converter (ADC). The ADC includes a digital sensor responsive to an analog field quantity. The digital sensor is configured to output an oversampled digital output signal at a sampling clock frequency. A time delay element is configured to receive as an input, the oversampled digital output signal and to output a time delayed oversampled digital output signal. A filter is configured to receive as an input the delayed oversampled digital output signal. The filter low pass filters and decimates to a lower sample rate the delayed oversampled digital output signal. An output includes a low pass filtered decimated delayed digital output signal, where the lower sample rate is less than the sampling clock frequency. |
| US11082044B2 |
Integrated circuit including power gating cell
An integrated circuit is provided. The integrated circuit includes a power gating circuit configured to receive a power supply voltage from a first power line and to output a first driving voltage to a first virtual power line and a logic circuit electrically connected to the first virtual power line and configured to receive power from the power gating circuit. The power gating circuit includes a first p-type transistor and a first n-type transistor connected in parallel between the first power line and the first virtual power line. |
| US11082043B2 |
Memory device
A memory device comprising: a plurality of memories, a plurality of access units and a controller configured to control data from an access unit according to operation cycle different to another access unit whose form factor is different to that of the access unit. |
| US11082039B2 |
GaN transistor with integrated drain voltage sense for fast overcurrent and short circuit protection
A GaN power switching device comprises a GaN transistor switch SW_MAIN has an integrated drain voltage sense circuit, which comprises GaN sense transistor SW_SEN and GaN sense resistor RSEN, which at turn-on form a resistive divider for sensing the drain voltage of SW_MAIN to provide a drain voltage sense output VDSEN. Fault detection logic circuitry of a driver circuit generates a fault signal FLT when VDSEN reaches or exceeds a reference voltage Vref, which triggers fast turn-off of the gate of SW_MAIN, e.g. within less than 100 ns of an overcurrent or short circuit condition. During turn-off, RSEN resets VDSEN to zero. For two stage turn-off, the driver circuit further comprises fast soft turn-off circuitry which is triggered first by the fault signal to pull-down the gate voltage to the threshold voltage, followed by a delay before full turn-off of the gate of SW_MAIN by the gate driver. |
| US11082038B1 |
Gate driver isolating circuit
In one aspect, a circuit includes a gate driver having a first input connected to a first node and a second input connected to a second node; an epi diode connected to the first node; a switch connected to the first node; a capacitor having a top plate connected to the switch and a bottom plate connected to the second node; and a first clamp connected the first node and to the second node. The switch being open isolates the first node from negative transient effects from the top plate of the capacitor. |
| US11082036B2 |
Memory interface system for duty-cycle error detection and correction
A method for duty cycle error detection and correction includes receiving, during a read operation performed on a memory cell, a first data strobe signal. The method also includes generating a second data strobe signal by phase delaying the first data strobe signal. The method also includes determining, based on the first data strobe signal and the second data strobe signal, whether a duty cycle corresponding to the first data strobe signal is distorted. The method also includes adjusting a clock signal based on a determination that the duty cycle is distorted. |
| US11082035B1 |
Digitally controlled delay line circuit and method
A digitally controlled delay line (DCDL) includes an input terminal, an output terminal, and a plurality of stages configured to propagate a signal along a first signal path from the input terminal to a selectable return stage of the plurality of stages, and along a second signal path from the return stage of the plurality of stages to the output terminal. Each stage of the plurality of stages includes first and second inverters configured to selectively propagate the signal along the first signal path, third and fourth inverters configured to selectively propagate the signal along the second signal path, and a fifth inverter configured to selectively propagate the signal from the first signal path to the second signal path. |
| US11082034B1 |
Cycle accurate skew adjust
A method for cycle accurate deskewing a second clock signal with respect to a first clock signal is provided. The first clock signal has been propagated from a first clock source through a first clock tree. The second clock signal has been propagated from the first clock source through a second clock tree. The second clock tree comprises a programmable delay line for inducing a delay. The method comprises determining a first clock tree latency of the first clock tree, determining a second clock tree latency of the second clock tree, setting a cycle time of the first clock source to a measuring cycle time depending on the first clock tree latency and/or the second clock tree latency, adjusting a skew between the second clock signal and the first clock signal, setting the cycle time of the first clock source to an operating cycle time. |
| US11082031B2 |
Filter device, multiplexer, radio frequency front-end circuit, and communication device
A filter device includes a first input/output terminal and a second input/output terminal, as well as a series-arm circuit disposed on a path that connects the first input/output terminal and the second input/output terminal, and a parallel-arm circuit connected to a node on the path and a ground. At least one of the series-arm circuit or the parallel-arm circuit includes a resonance circuit, and the resonance circuit includes a first acoustic wave resonator, and a first capacitor connected in parallel to the first acoustic wave resonator, and having a greater electrostatic capacitance per unit area than that for the first acoustic wave resonator. |
| US11082030B2 |
High-pass filter and multiplexer
A high-pass filter includes: at least one capacitor located in a first pathway between input and output terminals and connected between the input and output terminals; at least one inductor, a first end of the at least one inductor being coupled to the first pathway, a second end of the at least one inductor being coupled to a ground; at least one first acoustic wave resonator located in a second pathway connected in parallel to the first pathway between the input and output terminals, the at least one first acoustic wave resonator being connected in parallel to the at least one capacitor; and at least one second acoustic wave resonator, a first end of the at least one second acoustic wave resonator being coupled to the second pathway, a second end of the at least one second acoustic wave resonator being coupled to a ground. |
| US11082028B2 |
3D-printed protective shell structures with support columns for stress sensitive circuits
In one aspect of the disclosure, a semiconductor package is disclosed. The semiconductor package includes a lead frame. A semiconductor die is attached to a first side of the lead frame. A protective shell covers at least a first portion of the first surface of the semiconductor die. The protective shell comprises of ink residue. A layer of molding compound covers an outer surface of the protective shell and exposed portion of the first surface of the semiconductor die. A cavity space is within an inner space of the protective shell and the first portion of the top surface of the semiconductor die. |
| US11082025B2 |
Joined body of piezoelectric material substrate and support substrate
A bonded body includes a supporting substrate; a piezoelectric material substrate composed of a material selected from the group consisting of lithium niobate, lithium tantalate and lithium niobate-lithium tantalate; and a bonding layer bonding the supporting substrate and the piezoelectric material substrate and contacting a main surface of the piezoelectric material substrate. The bonding layer includes a void extending from the piezoelectric material substrate to the supporting substrate. |
| US11082018B2 |
Circuit employing MOSFETs and corresponding method
A MOSFET has a current conduction path between source and drain terminals. A gate terminal of the MOSFET receives an input signal to facilitate current conduction in the current conduction path as a result of a gate-to-source voltage reaching a threshold voltage. A body terminal of the MOSFET is coupled to body voltage control circuitry that is sensitive to the voltage at the gate terminal of the MOSFET. The body voltage control circuitry responds to a reduction in the voltage at the gate terminal of the MOSFET by increasing the body voltage of the MOSFET at the body terminal of the MOSFET. As a result, there is reduction in the threshold voltage. The circuit configuration is applicable to amplifier circuits, comparator circuits and current mirror circuits. |
| US11082017B2 |
Amplifier with a compensator with a network of at least third order
An amplifier comprising a gain stage with a feedback network comprising two ports between which at least three capacitors are connected in series and between each pair of capacitors a resistor is connected to a predetermined voltage. The gain stage is provided in a feedback loop over a primary amplifier. |
| US11082015B2 |
Methods and apparatuses for reflection measurements
Techniques are provided to more accurately determine reflected power, reflection coefficient, and/or voltage standing wave to permit prompt protection of components such as power amplifiers and notify communication system operators. This is accomplished by more accurately determining an amplitude and phase of an output reflected signal at an output port of a bidirectional coupler as a function of the following: an amplitude and a phase of a coupled forward signal coupled into a forward coupled port of the bidirectional coupler; an amplitude and a phase of a coupled reverse signal coupled into a reverse coupled port of the bidirectional coupler; an electrical transmission parameter from an input port of the bidirectional coupler to the forward coupled port; an electrical transmission parameter from the input port to the reverse coupled port; and an electrical transmission parameter from an output port of the bidirectional coupler to the reverse coupled port. |
| US11082014B2 |
Advanced amplifier system for ultra-wide band RF communication
A logarithmic detector amplifying (LDA) system is provided for use as a high sensitivity receive booster or replacement for a low noise amplifier in a receive chain of a communication device. The LDA system includes an amplifying circuit configured to receive an input signal having a first frequency and generate an oscillation based on the input signal, a sampling circuit coupled to the amplifying circuit and configured to terminate the oscillation based on a predetermined threshold to periodically clamp and restart the oscillation to generate a series of pulses modulated by the oscillation and by the input signal, and one or more metamaterial (“MTM”) resonant circuits coupled in shunt with an RF path that couples the amplifying circuit in series and configured to establish a frequency of operation and a phase response to output a signal having RF frequencies with a ultra-wide bandwidth. |
| US11082009B2 |
Envelope tracking power amplifier apparatus
An envelope tracking (ET) power amplifier apparatus is provided. In a non-limiting example, the ET power amplifier apparatus includes a single ET integrated circuit (ETIC) configured to support at least a pair of amplifier circuits for amplifying different radio frequency (RF) signals. One of the amplifier circuits may be configured to amplify a respective RF signal to a higher power and thus will operate based on an ET voltage whenever possible. Another amplifier circuit, on the other hand, may be configured to amplify a respective RF signal to a relatively lower power and thus will only operate based on the ET voltage when the other amplifier circuit is inactive. By employing a single ETIC, it may be possible to reduce footprint of the ET power amplifier apparatus, thus making it possible to fit the ET power amplifier apparatus into a small form factor electronic device, such as a wearable device. |
| US11081995B2 |
Motor control device
A motor control device includes a plurality of systems capable of controlling current supply to a motor. Each microcomputer of first and second systems is configured to communicate information of the own system and the other system by inter-computer communication and has an independent ground potential. A power supply current flowing between a power supply and a power converter is assumed to be positive and negative in a power running state and a regeneration state. Each microcomputer monitors the power supply current of each system by the inter-computer communication, and executes a power supply current balancing process of limiting a current command value or a voltage command value of at least one of the two systems thereby to decrease a power supply current difference between the two systems when the power supply current difference between the two systems exceeds a target value. |
| US11081994B1 |
Semiconductor device and motor control system
A semiconductor device for vector control of an AC motor via an inverter, includes a dq-axis reference current value generator which generates dq-axis reference current values, a three-phase/two-phase converter which generates dq-axis detected current values from three-phase current values of the inverter and a rotor position of the AC motor, a current controller generates dq-axis reference voltage values by proportional control and proportional integral control based on the dq-axis reference current values, the dq-axis detected current values, a rotation angular speed of the AC motor, and a motor parameter setting value, wherein the integration controller provides an initial voltage value to an integrator before switching to the proportional integral control, and wherein the initial voltage value is based on the dq-axis reference current values, the dq-axis detected current values, the rotation angular speed, the motor parameter setting value, and one of a proportional gain and the dq-axis reference voltage values. |
| US11081992B2 |
Virtual voltage injection-based speed sensor-less driving control method for induction motor
A virtual voltage injection-based speed sensor-less driving control method for an induction motor is provided. First, a virtual voltage signal is injected into a motor flux linkage and rotating speed observer so that there is a difference between an input of the motor flux linkage and rotating speed observer and a command input of the motor. Then, based on any type of the motor flux linkage and rotating speed observer, a motor flux linkage rotation angle and a motor rotor speed are estimated, and the induction motor is driven to run normally with a certain control strategy (such as vector control). Then, based on a signal designed according to this method and injected only into the motor flux linkage and rotating speed observer, the induction motor driven by a speed sensor-less control system for the induction motor may be ensured to output 150% of a rated torque when running at a motor low synchronous rotating speed and a motor zero synchronous rotating speed, and the stability thereof may be kept for a long time. |
| US11081983B2 |
Multispeed alternating current motor
A method is for a machine having an alternating current (AC) power source with a first side (L1) and a second side (L2), two or more pairs of power switches, and one or more windings. The method comprises closing one pair of power switches by a control circuit to cause current to flow from a first side of the AC power source, through the one or more windings, and to the second side of the AC power source and closing another pair of power switches by the control circuit to cause current to flow from the second side of the AC power source, through the one or more windings, and to the first side of the AC power source. |
| US11081981B2 |
Rotating machine controller
An electronic control unit, for example, a rotating machine controller, is capable of driving one three-phase motor including a first set of three-phase winding and a second set of three-phase winding and one to three direct current motors. The direct current motor is connected to a position between one phase of the first set of three-phase winding and one phase of the second set of three-phase winding without redundancy. Inverters convert a direct current electric power to a three-phase alternating current electric power by an operation of bridge-connected plural switching elements, and apply a voltage to each phase in two sets of three-phase winding. A control unit controls a supply of electric power to the three-phase motor and to the direct current motor by controlling an operation of the switching elements. |
| US11081979B2 |
Vibration-type driving apparatus that detects undesired vibrations, control method for the vibration-type driving apparatus, storage medium, robot, pan head for image pickup apparatus, and image forming apparatus
A vibration-type driving apparatus that is capable of detecting an undesired vibration in a vibrating body more accurately than conventional detection methods even if a frequency of the undesired vibration falls inside a range of driving frequencies or is an integer multiple of a driving frequency. The driven body which is brought into contact with the vibrating body is driven by generating a driving vibration in the vibrating body through application of driving voltage to the electro-mechanical energy conversion element. An electro-mechanical energy conversion element of the vibrating body has a first sensor phase and a second sensor phase placed at different locations in the vibrating body. A vibration of the vibrating body is detected by using a result of comparison between an output signal from the first sensor phase and an output signal from the second sensor phase. |
| US11081976B2 |
Dielectric elastomer transducer and dielectric elastomer driving device
A dielectric elastomer transducer includes a dielectric elastomer function element having a dielectric elastomer layer and a pair of electrode layers between which the dielectric elastomer function element is interposed, and further includes a supporting body that supports the dielectric elastomer function element. Each of the electrode layers has one or more application regions. The dielectric elastomer function element has one or more function portions on which the application regions of the electrode layers are overlapped. The function portion is spaced away from the supporting body. With such a configuration, it is possible to avoid damaging the electrode layer and acquire a sufficient amount of expansion. |
| US11081975B2 |
Somersaulting motion of soft bodied structure
The soft bodied structures and systems for controlling such devices are described herein. The soft bodied structures can, through a series of soft hydraulic actuators, move from a first position to a second position by a somersaulting motion. The system can include connecting to a first contact point of the surface using a surface attachment. The rigidity of the controllably resistive material can then be increased. The medial hydraulic actuators can be actuated to expand the exterior medial surface, creating a bend. The device can then attach to a second contact point using the surface attachment and the end portion actuator of the unattached end portion. Then, the surface attachment of the first attached end portion can detach. The medial hydraulic actuators and the controllably resistive material can then relax, followed by detaching the surface attachment of the second attached end portion. |
| US11081974B2 |
Fault tolerant multilevel modular power conversion device
A power conversion device includes: first and second control devices that generate first and second control commands respectively; and first and second relay devices that transmit, to each sub module, the first and second control commands respectively. The first and second control devices receive instruction information indicating a system that is to control operation of each sub module. The first and second control commands each include a drive command, abnormality determination information about the control device, and instruction information. Even when the instruction information indicates a first system, each sub module selects a second system as a system to control operation of each sub module in response to detection of occurrence of abnormality to the first control device, and performs PWM control for a switching element in accordance with the drive command included in the second control command for the second system. |
| US11081973B1 |
High voltage tolerant inverter
An inverter is presented. The inverter may be configured to receive an input voltage at an input node of the inverter, and to generate an output voltage at an output node of the inverter. The inverter may comprise a first transistor coupled between a supply node and the output node of the inverter. Further, the inverter may comprise a second transistor coupled between the output node of the inverter and a reference node. The input node of the inverter may be coupled to a back-gate of the first transistor and to a back-gate of the second transistor. |
| US11081968B2 |
Isolated boost converter
An isolated boost converter includes a transformer, a first bridge arm, a second bridge arm, and a boost circuit. The transformer includes a secondary side having a secondary side first contact and a secondary side second contact. The boost circuit includes two diodes—anodes of the two diodes are mutually coupled to a first contact and cathodes of the two diodes are coupled to a first bridge arm upper contact and a second bridge arm upper contact, two diodes—cathodes of the two diodes are mutually coupled to a second contact and anodes of the two diodes are coupled to a first bridge arm lower contact and a second bridge arm lower contact, the second contact is coupled to the first contact, and at least two capacitors are coupled to the secondary side first contact and the secondary side second contact. |
| US11081958B2 |
DC-DC converter with current loop gain
A converter system includes a first switch, a first sensing unit configured to generate a first sensed signal proportional to a current through the first switch, a second sensing unit (118) configured to generate a second sensed signal based on a difference between a reference voltage and a feedback voltage, a DC compensation unit configured to generate a slope peak DC signal relative to a slope peak of a slope compensation signal, and a signal combination unit configured to generate a control signal based on the first and second sensed signals, the slope compensation signal and the slope peak DC signal to switch off the first switch. |
| US11081957B2 |
Power converter with multi-mode timing control
A converter circuit includes a power stage circuit configured to convert an input voltage to an output voltage provided at an output, and a control circuit configured to control the power stage circuit. The control circuit is configured to operate in one of a pulse frequency modulation (“PFM”) mode and a pulse width modulation (“PWM”) mode depending on a current supplied to the output. The control circuit includes a multi-mode timer circuit configured to provide a switching signal to set an off time for each switching cycle of the power stage circuit during the PFM mode and during the PWM mode. |
| US11081956B2 |
Thermoelectric generator with starting circuit
A thermoelectric generator includes a voltage source including a thermoelectric element, a starting circuit connected to the voltage source, a DC to DC converter circuit connected to the voltage source, an output connected to the starting circuit and connected to the DC to DC converter circuit, and a controller having an input connected to the voltage source, and outputs connected to the starting circuit and to the DC to DC converter circuit. The controller deactivates the starting circuit and activates the DC to DC converter circuit when a voltage at the output or when a voltage provided by the voltage source rises above a predefined upper voltage threshold. Additionally, the controller reactivates the starting circuit and deactivates the DC to DC converter circuit when a voltage at the output or when a voltage provided by the voltage source drops below a predefined lower voltage threshold. |
| US11081949B2 |
Electrical device
An electrical device includes a brushless one-phase driving motor which drives a mechanical unit. The brushless one-phase driving motor includes a motor rotor which is radially permanently magnetized and which rotates around a rotational rotor axis, a non-symmetric stator back-iron structure which includes a rotor opening for the motor rotor and a lateral bridge portion which magnetically connect two stator poles, a single stator coil which surrounds the lateral bridge portion, a pole separation gap arranged radially opposite to the lateral bridge portion, the pole separation gap magnetically separating the two stator poles, an electronic control device which drives the single stator coil, and a single hall sensor which is electrically connected to the electronic control device. The single hall sensor is arranged approximately radially opposite to the single stator coil with respect to the rotational rotor axis. |
| US11081948B2 |
System and method for in-vehicle resolver alignment
An electric drive system for a vehicle includes a speed/position feedback device coupled to an electric machine and configured to provide an index pulse. The system further includes an inverter having a line voltage sensor. The system includes a controller programmed to, responsive to the electric machine rotating at a generally constant speed without commanding the inverter, generate a resolver offset from a time difference between a zero crossing of a line voltage and the index pulse and operate the inverter according to the resolver offset. |
| US11081947B2 |
Claw pole brushless synchronous machine
A claw pole synchronous machine includes a housing and a rotor being rotatable relative to the housing and having a plurality of first claw poles circumferentially alternating with a plurality of second claw poles. The plurality of first claw poles are axially overlapping with the plurality of second claw poles. At least two DC excitation coils are fixed relative to the housing and configured to provide a magnetic field to the rotor. A stator is fixed to the housing. |
| US11081945B2 |
Manufacturing method for stator coil
Provided is a manufacturing method for a stator coil in which end portions of one-side conductor segments inserted into slots from the side of one end in an axial direction of a stator core and end portions of other-side conductor segments are connected to each other through coupling members inside the slots. The method includes: pressing in the one-side conductor segment or the other-side conductor segment in an insertion direction in a state where the end portion of the one-side conductor segment or the end portion of the other-side conductor segment, or an end portion of the coupling member has been moved toward the inner circumferential side of the stator core; connecting the end portion of the one-side conductor segment and the end portion of the other-side conductor segment to each other; and executing the pressing in and the connecting sequentially from the outer circumferential side of the stator core. |
| US11081944B2 |
Wound rotor or stator and method for manufacturing same
A method for manufacturing a wound rotor or stator having more than four poles, preferably a rotor, the rotor or stator having teeth provided with pole shoes. The method includes the following steps, for each pole: (a) producing a partial winding by winding at least one conductor over the portion of the tooth of this pole extending axially along this pole between the pole shoes of this pole and a plane (Pmin) at right angles to the axis of the pole and tangential to a pole shoe of an adjacent pole, (b) pushing back the duly produced partial winding towards the base of the tooth, and freeing said portion of the tooth having been used for the winding, and (c) repeating step (a) to produce another partial winding on the duly released portion of tooth. |
| US11081943B2 |
Distributed stator winding
A method of forming a stator for an electric machine includes forming a first conductor and a second conductor into a plurality of bends having a first winding pitch, creating a winding layer by introducing the first conductor and the second conductor into a first pole of a stator with the second conductor being on top of the first conductor at a first end loop crossing zone. The winding pitch of the first conductor is changed to a second winding pitch and the winding pitch of the second conductor is changed to a third winding pitch. The first conductor is woven relative to the second conductor between the first pole and a second pole. The first conductor and the second conductor are introduced into the second pole of the stator with the first conductor being on top of the second conductor at a second end loop crossing zone. |
| US11081938B2 |
Stator
A stator includes: a stator core, the stator core including a plurality of slots arranged in a circumferential direction of the stator core and recessed in a radial direction of the stator core; a coil disposed in each of the slots; an insulating heat-dissipating member disposed between the stator core and the coil on one of two side surfaces of the slot in the circumferential direction of the stator core; and an insulating foaming member disposed between the stator core and the coil on the other of the two side surfaces of the slot in the circumferential direction of the stator core. |
| US11081937B2 |
Integrated motor drive and integrated heat dissipation system
An integrated motor drive includes a frame assembly, a motor, a motor driver and a heat dissipation assembly. The frame assembly includes a first frame and a second frame. The motor is installed on the first frame. The motor driver is installed on the second frame. The heat dissipation assembly includes a motor heat exchange pipe, a motor driver heat exchange pipe, and a heat dissipation pipe. The motor heat exchange pipe is embedded in the first frame, and located at one side portion of the motor for performing heat exchange with the motor. The motor driver heat exchange pipe is embedded in the second frame for performing heat exchange with the motor driver. The heat dissipation pipe is located at an end portion of the motor, and communicated with the motor heat exchange pipe and the motor driver heat exchange pipe. |
| US11081935B2 |
Vehicle drive device for lubrication a power transmission and cooling a rotating electric machine
A vehicle drive device is provided with a lubricating path including a first oil pump to pump up an oil stored in the casing by the first oil pump and to supply the oil to the power transmission mechanism for lubricating the power transmission mechanism, and a cooling path that is separated from the lubricating circuit and provided for the rotating electric machine, the cooling path including a second oil pump to pump up the oil stored in the casing by the second oil pump to supply the oil exclusively to the rotating electric machine for cooling the rotating electric machine, the second oil pump is an electric oil pump, and the cooling path is provided with an oil cooler cooling the oil to be supplied to the rotating electric machine. |
| US11081934B2 |
Fin-cooled axial flux rotating electrical machine, and applications thereof
Embodiments involve rotors for axial flux induction rotating electric machines that use a soft magnetic composite for the rotor core. A first embodiment is directed to a rotor for a rotating electrical machine that transmits magnetic flux parallel to a shaft of the rotor. The rotor includes a rotor winding and a plurality of cores. The rotor winding consists of a solid piece of conductive material that comprises a plurality of cavities. Each core is placed in a respective cavity and comprises a highly resistive isotropic ferromagnetic powder. |
| US11081931B2 |
Rotating energy storage apparatus and method of imparting rotational motion of a vessel containing the same
An energy storage apparatus including a spherical rotating member having permanent magnets and uniquely-identifiable location-defining elements, a plurality of coils, a controller operably coupled to the plurality of coils, a power source, and a location sensing apparatus operable to detect the plurality of location-defining elements. The controller may compare time-sequential information from the location sensing apparatus to determine a rotational axis and a rotational speed of the rotating member, operate the coils to change the rotational axis speed of the rotating member, increase energy stored by the rotating member by increasing the rotational speed by operating the coils to generate magnetic fields that interact with the permanent magnets, and withdraw energy by operating the coils to generate magnetic fields that interact with the magnetic fields of the permanent magnets to produce induced current in the coils and directing the induced current to a power delivery location. |
| US11081929B2 |
Motor
A motor includes a bearing holder and a first bearing. The bearing holder is fixed to a casing. The first bearing is interposed between the bearing holder and a shaft. The bearing holder includes a holder main body made of a resin and a ring made of a metal. The holder main body includes, around the central axis, a first arcuate portion including one or a plurality of through-holes passing therethrough in an axial direction and a second arcuate portion that does not include a through-hole. The first arcuate portion occupies a range of about ⅓ or more of a total circumference of the holder main body in a circumferential direction. An outer ring of the first bearing is held by the ring. |
| US11081927B2 |
Busbar assembly for an electric motor
A busbar assembly for an electric motor may include a busbar holder at least a portion of which is made of an electrically insulating material, and at least one busbar mounted on the busbar holder. The busbar may include a base portion extending along a mounting surface of the busbar holder, at least one coil connection terminal portion to be electrically connected to a coil of the electric motor, and a power source connection terminal portion to be electrically connected to a power source. The power source connection terminal portion may extend from the base portion and at least a portion of the base portion may include a resilient member allowing displacement of the power source connection terminal portion towards the busbar holder. |
| US11081926B2 |
Inner-rotor motor and stator thereof
An inner-rotor motor including a housing, a stator and a rotor avoids damage to the coil unit which often occurs during assembly of the conventional inner-rotor motor. The housing has an inner periphery provided with a plurality of protrusions. The iron core has an outer periphery provided with a plurality of notches. The insulating sleeve includes a plurality of positioning members. In radial directions perpendicular to the shaft, each of the plurality of notches is spaced from a center of a shaft at a minimal distance, and each of the plurality of positioning members is spaced from the center of the shaft at a maximal distance. The maximal distance is smaller than the minimal distance. |
| US11081924B2 |
Method and apparatus to reduce losses in a compact high speed generator
A retention component for retaining a coil in a slot of a stator for a generator having a rotor includes a first segment and a second segment, both of which are configured to be inserted into the slot. At least one of the first and second segments is made entirely of laminated sheets that together form a unitary structure of magnetic material. At least one of the first and second segments has an interfacing surface configured to directly interface a rotor surface in the absence of a structure therebetween. A channel is between the first and second segments, and a third segment that extends along and within the channel. The third segment is less magnetic or non-magnetic than at least one of the first and second elements. |
| US11081919B2 |
Electric machine with metallic shield rotor
A rotor for an electric machine has a permanent magnet carrier that defines a plurality of permanent magnet receptacles. A plurality of permanent magnets are received in the receptacles. The magnets are arranged to define at least two magnetic poles of the rotor. A metallic shield surrounds an outward facing surface of the permanent magnets to shield the magnets from high frequency magnetic fields that would cause eddy currents, and thus magnet heating. The metallic shield is constructed from a metallic foil. A carbon fiber retaining sleeve surrounds an outward facing surface of the metallic shield. The carbon fiber sleeve is configured to retain the magnets to the permanent magnet carrier during operation of the electric machine. The permanent magnet carrier is interference fit over a rotor core. |
| US11081916B2 |
Rotor device for an electric motor and/or generator, rotor and motor with such a rotor device as well as production method
A rotor device for an electric motor and/or generator with a rotor body and a plurality of magnets, wherein the rotor body comprises a rotor shaft seat and a plurality of magnet receptacles arranged coaxially with the rotor shaft seat. The magnets are rigidly positioned and mounted in the magnet receptacles by means of a plastic molding compound injected into the magnet receptacles, which plastic molding compound forms at least one cover element that covers the openings of the magnet receptacles at least partially. The cover element comprises at least one magnet wheel centering means and/or at least one magnet wheel alignment means. The invention furthermore relates to a rotor and a motor with such a rotor device as well as to a production method. |
| US11081915B2 |
Rotor device for an electric motor and/or generator, rotor and motor with such a rotor device as well as production method
A rotor device for an electric motor and/or generator with a rotor body and a plurality of magnets, wherein the rotor body comprises a rotor shaft seat and a plurality of magnet receptacles arranged coaxially with the rotor shaft seat. The magnets are rigidly positioned and mounted in the magnet receptacles by means of a plastic molding compound injected into the magnet receptacles, which plastic molding compound forms at least one cover element that covers the openings of the magnet receptacles at least partially. The cover element comprises at least one magnet wheel centering means and/or at least one magnet wheel alignment means. The invention furthermore relates to a rotor and a motor with such a rotor device as well as to a production method. |
| US11081913B2 |
Metal ribbon stator and motor comprising same
A stator made from a ribbon of metal having multiple layers of slit metal, and motors made therefrom are described. A ribbon having multiple layers of metal is formed into a stator such as by flattening or pleating the ribbon to form each pole of a stator having a plurality of stator teeth, or poles. The stator formed from the metal ribbon may be configured into any suitable type of motor, such as an axial transverse flu motor. A magnetic flu return may also be made out of metal ribbon. |
| US11081912B2 |
Wireless power receiver and wireless power transmission system
Disclosed herein is a wireless power receiving device including a detection circuit that detects a circuit characteristic value of the power receiving circuit and a position detection circuit that detects a state of the relative position between the power receiving coil and the power transmitting coil. The position detection circuit determines that the power receiving coil exists near the periphery of a position suitable for receiving power when the circuit characteristic value exceeds a first threshold value set between the peak value of the second peak and a detection limit value of the detection circuit, and calculates transmittable power from the wireless power transmitting device based on the circuit characteristic value, when the circuit characteristic value detected by the detection circuit exceeds a second threshold value set between the peak value of the second peak and the peak value of the first peak. |
| US11081911B1 |
Enhanced wireless power transfer
Wireless power transfer devices may be configured to negotiate with each other to operate. For example, a wireless power standard may provide for various levels of power delivery, various frequencies for power transfer, various operating voltages, and so forth. There may be instances in which it is desirable to provide wireless power transfer devices (both PTx and PRx) that are capable of enhanced performance when paired with a compatible device. For example, devices can be configured to operate at higher or more granular power levels, different frequencies, and so forth. |
| US11081909B2 |
Multi-mode wireless charging system
A power transfer system for providing charging power to a power receiver is disclosed. The system comprises a hardware controller circuit, a first filter circuit, and a second filter circuit. The hardware controller circuit is configured to determine a first frequency for providing power from a first power transmitter to the power receiver via a first wireless field. The first filter circuit is operationally coupled to the hardware controller circuit and has a first frequency bandpass configured to pass a first driver signal for generating the first wireless field at the first frequency. The second filter circuit is operationally coupled to the hardware controller circuit and has a second frequency bandpass configured to pass a second driver signal for generating a second wireless field at a second frequency that is different from the first frequency. |
| US11081907B2 |
Techniques for determining distance between radiating objects in multipath wireless power delivery environments
Techniques are described herein for determining the distance from, to or between radiating objects in a multipath environment. For example, embodiments of the present disclosure describe techniques for determining the distance between an antenna array system (or wireless charger) and a wireless power receiver in a multipath wireless power delivery environment. Calibration techniques are disclosed that account for and/or otherwise quantify the multipath effects of the wireless power delivery environment. In some embodiment, the quantified multipath effects modify the Friis transmission equation, thereby facilitating the distance determination in multipath environments. |
| US11081904B1 |
Methods, systems and installations for the compression, expansion and/or storage of a gas
This method is used to manage a pressure accumulator (1) as a component of an energy storage system, consisting of a work machine (4), a collecting tank (7), a displacement apparatus (6) and a pressure accumulator (1) for storing a pressurised gaseous medium. The pressure accumulator (1) is partially filled with a liquid medium so as to be able to control the gas storage volume therewith. Feeding compressed gas (3) into the pressure accumulator (1) involves removing liquid (2). Removing compressed gas (3) from the pressure accumulator (1) involves feeding in liquid (2) so that the storage pressure is kept under control as necessary, in particular is kept constant. To this end, one pressurised unit of gas (3) is introduced into the pressure accumulator (1) with the removal of one unit of liquid (2) from the pressure accumulator (1) by means of the displacement apparatus (6) and vice versa. The present method and the present arrangement make it possible to fill the pressure accumulator (1) completely with and to empty the pressured storage unit (1) completely of pressurised gas (3) at a controllable pressure, which leads to improved utilisation of the pressure accumulator volume and thus increases the energy density of the energy storage system. The method further makes it possible to operate the energy storage system at a constant operating point, thus increasing the efficiency of the individual components and of the entire system, and minimising the compression and expansion processes in the pressure accumulator (1). |
| US11081903B2 |
Protection methods and switches in uninterruptible power supply systems
In at least one embodiment, a system may include a plurality of uninterruptible power supplies (UPSs), a ring bus, a plurality of chokes, with each choke of the plurality of chokes electrically coupling an associated UPS of the plurality of UPSs to the ring bus, and at least one switch electrically coupled between at least one UPS of the plurality of UPSs and the ring bus, with the at least one switch having an opening time of less than 10 milliseconds. |
| US11081899B2 |
Battery system
A battery system includes a battery circuit group in which a plurality of battery circuits, each including a plurality of battery units including a battery and a switching unit connected in series, are connected in parallel, and a control unit that controls the switching unit. The switching unit switches a state of the battery unit between a first state, in which the battery is connected between a positive electrode end and a negative electrode end of the battery unit, and a second state, in which the positive electrode end and the negative electrode end are connected without the battery. When discharging, the control unit controls the switching unit such that the state of the battery unit including the battery determined to be not fully discharged becomes the first state, and the state of the battery unit including the battery determined to be fully discharged becomes the second state. |
| US11081897B2 |
High speed feedback adjustment of power charge/discharge from an energy storage system
The invention provides systems and methods for control of power charge/discharge from energy storage system. The invention also provides for power monitoring and management, including power management for a variable generator. An intelligent charge system may include a premise sensor, a variable generator sensor, one or more energy storage units, and a controller, which may receive information about the power demand, power provided by an electricity provider, and charge/discharge information from an energy storage unit. The information received may all be time synchronized in relation to a time based reference. The controller may provide instructions to an energy storage unit at a rapid rate. |
| US11081893B2 |
Removable high voltage battery components
A removable vehicle battery system includes an energy storage module, a charging/discharging control unit, converter configured to convert the energy into a usable format for an external device, and a power outlet configured to supply energy to the external device. The system communicates with the external device regarding the energy formats the external device requires as well as the quantity of energy in the energy storage module, and the formats in which the energy storage module can supply this energy to the external device. The control unit controls energy delivery from the energy storage module to the external device. |
| US11081892B2 |
Electric energy transmission circuit
An electronic or electromechanical system including at least one electrical energy source, a first circuit capable of operating in at least two operating modes, one of which corresponds to the stopping of the application circuit, and a circuit for transmitting the electrical energy from the energy source to the application circuit, the transmission circuit being further capable of determining a first value of the maximum instantaneous electric power capable of being supplied by the energy source, of determining a second value of the instantaneous electric power consumed by the application circuit in at least one of the operating modes, and of storing the first and second values or of selecting the operating mode of the application circuit from among said at least two operating modes based on the first and second values. |
| US11081890B2 |
Power generation system of a multi-converter wind turbine and control method thereof
Wind turbine comprising a plurality of converters, which are dynamically switched between at least a first standby state, a second running state, and a third state with an active direct current link. Converters are switched from the first standby state to the third state when a required reactive power is higher than a reactive power capability of converters on the second running state and when a voltage transient occurs. |
| US11081888B2 |
Method, apparatus, and medium for calculating capacities of photovoltaic power stations
The present disclosure provides a method, an apparatus, and a medium for calculating capacities of a plurality of photovoltaic power stations. The method includes: receiving a plurality of historical weather data sets from the plurality of weather monitoring stations; determining a scene year based on the plurality of historical weather data sets; receiving an actual generating capacity of each photovoltaic power station predicted by a power system dispatch center; extracting weather data of each photovoltaic power station in the scene year from the corresponding historical weather data set; obtaining an available generating capacity of each photovoltaic power station in the scene year based on the weather data; and determining a capacity of each photovoltaic power station in the scene year according to the actual generating capacity and the available generating capacity of each photovoltaic power station. |
| US11081887B1 |
Systems and methods utilizing AC overbuilt renewable electric generation resource and charge storage device providing desired capacity factor
An integrated renewable energy source (RES) and energy storage system (ESS) facility configured to supply power to an AC electrical grid includes energy storage system capacity and inverter capacity that are larger than a point of grid interconnect (POGI) limit for the facility, enabling high capacity factors and production profiles that match a desired load. At least one first DC-AC power inverter is associated with RES, and at least one second AC-DC power inverter is associated with the ESS. AC-DC conversion is used when charging the ESS with RES AC electric power, and DC-AC conversion utility is used when discharging ESS AC electric power to the electric grid. Aggregate DC-AC inverter utility exceeds the facility POGI limit, and excess RES AC electric power may be diverted to the second inverter(s). |
| US11081886B2 |
Method for detecting formation of a separate system
A method for controlling a generating unit that feeds into an electrical supply system. The generating unit feeds into the electrical supply system using one or more converters or inverters. The method is provided for the purpose of detecting a system separation or formation of a separate system, and the method includes controlling the feed by a feed controller operating with at least one current controller, detecting at least one current control error and testing the detected current control error for a disparity from a predetermined reference range. The method includes identifying a system separation involving a separate system that is disconnected from the electrical supply system and to which the generating unit is connected if a disparity from the predetermined reference range has been detected. |
| US11081877B2 |
Back-up overload protection scheme for solid state controller
A power distribution system comprises a first power distribution unit coupled to an electrical power source and a second lower power distribution unit serially coupled to the first distribution unit and configured to supply to power to one or more loads. The first and second distribution units each comprise at least one solid state power controller configured to control current flow through the respective first and second distribution units. The first distribution unit further comprises control means configured to receive and analyze data related to measurements of downstream current and to interrupt the power within the first distribution unit when the received current measurements exceed a predetermined threshold. The system further includes a current monitoring component configured to measure the current flow to, or within, the second distribution unit, the current monitoring component configured to transmit current data to the control means within the first distribution unit for analysis. |
| US11081876B2 |
Control circuit for an input filter capacitor in a switch-mode power supply
One or more embodiments relate to a control circuit for an input filter circuit in a switch mode power supply comprising a power switch and a switch controller to control the power switch to provide a regulated output voltage and current to a load. The control circuit, also referred to as a filter control circuit, can be used to detect a high voltage surge at its input and disconnect a capacitor in the input filter circuit from an input return, thereby protecting the input filter capacitor and the SMPS from damage. According to certain aspects, the control circuit can be integrated with the switch controller. Additionally, the control circuit can provide power to the switch controller at start-up. |
| US11081874B2 |
System, method, and apparatus for power distribution in an electric mobile application using a combined breaker and relay
A mobile application including a motive power circuit including a power storage device and an electrical load electrically coupled through a power bus; a power distribution unit (PDU) electrically interposed between the power storage device and the electrical load, wherein the PDU comprises a breaker/relay positioned on one of a high side and a low side of the power storage device; wherein the breaker/relay comprises: a fixed contact electrically coupled to the power bus; a movable contact selectively electrically coupled to the fixed contact; an armature operationally coupled to the movable contact; a first biasing member biasing the armature into one of the first position or the second position; and a means for adjusting a down force value of the movable contact during run-time operations of the motive power circuit, wherein the down force value biases the moveable contact into electrical coupling with the fixed contact. |
| US11081872B2 |
Method for localising an earth fault of a fire protection system
The invention proposes a method for localizing a ground fault of a fire protection system and also a fire alarm and/or extinguishing control panel comprising a plurality of connection points, a central unit and a ground fault identification module, wherein one or more subscribers can be connected to each connection point via a connection line. The method comprises, during or after identification of a ground fault by the ground fault identification module, the following steps: disconnecting the connection lines of one, more or all of the connection points by opening switching elements until at least no ground fault is identified by the ground fault identification module, and then connecting the connection lines successively for each connection point by closing the respective switching element. |
| US11081867B2 |
Avionics power management panel and door assembly
An avionics power management panel and door assembly where the panel includes a cabinet including a set of walls at least partially defining an interior with an open face and door assembly includes a central panel a front panel that includes a set of rows with apertures formed between two adjacent rows and where the set of rows have a crimped profile. |
| US11081866B2 |
Adjustable width power distribution block
An electrical distribution block includes a first base, a second base, and a spacer plate discrete from the first and second base. The spacer plate is positioned between first base and the second base and secures the first base to the second base. A conductor block is connected to at least one of the first base or the second base. The conductor block includes a primary tap and a secondary tap. |
| US11081863B2 |
Optical device and method for controlling such a device
An optical device comprises a light input, a light modulating means and a light output. The optical device further comprises an optical amplification device arranged to amplify light travelling between said light modulating means and said output. The optical amplification device comprises first and second serially connected post SOA (Semiconductor Optical Amplifier) units, each comprising at least one respective serially connected post SOA segment, which device is arranged to vary a light amplification by varying respective SOA bias voltages across said post SOA segments. A total SOA length of the first post SOA unit is relatively longer than a total SOA length of the second post SOA unit, which is relatively shorter. The optical device is arranged to, during operation using a particular operation program, always keep respective SOA bias voltages across each of the post SOA segments of the first post SOA unit at +0.5 V or more. |
| US11081860B2 |
Integrated broadband chaotic semiconductor laser using optical microcavities
The present invention discloses an integrated broadband chaotic semiconductor laser using optical microcavities. The arc-shaped hexagonal laser outputs light. Part of the light is totally reflected through the deformed microcavity and then reflected out of the deformed microcavity from the passive waveguide II; after entering the passive feedback waveguide, another part of the light is fed back into the deformed microcavity by the high reflection film, passes through an in-cavity ray track and then is also reflected out of the deformed microcavity from the passive waveguide II; the two-path light is coupled into the arc-shaped hexagonal laser, and finally generated chaotic laser light is directionally coupled and output through the passive waveguide I at the other end of the arc-shaped hexagonal laser. The present invention has wide broadband, flat spectrum, compact structure, and no time delay signature. |
| US11081852B2 |
Laser light energy and dose control using repetition rate based gain estimators
A laser system's laser light energy control and resulting dose control is improved by creating and using a set of gain estimators, one for each of a set or range of laser light pulse repetition rates. When a new repetition rate is used, its corresponding gain estimator is retrieved, used to compute the voltage to fire the laser source, and updated. The resulting generated laser light thereby avoids the convergence delay inherent in prior laser systems and, further, can repeatedly do so with subsequent specified repetition rates. |
| US11081851B2 |
LMA fibers for suppression of thermal mode instability
An optical fiber, such as in some instances a high-power, diode-pumped, dual-clad, ytterbium-doped fiber amplifier (YDFAs), having a fundamental mode and at least one higher order mode, wherein the higher order mode or modes have mode areas that are substantially larger than a mode area of the fundamental mode. |
| US11081846B2 |
Connectors
In an example, a connector may comprise a female connection port including a first power trace and a first signal trace disposed within the female connection port, and a male connection plug rigidly attached to the female connection port and disposed adjacent to the female connection port. The male connection plug may include a second power trace and a second signal trace disposed on an outer surface of the male connection plug. |
| US11081845B2 |
Vacuum pump, and connector and control device applied to vacuum pump
A vacuum pump has a hermetic connector disposed on a base of a body of the vacuum pump. The hermetic connector has a plurality of pins connected to a plurality of electrical cables leading to the inside of the pump body. The connector is longer in a lateral direction than in an axial direction so that the connector is horizontally long in a circumferential direction of the pump body. |
| US11081840B2 |
Detection circuit applied to a connecting port
A detection circuit is provided, including a connector and a processing circuit. The connector comprises a first detection terminal and a second detection terminal. The second detection terminal is electrically connected to a first reference potential. The processing circuit is electrically connected to the first detection terminal and is used for receiving a power supply signal. When the connector is connected to a connecting port, the first detection terminal is electrically connected with the second detection terminal through the connecting port to form an electrical loop, so that the processing circuit detects a detection potential on the first detection terminal, and then determines whether the connector is correctly connected to the connecting port. |
| US11081836B2 |
Circuits and methods for wearable device charging and wired control
Methods and devices for wired charging and communication with a wearable device are described. In one embodiment, a symmetrical contact interface comprises a first contact pad and a second contact pad, and particular wired circuitry is coupled to the first and second contact pad to enable charging as well as receive and transmit communications via the contact pads as part of various device states. |
| US11081832B2 |
Terminal sealing member, method of producing the same, and connector including the same
A terminal sealing member is provided which includes a shaft portion and a flange disposed on the shaft portion and attached to a terminal slidable in a front-rear direction, an urging member which is attached around the shaft portion and urges the flange forward, an elastic tubular member which includes a central hole into which the shaft portion is slidably inserted and has the urging member embedded therein, and an elastic adhering member which includes a central hole into which the shaft portion is slidably inserted and is attached to front and back ends of the elastic tubular member. |
| US11081830B2 |
Seal part and connector
A seal part includes an elastic body that is in close contact with outer peripheral surfaces of a plurality of wires and an inner peripheral surface of a wire accommodation portion, and a rigid body that has an outer peripheral surface disposed to face the inner peripheral surface of the wire accommodation portion. The rigid body has a plurality of wire through holes allowing wires to coaxially pass through respectively. The elastic body includes first seal portions that respectively correspond to the wire through holes, and that are in close contact with the outer peripheral surfaces of the wires passing through the wire through holes, and a second seal portion that is in close contact with the inner peripheral surface of the wire accommodation portion in the wire accommodation portion. |
| US11081829B2 |
Connector
A connector includes a housing including a terminal accommodating chamber to accommodate a terminal, and a tubular portion to surround an insertion opening, through which the terminal enters the terminal accommodating chamber, the tubular portion including an opening portion, a water stop member to prevent water from passing through the insertion opening and a holding member to be inserted from the opening portion such that the water stop member is placed between the insertion opening and the holding member, the holding member retaining the water stop member inside the tubular portion. The holding member includes a projection on an outer surface of the holding member toward an inner peripheral surface of the tubular portion at an end portion of the holding member, the end portion is close to the opening portion of the tubular portion when the holding member is fitted in the tubular portion. |
| US11081825B1 |
Double-pole butting connector
A double-pole butting connector has a male connector and a female connector. The male connector has at least one first pole with a first front side and a first back side. The female connector having at least one second pole with a second front side and a second back side. The first pole and the second pole have an identical thickness. The second pole is placed in an insertion groove, and the insertion groove has a positioning strip facing the second back side of the second pole, and the positioning strip makes contact with the second back side with an allowable deformation angle between the positioning strip and the second back side. |
| US11081824B2 |
Contact element and contact system
A contact element comprises a contact box extending in a longitudinal direction of the contact element and delimiting a receptacle. The contact box includes a first box section, a second box section, a third box section arranged opposite the first box section, and a fourth box section arranged opposite the second box section. The second box section and the fourth box section each connect the first box section to the third box section. The first box section and the third box section are each configured in an elastic manner and the second box section and the fourth box section are each configured in a rigid manner. The second box section and the fourth box section are each inclined with respect to the first box section. |
| US11081823B2 |
Conductive terminal and electrical connector
A conductive terminal includes a first terminal and a second terminal stacked on the first terminal. The first terminal has a plurality of first contact portions at an end of the first terminal. A gap is formed between two adjacent first contact portions. The second terminal has a second contact portion at an end of the second terminal. At least a part of the second contact portion extends through the gap of the first terminal. |
| US11081818B2 |
Method and sleeve for connecting power-electronics structural elements and printed circuit boards
Mechanical and electrical connection is established between a power-electronics structural element and a circuit board. The circuit board has a bore and an electrical contact area encircles the bore. The power-electronics structural element has a mechanical fastening option and an electrical contact area encircles this fastening option at a point to be connected to the circuit board. A cylinder with a head on one end is inserted into the bore of the circuit board to achieve the mechanical connection, and a sleeve formed from an electrically conductive material surrounds the cylinder. Electrical contact areas of the power-electronics structural element and the circuit board are connected electrically by the sleeve. The mechanical connection is formed by an interlocking connection of the cylinder and the fastening option of the power-electronics structural element. |
| US11081816B2 |
Rail-mounted building automation device
The invention relates to a rail-mounted building automation device adaptable to space and communication requirements, comprising a communications module having a communications bus, an application module that implements the functionality. A bus connector supplies power and transferring data. The communications module includes a first casing having ten bus connector pins, a lower body with the communications bus, having a wall further forward than another in relation to a user. The application module includes a second casing with a pin-receiving connector having three terminals, a first projection separated from a second projection at approximately the width of the rail, in use when the ten pins are introduced into the receiving connector and an upper body of the first casing is introduced into a third recess of the second casing, with both being joined by a securing apparatus. |
| US11081815B2 |
Electrical power or data distribution system
An electrical power or electronic data distribution system includes a power supply or electronic data module that receives electrical power or electronic data signals from a source, a flat-conductor strip for routing electrical power or electronic data along a generally planar surface such as a floor, wall, room divider, or ceiling, and a power or data output block. The power supply has a pair of power outfeed conductors, and the flat-conductor strip has a pair of generally planar electrical conductors in spaced arrangement, which are electrically coupled to respective power outfeed conductors. The output block has a pair of power-receiving contacts along a lower surface thereof, and an electrical receptacle at the output block, the receptacle being positioned above the lower surface. The power-receiving contacts electrically engage respective planar electrical conductors and convey electrical power to respective contacts of the electrical receptacle, for powering electrical or electronic devices. |
| US11081813B2 |
Connector comprising a trminal fitting having intersecting extension portions
A connector is provided that is easy to assemble. A terminal fitting is arranged on a base of a housing, a conductor portion is inserted into a tubular portion of a conductor connection portion, and a lid portion is assembled on the base. Thus, an insertion portion is inserted between extension portions to that intersect each other, and a diameter of the tubular portion is reduced. The conductor portion is tightened by the tubular portion, and the conductor connection portion is connected to the conductor portion. Therefore, a dedicated machine is not required to connect the terminal fitting to an electric wire, and operation of connecting the terminal fitting to the electric wire and of accommodating the terminal fitting in the housing can be performed substantially simultaneously. Thus, the connector can be easily assembled. |
| US11081812B2 |
Electric wire with terminal
An electric wire with a terminal includes an electric wire having a core wire and a covering, a crimp terminal including a core wire crimp portion crimped to the core wire and a covering crimp portion crimped to the covering, and a resin that integrally covers a range from a tip of the core wire to side surfaces of the covering crimp portion. The covering crimp portion includes a bottom wall portion, a first crimping piece, and a second crimping piece. The covering crimp portion has a configuration in which each of the bottom wall portion, the first crimping piece, and the second crimping piece is in close contact with the covering. |
| US11081808B2 |
Antenna having radiation structure of given direction and electronic device including same
An electronic device may include a housing including a first plate facing a first direction, a second plate facing a second direction opposite the first direction, and a side housing surrounding a space between the first plate and the second plate, wherein the side housing includes a first portion, including an external metal portion having a first face facing an outside and a second face facing the space and an internal polymer portion having a third face contacting the second face and a fourth face facing the space, a touch screen display positioned within the space to be viewable through the first plate, wherein an edge of the touch screen display is spaced apart from the first portion of the side housing and when the first plate is viewed from above, the gap is covered by a peripheral portion of the first glass plate, an antenna structure comprising at least one antenna and configured to include a substrate having a fifth face substantially parallel to the second face and a sixth face facing a direction opposite the fifth face and at least one conductive pattern positioned between the fifth face and the sixth face and extending toward the peripheral portion of the first plate, and wireless communication circuitry operatively connected to the at least one conductive pattern and configured to form a directivity beam using at least a part of the at least one conductive pattern. |
| US11081797B2 |
Array antenna apparatus using superstrates and method of tuning array antenna by using superstrates
There is disclosed a method which is capable of calibrating or tuning the characteristics of individual antenna elements constituting an array antenna. The performance of the individual antenna elements can be improved by calibrating or tuning the characteristics of the individual antenna elements, and thus an array antenna can be installed even in a narrow space and can receive GPS signals. |
| US11081794B2 |
Antenna device and method for emitting electromagnetic waves using the antenna device
An antenna device (1) for emitting electromagnetic waves has a waveguide (2), which in turn has two plates (3) made of an electrically conductive material and arranged parallel to one another, between which a dielectric material is arranged. The antenna device (1) has a feed-in device (4), with which electromagnetic waves can be coupled into the waveguide (2), which then propagate along the waveguide (2) and are emitted at an edge (5) of the waveguide (2) at a distance from the feed-in device (4). According to the invention, using a control device of the antenna device (1), the dielectric material can be influenced in such a way that a first region (9) having a first permittivity and at least one second region (10) having a second permittivity are formed, such that the electromagnetic waves coupled into the waveguide (2) propagate preferably through the first region (9) and are emitted in this preferred propagation direction (11). The waveguide (2) can be in the shape of a circle segment and the feed-in device (4) can feed-in the electromagnetic wave in the centre of the circle. The dielectric material is a fluid having an anisotropic permittivity. The control device can have multiple respective electrodes (12), arranged on the plates (3) of the waveguide (2) and insulated in relation to same, between which an electric field can be generated. |
| US11081793B2 |
Antenna apparatus
According to one embodiment, an antenna device includes first to fourth phase shifters to shift phases of first and second left-hand circularly polarized wave signals and first and second right-hand circularly polarized wave signals. The control circuit determines first to fourth phase shift amounts in the first to fourth phase shifters based on a polarization angle and a radiation direction of a radio wave to be radiated. The first radiation element radiates a first left-hand circularly polarized wave in response to the first left-hand circularly polarized wave signal shifted and a first right-hand circularly polarized wave in response to the first right-hand circularly polarized wave signal shifted. The second radiation element radiates a second left-hand circularly polarized wave in response to the second left-hand circularly polarized wave signal shifted and a second right-hand circularly polarized wave in response to the second right-hand circularly polarized wave signal shifted. |
| US11081792B2 |
Phased array with low-latency control interface
A phased array system has a plurality of beam-forming elements, and a plurality of beam-forming integrated circuits in communication with the beam-forming elements. Each beam-forming integrated circuit has a corresponding register bank with a plurality of addressable and programmable register sets. In addition, each beam-forming integrated circuit has at least two different types of beam-forming ports. Specifically, each beam-forming element has a serial data port for receiving serial messages, and a parallel mode data port for receiving broadcast messages. Both the serial and broadcast messages manage the data in its register bank. The beam-forming integrated circuits receive the broadcast messages in parallel with the other beam-forming integrated circuits, while the beam-forming integrated circuits receive the serial messages serially—sequentially with regard to other beam-forming integrated circuits. |
| US11081787B2 |
Antenna array radiation shielding
An antenna array may include shielding elements that provide a degree of radiation shielding to other components of the antenna array, such as a substrate of the antenna array. In some examples, the shielding elements may be positioned to overlap with one or more gaps between antenna elements, or one or more gaps between ground elements (e.g., when viewed from a radiation source, when viewed in a direction perpendicular to a substrate). Thus, shielding elements of an antenna array may reflect, absorb, or otherwise dissipate radiation that passes through such gaps before the radiation is incident on the other components of the antenna array, such as the substrate of the antenna array. |
| US11081784B2 |
Ultra-wideband LTE antenna system
An antenna system capable of operating among all LTE bands, and also capable of operation among all remote side cellular applications, such as GSM, AMPS, GPRS, CDMA, WCDMA, UMTS, and HSPA among others. The antenna system provides a low cost alternative to active-tunable antennas suggested in the prior art for the same multi-platform objective. |
| US11081782B2 |
Three-dimensional antenna element
A three-dimensional antenna element is provided. The three-dimensional antenna element is configured to be disposed on a surface of a conductive substrate, and includes a dielectric base, a first radiation part, a second radiation part, a third radiation part, a fourth radiation part, a first shorting element, and a second shorting element. The dielectric base includes a first plane and a second plane, where the second plane includes a first side and a second side, the first side is opposite to the second side and configured to be joined to the first plane, and the second side is configured to be joined to the surface of the conductive substrate. A signal feed-in point is coupled between the first radiation part and the second radiation part. |
| US11081777B2 |
Antenna assembly and device including antenna assembly
An antenna assembly and an antenna device including the same are provided. The antenna assembly includes antenna elements, a first printed circuit board (PCB), cavity filters, and a second PCB. The first PCB has one surface provided with the antenna elements. The cavity filters are installed on the other surface of the first PCB and electrically connected to the plurality of antenna elements. The second PCB has one surface electrically connected to the cavity filters and includes at least a power amplifier, digital processing circuit, and calibration network. The second PCB includes one or more first processing areas and one or more second processing areas extending in parallel with each other. The digital processing circuit is disposed in the second processing area and not in the first processing area. The power amplifier is disposed in the first processing area and not in the second processing area. |
| US11081776B2 |
Electronic package
An electronic package is provided. A functioning member having a concave portion and a second antenna portion is disposed on a carrier having a first antenna portion. The concave portion and the carrier form a functioning space. The first antenna portion and the second antenna portion are disposed in a projection space of the functioning space. The first antenna portion induces the second antenna portion. |
| US11081771B2 |
RF crossover apparatus for microwave systems comprising a body having at least two intersecting RF strips disposed thereon and insulated from an external environment
An RF crossover apparatus provides low transmission and return losses for microwave systems and meets the requirement for the RF signals to leap over each other as in an insulated state. The RF crossover apparatus contains a body produced from ceramic material, at least two RF strips placed inside the body in a way to intersect each other and at least one insulation layer insulating the RF strips placed on the body at least from the external environment. The body produced from ceramic material enables operation on high frequencies and this provides low transmission and return losses. The RE crossover apparatus also contains matching circuits on the tips of the RF strips for the RF strips to be passed to chip devices during use. |
| US11081766B1 |
Mode-whisperer linear waveguide OMT
The mode-whisperer waveguide device includes a main waveguide, a junction waveguide and a pair of recombination arm waveguides. The main waveguide features a spline taper extending along an axis of the main waveguide. The spline taper has been integrated with the normal linear aperture taper. The junction waveguide is attached to the main waveguide. The recombination arm waveguides are attached to the junction waveguide. A first port is coupled to the pair of recombination arm waveguides via a pair of recombination arm transformer steps. The main waveguide, the junction waveguide, the pair of recombination arm waveguides and the pair of recombination arm transformer steps are manufacturable as a monolithic waveguide device that is configured to achieve outstanding higher-order mode suppression due to the gradual dual spline taper which has been integrated with the normal linear taper to the aperture port. |
| US11081764B2 |
Battery module
A battery module has a plurality of battery cells each including a cell case and a battery element contained in the cell case. The battery module includes a lead to electrically connect a terminal of each of the battery cells to a current collector and a heat shutoff mechanism to break electrical connection between the terminal and the current collector by heat from the cell case when the cell case reaches a predetermined temperature or higher. |
| US11081763B2 |
Current interrupt for electrochemical cells
To counteract the potentially destructive effects of temperature increases in primary batteries during short circuit conditions, a current interrupt may be positioned within an anode conductive path. The current interrupt may comprise a thermoplastic substrate having a low glass transition temperature, and having a conductive coating thereon to form a portion of the anode conductive path. During a short circuit, the temperature within the battery increases above the glass transition temperature of the thermoplastic substrate, thereby causing the current interrupt to deform, thereby degrading the portion of the anode conductive path defined by the current interrupt, decreasing the amount of current flowing through the anode conductive path, and effectively limiting the temperature increase within the battery interior. |
| US11081762B2 |
Electrode assembly and lithium secondary battery including the same
An electrode assembly having a positive electrode current collector, a positive electrode active material layer, a separator, a negative electrode active material layer and a negative electrode current collector stacked successively in a thickness direction of the electrode assembly is provided. A plurality of through-holes is formed to pass through the positive electrode active material layer, separator and the negative electrode active material layer. The positive electrode current collector includes a first sheet shaped current collector and a plurality of first column shaped current collectors extending from the first sheet shaped current collector along the thickness direction of the electrode assembly. The negative electrode current collector includes a second sheet shaped current collector and a plurality of second column shaped current collectors extending from the second sheet shaped current collector along the thickness direction of the electrode assembly. |
| US11081761B2 |
Flexible electrode-separator elements and processes for their preparation
This application describes a process for the preparation of flexible electrode-separator elements or assemblies, which includes the application of an electrode material on the separator. The electrode material comprises graphene, for instance produced by graphite exfoliation. The electrode-separator elements obtained by the process as well as their use in electrochemical cells are also described. |
| US11081757B2 |
Battery
According to embodiments, a battery includes: a rectangular box-shaped battery case, an inner portion of which is sealed; a battery module housed in the battery case and being an aggregation of a plurality of battery cells; and a tubular heat resistant sheet arranged between the battery case and the battery module in a state of covering an entire side surface of an inner wall surface of the battery case. |
| US11081755B1 |
Housing for a conformal wearable battery
A molded housing may enclose an electronic component and include an electrically conductive contact component embedded within an exterior wall to conduct electricity between an interior and an exterior of the casing. The contact component may include two knurled areas separated by a recessed groove. The knurled areas and recessed groove may be coplanar with the exterior wall. The knurled areas and recessed groove may form an interface with the molded casing to seal the casing against ingress of liquid into the interior. The molded casing may include an upper housing and a lower housing formed from a combination of a rigid member and a flexible member. The rigid member may have a plurality of rigid regions, and the flexible member may have a plurality of flexible regions formed between neighboring rigid regions. The flexible member may be molded onto the rigid member using a two-shot injection molding process. In some examples, the contact component may be secured to a contact carrier, where the contact carrier is then secured to the exterior housing. |
| US11081754B2 |
Control modular assembly and switch including the same
Embodiments of the present disclosure provide a control modular assembly for a switch. The control modular assembly according to embodiments of the present disclosure comprises: a base housing (203) adapted to carry an operating member for controlling the switch and formed with a base housing notch (206) at an edge of the base housing (203); a first battery (100) being rechargeable and operable to be detachably mounted in the base housing (203) through the base housing notch (206), thereby supplying electric power to the operating member; and a second battery (205) arranged within the base housing (203) to supply electric power to the operating member when the first battery (100) is taken out of the control modular assembly (200), wherein the second battery (205) is chargeable by the first battery (100). |
| US11081753B2 |
Rechargeable battery
A rechargeable battery includes: an electrode assembly including an electrode including an uncoated region; a case configured to accommodate the electrode assembly and including an opening; a cap assembly including an electrode terminal and configured to be coupled to the opening to seal the case; and a current collecting plate configured to be coupled to the uncoated region of the electrode assembly, and the current collecting plate includes: a first flat plate portion including a welded portion welded to the uncoated region, a second flat plate portion including a fuse portion and electrically connected to the electrode terminal, and a vibration absorbing portion connected to the first and second flat plate portions of which opposite end portions face each other in a longitudinal direction, the vibration absorbing portion having a thickness that is thinner than thicknesses of the first and second flat plate portions. |
| US11081746B2 |
Modular battery pack system with multi-voltage bus
A method and system provide a plurality of power cell modules. The power cell modules can be stacked together such that they are electrically connected and share a collective multi-voltage bus. Electronic appliances can be connected to one of the power cell modules to be powered by all of the connected power cell modules. Power cell modules can be easily added or removed from the bank without interrupting the supply of power to the electronic appliance. |
| US11081742B2 |
Method and system for thermal conditioning of a battery pack
The invention relates to a method for thermal conditioning of a battery pack (4), wherein said battery pack (1) comprises a plurality of battery cells (4a, 4b, 4c, . . . ) and forms part of an electric storage system (15), said method comprising a step of executing a ready-to-run function for optimizing the performance of said battery pack (4) during use. Furthermore, the method comprises the steps of: calculating a setpoint temperature (Ts) for the battery pack (4) to reach in order to provide a sufficient level of performance without further thermal conditioning during a predetermined time period (t); and thermally conditioning said battery pack (4) so as to reach said setpoint temperature (Ts). The invention also relates to an arrangement for such a thermal conditioning. |
| US11081737B2 |
Getter for use with electrochemical cells, devices including the getter, and method of forming same
An electrochemical cell including a getter material, a battery including the electrochemical cell, and methods of forming the electrochemical cell and battery are disclosed. |
| US11081735B2 |
Method and apparatus for charging battery
A method of charging a battery including a plurality of cells, the method including charging the plurality of cells at a plurality of C-rates, respectively; calculating a voltage change of each of the plurality of cells and a slope of the voltage change of each of the plurality of cells; and performing discharging multiple times in a section where a deviation between the slopes of the voltage changes of the plurality of cells is equal to or larger than a predetermined reference value. |
| US11081734B2 |
Battery module having fixing structure for temperature sensing element
The present invention relates to a battery module, and the battery module includes at least one battery cell, a protection circuit module that includes a rigid printed circuit board, and is electrically connected with the battery cell, at least one temperature sensing element provided at a surface of the battery cell, and a flexible printed circuit board that electrically connects the protection circuit module and the temperature sensing element. |
| US11081733B2 |
Intelligent battery and method
An intelligent battery system and methods for making and using the same are provided. The intelligent battery system can halve a pack of cells and a battery management system. (“BMS”) for providing secondary protection for the pack of cells. The pack of cells can comprise cells with operating parameters such as capacities, voltages, currents, charge/discharge rates and/or lifecycles that are uniform, or different, among the cells. The BMS can comprise a gas gauge, a microcontroller and a MOS switch circuit for managing the pack of cells and providing the secondary protection based on chemical characteristics of the cells and operating parameters of the cells. The intelligent battery system advantageously can include cells that are replaceable. For purposes of storage and/or transportation an of the cells can be dissembled and assembled without affecting the capacity and performance of the intelligent battery. |
| US11081732B2 |
Secondary battery and method for manufacturing the same
The secondary battery according to the present invention may comprise the separator pocket part having the accommodation groove in which the first electrode plate is accommodated and a radical unit provided as the second electrode plate disposed on one surface of the separator pocket part to secure the stacking property, safety, and insulation. |
| US11081731B2 |
High-capacity rechargeable batteries
High-capacity and high-performance rechargeable batteries containing a cathode material layer having an improved surface roughness is provided. A cathode material layer is provided in which at least an upper portion of the cathode material layer is composed of nanoparticles (i.e., particles having a particle size less than 0.1 μm). In some embodiments, a lower (or base) portion of the cathode material layer is composed of particles whose particle size is greater than the nanoparticles that form the upper portion of the cathode material layer. In other embodiments, the entirety of the cathode material layer is composed of the nanoparticles. In either embodiment, a conformal layer of a dielectric material can be disposed on a topmost surface of the upper portion of the cathode material layer. The presence of the conformal layer of dielectric material can further improve the smoothness of the cathode material layer. |
| US11081730B2 |
Non-aqueous electrolyte solution
To provide a non-aqueous electrolyte solution, a non-aqueous secondary battery, a cell pack, and a hybrid power system, capable of improving desired battery performance in an acetonitrile electrolyte solution, the non-aqueous electrolyte solution contains a non-aqueous solvent, PO2F2 anions, and cyclic acid anhydride. |
| US11081729B2 |
Non-aqueous electrolyte solution additive, and non-aqueous electrolyte solution for lithium secondary battery and lithium secondary battery which include the same
The present invention relates to a non-aqueous electrolyte solution additive, and a non-aqueous electrolyte solution for a lithium-ion battery and a lithium-ion battery which include the same, and particularly, to a non-aqueous electrolyte solution, which may remove an acid generated by the decomposition of a lithium salt while being able to suppress the dissolution of metal impurities causing failure in the battery by using and including a Lewis base compound containing a propargyl group as a non-aqueous electrolyte solution additive for a lithium-ion battery, and a lithium secondary battery in which transition metal dissolution in a positive electrode and a low-voltage phenomenon are improved. |
| US11081727B2 |
Solid electrolyte and electricity storage device using the same
Provided is a solid electrolyte containing a crystal phase having a chemical composition Li7(1+x)α3β2+aO12+3.5x+b, where α includes Pr, β includes Zr, −0.05≤x≤0.35, −0.5≤a≤0.5, and −0.5≤b≤0.5. |
| US11081726B2 |
Solid state electrolyte and solid state battery
A solid state electrolyte having a garnet type crystal structure is provided. The chemical composition of the solid state electrolyte includes lithium, lanthanum, zirconium, oxygen, and sulfur. The content of sulfur in the solid state electrolyte is between 5 mol % and 35 mol % based on the content of oxygen in the solid state electrolyte. A solid state battery including a positive electrode layer, a negative electrode layer, and a solid state electrolyte layer is also provided. The solid state electrolyte layer is disposed between the positive electrode layer and the negative electrode layer. The solid state electrolyte layer includes the solid state electrolyte. |
| US11081721B2 |
Secondary electrochemical cells with separator and electrolyte combination
A secondary electrochemical cell comprises an anode, a cathode including electrochemically active cathode material, a separator between the anode and the cathode, and an electrolyte. The electrolyte comprises at least one salt dissolved in at least one organic solvent. The separator in combination with the electrolyte has an area-specific resistance of less than about 2 ohm-cm2. |
| US11081719B2 |
Production of electrical energy storage devices
A method and an apparatus are disclosed for the production of electrical energy storage devices, in which two separators are fed alongside one another, two anode feeders arrange in an alternating manner a succession of anodes one after the other between the two separators, two cathode feeders arrange a succession of cathodes one after the other on the outer sides of the two separators in an alternating manner so that only one cathode is superimposed on each anode, after which a cutting device separates various discrete elements, each consisting of only one anode and only one cathode with the interposition of portions of the two separators. |
| US11081717B2 |
Storage module of distributed flow battery
A storage module of distributed flow battery is provided. An electrochemical reaction is processed with the positive and negative electrolytes to produce and/or discharge direct current and further output the positive and negative electrolytes after the reaction. The module comprises two end plates; two frames disposed between the two end plates; two current collectors disposed between the two frames; two complex cast polar plates disposed between the two current collectors; two electrodes disposed between the two complex cast polar plates; a membrane disposed between the two electrodes; and three gaskets. Therein, two of the gaskets are set to sandwich and enclose one of the two complex cast polar plates; and the other one of the gaskets is set between the other one of the two complex cast polar plates and an adjacent one of the current collectors. |
| US11081714B2 |
Aging method of fuel cell
The present disclosure provides a method of shortening an aging period of a polymer electrolyte fuel cell immediately after production to increase shipping inspection speed and production speed of the polymer electrolyte fuel cell. The present disclosure relates to an aging method of a fuel cell which comprises a membrane electrode assembly comprising a fuel electrode, an electrolyte membrane, and an oxidant electrode, wherein the method comprises applying a potential cycle, wherein the lowest cell potential when a load is applied and OCV are alternately repeated between the fuel electrode and the oxidant electrode, and in the potential cycle, fuel gas is supplied to the fuel electrode, and oxidant gas and carbon monoxide gas are supplied to the oxidant electrode. |
| US11081709B2 |
Fuel cell system
A fuel cell system includes: a fuel cell; a reformer to generate a hydrogen-containing gas; an electric power generation raw material supply unit; a reforming material supply unit configured to supply at least one of reforming water and reforming air, to the reformer; an oxidizing gas supply unit to supply an oxidizing gas to a cathode of the fuel cell; a combustor to ignite an exhaust gas discharged from the fuel cell; and a controller. In an operation stop process of the fuel cell system, the controller causes the oxidizing gas supply unit to supply the oxidizing gas, causes the electric power generation raw material supply unit and the reforming material supply unit to intermittently supply the electric power generation raw material and at least one of the water and the air to the reformer, and causes the ignitor to perform an ignition operation. |
| US11081708B2 |
Redox flow battery
A redox flow battery includes a battery cell; a positive electrolyte tank and a negative electrolyte tank configured to store therein a positive electrolyte and a negative electrolyte, respectively; a positive electrolyte circulation path and a negative electrolyte circulation path each configured to allow a corresponding one of the electrolytes to circulate between a corresponding one of the tanks and the battery cell; and a communicating tube including a tube immersed at one open end thereof in the positive electrolyte, stretched at an intermediate portion thereof above levels of both the electrolytes, and immersed at the other open end thereof in the negative electrolyte. |
| US11081703B2 |
Method of preparing a catalyst for a fuel cell without a carbon support
A method of preparing a catalyst for a fuel cell includes no carbon support. The method of preparing a catalyst for a fuel cell includes preparing a first metal nanoparticle having a polyhedral shape, growing a second metal along the edge of the first metal nanoparticle, and removing the first metal nanoparticle. |
| US11081702B2 |
Synthesis method of metal catalyst having carbon shell using metal complex
A synthesis method of a metal catalyst having carbon shell, includes: a) forming a metal-ligand complex without further chemical additives by mixing a ligand with a metal precursor; b) separating the metal-ligand complex and collecting the separated metal-ligand complex; c) supporting the collected metal-ligand complex to a support by mixing the collected metal-ligand complex with the support in a solvent; and d) treating a composite consisting of the metal-ligand complex and the support by heating. |
| US11081697B2 |
Electrode active material, all solid fluoride ion battery, and method for producing electrode active material
An object of the present disclosure relates to an electrode active material that has excellent discharge capacity and is used in an all solid fluoride ion battery. The present disclosure achieves the object by providing an electrode active material to be used in an all solid fluoride ion battery, the electrode active material comprising: an active material region that contains an active material component including a layered structure; and a coating region positioned in a surface side of the active material region; and a fluorine concentration in the coating region is higher than a fluorine concentration in the active material region. |
| US11081694B2 |
Positive electrode active material for secondary battery, and secondary battery comprising the same
The present invention provides a positive electrode active material for a secondary battery, the positive electrode active material being a primary particle having a monolithic structure that includes a lithium composite metal oxide of Formula 1 below, wherein the primary particle has an average particle size (D50) of 2 μm to 20 μm and a Brunauer-Emmett-Teller (BET) specific surface area of 0.15 m2/g to 1.9 m2/g, and a secondary battery including the same. |
| US11081689B2 |
Positive electrode for electrochemical device, and electrochemical device provided therewith
An electrochemical device includes a positive electrode and a negative electrode. The positive electrode for the electrochemical device includes a positive current collector, and an active layer including a conductive polymer disposed on the positive current collector. The conductive polymer contains a polyaniline or a derivative of polyaniline. An infrared absorption spectrum of the active layer exhibits a peak derived from a carbonyl group. The peak derived from the carbonyl group appears, for example, in a range from 1600 cm−1 to 1700 cm−1, inclusive. |
| US11081686B2 |
Metal oxide and method for preparing the same
This application relates to a metal oxide and a method for preparing the same. Specifically, Co3O4 is selected as a precursor of lithium cobalt oxide, and one or more metal elements M are doped in the particles of Co3O4 to obtain a doped lithium cobalt oxide precursor Co3-xMxO4, where 0 |
| US11081684B2 |
Production of carbon nanotube modified battery electrode powders via single step dispersion
Methods of making single walled carbon nanotubes (SWNTs) including a single step for preparing a homogeneous dispersion of SWNTs in a battery electrode powder. The method may comprise providing a reactor in fluid communication with a mixer, wherein an aerosol containing SWNTs is transmitted from the reactor directly to the mixer containing a battery electrode powder. |
| US11081680B2 |
Pixel structure, method for forming the same, and display screen
A pixel structure, a method for forming the pixel structure, and a display screen are provided. The method includes: providing a substrate for forming an OLED device, the substrate having a first pixel area, a second pixel area, and a third pixel area; and forming a compensation layer on the substrate, the compensation layer having different thicknesses in the first pixel area, the second pixel area, and the third pixel area. In the present disclosure, the compensation layer is formed on the substrate, and the compensation layer has different thicknesses respectively in the first pixel area, the second pixel area and the third pixel area, so that the cavity of the first pixel area, the cavity of the second pixel area, and the cavity of the third pixel area can be individually controlled. |
| US11081676B2 |
Display apparatus
A display apparatus may include a substrate, a display element disposed above the substrate, an encapsulation layer disposed above the display element and including an inorganic encapsulation layer and an organic encapsulation layer, and a touch-sensing layer disposed above the encapsulation layer. The touch-sensing layer may include a first insulating layer including a side surface inclined with respect to a top surface of the encapsulation layer and including an organic material. The touch-sensing layer may include a conductive layer including sensing electrodes, and a second insulating layer covering the conductive layer and including a refractive index that may be different from that of the first insulating layer. |
| US11081668B2 |
Display device
A display device includes a substrate including a display area, a first non-display area surrounding the display area, and a second non-display area surrounded by the display area, a through portion disposed in the second non-display area, the substrate in the through portion being removed, and a first groove disposed in the second non-display area in the substrate to surround the through portion. |
| US11081666B2 |
Film material and display device
The present disclosure provides a film material and a display device, and relates to the field of display technology. The film material includes a base material and a functional film layer arranged on the base material, in which the base material includes an active region and an auxiliary region surrounding the active region, the functional film layer covering the active region, and not completely covering the auxiliary region. The film material provided by the present disclosure is applied into a display device. |
| US11081665B2 |
Display device having buffer layer
A display device including a first substrate including a display part arranged with a plurality of pixels and a terminal part arranged in an outside of the display part, the display part and the terminal part being on a first surface of the substrate, a second substrate facing the first surface, a first sealing layer arranged between the first substrate and the second substrate, and a buffer layer adjacent to the first sealing layer. A part of an end part of the first sealing layer is arranged between the display part and the terminal part, the part of the end part and an upper surface of the first sealing layer form a first step part, the buffer layer is located at the first step part and has a thickness which decreases as a distance from the first step increases. |
| US11081659B2 |
Organic electroluminescent materials and devices
A compound is disclosed that is selected from the group consisting of a structure having Formula I and a structure having Formula II |
| US11081652B2 |
Organic light-emitting diode comprising different matrix compounds in the first and second electron transport layer
The present invention is directed to matrix compounds and an organic light-emitting diode (OLED) comprising an emission layer and an electron transport layer stack of at least two electron transport layers, wherein a first electron transport layer and a second electron transport layer comprises at least one matrix compound, wherein the matrix compound or compounds of the first electron transport layer is/are different to the matrix compound or compounds of the second electron transport layer; and in addition, the first electron transport layer comprises a dopant of a lithium halide and/or lithium organic complex; and the second electron transport layer is free of a dopant; wherein at least one matrix compound of the second electron transport layer having the chemical formula Ia, Ib and/or Ic: (Ia) (Ib) (Ic) wherein Ar=substituted or unsubstituted arylene with 6 to 20 ring-forming carbon atoms; or carbazolylene; ET=substituted or unsubstituted aryl group with 13 to 40 ring-forming carbon atoms; or a substituted or unsubstituted heteroaryl group with 14 to 40 ring-forming atoms. |
| US11081648B2 |
Organic compound, and organic light emitting diode and organic light emitting display device including the same
The present invention provides an organic compound represented by: an organic light emitting diode and an organic light emitting display device using the organic compound. The organic compound of the present invention is capable of reducing a driving voltage of an organic light emitting diode and improving an emitting efficiency and a lifetime of the organic light emitting diode and the organic light emitting display device including the organic compound. |
| US11081643B1 |
Bevel metal removal using ion beam etch
Form a metallized layer at a top surface of a semiconductor wafer. The metallized layer includes a bottom contact and a dielectric barrier surrounding the bottom contact. Deposit a memory stack layer onto the metallized layer. The memory stack layer forms a first overspill on a bevel of the wafer. Remove the first overspill from the bevel using a first high-angle ion beam during a cleanup etch. |
| US11081640B2 |
Magnetic random access memory bottom electrode self-aligned to underlying interconnect structures
Embodiments of the invention are directed to a method of forming a bottom electrode of a magnetic tunnel junction (MTJ) storage element. A non-limiting example of the method includes forming the bottom electrode of the MTJ storage element such that the bottom electrode is communicatively coupled to an interconnect structure through an in-situ interface, wherein the in-situ interface includes an interface between a bottom surface of the bottom electrode and a top surface of the interconnect structure. A top surface of the bottom electrode is configured to couple to a bottom end of a MTJ stack, and the bottom electrode includes a semiconductor and metal alloy. |
| US11081637B2 |
Laminate structure, piezoelectric element, and method of manufacturing piezoelectric element
A piezoelectric element is obtained using a method including: preparing a first structure; preparing a second structure; disposing a first facing electrode layer of the first structure to face a first surface of a vibration plate substrate and bonding the first structure to the first surface of the vibration plate substrate; processing the vibration plate substrate into a vibration plate by polishing or etching a second surface of the vibration plate substrate to which the first structure is bonded; preparing a laminate structure by disposing a second facing electrode layer of the second structure to face an exposed surface of the vibration plate and bonding the second structure to the vibration plate; and removing at least a part of a first silicon substrate of the first structure and a second silicon substrate of the second structure from the laminate structure. |
| US11081635B1 |
Method and apparatus for driving a piezoelectric transducer with stored charge recovery
A piezo driver system including a driver including a switching amplifier coupling a power port to a driver port, a battery coupled to the power port, a piezo device coupled to the driver port, where the switching amplifier provides a filtered driver signal to the driver port and returns stored charge from the piezo device to the battery. A method for driving a piezo device includes multiplying an input signal by an oscillator signal to provide a control signal, controlling a switching amplifier in accordance with the control signal to provided a filtered alternating current (AC) driver signal and a returned charge direct current (DC) signal, applying the filtered driver signal to a piezo device, and returning stored charge of the piezo device to a battery. |
| US11081633B2 |
Thermoelectric generation device
A thermoelectric generator includes a heat-receiving plate including a heat-receiving surface, a first heat conductor disposed on a surface of the heat-receiving plate opposite the heat-receiving surface and configured to transfer heat received by the heat-receiving plate, a thermoelectric generation module disposed on a surface of the heat conductor opposite the heat-receiving plate, a second heat conductor disposed on a surface of the thermoelectric generation module opposite the first heat conductor, and a cooling plate disposed on the thermoelectric generation module opposite the heat conductor, at least a part of an outer periphery of the first heat conductor being located inside a region corresponding to a pair of a P-type thermoelectric element and an N-type thermoelectric element disposed to an outer periphery of the thermoelectric generation module. |
| US11081630B2 |
Light emitting device package with a coating layer
A light emitting device comprising a coating layer is disclosed. A reflective layer is on a base. A structure on the reflective layer has a first opening there through. The first opening exposes a surface of the reflective layer. A light emitting diode (LED) is on the exposed surface of the reflective layer. A coating layer is on the exposed surface of the reflective layer, at least a portion of the structure inside the first opening, and at least a portion of the LED. A second opening is in the coating layer. The second opening exposes a portion of the reflective layer. A conductive element electrically couples the LED to the base through the portion of the reflective layer exposed by the second opening in the coating layer. |
| US11081622B2 |
III-nitride multi-wavelength LED for visible light communication
A light emitting diode (LED) array may include a first pixel and a second pixel on a substrate. The first pixel and the second pixel may include one or more tunnel junctions on one or more LEDs. The LED array may include a first trench between the first pixel and the second pixel. The trench may extend to the substrate. |
| US11081620B2 |
Method of producing a semiconductor component
A method of producing a semiconductor component includes applying an auxiliary carrier at a first side of a semiconductor body, the auxiliary carrier having a first lateral coefficient of thermal expansion, and applying a connection carrier at a second side of the semiconductor body facing away from the auxiliary carrier, the connection carrier having a second lateral coefficient of thermal expansion, wherein the semiconductor body is grown on a growth substrate different from the auxiliary carrier, the first and the second lateral coefficient of thermal expansion differ by at most 50%, and the growth substrate is removed prior to application of the auxiliary carrier. |
| US11081615B2 |
Protection method for through-holes of a semiconductor wafer
A protection method for through-holes of a semiconductor wafer having the steps: providing a semiconductor wafer, and comprising a plurality of solar cell stacks, wherein each solar cell stack has a Ge substrate forming a bottom side of the semiconductor wafer, a Ge subcell, and at least two III-V subcells in the order mentioned, as well as at least one through-hole, extending from the top side to the bottom side of the semiconductor wafer, with a continuous side wall and a circumference that is oval in cross section; applying a photoresist layer to a top side of the semiconductor wafer and to at least one region of the side wall of the through-hole, said region adjoining the top side, and applying an organic filler material by means of a printing process to a region of the top side, said region comprising the through-hole, and into the through-hole. |
| US11081613B2 |
Gallium nitride based ultra-violet sensor with intrinsic amplification and method of operating same
A UV sensor includes a GaN stack including a low-resistance GaN layer formed over a nucleation layer, and a high-resistance GaN layer formed over the low-resistance GaN layer, wherein a 2DEG conductive channel exists at the upper surface of the high-resistance GaN layer. An AlGaN layer is formed over the upper surface of the high-resistance GaN layer. A source contact and a drain contact extend through the AlGaN layer and contact the upper surface of the high-resistance GaN layer (and are thereby electrically coupled to the 2DEG channel). A drain depletion region extends entirely from the upper surface of the high-resistance GaN layer to the low-resistance GaN layer under the drain contact. An electrical current between the source and drain contacts is a function of UV light received by the GaN stack. An electrode is connected to the low-resistance GaN layer to allow for electrical refresh of the UV sensor. |
| US11081612B2 |
Avalanche photodiode
An avalanche photodiode includes: a first semiconductor layer of a first conductivity type formed on a substrate of the first conductivity type; a second semiconductor layer of a second conductivity type formed under the first semiconductor layer; a third semiconductor layer of the first conductivity type formed in a shallow portion of the first semiconductor layer on the substrate, the third semiconductor layer having a higher concentration than an impurity concentration of the first semiconductor layer; a fourth semiconductor layer of the first conductivity type formed in a region in the first semiconductor layer immediately below the third semiconductor layer; a first contact electrically connected to the first semiconductor layer; and a second contact electrically connected to the second semiconductor layer. An impurity concentration of the fourth semiconductor layer is higher than that of the first semiconductor layer and is lower than that of the third semiconductor layer. |
| US11081611B2 |
Photodetector architectures for efficient fast-gating comprising a control system controlling a current drawn by an array of photodetectors with a single photon avalanche diode
An exemplary system includes an array of photodetectors and a control system. Each photodetector of the array of photodetectors may include a single-photon avalanche diode (SPAD) and a fast-gating circuit configured to arm and disarm the SPAD. The control system is configured to control a current drawn by the array of photodetectors. |
| US11081606B2 |
Flexible and rollable photovoltaic cell having enhanced properties of mechanical impact absorption
Semiconductor substrates and semiconductor devices produced from such substrates, such as photovoltaic (PV) cells, may exhibit toughened physical characteristics making them more suitable for use in mechanically challenging or stressful environments. Semiconductor substrates and semiconductor devices produced from such substrates, such as photovoltaic (PV) cells, may exhibit toughened thermal characteristics making them more suitable for use in environmentally challenging applications. Semiconductor substrates and semiconductor devices produced from such substrates, such as photovoltaic (PV) cells, may exhibit sufficiently toughened characteristics and increase impact resistance to permit packaging in non-rigid and light weight encapsulating layer(s). Semiconductor substrates and semiconductor devices produced from such substrates may exhibit sufficient flexibility to permit for rolling up during shipment and or for non-destructive deformation during deployment over uneven surfaces. Semiconductor devices produced from such substrates may exhibit sufficient flexibility to permit repeated mechanical and/or thermal stresses without failure. |
| US11081605B2 |
Semiconductor laminate, light-receiving element, and method for manufacturing semiconductor laminate
A semiconductor laminate includes a substrate formed of a group III-V compound semiconductor and a quantum well structure disposed on the substrate. The quantum well structure includes a second element layer formed of a group III-V compound semiconductor and containing Sb and a first element layer formed of a group III-V compound semiconductor and disposed in contact with the second element layer. In the first element layer, the thickness of a region in which the content of Sb decreases in a direction away from the substrate from 80% of the maximum content of Sb in the second element layer to 6% of the maximum content is from 0.5 nm to 3.0 nm inclusive. |
| US11081604B2 |
Device and method for bowtie photoconductive antenna for terahertz wave detection
A process of fabricating and a photoconductive antenna are disclosed which include a semi-insulating substrate having a top side and a bottom side; a low-temperature Gallium Arsenide (GaAs) layer deposited on the top side of the semi-insulating substrate; a plurality of metal electrodes having a bowtie dipole, with an excitation gap at the center, deposited directly on the low-temperature Gallium Arsenide layer; and an extended hemispherical lens attached to the bottom side of the semi-insulating substrate; the extended hemispherical lens further comprises an extension layer and a hemispherical layer separated by an extended line whose position is selected so that a beam of light coming from outside of the extended hemispherical lens is collimated to the excitation gap. |
| US11081600B2 |
Light filter structure
A light filter structure is provided. The light filter structure includes a substrate having a plurality of photoelectric conversion elements. The light filter structure also includes a dielectric-stacking layer disposed on the substrate. The light filter structure further includes a flattening layer disposed on the dielectric-stacking layer. The dielectric-stacking layer has a wedge portion and a flattening portion adjacent to the wedge portion, the wedge portion has a continuously or non-continuously varied thickness, and the flattening portion has a substantially constant thickness. |
| US11081598B2 |
Trench MOS Schottky diode
A trench MOS Schottky diode includes a first semiconductor layer including a Ga2O3-based single crystal, a second semiconductor layer that is a layer laminated on the first semiconductor layer and that includes a Ga2O3-based single crystal and a trench opened on a surface thereof opposite to the first semiconductor layer, an anode electrode formed on the surface of the second semiconductor layer, a cathode electrode formed on a surface of the first semiconductor layer, an insulating film covering an inner surface of the trench, and a trench MOS gate that is buried in the trench so as to be covered with the insulating film and is in contact with the anode electrode. The second semiconductor layer includes a lower layer on a side of the first semiconductor layer and an upper layer on a side of the anode electrode having a higher donor concentration than the lower layer. |
| US11081597B2 |
Lateral schottky diode with high breakdown voltage capability
A lateral diode with high breakdown voltage capability and a method for forming the lateral diode. The lateral diode has an anode, a cathode, a substrate having a first conductivity type, an epitaxial layer having formed on the substrate, a current region formed in the epitaxial layer and on the substrate, a first well coupled to the anode, a second well coupled to the cathode, a third well with light doping concentration formed beside the first well, and a guard ring with heavy doping concentration formed in the first well and beside the third well, and between the third well and the second well is a drift region, a lateral breakdown occurs in the third well, the drift region and the second well when a reverse voltage added on the lateral diode is equal to or higher than a breakdown voltage. |
| US11081590B2 |
Metal oxide semiconductor field effect transistor with crystalline oxide layer on a III-V material
A metal oxide semiconductor field effect transistor (MOSFET) includes a substrate having a source region, a drain region, and a channel region between the source region and the drain region, the substrate having an epitaxial III-V material that includes three elements thereon, a source electrode over the source region, a drain electrode over the drain region, and a crystalline oxide layer including an oxide formed on the epitaxial III-V material in the channel region, the epitaxial III-V material including three elements. |
| US11081589B2 |
Semiconductor device and manufacturing method thereof
A semiconductor device includes a substrate, an N-type bottom vertical gate-all-around (VGAA) transistor, a P-type bottom VGAA transistor, and a top VGAA transistor. The N-type bottom vertical gate-all-around (VGAA) transistor is over the semiconductor substrate and comprising a first nanowire made of InAs. The P-type bottom VGAA transistor is over the semiconductor substrate and comprising a second nanowire made of Ge. The top VGAA transistor is over the N-type bottom VGAA transistor, in which the top VGAA transistor includes a third nanowire in contact with the N-type bottom VGAA transistor, a fourth nanowire on and in contact with the third nanowire, and a bit line wrapping the fourth nanowire. |
| US11081588B2 |
Electro-optical device and electronic apparatus
An electro-optical device includes a base material as a substrate, a TFT as a transistor, a scanning line as a light shielding layer between the base material and the TFT, and a holding capacitor between the base material and the scanning line. The holding capacitor includes a first conductive layer, a second conductive layer provided on the first conductive layer via a first capacitor insulating layer, a third conductive layer electrically connected to the second conductive layer via a first contact hole provided in an insulating layer covering the second conductive layer, and a fourth conductive layer provided on the third conductive layer via a second capacitor insulating layer. |
| US11081587B2 |
Thin film transistor and method for manufacturing the same, display panel and method for manufacturing the same
There is provided a thin film transistor including: a substrate; a gate electrode and a first electrode in a single layer on the substrate; an active layer above the first electrode, an orthographic projection of the active layer on the substrate at least partially covers an orthographic projection of the first electrode on the substrate; a first insulation layer covering the gate electrode, the first electrode, the active layer, a portion of the substrate exposed between the gate electrode and the active layer, and another portion of the substrate exposed between the gate electrode and the first electrode; and a second electrode above the first insulation layer, an orthographic projection of the second electrode on the substrate at least partially covers the orthographic projection of the active layer on the substrate, and the second electrode is connected to the active layer through a via-hole in the first insulation layer. |
| US11081586B2 |
Thin film transistor and method for manufacturing the same
Provided is a thin film transistor. The thin film transistor includes a substrate, a channel part extending on the substrate in a first direction parallel to an upper surface of the substrate, source/drain electrodes connected to both ends of the channel part in the first direction, and a gate electrode spaced apart from the channel part in a second direction intersecting the first direction and parallel to the upper surface of the substrate. Each of the channel part, the source/drain electrodes, and the gate electrode is provided as a single layer. |
| US11081584B2 |
Method of manufacturing semiconductor devices using a capping layer in forming gate electrode and semiconductor devices
In a method of manufacturing a semiconductor device, a gate dielectric layer is formed over a channel region, a first conductive layer is formed over the gate dielectric layer, a shield layer is formed over the first conductive layer forming a bilayer structure, a capping layer is formed over the shield layer, a first annealing operation is performed after the capping layer is formed, the capping layer is removed after the first annealing operation, and a gate electrode layer is formed after the capping layer is removed. |
| US11081579B2 |
High electron mobility transistor and method of fabricating the same
An HEMT includes a first III-V compound layer. A second III-V compound layer is disposed on the first III-V compound layer. The composition of the first III-V compound layer and the second III-V compound layer are different from each other. A source electrode and a drain electrode are disposed on the second III-V compound layer. The gate electrode is disposed on the second III-V compound layer between the source electrode and the drain electrode. An insulating layer is disposed between the drain electrode and the gate electrode and covers the second III-V compound layer. At least one electrode is disposed on the insulating layer and contacts the insulating layer, wherein a voltage is applied to the electrode. |
| US11081573B2 |
Semiconductor element
A semiconductor element includes a semiconductor substrate; a collector layer on the semiconductor substrate; a base layer on the collector layer; an emitter layer on the base layer; emitter wiring electrically coupled to the emitter layer; a top metal layer on the emitter wiring; a first protective film covering the emitter wiring and the top metal layer, the first protective film having a first opening that overlaps at least the collector layer; and a bump including an under-bump metal layer electrically coupled to the emitter wiring via the first opening, the under-bump metal layer being larger than the first opening in plan-view area. The first protective film has an inner edge around the first opening, and the inner edge is on the top metal layer. |
| US11081572B2 |
Integrated circuit heat dissipation using nanostructures
An approach for heat dissipation in integrated circuit devices is provided. A method includes forming an isolation layer on an electrically conductive feature of an integrated circuit device. The method also includes forming an electrically conductive layer on the isolation layer. The method additionally includes forming a plurality of nanowire structures on a surface of the electrically conductive layer. |
| US11081569B2 |
Resistor loaded inverter structures
A method of forming an electrical device is provided that includes a semiconductor device and a passive resistor both integrated in a same vertically orientated epitaxially grown semiconductor material. The vertically orientated epitaxially grown semiconductor material is formed from a semiconductor surface of a supporting substrate. The vertically orientated epitaxially grown semiconductor material includes a resistive portion and a semiconductor portion, in which the sidewalls of the resistive portion are aligned with the sidewalls of the semiconductor portion. A semiconductor device is formed on the semiconductor portion of the vertically orientated epitaxially grown semiconductor material. A passive resistor is present in the resistive portion of the vertically orientated epitaxially grown semiconductor material, the resistive portion having a higher resistance than the semiconductor portion. |
| US11081568B2 |
Protective bilayer inner spacer for nanosheet devices
A method for manufacturing a semiconductor device includes forming a plurality of first semiconductor layers alternately stacked with a plurality of second semiconductor layers on a semiconductor substrate, and laterally recessing the plurality of first semiconductor layers with respect to the plurality of second semiconductor layers to form a plurality of vacant areas on lateral sides of the plurality of first semiconductor layers. In the method, a plurality of first inner spacers are formed on the lateral sides of the plurality of first semiconductor layers in respective ones of the plurality of vacant areas, and a plurality of second inner spacers are formed on sides of the plurality of first inner spacers in the respective ones of the plurality of vacant areas. The method also includes laterally recessing the plurality of second semiconductor layers, and growing a plurality of source/drain regions from the plurality of second semiconductor layers. |
| US11081558B2 |
LDMOS with high-k drain STI dielectric
A laterally diffused metal oxide silicon (LDMOS) transistor and a method of making the LDMOS transistor are disclosed. The LDMOS transistor includes a drain drift region formed in a substrate and containing a drain contact region. A gate structure overlies a channel region in the substrate and a first shallow-trench isolation (STI) structure located between the drain contact region and the channel region. The first STI structure contains a high-k dielectric and a second STI structure contains silicon oxide. |
| US11081557B2 |
Memory and method for forming the same
The present disclosure provides a memory and a method for forming the memory. The method includes: providing a base with a first fin and a second fin formed thereon, wherein the first fin comprises an erasing region and a floating gate region on both sides of the erasing region, and a sacrificial layer is disposed on a surface of the erasing region and a surface of the second fin; forming a floating gate structure across the floating gate region on the base; forming a first sidewall film on a top surface and sidewall surfaces of the floating gate structure on the base; removing the sacrificial layer, and forming an opening in the floating gate structure and the first sidewall film; and forming an erasing gate structure in the opening. The memory formed by the method has good performance. |
| US11081552B2 |
Gallium-nitride-based module with enhanced electrical performance and process for making the same
The present disclosure relates to a Gallium-Nitride (GaN) based module, which includes a module substrate, a thinned switch die residing over the module substrate, a first mold compound, and a second mold compound. The thinned switch die includes an electrode region, a number of switch interconnects extending from a bottom surface of the electrode region to the module substrate, an aluminium gallium nitride (AlGaN) barrier layer over a top surface of the electrode region, a GaN buffer layer over the AlGaN barrier layer, and a lateral two-dimensional electron gas (2DEG) layer realized at a heterojunction of the AlGaN barrier layer and the GaN buffer layer. The first mold compound resides over the module substrate, surrounds the thinned switch die, and extends above a top surface of the thinned switch die to form an opening over the top surface of the thinned switch die. The second mold compound fills the opening. |
| US11081548B2 |
Bipolar transistor
A bipolar transistor includes a collector layer, a base layer on the collector layer, and a first elongated emitter mesa on the base layer having a long side and a short side, wherein the long side is parallel with a first direction, and n separate first emitter-contact structures disposed along the first direction on the first elongated emitter mesa, where n is an integer greater than one. |
| US11081547B2 |
Method for making superimposed transistors
A method for making first and second superimposed transistors, including: making, on a substrate, a stack of several semiconducting nanowires; etching a first nanowire so that a remaining portion of the first nanowire forms a channel of the first transistor; etching a second nanowire arranged between the substrate and the first nanowire, so that a remaining portion of the second nanowire forms a channel of the second transistor and has a greater length than that of the remaining portion of the first nanowire; making second source and drain regions in contact with ends of the remaining portion of the second nanowire; depositing a first dielectric encapsulation layer covering the second source and drain regions and forming vertical insulating portions; making first source and drain regions in contact with ends of the remaining portion of the first nanowire and insulated from the second source and drain regions by the vertical insulating portions. |
| US11081543B2 |
Multi-spheroid BEOL capacitor
Method and apparatus for a capacitive structure. The capacitive structure includes a material stack having a deep trench formed therein. The material stack includes alternating vertical and semi-ovoid sidewall surfaces. The material stack further includes alternating metallization layers and dielectric layers. At least one of the semi-spheroidal sidewall surfaces is formed in a sidewall of at least one of the dielectric layers in the deep trench. At least one of the vertical sidewall surfaces is a sidewall surface of at least one metallization layer in the deep trench. |
| US11081542B2 |
Buried MIM capacitor structure with landing pads
A buried metal-insulator-metal (MIM) capacitor with landing pads is formed between first and second semiconductor substrates. The landing pads provide increased area for contacting which may decrease the contact resistors of the capacitor. The area of the buried MIM capacitor can be varied to provide a tailored capacitance. The buried MIM capacitor is thermally stable since the MIM capacitor includes refractory metal or metal alloy layers as the capacitor plates. |
| US11081533B2 |
Display apparatus and method of fabricating the same
A display apparatus includes a display panel including a plurality of pixels, and a cover panel including a window layer, an optical filter layer, a color filter layer and a bezel layer. The window layer includes a transmission region and a bezel region adjacent to the transmission region. The optical filter layer is disposed on the transmission region of the rear surface of the window layer. The color filter layer is disposed on the optical filter layer and includes a quantum dot. The bezel layer is disposed on the bezel region of the rear surface. The optical filter layer includes a partition wall layer, in which an opening is defined, a light-blocking layer disposed on the partition wall layer, and a reflection layer disposed in the opening. The bezel layer has a same color as the light-blocking layer. |
| US11081530B2 |
Pixel arrangement structure, display panel, mask component, and evaporation apparatus
A pixel arrangement structure, a display panel, a mask component, and an evaporation apparatus are provided. The pixel arrangement structure includes a plurality of sub-pixels arranged in a row direction and a column direction. The plurality of sub-pixels are divided into a plurality of rows of sub-pixel groups. Each of rows of sub-pixel groups include at least two rows of the sub-pixels, and include a plurality of repeating units arranged in sequence, and each of the repeating units includes at least two sub-pixel groups of different colors. Each of the sub-pixel groups includes at least two sub-pixels of a same color that are located in at least two rows and are adjacently arranged, and sub-pixels adjacent to each other and having different colors, which are located in sub-pixel groups of different colors, constitute one pixel. |
| US11081526B2 |
Nonvolatile memory device
According to one embodiment, a nonvolatile memory device includes a first wiring extending in a first direction, a second wiring extending in a second direction, a third wiring extending in the second direction and spaced from the second wiring in the first direction. An insulating layer includes a first portion between the second wiring and the third wiring, and a second portion protruding from the first portion in a third direction. A chalcogenide layer is between the first wiring and the second wiring, the first wiring and the third wiring, and also the first wiring and the insulating layer. The chalcogenide layer includes a first layer portion, a second layer portion, and a third layer portion. A concentration of a first element in the third layer portion is higher than that in the first and second layer portions. |
| US11081524B2 |
Three-dimensional memory devices
Embodiments of 3D memory devices and methods for forming the same are disclosed. In an example, a 3D memory device includes a substrate and a memory stack including interleaved conductive layers and dielectric layers above the substrate. The 3D memory device also includes a slit structure extending vertically through the memory stack and extending laterally along a serpentine path to separate the memory stack into a first area and a second area. The 3D memory device further includes first channel structures each extending vertically through the first area of the memory stack and including a drain at its upper end, and second channel structures each extending vertically through the second area of the memory stack and including a source at its upper end. The 3D memory device further includes semiconductor connections disposed vertically between the substrate and the memory stack. Each semiconductor connection crosses the slit structure in a plan view to electrically connect a respective pair of first and second channel structures. |
| US11081520B2 |
Luminescence diode with first and second layer sequences having an arrangement of microprisms and method for producing the same
A luminescence diode and a method for producing a luminescence diode are disclosed. In an embodiment a luminescence diode includes a carrier substrate, a first semiconductor layer sequence including a first active layer suitable for emitting radiation having a first dominant wavelength λdom1 and a second semiconductor layer sequence including a second active layer suitable for emitting radiation having a second dominant wavelength λdom2, wherein the first semiconductor layer sequence and the second semiconductor layer sequence are arranged side by side on the carrier substrate, and wherein the first dominant wavelength λdom1 of the first active layer and the second dominant wavelength λdom2 of the second active layer are different from each other. |
| US11081517B2 |
Active matrix substrate, x-ray imaging panel with the same, and method of manufacturing the same
An active matrix substrate includes a TFT. The TFT includes a gate electrode, a semiconductor layer overlapping the gate electrode with a gate insulating film interposed therebetween, and a source electrode and a drain electrode disposed on the semiconductor layer. The source electrode, the drain electrode, and the semiconductor layer are covered with a first insulating film. The gate insulating film includes a first stepped portion in a portion covering a peripheral portion of the gate electrode. The first insulating film includes a first opening at a position overlapping a portion of the first stepped portion that is not covered with the source electrode and the drain electrode in a plan view. |
| US11081516B2 |
Display screen, electronic device and method for three-dimensional feature recognition
A display screen, an electronic device and a method for 3D feature recognition are provided. The display screen includes a plurality of display units distributed in an array across a display area of the display screen; a plurality of infrared emitting elements embedded in a first area of the display area of the display screen; and a plurality of photosensitive elements embedded in a second area of the display area of the display screen. The plurality of photosensitive elements can be combined into an image sensor. The plurality of infrared emitting elements is configured to emit infrared light for illuminating a target object in front of the display screen so as to form a plurality of light spots on the target object. The plurality of photosensitive elements is configured to receive target light spots reflected from the target object and convert the target light spots into photo-electrical signals for generating a target image of the target object. |
| US11081515B2 |
Semiconducting device, and appliance having the semiconducting device
A first conductive pattern and a third conductive pattern are joined to each other in a junction plane, and a second conductive pattern and a fourth conductive pattern are joined to each other in the junction plane, and an insulation layer is arranged at least in one of spaces between the first conductive pattern and the second conductive pattern and between the third conductive pattern and the fourth conductive pattern. |
| US11081508B2 |
Solid state imaging element and electronic device
The present disclosure relates to a solid state imaging element and an electronic device that make it possible to improve sensitivity to light on a long wavelength side. A solid state imaging element according to a first aspect of the present disclosure has a solid state imaging element in which a large number of pixels are arranged vertically and horizontally, the solid state imaging element includes a periodic concave-convex pattern on a light receiving surface and an opposite surface to the light receiving surface of a light absorbing layer as a light detecting element. The present disclosure can be applied to, for example, a CMOS and the like installed in a sensor that needs a high sensitivity to light belonging to a region on the long wavelength side, such as light in the infrared region. |
| US11081507B2 |
Semiconductor device and method for manufacturing same
A semiconductor device includes a thin film transistor 101 including: a semiconductor layer 4 provided on a gate electrode 2 with a gate insulating layer 3 therebetween, wherein the semiconductor layer includes a first region Rs, a second region Rd, and a source-drain interval region RG that is located between the first region and the second region and overlaps with the gate electrode as seem from a direction normal to a substrate; a protection layer 5 arranged on the semiconductor layer 4; a first contact layer Cs in contact with the first region and a second contact layer Cd in contact with the second region; a source electrode 8s; and a drain electrode 8d, wherein: the semiconductor layer 4 includes a crystalline silicon region 4p, and at least a portion of the crystalline silicon region 4p is located in the source-drain interval region RG; and at least one opening 10 is provided that runs through the protection layer 5 and the semiconductor layer 4 and reaches the gate insulating layer 3, wherein the at least one opening 10 is located in the source-drain interval region RG as seen from the direction normal to the substrate. |
| US11081505B2 |
Semiconductor device and manufacturing method of the same
An insulating film provided between adjacent pixels is referred to as a bank, a partition, a barrier, an embankment or the like, and is provided above a source wiring or a drain wiring for a thin film transistor, or a power supply line. In particular, at an intersection portion of these wirings provided in different layers, a larger step is formed there than in other portions. Even when the insulating film provided between adjacent pixels is formed by a coating method, thin portions are problematically partially formed due to this step and the withstand pressure is reduced. In the present invention, a dummy material is arranged near the large step portion, particularly, around the intersection portion of wirings, so as to alleviate unevenness formed thereover. The upper wiring and the lower wiring are arranged in a misaligned manner so as not to align the end portions. |
| US11081499B2 |
Nonvolatile memory device and method for fabricating the same
A nonvolatile memory device with improved operation performance and reliability, and a method for fabricating the same are provided. The nonvolatile memory device includes a substrate, a peripheral circuit structure on the substrate, a mold structure including a plurality of insulating patterns and a plurality of gate electrodes stacked alternately on the peripheral circuit structure, a channel structure penetrating the mold structure, a first impurity pattern in contact with first portions of the channel structure and having a first conductivity type, on the mold structure, and a second impurity pattern in contact with second portions of the channel structure and having a second conductivity type different from the first conductivity type, on the mold structure. |
| US11081498B2 |
Integrated assemblies having vertically-spaced channel material segments, and methods of forming integrated assemblies
Some embodiments include a NAND memory array having a vertical stack of alternating insulative levels and conductive levels. The conductive levels include control gate regions and distal regions proximate the control gate regions. The control gate regions have front surfaces, top surfaces and bottom surfaces. The top and bottoms surfaces extend back from the front surfaces. High-k dielectric material is along the control gate regions. The high-k dielectric material has first regions along the top and bottom surfaces, and has second regions along the front surfaces. The first regions are thicker than the second regions. Charge-blocking material is adjacent to the second regions of the high-k dielectric material. Charge-storage material is adjacent to the charge-blocking material. Gate-dielectric material is adjacent to the charge-storage material. Channel material is adjacent to the gate-dielectric material. Some embodiments include integrated assemblies. Some embodiments include methods of forming integrated assemblies. |
| US11081496B2 |
Three-dimensional memory devices and fabrication methods thereof
Embodiments of a method for forming three-dimensional (3D) memory devices include the following operations. First, an initial channel hole is formed in a stack structure of a plurality first layers and a plurality of second layers alternatingly arranged over a substrate. An offset is formed between a side surface of each one of the plurality of first layers and a side surface of each one of the plurality of second layers on a sidewall of the initial channel hole to form a channel hole. A semiconductor channel is further formed by filling the channel hole with a channel-forming structure. The semiconductor channel may have a memory layer having a first memory portion surrounding a bottom of each second layer and a second memory portion connecting adjacent first memory portions. The first memory portion and the second memory portion may be staggered along a vertical direction. |
| US11081495B2 |
Integrated structures
Some embodiments include an integrated structure having a conductive material, a select device gate material over the conductive material, and vertically-stacked conductive levels over the select device gate material. Vertically-extending monolithic channel material is adjacent the select device gate material and the conductive levels. The monolithic channel material contains a lower segment adjacent the select device gate material and an upper segment adjacent the conductive levels. A first vertically-extending region is between the lower segment of the monolithic channel material and the select device gate material. The first vertically-extending region contains a first material. A second vertically-extending region is between the upper segment of the monolithic channel material and the conductive levels. The second vertically-extending region contains a material which is different in composition from the first material. |
| US11081485B2 |
Monolithic integrated circuit device having gate-sinking pHEMTs
A monolithic integrated circuit device formed in a multi-layer structure comprises a low-pinch-off-voltage pHEMT and a high-pinch-off-voltage pHEMT. A Schottky layer in the multi-layer structure contains at least three stacked regions of semiconductor material, wherein each of the two adjacent stacked regions differs in material and provides a stacked region contact interface therebetween. The gate-sinking pHEMTs each includes a gate contact, a first gate metal layer, a gate-sinking region, and a gate-sinking bottom boundary. The first gate metal layers are in contact with the topmost stacked region of the Schottky layer. The gate-sinking regions are beneath the first gate metal layers. The gate-sinking bottom boundary of the high-pinch-off-voltage pHEMT, which is closer to the semiconductor substrate than the gate-sinking bottom boundary of the low-pinch-off-voltage pHEMT, locates within 10 Å above or below one of the stacked region contact interfaces of the Schottky layer. |
| US11081482B2 |
Fabrication of vertical fin field effect transistors having top air spacers and a self aligned top junction
A method of fabricating adjacent vertical fins with top source/drains having an air spacer and a self-aligned top junction, including, forming two or more vertical fins on a bottom source/drain, forming a top source/drain on each of the two or more vertical fins, wherein the top source/drains are formed to a size that leaves a gap between the adjacent vertical fins, and forming a source/drain liner on the top source/drains, where the source/drain liner occludes the gap between adjacent top source/drains to form a void space between adjacent vertical fins. |
| US11081474B1 |
Dynamic resource management in circuit bound array architecture
Systems and methods for dynamically assigning memory array die to CMOS die of a plurality of stacked die during memory operations are described. The plurality of stacked die may be vertically stacked and connected together via one or more vertical through-silicon via (TSV) connections. The memory array die may only comprise memory cell structures (e.g., vertical NAND strings) without column decoders, row decoders, charge pumps, sense amplifiers, control circuitry, page registers, or state machines. The CMOS die may contain support circuitry necessary for performing the memory operations, such as read and write memory operations. The one or more vertical TSV connections may allow each memory array die of the plurality of stacked die to communicate with or be electrically connected to one or more CMOS die of the plurality of stacked die. |
| US11081473B2 |
Semiconductor device package and method of manufacturing the same
A semiconductor device package includes a first substrate, a dielectric layer, a thin film transistor (TFT) and an electronic component. The first substrate has a first surface and a second surface opposite to the first surface. The dielectric layer is disposed on the first surface of the first substrate. The dielectric layer has a first surface facing away from the first substrate and a second surface opposite to the first surface. The TFT layer is disposed on the dielectric layer. The electronic component is disposed on the second surface of the first substrate. A roughness of the first surface of the dielectric layer is less than a roughness of the first surface of the first substrate. |
| US11081471B2 |
LED module with hermetic seal of wavelength conversion material
An LED module includes a substrate having a high thermal conductivity and at least one LED die mounted on the substrate. A wavelength conversion material, such as phosphor or quantum dots in a binder, has a very low thermal conductivity and is formed to have a relatively high volume and low concentration over the LED die so that the phosphor or quantum dots conduct little heat from the LED die. A transparent top plate, having a high thermal conductivity, is positioned over the wavelength conversion material, and a hermetic seal is formed between the top plate and the substrate surrounding the wavelength conversion material. The LED die is located in a cavity in either the substrate or the top plate. In this way, the temperature of the wavelength conversion material is kept well below the temperature of the LED die. The sealing is done in a wafer level process. |
| US11081470B2 |
Semiconductor device and method of manufacturing thereof
Various aspects of this disclosure provide a semiconductor device and a method of manufacturing a semiconductor device. As a non-limiting example, various aspects of this disclosure provide a semiconductor device comprising a stacked die structure and a method of manufacturing thereof. |
| US11081469B2 |
Three-dimensional integrated circuit test and improved thermal dissipation
A three-dimensional (3D) integrated circuit (IC) can include a bottom tier with first circuitry and first backside TSVs coupled to a substrate; a top tier coupled to the first tier at a front side and having second circuitry and second backside TSVs; and a heat conductor on the second backside TSVs of the top tier. The heat conductor is coupled to the second backside TSVs to provide improved heat dissipation through the top tier. During pre-bond testing, the top tier can be tested at speed using the second backside TSVs. |
| US11081467B2 |
Apparatuses and methods for arranging through-silicon vias and pads in a semiconductor device
A semiconductor device may include a bond pad/probe pad pair that includes a bond pad and a probe pad positioned to be adjacent to each other to form an L shape. The device may also include a through-silicon via (TSV) pad positioned to be at least partially or entirely inside the recess area of the L shape. The bond pad and the probe pad may each have an opening, and at least a portion of the opening of the bond pad may extend into a portion of the opening of the probe pad. The arrangement of the bond pad, the probe pad and the TSV may be implemented in a wafer-on-wafer (WOW) that includes multiple stacked wafers. A method of fabricating the TSV may include etching the stacked wafers to form a TSV opening that extends through the multiple wafers, and filling the TSV opening with conductive material. |
| US11081463B2 |
Bonding method with electron-stimulated desorption
A method for directly bonding a first and a second substrate. The method comprises removing surface oxide layers from bonding faces of the first and of the second substrate, and hydrogen passivation of the bonding faces, then, in a vacuum, electron impact hydrogen desorption on the bonding faces followed by placement of the bonding faces in intimate contact with one another. |
| US11081462B2 |
Method for manufacturing a bonding structure
A bonding structure and a method for manufacturing the same. First edge trimming is performed from the bonding surface of an n-th wafer in bonding the n-th wafer and an (n−1)th wafer, and a width of the first edge trimming is Wn. As n increases, the width of the first edge trimming is gradually increased. In the trimming, a portion that is not even at the edge of the n-th wafer can be removed. The bonding surface of the n-th wafer faces the bonding surface of the (n−1)-th wafer, so as to bond the n-th wafer and the (n−1)-th wafer. Afterwards the substrate of the n-th wafer is thinned, so as to form the (n−1)-th wafer stack. There is a reduced possibility that a gap exists between the bonding interfaces of the wafers, a bonding strength between the wafers is improved, and a risk of cracking is reduced. |
| US11081454B2 |
Semiconductor device and method of manufacturing the same
Reliability of a semiconductor device having a plated layer formed on an electrode pad is improved. The method of manufacturing the semiconductor device includes a step for forming the plated layer on the electrode pad by moving the semiconductor wafer at a second speed, in a nickel-plating solution, after moving the semiconductor wafer at a first speed higher than the second speed. After moving the semiconductor wafer at the first speed, the semiconductor wafer is moved at the second speed without bringing the semiconductor wafer out from the nickel-plating solution. |
| US11081446B2 |
Semiconductor device
A semiconductor device that includes active patterns defined in a substrate, and gate patterns extending in a first direction while traversing the active patterns. First wiring line patterns disposed over a first dielectric layer which covers the gate patterns, and extending in the first direction. The first wiring line patterns comprise internal wiring line patterns coupled with first vertical vias, which pass through the first dielectric layer and are coupled to the active patterns and the gate patterns, and power routing patterns not coupled with the first vertical vias. The first wiring line patterns are aligned in conformity with virtual wiring line pattern tracks which are defined at a first pitch along a second direction intersecting with the first direction, and the first active patterns are disposed between the power routing patterns when viewed on a top. |
| US11081445B2 |
Semiconductor device comprising air gaps having different configurations
A semiconductor device includes a first interlayer dielectric layer disposed over a substrate, metal wirings, a second interlayer dielectric layer disposed over the first interlayer dielectric layer and the metal wirings, a first air gap and a second air gap. The metal wirings are embedded in the first interlayer dielectric layer, and arranged with a first space or a second space between the metal wirings. The second space has a greater length than the first space. The first air gap is formed by the second interlayer dielectric layer and formed in a first area sandwiched by adjacent two metal wirings arranged with the first space. The second air gap is formed by the second interlayer dielectric layer and formed in a second area sandwiched by adjacent two metal wirings arranged with the second space therebetween. No adjacent two metal wirings are arranged with a space smaller than the first space. |
| US11081443B1 |
Multi-tier three-dimensional memory device containing dielectric well structures for contact via structures and methods of forming the same
A first vertically alternating sequence of first insulating layers and first spacer material layers and a first-tier retro-stepped dielectric material portion are formed over a substrate. The first spacer material layers are formed as, or are subsequently replaced with, first electrically conductive layers. A second vertically alternating sequence of second insulating layers and second spacer material layers and a second-tier retro-stepped dielectric material portion are formed over the first vertically alternating sequence and the first-tier retro-stepped dielectric material portion. The second spacer material layers are formed as, or are subsequently replaced with, second electrically conductive layers. An opening is formed through the second vertically alternating sequence over the first-tier retro-stepped dielectric material portion, and is filled with a dielectric well structure. Contact via structures can be formed through the dielectric well structure and the first-tier retro-stepped dielectric material portion on the first electrically conductive layers. |
| US11081436B2 |
Component carrier with integrated strain gauge
A component carrier for carrying an electronic component on and/or in the component carrier, wherein the component carrier includes an interconnected stack composed of a plurality of electrically conductive layer structures and a plurality of electrically insulating layer structures, wherein at least part of at least one of the electrically conductive layer structures is configured as at least part of an integrated strain gauge configured for detecting strain exerted on at least part of the component carrier. |
| US11081435B2 |
Package substrate and flip-chip package circuit including the same
This disclosure provides a package substrate, a flip-chip package circuit, and their fabrication methods. The package substrate includes: a first wiring layer having a first dielectric material layer and a first metal wire protruding from the first dielectric material layer; a conductive pillar layer formed on the first wiring layer and including a molding compound layer, a second dielectric material layer formed on the molding compound layer, and a metal pillar connected to the first metal wire; a second wiring layer formed on the conductive pillar layer and including a second metal wire connected to the metal pillar; and a protection layer formed on the second wiring layer. |
| US11081430B2 |
Multi-die-package and method
A package and a corresponding method are described. The method includes: providing a processed first wafer having front and back sides and including power semiconductor dies implemented within the wafer by processing its front side, each die having a first load terminal at the front side and a second load terminal at the back side; providing an unprocessed second wafer made of an electrically insulating material and having first and second opposing sides; forming a plurality of recesses within the second wafer; filling the plurality of recesses with a conductive material; forming a stack by attaching, prior or subsequent to filling the recesses, the second wafer to the front side of the first wafer, the conductive material electrically contacting the first load terminals of the power semiconductor dies; and ensuring that the conductive material provides an electrical connection between the first side and the second side of the second wafer. |
| US11081429B2 |
Finger pad leadframe
A packaged semiconductor device includes a leadframe including a finger pad(s) that is integrated, and spans a finger pad area including a width narrower than its length. A first portion of the finger pad area provides a die support area. A second portion of the finger pad area provides a wire bond area including first and second wire bond pads on a first and second side of the die support area. One of the wire bond pads further includes a lead terminal integrally connected. The IC die has a top side with bond pads and a back side having a non-electrically conductive die attach material attached to the die support area. Bond wires extend from the bond pads to the first and second wire bond pads. A mold compound encapsulates the packaged semiconductor device leaving exposed at least the lead terminal on a bottom side of the packaged semiconductor device. |
| US11081420B2 |
Substrate structure and semiconductor package structure
A semiconductor package structure includes a package substrate, at least one semiconductor die, a heat dissipating device, at least one electronic device and a heat transmitting structure. The package substrate has a first surface and a second surface opposite to the first surface. The semiconductor die is electrically connected to the first surface of the package substrate. The heat dissipating device is thermally connected to the first surface of the package substrate. The electronic device is electrically connected to the second surface of the package substrate. The electronic device has a first surface and a second surface opposite to the first surface, and the first surface of the electronic device faces the second surface of the package substrate. The heat transmitting structure is disposed adjacent to the second surface of the package substrate, and thermally connected to the electronic device and the heat dissipating device. |
| US11081419B2 |
Semiconductor package and a method of manufacturing the same
A method to manufacture a semiconductor package includes: preparing a metal substrate; attaching semiconductor dies to the metal substrate at an interval; attaching a bonding film to the semiconductor dies; applying a mold material on the semiconductor dies and the metal substrate, and curing the mold material to form a mold member; grinding the mold member and the metal substrate to a thickness; removing the bonding film; attaching a redistribution layer to the semiconductor dies; and cutting between the semiconductor dies. |
| US11081418B2 |
Thermally enhanced semiconductor package with at least one heat extractor and process for making the same
The present disclosure relates to a thermally enhanced package, which includes a carrier, a thinned die over the carrier, a mold compound, and a heat extractor. The thinned die includes a device layer over the carrier and a dielectric layer over the device layer. The mold compound resides over the carrier, surrounds the thinned die, and extends beyond a top surface of the thinned die to define an opening within the mold compound and over the thinned die. The top surface of the thinned die is at a bottom of the opening. At least a portion of the heat extractor is inserted into the opening and in thermal contact with the thinned die. Herein the heat extractor is formed of a metal or an alloy. |
| US11081416B2 |
Configuring a sealing structure sealing a component embedded in a component carrier for reducing mechanical stress
A component carrier including a stack of at least one electrically conductive layer structure and at least one electrically insulating layer structure, a component embedded in the stack, and a sealing structure sealing at least part of the component with regard to material of the stack, wherein the sealing structure is configured for reducing stress between the component and the stack. |
| US11081415B2 |
Method for manufacturing electronic package
The disclosure provides an electronic package and a method of manufacturing the same. The method is characterized by encapsulating an electronic component with a packaging layer and forming on an upper surface of the packaging layer a circuit structure that is electrically connected to the electronic component; and forming a stress-balancing layer on a portion of the lower surface of the packaging layer to balance the stress exerted on the upper and lower surfaces of the packaging layer, thereby reducing the overall package warpage and facilitating the manufacturing process. |
| US11081413B2 |
Semiconductor package with inner and outer cavities
A semiconductor package structure includes a substrate, a semiconductor die, a lid and a cap. The semiconductor die is disposed on the substrate. The lid is disposed on the substrate. The cap is disposed on the lid. The substrate, the lid and the cap define a cavity in which the semiconductor die is disposed, and a pressure in the cavity is greater than an atmospheric pressure outside the cavity. |
| US11081411B2 |
Semiconductor structure
A semiconductor structure (100; 200) is provided. The semiconductor structure (100; 200) comprises a substrate (5); a plurality of test structures (101, 102, 201, 202) on the substrate, wherein the plurality of test structures comprise a first set of test structures (101, 102) and a second set of test structures (201, 202); a plurality of test electrodes (10, 20, 30) provided on the substrate, wherein the test electrodes comprise a first set of electrodes (10) operatively connected to the first set of test structures (101, 102), and a second set of electrodes (20) operatively connected to the second set of test structures (201, 202), wherein the first set of electrodes (10) are spaced apart from one another by a predetermined pitch and are configured to be operatively connectable to a probe card (8) having a plurality of probe pins (7) spaced apart from one another by the predetermined pitch to test the first set of test structures, and wherein the second set of electrodes (20) are spaced apart from one another by the predetermined pitch and are configured to be operatively connectable to the probe card (8) to test the second set of test structures; and wherein at least one electrode within the second set of electrodes (20) is disposed between adjacent electrodes within the first set of electrodes (10) along a length of the first set of electrodes (V). |
| US11081410B2 |
Method of manufacturing semiconductor device
A method of manufacturing a semiconductor device from a semiconductor wafer in which a plurality of semiconductor chips are formed. The method includes a first process of forming an active region on a first main surface side of the semiconductor wafer and a second process of forming a first process control monitor (PCM) on a second main surface side of the semiconductor wafer. The method further includes before the second process, a third process of forming a second PCM on the first main surface side of the semiconductor wafer. The first PCM and the second PCM are formed at an area located at the same position in a plan view of the semiconductor wafer. |
| US11081405B2 |
Method for measurement of semiconductor device fabrication tool implement
Methods are described that include providing a laser-based measurement tool. An implement of a semiconductor fabrication process tool (e.g., susceptor) is delivered to the laser-based measurement tool where a plurality of measurements is performed of a surface of the implement using a blue wavelength radiation. The measurements are of a distance (e.g., angstroms) from a reference plane and provide an indication of the profile of the surface of the susceptor. As the surface profile of the susceptor can affect layers deposited on target substrates using the susceptor, the measurements provide for a disposition of the susceptor. |
| US11081404B2 |
Source/drain for gate-all-around devices
A method of forming a nanosheet device is provided. The method includes forming two amorphous source/drain fills on a substrate and one or more semiconductor nanosheet layers between the two amorphous source/drain fills. The method further includes forming a gate dielectric layer on exposed portions of the one or more semiconductor nanosheet layers. The method further includes forming a protective capping layer on the gate dielectric layer, and subjecting the two amorphous source/drain fills to a recrystallization treatment to cause a phase change from the amorphous state to a single crystal or poly-crystalline phase. |
| US11081402B2 |
Replacement gate process for semiconductor devices
Disclosed is a method of forming a semiconductor device. The method includes providing a precursor having a substrate and gate stacks over the substrate, wherein each of the gate stacks includes an electrode layer, a first hard mask (HM) layer over the electrode layer, and a second HM layer over the first HM layer. The method further includes depositing a dielectric layer over the substrate and the gate stacks and filling spaces between the gate stacks; and performing a first chemical mechanical planarization (CMP) process to partially remove the dielectric layer. The method further includes performing an etching process to remove the second HM layer and to partially remove the dielectric layer, thereby exposing the first HM layer. The method further includes performing a second CMP process to at least partially remove the first HM layer. |
| US11081397B2 |
Forming a protective layer to prevent formation of leakage paths
A gate structure is formed over a substrate. The gate structure includes a gate electrode and a hard mask located over the gate electrode. The hard mask comprises a first dielectric material. A first interlayer dielectric (ILD) is formed over the gate structure. The first ILD comprises a second dielectric material different from the first dielectric material. A first via is formed in the first ILD. Sidewalls of the first via are surrounded by spacers that comprise the first dielectric material. A second ILD is formed over the first ILD. A via hole is formed in the second ILD. The via hole exposes the first via. A protective layer is formed in the via hole. A bottom segment of the protective layer is removed. Thereafter, an etching process is performed. A remaining segment of the protective layer prevents an etching of the spacers during the etching process. |
| US11081396B2 |
Semiconductor device and method
An improved work function layer and a method of forming the same are disclosed. In an embodiment, the method includes forming a semiconductor fin extending from a substrate; depositing a dielectric layer over the semiconductor fin; depositing a first work function layer over the dielectric layer; and exposing the first work function layer to a metastable plasma of a first reaction gas, a metastable plasma of a generation gas, and a metastable plasma of a second reaction gas, the first reaction gas being different from the second reaction gas. |
| US11081395B2 |
Fin field effect transistor having air gap and method for manufacturing the same
A method of manufacturing a FinFET includes at last the following steps. A semiconductor substrate is patterned to form trenches in the semiconductor substrate and semiconductor fins located between two adjacent trenches of the trenches. Gate stacks is formed over portions of the semiconductor fins. Strained material portions are formed over the semiconductor fins revealed by the gate stacks. First metal contacts are formed over the gate stacks, the first metal contacts electrically connecting the strained material portions. Air gaps are formed in the FinFET at positions between two adjacent gate stacks and between two adjacent strained materials. |
| US11081387B2 |
Creating an aligned via and metal line in an integrated circuit including forming an oversized via mask
A method of forming an integrated circuit includes: forming a dielectric layer, a hard mask layer, a film layer and a photoresist layer; and patterning the photoresist layer to form a via mask, where the via mask is oversized, such that the via mask extends across opposing sides of a metal line mask in the hard mask layer. The method further includes: etching the film layer and the dielectric layer based on the patterned photoresist layer; ashing the photoresist layer and the film layer; etching the dielectric layer based on a pattern of the hard mask layer to provide a via region and a metal line region; etching the hard mask layer and the dielectric layer; and performing a plurality of dual damascene process operations to form a via in the via region and a metal line in the metal line region in the integrated circuit. |
| US11081385B2 |
RF devices with enhanced performance and methods of forming the same utilizing localized SOI formation
The present disclosure relates to a radio frequency (RF) device including a device substrate, a thinned device die with a device region over the device substrate, a first mold compound, and a second mold compound. The device region includes an isolation portion, a back-end-of-line (BEOL) portion, and a front-end-of-line (FEOL) portion with a contact layer and an active section. The contact layer resides over the BEOL portion, the active section resides over the contact layer, and the isolation portion resides over the contact layer to encapsulate the active section. The first mold compound resides over the device substrate, surrounds the thinned device die, and extends vertically beyond the thinned device die to define an opening over the thinned device die and within the first mold compound. The second mold compound fills the opening and directly connects the isolation portion of the thinned device die. |
| US11081384B2 |
Method for stabilizing a semiconductor arrangement
A method includes producing a semiconductor arrangement having a semiconductor layer, a first insulation layer arranged on the semiconductor layer and facing a first surface of the semiconductor arrangement, and an insulating via extending in a vertical direction through the semiconductor layer as far as the first insulation layer, the insulating via surrounding a region of the semiconductor layer in a ring-shaped fashion. The method further includes permanently securing a first carrier to the first surface of the semiconductor arrangement. |
| US11081383B2 |
Substrate table with vacuum channels grid
A substrate table is provided. The substrate table includes a main body configured to support a substrate thereon. The substrate table further includes a number of vacuum channels provided in the main body and respectively formed with a vacuum opening on a surface of the main body. The vacuum channels are configured to apply a vacuum to the substrate. The vacuum channels are distributed throughout the main body and arranged in a grid pattern. |
| US11081382B2 |
Method for processing a substrate assembly and wafer composite structure
A method for processing a substrate assembly with a semiconductor device layer includes: arranging an auxiliary carrier at the substrate assembly such that a connection surface of the auxiliary carrier and a first surface of the substrate assembly directly adjoin each other; fixedly attaching the auxiliary carrier to the substrate assembly by melting a carrier portion of the auxiliary carrier and a substrate portion of the substrate assembly that directly adjoins the carrier portion such that the auxiliary carrier and the substrate assembly locally fuse only in fused portions of the auxiliary carrier and the substrate assembly, wherein the fused portions are laterally separated from each other by at least one unfused portion; and processing the semiconductor device layer of the substrate assembly with the auxiliary carrier fixedly attached to the substrate assembly. |
| US11081381B2 |
Ceramic structure
A ceramic structure includes a ceramic base member having a main face; a hole extending from the main face into the ceramic base member; a metal electrode layer embedded in the ceramic base member; a conductive member embedded in the ceramic base member so as to be electrically connected to the metal electrode layer and form a bottom of the hole; a first metal member joined to the conductive member by a brazing material and having an average linear expansion coefficient not less than the average linear expansion coefficient of the conductive member; one or a plurality of second metal members having a greater average linear expansion coefficient than the first metal member; and a metal terminal joined to the one or the plurality of second metal members and having a greater average linear expansion coefficient than each second metal member. |
| US11081377B2 |
Substrate processing system
A substrate processing system comprising: a first chamber comprising loading tables, on which a plurality of substrates are to be loaded; a second chamber comprising loading tables, on which a plurality of substrates are to be loaded; a first transfer device comprising a plurality of blades configured to hold a plurality of substrates in a lengthwise direction thereof, and configured to transfer a plurality of substrates loaded on the loading tables of the first chamber to the loading tables of the second chamber with the substrates held at the same height; a substrate sensor provided on paths, along which the blades enter the second chamber, and configured to detect a substrate held by the blades; and a controller configured to control the first transfer device. |
| US11081376B2 |
Substrate processing apparatus, transfer module, and coupling module
A first processing module includes a first specified processing unit and a first delivery part. A substrate supply part is on a first direction side of the first processing module. A transfer module is on a second direction side on the opposite of the first processing module from the first direction. The transfer module includes a frame, a first floor, a second floor, and a gateway. The frame defines a placement space in which a first transfer apparatus of the transfer module is placed. A first transfer apparatus is installed on the first floor. The second floor is on a third direction side, which is a horizontal direction orthogonal to the first direction, with respect to the first floor inside the placement space. The gateway is provided on the third direction side with respect to the second floor and communicates the placement space to the outside of the frame. |
| US11081374B2 |
Semiconductor package molding device and method of manufacturing semiconductor device
A semiconductor package molding device is provided. The semiconductor package molding device includes a chamber lower part which comprises a lower mold configured to receive a molding target, a chamber upper part configured to engage with the chamber lower part to isolate the inside of a chamber from the outside of the chamber, the chamber upper part including an upper mold configured to form a cavity with the lower mold, a first vent hole located between the chamber upper part and the chamber lower part, the first vent hole configured to discharge gas from the inside of the cavity after the chamber upper part and the chamber lower part engage with each other, a pot which is formed in the lower mold in the chamber lower part, a plunger configured to push up a molding material in the pot, a second vent hole which is formed in a side surface of the pot in the chamber lower part and a cavity vacuum pump configured to discharge gas through the first vent hole and the second vent hole. |
| US11081373B2 |
Substrate cleaning apparatus and substrate cleaning method
According to one embodiment, a substrate cleaning apparatus that cleans a substrate while rotating the substrate, the substrate cleaning apparatus includes: a first cleaning liquid supplier that sprays cleaning liquid in a spray shape at a first spraying angle toward a center of the substrate; and a second cleaning liquid supplier that sprays cleaning liquid in a spray shape at a second spraying angle greater than the first spraying angle toward an area between the center of the substrate and an edge of the substrate. |
| US11081372B2 |
Package system for integrated circuits
A package system includes a first interposer including a first substrate having first and second primary surfaces on opposite sides of the first substrate. The package system includes a first interconnect structure over the first surface, the first interconnect structure having a first metallic line pitch LP1. The package system includes a plurality of first through silicon via (TSV) structures in the first substrate. The package system includes a molding compound material partially enveloping the first substrate. The package system includes a plurality of through vias in the molding compound material, wherein each through via of the plurality of through vias is offset from the first substrate. The package system includes a second interconnect structure on a second surface of the first substrate. The second interconnect structure has a second metallic line pitch LP2, and LP2>LP1. The package system includes a first integrated circuit over the first interposer. |
| US11081371B2 |
Chip package process
A chip package process includes the following steps. A supporting structure and a carrier plate are provided. The supporting structure has a plurality of openings. The supporting structure is disposed on the carrier plate. A plurality of chips is disposed on the carrier plate. The chips are respectively located in the openings of the supporting structure. An encapsulated material is formed to cover the supporting structure and the chips. The supporting structure and the chips are located between the encapsulated material and the carrier plate. The encapsulated material is filled between the openings and the chips. The carrier plate is removed. A redistribution structure is disposed on the supporting structure, wherein the redistribution structure is connected to the chips. |
| US11081370B2 |
Methods of manufacturing an encapsulated semiconductor device
A method of manufacturing a semiconductor package includes mounting and electrically connecting a semiconductor die to a substrate. The semiconductor die and the substrate are encapsulated to form an encapsulation. Via holes are laser-ablated through the encapsulation and conductive material is deposited within the via holes to form vias. A first buildup dielectric layer is formed on the encapsulation. Laser-ablated artifacts are laser-ablated in the first buildup layer. The laser-ablated artifacts in the first buildup layer are filled with a first metal layer to form a first electrically conductive pattern in the first build up layer. The operations of forming a buildup layer, forming laser-ablated artifacts in the buildup layer, and filling the laser-ablated artifacts with an electrically conductive material to form an electrically conductive pattern can be performed any one of a number of times to achieve the desired redistribution. |
| US11081364B2 |
Reduction of crystal growth resulting from annealing a conductive material
Systems, apparatuses, and methods related to reduction of crystal growth resulting from annealing a conductive material are described. An example apparatus includes a conductive material selected to have an electrical resistance that is reduced as a result of annealing. A stabilizing material may be formed over a surface of the conductive material. The stabilizing material may be selected to have properties that include stabilization of the reduced electrical resistance of the conductive material and reduction of a degree of freedom of crystal growth relative to the surface resulting from recrystallization of the conductive material during the annealing. |
| US11081362B2 |
Method of manufacturing semiconductor device, and recording medium
There is provided a technique that includes: (a) loading a substrate including a base and a first film containing silicon and formed on the base into a process container; (b) converting a modifying gas containing helium into plasma to generate reactive species of helium; and (c) supplying the modifying gas containing the reactive species of helium to a surface of the substrate to respectively modify the first film and an interface layer of the base constituting an interface with the first film. |
| US11081360B2 |
Method for processing workpiece
In an embodiment, in the method for processing a workpiece including an etching target layer containing silicon oxide, a mask provided on the etching target layer, and an opening provided in the mask and exposing the etching target layer, according to the embodiment, the etching target layer is etched by removing the etching target layer for each atomic layer through repetitive execution of a sequence of generating plasma of a first processing gas containing nitrogen, forming a mixed layer containing ions included in the plasma on an atomic layer on an exposed surface of the etching target layer, generating plasma of a second processing gas containing fluorine, and removing the mixed layer by radicals included in the plasma. The plasma of the second processing gas contains the radicals that remove the mixed layer containing silicon nitride. |
| US11081359B2 |
Methods for polishing semiconductor substrates that adjust for pad-to-pad variance
Methods for polishing semiconductor substrates that involve adjusting the finish polishing sequence based on the pad-to-pad variance of the polishing pad are disclosed. |
| US11081356B2 |
Method for metal gate cut and structure thereof
A method includes providing a structure having a substrate, first and second semiconductor fins extending from the substrate, and a dielectric fin between the first and second semiconductor fins; forming a temporary gate on top and sidewalls of the first and second semiconductor fins and the dielectric fin; forming gate spacers on sidewalls of the temporary gate; removing the temporary gate and a first portion of the dielectric fin between the gate spacers; forming a gate between the gate spacers and on top and sidewalls of the first and second semiconductor fins, wherein the dielectric fin is in physical contact with sidewalls of the gate; removing a second portion of the dielectric fin, thereby exposing the sidewalls of the gate; and performing an etching process to the gate through the exposed sidewalls of the gate, thereby separating the gate into a first gate segment and a second gate segment. |
| US11081355B2 |
Semiconductor device and method of manufacturing same
A semiconductor device includes a semiconductor part; first and second electrodes, the semiconductor part being provided between the first and second electrodes; a control electrode selectively provided between the semiconductor part and the second electrode; and a contacting part electrically connecting the semiconductor part and the second electrode. The semiconductor part includes a first layer of a first conductivity type, a second layer of a second conductivity type provided between the first layer and the second electrode, a third layer of the first conductivity type selectively provided between the second layer and the second electrode, and a fourth layer of the second conductivity type selectively provided between the second layer and the second electrode. The contacting part includes a first semiconductor portion of the first conductivity type contacting the third layer, and a second semiconductor portion of the second conductivity type contacting the fourth layer. |
| US11081353B2 |
Semiconductor device and manufacturing method thereof
A method of manufacturing a semiconductor device includes the following steps. A first patterned photoresist layer is formed on a substrate. A second patterned photoresist layer is formed on the substrate after the first patterned photoresist layer is formed, wherein the first patterned photoresist layer and the second patterned photoresist layer are arranged alternatively. A liner is formed to cover sidewalls of the first patterned photoresist layer and the second patterned photoresist layer. The present invention also provides a semiconductor device, including a plurality of pillars being disposed on a layer, wherein the layer includes first recesses and second recesses, wherein the depths of the first recesses are less than the depths of the second recesses. |
| US11081350B2 |
Semiconductor device and method of manufacture
A semiconductor device and method of manufacture are provided. After a patterning of a middle layer, the middle layer is removed. In order to reduce or prevent damage to other underlying layers exposed by the patterning of the middle layer and intervening layers, an inhibitor is included within an etching process in order to inhibit the amount of material removed from the underlying layers. |
| US11081338B2 |
Method of forming oxide film including two non-oxygen elements, method of manufacturing semiconductor device, method of forming dielectric film, and semiconductor device
A method of forming an oxide film including two non-oxygen elements includes providing a first source material on a substrate, the first source material including a first central element, providing an electron donor compound to be bonded to the first source material, providing a second source material on the substrate after the providing of the electron donor compound, the second source material including a second central element, and providing an oxidant on the substrate. |
| US11081335B2 |
Methods for forming electronic devices from nanomaterials
A multi-scale manufacturing system comprising a centrally located multi-axis and multi-dimensional first manipulating component associated with a housing for manipulating a substrate and a template, a control subsystem coupled to the first manipulating component for controlling movement thereof, a pre-alignment subsystem for pre-aligning the substrate and the template, an assembly station for applying nanomaterial to the template, an alignment station for aligning the template and the substrate together to form a workpiece assembly, and a transfer subsystem for applying pressure to the workpiece assembly for transferring the nanomaterial from the template to the substrate. |
| US11081334B2 |
Particle prevention in wafer edge trimming
In some embodiments, the present disclosure relates to a wafer trimming and cleaning apparatus, which includes a blade that is configured to trim a damaged edge portion of a wafer, thereby defining a new sidewall of the wafer. The wafer trimming and cleaning apparatus further includes water nozzles and an air jet nozzle. The water nozzles are configured to apply deionized water to the new sidewall of the wafer to remove contaminant particles generated by the blade. The air jet nozzle is configured to apply pressurized gas to a first top surface area of the wafer to remove the contaminant particles generated by the blade. The first top surface area overlies the new sidewall of the wafer. |
| US11081332B2 |
Ion guide within pulsed converters
Elongation of orthogonal accelerators is assisted by ion spatial transverse confinement within novel confinement means, formed by spatial alternation of electrostatic quadrupolar field (22). Contrary to prior art RF confinement means, the static means provide mass independent confinement and may be readily switched. Spatial confinement defines ion beam (29) position, prevents surfaces charging, assists forming wedge and bend fields, and allows axial fields in the region of pulsed ion extraction, this way improving the ion beam admission at higher energies and the spatial focusing of ion packets in multi-reflecting, multi-turn and singly reflecting TOF MS or electrostatic traps. |
| US11081330B2 |
Chemical etching of emitter tips
A method of forming a capillary tube for electrospray ionization (ESI) having at least one tip with a desired tip profile. The method includes providing a pre-finished capillary tube of substantially homogenous material. The capillary tube has a first end and an internal bore. The first end of the pre-finished capillary tube is wet-etched in an etchant for an etch duration. A protective fluid flows through the internal bore of the capillary tube at a flow rate during the etch duration and the flow rate and the etch duration are determined to obtain the desired tip profile below a liquid level of the etchant. |
| US11081329B2 |
Ionisation of gaseous samples
A method of mass spectrometry or ion mobility spectrometry is disclosed comprising: providing an analyte; supplying a matrix compound to said analyte such that said analyte dissolves in said matrix; forming first droplets of the dissolved analyte; and colliding said first droplets with a collision surface. The use of matrix improves the analyte ion signal. |
| US11081325B2 |
Conductive target material
The present invention relates to a conductive target material comprising essentially one lithium compound, preferably lithium phosphate, and carbon, and also typical impurities. The invention further relates to a process for producing a conductive target material and to the use thereof. |
| US11081323B2 |
Sputtering cathode, sputtering cathode assembly, and sputtering apparatus
The sputtering cathode has a tubular shape having a pair of long sides facing each other in cross-sectional shape, has a sputtering target whose erosion surface faces inward, and a magnetic circuit is provided along the sputtering target. The pair of long sides are constituted by rotary targets each having a cylindrical shape. The rotary target is internally provided with a magnetic circuit and configured to allow the flow of cooling water. The magnetic circuit is provided parallel to the central axis of the rotary target and has a rectangular cross-sectional shape having a long side perpendicular to the radial direction of the rotary target. |
| US11081322B2 |
Film forming apparatus, cleaning method for film forming apparatus and recording medium
A film forming apparatus 1 includes a plasma generating mechanism 47 commonly used for plasmarizing a processing gas and a cleaning gas supplied into a processing vessel 11 in which a vacuum atmosphere is formed; an exhaust device 17 configured to evacuate an exhaust line 61 connected to a processing gas discharge unit 43 while the plasmarization of the cleaning gas is being performed by the plasma generating mechanism 47; a tank 62 provided at the exhaust line 61; and a valve V2 which is provided at the exhaust line 61 between the tank 62 and the processing gas discharge unit 43. The valve V2 is configured to be closed to reduce an internal pressure of the tank 62 and opened to attract the plasmarized cleaning gas into the tank 62 from a processing space 40 through the processing gas discharge unit 43. |
| US11081320B2 |
Plasma processing apparatus, plasma processing method, and ECR height monitor
A plasma processing apparatus includes a processing chamber 101 where a wafer 114 is processed using plasma 111, a radio frequency power supply 106 configured to supply a radio frequency power for generating the plasma 111, a mechanism configured to form a magnetic field for forming ECR and to control a magnetic flux density thereof, and a sample stage 113 on which the wafer 114 is placed. The plasma processing apparatus further includes a control unit 107 configured to, based on image data of the plasma 111, monitor a height of ECR which is electron cyclotron resonance generated by an interaction between the radio frequency power and the magnetic field, and to control a frequency of the radio frequency power such that the monitored ECR height becomes a predetermined height. |
| US11081317B2 |
Modular high-frequency source
Embodiments include a modular high-frequency emission source. In an embodiment, the modular high-frequency emission source includes a plurality of high-frequency emission modules, where each high-frequency emission module comprises an oscillator module, an amplification module, and an applicator. In an embodiment the oscillator module comprises a voltage control circuit and a voltage controlled oscillator. In an embodiment, the amplification module is coupled to the oscillator module. In an embodiment, the applicator is coupled to the amplification module. In an embodiment, each high-frequency emission module includes a different oscillator module. |
| US11081316B2 |
Impedance matching network and method
In one embodiment, an RF impedance matching network for a plasma chamber is disclosed. The matching network includes a mechanically variable capacitor (MVC) and a second variable capacitor. A control circuit is configured to carry out a first process for altering the second variable capacitor and the RF source frequency to reduce reflected power. The control circuit is further configured to carry out a second process of, upon determining that the alteration of the RF source frequency has caused the RF source frequency to be outside, at a minimum, or at a maximum of a predetermined frequency range, determining a new MVC configuration to cause the RF source frequency, according to the first process, to be altered to be within or closer to the predetermined frequency range. The new MVC configuration is based on the RF source frequency and the predetermined frequency range. |
| US11081313B2 |
Particle-optical corrector which is free from axial aberrations of sixth order and electron microscope with corrector
A corrector has a strength of a central hexapole field (ΨHP2) which is selected such that the threefold axial astigmatism (A2) vanishes and the strengths of two equal outer hexapole fields (ΨHP1,3) are selected such that the overall corrector (5) does not have a sixfold axial astigmatism (A5). The length (L) of the central multipole element (2) in relation to the lengths (L′) of the multipole elements (1 and 3) is chosen such that the axial three-lobed aberration of sixth order (D6) vanishes. A separation between the outer multipole elements (1 and 3) and round lenses (7″, 8″) further spaced apart from a symmetry plane (6) of the corrector corresponds to the focal length (f′) of those round lenses (7″, 8″) plus an additional separation (Δz) which is chosen such that the axial three-lobed aberration of fourth order (D4) vanishes for the given lengths L and L′. |
| US11081311B2 |
X-ray tube heat sink and target material
An x-ray source can include an x-ray tube, and a heat sink for removal of heat from the x-ray tube. The heat sink can be thermally coupled to the anode and can extend away from the anode along a heat sink longitudinal axis. The heat sink can have a base and a fin extending from the base. The base can have a greater thickness nearer the anode, and a reduced thickness along the heat sink longitudinal axis to a smaller thickness farther from the anode. |
| US11081310B2 |
Photocathode including silicon substrate with boron layer
A photocathode is formed on a monocrystalline silicon substrate having opposing illuminated (top) and output (bottom) surfaces. To prevent oxidation of the silicon, a thin (e.g., 1-5 nm) boron layer is disposed directly on the output surface using a process that minimizes oxidation and defects. An optional second boron layer is formed on the illuminated (top) surface, and an optional anti-reflective material layer is formed on the second boron layer to enhance entry of photons into the silicon substrate. An optional external potential is generated between the opposing illuminated (top) and output (bottom) surfaces. The photocathode forms part of novel electron-bombarded charge-coupled device (EBCCD) sensors and inspection systems. |
| US11081308B2 |
Vertical surface mount device pass-through fuse
A vertical surface mount device pass-through fuse including an electrically insulating fuse body, a fusible element disposed on a first side of the fuse body and extending between first and second terminals, an electrically insulating cap having a domed portion and a flanged portion extending from the domed portion, the domed portion disposed over the fusible element, and the flanged portion affixed to the fuse body, and a conductive lead frame having a bow portion and an elongate shank portion extending from the bow portion, wherein the bow portion is disposed on the cap and is connected to the first terminal, and wherein the shank portion extends away from the fuse body. |
| US11081306B2 |
Process of manufacturing heat resistant and low carbon plate for circuit breaker
A process of manufacturing a heat resistant and low carbon plate for a circuit breaker includes preparing a heat resistant and low carbon plate for a circuit breaker; coating the heat resistant and low carbon plate with organic material; coating the organic material with inorganic material; and heating and drying the heat resistant and low carbon plate. The process continuously grips each of heat resistant and low carbon plates conveyed on a conveyor with a coat application device being used for the coating steps. A circuit breaker having the heat resistant and low carbon plate is also provided. |
| US11081305B2 |
Method, controller and system for regulating a current of a coil
Embodiments of the present disclosure provide method, controller and system for regulating a current of a coil. The method comprises: obtaining a first sample value of the current of the coil at a first moment, the first sample value being associated with a duty cycle of a PWM signal applied to a control end of a switch and the switch being coupled in series with the coil; obtaining a second sample value of the current of the coil at a second moment; determining a difference value between the first and the second sample values; and updating the duty cycle of the PWM signal based on the difference value to regulate the current of the coil. According to embodiments of the present disclosure, the inrush current of the coil generated at the moment of closing the contactor can be limited to a target current value, so as to increase the service life of the contactor. |
| US11081304B2 |
Load control system and control method thereof
A load control system includes a power switching device and a control device, wherein the power switching device includes a first power input port, a second power input port and a power output port. The first power input port and the second power input port are electrically connected to a first battery and a second battery respectively, and the power output port is electrically connected to the control device. The power output port receives the power which is input to the first power input port or the second power input port so as to supply the power to the control device. The control device is adapted to control a load to switch and to control the power switching device to utilize the power from the first power input port and the second power input port alternatively, thereby extending the respective usage time of the first battery and the second battery. |
| US11081303B2 |
High voltage electric line cutter device
An electric line cutter device for high voltage busbars has a two-part housing, a piston, an igniter and a busbar. The upper housing includes a cylinder, cuboid or prism chamber. The lower housing also includes a cylinder, cuboid or prism chamber. The piston is contained inside one of either the upper housing chamber or the lower housing chamber. Upon igniting the igniter, the piston breaks a portion of the busbar moving the piston and the portion of the busbar into the opposite chamber thereby stopping the electric current flow. The piston is at least partially formed as an insulator to prevent electric discharge. The piston design together with chamber design includes integrated “squeeze areas” and “blow channels” for the appearing arc. A channel system outside or from inside the piston allow the pyro gases to push the arc plasma into a filter system to cool down the gases. |
| US11081300B2 |
Mechanical switch of photoelectrical type and a key assembly of a keyboard
A photoelectrical type of mechanical switch, wherein a chute is provided on the bracket; the ram upper end is provided with a protruding strip arranged in the chute which can freely move along the chute; when the bracket moves up and down, the protruding strip is restricted by the chute and drives the ram to rotate by itself. Adoption of the independent sound optical path structure enables its exhibition of more obvious key-pressing stage sense and key-pressing sound when pressing the press shaft, and can realize good “ON/OFF” function of optical path. |
| US11081299B2 |
Snap action switch for generating feedbacks
The snap action switch of the present disclosure may include a housing with a plurality of protruding blocks extending inwardly, a plunger disposed on the housing, a first elastic component coupled to the plunger for providing a force against the plunger, a cam located within the housing and being movable by the plunger, a rotor located within the housing and associated with the cam, and a second elastic component coupled to the rotor for providing a force against the rotor. When the cam moves to a first position, the rotor may rotate such that a lower surface of the cam engages with an upper surface of the rotor, and when the cam moves to a second position, the rotor may continue to rotate such that the upper surface of the rotor engages with a lower surface of at least one of the plurality of protruding blocks of the housing. |
| US11081288B1 |
Solid electrolytic capacitor having a reduced anomalous charging characteristic
A solid electrolytic capacitor containing a capacitor element is provided. The capacitor element contains a sintered porous anode body, a dielectric that overlies the anode body, and a solid electrolyte that overlies the dielectric that includes a conductive polymer. The capacitor does not exhibit an anomalous charging current when charged at a constant voltage rate increase of 120 volts per second, as determined at an operating frequency of 120 Hz and temperature of about 23° C. |
| US11081287B2 |
Electrolytic capacitor and method for manufacturing electrolytic capacitor
An electrolytic capacitor includes a capacitor element. The capacitor element includes an anode body that includes a dielectric layer disposed at a surface of the anode body, a cathode body, and a separator disposed between the anode body and the cathode body. The capacitor element is impregnated with an electrolytic solution. A conductive polymer and a polyacrylic acid-based compound are provided on the dielectric layer. |
| US11081281B2 |
Multilayer ceramic electronic component
A multilayer ceramic electronic component includes a ceramic body including dielectric layers and a plurality of internal electrodes disposed to face each other with each of the dielectric layers interposed therebetween, and external electrodes disposed on external surfaces of the ceramic body and electrically connected to the internal electrodes, respectively. The external electrodes include electrode layers electrically connected to the internal electrodes and conductive resin layers disposed on the electrode layers, and the conductive layers are disposed to extend first and second surfaces of the ceramic body. When a distance from an outer edge of one of the first or second external electrodes disposed on a first or second surface to an inner edge thereof is defined as BW and surface roughness of the ceramic body is defined as Ra, a ratio of 100 times the surface roughness Ra to the distance BW (Ra*100/BW) satisfies (Ra*100/BW)≤1.0. |
| US11081278B2 |
Capacitor
A capacitor including a conductive porous base material having a plurality of pores, a dielectric layer on the conductive porous base material, an upper electrode on the dielectric layer, and an insulating material that extends into the plurality of pores. |
| US11081276B2 |
Electronic component
An electronic component includes: a first frame, including a first support portion and a plurality of first extension portions, extended from the first support portion in a first direction; a second frame, including a second support portion disposed to face the first support portion and a plurality of second extension portions, extended from the second support portion in a second direction opposite to the first direction and disposed to alternate with and be spaced apart from the first extension portions in the first direction; and a plurality of capacitors disposed on first and second extension portions adjacent to each other by a predetermined interval so that first and second external electrodes are adhered thereto, respectively. |
| US11081272B2 |
Device support assembly
A device support assembly for an electrical device, in particular a transformer or a power transformer, includes: a plurality of retaining units arranged on the device itself; and a support arrangement which has a plurality of load stabilizers. The electrical device is set down on the load stabilizers by the retaining units in an end position and/or rests and is arranged between the load stabilizers, at least in portions, after being set down. |
| US11081267B2 |
Flat powder for high frequency applications and magnetic sheet
A flaky powder for high frequency application is provided, wherein the flaky powder contains 1.5 to 3.0 mass % C, 10 to 20 mass % Cr, 0.03 to 0.30 mass % N, and the balance being Fe and incidental impurities, and has an average particle diameter of 200 μm or less, an average thickness of 5 μm or less, an average aspect ratio of 5 or more, a saturation magnetization of more than 1.0 T, and a frequency (FR) of 200 MHz or more at which tan δ reaches 0.1. Based on the flaky powder, a novel magnetic flaky metal powder having a saturation magnetization exceeding 1.0 T and exhibiting a high FR of 200 MHz or more, and magnetic sheets including the magnetic flaky metal powder are provided. |
| US11081263B2 |
Chip-shaped electronic component
One chip-shaped electronic component 100 of the present invention has a substrate 10, and a termination electrode layer 80 formed on an end face of the substrate 10. The termination electrode layer 80 is made of a mixed material that contains an electrically-conductive substance (a′) (containing carbon (a) as one type of the electrically-conductive substance (a′)), whisker-like particles (b) covered with the electrically-conductive substance (a′), flake-like particles (c) having electroconductivity, and a tetrafunctional hydroxyphenyl type epoxy resin (d) having a molecular weight of 450 or more and less than 800. In addition, a mass ratio of the flake-like particles (c) is 3/7 or more and 9 or less when the whisker-like particles (b) is assumed to be 1. |
| US11081260B1 |
Twisted pair communication cables having shields that identify pairs
Twisted pair communication cables that include reduced or minimal use of colorant may include a plurality of twisted pairs of individually insulated conductors, and the respective insulation formed around each conductor included in the plurality of twisted pairs may include one or more polymeric materials that are not blended or compounded with any colorant. Individual shield layers may be provided for two or more of the plurality of twisted pairs. Physical indicia may be selectively formed on at least two of the shield layers, and the physical indicia may facilitate identification of the plurality of twisted pairs. Additionally, a jacket may be formed around the plurality of twisted pairs and the shield layers. |
| US11081259B1 |
Twisted pair communication cables having separators that identify pairs
Twisted pair communication cables that include reduced or minimal use of colorant may include a plurality of twisted pairs of individually insulated conductors, and the respective insulation formed around each conductor may not be blended or compounded with any colorant. A separator may be positioned between at least two of the plurality of twisted pairs, and the separator may include one or more physical indicia that facilitate identification of the plurality of twisted pairs. A jacket may be formed around the plurality of twisted pairs and the separator. |
| US11081258B1 |
Twisted pair communication cables substantially free of colorant
Twisted pair communication cables that include reduced or minimal use of colorant may include a plurality of twisted pairs of individually insulated conductors, and the respective insulation formed around each conductor may be free of colorant. Additionally, physical indicia may be selectively formed on the respective insulation of at least two of the plurality of twisted pairs, and the physical indicia may facilitate identification of the plurality of twisted pairs. A jacket may be formed around the plurality of twisted pairs. |
| US11081255B2 |
High-temperature and flame-resistant colored adhesive tape, use of a substrate for its manufacture, and cable harness including such an adhesive tape
A colored adhesive tape (1), in particular a yellow, orange-colored, or black adhesive tape (1), preferably a cable wrapping tape, with a temperature class of at least T3 (LV 312), including a textile substrate with a polymer plastic substrate (4, 4a, 4b), on which an adhesive material (5, 5a, 5b) is applied. In order to improve the temperature stability of the tape, while maintaining advantageous properties, the color of at least a part of the substrate (4, 4a, 4b) is formed by the inherent color of the polymer plastic material. The tape is preferably substrate formed of a polymer plastic materials which are aromatic, nitrogen-containing polymers from the group of polyoxadiazoles (POD), polybenzobisoxazoles (PBO) or polybenzimidazoles (PBI) (4, 4a, 4b). The adhesive tape (1) may be used as a cable harness (3). |
| US11081251B2 |
Suctionable gel and method for eliminating a contamination contained in a surface organic layer of a solid substrate
A suctionable gel for eliminating a contaminating species contained in an organic layer on the surface of a material, consisting of a colloidal solution comprising, preferably consisting of: 1 wt % to 25 wt %, preferably 5 wt % to 20 wt % based on the total weight of the gel, of at least one inorganic viscosifying agent; 13 wt % to 99 wt %, preferably 80 wt % to 95 wt % based on the total weight of the gel, of an organic solvent selected among the terpenes and the mixtures thereof; optionally, 0.01 wt % to 10 wt %, based on the total weight of the gel, of at least one dye and/or pigment; optionally 0.1 wt % to 2 wt %, based on the total weight of the gel, of at least one surfactant. The disclosure further relates to a decontamination method using the gel. |
| US11081249B2 |
Nuclear waste cask with impact protection
A nuclear waste cask with impact protection includes impact limiters detachably coupled to opposite ends of the cask. Each impact limiter may comprise a deformable energy-absorbing perforated sleeve of cylindrical shape comprising an array of closely-spaced longitudinally elongated perforations. The perforations may comprise longitudinal passages having a circular cross-sectional shape in certain embodiments. The perforated sleeve may have an annular metallic body of monolithic unitary structure in which the perforations are formed and a central opening to receive the ends of the cask therein. When exposed to external impact forces such as created by dropping the cask, the perforations collapse inwards in the impact or crush zone to absorb the energy of fall while preventing or minimizing any forces transmitted to the cask to maintain the integrity of waste containment barrier. |
| US11081248B2 |
Container for storing and/or transporting spent nuclear fuel
A container for storing and/or transporting spent nuclear fuel. The container includes a body that defines an internal cavity that holds the spent nuclear fuel and an outer surface. The outer surface has holes formed therein into which trunnions are positioned. The container can be lifted by a lift yoke by coupling the lift yoke to the trunnions. The trunnions may include first and second components such that the first component is slidable in its axial direction relative to the second component when a force that exceeds a threshold acts on the second component. Thus, the second component may be slidable between a protruded state in which a portion of the second component protrudes from the outer surface of the body and a retracted state in which the second component does not protrude from the outer surface of the body. |
| US11081243B2 |
Device for controlling and measuring welding defects on a cylindrical wall and method implementing same
A device and method for inspecting and measuring weld defects in a cylindrical wall of a cylindrical conduit. The device can include an inspection head forming a probe having a proximal end and a distal end along its longitudinal axis, and of which a first side called “inner side” is provided with at least one ultrasound wave transducer. The inspection head can include a second side, called “outer side” opposite the first side that has a curved surface in the form of a cylinder fraction, and wherein the curved surface of the second side has outward facing convexity. The wave transducer can be formed of a series of juxtaposed elements, each element being both a transmitter and receiver, wherein a surface of the series is curved and in the form of a cylinder fraction, and wherein the surface of the series has outward facing concavity. |
| US11081239B2 |
System and method for creating computer interpretable guidelines using a knowledge acquisition and management tool
Described herein are systems and methods for transforming clinical guideline documents into computer interpretable guidelines (“CIGs”). One embodiment refers to a method comprising prompting a user, via a graphical user interface (“GUI”), for a plurality of clinical guideline entry steps, receiving, via the GUI, clinical guideline data, prompting the user, via the GUI, for a plurality of formal expression entry steps related to the clinical guideline data, receiving, via the GUI, a formal representation of the clinical guideline data and mapping the formal representation of the clinical data to a CIG. |
| US11081234B2 |
Clinical support systems and methods
Embodiments of clinical support systems and methods are disclosed. In one embodiment, methods for clinical performance measurement are disclosed comprising defining a range of acceptable treatment variable values for a treatment variable of a subject, performing a selected intervention, determining an affected treatment variable value and determining a selection performance measure by comparing the affected treatment variable value to the acceptable treatment variable values. In one embodiment, methods for clinical decision training are disclosed comprising defining a treatment variable of a simulated subject, selecting an intervention on the treatment variable, modeling the selected intervention and presenting a visual representation of the selected intervention. In one embodiment, methods for clinical decision support are disclosed comprising defining a treatment variable of a subject, presenting a decision support variable as clinical decision support, performing a selected intervention and determining an affected treatment variable value. |
| US11081232B2 |
Medical device data management configuration systems and methods of use
Medical device data manager configuration methods and systems including a medical device, a smart mobile device including a camera, a processor, a memory communicatively coupled to the processor, and machine readable instructions stored in the memory that may cause a system to perform at least the following when executed by the processor: use the camera of the smart mobile device to capture an image of the medical device; apply an identification algorithm to the image of the medical device; identify the medical device as an identified medical device based on the image of the medical device and the identification algorithm; and automatically configure a software application tool on the smart mobile device to retrieve data associated with one or more requirements of the identified medical device. |
| US11081230B2 |
Systems and methods for image processing
A method for stitching image for medical imaging device may include obtaining a plurality of image series. Each of the plurality of image series may include one or more scanning images. The method may also include, for each of the plurality of image series, determining a tag of the each of the plurality of image series and classifying the plurality of image series based on the tags of the plurality of image series. The method may further include determining one or more groups of image series based on the classification. Image series in a same group may have a same tag. The method may also include stitching at least one image series of at least one group of the one or more groups of image series. |
| US11081226B2 |
Method and controller for administering recommended insulin dosages to a patient
A method of administering insulin includes receiving scheduled blood glucose time intervals and obtaining blood glucose data of a patient that includes blood glucose measurements, blood glucose times, and insulin dosages previously administered by the patient. The method also includes applying a set of filters to identify which of the blood glucose measurements associated with at least one of the scheduled time intervals are usable and which of the blood glucose measurements associated with the at least one scheduled time interval are unusable. The method also includes aggregating the blood glucose measurements associated with the at least one scheduled time interval identified as usable to determine a representative aggregate blood glucose measurement and determining a next recommended insulin dosage for the patient based on the representative aggregate blood glucose measurement and the insulin dosages previously administered by the patient. |
| US11081217B2 |
Systems and methods for optimal health assessment and optimal preventive program development in population health management
Various health management systems may benefit from tools for appropriate identification of target patients. For example, various population health management approaches may benefit from systems and methods for optimal health assessment and optimal preventative program development. A method can include obtaining a simple risk measure score for a patient. The method can also include obtaining an evidence-based score for the patient. The method can further include comparing the simple risk measure score to the evidence-based score. The method can additionally include identifying the patient as a target for preventative medicine based on a discrepancy revealed by the comparison. |
| US11081216B2 |
Deduplication of medical concepts from patient information
Mechanisms are provided to implement a patient summary generation engine with deduplication of instances of medical concepts. The patient summary generation engine parses a patient electronic medical record (EMR) to extract a plurality of instances of a medical concept, at least two of which utilize different representations of the medical concept. The patient summary generation engine performs a similarity analysis between each of the instances of a medical concept to thereby calculate, for a plurality of combinations of instances of the medical concept, a similarity metric value. The patient summary generation engine clusters the instances of the medical concept based on the calculated similarity metric values for each combination of instances in the plurality of combinations of instances of the medical concept to thereby generate one or more clusters, and select a representative instance of the medical concept from each cluster in the one or more clusters. The patient summary generation engine generates a summary output of the patient EMR comprising the selected representative instances of the medical concept from each cluster. |
| US11081213B2 |
Personalizing patient pathways based on individual preferences, lifestyle regime, and preferences on outcome parameters to assist decision making
A system (10) for personalization of patient pathways and treatment options includes a patient information database (32) which stores patient data relating to a patient's medical records. A patient personalization system (12) receives the patient's lifestyle values and preferences and evaluates choices of pathways and treatments and a clinical decision support system (18) generates choices of pathways and treatments from the patient data and the patient's lifestyle values and preferences. |
| US11081211B2 |
Method and apparatus for providing a pharmacokinetic drug dosing regimen
Systems and methods providing a clotting factor VIII dosing regimen are disclosed. The systems and methods include determining an estimated pharmacokinetic profile of a patient using a Bayesian model of pharmacokinetic profiles of sampled patients. The systems and methods can determine a first dosing regimen for a first dosing interval including (i) a first dosage and (ii) a first therapeutic plasma protein level in the patient varying over time based at least upon the estimated pharmacokinetic profile. The systems and methods can determine a second dosing regimen for a second dosing interval including (i) a second dosage and (ii) a second therapeutic plasma protein level in the patient varying over time. The estimated pharmacokinetic profile can be adjusted based on previous patient treatments. Further, a user can select which days a dosage is to be applied such that the protein level does not fall below a target trough. |
| US11081210B2 |
Detection of human leukocyte antigen loss of heterozygosity
Processes are provided for detecting loss of heterozygosity of Human Leukocyte Antigen (HLA) in a subject using analysis of next generation sequencing (NGS) data. The processes include aligning NGS data and identifying unmapped and mapped reads, updating reference data, and feeding one or more sequence reads to an HLA typing process for identifying candidate HLA alleles and feeding HLA type data to a loss of heterozygosity (LOH) modeling process for determining a LOH status for each HLA allele. A report may be generated of the LOH statuses for each of HLA allele. |
| US11081202B2 |
Failing address registers for built-in self tests
A computer-implemented method includes receiving a memory address of a memory location in a memory that has been identified to be failing. The method further includes determining that the memory location is from a particular portion of the memory. The method further includes, in response to a number of memory locations that are identified to be failing from the particular portion of the memory being below a predetermined threshold, logging the memory address in a set of failing address registers associated with the memory, otherwise, skipping the logging of the memory address in the failing address registers. |
| US11081201B2 |
Parallel test device
A parallel test device is provided. The parallel test device of the disclosure includes an I/O pad, a plurality of input buffers, and a plurality of output drivers. The I/O pad is configured to perform input/output operations in the parallel test device. The input buffers are configured to enable write data. The output drivers are configured to enable read data and output the read data to the I/O pad. A test signal corresponds to the data from an external device is transferred to the output drivers through the I/O pad in the parallel test device during a test mode. |
| US11081196B2 |
Non-volatile memory with erase verify skip
A non-volatile storage apparatus is configured to perform erase verify during an erase process in order to account for differences in erase speed. In order to reduce the time used to perform the erase process (which includes the erase verify), the erase verify operation is skipped for certain memory cells based on a system parameter. For example, when erasing a block of memory cells, a series of erase voltage pulses are applied to the NAND strings in outer sub-blocks and inner sub-blocks of the block. Erase verify is performed between erase voltage pulses for NAND strings in the outer sub-blocks while skipping erase verify for NAND strings in the inner sub-blocks. Performing erase verify between erase voltage pulses for NAND strings in the inner sub-blocks is started at a predetermined number of erase voltage pulses after the NAND strings in the outer sub-blocks successfully erase verify. |
| US11081194B2 |
Suppression of program disturb with bit line and select gate voltage regulation
Techniques for suppression of program disturb in flash memory devices are described herein. In an example embodiment, a method for suppression of program disturb in a flash memory array is provided. The flash memory array comprises rows and columns of memory cells, where the memory cells in each row are coupled to a source line and to a select-gate (SG) line, and the memory cells in each column are coupled to a respective bit line (BL). During a program memory operation, a first voltage, of a selected SG line, and a second voltage, of an unselected BL, are regulated independently of a power supply voltage of the flash memory array, where the first voltage is regulated in a first range of 0.9V to 1.1V and the second voltage is regulated in a second range of 0.4V to 1.2V. |
| US11081192B2 |
Memory plane structure for ultra-low read latency applications in non-volatile memories
A non-volatile memory device comprising a memory cell region having a plurality of co-planar memory cell planes arranged in a plane parallel to a semiconductor substrate, with each memory cell plane comprising a plurality of sub-planes disposed adjacent one another along an axis that is parallel to the substrate. Further, each memory cell plane comprises a plurality of sense amplifier regions arranged along the axis in an alternating pattern with the sub-planes such that adjacent to each sub-plane is a sense amplifier region and each sense amplifier region is operable with respect to at least a fraction of the bit lines of the two sub-planes immediately adjacent the sense amplifier region. |
| US11081191B2 |
Dynamic switching for improved power utilization
A device, for example a memory system, is disclosed wherein two or more operational modes may be set. The clock toggle rate and ODT resistors are dynamically controlled based on one or more of a desired margin of signal integrity, performance, cooling rate, and power consumption. |
| US11081189B1 |
Charge loss compensation
Disclosed in some examples are methods, systems, devices, and machine-readable mediums for compensating for charge loss effects. In some examples, a charge loss may be estimated by a charge loss monitor for a particular unit of a NAND device and may be utilized to select a charge loss compensation scheme. The charge loss may be estimated by the charge loss estimation process by determining a reference read voltage and calculating a bit count resulting from a read at that reference read voltage. The number of bits returned may be used to select the particular charge loss compensation scheme. |
| US11081188B2 |
Semiconductor memory device
According to one embodiment, a semiconductor memory device includes a controller configured to execute a read operation. In the read operation, the controller is configured to: apply first and second read voltages to a word line, read data at each of first and second times, apply the first voltage to the source line at each of the first and second times, apply a second voltage to the source line during the application of the first read voltage to the word line and before the first time, and apply a third voltage to the source line during the application of the second read voltage to the word line and before the second time. |
| US11081182B2 |
Integrated circuit and computing method thereof
An integrated circuit and a computing method thereof are provided. The integrated circuit includes a memory array, word lines, bit lines and a page buffer. The memory array includes memory cells, each configured to be programmed with a weight. The word lines respectively connect a row of the memory cells. The bit lines are respectively connected with a column of the memory cells that are connected in series. More than one of the bit lines in a block of the memory array or more than one of the word lines in multiple blocks of the memory array are configured to receive input voltages. The memory cells receiving the input voltages are configured to multiply the weights stored therein and the received input voltages. The page buffer is coupled to the memory array, and configured to sense products of the weights and the input voltages. |
| US11081177B2 |
Generating a reference current for sensing
Broadly speaking, embodiments of the present techniques provide apparatus and methods for generating a reference current for a memory array sensing scheme, and for using the generated reference current to sense the state of memory cells within the memory array. The generated reference current is particularly suitable for distinguishing between a high resistance state and a low resistance state. |
| US11081175B2 |
Semiconductor device and memory device
According to one embodiment, a device includes first lines transmitting a first signals; second lines receiving the first signals; and a first circuit including a first selector coupled to the first lines, a second selector coupled to the second lines, third lines and a fourth lines between the first and second selectors. Each of the third lines stores the second signals, each of the fourth lines stores the third signals. The first circuit counts a first number of second signals equivalent to the corresponding first signal; counts a second number of third signals equivalent to corresponding first signal of the first signals; and couples either the third or the fourth lines to the first and second lines via the first and second selectors, based on a result of comparison between the first and the second numbers. |
| US11081172B1 |
On-chip security key with phase change memory
A method is presented for forming an on-chip security key. The method includes electrically connecting a pair of phase change memory (PCM) elements in series, electrically connecting a programming transistor to the pair of PCM elements, electrically connecting an input of an inverter to a common node of the pair of PCM elements, setting the PCM elements to a low resistance state (LRS) in an initialization stage, applying a RESET pulse to generate a security bit and to cause one of the PCM elements to change to a high resistance state (HRS), and generating a logic “1” or “0” at the output of the inverter. |
| US11081168B2 |
Mixed digital-analog memory devices and circuits for secure storage and computing
A non-volatile memory device includes a plurality of memory cells arranged in a matrix, a plurality of word lines extended in a row direction, and a plurality of bit lines extended in a column direction. Each of the memory cells is coupled to one of the word lines and one of the bit lines. The memory device further includes a word-line control circuit coupled to and configured to control the word lines, a first bit-line control circuit configured to control the bit lines and sense the memory cells in a digital mode, and a second bit-line control circuit configured to bias the bit lines and sense the memory cells in an analog mode. The first bit-line control circuit is coupled to a first end of each of the bit lines. The second bit-line control circuit is coupled to a second end of each of the bit lines. |
| US11081164B2 |
Non-volatile memory device and control method
A non-volatile memory device and a control method are provided e disclosed. The non-volatile memory device includes a memory array, a bit line, a plurality of word lines, a first control circuit, and second control circuit. The bit line is connected to a first memory string of the memory array. The plurality of word lines are connected to memory cells of the first memory string and each word line is connected to a respective memory cell. The first control circuit is configured to apply a bit line pre-pulse signal to the bit line during a pre-charge period. The second control circuit is configured to apply a word line signal to a selected word line and apply a plurality of word line pre-pulse signals to word lines disposed between a select gate line and the selected word line. Voltage levels of the plurality of word line pre-pulse signals are incremental. |
| US11081161B2 |
Sensing and tuning for memory die power management
Techniques, apparatus, and devices for managing power in a memory die are described. A memory die may include an array of memory cells and one or more voltage sensors. Each voltage sensor may be on the same substrate as the array of memory cells and may sense a voltage at a location associated with the array. The voltage sensors may generate one or more analog voltage signals that may be converted to one or more digital signals on the memory die. In some cases, the analog voltage signals may be converted to digital signals using an oscillator and a counter on the memory die. The digital signal may be provided to a power management integrated circuit (PMIC), which may adjust a voltage supplied to the array based on the digital signal. |
| US11081160B2 |
Apparatus and methods for triggering row hammer address sampling
Apparatuses and methods for triggering row hammer address sampling are described. An example apparatus includes an oscillator circuit configured to provide a clock signal, and a filter circuit. The filter circuit includes a control circuit configured to receive pulses of the clock signal and provide an output signal that represents a count number by counting a number of pulses of the clock signal and control a probability of enabling the output signal based on the count number. The filter circuit further includes a logic gate configured to pass one of the pulses of the clock signal responsive to the output signal from the control circuit being enabled and filter another of the pulses responsive to the output signal from the control circuit being not enabled. |
| US11081159B1 |
Memory cell arrangement and methods thereof
A memory cell arrangement is provided that may include: a read-out circuit and a memory cell including: a first terminal, a second terminal, and a third terminal; the memory cell may be configured to control current flow between the second terminal and the first terminal as a function of a first voltage present at the first terminal, a third voltage applied at the third terminal, and a memory state of the memory cell. The read-out circuit is configured to: generate a characteristic voltage at the bitline by applying the third voltage at the third terminal and a second voltage at the second terminal, the characteristic voltage representing the memory state of the memory cell, and to determine the memory state of the memory cell based on sensing the characteristic voltage. |
| US11081158B2 |
Source follower-based sensing scheme
Methods, systems, and devices for a source follower-based sensing architecture and sensing scheme are described. In one example, a memory device may include a sense circuit that includes two source followers that are coupled to each other and to a sense amplifier. A method of operating the memory device may include transferring a digit line voltage to one of the source followers and transferring a reference voltage to the other source follower. After transferring the digit line voltage and the reference voltage, the source followers may be enabled so that signals representative of the digit line voltage and the reference voltage are transferred from the outputs of the source followers to the sense amplifier for sensing. |
| US11081157B2 |
Leakage compensation for memory arrays
Apparatuses and techniques for compensating for noise, such as a leakage current, in a memory array are described. Leakage currents may, for example, be introduced onto a digit line from unselected memory cells. In some cases, a compensation component may be coupled with the digit line during a first phase of a read operation, before the target memory cell has been coupled with the digit line. The compensation component may sample a current on the digit line and store a representation of the sampled current. During a second phase of the read operation, the target memory cell may be coupled with the digit line. During the second phase, the compensation component may compensate for leakage or other parasitic effects by outputting a current on the digit line during the read operation based on the stored representation of the sampled current. |
| US11081156B2 |
Voltage regulation circuitry
Various implementations described herein are directed to device having a clock generator that provides write reference signals. The device may include a voltage divider that receives the write reference signals and provides an output reference signal based on write polarity of the write reference signals. The device may include a voltage regulator that receives the output reference signal and provides a regulated voltage to a load based on the output reference signal. |
| US11081155B2 |
MRAM reference current
A reference circuit for generating a reference current includes a plurality of resistive elements including at least one magnetic tunnel junction (MTJ). A control circuit is coupled to a first terminal of the at least one MTJ and is configured to selectively flow current through the at least one MTJ in the forward and inverse direction to generate a reference current. |
| US11081147B2 |
Pseudo-cryogenic semiconductor device having pseudo-cryogenic temperature sensor and voltage supplier and pseudo-cryogenic semiconductor stack
A pseudo-cryogenic semiconductor device includes memory cells having a plurality of transistors; and a bulk bias voltage supply circuit configured to provide a bulk bias voltage to be applied to a bulk region of the memory cells. The bulk bias voltage supply circuit includes a first temperature sensing circuit configured to generate a first voltage adjustment signal by sensing a temperature in a range from about 70° K to about 173° K; and a bulk bias voltage selector configured to receive the first voltage adjustment signal, select one of a first bulk bias voltage and a second bulk bias voltage different from the first bulk bias voltage, and output the selected voltage as the bulk bias voltage. |
| US11081146B2 |
Storage device and operating method of the storage device for controlling voltage rising time
The present disclosure relates to method of operating a memory device, the memory device includes a memory cell array, a voltage generator, and control logic. The voltage generator configured to increase a power supply voltage. The control logic is configured to store a time based on the increased power supply voltage and a reference voltage. The reference voltage is a voltage level used to perform an operation on the memory cell array. |
| US11081142B2 |
Messenger MSQRD—mask indexing
Exemplary embodiments relate to the creation of a media effect index for group video conversations. Media effect application (e.g., in the form of graphical overlays, filters, sounds, etc.) may be tracked in a timeline during a chat session. The resulting index may be used to create a highlights reel, which may serve as an index into a live show or may be used to determine the best time to insert materials into a recording of the conversation. The index may be used to automatically detect events in the video feed, to allow viewers to skip ahead to exciting moments (e.g., represented by clusters of applications of particular types of media effects), to determine where each participant spoke in a discussion, or to provide a common “watch together” experience while multiple users watch a common video. An analysis of the index may be used for research or consumer testing. |
| US11081139B2 |
Video inpainting via confidence-weighted motion estimation
Certain aspects involve video inpainting via confidence-weighted motion estimation. For instance, a video editor accesses video content having a target region to be modified in one or more video frames. The video editor computes a motion for a boundary of the target region. The video editor interpolates, from the boundary motion, a target motion of a target pixel within the target region. In the interpolation, confidence values assigned to boundary pixels control how the motion of these pixels contributes to the interpolated target motion. A confidence value is computed based on a difference between forward and reverse motion with respect to a particular boundary pixel, a texture in a region that includes the particular boundary pixel, or a combination thereof. The video editor modifies the target region in the video by updating color data of the target pixel to correspond to the target motion interpolated from the boundary motion. |
| US11081136B2 |
Information processing apparatus, information processing system, and program
[Object] To provide an information processing apparatus by which sound can be smoothly re-listened to.[Solution] There is provided an information processing apparatus including: a reproduction processing unit that performs reproduction of a recorded sound on a basis of a reproduction start instruction for starting re-listening of the recorded sound from a position tracking back a predetermined time from a reproduction start time, at which the reproduction start instruction is input, to a position of a present time. |
| US11081135B2 |
Shingled magnetic recording storage system
The disclosed technology provides a method that improves CCT in SMR device systems. In one implementation, the method comprises writing data to a shingled magnetic recording (SMR) band in a storage device, determining whether an off-track write has occurred, identifying unsafe written data in response to determining that an off-track write has occurred, determining whether caching space is available upon identifying unsafe written data, continue writing data to the SMR band without a write retry upon determining that caching space is available, and writing unsafe written data to the available caching space. In another implementation, the method comprises receiving a request to repair an encroached track in an SMR band, recovering encroached data to a dynamic random-access memory, determining whether caching space is available, writing the recovered data to the available caching space upon determining that caching space is available, and merging other cached data in the SMR band. |
| US11081134B2 |
Hard disk drive with magnetic-disk substrate and hard disk drive with magnetic disk
A hard disk drive includes a magnetic-disk substrate in which an average value of squares of inclinations is 0.0025 or less and a frequency at which squares of inclinations are 0.004 or more is 15% or less, in a case where samples of inclinations on a main surface are obtained at intervals of 10 nm. |
| US11081129B2 |
Magnetic disk device
According to one embodiment, a magnetic disk includes a disk, first and second heads which write data to the disk and read data from the disk, a first actuator includes the first head, a second actuator includes the second head, first and second controllers which control the first head, the second head, the first actuator and the second actuator, an auxiliary power supply which supplies power when power from a power supply is shut off, and a power supply detection unit which makes power supplied from the auxiliary power supply to the first controller higher than the power supplied from the auxiliary power supply to the second controller when shutoff of power from the power supply is detected. |
| US11081128B2 |
Signal processing apparatus and method, and program
A sound state estimating unit detects surrounding sound at a timing at which a notification to a destination user occurs. A user state estimating unit detects a position of the destination user and positions of users other than the destination user at the timing at which the notification occurs. An output control unit controls output of the notification to the destination user at a timing at which it is determined that the surrounding sound detected by the sound state estimating unit is masking possible sound which can be used for masking in a case where the position of the destination user detected by the user state estimating unit is within a predetermined area. |
| US11081120B2 |
Encoded-sound determination method
A method for encoded-sound determination performed by a computer includes: executing a first process that includes obtaining information indicating intensities of sound signals, the frequencies being calculated from the sound signals and corresponding to frequencies; and executing a second process that includes determining whether or not the sound signals are signals of encoded sound, based on whether or not the intensities of the sound signals in predetermined frequency bands that are adjacent to each other in a frequency direction have a difference that is larger than or equal to a predetermined threshold. |
| US11081117B2 |
Methods, apparatus and systems for encoding and decoding of multi-channel Ambisonics audio data
Conventional audio compression technologies perform a standardized signal transformation, independent of the type of the content. Multi-channel signals are decomposed into their signal components, subsequently quantized and encoded. This is disadvantageous due to lack of knowledge on the characteristics of scene composition, especially for e.g. multi-channel audio or Higher-Order Ambisonics (HOA) content. A method for decoding an encoded bitstream of multi-channel audio data and associated metadata is provided, including transforming the first Ambisonics format of the multi-channel audio data to a second Ambisonics format representation of the multi-channel audio data, wherein the transforming maps the first Ambisonics format of the multi-channel audio data into the second Ambisonics format representation of the multi-channel audio data. A method for encoding multi-channel audio data that includes audio data in an Ambisonics format, wherein the encoding includes transforming the audio data in an Ambisonics format into encoded multi-channel audio data is also provided. |
| US11081108B2 |
Interaction method and apparatus
Embodiments of the present disclosure disclose an interaction method and apparatus. A specific embodiment of the method includes: generating, in response to determining that a request input by a user satisfies a guiding condition, guiding information, and feeding back the guiding information to the user, the guiding condition including one of the following: associating with a plurality of query intents, or associating with no query intent; and generating, based on the request and a feedback input by the user corresponding to the guiding information, an intent-clear request, and feeding back push information bound with the intent-clear request to the user. Realizing that in the process of interacting with the user, for conditions such as the request input by the user is associated with a plurality of query intents or incompleteness, an intent-clear request associated with an explicit query intent is determined through the interaction with the user. |
| US11081107B2 |
Contextual entity resolution
Methods and systems for resolving entities using multi-modal functionality are described herein. Voice activated electronic devices may, in some embodiments, be capable of displaying content using a display screen. Contextual metadata representing the content rendered by the display screen may describe entities having similar attributes as an identified intent from natural language understanding processing. When natural language understanding processing attempts to resolve one or more declared slots for a particular intent, matching slots from the contextual metadata may be determined, and the matching entities may be placed in an intent selected context file to be included with the natural language understanding's output data. The output data may be provided to a corresponding application for causing one or more actions to be performed. |
| US11081098B2 |
Service provider support platform
Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for helping service providers. The methods, systems, and apparatus include actions of obtaining a mobile computing device identifier, identifying a customer corresponding to the mobile computing device identifier, obtaining information regarding the customer that is identified, determining a likely intent of the customer from the information regarding the customer, and providing, using the likely intent of the customer, information that helps a provider. |
| US11081097B2 |
Passive balancing of electroacoustic transducers for detection of external sound
A system and method for passively balancing electroacoustic transducers so that sounds other than the transducer's output can be detected. A transducer producing audio output based upon an input audio signal can operate in reverse to produce a signal in response to the impact of external sound upon the transducer from another source. This “reverse” or “microphone” signal represents the sound from the other source. Transducers are operated in monophonic mode, each in opposite polarity to the other thus canceling out and leaving only the microphone signal created by the transducers, i.e., a signal representing the external sound. The microphone signal can be amplified, and can be filtered and processed to identify and/or obtain various types of information about the sound received by the transducers. |
| US11081096B2 |
Sound disturbance inhibition system
A partial enclosure for inhibiting sound passing into and out of the partial enclosure includes an absorber-barrier or an absorber-barrier-absorber, each made from sound absorbing material and sound barrier material and arranged to form the partial enclosure. The enclosure also includes an adaptive frequency matched sound-masking system. The absorber-barrier or absorbed-barrier-absorber is positioned to block or inhibit unwanted sound from various positions of a source of the unwanted sound, or motion of the source of the unwanted sound. The adaptive frequency matched sound-masking system includes a sound generating device arranged on or in the partial enclosure to emit anti-noise signal to cancel or inhibit the unwanted sound. |
| US11081095B2 |
Absorbent acoustic metamaterial
Some embodiments are directed to an elementary acoustic metamaterial cell, including a body made of solid material and at least one resonator defining a groove of width l and depth p, the groove being open on the surface of the body, wherein the depth p is set by a resonant frequency (f) of the cell according to a relationship x, c being the speed of sound in air and the width l is set by an energy density confined in the cell according to a logarithmic relationship Emax αlog (l) determined experimentally, the groove having an acoustic absorption controlled by a ratio between the depth p and the width l of the groove. Some embodiments are also directed to an acoustic screen including such an elementary cell. |
| US11081089B2 |
Flicker-fusion-based image capture privacy control system
A method and system of software, firmware, and conditionally-transparent media to provide recorded visual image privacy through the use of flicker fusion-based obscuration. Such conditionally-transparent media possess the capability to display programmable image and pattern-based opacity gradations and adjustments which are invisible to the human eye and yet disrupt clear image capture with visual recording devices. Use of this invention will limit the gathering and generation of visually-discernable image content using visible light transparent materials, for the purpose of limiting the successful recording of imagery that a user wishes to obscure for the purposes of privacy. |
| US11081088B2 |
Image display method, apparatus, and terminal device
Example image display methods and apparatus are described. One example method includes generating a first image based on first user operation information. The first image is stored into a memory. When second user operation information is detected, the first image corresponding to the second user operation information is determined in the memory and based on the detected second user operation information. Both the first user operation information and the second user operation information are used for displaying the first image. The first image is displayed. |
| US11081080B2 |
Display driver integrated circuit and display device including the same
A display device includes: a host which transmits a first signal through a first interface, and transmits a second signal through a second interface different from the first interface; a display driver integrated circuit including a first interface unit which receives the first signal through the first interface, and a second interface unit which receives the second signal through the second interface; and a display panel which receives a data signal corresponding to the first signal and the second signal from the display driver integrated circuit, and displays an image. |
| US11081077B2 |
Display device capable of improving vertical crosstalk
A display device is disclosed. Plural sub-pixels of a display panel are connected to two adjacent gate lines. Each data line is connected to two adjacent sub-pixels of same pixel. In first or second pixel sets, the first and the fourth gate lines are connected to sub-pixels in same column. The second and the third gate lines are connected to sub-pixels in same column. The sub-pixels connected to the fourth gate line of the first pixel set and the first gate line of the second pixel set are located in different columns. In one frame time, the data signal drives same pixel through the nth and (n+1)th data lines using opposite polarities and the data signal drives two adjacent sub-pixels of same pixel set in column direction through the nth and (n+1)th data lines using the same polarities. |
| US11081072B2 |
Display device
To reduce power consumption of a display device with the use of a simple structure and a simple operation. The display device includes an input device. Input of an image signal to a driver circuit is controlled in accordance with an image operation signal output from the input device. Specifically, input of image signals at the time when the input device is not operated is less frequent than that at the time when the input device is operated. Accordingly, display degradation (deterioration of display quality) caused when the display device is used can be prevented and power consumed when the display device is not used can be reduced. |
| US11081062B2 |
Current sensing device and organic light emitting display device including the same
The current sensing device in the present disclosure comprises a plurality of sensing units each of which is connected to a sensing channel. The sensing unit may comprise a reference current generator generating a reference current; a current comparator outputting a comparator output signal based on a pixel current input through the sensing channel and the reference current, and removing an offset deviation component included in the pixel current and the reference current by using a reset current externally applied; and an edge triggered data flip-flop outputting a digital sensing value corresponding to the pixel current based on the comparator output signal. |
| US11081061B2 |
Shift register, gate driving circuit, display device and gate driving method
The present application provides a shift register, a gate driving circuit, a display device and a gate driving method. The shift register includes an input circuit, an inverter circuit and an output circuit. The input circuit, the inverter circuit and the output circuit are coupled to a pull-up node, and the output circuit and the inverter circuit are coupled to a pull-down node. The input circuit is configured to control a voltage at the pull-up node in response to an input signal. The inverter circuit is configured to invert the voltage at the pull-up node and output the inverted voltage to the pull-down node. The output circuit is configured to output a multi-pulse signal within a duration of one frame under control of the voltage at the pull-up node and a voltage at the pull-down node. |
| US11081059B2 |
Display panels and display devices
A display panel including a substrate is disclosed. The substrate includes: a display area including pixel units arranged in an array and a signal line connecting the pixel units; a front surface of the substrate having the display area; a back surface of the substrate facing away from the display area; a side surface of the substrate connecting the front surface of the substrate with the back surface of the substrate; and a mounting groove recessed into the substrate from the side surface of the substrate. The display panel further includes a fan-out line disposed in the mounting groove, one end of the fan-out line is connected to the signal line, and the other end meanders from the mounting groove to the back surface of the substrate. The above display panel can achieve a narrow border display. |
| US11081058B2 |
Shift register unit, gate drive circuit, display device and driving method
A shift register unit, a grid drive circuit, a display device and a driving method are disclosed. The shift register unit includes a first input circuit, a first reset circuit, an anti-leakage circuit, and an output circuit. The anti-leakage circuit is connected with a first node and a second node and is configured to perform first control on the level of the second node under the control of the level of the first node so as to reduce the electrical leakage from the first node through the first reset circuit. |
| US11081056B2 |
Organic light emitting display device and driving method thereof
An organic light emitting display device includes a plurality of pixels. A pixel on an ith horizontal line includes a first transistor coupled between a first power source and a first node and having a gate electrode coupled to a second node. An organic light emitting diode is coupled between the first node and a second power source. A second transistor is coupled between the second and third nodes and is turned on when a first scan signal is supplied to an ith first scan line. A third transistor is coupled between the third and first nodes. A first capacitor is coupled between an ith control line and the second node. A second capacitor is coupled between the third node and a data line. The pixels are simultaneously driven during first, second, and third periods of a frame period and sequentially driven during a fourth period of the frame period. |
| US11081054B2 |
Display device and method of driving same
A display device and a method of driving the same are provided. The display device according to an embodiment of the disclosure includes: a display panel including a plurality of pixel lines in an area A, an area B, and an area C; a panel driver configured to: supply input image data to pixel lines in the area A during a first period; supply black image data to pixel lines in the area B during a second period following the first period; and supply input image data to pixel lines in the area C during a third period following the second period; and a timing controller configured to adjust a first input image data to be supplied to a last pixel line in the area A to a first adjusted data based on a first compensation table. |
| US11081050B2 |
Light-emitting device
A light-emitting device in which variation in luminance of pixels is suppressed. A light-emitting device includes at least a transistor, a first wiring, a second wiring, a first switch, a second switch, a third switch, a fourth switch, a capacitor, and a light-emitting element. The first wiring and a first electrode of the capacitor are electrically connected to each other through the first switch. A second electrode of the capacitor is connected to a first terminal of the transistor. The second wiring and a gate of the transistor are electrically connected to each other through the second switch. The first electrode of the capacitor and the gate of the transistor are electrically connected to each other through the third switch. The first terminal of the transistor and an anode of the light-emitting element are electrically connected to each other through the fourth switch. |
| US11081046B2 |
Driving chip and display device having the same
A display device including a driving chip and a pixel array is provided. The driving chip is configured to provide multiple emission control signals according to a data input. A pixel array is coupled with the driving chip. M pixel circuits of the pixel array are configured to emit light respectively in M periods, and M is a positive integer. In a corresponding period of the M periods, the driving chip determines a first time length which one of the multiple emission control signals has a first voltage level, and one of the M pixel circuits emits light, in the corresponding period, for a light emission time length corresponding to the first time length. |
| US11081045B2 |
Display device
A display device includes a first switching element including a second electrode and a first gate electrode, a second switching element including a third electrode connected with the first gate electrode, a third switching element including a fifth electrode connected with the second electrode, and sixth electrode, a fourth switching element including a seventh electrode connected with the second electrode, and an eighth electrode, a fifth switching element including a ninth electrode connected with the second electrode, and a tenth electrode, a first light emitting diode connected with the sixth electrode and the eighth electrode, a second light emitting diode connected with the eighth electrode and the sixth electrode, and a switch selectively connecting a common power source line with the sixth electrode or the eighth electrode. The first light emitting diode and the second light emitting diode have different polarities from each other with respect to a same direction. |
| US11081043B2 |
Array substrate, display panel and display device
The application provides an array substrate, a display panel, and a display device. The display panel comprises the support plate and the array substrate. The backlight surface of the flexible driving circuit substrate of the array substrate is bonded to the support plate in the display area. The area where the flexible driving circuit substrate is provided with the gate driving circuit and the data driving circuit is bent and attached to the other surface of the support plate. The light emitting surface of the display panel only has a display area capable of displaying pictures, which alleviates the problem that the existing display panel cannot fully display. |
| US11081039B2 |
Display device and method of driving the same
A display device includes a display unit including a plurality of pixels, a data converter to receive grayscale values respectively corresponding to the plurality of pixels, generate first compensated grayscale values by remapping the grayscale values of a first grayscale range to the first compensated grayscale value of a second grayscale range, and generate second compensated grayscale values by compensating for the first compensated grayscale values based on first compensated grayscale values of adjacent pixels, and a data driver to generate data signals based on the second compensated grayscale values and provide the data signals to the plurality of pixels of display unit, wherein adjacent pixels of a target pixel correspond to pixels adjacent to the target pixel, and wherein at least one of the adjacent pixels emits light having a color different from that of the target pixel. |
| US11081038B1 |
Data driving circuit and display apparatus for advoiding data lines being overcharged
A data driving circuit proofed against excessive pixel brightness because of overvoltage on the data line comprises a shift register circuit, a first latch circuit, a second latch circuit, a level shift circuit, a DAC circuit, and an output circuit. The second latch circuit detects a change in the MSB of the data signal of a sampled signal, and outputs a signal for applying a pre-operation of the current data line. When the MSB of the sampled signal is changed, the second latch circuit outputs a pre-operation enabling signal, and whether the grayscale value of the current data line is within a specified region. If within the specified region, the second latch circuit outputs an invalid signal, and the pre-operation is disabled. |
| US11081033B2 |
Shift register unit and driving method thereof, gate driver, display panel and display device
A shift register unit includes: an input terminal, a first voltage terminal, a second voltage terminal, a first clock terminal, a second clock terminal and an output terminal, as well as an input circuit, a control circuit and an output circuit. In addition, a method for driving the shift register unit, a gate driver composed of the shift register units, a display panel comprising the gate driver and a display device comprising the display panel are also disclosed. |
| US11081027B2 |
Front-illuminated sign
A sign including a frame configured to support a sign face. The frame includes a first section and a second section. The sign also includes a first bracket coupled to the frame, the first bracket defines a longitudinal axis, and a second bracket coupled to the first bracket. The second bracket is rotatable with respect to the first bracket, and the second bracket is movable between a first position in which the second bracket extends transverse to the longitudinal axis and a second position in which the second bracket extends along the longitudinal axis. The sign also includes a light bar coupled to the second bracket. The second section is movable with respect to the first section between an installed position and a collapsed position. |
| US11081026B2 |
Self-laminating rotating cable marker with breakaway portion
A self-laminating rotating cable marker label is constructed of a transparent film having a first adhesive area, an adhesive-free smooth area, and a second adhesive area. A print-on area forms one side of the transparent film, the print-on area adapted to receive indicia identifying the cable about which the marker label is applied. A perforation extends across the transparent film providing a line of separation of the transparent film. When wrapped around a cable, the second adhesive area overlies the print-on area such that the cable identifying indicia is visible through the transparent second adhesive area. As the transparent film is wrapped around the cable, the first adhesive area adheres to the cable. The remainder of the transparent film is rotated, breaking the perforation, whereby the smooth area of the film in contact with the cable provides smooth rotation of the label around the cable. |
| US11081021B2 |
Practice bow tie article, kit, and method
Provided are articles, kits, and methods for teaching a person how to tie a bow tie. A practice bow tie includes an elongated piece of flexible material with indicators on the front and rear surface of the bow tie. The indicators, also provided in a kit, define a portion, fold line, or step that aid a user in tying a bow tie to achieve a satisfactory appearance. |
| US11081020B2 |
Stick welding electrode with real-time feedback features
Present embodiments include systems and methods for stick welding applications. In certain embodiments, simulation stick welding electrode holders may include stick electrode retraction assemblies configured to mechanically retract a simulation stick electrode toward the stick electrode retraction assembly to simulate consumption of the simulation stick electrode during a simulated stick welding process. In addition, in certain embodiments, stick welding electrode holders may include various input and output elements that enable, for example, control inputs to be input via the stick welding electrode holders, and operational statuses to be output via the stick welding electrode holders. Furthermore, in certain embodiments, a welding training system interface may be used to facilitate communication and cooperation of various stick welding electrode holders with a welding training system. |
| US11081014B2 |
Landing assistance method and system associated with a display device of an aircraft
A landing assistance system includes a module for acquiring environment and current flight parameters of the aircraft, a module for generating flight and navigation symbology to be displayed on the display device at least from current flight parameters, a module for generating a land topography of terrain overflown by the aircraft, a transmission module configured to transmit a signal to the display device that represents the flight and navigation symbology and the synthetic representation, the symbology generating module including a sub-module for displaying a mock-up at a predetermined non-zero positive pitch angle relative to a median line of the display zone. The system allows a landing to occur in good conditions by virtue of the enlargement of the lower part of the display zone. |
| US11081013B1 |
Electronic landing marker
An electronic marker may provide an approach notification to enable people to understand and interpret actions by a UAV, such as an intention to land or deposit a package at a particular location. The marker may communicate a specific intention of the UAV and/or communicate a request to a person. The marker may monitor the person or data signals for a response from the person, such as movement of the person that indicates a response. The marker may be equipped with hardware and/or software configured to provide notifications and/or exchange information with a person or the UAV at or near a destination. The marker may include a display, lights, a speaker, and one or more sensors to enable the UAV to provide information, barcodes, and text. The marker can provide final landing authority and can “wave-off” the UAV if an obstacle or person exists in the landing zone. |
| US11081012B2 |
Electronic device and method for optimizing vertical profile for cruise phase of flight
Electronic devices and methods for optimizing the vertical profile to be flown by an aircraft during the cruise phase of a flight. Based on continuously updated information about the aircraft's weight and the atmospheric wind and temperature, the method provides an optimal sequence of climbs and/or descents along the flight path during the cruise phase. Following the step climb/descent profile proposed by the method results in the most cost-optimal flight (if a cost index was selected) or in the most fuel-efficient flight (if the long-range cruise mode was selected). The method may be implemented in the flight management computer or any other electronic data processing device that can access the required information to perform the calculations. |
| US11081011B1 |
Aircraft system and method to provide graphical threshold range indicator
A system may include a display and a processor. The display may be configured to present images to a user, the display in an ownship. The processor may be communicatively coupled to the display and in the ownship. The processor may be configured to: receive aircraft traffic data and ownship data; at least one of determine or adjust a threshold range based at least on the aircraft traffic data and the ownship data, the threshold range representing a time or distance threshold to designated traffic; generate and update a graphical threshold indicator, the threshold indicator representing a time or distance from the threshold range to the designated traffic; and output the graphical threshold indicator as graphical data to the display. The display may be configured to display the graphical threshold indicator to the user. |
| US11081008B2 |
Vehicle vision system with cross traffic detection
A vision system of a vehicle includes a camera disposed at a vehicle and having a field of view exterior of the vehicle. The camera may have a wide angle lens with more distortion at side regions of the field of view than at a center region of the field of view. An image processor processes captured image data to determine gradient information of captured image data, and responsive to processing gradient information, determines a potential cross traffic object at one of the side regions of the field of view. The image processor processes multiple frames of captured image data to determine movement of an upper portion and a lower portion of a gradient of the determined potential cross traffic object and, responsive to such processing, determines if the detected potential cross traffic object is a cross traffic object that is moving into a path of the vehicle. |
| US11081007B2 |
Road shape prediction apparatus, other-vehicle route prediction apparatus, and driving assistance apparatus
There are provided a road shape predictor predicts the shape of a road, based on positional information pieces, on other vehicles existing in the vicinity of a reference vehicle, that are obtained from the communicator and a road shape prediction priority determiner that determines the priorities of areas in the vicinity of the reference vehicle in the case where the road shape predictor predicts the shape of the road for the predicted route of the reference vehicle. |
| US11081001B1 |
Methods and systems for capturing and transmitting environmental and traffic conditions data using a traffic cone
A system for capturing and transmitting data related to traffic and environmental conditions is provided. The system includes a processor that identifies location information of the traffic cone in real time, an image sensor that captures one or more images of an area external to the traffic cone, a communication module that transmits, in real time, the location information and the one or more images as a broadcast signal, and memory utilized to store the location information and the one or more images. |
| US11080994B2 |
Smart road sensor
A road sensor has a housing, at least one sensor inside the housing, a processor inside the housing, the processor configured to execute instructions to cause the processor to: receive data from the at least one sensor; use machine learning to recognize conditions local to the sensor from the sensor data; and provide an output signal of the conditions. A method of providing road conditions includes receiving, at a road sensor, input detectable by at least one sensor, using a processor in the road sensor to execute code that will cause the processor to: receive sensor data from the at least one sensor; apply machine learning to the sensor data to recognize at least one road condition associated with the sensor data; and transmit an output signal identifying the road conditions. |
| US11080993B1 |
Vehicle to everything communication management according to a vulnerable roadside user device configuration
Various aspects of the present disclosure generally relate to wireless communication. In some aspects, a device may receive a vehicle to everything (V2X) communication associated with a vehicle in an environment; determine, based at least in part on a vulnerability measure of a vulnerable roadside user (VRU) in the environment, a VRU notification profile associated with whether an alert is to be provided to a VRU to indicate vehicle data of the vehicle; and perform an action according to the VRU notification profile. Numerous other aspects are provided. |
| US11080992B2 |
Gas detector connectivity dongle
Embodiments relate generally to gas detector connectivity devices, for example a dongle, to allow for continuous communication of real-time data between a gas detector and a central station. Dongle embodiments typically comprise an IR transceiver, a processor, a wireless interface device, a power source, and a means of attachment. Such dongle embodiments, and their related methods of operation, may allow for retrofitting of legacy gas detectors to provide wireless capabilities. |
| US11080990B2 |
Portable 360-degree video-based fire and smoke detector and wireless alerting system
An aspect of the invention includes a fire and smoke detection system including a 360-degree camera, and a computing platform in communication with the 360-degree camera. The computing platform is configured to receive an image or video from the 360-degree camera, determine that tire or smoke is detected in the image or video received from the 360-degree camera, and venerate at least one alert in response to determining that fire or smoke is detected in the image or video received from the 360-degree camera. The fire and smoke detection system may be portable and not removably mounted. |
| US11080988B2 |
Internet facilitated fire safety system and real time monitoring system
An Internet facilitated fire safety system and real time monitoring system is disclosed. The fire safety system comprises a plurality of smart fire safety devices and equipment, including fire extinguishers, hose reels, fire doors, exit lights, emergency lights, sprinkler tank and sprinkler system, system to monitor CO2 and/or carbon monoxide levels, and the like. Each of these safety devices and equipment is connected by an IOT interface device and a wireless gateway to computer servers an electronic communications network. The IOT interface devices have a plurality of sensors to detect the operational condition of each safety device and equipment. Data obtained from the sensors is analyzed and interpreted using software and algorithms by servers in the system. Since each fire safety device and equipment is electronically connected, transmitting data and information on its operational status occurs in real time and 24/7. |
| US11080985B2 |
Alarm triggering device and circuitry therefor
The present invention relates to an alarm triggering device. The alarm triggering device comprises a wristband (10) adapted to be worn by a user; and circuitry (30). The circuitry (30) comprises a power source (31) configured to power one or more units of the circuitry; first and second triggering buttons (32a, 32b) arranged on separate locations along an circumferential extension of the wristband allowing for simultaneous actuation by the user applying a gripping force by gripping the wristband; an alarm detection unit (33) configured to detect an alarm by detecting simultaneous actuation of the first and second triggering buttons; and a wireless communication unit (34) configured to wirelessly send an alarm message comprising the alarm to one or more alarm receiving units. |
| US11080981B1 |
System and method for social distancing compliance
The system and method for social distancing compliance generates an alarm when at least two people are separated by a distance that is less than a predetermined threshold value. Thermal imaging is used to detect at least two people using at least one thermal image sensor. At least one distance is calculated between the at least two people, and it is determined if the at least one distance is less than a predetermined threshold value. If the calculated at least one distance is less than the predetermined threshold value, at least one of the at least two people is alerted that a minimum safe distance is not being met. |
| US11080977B2 |
Management system, server, management device, and management method
A management system includes: an information storage member that stores individual identification information of a management target; an information reading device that reads individual identification information I from the information storage member located within a predetermined distance from the information reading device; an imaging device hat generates continuous image data by continuously capturing images of at least an area where the information reading device can read the individual identification information I from the information storage member; a storage device that stores the continuous image data; a control device that acquires an event occurrence time at which an event related to the individual identification information I read by the information reading device has occurred, and sets in the continuous image data a playback start time corresponding to the event occurrence time; and a display device capable of displaying an image based on the continuous image data. |
| US11080971B2 |
Methods, systems, apparatus, and articles of manufacture to generate corrected projection data for stores
Methods, systems, apparatus, and articles of manufacture to generate corrected projection data for stores of a retailer are disclosed. An example apparatus to reduce projection errors associated with retail register devices includes a receipt data analyzer to retrieve transaction code values associated with receipts generated by the retail register devices, identify a direction change in a first subset of the retrieved transaction code values, and verify a register reset occurrence based on values associated with a second subset of the retrieved transaction code values, and a projection calculator to reduce retail sales projection error by calculating a transaction count based on the retrieved receipts and transaction code values. |
| US11080970B2 |
End user protection against ATM keypad overlay
Methods, systems, and computer program products for data entry device security are provided. Aspects include receiving an indication of a user presence at a data entry device, wherein the data entry device includes a surface with apertures, and wherein the apertures include a material with a reflection coefficient. A presence of a fraud device is determined by emitting, from beneath the surface, security light from a set of one or more emitters, wherein the security light has a security light luminous power. A reflection of the security light off the material is collected by a first set of one or more sensors, wherein the reflection has a reflection luminous power. A luminous power range is determined based on the security light luminous power and the reflection coefficient and based on the reflection luminous power being outside the luminous power range, security measures are engaged at the data entry device. |
| US11080968B2 |
Gaming system and method for modifying a play of a wagering game based on a sporting event
Gaming systems and methods which utilize the results of a sporting event to modify one or more parameters of a play of a game, such as a wagering game of chance. |
| US11080964B2 |
Player tracking system and methods of operating same
A casino management networked computer system is described. The networked computer system includes a database server computer and an application server computer coupled to the database server computer and to a plurality of gaming devices. The database server processor is programmed to generate and store a program file including a patron logic matrix that includes data records of patron ranking information included in the spreadsheet. Each data record includes a market definition value, a patron ranking value, a theoretical loss value, and a comp reinvestment data. The application processor is programmed to calculate patron comp point values based on the comp reinvestment data and patron wager data included in a patron data record. |
| US11080963B1 |
Real time action of interest notification system
A method of identifying characteristics of wagers available on individual actions of a sporting event that are highly correlated with a user's history of wagers made and wagers viewed or has preselected specific wager options to be notified about. The user interacts with a betting platform through a mobile application that displays all of the live actions available to be wagered upon, and the odds of those wagers. The user's interaction with the application is recorded, along with their wagering decision, wagering amount, and a plurality of action characteristics, such as teams involved, down and distance, weather, etc., and examined for correlations. As the betting platform receives a new live action available to be wagered on, it compares the characteristics of the new action to the user's history and will notify the user of the new action if it is highly correlated with their past interest. |
| US11080957B2 |
Method for detecting fault of smart door lock, smart door lock and storage medium
Some embodiments of the present disclosure provide a method for detecting a fault of a smart door lock, a smart door lock and a storage medium. The smart door lock includes a plurality of unlocking modules, and the method for detecting a fault of the smart door lock includes: monitoring state information of each of the unlocking modules independently; and sending fault information of an unlocking module in an abnormal state to a terminal device after monitoring the unlocking module in the abnormal state. By adopting the embodiments of the present disclosure, specific fault information of a fault which occurs can be accurately and timely known, and a specific position where the fault occurs may be located, which effectively reduces difficulties in detecting the fault and repairing the smart door lock. |
| US11080953B2 |
Method, system, and door lock device for controlling door lock
A method for controlling a door lock device includes checking whether strength of a scanned signal obtained by scanning a signal output from a smart phone is greater than predetermined strength of a signal by the door lock device; comparing strength of a signal (RSSI) of the smart phone received through an external antenna installed outside the door in which the door lock device is installed with the RSSI received through an internal antenna installed inside the door by the door lock device; authenticating whether the smart phone is a valid smart phone, when the strength of a signal of the smart phone received through the external antenna is greater than the strength of a signal of the smart phone received through the internal antenna by a predetermined value; and opening the door when the smart phone is authenticated as the valid smart phone according to the authenticated result. |
| US11080948B2 |
System and method for aircraft fault detection
An aircraft fault detection system including at least one aircraft data logging device that captures a collection of time-series flight data, from at least one aircraft subsystem, for at least one flight leg of an aircraft flight, and an aircraft controller coupled to the at least one aircraft data logging device. The aircraft controller groups the collections of time-series flight data into a plurality of test states, the plurality of test states being determined from a plurality of training states and one or more of the test states is different from other test states in the plurality of test states, generates at least one test transition matrix based on the plurality of test states and determine anomalous behavior of the at least one aircraft subsystem based on the at least one test transition matrix, and forecasts a fault within the at least one aircraft subsystem based on the anomalous behavior. |
| US11080947B2 |
Method for timing multiple entities, timekeeping device and timing application
A method for simultaneously timing multiple entities uses a timekeeping device. During timing, each of the multiple entities runs through a process starting with a start time event in a start phase followed by at least one subsequent time event in a run phase. The method comprises the following steps. In the start phase, when a first start time event occurs, a first actuator is manually actuated and the manual actuation triggers the measuring and recording of a first start time by a time measuring means. In the run phase following the start phase, when a subsequent time event occurs, the first actuator is manually actuated and the manual actuation triggers the measuring and recording of a subsequent time by the time measuring means. The timekeeping device also includes an assignment means and a second actuator. |
| US11080946B2 |
Method and system for collecting activity-data
A method for collecting activity-data of a user executing a task including at least one activity includes tracking a user-device to determine a location-data of the user-device associated with the user; retrieving, at a server-arrangement from a database-server, a client-data; determining a change in the location-data of the user-device; and generating the activity-data, based on the change in the location-data, by one of correlating the location-data with the client-data by employing machine learning techniques, or processing a prompt-response generated by a manual-input at the user-device, wherein the prompt-response is generated based on a prompt provided by the server-arrangement to the user-device when the machine learning techniques fail to correlate the location data with the client-data. |
| US11080945B2 |
On-board device, automatic toll collection machine, toll collection system, and toll collection method
An on-board device is equipped with: an RFIC which includes an activation processing unit for outputting an activation signal upon receiving a radio wave for RFID communication and an RF tag function unit for reading prerecorded tag information; an IC card processing unit which is activated on the basis of the activation signal when electric power is supplied thereto from a power supply circuit, and which reads and writes IC card information from and to an IC card; and a communication unit which transmits the tag information and/or the IC card information to an external device. |
| US11080944B2 |
Programmatically determining location information in connection with a transport service
A computer system can communicate with a mobile device of a service provider to receive location data. Additionally, the computer system can monitor, from the location data, a location of the mobile device over a duration that follows the service provider being assigned to a service request. Based on monitoring the location data, the computer system can determine whether the service provider has failed to correctly indicate when a transport service for the service request began. Moreover, the computer system can cause a service application running on the mobile device to prompt the service provider to enter input to identify a start location where the transport service began, in response to the computer system determining that the service provider has not correctly indicated when the transport service begun. |
| US11080943B2 |
Method and apparatus for displaying with 3D parallax effect
Embodiments of the present invention relate to the field of communications technologies, and disclose a method and an apparatus for displaying with a 3D parallax effect, to generate a relatively good 3D parallax effect. A specific solution is: displaying a graphical user interface, where the graphical user interface includes first content, and the first content includes at least two elements; obtaining a first operation instruction which is used for moving, in an area for displaying the first content, at least one first element of the at least two elements; and moving each of the at least one first element by a different distance along a direction of a first straight line, so that the first content has a 3D parallax effect, where the direction of the first straight line is a direction having a preset included angle with a plane in which the graphical user interface is located. |
| US11080941B2 |
Intelligent management of content related to objects displayed within communication sessions
The techniques disclosed herein improve the efficiency of a system by providing intelligent management of content that is associated with objects displayed within communication sessions. The participants can generate a content object associated with a 3D object. The content object may be in the form of 3D virtual object such as an arrow pointing to the table, a text box of an annotation, etc. The content object may also include functional features that collect and display information voting agent. The system can generate a data structure that associates the object with the content object. The data structure enables a system to maintain an association between the object and the content object when various operations are applied to either object. Thus, if a remote computer sends a request for the content object, the associated object is delivered with the content object. |
| US11080940B1 |
Export decomposition filter for a multi-user CAx environment
A system for component visualization according to an exemplary aspect of the present disclosure includes, among other things, a data module configured to access data corresponding to a component design. The component design includes at least one feature corresponding to a group of feature types. A display module is configured to display the data in an environment corresponding to a first user profile. A comparison module is configured to cause the display module to display the at least one feature when the at least one feature meets at least one predetermined criterion relating to the first user profile, and is configured to cause the display module to display a representation of the at least one feature when the at least one predetermined criterion is not met. The representation has a representation geometry that is a different geometry than a feature geometry of the at least one feature. A method for designing a component is also disclosed. |
| US11080938B1 |
Automatic summarization of remotely-guided augmented reality sessions
Receiving a recording of a remotely-guided augmented reality (AR) session which includes: images of a scene, captured by a camera of a local user; position and orientation data of the camera; and annotations generated by a remote user at points-of-interest (POIs) in a three-dimensional (3D) representation of the scene. Automatically generating a summary of the session, by: projecting the annotations to matching locations in some of the prominent images, based on the POIs of the annotations and on the position and orientation data of the camera and including, in the summary: the prominent images, including those of the prominent images having the projected annotations. |
| US11080937B2 |
Wearable augmented reality devices with object detection and tracking
The technology disclosed can provide capabilities to view and/or interact with the real world to the user of a wearable (or portable) device using a sensor configured to capture motion and/or determining the path of an object based on imaging, acoustic or vibrational waves. Implementations can enable improved user experience, greater safety, greater functionality to users of virtual reality for machine control and/or machine communications applications using wearable (or portable) devices, e.g., head mounted devices (HMDs), wearable goggles, watch computers, smartphones, and so forth, or mobile devices, e.g., autonomous and semi-autonomous robots, factory floor material handling systems, autonomous mass-transit vehicles, automobiles (human or machine driven), and so forth, equipped with suitable sensors and processors employing optical, audio or vibrational detection. |
| US11080923B2 |
Position-based media pipeline for volumetric displays
Position based media pipeline systems and methods for volumetric displays provide content to a volumetric display having at least two pixels arranged in a 3D coordinate space. A three-dimensional (3D) pixel position dataset and a 3D animation are provided and a first volume representation based on the 3D animation is created. A second volume is created based on the first volume and including color data. A texture atlas is assembled based on the second volume and volumetric image data is generated based on the texture atlas. The position based media pipeline outputs the volumetric image data to one or more graphic controllers. The volumetric image data can be output whereby a user can preview the volumetric image data in addition to output to the volumetric display. |
| US11080915B2 |
Gesture based controls for adjusting display areas
Some embodiments of the invention provide a map application with novel map exploration tools. In some embodiments, the map application executes on a mobile device (e.g., a handheld smartphone, a tablet, etc.) with a touch sensitive screen. The map application of some embodiments has a first display area to display a map of a region, and second and third display areas to display information about items displayed on the map in the first display area. In some embodiments, the second display area slides over the first display area to overlap at least a portion of the first display area. After the second display area slides over the first display area, the third display area in some embodiments slides over the first display area to overlap at least a portion of the first display area. In some embodiments, the second and third display areas slide over the first display area from one side of the first display area. This side is the bottom of the first display area in some embodiments. In some embodiments, the bottom side is expected to be closer to a position for resting the mobile device in a hand of a user than a top side of the first display area. Accordingly, in some embodiments, the second and third display areas slide up from the bottom side of the first display area so that information and/or controls that are provided in these display areas are more accessible for one handed operations (e.g., thumb-based touch operations) of the user as the user hold and interacts with the device with one hand. |
| US11080913B2 |
Page image display control system, page image display control method, and program therefor
A scene is assigned to each page image, and an image included in the assigned scene is pasted on each page image. A page image addition instruction region is displayed between adjacent page images. In a case where the page image addition instruction region is clicked, a new page image is displayed between two page images between which the clicked page image addition instruction region is interposed. An image included in a scene assigned to a first page image of the two page images or a scene assigned to a second page image of the two page images is pasted on the new page image. |
| US11080911B2 |
Mosaic oblique images and systems and methods of making and using same
Systems and methods for creating oblique-mosaic image(s) for geographical area(s) are disclosed, including a computer system running software that when executed causes the system to create a mathematical model of a sensor of a virtual camera having an elevation greater than an elevation of a desired geographical area to be imaged, the mathematical model having an oblique-mosaic pixel map; determine surface locations for pixels included in the oblique-mosaic pixel map; select source oblique images of the surface locations of the pixels captured at an oblique angle and compass direction similar to an oblique angle and compass direction of the virtual camera; and reproject source oblique image pixels for pixels included in the oblique-mosaic pixel map such that reprojected pixels have differing sizes determined by matching projections from the virtual camera so as to present an oblique appearance, and thereby create the oblique-mosaic image of the desired geographical area. |
| US11080910B2 |
Method and device for displaying explanation of reference numeral in patent drawing image using artificial intelligence technology based machine learning
The present invention relates to a device and a method for placing an original or translated explanation of a reference numeral around the reference numeral in a patent drawing, by recognizing a reference numeral included in a patent drawing, searching for a space to place an explanation corresponding to the recognized reference numeral, generating a placement information set including position information for displaying the explanation of the reference numeral in the searched empty space, and providing the placement information set to a corresponding patent drawing image. Utilization of the present invention makes it possible to recognize clearly and quickly what is represented by a reference numeral included in a patent drawing, thereby increasing the readability of a drawing, and facilitating understanding of the technical idea of a patent through patent drawings. |
| US11080903B2 |
Visualization with conditional characteristic
A system includes determination of a first series of data points, each data point of the first series of data points comprising one or more dimension values and a value of a first measure, determination of a second series of data points, each data point of the second series of data points comprising one or more dimension values and a value of a second measure, determination of a condition associated with a relation between the first measure and the second measure and with a visual characteristic, evaluation of the condition with respect to a first portion of the first series of data points and a first portion of the second series of data points, determination of a first visual characteristic of a first area of a visualization based on the evaluation of the condition and the visual characteristic associated with the condition, and generation of a visualization comprising a first visualization of the first series of data points, a second visualization of the second series of data points, and the first area, wherein the first area exhibits the first visual characteristic. |
| US11080902B2 |
Systems and methods for generating anatomical tree structures
A method of building an anatomical branch model comprises receiving anatomical image data comprising a plurality of graphical units associated with an anatomical structure and determining a plurality of parent segments and child segments. The method also comprises determining a set of relationships between the parent segments and the child segments by determining a first set of connection costs of connecting at least one of the parent segments to a first subset of the child segments, the child segments of the first subset are separated from the at least one of the parent segments by one or more gaps, identifying a first child segment from the first subset of the child segments based on a first connection cost, and connecting the first child segment to the at least one parent segment. The method further comprising generating an image of the anatomical branch model based on the determined set of relationships. |
| US11080890B2 |
Image sensor initialization in a robotic vehicle
Various embodiments include processing devices and methods for initializing an image sensor of a robotic vehicle. In some embodiments, a processor of the robotic vehicle may extract first features from a captured image of the target image, may extract second features from a predefined image pyramid of the target image, may match first features and second features, and may estimate an image sensor pose based on matched features and known dimensions of the target image. In some embodiments, the processor may estimate an image or to image sensor pose based on matched features and a translation and/or rotation of the robotic vehicle. In some embodiments, the processor may determine a coordinate system for the robotic vehicle based on one or more image sensor poses. |
| US11080888B2 |
Information processing device and information processing method
To enable a more accurate estimation of the center of a pupil even in a situation in which it is difficult to capture an image of the entire pupil. An information processing device includes: an acquisition unit that acquires information regarding an iris in an eyeball; and an estimation unit that estimates a center position of a pupil in the eyeball on the basis of the information regarding the iris. |
| US11080885B2 |
Digitally encoded marker-based augmented reality (AR)
A system and method for markers with digitally encoded geographic coordinate information for use in an augmented reality (AR) system. The method provides accurate location information for registration of digital data and real world images within an AR system. The method includes automatically matching digital data within an AR system by utilizing a digitally encoded marker (DEM) containing world coordinate information system and mathematical offset of digital data and a viewing device. The method further includes encoding geographic coordinate information into markers (e.g., DEMs) and decoding the coordinate information into an AR system. Through use of the method and corresponding system, marker technology and the basis of geo-location technology can be combined into a geo-located marker, thereby solving the problem of providing accurate registration within an augmented reality. |
| US11080883B2 |
Image recognition device and method for recognizing images
A method for detecting and recognizing objects in images includes obtaining a video stream and pre-processing the video stream to obtain an image queue arranged in a frame playing order and storing the image queue into a storage device. An image frame of the image queue from the storage device is read and at least one object in the image frame is detected and recognized. An image recognition device is also provided. |
| US11080881B2 |
Detection and identification systems for humans or objects
Some systems include an illuminator configured to illuminate a scene, a detector configured to receive electromagnetic radiation from the scene, one or more retroreflective tags, and an image processor. Each of the one or more retroreflective tags is attached to or positioned near a corresponding target and is configured to reflect electromagnetic radiation from the illuminator toward the detector. The image processor can identify electromagnetic radiation reflected by one or more retroreflective tags to determine the presence of one or more retroreflective tags and corresponding targets in the scene. Retroreflective tags can include retroreflective portions and non-retroreflective portions such that, when electromagnetic radiation is incident upon the retroreflective tag, the retroreflective tag reflects the electromagnetic radiation in a pattern that corresponds to a code uniquely corresponding to the target. An image processor can determine the presence of a target based on identifying the unique code of the retroreflective tag. |
| US11080880B2 |
Machine vision system and method for identifying locations of target elements
This document describes machine vision systems and methods for determining locations of target elements. The described machine vision system captures and uses information gleaned from the captured target elements to determine the locations of these captured target elements. |
| US11080879B1 |
Systems, methods, and graphical user interfaces for annotating, measuring, and modeling environments
A computer system displays an annotation placement user interface that includes a representation of a field of view of one or more cameras that is updated over time based on changes in the field of view, a placement user interface element indicating a virtual annotation placement location. If the placement user interface element is over a representation of a physical feature in the physical environment that can be measured, the appearance of the placement user interface element changes in accordance with one or more aspects of the representation of the physical feature, and, in response to an input to perform one or more measurements of the physical feature: if the physical feature is a first type of feature, measurements of a first measurement type are made; and, if a second, different type of physical feature, measurements of a second, different measurement type are made. |
| US11080875B2 |
Shape measuring apparatus, shape measuring method, non-transitory computer readable medium storing program
Provided is a shape measuring apparatus, a shape measuring method, and a program that can efficiently measure a three-dimensional shape of an object. The shape measuring apparatus includes an imaging unit, a distance image sensor unit, and a processing apparatus. The imaging unit acquires a two-dimensional image of an object over a plurality of frames. The distance image sensor unit acquires a distance image of the object over the plurality of frames. The processing apparatus detects a feature point of the object from the distance image of each of the plurality of frames and writes the detected feature point in a coordinate system set for the object. |
| US11080873B2 |
Image processing apparatus, image capturing apparatus, image processing method, and storage medium
There is provided an image processing apparatus. An obtaining unit obtains a distance map and a shot image, the distance map representing a distribution of information related to a distance in a depth direction of a shooting range using a distribution of distance values, the shot image corresponding to the shooting range. A first filter unit applies a first filter to the distance map. A second filter unit applies a second filter to the distance map to which the first filter has been applied. The first filter is a filter that reduces a distribution of distance values in a predetermined distance value range in the distance map. The second filter is a filter that changes a distance value of a target distance in the distance map using weighted averaging. |
| US11080869B2 |
Search assist system, search assist apparatus, and search assist method
A search assist system performs search for a subject of search from the images picked up by the on-board cameras. The search assist system includes: a first storage configured to store characteristic information on subjects of identification detected from the images picked up by fixed cameras and information on the fixed cameras; a second storage configured to store location information on vehicles; and one or more first controllers configured to receive characteristic information on the subject of search; determine a search target area based on an installation location of a fixed camera picking up the characteristic information matching the characteristic information on the subject of search; and send, to vehicles within the search target area, search instructions to search for the subject of search by the on-board cameras; and a second controller configured to output an image including the detected characteristic information on the subject of search. |
| US11080866B2 |
Dynamic image processing method and dynamic image processing device
A dynamic image processing method in a dynamic image processing device performing an image processing of a dynamic image includes a setting step of setting a reference motion, a corresponding point setting step of setting a corresponding point according to the reference motion among frame images of the dynamic image for each pixel of the dynamic image, a determination step of determining an enhancement degree of each pixel of each of the frame images of the dynamic image based on equality of a density distribution in a target time range of a small region surrounding the corresponding point set for each pixel at the corresponding point setting step; and an enhancement/attenuation processing step of performing enhancement processing or attenuation processing to each of the frame images of the dynamic image based on the enhancement degree determined at the determination step. |
| US11080861B2 |
Scene segmentation using model subtraction
Systems and methods for frame and scene segmentation are disclosed herein. A disclosed method includes providing a frame of a scene. The scene includes a scene background. The method also includes providing a model of the scene background. The method also includes determining a frame background using the model and subtracting the frame background from the frame to obtain an approximate segmentation. The method also includes training a segmentation network using the approximate segmentation. |
| US11080859B2 |
Image communication based on hit image block conditions
An image sending method includes dividing a desktop image according to an image segmentation solution included in an image segmentation solution set, to obtain a target image block set, where the target image block set includes a plurality of image blocks. The target image block set meets a target condition, and the target condition includes: a percentage of hit image blocks in the target image block set is greater than or equal to a target threshold, or a percentage of hit image blocks in the target image block set is greater than a percentage of hit image blocks in another image block set. The image sending method further includes sending data information of each image block and location information of each image block in the target image block set to a user end. |
| US11080857B2 |
Systems and methods for segmenting an image
Methods and systems for segmenting a medical image into classes are described. A system to segment a medical image includes a processor and memory with instructions that upon execution cause the system to perform a method for segmenting the image. The method includes using initial segmentation methods to derive at least one set of probabilities of belonging to the classes for each pixel of the image. The at least one set of probabilities and the image are input into a neural network which segments the image based on both the probabilities and the image provided. This system can also use patches or sub-sections of the original image and the at least one set of probabilities as inputs to the final neural network. The patch based method enables segmentation of larger images, which usually require large amounts of time and memory to segment, and can produce a highly trained neural network. |
| US11080855B1 |
Systems and methods for predicting tissue characteristics for a pathology image using a statistical model
In some aspects, the described systems and methods provide for a method for predicting tissue characteristics for a pathology image. A statistical model trained on multiple annotated pathology images is used. Each of the training pathology images includes an annotation describing tissue characteristics for one or more portions of the image. The method includes accessing a pathology image for predicting tissue characteristics. A trained statistical model is retrieved from a storage device. A set of patches is defined from the pathology image. Each of the patches in the set includes a subset of pixels from the corresponding pathology image. The set of patches is processed using the trained statistical model to predict respective annotations for each patch in the set. The predicted annotations are stored on the storage device. |
| US11080847B2 |
Magnetic resonance imaging device and method for generating magnetic resonance image
Provided is a magnetic resonance imaging (MRI) apparatus including an acquisition unit configured to acquire an undersampled spectrum in a k-space and a reconstruction unit configured to generate a target image based on the undersampled spectrum, wherein the reconstruction unit includes: a first sub-reconstruction unit configured to perform initial reconstruction on data corresponding to unsampled positions in the k-space by using a Split Bregman algorithm or approximate sparse coding; a second sub-reconstruction unit configured to decompose the initially reconstructed spectrum in the k-space into multiple frequency bands to thereby generate a plurality of individual spectra and perform dictionary learning reconstruction on images respectively corresponding to the decomposed multiple frequency bands by alternating sparse approximation and reconstructing of measured frequencies; and an image generator configured to generate a target image by merging together the reconstructed images respectively corresponding to the multiple frequency bands. |
| US11080845B2 |
Image processing apparatus utilizing keypoints in an image analysis and method thereof
An image processing apparatus and method thereof are provided. The image processing apparatus stores at least a reference image and performs the following operations: (a) receiving an image, (b) determining a plurality of representative keypoints for the image, such as determining the representative keypoints by a density restriction based method, (c) finding out that a matched area in the image corresponds to a first reference image according to the representative keypoints, (d) determining that a matched number between the representative keypoints and a plurality of reference keypoints of the first reference image is less than a threshold, and (e) storing the matched area in the image processing apparatus as a second reference image. |
| US11080844B2 |
System and method for testing an electronic device
The present disclosure relates to system(s) and method(s) for testing an electronic device. The system may receive a configuration file from a user device. Further, the system may operate the electronic device under test based on a target test case selected from the configuration. The system may further operate a video capturing device to capture a sequence of video frames of visual indicators corresponding to the electronic device under test. The system may further analyse the sequence of video frames to identify one or more target video frames indicating visual change in the visual indicators corresponding to the electronic device. The may further analyse the one or more target video frames to determine response time corresponding to each target video frame. Furthermore, the system may generate a test report based on the response time corresponding to the one or more target video frames. |
| US11080843B2 |
Image inspecting apparatus, image inspecting method and image inspecting program
An image inspecting apparatus includes at least one image capturing part, a lighting part, a control part including a moving part, a searching part analyzing an image captured by the image capturing part under a first image capturing condition and searching for a defect candidate from an object under inspection, and a determining part. When the searching part finds the defect candidate from the object under inspection, the control part controls an image capturing condition such that a part where the defect candidate is found by the searching part is photographed under a second image capturing condition that is clearer than the first image capturing condition. The determining part analyzes an image captured by the image capturing part under the second image capturing condition and determines whether the defect of the object under inspection is present or absent. |
| US11080840B2 |
Automatic optical inspection device based on CPU+GPU+FPGA architecture
An automatic optical inspection device, including an image storage unit; an image computing unit; and an image acquisition unit. The image storage unit includes a first communication interface and a second communication interface. The image computing unit includes a first optical interface, a second optical interface, a third optical interface, and a fourth optical interface; the image acquisition unit includes a third communication interface and a camera interface. The image storage unit is configured to transmit configuration parameters and test commands to the image computing unit, receive a test result transmitted from the image computing unit via the first communication interface, and receive data from the image acquisition unit via the second communication interface. The image computing unit is configured to receive the configuration parameters and test commands from the image storage unit, and transmit the test result to the image storage unit via the first fiber interface. |
| US11080829B2 |
Control apparatus and control method
A control apparatus for controlling a display module, the control apparatus includes: at least one memory and at least one processor which function as: acquiring information which is added to input image data and relates to at least one of a maximum brightness of an input image represented by the input image data and an upper limit brightness being an upper limit value of a dynamic range of the input image, and controlling the display module so as to display a setting image for setting a target range to be displayed on the display module among the dynamic range of the input image data, wherein the setting image includes an index indicating a brightness determined based on the information. |
| US11080822B2 |
Method, system and recording medium for building environment map
A method, a system and a recording medium for building environment map are provided. In the method, a plurality of captured images are captured by using a head-mounted display (HMD). Then, a viewing direction and a translation direction of the HMD are calculated, and an importance map corresponding to the captured images is determined according to the viewing direction and the translation direction of the HMD. Finally, the captured images are stitched to generate a panoramic image according to the importance map. |
| US11080821B2 |
Automated benthic ecology system and method for stereoscopic imagery generation
A method for generating stereoscopic imagery comprising the steps of building an automated benthic ecology system comprising a high-resolution still camera, a high-resolution video camera, an environmental sensor package, a stereoscopic camera, and underwater housing, wherein the high-resolution video camera is configured for constant recording, turning the video camera on and hovering the ABES at the desired depth for a specific period of time acquiring imagery, wherein the imagery is automatically time-stamped with a date and time, extracting frames from the video, matching the timestamps on the photographs with the timestamps of the ROV log, which provides latitude, longitude and depth measurements, georeferencing each image using GeoSetter software, stitching imagery from the stereoscopic camera into a panoramic image using software. |
| US11080815B2 |
Method and wearable device for adjusting overdriving information of display on basis of user's motion information
Various embodiments of the present invention relate to a method and a wearable device for increasing a response rate of a display. An electronic device according to various embodiments of the present invention comprises: a display; a sensor module; and a processor electrically connected to the display and the sensor module, wherein the processor is configured to: sense movement of a user through the sensor module while the display displays a current frame image; predict a subsequent frame image on the basis of the sensed movement of the user, set overdriving information on the basis of the subsequent frame image; and display the subsequent frame image at least on the basis of the overdriving information by using the display. Other various embodiments are possible. |
| US11080813B2 |
Compute optimization mechanism
An apparatus to facilitate compute optimization is disclosed. The apparatus includes a mixed precision core to perform a mixed precision multi-dimensional matrix multiply and accumulate operation on 8-bit and/or 32 bit signed or unsigned integer elements. |
| US11080812B2 |
Image recognition apparatus and image recognition method for sorting candidate regions detected in image
An image recognition apparatus includes a processor including a plurality of arithmetic units; and a memory storing a plurality of data elements, each corresponding to one of candidate regions detected in an image and indicating a location and an evaluation value of the corresponding candidate region. The processor sorts the data elements by calculating in parallel, in reference to evaluation values, indexes each indicating a position of a corresponding one of the data elements in a sorted ordering and transferring in parallel, after the calculation of the indexes, the data elements based on the indexes. The processor selects part of the candidate regions based on the sorted ordering of the data elements. |
| US11080811B2 |
Compute optimization mechanism
An apparatus to facilitate compute optimization is disclosed. The apparatus includes a mixed precision core to perform a mixed precision multi-dimensional matrix multiply and accumulate operation on 16-bit and/or 32 bit floating-point elements. |
| US11080806B2 |
Non-trip risk matching and routing for on-demand transportation services
An on-demand transportation management system can receive transport requests in connection with an on-demand transportation service, each transport request indicating a start location and a destination. The system can determine a set of candidate vehicles to service each transport request, and can further determine a non-trip risk value for servicing the transport request. The system may then select an optimal vehicle in the set of candidate vehicles based at least in part on the non-trip risk value. |
| US11080805B1 |
Computerized hazardous material response tool
A computer-based method and apparatus for identifying hazardous materials based on observable physical properties and signs and systems of exposure to the hazardous materials. The observable physical properties are obtained by preprocessing plain language data to obtain normalized descriptors and modifiers pertaining to a plurality of properties and signs and symptoms. The normalized descriptors and signs and symptoms are presented to a user in lists for comparison with a sample in the field. Tightly integrated with identifying the hazardous materials are obtaining response data, obtaining controlled materials of which the hazardous materials may be precursors, and predicting reactions of pairs of hazardous materials. The preferred embodiments of the invention are particularly useful to responders to a hazardous waste incident. |
| US11080804B1 |
Model for representing online ownership information
In a rights system, a plurality of asserted and reconciled assets are maintained. For example, asserted and reconciled assets can be maintained in a table structure of the rights system. Each asserted asset can associated an asset with an owner and additionally include descriptive data describing the asset. Asserted assets can be created by the rights system based on descriptive data provided to the rights system by owners of assets. In contrast, reconciled assets are generated by the right system by associating one or more asserted assets. The set of asserted assets can be modified, both through updates to the descriptive data of existing asserted assets, and through the generation of new asserted assets based on additional descriptive data. Based on the modifications to the asserted assets, the set of reconciled assets can be modified to reflect new or corrected information present in the set of asserted assets. |
| US11080803B2 |
Systems and methods of using geolocation verification
Systems and methods for displaying one or more submissions are described. One such exemplar method includes: (i) accepting, from a client device associated with a reviewer, a representation of the reviewer's presence at a represented location; (ii) receiving location coordinates of a location-enabled device when the reviewer represents being present at the represented location and the location-enabled device is proximate and/or in possession of the reviewer; (iii) deeming the reviewer as an authorized reviewer of the represented location if the location coordinates of the location-enabled device are within a predefined threshold area around the represented location when the reviewer represents being present at the represented location; and (v) causing to be displayed, on one or more of the client devices, one or more submissions relating to the represented location received from the authorized reviewer of the represented location. |
| US11080802B2 |
Systems, methods and apparatus for property defect management
Systems and methods are provided for defining, measuring and tracking aspects, such as pavement defects. Based on the survey data dimensional detail for the pavement defects is determined and treatment approaches selected. A bid package based on the treatment approach is generated. |
| US11080800B2 |
Thermostat having network connected branding features
A thermostat for a building space includes a communications interface, an electronic display, and a processing circuit. The communications interface is configured to receive service provider information via a network connection. The electronic display includes a user interface configured to display the service provider information. The processing circuit is configured to determine when to display the service provider information on the electronic display by monitoring thermostat events. |
| US11080799B2 |
Paying for parking with electrical power from an electric vehicle
A device communicates with a parking meter associated with a parking space to be used for parking by an electric vehicle, where the electric vehicle is associated with the device. The device receives vehicle power information, vehicle profile information, and vehicle location information, and determines parking payment options based on the vehicle power information, the vehicle profile information, and the vehicle location information. The device receives a selection of a particular parking payment option of the parking payment options, where the particular parking payment option includes an option to pay for parking by providing power to the parking meter from the electric vehicle. The device causes the electric vehicle to connect to the parking meter based on the particular parking payment option, and causes the electric vehicle to provide power to the parking meter based on the particular parking payment option. |
| US11080798B2 |
Methods and systems for managing crop harvesting activities
A computer-implemented method for managing crop harvesting activities is implemented by a harvest advisor computing device in communication with a memory. The method includes receiving an initial date of a crop within a field, receiving an initial moisture value associated with the crop and the initial date, and receiving a target harvest moisture value associated with the crop. The method also includes receiving field condition data associated with the field. The method further includes computing, by the harvest advisor, a target harvest date for the crop based at least in part on the initial date, the initial moisture value, the field condition data, and the target harvest moisture value, and displaying the target harvest date for the crop to the grower for harvest planning. The target harvest date indicates a date at which the crop will have a present moisture value approximately equal to the target harvest moisture value. |
| US11080792B1 |
Total cost of vehicle ownership
A total cost of ownership (TCO) of a vehicle may be calculated based on received information identifying a vehicle, and retrieved vehicle data corresponding to the vehicle, such as vehicle insurance records, maintenance records, and vehicle operation sensor data. Additional information may be received identifying one or more entities associated with the vehicle, for example, a potential buyer and a potential seller of the vehicle Data may be retrieved corresponding to the entities associated with the vehicle, and a TCO calculation for a vehicle may be based on the vehicle data and additional information retrieved corresponding to the entities associated with the vehicle. |
| US11080791B2 |
Segmentation and balancing system
According to some embodiments, data may be received indicative of a plurality of insurance claims along with an indication of an appropriate claim segment classification for each insurance claim. A first claim handler may then be automatically selected for a first insurance claim based at least in part on: (i) a first segment classification associated with the first insurance claim, (ii) numbers of other insurance claims currently assigned to claim handlers, and (iii) load factors associated with claim handlers. An indication of the selected first claim handler may then be transmitted. |
| US11080788B2 |
Method for machine-controlled legal portfolio monitoring
There is a method for machine-controlled legal portfolio monitoring. The method has the following steps: a) obtaining securities transactional data from multiple financial firms for a system; b) processing the securities transactional data to calculate losses in the system; c) permitting law firms to view the losses in the system without revealing the identity of the multiple financial firms; d) permitting the law firms to submit to the system security litigation proposals to financial firms that have incurred losses; and e) allowing financial firms that have incurred losses to respond to the security litigation proposals by engaging directly with a particular law firm through the system. There is also a system. There is also a storage medium. |
| US11080787B1 |
Systems and methods for providing currency exchange information via augmented reality
A method may include receiving image data representative of cash acquired via one or more image sensors, identifying a first currency depicted in the cash based on a plurality of images associated with a plurality of currencies, and determining a currency conversion rate between the first currency and a second currency. The method may also include generating a visualization representative of a currency value of the cash in the second currency based on the currency conversion rate and overlaying the visualization on the image data. |
| US11080786B2 |
Biddable financial instrument, online competitive bidding platform for trading thereof and associated system and method of trading thereof
The present invention relates to a new type of biddable financial instrument that can be traded on an online competitive bidding process and system and method of trading thereof specifically designed to accommodate the specific needs of these new biddable financial instruments associated primarily with the introduction in the instruments core of a contractual bidder or new properties like acceleration of term linked with trading on the competitive bidding software. The inventor contemplates the use of a large number of new biddable financial instruments, for example B-VRDOs, B-TOBs, and B-MLVRS s. The platform, system and method of trading associated thereto allows for easy portfolio management, Dutch trading, payment of interest, entry of good to cancel trade orders, priority management tools, acceleration of maturity, and offering on a secondary offering stage non-acquired positions held by the contractual bidder. |
| US11080783B2 |
Computer-implemented systems and methods for real-time risk-informed return item collection using an automated kiosk
Disclosed embodiments provide systems and methods related to collecting return items using an automated kiosk based on a real time risk decision. The automated kiosk captures return item information representing a return item and transmits the return item information and a request for return risk level relating to the return item to a server operable to execute a machine learning model trained on historical information to determine the risk level. The server determines the risk level based on the received return by using the machine learning model and transmits the determined risk level to the kiosk in real-time. Based on the determined risk level and a return amount associated with the return item, the server may also process a refund in real-time. |
| US11080779B1 |
Systems and methods of presenting a multi-media entertainment in a venue
According to one implementation, an interactive retail venue includes a computing platform interactively linked to a display screen, a lighting system, an audio system, a dynamic product display unit, and multiple product sensors. The computing platform includes a hardware processor and a memory storing a venue orchestration software code. The hardware processor executes the venue orchestration software code to receive sensor data from the product sensors, determine respective locations of retail products within the interactive retail venue based on the sensor data, and present a multi-media entertainment featuring the retail products using the display screen, the lighting system, and the audio system. The hardware processor further executes the venue orchestration software code to concurrently activate the dynamic product display unit if at least one of the retail products is situated within a predetermined distance of the dynamic product display unit. |
| US11080778B2 |
Enhanced on-demand service functionality implemented in casino gaming networks
Various aspects described or referenced herein are directed to different methods, systems, and computer program products for implementing On Demand Services in Casino gaming establishments utilizing a Communications Network. |
| US11080776B2 |
Methods, systems, and computer readable media for predicting ratings using graph filters
Methods, systems, and computer readable media for computing user rating predictions are disclosed. In some examples, a recommender is implemented on at least one processor and memory and programmed for receiving a request to select one or more recommended items for a user from unrated items that are unrated by the user to the recommender. The recommender is programmed for computing user rating predictions for each of the unrated items by applying a graph filter to user-item rating data. The user-item rating data includes other-user ratings of the unrated items by other users and a same-user ratings of other items by the user. The recommender is programmed for selecting the one or more recommended items from the unrated items using the user rating predictions for the unrated items and outputting the recommended items in response to the request. |
| US11080772B2 |
Systems and methods for providing recommendations to consumers based on goods in the possession of the consumers
A method includes comparing a consumer ingredient inventory to a plurality of recipes to determine a relevance percentage; separating the plurality of recipes into sets based on the relevance percentage; generating a respective campaign of a respective producer based on campaign parameters for a respective ingredient, which includes creating a plurality of slots based on a campaign quantity of the respective ingredient and determining a ranking bid for each of the plurality of slots based on the campaign parameters; and ranking each recipe within each of the sets based on a plurality of campaigns regarding each of the plurality of ingredients in each recipe, which includes determining a highest ranking bid from the plurality of campaigns for each ingredient in each recipe within each of the sets and aggregating the highest ranking bid for each ingredient in each recipe to determine a score for each recipe within each of the sets. |
| US11080769B2 |
System, method and computer program product for a cognitive monitor and assistant
A cognitive assisting method, system, and computer program product, includes building a first cognitive profile of a first user by determining content with identifiable attributes that may be incorporated into the cognitive profile and detecting a current activity of the first user and continually finding a match to a second cognitive profile of a second user in a repository of cognitive profiles belonging to others. |
| US11080762B1 |
Content item auction bidding
Methods, systems, and apparatus for content item auction bidding. In one aspect, a method includes receiving a request for a content item, the request including request feature values and a device identifier, the device identifier being included in a remarketing list; obtaining a predicted performance measure for a remarketing content item associated with the remarketing list based on a first timestamp and a second timestamp, the first timestamp being included in the remarketing list and associated with the device identifier included in the request, and the second timestamp being for the request; determining a bid adjustment value based on the first timestamp and the second timestamp; obtaining a remarketing bid for the remarketing content item, the remarketing bid specifying an amount a content item provider is willing to pay for distribution of the remarketing content item; and adjusting the remarketing bid based on the bid adjustment value. |