Document Document Title
US11064236B2 Systems and methods for using value-added services records to provide targeted marketing services
Systems and methods can include collecting addressability information about users accessing a service provider's IP-based network communication services, collecting information sufficient to identify when the user is accessing the service provider's IP-based network communication services, collecting data from value-added services usage by the user and using the collected data to associate the user with certain marketing content. The systems and methods can further include sending the marketing content to the user through various distribution channels by using the addressability information. The systems and methods can further include recording the collected information over time to refine the ability to predict the user's receptiveness to certain marketing content so as to improve the effectiveness of TMS.
US11064235B2 Systems and methods for encoding video content
Systems and methods for encoding a plurality of alternative streams of video content using multiple encoders in accordance with embodiments of the invention are disclosed. An encoding system includes multiple encoders. Each of the encoders receives a source stream of video content that is divided into portions. Each of the encoders generates portions of the plurality of alternative streams from the portions of the source stream. The portions of the alternative streams generated by a particular encoder are stored in a container for the particular encoder. Each encoder also generates index information for the portion of the alternative stream generated by the encoder that is stored in a manifest for the encoder.
US11064234B2 Targeting and demographics scheduling utilizing a framework for audience rating estimation
An advertisement management system receives a commercial break schedule generated from a completed assignment of one or more spots, which correspond to deals including advertiser orders to place the one or more spots into one or more commercial breaks in the commercial break schedule based on constraints and placement requirements. The system determines which of one or more orders in one or more deals are targeting orders, and determine a baseline target delivery for the targeting orders based on expected viewership associated with the targeting orders. The system places a portion of the one or more spots for the targeting orders based on a lift goal over the baseline target delivery, determines a liability per pending spot for spots determined to be candidates for advertisement scheduling and reshuffles placement of a remaining portion of the one or more spots based on the liability per pending spot for the candidates.
US11064231B2 Receiving device, transmitting device, and data processing method
A configuration is realized such that a playback application applied in a receiving device can be determined using a service category identifier recorded in an SLT that can be received in advance. The service category identifier capable of identifying an application applied to a provided service such as a program provided by a transmitting device is transmitted to the receiving device. The receiving device performs a continuation process on an application applied before service transition when the service transition occurs and when applications applied to services before and after the transition are same. The service category identifier is an identifier capable of identifying the service by determining whether to apply a residential playback application or a broadcast playback application for playback of the service.
US11064227B2 Systems and methods for live media content matching
Systems and methods for matching media content are disclosed, including: at a server, obtaining first media content from a client device, wherein the first media content item corresponds to a first portion of media content being played on the client device; obtaining second media content from a content source distinct from the server; comparing the first media content and the second media content; based on a determination that the second media content corresponds to a portion of the media content that is earlier than the first media content: obtaining third media content from the content source corresponding to a third portion of the media content subsequent to the second media content; comparing the first media content with the third media content; and based on a determination that the first and third media content are concurrent, identifying the first media content using identification information corresponding to the third media content.
US11064225B2 Method and system for remotely controlling consumer electronic devices
A media system replaces content in a first sequence of media content. The media system presents the first sequence of media content to an end-user and generates a fingerprint of the sequence of media content. The fingerprint is for comparison with a plurality of reference fingerprints so as to identify the first sequence of media content and determine a reference position within the first sequence of media content. The media system sends a request for a replacement sequence of content to a content replacement system, and receives replacement media content selected based on the identified first sequence of media content. The media system presents the replacement media content to the end-user instead of the first sequence of media content. Presenting the replacement media content begins at a position in the first sequence of media content that is determined based on the reference position.
US11064221B2 Multi-camera live-streaming method and devices
The embodiments discloses at least two mobile devices of at least two users, each having a mobile application operating a video camera, wherein each video camera captures at least two different viewpoints of video footage of a same live event, wherein the mobile applications on each mobile device is configured to coordinate the viewpoints of the video footage and present multi-camera viewpoints and live-streaming video footage of the live event to remote users and an ad server configured to target advertisements to the remote users during the live-streaming of the live event.
US11064210B2 Pre-processing of HDR video involving chroma adjustment
A processing for a first pixel in a picture comprises obtaining a lower limit of a first color component of the first pixel in a first color space based on a distance between a color of the first pixel and a first distorted version of the color in a second color space. An upper limit of the first color component in the first color 5 space is obtained based on a distance between the color and a second distorted version of the color in the second color space. A filtered value is obtained of the first color component and which is equal to or larger than the lower limit and equal to or lower than the upper limit. The processing results in filtered values that are cheaper to encode but that are visibly undistinguishable from the original colors of the pixels.
US11064206B2 Inter prediction with refinement in video processing
Devices, systems and methods for digital video coding, which includes inter prediction with refinement, are described. An exemplary method of video processing includes determining to use, for a conversion between a current block of a video and a bitstream representation of the video, a first linear optimization model for the conversion using a first coding mode, the first linear optimization model being derived from a second linear optimization model that is used for the conversion using a second coding mode, and performing, based on the determining, the conversion. Another exemplary method of video processing includes determining to use, for a conversion between a current block of a video and a bitstream representation of the video, a gradient value computation algorithm for a bi-directional optical flow tool, and performing, based on the determining, the conversion.
US11064205B2 Image decoding method and device according to intra prediction in image coding system
An intra prediction method performed by a decoding device, according to the present disclosure, comprises the steps of: deriving an intra prediction mode for a current block; deriving neighboring samples of the current block; deriving reference samples for a target sample of the current block among the neighboring samples on the basis of the intra prediction mode; deriving weighted values of the reference samples for the target sample; and deriving a prediction sample of the target sample on the basis of the reference samples and the weighted values.
US11064204B2 Automatic video comparison of the output of a video decoder
The automatic video comparison system for measuring the quality of decoded data described herein provides a method for measuring the quality of decoded data at the level of sub-units of a unit of data, for instance at the level of sub-blocks of a video frame. The system can therefore locate defects that may not otherwise be detected by an automated system that measures quality at the level of the entire frame. Processing encoded media is computationally intensive, thus the automatic video comparison system uses a distributed computing system in order to distribute the computations across many compute resources that are capable of operating in parallel.
US11064195B2 Merging filters for multiple classes of blocks for video coding
In one example, a device includes a memory configured to store video data, and one or more processing units implemented in circuitry configured to construct a plurality of filters for classes of blocks of a current picture of the video data, wherein to construct the plurality of filters, the one or more processing units are configured to generate a plurality of sets of filter coefficients, and for a subset of the plurality of filters, determine respective indexes that identify one of the sets of filter coefficients for the corresponding filter of the subset; decode a current block of the current picture, determine a class for the current block, select a filter of the plurality of filters that corresponds to the class for the current block, and filter at least one pixel of the current block using the selected filter.
US11064194B2 Encoding digital videos using controllers of data storage devices
In some embodiments, an apparatus includes a memory configured to store data and a controller coupled to the memory. The controller is configured to receive, from a computing device coupled to the apparatus, one or more frames of a digital video. The controller is also configured to analyze one or more components of the memory. The controller is further configured to determine a set of states for the one or more components of the memory based on the analysis of the one or more components of the memory. The controller is further configured to determine a first encoding rate for the digital video from a plurality of encoding rates based on the set of states for the one or more components of the memory. The controller is further configured to encode the digital video based on the first encoding rate and to store the encoded digital video in the memory.
US11064193B2 Methods and devices for encoding and decoding a data stream representative of an image sequence
A method for decoding a data stream representative of an image sequence. At least one current block of a current image in the image sequence is encoded using a predictor block of a reference image, the predictor block being identified in the reference image via location information. An information item enabling the reference image to be identified from a set of reference images is obtained. When the reference image satisfies a predetermined criterion, the location information of the predictor block is decoded using a first decoding mode, otherwise the location information of the predictor block is decoded using a second decoding mode, the first and second decoding modes including at least a different decoding parameter. The current block is then reconstructed from the predictor block.
US11064189B2 Naked-eye three-dimensional display method, naked-eye three-dimensional display device and terminal equipment
A naked-eye three-dimensional display method constructed on two half-screens, a naked-eye three-dimensional display device, and a terminal equipment are provided in embodiments of the disclosure, the two half-screens being configured to display respectively images corresponding to a left eye and a right eye of an observer respectively, the method comprising: detecting in a real-time manner distances between both ends of each row of pixels on each of the half-screens and a corresponding eye of the observer through which said each of the half-screens is viewed; calculating light-exiting angles formed from displayed pixels on said each of the half-screens to the corresponding eye through which said each of the half-screens is viewed, as a function of a length of each of the half-screens and the distances between both ends of each row of pixels on each of the half-screens and the corresponding eye through which said each of the half-screens is viewed; and controlling light rays outputted from the displayed pixels to the corresponding eye through which said each of the half-screens is viewed, with a collimated light adjusting device, according to the light-exiting angles formed from the displayed pixels on said each of the half-screens to the corresponding eye through which said each of the half-screens is viewed, so as to focus displayed contents on said each of the half-screens onto the corresponding eye through which said each of the half-screens is viewed.
US11064185B2 Systems, methods and devices for generating depth image
The present disclosure discloses a system, a method and a device for generating depth image. The system includes an illumination source, an optical system, a control device, and at least one set of a dynamic aperture and an image sensor, wherein the dynamic aperture is configured to dynamically change a light transmittance, an exposure start time, and an exposure end time under a control of the control device. The control device is configured to acquire a first photo and a second photo, and generate a depth image of the target scene according to the first photo, the first shooting configuration information, the second photo, and the second shooting configuration information.
US11064182B2 Imaging apparatus
An imaging apparatus includes a large imaging section, a plurality of small imaging sections, and an image processing section. The plurality of small imaging sections are smaller in optical size than the large imaging section. The large imaging section captures an image of a subject outside the imaging apparatus. The plurality of small imaging sections are provided at positions around the large imaging section to capture images of the subject. The image processing section generates data to be output on the basis of the image captured by the large imaging section and the images captured by the plurality of small imaging sections.
US11064180B2 Convolutional neural network based synthesized view quality enhancement for video coding
Systems and methods which provide Convolutional Neural Network (CNN) based synthesized view quality enhancement for video coding are described. Embodiments may comprise an encoder configured for CNN based synthesized view quality enhancement configured to provide improved coding efficiency while maintaining synthesized view quality. Additionally or alternatively, embodiments may comprise a virtual viewpoint generator configured for CNN based synthesized view quality enhancement configured provide post-processing of the synthesized view at the decoder side to reduce the artifacts. CNN based synthesized view quality enhancement may, for example, be provided for 3D video coding to improve its coding efficiency, which can be utilized in 3D scenarios, such as 3DTV.
US11064177B2 Image processing apparatus, imaging apparatus, mobile device control system, image processing method, and recording medium
An image processing apparatus includes a first generator configured to generate a first distance image corresponding to a first distance from an imager, by using an image captured by the imager; a second generator configured to generate a second distance image corresponding to a second distance that is further away from the imager than the first distance, by using an image captured by the imager; a reducer configured to reduce the first distance image; a first detector configured to detect a body positioned within the first distance, based on the first distance image reduced by the reducer; and a second detector configured to detect a body positioned within the second distance, based on the second distance image.
US11064176B2 Information processing apparatus, information processing method, and program for display control to arrange virtual display based on user viewpoint
An information processing apparatus, an information processing method, and a program are provided. The information processing apparatus includes a display control unit that controls display of a display unit such that a stereoscopic image is displayed on a virtual display surface arranged in a space, in which the display control unit controls an arrangement of the virtual display surface in the space on the basis of a position of a viewpoint of a user.
US11064165B2 Wireless trailer camera system with tracking feature
A trailering assist system includes a receiving device disposed at an equipped vehicle and a trailer camera at a rear of a trailer. When the vehicle is towing the trailer, the trailer camera captures image data and a transmitter at the trailer wirelessly communicates captured image data to the receiving device at the equipped vehicle. The receiving device at the equipped vehicle receives the communicated image data and a display device in the equipped vehicle displays video images derived from the received image data. When another vehicle is towing the trailer, a controller at the trailer determines that the other vehicle is towing the trailer and the transmitter attempts to wirelessly communicate with another receiving device. Responsive to establishing wireless communication with the other receiving device, the transmitter transmits trailer identification information to the other receiving device.
US11064163B2 Networked monitor remote
An integrated security system operating over a network includes networked video sources, networked monitor appliances and networked monitor appliance controllers. Video streams are processed by the networked monitor appliances for display on a monitor. The configuration of networked video sources, networked monitor appliances and networked monitor appliance controllers can be controlled by an application on a smart device acting as a remote. A remote control application is provided for use on smart devices to remotely control the configuration of a networked monitor appliance and verify configuration changes.
US11064162B2 Intelligent video analysis system and method
An intelligent video analysis method and system logically selects only surveillance cameras associated with an event and assigns different ranks to the selected surveillance cameras according to the importance thereof. Thereafter, more video analysis resources are assigned to a surveillance camera of high importance, thereby rapidly and efficiently performing video analysis.
US11064158B2 Home monitoring method and apparatus
Provided is a home monitoring method and apparatus. A home gateway executes receiving, from a mobile terminal, a request message for requesting home monitoring, providing, to the mobile terminal in response to the request message, monitoring information associated with a camera module included in at least one home device registered in advance and/or a position to be monitored, receiving, from the mobile terminal, selection information indicating a first camera module selected based on the monitoring information, transmitting, to the mobile terminal, image data captured and collected by the first camera module in response to the reception of the selection information, receiving, from the mobile terminal, a control command with respect to the first camera module, and transmitting the control command to a first home device including the first camera module.
US11064156B2 Camera control method, camera, and surveillance system
A method of controlling a plurality of cameras in a communication network is provided. The method includes: controlling a camera to receive and analyze information about an idle time of each of at least one other camera; according to the analyzing, controlling the camera to transmit at least one task and/or information about the at least one task to the at least one other camera, wherein the idle time of each of the at least one other camera is set to a time remaining before each of the at least one other camera is configured to execute a task among one or more tasks or a sum of time durations at which no tasks are allocated to each of the at least one other camera.
US11064154B2 Device pose detection and pose-related image capture and processing for light field based telepresence communications
Techniques in connection with a first telepresence device including a display device and cameras arranged to capture images through the display device are disclosed, involving determining a pose of the device, determining a capture point of view for a second telepresence device based on at least the detected pose, obtaining first image data based on images captured by the cameras during a first camera capture period, selecting second image data from the first image data based on the determined capture point of view, and transmitting the selected second image data from the first telepresence device to the second telepresence device.
US11064150B2 High resolution user interface
An approach for providing a user interface having a resolution corresponding to a resolution of a high resolution content is provided. The approach allocates at least one partial frame buffer based on a size and a location of a region on a screen of a display on which a user interface (UI) is displayed. The approach displays the UI based on at least one piece of partial graphic data obtained from the allocated at least one partial frame buffer.
US11064148B2 Image sensor module and image sensor device including the same
Disclosed is an image sensor module which includes a pixel array including a plurality of sub-pixels arranged along a plurality of rows and a plurality of columns, an analog to digital converter connected to the pixel array through a plurality of data lines and converting signals output from the plurality of sub-pixels into digital signals, a row decoder connected to the pixel array through a plurality of selection lines, a plurality of transfer lines, and a plurality of reset lines, and a control logic circuit controlling the analog to digital converter and the row decoder to allow a plurality of sub-frames to be sequentially outputted from the plurality of sub-pixels, wherein each of the plurality of sub-frames is generated based on signals output from different sub-pixels among the plurality of sub-pixels.
US11064142B1 Imaging system with a digital conversion circuit for generating a digital correlated signal sample and related imaging method
An example imaging system includes a digital conversion circuit and a plurality of pixel circuits each having a photodiode, a biasing circuit, a charge-to-voltage converter, and a switch. The photodiode is configured to generate charges in response to light or radiation. The biasing circuit includes an operational amplifier having an input signal port for receiving a bias reference signal which controls a bias current flowing through an internal circuit of the operational amplifier. The charge-to-voltage converter is configured to accumulate the charges drained by the biasing circuit and convert the accumulated charges into a corresponding output voltage. The switch configured to selectively couple the charge-to-voltage converter to at least one data line. The digital conversion circuit is configured to generate a digital correlated signal sample for each pixel circuit using a difference between a digital signal sample and a digital reset level sample.
US11064141B2 Imaging systems and methods for reducing dark signal non-uniformity across pixels
An image sensor may include an array of image pixels. Control circuitry coupled to the array of pixels may be configured to operate the image pixels in an overflow mode of operation, in which each pixel generates an overflow image signal and a complete image signal from a single exposure time period. The overflow image signals and the complete image signals from the pixels may be used to generate a high dynamic range image. While the floating diffusion region in each pixel is not in use, control circuitry may control that pixel to generate a reference signal at the floating diffusion region indicative of pixel-specific dark signal noise. Processing circuitry may mitigate for dark signal non-uniformity across the pixels by correcting the complete image signals using the reference signal to remove dark signal noise in the complete image signals.
US11064140B2 Solid-state image pickup device having buffers connected to gates of transistors with first gate insulating film thicker than second gate insulating film
Dark current from a transfer transistor is suppressed and power-supply voltage in a second semiconductor substrate is lowered. A solid-state image pickup device includes a pixel array, a plurality of common output lines receiving signals read out from a plurality of pixels, a transfer scanning unit sequentially driving the plurality of transfer transistors, a signal processing unit processing the signals output to the common signal lines, and a level shift unit making amplitude of a pulse supplied to a gate of the transfer transistor larger than amplitude of a pulse supplied to a gate of a transistor constituting the signal processing unit. The pixel array and the level shift unit are arranged on a first semiconductor substrate, whereas the plurality of common output lines and the signal processing unit are arranged on a second semiconductor substrate.
US11064138B2 High-dynamic image sensor
An image sensor includes a pixel structure which pair-wise vertically shares at least one read node, and further comprises a memory node for storing charges. A vertical transfer control line commands charge transfer from the photodiode to the memory node of a given column. The vertical transfer control rows apply two different exposure times, a first to the even columns and a second to the odd columns. The pixels and the read circuit perform one read operation per vertical pair of pixels over the exposure time associated with the column of the pair. A processing block is configured to calculate, for each vertical pair of pixels, an interpolated digital value. A periodic pattern of colored filters creates an HDR-mode color image sensor.
US11064137B2 Dual-view image device for monitoring heat source and image processing method thereof
A dual-view image device for monitoring a heat source includes a first thermal image sensor, a second thermal image sensor, a driver and a processor. The first thermal image sensor captures a first thermal image having a heat source within a first view angle. The second thermal image sensor captures a second thermal image having a heat source within a second view angle smaller than the first view angle. The pixels occupied by the heat source in the first thermal image are fewer than that occupied by the heat source in the second thermal image. The driver drives the first and the second thermal image sensor to track and position the heat source within the first and the second view angle. The processor combines the first and the second thermal image into a dual-view image and outputs the dual-view image having the heat source.
US11064136B2 System and method for creating and manipulating synthetic environments
Disclosed herein are systems, computer-implemented methods, and tangible computer-readable media for synthesizing a virtual window. The method includes receiving an environment feed, selecting video elements of the environment feed, displaying the selected video elements on a virtual window in a window casing, selecting non-video elements of the environment feed, and outputting the selected non-video elements coordinated with the displayed video elements. Environment feeds can include synthetic and natural elements. The method can further toggle the virtual window between displaying the selected elements and being transparent. The method can track user motion and adapt the displayed selected elements on the virtual window based on the tracked user motion. The method can further detect a user in close proximity to the virtual window, receive an interaction from the detected user, and adapt the displayed selected elements on the virtual window based on the received interaction.
US11064134B2 High-dynamic range image sensor and image-capture method
An image sensor includes a pixel array, and a first, second, and an intermediate memory-element. The memory-elements store, respectively, a first, second, and an intermediate exposure value. The pixel array includes pixel-subarrays each including a rescue pixel and a first, second, and third plurality of contiguous pixels. Each of the first plurality of pixels is connected to the first memory-element and spans diagonally-opposite corners of the pixel-subarray. Each of the second plurality of pixels is connected to the second memory-element and located on a first side of the first plurality of pixels. Each of the third plurality of pixels is connected to the second memory-element and located on a second side of the first plurality of pixels. The rescue-pixel is connected to the intermediate memory-element and is (i) located on one of the first side and the second side and/or (ii) adjacent to one of the first plurality of pixels.
US11064133B2 Apparatus and method for high dynamic range (HDR) image creation of dynamic scenes using graph cut-based labeling
A method includes obtaining multiple image frames of a scene using at least one sensor of an electronic device. The multiple image frames include a first image frame and a second image frame having a longer exposure than the first image frame. The method also includes generating a label map that identifies pixels in the multiple image frames that are to be used in an image. The method further includes generating the image of the scene using the pixels extracted from the image frames based on the label map. The label map may include multiple labels, and each label may be associated with at least one corresponding pixel and may include a discrete value that identifies one of the multiple image frames from which the at least one corresponding pixel is extracted.
US11064130B2 Method and device for controlling front camera, mobile terminal and storage medium
A method for controlling the front camera includes: an operation instruction for the front camera is received from an application; a trigger message is sent to a pop-up motor service to trigger the pop-up motor service to control a pop-up or retraction of the front camera; and the front camera is controlled based on the operation instruction to perform a corresponding operation.
US11064120B2 Imaging-element inclination adjustment mechanism, method for adjusting inclination of imaging element, and imaging apparatus
An imaging-element inclination adjustment mechanism including at least one adjustment member attached to an imaging-element unit in a manner that a position of the adjustment member is adjustable relative to the imaging-element unit, the imaging-element unit holding an imaging element; at least one support member secured to a housing; and at least one securing member engaged with the adjustment member and attached to the support member. The position of the adjustment member is adjusted relative to the imaging-element unit to adjust a position of the imaging-element unit relative to the support member. The support member supports the imaging-element unit via the adjustment member at each of at least three positions.
US11064118B1 Systems and methods for dynamic stabilization adjustment
An image capture device may capture visual content during a capture duration. The context of capture of the visual content by the image capture device may be assessed and used to determine values of stabilization parameters for the visual content.
US11064112B2 Image display method and device, and electronic device
An end-user device displays an image at a first size. The end-user device obtains a distance between the end-user device and an object. The end-user device includes a predetermined mapping relationship between distance and size. The end-user device determines a second size based on the distance and the predetermined mapping relationship. The end-user device displays the image at the second size.
US11064107B2 Objects trail-based analysis and control of video
Systems and methods for analyzing scenes from cameras imaging an event, such as a sporting event broadcast, are provided. Systems and methods include detecting and tracking patterns and trails. This may be performed with intra-frame processing and without knowledge of camera parameters. A system for analyzing a scene may include an object characterizer, a foreground detector, an object tracker, a trail updater, and a video annotator. Systems and methods may provide information regarding centers and spans of activity based on object locations and trails, which may be used to control camera field of views such as a camera pose and zoom level. A magnification may be determined for images in a video sequence based on the size of an object in the images. Measurements may be determined from object trails in a video sequence based on an effective magnification of images in the video sequence.
US11064105B2 Accessory and imaging apparatus
In a lens apparatus, a CS terminal is disposed adjacent to a DGND terminal, and a DCA terminal is disposed on the other side of the CS terminal from the DGND terminal. The terminals on the accessory correspond to terminals on an imaging apparatus where a CS terminal is disposed adjacent to a DGND terminal, and a DCA terminal is disposed on the other side of the CS terminal from the DGND terminal.
US11064101B2 Speaker-dependent voice-activated camera system
A voice-activated camera system for a computing device. The voice-activated camera system includes a processor, a camera module, a speech recognition module and a microphone for accepting user voice input. The voice-activated camera system includes authorized for only a specific user's voice, so that a camera function may be performed when the authorized user speaks the keyword, but the camera function is not performed when an unauthorized user speaks the keyword.
US11064100B2 Stereo camera and imaging system
A stereo camera, including an imaging sensor, and an optical apparatus comprising first and second apertures separated by an interocular distance and configured to focus first and second images on the imaging sensor in a side by side arrangement. An imaging system including the stereo camera, and at least one image processor, configured to receive first and second frames of image data from a stereo camera, and construct volumetric image data based on binocular disparity between the first and second frames.
US11064099B2 Imager and imaging device
An imager includes: an imaging element chip; a fixing member to which the imaging element chip is adhered, and which is electrically connected to the imaging element chip; a circuit board that is fixed to the fixing member via a plurality of conductive members; and a stress relaxing member that is fixed to a second surface of the circuit board opposite to a first surface of the circuit board, the first surface being a surface of the circuit board to a side of which the fixing member is fixed, a linear expansion coefficient of the fixing member, a linear expansion coefficient of the circuit board, and a linear expansion coefficient of the stress relaxing member are as defined herein, and the stress relaxing member overlaps an entire adhesion portion between the imaging element chip and the fixing member as defined herein.
US11064096B2 Filtering and smoothing sources in camera tracking
Video processing, including: generating first tracking information using a first tracking system coupled to a camera which moves during a video sequence forming a shot including multiple frames, wherein the first tracking information includes information about six degrees of freedom motion of the camera synchronized to the multiple frames in the shot; generating second tracking information using a second tracking system coupled to the camera which moves during the video sequence, wherein the second tracking information includes information about six degrees of freedom motion of the camera synchronized to the multiple frames in the shot; generating, by a tracking tool, a timeline with a first track for the first tracking information and a second track for the second tracking information, wherein the tracking tool is coupled to the first tracking system and the second tracking system, and receives the first tracking information and the second tracking information.
US11064095B2 Image displaying system, communication system, and method for image displaying
An image display system includes a display and a processor. The processor is configured to: synchronize a first relative position of a first area in an area of a first panorama image and a second relative position of a second area in an area of a second panorama image, and display at least the first area in the first panorama image and at least the second area in the second panorama image on the display. The processor is further configured to change the first area displayed which is displayed in response to change the second area.
US11064086B1 Configuring a sealed enclosure for a laser printhead
A label modification system is disclosed herein. The label modification system may determine a physical configuration of a rewriteable label. The label modification system may select a laser containment structure that is associated with the physical configuration. The laser containment structure may be one of a plurality of laser containment structures that are accessible to a placement device. The label modification system may cause the placement device to position the laser containment structure in association with the rewriteable label to form a sealed enclosure that includes a laser printhead. The label modification system may perform, based on a seal status associated with the laser containment structure and the rewriteable label, an action associated with the rewriteable label.
US11064085B2 Job management and control for an image forming apparatus
An image, processing apparatus includes a reading unit configured to read an original, a transmission unit configured to transmit image data to an external apparatus, a printing unit configured to print an image, a display unit configured to display the image, and a control unit configured to suspend a job executed by the printing unit in response to a selection of a key for suspending a currently executed job display a list of jobs on the display unit, and cancel a job selected by a user from the displayed list of the jobs. The control unit displays a list of transmission jobs for the transmission unit to transmit the image data generated when the reading unit reads the original in response to the selection of the key during display of a main menu screen for accepting a selection of a function to be used.
US11064084B2 Image forming apparatus capable of reducing time of shift to low-power consumption operation mode, method of controlling same, and storage medium
An image forming apparatus capable of reducing execution time of a process for shifting the image forming apparatus from a normal operation mode to a low-power consumption operation mode. A sub interrupt controller 113 is connected to units and performs notification to a sub CPU in accordance with occurrence of a return trigger in any of the units. When shifting from the normal operation mode to the low-power consumption operation mode, a main CPU transmits mode instruction information indicative of the low-power consumption operation mode to the sub CPU. The sub CPU stores one or a plurality of units associated with the low-power consumption operation mode in advance, and sets one or a plurality of units in the sub interrupt controller, based on the mode instruction information and the plurality of units stored in association with the low-power consumption operation mode.
US11064083B2 Document reading apparatus
A document reading apparatus including: a detector configured to detect presence of a document on a document tray; a conveyance unit configured to convey the document; a reading unit configured to read the document conveyed by the conveyance unit at a first position; and a reference member. When the detector detects the presence of a document, the reading unit reads the reference member to determine a shading correction value while being moved from a second position to a third position located between the first position and the second position. When the shading correction value is to be determined again in a period from when the shading correction value is determined until when a receiver receives an instruction to start reading, the reading unit reads the reference member while being moved from the second position toward the first position after having been moved from the third position to the second position.
US11064074B2 Enhanced digital messaging
Embodiments of the disclosure provide a method of processing messages received in an asynchronous communication system. In some embodiments, the method includes receiving a message from a customer communication device, determining that a conversation is already established in association with the customer communication device, including the message among a plurality of messages that are already assigned to the conversation, analyzing the message to determine a topic classification and a topic confidence score for the message, and based on the analysis of the message, determining whether the topic classification determined for the message corresponds to a continuation of a topic classification for the plurality of messages or whether the topic classification determined for the message corresponds to a different topic classification than the topic classification for the plurality of messages.
US11064073B2 Unified support framework for a contact center
A system and method provide an integrated automation solution that links multiple systems and applications of a contact center operation and provides a unified support interface and unified knowledge base that delivers relevant data in real-time to assist contact center personnel during a customer interaction. Robotic Process Automation (RPA) is used for automating workflows and processes with robots (e.g., attended and/or unattended) that perform various tasks and activities for capturing information (data, documents, etc.) from multiple front-end and/or back-end systems and applications to provide the necessary data and information in real-time during a contact center session.
US11064070B2 Communication device and methods for use by hearing impaired
A method for maintaining contact information in a hearing impaired assisted user's communication device includes the steps of (a) providing a web site for altering assisted user contact information, (b) linking a proxy device to the web site, (c) receiving an identifier associated with the assisted user's device via the proxy device, (d) identifying an assisted user's device via the received identifier, (e) enabling the proxy device to be used to modify contact information for the assisted user associated with the received identifier, (f) starting a timer to time out a sync timeout period, (g) during the sync timeout period, receiving an indication via the assisted user's device confirming a desire to update the assisted user's contact information, (h) updating the assisted user's contact information, and (i) at the end of the timeout period, ceasing an indication that updated data is ready to be used from the assisted user's device.
US11064069B2 Communication apparatus, communication data recording system, communication method, and program
The present invention provides an IP telephone and the like capable of preventing a loss of the beginning part of a talk. A communication apparatus according to the present invention includes: a memory (110) configured to store communication data with a communication destination; and a control unit (120) configured to transmit and receive the communication data to and from the communication destination in each first duration and store the transmitted and received communication data in the memory (110), then output, after a communication session with an external recording apparatus that records the communication data is established, the communication data stored in the memory (110) to the external recording apparatus in each second duration that is shorter than the first duration.
US11064067B2 Gesture detection based on device form factor
In aspects of gesture detection based on device form factor, a device includes gesture detection algorithms from which gestures are detectable based on device configurations. The device implements a gesture module to determine a form factor of the device as one of the device configurations, and select a gesture detection algorithm that corresponds to the form factor. The gesture module then utilizes the selected gesture detection algorithm to detect a gesture performed by a user holding the device in the device form factor. Additionally, the gesture module can determine a change in the device form factor. The gesture module can then replace the gesture detection algorithm with a different gesture detection algorithm, or replace parameter values in the gesture detection algorithm with respective updated parameter values, which are then usable to detect another instance of the gesture performed by the user holding the device in the changed form factor.
US11064066B2 Communication apparatus
A communication apparatus may perform: receiving a specific signal from a first external apparatus via a second interface; changing a state of a first interface from a first state to a second state, in a case where the specific signal including predetermined information is received via the second interface while the state of the first interface is the first state; maintaining the state of the first interface in the first state, in a case where the specific signal not including the predetermined information is received while the state of the first interface is the first state; and performing a communication of target data with the first external apparatus via the first interface being in the second state, after the state of the first interface has been changed to the second state.
US11064062B2 Mobile terminal
A novel mobile terminal is provided. The mobile terminal includes a display screen element, a battery element, and a machine chip element separately disposed. Because the main functional components in the mobile terminal, such as the display screen element, the battery element, and the machine chip, are arranged separately, a shape of the display screen is no longer restricted by the shape of the functional components, such as the battery and the chip, and can be set to any shapes. Thus, a flexible screen can be bent arbitrarily, and the problems that the flexible display screen disposed in the conventional mobile terminal is subject to the shape of functional components and cannot be bent arbitrarily are solved.
US11064059B2 Data transmission method and communication device
The present application discloses a method and a communication device for transmitting data, and the method includes: determining a type of a packet data convergence protocol service data unit PDCP SDU; determining a duration of a discard timer according to the type of the PDCP SDU; and processing the PDCP SDU or a data unit generated based on the PDCP SDU according to the discard timer.
US11064053B2 Method, apparatus and system for processing data
Embodiments of the present disclosure relate to a method and an apparatus for processing data. The method can include: determining, in response to receiving an access request, a time interval between the access request and a last access request as a first time interval; acquiring a preset complete binary tree from a management server end, a value of a non-leaf node of the complete binary tree being related to a time interval of latest two access requests received by a metadata server, a leaf node being used to represent a virtual node in a distributed system, and the virtual node corresponding to the metadata server; selecting a target path from the complete binary tree according to the first time interval; and sending the access request and the target path to a metadata server corresponding to a leaf node of the target path.
US11064051B2 System and method for leader election in distributed storage systems
Systems and methods for leader election. A disclosed method includes sending, by a first compute node of a plurality of compute nodes, a plurality of remote procedure calls (RPCs) to a plurality of storage boxes according to an order, wherein each of the plurality of RPCs causes a leader election algorithm to execute in one of the plurality of storage boxes; and updating a state of the first compute node to “leader” when a result of executing the leader election algorithm for each of the plurality of RPCs indicates that the first compute node is elected as a leader node.
US11064050B2 Crowd and cloud enabled virtual reality distributed location network
A virtual reality network provides access to a number of virtual reality representations, each virtual reality representation representing a location in a virtual universe and defined by VR data stored on the network. The VR data can be in a simplified data format. A database stores the network address and the location in the universe of each virtual reality representation. A database server provides access to the database. The database server generates a list of locations in response to a location query from a visitor, and provides the network address of the virtual reality representation of a selected location. A visitor connects to the database server with a client host to visit the locations in the virtual universe.
US11064048B2 Method, device and system for information interaction in application service
This application discloses a method, a computing device, and a system for exchanging information in an application service. This application can support a user in performing a first operation on a map object in a service scenario, and displaying a corresponding signal list based on the first operation. Several pieces of prompt information are preset in the signal list. The user may select target prompt information from the signal list. A target client obtains an identifier corresponding to the target prompt information, and generates a first synchronization instruction corresponding to the target prompt information, to instruct each client needing to perform exchange to display the target prompt information on the map object. In addition, the target prompt information is a signal agreed between the clients through communication in advance.
US11064047B1 Accessibility of instant application data via associated application
Techniques described are directed to accessibility of instant application data via an associated application. In an example, a service provider can cause a first user interface associated with an instant application associated with a particular, discrete functionality of an application to be presented via a first user computing device of a user. The service provider can receive data via an interaction with the first user interface associated with the instant application. The service provider can receive a request to download the application from a second user computing device of the user, cause the application to be downloaded on the second user computing device of the user, and cause the data received via the interaction with the first user interface associated with the instant application to be associated with the application on the second user computing device.
US11064044B2 Intent-based scheduling via digital personal assistant
Techniques are described herein that are capable of performing intent-based scheduling via a digital personal assistant. For instance, an intent of user(s) to perform an action (a.k.a. activity) may be used to schedule time (e.g., on a calendar of at least one of the user(s)) in which the action is to be performed. Examples of performing an action include but are not limited to having a meeting, working on a project, participating in a social event, exercising, and reading.
US11064043B2 System and method for providing an adjunct device in a content distribution network
A cache server receives content and an instruction indicating an event associated with the content that causes a processor to invoke a call out to an adjunct device. The instruction further indicates an operation that the adjunct device is to perform. The cache server detects the event associated with the content, halts a flow of the content in response to detecting the event associated with the content, passes via the call out the content to the adjunct device to perform the operation, receives from the adjunct device a response and resulting data from the operation, and performs an additional operation on the resulting data based on the response from the adjunct device.
US11064041B2 Apparatus for providing cloud service using cloud service brokerage based on multiple clouds and method thereof
An apparatus and method provide a cloud brokerage service based on multiple cloud-computing systems. The method includes receiving, by a cloud service broker, a request for a cloud service from a cloud service client, the cloud service broker being connected with the multiple cloud-computing systems, providing, by the cloud service broker, a cloud service brokerage based on cloud services of the multiple cloud-computing systems, the cloud service brokerage enabling the cloud service complying with the request to be provided to the cloud service client, transmitting, by the cloud service broker, a control request for the cloud service to one or more cloud-computing systems of the multiple cloud-computing systems, and controlling, by the cloud service broker, a status of the cloud service after the cloud service broker receives an acknowledgment for the control request from the one or more cloud-computing systems.
US11064037B2 Specifying element locations within a swarm
Disposing individual elements within a swarm by receiving location data for swarm elements, receiving network traffic data for the swarm elements, determining new location data for a swarm element according to the location data and network traffic data of the swarm element, and sending the new location data to the swarm element.
US11064036B2 System for discovering services
A system for discovering services includes a storage device and a processor. The storage device is configured to store a catalog of software installed packages. A processor is configured to scan a file system to identify configuration files associated with one or more packages found in the catalog of software installed packages; identify a subset of configuration files associated with executing processes by finding references to a configuration file in active processor memory and placing the configuration file in the subset of configuration files; and verify that a network port associated with an executing process corresponds to a designated network port as indicated in the configuration file associated with the executing process.
US11064028B2 Method and apparatus for deduplication of sensor data
A method and apparatus for deduplication of sensor data is described. In one embodiment, a method includes receiving a plurality of sensor packets P at a network gateway apparatus. Each packet Pi has a corresponding timestamp Ti. The method includes storing a subset of the plurality of received packets P′ for a first period of time T1. The method also includes comparing each of the stored packets P′i to other stored packets P′j to determine an equivalence. In response to determining the equivalence of the stored packet P′i with P′j, the method includes forwarding only one of packet P′i or P′j to a destination.
US11064027B2 Method and system for dynamic license plate numbers
A method for dynamic license plate renumbering includes: identifying, by a processing device of a processing server, a new plate number for a dynamic license plate; storing, by the processing server, the identified new plate number in a data entry with a vehicle identifier associated with the dynamic license plate; transmitting, by a transmitter of the processing server, the identified new plate number to the dynamic license plate; and displaying, on a display device of the dynamic license plate, the new plate number.
US11064025B2 File replication using file content location identifiers
Systems and methods for file replication using file content location identifiers. An example method comprises: receiving, by a processing device, an index node number identifying a first index node associated with a file residing on a first file server, the first index node referencing a physical location of contents of the file; identifying a replica of the file residing on a second file server; assigning the index node number of the first index node to a second index node referencing a physical location of contents of the replica of the file on the second file server; performing, by the processing device, a file system operation by accessing the replica of the file referenced by the index node number.
US11064019B2 Dynamic configuration of inter-chip and on-chip networks in cloud computing system
A server includes a plurality of nodes that are connected by a network that includes an on-chip network or an inter-chip network that connects the nodes. The server also includes a controller to configure the network based on relative priorities of workloads that are executing on the nodes. Configuring the network can include allocating buffers to virtual channels supported by the network based on the relative priorities of the workloads associated with the virtual channels, configuring routing tables that route the packets over the network based on the relative priorities of the workloads that generate the packets, or modifying arbitration weights to favor granting access to the virtual channels to packets generated by higher priority workloads.
US11064016B2 Universal connectors for cloud data loss prevention (DLP)
The technology disclosed includes a system to apply data loss prevention (DLP) to cloud-based services for which no service-specific parser is available. The system determines that a known cloud-based service is being accessed via an application programming interface (API) and no service-specific parser is available for the API being accessed. The system applies a category-directed parser to the API being accessed. The category-directed parser includes multiple category-directed match rules derived from multiple syntaxes used by numerous known providers to implement a category of service. The category-directed parser collects metadata from content being conveyed via the API and assigns the collected metadata to variables. The system invokes a DLP processor and sends the collected metadata to the DLP processor for use in focusing analysis of content being conveyed via the API.
US11064007B2 System for providing audio questionnaires
An multistep guided system for mobile devices that facilitates the creation and dissemination of multistep guided activities from a source computer/device to a plurality of other recipient mobile devices, wherein the multistep guided activities is disseminated to the recipient mobile devices in a form that is compatible with the capabilities of the respective recipient mobile devices. The audio guided system comprises the source computer/device, the plurality of other recipient mobile devices and a server.
US11064004B2 System and method for verifying and providing compensation for participation in real-time streaming of multimedia over a decentralized network
The present invention relates to systems and methods suitable for verifying and compensating nodes for streaming multimedia. In particular, the present invention relates to systems and methods that utilize a blockchain to verify and compensate devices for computational resources contributions when streaming multimedia over a decentralized network.
US11063994B2 Distributing communication of a data stream among multiple devices
Methods, apparatus and articles of manufacture for distributing communication of a data stream among multiple devices are disclosed. Example methods disclosed herein include sending a message from a first electronic device to a second electronic device to announce the first electronic device is available for inclusion in a shared connection to be established by the second electronic device with a service provider, the shared connection to split a first data stream from a source into a plurality of partial data streams to be distributed among a plurality of electronic devices. Disclosed example methods also include establishing a data connection with the service provider to receive a first one of the partial data streams associated with the shared connection. Disclosed example methods further include relaying the first one of the partial data streams associated with the shared connection from the service provider to the second electronic device.
US11063985B2 Methods and apparatus for graphical user interface environment for creating threat response courses of action for computer networks
A graphical user interface provides network security administrators a tool to quickly and easily create one or more courses of action for automatic response to a network threat. The courses of action are hardware and system agnostic, which allows a common response task to be implemented by an underlying response engine for any or multiple similar-function devices regardless of brand or version. The course of action builder allows the administrator to use a simple, graphic-based, business modeling concept to craft and design security response processes rather than having to hard code response routines specific to each piece of hardware on the network. The graphic interface model allows the user of the threat response software incorporating the course of action builder to easily understand the overall flow and paths the response may take, as well as understand the data requirements and dependencies that will be evaluated.
US11063983B2 Componentized security policy generation
A continuous security delivery fabric is disclosed. One or more security functions, comprising one or more tasks to be performed by a security tool, utility or service is encapsulated in a componentized security policy. A target list comprising of one or more items in an information technology installation is received. One or more security functions capable of being performed on at least one item in the received target list are selected. A componentized security policy encapsulating one or more security routines orchestrating the performance of at least one of the selected security functions is then created.
US11063982B2 Object scope definition for enterprise security management tool
Methods and systems for configuring a common security policy for a plurality of nodes included within an enterprise network. Example methods can include grouping nodes within profiles based on IP address, in addition to concordance data. Additionally, nodes may be added to profiles based on a classification of the node being common to classifications of nodes within the profile. Still further, profiles may be grouped into a solution based at least in part on classification of the profile, in addition to grouping of profiles into solutions based on affinitization using concordance data. The methods described also include determining a common security policy to apply to each of the nodes within the profile.
US11063979B1 Enabling communications between applications in a mobile operating system
Systems, methods, and computer-readable media for communications between applications in a mobile operating system. A first application may receive a request for data from a second application. The first application may generate a first URL to the second application, a parameter of the first URL comprising an identifier of the first application. A mobile operating system may access the first URL to open the second application. The second application may validate credentials for an account and initiate a server on a port. The second application may generate a second URL to the first application, a parameter of the second URL comprising the port. The operating system may access the second URL to open the first application. The first application may establish a connection with the server using the port specified in the second URL and receive data from the second application via the connection with the server.
US11063977B2 Anti-replay device based on memory space interchange
Disclosed herein are methods, systems, and apparatus, including computer programs encoded on computer storage media, for detecting and disabling replay attacks. One of the methods includes receiving a transaction to be completed in a blockchain. A current working section of memory storing transaction information that is designated for use in identifying past transactions already processed is determined, where the memory also stores a backup section providing, when used in combination with the current working section, an alternating memory section storage scheme for the transaction information. From the current working section, whether the transaction has previously been processed is determined. When it is determined that the transaction has previously been processed, the transaction is bypassed. When it is determined that the transaction has not previously been processed the transaction is processed and transaction information for the transaction is written into the current working section.
US11063968B2 Communication system, communication device, relay device, communication integrated circuit (IC), control IC, and communication method
Provided are a communication system and method that can block transmission of an abnormal message while allowing transmission and reception of an authorized message. The communication device includes a communication processing unit that sequentially outputs a binary transmission message, a first switch connects a first wire of a bus to a first potential and a second wire to a second potential, an abnormality detection unit detects an abnormality in a message transmitted on the bus, a switching control unit switches, if an abnormality has been detected, the first switch so that the first wire is connected to the first potential and the second wire is connected to the second potential, and a second switch connects the first wire and the second wire via a second resistor. The communication device transmits a message if no abnormality has been detected, and transmits a message if an abnormality has been detected.
US11063967B2 Network threat indicator extraction and response
A device includes a communication interface and a processor. The communication interface is configured to receive a network threat report. The processor is configured to extract an indicator from the network threat report. The indicator is reported to be associated with a network threat. The processor is also configured to determine, based on the indicator, a confidence score indicating a likelihood that the indicator is associated with malicious activity. The processor is further configured to determine, based on the indicator, an impact score indicating a potential severity of the malicious activity. The processor is further configured to identify, based on the indicator, the confidence score, and the impact score, an action to be performed. The action includes blocking network traffic corresponding to the indicator or monitoring network traffic corresponding to the indicator. The processor is also configured to initiate performance of the action.
US11063964B2 Reporting and processing controller security information
In one implementation, a method for providing security on externally connected controllers includes receiving, at a reporting agent that is part of a security middleware layer operating on a controller, an indication that a process has been blocked; obtaining, by the reporting agent, trace information for the blocked process; determining, by the reporting agent, a code portion in an operating system of the controller that served as an exploit for the blocked process; obtaining, by the reporting agent, a copy of malware that was to be executed by the blocked process; generating, by the reporting agent, an alert for the blocked process that includes (i) the trace information, (ii) information identifying the code portion, and (iii) the copy of the malware; and providing, by the reporting agent, the alert to a network interface on the controller for immediate transmission to a backend computer system.
US11063962B2 Malicious URL detection method and apparatus, terminal, and computer storage medium
A malicious URL detection method, apparatus, and storage medium are provided. The method includes rolling back a virtual machine to an initiating state in response to detecting a trigger event of the virtual machine. In the initiating state, page content of a target URL is loaded using the virtual machine. Using the virtual machine, an application program linked to the page content is run. A system snapshot file of the virtual machine is obtained in at least one state of the initiating state, a state in which the loading of the page content is completed, or a state in which the application program is being run. Malicious URL detection is performed on the target URL based on the obtained system snapshot file.
US11063961B1 Moving target defense systems and methods
Systems and methods are provided to implement a moving target defense for a server computer. The server computer can be provided both a permanent IP address and a temporary IP address. The temporary IP address can be used when communicating with client computers connected to the server computer. The temporary IP address can be dynamically changed at a predetermined interval that can be varied based on conditions at the server computer. An intrusion detection system can be used with the moving target defense systems and methods to identify attacks on the server computer based on the temporary IP address(es) provided by the server computer. When an attack is identified, the corresponding client computer is determined based on the temporary IP address and the client computer is placed on a blacklist that is not provided with new temporary IP addresses when the server computer changes temporary IP address.
US11063960B2 Automatic generation of attribute values for rules of a web application layer attack detector
According to one embodiment, a web application layer attack detector (AD) is coupled between an HTTP client and a web application server. Responsive to receipt of a set of packets from the HTTP client carrying a web application layer message that violates a condition of a security rule, the AD transmits an alert package to an automatic attribute value generation and rule feedback module (AVGRFM). The AVGRFM uses the alert package, and optionally other alert packages from the same AD or other ADs, to automatically generate a new set of attribute values for each of a set of attribute identifiers for use, by the AD or other ADs, in a different security rule than the violated security rule. The new set of attribute values may be used in an attack specific rule to detect a previously unknown web application layer attack.
US11063953B2 Systems and methods for continuous authentication
In some aspects, a method for revoking access to a network application on a client device. The method includes establishing, by a client application on a client device responsive to authenticating a user, access to one or more network applications of one or more first servers of a first entity via an embedded browser of the client application, receiving, by the client application, a notification from a second server of a second entity that access for the user to a network application of the one or more network applications is to be revoked, and performing, by the client application responsive to the notification, one or more revoking actions based at least on a policy.
US11063952B2 Identity authentication and information exchange system and method
An apparatus for use in an identity management system includes a storage device; a network interface; and a processor, the storage device storing software instructions for controlling the processor to: process a request, received via a network interface, for an exclusive claim to a unique identifier associated with an individual; verify the individual's claim to the unique identifier is proper; if the individual's claim is verified, create a user account, wherein the user account is associated with the respective individual's claimed unique identifier; provide a look up service for responding to external queries regarding whether individual unique identifiers of the type claimed by the individual have been claimed; and provide proof of the identity of the individual based on the individual's exclusive claim to the claimed unique identifier in response to a request to provide said proof if authorized by the individual through the user account.
US11063951B1 Systems and methods for correcting file system permissions
A method is described. The method includes generating an access model that simulates a transformation of existing new technology file system (NTFS) permissions for a plurality of shared folders. The method also includes creating permission groups for the plurality of shared folders based on the access model. The method further includes updating the NTFS permissions of the shared folders based on the access model and permission groups.
US11063947B2 Integrated activity management system and method of using same
An integrated activity management system and method for a firm comprising at least one user is disclosed. The system includes at least one communicator, at least one firm unit, a firm network, and a firm administrator. The communicator includes a unique carrier identification, a subscriber identification module (e.g., SIM card), a user memory, and a local processor to generate a log of the time spent on firm activities. The firm unit comprising a firm memory, and a firm processor to determine output based on the user information and firm information stored in the firm memory. The administrator is coupled to the firm unit to selectively grant access to the firm network to the communicator and the firm unit whereby secured communication between the at least one communicator and the at least one firm unit is provided.
US11063943B2 System and method for re-authentication of asynchronous messaging
A system and method are presented for the re-authentication of asynchronous messaging, specifically within enterprise to consumer communications. A third-party enterprise messaging server may be used as a conduit for a messaging service allowing for customer interaction with a business. The messaging server can append a re-authentication process for customers once a customer has been authenticated by the enterprise. Each time a customer resumes an interaction exceeding a timeout threshold, the messaging server invokes its re-authentication process. Lapsed interactions may be treated as continuous without having the customer re-authenticate through the enterprise specific authentication.
US11063942B2 Enhanced authentication method using dynamic geographical location information
A system increases security for personal devices. An authenticating authority receives an authentication request from a personal device. The authenticating authority obtains a current location of the personal device from a location server, where the location server transmits the current location to the authenticating authority. The location server receives location information associated with the personal device, where the location information is transmitted to the location server by a location updating daemon running on the personal device. The authenticating authority compares the current location received from the location server to a zone associated with the personal device to determine processing of the authentication request. The zone is retained by the authenticating authority.
US11063938B2 Caller and recipient alternate channel identity confirmation
A system and method are disclosed that leverage multi-factor authentication features of a service provider and intelligent call routing to increase security and efficiency at a customer call center. Pre-authentication of customer support requests reduces the potential for misappropriation of sensitive customer data during call handling. A contactless card uniquely associated with a client may provide a second factor of authentication to reduce the potential for malicious third-party impersonation of the client. Pre-authorized customer support calls are intelligently and efficiently routed in a manner that reduces the opportunity for malicious call interference and information theft.
US11063937B1 Authentication via camera
Systems and methods for authentication via camera are provided. In example embodiments, an authentication server transmits, to a mobile device, an identity verification image. The authentication server receives, from a computing device, a scanned image, wherein the computing device is different from the mobile device. The authentication server determines whether the scanned image includes data from the identity verification image. The authentication server transits, to a web server accessed by the computing device, an indication that a user's identity has been verified upon determining that the scanned image includes the data from the identity verification image.
US11063936B2 Encryption parameter selection
Disclosed in some examples are methods, systems, devices, and machine-readable mediums for securing biometric data using an encryption technique that does not require key storage or distribution. In some examples, a first biometric template of a user is input into a function that selects or determines parameters (such as an encryption key) of an encryption function that is then used to encrypt a second biometric template of the user.
US11063934B2 Information pushing method, server, sharer client and third-party client
Disclosed in an embodiment of the present application is an information pushing method, comprising: a wireless network sharer client obtaining a first identifier of a wireless network selected from a wireless network list scanned/stored by a wireless network sharer terminal, and sending the same to a server; the server generating a second identifier and sending the same to the wireless network sharer client; the wireless network sharer changing the first identifier of the wireless network into a third identifier based on the second identifier; the wireless network sharer client obtaining a wireless network list updated by a wireless network sharer mobile terminal and sending the third identifier of the selected wireless network in the list to the server; and the server comparing the second identifier with the third identifier, and allowing successful authentication when the two identifiers are consistent, and registering information about the devices of the wireless network.
US11063930B1 Resource access provisioning for on-premises network client devices
A managed directory service receives, from a computer system operated in a first network, a request to obtain a set of credentials usable to access resources in a second network. In response to the request, the managed directory service determines, based at least in part on a first set of permissions in a directory maintained in the second network, that the computer system is authorized to receive the set of credentials. The managed directory service provides the set of credentials to the computer system, which enables use of the set of credentials to identify a second set of permissions for accessing resources in the second network.
US11063927B1 Identity-aware application load balancer
Techniques for an identity-aware load balancer (ALB) are described. An identity-aware ALB can securely authenticate users when accessing web-based applications accessed through the ALB, or a node of the ALB. An application owner can configure an authentication action in the ALB. When a request for the application is received, the ALB inspects the request for a session cookie to determine whether the requesting user is logged-in. If the request includes a session cookie, the ALB can decrypt the session cookie and provide identity information with the request to the application. If no session cookie is included, or if the session cookie is expired, the ALB can authenticate the user with an identity provider specified in the authentication action. Integrating authentication into an ALB simplifies application development and maintenance, and improves security, since fewer changes to the application stack reduce the chances of errors being introduced.
US11063923B2 Authenticator plugin interface
Authenticator plugin interface for an enterprise virtualization portal is provided. An example method for evaluating a portal access request may comprise: receiving, by a virtualization management platform, a request initiated by a requestor for access to an enterprise virtualization portal associated with the virtualization management platform, the request comprising a login credential; transmitting, to a first authentication system, a first authentication query comprising an identifier of a first data type, and a first value of the first data type, wherein the first value is derived from the login credential; receiving a first response message comprising an identifier of a second data type, and an authentication response of the second data type; and responsive to evaluating the authentication response, granting the requestor access to the enterprise virtualization portal.
US11063908B2 On-vehicle communication device, communication control method, and communication control program
This on-vehicle communication device includes: a storage unit configured to store correspondence information indicating a correspondence relationship between an address and a port number; and a communication unit configured to perform, by using the correspondence information, filtering of a packet having been received. A target port number which is a port number of a target instrument is registered in advance in the correspondence information. In the filtering, the communication unit selectively allows a packet that includes the target port number, to pass. The communication unit performs an address registration process of acquiring an address from the packet that includes the target port number and registering, into the correspondence information, the acquired address in association with the target port number. In the filtering after the address registration process, the communication unit selectively allows a packet that includes the target port number and the corresponding address, to pass.
US11063905B2 Service detection for a policy controller of a software-defined wide area network (SD-WAN)
Systems and methods for detecting Internet services by a network policy controller are provided. According to one embodiment, a network controller maintains an Internet service database (ISDB) in which multiple Internet services and corresponding protocols, port numbers, Internet Protocol (IP) address ranges and singularity levels of the IP ranges are stored. The network policy controller intercepts network traffic and detects the Internet service of the network traffic. If an IP address of the network traffic falls in an IP range with highest singularity level and the protocol type, port number of the network traffic are matched in the ISDB, the corresponding Internet service is identified as the Internet service of the network traffic. The network policy controller further controls transmission of the network traffic based on the Internet service.
US11063900B2 Method for communicating between communicating elements forming part of a home automation system
Disclosed is a method for communicating between communicating elements forming part of a home automation system for a building, each communicating element being connected in a communication network allowing communication according to a predefined communication protocol. Each communicating element of the communication network stores a current network address in a memory of the communicating element, the current network address being used for point-to-point addressing in the communication network, and each communicating element stores at least one preceding network address of the communicating element in the memory of the communicating element.
US11063898B1 Systems and methods for chat with audio and video elements
Methods, devices, systems, and computer-readable media with instructions for text communications with imbedded audio or audiovisual elements are described. One embodiment involves displaying a user interface for chat communication with a time-ordered display space for communications. Text communications and audiovisual communications are each presented in associated rows within the user interface. Various embodiments enable audio or video notes as well as audio or video streaming or multi-user calls within the user interface with individual communications or connections presented within the time-ordered display. In some embodiments, communications within the display are deleted based on ephemeral message triggers.
US11063895B2 Music/video messaging system and method
A system and method for creating custom music/video messages to facilitate and/or improve social interaction. The music/video messages may include at least portions of: music, video, pictures, slideshows, and/or text. Custom music/video messages may be created by a user in communication with a music/video provider and a music/video messaging system. The music/video messaging system and/or a distribution network send the music/video messages to one or more intended recipient(s). The custom music/video messages are representative of feelings or emotions to be communicated by the user to the one or more recipient(s).
US11063894B2 System and method of embedding rich media into text messages
While texting, a user is able access, share, and control rich media without leaving the texting application. The rich media are provided directly within the executing texting application. The texting application includes an embedded widget for controlling the rich media. Rich media includes, among other things, video clips, streaming audio, a map application, a movie-time application, a social movie-site application, a dynamically controllable image, or promotional media. Different mobile devices executing the texting applications communicate through a server that allows additional functionality, such as syncing the play of video clips and hosting and pushing the promotional media.
US11063887B2 Information processing apparatus, user terminal apparatus, and control method
In an information processing apparatus, a question information acquisition unit acquires question information from a user terminal apparatus. A chat data acquisition unit acquires chat data including one or more pieces of second question data and one or more pieces of second answer data. Each piece of second question data is a collection of one or more pieces of similar first question data selected from FAQ data including the pieces of first question data and first answer data thereto. The second answer data is data obtained by simplifying corresponding one or more pieces of first answer data. An answer data acquisition unit acquires a piece of second answer data corresponding to a piece of second question data identical or similar to the question information. A transmission unit transmits the piece of second answer data acquired by the answer data acquisition unit to the user terminal apparatus.
US11063883B2 End point multiplexing for efficient layer 4 switching
This disclosure provides for an enhancement to a transport layer switch and, in particular the management of end points. In this approach, a memory space, such as a large logical ring buffer, is shared by incumbent connections to facilitate a space multiplexing end point management scheme. Preferably, memory allocation in the memory space is done packet-by-packet dynamically. Because the memory space is shared by all admitted connections, packets belonging to the same connection are not necessarily located physically consecutive to each other. A packet indexing mechanism that implements a set of pointers ensures that consecutiveness for packets on the same connection is maintained. This approach to end point multiplexing provides significant benefits by improving resource utilization, and enabling a higher number of connections to be served.
US11063882B2 Resource allocation for data integration
Improving allocation of network resources by receiving node names for resource allocation, checking a bookmark file of bad nodes for the received node names, selecting good nodes from the received nodes for command execution, sending commands to selected good nodes, identifying bad nodes during command execution; and adding the identified bad nodes to the bookmark file.
US11063880B2 System and method for queue load balancing
A communications system is configured to facilitate communication via a plurality of communication types and comprises at least one queue monitor. The system is configured to determine a number of users on hold in a queue for each of the communication types, to compare the determined number of users on hold to a configurable threshold value for each communication type and, when the number of users on hold in a queue for a first communication type exceeds a threshold value for the first communication type, to send a notification to one or more of the users on hold in that queue, the notification comprising an option to switch to an alternative communication type.
US11063877B1 Apparatus, device, and method for fragmenting packets into segments that comply with the maximum transmission unit of egress interfaces
A socket-intercept layer in kernel space on a network device may intercept a packet destined to egress out of the network device. The socket-intercept layer may then query a routing daemon for the Maximum Transmission Unit (MTU) value of the interface out of which that packet is to egress from the network device. In response to this query, the routing daemon may provide the socket-intercept layer with the MTU value of that interface. A tunnel driver in kernel space may identify the size of the packet and fragment the packet into segments whose sizes are each less than or equal to the MTU value of the interface. The tunnel driver may then push the segments of the packet to a packet forwarding engine on the network device. In turn, the packet forwarding engine may forward the segments of the packet to the corresponding destination via the interface.
US11063875B2 Network flow control
Aspects of the present disclosure include a content delivery network (CDN) for delivering content associated with a plurality of different types of applications/devices. Using a CDN flow application, a plurality of network flow parameters are generated for content delivery unique to different types of applications or devices. The network flow parameters include customized data transmission rates. The network flow parameters include predetermined settings for transmission control protocol (TCP) connections between the CDN and devices using a TCP flow control mechanism. Upon receiving a content request, the CDN fulfills the content request based upon first network flow parameters. The network flow parameters may be adjusted for each of the plurality of different types of applications/devices. The network flow parameters may be generated based upon requests or based upon the performance of each of the plurality of applications/devices.
US11063872B2 Scalable overlay multicast routing
The disclosure provides an approach for reducing congestion within a network, the network comprising a plurality of subnets, the plurality of subnets comprising a plurality of host machines and a plurality of virtual computing instances (VCIs) running on the plurality of host machines. Embodiments include receiving, by an edge services gateway (ESG) of a first subnet of the plurality of subnets, membership information for a group identifying a subset of the plurality of host machines. Embodiments include receiving a multicast packet directed to the group and selecting from the plurality of host machines, a replicator host machine for the multicast packet. Embodiments include sending, to the replicator host machine, the multicast packet along with metadata indicating that the replicator host machine is to replicate the multicast packet to remaining host machines of the subset of the plurality of host machines identified in the membership information for the group.
US11063870B2 Selective route download traffic sampling
A network device includes a forwarding information base (FIB). The FIB includes a first number of entries and a default entry. The network device includes a routing information base that includes a second number of entries. The network device includes a FIB entry optimizer that ranks a first portion of the second number of entries based on access information of the first number of entries; ranks a second portion of the second number of entries based on access information of the default entry; and updates at least one entry of the FIB based on the ranks of the first portion of the second number of entries and the ranks of the second portion of the second number of entries. The first number of entries is less than the second number of entries.
US11063869B2 ARP table management system
An ARP table management system maps destination addresses to next hop addresses using ARP entry and egress tables and, when the ARP egress table is full, performs those mappings in double-entries in the ARP entry table. When a second destination address is identified that is associated with a first next hop address mapped to a first destination address in a first double-entry in the ARP entry table, a second next hop address is identified in the ARP egress table that is mapped to only one third destination address in the ARP entry table. The third destination address is then mapped to the second next hop address in a second double-entry in the ARP entry table, and each of the first destination address and the second destination address in respective ARP entry rows in the ARP entry table are mapped to the first next hop address in the ARP egress table.
US11063867B2 Forwarding packet
According to an example of a method for forwarding a packet, a ESGW device decapsulates a received downstream data packet to obtain a downstream IP data packet when a destination MAC address of the downstream data packet is an MAC address of the ESGW device; determines a matching ARP entry of an IP address of a target user terminal based on the destination IP address of the downstream IP data packet to obtain a session ID of the target user terminal; determines a length field of a PPPoE header by a microcode, and obtains a pre-stored fixed-value field of the PPPoE header from a data storage area; encapsulates the downstream IP data packet into a downstream PPPoE data packet based on the session ID, the length field, and the fixed-value field, and forwards the downstream PPPoE data packet through an egress port of the matching ARP entry.
US11063865B2 Decentralized content fabric
Disclosed are examples of systems, apparatus, devices, computer program products, and methods implementing aspects of a decentralized content fabric. In some implementations, one or more processors are configured to execute a software stack to define a fabric node of a plurality of fabric nodes of an overlay network situated in an application layer differentiated from an internet protocol layer. The defined fabric node is configured to: obtain a request for digital content from a client device; obtain, from one or more of the plurality of fabric nodes, a plurality of content object parts of a content object representing, in the overlay network, at least a portion of the digital content; generate consumable media using: raw data stored in the content object parts, metadata stored in the content object parts, and build instructions stored in the content object parts; and provide the consumable media to the client device. In some instances, the consumable media is further generated using a digital contract stored in a blockchain.
US11063860B2 Control plane-based EVPN optimized inter-subnet multicast (OISM) forwarding
In general, techniques are described for providing control plane-based OISM forwarding. For example, network devices may configure two types of next hops for a multicast group. For example, the next hops may include an L2-switched next hop and an L3-routed next hop. The L2-switched next hop specifies the one or more other PE devices as a next hop for multicast traffic for the multicast group that is received on an access-facing interface of the PE device and switched on a source Virtual Local Area Network (VLAN). The L3-routed next hop specifies a list (e.g., either an empty list or specifying incapable Integrated Routing and Bridging (IRB) devices) as a next hop for multicast traffic for the multicast group that is received over an EVPN core on a core-facing interface of the PE device and locally routed from the source VLAN to a listener VLAN.
US11063859B2 Packet processing method and network device
Embodiments provide a packet processing method. In accordance with this method, a first LSP packet can be received by a network device. The following determinations can be made: that the network device stores no LSP packet whose LSP ID and PDU type are the same as an LSP ID and PDU type of the first LSP packet; that the network device has stored a second LSP packet whose LSP ID is the same as an LSP ID of the first LSP packet and PDU type is the same as a PDU type of the first LSP packet, and that a sequence number of the second LSP packet is less than a sequence number of the first LSP packet. When one or more of these determination are made, a determination whether LSP packet digest information matching the first LSP packet exists can be made. When the LSP packet digest information matching the first LSP packet is determined to exist, the first LSP packet can be stored.
US11063858B2 Systems and methods for testing a router device
Various embodiments include computing devices and methods for testing a router device. A processor of the computing device may receive one or more Border Monitoring Protocol (BMP) messages collected from a production router. The processor may obtain header information from a header portion of the one or more BMP messages. The processor may modify an origination address in the header information to match an address of a first test network element. The processor may modify a next hop address in the header information to match an address of a second test network element. The processor may convert the one or more BMP messages including the modified header information to one or more Border Gateway Protocol (BGP) messages. The processor may send the one or more BGP messages to a router under test in the test network.
US11063853B2 Method and device to transfer to a virtual browser session based on responsiveness
Methods, devices and program products are provided initiate a local browser session, at a local browser, with a resource manager. The method, devices and program products measure a responsiveness of the local browser session and determines if the responsiveness of the local browser session falls below a threshold. Based on the determining, the local browser session may be transferred from the local browser to a virtual browser on a remote device to form a virtual browser session. The remote device is located remote from the client device. At the client device, a rendered output is displayed from the virtual browser session implemented by the virtual browser.
US11063848B1 System for estimating unknown attributes of interest in the under-determined inverse problem and a process of accomplishing the same
A method for solving an under-determined inverse problem or network inference/tomography problem in per-flow size, delay, loss and throughput inference in a computer network, through a system is presented. The method includes the following steps, which are not necessarily in order. First, establishing the computer network having a plurality of nodes wherein the per-flow size, the delay, the loss and the throughput inference are unknown. An original observation or routing matrix determines how flows are appeared on the links and construct the measurements. Next, performing a learning phase to obtain an optimal observation matrix or pseudo-optimal observation matrix. After that, performing a computer controller adaptive measurement and inference phase to estimate the set of unknowns using the measurement quantities, and a function of one of the set consisting of: the optimal observation matrix, the original observation matrix, or both.
US11063842B1 Forecasting network KPIs
In one embodiment, a service receives input data from networking entities in a network. The input data comprises synchronous time series data, asynchronous event data, and an entity graph that that indicates relationships between the networking entities in the network. The service clusters the networking entities by type in a plurality of networking entity clusters. The service selects, based on a combination of the received input data, machine learning model data features. The service trains, using the selected machine learning model data features, a machine learning model to forecast a key performance indicator (KPI) for a particular one of the networking entity clusters.
US11063831B2 Network slice management method and apparatus
This application provides a network slice management method and apparatus. A first manager obtains capability information of a subnet, where the capability information of the subnet includes at least one of the following information: capability information of a subnet template and capability information of a subnet instance, the capability information of the subnet template is used to represent a feature of the subnet template, and the capability information of the subnet instance is used to represent a feature of the subnet instance; and then generates information about a network slice based on the capability information of the subnet, where the information about the network slice includes information about a network slice template or information about a network slice instance, and the network slice includes at least one subnet.
US11063830B2 Hitless upgrade of packet processing rules
Upgrading packet processing rules in a network device with a replacement set of rules includes generating an edit sequence that represents edit operations to transform an already-installed old set of rules into the replacement rules. The edit sequence is used to identify a subsequence of rules that is common to both the old rules and the replacement rules. A merged list is generated by a combination of the old rules, the replacement rules, and the common subsequence of rules. The merged list is downloaded to the network device, overwriting the old rules in bottom-up fashion allowing packet processing to continue concurrently using the old rules.
US11063828B2 Detecting software misconfiguration at a remote machine
Aspects of the present disclosure relate to detecting software misconfiguration at a remote machine. A control server stores, in a data repository, a plurality of antipatterns, each antipattern relating to a misconfiguration of a remote computer system. The control server accesses data of the remote computer system. The control server runs the plurality of antipatterns on the data of the remote computer system to determine one or more misconfigurations of the remote computer system. The control server provides, as a digital transmission, an output representing the determined one or more misconfigurations of the remote computer system.
US11063826B2 Method and apparatus for providing a bulk migration tool for a network
A method and apparatus for providing a bulk migration tool are disclosed. The method receives a request for performing a bulk migration from a first network component to a second network component, extracts for the bulk migration a configuration from the first network component, generates for the bulk migration, a configuration for the second network component in a configuration language of the second network component in accordance with the configuration extracted from the first network component, configures the second network component with the configuration that is generated, issues an order for performing the bulk migration, wherein the bulk migration is to be performed during a cutover schedule, determines whether the particular bulk migration is performed successfully, activates the configuration for the second network component, when the bulk migration is performed successfully, and deactivates the configurations for the first network component, when the bulk migration is performed successfully.
US11063820B2 Method and apparatus for configuring network connection in mobile communication system
Provided is a method, performed by a user equipment (UE), of controlling an access, the method including receiving, through system information from a base station, barring information including a barring configuration information list and a public land mobile network (PLMN)-specific barring information list, the barring configuration information list including at least one barring configuration information and the PLMN-specific barring information list including at least one barring information per PLMN and performing a barring check based on the received barring information when the access is triggered, in which the barring configuration information corresponds to one barring configuration information index according to an order of being included to the barring configuration information list.
US11063818B2 Method and apparatus for a software defined satellite and network
A software defined network including a constellation of software defined satellites. Each software defined satellite includes computing resources that are dynamically configurable to provide at least one of a plurality of different types of services. Each software defined satellite further includes an interface that interfaces with a software defined network ground station.
US11063816B2 Information processing device and non-transitory computer readable medium
An information processing device includes a storage unit, a controller, a storage processor, and a transmitter. When communication with a log management server is unavailable, the controller causes a log of an operation of storing or retrieving data with respect to a storage area on a network to be stored in the storage unit in association with the data. In a case in which the data stored in the storage unit is stored in the storage area and the log associated with the data exists, the storage processor performs a process of storing the log in the storage area in association with the data. In a case in which communication with the log management server is available and a log is stored in association with data in the storage unit, the transmitter transmits the log to the log management server.
US11063813B2 Method and apparatus for configurating transmission mode in copper wire based network
A method for configurating a transmission mode to provide an Internet service to a customer-premises equipment by an transmission mode configurating apparatus in an access network structure is provided. At least one network management equipment and at least one customer-premises equipment are connected through a bundle of cables including a plurality of transmission lines. The method includes determining the number of transmission lines connected to the customer-premises equipment; determining at least one of available transmission mode to provide depending on the number of transmission lines; if a plurality of available transmission modes are determined, calculating a transmission performance in each of the available transmission modes; and selecting the transmission mode with the highest performance among the plurality of the available transmission modes.
US11063810B2 Information notification method and device
Disclosed are an information notification method and device. The information notification method includes that: an In-band Operation Administration and Maintenance (IOAM) node encapsulates IOAM capability information by using an extended Border Gateway Protocol (BGP)-Link State (LS) or encapsulates the IOAM capability information by using a Network Configuration Protocol (NETCONF), and sends a BGP-LS packet or a NETCONF message carrying the IOAM capability information to a predetermined node.
US11063798B2 High spectral efficiency zero bandwidth modulation process without side bands
A method for transmission of signal is provided, the method comprising the steps of receiving one or more modulating signals, generating one or more modulated sinusoidal carrier waves with zero side bands, including one or more sine wave cycles at carrier frequency that have a predetermined one or more properties, defined for complete cycle at the beginning of each sine cycle at one or more zero voltage crossing points in accordance with the one or more values of the one or more modulating signals. The one or more predetermined properties to change, is selected from group of amplitude, frequency, phase, time period and combinations thereof.
US11063797B2 Transmitter, network node, method and computer program
A transmitter is arranged to transmit binary information using a binary amplitude shift keying where information symbols are represented by a signal including a first power state and a second power state. A duration of a bit includes a first part where the second power state is applied irrespective of which binary value being represented, and a second part where a binary value is represented by any of the first power and a third power state or a combination pattern of the first power state and the third power state. The first power state has a higher signal power than the second power state and the third power state. The duration of the second part is equal or less the duration of the first part and the signal power of the first power state is such that the binary values are distinguishably decodable.
US11063795B2 Methods and devices for adapting load on a fronthaul network
A method performed in a scheduler entity is provided for adapting load on a fronthaul network in a radio access network comprising a central baseband unit and a remote radio unit. The central baseband unit and the remote radio unit are interconnected by the fronthaul network over which baseband signal information is exchanged. The method comprises obtaining information related to capacity of the fronthaul network, and adapting, based on the obtained information, air interface performance for at least one type of conveyed baseband signal information such as to enable adapting of load on the fronthaul network. A scheduler entity, method in a fronthaul module, computer programs and computer program products are also provided.
US11063786B2 Apparatus and method for integrating long-range wireless devices in industrial wireless networks
This disclosure provides an apparatus and method for integrating long-range wireless devices in industrial wireless networks. A wireless device manager is configured to function as a gateway for at least one industrial wireless network. The gateway is associated with at least one industrial wireless network protocol; and the wireless device manager comprises a first radio module configured to communicate directly with one or more devices over a distance of at least about two kilometers using a long-range wide area network protocol.
US11063785B2 Multipath traffic management
One embodiment provides an apparatus. The apparatus includes client traffic management (CTM) logic. The CTM logic is to trigger implementation of a selected network traffic flow related to the client device, the triggering based, at least in part, on a network traffic flow related to the client device. The network traffic flow is associated with a connection and includes at least one subflow. Each subflow is carried by a respective path associated with the connection. The triggering includes at least one of constraining and/or adjusting an allowable throughput at a service provider for one or more of the at least one subflow. The selected traffic policy is to be implemented in a transport layer.
US11063784B2 Centralized management of authoritative edge devices
In one embodiment, an authoritative edge device (AED)-server in a computer network maintains assignment of an active AED for a particular virtual local area network (VLAN), and in response to a triggered re-assignment, sends an AED change request identifying an old active AED for the particular VLAN and a new active AED for the particular VLAN (e.g., and/or corresponding backups). In response to receiving the change request, the old active AED ceases forwarding of traffic for the particular VLAN and transmits a relinquishment confirmation into the network. Also, in response to receiving the change request and the relinquishment confirmation from the old active AED, the new active AED assumes responsibility for traffic forwarding for the particular VLAN and transmits an activation confirmation into the network. The change request is then deemed completed by the AED-sever upon receipt of both the relinquishment confirmation and the activation confirmation.
US11063781B2 System and method for downlink OFDMA for reliable multicast and broadcast to workgroup bridge (WGB) bridged network
Systems and methods herein can convert downstream group addressed packets to unicast packets and send them to Workgroup Bridges (WGBs) by Downlink (DL) Multiple-User (MU) Orthogonal Frequency Division Multiple Access (OFDMA) (DL-MU-OFDMA). A Wireless Controller (WLC)/Access Point (AP) can extend current Inter-Access Point Protocol (IAPP) messages for broadcast and deploy Internet Group Management Protocol (IGMP) processing for multicast messages. The APs can maintain WGB entries for each group address. When there is a downstream broadcast packet received at the AP, the AP can search the entries in the domain and can build a 4-address unicast packet for each WGB, then transmit those converted packets in parallel by DL-OFDMA. After receiving those converted packets over the air, the WGB simply rebuilds 802.3 packets and forwards the 802.3 packets to the corresponding VLAN domain.
US11063780B2 Eventually consistent data replication in queue-based messaging systems
Techniques are disclosed herein for ensuring convergence of states for reliable message delivery in geographically distributed message queuing systems. The techniques include receiving a message at a local system, in which the message is associated with a new message topic. Further, at least one commutative replicated data type (CRDT) object associated with the message is created, wherein the at least one CRDT object corresponds to a unique message identifier (ID). A new message state corresponding to the message ID and the message topic is entered in a message state table, wherein the message state entry indicates a message state corresponding to the message. At least one CRDT object is recorded in a message queue. Thereafter, a list of subscribers including individual subscribers mapped to the new message topic is resolved from a message destinations object. The message is then delivered to at least one of the individual subscribers.
US11063779B2 Content server, information sharing system, communication control method, and non-transitory computer-readable medium
A content server manages contents used in one or more events. The server includes one or more memories that store, for each one of one or more participants of an event, one or more capture images, each capture image being an image of particular content of a plurality of contents used in the event and having been captured to a personal terminal of the participant during the event in response to an operation to capture the image of the particular content to the personal terminal. The server further includes circuitry configured to transmit distinction information distinguishing each capture image to a particular information processing terminal.
US11063778B2 Methods and systems for managing an electronic group communication in an equitable manner
Once a group communication such as a video conference has been initiated, embodiments of the present disclosure provide for equitably managing the conference so that each participant can be given a chance to speak or contribute. For example, and according to one embodiment, the participants can be placed into a rotating queue based upon the order in which they joined the conference. As the conference progresses, each participant can be allowed to speak, while the other participants are muted, for up to a predetermined amount of time. Once that time expires, or the speaker yields the remaining time, the next participant in the rotating queue can be allowed to speak for up to the same predetermined amount of time. This rotation can continue for up to a predetermined number of rotations, a predetermined amount of time for the conference, or until the participants otherwise end the conference.
US11063769B2 Blockchain data protection based on generic account model and homomorphic encryption
Implementations of the specification include receiving transaction data associated with the transaction, the transaction data comprising: data representative of a plurality of assets, a first commitment hiding a first random number and a transaction amount of the transaction, a second commitment that hides a second random number and a change, the transaction amount and a third random number both encrypted by a public key of the second node, the change and a fourth random number both encrypted by a public key of the first node, and a zero-knowledge proof (ZKP); determining, based on the ZKP, whether the transaction is valid based on determining if the first random number is equal to the third random number, the second random number is equal to the fourth random number, and the transaction amount hidden in the first commitment is equal to the transaction amount encrypted by the public key of the second node.
US11063768B2 Systems and methods for downloading code and data into a secure non-volatile memory
An example secure embedded device includes a secure non-volatile memory coupled to a processor. The processor provides a scramble or cipher key and uses a scramble algorithm or a cipher algorithm to scramble or cipher information received from an external device into transformed information. The processor writes a least a portion of the transformed information to a plurality of memory locations of the secure non-volatile memory. The plurality of memory locations is based on the scramble or cipher key.
US11063760B2 Method for ensuring security of an internet of things network
A mechanism for registering a device with an Internet of Things (IoT) edge network is disclosed. The manufacturer of the device stores credentials of the device in a secure storage of the device. The manufacturer also stores the credentials on a public blockchain with sensitive parameters hashed or encrypted. A certifying node accesses the credentials from the public blockchain to establish a secure connection with the device and to verify its credentials. The device sends the credentials to the certifying node, only if the certifying node is able to decrypt a device access parameter from the public blockchain. Upon verifying the credentials of the device, the certifying node issues a digital certificate to the new device and it is stored on a permissioned blockchain within the IoT network. Other nodes in the IoT network may use the digital certificate on the permissioned blockchain for secure communication with the device.
US11063756B1 Secure intra-chip hardware micro-segmentation using charged particle beam processing
Methods, systems and devices for using different encryption keys written into interconnects of different functional blocks in different integrated circuits to securely encrypt and authenticate firmware, data, instructions and other messages transmitted among said functional blocks; and methods, systems and devices to obfuscate encryption keys to significantly increase the time and resources required to compromise those keys, ensuring encrypted data is only decrypted by authorized functional blocks, applications or users. Unique keys, small enough not to impact substrate surface area available for other device functions, can be written by charged particle beams such that multiple (or each of) functional blocks has a corresponding key unique within an IC and across a line of ICs and so that access to said keys is as limited (or nonexistent) as desired. Circuits embodying key bits can also be distributed throughout ICs and across layers, uniquely to individual functional blocks in individual ICs, to obfuscate patterns implementing keys and thereby raising time and resource cost to reverse engineer keys to prohibitive levels.
US11063750B2 Systems and methods for secured web application data traffic
Systems and methods for secured access to cloud-based applications or services include a service node that may receive a request from client including a URL associated with an application manager. The service node may send a URL prefix identifying a termination to the termination node. The service node may receive a client hello message from the client that includes a first field incorporating the URL prefix, and may send the client hello message to the termination node to initiate a handshake with the client using a wildcard certificate of server, for establishing a SSL channel between the client and the termination node for a session of the application. The service node can direct a communication of the session from the client to the predetermined termination node, for decryption, using the established SSL channel, according to the URL prefix incorporated in a server name indication (SNI) field of the communication.
US11063749B2 Cryptographic key management based on identity information
Disclosed herein are methods, systems, and apparatus, including computer programs encoded on computer storage media, for managing cryptographic keys based on user identity information. One of the methods includes receiving a request to store identity information and a user key pair to a memory on a chip, the request being digitally signed with a digital signature, the identity information uniquely identifying the user, and the user key pair being assigned to the user; determining that the digital signature is authentic based on a public key pre-stored in the memory; encrypting the identity information and the user key pair; and storing the identity information and the user key pair to the memory.
US11063748B2 Synchronizing content
Some embodiments of the subject technology provide a novel system for synchronizing content items among a group of peer devices. The content synchronizing system of some embodiments includes the group of peer devices and a set of one or more synchronizing servers communicatively connected with the peer devices through one or more networks. In some embodiments, the synchronizing system uses a star architecture, in which each peer device offloads its synchronization operations to the synchronizing server set. Without establishing a peer-to-peer communication with any other peer device, the particular peer device in these embodiments supplies an encrypted content item set along with the N−1 encryptions of a content key used to encrypt the content item set to the synchronizing server set so that this server set can distribute the encrypted content item set and an encrypted content key to each of the N−1 peer devices.
US11063745B1 Distributed ledger for multi-cloud service automation
An apparatus in one embodiment comprises at least one processing device having a processor coupled to a memory. The processing device is configured to implement a first ledger node of a first cloud having a first set of cloud resources. The first ledger node of the first cloud is configured to communicate over one or more networks with a plurality of additional ledger nodes associated with respective additional clouds having respective additional sets of cloud resources, to monitor auditable information relating to cloud resources of the first cloud and cloud services provided by the first cloud, to associate the auditable information with one or more cloud service transactions, and to generate a cryptographic block characterizing the one or more cloud service transactions and the associated auditable information. The cryptographic block is entered into a blockchain distributed ledger collectively maintained by the first and additional ledger nodes.
US11063738B1 Time synchronization using a weighted regression analysis
Techniques are disclosed for performing time synchronization at a plurality of computing devices in a network. In one example, a method comprising obtaining time stamp data in accordance with a synchronization operation for a timing protocol; computing a skewness estimate and an offset estimate from the time stamp data by executing, over a number of iterations, a weighted regression analysis targeting at least one bound of the time stamp data, the skewness estimate comprising a frequency difference between a first clock at a first computing device and a second clock at a second computing device, the offset estimate comprising a clock time difference between the first clock and the second clock; and applying a clock time correction to the at least one of the first clock or the second clock based the offset estimate.
US11063737B2 Reception device, transmission device, communication system, signal reception method, signal transmission method, and communication method
There is provided a reception device including a data signal receiver circuit, a clock signal receiver circuit, and a discrimination circuit. The data signal receiver circuit receives a data signal through a data signal line, and receives a data blanking signal through the data signal line in a blanking period of the data signal. The clock signal receiver circuit receives a clock signal and a clock blanking signal through a clock signal line, the clock blanking signal outputted in synchronization with the blanking period of the data signal. The discrimination circuit discriminates communication modes on a basis of one or both of a signal value of the data blanking signal and a signal value of the clock blanking signal.
US11063727B2 Method and device in UE and base station for multi-antenna system
The present disclosure provides a method and a device in User Equipment and a base station for multi-antenna system. The UE first receives a first signaling, a second signaling, a first reference signal and a second reference signal; and transmits first channel information. The first and second reference signals respectively comprises Q1 RS port(s) and Q2 RS port(s), the Q1 RS port(s) and Q2 RS port(s) are respectively transmitted by Q1 antenna port(s) and Q2 antenna port(s). The first signaling and second signaling are respectively used to determine L1 antenna port(s) and Q1 antenna port(s), the Q1 antenna port(s) is(are) a subset of the L1 antenna port(s). Herein, the Q1 and Q2 are positive integers respectively, the L1 is a positive integer greater than or equal to the Q1. The first channel information corresponds to Q antenna ports, the Q is a sum of the Q1 and Q2.
US11063725B2 Adaptive mobility reference signal configuration
The invention relates to methods of configuring reference signal transmissions from one or more network nodes (12) to a wireless communication device (14) to facilitate mobility measurement reporting (MRS) by the wireless communication device. The methods comprise determining whether there is a need to include link set identifier content with one or more of the reference signal transmissions responsive to network information regarding a current mobility status of a network configuration, where each of said reference signal transmissions originate from one of the one or more network nodes (12). The method further comprises defining a configuration for each of the reference signal transmissions responsive to the determination, and configuring the one or more network nodes to implement the reference signal transmissions according to the defined configurations. The invention also relates to corresponding apparatus in one or more network nodes (12) and wireless communication devices (14) as well as computer programs.
US11063724B1 Reduced channel-sounding in MU-MIMO WLANS
A method for reducing channel sounding overhead in a MU-MIMO WLAN system, and apparatus for performing the method are disclosed. The method includes transmitting a sparse set of pilot symbols in a pseudorandom distribution across a plurality of subcarriers, from a plurality of antennas to one or more client devices on a plurality of spatial streams; receiving a sparse set of channel estimates in the frequency and spatial domains, from the one or more client devices as beamforming feedback based on the sparse set of pilot symbols; and recovering the channel in a compressed sensing framework.
US11063720B2 Sounding reference signal transmission in low latency wireless transmissions
Methods, systems, and devices for wireless communication are described that support sounding reference signal (SRS) transmission in low latency wireless transmissions. A set of shortened transmission time intervals (sTTIs) for uplink transmissions of a first wireless service may be identified; the set of sTTIs located within subframe time boundaries of a subframe of a second wireless service with a longer TTI than the sTTIs. Two or more sTTIs within the set of sTTIs may be used for SRS transmissions within the subframe time boundaries.
US11063719B2 Encoding multistage messages in a 5G or other next generation wireless network
The technologies described herein are generally directed toward link adaption for multistage messages. According to an embodiment, a system can comprise a processor and a memory that can enable operations facilitating performance of operations including determining that a control signal that was transmitted by the first device was not received by a second device, wherein the control signal comprises a first portion employing a first transmission scheme and a second portion employing a second transmission scheme. The operations can further include based on the determining that the control signal was not received by the second device, selecting a third transmission scheme for the second portion of the control signal. Further, the operations can include, based on a mapping of the third transmission scheme to a fourth transmission scheme in a mapping reference, selecting the fourth transmission scheme for the first portion of the control signal, and transmitting the control signal.
US11063715B2 Multi numerology transmission method for a radio communication system
A first network node (200), a wireless device (202) and methods therein, for radio communication. The first network node determines first (2:1) and second (2:3) numerologies for communication of a reference signal and data, respectively, the first and second numerologies defining different combinations of subcarrier spacing and time between two successive OFDM symbols. The first network node then configures (2:4) the wireless device with the first and second numerologies and transmits (2:5) an assignment of data in the second numerology to the wireless device, the assignment comprising a trigger for the reference signal. Thereby, the first network node and the wireless device can communicate (2:6) the reference signal using the first numerology, and communicate (2:7) the data using the second numerology.
US11063712B2 Systems and methods for OFDM with flexible sub-carrier spacing and symbol duration
Embodiments are provided for supporting variable sub-carrier spacing and symbol duration for transmitting OFDM or other waveform symbols and associated cyclic prefixes. The symbol duration includes the useful symbol length and its associated cyclic prefix length. The variable sub-carrier spacing and symbol duration is determined via parameters indicating the sub-carrier spacing, useful symbol length, and cyclic prefix length. An embodiment method, by a network or a network controller, includes establishing a plurality of multiple access block (MAB) types defining different combinations of sub-carrier spacing and symbol duration for waveform transmissions. The method further includes partitioning a frequency and time plane of a carrier spectrum band into a plurality of MAB regions comprising frequency-time slots for the waveform transmissions. The MAB types are then selected for the MAB regions, wherein one MAB type is assigned to one corresponding MAB region.
US11063710B2 Data transmission method and terminal device
Provided are a data transmission method and a terminal device, the method including: determining a multiplexing mode for uplink transmission; determining, according to the multiplexing mode for uplink transmission, a multiplexing mode for a first uplink signal and a second uplink signal on a target time domain resource, the first uplink signal and the second uplink signal being signals that the terminal device is scheduled to transmit on the target time domain resource at the same time; and transmitting, according to the multiplexing mode, the first uplink signal and/or the second uplink signal.
US11063700B2 Method and apparatus for constructing coding sequence
Embodiments of this application provide a method and an apparatus for constructing a coding sequence. The method includes: storing a reliability sequence corresponding to a basic sequence, where a length of the reliability sequence corresponding to the basic sequence is less than or equal to a length of a reliability sequence corresponding to a mother code sequence; storing a reliability reference sequence, where the reliability reference sequence includes at least one element remaining after the reliability sequence corresponding to the basic sequence is excluded from the reliability sequence corresponding to the mother code sequence; and constructing a coding sequence by using the reliability sequence corresponding to the basic sequence and an element in the reliability reference sequence. During implementation of this application, during storage, only the reliability sequence corresponding to the basic sequence and the reliability reference sequence are stored. Because a sum of the length of the reliability sequence corresponding to the basic sequence and a length of the reliability reference sequence is far less than the length of the original reliability sequence, storage overheads can be reduced.
US11063696B2 Increasing average power levels to reduce peak-to-average power levels using error correction codes
Disclosed in some examples are methods, systems, devices, and machine-readable mediums which optimize one or more metrics of a communication system by intentionally changing symbols in a bitstream after encoding by, an error correction coder, but prior to transmission. The symbols may be changed to meet a communication metric optimization goal, such as decreasing a high PAPR, reducing an error rate, reducing an average power level (to save battery), or altering some other communication metric. The symbol that is intentionally changed is then detected by the receiver as an error and corrected by the receiver utilizing the error correction coding.
US11063695B2 Apparatus and method for selecting candidates in a K-Best algorithm of a multiple input multiple output decoder
The invention relates to an apparatus for selecting candidates in a K-Best algorithm of a MIMO decoder. The K-Best algorithm uses a layered structure comprising a first layer and subsequent layers. In each subsequent layer 2L candidates are selected by iteratively carrying out a selection step, wherein in the selection step the apparatus is configured to calculate and select at least two candidates having minimum distance values of a candidate group, and after each iteratively carried out selection step, the selected at least two candidates are sent to a further subsequent layer for iteratively generating a further candidate group of 2L candidates in the further subsequent layer.
US11063694B2 Checksum-filtered decoding, checksum-aided forward error correction of data packets, forward error correction of data using bit erasure channels and sub-symbol level decoding for erroneous fountain codes
A method, device and system for correcting errors in a group of received packets having a redundant packet. The method includes determining an inconsistent bit indicator for a bit position of the packets, determining a bit reliability indicator indicative of a potential bit error location in at least one packet, calculating a number of potential bit error locations for the bit position and identifying a correctable bit location accordingly. A method, device and system for correcting an error in a received packet. The method is adapted to calculate a checksum value of the received packet, verify if the checksum value is indicative of at least one bit error in the received packet, identify a predefined Checksum Pattern Type (CPT) according to the checksum value and determine at least one bit error event (BEE) accordingly. A method, device and system for decoding a plurality of received fountain encoded symbols.
US11063689B2 Apparatus and method for diversity transmission in a wireless communications system
An transmission apparatus of the present disclosure comprises a transmission signal generator which, in operation, generates a transmission signal that includes a non-legacy preamble and a data field, the non-legacy preamble comprising a first field for indicating a number of spatial streams (Nss) in the data field and a second field for indicating one of a plurality of modulation and coding schemes (MCSs), wherein two or more frequency diversity transmission schemes are supported and each of the two or more frequency diversity transmission schemes is specified based on a value of the Nss; and a transmitter which, in operation, transmits the generated transmission signal.
US11063687B2 Wireless communication system with detectors for extraneous received signals
A wireless communication system having base stations, remotely located terminal units and a base station controller. The base stations and the remotely located terminal units communicate data over operational wireless communication links between them. The base stations include respective in-channel detectors and out-of-channel detectors for detecting radar or other extraneous received signals. The in-channel detectors analyse signals over the operational communication links. The out-of-channel detectors include respective out-of-channel receiver elements that monitor possibly available channels alternative to the respective operational communication link channels. The base station controller registers whether channels are available or not for communication links, and allocates to the base stations respective target channel parameters including frequencies available for operational and alternative communication links. The base stations store the respective target channel parameters for available operational and alternative communication links.
US11063678B2 Reception apparatus and data processing method
The present technology relates to a reception apparatus and a data processing method that ensure reliable reproduction of content.The reception apparatus receives content, and controls reproduction of the content on the basis of time correspondence information associating first time information provided from a transmission side of the content with second time information generated on a reception side of the content by a time axis according to the first time information corresponding to the second time information. The present technology can be applied to a television receiver compatible with ATSC 3.0, for example.
US11063676B2 Method and device for enabling testing of a communication node
The embodiments herein relate to a method performed by a testing device for enabling testing of a communication node. The testing device measures a test parameter associated with RF characteristics of the communication node when it is located at a test location during a first condition. The communication node is configured with a node setting during the measurement in the first condition. The testing device measures the test parameter associated with the RF characteristics of the communication node when it is located at the test location during a second condition. The communication node is configured with the same node setting in the second condition as in the first condition. The testing device checks whether a result parameter associated with the test parameter measured during the first and second condition fulfills a requirement.
US11063668B2 Multi-path multi-mode light signal aggregation, transmission and separation apparatus and method
A multi-path multi-mode light signal aggregation, transmission, separation apparatus and method are provided. The apparatus includes a shell, an array lens module configured to turn multi-path multi-mode light signals having different frequencies and emitted by an emitting terminal and further totally reflect the light signals to a receiving terminal, an aggregation lens module configured to aggregate the turned light signals into a single-path multi-mode light signal and further disperse the single-path multi-mode light signal into the multi-path multi-mode light signals with different frequencies, and a collimation lens module configured to collimate the aggregated single-path multi-mode light signal to an optical fiber for transmission and to collimate the received single-path multi-mode light signal to the aggregation lens module. The lens modules are arranged on a substrate in the shell. The number of optical fibers and the upgrading cost can be reduced, and the communication rate is increased.
US11063665B2 Tuneable filter grating for OWC
An optical wireless communication (OWC) receiver apparatus for receiving data streams from at least one transmitter apparatus, each data stream encoded on abeam of light of a respective different wavelength or range of wavelengths propagating through free space between the at least one transmitter apparatus and the receiver apparatus, the apparatus comprising: a wavelength-selective element configured to receive the beams after their propagation through free space and to direct a selected at least one of the beams having a selected wavelength or range of wavelengths to a detector, wherein the detector is configured to receive said selected at least one of the beams and in response to output a detection signal; at least one control element operable to control at least one physical property of the wavelength-selective element thereby to select said at least one of the beams for direction to the detector.
US11063663B2 Transponder based active monitoring of optical networks
A system is provided along a route of a network including a first transponder at a first node and a second transponder at a second node. The system further includes one or more processors configured to detect, in a first waveform measured at the first transponder, a first signature at a first time point, and configured to detect, in a second waveform measured at the second transponder, a second signature at a second time point. The one or more processors may correlate the first waveform and the second waveform, and determine, based on the correlation, that the first signature and the second signature correspond to a same event occurring along the route of the network. Based on comparing the first time point and the second time point, the one or more processors may determine an estimated location of the event.
US11063659B2 Control station, satellite station, earth station, data transmission system, and data transmission method
A control station includes: a location managing unit that calculates communicable times for combinations of a satellite station and an earth station that can perform communication with each other, based on a location of a satellite station and locations of earth stations serving as candidates to which the satellite station transmits the data; a data managing unit that holds information on a retention state of the data in the satellite having generated the data; and a transmission predicting unit that calculates data transmission completion times for one or more transmission paths from the satellite station to the earth station, based on the communicable times and the information on a retention state of the data, and generates control information for satellite stations and the earth station in a transmission path determined based on the data transmission completion times, to transmit the data in the determined transmission path.
US11063655B1 Random access and consistent LBT failure recovery
A wireless device receives configuration parameters comprising first random access parameters, associated with beam failure recovery, and second random access parameters. The wireless device may initiate, in response to detecting a beam failure on a primary cell and based on the first random access parameters, a first random access process on a first BWP of the primary cell. The wireless device may stop the first random access process in response to triggering consistent LBT failure for the primary cell. The wireless device may switch from the first BWP to a second BWP of the primary cell as an active BWP. The wireless device may initiate a second random access process on the second BWP for consistent LBT failure recovery and based on the second random access parameters.
US11063649B2 Encoding of enhanced type II channel state information
Apparatuses, systems, and methods for a wireless device to encode channel state information (CSI), e.g., enhanced type II CSI. A common frequency basis may be selected. Spatial-frequency coefficients, frequency basis related information, and/or spatial basis related information may be determined. At least a portion of the coefficients and/or information may be encoded in a CSI report.
US11063644B2 Method and apparatus for control signaling for multi-stream transmission
Methods and apparatuses for control signaling for multi-stream transmission. A method for operating a user equipment (UE) includes receiving a downlink (DL) control information (DCI) signaling and identifying, from the DCI signaling, parameters for a first codeword and an indication of control signaling for parameters for N−1 additional codewords. N is a number of codewords scheduled for the UE and N≥1.
US11063632B2 Domain establishment method
A network node includes a pushbutton to provide a button-press event and a pairer to receive the button-press event while not being in a secure domain. In response to the button-press, the pairer alternates between acting as an endpoint node and acting as a temporary domain master, until pairing is completed. In an alternative embodiment, the node includes a multi-pairer to receive the button press event and, in response, to open a pairing window, to become a domain master of a secure network and to join more than one other network node receiving a button press event to the secure network until the pairing window closes.
US11063627B2 Storage device for portable device used in luggage
A storage device adapted for portable device and suitable to be installed in luggage includes an inner housing, an outer housing and a base. The inner housing includes two parallel vertical side walls and a transverse base wall connected to bottoms of the vertical side walls. The vertical side walls are provided with a baffle plate and/or a baffle bar at both front and rear sides. The outer housing has a top opening and defines a receiving cavity to receive the inner housing. The base is arranged below the transverse base wall and includes two connecting brackets and a connecting pin. The transverse base wall has two connecting legs extending away from its bottom. The connecting legs each define a vertical waist-shaped hole and sleeve over the connecting pin through the vertical waist-shaped holes. Two sides of the base are connected to the receiving cavity in a slidable manner.
US11063619B1 Communication device that tunes an antenna by proximal association
A communication device, method, and computer program product provide an antenna subsystem including a first antenna positioned proximate to a second antenna. A radio frequency (RF) frontend includes a transmitter, a receiver, and an antenna tuning module coupled to the antenna(s). A controller is communicatively coupled to the RF frontend and a memory containing a proximal antenna association tuning (PAAT) application. The controller executes the PAAT application to enable the communication device to: (i) transmit a reference signal by the transmitter using the first antenna of the more than one antenna; (ii) measure an impedance value of the first antenna based on the transmission of the reference signal; (iii) identify a second antenna of the more than one antenna that is proximate to the first antenna; and (iv) tune, via the antenna tuning module, the first and the second antenna based on the impedance value of the first antenna.
US11063618B2 IQ mismatch estimation with pre-distortion
An IQ mismatch estimation circuit includes a raw channel estimation circuit, a reference channel estimation circuit, a digital predistortion (DPD) bin identification circuit, a channel estimate pruning circuit, and an IQ correction coefficient generation circuit. The raw channel estimation circuit generates raw channel estimates for a plurality of frequency bins of a baseband signal. The reference channel estimation circuit identifies a reference channel estimate based on the raw channel estimates. The DPD bin identification circuit identifies, based on the reference channel estimate, the frequency bins for which the raw channel estimates are based on a DPD expansion signal. The channel estimate pruning circuit generates pruned raw channel estimates by discarding the raw channel estimates of the frequency bins identified by the DPD bin identification circuit. The IQ correction coefficient generation circuit generates IQ mismatch correction coefficients based on the pruned raw channel estimates.
US11063615B2 Transmitting apparatus and mapping method thereof
A transmitting apparatus is disclosed. The transmitting apparatus includes an encoder to perform channel encoding with respect to bits and generate a codeword, an interleaver to interleave the codeword, and a modulator to map the interleaved codeword onto a non-uniform constellation according to a modulation scheme, and the constellation may include constellation points defined based on various tables according to the modulation scheme.
US11063613B2 Early termination of successive cancellation list decoding
Techniques are described herein to terminate a list decoding operation before its completion based on performing one or more error check processes. A transmitted codeword encoded using a polar code may include one or more error check vectors interspersed with one or more information vectors. Upon receiving the codeword, a decoder may perform a list decoding operation on the received codeword. Upon decoding one of the error check vectors, the decoder may determine whether at least one candidate path used in the successive cancellation list decoding operation passes an error check process based on the error check vector. If no candidate paths satisfy the error check process, the decoder may terminate the list decoding operation. In some examples, the decoder may recheck whether candidate paths satisfy the error check operation at intermediate positions between error check vectors. Such rechecking may occur while decoding information vectors.
US11063610B2 Transmitting apparatus and signal processing method thereof
A transmitting apparatus and a receiving apparatus are provided. The transmitting apparatus includes: an encoder configured to generate a low density parity check (LDPC) codeword by performing LDPC encoding; an interleaver configured to interleave the LDPC codeword; and a modulator configured to modulate the interleaved LDPC codeword according to a modulation method to generate a modulation symbol. The interleaver is formed of a plurality of columns including a plurality of rows, respectively, and comprises: a block interleaver configured to divide each of the plurality of columns into a first part and a second part, and interleave a plurality of bit groups constituting the LDPC codeword, all bit groups interleaved by the first part are interleaved as bits included in a same bit group are written in a same column of the first part, at least one bit group interleaved by the second part is interleaved as bits included in the at least one bit group are divided and written in at least two columns constituting the second part.
US11063601B1 File system format for persistent memory
Techniques are provided for implementing a file system format for persistent memory. A node, with persistent memory, receives an operation associated with a file identifier and file system instance information. A list of file system info objects are evaluated to identify a file system info object matching the file system instance information. An inofile, identified by the file system info object as being associated with inodes of files within an instance of the file system targeted by the operation, is traversed to identify an inode matching the file identifier. If the inode has an indicator that the file is tiered into the persistent memory, then the inode it utilized to facilitate execution of the operation upon the persistent memory. Otherwise, the operation is routed to a storage file system tier for execution by a storage file system upon storage associated with the node.
US11063595B1 Dynamic multiphase injection-locked phase rotator for electro-optical transceiver
Presented herein are methodologies for generating clock signals for transceivers that rely on frequency and phase error correction functions. The methodology includes generating a differential clock signal at a fundamental frequency, generating, based on the differential clock signal and using a multiphase generator, four quadrature signals at the fundamental frequency, supplying the four quadrature signals to an injection-locked phase rotator, and outputting, from the injection-locked phase rotator, a phase adjusted multiphase clock signal based on the four quadrature signals.
US11063592B2 Integrated clock gating circuit
An integrated circuit gating circuit includes a first control stage that outputs a first internal signal based on an enable signal and a clock signal, a second control stage that outputs a second internal signal based on the first internal signal and the clock signal, and an output driver that outputs an output clock signal based on the second internal signal. The second control stage includes a first multi-finger transistor that is connected between a second node outputting the second internal signal and the 0-th node and operates based on the clock signal. A first portion of the first multi-finger transistor is formed in a first row defined on a semiconductor substrate, and a second portion of the first multi-finger transistor is formed in a second row defined on the semiconductor substrate.
US11063591B2 Multi-termination scheme interface
In an embodiment, a method includes programming a control signal that specifies a target resistance and a target voltage in a circuit. The method further includes sending the control signal to at least one transistor configured to control a current flow in the circuit. The method further includes providing, as an output, a signal with the target voltage and target resistance.
US11063588B1 Reset device, circuit device, and resetting method
A reset device includes a power-on reset (POR) circuit configured to output a reset signal to reset a circuit part to an initial state when supply voltage is lower than a threshold level, a first switch provided in a path connecting a first line to supply the supply voltage to the circuit part and a second line to supply the supply voltage to the POR circuit, a second switch provided in a path connecting a signal line of the circuit part and the second line, and a control circuit configured to turn on the first switch and turn off the second switch in a normal mode, and to turn off the first switch and turn on the second switch in a test mode. The control circuit turns on the first switch and turns off the second switch in response to the reset signal being output from the POR circuit.
US11063586B2 Main-auxiliary field-effect transistor configurations with an auxiliary stack and interior parallel transistors
Disclosed herein are switching or other active FET configurations that implement a branch design with one or more interior FETs of a main path coupled in parallel with one or more auxiliary FETs of an auxiliary path. Such designs include a circuit assembly for performing a switching function that includes a branch with a plurality of auxiliary FETs coupled in series and a main FET coupled in parallel with an interior FET of the plurality of auxiliary FETs. The body nodes of the FETs can be interconnected and/or connected to a body bias network. The body nodes of the FETs can be connected to body bias networks to enable individual body bias voltages to be used for individual or groups of FETs.
US11063585B2 Method of tuning light color temperature for LED lighting device and application thereof
A theory and a technical foundation for building a technical framework of a color temperature tuning technology are disclosed composing a power allocation algorithm and a power allocation circuitry, wherein the power allocation algorithm is a software for designing a process of dividing and sharing a total electric power between at least a first LED load with a color temperature CT1 and a second LED load with a color temperature CT2 to generate at least one paired combination of a first electric power X allocated to the first LED load and a second electric power Y allocated to the second LED load to create at least one mingled light color temperature CTapp thru a light diffuser according to color temperature tuning formulas CTapp=CT1·X/(X+Y)+CT2·Y/(X+Y) and X+Y=constant; and the power allocation circuitry is a hardware designed for implementing the process.
US11063583B2 Multi-sense circuit for parallel-connected power switches
A multi-sense circuit includes a transistor circuit having sense nodes and a gate node, a peak detector having inputs coupled to the sense nodes of the transistor circuit and an output, and a control circuit having a gate control node coupled to the gate node of the transistor circuit and an overcurrent protection node coupled to the output of the peak detector.
US11063582B2 Current detection circuit
A current detection circuit includes normally-on-type and a first normally-off-type switching elements with main current paths that are connected in series, and a second normally-off-type switching element that has a source and a gate that are connected to a source and a gate of the first normally-off-type switching element and a drain that is connected to a constant current source, and executes a division process by using drain voltages of the two normally-off-type switching elements.
US11063581B2 Transistor control circuit
A method includes simultaneously controlling several transistors by a first signal and separately controlling the transistors by distinct second pulsed signals.
US11063579B2 Circuit for providing variable waveform excitation
A circuit for testing an electronic component, such as a transformer, includes at least two power supplies and at least two H bridge circuits. A first H bridge circuit is conductively coupled in parallel to a first power supply. A second H bridge circuit is conductively coupled in parallel to a second power supply. The second H bridge circuit includes one or more anti-series diodes for preventing current from the first power supply from passing through the second H bridge circuit to the second power supply. The first H bridge circuit and the second H bridge circuit are configured to conductively couple to the electronic component for providing a voltage with a predefined waveform to the electronic component.
US11063578B2 Level conversion device and method
A device is disclosed and includes a first switch, a second switch, and a selector. The first switch outputs a first output signal at a first terminal thereof. The second switch is coupled to the first switch at a second terminal of the first switch. The second switch outputs a second output signal at the second terminal of the first switch in response to an input signal. The selector outputs, in response to the input signal received at two terminal of the selector, one of the first and second output signals as a third output signal. The third output signal has a logic value different from the input signal.
US11063570B2 Integrated isolator circuit in a time division duplex transceiver
An integrated isolator circuit for isolating receiver and transmitter in a Time-Division Duplex transceiver is disclosed. The integrated isolator circuit comprises a first node, a second node and a third node. The integrated isolator circuit further comprises a first capacitor connected in series with a first switch and connected between the first and second nodes. The integrated isolator circuit further comprises a first inductor connected between the first and second nodes and a second capacitor connected between the second node and the third node. The first switch has an on state and an off state, and the integrated isolator circuit is configured to have a different impedance at a certain operating frequency by controlling the state of the first switch.
US11063568B2 Resonance device manufacturing method
A method for adjusting a resonant frequency of a resonator without impairing piezoelectricity that includes preparing a lower lid; arranging a substrate with a lower surface that faces the lower lid and forming a first electrode layer, a piezoelectric film, and a second electrode layer on an upper surface of the substrate. Moreover, a vibration arm is formed that bends and vibrates from the first electrode layer, the second electrode layer, and the piezoelectric film and an upper lid faces the lower lid with the resonator interposed therebetween. The method further includes adjusting a frequency of the resonator before or after arranging the upper lid by exciting the vibration arm by applying a voltage between the first electrode layer and the second electrode layer and by causing a part of the vibration arm to collide with either or both of the lower lid and the upper lid.
US11063567B2 Input circuit with wide range input voltage compatibility
An input circuit includes an input stage having an input node and a direct-current (DC) amplifier coupled to the input node. The input circuit also includes an alternating-current (AC) amplifier coupled to an output node of the DC amplifier. The input circuit also includes a capacitor coupled between the input node and the output node of the DC amplifier. The input circuit also includes a voltage divider coupled to the DC amplifier and the AC amplifier. The voltage divider includes first resistor associated with the DC amplifier and a second resistor associated with the AC amplifier, where the first resistor is larger than the second resistor.
US11063566B2 RF module and method for testing an RF module
An RF module with improved testing capabilities is provided. The module has a first switch with signal outputs and an additional auxiliary connection connected to an auxiliary terminal. The auxiliary terminal can be connected to an RF filter while a power amplifier is decoupled from the filter.
US11063565B2 Audio amplifier assemblies, processes, and methods
An amplifier having one or more channels where each channel includes a two half bridges (a master and slave sub-channel). The sub-channels can be connected either in parallel or in a full-bridge configuration via internal switches that route signals to a pair of speaker jacks. One switch in the amplifier has a first position that selectively connects the outputs of the master and slave sub-channel to the same input of the speaker load so that the two sub-channels will drive the speaker load in parallel and a second position where the output of the slave sub-channel is connected to another input of the speaker load so that the master sub-channel and the slave sub-channel will drive the speaker load in a Full-bridge configuration. A second switch has a first position that connects a second input of the speaker load to ground or reference potential of the sub-channels when the speaker load is to be driven in parallel and a second position that is a No-connect position that is used when the speaker load is driven in the Full-bridge configuration and a ground potential is not to be connected to the speaker.
US11063562B2 Programmable filter in an amplifier
The disclosure provides an amplifier. The amplifier includes a first transistor that receives a first input and generates a first load current. A first output node is coupled to a power supply through a first load resistor. The first load resistor receives the first load current. A first capacitor network is coupled to the first output node and draws a first capacitive current from the first output node. A first current buffer is coupled between the first output node and the first transistor. A current through the first current buffer is a summation of the first load current and the first capacitive current.
US11063559B2 High-implant channel semiconductor device and method for manufacturing the same
A method for manufacturing a semiconductor device including an upper-channel implant transistor is provided. The method includes forming one or more fins extending in a first direction over a substrate. The one or more fins include a first region along the first direction and second regions on both sides of the first region along the first direction. A dopant is shallowly implanted in an upper portion of the first region of the fins but not in the second regions and not in a lower portion of the first region of the fins. A gate structure extending in a second direction perpendicular to the first direction is formed overlying the first region of the fins, and source/drains are formed overlying the second regions of the fins, thereby forming an upper-channel implant transistor.
US11063554B1 Systems and methods for solar forecasting
The present disclosure provides a method for controlling a solar power plant comprising a plurality of solar modules. The method may comprise (a) obtaining irradiance data at a first time and a second time from a plurality of sensors disposed among or adjacent to the plurality of solar modules; (b) processing the irradiance data at the first time and the second time to generate an output that indicates whether one or more solar modules of the plurality of solar modules will be covered by a shadow or shade at a third time; (c) generating, based at least in part on the output, a power output prediction for the plurality of solar modules at the third time; and (d) adjusting a power output of the solar power plant based at least in part on the power output prediction.
US11063553B2 Solar carports, solar-tracking carports, and methods
A solar tracking carport comprises a supporting structure including a foundation and at least two columns connected or connectable to the foundation; a three-dimensionally rigid canopy deck having a length from a first edge to a second edge of at least one car, the three-dimensionally rigid canopy deck including one or more upper blocks, each of the upper blocks being rigid at least in its longitudinal direction, each of the upper blocks including at least one solar panel; a deck frame configured to support the one or more upper blocks, the deck frame including a torque transmitting member; a rotation enabling connection configured to rotatably connect at least the torque transmitting member of the three-dimensionally rigid canopy deck to the at least two columns of the supporting structure; and a drive system configured to control tilting of the three-dimensionally rigid canopy deck about the supporting structure over one axis of rotation to a first maximum angle in a first direction and to a second maximum angle in a second direction, the first maximum angle preventing the first edge of the three-dimensionally rigid canopy deck from going below a first minimum threshold height, the second maximum angle preventing the second edge of the three-dimensionally rigid canopy deck from going below a second minimum threshold height.
US11063552B2 Solar module
The present disclosure provides a solar module including an encapsulation layer, a plurality of solar cells embedded in the encapsulation layer with gaps between the solar cells; and a first patterned layer formed on the encapsulation layer and corresponding to locations of the gaps so as to absorb the light penetrating through the gaps, thereby shielding buildings from sunlight and thus saving energy.
US11063551B2 Solar cell module and roof structure
A solar cell module includes a solar cell section and a step forming plate. The solar cell section includes a front side transparent plate, a back surface member, and a solar cell sealed therebetween. The step forming plate is disposed on a front side of the front side transparent plate, overlapping partly with the front side transparent plate and forming a step between the solar cell section and the step forming plate.
US11063543B2 Electric working machine and voltage supplier
A voltage supplier in one aspect of the present disclosure includes a first voltage generator, a second voltage generator, a first switcher, a second switcher, a first booster, and a second booster. The first booster boosts a voltage lower than a first switching drive voltage to thereby generate the first switching drive voltage, and supplies the first switching drive voltage to the first switcher on a first supply path. The second booster boosts a voltage lower than a second switching drive voltage to thereby generate the second switching drive voltage, and supplies the second switching drive voltage to the second switcher on a second supply path.
US11063542B2 Motor drive apparatus and electric power steering apparatus
A motor driving apparatus that drives a motor includes a controller that outputs a driving signal indicating a driving amount of the motor, a driver including a plurality of inverter circuits, each of which supplies an electric current supplied from an external power supply to the motor based on the driving signal outputted from the controller, and first temperature sensors, each of which measures a temperature of a separate one of the plurality of inverter circuits. A first temperature difference is defined as the temperature of one of the inverter circuits minus the temperature of a remaining one of the inverter circuits. The controller, when the first temperature difference is equal to or greater than a predetermined difference value at a specific time point, outputs a driving signal indicating a second driving amount smaller than a first driving amount to the one of the inverter circuits.
US11063537B2 Control method of a direct current electric motor
The present invention concerns a method of controlling a rotational speed of a rotor (3) of a direct current electric motor (1) comprising an inductor circuit (A, B) for rotating the rotor, which is configured to rotate continuously and is equipped with permanent magnets. The method comprises: measuring the rotational speed of the rotor; determining a time drift in the rotor rotation compared to a reference signal; defining N speed thresholds with at least one being a variable speed threshold depending on the determined time drift, the N speed thresholds defining N+1 rotational speed ranges for the rotor; determining in which one of the N+1 rotational speed ranges the determined rotational speed of the rotor is; and finally selecting an action relative to the control of the inductor circuit, based on the determined rotational speed range, for controlling the rotational speed of the rotor.
US11063536B2 Mining vehicle and method for starting an AC electric motor of a mining vehicle
For starting an AC electric motor of a mining vehicle, it is first accelerated to a first speed with a second AC voltage provided by an onboard battery-powered inverter of the mining vehicle. A phase of a first AC voltage taken from an external grid is compared to a phase of said second AC voltage. If the phase difference between the first and second AC voltages is larger than a predetermined limit, the speed at which said inverter rotates said AC electric motor is changed. If the difference between the phases of the first and second AC voltages is smaller than the predetermined limit, a change is made from rotating the AC electric motor with the second AC voltage to rotating the AC electric motor with the first AC voltage.
US11063535B2 Steering motor brake
This disclosure describes a method for shorting one or more windings in a steering motor. The method determines that a signal has not been received at a circuit from a processor. The method discharges a first capacitor in the circuit in response to the circuit not receiving the signal from the processor. The method turns on a first plurality of transistors via a resistor in response to discharging the first capacitor. The method turns on a second plurality of transistors in response to turning on the first plurality of transistors. The method sends a short circuit signal from the second plurality of transistors to a steering motor.
US11063533B2 Control circuit for controlling a resonant power converter
The present invention relates to a control circuit (10) for controlling a resonant power converter. It is described to generate (210) a modulation signal. A carrier signal is generates (220), wherein the generation of the carrier signal comprises measuring at least one signal from the power converter. A switching signal is generated (230) that is useable to control a value of at least one magnitude of the resonant power converter based on the modulation signal and the carrier signal.
US11063531B2 Series connected DC input inverters
A multi-level converter includes a first multi-phase inverter and a second multi-phase inverter. The first multi-phase inverter includes a first direct current (DC) positive line, a first DC negative line, and a first plurality of alternating current (AC) lines. Each AC line of the first plurality of AC lines is configured to be connected to a single phase winding of an electric machine. Each single phase winding is connected to a common neutral connector in a Y-winding configuration or between a pair of single phase windings in a Δ-winding configuration. The second multi-phase inverter includes a second DC positive line, a second DC negative line, and a second plurality of AC lines and is connected in a similar manner to the first multi-phase inverter. The first DC negative line is electrically coupled to the second DC positive line to connect the first multi-phase inverter and the second multi-phase inverter in series.
US11063530B2 Method for removing direct current component at output terminal of MMC converter
A method of removing a direct current component at an output terminal of an MMC converter according to the present invention includes a detection step of individually detecting charging voltages charged in capacitors of a plurality of sub-modules connected in series to each other in the MMC converter; outputting an average value of the individually detected charging voltages; delaying the outputted average value by a predetermined phase to output a phase-delayed average value; outputting the average value and the phase-delayed average value as a q-axis component voltage by using a predetermined dq conversion unit; calculating an error between the q-axis component voltage and a three-phase average voltage for the q-axis component voltage; and outputting, through a pre-determined first PI control unit, an offset voltage for reducing the error.
US11063528B2 Generating an alternating-current voltage with a high frequency multi-level inverter
A multi-level inverter having at least two banks, each bank containing a plurality of low voltage MOSFET transistors. A processor configured to switch the plurality of low voltage MOSFET transistors in each bank to switch at multiple times during each cycle.
US11063527B2 Converter
An electrical converter (203) having an active diode-clamped multilevel topology is shown. Each clamping diode is connected in antiparallel with a switch (S5A, S5B). The converter comprises polyphase supply phases (A, B, C) each of which are connected via a respective phase leg (401, 402, 403) to dc rails (301, 302) and a dc-link capacitor. The dc-link capacitor includes a plurality of series-connected capacitors (404, 405). A controller is configured to, in response to an event signal, for each phase leg, activate a combination of switches therein to form a pair of parallel conduction paths to a midpoint (406) between two capacitors in the dc-link capacitor, thereby connecting each phase to the same node.
US11063523B2 DC/DC converter and control method thereof
A DC/DC converter includes: a first capacitor and a second capacitor coupled to a first node; a five-port network coupled to the first to fifth nodes; a transformer electrically connected to the fourth and fifth nodes; and a secondary side circuit electrically connected to a secondary winding of the transformer and coupled to a load; the control method includes: controlling, when the load is less than a preset value, switching states of multiple switches in the secondary side circuit, causing the transformer to be short-circuited for at least a first time period during a phase of stopping energy transmission; and controlling switching states of multiple switches in the five-port network during the first time period, causing current to flow from the five-port network to the first node or flow from the first node to the five-port network.
US11063522B2 Converter for improving conversion efficiency
A converter includes an input capacitor, a primary-side switching circuit, a magnetic element circuit, a secondary-side switching circuit, and an output capacitor. Primary-side switching circuit includes a first positive voltage terminal and a first negative voltage terminal. First positive voltage terminal is coupled to one terminal of an input voltage. First negative voltage terminal and first positive voltage terminal are coupled to the input capacitor. Magnetic element circuit is coupled to primary-side switching circuit. Secondary-side switching circuit is coupled to magnetic element circuit. Secondary-side switching circuit includes a second positive voltage terminal and a second negative voltage terminal. Second positive voltage terminal is coupled to first negative voltage terminal. Second negative voltage terminal is coupled to another terminal of the input voltage, and second negative voltage terminal and second positive voltage terminal output an output voltage together. Output capacitor is coupled to secondary-side switching circuit.
US11063521B2 Switching power supply
A switching power supply includes a current resonance-type DC-DC converter that has an auxiliary winding provided on the primary side of a transformer, divides a voltage, which has been generated in the auxiliary winding by a current resonance operation, using a voltage divider circuit formed of resistors, and supplies, to a control IC, the divided voltage as a detection voltage for the resonant voltage for setting a timing for turning off a switching element. A phase correcting capacitor is provided between the auxiliary winding and the voltage divider circuit and corrects a delay in switching timing by setting the phase of the voltage of the voltage divider circuit ahead of the voltage of the auxiliary winding.
US11063515B2 Power converter
A power converter is provided. The power converter includes a switched-capacitor conversion circuit and an inductor buck circuit. The switched-capacitor conversion circuit receives an input voltage and operates according to a first operation frequency to convert the input voltage to an intermediate voltage. The inductor buck circuit is coupled to the switched-capacitor conversion circuit in series. The inductor buck circuit receives the intermediate voltage and operates on a second operation frequency to generate an output voltage at a conversion output terminal according to the intermediate voltage. The first operation frequency is determined according to the second operation frequency.
US11063514B2 Methods and apparatuses for voltage regulation using predictively charged precharge rails
A voltage regulator circuit using predictively precharged voltage rails is generally disclosed. For example, the voltage regulator circuit may include a main switching regulator configured to provide a target voltage, the main switching regulator having a first voltage node, a precharge switching regulator configured to provide a precharge voltage, the precharge switching regulator having a second voltage node, the precharge voltage based on a difference between the target voltage and a next target voltage to be provided by the main switching regulator, and a precharge switch circuit configured to selectively couple the second voltage node to an output voltage node based upon a transition from the target voltage to the next target voltage.
US11063512B1 Power conversion system
A power conversion system includes a first and a second energy storage element, a first boost circuit, a switching element, a control circuit and a detection circuit. The first boost circuit is coupled between the first and the second energy storage element. The switching element is coupled to the first boost circuit in parallel. When the first voltage value is lower than a first preset level, the control circuit turns off the switching element and drives the first booster circuit to maintain a second voltage value according to the first voltage value, so that the power conversion system operates in a first state. When the first voltage value is equal to or larger than the first preset level, the control circuit turns on the switching element and turns off the first boost circuit, so that the power conversion system operates in a second state.
US11063510B2 Switching power converter with improved power factor correction via feedback signal averaging
The feedback loop of a switching power converter controller is provided with an averaging circuit that averages either an output voltage, an error signal, or a control voltage. Regardless of which feedback signal is averaged, the averaging occurs over a first cycle of a rectified input voltage to form an averaged signal that is used by the feedback loop in a subsequent cycle of the rectified input voltage.
US11063509B2 Step-up switching power supply circuit
A step-up switching power supply circuit executes a step-up operation for stepping up an input voltage supplied through an input terminal. The step-up switching power supply circuit includes: an inductor; a switching element enlarging a current flowing through the inductor when the switching element is turned on; a step-up control circuit controlling the switching element to execute the step-up operation; a fault detection control circuit controlling the switching element to detect a fault of the switching element; a current detection unit detecting a current flowing through the switching element; and a switching unit executing switchover between the step-up control circuit and the fault detection control circuit to control the driving the switching element, Prior to execution of the step-up operation, the switching unit switches the fault detection control circuit to control the switching element.
US11063508B2 Controller for a multi-phase converter and fault detection method thereof
A fault detection method for a multi-phase converter is: sampling currents flowing through a plurality of switching circuits to generate a plurality of current sampling signals; generating a plurality of digital current signals based on a plurality of current sampling signals; generating a plurality of on-time adjustment signals based on differences between each of the plurality of digital current signals and a reference current signal; averaging the plurality of on-time adjustment signals to generate an average adjustment signal; subtracting each of the plurality of on-time adjustment signals from the average adjustment signal to generate corresponding plurality of adjustment error signals; comparing each of the plurality of adjustment error signals with a threshold signal to generate a plurality of fault signals; and adjusting control signals of the plurality of switching circuits based on the plurality of fault signals.
US11063507B2 Electronic apparatus capable of suppressing negative effects of a switching operation of a power source and control method
An electronic apparatus includes a power source unit and a control unit. The power source unit includes a first inductor, a second inductor different from the first inductor, and a switching unit that performs switching so that one of the first and the second inductor is used. The power source unit is capable of operating in a first operation mode or a second operation mode different from the first operation mode. The control unit determines which one of the first and the second operation modes the power source unit is caused to operate in, and causes the switching unit to perform switching so that the first inductor is used in the power source unit when operating in the first operation mode and the second inductor is used in the power source unit when operating in the second operation mode.
US11063505B2 Motor control apparatus equipped with boosting unit
A motor control apparatus includes: a converter configured to convert AC voltage input from an AC power supply side into DC voltage, and then output the DC voltage to a DC side; an inverter configured to convert DC voltage input from the DC side into AC voltage for driving a motor, and then output the AC voltage; and a boosting unit configured to step up DC voltage input to the inverter from the DC side, according to a deviation between a speed command to the motor and speed information acquired from the motor.
US11063500B2 Method and apparatus for manufacturing a stator of a dynamo-electric machine
The method and apparatus comprise the following features: —forming coil members (21) by bending an electric conductor (20) externally coated with an outer insulation (20′); wherein the bending is made at predetermined lengths from a reference position (16′), and wherein each one of the coil members (21), when formed, comprises at least one head portion (21′) and leg portions (21″) extending from said at least one head portion (21′); —feeding the electric conductor (20) to accomplish the bending; —cutting the electric conductor (20) to detach a formed coil member (21) from said electric conductor (20); —inserting the leg portions (21″) of the coil members (21) into slots of the stator, so that parts of said leg portions (21″) extend from one end of the stator and the head portions (21′) extend from an opposite end of the stator; —arranging at least one laser beam (13′a, 13′b) to remove the insulation (20′) from predetermined areas (20a, 20b) of the electric conductor (20); —radiating the surface of the electric conductor (20) with said at least one laser beam (13′a, 13′b) situated at a predetermined position (IP, 2P) with respect to the reference position (16′) along the length of the electric conductor (20) being fed, and at a predetermined stage of the bending of a coil member (20).
US11063493B1 System and installation with a rail vehicle movably arranged on a rail part
A system and installation with a rail vehicle movably arranged on a rail part, includes a first part and a second part. The first part and the second part are movable in parallel relative to each other in a movement direction. The first part has a winding around a leg of a coil core, e.g., a center leg, and the first part has a guide, e.g., a linear guide, and a permanent magnet situated so as to be movable in parallel with the movement direction, e.g., in a linear fashion. The permanent magnet is guided by the guide, e.g., in the movement direction, and, for example, is limited in the front and back in the movement direction.
US11063490B2 Motor and motor housing
One embodiment relates to a motor comprising: a motor housing comprising a first housing and a second housing; a stator disposed in the motor housing; a coil wound around the stator; a rotor rotatably disposed in the stator; a shaft coupling with the rotor; a bearing for supporting the shaft; and a busbar terminal connected with an end portion of the coil, wherein the first housing comprises a body part and a first flange, the body part comprising a first region, and a second region extending from the first region, and the first flange extending in a vertical direction from an end portion of the second region, and the busbar terminal and the bearing are disposed in the first region. Accordingly, the structure of the motor may be simplified, and a gap due to tolerance among components may be minimized, and thus the reliability of the motor may be enhanced.
US11063489B2 Fractional slot electric motors with coil elements having rectangular cross-sections
Described herein are fractional slot electric motors with compact crowns. A motor comprises multiple coil elements protruding through a stator core and forming electrical connections with each other and/or with a lead assembly. The lead assembly comprises phase busbars connected to selected coil elements and comprising terminals for connecting to an external power supply. The lead assembly also comprises neutral busbars, with no external connections and internally connected to other coil elements. Each coil element has a rectangular cross-sectional profile to maximize the slot-fill-ratio of the motor, Each coil element is electrically coupled to two other components. For example, each looped coil element is coupled to two other coil elements at a stator side, opposite the lead assembly. Each extended coil element is coupled to another coil element at that same side and coupled to another coil element or a busbar at the lead assembly side.
US11063479B1 Method of detecting presence of implanted power transfer coil
A method and apparatus related to detecting the presence of a power transfer coil implanted in a patient are disclosed. According to the aspect, an external device of a medical implant system is provided, the external device having an external coil and processing circuitry. The processing circuitry is configured to monitor a resonance frequency associated with the external coil. When the resonance frequency changes as a distance between the external coil and an expected location of an internal coil, then the processing circuitry is configured to conclude that the internal coil has been detected. When the resonance frequency ramps up to a steady state value at a rate that falls below a rate threshold, then the processing circuitry is configured to conclude that the internal coil is connected to an internal load.
US11063475B1 Power transfer and harvesting system having anchor-shaped antennas
A wireless power transfer and harvesting system that can be integrated with fabric is provided. The wireless power transfer and harvesting system includes a transmitter antenna for wirelessly transferring power and a receiver antenna operatively coupled to the transmitter antenna for receiving the power. At least one of the transmitter antenna and the receiver antenna can be formed with a shape of an anchor to inhibit effects of lateral and/or angular positional misalignments of the transmitter antenna or the receiver antenna upon power transfer efficiency of the system.
US11063474B2 Wireless power supply system and non-transitory tangible computer-readable storage medium
A wireless power supply system is provided to include a headset and a vehicle-side system. The headset, which is attached to a head of a driver of a vehicle, is configured (i) to generate an electric power by using a received electromagnetic wave, (ii) to actuate a sensor with the generated electric power to measure an activity of the driver, and (iii) to transmit activity measurement data indicating a measurement result. The vehicle-side system, which is provided to the vehicle, is configured (i) to transmit the electromagnetic wave, (ii) to receive the activity measurement data from the headset, and (iii) to monitor the activity of the driver based on the received measurement data. The transmitting or receiving state of the electromagnetic wave is monitored to provide a monitoring result, which is to be notified.
US11063471B2 Battery modules having detection connectors and related systems
A battery module is provided including a battery module connector configured to engage with a backplane connector on a backplane board associated with an uninterruptible power supply (UPS). When the battery module connector is engaged with the backplane connector a circuit is completed that instantaneously indicates to the UPS that the battery module is connected. When the battery module connector is disengaged from the backplane connector the circuit is opened and instantaneously indicates to the UPS that the battery module is disconnected.
US11063467B2 Power delivery monitor and control with an uninterruptible power supply
Example implementations relate to power delivery monitor and control with an uninterruptible power supply (UPS). For example, a UPS includes a power output receptacle to supply power to a power extension bar coupled to the UPS via a power cable, the extension bar to provide the power to a plurality of computing devices coupled to the extension bar. The UPS also includes a data communication port to couple the UPS to the extension bar via a communication cable, and a controller module to monitor and control power delivered to a plurality of power output receptacles on the extension bar.
US11063465B2 Switching mode front end surge protection circuit
A switching mode front end surge protection circuit protects downstream devices from a load dump. Specifically, the switching mode front end surge protection circuit includes a metal-oxide-semiconductor field-effect transistor (MOSFET) that operates in either one of two modes based on an input voltage provided by an alternator. When the input voltage is less than a voltage threshold value, the MOSFET operates in a pass-through mode. When the input voltage is greater than the voltage threshold value, the MOSFET operates in a switching mode to oscillate between an on state and an off state.
US11063463B2 Wearable device
Disclosed are various embodiments relating to a wearable device. According to an embodiment, a wearable device including a wireless charging device may include: a housing of the wearable device; first and second straps connected to the housing; first and second buckles provided on the first and second straps; a reception resonator provided in the housing to receive power transmitted from the outside; and a wireless power reception module provided in the housing and electrically connected to the reception resonator. Various other embodiments can be made.
US11063457B2 Automatic shutdown device for battery-powered electronics
Apparatus, methods, and systems according to which shutdown features are provided to battery-powered electronics. An automatic shutdown device detects periods in which the battery-powered electronics are motionless using a sensor and, based on such detection, disconnects the battery from the battery-powered electronics using an electronic switch, rendering the battery-powered electronics inoperable. In addition, the automatic shutdown device is able to reenergize the battery-powered electronics using the electronic switch once motion is detected by the sensor so that the battery-powered electronics can resume normal operations. In several embodiments, the battery-powered electronics include a keyless fob associated with a vehicle and the automatic shutdown device is part of a vehicle theft prevention system.
US11063455B2 Method for adapting the voltage supplied by a high-performance electrochemical storage device, and a system for operating a load
A method and system for adapting the voltage supplied by a high performance electrochemical storage device provide for: supplying a voltage for a load using a high-performance electrochemical storage device; monitoring the temperature of the high-performance electrochemical storage device; an adapting the voltage supplied by the high-performance electrochemical storage device as a function of a change in the monitored temperature thereof in a way that counters a change in the value of the power density of the high-performance electrochemical storage device attributable to the temperature change.
US11063454B2 Battery control method and apparatus
A battery control method that calculates a boosting ratio for converters based on voltage values of batteries and a preset voltage value, and transmits the calculated boosting ratio to the converters is disclosed. The converters are configured to boost output voltages of the batteries based on the calculated boosting ratio, and a sum of the boosted output voltages is equal to the preset voltage value.
US11063453B2 Supplemental batteries for electronic devices
One embodiment provides a device, including: a display device disposed in a device housing; a main battery disposed in the device housing; a supplemental battery disposed proximate to the display device; and a processor operatively coupled to the display device. Other aspects are described and claimed.
US11063451B2 Battery management system
A battery management system for a main system of an electronic device is provided. The battery management system is electrically connected with plural battery units. The battery management system includes plural insertion slots and a battery detachment protection device. The insertion slots electrically connected with the main system. The plural battery units are docked with the corresponding insertion slots. The battery detachment protection device is electrically connected with the main system. When an external force is applied to the battery detachment protection device, the battery detachment protection device generates a system protection sensing signal. In response to the system protection sensing signal, a power supply condition of at least one battery unit in the corresponding insertion slot is adjusted, and the at least one battery unit in the corresponding insertion slot is permitted to be detached from the corresponding insertion slot or positioned in the corresponding insertion slot.
US11063442B2 Energy generation, storage and management system
A system for generating, storing and managing energy features a solar-power center, a wind-power center, a hydrogen-power center with hydrogen fuel cells, a hydrogen supply center operable for producing hydrogen, and an energy storage center with both hydrogen storage tanks and one or more rechargeable batteries. An energy management subsystem monitors energy consumption from the system and available energy reserves at the power storage center, and manages the different centers based at least partly on the monitored consumption and reserves. A cooling loop circulates hydrogen for cooling of mechanical and electrical equipment, while heating loops use fuel cell waste heat and collected solar thermal energy for heat-requiring applications, such as warming of the battery storage in cold weather climates. Black-out/brown-out restart capability is included, as well as novel wind turbines whose rotor heights are autonomously adjusted to an optimal elevation based on wind conditions.
US11063441B2 Systems and methods for managing resonance in wind turbine power systems
Systems and methods for managing or controlling resonance in wind turbine power systems are provided. In particular, a method for controlling a power system that includes a central master controller and one or more wind turbines electrically connected to a power grid through a point of interconnection can be provided, where each wind turbine includes a voltage regulator. The method can include receiving, by the controller, a signal from a sensor associated with wind turbines and determining, which wind turbines are operating in conditions indicative of a resonance condition in the wind turbine electrical power system based, at least in part, on the sensor signals. The method can also include generating one or more control signals based, at least in part, on a power requirement at the point of intersection and controlling an operational state of each of the voltage regulators based on the control signals.
US11063438B2 Power control apparatus and power control method
A power control apparatus capable of stable transition of a set voltage is provided. A power control apparatus includes a DC to DC converter connected to a DC bus line, a communication unit that communicates with another power control apparatus, and a control unit that controls power interchange with the other power control apparatus through the DC bus line, in which the control unit controls at least a control mode and a droop rate, the control mode includes a first mode for controlling a voltage of the DC bus line, a second mode for controlling a current flowing through the DC bus line, and a third mode for stopping the power interchange, and when the control mode is shifted from the first mode to the second mode or the third mode, the control unit controls the droop rate to be set to a predetermined value other than 0%.
US11063435B2 Energy-based adaptive stability control system
An adaptive stability control system includes a direct current (DC) bus and one or more distributed controllers. The DC bus is configured to provide bidirectional pulsed power flow and energy storage. The distributed controller is configured to continuously measure an impedance of the DC bus and execute at least one adaptive control algorithm to regulate impedance of the DC bus to maintain stability of the bidirectional pulsed power flow and energy storage.
US11063433B2 Fast post-fault phase reactance balancing
Disclosed is a reactance-injecting module used to balance the currents among the phases of polyphase electric power transmission lines or to manage power flow among alternate paths, where the reactance-injecting module has high-speed, dedicated communication links to enable the immediate removal of injected reactance from all phases of a phase balancing cluster when a fault is detected on any one of the multiple phases. The reactance-injecting module may communicate information on a detected fault to the other reactance-injecting modules of the phase balancing cluster within 10 microseconds after the fault is detected to allow the phase balancing cluster to eliminate injected reactance from all phases within 1 millisecond after the fault is detected. This provides extremely fast neutralization of injected reactance to minimize interference with fault localization analyses.
US11063432B2 System and method for incorporating distributed energy generation in legacy electricity generation and distribution systems
In the present legacy electrical power generation and distribution system, the power quality delivered to end consumers is being degraded by a number of disruptive technologies and legislative impacts; especially with the rapidly increasing myriad of privately owned and operated domestic and commercial distributed energy generation (DEG) devices connected at any point across a low voltage (LV) distribution network. The present invention bypasses this increasing critical DEG problem by offering a solution comprising an energy processing unit (EPU) that is installed at the edge of the high voltage (HV) transmission grid.
US11063428B2 Switch circuit
A switch circuit includes a first switch, a current protection component, a current detection circuit, and a controller. The first switch conducts a primary side coil. The current protection component generates a detection voltage. The current detection circuit outputs a protection voltage. When the detection voltage is not greater than a first threshold, the current detection circuit generates a first voltage corresponding to the detection voltage as the protection voltage. When the detection voltage is greater than the first threshold, the current detection circuit generates a second voltage corresponding to the detection voltage as the protection voltage, where the first voltage is different from the second voltage. The controller is suitable for making the first switch selectively conducting and not conducting. When the protection voltage is greater than a second threshold, the controller does not increase a proportion of a conduction time to a non-conduction time of the first switch.
US11063427B2 DC transmission apparatus, surge control circuit and method
Disclosed is a surge control circuit, including: an absorption circuit including an absorption element and a bypass switch which are connected in series, a switch group connected in parallel to both ends of the absorption circuit and a first control circuit electrically connected to the switch group and bypass switch respectively. Normally, the first control circuit controls the switch group and the bypass switch to turn on simultaneously, makes the current flow through the switch group; when detecting the current is greater than or equal to the first preset current value, or the current increase rate is greater than or equal to the preset current rate of change, the first control circuit controls the switch group to turn off, makes the current flow through the absorption circuit; when detecting the current is less than the second preset current value, the first control circuit controls the bypass switch to turn off.
US11063426B2 Intrinsic safety (IS) barriers mountable on terminal blocks of input/output (I/O) modules or other devices
A system includes a module having at least one input/output (I/O) channel. The system also includes a terminal block having terminals configured to provide electrical connections for the at least one I/O channel. The system further includes a barrier assembly having one or more intrinsic safety (IS) barriers. Each IS barrier is configured to receive at least one data or power signal, limit an amount of energy in the at least one data or power signal, and output the at least one energy-limited data or power signal. Each IS barrier includes at least one limiter circuit configured to limit the amount of energy in the at least one data or power signal. Each IS barrier is configured to be mounted on the terminal block. Each IS barrier could be configured to provide galvanic isolation between multiple devices or systems coupled to the IS barrier. Each limiter circuit could include a current limiter.
US11063425B2 Autonomous electric power fault detection, isolation and restoration systems
Fault detection, isolation and restoration systems for electric power systems using “smart switch” points that autonomously coordinate operations to minimize the number of customers affected by outages and their durations, without relying on communications with a central controller or between the smart switch points. Each smart recloser can be individually programmed to operate as a tie-switch, a Type-A (normal or default type) sectionalizer, or a Type-B (special type) sectionalizer. The Type-A recloser automatically opens when it detects a fault, uses a direction-to-fault and zone-based distance-to-fault operating protocol, and stays “as is” with no automatic opening when power (voltage) is lost on both sides of the switch. The Type-B sectionalizer does the same thing and is further configured to automatically open when it detects that it is deenergized on both sides for a pre-defined time period, and to operate like a tie-switch once open.
US11063422B2 Power semiconductor module and power converter
A power semiconductor module includes a power semiconductor element; a control circuit which controls the power semiconductor element; and multiple terminals. The control circuit deactivates a gate terminal, which is a control electrode of the power semiconductor element, in an event of a fault in the power semiconductor element or the power semiconductor module, and outputs from a first output terminal a fault signal indicating the event of the fault in the power semiconductor module. When there is no fault in the power semiconductor element and the power semiconductor module, the control circuit uses the first output terminal for other applications such as for outputting temperature information on the power semiconductor module, for example. This allows the fault signal to be output without increasing the number of terminals of the power semiconductor module more than necessary.
US11063421B2 Integrated coolant channels for component cooling in electric mobile applications
An integrated inverter assembly including a main cover and an opposing back cover, a coolant channel separating body interposed between an upper coolant channel and a lower coolant channel. The upper coolant channel may be thermally coupled to a first plurality of electronic components of the integrated inverter assembly. The lower coolant channel may be thermally coupled to a second plurality of electronic components of the integrated inverter assembly. The first plurality of electronic components include at least one gate driver.
US11063420B2 Overload protection device and method, storage medium, compressor and electric appliance
Disclosed are an overload protection apparatus and method, and a storage medium, a compressor and an electric appliance. The apparatus includes: a first overload protection mechanism and a second overload protection mechanism, wherein the first overload protection mechanism is arranged to perform overload protection on the pressure of a compressor to be protected, and/or the second overload protection mechanism is arranged to perform overload protection on at least one of the temperature and the current of the compressor to be protected.
US11063419B2 GFCI with capacitive power supply circuit
A cool running ground fault circuit interrupter (GFCI) with radio frequency (RF) noise suppression and a Capacitive Power Supply tbr interrupting the flow of current through a pair of load and neutral lines extending between an input power source and a load is provided. The GFCI includes a pair of switches disposed between the input power source and the load. The switches are actuated by a relay circuit initially powered by a booster circuit and a constant on power supply. A capacitive power supply for cool operation of the GFCI is connected to the load line via a current limiting resistor and provides power to the constant on power supply circuit.
US11063418B2 Systems and methods for overcurrent protection for wireless power receivers
One example device for overcurrent protection for wireless power receivers includes a wireless power antenna comprising a wire coil; a conditioning circuit electrically coupled to the wireless power antenna to receive an electric power signal from the wireless power antenna; a temperature-sensitive fuse electrically coupled between the wireless power antenna and the conditioning circuit and configured to electrically decouple the wireless power antenna from the conditioning circuit in response to being blown; and a thermal energy source configured to generate thermal energy based on an electrical signal from an output of the conditioning circuit, the thermal energy source positioned proximate the temperature-sensitive fuse.
US11063417B2 Cable cap
The present invention provides, in various embodiments, a push on cap for an electrical cable that can be both temporary and permanent. The cap includes an extension that can be folded back for temporary installation of the cap on the cable, and unfolded onto the cable for permanent installation.
US11063414B2 Sealed cable passage
The present invention concerns a transit for leading cables, pipes or wires through a partition in a sealed way. The transit comprises a sleeve (1) and a seal (2) to be received inside a central through opening of the sleeve (1). The seal (2) comprises a base part (7), a front fitting (9) and a rear fitting (10), which front and rear fittings (9, 10) are placed at opposite ends of the base part (7). The base part (7) of the seal (2) is made of a compressible material, whereby the front and rear fittings (9, 10) are arranged to be moved towards each other in order to compress the base part (7) of the seal (2). The compression is achieved by co-operating threaded pins (19) and nuts (11). At least one rotating fitting (13) is placed between the front fitting (9) and the base part (7) of the seal (2), and is received on one of the threaded pins (19).
US11063410B2 Switchgear
A switchgear includes: a tank having a first through hole; a fixed contact in the tank; a movable contact capable of reciprocating between a position in contact with the fixed contact and a position separated from the fixed contact; and an operating rod capable of reciprocating in a direction parallel to the direction of movement of the movable contact, and penetrating through the first through hole. The switchgear further includes: a connecting plate connecting the movable contact and the operating rod; a shielding plate disposed closer to the fixed contact than the connecting plate, having a second through hole through which the operating rod penetrates and a third through hole through which the movable contact is capable of passing formed therein; a first bearing disposed in the first through hole to support the operating rod; and a second bearing disposed in the second through hole to support the operating rod.
US11063399B2 Powered tree construction
A power transfer system to facilitate the transfer of electrical power between tree trunk sections of an artificial tree is disclosed. The power transfer system can advantageously enable neighboring tree trunk sections to be electrically connected without the need to rotationally align the tree trunk sections. Power distribution subsystems can be partially disposed within the trunk sections. The power distribution subsystems can comprise a male end, a female end, or both. The male ends can have prongs and the female ends can have channels, and the prongs and channels may be positioned outside of the trunk sections. The prongs can be inserted into the channels to electrically connect the power distribution subsystems of neighboring tree trunk sections. The prongs and channels may be configured to engage one another without the need to rotationally align the tree trunk sections.
US11063398B2 Hub
A hub device includes a first member including a first housing and a first circuit board arranged within the first housing, the first circuit board comprising a wireless emitting module; and a second member detachably connected to the first member and including a second housing and a second circuit board arranged within the second housing. The second circuit board includes a wireless receiving module that is used to wirelessly communicate with the wireless emitting module.
US11063393B2 Electrical plug connector and wiring device with keying features
The present disclosure provides exemplary embodiments of wiring device assemblies that include an electrical wiring device and electrical plug connector assembly which permits easy connection of electrical conductors to the electrical wiring device via the plug connector assembly. The wiring device assemblies are configured to operate at a common voltage rating and include keying features to ensure the electrical wiring devices are configured to mate with electrical plug connector assemblies rated for the same voltage. The keying features include a key and corresponding keyway used to prevent electrical plug connector assemblies rated for one voltage from being plugged into electrical wiring devices rated for a different voltage.
US11063392B2 Electronic device housing that permits removal of damaged plug from jack within the housing
An electronic device includes a jack including a first opening portion through which a plug can be inserted along a first axis, and coming into contact with the plug at an electrode; and a housing formed separately from the jack. The jack includes a second opening portion facing the first opening portion along the first axis, and a through-hole connecting the first opening portion and the second opening portion along the first axis. The housing includes a third opening portion opening on a same side as the first opening portion and opening at a position where a plug can be inserted from outside the housing into the first opening portion, and a fourth opening portion facing the third opening portion along the first axis and opening at a position where the plug can be discharged to an outside of the housing through the second opening portion.
US11063390B2 Connector and power supply circuit cut-off device
A connector includes a first and second connector housings, a first and second terminals provided in the first and second connector housings, the second terminal including contact pieces with a gap therebetween, the gap being larger than a width dimension of the first terminal. The second connector housing includes pressing plate portions. The second terminal is to be accommodated between the pressing plate portions, the second terminal being displaceable between a first position and a second position, a part of the contact pieces extends beyond distal ends of the pressing plate portions when the second terminal is in the first position, the part of the contact pieces are completely retracted into a space between the pressing plate portions when the second terminal is in the second position. The contact pieces are to be pushed such that the contact pieces contact the terminal plate portions.
US11063389B2 Connector structure and display panel device having connector structure
A connector structure includes a first connector and a second connector configured to rotatably connect the first connector. The first connector includes an insulating support, a first conductor and a second conductor. The first and second conductors respectively include first and second convex curved surfaces. The second connector includes first and second insulating housings and first and second conductive layers. The first and second insulating housings are configured to cover at least a portion of the first conductor and at least a portion of the second conductor, respectively. The first conductive layer includes a first concave curved surface matching the first convex curved surface, and is configured to be in contact with the first conductor. The second conductive layer includes a second concave curved surface matching the second convex curved surface, and is configured to be in contact with the second conductor.
US11063387B2 Connector having a sealing member interposed between the connector support member and housing
A connector includes an insulating housing that is fixed to a casing of a first device at a communication part through which an opening of the casing of the first device and an opening of a casing of a second device communicate with each other and includes first through holes, conductors that are inserted into the respective first through holes to electrically connect the first device and the second device, an insulating sealing member that includes tubular sealing parts that seal between the conductors and the housing, and a connecting part that connects the sealing parts, and an insulating support member that includes second through holes into which the conductors are inserted, is attached to the housing from a side of the second device, and interposes the sealing member between the support member and the housing to support the sealing parts.
US11063384B2 Connector
A connector includes a first connecting assembly and a second connecting assembly, wherein the first connecting assembly and the second connecting assembly are fitted with each other. The first connecting assembly includes a first inner core and at least two first electric wires, and each of the first electric wires is electrically connected in a first end portion of the first inner core. The second connection assembly includes a second inner core and at least two second electric wires, and each of the second electric wires is electrically connected in a first end portion of the second inner core. A second end portion of the second inner core is provided with a connecting portion, and the connecting portion is inserted in a second end portion of the first inner core, so that the first electric wire is in an electrical communication with the second electric wire.
US11063383B2 Receptacle connector
The present invention relates to a receptacle connector including a plurality of contacts configured to electrically connect a plug connector and a substrate coupled with an electronic device, an insulation portion with which the contacts are coupled, and a shell with which the insulation portion is coupled. Here, the shell includes a shell body, in which an accommodation hole configured to allow the plug connector to be inserted therein is formed, and a restriction portion protruding toward the accommodation hole to restrict a movable distance of the plug connector in an insertion direction in which the plug connector is inserted into the accommodation hole.
US11063382B2 Waterproof and explosion-proof circuit board and electronic valve actuator for flow control applications
A bulkhead passthrough connector containing a printed circuit board (PCB) for transferring electrical signals across a bulkhead to an electronic valve actuator, an electronic valve actuator configured to operate and communicate with a valve using a PCB through a bulkhead, the electronic valve actuator, and a method of assembling a bulkhead passthrough connector incorporating a PCB. The embodiments may include a passthrough partition which separates one side of the bulkhead from another. A PCB retainer may also be secured to the passthrough partition. The PCB is attached to the PCB retainer and extends from one side to another side of the bulkhead through the passthrough partition. The PCB further includes electrical paths printed on the PCB and electrical connectors located on both sides of the bulkhead to enable communication with external devices.
US11063381B2 Electric connector
An electric connector includes a fixing-side contact having a vertical portion of plate shape, a relay contact having a pair of front arms and a pair of rear arms, and an insulator having a relay contact insertion groove, the vertical portion of the fixing-side contact being sandwiched between the pair of rear arms so that the relay contact is held to be swingable with respect to the fixing-side contact and is electrically connected to the fixing-side contact, an opening width of an opening of the relay contact insertion groove of the insulator being shorter than an opening width at ends of the pair of front arms located on a forward side in a fitting direction.
US11063380B2 Universal power input assembly
A universal power input assembly includes an input power terminal, a first circuit board and a second circuit board. The input power terminal is electrically coupled to the first circuit board and the first circuit board includes a connector, wherein a first end of the connector is electrically coupled to the first circuit board and a second end of the connector is electrically coupled to the second circuit board.
US11063373B1 Non-invasive analyte sensor and system with decoupled transmit and receive antennas
A non-invasive analyte sensor includes at least one transmit antenna/element that functions to transmit a transmit signal in a radio or microwave frequency range of the electromagnetic spectrum into a target containing an analyte of interest, and at least one receive antenna/element that functions to detect a response resulting from transmission of the transmit signal by the transmit antenna/element into the target. The transmit and receive antennas/elements are decoupled from one another which helps to improve the detection capability of the non-invasive analyte sensor. The decoupling between the transmit and receive antennas is achieved by using at least one intentionally fabricated configuration and/or arrangement therebetween that is sufficient to decouple the transmit antenna and the receive antenna from one another.
US11063370B2 Module comprising antenna and RF element, and base station including same
A communication method and system for converging a 5th-Generation (5G) communication system for supporting higher data rates beyond a 4th-Generation (4G) system with a technology for Internet of Things (IoT) are provided. The disclosure may be applied to intelligent services based on the 5G communication technology and the IoT-related technology, such as smart home, smart building, smart city, smart car, connected car, health care, digital education, smart retail, security and safety services. According to the disclosure, an antenna module includes a first substrate layer on which at least one substrate is stacked; an antenna coupled to an upper end surface of the first substrate layer; a second substrate layer having an upper end surface coupled to a lower end surface of the first substrate layer and on which at least one substrate is stacked; and a radio frequency (RF) element coupled to a lower end surface of the second substrate layer.
US11063368B2 Antenna assembly for a level gauge
An antenna assembly for a level radar for detecting a topology of a filling material surface is provided. For example, the antenna assembly comprises antenna elements which are designed and/or configured to transmit and/or receive the electromagnetic measurement signal. The distances between adjacent elements are non-equidistant with respect to one another, and the minimum distance between two elements can correspond to one half of a wavelength of the electromagnetic measurement signal.
US11063363B2 Antenna element, antenna module, and communication device
A patch antenna includes: a ground conductor pattern lying in a plane and set to ground potential; a feeding conductor pattern lying in a plane and disposed in a manner so as to face the ground conductor pattern, the feeding conductor pattern having feed points that are opposite to each other with respect to a center point of the feeding conductor pattern; feed lines that are connected in parallel between the feed points and are of different lengths; and a frequency selection circuits disposed on a path of at least one of the feed lines, the frequency selection circuits being configured to allow passage of radio-frequency signals in one frequency band and to attenuate radio-frequency signals in another frequency band.
US11063362B2 Portable flat-panel satellite antenna
A portable flat panel antenna system and method for using the same are disclosed. In one embodiment, the portable satellite antenna apparatus comprises a flat panel antenna and a container to house the antenna, the container having at least one radio-frequency (RF) transparent material through which the antenna is operable to transmit and receive satellite communications.
US11063358B2 Structure of electronic device for optimizing performance of antenna and method thereof
An electronic device for supporting carrier aggregation (CA) is provided. The electronic device includes a radio frequency integrated circuit (RFIC) including a plurality of mixers and a feedback circuit, at least one antenna, a coupler disposed between the RFIC and the at least one antenna to transfer a reflected signal of a transmission signal to the feedback circuit, and at least one processor operatively connected to the RFIC, wherein the at least one processor may identify whether there is a mixer which is not in use among the plurality of mixers, when the first mixer which is not in use among the plurality of mixers is identified, perform antenna impedance tuning through a first mixer and the feedback circuit, and when the plurality of mixers are all in use, perform the antenna impedance tuning through a second mixer assigned to a secondary cell (Scell) among the plurality of mixers and the feedback circuit.
US11063356B2 Large aperture deployable reflectarray antenna
A deployable reflectarray has a plurality of strips arranged in quadrants forming the reflectarray. The copper ground plane and the copper dipoles are supported by facesheets made of epoxy reinforced by quartz fibers. The copper ground plane is separated from the copper dipoles by S-shaped springs made of epoxy reinforced by quartz fibers, which allow folding and deployment of the reflectarray.
US11063355B2 Bi-directional vector modulator/active phase shifter
A novel bi-directional vector modulator to be used as an active phase shifter is proposed. The advantages of the active phase shifter include: 1) Compact size—By active current combining technique, short transmission lines are used to perform signal combining rather than using area-consuming Wilkinson combiner or splitter; 2) High phase resolution and flexibility—phase interpolation can be performed by vector addition through m-path vector modulators; 3) High efficiency—no signal switch loss, only switched matching capacitor; 4) Simplified signal interconnection; 5) No passive combiner needed—eliminate large size and losses in the passive combiner); 6) Can have unequal combining and/or splitting by changing the gain of vector modulator, which is difficult to realize with passive combining and/or splitting network; and 7) Can combine different signals.
US11063354B2 Antenna system
An antenna system for receiving and transmitting wireless signals includes a first complex antenna including a first reflection element, a first antenna array and a second antenna array; a second complex antenna including a second reflection element, a third antenna array and a fourth antenna array, wherein the first reflection element and the second reflection element are fixed to form an included angle to each other; and a feeding device, coupled to the first complex antenna and the second complex antenna, for alternately outputting radio-frequency signals to the first complex antenna and the second complex antenna, to emit wireless signals via the first complex antenna and the second complex antenna, and switching phases of the radio-frequency signals outputted to the first complex antenna and the second complex antenna, to change characteristics of beam generated by the first complex antenna and the second complex antenna in a vertical plane.
US11063351B2 Antenna angle adjustment device, antenna angle adjustment method, and communications device
Provided are an antenna angle adjustment device, an antenna angle adjustment system, an antenna angle adjustment method, and a communications device, whereby the angle of an antenna can be adjusted to a direction in which direct waves can be more reliably received. A direction information generation unit 41 generates direction information indicating a direction of one antenna from another antenna. A range information generation unit 42 generates range information indicating a range of a main beam of the another antenna. A determination unit 43 determines, based on the range information and the direction information, whether or not the one antenna is in a range indicated by the range information.
US11063346B2 Shark fin antenna for vehicle
Disclosed is a shark fin antenna for a vehicle. The shark fin antenna has a pad and a base disposed on the pad to provide a space for a printed circuit board and a plurality of antenna components. The shark fin antenna includes a holder having a groove therein for exposing at least a portion of an upper surface of a printed circuit board, a first antenna unit supported by the holder and having an antenna pattern formed on a surface thereof to receive an AM/FM frequency band signal, a first auxiliary unit covering at least a portion of an upper surface of the first antenna unit, and a spring mounted in the groove to elastically support the first auxiliary unit and the first antenna unit in a vertical direction of the upper surface of the printed circuit board.
US11063345B2 Systems and methods for providing a wearable antenna
The present disclosure pertains to an antenna assembly configured to inconspicuously provide mobile communication in rugged or tactical environments. Some embodiments may include: a flexible conductor configured to receive and/or emit electromagnetic radiation; a printed circuit board (PCB) configured to match characteristic impedances; and a connector configured to mate with another connector associated with a radio or amplifier, the PCB being potentially disposed within an interior portion of the connector of the antenna assembly.
US11063344B2 High gain and large bandwidth antenna incorporating a built-in differential feeding scheme
The present disclosure includes an antenna and a base station including an antenna. The antenna includes at least one unit cell that includes a flap layer, a feed network, and a patch. The flap layer includes a plurality of flaps. The feed network is positioned below the flap layer and includes a plurality of feed lines. Each of the plurality of feed lines includes an excitation port and a transmission line. The patch has a quadrilateral shape and is positioned above the flap layer such that an air gap is present between the patch and the flap layer.
US11063342B2 Parasitic patch antenna for radiating or receiving a wireless signal
The present application provides a parasitic patch antenna for radiating or receiving a wireless signal. The parasitic patch antenna includes an antenna module, which has one or more exciter patches, where each exciter patch is respectively coupled to a signal port of one of a transmitter, a receiver, or a transceiver, and has a ground structure. The parasitic patch antenna further includes a separate mechanical part independent of the antenna module. The separate mechanical part includes one or more parasitic patches organized and arranged separate from, and proximate to the one or more exciter patches of the antenna module.
US11063341B2 Antenna assembly and mobile terminal using same
The present disclosure provides an antenna assembly. The antenna assembly comprises a rear cover with a closed metal frame and a circuit board arranged in the rear cover. A plurality of antenna units are arranged, each of which comprises an antenna slot and a first metal portion and a second metal portion which separates the metal frame through the antenna slot, a plurality of phase converters are arranged on the circuit board. Compared with the related art, the antenna assembly provided by the invention has the beneficial effect of good aesthetics, fast heat diffusion, good radiation performance and good antenna gain and space coverage.
US11063337B2 Multiple-assembly antenna positioner with eccentric shaft
Methods, systems, and devices are described for an antenna positioning apparatus, which includes a multiple-assembly positioner for adjusting a positioning angle about a positioning axis. The multiple-assembly positioner has two or more positioning assemblies that are coupled in series between a base structure and a positioning structure. Positioning assemblies can be individually selected based on various criteria, such as cost, complexity, angular range, and other performance, and be configured to work together to provide a desired range of adjustment to the positioning angle while simultaneously meeting precision requirements. In one example, a positioning assembly can include a shaft with an eccentric portion, which is rotated in order to provide the adjustment. A method is described where a first positioning assembly can be actuated to a first initial position, and then held, such that a second positioning assembly can be actuated to provide a selected antenna positioning angle.
US11063334B2 Method and apparatus having one or more adjustable structures for launching or receiving electromagnetic waves having a desired wavemode
Aspects of the subject disclosure may include, a system that facilitates generating one or more tuning signals supplied to a material positioned along a portion of an inner surface of a structure of the waveguide system, the material facilitating generation of electromagnetic waves having a desired wave mode, and generating an electromagnetic wave with the desired wave mode, the electromagnetic wave propagating along a transmission medium without relying on an electrical return path to facilitate propagation of the electromagnetic wave along the transmission medium. Other embodiments are disclosed.
US11063333B2 Multilayer electromagnetic wave transmission board assembled by an adhesive and including a barrier to block the adhesive from flowing into a waveguide channel
An electromagnetic wave transmission board includes a composite board and a plated metal layer. The composite board has a plurality of inner walls surroundingly defining an elongated channel in an interior of the composite board. The plated metal layer is formed on at least part of the inner walls so as to jointly form an inner channel structure in the channel. The inner channel structure surroundingly defines a predetermined space filled with air, and the inner channel structure has two entrances in air communication with the predetermined space. The predetermined space of the inner channel structure is configured to receive and output an electromagnetic wave signal through the two entrances, respectively, and the electromagnetic wave transmission board is configured to transmit the electromagnetic wave signal by using the air in the predetermined space of the inner channel structure as a conductive medium.
US11063330B2 Filter
A filter which stops the propagation of an electromagnetic wave of a predetermined frequency band in a signal line or a power supply line is provided. This filter is a conductor connected to the signal line or the power supply line. This conductor is configured to include a linear portion. The first portion of the linear portion with an end portion connected to the signal line or the power supply line has the first width, and the second portion different from the first portion of the linear portion has the second width different from the first width.
US11063328B2 Secondary battery including insulating member with grooves
A conductive member (61) is disposed near a side of the sealing plate (2) facing the inside of a battery with a first insulating member (10) disposed therebetween. The conductive member (61) has a conductive-member opening portion (61f) at a side facing the electrode assembly. An inserting portion (7b) of a positive electrode terminal (7) is inserted through a third terminal-receiving hole (61c) in the conductive member (61) and connected to the conductive member (61). The conductive-member opening portion (61f) of the conductive member (61) is sealed by a deformation plate (62), and the deformation plate (62) is connected to a first positive-electrode current collector (6a), which is electrically connected to positive electrode plates. The conductive member (61) includes a pressing projection (61e) that projects toward the first insulating member (10) from a portion thereof that faces the first insulating member (10).
US11063327B2 Secondary battery and secondary battery control method
A secondary battery is provided with a power generation element, an electroconductive member, an external short circuit, a current detector and an external discharge safety circuit. The power generation element has a unit cell layer that includes a positive electrode, a separator and a negative electrode stacked in that order. The electroconductive member is disposed on one outward side of the power generation element with an insulation member interposed therebetween. A lead wire connects the electroconductive member with the negative electrode tab. The current detector detects whether or not current is flowing to the lead wire. The external discharge safety circuit is provided to short-circuits a path between the positive electrode tab and the negative electrode tab outside the power generation element while current detector detects a current.
US11063326B2 Biasing features for a battery module
The present disclosure relates to a battery module having a housing and a stack of battery cells disposed in a receptacle area of the housing, where each battery cell has a top having a battery cell terminal and a bottom, where the top of the battery cells face outwardly away from the receptacle area. The battery module includes an integrated sensing and bus bar subassembly positioned against the stack of battery cells and has a carrier, a bus bar integrated onto the carrier, and a biasing member integrated onto the carrier. The bus bar electrically couples battery cells in an electrical arrangement, and the biasing member is between the top of each battery cell and the carrier, where the biasing member has a first material, more compliant than a second material of the carrier, and the biasing member biases the stack of battery cells inwardly toward the housing.
US11063324B2 Positive electrode with lead member for electrochemical devices, method for producing same and electrochemical device
An electrochemical device positive electrode with a lead member includes a positive electrode and a lead member attached to the positive electrode. The positive electrode includes a positive current collector, a carbon layer, and an active layer. The carbon layer is disposed on a surface of the positive current collector, and contains a conductive carbon material. The active layer is supported by the positive current collector via the carbon layer disposed between the active layer and the positive current collector, and contains a conductive polymer. The lead member is in contact with the carbon layer.
US11063322B2 Circuit body and battery module
A circuit body includes: a plurality of conductors and a substrate having flexibility and provided with the conductors, in which the substrate includes a battery wiring portion which is routed along each row of electrodes and where one ends of the conductors are respectively connected to bus bars, and a pair of connector connecting portions in which the other ends of the conductors provided in respective battery wiring portions are located, the pair of connector connecting portions include a connector mounting portion where the pair of connector connecting portions are guided from opposite directions, and in the connector mounting portion, the other ends of the conductors of the pair of the connector connecting portions are alternately arranged and an arrangement order corresponds to the potential order of the bus bars connected to the conductors.
US11063319B2 Separator for electrochemical element and electrochemical element
Provided is a separator for an electrochemical element having exceptional strength and shielding performance, a small thickness, and low resistance. A separator for an electrochemical element interposed between a pair of electrodes and capable of holding an electrolytic solution containing an electrolyte, wherein the separator for an electrochemical element comprises a regenerated cellulose fiber having an average fiber length of 0.25-0.80 mm and an average fiber width of 3-35 μm, and in which the value calculated by dividing the average fiber length by the average fiber width is 15-70.
US11063314B2 Manufacturing method of battery and battery manufacturing system
A manufacturing method includes the steps of: preparing a battery case having an opening; fabricating an assembly by inserting a wound electrode body and a lid which includes a terminal connected to the wound electrode body and which closes the opening into the battery case; sandwiching the battery case by a pressing jig in a state where the opening faces downward to close a gap between the battery case and the lid; disposing the assembly so that the terminal faces upward by inverting the assembly in a state where the battery case is sandwiched by the pressing jig; and welding the lid and the battery case to each other in a state where the terminal faces upward and the battery case is sandwiched by the pressing jig.
US11063312B2 Cell
Provided is a cell in which the possibility of metallic foreign metal penetrating into an electrode assembly is reduced. The cell includes a rectangular cell case including a case main body and a lid member, an electrode assembly housed in the cell case, and an insulating film disposed between the cell case and the electrode assembly. The insulating film is in the form of a sheet, and is disposed between at least the electrode assembly and the bottom surface and the pair of long side surfaces of the cell case, and a pair of end portions of the insulating film in the height direction is located on the lid member side with respect to the electrode assembly. Incisions are provided in a thickness direction of the insulating film, and end portions with respect to the incisions constitute inclined surfaces which incline toward the electrode assembly side.
US11063309B2 Low temperature operable electrical energy supply device
A system and a method for an electrical energy supply device including an anode; a cathode; an electrolyte disposed between the anode and the cathode; the electrical energy supply device is freeze resistant such that the electrical energy supply device can operate at a temperature below 0° C. without deterioration in electrical properties or electrical performance.
US11063308B2 Battery for an electric vehicle
A battery (10) for an electric vehicle comprises a plurality of battery cells (11), where a first group (12) comprises a plurality of battery cells (11) connected to each other in parallel, a second group (13) comprises a plurality of battery cells (11) connected to each other in parallel, and the first group (12) and the second group (13) are connected with each other in series forming a first line (14) of battery cells (11). The battery (10) further comprises a first terminal (16) which is configured to be connected with an electric machine (30) and with a power net (31) of the electric vehicle, and a second terminal (17) which is configured to be connected with a reference potential (32). The battery (10) is configured to supply the electric machine (30) and the power net (31) of the electric vehicle with power, and the electric machine (30) and the power net (31) are supplied with the same voltage level by the battery (10).
US11063307B2 Control module connected to battery module
A control module is arranged side by side with a battery module. The control module includes positive and negative electrode bus bars which are electrically connected to positive and negative electrode input/output terminals of the battery module, respectively. The bus bars are mounted in a mounting part. The mounting part has first and second control-side ventilation holes through which air flows onto first and second battery stacks, respectively, in the battery module. The mounting part has notches in which at least one of the positive electrode bus bar and the positive input/output terminals and at lease one of the negative electrode bus bar and the negative input/output terminals are formed. The first and second control-side ventilation holes are arranged side by side in the lateral direction. The notches, the positive electrode bus bar, and the negative electrode bus bar are located between the first and second control-side ventilation holes.
US11063305B2 Enhanced solid state battery cell
An enhanced solid state battery cell is disclosed. The battery cell can include a first electrode, a second electrode, and a solid state electrolyte layer interposed between the first electrode and the second electrode. The battery cell can further include a resistive layer interposed between the first electrode and the second electrode. The resistive layer can be electrically conductive in order to regulate an internal current flow within the battery cell. The internal current flow can result from an internal short circuit formed between the first electrode and the second electrode. The internal short circuit can be formed from the solid state electrolyte layer being penetrated by metal dendrites formed at the first electrode and/or the second electrode.
US11063299B2 Three-dimensional batteries with compressible cathodes
A secondary battery for cycling between a charged and a discharged state is provided. The secondary battery has an electrode assembly having a population of anode structures, a population of cathode structures, and an electrically insulating microporous separator material. The electrode assembly also has a set of electrode constraints that at least partially restrains growth of the electrode assembly. Members of the anode structure population have a first cross-sectional area, A1 when the secondary battery is in the charged state and a second cross-sectional area, A2, when the secondary battery is in the discharged state, and members of the cathode structure population have a first cross-sectional area, C1 when the secondary battery is in the charged state and a second cross-sectional area, C2, when the secondary battery is in the discharged state, where A1 is greater than A2, and C1 is less than C2.
US11063297B2 Electrochemical cell and electrolyte for same
An electrolyte, an electrochemical cell including the electrolyte, and a battery including the electrochemical cell are disclosed. Exemplary electrolytes allow for electrochemical cells and batteries with relatively high efficiency and stability that can be charged to relatively high voltages.
US11063282B2 Separation system
(EN) The present invention relates to the field of high efficiency and high flow hydrogen generation and purification from a hydrogen tank provided in the form of ammonia (NH3). In particular, the present invention describes in particular an innovative and compact system for the dissociation of ammonia and therefore the production of molecular hydrogen (H2), all in a cycle totally free of carbon (hence carbon emissions), as well as by the generation of nitrogen oxide and nitric dioxide (NOx).
US11063281B2 Method and device for operating fuel cells with artificial air
The invention relates to a fuel cell system (1) suitable for operation with a cathode operating gas containing oxygen and inert gas and an anode operating gas containing hydrogen and inert gas; an appliance system operated by means of the fuel cell system (1); and a method for operating the fuel cell system (1). In the method according to the invention, the single components of the operating gases are stored separately, and mixed to the required portions during operation of the fuel cell system, thereby constantly recirculating the inert portion of the operating gases. During operation of the fuel cell system, gases are neither taken in from the environment nor released into the environment nor are fuel cell exhaust gases stored in the fuel cell system or the appliance system. In an alternative variation, only the anode operating gas is mixed and recirculated, while the cathode operating gas and the cathode exhaust gas are taken from the environment and released into the environment, respectively.
US11063276B2 Pumpless electrochemical cell
An electrochemical cell and a method of operating the same. In accordance with various embodiments, the cell includes an anode, one or more cathodes opposite the anode defining a pathway there between. Chemical reactions allow the electrolyte to flow through the defined pathway without requiring a pumping device.
US11063269B2 Power generation cell
A power generation cell includes a resin film equipped MEA and a first metal separator. The first metal separator includes an oxygen-containing gas flow field, an outer peripheral bead, and a first bypass stopping convex portion. An oxygen-containing gas flows across the oxygen-containing gas flow field along an electrode surface. The outer peripheral bead surrounds the oxygen-containing gas flow field to prevent leakage of a reactant gas. The first bypass stopping convex portion extends from the outer peripheral bead. A corner of a cathode on at least one end in the flow field direction of the oxygen-containing gas flow field is overlapped with an apex portion of the first bypass stopping convex portion.
US11063261B2 Electrode for electrochemical device, method for manufacturing the same, and electrochemical device including the same
Provided are an electrode capable of maintaining electrical conductivity during elongation and shrinkage, a method for manufacturing the same, and electrochemical device including the same.
US11063258B2 Method for producing nickel-containing hydroxide
A method for producing a nickel-containing hydroxide is provided that includes a particle growth step of promoting growth of nickel-containing hydroxide particles by neutralization crystallization in an aqueous solution accommodated in an agitation tank. In the particle growth step, a volume fraction of a highly supersaturated region in the aqueous solution where the molar concentration of the nickel-containing hydroxide dissolved in the aqueous solution is greater than or equal to 1.7 mol/m3 is less than 0.624% of the aqueous solution.
US11063257B2 Positive electrode active material for nonaqueous electrolyte secondary batteries, production method thereof, and nonaqueous electrolyte secondary battery
A positive electrode active material for nonaqueous electrolyte secondary batteries has a high charge/discharge capacity and produces high output, as well as has high filling ability. The positive electrode active material includes lithium-nickel composite oxide particles are formed by agglomeration of multiple primary particles, include pores, and have a layered crystal structure. The lithium-nickel composite oxide particles have an average particle size of 15 μm or more and 30 μm or less. The percentage of an area of the pores measured by a cross-sectional observation of the lithium-nickel composite oxide particles with respect to a cross-sectional area of the lithium-nickel composite oxide particles is 1.0% or more and 5.0% or less. A lithium-tungsten compound containing tungsten and lithium is present on the surface of and inside the secondary particles. The lithium-tungsten compound is present on at least part of the surface of the primary particles.
US11063250B2 Cathode active material for lithium secondary battery and lithium secondary battery comprising the same
The present invention relates to a cathode active material composition for a lithium secondary battery and a lithium secondary battery including the same, and more particularly, to a cathode active material composition for a lithium secondary battery, including a mixture of particles which are different in Ni composition and size and prepared at the same heat treatment temperature, and a lithium secondary battery including the same. According to the present invention, optimal capacity manifestation temperatures of a coarse particle and a fine particle may be adjusted to be similar by adjusting an Ni content of the coarse particle and the fine particle, and thus, a lithium secondary battery having enhanced output and lifetime may be manufactured.
US11063246B2 Manufacturing method of organic light emitting diode back plate and the organic light emitting diode back plate
Provided are a manufacturing method of an organic light emitting diode back plate and the organic light emitting diode back plate. In the manufacturing method of an OLED back plate, pixel openings and light blocking grooves correspondingly above active layers are formed in a pixel definition layer. Then, OLED light-emitting functional layers are formed in the pixel openings and the black light shielding blocks completely covering the active layers are formed in the light shielding grooves by ink jet printing, thereby effectively preventing the TFT elements from being affected by the illumination and ensuring the characteristics of the TFT elements. The structure is simple and the production cost is low.
US11063245B2 Display apparatus
A display apparatus can include a substrate having a light emitting area, a light emitting device disposed at the light emitting area on the substrate, at least one light exiting area disposed in the light emitting area, a light blocking layer disposed at the light emitting area and overlapping the at least one light exiting area, and a light guide part disposed at the light emitting area and configured to guide light generated in the light emitting device to the at least one light exiting area.
US11063243B2 Display apparatus and electronic device
There is provided a display apparatus that includes a plurality of light-emitting elements that constitutes pixels, a light guiding/scattering layer that is provided on the plurality of light-emitting elements and scatters light emitted from the plurality of light-emitting elements, and a reflection partition wall that separates portions of the light guiding/scattering layer corresponding to each of the pixels and reflects the light emitted from the plurality of light-emitting elements.
US11063233B2 Organic light emitting diode display
An organic light emitting diode display is provided that may include a first substrate, a plurality of electrodes on the first substrate and spaced apart from each other, a pixel defining layer on the plurality of electrodes, spacers on the pixel defining layer, and a second substrate on the spacers. The pixel defining layer includes a plurality of openings spaced apart from each other and respectively open to the plurality of electrodes. The spacers on the pixel defining layer are at crossing points of a plurality of virtual lines, the spacers crossing spaces between adjacent openings of the plurality of openings.
US11063232B2 Light-emitting element, light-emitting device, display device, electronic device, and lighting device
An object is to provide a light-emitting element which uses a plurality of kinds of light-emitting dopants and has high emission efficiency. In one embodiment of the present invention, a light-emitting device, a light-emitting module, a light-emitting display device, an electronic device, and a lighting device each having reduced power consumption by using the above light-emitting element are provided. Attention is paid to Förster mechanism, which is one of mechanisms of intermolecular energy transfer. Efficient energy transfer by Förster mechanism is achieved by making an emission wavelength of a molecule which donates energy overlap with a local maximum peak on the longest wavelength side of a graph obtained by multiplying an absorption spectrum of a molecule which receives energy by a wavelength raised to the fourth power.
US11063231B2 Light emitting device and display device including the same
An electroluminescent device including an anode and a cathode facing each other, an emission layer disposed between the anode and the cathode, the emission layer including quantum dots, a hole auxiliary layer disposed between the emission layer and the anode and an electron auxiliary layer disposed between the emission layer and the cathode, wherein the electroluminescent device is configured such that electrons are dominant in the emission layer and a logarithmic value (log (HT/ET)) of a hole transport capability (HT) relative to an electron transport capability (ET) is less than or equal to about −1, or the electroluminescent device is configured such that holes are dominant in the emission layer and the logarithmic log value (log (HT/ET)) of the hole transport capability (HT) relative to the electron transport capability (ET) is greater than or equal to about 0.5.
US11063230B2 Flexible display apparatus
Disclosed is a flexible display apparatus in which torsion prevention lines are disposed so as to prevent cracks and to detect fine cracks. The flexible display apparatus includes a flexible substrate including an active area and an inactive area, the inactive area including a first inactive area, a second inactive area provided with a circuit board disposed therein, and a bending area located between the first inactive area and the second inactive area, and torsion prevention lines disposed in a direction vertical to a length direction of the flexible substrate, in a region of the bending area of the flexible substrate, adjacent to the first inactive area, and fine crack detection lines disposed in parallel between a plurality of signal lines formed in the length direction of the flexible substrate, in the region of the bending area of the flexible substrate, adjacent to the first inactive area.
US11063226B1 Organic electronic element comprising compound for organic electronic element and an electronic device thereof
Provided are an organic electronic element including an anode, a cathode, and an organic material layer between the anode and the cathode, and an electronic device including the organic electronic element, wherein the organic material layer includes each of the compounds represented by Formulas 1 and 2 and the driving voltage of the organic electronic element is lowered, and the luminous efficiency and lifetime of the element are improved.
US11063223B2 Organic electron transport material and organic electroluminescent element using same
An organic electron transport material, which includes a phosphine oxide derivative represented by the following Formula (1): R1 represents an atomic group which has one or more of either or both of aryl and heteroaryl groups and may have one or more phosphine oxide groups, R2 to R11 each independently represent an atom or an atomic group selected from the group consisting of a hydrogen atom, a halogen atom, a cyano group, a nitro group, a carboxyl group, a formyl group, a carbonyl group, an alkoxycarbonyl group, and a trifluoromethyl group.
US11063218B2 Method of fabricating semiconductor devices using a two-step gap-fill process
A method of fabricating a memory device includes forming word lines and cell stacks with gaps between the cell stacks, forming a lower gap-fill insulator in the gaps, forming an upper gap-fill insulator on the lower gap-fill insulator, curing the lower gap-fill insulator and the upper gap-fill insulator to form a gap-fill insulator, and forming bit lines on the cell stacks and the gap-fill insulator. The lower gap-fill process may be performed using a first source gas that includes first and second precursors, and the upper gap-fill process may be performed using a second source gas that includes the first and second precursors, a volume ratio of the first precursor to the second precursor in the first source gas may be greater than 15:1, and a volume ratio of the first precursor to the second precursor in the second source gas may be less than 15:1.
US11063217B2 Semiconductor device
A semiconductor device includes an inter-layer dielectric (ILD) layer, a first metallization pattern, an etch stop layer, a metal-containing compound layer, a memory cell, and a second metallization pattern. The first metallization pattern is in the ILD layer. The etch stop layer is over the ILD layer. The metal-containing compound layer is over the etch stop layer, in which the etch stop layer has a portion extending beyond an edge of the metal-containing compound layer. The memory cell is over the metal-containing compound layer and including a bottom electrode, a resistance switching element over the bottom electrode, and a top electrode over the resistance switching element. The second metallization pattern extends through the portion of the etch stop layer to the first metallization pattern.
US11063213B2 Method for manufacturing memory device
A method includes depositing a bottom electrode layer, a resistance switching element layer, and a top electrode layer over a first dielectric layer; etching the top electrode layer and the resistance switching element layer to form a resistance switching element over the bottom electrode layer and a top electrode over the resistance switching element; depositing a metal-containing compound layer over the top electrode, the resistance switching element, and the bottom electrode layer; and etching the metal-containing compound layer and the bottom electrode layer to form a bottom electrode over the first dielectric layer.
US11063212B2 Magnetic tunnel junction device and formation method thereof
A method of forming a magnetic tunnel junction (MTJ) device includes forming MTJ layers over a dielectric layer; performing a first etching operation on the MTJ layers to form MTJ stacks, in which the first etching operation is performed such that a metal-containing doped region is formed in the dielectric layer and between the MTJ stacks; and performing a second etching operation to break through the metal-containing doped region.
US11063211B2 Method for manufacturing an integrated magnetoresistive device
An integrated magnetoresistive device includes a substrate of semiconductor material that is covered, on a first surface, by an insulating layer. A magnetoresistor of ferromagnetic material extends within the insulating layer and defines a sensitivity plane of the sensor. A concentrator of ferromagnetic material includes at least one arm that extends in a transversal direction to the sensitivity plane and is vertically offset from the magnetoresistor. The concentrator concentrates deflects magnetic flux lines perpendicular to the sensitivity plane so as to generate magnetic-field components directed in a parallel direction to the sensitivity plane.
US11063210B2 Spin-orbit-torque magnetization rotational element, spin-orbit-torque magnetoresistance effect element, and magnetic memory
Provided is a spin-orbit-torque magnetization rotational element that suppresses re-adhesion of impurities during preparation and allows a write current to easily flow. The spin-orbit-torque magnetization rotational element includes a spin-orbit torque wiring that extends in a first direction, and a first ferromagnetic layer that is located on a side of one surface of the spin-orbit torque wiring. A side surface of the spin-orbit torque wiring and a side surface of the first ferromagnetic layer form a continuous inclined surface in any side surface.
US11063207B2 Semiconductor device and method for fabricating the same
A method for fabricating semiconductor device includes the steps of: forming a substrate having a magnetic tunneling junction (MTJ) region and a logic region; forming a MTJ on the MTJ region; forming a top electrode on the MTJ; forming an inter-metal dielectric (IMD) layer around the MTJ; removing the IMD layer directly on the top electrode to form a recess; forming a first hard mask on the IMD layer and into the recess; removing the first hard mask and the IMD layer on the logic region to form a contact hole; and forming a metal layer in the recess and the contact hole to form a connecting structure on the top electrode and a metal interconnection on the logic region.
US11063206B2 Semiconductor device and method for fabricating the same
A method for fabricating semiconductor device includes the steps of: forming a first magnetic tunneling junction (MTJ) on a substrate; forming a first liner on the MTJ; forming a second liner on the first liner; forming an inter-metal dielectric (IMD) layer on the MTJ, and forming a metal interconnection in the IMD layer, the second liner, and the first liner to electrically connect the MTJ. Preferably, the first liner and the second liner are made of different materials.
US11063203B2 Apparatus and method for poling a piezoelectric film
Disclosed are methods, devices, apparatuses, and systems for poling a piezoelectric film. A poling system can be a corona poling system including a corona source with one or more corona wires configured to transfer a corona discharge onto a major surface of the piezoelectric film. The poling system can further include a grid electrode interposed between the corona source and the piezoelectric film. A substrate including the piezoelectric film may be supported on a substrate support, where the substrate and the corona source are configured to move relative to each other during poling.
US11063200B2 Device for guiding charge carriers and use thereof
A device for guiding charge carriers and uses of the device are proposed, wherein the charge carriers are guided by means of a magnetic field along a curved or angled main path in a two-dimensional electron gas or in a thin superconducting layer, so that a different presence density is produced at electrical connections.
US11063193B2 Colour micro-LED display apparatus
A colour micro-LED display apparatus comprises an array of reflective optical elements and an array of micro-LED pixels with a uniform emission colour across the array arranged between the array of reflective optical elements and an output substrate. Light from the micro-LEDs is directed into the reflective optical elements and is incident on scattering regions in the apparatus. Colour converted scattered light is transmitted by the output substrate. A thin and efficient display apparatus may be provided with high spatial and angular colour uniformity and long lifetime.
US11063189B2 Cyan phosphor-converted LED module
A light emitting device comprises an LED emitting ultraviolet or blue light and one or more phosphors excited by the ultraviolet or blue light and in response emitting longer wavelength light to provide a combined phosphor emission spectrum having an emission peak at wavelength λpk with a full width at half maximum of FWHM. With λpk and FWHM expressed in nm, 525 nm≥λpk≥0.039*FWHM+492.7 nm. The light emitting device may be used, for example, to signal the autonomous driving state of an automobile.
US11063184B2 Light emitting diode and fabrication method thereof
A light-emitting diode includes: a light emitting epitaxial structure including a first-type semiconductor layer, an active layer and a second-type semiconductor layer, and having a first surface as a light emitting surface, and an opposing second surface; a conducting layer formed over the second surface and including a physical plating layer and a chemical plating layer, wherein the physical plating layer is adjacent to the light emitting epitaxial structure and has cracks, and the chemical plating layer fills the cracks in the physical plating layer; and a submount coupled to the light emitting epitaxial laminated layer through the conducting layer.
US11063181B2 Patterned epitaxial substrate and semiconductor structure
A patterned epitaxial substrate includes a substrate and a plurality of patterns. The substrate has a first zone and a second zone surrounding the first zone. The first zone and the second zone are disposed in a concentric manner. The patterns and the substrate are integrally formed, and the patterns are disposed on the substrate. The patterns include a plurality of first patterns and a plurality of second patterns. The first patterns are disposed in the first zone. The second patterns are disposed in the second zone. Sizes of the first patterns are different from sizes of the second patterns.
US11063178B2 Semiconductor heterostructure with improved light emission
A semiconductor heterostructure for an optoelectronic device with improved light emission is disclosed. The heterostructure can include a first semiconductor layer having a first index of refraction n1. A second semiconductor layer can be located over the first semiconductor layer. The second semiconductor layer can include a laminate of semiconductor sublayers having an effective index of refraction n2. A third semiconductor layer having a third index of refraction n3 can be located over the second semiconductor layer. The first index of refraction n1 is greater than the second index of refraction n2, which is greater than the third index of refraction n3.
US11063173B2 Method of manufacturing light emitting device
A method of manufacturing a light emitting device is provided. The method includes providing a lead frame including a plurality of light emitting devices each including: a light emitting element; a resin molded body including a lead electrode on which the light emitting element is mounted, and a light-shielding member which supports the lead electrode and has a recess accommodating the light emitting element; and a light-transmissive member disposed in the recess. The method further includes: providing a mask including a plurality of through holes, and overlaying the mask on the lead frame so that the resin molded body and the light-transmissive member are exposed at the through holes; and perforating abrasive blasting by blowing a particulate material on a surface of the resin molded body and a surface of the light-transmissive member.
US11063171B2 Light emitting device, method of manufacturing light emitting device, and projector
A light emitting device includes a substrate, and a laminated structure provided on the substrate, wherein the laminated structure has a plurality of columnar portions, the columnar portion contains a material having a wurtzite-type crystal structure, in a plan view as seen from a layered direction of the laminated structure, the plurality of columnar portions are arranged in a square lattice form or rectangular lattice form, a line passing through centers of the adjacent columnar portions is inclined relative to m-planes of the columnar portions located between the centers of the adjacent columnar portions, and vertices of the adjacent columnar portions are not placed on the line.
US11063169B2 Substrate structuring methods
The present disclosure relates to methods and apparatus for structuring a semiconductor substrate. In one embodiment, a method of substrate structuring includes applying a resist layer to a substrate optionally disposed on a carrier. The resist layer is patterned using ultraviolet radiation or laser ablation. The patterned portions of the resist layer are then transferred onto the substrate by micro-blasting to form desired features in the substrate while unexposed or un-ablated portions of the resist layer shield the rest of the substrate. The substrate is then exposed to an etch process and a de-bonding process to remove the resist layer and release the carrier.
US11063162B2 Current generation from radiation with diamond diode-based devices for detection or power generation
Diamond diode-based devices are configured to convert radiation energy into electrical current, useable for sensing (i.e., detection) or delivery to a load (i.e., energy harvesting). A diode-based detector includes an intrinsic diamond layer arranged between p-type diamond and n-type diamond layers, with the detector further including at least one of (i) a boron containing layer arranged proximate to the n-type and/or the intrinsic diamond layers, or (ii) an intrinsic diamond layer thickness in a range of 10 nm to 300 microns. A diode-based detector may be operated in a non-forward biased state, with a circuit used to transmit a current pulse in a forward bias direction to reset a detection state of the detector. An energy harvesting device may include at least one p-i-n stack (including an intrinsic diamond layer between p-type diamond and n-type diamond layers), with a radioisotope source arranged proximate to the at least one p-i-n stack.
US11063161B2 Monolithically integrated high voltage photovoltaics with textured surface formed during the growth of wide bandgap materials
A method of forming a photovoltaic device that includes epitaxially growing a first conductivity type semiconductor material of a type III-V semiconductor on a semiconductor substrate. The first conductivity type semiconductor material continuously extending along an entirety of the semiconductor substrate in a plurality of triangular shaped islands; and conformally forming a layer of type III-V semiconductor material having a second conductivity type on the plurality of triangular shaped islands.
US11063158B2 Sensors having resistive elements
A sensor is provided, which includes a semiconductor substrate, a photodiode region, and a multi-layered resistive element. The photodiode region is arranged in the semiconductor substrate. The multi-layered resistive element is arranged over the semiconductor substrate and is coupled with the photodiode region.
US11063157B1 Trench capacitor profile to decrease substrate warpage
Various embodiments of the present disclosure are directed towards an integrated circuit (IC) including a pillar structure abutting a trench capacitor. A substrate has sidewalls that define a trench. The trench extends into a front-side surface of the substrate. The trench capacitor includes a plurality of capacitor electrode layers and a plurality of capacitor dielectric layers that respectively line the trench and define a cavity within the substrate. The pillar structure is disposed within the substrate. The pillar structure has a first width and a second width less than the first width. The first width is aligned with the front-side surface of the substrate and the second width is aligned with a first point disposed beneath the front-side surface.
US11063156B1 Memory device and manufacturing method thereof
A memory device and a manufacturing method of the memory device are provided. The manufacturing method includes steps below. A plurality of stack structures including a tunneling dielectric layer and a floating gate are formed on a substrate. A liner material layer including a nitride liner layer is formed on the substrate. A top surface of the nitride liner layer is lower than a top surface of the floating gate and is higher than a top surface of the tunneling dielectric layer. An isolation material layer covering the liner material layer is formed on the substrate. The isolation material layer is oxidized, and a portion of the isolation material layer is removed to form an isolation structure. An inter-gate dielectric layer covering the stack structures and the isolation structure is formed on the substrate. A control gate covering the inter-gate dielectric layer is formed on the substrate.
US11063150B2 Semiconductor devices
A semiconductor device may include active fins each of which extends in a first direction on a substrate, the active fins being spaced apart from each other in a second direction different from the first direction, a conductive structure extending in the second direction on the substrate, the conductive structure contacting the active fins, a first diffusion break pattern between the substrate and the conductive structure, the first diffusion break pattern dividing a first active fin of the active fins into a plurality of pieces aligned in the first direction, and a second diffusion break pattern adjacent to the conductive structure on the substrate, the second diffusion break pattern having an upper surface higher than a lower surface of the conductive structure, and dividing a second active fin of the active fins into a plurality of pieces aligned in the first direction.
US11063145B2 Silicon carbide semiconductor device and method for manufacturing same
A silicon carbide semiconductor device includes: a substrate; a first impurity region on the substrate; a base region on the first impurity region; a second impurity region in the base region; a trench gate structure including a gate insulation film and a gate electrode in a trench; a first electrode connected to the second impurity region and the base region; a second electrode on a rear surface of the substrate; a first current dispersion layer between the first impurity region and the base region; a plurality of first deep layers in the second current dispersion layer; a second current dispersion layer between the first current dispersion layer and the base region; and a second deep layer between the first current dispersion layer and the base region apart from the trench.
US11063144B2 Silicon carbide semiconductor component
A semiconductor component includes a SiC semiconductor body. A drift zone of a first conductivity type and a semiconductor region are formed in the SiC semiconductor body. Barrier structures extending from the semiconductor region into the drift zone differ from the gate structures.
US11063140B2 Complementary transistor structures formed with the assistance of doped-glass layers
Structures for a heterojunction bipolar transistor and methods of forming a structure for a heterojunction bipolar transistor. A first heterojunction bipolar transistor includes a first emitter, a first collector, and a first base layer having a portion positioned between the first emitter and the first collector. A second heterojunction bipolar transistor includes a second emitter, a second collector, and a second base layer having a portion positioned between the second emitter and the second collector. The first and second base layers each comprise silicon-germanium, the first base layer includes a first germanium profile, and the second base layer includes a second germanium profile that is identical to the first germanium profile.
US11063135B2 Semiconductor device and method for fabricating the same
A method for fabricating semiconductor device includes the steps of: forming a gate structure on a substrate; forming a first spacer adjacent to the gate structure, wherein the first spacer comprises silicon carbon nitride (SiCN); forming a second spacer adjacent to the first spacer, wherein the second spacer comprises silicon oxycarbonitride (SiOCN); and forming a source/drain region adjacent to two sides of the second spacer.
US11063134B2 Vertical transistors with top spacers
Devices and methods for a vertical field effect transistor (VTFET) semiconductor device include recessing a gate dielectric and a gate conductor of a vertical gate structure below a top of a vertical fin to form openings between the top of the vertical fin and an etch stop layer, the top of the vertical fin being opposite to a substrate at a bottom of the vertical fin. A spacer material is deposited in the openings to form a spacer corresponding to each of the openings. Each spacer is recessed below the top of the vertical fin. A top spacer is selectively deposited in each of the openings to line the etch stop layer and the spacer such that the top of the vertical fin is exposed above the top spacer and the spacer is covered by the top spacer. A source/drain region is formed on the top of the vertical fin.
US11063130B2 Semiconductor device and semiconductor circuit
According to an embodiment a semiconductor device includes a semiconductor layer including first trenches and second trenches, a first gate electrode in the first trench, a second gate electrode in the second trench, a first gate electrode pad, a second gate electrode pad, a first wiring connecting the first gate electrode pad and the first gate electrode, and a second wiring connecting the second gate electrode pad and the second gate electrode. The semiconductor layer includes a first connection trench. Two first trenches adjacent to each other are connected to each other at end portions by the first connection trench. At least one of the second trenches is provided between the two first trenches. The second gate electrode in the at least one second trench is electrically connected to the second wiring between the two first trenches.
US11063129B2 Self-limiting fin spike removal
Provided is a method for forming a semiconductor structure. In embodiments of the invention, the method includes laterally forming a spacer on a side of the semiconductor structure. The method further includes performing a thermal anneal on the semiconductor structure. The method further includes performing an etch to remove materials formed by the thermal anneal.
US11063128B2 Conformal source and drain contacts for multi-gate field effect transistors
A semiconductor device includes a fin having a first semiconductor material, the fin having a source/drain (S/D) region and a channel region, the S/D region providing a top surface and two sidewall surfaces; an isolation structure surrounding a bottom portion of the fin, wherein the S/D region of the fin above the isolation structure has a step profile in each of the two sidewall surfaces; a semiconductor film over the S/D region and having a doped second semiconductor material, the semiconductor film providing a top surface and two sidewall surfaces over the top and two sidewall surfaces of the fin respectively, wherein the doped second semiconductor material is different from the first semiconductor material; and a metal contact over the top and two sidewall surfaces of the semiconductor film and operable to electrically communicate with the S/D region.
US11063127B2 Semiconductor element and semiconductor device provided with the same
A semiconductor element includes an element body, a surface protective film and an electrode. The element body has a front surface and a side surface connected to the front surface. The surface protective film is supported on the front surface of the element body. The surface protective film has a cutout portion recessed inward from an outer edge of the surface protective film as viewed in a thickness direction of the element body. The electrode is disposed in the cutout portion and electrically connected to the element body. The element body has a ledge protruding with respect to the side surface in a direction perpendicular to the thickness direction. The ledge is adjacent to an opening of the cutout portion as viewed in the thickness direction.
US11063126B2 Metal contact isolation for semiconductor structures
A method of forming a semiconductor structure includes the following steps. At least a first source/drain region and a second source/drain region are formed in a substrate. At least a first sacrificial layer and a second sacrificial layer are respectively formed over the first source/drain region and the second source/drain region. A spacer layer is formed on at least a top surface of the substrate and around sides of the first sacrificial layer and the second sacrificial layer. The spacer layer includes an electrical-isolating material. The first sacrificial layer and a second sacrificial layer are removed to form a first open trench and a second open trench. The first open trench and the second open trench are filled with metal contact material to form a first metal contact and a second metal contact electrically isolated from each other by the spacer layer.
US11063125B2 Metal oxide film and semiconductor device
A metal oxide film includes indium, M, (M is Al, Ga, Y, or Sn), and zinc and includes a region where a peak having a diffraction intensity derived from a crystal structure is observed by X-ray diffraction in the direction perpendicular to the film surface. Moreover, a plurality of crystal parts is observed in a transmission electron microscope image in the direction perpendicular to the film surface. The proportion of a region other than the crystal parts is higher than or equal to 20% and lower than or equal to 60%.
US11063123B2 Silicon carbide semiconductor device and method of manufacturing silicon carbide semiconductor device
At an upper surface of a gate electrode, a recess occurs due to etching back of poly-silicon for forming the gate electrode. At an upper surface of an interlayer insulating film, a recess occurs in a portion that opposes in a depth direction, the recess of the upper surface of the gate electrode. A barrier metal includes sequentially stacked first to fourth metal films. The first metal film is a titanium nitride film that covers the surface of the interlayer insulating film and has an opening that exposes the recess of the upper surface of the interlayer insulating film. The second metal film is a titanium film that covers the first metal film and the source electrode, and is in contact with the interlayer insulating film, in the opening of the first metal film. The third and fourth metal films are a titanium nitride film and a titanium film, respectively.
US11063117B2 Semiconductor device structure having carrier-trapping layers with different grain sizes
Structures and formation methods of a semiconductor device structure are provided. The semiconductor device structure includes a supporting substrate. The semiconductor device structure also includes a first carrier-trapping layer covering the supporting substrate. The first carrier-trapping layer is doped with a group-IV dopant. The semiconductor device structure further includes an insulating layer covering the first carrier-trapping layer. In addition, the semiconductor device structure includes a semiconductor substrate over the insulating layer. The semiconductor device structure also includes a transistor. The transistor includes a gate stack over the semiconductor substrate and source and drain structures in the semiconductor substrate.
US11063116B2 Semiconductor device
A RESURF isolation structure surrounds an outer periphery of the high-side circuit region to isolate the high-side circuit region and the low-side circuit region from each other. The RESURF isolation structure includes a high-voltage isolation region, a high-voltage N-ch MOS, and a high-voltage P-ch MOS. The high-voltage isolation region, the high-voltage N-ch MOS, and the high-voltage P-ch MOS include a plurality of field plates (9,19a,19b,19c). An inner end of the field plate (19c) of the high-voltage P-ch MOS located closest to the low-side circuit region is positioned closer to the low-side circuit region than an inner end of the field plate (19b) of the high-voltage N-ch MOS located closest to the low-side circuit region.
US11063115B2 Semiconductor device and method of making thereof
Embodiments of a semiconductor device and methods of forming thereof are provided herein. In some embodiments, a power semiconductor device may include a first layer having a first conductivity type; a second layer disposed atop the first layer, the second layer having the first conductivity type; a termination region formed in the second layer, the termination region having a second conductivity type opposite the first type; and an active region at least partially formed in the second layer, wherein the active region is disposed adjacent to the termination region proximate a first side of the termination region and wherein the second layer is at least partially disposed adjacent to the termination region proximate a second side of the termination region opposite the first side.
US11063113B2 Capacitor and method for fabricating the same
A capacitor is disclosed, including: a semiconductor substrate including opposite upper and lower surfaces; one first trench disposed in the semiconductor substrate and formed downward from the upper surface; one second trench disposed in the substrate and corresponding to the first trench, and formed upward from the lower surface; a first conductive layer disposed above the substrate and in the first trench; a first insulating layer disposed between the substrate and the first conductive layer; a second conductive layer disposed on the substrate and in the first trench, the second conductive layer being electrically connected to the substrate; a second insulating layer disposed between the second conductive layer and the first conductive layer; a third conductive layer disposed below the substrate and in the second trench; and a third insulating layer disposed between the third conductive layer and the substrate, which is electrically connected to the first conductive layer.
US11063112B2 DRAM interconnect structure having ferroelectric capacitors exhibiting negative capacitance
An interconnect structure for use in coupling transistors in an integrated circuit is disclosed, including various configurations in which ferroelectric capacitors exhibiting negative capacitance are coupled in series with dielectric capacitors. In one embodiment, the negative capacitor includes a dielectric/ferroelectric bi-layer. When a negative capacitor is electrically coupled in series with a conventional dielectric capacitor, the series combination behaves like a stable ferroelectric capacitor for which the overall capacitance can be measured experimentally, and tuned to a desired value. The composite capacitance of a dielectric capacitor and a ferroelectric capacitor having negative capacitance coupled in series is, in theory, infinite, and in practice, very large. A series combination of positive and negative capacitors within a microelectronic interconnect structure can be used to make high capacity DRAM memory cells.
US11063110B2 Conductive pattern with tapered angle, display device including the same, and method of manufacturing conductive pattern
A conductive pattern for a display device includes a first layer including aluminum or an aluminum alloy disposed on a substrate and forming a first taper angle with the substrate, and a second layer disposed on the first layer forming a second taper angle with the first layer, in which the second taper angle is smaller than the first taper angle.
US11063107B2 Display apparatus
A display apparatus includes: a thin-film transistor including a source electrode, a drain electrode, and a gate electrode; a data line in a layer different from the source electrode, the drain electrode, and the gate electrode, wherein the data line is configured to transmit a data signal; and a shield layer between the data line and a component of the thin-film transistor.
US11063105B2 Display panel and fabrication method, and display device
A display panel and fabrication method, and a display device are provided. The display panel includes a base substrate, a first transistor and a storage capacitor. The storage capacitor includes a first electrode and a second electrode, and the first electrode and a gate of the first transistor have an overlapped region. The display panel also includes a first insulating layer having a plurality of first vias in the overlapped region, and the first electrode is electrically connected to the gate of the first transistor through the plurality of first vias. A plurality of grooves are formed on a side of the first electrode facing away from the base substrate. A plurality of protrusions are formed on a side of the second electrode facing toward the base substrate. A groove, a protrusion and a first via overlap in a direction perpendicular to the surface of the base substrate.
US11063102B2 Light emitting device
The present invention provides a TFT that has a channel length particularly longer than that of an existing one, specifically, several tens to several hundreds times longer than that of the existing one, and thereby allowing turning to an on-state at a gate voltage particularly higher than the existing one and driving, and allowing having a low channel conductance gd. According to the present invention, not only the simple dispersion of on-current but also the normalized dispersion thereof can be reduced, and other than the reduction of the dispersion between the individual TFTs, the dispersion of the OLEDs themselves and the dispersion due to the deterioration of the OLED can be reduced.
US11063099B2 Organic light-emitting display device
An organic light-emitting display device including a substrate on which a plurality of sub-pixels are arranged; a thin film transistor and a first electrode of an organic light-emitting diode connected to the thin film transistor, the thin film transistor and the organic light-emitting diode being disposed in each of the plurality of sub-pixels; a first bank layer disposed on the first electrode and exposing the first electrode; and a second bank layer disposed on the first bank layer and exposing the first bank layer and the first electrode. Further, the first bank layer includes first regions overlapping with via holes through which the thin film transistor is connected to the first electrode and second regions which are regions other than the first regions, and a thickness of the first regions is greater than a thickness of the second regions.
US11063096B2 Organic light emitting diode display device
An organic light emitting diode display device is discussed. The organic light emitting diode display device includes pixels including an organic light emitting diode, and a bank partitioning the pixels which are neighboring, and having openings exposing at least a portion of a first electrode of the organic light emitting diode allocated for each of the pixels. The bank includes at least one groove provided between the neighboring pixels in at least one area.
US11063094B2 Display device and electronic device
A highly reliable display device. A first flexible substrate and a second flexible substrate overlap each other with a display element positioned therebetween. Side surfaces of at least one of the first substrate and the second substrate which overlap each other are covered with a high molecular material having a light-transmitting property. The high molecular material is more flexible than the first substrate and the second substrate.
US11063092B2 Display device
A display device includes: a first base layer; a circuit element layer on the first base layer; a pixel definition layer on the circuit element layer and comprising a plurality of light-emitting openings which are spaced apart from each other and define a plurality of light-emitting regions; a second base layer spaced apart from and facing the first base layer; a light-shielding layer on the second base layer and comprising a plurality of openings respectively overlapping the light-emitting regions, wherein on a plane of the first base layer, shapes of first to third openings along one direction among the openings are different from each other.
US11063091B2 Display panel
A display panel including a substrate, a plurality of first pixels and a plurality of second pixels is provided. The substrate has a first display region and a second display region. The first pixels are disposed on the first display region. The second pixels are disposed on the second display region. The ratio of the transmittance of the second pixels to the transmittance of the first pixels is 0.33 to 0.66.
US11063090B2 Image sensor and method for fabricating the same
An image sensor and a method for fabricating the same are provided. The image sensor includes a substrate including a first surface opposite a second surface that is incident to light, a first photoelectric conversion layer in the substrate, a wiring structure including a plurality of wiring layers on the first surface of the substrate, an interlayer insulating film on the second surface of the substrate, a capacitor structure in the interlayer insulating film, and a first wiring on the interlayer insulating film. The capacitor structure includes a first conductive pattern, a dielectric pattern, and a second conductive pattern sequentially stacked on the second surface of the substrate. The second conductive pattern is connected to the first wiring.
US11063089B2 Resistive memory device with meshed electrodes
A method is presented for incorporating a resistive random access memory (RRAM) stack within a resistive memory crossbar array. The method includes forming a conductive line within an interlayer dielectric (ILD), constructing a barrier layer over a portion of the conductive line, forming a bottom meshed electrode, depositing a dielectric layer over the bottom meshed electrode, and forming a top meshed electrode over the dielectric layer, where each of the top and bottom meshed electrodes includes a plurality of isolations films.
US11063084B2 Method for manufacturing light-emitting element
A method for manufacturing a light-emitting element comprises: forming a mask comprising a first film and a second film such that the mask covers a first active layer and a second nitride semiconductor layer, which comprises: forming the first film covering at least an upper surface of the second nitride semiconductor layer, and forming the second film covering the first film; while the first active layer and the second nitride semiconductor layer are covered with the mask, forming a third nitride semiconductor layer at an exposed portion of a first nitride semiconductor layer, wherein a temperature at which the third nitride semiconductor layer is formed is less than a melting point of the second film; and after the forming of the third nitride semiconductor layer, removing the mask, during which lift-off of the mask is performed by removing the first film, which also removes the second film.
US11063076B2 Imaging apparatus, imaging system, and mobile object having pixels with different saturation charge quantities
An imaging apparatus performs a global electronic shutter operation. During an exposure period for acquiring one frame, the imaging apparatus transfers electric charges accumulated in a first period from a photoelectric conversion portion to a holding portion. When a second period has elapsed since an end time of the first period, the holding portion holds both electric charges generated in the first period and electric charges generated in the second period. A plurality of pixels included in the imaging apparatus includes a first pixel and a second pixel each having a different saturation charge quantity of the photoelectric conversion portion included in each pixel.
US11063073B2 Apparatus and methods for curved focal plane array
A method of fabricating a curved focal plane array (FPA) includes forming an epitaxial layer including a semiconductor on a release layer. The release layer includes a two-dimensional (2D) material and is disposed on a first substrate. The method also includes forming a metal layer on the epitaxial layer and transferring the epitaxial layer and the metal layer to a second substrate including an elastomer. The method also includes fabricating a plurality of photodetectors from the epitaxial layer and bending the second substrate to form the curved FPA.
US11063071B1 Multilevel semiconductor device and structure with waveguides
A multi-level semiconductor device, the device including: a first level including integrated circuits; a second level including a structure designed to conduct electromagnetic waves in a confined manner, where the second level is disposed above the first level, where the first level includes crystalline silicon, where the second level includes crystalline silicon; and an oxide layer disposed between the first level and the second level, where the second level is bonded to the oxide layer, and where the bonded includes oxide to oxide bonds.
US11063068B2 Display apparatus
A display apparatus includes a substrate having a first substrate, a second substrate, and an inorganic insulating layer between the first substrate and the second substrate. A first buffer layer is on the substrate, wherein the first buffer layer includes n+1 layers, and ‘n’ is 0 or an even number. A first thin film transistor, a second thin film transistor, and a storage capacitor are each on the first buffer layer. The first thin film transistor includes a first active layer formed of a low temperature poly silicon material. The second thin film transistor includes a second active layer formed of an oxide semiconductor material. The storage capacitor includes a first capacitor electrode and a second capacitor electrode.
US11063065B2 Semiconductor device having a negative capacitance using ferroelectrical material
A semiconductor device includes: a substrate including a first region and a second region; a first interfacial layer disposed on the substrate in the first region and having a first thickness; a second interfacial layer disposed on the substrate in the second region, wherein the second interfacial layer includes a second thickness that is smaller than the first thickness; a first gate insulating layer disposed on the first interfacial layer and including a first ferroelectric material layer; a second gate insulating layer disposed on the second interfacial layer; a first gate electrode disposed on the first gate insulating layer; and a second gate electrode disposed on the second gate insulating layer.
US11063060B2 Methods of manufacturing a vertical memory device
A method of manufacturing a vertical memory device includes forming a first sacrificial layer on a substrate, the first sacrificial layer including a first insulating material, forming a mold including an insulation layer and a second sacrificial layer alternately and repeatedly stacked on the first sacrificial layer, the insulation layer and the second sacrificial layer including second and third insulating materials, respectively, different from the first insulating material, forming a channel through the mold and the first sacrificial layer, forming an opening through the mold and the first sacrificial layer to expose an upper surface of the substrate, removing the first sacrificial layer through the opening to form a first gap, forming a channel connecting pattern to fill the first gap, and replacing the second sacrificial layer with a gate electrode.
US11063057B2 Three-dimensional semiconductor memory devices
A three-dimensional semiconductor memory device includes a substrate, an electrode structure including a plurality of gate electrodes sequentially stacked on the substrate in a first direction that extends perpendicular to an upper surface of the substrate, a source conductive pattern between the substrate and the electrode structure, a vertical semiconductor pattern penetrating the electrode structure and the source conductive pattern, and a data storage pattern extending in the first direction between the vertical semiconductor pattern and the electrode structure. A lower surface of the data storage pattern contacts the source conductive pattern. A portion of the lower surface of the data storage pattern is at a different height from the upper surface of the substrate, in relation to a height of another portion of the lower surface of the data storage pattern from the upper surface of the substrate.
US11063055B2 Method of manufacturing semiconductor device
A second gate dielectric film material and a memory gate electrode material are formed on a semiconductor substrate. The memory gate electrode material and the second gate dielectric film material formed in a peripheral circuit forming region are removed, and a part of each of the memory gate electrode material and the second gate dielectric film material is left in the memory cell forming region. Thereafter, in a state that the semiconductor substrate in the memory cell forming region is covered with a part of each of the memory gate electrode material and the second gate dielectric film material, heat treatment is performed to the semiconductor substrate to form a third gate dielectric film on the semiconductor substrate located in the peripheral circuit forming region. Thereafter, a memory gate electrode and a second gate dielectric film are formed.
US11063053B2 Integrated circuit and static random access memory thereof
An SRAM structure comprises first and second semiconductor fins, and a gate structure. The first semiconductor fin is formed within a P-well region. The second semiconductor fin is formed within an N-well region abutting the P-well region. The gate structure extends across the first semiconductor fin and the second semiconductor fin, and forms a pull-down transistor with the first semiconductor fin and a pull-up transistor with the second semiconductor fin. The gate structure comprises a first work function metal layer extending within the P-well region and a second work function metal layer extending from the first work function metal layer to within the N-well region, and the second work function metal layer is thicker than the first work function metal layer.
US11063052B2 Semiconductor devices and fabrication methods thereof
A semiconductor device and a fabrication method are provided. The method includes forming a first fin structure and a second fin structure on a substrate. The first fin structure includes a first sidewall surface, facing to the second fin structure, and a second sidewall surface opposite to the first sidewall surface. The method also includes forming an isolation layer to cover a portion of sidewall surfaces of the first fin structure and the second fin structure. The top surface of the isolation layer is lower than the top surfaces of the first fin structure and the second fin structure. The method further includes forming a first sidewall on the first sidewall surface; forming a first doped layer in the first fin structure; and forming a second doped layer in the second fin structure. The first sidewall covers a portion of a sidewall surface of the first doped layer.
US11063051B2 Semiconductor device and method for fabricating the same
The present application discloses a semiconductor device and a method for fabricating the semiconductor device. The semiconductor device includes a substrate, a plurality of first bit line contacts buried in the substrate, a plurality of first bit lines respectively correspondingly positioned on the plurality of first bit line contacts, and a plurality of second bit lines positioned above the substrate. Bottom surfaces of the plurality of second bit lines are positioned at a vertical level higher than top surfaces of the plurality of first bit lines.
US11063047B2 Semiconductor device and method for manufacturing semiconductor device
A semiconductor device with a large storage capacity per unit area is provided. The disclosed semiconductor device includes a plurality of gain-cell memory cells each stacked over a substrate. Axes of channel length directions of write transistors of memory cells correspond to each other, and are substantially perpendicular to the top surface of the substrate. The semiconductor device can retain multi-level data. The channel of read transistors is columnar silicon (embedded in a hole penetrating gates of the read transistors). The channel of write transistors is columnar metal oxide (embedded in a hole penetrating the gates of the read transistors and gates, or write word lines, of the write transistors). The columnar silicon faces the gate of the read transistor with an insulating film therebetween. The columnar metal oxide faces the write word line with an insulating film, which is obtained by oxidizing the write word line, therebetween, and is electrically connected to the gate of the read transistor.
US11063041B2 Integrated circuit device including a power supply line and method of forming the same
A device includes a first semiconductor strip and a second semiconductor strip extending longitudinally in a first direction, where the first semiconductor strip and the second semiconductor strip are spaced apart from each other in a second direction. The device also includes a power supply line located between the first semiconductor strip and the second semiconductor strip. A top surface of the power supply line is recessed in comparison to a top surface of the first semiconductor strip. A source feature is disposed on a source region of the first semiconductor strip, and a source contact electrically couples the source feature to the power supply line. The source contact includes a lateral portion contacting a top surface of the source feature, and a vertical portion extending along a sidewall of the source feature towards the power supply line to physically contact the power supply line.
US11063037B2 Devices, memory devices, and electronic systems
A semiconductor device comprises a stack structure comprising decks each comprising a memory element level comprising memory elements, and a control logic level in electrical communication with the memory element level and comprising control logic devices. At least one of the control logic devices of the control logic level of one or more of the decks comprises at least one device exhibiting transistors laterally displaced from one another. A memory device, a thin film transistor control logic assembly, an electronic system, and a method of operating a semiconductor device are also described.
US11063036B2 Semiconductor device and method for fabricating the same
A semiconductor device includes a substrate, a first recess formed in the substrate, a first source/drain filling the first recess, a vertical metal resistor on the first source/drain, and an insulating liner separating the metal resistor from the first source/drain, with the vertical metal resistor being between two gate electrodes.
US11063035B2 Semiconductor integrated circuit device
An ESD protection circuit includes a first fin structure having fins of a first conductivity type and a second fin structure having fins of a second conductivity type, the second fin structure being opposed to the first fin structure. A first power interconnect connected with the first fin structure and a signal interconnect connected with the second fin structure are formed in a first interconnect layer, and a second power interconnect connected with the first power interconnect is formed in a second interconnect layer. The width occupied by the second fin structure is greater than that of the first fin structure, and the width of the signal interconnect is greater than that of the first power interconnect.
US11063034B2 Capacitor structures
Capacitor structures including a first island of a first conductive region and a second island of the first conductive region having a first conductivity type, an island of a second conductive region having a second conductivity type different than the first conductivity type, a dielectric overlying the first island of the first conductive region, a conductor overlying the dielectric, and a terminal of a diode overlying the second island of the first conductive region and overlying the island of the second conductive region.
US11063031B2 Semiconductor memory system
According to one embodiment, a semiconductor memory system includes a substrate, a plurality of elements and an adhesive portion. The substrate has a multilayer structure in which wiring patterns are formed, and has a substantially rectangle shape in a planar view. The elements are provided and arranged along the long-side direction of a surface layer side of the substrate. The adhesive portion is filled in a gap between the elements and in a gap between the elements and the substrate, where surfaces of the elements are exposed.
US11063030B2 Display device and method of fabricating the same
A display device includes a plurality of scan lines and a plurality of data lines; and a plurality of pixels connected with the scan lines and the data lines, wherein at least one pixel of the plurality of pixels includes a pixel circuit having at least one transistor, an insulating layer covering the pixel circuit, a first electrode disposed on the insulating layer and electrically connected to the pixel circuit, a second electrode disposed on the insulating layer and spaced apart from the first electrode, and a light-emitting element electrically connected to the first electrode and the second electrode. The first electrode includes a first region having at least one first resistance and a plurality of second regions having a second resistance higher than the first resistance, the second electrode includes a third region having at least one third resistance and a plurality of fourth regions having a fourth resistance higher than the third resistance, and the light-emitting element is electrically connected to the first electrode at one of the first regions and the second electrode at one of the third regions.
US11063029B2 Method for forming an electro-optical system
An optoelectronic device includes an optical integrated circuit having a first surface and a second surface opposite the first surface. The optical integrated circuit has an optical zone of the first surface of the optical integrated circuit. The device includes an electrically insulating material disposed over the optical integrated circuit, where he electrically insulating material partially covers the first surface so as to expose the optical zone.
US11063027B2 Semiconductor die with improved thermal insulation between a power portion and a peripheral portion, method of manufacturing, and package housing the die
A semiconductor die includes a structural body that has a power region and a peripheral region surrounding the power region. At least one power device is positioned in the power region. Trench-insulation means extend in the structural body starting from the front side towards the back side along a first direction, adapted to hinder conduction of heat from the power region towards the peripheral region along a second direction orthogonal to the first direction. The trench-insulation means have an extension, in the second direction, greater than the thickness of the structural body along the first direction.
US11063026B2 Display module and method of manufacturing the same
A method of manufacturing a display module is provided. The method may include providing a substrate including a pixel region on which a plurality of electrodes are disposed and a peripheral region that is a region other than the pixel region on the substrate; forming an adhesive layer on the pixel region of the substrate; transferring a plurality of micro light emitting diodes (LEDs) onto the adhesive layer; pre-curing the adhesive layer to shift the adhesive layer on the pixel region to the peripheral region; and bonding the plurality of micro LEDs to the plurality of electrodes.
US11063025B2 Semiconductor module and power conversion device
Gates of a plurality of semiconductor switching elements are electrically connected to a common gate control pattern by gate wires. Sources of the plurality of semiconductor switching elements are electrically connected to a common source control pattern by source wires. The gate control pattern is disposed to interpose the source control pattern between the gate control pattern and each of the plurality of semiconductor switching elements that are connected in parallel and that operate in parallel. Hence, each of the gate wires becomes longer than each of the source wires, and has an inductance larger than the source wire. Accordingly, gate oscillation is reduced or suppressed in the plurality of semiconductor switching elements that are connected in parallel and that operate in parallel.
US11063024B1 Method to form a 3D semiconductor device and structure
A method to form a 3D semiconductor device, the method including: providing a first level including first circuits, the first circuits including first transistors and first interconnection; preparing a second level including a silicon layer; forming second circuits over the second level, the second circuits including second transistors and second interconnection; transferring with bonding the second level on top of the first level; and then thinning the second level to a thickness of less than ten microns, where the bonding includes oxide to oxide bonds, and where the bonding includes metal to metal bonds.
US11063023B2 Semiconductor package
The present disclosure provides a semiconductor package, including a semiconductor die layer and a through insulator via (TIV). The semiconductor die layer has an active surface. The TIV is electrically coupled to the active surface. The TIV includes a body and a mesa. The body is surrounded by molding compound. The mesa has a tapered sidewall over the body. A portion of the tapered sidewall is covered by a seed layer.
US11063021B2 Microelectronics package with vertically stacked dies
The present disclosure relates to a microelectronics package with vertically stacked flip-chip dies, and a process for making the same. The disclosed microelectronics package includes a module board, a first thinned flip-chip die with a through-die via, a second flip-chip die with a package contact at the bottom, and a mold compound. Herein, a top portion of the through-die via is exposed at top of the first thinned flip-chip die. The first thinned flip-chip die and the mold compound reside over the module substrate. The mold compound surrounds the first thinned flip-chip die and extends above the first thinned flip-chip die to define an opening. The second flip-chip die, which has a smaller plane size than the first thinned flip-chip die, resides within the opening and is stacked with the first thinned flip-chip die by coupling the package contact to the exposed top portion of the through-die via.
US11063020B2 Semiconductor device, manufacturing method for semiconductor device, and electronic device
There is provided a semiconductor device a method for manufacturing a semiconductor device, and an electronic apparatus that comprises a semiconductor device, the semiconductor device including a first chip, a second chip that is bonded onto a first surface side of the first chip, a through electrode that is formed to penetrate from a second surface side of the first chip to a wiring layer on the second semiconductor base substrate, and an insulation layer that is disposed between the through electrode and a semiconductor base substrate in the first chip.
US11063017B2 Embedded organic interposer for high bandwidth
Embedded organic interposers for high bandwidth are provided. Example embedded organic interposers provide thick conductors with more dielectric space, and more routing layers of such conductors than conventional interposers, in order to provide high bandwidth transmission capacity over longer spans. The embedded organic interposers provide high bandwidth transmission paths between components such as HBM, HBM2, and HBM3 memory stacks, and other components. To provide the thick conductors and more routing layers for greater transmission capacity, extra space is achieved by embedding the organic interposers in the core of the package. Example embedded organic interposers lower a resistive-capacitive (RC) load of the routing layers to provide an improved data transfer rate of 1 gigabits per second over at least a 6 mm span, for example. The embedded interposers are not limited to use with memory modules.
US11063016B2 Integrated fan-out package including voltage regulators and methods forming same
A method includes adhering a voltage regulator die over a carrier through a die-attach film, with the die-attach film being in the voltage regulator die and encircles metal pillars of the voltage regulator die, encapsulating the voltage regulator die in an encapsulating material, and planarizing the encapsulating material. A back portion of the voltage regulator die is removed to expose a through-via in a semiconductor substrate of the voltage regulator die. The method further includes forming first redistribution lines over the encapsulating material and electrically coupled to the through-via, replacing the die-attach film with a dielectric material, forming second redistribution lines on an opposite side of encapsulating material than the first redistribution lines, and bonding an additional device die to the second redistribution lines. The voltage regulator die is electrically coupled to the additional device die.
US11063014B2 Semiconductor devices including a metal silicide layer and methods for manufacturing thereof
A semiconductor device includes a silicon layer, a metal silicide layer arranged directly on the silicon layer, and a solder layer arranged directly on the metal silicide layer.
US11063011B1 Chip and wafer having multi-layered pad
A chip includes pads having first connecting surfaces, and conductive structures located on the first connecting surfaces. The conductive structures are disposed on the first connecting surfaces. Each of the conductive structures includes first metal layer, second metal layer, and third metal layer. The first metal layer connects one of the pads, and the second metal layer is disposed between the first metal layer and the third metal layer. On every pad, the first metal layer, the second metal layer, and the third metal layer are stacked along first direction on the first connecting surface of the pad, and the first direction is parallel to normal direction of the first connecting surface, and the first metal layer is made of material comprising gold, and the second metal layer is made of material comprising nickel. A wafer is also provided.
US11063010B2 Redistribution layer (RDL) structure and method of manufacturing the same
Provided is a redistribution layer (RDL) structure including a substrate, a pad, a dielectric layer, a self-aligned structure, a conductive layer, and a conductive connector. The pad is disposed on the substrate. The dielectric layer is disposed on the substrate and exposes a portion of the pad. The self-aligned structure is disposed on the dielectric layer. The conductive layer extends from the pad to conformally cover a surface of the self-aligned structure. The conductive connector is disposed on the self-aligned structure. A method of manufacturing the RDL structure is also provided.
US11063008B2 Semiconductor structure and manufacturing method thereof
A semiconductor structure and a manufacturing method thereof are provided. The semiconductor structure includes a semiconductor substrate, an interconnection structure, a through substrate via, an insulating layer, a conductive pillar, a dummy conductive pillar, a passivation layer and a bonding pad. The interconnection structure is disposed over the semiconductor substrate. The through substrate via at least partially extends in the semiconductor substrate along a thickness direction of the semiconductor substrate, and electrically connects to the interconnection structure. The insulating layer is disposed over the interconnection structure. The conductive pillar is disposed in the insulating layer, and electrically connected to the through substrate via. The dummy conductive pillar is disposed in the insulating layer, and laterally separated from the conductive pillar. The passivation layer is disposed over the insulating layer. The bonding pad is disposed in the passivation layer, and electrically connected to the conductive pillar.
US11063007B2 Semiconductor device and method of manufacture
A semiconductor device and manufacturing process are provided wherein a first semiconductor device is electrically connected to redistribution structures. An antenna structure is located on an opposite side of the first semiconductor device from the redistribution structures, and electrical connections separate from the first semiconductor device connect the antenna structure to the redistribution structures.
US11063005B2 Via rail solution for high power electromigration
The present disclosure, in some embodiments, relates to an integrated chip. The integrated chip includes a first conductive interconnect wire extending in a first direction over a substrate. A second conductive interconnect wire is arranged over the first conductive interconnect wire. A via rail is configured to electrically couple the first conductive interconnect wire and the second conductive interconnect wire. The first conductive interconnect wire and the second conductive interconnect wire extend as continuous structures past one or more sides of the via rail.
US11062998B2 Semiconductor package and manufacturing method thereof
A semiconductor package includes dies, a redistribution structure, a conductive structure and connectors. The conductive plate is electrically connected to contact pads of at least two dies and is disposed on redistribution structure. The conductive structure includes a conductive plate and a solder cover, and the conductive structure extend over the at least two dies. The connectors are disposed on the redistribution structure, and at least one connector includes a conductive pillar. The conductive plate is at same level height as conductive pillar. The vertical projection of the conductive plate falls on spans of the at least two dies.
US11062995B2 Interconnect fabricated with flowable copper
An integrated circuit includes a base with one or more semiconductor devices. An insulating material is over the base and an interconnect structure is over the base. The interconnect structure includes vertical conductors extending through the insulating material in a spaced-apart arrangement. The interconnect structure comprises a conductor and a chalcogen, the chalcogen present in an amount of up to 5 atomic percent. In some embodiments, the chalcogen is present in an amount less than 2 atomic percent or less than 1 atomic percent.
US11062990B2 Semiconductor package of using insulating frame
A semiconductor package using an insulating frame of various is disclosed. The insulating frame has a through hole therein, and the semiconductor chip is mounted in the through hole. Further, a via hole is provided in the periphery of the through hole, and a via contact filling the via hole is provided. Whereby the pad of the semiconductor chip is electrically connected to the via contact through the distribution layer. Further, an adhesive buffer layer for increasing the adhesive force is introduced into the upper portion of the insulating frame.
US11062983B2 Substrate for mounting semiconductor element
A substrate for mounting a semiconductor element thereon has columnar terminal portions formed by concavities provided on an upper surface of a metal plate made of a copper-based material, and is provided with a roughened silver plating layer having acicular projections, applied, as the outermost plating layer, to top faces of the columnar terminal portions. The roughened silver plating layer has a crystal structure in which the crystal direction <101> occupies a largest proportion among the crystal directions <001>, <111> and <101>. The substrate for mounting a semiconductor element thereon facilitates thin design of semiconductor packages produced by flip-chip mounting, can be manufactured with improved productivity owing to reduction in cost and operation time, achieves remarkably high adhesion to sealing resin while keeping the total thickness of plating layers including the silver plating layer to be thin.
US11062982B2 Packaged semiconductor device with a particle roughened surface
A packaged semiconductor device with a particle roughened surface on a portion of the lead frame that improves adhesion between the molding compound and the lead frame. A packaged semiconductor device with a particle roughened surface on a portion of the lead frame that improves adhesion between the molding compound and the lead frame and with a reflow wall that surrounds a portion of the solder joint that couples the semiconductor device to the lead frame. A packaged semiconductor device with a reflow wall that surrounds a portion of a solder joint that couples a semiconductor device to a lead frame.
US11062980B2 Integrated circuit packages with wettable flanks and methods of manufacturing the same
Leadframes, integrated circuit packaging with wettable flanks, and methods of manufacturing the same are disclosed. An example packaged device having a leadframe includes a die pad and a lead spaced apart from the die pad. The lead has a proximal end adjacent the die pad and a distal end extending away from the die pad. The lead has a thickness at the distal end that is less than a full thickness of the leadframe between a first outer surface on a die attach side of the leadframe and a second outer surface on a mounting side of the leadframe.
US11062975B2 Package structures
Package structures and methods of forming the same are disclosed. The package structure includes a package, a device and a screw. The package includes a plurality of dies, an encapsulant encapsulating the plurality of dies, and a redistribution structure over the plurality of dies and the encapsulant. The device is disposed over the package, wherein the dies and the encapsulant are disposed between the device and the redistribution structure. The screw penetrates through the package and the device.
US11062974B2 Bonded body, power module substrate, method for manufacturing bonded body, and method for manufacturing power module substrate
A bonded body of the present invention includes a ceramic member formed of ceramics and a Cu member formed of Cu or a Cu alloy. In a bonded interface between the ceramic member and the Cu member, a Cu—Sn layer which is positioned on the ceramic member side and in which Sn forms a solid solution in Cu, a first intermetallic compound layer which is positioned on the Cu member side and contains Cu and Ti, and a second intermetallic compound layer which is positioned between the first intermetallic compound layer and the Cu—Sn layer and contains P and Ti are formed.
US11062971B2 Package structure and method and equipment for forming the same
A packaged semiconductor device and a method and apparatus for forming the same are disclosed. In an embodiment, a method includes bonding a device die to a first surface of a substrate; depositing an adhesive on the first surface of the substrate; depositing a thermal interface material on a surface of the device die opposite the substrate; placing a lid over the device die and the substrate, the lid contacting the adhesive and the thermal interface material; applying a clamping force to the lid and the substrate; and while applying the clamping force, curing the adhesive and the thermal interface material.
US11062966B2 Defect detection structure of a semiconductor die, semiconductor device including the same and method of detecting defects in semiconductor die
A semiconductor device includes a semiconductor die, a defect detection structure and an input-output circuit. The semiconductor die includes a central region and a peripheral region surrounding the central region. The peripheral region includes a left-bottom corner region, a left-upper corner region, a right-upper corner region and a right-bottom corner region. The defect detection structure is formed in the peripheral region. The defect detection structure includes a first conduction loop in the left-bottom corner region, a second conduction loop in the right-bottom corner region, a third conduction loop in the left-bottom corner region and the left-upper corner region and a fourth conduction loop in the right-bottom corner region and the right-upper corner region. The input-output circuit is electrically connected to end nodes of the first conduction loop, the second conduction loop, the third conduction loop and the fourth conduction loop.
US11062964B2 Method for manufacturing semiconductor device, and mounting apparatus
A method for manufacturing a semiconductor device and a mounting apparatus are provided. The method for manufacturing a semiconductor device includes: a placing step for placing, on a bonding surface, a temporary substrate which is transmissive with respect to an alignment mark; an image acquisition step for acquiring an image of the alignment mark and an image of a semiconductor die; a correction step for correcting, on the basis of the image of the alignment mark and the image of the semiconductor die acquired in the image acquisition step, the position in the horizontal direction of a bonding head that pressure bonds the semiconductor die to the temporary substrate; and a pressure bonding step for pressure bonding the semiconductor die to the transmissive substrate on the basis of the corrected position in the horizontal direction.
US11062957B2 FinFET device with wrapped-around epitaxial structure and manufacturing method thereof
A method includes providing a device structure having a substrate, an isolation structure over the substrate, and two fins extending from the substrate and through the isolation structure, each fin having two source/drain (S/D) regions and a channel region; depositing a first dielectric layer over top and sidewall surfaces of the fins and over the isolation structure; forming a gate stack over the first dielectric layer and engaging each fin at the respective channel region; treating surfaces of the gate stack and the first dielectric layer such that the surfaces of the gate stack are more attachable to a second dielectric layer than the surfaces of the first dielectric layer are; after the treating of the surfaces, depositing the second dielectric layer; and etching the first dielectric layer to expose the S/D regions of the fins.
US11062951B2 Method of manufacturing of a field effect transistor having a junction aligned with spacers
A process for fabricating a field-effect transistor includes providing a structure including a first silicon layer and a second layer, made of SiGe alloy, covering the first silicon layer. The method further includes forming a sacrificial gate covered with a hardmask on top of the second layer made of SiGe alloy and etching the second layer made of SiGe alloy, following the pattern of the hardmask in order to delimit an element made of SiGe alloy in the second layer. The method also includes forming spacers on top of the first silicon layer on either side of the sacrificial gate and of the element, removing the sacrificial gate, and enriching the first layer arranged beneath the element in germanium using a germanium condensation process.
US11062943B2 Top via interconnects with wrap around liner
A method includes patterning an interconnect trench in a dielectric layer. The interconnect trench has sidewalk and a bottom surface. A liner layer is deposited on the sidewalls and the bottom surface of the interconnect trench. The interconnect trench is filled with a first conductive metal material. The conducting metal material is recessed to below a top surface of the dielectric layer. A cap layer is deposited on a top surface of the first conductive metal material. The cap layer and the liner layer are of the same material. The method further includes forming a via on a portion of the interconnect trench.
US11062936B1 Transfer stamps with multiple separate pedestals
A stamp for micro-transfer printing comprises a rigid support having a support coefficient of thermal expansion (support CTE). Pedestals are disposed on (e.g., directly on and in contact with) the rigid support. Each of the pedestals is spatially separated from any other of the pedestals. The pedestals have a pedestal coefficient of thermal expansion (pedestal CTE) and the pedestal CTE is greater than the support CTE. Posts are disposed on (e.g., directly on and in contact with) each of the pedestals. Each post has a post coefficient of thermal expansion (post CTE) that is greater than the support CTE.
US11062931B2 Semiconductor apparatus with inner wafer carrier buffer and method
The present disclosure provides one embodiment of a semiconductor processing apparatus. The semiconductor processing apparatus includes a load lock designed to receive a wafer carrier; an inner wafer carrier buffer configured to hold the wafer carrier received from the load lock and to perform a nitrogen purge to the wafer carrier; and a processing module designed to perform a semiconductor process to wafers from the wafer.
US11062925B2 Semiconductor manufacturing apparatus and method of manufacturing semiconductor device
By using a needle having a flat part on a top surface and concave portions at four corners of the top surface, the semiconductor chip pasted on the adhesive tape is pushed up, and the adhesive tape at four corners of the semiconductor chip are uniformly peeled off. Then, the pickup is performed.
US11062921B1 Systems and methods for aluminum-containing film removal
Exemplary etching methods may include flowing a halogen-containing precursor into a substrate processing region of a semiconductor processing chamber. The halogen-containing precursor may be characterized by a gas density greater than or about 5 g/L. The methods may include contacting a substrate housed in the substrate processing region with the halogen-containing precursor. The substrate may define an exposed region of an aluminum-containing material. The contacting may produce an aluminum halide material. The methods may include flowing an etchant precursor into the substrate processing region. The methods may include contacting the aluminum halide material with the etchant precursor. The methods may include removing the aluminum halide material.
US11062914B2 Removal of surface passivation
Methods for removing a passivation film from a copper surface can include exposing the passivation film to a vapor phase organic reactant, for example at a temperature of 100° C. to 400° C. In some embodiments, the passivation film may have been formed by exposure of the copper surface to benzotriazole, such as can occur during a chemical mechanical planarization process. The methods can be performed as part of a process for integrated circuit fabrication. A second material can be selectively deposited on the cleaned copper surface relative to another surface of the substrate.
US11062913B2 Etching process with in-situ formation of protective layer
In the disclosed method, a mask is formed on a microstructure. The mask includes a first pattern positioned over a first region of the microstructure and a second pattern positioned over a second region of the microstructure. A first etching process is performed to etch the microstructure according to the first and second patterns formed in the mask. The first etching process transfers the first and second patterns of the mask into the first and second regions of the microstructure, respectively. A protective layer is subsequently formed over the first pattern of the mask that is positioned over the first region of the microstructure. When the protective layer is formed, a second etching process is performed to etch the microstructure and transfer the second pattern of the mask further into the second region of the microstructure. The method also includes removing the mask and the protective layer from the microstructure.
US11062912B2 Atomic layer etch process using plasma in conjunction with a rapid thermal activation process
A process for etching a film layer on a semiconductor wafer is disclosed. The process is particularly well suited to etching carbon containing layers, such as hardmask layers, photoresist layers, and other low dielectric films. In accordance with the present disclosure, a reactive species generated from a plasma is contacted with a surface of the film layer. Simultaneously, the substrate or semiconductor wafer is subjected to rapid thermal heating cycles that increase the temperature past the activation temperature of the reaction in a controlled manner.
US11062908B2 Contact structure
A semiconductor device includes: a fin structure disposed on a substrate; a gate feature that traverses the fin structure to overlay a central portion of the fin structure; a pair of source/drain features, along the fin structure, that are disposed at respective sides of the gate feature; and a plurality of contact structures that are formed of tungsten, wherein a gate electrode of the gate feature and the pair of source/drain features are each directly coupled to a respective one of the plurality of contact structures.
US11062904B2 Method of forming polysilicon film and film forming apparatus
There is provided a method of forming a polysilicon film, which includes: forming an amorphous silicon film on a substrate; forming a cap layer, which is formed of an amorphous germanium film or an amorphous silicon germanium film, on the amorphous silicon film; forming crystal nuclei of a silicon in the amorphous silicon film by heating the substrate at a first temperature; removing the cap layer after the crystal nuclei are formed; and growing the crystal nuclei by heating the substrate from which the cap layer is removed, at a second temperature equal to or higher than the first temperature.
US11062900B2 Method of reducing effective oxide thickness in a semiconductor structure
Methods and apparatus for forming a semiconductor structure with a scaled effective oxide thickness is disclosed. In embodiments, a method includes depositing amorphous silicon capping layer having a first surface atop a first surface of a titanium nitride (TiN) layer, wherein the titanium nitride layer is atop a first surface of a high-k dielectric layer disposed within a film stack; contacting the first surface of the amorphous silicon capping layer with a nitrogen containing gas; and annealing the film stack.
US11062885B2 Supporting unit and substrate treating apparatus including the same
An apparatus for treating a substrate comprises a chamber having a treatment space for treating the substrate; a supporting unit which supports the substrate, inside the treatment space; a gas supplying unit which supplies process gas into the treatment space; and a plasma source which generates plasma based on the process gas inside the treatment space. The supporting unit comprises a supporting plate on which the substrate is placed; a focus ring which is disposed to surround the substrate supported by the supporting plate; a temperature control unit which adjusts a temperature of the focus ring. The temperature control unit may include a first heater which is disposed to heat the focus ring under the focus ring and to be opposite to the focus ring; and a cooling member which is provided under the first heater.
US11062884B2 Plasma processing apparatus and plasma processing method
The present invention provides a plasma processing apparatus and a plasma processing method which improve the uniformity and accordingly the yield in an etching treatment of a sample. In the plasma processing apparatus or the plasma processing method for treating a wafer placed on an upper surface of a sample table disposed in a treatment chamber in a vacuum container by using plasma generated in the treatment chamber, inductance of the coil is adjusted according to magnitude of an phase difference of the high frequency power flowing through the power supply path such that the voltage of the high frequency power becomes a maximum value or a minimum value, in which the coil is in a connection path that electrically connects, via the coil, positions between each electrode and each matching box on a plurality of power supply paths that electrically connect a plurality of electrodes and a plurality of electrodes high frequency power sources which supply high frequency power to the plurality of electrodes disposed at a center part and an area on an outer peripheral side of the center part in the sample table.
US11062882B2 Plasma processing apparatus and plasma processing method
A plasma processing apparatus according to an exemplary embodiment includes a chamber, a substrate support, an upper electrode, a radio frequency power source, and a direct-current power source device. The substrate support includes a lower electrode. The lower electrode is provided in the chamber. The upper electrode is provided above the substrate support. The radio frequency power source generates a plasma in the chamber. The direct-current power source device is electrically connected to the upper electrode. The direct-current power source device is configured to periodically generate a pulsed negative direct-current voltage. An output voltage of the direct-current power source device is alternately switched between a negative direct-current voltage and zero volts.
US11062880B2 Ion implanter
An ion implanter includes: a main body which includes a plurality of units which are disposed along a beamline along which an ion beam is transported, and a substrate transferring/processing unit which is disposed farthest downstream of the beamline, and has a neutron ray source in which a neutron ray is generated due to collision of a ultrahigh energy ion beam; an enclosure which at least partially encloses the main body; and a neutron ray scattering member which is disposed at a position where a neutron ray which is emitted from the neutron ray source is incident in a direction in which a distance from the neutron ray source to the enclosure is equal to or less than a predetermined value.
US11062879B2 Face-on, gas-assisted etching for plan-view lamellae preparation
Method for preparing site-specific, plan-view lamellae from multilayered microelectronic devices. A focused ion beam that is directed, with an etch-assisting gas, toward an uppermost layer of a device removes at least that uppermost layer and thereby exposes an underlying layer over, or comprising, a target area from which the site-specific, plan-view lamella is to be prepared, wherein the focused ion beam is in a face-on orientation in removing the uppermost layer to expose the underlying layer. In a preferred embodiment, the etch-assisting gas comprises methyl nitroacetate. In alternative embodiments, the etch-assisting gas is methyl acetate, ethyl acetate, ethyl nitroacetate, propyl acetate, propyl nitroacetate, nitro ethyl acetate, methyl methoxyacetate, or methoxy acetylchloride.
US11062877B2 Apparatus of plural charged-particle beams
A multi-beam apparatus for observing a sample with high resolution and high throughput and in flexibly varying observing conditions is proposed. The apparatus uses a movable collimating lens to flexibly vary the currents of the plural probe spots without influencing the intervals thereof, a new source-conversion unit to form the plural images of the single electron source and compensate off-axis aberrations of the plural probe spots with respect to observing conditions, and a pre-beamlet-forming means to reduce the strong Coulomb effect due to the primary-electron beam.
US11062876B2 Evaluation method and evaluation apparatus for electronic device
An evaluation method for an electronic device provided with an insulating film between a pair of electrode layers includes preparing a sample that has a tunnel barrier insulating film as the insulating film; irradiating the sample with electron beams from a plurality of angles to acquire a plurality of images; and performing image processing using the plurality of images to reconstruct a stereoscopic image and generate a cross-sectional image of the sample from the stereoscopic image.
US11062875B2 Imaging apparatus and related control unit
A control unit for controlling a deflector in an imaging apparatus. The imaging apparatus includes an electron gun arranged to provide electron beam to scan a specimen, and the deflector. The deflector is arranged to move the electron beam in a first scanning direction and a second scanning direction that are in the same plane for scanning the specimen. The control unit is configured to determine the first scanning direction and the second scanning direction, and process the determined first scanning direction and the determined second scanning direction based on predetermined equations. The control unit is further configured to provide, based on the processing, a control signal to the deflector to adjust one or both of the first scanning direction and the second scanning direction such that they become substantially orthogonal.
US11062873B2 Hydrogen bleed gas for an ion source housing
A terminal system for an ion implantation system has an ion source with a housing and extraction electrode assembly having one or more aperture plates. A gas box is electrically coupled to the ion source. A gas source is within the gas box to provide a gas at substantially the same electrical potential as the ion source assembly. A bleed gas conduit introduces the gas to a region internal to the housing of the ion source and upstream of at least one of the aperture plates. The bleed gas conduit has one or more feed-throughs extending through a body of the ion source assembly, such as a hole in a mounting flange of the ion source. The mounting flange may be a tubular portion having a channel. The bleed gas conduit can further have a gas distribution apparatus defined as a gas distribution ring. The gas distribution ring can generally encircle the tubular portion of the mounting flange.
US11062871B2 Analog amplification vacuum tube
An analog amplification vacuum tube of the present invention suppresses influences of filament vibration on amplification characteristics. The analog amplification vacuum tube of the present invention is provided with a filament, an anode, a grid and a vibration-proof part. The filament is tensioned linearly and emits thermal electrons. The anode is disposed parallel to the filament. The grid is disposed between the filament and the anode so as to face the anode. The vibration-proof part includes a thin film usable in a vacuum environment and the thin film comes into contact with part of the filament.
US11062869B2 Temperature sensitive pellet type thermal fuse
The temperature sensitive pellet type thermal fuse includes: a conductive envelope having an opening at a first end; a temperature sensitive device housed inside the envelope; a first lead which is installed in the opening of the envelope and has a fixed contact; a second lead connected to a second end of the envelope; a movable contact housed in the envelope; and a weak compression spring housed in the envelope. The temperature sensitive device includes a cylindrical case having an open end which may be arranged at the side of the first lead, a temperature sensitive material housed in the cylindrical case, and a strong compression spring configured to press against the temperature sensitive material.
US11062867B2 Actuator for a medium voltage circuit breaker
An actuator for a medium voltage circuit breaker or recloser includes: at least one movable contact with a contact stem, driven by an electromagnetic drive or a motor drive; and a spring, the spring being positioned in a kinematic chain between the drive and the at least one movable contact or contact stem. An arrangement of the at least one movable contact and the electromagnetic drive or motor drive is coupled to a detection unit for detecting a micromotion activation in order to register an actual movability and availability of the electromagnetic drive or motor drive of the at least one movable contact without changing an actual switch position itself.
US11062863B2 Temperature sensitive pellet type thermal fuse
The temperature sensitive pellet type thermal fuse includes a cylindrical case which has a first end and a second end, a temperature sensitive pellet, an insulating tube, a first lead which is inserted into the insulating tube and has an inner end serving as a contact portion, a movable contact which is electrically connected to the cylindrical case, a weak compression spring, a strong compression spring, and a second lead which is disposed on the second end of the cylindrical case. The movable contact includes a projecting contact portion which is provided at a central part of the movable contact, and the projecting contact portion and the contact portion of the first lead are in contact with each other inside the insulating tube.
US11062859B1 Foot switch-including adaptor assembly for battery-powered hand tool
An adaptor assembly for use with a battery-operated hand tool which includes a battery pack-accepting portion to which a battery pack can be connected utilizes an adaptor having a body which is positionable between the battery pack-accepting portion of the hand tool and the battery pack so that electrical current which is intended to flow between the battery pack and the hand tool during tool operation passes through the adaptor. A foot-operable ON/OFF switch is connected to the adaptor so that operation of the foot-operable switch selectively permits or shuts off the flow of electrical current between the battery pack and the hand tool so that when the adaptor is positioned between the battery pack-accepting portion of the hand tool and the battery pack, the ON/OFF operation of the hand tool can be controlled by way of the foot-operable ON/OFF switch.
US11062857B2 Switching device
A switching device including a frame, a first fixed contact member having a first contact area, and a first movable contact member having a first contact arm provided with a contact area. The first movable contact member is adapted to pivot relative to the frame around a first pivoting axis between a first position and a second position. The switching device includes a spreader member that is adapted to provide a first intermediate position for the first movable contact member in which a projection of the contact area of the first contact arm overlaps at least partially with a projection of the first contact area on a switch plane perpendicular to the first pivoting axis while the contact area of the first contact arm is spaced apart from the first contact area.
US11062855B2 Devices and methods for high voltage and solar applications
Provided herein are devices comprising one or more cells, and methods for fabrication thereof. The devices may be electrochemical devices. The devices may include three-dimensional supercapacitors. The devices may be microdevices such as, for example, microsupercapacitors. In some embodiments, the devices are three-dimensional hybrid microsupercapacitors. The devices may be configured for high voltage applications. In some embodiments, the devices are high voltage microsupercapacitors. In certain embodiments, the devices are high voltage asymmetric microsupercapacitors. In some embodiments, the devices are integrated microsupercapacitors for high voltage applications.
US11062853B2 Solid electrolytic capacitor, and method for producing solid electrolytic capacitor
A solid electrolytic capacitor comprising an anode body having pores, a dielectric, a first conductive polymer layer and a second conductive polymer layer is provided. The dielectric is formed on a surface of the anode body. The first conductive polymer layer includes a first conductive polymer having at least one of structural units represented by the following formula (1) and the following formula (2) and is formed on the dielectric. In the formulas (1) and (2), R1 is an alkyl group having 1 to 12 carbon atoms, an alkoxy group having 1 to 12 carbon atoms, an alkylene oxide group having 1 to 12 carbon atoms, an aromatic group, or a heterocyclic group, each of which optionally has a substituent, A− is a monoanion derived from a dopant and n is 2 or more and 300 or less.
US11062852B2 Solid electrolytic capacitor having an anode terminal and a cathode terminal formed from a single metal plate and method for manufacturing same
A solid electrolytic capacitor includes a porous sintered body, a metal lead, a dielectric layer, a solid electrolyte layer, a first terminal, and a second terminal. The porous sintered body has a pair of main faces opposed to each other, a pair of side faces opposed to each other, and a pair of end faces opposed to each other. The metal lead is extended from one of the pair of main faces. The first terminal includes a first terminal mounting part extending in substantially parallel to each of the pair of side faces, and a pair of arm parts extending in substantially parallel to each of the pair of end faces. The pair of arm parts are opposed to each other. The second terminal includes a terminal connecting part electrically connected to the solid electrolyte layer. The metal lead is electrically connected to each of the pair of arm parts.
US11062851B2 Thin film capacitor embedded substrate and its manufacturing method
Disclosed herein is a thin film capacitor embedded substrate that includes a substrate and a plurality of thin film capacitors including at least first and second thin film capacitors embedded in the substrate. The first and second thin film capacitors are connected in parallel and have mutually different self-resonant frequencies.
US11062850B2 Capacitor
A film capacitor includes a capacitor element, a first bus bar, and a second bus bar. The first bus bar includes a first electrode connecting part connected to the first electrode of the capacitor element at one end and a first connection terminal at another end. The second bus bar includes a second electrode connecting part connected to the second electrode of the capacitor element at one end and a second connection terminal at another end. The first bus bar includes a branch part that is branched from a position closer to the first electrode connecting part than the first connection terminal and extends toward the second electrode along a peripheral surface of the capacitor element. The second bus bar includes an overlapping part that overlaps at least a part of the branch part. The overlapping part is along the peripheral surface of the capacitor element.
US11062848B2 Multilayer ceramic electronic component
A multilayer ceramic electronic component includes a rectangular parallelepiped laminate body. An external electrode is provided at both end surfaces of the laminate body. The external electrode includes a base electrode layer, a conductive resin layer on the base electrode layer, and a plating layer on the conductive resin layer. The conductive resin layer includes a first layer on the base electrode layer, a second layer on the first layer, and a third layer on the second layer. With respect to porosity which is an area ratio of pores obtained from a binary image within a predetermined field of view, the first layer and the third layer have a porosity of equal to or less than about 5% and the second layer has a porosity equal to or more than about 6%. Thicknesses of the first, second, and third layers satisfy predetermined conditions.
US11062847B2 Capacitor component and method for manufacturing the same
A method for manufacturing a capacitor component includes an operation of sintering under a moderately-or-more reducing atmosphere for hydrogen, a body in which a plurality of dielectric layers having internal electrodes printed thereon are laminated,; a first reoxidation operation of subjecting the sintered body to a first reoxidation heat treatment under an oxidizing atmosphere; and a second reoxidation operation of subjecting the body having undergone the first reoxidation heat treatment to a second reoxidation heat treatment under an oxidizing atmosphere.
US11062845B2 Multilayer ceramic capacitor and board having the same
A multilayer ceramic capacitor (MLCC) includes a body including first dielectric layers and second dielectric layers, the body including first to sixth surfaces, a second surface, a third surface, a fourth surface, a fifth surface and a sixth surface; first internal electrodes disposed on the first dielectric layers, exposed to the third surface, the fifth surface, and the sixth surface, and spaced apart from the fourth surface by first spaces; second internal electrodes disposed on the second dielectric layers to oppose the first internal electrodes with the first dielectric layers or the second dielectric layers interposed therebetween, exposed to the fourth surface, the fifth surface, and the sixth surface, and spaced apart from the third surface by second spaces; first dielectric patterns disposed in at least a portion of the first spaces, and second dielectric patterns disposed in at least a portion of the second spaces; and lateral insulating layers.
US11062843B2 Method for producing sintered R-T-B based magnet and diffusion source
A method for producing a sintered R-T-B based magnet includes the steps of: providing a sintered R1-T-B based magnet work (where R1 is a rare-earth element; T is Fe, or Fe and Co); providing a powder of an alloy in which a rare-earth element R2 accounts for 40 mass % or more of the entire alloy, the rare-earth element R2 always including Dy and/or Tb; subjecting the powder to a heat treatment to obtain a diffusion source; and heating the sintered R1-T-B based magnet work with the diffusion source to allow the at least one of Dy and Tb contained in the diffusion source to diffuse from the surface into the interior of the sintered R1-T-B based magnet work. The alloy powder is a powder produced by atomization.
US11062842B2 Multiple interface electronic card
A device includes a first inductor and a second inductor. The first inductor has a first inductive coupling profile. A first circuit component is coupled to the first inductor. A second inductor has a second inductive coupling profile. A second circuit component coupled to the second inductor.
US11062841B2 Electromagnetic shield device, wireless charging transmitting terminal, wireless charging receiving terminal and system
Provided are an electromagnetic shield device, a wireless charging transmitting terminal, a wireless charging receiving terminal and a system. By providing an electromagnetic shielding device between a power transmitting coil and a power receiving coil and making a magnetic sheet comprised in the electromagnetic shielding device not cover the power receiving coil, the magnetic field acting on the metal material is reduced on one hand and the coupling coefficient between the power transmitting coil and the power receiving coil is increased on the other hand, which reduces the intensity of the emitted magnetic field without changing the required voltage. This reduces an amount of heat and loss during wireless charging and improves charging efficiency.
US11062839B2 Transformer winding structure for enhancing winding stability
A transformer winding structure for enhancing winding stability includes a wire frame having a first winding area and a second winding area, a first wire group wound in the first winding area, a second wire group wound in the second winding area, and a third wire group wound in the second winding area and wound in an overlaying manner on the second wire group. The wire frame forms the first winding area and the second winding area by a first plate, a second plate, and a winding column connected to the first plate and the second plate and having a spacer portion. The second plate comprises at least one protrusion protruding from the second plate toward the first plate. The second wire group and the third wire group approach the spacer portion when passing through the position of the protrusion.
US11062832B2 Nonreciprocal circuit element and method of manufacturing the same
A cavity is formed in a surface of a dielectric component on the permanent magnet side. The cavity has a bottom surface extending in a direction along one main surface and a side surface extending in a thickness direction crossing the bottom surface. At least a part of the permanent magnet is disposed in the cavity. A surface of at least a part of the permanent magnet disposed in the cavity is fixed to both of the bottom surface and the side surface through an adhesive.
US11062830B1 Magnetic devices for power converters with light load enhancers
A magnetic device includes a magnetic core, a plurality of first windings forming respective first winding turns, and a second winding forming a second winding turn. Each first winding turn is within the second winding turn, as seen when the magnetic device is viewed cross-sectionally in a first direction. Yet another magnetic device includes a magnetic core, one or more first windings, and one or more second windings magnetically isolated from the one or more first windings.
US11062824B2 Microfluidic channels and pumps for active cooling of cables
Fluidic channels and pumps for active cooling of cables are described. One cable assembly includes a conductor having a length between a first end of the cable and a second end of the cable and a fluidic channel structure that at least partially surrounds the conductor along the length of the conductor. A first pump connector is coupled to a first end of the fluidic channel structure and a second pump connector is coupled to a second end of the fluidic channel structure. Motion of liquid metal, when pumped through the fluidic channel structure, distributes heat away from the conductor.
US11062818B2 Stacking structure having material layer on graphene layer and method of forming material layer on graphene layer
Example embodiments relate to a stacking structure having a material layer formed on a graphene layer, and a method of forming the material layer on the graphene layer. In the stacking structure, when the material layer is formed on the graphene layer by using an ALD method, an intermediate layer as a seed layer may be formed on the graphene layer by using a linear type precursor.
US11062812B2 Floating nuclear power reactor with a self-cooling containment structure
A floating nuclear power reactor including one or two nuclear power reactors positioned in a floating vessel such as a barge or the like. Means is disclosed for flooding the containment structure of the nuclear reactor and for flooding the reactor vessels to cool the same.
US11062810B2 Manufacture of large grain powders with granular coatings
The invention relates generally to uranium fuel in a nuclear reactor and, more particularly, the inclusion of a fuel additive component to the bulk fuel material. The fuel additive component is selected and provided in an amount such that it is effective to improve one or more properties of the bulk fuel material. The fuel additive component has a grain size that is less than the grain size of the bulk fuel material. The granular fuel additive component coats or covers the granular bulk fuel material.
US11062808B2 Method and system for early risk assessment of preterm delivery outcome
System and method for assessing preterm delivery risk for pregnant subject is disclosed. Existing preterm delivery risk assessment methods provide results in late second or third trimester of pregnancy, so little time is available for medical advice. Presently disclosed method and system predict preterm delivery risk within 15 weeks of pregnancy. Microbiome characterization data obtained from microbiome sample from pregnant subject. ‘Microbial taxonomic abundance profile’ generated from microbiome characterization data, contains abundance values of microbes present in the microbiome sample. ‘Taxonomic Composition Skew’ value, and distribution characteristic value for ‘microbial taxonomic abundance profile’, quantifying biases in abundance values of microbes from the microbial taxonomic abundance profile, is computed. Risk of preterm delivery is determined based on the distribution characteristic value or ‘taxonomic composition skew’ value of the set DSR, wherein the set DSR comprises values quantifying biases in the abundance values of microbes from the microbiome sample.
US11062807B1 Systems and methods for determining biometric parameters using non-invasive techniques
A method for assessing a user's health comprises receiving a first biometric parameter from the user's wearable device and determining whether the first biometric parameter was collected for a time period satisfying a time threshold. The method comprises, upon the time threshold being satisfied, calculating a second biometric parameter based on the first biometric parameter and/or user's health attributes provided by the user. The method comprises determining a health score for the user based on the health score, the first biometric parameter, and/or the second biometric parameter. The method further comprises transmitting and populating a user interface associated with the user with the health score, the first biometric parameter, and/or the second biometric parameter.
US11062806B2 User interfaces for dialysis devices
In general, a dialysis device includes a first processing device for monitoring dialysis functions of the dialysis device, a second processing device, a display device, and memory. The memory is configured to store instructions that, when executed, cause the dialysis device to provide, on the display device, a first display region and a second display region, where the first display region is associated with the first processing device and the second display region is associated with the second processing device. At least a portion of the first display region cannot be obscured by the second display region.
US11062801B2 Systems and methods for processing images to prepare slides for processed images for digital pathology
Systems and methods are disclosed for processing an electronic image corresponding to a specimen. One method for processing the electronic image includes: receiving a target electronic image of a slide corresponding to a target specimen, the target specimen including a tissue sample from a patient, applying a machine learning system to the target electronic image to determine deficiencies associated with the target specimen, the machine learning system having been generated by processing a plurality of training images to predict stain deficiencies and/or predict a needed recut, the training images including images of human tissue and/or images that are algorithmically generated; and based on the deficiencies associated with the target specimen, determining to automatically order an additional slide to be prepared.
US11062798B2 Managing insulin administration
A method includes obtaining blood glucose measurements and blood glucose times of a patient from a blood glucose meter and executing a patient management program configured to display on a screen a graphical user interface having a trend window of the blood glucose measurements on the time line. The patient management program is configured to receive, in the trend window magnifying inputs for a magnification window superimposed on a segment of the timeline to specify a date range for a magnified window. The patient management program is further configured to display the magnified window including the blood glucose measurements of the patient from the specified date range and display a first information window including quantitative information associated with the blood glucose measurements from the specified date range.
US11062796B2 Multimode mobile electronic medical record system and working method thereof
The present invention discloses a multimode mobile electronic medical record system and a working method thereof. The multimode mobile electronic medical record system comprises a plurality of mobile terminals, service server, push server, authentication server and cloud server. The mobile terminal comprises a medical record information collection module, a medical record generation module, a medical record synchronization module, a medical record parsing module and a medical record showing module. The service server comprises a medical record storage module and a medical record exchange module. The push server comprises a medical record push module. The authentication server comprises a medical record safety control module. The multimode mobile electronic medical record system can meet collection, integration and transfer of multimode electronic medical record information in a mobile medical environment, and can efficiently improve efficiency and convenience of mobile medical services.
US11062788B2 STT-MRAM failed address bypass circuit and STT-MRAM device including same
A spin transfer torque magnetic random access memory (STT-MRAM) device according to the present embodiment comprises: an STT-MRAM memory array which includes a data storage unit for storing data, a defect area address storage unit for storing an address of a defect area, and a spare area for storing data of a failed area; and a bypass determination unit which includes a volatile information storage element for storing the address of the defect area, stored in the defect area address storage unit and provided thereto, and when memory array access occurs, compares an access address with the address of the defect area stored in the volatile information storage element and causes the memory array access to bypass to the spare area.
US11062786B2 One-time programmable memories with low power read operation and novel sensing scheme
A time-based sensing circuit to convert resistance of a one-time programmable (OTP) element into logic states is disclosed. A one-time programmable (OTP) memory has a plurality of OTP devices. At least one of the OTP devices can have at least one OTP element that is selectively accessible via a wordline and a bitline. The bitline can be coupled a capacitor and the capacitor can be precharged and discharged. By comparing the discharge rate of the capacitor to discharge rate of a reference capacitor in a reference unit (e.g., reference cell, reference resistance, reference selector, etc.), the PRE resistance can be determined larger or smaller than a reference resistance and then converting the OTP element resistance into a logic state.
US11062782B2 Three-dimensional memory device programming with reduced disturbance
Embodiments of 3D memory devices and methods for operating the 3D memory devices are disclosed. In an example, a method for operating a 3D memory device is disclosed. The 3D memory device includes a plurality of memory decks each including a plurality of memory layers in a vertical direction, and a plurality of first dummy memory layers between the first and second memory decks in the vertical direction. Each memory layer in a first memory deck of the plurality of memory decks is first programmed. The first programming includes applying a program voltage to the memory layer and a channel pass voltage smaller than the program voltage to each of the rest of the memory layers in the first memory deck. Each memory layer in a second memory deck of the plurality of memory decks above the first memory deck is second programmed. The second programming includes applying the program voltage to the memory layer and the channel pass voltage to each of the rest of the memory layers in the second memory deck. The second programming also includes applying a 0 V-voltage to at least one of the first dummy memory layers. The second programming further includes applying the 0 V-voltage to each memory layer in the first memory deck.
US11062776B2 Nonvolatile memory device and memory system including thereof
A nonvolatile memory device includes a memory cell array including a plurality of memory cells that are programmed based on a high voltage, a high voltage generator to generate the high voltage by boosting an input voltage based on a pumping clock, a pumping clock generator to generate the pumping clock, a high voltage detector to generate a detection signal by comparing an adjustment voltage with a reference voltage, a programming current controller to adjust a programming current flowing through each of selected memory cells of the plurality of memory cells; and a control logic to adjust a frequency of the pumping clock and a current driving capability of the programming current based on the detection signal during a programming period with respect to the selected memory cells. The detection signal includes information indicating whether the high voltage reaches to a target voltage.
US11062774B2 Intelligent flash reprogramming
Apparatus, methods, and computer-readable media for programming, reading, and servicing non-volatile storage device to improve data retention time and data density are disclosed. According to one embodiment, a method of managing a non-volatile memory storage device includes generating output values based on an expected pattern of discrete states stored in memory cells of the storage device, comparing output values for the memory cells to expected output values using a pre-selected threshold, and based on the comparing, programming other memory cells of the storage device to refresh the programming of the other memory cells. Methods of performing service and management operations for interrupting a host system coupled a non-volatile memory storage device are also disclosed.
US11062765B2 Semiconductor integrated circuit device
In an SRAM cell using vertical nanowire (VNW) FETs, transistors (PD1, PD2) constituting a drive transistor are placed on both sides of a transistor (PU1) in an X direction, and transistors (PD3, PD4) constituting a drive transistor are placed on both sides of a transistor (PU2) in the X direction. An access transistor (PG1) is placed on one-hand side in the X direction of the transistor (PU1), and an access transistor (PG2) is placed on the other-hand side in the X direction of the transistor (PU1).
US11062761B1 Digital address compensation for memory devices
A position of a memory cell to be accessed within a memory field of a memory device is identified. A region associated with the memory field within which the position is located is identified. A compensation parameter comprising a fixed electric step value for the region is identified. The compensation parameter may be selected from a set of compensation parameters or may be calculated based upon the position of the memory cell. The compensation parameter is applied to an action performed on a line connected to the memory cell during the access of the memory cell.
US11062759B1 Memory device and programming method thereof
A memory device and a programming method thereof are provided. The memory device includes a memory array, a plurality of word lines and a voltage generator. During a programming procedure, one of the word lines is at a selected state and others of the word lines are at a deselected state. Some of the word lines, which are at the deselected state, are classified into a first group and a second group. The first group and the second group are respectively located at two sides of the word line, which is at the selected state. The voltage generator provides a programming voltage to the word line, which is at the select state, during a programming duration. The voltage generator provides a first two-stage voltage waveform to the word lines in the first group and provides a second two-stage voltage waveform to the word lines in the second group.
US11062755B2 Memory with partial bank refresh
Memory with partial bank refresh is disclosed herein. In one embodiment, a memory system includes a memory controller and a memory device operably connected to the memory controller. The memory device includes (i) a memory array having a memory bank with a plurality of memory cells arranged in a plurality of memory rows and (ii) circuitry. In some embodiments, the circuitry is configured to disable at least one memory row of the memory bank from receiving refresh commands such that memory cells of the at least one memory row are not refreshed during refresh operations of the memory device. In some embodiments, the memory controller is configured to track memory rows that include utilized memory cells and/or to write data to the memory rows in accordance with a programming sequence of the memory device.
US11062751B2 Memory device
A memory device includes a substrate including first and second regions, the first region having first wordlines and first bitlines, and the second region having second wordlines and second bitlines, a first memory cell array including first memory cells in the first region, the first memory cell array having volatility, and each of the first memory cells including a cell switch having a first channel region adjacent to a corresponding first wordline of the first wordlines, and a capacitor connected to the cell switch, and a second memory cell array including second memory cells in the second region, the second memory cell array having non-volatility, and each of the second memory cells including a second channel region adjacent to a corresponding second wordline of the second wordlines, and a ferroelectric layer between the corresponding second wordline of the second wordlines and the second channel region.
US11062740B2 Memory with non-volatile configurations for efficient power management and operation of the same
A memory device is provided. The memory device comprises a memory array and circuitry configured to determine one or more settings for the memory array corresponding to a powered-on state of the memory device, to store the one or more settings in a non-volatile memory location, and in response to returning to the powered-on state from a reduced-power state, to read the one or more settings from the non-volatile memory location.
US11062739B2 Semiconductor chip having memory and logic cells
A semiconductor chip is provided. The semiconductor chip includes a memory cell and a logic cell disposed aside the memory cell, and includes signal and ground lines with the memory and logic cells located therebetween. The memory cell includes first and second active structures extending along a first direction, and includes a storage transmission gate line, first through third gate lines and a read transmission gate line extending along a second direction. The storage transmission gate line includes first and second line segments, which respectively extends across the active structures. The first through third gate lines continuously extend across the first and second active structures. The read transmission gate line includes third and fourth line segments, which respectively extend across the active structures. The first through third gate lines are located between the storage and read transmission gate lines.
US11062738B2 Signalling of video content including sub-picture bitstreams for video coding
In various implementations, modifications and/or additions to the ISOBMFF are provided to process video data. A plurality of sub-picture bitstreams are obtained from memory, each sub-picture bitstream including a spatial portion of the video data and each sub-picture bitstream being independently coded. In at least one file, the plurality of sub-picture bitstreams are respectively stored as a plurality of sub-picture tracks. Metadata describing the plurality of sub-picture tracks is stored in a track box within a media file in accordance with a file format. A sub-picture base track is provided that includes the metadata describing the plurality of sub-picture tracks.
US11062735B2 Radiation image display apparatus and radiation image photographing system
A radiation image display apparatus that includes: a hardware processor that generates the moving image for preview based on the pieces of image data of the plurality of frames obtained by moving image photographing of an object with radiation; and a holder that holds the moving image, wherein the hardware processor further: performs reproduction control on the moving image, performs image adjustment on the moving image, displays the moving image on the display during photographing the moving image, and displays the moving image according to the reproduction control or the moving image subjected to the image on the display.
US11062734B1 Multi-spindle and multi-actuator data storage devices
A hard disk drive includes an enclosure housing a first set of magnetic recording media coupled to a first spindle motor, a second set of magnetic recording media coupled to a second spindle motor, and a third set of magnetic recording media coupled to a third spindle motor. The first set of magnetic recording media at least partially overlaps with the second set of magnetic recording media and the third set of magnetic recording media.
US11062730B2 Method for evaluating magnetic head and evaluation apparatus of magnetic head
According to one embodiment, a method for evaluating a magnetic head is disclosed. The method can include measuring an electrical characteristic of a current path when an alternating-current magnetic field is applied to the magnetic head. The magnetic head includes the current path. The current path includes an oscillator. The method can include, based on the electrical characteristic, deriving a frequency value relating to an oscillation frequency of the oscillator.
US11062729B2 Identifying damaged tunneling magnetoresistance sensors using electrical resistance
Embodiments of the present invention provide methods, systems, and computer program products for identifying damaged tunneling magnetoresistance (TMR) sensors. In one embodiment, resistances of a TMR sensor are measured upon application of one or both of negative polarity bias current and positive polarity bias current at a plurality of current magnitudes. Resistances of the TMR sensor can then be analyzed with respect to current, voltage, voltage squared, and/or power, including analyses of changes to slopes calculated with these values and hysteresis-induced fluctuations, all of which can be used to detect damage to the TMR sensor. The present invention also describes methods to utilize the measured values of neighbor TMR sensors to distinguish normal versus damaged parts for head elements containing multiple TMR read elements.
US11062728B2 Magnetic head having specific distance between magnetic pole, stacked body, and first shield, and magnetic recording device including same
According to one embodiment, a magnetic head includes a magnetic pole, a first shield, a first magnetic layer provided between the magnetic pole and the first shield, a second magnetic layer provided between the first magnetic layer and the first shield, and an intermediate layer provided between the first magnetic layer and the second magnetic layer. The intermediate layer is nonmagnetic. A first distance between the magnetic pole and the first magnetic layer along a first direction is not less than 1% and not more than 10% of a second distance between the magnetic pole and the first shield along the first direction. The first direction is from the first magnetic layer toward the second magnetic layer.
US11062721B2 Transmission-agnostic presentation-based program loudness
This disclosure falls into the field of audio coding, in particular it is related to the field of providing a framework for providing loudness consistency among differing audio output signals. In particular, the disclosure relates to methods, computer program products and apparatus for encoding and decoding of audio data bitstreams in order to attain a desired loudness level of an output audio signal.
US11062719B2 Downscaled decoding
A downscaled version of an audio decoding procedure may more effectively and/or at improved compliance maintenance be achieved if the synthesis window used for downscaled audio decoding is a downsampled version of a reference synthesis window involved in the non-downscaled audio decoding procedure by downsampling by the downsampling factor by which the downsampled sampling rate and the original sampling rate deviate, and downsampled using a segmental interpolation in segments of ¼ of the frame length.
US11062718B2 Encoding apparatus and decoding apparatus for transforming between modified discrete cosine transform-based coder and different coder
An encoding apparatus and a decoding apparatus in a transform between a Modified Discrete Cosine Transform (MDCT)-based coder and a different coder are provided. The encoding apparatus may encode additional information to restore an input signal encoded according to the MDCT-based coding scheme, when switching occurs between the MDCT-based coder and the different coder. Accordingly, an unnecessary bitstream may be prevented from being generated, and minimum additional information may be encoded.
US11062717B2 Systems and methods for processing an audio signal for replay on an audio device
Systems and methods for processing an audio signal are provided for replay on an audio device. An audio signal is spectrally decomposed into a plurality of subband signals using band pass filters. Each of the subband signals are provided to a respective modulator and subsequently, from the modulator output, provided to a respective first processing path that includes a first dynamic range compressor, DRC. Each subband signal is feedforward compressed by the respective first DRC to obtain a feedforward-compressed subband signal, wherein the first DRC is slowed relative to an instantaneous DRC. Subsequently, each feedforward-compressed subband signal is provided to a second processing path that includes a second DRC, wherein the feedforward-compressed subband signal is compressed by the respective second DRC and outputted to the respective modulator. Modulation of the subband signals is then performed in dependence on the output of the second processing path. Finally, the feedforward-compressed subband signals are recombined.
US11062715B2 Time-domain stereo encoding and decoding method and related product
An audio encoding and decoding method and a related apparatus are provided. The audio encoding method may include: determining a coding mode of a current frame; when determining that the coding mode of the current frame is an anticorrelated signal coding mode, performing time-domain downmix processing on left and right channel signals in the current frame by using a time-domain downmix processing manner corresponding to the anticorrelated signal coding mode, to obtain a primary channel signal and a secondary channel signal, where the time-domain downmix processing manner corresponding to the anticorrelated signal coding mode is a time-domain downmix processing manner corresponding to an anticorrelated signal channel combination scheme, and the anticorrelated signal channel combination scheme is a channel combination scheme corresponding to a near out of phase signal; and encoding the obtained primary channel signal and secondary channel signal in the current frame.
US11062713B2 Spatially formatted enhanced audio data for backward compatible audio bitstreams
In general, techniques are described by which to specify spatially formatted enhanced audio data for backward compatible audio bitstreams. A device comprising a memory and one or more processors may be configured to perform the techniques. The memory may store the backward compatible bitstream that conforms to a legacy transport format. The processor(s) may obtain, from the backward compatible bitstream, legacy audio data that conforms to a legacy audio format and a spatially formatted extended audio stream. The processor(s) may process the spatially formatted extended audio stream to obtain extended audio data that enhances the legacy audio data. The processor(s) may next obtain, based on the legacy audio data and the extended audio data, enhanced audio data that conforms to an enhanced audio format. The processor(s) may output the enhanced audio data to one or more speakers.
US11062712B2 Seamless text dependent enrollment
Methods and systems for transforming a text-independent enrollment of a customer in a self-service system into a text-dependent enrollment are provided. A request for authentication of a customer that is enrolled in the self-service system with a text-independent voice print is received. A request is transmitted to the customer to repeat a passphrase and the customer's response is received as an audio stream of the passphrase. The customer is authenticated by comparing the audio stream of the passphrase against the text-independent voice print and if the customer is authenticated then a text-dependent voice print is created based on the passphrase, otherwise discard the audio stream of the passphrase.
US11062709B2 Providing pre-computed hotword models
Methods, systems, and apparatus, including computer programs encoded on a computer storage medium, for obtaining, for each of multiple words or sub-words, audio data corresponding to multiple users speaking the word or sub-word; training, for each of the multiple words or sub-words, a pre-computed hotword model for the word or sub-word based on the audio data for the word or sub-word; receiving a candidate hotword from a computing device; identifying one or more pre-computed hotword models that correspond to the candidate hotword; and providing the identified, pre-computed hotword models to the computing device.