| Document | Document Title |
|---|---|
| US11032302B2 |
Traffic anomaly detection for IoT devices in field area network
A method, computer system, and computer program product that generates a whitelist for each subject device in a field area network (FAN). The whitelist includes one or more whitelist entries corresponding to one or more peer devices in the same FAN communicating with the subject device. Each whitelist entry includes one or more attribute values expected in respective traffic between the subject device and each peer device that is represented by a respective whitelist entry. The traffic in the FAN is monitored at one or more points of the FAN for anomaly by use of the whitelist. |
| US11032298B1 |
System and method for continuous collection, analysis and reporting of attack paths in a directory services environment
A system and method for analyzing directory service environment attack paths for an enterprise may continuously collect data about the attack paths and provide alerts. The system and method may also analyze the nested object relationships within Directory Services alongside objects at risk for Credential Theft to calculate all possible attack paths within the environment. |
| US11032296B1 |
Rogue endpoint detection
Evaluating computers, devices, or endpoints on a network, such as a large network of computers in an enterprise environment. Detecting computers, devices, or endpoints that may present a security risk to the network or may be compromised in some way. Generating network traffic that, in some cases, should be ignored or should prompt specific, known responses. Detecting endpoint(s) that respond to such network traffic in an anomalous way, or otherwise attempt to perform certain operations based on such network traffic. |
| US11032295B2 |
Security monitoring information-based provisioning of digital certificates in software defined data centers
Techniques for provisioning of digital certificates in software defined data centers (SDDCs) based on security monitoring information are disclosed. In one example, a set of digital certificates may be assigned to a group of computing resources of an SDDC. Each digital certificate may include a different security level. The group of computing resources may include applications that use a first digital certificate with a first security level for data communication. Further, security monitoring information associated with the group of computing resources may be received. Furthermore, a second security level to be used for the group of computing resources may be determined based on the security monitoring information. The group of computing resources may be managed by communicating the second security level to an agent associated with the group of computing resources. The agent may then implement a second digital certificate with the second security level for the applications. |
| US11032292B2 |
Systems and methods for hybrid blockchain control
Various embodiments of the present application are directed towards systems and methods for hybrid blockchain control. According to some embodiments a method for hybrid blockchain control, an update to a distributed blockchain is received from a blockchain system. The blockchain system includes multiple nodes individually storing copies of the distributed blockchain and individually updating the copies by a consensus process. A determination is made as to whether the distributed blockchain has been fraudulently modified based on the received update. In response to determining the distributed blockchain has been fraudulently modified: 1) a corrective block is disseminated to the blockchain system to trigger the consensus process on the nodes; and 2) a predefined override in the consensus process is invoked to update the copies of the distributed blockchain in a manner that bypasses an illegitimate block. Further, the predefined override is invoked while the consensus process processes the corrective block. |
| US11032290B2 |
Context-based analytics and intelligence
According to some implementations, context-based information is provided. The method can establish a first context for a user to start a process of correlation of information from multiple sources. The method can then authorize the user to access information from one or more sources of information. The method can request the first information from the one or more sources of information based on the first context. Based on the first information received from the one or more sources of information, the method can revise the first context to generate a second context. The method can use the second context to correlate second information from the one or more sources of information. The method can filter the second information for the user to determine a relevant subset of information. Eventually, the method can send the relevant subset of information to a client device associated with the user. |
| US11032289B2 |
Cloning management system for touchless device level or group fleet management
Described herein is a method of processing location and level changes for managed devices, which includes a child device sensing a move to a new location and level in a tree structure including levels having different permissions and policies, and the child device receiving permissions and policies for the new location and level via a master clone file. Also described is a method of updating policies in a device in a fleet of image forming devices that includes identifying a setting in the device that should not be updated automatically, setting a respective flag associated with the identified setting, thereby indicating that the setting is not to be updated automatically, receiving a file with updated policy values, and updating settings of the device according to the updated policy values except for the identified setting. Also described is a method for processing exemption requests in a fleet of image forming devices. |
| US11032286B1 |
Block chain authentication systems and methods
Techniques provided herein relate to registering secondary authentication information with a blockchain. A block chain is stored, having primary authentication information, secondary authentication information, or both that is used in authenticating one or more electronic data action requests provided by a client system to a backend system. The client system, a secondary device, or both registers the secondary device with blockchain node, such that secondary device data is stored as the primary authentication information, the secondary authentication information, or both in the blockchain node. |
| US11032284B2 |
Cloud-based coordination of remote service appliances
Systems, and methods are provided to provide cloud-based coordination of customer premise service appliances. A system can include a cloud-based service platform, which includes a coordination server and a cloud-based service appliance, and an on-premise service appliance. The coordination server is configured to establish a service session, select a service appliance, and control a sequence of operations on the selected service appliance. Establishing the service session can include establishing a service session with a first client in response to a service request received from the first client, the first client associated with an account including a service policy. Selecting the service appliance can include selecting the cloud-based service appliance or the on-premise service appliance, based on the service policy, to handle the service request. Upon selection of the on-premise service appliance, the coordination server controls a sequence of operations performed by the on-premise service appliance to satisfy the service request. |
| US11032280B1 |
Proxy for controlling access to services
A provider network implements a proxy to control access to web-based resources of a provider network. The proxy receives requests to access web-based services. The proxy allows access to a web-based service only if user-configured access control rules are satisfied and credentials associated with the web-based service are authenticated. The proxy prevents access to a web-based service if user-configured access control rules are not satisfied or credentials associated with the web-based service are not authenticated. The provider network may also implement a proxy configuration service to set up and launch the proxy. The proxy configuration service receives from the client a specification of the access control rules, configures the proxy based on the access control rules, and launches the proxy. |
| US11032276B2 |
Mount, authentication device, authentication method, and program
A wearable article includes: an annular casing that surrounds a space into which a body of a user is to be inserted; a light-emitting element that is provided in the casing, the light-emitting element emitting light towards the space; an imaging element that is provided in the casing, the imaging element capturing and obtaining an image of the space when the light-emitting element emits light; and an authentication circuit that authenticates the user based on a vein pattern obtained in advance and the image. |
| US11032274B2 |
Card-personalization system
A personalized card may be generated using a card-personalization system accessible via multiple access points on a network. In some aspects, the personalized card may include a physical card having an image selected by a user in a card-personalization process. The user may be assigned a code that may both authenticate the user to access the card-personalization system and identify a position of the user in the card-personalization process. The card-personalization process may include a selection process for selecting an image, an approval process for approving the image, and a creation process for generating the personalized card including the image. |
| US11032273B2 |
Method for authenticating secret information which protects secret information
The computer-implemented method for authenticating secret information according to an aspect of the present disclosure, comprises receiving, by an authentication server, Q{right arrow over (X)} from a terminal for registering secret information; storing, by the authentication server, the received Q{right arrow over (X)}; receiving, by the authentication server, a vector {right arrow over (Z)} from a terminal for requesting authentication of secret information; calculating, by the authentication server, the inner product of Q{right arrow over (X)} and {right arrow over (Z)}; calculating, by the authentication server, ½(n−the inner product); and determining, by the authentication server, that the authentication is successful if ½(n−the inner product) is within a predetermined value and that the authentication fails otherwise. |
| US11032272B2 |
Mobile number verification for mobile network-based authentication
A mobile number of a mobile device can be employed as an authorization factor when the mobile device is connected to a WLAN. When a user attempts to interact with a restricted access server via the mobile device, verification functions loaded on the mobile device determine whether the mobile device is connected to a WLAN. If so, the verification functions cause the mobile device to open a port on the cellular network interface of the mobile device and transmit data packets to a mobile device identification server via a cellular network. The mobile device identification server can then determine the mobile number of the mobile device based on the cellular network IP address of the mobile device, and transmit the mobile number to the restricted access server as an authentication factor. |
| US11032270B1 |
Secure provisioning and validation of access tokens in network environments
Disclosed embodiments relate to systems and methods for securely validating access tokens. Techniques include receiving, at a token validation resource, a token provided from a network application, the token having an associated destination network address; wherein the token was dynamically created, and the token was provided to the network application; performing a validation process for the token, the validation process being based on at least the destination network address associated with the token; and determining, based on an outcome of the validation process, whether to permit the network application to assert the token to a destination network resource associated with the destination network address. |
| US11032269B2 |
Method and system for establishing trusted communication using a security device
Method and system for secure access from a security device at a local network location to a remote network location are disclosed. At the security device having a unique identifier (UID), processor, and memory, a security software is obtained from a remote network location, the security software obtaining a personal identification number (PIN) of a user, and the UID of the security device. The PIN, the UID and the private security software are forwarded to the remote network location for generating a credential code, including encrypting the credential code. At the security device, the credential code is obtained from the remote network location, and authenticity of the PIN and the UID is verified, without communicating over a network, including decrypting the credential code. Upon verifying the authenticity of the PIN and the UID, access credentials to the remote network location are retrieved. |
| US11032268B2 |
System and method for providing persistent user identification
Embodiments provide a system and method for network tracking. Through various methods of packet encapsulation or IP option filling, one or more packets of information can be tagged with a unique security tag to prevent unauthorized access. A user agent can be validated by an authentication server through acceptance of one or more user credentials. The authentication server can generate a security token that can be transmitted to the user agent. The user agent can generate a keystream from the security token, and portions of that keystream can be attached to the packets as the security tag. The tagged packets can be forwarded to an authenticator, who can recreate the keystream from a copy of the security token provided by the authentication server. If the tags generated from the authenticator match the tags on the tagged packet, the authenticator can strip the tag from the tagged packet and forward the packet on to its next network address. |
| US11032267B2 |
Securing sensitive historian configuration information
Systems and methods for securing configuration information for cloud-based services. A system comprises a data store and data sets including plant process information and configuration information. A memory device stores computer-executable instructions. When executed by a processor coupled to the cloud service, the instructions receive configuration information, store it in a data file, apply a generated certificate to the file, and deploy the resulting protected configuration data file to the cloud-based service. In addition, the protected configuration data file is made available by obtaining the file from the cloud-based service. |
| US11032265B2 |
System and method for automated customer verification
Techniques are disclosed for identifying and authenticating prospective certificate authority customers of a secure socket layer (SSL) certificate prior to receiving an order from the customer. The CA generates a list of prospective customers of digital certificates (e.g., by scanning networked servers via the Internet for the presence of an installed digital certificate). The CA retrieves data for each customer on the list and determines, based on a set of approval criteria, which prospective customers to target in enrollment campaigns. For each approved customer, the CA initiates an enrollment process prior to receiving a request from the customer to provide a certificate. |
| US11032260B2 |
Front-end user interface for confidential transactions
The disclosed technology is generally directed to security technology. In one example of the technology, it is determined that an attempted function associated with an application has at least one requirement including at least particular security credentials for a user of the application. A transaction is caused to be sent to each node in a permissioned blockchain that stores an access level block corresponding to the user. The transaction is associated with a real-time determination as to whether the at least one requirement for the attempted function is met. A transaction result is received from the permissioned blockchain. The attempted function is selectively allowed based on the transaction result. |
| US11032257B1 |
Method for covertly delivering a packet of data over a network
A method for covertly transmitting a packet of data over a network is provided. A datagram for transmission is fragmented. A portion of the data in the datagram is encrypted and stored within a fragment section of the datagram which is not a first fragmented section. Only the fragmented section that contains the encrypted data is transmitted. No other fragment of the fragmented datagram is transmitted such that the lone fragment transmission will appear as error. |
| US11032256B2 |
Secure data exchange
A computer implemented method of exchanging first valuable data at a first node for second valuable data from a second node, the method comprising the steps of: applying a first encryption to a first plurality of messages, at the first node, with a function having a commutative property, so as to create a blinded first plurality of messages; sending the blinded first plurality of messages from the first node to the second node, wherein the first valuable data is concealed in one message of the blinded first plurality of messages; receiving a blinded second plurality of messages at the first node, wherein the second valuable data is concealed in one message of the blinded second plurality of messages and the blinded second plurality of messages have been encrypted with a second encryption; in response to receiving the blinded second plurality of messages at the first node, applying a third encryption to the blinded second plurality of messages with a function having a commutative property so as to create double blinded second plurality messages which have been encrypted with at least the second encryption and the third encryption; sending the double blinded second plurality messages from the first node to the second node; subsequent to sending double blinded second plurality messages from the first node to the second node, receiving double blinded first plurality messages at the first node, wherein the double blinded first plurality of messages have been encrypted with at least the second encryption and a fourth encryption; in response to receiving double blinded first plurality messages at the first node, removing the first encryption of the second plurality of double blinded messages to provide partially decrypted blinded first plurality of messages which remain encrypted with the third encryption; after removing the first encryption, sending at least one message of the partially decrypted blinded first plurality of messages to the second node; subsequent to sending at least one message of partially decrypted blinded first plurality of messages to the second node, receiving at least one partially decrypted message which is one of the second plurality of messages with the second encryption removed; and in response to receiving at least one partially decrypted message, exchanging with the second node further partially decrypted messages of the first and second plurality of messages. |
| US11032255B2 |
Secure comparison of information
The technology encompasses new uses of already-known cryptographic techniques. The technology entails computer-based methods of sharing information securely, in particular an asymmetric method of secure computation that relies on the private-key/public key paradigm with homomorphic encryption. The methods and programmed computing apparatuses herein apply mathematical concepts to services or tasks that are commercially useful and that have not hitherto been possible. Applications of the methods within cloud computing paradigms are presented. Applications of the methods and apparatus herein are far-ranging and include, but are not limited to: purchase-sale transactions such as real estate or automobiles, where some aspect of price negotiation is expected; stock markets; legal settlements; salary negotiation; auctions, and other types of complex financial transactions. |
| US11032250B2 |
Protective apparatus and network cabling apparatus for the protected transmission of data
Provided is a network cabling apparatus and protective apparatus for the protected transmission of data, comprising two protective devices which are assigned to one another and can each be connected to one end of a data transmission device, each protective device having: a first interface for connection to the data transmission apparatus; a second interface for connection to a device; and a crypto unit which has a cryptographic function that can be configured in an equivalent manner on each of the assigned protective devices and which cryptographically protects the data to be transmitted. |
| US11032246B2 |
Context based firewall services for data message flows for multiple concurrent users on one machine
Some embodiments of the invention provide a novel architecture for capturing contextual attributes on host computers that execute one or more machines, and for consuming the captured contextual attributes to perform services on the host computers. The machines are virtual machines (VMs) in some embodiments, containers in other embodiments, or a mix of VMs and containers in still other embodiments. Some embodiments execute a guest-introspection (GI) agent on each machine from which contextual attributes need to be captured. In addition to executing one or more machines on each host computer, these embodiments also execute a context engine and one or more attribute-based service engines on each host computer. One of these service engines is a firewall engine. Through the GI agents of the machines on a host, the context engine of that host in some embodiments collects contextual attributes associated with network events and/or process events on the machines. The context engine then provides the contextual attributes to the firewall engine, which, in turn, use these contextual attributes to identify firewall rules to enforce. |
| US11032242B2 |
Communication protocols in integrated systems
Systems and methods comprise a gateway that includes a processor coupled to a security system at a premises via a channel. The channel comprises a protocol of the security system that is a proprietary bus protocol of the control panel of the security system. A touchscreen at the premises is coupled to the gateway and presents user interfaces. The user interfaces include a security interface that provides control of functions of the security system and access to data collected by the security system, and a network interface that provides access to network devices. A camera is located at the premises and coupled to the gateway. A security server at a remote location is coupled to the gateway. The security server comprises a client interface through which remote client devices exchange data with the gateway and the security system. |
| US11032236B2 |
Technologies for content delivery network with multi-access edge computing
Technologies for mobile content delivery include an edge computing device, a mobile terminal, and a content delivery network server. The edge computing device has a network location between the mobile terminal and a core network, and the content delivery network server is accessed through the core network. The edge computing device receives a content request from the mobile terminal and modifies the content request to identify the network location of a zone-specific proxy of the edge computing device. The edge computing device forwards the content response to the content delivery network server. The content delivery network server may send a content response to the zone-specific proxy or the mobile terminal. The content response identifies an address of a network content resource. The network content resource is located at a surrogate content delivery network server of the edge computing device. Other embodiments are described and claimed. |
| US11032234B2 |
ARP offloading for managed hardware forwarding elements
Some embodiments provide an ARP-offload service node for several managed hardware forwarding elements (MHFEs) in a datacenter in order to offload ARP query processing by the MHFEs. The MHFEs are managed elements because one or more network controllers (e.g., one or more management servers) send configuration data to the MHFEs to configure their operations. In some of these embodiments, the network controllers configure the MHFEs to create logical forwarding elements (e.g., logical switches, logical routers, etc.) each of which can span two or more managed forwarding elements. |
| US11032233B2 |
Checkout chassis chat platform
A computerized method for integrating message-based services with external execution environments includes receiving from a first external execution environment a request to access message-based services of a messaging software. A processor determines whether the first external execution environment includes a pre-existing relationship with the messaging software. If no, the processor requests access to a second external execution environment on behalf of the first external execution environment. The processor receives a response from the second external execution environment granting the access; and the processor grants the request from the first external execution environment to access the message-based services in the messaging service while integrating services from the second external execution environment to the messaging software. If yes, the processor identifies parameters associated with the pre-existing relationship and grants the request from the first external execution environment. |
| US11032232B2 |
Chat-based support of multiple communication interaction types
A chat-based communication capability is presented. In at least some embodiments, a chat-based communication capability utilizes a chat-based communication paradigm to support one or more communication interaction types not typically supported by chat-based communication paradigms. In at least some embodiments, a chat-based communication capability supports chat-based communication between a human entity and a non-human entity (e.g., a device, a program, a process, an organization, or the like). In at least some embodiments, a chat-based communication capability supports chat-based communication between multiple non-human entities (e.g., where the non-human entities may include devices, programs, processes, organizations, or the like). |
| US11032227B2 |
Stacked chat conversations
Disclosed is a method for automatic arrangement of communications for improved functionality. A client device presents a stacked set of conversation cells on a display of the client device. The stacked set of conversation cells is stacked such that a first conversation cell corresponding to a first chat conversation from the stacked set of conversation cells is a top conversation cell of the stacked set of conversation cells. While presenting the stacked set of conversation cells, the client device receives a first chat communication that is a part of a second chat conversation that is different than the first chat conversation. In response to the receiving of the first chat communication, the client device modifies the presentation of the stacked set of conversation cells such that a second conversation cell corresponding to the second chat conversation is presented as the top conversation cell of the stacked set of conversation cells. |
| US11032224B2 |
RNA targeting methods and compositions
Provided herein are CRISPR/Cas methods and compositions for targeting RNA molecules, which can be used to detect, edit, or modify a target RNA. |
| US11032223B2 |
Filtering electronic messages
Improved systems and methods for automatically discovering and filtering electronic messages. These systems and methods improve the operation of computer apparatus to achieve dramatic reductions in processing resources, data storage resources, network resources, and filter production times compared to conventional approaches. In some examples, improvements result from configuring computer apparatus to perform a unique sequence of specific electronic message processing rules in a network communications environment. In this regard, these examples are able to automatically learn the structures and semantics of machine generated electronic message headers, accelerating the ability to support new message sources and new markets. These examples provide a purchase related electronic message discovery and filtering service that is able to identify and filter purchase related electronic messages with high accuracy across a wide variety of electronic message formats. |
| US11032222B2 |
Notifying users of offensive content
Techniques are described that determine when content to be shared by a user may be offensive, and providing the user with a notification that the content may be offensive. In some examples, the user may be provided with a notification that includes a selectable option allowing the user to withdraw or undo the content from being shared, additional information regarding why the content was determined to be offensive, content sharing guidelines, and/or advice for how to revise the content to be less offensive. In some examples, the notification may be presented for a predetermined period of time, and the content may be held in a pending state and not shared with other users until expiration of the predetermined period. |
| US11032219B2 |
Network aware application dependent adaptive protocol selection for IoT communications
Disclosed in some examples are methods, systems, and devices which perform automatic selection of an application-layer communication protocol based upon one or more communication characteristics of the sending application and one or more characteristics of the network connection between the sending device and the recipient. The selection of which protocol to use may be made on a message-by-message basis, periodically at various intervals (e.g., every predetermined time period), once upon application initialization, or the like. By dynamically selecting an application-layer communications protocol, an application may leverage the advantages of a specific protocol given the communication characteristics of the application and characteristics of the network connection at that time. |
| US11032218B2 |
Method and system of converting email message to AI chat
Embodiments disclosed herein generally relate to a system and method for initiating an interactive chat via HTTP request. A web server of an organization computing system receives the HTTP request from a web client executing on a remote client. The HTTP request is triggered by a selection of a dialogue request embedded in an electronic mail message. The web server transmits an API call to a back-end computing system of the organization computing system based on information included in the HTTP request. The back-end computing system parses the API call to identify a user identifier corresponding to a user of the remote client device and a request identifier corresponding to the selected dialogue request embedded in the electronic mail message. The back-end computing system initiates the interactive chat via a text-based communication channel. The back-end computing system generates and transmits an electronic message comprising a response to the dialogue request. |
| US11032215B2 |
Allocating virtual resource based on block chain
A method for allocating a virtual resource based on a blockchain, including: receiving a resource allocation transaction sent by a client, wherein the resource allocation transaction includes a user identifier of a target user; in response to the resource allocation transaction, invoking verification logic in a smart contract deployed in the blockchain to verify whether a service indicator of the target user within a preset service cycle satisfies a virtual resource allocation condition; and when the service indicator satisfies the virtual resource allocation condition, invoking virtual resource allocation logic in the smart contract to allocate a preset amount of virtual resources to the target user from a virtual resource pool and transfer the preset amount of virtual resources to a blockchain account corresponding to the user identifier, wherein virtual resources in the virtual resource pool are associated with service profits of a service operator corresponding to a service of the target user. |
| US11032213B1 |
Centralized management of computing resources across service provider networks
This disclosure describes techniques for centralizing the management of computing resources that are provisioned across multiple service provider networks by infrastructure modeling services. A service provider network may host or provide a centralized management service that supports an open source framework that provides users, or developers, with a unified development interface to manage computing resources that are provisioned in different service provider networks. The unified development interface of the host service provider network may provide users with a meta schema or language format to create infrastructure schemas for modeling, provisioning, and operating computing resources across service provider networks that are managed by different service providers. Additionally, the host service provider network may provide an open provider registry where developers of infrastructure schemas may store and publish infrastructure schemas for the different service provider networks to share computing resource types with other developers or users of cloud-based services. |
| US11032211B2 |
Communications hub
A method for bandwidth sharing is provided. The method may include getting a list of neighboring communications hubs, the neighboring communications hubs being disposed in respective neighboring residences. The neighboring communications hubs may be communicatively coupled to the first communications hub using a first broadband data network provisioned by an Internet Service Provider (ISP), and the neighboring residences may be within a same predetermined geographic region as the first residence or within a predetermined temporal distance on a data network from the first residence. The method determines if a data requirement exceeds bandwidth available to the first communications hub and provides a request for data to a neighboring communications hub. The request corresponds to the data requirement. The method then receives data responsive to the request from the neighboring communications hub. |
| US11032210B2 |
Software load balancer to maximize utilization
A load balancer receives a sequence of requests for computing service and distributes the requests for computing service to a computing node in an ordered list of computing nodes until the computing node reaches its maximum allowable compute capability. Responsive to an indication that the computing node has reached its maximum allowable compute capability, the load balancer distributes subsequent requests for computing service to another computing node in the ordered list. If the computing node is the last computing node in the ordered list, the load balancer distributes a subsequent request for computing service to a computing node other than one of the computing nodes in the ordered list of computing nodes. If the computing node is not the last computing node in the ordered list, the load balancer distributes a subsequent request for computing service to another computing node in the ordered list of computing nodes. |
| US11032208B2 |
Information processing apparatus, information processing method, and computer program product
According to an embodiment, an information processing apparatus includes one or more processors. The processors prefetch a scheduling entry corresponding a future time period in advance from scheduling information including one or more scheduling entries, each entry of which contains a transmission state and an interval for each of one or more transmission queues. The processors determine a starting time of transmission for one or more frames waiting for transmission in each queue, based on the scheduling entry. At least one of timing of the prefetching process and timing of the scheduling process is determined based on a result of comparison of a time difference and one or more thresholds. The time difference is a difference between current time and future time where the future time is a candidate for starting time of transmission. |
| US11032206B2 |
Packet-content based WRED protection
A network element includes multiple ports and logic. The multiple ports are configured to serve as ingress ports and egress ports for receiving and transmitting packets from and to a network. The logic is configured to queue the packets received from the ingress ports, run a packet-dropping process that randomly drops one or more of the queued packets to avoid congestion, while detecting and excluding from the packet-dropping process, at least probabilistically, packets belonging to a predefined packet type, and forward the queued packets, which were not dropped, to the egress ports. |
| US11032201B2 |
Multi-phase IP-flow-based classifier with domain name and HTTP header awareness
An apparatus and method for classifying traffic data in a communication network based on IP flow. Traffic data in a communication network is monitored in order to detect an IP flow. A preliminary classification is assigned to the IP flow based on protocol information contained in its first packet. Subsequent packets within the IP flow are further monitored, and the IP flow is reclassified based, in part, on the domain name of the responding server. Web pages can also be classified, and monitored to determine their response time. |
| US11032199B2 |
Methods and apparatus for providing traffic forwarder via dynamic overlay network
A process capable of facilitating network communication using forwarders or vforwarders interconnected via an overlay network is disclosed. The process, in one aspect, is able to receive a packet stream or network traffic from a customer premise equipment (“CPE”) using a point-to-point (“PTP”) connection via the overlay network. After identifying a service component able to provide a network function (“NF”) in accordance with the packet stream, at least a portion of the packet stream is forwarded to the service component via a second PTP connection through the overlay network according to a set of predefined requirements. Upon receipt of a processed packet stream in response to the packet stream from the service component, the processed packet stream is forwarded to another forwarder via a hop-to-hop (“HTH”) link through the overlay network in accordance with the processed packet stream. |
| US11032198B2 |
Method and apparatus for generating ACL table
A method and an apparatus are disclosed for generating an ACL table. A controller obtains a port type of each port of a first network device, and selects, based on the port type of each port, a target port whose port type is a preset type from all ports of the first network device. The controller generates a corresponding first-type access control list ACL entry for each target port, and generates one second-type ACL entry corresponding to a routing table of the first network device, where an action of the second-type ACL entry is redirecting to the routing table. The controller adds the second-type ACL entry and each first-type ACL entry to an ACL table of the first network device. |
| US11032197B2 |
Reroute detection in segment routing data plane
Methods and systems are disclosed for detection of reroute occurrences in segment routing enabled networks. In one embodiment, a method includes receiving, at a first node in a communications network, a test message comprising a header, where the header comprises one or more segment identifiers. This embodiment of the method further includes detecting a first indicator of a rerouted test path for the message and sending an outgoing message to a node determined using the header, where sending the outgoing message comprises including in the outgoing message a second indicator that the test message has been rerouted. An embodiment of a system includes a network interface adapted for data communication with one or more nodes of a communications network and a processor operably coupled to the network interface and adapted to implement an embodiment of the method. |
| US11032194B2 |
Transmitting apparatus and signal processing method using removal of transport steam packet header
A transmitting apparatus is provided. The transmitting apparatus includes: a packet generator generating a packet including a header and a payload from an input stream including a plurality of input packets; and a signal processor signal-processing the packet, wherein the header includes a base header which includes: a first field indicating a packet type of the input packets; wherein when the first field is set to a value indicating that the packet type of the input packets is a TS packet, the base header comprises a second field indicating a number of TS packets included in the payload and a third field set to a first value indicating that the header of the packet does not comprises an additional header or a second value indicating that the header of the packet further comprises the additional header, and wherein the third field is set to the second value when TS header compression to remove at least one header of the TS packets is applied to generate the packet. |
| US11032193B2 |
In-situ operation, administration, and maintenance in segment routing with multiprotocol label switching networks
Presented herein is an “In-situ OAM” (IOAM) mechanism that uses a Segment Routing-Multiprotocol Label Switching (SR-MPLS) IOAM segment identifier that can selectively collect IOAM data from “target” network nodes along a data packet path. In one embodiment, a method includes receiving, at a first network node in the SR-MPLS network, a data packet that includes an MPLS label stack comprising a plurality of segment identifiers (SIDs) associated with a plurality of network nodes. The MPLS label stack includes a first SID associated with the first network node. The method includes determining whether the first SID is an IOAM SID or a regular SID. Upon determining that the first SID is the IOAM SID, the method includes implementing an IOAM function at the first network node. Upon determining that the first SID is the regular SID, the method includes processing the data packet without implementing an IOAM function. |
| US11032192B2 |
Signaling a planned off-lining, such as for maintenance, of a node or node component supporting a label switched path (LSP), and using such signaling
A node of an LSP may inform the ingress node of the LSP, for example via RSVP signaling, about its temporary unavailability for a certain time. In response, the ingress node can stop using any affected LSP(s) and divert the traffic to other LSPs. This provides a faster mechanism to signal traffic shift then traditional IGP overload which causes considerable churn into the network as all the nodes need to compute the SPF. It is sufficient for ingress node to be aware of this node maintenance and it can use information to divert the traffic to other equal cost multipath (ECMP) LSP(s), or other available LSP(s). If no alternative LSP path exists when the ingress node receives such a message, a new LSP can be built during this time and traffic diverted smoothly (e.g., in a make-before-break manner) before the node goes offline for maintenance. Since only the ingress node is responsible to push the traffic to the LSP, there is no need to tear down the LSP for such node maintenance (especially when they are for a short duration). This can be used with a controller responsible for the LSP as well. |
| US11032181B2 |
Machine learning approach for dynamic adjustment of BFD timers in SD-WAN networks
In one embodiment, a device obtains performance data regarding failures of a tunnel in a network. The device generates a failure profile for the tunnel by applying machine learning to the performance data regarding the failures of the tunnel. The device determines, based on the failure profile for the tunnel, whether the tunnel exhibits failure flapping behavior. The device adjusts one or more Bidirectional Forwarding Detection (BFD) probing timers used to detect failures of the tunnel, based on the determination as to whether the tunnel exhibits failure flapping behavior. |
| US11032178B2 |
System and method for creating, deploying, and administering distinct virtual computer networks
Embodiments of the invention relate to a centralized managing system and method for creating, deploying, administering, and managing a plurality of separate and distinct virtual computer networks on a virtualization platform for offering cloud computing services (SaaS). Embodiments of the invention relate to a computer system for a centralized management of separate and distinct virtual computer networks, which has a security grid which has at least one grid processor and a memory device that stores a managing application. The managing application has a virtualization platform, a grid access layer, a virtual computer network template system, a plurality of resource distribution tools and a plurality of monitoring and metering tools. The grid processor is adapted by the managing application so that it can create, deploy, administer, and manage the plurality of separate and distinct computer networks. |
| US11032177B2 |
Network activity validation
Methods, systems, and apparatus, including computer programs encoded on computer storage media, for validating network activity. One of the methods includes receiving data identifying network activity for an online account; determining one or more users associated with the online account; determining, for each of the one or more users, a current physical activity in which the user is participating; determining, for each of the current physical activities, a likelihood that the corresponding user initiated the network activity while participating in the current physical activity; determining, for each of the current physical activities, whether the corresponding likelihood satisfies a threshold likelihood; and in response to determining that at least one of the corresponding likelihoods satisfies the threshold likelihood, providing an alert about the network activity to one of the one or more users associated with the online account. |
| US11032173B2 |
System for detecting and reporting anomalies in a network of moving things, for example including a network of autonomous vehicles
Systems and methods for detecting and classifying anomalies in a network of moving things. As non-limiting examples, various aspects of this disclosure provide configurable and adaptable systems and methods, for example in a network of moving things, for detecting various operational anomalies, classifying such anomalies, and/or reporting such anomalies. |
| US11032172B2 |
Asynchronous wireless data transmission system and method for asynchronously transmitting samples of a measured variable by a wireless sensor
An asynchronous wireless data transmission system includes a wireless sensor and a data recipient device. The wireless sensor includes a measurement device configured to collect a plurality of samples of a measured variable at a plurality of different sampling times, a transmission generator configured to generate a compressed data object containing the plurality of samples of the measured variable, and a wireless radio configured to transmit the compressed data object at a transmission time asynchronous with at least one of the sampling times. The data recipient device includes an object decompressor configured to extract the plurality of samples of the measured variable from the compressed data object. |
| US11032163B2 |
Method and system for selection and orchestration of multi-access edge computing resources
Systems and methods described herein direct an end device to a multi-access edge computing (MEC) service instance among MEC instances with different service levels for different geographic areas. A network device stores a map of a geographic area with unique identifiable regions (UIRs) that each include cells for different wireless stations of a transport network. The network device receives application parameters, for a designated coverage area, for an application to be serviced using MEC resources. The network device associates the designated coverage area with one or more target UIRs from the map and deploys, when the MEC resources are available to support the application parameters, an instance of the application at a MEC cluster. The deployed instance of the application meets the application parameters for the target UIRs. The network device updates a MEC-domain name service (DNS) for the deployed instance of the application at the MEC cluster. |
| US11032155B2 |
Network mapping system
Some embodiments provide a method for generating a multi-layer network map from network configuration data. The method receives network configuration data that defines network components and connections between the network components for a network that spans one or more datacenters. Based on the received network configuration data, the method generates multiple data layers for a multi-layer interactive map of the network. Different data layers include different network components and connections. The method generates a visual representation of the network for each data layer. Each visual representation includes a map of the network at a different level of hierarchy. |
| US11032153B2 |
Method, medium, and server system for allocating and tracking resource distributions in computer networks
Systems and methods for managing resource distributions are disclosed herein. An example method includes: receiving, at a first server and from a first resource provider (e.g., an educational foundation), a first provision of resources for a resource recipient (e.g., a teacher) and at least one restriction that restricts the resource recipient's use of the first provision of resources. The method also includes segmenting the first provision of resources, within a repository of resources associated with the resource recipient, such that the first provision of resources is uniquely identified as associated with the first resource provider. The method further includes: receiving, from a second server distinct from the first server, information about available items; receiving, from the resource recipient, a request to use at least a portion of the first provision of resources to obtain one or more of the available items; and, in accordance with a determination that the request complies with the at least one restriction associated with the first provision of resources, processing the request and generating a report for the resource provider. |
| US11032152B2 |
Machine-learning based self-populating dashboard for resource utilization monitoring in hyper-converged information technology environments
A machine-learning based self-populating dashboard for resource utilization monitoring in hyper-converged information technology (IT) environments. Specifically, the method and system disclosed herein entail the continuous monitoring of select resource utilization parameters across various nodes in an environment. Cause and effect relationships between these select resource utilization parameters and other utilization parameters are periodically assessed to dynamically populate a user interface (e.g., a web-based or non-web-based dashboard). The user interface provides environment administrators with a tool that intelligently identifies which resource utilization parameters may be strong contenders as root causes of user issues and/or failures occurring in the environment. |
| US11032150B2 |
Automatic prediction of behavior and topology of a network using limited information
The present disclosure provides a method for automatically predicting a topology of a network comprising a plurality of nodes. The method includes: selecting a path performance metric among a plurality of available metrics; obtaining path performance metrics of selected node pairs among the plurality of nodes; using the obtained path performance metrics to train a machine-learning model to predict the path performance metric for the remaining node pairs; and using the obtained and predicted path performance metrics to construct a topology of the network. |
| US11032147B2 |
Acceleration of node configuration for TWAMP with a large number of test sessions
The disclosed methods for reducing the port setup time for a large number of TWAMP test sessions for performance measurement testing of telecommunication transport networks include parsing a configuration file to populate an accept-port data structure with proposed receiver ports for communication from a session-sender to session-reflectors; repeatedly and in parallel, from a control client, communicating with receiving servers to set up pairwise test sessions using receiver port allocations from the accept-port data structure, and receiving and checking blocks of Accept-Session messages from the receiving server and handling either case of acceptance of the proposed receiver port or of counter proposal of an alternate-and-available port to be used for the measurement session; and allocating the alternate-and-available port and updating the accept-port data structure by storing the alternate-and-available port received in the particular Accept-Session message; and using the stored ports to initiate TWAMP messages in the pairwise test sessions. |
| US11032143B2 |
Assignment of network configuration for a wired network using a wireless network
A technique is configured to utilize frames generated by a first layer of a protocol stack for a first network to configure network parameters associated with a second layer of the protocol stack for a second network. The frames are illustratively beacon frames generated by a data link layer of a Transmission Control Protocol/Internet Protocol (TCP/IP) stack for a wireless network, and the network parameters are illustratively IP addresses associated with a network layer of the TCP/IP stack for a wired network. Notably, the beacon frames of the wireless network may be utilized for two-way communication exchange on a per node basis for each node in the wired network. |
| US11032142B2 |
Switching method, base station and terminal
Provided are a switching method, a base station and a terminal. The method includes that: a base station configures a switching message for a narrow-bandwidth receiving mode, the switching message including time when a terminal is indicated to enter the narrow-bandwidth receiving mode and a position of a narrow bandwidth on a frequency band when the narrow-bandwidth receiving mode is entered; and the switching message is sent to the terminal to indicate the terminal to switch to the narrow bandwidth specified in the switching message for information reception, the narrow bandwidth being smaller than a system bandwidth. With adoption of the embodiments, the terminal may receive a signal on the narrow bandwidth, and reduction in power consumption of the terminal is facilitated. |
| US11032139B2 |
Wireless devices and systems including examples of configuration during an active time period
Examples described herein include methods, devices, and systems which may implement different processing stages for wireless communication in processing units. Such data processing may include a source data processing stage, a baseband processing stage, a digital front-end processing stage, and a radio frequency (RF) processing stage. Data may be received from a sensor of device and then processed in the stages to generate output data for transmission. Processing the data in the various stages may occur during an active time period of a discontinuous operating mode. During the active time period, a reconfigurable hardware platform may allocate all or a portion of the processing units to implement the processing stages. Examples of systems and methods described herein may facilitate the processing of data for 5G (e.g., New Radio (NR)) wireless communications in a power-efficient and time-efficient manner. |
| US11032137B2 |
Wearable electronic device, main electronic device, system and control method thereof
A wearable electronic device includes: an input module configured to receive a user manipulation for changing a configuration setting value of a main electronic device; and a communication module configured to transmit a control signal for changing a configuration setting value to the main electronic device. |
| US11032135B2 |
Method for VNF managers placement in large-scale and distributed NFV systems
There is provided a network node and method for placement of virtual network functions managers (VNFMs) in a network functions virtualization (NFV) system. The method comprises determining a number of VNFMs for the NFV system, determining a type for each VNFM, determining a placement for each VNFM over distributed Network Function Virtualization Infrastructure Points of Presence (NFVI-PoPs) and determining a plurality of associations between the VNFMs and VNF instances in the system, thereby generating a VNFMs placement solution. |
| US11032134B2 |
Providing and managing an adapter as a service (AaaS) brokering service
Various embodiments are provided for managing an adapter as a service (AaaS) in a computing environment by a processor. Accesses to one or more of a plurality of identity and access management (IAM) systems may be provided via an adapter as a service (AaaS) functioning as an exchange service between one or more users and one or more providers of a plurality of types of adapters, wherein the plurality of types of adapters in the AaaS enable provisioning and de-provisioning to one or more of the plurality of IAM systems. |
| US11032132B2 |
Resource link binding management
Methods and systems for Link Binding Management (LBM), including architectural design, detailed procedures, and embodiments to related standards, are described herein. In a first embodiment, an LBM Architecture A is disclosed which includes four logical entities: a Resource Creator (RC), a Source Resource Host (SRH), a Destination Resource Host (DRH), and a Link Binding Coordinator (LBC). Interactions are defined for these four entities to cooperate in order to efficiently manage link bindings (e.g. link binding creation, link binding update, etc) between source and destination resources. In a second embodiment, an LBM Architecture B is also disclosed which includes a Resource Repository (RR), a SRH2, a DRH, and a LBC. Interactions on those actors are developed towards efficient link binding management. Detailed procedures for LBM Architecture B are also disclosed. |
| US11032131B1 |
Methods and systems for communication with air gapped computer systems
Methods and systems in which data formatted according to an air-gapped network protocol is converted to machine-readable optical labels for communication across the air gap. Communication between computer systems across an air gap is facilitated by converting data to one or more machine-readable optical labels and displaying those labels on a first display device coupled to a computer system within an air-gapped network. At another computer system outside the air gapped network, an imaging device receives the machine-readable optical labels displayed on the first display device. The information encoded in the machine-readable optical labels is decoded to recover the original data from the air gapped network and provided to one or more nodes of the non-air-gapped computer network. |
| US11032130B2 |
Troubleshooting method, apparatus, and system
Embodiments of the present disclosure describe a troubleshooting method, apparatus, and system, and pertain to the field of troubleshooting. An embodiment of the method may include monitoring, by a virtualized network function (VNF), an operating status of at least one virtual machine (VM) inside the VNF. The method may also include determining, by the VNF according to a fault when the fault occurs on the VM, whether to perform VM rebuilding recovery. Furthermore the method may include sending, by the VNF, a rebuilding recovery request to a virtualized network function manager (VNFM) when determining to perform the VM rebuilding recovery. In this way, when the fault occurs on the VM, the VIM performs automatic rebuilding recovery for the VM by interactions between the VNFM and the VIM. |
| US11032129B2 |
Information processing apparatus, network system, and computer-readable recording medium
An information processing apparatus includes: a memory; and a processor coupled to the memory and configured to: perform switching to a transmission device in a standby status of transmission devices in a redundant configuration when a transmission device under operation configuration fails; store, as normal coupling information, coupling information at a time when a network system, constituted by the information processing apparatus and the transmission devices, is normal, the coupling information being information on a transmission device port to which a communication control device is coupled; when the transmission device to which the communication control device is coupled is repaired or replaced, determine whether the coupling information transmitted from the transmission device after the repair or replacement matches with the normal coupling information; and control communications between the communication control device and the transmission device port to which the communication control device is coupled based on the determination result. |
| US11032126B2 |
Diagnostic traffic generation for automatic testing and troubleshooting
A framework in a cloud network that may allow for debugging at multiple vantage points at different layers (e.g., layer 2, layer 3, etc.). The methods may provide tracer or measurement services that filter, capture, or forward flows that may include packets, calls, or protocols to look for particular signatures. |
| US11032125B2 |
Robotic surgical devices, systems and related methods
Various medical devices and related systems, including robotic and/or in vivo medical devices, and various robotic surgical devices for in vivo medical procedures. Included herein, for example, is a robotic surgical system having a support beam positionable through an incision, and a robotic device having a device body, first and second rotating shoulder components coupled to the device body, and first and second robotic arms coupled to the first and second shoulder components, respectively. |
| US11032124B1 |
Application aware device monitoring
Techniques for application aware device monitoring are disclosed. In some embodiments, a system, a process, and/or a computer program product for providing application aware device monitoring includes collecting network layer information from one or more agents utilizing a plurality of tests; collecting device layer information from the one or more agents deployed to monitor a plurality of devices in a network computing environment; correlating the network layer information and the device layer information; and generating a graphical visualization based on the correlated network layer and device layer information (e.g., an alert, report, and/or a graphical visualization can be provided based on the correlated network layer and device layer information to facilitate root cause detection for application performance issues). |
| US11032123B1 |
Hierarchical storage system management
Distributing management responsibilities for a storage system that includes a storage array controller and a plurality of storage devices, including: identifying a plurality of elements in the storage system; for each of the plurality of elements in the storage system, creating a distributed manager, wherein each distributed manager is configured for gathering information describing the state of the associated element in the storage system, determining an action to perform against the associated element in the storage system, and executing an approved action against the associated element in the storage system; and creating a distributed management hierarchy that includes each of the distributed managers. |
| US11032122B2 |
Multicast delay diagnosis method and apparatus
A multicast delay diagnosis method is provided, where the method includes sending, by a terminal device, a first domain name resolution request to a network node; receiving a first multicast test address returned by the network node; sending a first multicast test join request to the network node by using the first multicast test address, and recording a time point for sending the first multicast test join request; receiving a first packet returned by the network node, and recording a time point for receiving the first packet; calculating, according to the time point for sending the first multicast test join request and the time point for receiving the first packet, a first delay caused when the terminal device joins a multicast test group of the network node; and determining multicast network quality according to the first delay. |
| US11032120B2 |
Method for transmitting or receiving signal in wireless communication system and apparatus therefor
A method for receiving, by a terminal, downlink control information in a wireless communication system according to one embodiment of the present invention comprises the steps of: receiving information on a reference subcarrier spacing (SCS) from among a plurality of SCS numerologies; receiving downlink control information through a terminal group common physical downlink control channel (PDCCH); and obtaining information on a slot format from the downlink control information, wherein the downlink control information indicates the slot format on the basis of the reference SCS, and when the SCS of the terminal is different from the reference SCS, the terminal may convert the slot format of the reference SCS according to the SCS of the terminal. |
| US11032119B2 |
Method and system for combining DFT-transformed OFDM and non-transformed OFDM
Methods and systems are provided that enable an OFDM transmitter to be used for transmitting conventional OFDM or a form of transformed OFDM. A technique is provided for transforming a coded and modulated sequence of samples prior to an IFFT that enables the transformed sequence of samples to be transmitted using conventional OFDM or transformed OFDM. The selection of a transform function for transforming the coded and modulated sequence of samples may be based on optimizing the transform function for particular operating conditions between the transmitter and receiver. In some embodiments of the invention OFDM and time transformed OFDM are multiplexed in time and/or frequency in a transmission frame. In some embodiments of the invention a pilot pattern is provided in which the pilot are sent using OFDM and data is sent using OFDM and/or transformed OFDM. |
| US11032116B2 |
Wireless communication method and device
Provided are wireless communication methods and devices. In one embodiment, a wireless communication method performed by a wireless communication device comprises: transmitting a data packet repeatedly in multiple subframes including at least one normal subframe and at least one special subframe to another wireless communication device, wherein the available resources in the special subframe are different from that in the normal subframe, the data packet includes multiple modulated symbols which are divided into multiple modulated-symbol sets, in each subframe, each OFDM symbol is mapped by one of the modulated-symbol sets, and in every subframe, the modulated symbols in the same modulated-symbol set are mapped onto REs in one OFDM symbol in a fixed order. In another embodiment, multiple repetitions of the data packet are transmitted in each subframe, and in each special subframe, different repetitions are mapped onto REs with cyclic shift. |
| US11032115B2 |
Device and method for decoding bootstrap signal
Disclosed herein are an apparatus and method for decoding a bootstrap signal. The apparatus for decoding a bootstrap signal according to an embodiment of the present invention includes an operation unit for calculating the relative cyclic shift and the channel gain estimate of a received bootstrap signal and correcting the channel gain estimate using the relative cyclic shift, and a decoding unit for decoding the bootstrap signal using the corrected channel gain estimate. |
| US11032109B2 |
Communication processing system, communication processing method, communication processing apparatus, communication managing apparatus, and control methods and control programs of communication processing apparatus and communication managing apparatus
This invention is directed to a communication processing apparatus that secures a safe connection from a non-IP-connection device to an IP-connection cloud (server). This communication processing apparatus includes a first connection unit that connects devices, a second connection unit that connects to servers, a switching unit that switches connections of the devices and the servers between the first connection unit and the second connection unit, a determiner that determines whether connection of a device to the first connection unit is permitted or unpermitted, and a connection controller that controls the switching unit in accordance with a determination result from the determiner. |
| US11032106B1 |
Layer 2 tunnel protocol (“L2TP”) node processing optimization using a dedicated hello channel keepalive mechanism
A separate dedicated channel is set up and used for tunnel keepalive exchanges. Using such a dedicated channel permits tunnel keepalives to be processed completely at forwarding plane, without needing to send them to the control plane for processing. This dedicated channel can implement its own sequencing (in a way that avoids the need to use the control plane for processing). Alternatively, this dedicated channel might not use sequencing at all. |
| US11032104B2 |
UDP over TCP tunnel
A system transports a plurality of UDP datagrams from a sending application to a receiving application by creating a TCP tunnel between a TCP sending-end and a TCP receiving-end, encapsulating the datagrams in TCP packets at the TCP transmitting-end, transmitting the TCP packets via the TCP tunnel to the TCP receiving-end over a network using a TCP/IP protocol, and extracting the datagrams from the TCP packet and forwarding the extracted datagrams to the receiving application. The TCP tunnel may provide the same delay and responsiveness as UDP protocol. The TCP receiving-end may detect when a packet is missing and request retransmission when a packet is missing, so that the TCP sending-end retransmits the missing packets. The transmitting of TCP packets to the TCP receiving-end continues when the receiving-end detects a missing packet, so that there is no lag in the forwarding of the extracted datagrams. Retransmitted packets may be discarded. |
| US11032098B2 |
Controller cluster and method for operating the controller cluster
A controller cluster for controlling a technical device with a redundant first automation device and second automation device, wherein a virtual network interface controller is arranged in the automation devices between a first network interface controller and a protocol stack, and wherein the network interface controller administers a cluster hardware address in addition to a standard hardware address and thus the controller cluster, despite there being two automation devices, presents itself externally as one device. |
| US11032089B2 |
Method and system for managing power delivery and fixture operation for power over ethernet systems
The present invention is a system for providing power and controlling a plurality of ethernet devices, comprising: a driver, wherein the driver provides for the control of the system; a plurality of sensors, wherein the plurality of sensors collect sensor specific data and are in communication with the driver; a Power over Ethernet (POE) switch, wherein the POE switch is in communication with the plurality of sensors; a plurality of fixtures in communication with the driver and the POE switch, wherein the plurality of fixtures are light sources; and a local power source, wherein the local power source is in communication with the POE switch. |
| US11032088B2 |
Digital certificate management method, apparatus, and system
Techniques for providing a digital certificate management for blockchain technologies are described. One example method includes a transaction request including a digital certificate is received from a certificate authority at a node in a blockchain network, and the transaction request is a request to write the digital certificate into a blockchain associated with the blockchain network, and the digital certificate is issued to a node in the blockchain network. A consensus verification result is determined for the transaction request, and the consensus verification result is produced by nodes in the blockchain network. The consensus verification result is compared to a predetermined threshold value. In response to determining the consensus verification result is greater than or equal to the predetermined threshold value, the digital certificate is stored in the blockchain associated with the blockchain network. |
| US11032082B2 |
Method and system of storing record of copyright event in blockchain through agent
Disclosed are a method and system of storing a record of a copyright event in a blockchain through an agent. Devices of some work service providers operating work-related services can serve as member nodes to form a consortium blockchain network. Each work service provider broadcasts copyright events generated based on its work-related services to the consortium blockchain network, so all the work service providers perform blockchain-based distributed storage. In addition, the plurality of member nodes include at least one agenting member node; each agenting member node has a right to agent copyright event record storage for a non-member node corresponding to the agenting member node. |
| US11032075B2 |
Methods for secure cryptogram generation
Embodiments of the invention introduce efficient methods for securely generating a cryptogram by a user device, and validating the cryptogram by a server computer. A secure communication can be conducted whereby a user device provides a cryptogram without requiring the user device to persistently store an encryption key or other sensitive data used to generate the cryptogram. The user device and server computer can mutually authenticate and establish a shared secret. Using the shared secret, the server computer can derive a session key and transmit key derivation parameters encrypted using the session key to the user device. The user device can derive the session key using the shared secret, decrypt the encrypted key derivation parameters, and store the key derivation parameters. Key derivation parameters and the shared secret can be used to generate a single use cryptogram key, which can be used to generate a cryptogram for conducting secure communications. |
| US11032070B2 |
Method, apparatus, and system for processing two-dimensional barcodes
This specification describes techniques for processing service requests. One example method includes receiving an electronic credential request from a client, retrieving an electronic credential that corresponds to the user identifier, generating server signature information, and transmitting the server signature information and the electronic credential to the client. The server signature information includes the electronic credential and a user public key of the client. The electronic credential and the user public key are signed using a server private key. The server signature information is configured to be cryptographically verified by the client and configured to enable the client to generate a two-dimensional barcode based on the electronic credential. The electronic credential included in the two-dimensional barcode is configured to be verified by a credential verification device. The credential verification end device is configured to generate the electronic credential based on the user identifier. |
| US11032069B2 |
Methods and systems of securely transferring data
The present disclosure relates to a method and system for securely transferring master keying material between to a slave dongle (12). Each slave dongle (12) is connected to a data transfer system. The slave dongle (12) contains a public key and a private key and the data transfer system holds a master keying material source that contains master keying material to be transferred securely to the slave dongle (12). The slave dongle's public key is transferred to the master keying material source. The master keying material source encrypts the master keying material with the slave dongle's public key to produce an encrypted master keying material. The encrypted master keying material is sent to the slave dongle (12) and the slave dongle (12) decrypts the encrypted master keying material with the slave dongle's private key. This allows multiple users, each having a slave dongle (12a-n) that has been configured in this manner, to use the same master keying material to securely communicate with one another. |
| US11032068B2 |
Leakage-deterring encryption for message communication
Communicating a message via a leakage-deterring encryption scheme. A sender computer stores a public key pko of a recipient key-pair (pko, sko) of a message recipient, a commitment c, bound to the public key pko, to a secret s of the message recipient, and a public key pkt of a decryptor key-pair (pkt, skt). A receiver computer stores a secret key sko of the recipient key-pair (pko, sko), the commitment c and an opening o to the commitment. A decryptor computer stores a secret key skt of the decryptor key-pair (pkt, skt). The sender computer is adapted to encrypt a message m for the message recipient by generating ciphertexts. The sender computer sends the ciphertexts to the receiver computer. The receiver computer is adapted to send a ciphertext to the decryptor computer and provide a proof. The decryptor computer is adapted to verify the proof. |
| US11032066B2 |
Method for tamper-proof storage of data of a field device
The present disclosure relates to a method for tamper-proof storage of data of a field device operated by means of automation technology, wherein the field device comprises a sensor and/or actuator and an electronic unit, the field device generating data. The method comprises steps of creating at least one transaction containing generated data of the field device and storing the transaction in a data block of Blockchain technology comprising a data field containing stored transactions and a hash value. The method also includes steps of linking the data block to previously created data blocks, storing the data block in a service platform and creating and storing a security data block in the service platform. |
| US11032065B2 |
Verifiable redactable audit log
A verifiable, redactable log, which, in some embodiments, may contain multiple hash values per entry in order to sever confidentiality of a log from verifiability. Logs may be verified using recalculation of hashes and verification of trusted digital signatures. In some embodiments, the log may be divided into segments, each signed by a time server or self-signed using a system of ephemeral keys. In some embodiments, log messages regarding specific objects or events may be nested within the log to prevent reporting omission. The logging system may receive events or messages to enter into the log. |
| US11032062B2 |
Data processing permits system with keys
Methods, systems, and devices for data processing are described. Some systems may support data processing permits and cryptographic techniques tying user consent to data handling. By tying user consent to data handling, the systems may comply with data regulations on a technical level and efficiently update to handle changing data regulations and/or regulations across different jurisdictions. For example, the system may maintain a set of data processing permits indicating user consent for the system to use a user's data for particular data processes. The system may encrypt the user's data using a cryptographic key (e.g., a cryptographic nonce) and may encrypt the nonce using permit keys for any permits applicable to that data. In this way, to access a user's data for a data process, the system may first verify that a relevant permit indicates that the user complies with the requested process prior to decrypting the user's data. |
| US11032057B2 |
Blockchain transaction speeds using global acceleration nodes
In a blockchain transaction acceleration system, access is provided to a multiple blockchain acceleration network accessible to a plurality of blockchains, where the multiple blockchain acceleration network includes a plurality of acceleration nodes, each acceleration node accessible to at least one node in at least one blockchain of the plurality of blockchains. A transaction to be forwarded is received at a first acceleration node from a first node in a first blockchain of the plurality of blockchains. The transaction is forwarded by the first acceleration node to a second node. |
| US11032054B2 |
Sequenced transmit muting for wideband power amplifiers
A sequenced transmit muting wideband power amplifier is provided that includes at least one pre-driver stage having at least a first pre-driver and a second pre-driver. A mute switch selectively establishes a communication path between the first and second pre-drivers or couples the second pre-driver to a termination resistor. A pre-driver switch selectively activates/deactivates the first and second pre-drivers. A driver stage is in communication with the pre-driver stage and includes a first driver. A final amplifier stage is in communication with the driver stage and includes at least one second driver. At least one S-NBS switch is configured to selectively activate/deactivate the first driver and second driver. A controller is configured to activate the at least one pre-driver switch, the mute switch, the at least one S-NBS switch to selectively place the amplifier in one of a transmit mode and a mute mode. |
| US11032046B2 |
Method for applying precoder on basis of resource bundling in wireless communication system, and device therefor
Disclosed is a method for transmitting an uplink signal by a terminal in a wireless communication system. The method comprises the steps of: transmitting multiple precoded reference signals, to each of which a precoder cyclic pattern is applied in a predetermined resource unit, to a base station; receiving, from the base station, information indicating one among the multiple precoded reference signals; and transmitting an uplink data signal and an uplink demodulation reference signal to the base station by using a precoder cyclic pattern which has been applied to the indicated precoded reference signal. |
| US11032042B2 |
Candidate control channel resource determining method and apparatus
A candidate control channel resource determining method and apparatus are provided. Under the method, a first and a second aggregation level can be determined by a terminal. The aggregation level is a quantity of control channel resource elements in a candidate control channel. The first aggregation level is less than the second aggregation level. Control channel resource elements in a candidate control channel set corresponding to the second aggregation level form a first quantity of candidate control channel sets corresponding to the first aggregation level. One of the first quantity of candidate control channel sets corresponding to the first aggregation level can be determined as a target set based on an identifier of the terminal. A control channel resource element occupied by each candidate control channel in the target set can be determined. A candidate control channel in the target set can be detected for a received signal. |
| US11032040B2 |
Methods and apparatuses for performing uplink coordinated multi-point communication
Systems, methods, apparatuses, and computer program products for utilizing uplink (UL) CoMP helper data are provided. One method includes setting, by a network node serving a user equipment, a priority for a helper data request of an uplink transmission of the user equipment. The setting may include setting the priority based on a specific history of the user equipment. The method may also include sending the helper data request to another network node and, optionally, sending the priority set for the helper data request to said another network node. |
| US11032038B2 |
Method and system for MIMO transmission in a distributed transceiver network
A transmitting device comprises a plurality of distributed transceivers, a baseband processor and a network management engine. Data streams are generated at baseband by the baseband processor. Diversity coding such as space-time coding may be performed over the generated data streams in the baseband. The transmitting device concurrently transmits each of the coded streams in a same radio frequency (RF) band to a receiving device over the entire distributed transceivers through associated antennas. When needed, the network management engine may identify one or more auxiliary devices providing available transceivers and antenna beamformers to the transmitting device for sharing. Beam patterns and antenna orientations may be determined for associated antennas of the available transceivers for the transmitting device. Each of the coded data streams in the same radio frequency band may be transmitted to the receiving device over the entire available transceivers for the transmitting device through the associated antennas. |
| US11032037B2 |
OFDM-like signaling for broadband satellite applications
Implementations described herein are directed to satellite transmitters and receivers for applying OFDM-like signaling in broadband satellite transmissions. In such systems, one or more data signals may be shaped and composited into a composite data signal at an OFDM-like transmitter for transmission over a satellite channel. The data signals that are carried over the satellite channel by the composited signal may have their own carrier, and each signal may carry multiple OFDM subcarriers. Further implementations are directed to correcting for distortion in satellite communications systems that utilize OFDM-like signaling. This distortion correction may account for the linear and nonlinear distortion introduced by the high power amplifier of a satellite receiving a composite signal, the linear and nonlinear distortion caused by the interaction of the signals in the composite, the linear and nonlinear distortion caused by the interaction between OFDM subcarriers, and/or the linear and nonlinear distortion caused by inter-carrier interference. |
| US11032035B2 |
Signaling method in an OFDM multiple access system
A method for reducing the peak-to-average ratio in an OFDM communication signal is provided. The method includes defining a constellation having a plurality of symbols, defining a symbol duration for the OFDM communication signal, and defining a plurality of time instants in the symbol duration. A plurality of tones are allocated to a particular communication device, and a discrete signal is constructed in the time domain by mapping symbols from the constellation to the time instants. A continuous signal is generated by applying an interpolation function to the discrete signal such that the continuous signal only includes sinusoids having frequencies which are equal to the allocated tones. |
| US11032034B2 |
Transmission structure for mmW RAN
There is disclosed a method of operating a transmitting node in a millimeter-wave communication network. The method includes transmitting millimeter-wave signaling in a transmission timing structure. The transmission timing structure includes N time interval elements sequentially ordered in time. The millimeter-wave signaling includes N separate signaling structures, each signaling structure being transmitted in a different one of the time interval elements; N being an integer multiple of 2. A first subset of the N separate signaling structures corresponds to control signaling, wherein the subset includes 2{circumflex over ( )}m signaling structures consecutive in time beginning with the signaling structure of the first time interval element; m being an integer such that 2{circumflex over ( )}m<=N. A second subset of the N separate signaling structures corresponds to data signaling. The second subset comprises 0 or an integer number of signaling structures. The disclosure also pertains to related devices and methods. |
| US11032032B2 |
Sub-band configuration for preemption indication to eMBB UEs
Aspects of the present disclosure describe an indication channel for wireless communications that indicates whether an ultra-reliable low-latency communication (URLLC) transmission is present in an enhanced mobile broad band (eMBB) slot. A user equipment (UE) may receive an indication channel identifying one or more resources defined by time domain parts and frequency domain parts that have been punctured by an Ultra-Reliable Low latency Communication (URLLC) transmission. The number of frequency domain parts may be greater than or equal to two. The UE may determine a number of resource block groups (RBGs) in an active band width part (BWP) of the UE. The UE may map the RBGs in the BWP among each of a number of sub-bands equal to the number of frequency domain parts based on a pre-defined rule. |
| US11032031B2 |
HARQ LLR buffer and reordering buffer management
Certain aspects of the present disclosure relate to methods and apparatus for management of hybrid automatic repeat request (HARQ) log likelihood ratio (LLR) and reordering buffers in wireless communication systems. According to certain aspects, a method for reducing buffer overhead that may be performed by a wireless node is provided. The method generally includes receiving one or more packets of at least one of an initial transmission or a retransmission; forming one or more log likelihood ratios (LLRs) based on the one or more packets; compressing the one or more LLRs by quantizing the one or more LLRs; and buffering the one or more compressed LLRs. |
| US11032030B2 |
User equipment and method
A user equipment according to an embodiment comprises a processor and a memory coupled to the processor. The processor is configured to receive a first control information from a base station, the first control information designating a first time region on which a first Hybrid Automatic Repeat Request-Acknowledgement (HARQ-ACK) to be transmitted, the first HARQ-ACK corresponding to a first data transmitted on a first Physical Downlink Shared Channel (PDSCH) in which a transmission time interval is shorten than one subframe, the first time region being shorten than one subframe. The processor is configured to attempt to receive a second data transmitted on a second PDSCH in which a transmission time interval is one subframe. The processor is configured to transmit a second HARQ-ACK corresponding to the second data on the first time region. |
| US11032022B1 |
Detection, analysis, and countermeasures for automated and remote-controlled devices
A computer-implementable method for generating a cognitive insight is performed by a counter-unmanned autonomous vehicle (UAV) system. The method comprises receiving training data based upon sensor measurements of at least one UAV for processing in a cognitive learning and inference system. The system performs a plurality of machine learning operations on the training data to generate a cognitive profile of the at least one UAV. A cognitive insight is generated based upon the cognitive profile, and a countermeasure is enacted against the UAV based upon the cognitive insight. |
| US11032021B2 |
Treatment for improving the use of dietary sugar for energy purposes
The invention relates to the use of a very low dosage form of abscisic acid (ABA) or an in vivo hydrolysable conjugate thereof, preferably ABA-glucosyl ester (ABA-GE), for nutracentic/therapeutic use for controlling and/or preventing hyperglycaemia and weight gain in response to sugar intake with a reduction in insulin secret and an increase in muscle performance. |
| US11032017B2 |
System and method for identifying the context of multimedia content elements
A method and system for determining a current context of a multimedia content element are provided. The method includes receiving at least one multimedia content element from a user device; receiving at least one environmental variable related to the at least one multimedia content element; generating at least one signature for the multimedia content element; determining a context of the at least one multimedia content element based on the at least one contextual parameter; and determining the current context of the at least one multimedia content element based on at least one contextual parameter and the determined context. |
| US11032013B2 |
Determining proximity of transmitter antennas of portable devices to a human body for limiting transmitter output power to meet specific absorption rate (SAR) requirements
A method for adjusting transmitter output power (PTX) comprises sensing, by a proximity sensor communicatively coupled to a transmitting device, whether an object is proximate to the transmitting device. The method further comprises analyzing an image from a camera to determine whether the transmitting device is proximate to a portion of a human body, when the proximity sensor senses the object proximate to the transmitting device. Further, the method comprises adjusting the PTX of an antenna operatively coupled to the transmitting device to be less than or equal to a SAR threshold output power (PSARMAX), when it is determined that the transmitting device is proximate to the portion of the human body or when it cannot be determined whether the transmitting device is proximate to a portion of a human body. |
| US11032010B1 |
Methods and apparatus for reducing power consumption in optical devices
A customer premises device including an optical modem including at least one upstream laser is power controlled to provide one or more reduced power levels of service in response to a detected AC input power failure, and/or in response to control commands, e.g., from an optical line terminal (OLT). The commands control the customer premises device to switch to a reduced power consumption mode of operation. During the reduced power mode one or a few lasers are powered, e.g., on an intermittent but predictable basis. During normal operation mode each of the upstream lasers are powered. One or more receiver circuits are also powered off during reduced power mode operation in some embodiments. A schedule is used in some embodiments to control when one or more upstream lasers and/or receivers are powered. In some embodiments the schedule is determined based on information provided by the OLT. |
| US11032007B1 |
Through-window relay for high-band radiofrequency communications
Techniques are described for relaying of high-band radiofrequency communications through a window that would otherwise partially or completely block the communications. For example, embodiments include a pair of high-band-to-optical (HB2O) relays mounted on either side of a window. One of the relays receives a high-band radiofrequency (HB-RF) communication signal that is unable to pass through the window and converts the HB-RF communication signal to an optical communication signal. As the window is substantially transparent to visible-spectrum light, the optical communication signal can pass through the window. The optical communication signal is transmitted through the window to the other HB2O relay, and the other HB2O relay converts back to a HB-RF communication signal. Thus, HB-RF networks on either side of the window can be communicatively coupled via the optical communications provided by the pair of relays. |
| US11032005B2 |
Interference cancellation methods and apparatus
Methods and apparatus for interference cancelation in a radio frequency communications device are described. In various embodiments a signal to be transmitted in converted into an optical signal and processed using an optical filter assembly including one or more optical filters to generate an optical interference cancelation signal. The optical interference cancelation signal is converted into an analog radio frequency interference cancelation signal using an optical to electrical converter prior to the analog radio frequency interference cancelation signal being combined with a received signal to cancel interference, e.g., self interference. The optical filter assembly can include a large number of taps, e.g., 30, 50, 100 or more. Each tap may be implemented as a separate optical filter or series of optical filters. Delays and/or gain of the optical filters can be controlled dynamically based on channel estimates which may change due to changes in the environment and/or communications device position. |
| US11032000B2 |
Communications in a wireless network
A user equipment (UE) may, in a time interval that it is not sending information over a physical uplink shared channel, send an uplink physical signal based on received resource allocation information. The uplink physical signal may be used to determine channel conditions by a base station. The UE may receive, on a downlink control channel, control information. The control information may be based on the determined channel conditions. |
| US11031999B1 |
Narrow-band IoT and LTE over satellite
A satellite communication system includes a satellite, a satellite base station, and a user device. The satellite supports a number of satellite beams. Each satellite beam includes a number of cells. The satellite base station can communicate with the satellite via a feeder link. The user device is in communication with the satellite and the satellite base station. The user device can select a cell that covers a location of the user device based on a cell contour and a quality of a downlink signal received from the satellite base station. The satellite communication system can be operated by using LTE and/or NB-IoT standards, protocols, and/or waveforms. |
| US11031995B2 |
Multi-use booster
A repeater system comprises a repeater with a donor port, a server port, and first and second direction amplification paths to amplify one or more RF communication signals coupled between the server and donor ports. A signal splitter is communicatively coupled to the repeater and has first and second signal splitter ports. Signal splitter paths are coupled to the signal splitter ports. The repeater system can be configured to communicate the RF communication signals to a server antenna device on each signal splitter path with a different gain relative to the donor port. |
| US11031991B2 |
Multi-panel control channel order, initial access, and handover
Methods, systems, and devices for wireless communications are described. A user equipment (UE) may communicate with a first base station using a first antenna array of a set of antenna arrays of the UE. The UE may receive, from the base station, an indication that the UE is to use a second antenna array of the set of antenna arrays to transmit a random access signal. The UE may transmit, to the first base station or a second base station, the random access signal using the second antenna array based on the received indication. The UE may transmit the random access signal to the first base station as part of determining an updated timing advance (TA) value for the second antenna array. The UE may transmit the random access signal to the second base station as a part of initial access or handover. |
| US11031990B2 |
Beamforming
A technique comprising: receiving a set of digital signals representative of a set of analogue electrical signals generated by radio transmissions in one or more antenna elements; generating at least two beamformed signals from the same set of digital signals; multiplying together said beamformed signals; and performing demodulation at least partially on an output of multiplying said beamformed signals. |
| US11031989B2 |
Front end module for 5.2 GHz Wi-Fi acoustic wave resonator RF filter circuit
A front end module (FEM) for a 5.2 GHz Wi-Fi acoustic wave resonator RF filter circuit. The device can include a power amplifier (PA), a 5.2 GHz resonator, and a diversity switch. The device can further include a low noise amplifier (LNA). The PA is electrically coupled to an input node and can be configured to a DC power detector or an RF power detector. The resonator can be configured between the PA and the diversity switch, or between the diversity switch and an antenna. The LNA may be configured to the diversity switch or be electrically isolated from the switch. Another 5.2 GHZ resonator may be configured between the diversity switch and the LNA. In a specific example, this device integrates a 5.2 GHz PA, a 5.2 GHZ bulk acoustic wave (BAW) RF filter, a single pole two throw (SP2T) switch, and a bypassable LNA into a single device. |
| US11031982B2 |
Filter coefficient configuration in New Radio systems
Aspects of filtering coefficient configuration operations are described. Some aspects include a user equipment (UE) decoding a measurement configuration information element (IE) including a measurement quantity parameter, a reference signal (RS)-type filter configuration and at least one filter coefficient. In some aspects, the UE filters at least one of a cell measurement result and a beam measurement result, according to the measurement configuration IE. If the measurement quantity parameter indicates the cell measurement quantity, the UE can filter the cell measurement result according to the RS type filter configuration and the filter coefficient to determine a measurement evaluation input for a measurement reporting operation. If the measurement quantity parameter indicates the beam measurement quantity, the UE can filter the beam measurement result according to the RS type filter configuration and the filter coefficient to determine a beam measurement selection input for a beam measurement selection operation. |
| US11031976B2 |
Method for transmitting feedback information for DM-RS based open-loop downlink transmission in wireless communication system, and apparatus therefor
The present invention provides a method for reporting channel status information (CSI) for downlink transmission to an eNode B (eNB) by a user equipment (UE) in a wireless communication system. Specifically, the method comprises the steps of: receiving a channel status information-reference signal (CSI-RS) from the eNB; calculating the CSI on the basis of the CSI-RS under the assumption that a dual-precoder including a first precoder and a second precoder is applied; and reporting the CSI to the eNB, wherein the step of calculating the CSI includes a step for assuming that at least one of the first precoder and the second precoder is cyclically employed from a predetermined precoder candidate set on the basis of a predetermined resource unit; and information associated with the at least one precoder and information associated with the predetermined precoder candidate set are provided from the eNB through radio resource control (RRC) layer signaling. |
| US11031973B2 |
Circuit, method and apparatus for performing near-field communication
A circuit for performing a near-field communication having a contactless circuit which is configured for the contactless exchange of data signals with an external contactless reading device, a security circuit which has a memory in which application identifiers are stored and which is configured to execute security-related applications, and a control circuit which is configured to execute non-security-related applications, wherein the contactless circuit, the security circuit and the control circuit are coupled with one another in such a way and, using at least one of the application identifiers, are configured in such a way that the data signals are supplied from the contactless circuit to the control circuit and vice versa exclusively by means of the security circuit. The security circuit can furthermore store bonding and authentication keys for applications in the control circuit in order to set up a secure data exchange channel for these applications. |
| US11031971B2 |
Adaptive antenna and radio
A method and system for selecting a sub-band in a television white space frequency band may include configuring an antenna matching circuit based on the selected sub-band and configuring a bandpass filter based on the selected sub-band. The method may include receiving a first signal through a radio-frequency path including the antenna matching circuit and not including the bandpass filter, measuring a parameter of received first signal, and determining whether the selected sub-band is usable based on the measured parameter of the received first signal. The method may include receiving a second signal through radio-frequency path including the antenna matching circuit and the bandpass filter, measuring a parameter of the received second signal, and determining whether the selected sub-band is usable based on the measured parameter of the received second signal. |
| US11031970B1 |
Non-invasive analyte sensor and system with decoupled and inefficient transmit and receive antennas
A non-invasive analyte sensor system includes an antenna/detector array having at least one transmit antenna/element and at least one receive antenna/element, wherein the at least one transmit antenna/element and the at least one receive antenna/element are less than 95% coupled to one another, or less than 90% coupled to one another, or less than 85% coupled to one another, or less than 75% coupled to one another. The at least one transmit antenna/element transmits a transmit signal in a radio or microwave frequency range of the electromagnetic spectrum into a target containing an analyte of interest, and the at least one receive antenna/element detects a response resulting from transmission of the transmit signal by the at least one transmit antenna/element into the target. |
| US11031969B2 |
Protective case for electronic device
A protective case for use with an electronic device includes a case portion configured to cover a back and sides of the electronic device when the electronic device is installed in the protective case. The case portion defines an aperture for directly accessing a front of the installed electronic device. The aperture has dimensions greater than or equal to corresponding dimensions of the electronic device. The case portion includes a first fastener material permanently attached to an inside back surface of the case portion. The protective case also includes a second fastener material configured to be permanently attached to the back of the electronic device at a location configured to align with the first fastener material when the electronic device is installed in the protective case. The second fastener material is configured to removably adhere to the first fastener material to removably retain the electronic device in the case portion. |
| US11031967B2 |
Transmission management techniques for avoiding excessive exposure of humans to electromagnetic energy
The disclosure relates to a power control circuitry for controlling a radio frequency, RF, transmitter of a network equipment or a user equipment, the power control circuitry comprising: a controller configured to control a power level of an RF signal generated by the RF transmitter for transmission via an antenna arrangement, wherein the power level is controlled based on information about an object within an coverage area of the antenna arrangement. |
| US11031966B2 |
Ultrasonic proximity sensing for SAR mitigation
The disclosed technology provides a computing device with a slot antenna assembly including a slot formed in a metal exterior surface of a computing device case; an acoustic transceiver positioned to transmit an acoustic wave out through the slot and to receive a reflected portion of the acoustic wave in through the slot when the acoustic wave is reflected by an object; a proximity detector coupled to the acoustic transceiver that determines a physical separation between the object and the slot antenna based on a temporal separation between transmission of the acoustic wave and receipt of the reflected portion of the acoustic wave; and a transmission power controller that adjusts transmission power of the slot antenna based on the determined physical separation. |
| US11031963B2 |
Module connection structure and measuring instrument
A module connection structure includes a first module, a second module connected to the first module via connectors, and fixing members that fix the second module to the first module. The fixing members are movable between a fixed position at which the second module is inseparable from the first module and an unfixed position at which the second module is separable from the first module. At least one of the first module and the second module has fixing member holders that hold the fixing members located at least at the unfixed position. |
| US11031962B2 |
Carrier aggregated signal transmission and reception
Provided are a radio-frequency integrated chip (RFIC) and a wireless communication device including the RFIC. An RFIC configured to receive a carrier aggregated receive signal having at least first and second carrier signals may include first and second carrier receivers configured to generate, from the receive signal, first and second digital carrier signals, respectively. A phase-locked loop (PLL) may output a first frequency signal having a first frequency to the first carrier receiver and the second carrier receiver. The first and second carrier receivers may include first and second analog mixers, respectively, for translating frequencies of the receive signal, using the first frequency signal and the second frequency signal, respectively. Each of the first and second carrier receivers may further include a digital mixer for further translating the frequencies of the receive signal in the digital domain. |
| US11031961B2 |
Smart symbol changes for optimization of communications using error correction
Disclosed in some examples are methods, systems, devices, and machine-readable mediums which optimize one or more metrics of a communication system by intentionally changing symbols in a bitstream after encoding by an error correction coder, but prior to transmission. The symbols may be changed to meet a communication metric optimization goal, such as decreasing a high PAPR, reducing an error rate, reducing an average power level (to save battery), or altering some other communication metric. The symbol that is intentionally changed is then detected by the receiver as an error and corrected by the receiver utilizing the error correction coding. |
| US11031960B2 |
Rate matching methods for LDPC codes
A method of producing a set of coded bits from a set of information bits for transmission between a first node (110, 115) and a second node (110, 115) in a wireless communications system (100), the method comprises generating (904) a codeword vector by encoding the set of information bits with a low-density parity-check code, wherein the codeword vector is composed of systematic bits and parity bits. The method comprises performing (908) circular buffer-based rate matching on the generated codeword vector to produce the coded bits for transmission, wherein the circular buffer-based rate matching comprises puncturing a first plurality of systematic bits. |
| US11031959B1 |
System and method for informational reduction
Information reduction in data processing environments includes at least one of: one or more Error Correcting Codes that decode n-vectors into k-vectors and utilize said decoding to information-reduce data from a higher dimensional space into a lower dimensional space. The information reduction further provides for a hierarchy of information reduction allowing a variety of information reductions. Transformations are provided to utilize available data space, and data may be transformed using several techniques including windowing functions, filters in the time and frequency domains, or any numeric processing on the data. |
| US11031957B2 |
Decoder performing iterative decoding, and storage device using the same
A decoder including a main memory, a flag memory and a decoding logic is provided. The flag memory is configured to store flag data and the decoding logic configured to perform an iteration. Further, the decoding logic is configured to: perform an ith operation using first data, wherein i is a natural number, flag-encode second data that is results obtained by performing the ith operation on the first data, store results obtained by performing the flag encoding on the second data in the flag memory as first flag data if the flag encoding succeeds, and store predetermined second flag data that is different from the first flag data of the second data in the flag memory if the flag encoding fails. |
| US11031954B1 |
Data decoding method using LDPC code as error correction code and data transmitting method thereof
A data transmitting method using an LDPC code as an error correction code is provided. The method includes providing a parity check matrix of LDPC code, wherein the size of the parity check matrix is (m1+m2)×(n1+n2); in a sending side, encoding an input data of K bits with a encoder to generate a first block code of (n1+n2) bits, according to the parity check matrix; through a transmitting channel, sending n1 bits of the first block code from the sending side to a receiving side, wherein n2 bits of the first block code are not transmitted; and receiving the n1 bits of the first block code in the receiving side, and using the parity check matrix to perform a decoding algorithm to the received first block code to iterative decodes a second block code of (n1+n2) bits with a decoder. Furthermore, a data decoding method thereof is also provided. |
| US11031953B2 |
High performance, flexible, and compact low-density parity-check (LDPC) code
Certain aspects of the present disclosure generally relate to techniques for puncturing of structured low-density parity-check (LDPC) codes. Certain aspects of the present disclosure generally relate to methods and apparatus for a high-performance, flexible, and compact LDPC code. Certain aspects can enable LDPC code designs to support large ranges of rates, blocklengths, and granularity, while being capable of fine incremental redundancy hybrid automatic repeat request (IR-HARQ) extension while maintaining good floor performance, a high-level of parallelism to deliver high throughout performance, and a low description complexity. |
| US11031950B2 |
Compressively-accelerated read mapping framework for next-generation sequencing
A method of compressive read mapping. A high-resolution homology table is created for the reference genomic sequence, preferably by mapping the reference to itself. Once the homology table is created, the reads are compressed to eliminate full or partial redundancies across reads in the dataset. Preferably, compression is achieved through self-mapping of the read dataset. Next, a coarse mapping from the compressed read data to the reference is performed. Each read link generated represents a cluster of substrings from one or more reads in the dataset and stores their differences from a locus in the reference. Preferably, read links are further expanded to obtain final mapping results through traversal of the homology table, and final mapping results are reported. As compared to prior techniques, substantial speed-up gains are achieved through the compressive read mapping technique due to efficient utilization of redundancy within read sequences as well as the reference. |
| US11031946B1 |
Apparatus and method for low-latency low-power analog-to-digital conversion with high input signals
Accordingly, embodiments of the present invention provide a method and apparatus for low-latency, low-power dissipation analog-to-digital conversion. A SAR ADC is implemented using internal signal attenuation, after the signal being sampled, to convert accuracy into speed, allowing higher clock frequency and therefore smaller latency. Some embodiments of the low-latency, low-power dissipation analog-to-digital converters described herein are particularly well-suited to industrial motor control applications, such as analog-to-digital converters that convert relatively high amplitude signals to control motors of robotic or automated industrial manufacturing systems and devices. The reduced latency data conversion of the ADCs allows motor control systems to quickly respond to unanticipated stimulus, which is critical for certain applications, such as robots operating in noisy and unpredictable environments. |
| US11031945B1 |
Time-to-digital converter circuit linearity test mechanism
A phase-locked loop circuit included in a computer system includes time-to-digital converter and digital-to-time converter circuits. During a mode to test the time-to-digital converter circuit, the digital-to-time converter circuit is coupled to the time-to-digital converter circuit in a loop-back fashion. A control circuit supplies stimulus codes to the digital-time-converter circuit, which generates multiple delayed versions of a reference clock signal using the stimulus codes. The time-to-digital converter circuit, in turn, generates capture codes based on the delay between the reference clock signal and the delayed versions of the reference clock signal. The control circuit compares the capture codes to the stimulus codes to determine a linearity of a response of the time-to-digital converter circuit. |
| US11031934B2 |
Connection circuit and connection method thereof
The present disclosure relates to a connection circuit including a first circuit and a second circuit. The first circuit includes a first impedance unit. The first impedance unit is electrically connected to a first detecting terminal of an electronic device for receiving a first voltage. The second circuit includes a second impedance unit. The second impedance unit is electrically connected to a second detecting terminal of the electronic device. The second impedance unit includes a transistor switch. A control terminal of the transistor switch is electrically connected to the first circuit such that the transistor switch is turned on according to the first voltage, and the second circuit receives a second voltage transmitted from the second detecting terminal. |
| US11031933B2 |
Enhancement mode startup circuit with JFET emulation
A startup circuit includes an enhancement mode transistor with a drain coupled to a startup circuit input, a source coupled to a first node, and a gate coupled to a second node. The startup circuit includes a current limiting circuit that controls a current path between the second node and a startup circuit output node based on a current sense voltage signal representing a current through the enhancement mode transistor, and a voltage regulation circuit controls a voltage of the second node to regulate a startup circuit output voltage of the startup circuit output node. |
| US11031931B2 |
Method for protecting a semiconductor switch, protective device for a semiconductor switch, and control circuit for a semiconductor switch
A protective device for protection of a semiconductor switch against overvoltages during a deactivation process. A compensation signal is provided at an input of a driver stage for a semiconductor switch to be deactivated if the voltage at the output of the semiconductor switch exceeds a specified threshold, and simultaneously a request to open the semiconductor switch is detected at an input of the driver stage for the semiconductor switch. The compensation signal is limited to a specified duration. On the basis of the compensation signal provided in the aforementioned manner, the driver stage for the semiconductor switch partly controls the semiconductor switch in order to prevent an excessively quick opening of the semiconductor switch. |
| US11031929B1 |
Actively tracking switching speed control of a power transistor
A method of driving a transistor includes generating an off-current during a plurality of turn-off switching events to control a gate voltage at a gate terminal of the transistor, wherein generating the off-current includes sinking a first portion of the off-current from the gate terminal to discharge a first portion of the gate voltage, and sinking, during a boost interval, a second portion of the off-current from the gate terminal to discharge a second portion of the gate voltage; measuring a transistor parameter indicative of an oscillation of a drain-source voltage of the transistor for a first turn-off switching event during which the transistor is transitioned off; activating the first portion of the off-current for a second turn-off switching event; and activating the second portion of the off-current for the second turn-off switching event, including regulating a length of the boost interval based on the measured transistor parameter. |
| US11031927B2 |
Systems and methods for generating a controllable-width pulse signal
Systems, methods, and devices are provided for a circuit for generating a pulse output having a controllable pulse width. Systems and methods may include a delay line having a plurality of stages. A delay per stage calculation circuit is configured to determine a per-stage delay of the delay line using a first clock input. A pulse generation circuit is configured to generate the pulse output using the delay line based on the per-stage delay using a second clock input, the second clock input having a lower frequency than the first clock input. |
| US11031925B2 |
Frequency multiplying circuit for clock signal
Frequency multiplying circuit for clock signal is provided, including N branches and an N-times frequency multiplying circuit, wherein each branch includes a buffer and a frequency doubling circuit, and the frequency doubling circuit doubles a frequency of a reference clock signal to obtain a frequency doubled reference clock signal, wherein the N-times frequency multiplying circuit includes: N second calibration delay circuits coupled to the N frequency doubling circuits respectively, wherein each second calibration delay circuit performs clock delay on the frequency doubled reference clock signal to obtain a clock delayed frequency doubled reference clock signal; and an N-path phase combination circuit coupled to the N second calibration delay circuits, and configured to perform phase combination on the N clock delayed frequency doubled reference clock signals to obtain a 2N-times frequency multiplied reference clock signal. Cost is reduced, and phase noise of a multi-times frequency multiplied reference clock signal is optimized. |
| US11031922B1 |
Switch circuit with reduced switch node ringing
Apparatus and associated methods relate to providing a power stage having an auxiliary power switch coupled to a high-side switch or a low-side switch in parallel and turning on the auxiliary power switch earlier than turning on the high-side switch. In an illustrative example, the auxiliary power switch may be connected with the high-side switch in parallel. The on-resistance of the auxiliary power switch may be greater than the on-resistance of the high-side switch. A gate drive engine may be configured to generate gate driving signals for the switches in the power stage such that the auxiliary power switch is turned on a predetermined time duration earlier than the high-side switch. Thus, the ringing at a switch node of the power stage may be advantageously reduced or eliminated. |
| US11031909B2 |
Group delay optimization circuit and related apparatus
A group delay optimization circuit is provided. The group delay optimization circuit receives a first signal (e.g., a voltage signal) and a second signal (e.g., a current signal). Notably, the first signal and the second signal may experience different group delays that can cause the first signal and the second signal to misalign at an amplifier circuit configured to amplify a radio frequency (RF) signal. The group delay optimization circuit is configured to determine a statistical indicator indicative of a group delay offset between the first signal and the second signal. Accordingly, the group delay optimization circuit may minimize the group delay offset by reducing the statistical indicator to below a defined threshold in one or more group delay optimization cycles. As a result, it may be possible to pre-compensate for the group delay offset in the RF signal, thus helping to improve efficiency and linearity of the amplifier circuit. |
| US11031902B2 |
Integrated photovoltaic module mounting system for use with tufted geosynthetics
A mounting system 10 for a solar panel 11 includes a base plate 14 having a mounting channel 16 defined by an elongated base member 17, two oppositely disposed elongated channel walls 18 having clamping tangs 19, and a support wall 20. The mounting system also includes an I-beam 24 having a lower member 25, an upper member 26 and a spanning member 27. A C-shaped bracket 30 is slidably coupled to the upper member and has a mounting post with a staggered clamp 36 having a contact ledge 37. A nut 38 is threadably coupled to the mounting post 32 to force the contact ledge downwardly against the peripheral margin of the solar panel, thus locking the position of the solar panel. The mounting system includes a weld harness or weld harness strip 39 and anti-creep strips 44 which are coupled to the base member. |
| US11031899B1 |
Method for operating an electronically commutated synchronous machine, and actuation circuit
A method for operating an electronically commutated synchronous machine with several phases, wherein an actuation circuit operates the synchronous machine, the actuation circuit having at least two switches for each phase and a degree of actuation for each phase being periodically ascertained by the actuation circuit, wherein the switch-on period, during which a supply voltage is applied to the respective phase by way of the associated switch, is determined for ascertaining the degree of actuation, wherein the following steps are carried out: measuring current by a single measurement resistor in at least two measurement windows and shifting one or more of the switch-on periods of the different phases relative to one another as soon as the difference between switch-on instants of at least two phases falls below a minimum period or the difference between the switch-on periods of at least two phases falls below twice the minimum period. |
| US11031896B2 |
Motor driving apparatus and refrigeration cycle equipment
An electric quantity of a power supply of a connection switching device for switching the connection state of a motor, or at least one electric quantity which varies with the first-mentioned electric quantity is detected, the result of the detection is used to detect or predict a fall of a voltage of the switching power supply. Based on the result of the detection or prediction, an inverter is so controlled as to stop the motor before the voltage of the switching power supply falls below the minimum voltage required for the operation of the connection switching device. Breakdown of the connection switching device can be prevented. |
| US11031895B2 |
Motor drive system and air conditioner
A motor drive system can detect a misconnection. A motor drive system for driving a motor including a plurality of stator windings includes: an inverter that converts a DC voltage supplied from a DC voltage source into an AC voltage and applies the AC voltage to the motor; a connection switching device that is disposed between the inverter and the motor and can switch a connection state of the stator windings; and a controller that performs abnormality determination on a connection state of the connection switching device on the basis of a current value of a current flowing in each of the stator windings. |
| US11031893B2 |
Motor control device
A motor control device includes a first control unit performing feedback control on a motor with a command value; one or plural second control units performing feedback control on the motor with a limit value; a control switching unit selecting, based on a deviation between the limit value and a measured value, one of the first and the one or plural of second control units as control unit. The first control unit has a first calculation unit calculating a control value, based on a deviation between the command value and a measured value of the motor related to the command value. Each second control unit has a second calculation unit calculating a control value, based on a deviation between the limit value and a measured value of the motor related to the limit value. The first and second calculation units share terms of a calculation expression of the control value. |
| US11031889B2 |
Drive device and method for operating a drive device
A drive device, having a first electric machine operable as a generator and a second electric machine operable as a motor, which are electrically connected to one another, so that the second electric machine is operable using electric energy provided by the first electric machine, wherein an energy accumulator for temporarily storing electric energy is electrically connected to the first electric machine and the second electric machine. It is provided in this case that the first electric machine and the second electric machine are electrically directly connected to one another via an intermediate circuit, wherein the energy accumulator is electrically connected to the intermediate circuit via a switch arrangement both directly and also indirectly via a voltage converter. The disclosure furthermore relates to a method for operating a drive device. |
| US11031887B2 |
Motor control device, vehicle having the same and method of controlling the vehicle
A motor control device includes: a storage configured to store reference Lissajous values; and a controller configured to apply an excitation signal to a resolver; receive an output signal output from the resolver, to obtain a Lissajous value corresponding to the received output signal, to determine that an external noise is input when the obtained Lissajous value is different from the reference Lissajous values, and to control driving of a motor based on the obtained Lissajous value when the obtained Lissajous value is equal to any one of the reference Lissajous values. A vehicle having the motor control device may further include a battery configured to transmit power to the motor and to be charged by regenerative braking of the motor. |
| US11031882B2 |
Modular multilevel converter having capacitor degradation determination
A power conversion device includes power conversion circuitry including a plurality of submodules connected in series to each other. The power conversion device further includes: a signal reception unit configured to receive a signal representing a voltage of a capacitor in each of the submodules; a time calculation unit configured to calculate at least one of a charging time of the capacitor and a discharging time of the capacitor based on the signal; and a determination unit configured to determine whether the capacitor has degraded or not based on at least one of a first result of comparison of the charging time with a reference charging time serving as a reference for determining degradation of the capacitor, and a second result of comparison of the discharging time with a reference discharging time serving as a reference for determining degradation of the capacitor. |
| US11031881B2 |
Output current synthesizer and power supply apparatus
An output current synthesizer that synthesizes output currents output from a plurality of power inverter circuits converting direct current power to alternating current power and outputs the synthesized output currents as synthesized current having a predetermined frequency, the output current synthesizer includes a pair of conductors which is provided with each of the power inverter circuits and to which the output currents of the power inverter circuits flow, a reactor which is provided on each of the pairs of conductors and generates magnetic flux corresponding to a difference between values of currents flowing to the pairs of conductors to reduce the difference between the values of currents, a pair of conductive members to which the pairs of conductors are connected in parallel, and a pair of output terminals which is provided on the pair of conductive members and output the synthesized currents. |
| US11031880B2 |
Power converter, motor driving unit, and electric power steering device
A power converter to convert power from a power supply into power supplied to a motor including n-phase windings, where n is an integer of 3 or more, in which first ends thereof are Y-connected and includes an inverter connected to second ends of the n-phase windings, a phase separation relay circuit to switch connection and disconnection between the power supply and the n-phase windings for each phase, a neutral point leg connected to a neutral point node of the motor, in which the first ends of the n-phase windings are Y-connected, and a neutral point separation relay circuit to switch connection and disconnection between the power supply and the neutral point node. |
| US11031877B2 |
Synchronous rectifiers with reduced power loss and the method thereof
A synchronous rectifier monitors a driven signal of a synchronous switch. If the driven signal is provided within a set time length, the driven signal is latched off, to make the system enter light load mode. |
| US11031872B2 |
Controlling output voltage for power converter
A circuit includes an overshoot-and-undershoot (OU) signal generator generating a signal indicating detection of an overshoot or an undershoot of an output signal of the power converter. The circuit further includes a feedback signal modulator receiving a first feedback signal and the signal indicating detection of the overshoot or the undershoot and generating a second feedback signal in response to the first feedback signal and the signal indicating detection of the overshoot or the undershoot. The feedback signal modulator generates the second feedback signal that is different from the first feedback signal during a predetermined time interval after the signal indicating detection of the overshoot or the undershoot has been asserted. |
| US11031870B2 |
Drive signal generating circuit and power supply circuit
A power supply circuit having a rectifier circuit that rectifies an AC voltage, an inductor, a transistor that controls an inductor current flowing through the inductor, a drive signal generating circuit that generates a drive signal based on the inductor current and an output voltage generated from the AC voltage, and a drive signal output circuit outputting the drive signal. The drive signal generating circuit includes a command-value output unit that outputs a command value for increasing and decreasing the inductor current when the output voltage is lower or higher than a target level, respectively, a rectified-voltage calculation unit that calculates a value of the rectified voltage based on an inductance of the inductor and an amount of change in the inductor current in a predetermined time period, and an ON-period calculation unit that calculates an ON period in a switching period of the transistor. |
| US11031868B2 |
Switching converter with pulse truncation control
A system includes a load and a switching converter coupled to the load. The switching converter includes at least one switching module and an output inductor coupled to a switch node of each switching module. The switching converter also includes a controller coupled to each switching module, where the controller is configured to adjust a pulse clock rate and a switch on-time for each switching module. The controller comprises a pulse truncation circuit configured to detect a voltage overshoot condition and to truncate an active switch on-time pulse in response to the detected voltage overshoot condition. |
| US11031866B2 |
Charge pump circuit and method for voltage conversion
A charge pump circuit comprises a series circuit of a number N of stage circuits. A stage circuit comprises a converter circuit, a stage output, a stage input coupled via the converter circuit to the stage output, a first clock input and a second clock input coupled to the converter circuit, a control input and an activation transistor having a control terminal coupled to the control input and a first terminal coupled to the stage output. |
| US11031862B2 |
Systems and methods to balance magnetic flux in a switched mode power supply
Systems and methods to reduce magnetic flux in a switched mode power supply are disclosed. An example welding-type power supply includes a switched mode power supply, comprising: a transformer configured to transform an input voltage to a welding-type voltage; a capacitor in series with a primary winding of the transformer; switches configured to control a voltage applied to a series combination of the primary winding of the transformer and the capacitor; a comparator coupled to the transformer and configured to compare the welding-type output voltage to a threshold voltage; and a flux accumulator to determine a net flux in the transformer based on the voltage applied to the series combination of the primary winding of the transformer and the capacitor. |
| US11031861B2 |
System and method for protection during inverter shutdown in distributed power installations
A protection method in a distributed power system including of DC power sources and multiple power modules which include inputs coupled to the DC power sources. The power modules include outputs coupled in series with one or more other power modules to form a serial string. An inverter is coupled to the serial string. The inverter converts power input from the string and produces output power. When the inverter stops production of the output power, each of the power modules is shut down and thereby the power input to the inverter is ceased. |
| US11031859B2 |
Device for stabilizing direct current (DC) distribution system
A device for stabilizing a direct current (DC) distribution system includes a capacitor unit charged by a DC voltage supplied by a power supply stage of the distribution system. The device further includes an inverter that has three pair of switching elements. The device also includes a controller that controls a plurality of switches thereof to selectively enable an inverter circuit or a voltage stabilizing circuit of the DC distribution system. The device alleviates instability of DC voltage which may be generated in a transient period, or to drive a motor connected to the device. |
| US11031852B2 |
Manufacturing method of stator, stator, and bending process machine
Manufacture of a stator clamps an intersection of two legs that are protruded from different slots provided in a stator core, that are adjacent to each other in a radial direction, and that intersect with each other without any other leading end located in a circumferential direction between their respective leading ends when being viewed in the radial direction. The manufacture then bends a leading end of an inner leg located on an inner side in the radial direction out of the clamped two legs, toward an outer circumferential side of the stator core, while bending a leading end of an outer leg located on an outer side in the radial direction, toward a shaft center side of the stator core. |
| US11031849B2 |
Linear motor and operating method thereof
A linear motor includes a stator and a rotor that is axially moveable relative to the stator, wherein the rotor is permanently excited by a rotor magnetic field which is periodic with a first period length (PP) along its longitudinal axis, wherein the linear motor comprises a position detection device, which is designed to detect a position of the rotor in relation to the stator, wherein the position detection device comprises at least a first magnetic field sensor (S1) and a second magnetic field sensor (S2), wherein the first magnetic field sensor (S1) and the second magnetic field sensor (S2) are arranged on the stator spaced apart from each other by a first distance (d1) along the longitudinal axis of the rotor, wherein the first distance (d1) is at least approximately an odd multiple of one-sixth of the first period length (PP). |
| US11031842B2 |
Compact gear motor
The disclosure relates to a gear motor made of a housing enclosing an electric motor driving a reduction gear train having at least one intermediate gear and an output wheel, including an output wheel made of a single piece having a tooth crown on either side of which extend cylindrical axial extensions which are each held by the housing, each one of the extensions having at its respective end a coupling with an external drive element. The output wheel is coaxial with a toothed wheel constituting one of the intermediate gears, the toothed wheel being able to rotate freely in relation to one of the axial extensions. |
| US11031838B2 |
Housing unit for an electric machine
A housing includes a first housing unit which includes a first bearing shield, a flange, a stator laminated core arranged between the first bearing shield and the flange, and a coating which is made of stainless steel and applied by an additive manufacturing method so as to cover the first bearing shield, the stator laminated core, and the flange and thereby form a unitary structure. |
| US11031835B2 |
Axial flux induction motor or generator
An axial flux induction machine includes at least two stators and one rotor where the stators include an inner and outer ring of coils. The stator includes two mirrored structures constructed such as to secure wire coils, amplify magnetic characteristics, and provide a structure upon which to secure a rotary shaft. The structures supporting the outer ring of coils can be in contact between the two stators and the outer ring can be spaced further from the rotary shaft than the inner ring of coils and also further from the rotary shaft than an outer edge of the rotor. |
| US11031826B2 |
Magnetic flux coupling structures with controlled flux cancellation
Inductive power transfer flux coupling apparatus includes a first coil arranged in a first layer and configured to generate or receive a magnetic coupling flux in a flux coupling region, and a second coil. At least part of the second coil being arranged in a second layer and is configured to generate a magnetic flux that reflects flux from the first coil. |
| US11031819B2 |
System for wireless power transfer between low and high electrical potential, and a high voltage circuit breaker
A system for wireless power transfer having a power transfer device, including a capacitor unit and an inductor unit connected in series to form an LC resonant circuit. The inductor unit is designed to form an envelope with a toroidal shape, the envelope forming an inductor coil with at least one turn, which generates an oscillating magnetic field outside of the envelope used for the wireless power transfer. The ends of each turn are electrically insulated from each other by means of an insulation gap, and appropriately connected by wires inside the envelope. The capacitor unit is disposed inside this envelope such that the envelope wraps the capacitor unit and wires between the capacitor unit and the inductor unit. |
| US11031817B2 |
Coil selection in multi-coil wireless charging system
A wireless charging system is configured to charge one or more receiver devices simultaneously. The wireless charging system includes a plurality of coils for wireless charging the one or more receiver devices. The wireless charging system may use a machine learning algorithm to detect the one or more receiver devices and select which of the multiple coils to activate for charging the multiple coils. Based on measurements made from signal through the coils within the wireless charging system, the machine learning algorithm determines a subset of the coils to activate for charging the detected one or more receiver devices. |
| US11031816B2 |
Transaction device capable of managing and routing power from an external power source
A transaction device may include a power reception component configured to receive power from an external device with which the transaction device is to interact to perform a transaction. The transaction device may include a secure element configured to perform the transaction using the power received from the external device. The transaction device may include one or more peripheral components configured to perform one or more operations other than the transaction. The transaction device may include a power management component configured to determine at least one operation, of the one or more operations, to be performed in association with the transaction, and to route power received from the external device to at least one peripheral component, of the one or more peripheral components, capable of performing the at least one operation. |
| US11031813B2 |
Systems and methods for auxiliary power management of behind-the-meter power loads
A system includes a flexible datacenter and a power generation unit that generates power on an intermittent basis. The flexible datacenter is coupled to both the power generation unit and grid power through a local station. By various methods, a control system may detect a transition of the power generation unit into a stand-down mode and selectively direct grid power delivery to always-on systems in the flexible datacenter. |
| US11031810B2 |
Power supply circuit and electronic device
A power supply circuit includes: a standby power supply; a first path coupled to the standby power supply; a main power supply configured to output power a voltage of which is higher than a voltage of power output by the standby power supply; a second path coupled to the main power supply; a switch disposed between the first path and the second path; and a power supply control circuit configured to, upon detection of output of the power from the main power supply, turn on the switch to switch a power supply that supplies power to the first path from the standby power supply to the main power supply, wherein the power supply control circuit is operated by the power supplied through the first path. |
| US11031809B2 |
System and method for emergency lighting
A lighting network (100) and methods therefore are disclosed. The lighting network (100) a plurality of lighting units (10) that can operate on AC power and DC back up power if the AC power is removed. A controller (15) is used to redistribute the DC power between the plurality of lighting units (10) in the event that DC power is low or exhausted in one of the plurality of lighting units (10). |
| US11031804B2 |
Power controller
One example discloses a power controller for a power device, wherein the power device includes a normal state, the power controller having: an input configured to receive fault detection signals attributable to the power device; an output configured to be coupled to the power device; and wherein the power controller is configured to send a state change signal over the output to change the normal state of the power device to a first fault state for a first time period in response to a first fault detection signal; and wherein the power controller is configured to send a state change signal over the output to change the first fault state of the power device to a second fault state for a second time period in response to a second fault detection signal. |
| US11031803B2 |
Start-up apparatus for battery management circuit and battery management system having the same
A start-up apparatus for a battery management circuit and a battery management system having the same are provided. The start-up apparatus for the battery management circuit includes a transformer, a switch circuit, a control circuit, and a rectifier circuit. The transformer includes a primary winding, an auxiliary winding, and a secondary winding. A first terminal of the primary winding is coupled to a first external power path. A first terminal of the switch circuit is coupled to a second terminal of the primary winding, and a second terminal of the switch circuit is coupled to a second external power path. The control circuit is coupled to the auxiliary winding for receiving power and controls a conduction state of the switch circuit. The rectifier circuit is coupled to the secondary winding of the transformer and supplies power to the battery management circuit. |
| US11031802B2 |
Portable power system
A power management system and method are disclosed. The system can be a high availability power delivery system. The system can be GPS tracked. The system can have multiple batteries, multiple input power sources, and multiple loads. The system can switch between the multiple batteries and the power source to deliver power to the load. The system can ensure there will always be an input power source to power the load. |
| US11031796B2 |
Short circuit and soft short protection for data interface charging
A switching power converter is provided that communicates with a mobile device to receive a value of a load detection current. The switching power converter adjusts the cycling of a power switch until a constant current mode of operation is entered with a known output current driving the mobile device. The switching power converter subtracts the load current from the output current to measure a soft-short circuit current. |
| US11031794B2 |
Autonomous charge balancing of distributed AC coupled batteries with droop offset
A system and apparatus for autonomous charge balancing of an energy storage device of the microgrid. In one embodiment the apparatus comprises a power conditioner, coupled to the energy storage device, comprising a droop control module for operating the power conditioner, during an autonomous mode of operation, such that the state of charge of the energy storage device is autonomously driven toward the state of charge of at least one other energy storage device of the microgrid. |
| US11031791B2 |
Electronic adjusting device for electric energy storing apparatus of the type provided with batteries
An electronic adjusting device (1) for an electric energy storing apparatus (100) of the type provided with batteries, said storing apparatus comprising a plurality of battery modules (10) electrically connectable with an electric load, said electronic adjusting device comprising a plurality of electronic adjusting units (2), each comprised in a corresponding battery module (10) to adjust the feeding current (IL) provided by the cells (11) of the said battery module to said electric load. |
| US11031790B2 |
System and method for providing interconnected and secure mobile device charging stations
A system for verifying the identity of a user is disclosed. The system has a door that selectively opens to allow access to a cavity and selectively closes to block access to the cavity, a lock configured to selectively lock and unlock the door when the door is closed, a camera configured to image a user area adjacent to the door, computing memory having associated therewith code, and a processor communicatively coupled with the computing memory. The processor communicatively coupled with the computing memory is configured to execute the code and to control the camera to record a first image data of the user area that includes a plurality of first image sets recorded at a plurality of first times, store the first image data, and control the camera to record a second image data of the user area that includes a second image set recorded at a second time. |
| US11031789B2 |
Battery pack management system and control method thereof
A battery pack management system includes a controller, an isolation unit, a plurality of battery pack management units, and a plurality of battery packs. The plurality of battery pack management units are connected in series by a first daisy chain, and the plurality of battery pack management units are also connected in series by a second daisy chain. The first daisy chain transmits sampled data that is collected by the battery pack management units from corresponding battery packs and transmits control instructions of the controller. The second daisy chain transmits a failure prompt signal which is generated by a battery pack management unit that detects a failure. A first battery pack management unit and a last battery pack management unit of the plurality of battery pack management units connected in series are connected to the controller through the isolation unit. |
| US11031788B2 |
Charging control method for battery based on time and electronic device supporting the same
An electronic device is disclosed, and includes a battery supplying power to the electronic device, a charging circuit charging the battery, and a processor. The processor is configured to obtain context information associated with charging of the battery, if the context information satisfies a first specified condition, to set a timer associated with a charging time of the charging circuit to a first time, if the context information satisfies a second specified condition, to set the timer to a second time different from the first time, and to charge the battery by using the charging circuit during the first time corresponding to the first specified condition or the second time corresponding to the second specified condition. |
| US11031786B2 |
Power convertor, power generation system, and power generation control method
According to one embodiment, a power convertor includes a buck-boost circuit; a switch driver, a switching controller, and a positive input terminal and a negative input terminal. In maximum power-point tracking, the switching controller causes the buck-boost circuit to stop outputting the output voltage, and varies the voltage value of the input voltage in a given range, which is from a lower-limit voltage value at which the switch driver is operable, by switching between the positive input terminal and the negative input terminal while varying a duty factor. |
| US11031782B2 |
Photovoltaic transfer switch with non-essential load cutoff
In an a power management system for managing a plurality of essential loads and a plurality of nonessential loads that can be fed electric power from an alternate power source and from a grid power source, a power distribution network transmits power from the alternate power source and the grid power source to the essential loads and to the nonessential loads. A grid power sensor senses a grid power failure. A wireless transmitter is coupled to the grid power sensor and transmits a decouple signal when the grid power sensor detects a grid power failure. A plurality couplers selectively couple the nonessential loads to the power distribution network. Each of the plurality of couplers includes a wireless receiver and a switch that responsive to the wireless receiver. The couplers also decouple at least one of the nonessential loads from the power distribution network when the decouple signal is received. |
| US11031776B2 |
Overvoltage protection device and a method for operating an overvoltage protection device
Embodiments of overvoltage protection devices and a method for operating an overvoltage protection device are disclosed. In an embodiment, an overvoltage protection device includes a switch circuit connected between an input terminal from which an input voltage is received and an output terminal from which an output voltage is output and including multiple NMOS transistors and multiple PMOS transistors connected in series between the input terminal and the output terminal, a first voltage generation circuit configured to, generate a first voltage that is applied to the NMOS transistors and a second voltage that is applied to a body of each of the PMOS transistors, in response to the input voltage and a supply voltage, and a second voltage generation circuit configured to generate a third voltage that is applied to the PMOS transistors in response to the input voltage and the first voltage. |
| US11031774B2 |
Superconducting fault current limiter having improved energy handling
A superconducting fault current limiter element, comprising: a plurality of tapes, arranged in electrical parallel fashion among one another, wherein at least one tape of the plurality of tapes comprises a superconductor tape, and wherein at least one tape of the plurality of tapes comprises a non-superconductor tape. |
| US11031772B2 |
Protection earth connection detector
A device for detecting and/or monitoring a protective earth connection in a mains electricity outlet includes an electrical current conducting unit between the line wire and/or neutral wire of the mains electricity and the protective earth wire allowing the flow of a detection current between the line wire and/or neutral wire and the protective earth wire. The device is furthermore configured for measuring the detection current and comparing the detection current with a preselected reference current. A method for detecting and/or monitoring a protective earth connection in a mains electricity outlet includes the steps of measuring a detection current from the line wire and/or neutral wire of the mains electricity through an electrical current conducting unit to the protective earth wire, and comparing the measured detection current to a preselected reference current. |
| US11031771B2 |
Power supply control apparatus
A power supply control apparatus controls power supply via a semiconductor switch, by a driving circuit turning ON or OFF the semiconductor switch. A current circuit pulls in a current from the drain of the semiconductor switch via a resistance. The current value Ic of the current that is pulled in by the current circuit fluctuates in the same direction as a fluctuation direction of the ON resistance value of the semiconductor switch, depending on the ambient temperature of the semiconductor switch. If the source voltage of the semiconductor switch is lower than a voltage at the other end of the resistance, the driving circuit turns OFF the semiconductor switch. |
| US11031768B2 |
Devices including two current monitors
A device includes a current sensor, a first current monitor, and a second current monitor. The current sensor is to sense a current between an input node and an output node. The first current monitor is to disconnect the input node from the output node in response to the sensed current exceeding a first threshold current for a period exceeding a threshold period. The second current monitor is to disconnect the input node from the output node in response to the sensed current exceeding a second threshold current greater than the first threshold current. |
| US11031766B2 |
Cable accessory with improved thermal conductivity
The invention relates to a cable accessory, said accessory being surrounded by at least one electrically insulating crosslinked layer comprising at least one polymer material, boron nitride and silicon carbide, to an electrical device comprising at least said cable accessory, to a process for manufacturing said accessory and said device, to the use of said crosslinked layer around an electric cable accessory or in an electrical device, in particular for promoting heat discharge, to a kit for connecting electric cables, and to a cable accessory, said accessory comprising two fillers of different thermal conductivities. |
| US11031764B2 |
Wire unit
Provided is a wiring unit in which it is possible to limit the height dimension. The wiring unit is provided with a plurality of electrical wires, a plate on which a support surface for supporting each of the electrical wires is formed, and a holding member. The holding member has a flat pressing surface arranged to be approximately parallel with the support surface of the plate. The electrical wires are arranged in a row and held between the pressing surface and the support surface. |
| US11031762B2 |
Circuit assembly
Provided is a circuit assembly that can prevent a switching element from overheating. Included is a first conductive portion that is plate-shaped and elongated in one direction, a second conductive portion that is plate-shaped, elongated along a lengthwise direction of the first conductive portion, and is arranged to be separated from the first conductive portion by a predetermined distance, and a plurality of switching elements that are arranged straddling the first conductive portion and the second conductive portion, and are lined up in the lengthwise direction, wherein width of the first conductive portion or the second conductive portion at one end portion in the lengthwise direction is different from a width at the other end portion in the lengthwise direction. |
| US11031761B2 |
Resin structure
A resin structure includes a first resin body having an annular first side wall portion, a second resin body having a second side wall portion, and a third resin body having a bottom wall portion and an annular third side wall portion connected to the bottom wall portion. The second resin body is assembled to the first resin body, such that an upper edge of the second side wall portion and at least a portion of an annular lower edge of the first side wall portion in a circumferential direction are aligned. The third resin body is assembled to the second resin body, such that an annular upper edge of the third side wall portion and at least a lower edge of the second side wall portion are aligned. |
| US11031759B2 |
High jack support assembly
A high jack support assembly has an elongated hollow conduit having a first end and a second end. A cord and/or tube extends through the conduit from the first end to the second end. One or more connecting members are attached to the conduit and are used to attach the conduit to a support and hold the conduit in an upright position. |
| US11031757B2 |
Submarine cable route planning tool
An underwater cable route planning technology is provided for automatically generating underwater cable routes using a model. In this regard, one or more processors may receive bathymetry data, and may also receive existing route data for a plurality of existing underwater cable routes. Based on the bathymetry data and the existing route data, a model for determining underwater cable routes may be generated. As such, when a request for an underwater cable route connecting a first location and a second location is received, the model may be used to generate one or more potential underwater cable routes based on the first location, the second location, and the bathymetry data. |
| US11031756B2 |
Foundation interface device
A foundation interface device for pulling a cable (16) that is arranged in a conduit into a structure. The interface device has a flexible, generally cylindrical pull-in member (12) that is connected to the conduit. At the leading end of the pull-in member is a weak link latch having releasable arms (72) connected to the pull-in member and connection piece (66) connected to the cable. At the rear of the pull in member is a slidable sleeve operably connected to extendable teeth (40). The slidable sleeve has an abutment (36) that contacts an opening of the structure when the interface device is pulled into the opening, causing the sleeve to slide rearward at thus extending the teeth to lock the interface device in the opening. |
| US11031755B2 |
Automated shotgun stick for clamping grounding devices on overhead lines
A shotgun stick for use with grounding devices is provided. An example shotgun stick includes a housing and a drive shaft supported within the housing. The shotgun stick further includes a torque connector coupled with a first end of the drive shaft that receives a grounding clamp assembly. The shotgun stick includes a motor assembly operably connected to a second end of the drive shaft. In an automatic mode, the motor assembly drives the drive shaft so as to actuate the grounding clamp assembly received by the torque connector. The shotgun stick also includes a manual locking mechanism. In a manual mode, the manual locking assembly locks the drive shaft to at least a portion of the housing so as to preclude rotation of the drive shaft and allow manual actuation of the grounding clamp assembly received by the torque connector. |
| US11031754B2 |
Motor control center units with retractable stabs and interlocks
Motor control centers have units or buckets with one or more sliding shutters that controllably block access to a stab isolation port based on position of the operator disconnect handle using attached cams that slide the shutter right and left. A front panel of the unit or bucket may also be configured to pivot out about a long axis associated with a bottom long side thereof. |
| US11031753B1 |
Extracting the fundamental mode in broad area quantum cascade lasers
A broad area quantum cascade laser includes an optical cavity disposed between two sidewalls, the optical cavity including an active region for producing photons when a current is applied thereto, where the optical cavity is subject to a presence of at least one high order transverse optical mode due to its broad area geometry. The broad area quantum cascade laser may also include an optically lossy material disposed on at least a first portion of one or more of the two sidewalls. |
| US11031750B2 |
Light source device
A light source device includes: a plurality of laser sources; a plurality of collimating parts, each configured to collimate the light beam emitted from a corresponding one of the laser sources; a combining grating configured to diffract, at an identical diffraction angle, light beams that have passed through the collimating parts and are incident on the combining grating at different incident angles, to combine the diffracted light beams; and a plurality of plane transmission gratings, wherein each of the plane transmission gratings is disposed in an optical path between a corresponding one of the collimating parts and the combining grating, and wherein each of the plane transmission gratings is adjustable so as to allow selection of a wavelength of the light beam incident on the combining grating. |
| US11031747B2 |
Light-emitting device
The present embodiment relates to a light emitting device having a structure capable of removing zero order light from output light of an S-iPM laser. The light emitting device includes a semiconductor light emitting element and a light shielding member. The semiconductor light emitting element includes an active layer, a pair of cladding layers, and a phase modulation layer. The phase modulation layer has a basic layer and a plurality of modified refractive index regions, each of which is individually disposed at a specific position. The light shielding member has a function of passing through a specific optical image output along an inclined direction and shielding zero order light output along a normal direction of a light emitting surface. |
| US11031746B2 |
Semiconductor laser module
A semiconductor laser module includes a semiconductor laser device that outputs laser light; an optical fiber that includes a core portion and a cladding portion formed at an outer periphery of the core portion and that receives the laser light from one end and guides the laser light to the outside of the semiconductor laser module; an optical part disposed at an outer periphery of the optical fiber, having optical transmittance at a wavelength of the laser light, and that fixes the optical fiber; a first fixative that fixes the optical part and the optical fiber; and a housing that accommodates the semiconductor laser device and the one end of the optical fiber that receives the laser light, wherein an optical reflection reducing region treated to absorb the laser light and having a rough surface is formed around the optical part. |
| US11031739B2 |
Protective plug for connector
A protective plug is provided for a connector that includes a shielding cage with an insertion space therein and a front end opening communicating with the insertion space, the front end opening has a plurality of leaf springs, each leaf spring has an elastic arm extending rearwardly and inwardly, the elastic arm has a contact portion. The protective plug includes a cover body to cover the front end opening and an insertion body, the insertion body has at least one first contact surface facing the corresponding leaf spring, the first contact surface has a leaf spring acting surface portion extending forwardly and inwardly, after the protective plug is inserted to the insertion space of the shielding cage, the contact portion of the leaf spring contacts the leaf spring acting surface portion and applies a component force toward the rear to the leaf spring acting surface portion. |
| US11031735B2 |
Electrical connector assembly
First terminals have a contact arm portion and second terminals have a convex contact point portion that is contactable with the intermediate portion of the contact arm portion of the first terminals in the direction of plugging and unplugging of the two connectors. The section of the contact arm portion of the first terminals that extends from the location of contact with the convex contact point portion of the second terminals to the free end portion of the contact arm portion in the direction of plugging and unplugging forms a stub portion. The sections of the first terminals other than the stub portion and the second terminals constitute a main transmission path. In a predetermined range that includes the location of contact in the main transmission path, the impedance of at least a partial range of said predetermined range is made smaller than the impedance of the stub portion. |
| US11031731B2 |
Breakaway connectors for coaxial cables
A breakaway coaxial cable connector includes a conductive body configured to engage a cable. The conductive body is configured to be selectively coupled to an interface port to maintain electrical connectivity between the cable and the interface during operation of the connector when a first tension force below a predetermined threshold level is applied between the cable and the interface port, and the conductive body is configured to be selectively de-coupled from the interface port so as to interrupt electrical connectivity between the cable and the interface port during operation of the connector when a second tension force above the predetermined threshold level is applied between the cable and the interface port. |
| US11031723B2 |
Cable header
Disclosed are apparatuses including a cable header block with apertures for floating inserts and a cover plate. The cable header block includes an aperture pattern that matches a pattern of connector terminals. The floating inserts fit in the apertures of the cable header block. The cover plate can also include a through-hole pattern that matches the aperture pattern. Also, each of the through-holes can include a first geometric shape larger than a cross-section of a cable terminal end and a second geometric shape adjacent to the first shape that is smaller than the cross-section of the cable terminal end. The cover plate retains the floating inserts within the apertures. Also, the cover plate aligns the first geometric shape over the floating inserts when the fastener is in a first position and aligns the second geometric shape over the floating inserts when the fastener is in a second position. |
| US11031721B2 |
Interface unit for a plug system having type coding
A cable-side interface unit for a plug system for transmitting electrical power in a high-voltage electrical system of a vehicle includes a housing configured to at least partially extend around one or more power contact parts of the cable-side interface unit and to fasten a cable to the cable-side interface unit. The interface unit also comprises colored and/or physical type coding means, which are arranged on an outer wall of the housing and make it possible to identify a certain component-side interface unit of the plug system from a plurality of different component-side interface units of the electrical system. |
| US11031720B2 |
Connector with terminal fitting
A connector (10) includes a terminal supporting body (30) and a terminal covering body (50) slidable relative to each other. Male terminal fittings (20) are supported in the terminal supporting body (30), and each has a male tab (21). A housing (70) has an accommodating portion (71) to accommodate the terminal supporting body (30) and the terminal covering body (50), and a receptacle (72) surrounds the male tabs (21). The terminal covering body (50) slides between a protection position and an exposed position relative to the male tabs (21). The accommodating portion (71) has a contact stop (75) that stops the terminal covering body (50). The terminal supporting body (30) slides to displace the terminal covering body (50) from the protection position to the exposed position when a sufficient force is applied with the terminal covering body (50) stopped in contact with the contact stop (75). |
| US11031719B2 |
Power connector
A connector is disclosed including a housing and a pair of terminals. Each terminal includes a U shaped body portion and a mounting portion formed at the first end of the body portion with a bent contacting portion disposed at a therebetween. A wire securing portion is formed at the second end of the body portion with a pair of crimping portions to secure the wire to the terminal. The body portion and the mounting portion are received in a slots formed in the housing with the contacting portion extending through a window formed in the housing and the terminal mounting portion being translatable within the slot. A TPA device is secured to the housing that blocks the terminal from being removed from the housing. |
| US11031718B2 |
Connector with a housing having a locking lance with a restricting portion to restrict outward deformation of the locking lance
It is aimed to prevent improper deformation of a locking lance. A connector (1) includes a housing (10) having an insertion space (11), an terminal module (27) insertable into the insertion space (11), a locking lance (16) formed in the housing (10) such that an outer surface (17S) is exposed to outside of the housing (10) and configured to be resiliently deformed toward the outer surface (17S) in the process of inserting the terminal module (27) into the insertion space (1) and resiliently return to retain the terminal module (27) when the terminal module (27) is properly inserted, and restricting portions (23) formed on the locking lance (16) and configured to restrict a displacement of the locking lance (16) toward the insertion space (11) by being locked to the housing (10). |
| US11031715B2 |
Connection terminal having a reduced size
A connection terminal for connecting at least one electrical conductor includes: a housing; a first connection space formed in the housing; a second connection space formed in the housing; a first busbar piece arranged in the first connection space; a second busbar piece arranged in the second connection space; a first torsion spring which is arranged in the first connection space and has a clamping limb and a retaining limb; and a second torsion spring which is arranged in the second connection space and has a clamping limb and a retaining limb. The first connection space and the second connection space adjoin one another. The first torsion spring is arranged in the first connection space and the second torsion spring is arranged in the second connection space such that the retaining limb of the first torsion spring is supported by the retaining limb of the second torsion spring. |
| US11031712B2 |
Connector for a printed circuit board equipped with an electrical signal transmission line conducting enclosure
The application relates to a connector (1), designed for a connection to a printed circuit board, the connector (1) extending along a longitudinal axis (X) and including an electrically-conducting body (2); at least one contact (8) accommodated, at least in part, within the body (2) with interposition of an electrical insulator (7) between them; a housing (3) defining an accommodation (6) configured for receiving all or part of the body; and an electrically-conducting cover (10) composed of at least one piece, inserted into the electrically-conducting body (2), such that at least one of the main faces (100) covers the front of the electrical insulator (7), in the rear part for accommodating the latter inside of the electrically-conducting body which is lacking a wall. |
| US11031710B2 |
Electrical connector and wire harness assembly with compression contacts
A wire harness assembly including a first connector, a second connector, and conductors extending between the first connector and the second connector. Contacts are provided on the second connector. The contacts have termination sections which are mounted on the second connector, compliant sections which extend from the termination sections, and substrate engagement sections which extend from the compliant sections. The substrate engagement sections have curved contact sections which are configured to be positioned in mechanical and electrical engagement with circuit pads of a mating printed circuit board. Embossments are provided on the curved contact sections to provide additional strength and stability to the curved contact sections. |
| US11031709B2 |
Electrical connector for circuit boards and mounting arrangement for electrical connector for circuit boards
A housing of an electrically insulating material, signal terminals and non-signal terminals used as at least one of ground terminals and power supply terminals which are made of a metallic material and retained within the housing, and reinforcing fittings attached to the housing, wherein the non-signal terminals are located outside the array range of the signal terminals, the reinforcing fittings are located adjacent to the non-signal terminals, the non-signal terminals have connecting legs for connection to a circuit board, the reinforcing fittings have attachment legs for attachment to the circuit board P, and the connecting legs of the non-signal terminals and the attachment legs of the reinforcing fittings are located adjacent to each other in the array direction of the signal terminals within a single through-hole provided in a common land formed on the circuit board and can be solder-connected to said land. |
| US11031704B2 |
Cable with nanoparticle paste
A cable can be used to facilitate electrical connections between electrical components. The cable can include a plurality of cable strands forming a void space. An adhesive paste can be applied within the void space. The adhesive paste can include a plurality of metallic nanoparticles. The metallic nanoparticles can fuse with each other and with the plurality of cable strands when energy is applied the connector and the cable. The metallic nanoparticles can include a surfactant, which can be displaced as pressure is applied. Heat can be applied to the adhesive paste to fuse the metallic nanoparticles. |
| US11031703B2 |
Antenna unit and antenna system
An antenna unit, including a radiator, a dielectric layer and an antenna ground plane which are sequentially stacked. The radiator includes a first antenna unit and a second antenna unit that are opposite to, spaced apart from and structurally complementary to each other. The first antenna unit is provided with a feeding point connected to an external power source and two first grounding points connected to the antenna ground plane. The second antenna unit is provided with three second grounding points connected to the antenna ground plane. Compared with the related art, the antenna unit provided by the present disclosure works in the 37-42.5 GHz band, has a good antenna performance, wide working band, simple structure, and low profile, and is easy to implement. |
| US11031694B2 |
Antenna
In an antenna, the outer conductor is formed of a first linear conductor, the first linear conductor having a length corresponding to one wavelength of a right-handed circularly polarized wave and circularly extended from a first feed point to a second feed point. The inner conductor is disposed inside the outer conductor and formed of a second linear conductor, the second linear conductor being different from the first linear conductor and having a length determined based on one wavelength of a left-handed circularly polarized wave. The inner conductor has a starting point of the second linear conductor connected to the first feed point and has an end point of the second linear conductor kept free from connection at a location inside the outer conductor, and causes current to flow in a direction opposite to the current flow in the outer conductor. |
| US11031688B2 |
System and method for operating an antenna adaptation controller module
A wireless adapter front end system and method for an information handling system including a wireless adapter for communicating on a plurality antenna systems for connection to a plurality of wireless links and an antenna configurable to have a plurality of antenna radiation patterns via an antenna pattern steering control interface, wherein the antenna is operating in a first antenna radiation pattern. An antenna adaptation controller executing code instructions for steering the antenna radiation pattern based upon a plurality of antenna trigger inputs, wherein the antenna trigger inputs include WLAN signal state feedback data and information handling system physical configuration data for configuration of the antenna system relative to a display screen and base housing of the information handling system, the antenna adaptation controller receiving the antenna trigger inputs and selecting a second antenna radiation pattern for comparing a WLAN radio link signal levels of the second antenna radiation pattern to the first antenna radiation pattern, and the antenna adaptation controller setting the second antenna radiation pattern as the highest if the WLAN radio link signal level of the second antenna radiation pattern is greater than the WLAN radio link signal level of the first antenna radiation pattern. |
| US11031687B2 |
Antenna, wireless communication module, and wireless communication device
A resonant structure includes a conducting portion extending along a first plane and including first conductors, a ground conductor located away from the conducting portion and extending along the first plane, and a first predetermined number of connecting conductors extending from the ground conductor towards the conducting portion. At least two first conductors are connected to different connecting conductors. A first connecting pair of two of the connecting conductors is aligned along a first direction in the first plane and a second connecting pair of two of the connecting conductors is aligned along a second direction, in the first plane, intersecting the first direction. The resonant structure resonates at a first frequency along a first current path including the ground conductor, conducting portion, and first connecting pair and at a second frequency along a second current path including the ground conductor, conducting portion, and second connecting pair. |
| US11031678B2 |
Base station antennas having arrays with frequency selective shared radiating elements
Base station antennas include a first array of radiating elements that is coupled to a first RF port through a first feed network, a second array of radiating elements that is coupled to a second RF port through a second feed network, and first and second circuit elements. The first circuit element has a first port coupled to the first feed network, a second port coupled to a first port of the second circuit element and a third port coupled to a first radiating element of the first array of radiating elements. The second circuit element has a second port coupled to a first radiating element of the second array of radiating elements and a third port coupled to the second feed network. |
| US11031677B2 |
Multiple-body-configuration multimedia and smartphone multifunction wireless devices
A multifunction wireless device having at least one of multimedia functionality and smartphone functionality, the multifunction wireless device including an upper body and a lower body, the upper body and the lower body being adapted to move relative to each other in at least one of a clamshell, a slide, and a twist manner. The multifunction wireless device further includes an antenna system disposed within at least one of the upper body and the lower body and having a shape with a level of complexity of an antenna contour defined by complexity factors F21 having a value of at least 1.05 and not greater than 1.80 and F 32 having a value of at least 1.10 and not greater than 1.90. |
| US11031671B2 |
AOG antenna system and mobile terminal
The present disclosure provides an AOG antenna system and a mobile terminal. The AOG antenna system includes a 3D glass back cover and a main board arranged opposite to and spaced apart from the 3D glass back cover. The AOG antenna system includes: a metal antenna attached to a surface of the 3D glass back cover; and a packaged feeding module provided between the 3D glass back cover and the main board and electrically connected to the main board. The packaged feeding module corresponds to a position of the metal antenna and feeds the metal antenna with power by coupling. |
| US11031668B2 |
Transmission medium comprising a non-circular dielectric core adaptable for mating with a second dielectric core splicing device
Aspects of the subject disclosure may include, for example, a transmission medium for propagating electromagnetic waves. The transmission medium can have a first dielectric material for propagating electromagnetic waves guided by the first dielectric material, and a second dielectric material disposed on at least a portion of an outer surface of the first dielectric material for reducing an exposure of the electromagnetic waves to an environment that adversely affects propagation of the electromagnetic waves on the first dielectric material. Other embodiments are disclosed. |
| US11031667B1 |
Method and apparatus having an adjustable structure positioned along a transmission medium for launching or receiving electromagnetic waves having a desired wavemode
Aspects of the subject disclosure may include, a system that facilitates generating one or more tuning signals supplied to a material positioned along a portion of an outer surface of a transmission medium, the material facilitating generation of electromagnetic waves having a desired wave mode, and generating an electromagnetic wave with the desired wave mode, the electromagnetic wave propagating along the transmission medium without relying on an electrical return path to facilitate propagation of the electromagnetic wave along the transmission medium. Other embodiments are disclosed. |
| US11031664B2 |
Waveguide band-pass filter
A bandpass filter has a plurality of resonant cavities. The plurality of resonant cavities are arranged into a sequence of adjacent resonant cavities. Each resonant cavity is configured to define the same fundamental resonant frequency. The filter includes a plurality of coupling irises, with one of the coupling irises positioned between each pair of adjacent resonant cavities. Each resonant cavity includes a plurality of cavity sections. Each resonant cavity includes a capacitive iris positioned coupling the cavity sections to one another. The frequency of secondary resonance modes varies amongst the resonant cavities in the plurality of resonant cavities. |
| US11031661B2 |
Secondary battery and method for manufacturing the same
A secondary battery is disclosed.According to the present invention, when an internal pressure exceeding a certain level occurs, current may be interrupted to stop an operation of the secondary battery, thereby preventing the secondary battery from being ignited or exploded by the increase in internal pressure of the secondary battery and improving safety of the secondary battery. |
| US11031660B2 |
Pouch type battery cell
A pouch type battery cell is provided. The battery cell includes a negative electrode and a positive electrode that overlap each other while spaced apart from each other. The negative electrode includes a pair of negative terminals that protrude from a first side of opposite ends of the negative electrode. Additionally, the positive electrode includes a pair of positive terminals that protrude from a second side of opposite ends of the positive electrode. |
| US11031659B2 |
Battery module
Disclosed is a battery module, which includes a base plate; a plurality of battery cells disposed on the base plate; a plurality of sockets electrically connected to electrode leads of the battery cells; and a plurality of connecting bars configured to be inserted into a part of the plurality of sockets to allow the plurality of battery cells to be connected in a serial pattern or a combined serial and parallel pattern. |
| US11031657B2 |
Separators comprising elongated nanostructures and associated devices and methods, including devices and methods for energy storage and/or use
The use of elongated nanostructures in separators and associated devices and methods, including devices and methods for energy storage and/or use, are generally described. According to certain embodiments, the elongated nanostructures can extend from a first solid substrate to a second solid substrate. In some embodiments, the nanostructures penetrate a surface of the first solid substrate (e.g., a first electrode) and/or a surface of the second solid substrate (e.g., a second electrode). The elongated nanostructures can, according to certain embodiments, provide structural reinforcement between two substrates (e.g., between two electrodes) while maintaining electronic insulation between the two substrates. |
| US11031656B2 |
Composite separator including porous coating layer made from slurry having improved dispersibility
The present disclosure relates to an invention directed to a composite separator having a porous coating layer, where the porous coating layer is prepared from a slurry by adjusting a particle diameter of an inorganic matter that is an ingredient of the slurry, so that a sinking rate of the inorganic particles may remarkably slow down and dispersibility may be dramatically improved, and as a result, the content of the inorganic particles may relatively increase and the inorganic particles may be uniformly distributed in the coating layer on a substrate, thereby preventing a reduction in battery performance. |
| US11031655B2 |
Nonaqueous electrolyte secondary battery separator and method of producing same
A nonaqueous electrolyte secondary battery separator is provided in which thickness unevenness caused by wrinkles is reduced. The nonaqueous electrolyte secondary battery separator includes a polyolefin porous film, and when a test piece cut out from the nonaqueous electrolyte secondary battery separator is immersed in propylene carbonate, the test piece exhibits an elongation percentage difference of not more than 0.20%; the elongation percentage difference being a difference between (i) an elongation percentage in a longitudinal direction of the test piece as observed after 30 minutes of immersion in propylene carbonate and (ii) an elongation percentage in the longitudinal direction of the test piece as observed after 24 hours of immersion in propylene carbonate. |
| US11031654B2 |
High-wettability separator and preparation method thereof
Disclosed in present invention are a high-wettability separator and a preparation method therefor. The separator comprises an ethylene copolymer, a grafting polyolefin, an ultrahigh molecular weight polyethylene having a molecular weight ranging from 1.0×106 to 10.0×106, and a high-density polyethylene having a density ranging from 0.940 g/cm3 to 0.976 g/cm3, the content of the ethylene copolymer is 1-5 parts by weight, and the content of the grafting polyolefin is 0-5 parts by weight, on the basis that the total weight of the ultrahigh molecular weight polyethylene and the high-density polyethylene is 100 parts. The separator has a contact angle with lithium ion battery electrolyte of 20° to 40°. |
| US11031652B2 |
Battery and mobile terminal
A battery and a mobile terminal relate to the field of terminal technologies, where the battery is securely bonded inside a rear housing. The battery includes a battery body and a package case. The battery body is accommodated inside the package case. The package case includes a first surface and a second surface opposite to the first surface. The first surface and the rear housing are attached and secured. The second surface has a tear structure. The package case is configured to torn open by tearing the tear structure to remove the battery body. In this way, when the battery is removed from the rear housing, the tear structure may be torn to remove the battery, thereby preventing deformations, wrinkles, or bulges in an aluminum plastic film on the battery. |
| US11031649B2 |
Housing for a vehicle battery, and method for manufacturing a housing of said type
A housing for a vehicle battery has a cover plate and a bottom plate, and a frame arranged between the cover plate and the bottom plate. The frame is connected to the cover plate and the bottom plate, and at least one crossmember element is arranged in the space which is enclosed by the frame. |
| US11031644B2 |
Metal-air cells with minimal air access
The present technology provides a battery that includes an air cathode, an anode, an aqueous electrolyte that includes an amphoteric surfactant, and a housing that includes one or more air access ports defining a total area of void space (“vent area”), where (1) the battery is a size 13 metal-air battery and the total vent area defined by all of the air access ports is from about 0.050 mm2 to about 0.115 mm2; or (2) the battery is a size 312 metal-air battery and the total vent area defined by all of the air access ports is from about 0.03 mm2 to about 0.08 mm2. |
| US11031641B2 |
Method of recovering metals from spent Li-ion batteries
The present invention relates to an improved process and method of recovering metals of value from used Lithium Ion batteries. More particularly, the invention provides a method for recovering cobalt and lithium along with other metals of value wherein the method includes physical processes for separation, limiting the use of chemical for removing minor impurities. Majority of elements were separated by physical processes instead of chemical processes which gives the benefit of cost saving in chemical treatment of liquid and solid effluents. The invention provides for a cost effective, economic and environmental friendly process for recovering metals of value. |
| US11031639B2 |
Metal battery, and management system and control method thereof
A battery management system includes a detection circuit configured to detect an electrical parameter of a metal battery and a control circuit configured to determine a safety performance of a battery cell of the metal battery according to the electrical parameter. |
| US11031636B2 |
Protective circuit module case of battery and electronic device including the same
An electronic device includes a housing having a mounting portion to which a battery is mountable; and the battery mounted to the mounting portion, wherein the battery includes: a battery pouch comprising at least one conductive terminal exposed to the outside; a circuit board electrically connected to the exposed at least one conductive terminal and having at least one circuit element mounted thereon to electrically protect the battery pouch; a case including a first plate and a lateral plate extended to be bent from the first plate, wherein the circuit board is disposed in a space surrounded by the first plate and the lateral plate, and the first plate protrudes further than the accommodated circuit board in an opposite direction of a lateral wall of the battery pouch. |
| US11031635B2 |
Battery pack
A battery pack, which includes: a battery module having a positive electrode terminal and a negative electrode terminal; a first power connector having a first power terminal connected to the positive electrode terminal, a second power terminal connected to the negative electrode terminal and a first auxiliary terminal, the first power connector being configured to be coupled to or separated from a second power connector that is included in an external device; a control unit to determine whether the first power connector and the second power connector are coupled; a first communication connector to input or output a communication signal between the external device and the control unit; and a communication switching unit installed between the control unit and the first communication connector, the control unit turns on or off the communication switching unit in response to the determination result. |
| US11031634B2 |
Battery with multiple sets of output terminals and adjustable capacity
A battery control system includes a battery comprising: first and second terminals; third and fourth terminals; a plurality of individually housed batteries; and a plurality of switches configured to connect ones of the batteries to and from ones of the first, second, third, and fourth terminals. A mode module is configured to set a mode of operation based on at least one of a plurality of present operating parameters. A switch control module is configured to control the plurality of switches based on the mode of operation. |
| US11031632B2 |
Method for recovering positive electrode active material from lithium secondary battery
The present invention relates to a method for recovering a positive electrode active material from a lithium secondary battery including: 1) separating a positive electrode into a collector and a positive electrode part; 2) removing an organic substance by firing the separated positive electrode part; 3) washing the fired resultant and removing remaining fluorine (F); 4) adding a lithium-containing material into the washed resultant and firing to recover a lithium transition metal oxide. |
| US11031631B2 |
Fabrication of all-solid-state energy storage devices
A semiconductor device structure and method for forming the same is disclosed. The structure incudes a silicon substrate having at least one trench disposed therein. An electrical and ionic insulating layer is disposed over at least a top surface of the substrate. A plurality of energy storage device layers is formed within the one trench. The plurality of layers includes at least a cathode-based active electrode having a thickness of, for example, at least 100 nm and an internal resistance of, for example, less than 50 Ohms/cm2. The method includes forming at least one trench in a silicon substrate. An electrical and ionic insulating layer(s) is formed and disposed over at least a top surface of the silicon substrate. A plurality of energy storage device layers is formed within the trench. Each layer of the plurality of energy storage device layers is independently processed and integrated into the trench. |
| US11031630B2 |
Electrolyte and electrochemical device
The present application provides an electrolyte and an electrochemical device. The electrolyte according to the present application comprises a carboxylate, a barbituric acid compound and a nitrile compound. Adding a barbituric acid compound and a nitrile compound of particular structure to an electrolyte containing a carboxylate solvent can significantly improve the rate performance of an electrochemical device, and mitigate capacity loss after storage at room temperature, and cycle fading and gas generation at high-temperature of the electrochemical device. |
| US11031628B2 |
Electrolyte additive and electrolyte for lithium secondary battery including the same
An electrolyte additive composition of the present invention may improve high-rate charge and discharge characteristics and high-temperature storage and life characteristics of a lithium secondary battery when the electrolyte additive composition is used in an electrolyte while including a novel borate-based lithium compound as well as a non-lithiated additive. |
| US11031626B2 |
Electrolytic solution and electrochemical device containing the same
The present application relates to an electrolytic solution and an electrochemical device containing the electrolytic solution. The electrolytic solution of the present invention comprises a compound having a —CN functional group, and is capable of significantly improving the floating-charge performance, the increased impedance accompanying the long-term cycle test, and the thermal impact performance of an electrochemical device using the electrolytic solution. |
| US11031621B2 |
Secondary battery having positive electrode terminal-and-membrane integrated cap plate
Various examples provide a secondary battery having a positive electrode terminal-and-membrane integrated cap plate, which can cut off a charging current in an overcharge mode by integrating a positive electrode terminal and a membrane into the cap plate, and can cut off a short-circuit current in an external short-circuit mode by placing a fuse in a region of the membrane connected to the current collector plate. In one example embodiment, the secondary battery may include a case having an opening, an electrode assembly housed in the opening of the case housed in the opening of the case, and a cap plate coupled to the opening of the case, wherein the cap plate may include a terminal portion integrated into the cap plate, and a membrane integrated into the terminal portion to be electrically connected to the electrode assembly. |
| US11031618B2 |
Polymer, polymer electrolyte membrane and membrane/electrode assembly
To provide a polymer capable of forming a polymer electrolyte membrane that is resistant to breakage even when being repeatedly subjected to humidification and drying or a catalyst layer that is resistant to formation of cracks; a polymer electrolyte membrane employing said polymer; and a membrane/electrode assembly for a polymer electrolyte fuel cell. A polymer comprising units (u1) having two ion-exchange groups and units (u2) of e.g. a perfluoro(alkyl vinyl ether), wherein the molar ratio (u2)/((u1)+(u2)) is more than 0.30 and at most 0.70. A membrane/electrode assembly 10 comprising an anode 13 having a catalyst layer 11 and a gas diffusion layer 12, a cathode 14 having a catalyst layer 11 and a gas diffusion layer 12, and a polymer electrolyte membrane 15 disposed between the anode 13 and the cathode 14 in a state of being contact with the catalyst layers 11, wherein either one or each of the catalyst layers 11 and the polymer electrolyte membrane 15 contains the aforementioned polymer. |
| US11031615B2 |
Method of operating a fuel cell stack having a temporarily disabled drain valve
A method of operating a fuel cell stack is described. The fuel cell stack includes a cathode, an anode, a sump configured for collecting water from the anode, and a temporarily disabled drain valve that is otherwise configured to transition from a first position to a second position and thereby modulate water drained from the sump. The method includes increasing a first pressure in the anode via a controller. The method also includes, concurrent to increasing, decreasing a second pressure in the cathode via the controller and, concurrent to decreasing, maintaining a relative humidity of less than a threshold relative humidity in the cathode via the controller. |
| US11031612B2 |
Fuel cell system having integrated gas connections for connection to an external test gas supply
The invention relates to a fuel cell system comprising a shut-off element arranged in each case in a supply path and exhaust path of the anode and/or cathode supply, and comprising a gas connection arranged in each case between a shut-off element and a fuel cell stack for connecting to an external test gas supply. The gas connections allow diagnosis and/or maintenance of the fuel cell stack in the installed state. |
| US11031611B2 |
Integrated gas management device for a fuel cell system
An integrated gas management device (GMD) for a fuel cell has a gas-to-gas humidifier for transferring water from a second gas to a first gas; and a heat exchanger attached to a first end of the humidifier core for cooling the first gas. The GMD may optionally have a thermal isolation plate between the heat exchanger and the first end of the humidifier core. The GMD further has a bypass line to allow the first gas to bypass the humidifier. The first gas may be cathode charge air and the second gas may be cathode exhaust. |
| US11031610B2 |
Fuel cell stack
A fuel cell stack includes a stack body formed by stacking a plurality of power generation cells. A first seal line of a first metal separator and a second seal line of a second metal separator protrude in a stacking direction of the stack body in a manner to contact a resin film. An insulator is provided with a first elastic seal member which contacts a second end seal line. The width of the first elastic seal member is larger than the maximum width of the second end seal line. |
| US11031607B2 |
Hybrid thermal battery reserve power source
A method for producing power from a thermal battery having a piezoelectric generator. The method including: initiating the thermal battery when the thermal battery experiences a predetermined acceleration event; generating power from the piezoelectric generator when the thermal battery experiences the predetermined acceleration event for at least an initial period after the predetermined acceleration event; and generating power from the thermal battery after the initial period. |
| US11031606B2 |
Reversible bifunctional air electrode catalyst for rechargeable metal air battery and regenerative fuel cell
An electrochemical cell includes an air electrode in flow communication with a storage tank containing an aqueous solution of hydrogen peroxide, a lithium electrode, a catalyst layer in contact with the air electrode or a gas diffusion layer associated with the air electrode, and a separator layer in contact with the lithium electrode and catalyst layer. The catalyst layer includes a catalyst for two electron reversible oxygen reduction. The catalyst comprises gold, and a cobalt coordination complex or polymer thereof. The cobalt coordination complex comprises a cobalt ion chelated by a tetradentate organic chelating ligand. |
| US11031604B2 |
Catalyst and electrode catalyst layer, membrane electrode assembly, and fuel cell using the catalyst
Provided is a catalyst having excellent gas transportability. Disclosed is a catalyst comprising a catalyst support and a catalyst metal supported on the catalyst support, wherein the catalyst includes pores having a radius of less than 1 nm and pores having a radius of 1 nm or more, wherein a pore volume of the pores having a radius of less than 1 nm is 0.3 cc/g support or more or a mode radius of a pore distribution of the pores having a radius of less than 1 nm is 0.3 nm or more and less than 1 nm, and wherein the catalyst metal is supported inside the pores having a radius of 1 nm or more. |
| US11031603B2 |
Battery and battery manufacturing method
A battery includes a first current collector, a first electrode layer, and a first counter electrode layer. The first counter electrode layer is a counter electrode of the first electrode layer. The first current collector includes a first electroconductive portion, a second electroconductive portion, and a first insulating portion. The first electrode layer is disposed in contact with the first electroconductive portion. The first counter electrode layer is disposed in contact with the second electroconductive portion. The first insulating portion links the first electroconductive portion and the second electroconductive portion. The first current collector is folded at the first insulating portion, whereby the first electrode layer and the first counter electrode layer are positioned facing each other. |
| US11031600B2 |
Lithium ion secondary battery including aluminum silicate
A lithium ion secondary battery includes: a cathode; an anode: a separator; and an electrolytic solution containing lithium hexafluorophosphate (LiPF6) as a lithium salt, wherein the cathode includes a current collector and a cathode mixture formed on the current collector, and wherein the cathode mixture contains an aluminum oxide, a part or an entirety of a surface of the aluminum oxide being coated with carbon. |
| US11031597B2 |
Negative electrode material for lithium ion secondary battery, negative electrode for lithium ion secondary battery, and lithium ion secondary battery
A negative electrode material for a lithium-ion secondary battery contains graphitic particles of which a standard deviation of circularity at a cumulative frequency ranging from 10% by particle to 90% by particle from the lower circularity, determined by a flow-type particle analyzer, is from 0.05 to 0.1. |
| US11031593B2 |
Method of producing cobalt-coated precursor, cobalt-coated precursor produced thereby, and positive electrode active material prepared using same
The present invention relates to a method of producing a cobalt-coated precursor, the cobalt-coated precursor produced by the method and a positive electrode active material for a lithium secondary battery, the positive electrode active material which is prepared using the cobalt-coated precursor and, more particularly, to a method of preparing a new positive electrode active material having improved high capacity and stability by coating cobalt on the surface of a precursor in the precursor step, thereby improving characteristics of the precursor degraded when washed with water, and a positive electrode active material prepared by the method. |
| US11031589B2 |
Chemical-free production of protected anode active material particles for lithium batteries
Provided is an anode particulate for a lithium battery, the particulate comprising a core and a thin encapsulating layer that encapsulates or embraces the core, wherein the core comprises a single or a plurality of primary particles of an anode active material, having a volume Va, dispersed or embedded in a porous carbon matrix (a carbon foam), wherein the porous carbon matrix contains pores having a pore volume Vp, and the thin encapsulating layer comprises graphene sheets and has a thickness from 1 nm to 10 μm, an electric conductivity from 10−6 S/cm to 20,000 S/cm and a lithium ion conductivity from 10−8 S/cm to 5×10−2 S/cm and wherein the volume ratio Vp/Va is from 0.5/1.0 to 5.0/1.0. The carbon foam is preferably reinforced with a high-strength material. |
| US11031588B2 |
Silicon-based composite anode active material for secondary battery, anode comprising same
Provided are a silicon-based composite anode active material for a secondary battery and an anode including the same. The anode active material for a secondary battery may be a silicon-based composite anode active material, which may include a graphite and a silicon component including two or more selected from the group consisting of Si, Si-M, SiOx, and SiC. The Si-M may be a silicon alloy, and the M may include at least one selected from the group consisting of a transition metal, an alkaline earth metal, a group 13 element, a group 14 element, and a rare earth element. |
| US11031587B2 |
Negative electrode material for lithium-ion batteries including non-flaky artificial graphite including silicon-containing particles, artificial graphite particles and carbonaceous material
A negative electrode material for a lithium ion battery, including silicon-containing particles, artificial graphite particles and a carbonaceous material, wherein at least part of the silicon-containing particles, the artificial graphite particles and the carbonaceous material form composite particles; wherein the silicon-containing particles are silicon particles having a SiOx (0 |
| US11031586B2 |
Methods for manufacturing sulfur electrodes
Methods for manufacturing sulfur electrodes include providing an electrode, wherein the electrode includes a current collector having a first surface, and a sulfur-based host material applied to the first surface of the current collector, wherein the sulfur-based host material comprises one or more sulfur compounds, one or more electrically conductive carbon materials, and one or more binders. The methods further include forming a plurality of channels within the sulfur-based host material using a laser or electron beam, wherein the plurality of channels define a plurality of host material columns, each column having one or more exterior surfaces contiguous which one or more of the channels which extend outward from the first surface of the current collector. Each of the one or more exterior surfaces can define a heat affected zone comprising a higher concentration of sulfur than the host material column prior to forming the plurality of channels. |
| US11031583B2 |
Coating and lithiation of inorganic oxidants by reaction with lithiated reductants
A method for producing conductive carbon coated particles of an at least partially lithiated electroactive core material comprises the step of premixing an oxidant electroactive material with a metallated reductant followed by chemically reacting the oxidant electroactive material with the metallated reductant, said reductant being a coating precursor, said metal being at least one alkaline and/or at least one alkaline earth metal, and said chemically reacting being performed under conditions allowing reduction and metallation of the electroactive material via insertion/intercalation of the alkaline metal cation(s) and/or the alkaline earth metal cation(s) and coating formation via a polymerisation reaction like polyanionic or radicalic polymerisation of the reductant. |
| US11031582B2 |
Electrode manufacture by switching contact region of roll surface upon abnormality detection
An apparatus for manufacturing an electrode performs press-working of a strip electrode being conveyed. This manufacturing apparatus includes a press roll including a roll surface having a width that is twice or more a width of the strip electrode, a switch configured to switch a contact region of the roll surface contacting with the strip electrode during press-working, and a controller. When an abnormality of the roll surface is detected in a state where the contact region of the roll surface is a region located on the left side with respect to a center line of the roll surface, the controller controls the switch such that the contact region of the roll surface is switched to a region located on the right side with respect to the center line of the roll surface. |
| US11031580B2 |
Secondary battery with embossed safety vent
Various embodiments of the present invention relate to a secondary battery. The technical problem to be solved is to provide a secondary battery having an embossed safety vent, which is not damaged by an external force generated during a manufacturing process, can clearly define a rupture area or shape, and makes process management for rupture area or shape easy. To this end, various embodiments of the present invention disclose a secondary battery comprising: a case, a cap plate which is installed in the case and has a vent hole; and a safety vent which is coupled to the vent hole of the cap plate and ruptures when the internal pressure of the case is greater than a reference pressure, wherein the safety vent comprises an embossed portion; and a notch portion formed in the embossed portion. |
| US11031577B1 |
Multimodal microcavity OLED with multiple blue emitting layers
A multimodal light-emitting OLED microcavity device, comprising: an opaque substrate; a layer with a reflective surface over the substrate; a first electrode over the reflective surface; organic layers for light-emission including a second blue light-emitting layer closer to the reflective surface and a first blue light-emitting layer further from the reflective layer than the second blue light-emitting layer, where the distance between the midpoints of the second and first blue-light emitting layers is L1, and at least one non-blue light-emitting layer; a semi-transparent second electrode with an innermost surface through which light is emitted; wherein the distance L0 between the reflective surface and the innermost surface of the semi-transparent second electrode is constant over the entire light-emitting area; and the ratio L1/L0 is in the range of 0.30-0.40. The multimodal microcavity OLED has increased blue emission and is particularly useful for use as the light source in a microdisplay. |
| US11031574B2 |
Bendable electronic device modules, articles and methods of making the same
A foldable electronic device module includes a glass cover element having a thickness from about 25 μm to about 200 μm, an elastic modulus from about 20 GPa to about 140 GPa and a puncture resistance of at least 1.5 kgf. The module further includes a stack with a thickness between about 100 μm and about 600 μm; and a first adhesive joining the stack to the cover element with a shear modulus between about 1 MPa and about 1 GPa. The stack further includes a panel, an electronic device, and a stack element affixed to the panel with a stack adhesive. Further, the device module is characterized by a tangential stress at a primary surface of the cover element of no greater than about 1000 MPa in tension upon bending the module to a radius from about 20 mm to about 2 mm. |
| US11031571B2 |
Display device and method for preparing the same
The present disclosure provides a display device and a method for preparing the same. The display device includes a first base; a transparent electrode arranged on the first base; a display substrate arranged on a side of the first base proximate to the transparent electrode and opposite to the first base, the display substrate comprising a cathode located on a side of the display substrate proximate to the first base; and a supporting body located between the transparent electrode and the cathode and configured to electrically conduct the transparent electrode and the cathode. |
| US11031568B2 |
Photoelectric conversion element including first electrode, second electrodes, photoelectric conversion film, and conductive layer and method for manufacturing the same
A method for manufacturing a photoelectric conversion element includes providing a base structure including a semiconductor substrate having a principal surface, a first electrode located on or above the principal surface, second electrodes which are located on or above the principal surface and which are one- or two-dimensionally arranged, and a photoelectric conversion film covering at least the second electrodes; forming a mask layer on the photoelectric conversion film, the mask layer being conductive and including a covering section covering a portion of the photoelectric conversion film that overlaps the second electrodes in plan view; and partially removing the photoelectric conversion film by immersing the base structure and the mask layer in an etchant. |
| US11031564B2 |
Display device
In a display device including a flexible display panel, the risk of disconnection of a wiring due to bending is reduced. A display panel includes a display function layer including display elements and a wiring on one major surface of a base material having flexibility. The display panel includes, on the one major surface of the base material, an organic-film-covered wiring area where the surface of the wiring is covered with an organic planarization film that is an organic insulating film in direct contact with the wiring. The display panel includes, in the plane thereof, a display area where the display elements are arranged and a component mounting area that is a peripheral area located outside the display area. As the organic-film-covered wiring area, a curved area is provided in the peripheral area. |
| US11031562B2 |
Metal complexes
The present invention relates to metal complexes and to electronic devices, especially organic electroluminescent devices, comprising these metal complexes. |
| US11031561B2 |
Organic electron transport material and organic electroluminescent element using same
An organic electron transport material, which includes a phosphine oxide derivative represented by the following Formula (1): R1 represents an atomic group which has either or both of one or more aryl groups and one or more heteroaryl groups and which may have one or more phosphine oxide group, and R2 to R9 each independently represent an atom or an atomic group selected from the group consisting of a hydrogen atom, a halogen atom, a cyano group, a C1-C12 linear or branched alkyl group, a linear or branched fluoroalkyl group, an aryl group, a substituted aryl group, a heteroaryl group, and a substituted heteroaryl group. |
| US11031558B2 |
P-type semiconductor film containing heterofullerene, and electronic device
A p-type semiconductor film including heterofullerene having a further sufficiently high hole mobility is provided. The p-type semiconductor film contains heterofullerene in which n+r number (where n and r are both positive odd numbers) of carbon atoms constituting a fullerene are substituted by n number of boron atom or atoms and r number of nitrogen atom or atoms. |
| US11031550B2 |
Phase-change memory cell having a compact structure
A memory cell includes a selection transistor having a control gate and a first conduction terminal connected to a variable-resistance element. The memory cell is formed in a wafer comprising a semiconductor substrate covered with a first insulating layer, the insulating layer being covered with an active layer made of a semiconductor. The gate is formed on the active layer and has a lateral flank covered with a second insulating layer. The variable-resistance element includes a first layer covering a lateral flank of the active layer in a trench formed through the active layer along the lateral flank of the gate and reaching the first insulating layer, and a second layer made of a variable-resistance material. |
| US11031547B2 |
Reduction of capping layer resistance area product for magnetic device applications
A ferromagnetic layer is capped with a metallic oxide (or nitride) layer that provides a perpendicular-to-plane magnetic anisotropy to the layer. The surface of the ferromagnetic layer is treated with a plasma to prevent diffusion of oxygen (or nitrogen) into the layer interior. An exemplary metallic oxide layer is formed as a layer of metallic Mg that is plasma treated to reduce its grain size and enhance the diffusivity of oxygen into its interior. Then the plasma treated Mg layer is naturally oxidized and, optionally, is again plasma treated to reduce its thickness and remove the oxygen rich upper surface. |
| US11031546B2 |
Method of integration of a magnetoresistive structure
A method of manufacturing one or more interconnects to magnetoresistive structure comprising (i) depositing a first conductive material in a via; (2) etching the first conductive material wherein, after etching the first conductive material a portion of the first conductive material remains in the via, (3) partially filling the via by depositing a second conductive material in the via and directly on the first conductive material in the via; (4) depositing a first electrode material in the via and directly on the second conductive material in the via; (5) polishing a first surface of the first electrode material wherein, after polishing, the first electrode material is (i) on the second conductive material in the via and (ii) over the portion of the first conductive material remaining in the via; and (6) forming a magnetoresistive structure over the first electrode material. |
| US11031541B2 |
Spin-orbit torque type magnetization rotating element, spin-orbit torque type magnetoresistance effect element, and magnetic memory
A spin-orbit torque wiring extending in a first direction and a first ferromagnetic layer laminated on one surface of the spin-orbit torque wiring. In addition, the spin-orbit torque wiring includes a first wiring and a second wiring from the first ferromagnetic layer side. The first wiring and the second wiring are both made of a metal and a temperature dependency of the resistivity of the first wiring in a temperature range of at least −40° C. to 100° C. is higher than that of the second wiring. |
| US11031539B2 |
Piezoelectric vibrator and sensor
To provide a vibrator made of a piezoelectric crystal having a larger electromechanical coupling coefficient and a more satisfactory frequency-temperature characteristic than those of quartz, a vibrating piece (101) is made of a Ca3Ta(Ga1-xAlx)3Si2O14 single crystal (0 |
| US11031536B2 |
Vehicle battery thermoelectric device with integrated cold plate assembly and method of assembling same
A cooling system for thermally conditioning a component which includes a battery and a heat spreader supporting the battery. Multiple thermoelectric devices are bonded to the heat spreader, for example, using solder or braze, which provides improved heat transfer. A cold plate assembly operatively thermally engages the thermoelectric devices. |
| US11031534B2 |
Radiation-emitting semiconductor chip
A radiation emitting semiconductor chip is disclosed. In an embodiment, a radiation-emitting semiconductor chip includes a carrier including a first main surface and a second main surface opposite to the first main surface, an n-doped layer and a p-doped layer forming a pn-junction and a vertical region starting from the first main surface and running parallel to side faces of the carrier, wherein the vertical region is n-doped, p-doped or electrically insulating, and wherein the vertical region extends within a boundary region of the carrier and completely encloses a central volume region of the carrier, an epitaxial semiconductor layer sequence having an active zone configured to generate electromagnetic radiation during operation, the epitaxial semiconductor layer sequence being located at the first main surface of the carrier and two electrical contacts disposed on a front side of the semiconductor chip. |
| US11031532B2 |
Light emitting device
A light emitting device includes at least one LED package, and at least one light transmissive sealing member. Each of the at least one LED package includes a light emitting element, a wavelength converter, and a reflection member. The light emitting element is mounted on a mounting surface of a base and electrically connected to a conductor wiring. The wavelength converter is provided on an upper surface of the light emitting element. The reflection member covers a side surface and a lower surface of the light emitting element. Each of the at least one light transmissive sealing member includes a light diffusion material and covers each of the at least one LED package. Each of the at least one light transmissive sealing member has a projection shape with a substantially circular bottom surface facing the base and with a height in the light axis direction of the light emitting element. |
| US11031531B2 |
Optoelectronic component and method of producing an optoelectronic component
An optoelectronic component includes a housing including a first cavity bounded by a first wall, wherein a circumferentially extending first step is formed at an inner side of the first wall, the first step circumferentially extends around the first cavity obliquely with respect to a bottom of the first cavity, a first optoelectronic semiconductor chip is arranged at the bottom of the first cavity, the first optoelectronic semiconductor chip is embedded into a first potting material arranged in the first cavity and extending from the bottom of the first cavity as far as the first step, and a first potting surface of the first potting material is formed at the first step. |
| US11031529B2 |
Wavelength converting material for a light emitting device
Embodiments of the invention include a luminescent ceramic including (Ba1-xSrx)2-zSi5-yO4yN8-4y:Euz 258 phase wavelength converting material (0.5≤x≤0.9; 0≤y≤1; 0.001≤z≤0.02) and M3Si3O3N4 3334 phase material (M=Ba, Sr, Eu). The M3Si3O3N4 3334 phase material comprises no more than 5 weight % of the material. |
| US11031527B2 |
Reflective layers for light-emitting diodes
A light-emitting diode (LED) chip with reflective layers having high reflectivity. The LED chip may include an active LED structure including an active layer between an n-type layer and a p-type layer. A first reflective layer is adjacent the active LED structure and comprises a plurality of dielectric layers with varying optical thicknesses. The plurality of dielectric layers may include a plurality of first dielectric layers and a plurality of second dielectric layers of varying thicknesses and compositions. The LED chip may further include a second reflective layer that includes an electrically conductive path through the first reflective layer. |
| US11031522B2 |
Optical semiconductor element comprising n-type algan graded layer
An optical semiconductor element comprises: an AlN substrate; an n-type semiconductor layer composed of an AlGaN layer, the AlGaN layer being grown on the AlN substrate and being pseudomorphic with the AlN substrate, an Al composition or the AlGaN layer being reduced with an increase in distance from the AlN substrate; an active layer which is grown on the n-type semiconductor layer; and a p-type semiconductor layer which is grown on the active layer. |
| US11031521B2 |
Flexible transparent thin film
The present invention provides a transparent conductive thin film which is flexible for suiting substantially all kinds of electronic and optoelectronic devices or display panel. The present conductive thin film includes at least one transparent substrate formed by thermally curable or photo-curable polyermic resin layer, and a conductive network pattern having a high aspect ratio such that at least one surface of the conductive network being exposed out of the deformable layer or the transparent substrate for contacting with an external structure while a large proportion thereof stays firmly integrated into the substrate. The present invention also relates to methods of fabricating a transparent conductive thin film including the structural features of the transparent conductive thin film of the present invention. Various optimizations of the present methods are also provided in the present invention for facilitating large area thin film fabrication and large scale production. |
| US11031518B2 |
Photovoltaic module comprising a concentration optic with subwavelength patterns and solar generator for satellite comprising said module
A photovoltaic module comprises at least one photovoltaic cell and one concentration optic device, to be illuminated by a light flux emitting at at least one illumination wavelength belonging to a band of wavelengths defined by a minimum wavelength and a maximum wavelength, the band of wavelengths being that of the solar radiation of the order of [380 nm-1600 nm]. The concentration optic device is a monolithic component and comprises at least one diffractive structure comprising subwavelength patterns, defined in a structured material; the patterns having at least one dimension less than or equal to the average illumination wavelength divided by the refractive index of the structured material; the patterns being separated from one another by subwavelength distances, defined between centres of adjacent patterns; the concentration optic device ensuring at least one focusing function and one diffraction function. A solar panel comprising the photovoltaic module is also provided. |
| US11031517B2 |
Method of manufacturing light transmission type compound thin film, compound thin film manufactured therefrom, and solar cell including the same
According to an aspect of the present invention, there is provided a method of manufacturing a compound thin film, which includes configuring an electrodeposition circuit by connecting an electrolytic solution, which is manufactured by mixing a predetermined precursor with a solvent, and an electrochemical cell, which includes a working electrode in a form of an electrode at which a specific pattern is patterned on a predetermined substrate, to a voltage application device or a current application device, and applying a reduction voltage or current to the working electrode using the voltage application device or the current application device, and selectively electrodepositing a thin film in some region of the electrode along a shape of the electrode at which the specific pattern is patterned. |
| US11031516B2 |
Photoelectric conversion element, photoelectric conversion module, and solar photovoltaic power generation system
There is provided a photoelectric conversion element which can prevent the contact resistance between a non-crystalline semiconductor layer containing impurities and an electrode formed on the non-crystalline semiconductor layer from increasing, and can improve the element characteristics. A photoelectric conversion element (10) includes a semiconductor substrate (12), a first semiconductor layer (20n), a second semiconductor layer (20p), a first electrode (22n), and a second electrode (22p). The first semiconductor layer has a first conductive type. The second semiconductor layer has a second conductive type. The first electrode is formed on the first semiconductor layer. The second electrode is formed on the second semiconductor layer. The first electrode includes a first transparent conductive layer (26n) formed on the first semiconductor layer, and a first metal layer (28n) formed on the first transparent conductive layer. The first metal layer includes a plurality of metal crystal grains in which the average crystal grain size in the in-surface direction of the first metal layer is greater than the thickness of the first metal layer. |
| US11031515B2 |
Separation region between diffusion regions in a continuous layer of a solar cell
A solar cell is disclosed. The solar cell has a front side facing the sun during normal operation, and a back side facing away from the sun. The solar cell comprises a silicon substrate, a first polysilicon layer with a region of doped polysilicon on the back side of the substrate. The solar cell also comprises a second polysilicon layer with a second region of doped polysilicon on the back side of the silicon substrate. The second polysilicon layer at least partially covers the region of doped polysilicon. The solar cell also comprises a resistive region disposed in the first polysilicon layer. The resistive region extends from an edge of the second region of doped polysilicon. The resistive region can be formed by ion implantation of oxygen into the first polysilicon layer. |
| US11031512B2 |
Solar cell, multijunction solar cell, solar cell module, and solar power generation system
A solar cell of an embodiment includes: a substrate having a light transmitting property; a first electrode including a plurality of metal portions and having a light transmitting property; a light absorbing layer disposed on the first electrode and absorbing light; and a second electrode disposed on the light absorbing layer and having a light transmitting property. |
| US11031511B2 |
Control circuit and method of operating a control circuit
Various embodiments provide a control circuit that includes at least one active module designed to enable an avalanche diode. The control circuit also includes at least one passive module designed to disable the avalanche diode. |
| US11031510B2 |
Impact ionization semiconductor device and manufacturing method thereof
A semiconductor device including a field effect transistor (FET) device includes a substrate and a channel structure formed of a two-dimensional (2D) material over the substrate. Source and drain contacts are formed partially over the 2D material. A first dielectric layer is formed at least partially over the channel structure and at least partially over the source and drain contacts. The first dielectric layer is configured to trap charge carriers. A second dielectric layer is formed over the first dielectric layer, and a gate electrode is formed over the second dielectric layer. |
| US11031507B2 |
Semiconductor device and method of manufacture
Disclosed is a semiconductor device and a method of manufacturing the said semiconductor device. The semiconductor device comprises a plurality of layers. The method of fabricating the semiconductor device comprises obtaining a substrate layer, arranging a first corresponding crystalline terminating oxide layer on the substrate layer, arranging at least one semiconductor layer on the first crystalline terminating oxide layer, arranging a second corresponding crystalline terminating oxide layer on the at least one semiconductor layer, and arranging an electrical insulating layer on the second crystalline terminating oxide layer. |
| US11031506B2 |
Semiconductor device including transistor using oxide semiconductor
A highly reliable semiconductor device is provided. The semiconductor device includes a first oxide; a second oxide, a first layer, and a second layer over the first oxide; an insulator over the second oxide; a first conductor over the insulator; a second conductor over the first layer; and a third conductor over the second layer. Each of the first and second layers includes a region with a thickness ranging from 0.5 nm to 3 nm. Each of the second and third conductors contains a conductive material having the physical property of extracting hydrogen. |
| US11031499B2 |
Germanium transistor structure with underlap tip to reduce gate induced barrier lowering/short channel effect while minimizing impact on drive current
An apparatus including a transistor device including a channel disposed on a substrate between a source and a drain, a gate electrode disposed on the channel, wherein the channel includes a length dimension between source and drain that is greater than a length dimension of the gate electrode such that there is a passivated underlap between an edge of the gate electrode and an edge of the channel relative to each of the source and the drain. A method including forming a channel of a transistor device on a substrate; forming first and second passivation layers on a surface of substrate on opposite sides of the channel; forming a gate stack on the channel between first and second passivation layers; and forming a source on the substrate between the channel and the first passivation layer and a drain on the substrate between the channel and the second passivation layer. |
| US11031497B2 |
Semiconductor device and method for manufacturing the same
A semiconductor device can include: a substrate having a first doping type; a first well region located in the substrate and having a second doping type, where the first well region is located at opposite sides of a first region of the substrate; a source region and a drain region located in the first region, where the source region has the second doping type, and the drain region has the second doping type; and a buried layer having the second doping type located in the substrate and below the first region, where the buried layer is incontact with the first well region, where the first region is surrounded by the buried layer and the first well region, and the first doping type is opposite to the second doping type. |
| US11031495B2 |
Apparatus and method for power MOS transistor
A method includes forming a first semiconductor layer over a substrate, forming a second semiconductor layer over the first semiconductor layer, forming a first trench and a second trench through in the first semiconductor layer and the second semiconductor layer, wherein a width of the second trench is different from a width of the first trench, forming a dielectric region in the first trench and forming a first gate region in the first trench and over the dielectric region, and a second gate region in the second trench. |
| US11031494B2 |
Silicon carbide semiconductor device having a gate electrode formed in a trench structure
A semiconductor device includes a trench structure extending from a first surface into a semiconductor body composed of silicon carbide. The trench structure includes an electrode and between the electrode and the first surface a gate electrode. A shielding region adjoining the electrode forms a first pn junction with a drift structure formed in the semiconductor body. A Schottky contact is formed between the drift structure and a first contact structure. |
| US11031493B2 |
Doping and trap profile engineering in GaN buffer to maximize AlGaN/GaN HEMT EPI stack breakdown voltage
The present invention proposes a set of impurity doping configurations for GaN buffer in an AlGaN/GaN HEMT device to improve breakdown characteristics of the device. The breakdown characteristics depend on a unique mix of donor and acceptor traps and using carbon as a dopant increases both donor and acceptor trap concentrations, resulting in a trade-off in breakdown voltage improvement and device performance. A modified silicon and carbon co-doping is proposed, which enables independent control over donor and acceptor trap concentrations in the buffer, thus potentially improving breakdown characteristics of the device without adversely affecting the device performance. |
| US11031491B2 |
Semiconductor device
A normally-off first gate channel region is provided on a first main surface side, in a region in a p base between an n base and an n emitter connected to an emitter electrode. On and off of the first gate channel region is controlled by a voltage of a first gate electrode. A normally-on second gate channel region is provided on a second main surface side, by an n-type region between an n collector electrically connected to a collector electrode and the n base. On and off of the second gate channel region is controlled by a voltage of a second gate electrode. |
| US11031484B2 |
Silicided gate structures
The present disclosure relates to semiconductor structures and, more particularly, to differential silicide structures and methods of manufacture. The structure includes: a substrate; a gate structure comprising a silicided gate region; and source and drain regions adjacent to the gate structure and comprising S/D silicided regions having a differential thickness compared to the silicided gate region. |
| US11031481B2 |
Semiconductor device and method of manufacturing the same
In a method for manufacturing a semiconductor device, a gate structure is formed over a channel layer and an isolation insulating layer. A first sidewall spacer layer is formed on a side surface of the gate structure. A sacrificial layer is formed so that an upper portion of the gate structure with the first sidewall spacer layer is exposed from the sacrificial layer and a bottom portion of the gate structure with the first sidewall spacer layer is embedded in the first sacrificial layer. A space is formed between the bottom portion of the gate structure and the sacrificial layer by removing at least part of the first sidewall spacer layer. After the first sidewall spacer layer is removed, an air gap is formed between the bottom portion of the gate structure and the sacrificial layer by forming a second sidewall spacer layer over the gate structure. |
| US11031479B2 |
Semiconductor device with different gate trenches
A transistor device includes a first trench and a second trench arranged in a comb-like structure, first sections of the first and second trenches corresponding to teeth of the comb-like structure and second sections of the first and second trenches corresponding to opposing shafts of the comb-like structure. The arrangement of the first trench and the second trench forms a pattern of interdigitated fingers. Transistor cells of the transistor device are disposed between single fingers of the first and second trenches. A semiconductor mesa separates the first trench and the second trench from each other. A gate electrode in the first trench or a gate electrode in the second trench is electrically connected to a source potential instead of a gate potential to decrease a gate charge of the transistor device. |
| US11031476B2 |
Semiconductor device and method for fabricating the same
A semiconductor device includes a semiconductor substrate, a silicon oxide layer, a titanium nitride layer, a metal layer, and a first silicon nitride layer. At least one trench is recessed inward from a surface of the semiconductor substrate. The silicon oxide layer is formed on an inner wall of the at least one trench. The titanium nitride layer is formed on a portion of the silicon oxide layer away from the surface of the semiconductor substrate. The metal layer is filled in a portion of each of the at least one trench. The metal layer is selectively deposited on the titanium nitride layer and comprises a material selected from ruthenium and cobalt. The first silicon nitride layer is filled in a remaining portion of each of the at least one trench to contact the metal layer, and is surrounded by the silicon oxide layer. |
| US11031475B2 |
Self-standing GaN substrate, GaN crystal, method for producing GaN single crystal, and method for producing semiconductor device
An object is to provide a nonpolar or semipolar GaN substrate having improved size and crystal quality. A self-standing GaN substrate has an angle between the normal of the principal surface and an m-axis of 0 degrees or more and 20 degrees or less, wherein: the size of the projected image in a c-axis direction when the principal surface is vertically projected on an M-plane is 10 mm or more; and when an a-axis length is measured on an intersection line between the principal surface and an A-plane, a low distortion section with a section length of 6 mm or more and with an a-axis length variation within the section of 10.0×10 −5 Å or less is observed. |
| US11031473B2 |
Silicon carbide superjunction power semiconductor device and method for manufacturing the same
A power semiconductor device includes a semiconductor wafer having a first main side surface and a second main side surface. The semiconductor wafer includes a first semiconductor layer having a first conductivity type and a plurality of columnar or plate-shaped first semiconductor regions extending in the first semiconductor layer between the first main side surface and the second main side surface in a vertical direction perpendicular to the first main side surface and the second main side surface. The first semiconductor regions have a second conductivity type, which is different from the first conductivity type. Therein, the first semiconductor is a layer of hexagonal silicon carbide. The first semiconductor regions are regions of 3C polytype silicon carbide. |
| US11031464B2 |
Semiconductor device and method of manufacturing semiconductor device
A silicon carbide semiconductor device includes a first semiconductor layer of a first conductivity type on a semiconductor substrate of the first conductivity type; a second semiconductor layer of a second conductivity type; a first semiconductor region of the first conductivity type; trenches penetrating the second semiconductor layer and the first semiconductor region, and reaching the first semiconductor layer; gate electrodes on gate insulating films in the trenches; a first base region between the trenches; and second base regions at bottoms of the trenches. The first base region includes a lower region equal in thickness to the second base regions and an upper region on the lower region. The first base region has impurity concentration peaks of local maximum values in a thickness direction. A peak nearest an interface between the upper and lower regions is located at a position furthest from any other peak. |
| US11031463B2 |
Silicon carbide semiconductor device
A SiC semiconductor device includes a first load electrode, a normally-on junction field effect transistor, and an insulated gate field effect transistor. The normally-on junction field effect transistor includes a channel region electrically connected to the first load electrode. The insulated gate field effect transistor and the normally-on junction field effect transistor are electrically connected in series. The insulated gate field effect transistor includes a source region and a body region. The source region is electrically connected to a channel region of the normally-on junction field effect transistor. The body is electrically connected to the first load electrode. |
| US11031459B2 |
Semiconductor device including a capacitor and method of manufacturing semiconductor device
A semiconductor device according to an embodiment includes a semiconductor substrate, a wiring layer on or above the semiconductor substrate, the wiring layer having a first metal layer and a second metal layer in contact with the first metal layer, a capacitor lower electrode on or above the semiconductor substrate, the capacitor lower electrode being the same material as the second metal layer, a capacitor insulating film on the capacitor lower electrode, and a capacitor upper electrode on the capacitor insulating film. A distance from the semiconductor substrate to an upper face of the capacitor lower electrode is equal to or less than a distance from the semiconductor substrate to an upper face of the wiring layer, and a distance from the semiconductor substrate to a lower face of the capacitor lower electrode is greater than a distance from the semiconductor substrate to a lower face of the wiring layer. |
| US11031457B2 |
Low resistance high capacitance density MIM capacitor
Embodiments are directed to a method and resulting structures for forming low resistance, high capacitance density MIM capacitors. In a non-limiting embodiment, one or more bottom plate contacts are formed over a substrate. A bottom capacitor plate is formed directly on a top surface and a sidewall of each of the one or more bottom plate contacts. A capacitor dielectric layer is formed directly on a surface of the bottom capacitor plate. A top capacitor plate is formed directly on a surface of the capacitor dielectric layer. A first portion of the top capacitor plate extends past a sidewall of the bottom capacitor plate in a direction parallel to the substrate. A top plate contact is formed directly on the first portion of the top capacitor plate. |
| US11031454B2 |
Electronic component, electric device including the same
Provided is an electronic device including a display panel including a base substrate, pixels, a first insulation layer, and panel pads spaced along a first direction from pixels and each arranged along a second direction crossing the first direction, a circuit board disposed on the display panel and connected to panel pads, and an adhesive interconnect layer disposed between the display panel and the circuit board and electrically connecting the display panel and the circuit board. The circuit board includes a flexible substrate including a top surface facing the base substrate, output pads disposed on the flexible substrate and connected to panel pads, each obliquely extending in the first and second directions and arranged along the second direction, an alignment pad spaced along the second direction from output pads, and a stress relaxation pad disposed between output pads and alignment pads and electrically connected from panel pads. |
| US11031453B2 |
Flexible display apparatus and method of manufacturing the same
A flexible display apparatus includes a panel that includes a display area that displays images and a fan-out portion in which a plurality of wirings connected to the display area are located, and a driving chip connected to the fan-out portion and connected to the display area via the plurality of wirings. The plurality of wirings arranged in the fan-out portion may include first wirings at a first layer on the panel and second wirings at a second layer that is different from the first layer. The first wirings and the second wirings may be in an overlapping relationship above and below each other. |
| US11031452B2 |
Display panel
A display panel includes a first substrate having a display area and a peripheral area. The display area includes pixels with first output wires connected to the pixels. A first driver is connected to the first output wires and positioned in the peripheral area at a first side of the display area. The first substrate includes a notch portion having a curved edge and the display area has a first display portion and a second display portion with the notch portion therebetween. At least one of the first output wires is a first main line at the first display portion, a second main line at the second display portion, and a first connecting line that is connected to the first main line and the second main line and is at the peripheral area between the first display portion and the second display portion. |
| US11031442B2 |
Organic light emitting display device
The present disclosure includes: a display panel separated into a light emitting unit, in which an organic light emitting diode is disposed, and a light transmitting unit which selectively transmits light; and a driving circuit configured to drive the display panel. The display panel includes a first substrate, a second substrate, and a liquid crystal layer. In the first substrate, the organic light emitting diode is disposed in the light emitting unit, and a first electrode is disposed in the light transmitting unit. The second substrate faces the first substrate, and a second electrode is disposed in the light transmitting unit. The liquid crystal layer is interposed between the first electrode and the second electrode, and adjusts a transmittance due to a difference between a voltage applied to the first electrode and a voltage applied to the second electrode. |
| US11031440B2 |
Light conversion substrate, display device, and method of manufacturing display device
A light conversion substrate includes a first substrate having a first region, a second region, and a third region. A first light conversion pattern is disposed on the first region and includes first wavelength conversion particles. A second light conversion pattern is disposed on the second region and is spaced apart from the first light conversion pattern and includes second wavelength conversion particles. A first scattering pattern is disposed on the third region to fill a space between the first light conversion pattern and the second light conversion pattern and includes first scattering particles. The first scattering pattern overlaps a portion of the first light conversion pattern and a portion of the second light conversion pattern in a direction of the thickness of the first substrate. |
| US11031436B2 |
Display device
A display device includes a substrate, a pixel area, and a plurality of data lines. The substrate includes display and non-display areas. The pixel area is in the display area and includes a first pixel column and a second pixel column. The pixels in the first and second columns emit light of different colors. The data lines are respectively coupled to the first pixel column and the second pixel column. In the non-display area, a data line is coupled to one of the first or second pixel columns corresponding to a color on which influence of a resistance is greater than on another color. The data lines has a line or contact structure with a resistance less than a resistance of a line or contact structure of a remaining data line coupled to a remaining pixel column. |
| US11031435B2 |
Memory device containing ovonic threshold switch material thermal isolation and method of making the same
A memory device includes a plurality of memory cells, and an isolation material portion located between the memory cells. The isolation material portion includes at least one ovonic threshold switch material portion. |
| US11031433B2 |
Back-side illuminated image sensor
Image sensors and methods of manufacturing image sensors are provided herein. In an embodiment, a method of manufacturing an image sensor includes forming a structure having a front side and a back side. The structure includes a semiconductor layer extending between the front side and the back side of the structure, and a capacitive insulation wall extending through the semiconductor layer between the front side and the back side of the structure. The capacitive insulation wall includes first and second insulating walls separated by a region of a conductive or semiconductor material. The method further includes selectively etching, from the back side of the structure, portions of the semiconductor layer and the region of conductive or semiconductor material, while retaining adjacent portions of the first and second insulating walls. |
| US11031431B2 |
Semiconductor device, method of manufacturing semiconductor device, and electronic apparatus
A semiconductor device including a plurality of substrates that is stacked, each of the substrates including a semiconductor substrate and a multi-layered wiring layer stacked on the semiconductor substrate, the semiconductor substrate having a circuit with a predetermined function formed thereon. Bonding surfaces between two substrates among the plurality of substrates have an electrode junction structure in which electrodes formed on the respective bonding surfaces are joined in direct contact with each other, the electrode junction structure being a structure for electrical connection between the two substrates. One of the electrode constituting the electrode junction structure or a via for connection of the electrode to a wiring line in the multi-layered wiring layer is provided with a porous film, in a partial region between an electrically-conductive material and a sidewall of a through hole filled with the electrically-conductive material, the electrically-conductive material constituting the electrode and the via. |
| US11031430B2 |
Image sensor with dummy lines for minimizing fixed pattern noise (FPN) and electronic apparatus including the same
An image sensor and an electronic apparatus, the image sensor including a plurality of pixels, each pixel of the plurality of pixels including a photodiode and a transfer transistor, a reset transistor, a source-follower transistor, and a selection transistor, which correspond to the photodiode; a plurality of first interconnection lines connected to gates of the transfer transistor, the reset transistor, and the selection transistor, the plurality of first interconnection lines extending in a first direction; and a plurality of second interconnection lines connected to a source region of the selection transistor, the plurality of second interconnection lines extending in a second direction that intersects the first direction, wherein the plurality of second interconnection lines includes dummy lines on a peripheral area that is outside of a pixel area in which the pixels are located. |
| US11031428B2 |
Image sensor
An image sensor includes a semiconductor substrate having first and second surfaces facing each other and a first device isolation layer provided in the semiconductor substrate. The first device isolation layer defines pixel regions of the semiconductor substrate and includes first and second portions crossing each other. The first and second portions are provided to surround one of the pixel regions, and the first portion is provided to extend from the first surface of the semiconductor substrate toward the second surface and to have a structure inclined relative to the first surface. |
| US11031425B2 |
Image sensor and method of manufacturing the same
An image sensor includes a substrate including a pixel region and a pad region, a first conductive pad on the substrate in the pad region, a micro lens layer on the substrate in the pixel region, and a first protective pattern covering the pad region and exposing the first conductive pad. The first protective pattern and the micro lens layer include the same material, and the first protective pattern and the micro lens layer are apart from each other. |
| US11031424B2 |
Image sensor with selective light-shielding for reference pixels
An image sensor includes a photoelectric conversion layer including a plurality of first photoelectric conversion elements and a plurality of second photoelectric conversion elements adjacent to the first photoelectric conversion elements. A light shield layer shields the second photoelectric conversion elements and has respective openings therein that provide light transmission to respective ones of the first photoelectric conversion elements. The image sensor further includes an array of micro-lenses on the photoelectric conversion layer, each of the micro-lenses overlapping at least one of the first photoelectric conversion elements and at least one of the second photoelectric conversion elements. |
| US11031416B2 |
Semiconductor storage device and method for manufacturing semiconductor storage device
According to one embodiment, a semiconductor storage device includes: a first stacked body in which a plurality of conductive layers are stacked via a first insulating layer, the first stacked body having a first stepped portion and a second stepped portion in which end portions of the plurality of conductive layers are formed in a step shape in a lower layer; a second stacked body in which a plurality of second insulating layers are stacked via a third insulating layer, the second stacked body having a third stepped portion in which end portions of the plurality of second insulating layers in an identical level as the conductive layers forming the first stepped portion are formed in a step shape. The first stepped portion and the third stepped portion oppose each other, and the second stepped portion and the third stepped portion overlap each other at least partially in a top view. |
| US11031415B2 |
Semiconductor storage device
According to one embodiment, in a semiconductor storage device, a peripheral circuit supplies a first voltage to a second region when supplying a select potential to a region corresponding to the second region, in a second conductive layer. The peripheral circuit supplies a second voltage higher than the first voltage to a first region when supplying a select potential to a region corresponding to the first region, in the second conductive layer. |
| US11031413B2 |
Three-dimensional memory devices and fabricating methods thereof
A method for forming a gate structure of a 3D memory device is provided. The method comprises: forming multiple hybrid shallow trench isolation structures in a substrate; forming an alternating dielectric stack on the substrate, the alternating dielectric stack including multiple dielectric layer pairs each comprising a first dielectric layer and a second dielectric layer different from the first dielectric layer; forming multiple channel structures in the alternating dielectric stack; forming a slit penetrating vertically through the alternating dielectric stack and extending in a horizontal direction to divide the multiple channel structures and to expose a row of hybrid shallow trench isolation structures; replacing the second dielectric layers in the alternating dielectric stack with multiple gate structures through the slit; forming a spacer wall to fill the slit; and forming multiple array common source contacts each in electric contact with a corresponding hybrid shallow trench isolation structure. |
| US11031406B2 |
Semiconductor devices having silicon/germanium active regions with different germanium concentrations
A semiconductor device includes a first transistor element having a first channel region and a second transistor element having a second channel region, wherein the first channel region includes a first crystalline silicon/germanium (Si/Ge) material mixture having a first germanium concentration, and wherein the second channel region includes a second crystalline Si/Ge material mixture having a second germanium concentration that is higher than the first germanium concentration. |
| US11031405B2 |
Peripheral logic circuits under DRAM memory arrays
Various embodiments comprise methods and related apparatuses formed from those methods for placing at least portions of peripheral circuits under a DRAM memory array, where the peripheral circuits are used to control an operation of the DRAM memory array. In an embodiment, a memory apparatus includes a DRAM memory array and at least one peripheral circuit formed under the DRAM memory array, where the at least one peripheral circuit includes at least one circuit type selected from sense amplifiers and sub-word line drivers. Additional apparatuses and methods are also disclosed. |
| US11031402B1 |
Capacitorless dram cell
The invention relates to a capacitorless DRAM cell, the cell comprising a heterostructure, a gate structure adjoining the heterostructure in a first direction, a drain structure adjoining the heterostructure in a second direction perpendicular to the first direction, and a source structure adjoining the heterostructure in the direction opposite the second direction, the heterostructure comprising one or more semiconducting channel layers and one or more electrically insulating barrier layers, the channel layers and the barrier layers being alternatingly stacked in the first direction. |
| US11031400B2 |
Integrated memory comprising secondary access devices between digit lines and primary access devices
Some embodiments include an integrated assembly having a primary access transistor. The primary access transistor has a first source/drain region and a second source/drain region. The first and second source/drain regions are coupled to one another when the primary access transistor is in an ON mode, and are not coupled to one another when the primary access transistor is in an OFF mode. A charge-storage device is coupled with the first source/drain region. A digit line is coupled with the second source/drain region through a secondary access device. The secondary access device has an ON mode and an OFF mode. The digit line is coupled with the charge-storage device only when both the primary access transistor and the secondary access device are in their respective ON modes. |
| US11031398B2 |
Structure and method for semiconductor device
A semiconductor device includes a substrate; an isolation structure over the substrate; two first fins in an N-type region of the semiconductor device; and two second fins in a P-type region of the semiconductor device. Each of the two first fins has a channel region and two source/drain (S/D) regions sandwiching the channel region. The semiconductor device further includes a gate stack engaging the channel regions of the two first fins; and four S/D features over the S/D regions of the two first fins. Each of the four S/D features includes a lower portion and an upper portion over the lower portion. Each of the lower portions of the four S/D features has a cross-sectional profile that is wider at its bottom than at its top. The upper portions of the four S/D features merge into two merged S/D features with one on each side of the gate stack. |
| US11031396B2 |
Spacer for dual epi CMOS devices
A method for making a semiconductor includes patterning a first transistor having one or more gate stacks on a first source-drain area and second transistor comprising one or more gate stacks on a second source-drain area, forming dielectric spacers on gate stack side walls, depositing a first nitride liner on the first and second transistors. The method also includes masking the second transistor and etching to remove the first nitride material and the spacer from the first source-drain area and growing a first epitaxial layer on the first source-drain area by an epitaxial growth process. The method also includes depositing a second nitride liner on the first and second transistors. The method also includes masking the first transistor, and etching to remove the second nitride material from the second source-drain area and growing a second epitaxial layer on the second source-drain area by an epitaxial growth process. |
| US11031394B1 |
3D semiconductor device and structure
A 3D semiconductor device including: a first level, which includes a first layer, the first layer including first transistors, and where the first level includes a second layer, the second layer including first interconnections; a second level overlaying the first level, where the second level includes a third layer including second transistors, and where the second level includes a fourth layer, the fourth layer including second interconnections; a plurality of connection paths, where the paths provide connections from a plurality of the first transistors to a plurality of second transistors, where the second level is bonded to the first level, where the bonded includes oxide to oxide bond regions and metal to metal bond regions, where the second level includes at least one memory array, and where the third layer includes crystalline silicon; and a heat removal path from the first layer or the third layer to an external surface of the device. |
| US11031392B2 |
Integrated circuit device having a work function control layer with a step portion located on an element isolation layer
An integrated circuit device includes a first fin-type active area and a second fin-type active area protruding from a substrate and extending in a first direction, an element isolation layer between the first and second fin-type active areas on the substrate, first semiconductor patterns being on a top surface of the first fin-type active area and having channel areas, second semiconductor patterns being on a top surface of the second fin-type active area and having channel areas, a first gate structure extending on the first fin-type active area in a second direction and including a first work function control layer surrounding the first semiconductor patterns and comprising a step portion on the element isolation layer, and a second gate structure extending on the second fin-type active area in the second direction and including a second work function control layer surrounding the second semiconductor patterns. |
| US11031386B2 |
Semiconductor device
A semiconductor device includes a first conductivity type semiconductor layer, a second conductivity type region selectively formed in the semiconductor layer, a second conductivity type peripheral impurity region formed around the second conductivity type region in the semiconductor layer, and a Schottky electrode that is formed on the semiconductor layer and that forms a Schottky junction portion between a first conductivity type part of the semiconductor layer and the Schottky electrode, and, in the semiconductor device, a pn junction portion between the peripheral impurity region and the first conductivity type part of the semiconductor layer has a higher withstand voltage than a Zener voltage VZ of a Zener diode made of a pn junction portion between the second conductivity type region and the first conductivity type part of the semiconductor layer. |
| US11031385B2 |
Standard cell for removing routing interference between adjacent pins and device including the same
An integrated circuit including a first standard cell including, first transistors, the first transistors being first unfolded transistors, a first metal pin, a second metal pin, and a third metal pin on a first layer, the first metal pin and the second metal pin having a first minimum metal center-to-metal center pitch therebetween less than or equal to 80 nm, a fourth metal pin and a fifth metal pin at a second layer, the fourth metal pin and the fifth metal pin extending in a second direction, the second direction being perpendicular to the first direction, a first via between the first metal pin and the fourth metal pin, and a second via between the third metal pin and the fifth metal pin such that a first via center-to-via center space between the first via and the second via is greater than double the first minimum metal center-to-metal center pitch. |
| US11031384B2 |
Integrated circuits and methods of manufacturing and designing the same
Provided is an integrated circuit including a semiconductor substrate, a plurality of gate lines and a plurality of metal lines. The plurality of gate lines are formed in a gate layer above the semiconductor substrate, where the plurality of gate lines are arranged in a first direction and extend in a second direction perpendicular to the second direction. The plurality of metal lines are formed in a conduction layer above the gate layer, where the plurality of metal lines are arranged in the first direction and extend in the second direction. 6N metal lines and 4N gate lines form a unit wiring structure where N is a positive integer and a plurality of unit wiring structures are arranged in the first direction. Design efficiency and performance of the integrated circuit are enhanced through the unit wiring structure. |
| US11031380B2 |
Manufacturing method of micro LED display module
A manufacturing method of micro LED display module is provided. The micro LED display module comprises a driver chip block, a LED block, a circuit board and a color layer. The driver chip block has a plurality of pixel electrodes. The LED block is disposed in the driver chip block and has two semiconductor layers and a plurality of trenches. One of the two semiconductor layers is electrically connected to the pixel electrodes and the other is electrically connected to the light transmissive conductive layer. The trenches define a plurality of micro LED pixels arranged in an array. Each trench at least penetrates through the light emitting layer and one of the semiconductor layers. Each micro LED pixel corresponds to one of the pixel electrodes. The circuit board is electrically connected to the driver chip block, and the color layer is disposed on the light transmissive conductive layer. |
| US11031377B2 |
Integration of three-dimensional NAND memory devices with multiple functional chips
Embodiments of three-dimensional semiconductor devices and fabrication methods are disclosed. The method includes forming a first and a second memory chips and a microprocessor chip. The method also includes bonding a first interconnect layer of the first memory chip with a second interconnect layer of the second memory chip, such that one or more first memory cells of the first memory chip are electrically connected with one or more second memory cells of the second memory chip through interconnect structures of the first and second interconnect layers. The method further includes bonding a third interconnect layer of the microprocessor chip with a substrate of the second memory chip, such that the one or more microprocessor devices of the microprocessor chip are electrically connected with one or more second memory cell of the second memory chip through interconnect structures of the second and third interconnect layers. |
| US11031371B2 |
Semiconductor package and method of fabricating semiconductor package
The present technology relates to a semiconductor package. The semiconductor package comprises: a first component comprising a plurality of first dies stacked on top of each other, each of first dies comprising at least one side surface and an electrical contact exposed on the side surface, and the plurality of first dies aligned so that the corresponding side surfaces of all first dies substantially coplanar with respect to each other to form a common sidewall; a first conductive pattern formed over the sidewall and at least partially spaced away from the sidewall, the first conductive pattern electrically interconnecting the electrical contacts of the plurality of first dies; at least one second component; and a second conductive pattern formed on a surface of the second component, the second conductive pattern affixed and electrically connected to the first conductive pattern formed over the sidewall of the first component. |
| US11031367B2 |
Bond head assemblies including reflective optical elements, related bonding machines, and related methods
A bond head assembly for a bonding machine is provided. The bond head assembly includes a body portion and a bonding tool for bonding a semiconductor element to a substrate. The bonding tool is secured to the body portion. The bond head assembly also includes at least one reflective optical element carried by the bond head assembly. The at least one reflective optical element is configured to be positioned along an optical path of the bonding machine such that a vision system of the bonding machine is configured to view a portion of the semiconductor element while being carried by the bonding tool prior to bonding of the semiconductor element to the substrate. |
| US11031366B2 |
Shielded electronic component package
An electronic component package includes a substrate and an electronic component mounted to the substrate, the electronic component including a bond pad. A first antenna terminal is electrically connected to the bond pad, the first antenna terminal being electrically connected to a second antenna terminal of the substrate. A package body encloses the electronic component, the package body having a principal surface. An antenna is formed on the principal surface by applying an electrically conductive coating. An embedded interconnect extends through the package body between the substrate and the principal surface and electrically connects the second antenna terminal to the antenna. Applying an electrically conductive coating to form the antenna is relatively simple thus minimizing the overall package manufacturing cost. Further, the antenna is relatively thin thus minimizing the overall package size. |
| US11031363B2 |
Interconnect structures, packaged semiconductor devices, and methods of packaging semiconductor devices
Interconnect structures, packaged semiconductor devices, and methods of packaging semiconductor devices are disclosed. In some embodiments, an interconnect structure includes dielectric layers, a conductive layer disposed in the dielectric layers, and a via layer disposed in the dielectric layers proximate the conductive layer. An underball metallization (UBM) layer is disposed in the dielectric layers proximate the via layer. A first connector coupling region is disposed in the via layer and the UBM layer. A via layer portion of the first connector coupling region is coupled to a first contact pad in the conductive layer. A second connector coupling region is disposed in the UBM layer. The second connector coupling region is coupled to a conductive segment in the UBM layer and the via layer. The second connector coupling region is coupled to a second contact pad in the conductive layer by the conductive segment. |
| US11031362B2 |
3D-interconnect
A method of making a microelectronic package includes bonding a conductive structure to a carrier. The conductive structure can include a base and a plurality of interconnections extending continuously away from the base toward the carrier. The microelectronic element can be positioned between at least two adjacent interconnections of the plurality of interconnections. The conductive structure may be bonded to the carrier so that the conductive structure overlies a rear surface of a microelectronic element disposed on the carrier and an exposed top surface of the carrier. The plurality of interconnections and the microelectronic element may be encapsulated. The carrier may be removed to expose free ends of the interconnections and bond pads of the microelectronic element. The free ends of the interconnections and bond pads of the microelectronic element may be conductively connected with terminals of the microelectronic package. The conductive structure may be patterned to form external contacts. |
| US11031360B2 |
Techniques for an inductor at a second level interface
Techniques are provided for an inductor at a second level interface between a first substrate and a second substrate. In an example, the inductor can include a winding and a core disposed inside the winding. The winding can include first conductive traces of a first substrate, second conductive traces of a second non-semiconductor substrate, and a plurality of connectors configured to connect the first substrate with the second substrate. Each connector of the plurality of connectors can be located between a trace of the first conductive traces and a corresponding trace of the second conductive traces. |
| US11031357B2 |
Semiconductor device
There is provided a semiconductor device having a structure that can suppress occurrence of chipping in a device region and that can reduce manufacturing cost of the semiconductor device. A semiconductor device includes a substrate and a first amorphous insulating film. The substrate has a main surface and an end surface. The main surface includes a peripheral region and a device region. The first amorphous insulating film is disposed on the peripheral region, and is separated from the device region. The first amorphous insulating film extends along the end surface in the form of a stripe. The first amorphous insulating film is flush with the end surface. |
| US11031356B2 |
Semiconductor package structure for improving die warpage and manufacturing method thereof
A semiconductor die package includes a semiconductor die, a film for improving die warpage bonded to a first face of the semiconductor die, a plurality of electrically conductive bumps formed on a second face of the semiconductor die, a substrate onto which the electrically conductive bumps of the second face of the semiconductor die are bonded to electrically connect the semiconductor die and the substrate, and a mold compound applied these components to form an exposed surface of the semiconductor die package that is coplanar with an exposed surface of the film. |
| US11031351B2 |
Method of manufacturing a semiconductor device
A method includes forming an insulating film over a semiconductor structure, forming a sealing ring over a sidewall of the insulating film, and forming a protective layer over an exposed sidewall of the sealing ring. The semiconductor structure includes a semiconductor chip and a molding compound disposed around the semiconductor chip. The exposed sidewall of the sealing ring faces away from the sidewall of the insulating film. |
| US11031347B2 |
Semiconductor packages
A semiconductor package including a heat spreading layer having at least one hole, a first semiconductor chip below the heat spreading layer, a redistribution structure below the first semiconductor chip, a first mold layer between the heat spreading layer and the redistribution structure, a shielding wall extending from the redistribution structure and the heat spreading layer and surrounding the first semiconductor chip, and a first conductive pillar extending from the redistribution structure into the hole may be provided. |
| US11031341B2 |
Side mounted interconnect bridges
A device and method of utilizing an interconnect bridge to electrically couple two semiconductor dies located on different surfaces. Integrated circuit packages using an interconnect bridge to electrically couple a semiconductor die on a substrate to a semiconductor die on a motherboard are shown. Integrated circuit packages using an interconnect bridge to electrically couple a semiconductor die on a top surface of a substrate to a semiconductor die on a bottom surface of a substrate are shown. Methods of electrically coupling semiconductor dies on different surfaces using interconnect bridges are shown. |
| US11031340B2 |
Semiconductor device including a multilayer etch stop layer
A semiconductor device including a metal pattern on a semiconductor substrate; an etch stop layer covering the metal pattern, the etch stop layer including a sequentially stacked first insulation layer, second insulation layer, and third insulation layer; an interlayer dielectric layer on the etch stop layer; and a contact plug penetrating the interlayer dielectric layer and the etch stop layer, the contact plug being connected to the metal pattern, wherein the first insulation layer includes a first insulating material that contains a metallic element and nitrogen, wherein the second insulation layer includes a second insulating material that contains carbon, and wherein the third insulation layer includes a third insulating material that does not contain a metallic element and carbon. |
| US11031338B2 |
Semiconductor device and method for fabricating the same
A semiconductor device includes a first interlayer insulating film on a substrate, a via which penetrates the first interlayer insulating film, a first etching stop film which extends along an upper surface of the first interlayer insulating film, a second interlayer insulating film on the first etching stop film, the second interlayer insulating film including a plurality of periodically arranged air gaps, a first wiring pattern in the second interlayer insulating film, the first wiring pattern penetrating the first etching stop film and is connected to the via, and a capping film which covers an upper surface of the second interlayer insulating film and an upper surface of the first wiring pattern, each of the plurality of air gaps in the second interlayer insulating film extending from the first etching stop film to the capping film. |
| US11031337B2 |
Forming dual metallization interconnect structures in single metallization level
Techniques are provided to fabricate metallic interconnect structures in a single metallization level, wherein different width metallic interconnect structures are formed of different metallic materials to eliminate or minimize void formation in the metallic interconnect structures. For example, a semiconductor device includes an insulating layer disposed on a substrate, and a first metallic line and a second metallic line formed in the insulating layer. The first metallic line has a first width, and the second metallic line has a second width which is greater than the first width. The first metallic line is formed of a first metallic material, and the second metallic line is formed of a second metallic material, which is different from the first metallic material. For example, the first metallic material is cobalt or ruthenium, and the second metallic material is copper. |
| US11031333B2 |
Three-dimensional memory devices having a plurality of NAND strings
Embodiments of source structure of a three-dimensional (3D) memory device and method for forming the source structure of the 3D memory device are disclosed. In an example, a NAND memory device includes a substrate, an alternating conductor/dielectric stack, a NAND string, a source conductor layer, and a source contact. The alternating conductor/dielectric stack includes a plurality of conductor/dielectric pairs above the substrate. The NAND string extends vertically through the alternating conductor/dielectric stack. The source conductor layer is above the alternating conductor/dielectric stack and is in contact with an end of the NAND string. The source contact includes an end in contact with the source conductor layer. The NAND string is electrically connected to the source contact by the source conductor layer. In some embodiments, the source conductor layer includes one or more conduction regions each including one or more of a metal, a metal alloy, and a metal silicide. |
| US11031332B2 |
Package panel processing with integrated ceramic isolation
A packaged electronic device includes a semiconductor die with an electronic component and a contact structure connected to the electronic component, as well as an organic panel frame, a lamination structure that partially embeds the semiconductor die in an opening of the organic panel frame, and a ceramic substrate mounted to a first side of the semiconductor die. |
| US11031330B2 |
Electroconductive substrate, electronic device and display device
An electroconductive substrate, including: a base material; a foundation layer disposed on the base material; a trench formation layer disposed on the foundation layer, and an electroconductive pattern layer including metal plating. A trench including a bottom surface to which the foundation layer is exposed, is formed. The trench is filled with the electroconductive pattern layer. The foundation layer includes a mixed region which is formed from a surface of the foundation layer on the electroconductive pattern layer side towards the inside thereof, and contains metal particles which contain a metal configuring the electroconductive pattern layer, and enter the foundation layer. |
| US11031327B2 |
Through vias and methods of formation thereof
In accordance with an embodiment of the present invention, a semiconductor chip includes a device region disposed in or over a substrate, a doped region disposed in the device region, and a through via disposed in the substrate. The through via extends through the doped region. |
| US11031326B2 |
Wiring structure, electronic device and method for manufacturing the same
A wiring structure includes an insulating layer and a conductive structure. The insulating layer has an upper surface and a lower surface opposite to the upper surface, and defines an opening extending through the insulating layer. The conductive structure is disposed in the opening of the insulating layer, and includes a first barrier layer and a wetting layer. The first barrier layer is disposed on a sidewall of the opening of the insulating layer, and defines a through hole extending through the first barrier layer. The wetting layer is disposed on the first barrier layer. A portion of the wetting layer is exposed from the through hole of the first barrier layer and the lower surface of the insulating layer to form a ball pad. |
| US11031323B2 |
Interconnecting member for power module
A housing of a power module includes: an encasing for encasing semiconductor elements inside the housing; a power terminal area on the encasing, on which a power terminal plate is provided; an auxiliary terminal area on the encasing at a lower level than the power terminal area; and an interconnecting member with a power terminal connector part and an auxiliary terminal connector part interconnected by a spring part, the spring part is aligned besides the power terminal plate; the interconnecting member is inserted with the power terminal connector part through an opening in the encasing below the power terminal plate, such that the spring part engages the power terminal area besides the power terminal plate and runs to the auxiliary terminal area and the auxiliary terminal connector part is disposed on the auxiliary terminal area. |
| US11031322B2 |
Semiconductor device mounted on circuit board of electronic device
There is provided a semiconductor device, including: a semiconductor element which includes an element main surface and an element rear surface that face opposite sides in a thickness direction and in which a first electrode and a second electrode are formed on the element main surface; a first conductive member electrically connected to the first electrode; a second conductive member electrically connected to the second electrode; and a sealing resin configured to cover part of the first conductive member, part of the second conductive member, and the semiconductor element. |
| US11031320B2 |
Structures and methods for reducing process charging damages
Structures and methods for reducing process charging damages are disclosed. In one example, a silicon-on-insulator (SOI) structure is disclosed. The SOI structure includes: a substrate, a polysilicon region and an etch stop layer. The substrate includes: a handle layer, an insulation layer arranged over the handle layer, and a buried layer arranged over the insulation layer. The polysilicon region extends downward from an upper surface of the buried layer and terminates in the handle layer. The etch stop layer is located on the substrate. The etch stop layer is in contact with both the substrate and the polysilicon region. |
| US11031319B2 |
Thermal interface materials with adhesive selant for electronic components
In one example, an apparatus is described, which includes an electronic component, a thermal dissipation unit, a thermal interface material disposed between the electronic component and the thermal dissipation unit, and an adhesive sealant applied around the thermal interface material between the electronic component and the thermal dissipation unit. |
| US11031318B2 |
Encapsulated phase change porous layer
A cooling device including an encapsulated phase change porous layer that exhibits an increased heat capacity is disclosed. The encapsulated phase change porous layer may include a sintered porous layer, a phase change material formed over the sintered porous layer, and an encapsulation material formed over the phase change material. The encapsulation material may encapsulate the phase change material between the encapsulation material and the sintered porous layer and retain the phase change material between the encapsulation material and the sintered porous layer when a fluid is flowed through or in contact with the encapsulated phase change porous layer. |
| US11031314B2 |
Spacer structure for double-sided-cooled power module and method of manufacturing the same
A spacer structure, which connects an insulating substrate and a semiconductor chip of a double-sided-cooled power module, includes: a conductive material layer which is composed of a composite material; an underlying plating layer disposed on the conductive material layer; and a copper plating layer disposed on the underlying plating layer, in which the copper plating layer is in contact with a joining material that joins the spacer to the semiconductor chip and the insulating substrate. |
| US11031312B2 |
Multi-fractal heatsink system and method
A heat sink comprising a heat exchange device having a large scale morphology over a scale range and a small scale texture over a scale range, wherein at least one of the large scale morphology and the small scale texture has a fractal-like self-similarity over a scale range. The large scale morphology and small scale texture may be independently defined and implemented, or be provided with a transitional range. The large scale morphology may be algorithmically optimized according to a set of geometrically constraints. The small scale texture may be optimized according to aerodynamic parameters and constraints. The heat sink may be dynamically varying, and/or operated in conjunction with a dynamically varying heat transfer medium supply. |
| US11031311B2 |
Packaged semiconductor device with multilayer stress buffer
In a described example, a packaged semiconductor device includes: a semiconductor die with a component proximate to a surface of the semiconductor die; the semiconductor die mounted on a substrate. The component is covered with a first polymer layer with a first modulus and at least a portion of the first polymer layer is covered by at least one second polymer layer with a second modulus and the second modulus is greater than the first modulus. The semiconductor die and a portion of the substrate are covered with mold compound. |
| US11031310B2 |
Chip package
A chip package may include a first polymer layer and a first semiconductor chip in the first polymer layer. The first semiconductor chip may include a first semiconductor device and a first semiconductor substrate supporting the first semiconductor device. The first semiconductor chip may also have a first contact pad coupled to the first semiconductor device. The first semiconductor chip may further include a first conductive interconnect on the first contact pad. The chip package may also include a second polymer layer on the first polymer layer and across an edge of the first semiconductor chip. The chip package may further include a first conductive layer in the second polymer layer and directly on a surface of the first conductive interconnect, and across the edge of the first semiconductor chip. |
| US11031309B2 |
Cover lid with selective and edge metallization
A cover lid for use with a semiconductor package is disclosed. First, a polyamide mask is applied to one surface of the lid plate. Next, the exposed areas of the surface, as well as the sides of the lid plate, are metallized. The polyamide mask can then be removed. This reduces pullback and shrinkage of the metallized layer, while lowering the manufacturing cost and process times. |
| US11031304B2 |
Method of manufacturing semiconductor device
To improve a reliability of a semiconductor device, a memory cell array is formed in a product region of an SOI substrate, and a test cell array is formed in a scribe region of the SOI substrate. A plurality of regions is formed in each of the memory cell array and the test cell array. The plurality of regions formed in the test cell array is the same configuration as the plurality of regions formed in the memory cell array. A plurality of plugs is formed in the plurality of regions, respectively. Also, it can determine whether or not a leak path is occurred in the memory cell array, by inspecting whether or not a conduction between the plurality of plugs is confirmed. |
| US11031303B1 |
Deep trench isolation structure and method of making the same
A semiconductor structure can include a high voltage region, a first moat trench isolation structure electrically insulating the high voltage region from low voltage regions of the semiconductor structure, and a second moat trench isolation structure electrically insulating the high voltage region from the low voltage regions of the semiconductor structure. The first moat trench isolation structure can include dielectric sidewall spacers and a conductive fill material portion located between the dielectric sidewall spacers. The second moat trench isolation structure can include only at least one dielectric material, and can include a dielectric moat trench fill structure having a same material composition as the dielectric sidewall spacers and having a lateral thickness that is greater than a lateral thickness of the dielectric sidewall spacers and is less than twice the lateral thickness of the dielectric sidewall spacers. |
| US11031302B2 |
High-k metal gate and method for fabricating the same
Embodiments of the present disclosure provide wet process based methods for modifying threshold value (Vt) of high-k metal gate using self-assembled monolayer (SAM) on dedicated transistor. In one embodiment, the method includes forming a gate structure over a substrate, the gate structure comprising a gate dielectric layer, a barrier layer formed over the gate dielectric layer, and an oxide layer formed over the barrier layer, and forming a self-assembled monolayer on the oxide layer by exposing the oxide layer to an aqueous solution containing metal oxides in a metal dissolving acid. |
| US11031301B2 |
Gate formation scheme for n-type and p-type transistors having separately tuned threshold voltages
Embodiments of the invention include a wafer having gate stacks over channel fins. The wafer includes a first channel fin in an n-type region of a substrate, a second channel fin in a p-type region of the substrate, and a gate dielectric over the substrate and the first and second channel fins. A work function metal stack is over the gate dielectric, the first channel fin in the n-type region, and the second channel fin in the p-type region. The work function metal stack over the gate dielectric and the first channel fin in the n-type region forms a first work function metal stack. The work function metal stack over the gate dielectric and the second fin in the p-type region forms a second work function metal stack. The first work function metal stack includes a shared layer of work function metal shared with the second work function metal stack. |
| US11031299B2 |
FinFET device with different liners for PFET and NFET and method of fabricating thereof
A semiconductor device includes a P-type Field Effect Transistor (PFET) and an NFET. The PFET includes an N-well disposed in a substrate, a first fin structure disposed over the N-well, a first liner layer disposed over the N-well, and a second liner layer disposed over the first liner layer. The first liner layer and the second liner layer include different materials. The NFET includes a P-well disposed in the substrate, a second fin structure disposed over the P-well, a third liner layer disposed over the P-well. The third liner layer and the second liner layer include the same materials. |
| US11031298B2 |
Semiconductor device and method
In an embodiment, a method includes: forming a first recess and a second recess in a substrate; growing a first epitaxial material stack in the first recess, the first epitaxial material stack including alternating layers of a first semiconductor material and a second semiconductor material, the layers of the first epitaxial material stack being undoped; growing a second epitaxial material stack in the second recess, the second epitaxial material stack including alternating layers of the first semiconductor material and the second semiconductor material, a first subset of the second epitaxial material stack being undoped, a second subset of the second epitaxial material stack being doped; patterning the first epitaxial material stack and the second epitaxial material stack to respectively form first nanowires and second nanowires; and forming a first gate structure around the first nanowires and a second gate structure around the second nanowires. |
| US11031296B2 |
3D vertical FET with top and bottom gate contacts
A method for forming a semiconductor device includes flipping a vertical transistor including a bottom side having at least one connection to at least one bottom side metallization structure, and, after flipping the vertical transistor, forming at least one top side metallization structure having at least one connection to a top side of the vertical transistor. |
| US11031294B2 |
Semiconductor device and a method for fabricating the same
In a method of manufacturing a semiconductor device, an isolation region is formed in a substrate, such that the isolation region surrounds an active region of the substrate in plan view. A first dielectric layer is formed over the active region. A mask layer is formed on a gate region of the first dielectric layer. The gate region includes a region where a gate electrode is to be formed. The mask layer covers the gate region, but does not entirely cover the first dielectric layer. The first dielectric layer not covered by the mask layer is removed such that a source-drain region of the active region is exposed. After that, the mask layer is removed. A second dielectric layer is formed so that a gate dielectric layer is formed. The gate electrode is formed over the gate dielectric layer. |
| US11031292B2 |
Multi-gate device and related methods
A method of fabricating a device includes providing a first fin in a first device type region and a second fin in a second device type region. Each of the first and second fins include a plurality of semiconductor channel layers. A two-step recess of an STI region on opposing sides of each of the first and second fins is performed to expose a first number of semiconductor channel layers of the first fin and a second number of semiconductor channel layers of the second fin. A first gate structure is formed in the first device type region and a second gate structure is formed in the second device type region. The first gate structure is formed over the first fin having the first number of exposed semiconductor channel layers, and the second gate structure is formed over the second fin having the second number of exposed semiconductor channel layers. |
| US11031290B2 |
Semiconductor structure with cutting depth control and method for fabricating the same
A semiconductor structure with cutting depth control and method for fabricating the same are provided. In the method for fabricating the semiconductor device, at first, fins protruding from a substrate are formed. Next, source/drain devices are grown on both ends of the fins. Then, an inter-layer dielectric layer crossing the fins and enclosing the source/drain devices is deposited. A metal gate structure enclosed by the inter-layer dielectric layer is formed between the source/drain devices. And then, a replacement operation is performed to replace a portion of the inter-layer dielectric layer with an isolation material, thereby forming an isolation portion that adjoins the metal gate structure and is located between the adjacent source/drain devices. Thereafter, a metal gate cut operation is performed, thereby forming an opening in the metal gate structure and an opening in the isolation portion, and an insulating material is deposited in the openings. |
| US11031287B2 |
Fully self-aligned via with selective bilayer dielectric regrowth
In a method for processing a substrate, a conductive cap layer is selectively formed over a plurality of conductive structures that are positioned in a first dielectric layer. A second dielectric layer is selectively formed over the first dielectric layer. A third dielectric layer is selectively formed over the second dielectric layer. A fourth dielectric layer is then formed over the plurality of conductive structures and the third dielectric layer, and an interconnect structure is subsequently formed within the fourth dielectric layer. The interconnect structure includes a via structure that has a first portion positioned over the conductive cap layer so that sidewalls of the first portion are surrounded by the third dielectric layer, and a second portion disposed over the first portion and the third dielectric layer. |
| US11031284B2 |
Semiconductor device and method of forming the same
The present disclosure provides a semiconductor device. The semiconductor device includes a substrate having a first conductive pattern and a conductive mask disposed over the first conductive pattern. The semiconductor device further includes a second conductive pattern disposed over the conductive mask, and electrically connecting with the first conductive pattern through the conductive mask. The conductive mask has a lower etch rate to a predetermined etchant than the second conductive pattern. A method for forming the semiconductor device is also provided. |
| US11031275B2 |
3D semiconductor device and structure with memory
A 3D semiconductor device including: a first level including logic circuits, the logic circuits include a plurality of first single crystal transistors and a first metal layer; a second level including a plurality of second transistors, where the second level includes memory cells including the plurality of second transistors; a second metal layer atop the second level; where the plurality of second transistors are junction-less transistors, where at least one of the plurality of second transistors includes polysilicon, where the memory cells are structured as a plurality of at least sixteen sub-arrays, where each of the sub-arrays is independently controlled, where at least one of the plurality of at least sixteen sub-arrays is at least partially atop at least one of the logic circuits, and where the at least one of the logic circuits is designed to control at least one of the plurality of at least sixteen sub-arrays. |
| US11031271B2 |
Heater system, ceramic heater, plasma treatment system, and adsorption system
A heater system may include a ceramic heater and a drive device. The ceramic heater may include a ceramic substrate and a resistance heating element. The ceramic substrate may include an upper surface. The resistance heating element may extend in an internal portion or on a surface of the ceramic substrate along the upper surface of the ceramic substrate. The drive device may include a main driving part, which supplies the main power to the entirety of the resistance heating element, and an additional driving part, which supplies additional power to a divided region that is a portion of the resistance heating element, by superimposing it on the main power. |
| US11031270B2 |
Substrate processing apparatus, substrate holder and mounting tool
A substrate processing apparatus, includes: a substrate holder including at least one support column to which a mounting part on which a substrate is mounted is attached and at least one auxiliary support column to which the mounting part is not attached, wherein the substrate holder is configured such that a diameter of the auxiliary support column is smaller than a diameter of the support column, and wherein the substrate holder is configured such that when the substrate is held by the mounting part, an end portion of the substrate and each of the support column is spaced apart from each other by a predetermined length. |
| US11031269B2 |
Substrate transport robot, substrate transport system, and substrate transport method
A substrate transport robot includes: a base installed inside a transport chamber; an arm; a first hand and a second hand rotatable about a vertical hand axis and configured to support a substrate; and a controller. The controller performs: a first transfer process of causing the first hand to enter from the transport chamber into a storage chamber, and transferring the substrate between the first hand and a placing portion in the storage chamber; an exit process of causing the first hand to exit the storage chamber into the transport chamber; and a second transfer process of causing the second hand to enter from the transport chamber into the storage chamber. In the exit process, the hand axis moves away from a center line of an opening, such that the hand axis is farther from the center line than a reference position of the first hand is. |
| US11031268B2 |
Device for in situ thermal control and transfer of a monolayer or thin film
This invention generally relates to a device for preparing and transferring a monolayer or thin film. In particular this present invention is a device for preparing and transferring a monolayer or thin film to a substrate using an improved version of the Langmuir-Schaefer technique, which incorporates in situ thermal control, for instance to heat the supporting substrate before and/or during the transfer process. |
| US11031265B2 |
Load port module
Substrate loading device including a frame adapted to connect the substrate loading device to a substrate processing apparatus, the frame having a transport opening through which substrates are transported between the loading device and processing apparatus, a cassette support for holding at least one substrate cassette container, and cassette support purge ports with purge port nozzle locations disposed on the cassette support, each nozzle location being configured so that a nozzle at the nozzle location couples to at least one purge port of the substrate cassette container, wherein each nozzle location defines an interchangeable purge port nozzle interface so that different interchangeable purge port nozzles are removably mounted to respective nozzle interfaces of the nozzle locations that correspond to the different nozzle configurations of the interchangeable purge port nozzle modules, in conformance with and effecting coupling to different ports of different substrate cassette containers having different purge port characteristics. |
| US11031262B2 |
Loadlock integrated bevel etcher system
Implementations disclosed herein describe a bevel etch apparatus within a loadlock bevel etch chamber and methods of using the same. The bevel etch apparatus has a mask assembly within the loadlock bevel etch chamber. During an etch process, the mask assembly delivers a gas flow to control bevel etch without the use of a shadow frame. As such, the edge exclusion at the bevel edge can be reduced, thus increasing product yield. |
| US11031260B2 |
Hydrogen fluoride vapor phase corrosion method
A hydrogen fluoride vapor phase corrosion method comprises: introducing a prescribed vaporized organic liquid into a reaction chamber after a vapor phase hydrogen fluoride containing water reacts, in the reaction chamber, with a wafer; the prescribed vaporized organic liquid, and the water remaining on a surface of the wafer form an azeotropic mixture; and evaporating or volatilizing the azeotropic mixture from the surface of the wafer to carry it out. |
| US11031259B2 |
Method of manufacturing an electronic device and electronic device manufactured thereby
An electronic device and a method of making an electronic device. As non-limiting examples, various aspects of this disclosure provide methods of making an electronic device, and electronic devices made thereby, that comprise forming first and second encapsulating materials, followed by further processing and the removal of the entire second encapsulating material. |
| US11031255B2 |
Stack frame for electrical connections and the method to fabricate thereof
A method for forming a conductive structure is disclosed, the method comprising the steps of: forming a metallic frame having a plurality of metal parts separated from each other; forming an insulating layer on the top surface of the plurality of metal parts; and forming a conductive pattern layer on the insulating layer for making electrical connections with at least one portion of the plurality of metal parts. |
| US11031253B2 |
Etching using an electrolyzed chloride solution
A method for etching one or more entities on a semiconductor structure, each entity being made of a material selected from metals and metal nitrides is provided. The method includes the steps of: (a) oxidizing by electrolysis, at a current of at least 0.1 A, a precursor solution comprising chloride anions at a concentration ranging from 0.01 mol/l to 1.0 mol/l, thereby forming an etching solution; (b) providing a semiconductor structure having the one or more entities thereon; and (c) etching at least partially the one or more entities by contacting them with the etching solution. |
| US11031252B2 |
Heat shield for chamber door and devices manufactured using same
A chamber door, such as an etch chamber door may be heated during etch processing to, e.g., prevent etching by-products from adhering to the etch chamber door. Such heating of the etch chamber door, however, can impact the processing parameters and result in non-uniform processing, such as non-uniform etching characteristics across a semiconductor wafer, for instance. An insulator, such as an insulating film covering surfaces of the heated door, can reduce or eliminate transmission of heat from the door to a work piece such as a semiconductor wafer and this reduce or eliminate the non-uniformity of the process results. |
| US11031245B2 |
Tin oxide thin film spacers in semiconductor device manufacturing
Thin tin oxide films are used as spacers in semiconductor device manufacturing. In one implementation, thin tin oxide film is conformally deposited onto a semiconductor substrate having an exposed layer of a first material (e.g., silicon oxide or silicon nitride) and a plurality of protruding features comprising a second material (e.g., silicon or carbon). For example, 10-100 nm thick tin oxide layer can be deposited using atomic layer deposition. Next, tin oxide film is removed from horizontal surfaces, without being completely removed from the sidewalls of the protruding features. Next, the material of protruding features is etched away, leaving tin oxide spacers on the substrate. This is followed by etching the unprotected portions of the first material, without removal of the spacers. Next, underlying layer is etched, and spacers are removed. Tin-containing particles can be removed from processing chambers by converting them to volatile tin hydride. |
| US11031237B2 |
Aromatic amino siloxane functionalized materials for use in capping porous dielectrics
The present invention relates to new aromatic-amino functional siloxanes, which are compounds comprising one or two tail groups X2, and a linking group L of structure (2) linking each said tail group to said head group, wherein the head group X has structure (1), containing an optional organic moiety Y, wherein the attachment point of said tail group X2 through said linking group L to the head group X1, may be, at positions a, b, c, d, or e. Another aspect of this invention are compositions containing these novel aromatic amino functional siloxane. A further aspect of this invention are compositions comprised of the above novel aromatic-amino functional siloxanes, and also the composition resulting from the aging of these compositions at room temperature for about 1 day to about 4 weeks. Still further aspects of this invention are processes for forming self-assembled monolayers on a substrate, from the aged composition, and also the processes of coating these aged compositions on patterned porous dielectrics to cap them also the processes of metallization of these capped pattered porous dielectrics. |
| US11031236B2 |
Method for improving surface of semiconductor device
A method of forming a semiconductor structure includes forming a first top electrode (TE) layer over a magnetic tunnel junction (MTJ) layer and performing a smoothing treatment on the first TE layer. The smoothing treatment is performed in situ after the forming first TE layer. The smoothing treatment removes spike point defects from the first TE layer. Additional TE layers may be formed over the first TE layer. |
| US11031228B2 |
Mass spectrometry device and mass spectrometry method
A mass spectrometry device according to one aspect of the invention includes: a sample stage on which a sample is placed and on which a sample support having a substrate, in which a plurality of through-holes passing from one surface thereof to the other surface thereof are provided, and a conductive layer, which covers at least a portion of the one surface which is not provided with the through-holes, is placed such that the other surface faces the sample; a laser beam application unit that controls application of a laser beam such that the laser beam is applied to an imaging target region on the one surface; and a detector that detects the sample ionized by the application of the laser beam in a state where a positional relation of the sample in the imaging target region is maintained. |
| US11031224B2 |
Ion guiding device and guiding method
An ion guiding device includes ring electrodes with a same size disposed in parallel; wherein a connection line of centers of the ring electrodes is defined as an axis, a normal of a plane where any of the ring electrodes is located and a tangent line of the axis at a center of the ring electrode form an included angle being a range of (0, 90) degrees; a radio-frequency voltage source, for applying an out-phase radio-frequency voltage on a neighboring ring electrode along the axis, so that ions are confined inside the ring electrode during a transmission process; and a direct-current voltage source, applying a direct-current voltage with an amplitude changing along the axis on the ring electrode, so that the ions are transmitted along the axis and focused to a position closer to an inner surface of the ring electrode along a direction of the normal. |
| US11031223B2 |
Capacitively coupled REIMS technique and optically transparent counter electrode
A method of analysis is disclosed comprising providing a sample on an insulating substrate such as a petri dish (4) and contacting e.g. the rear surface of the insulating substrate with a first electrode (9). The method further comprises contacting the sample with a second electrode (2) and applying an AC or RF voltage to the first and second electrodes (9,2) in order to generate an aerosol from the sample. |
| US11031221B2 |
Ionisation of gaseous samples
A method of mass spectrometry or ion mobility spectrometry is disclosed comprising: providing an analyte; supplying a matrix compound to said analyte such that said analyte dissolves in said matrix; forming first droplets of the dissolved analyte; and colliding said first droplets with a collision surface. The use of matrix improves the analyte ion signal. |
| US11031220B2 |
Ion detection system
An ion detection system is disclosed that comprises one or more first devices (11) configured to produce secondary electrons in response to incident ions. The one or more first devices (11) comprise a first ion collection region and a second ion collection region and are configured to produce first secondary electrons in response to one or more ions incident at the first ion collection region and to produce second secondary electrons in response to one or more ions incident at the second ion collection region. The ion detection system also comprises a first output device (14) configured to output a first signal in response to first secondary electrons produced by the one or more first devices (11) and a second output device (15) configured to output a second signal in response to second secondary electrons produced by the one or more first devices (11). |
| US11031218B2 |
Data acquisition method in a mass spectrometer
A data acquisition method in a mass spectrometer includes a. providing an ion source to generate precursor ions; b. feeding the precursor ions into a first mass analyzer that selects one mass window such that the precursor ions located outside the mass window pass through the first mass analyzer and the precursor ions located within the mass window cannot pass through the first mass analyzer; c. feeding the precursor ions passing through the first mass analyzer into a collision cell for collisional dissociation, to generate product ions; d. feeding the product ions into a second mass analyzer for mass analysis and recording a spectrum; and e. repeating Steps b-d. Each time when Step b is repeatedly performed, the selected mass window does not overlap with all the mass windows previously selected. After all the mass windows in a mass range are selected, the repetition is stopped. |
| US11031215B2 |
Vacuum pump protection against deposition byproduct buildup
A processing chamber such as a plasma etch chamber can perform deposition and etch operations, where byproducts of the deposition and etch operations can build up in a vacuum pump system fluidly coupled to the processing chamber. A vacuum pump system may have multiple roughing pumps so that etch gases can be diverted a roughing pump and deposition precursors can be diverted to another roughing pump. A divert line may route unused deposition precursors through a separate roughing pump. Deposition byproducts can be prevented from forming by incorporating one or more gas ejectors or venturi pumps at an outlet of a primary pump in a vacuum pump system. Cleaning operations, such as waferless automated cleaning operations, using certain clean chemistries may remove deposition byproducts before or after etch operations. |
| US11031211B2 |
Charged particle beam device, and observation method and elemental analysis method using the same
A charged particle beam device capable of easily discriminating the energy of secondary charged particles is realized. The charged particle beam device includes a charged particle source, a sample stage on which a sample is placed, an objective lens that irradiates the sample with a charged particle beam from the charged particle source, a deflector that deflects secondary charged particles released by irradiating the sample with the charged particle beam, a detector that detects the secondary charged particles deflected by the deflector, a sample voltage control unit that applies a positive voltage to the sample or the sample stage, and a deflection intensity control unit that controls the intensity with which the deflector deflects the secondary charged particles. |
| US11031203B2 |
Contact point device and electromagnetic relay
A contact point device includes a first contactor, an oscillation supporting portion, and a second contactor. The first contactor has an outer side surface shaped in a column that surrounds a central axis. The oscillation supporting portion supports the first contactor to allow the central axis to oscillate. The second contactor is disposed opposite to the first contactor. One of the first contactor and the second contactor includes a plurality of first contact portions provided to surround the central axis on a plane perpendicular to the central axis, and the other includes a second contact portion provided to protrude toward a space surrounded by the plurality of the first contact portions. The second contact portion has a contact surface which is a curved surface exposed toward the space to surround the central axis. |
| US11031202B2 |
Magnetic latching relay capable of resisting short-circuit current
A magnetic latching relay comprises a metal insertion portion of a contact portion and a slot of a base. The metal insertion portion is composed of two segments having different depth corresponding to the slot; when one segment is fitted to bottom wall of the slot, a preset gap is formed between the other segment and the bottom wall. The slot is formed by two segments having different thickness corresponding to the metal insertion portion; when two side walls of one segment of the slot are adapted to two sides of thickness of metal insertion portion, two side walls of the other segment of the slot and two sides of thickness of metal insertion portion respectively form a preset gap; one segment of metal insertion portions cooperates with the other segment of the slot, and the other segment of the metal insertion portion cooperates with one segment of the slot. |
| US11031200B2 |
Relay cycle life extender
A relay assembly that includes a relay, a bypass switch and a controller. The relay includes an electromechanical switch with an open state and a closed state. The bypass switch is operatively coupled in parallel with the electromechanical switch of the relay, and also has an open state and a closed state. The controller is operatively coupled to the relay and the bypass switch, and is configured to switch the bypass switch from the open state to the closed state, then switch the relay between the open state and closed state, and then switch the bypass switch back to the open state. In some cases, the bypass switch includes a TRIAC. The controller may be configured to maintain the bypass switch in the closed state for less than 100 milliseconds before switching back to the open state. |
| US11031196B2 |
Electric switch of the normally open type
An electric switch of the normally open type includes a body, an actuator moveable between a high rest position and a low active contact position, and first second elastically deformable contact blades supported by the body. A first contact section of the first contact blade extends above a second contact section of the second contact blade. The contact sections are superposed and distanced from each other when the actuator is in high rest position, and they are in mutual electrical contact when the actuator is in low position to establish an electrical switching path. The first contact section includes a longitudinal rib that protrude downwards with respect to the plane of the underside of the first section and which is able to cooperate with the transversal contact edge of the central opening. The transversal contact edge comprises a transverse contact bend for cooperating with convexity of the longitudinal rib. |
| US11031195B2 |
Laser processing of fabric for electronic devices
An electronic device such as a cover for a portable device or other electronic equipment may have circuitry mounted in a housing. The housing may be formed from layers of material such as fabric and polymer layers. The circuitry of the electronic device may include components mounted on a printed circuit. The components may include movable components such as keys in a keyboard. A fabric layer may overlap the keys. Border regions of the fabric layer that surround each key may be characterized by a stiffness. To ensure that the keys or other movable components in the device exhibit satisfactory stiffness levels, the keys can be tested and selected border regions or other fabric layer portions may be laser ablated or otherwise processed to locally reduce fabric layer stiffness. |
| US11031194B2 |
Switch and imaging apparatus
A switch includes a first elastic member that is conductive and configured to contact the first signal pattern, a second elastic member that is conductive and configured to contact the second signal pattern, and a third elastic member that is conductive and configured to contact the third signal pattern. When a first pressing operation is performed for the press member so as to move the press member from an initial position in the pressing direction the first and second signal patterns are electrically connectable via the first and second elastic members. After the first pressing operation, when a second pressing operation is performed for the press member so as to move the press member in a direction opposite to the pressing direction by the first and second elastic members, the first to third signal patterns are electrically connectable via the first to third elastic members. |
| US11031191B2 |
Circuit breaker linking system for movable contact
A device for switching an electric current with separable electrical contacts includes a switching mechanism including: a switching shaft that is coupled to a mobile electrical contact; a trip hook that is pivotably mounted on a fixed support of the mechanism; a linking system coupling the switching shaft to the trip hook. The linking system includes a first pair of connecting rods that are pivotably mounted on the trip hook and a second pair of connecting rods that are mounted so as to pivot with a crank of the switching shaft. The first connecting rods are connected to the second connecting rods with a single axis of articulation which forms a pivot link between the first connecting rods and the second connecting rods. |
| US11031190B2 |
Medium or high voltage switch having spherical-bearing-type mechanical connection
A medium or high voltage switch including a moveable contact element and a stationary contact element is described. Therein, a moveable-contact guiding portion of the moveable contact element and a stationary-contact guiding portion of the stationary contact element are shaped for establishing a spherical-bearing-type mechanical connection between each other, thereby aligning a center of the moveable-contact guiding portion with a center of the stationary-contact guiding portion while allowing an angular flexion between the moveable and stationary contact elements. Furthermore, at least one of the stationary-contact guiding portion and the moveable-contact guiding portion is electrically insulating. |
| US11031188B2 |
Solid electrolytic capacitor
A solid electrolytic capacitor includes a capacitor element, an anode frame, a cathode frame, and an exterior body. The capacitor element includes an anode body, a dielectric body disposed on a surface of the anode body, and a cathode part. The anode frame is electrically connected to the anode body. The cathode frame is electrically connected to the cathode part. The exterior body seals the capacitor element in a state that a part of the anode frame and a part of the cathode frame are exposed from the exterior body. At least one of the anode frame and the cathode frame has at least one groove on a surface adhered to the exterior body. The at least one groove intersects with an extending direction in which the anode frame or the cathode frame extends from the capacitor element to outside of the exterior body. |
| US11031185B2 |
Electronic component
An electronic component includes external electrodes formed on an external surface of a body to be electrically connected to internal electrodes, and containing metal particles and glass, wherein the metal particles include particles having a polyhedral shape. |
| US11031183B2 |
Multilayer ceramic capacitor having ultra-broadband performance
The present invention is directed to a multilayer ceramic capacitor comprising a first external terminal disposed along a first end, a second external terminal disposed along a second end that is opposite the first end, and an active electrode region containing alternating dielectric layers and active electrode layers. At least one of the electrode layers comprises a first electrode and a second electrode. The first electrode is electrically connected with the first external terminal and has a first electrode arm comprising a main portion and a step portion. The main portion has a lateral edge extending from the first end of the multilayer capacitor and the step portion has a lateral edge offset from the lateral edge of the main portion. The second electrode is electrically connected with the second external terminal. |
| US11031177B2 |
Power converter
A power converter includes a magnetic core and a plurality of windings. The plurality of windings are each wound around the magnetic core and bent to have a portion extending in the direction in which the magnetic core extends. Each of the plurality of windings is bent to include a region located farthest out from the magnetic core among all of the plurality of windings. |
| US11031176B2 |
Reactor
Provided is a reactor that can prevent a temperature sensor from being attached to a wound portion of a coil in a wrong direction. The reactor includes a temperature sensor having a sensor main portion attached to an outer peripheral surface of a wound portion and a wire extending from the sensor main portion. A sensor housing portion houses the sensor main portion. The sensor main portion has a detection surface facing the wound portion and a projecting portion protruding from a back surface of the sensor main portion opposite of the detection surface. The sensor housing portion has a pair of side wall portions opposing respective side surfaces of the sensor main portion. A height of a portion of the sensor main portion that has the projecting portion is larger than a width of that portion and larger than the distance between the side wall portions. |
| US11031174B2 |
Thin film type inductor
A thin film type inductor includes: a body including a support member including a through hole, upper and lower coils disposed on upper and lower surfaces of the support member, respectively, and a via penetrating through the support member while connecting the upper and lower coils to each other; and external electrodes disposed on an external surface of the body. A coil pattern directly connected to the via may include an inclined surface. |
| US11031166B2 |
Electromagnet-switchable permanent magnet device
A switchable permanent magnetic unit is disclosed. The unit comprises: a housing, first and second permanent magnets, and a conductive coil. The first magnet is mounted within the housing and the second magnet is rotatable between first and second positions and mounted within the housing in a stacked relationship with the first magnet. The unit generates a first level of magnetic flux at a workpiece contact interface when the second magnet is in the first position and a second level of magnetic flux at the interface when the second magnet is in the second position, the second level being greater than the first level. The conductive coil is arranged about the second magnet and generates a magnetic field. A component of the conductive coil's magnetic field is directed from S to N along the second magnet's N-S pole pair when the second magnet is in the first position. |
| US11031164B2 |
Attachment devices for inductive interconnection systems
Embodiments describe a receiving element that includes a ferromagnetic structure axially symmetrical around a central axis disposed along a length of the ferromagnetic structure. The ferromagnetic structure includes a groove region defining two end regions on opposing sides of the groove region, where the groove region has a smaller length than the two end regions. The receiving element also includes an inductor coil wound about the groove region of the ferromagnetic structure and in between the two end regions. |
| US11031163B2 |
Grain-oriented electrical steel sheet and method for manufacturing the same
An excellent low noise property and excellent low iron loss property are obtained. A grain-oriented electrical steel sheet includes refined magnetic domains formed by electron beam irradiation. When the maximum magnetic flux density is 1.7 T, the grain-oriented electrical steel sheet has a residual magnetic flux density of 0.1 to 0.7 times the residual magnetic flux density before the electron beam irradiation and a maximum magnetizing force of 1.1 to 2.0 times the maximum magnetizing force before the electron beam irradiation. |
| US11031161B2 |
Method of manufacturing a bulk nitride, carbide, or boride-containing material
A three-dimensional object made of a bulk nitride, carbide, or boride-containing material may be manufactured using a powder bed fusion additive manufacturing technique. A layer of powder feed material may be distributed over a solid substrate and scanned with a high-energy laser beam to locally melt selective regions of the layer and form a pool of molten feed material. The pool of molten feed material may be exposed to gaseous nitrogen, carbon, or boron to respectively dissolve nitride, carbide, or boride ions into the pool of molten feed material to produce a molten nitrogen, carbon, or boron-containing solution. The molten nitrogen, carbon, or boron-containing solution may cool and solidify into a solid layer of fused nitride, carbide, or boride-containing material. In one form, the three-dimensional object may comprise a permanent magnet made up of a plurality of solid layers of fused iron nitride material having a magnetic Fe16N2 phase. |
| US11031159B2 |
Ceramic material, varistor and methods of preparing the ceramic material and the varistor
A ceramic material, a varistor and methods for forming a ceramic material and a varistor are disclosed. In an embodiment, a ceramic material includes ZnO as a main component and additives selected from the group consisting of an Al3+-containing solution, a Ba2+-containing solution, and at least one compound containing a metal element, wherein the metal element is selected from the group consisting of Bi, Sb, Co, Mn, Ni, Y, and Cr. |
| US11031156B2 |
3-d printed electrical cable
Embodiments are directed to a method for manufacturing a product comprising: establishing, by a computing device comprising a processor, at least one parameter of a particular instance of a component to be used in the product, adapting, by the computing device, a baseline model of the component based on the at least one parameter to accommodate use of the particular instance of the component, growing a structure based on the adapted model to accommodate the particular instance of the component using an additive manufacturing technique, coupling the structure to the particular instance of the component, growing an electrical harness by using additive printing to establish an electrical cable, and assembling the product by coupling the electrical harness to the particular instance of the component. |
| US11031153B2 |
Water tree resistant cables
Water tree resistant cables are disclosed. The cables include a water tree resistant insulation shield and water tree resistant conductor shield. The insulation layer can be free of any water tree retardant additives. Methods of making and using the water tree resistant cables are further disclosed. |
| US11031152B2 |
Flame- retardant electrical cable
A flame-retardant electric cable has a core including at least one electric conductor, an electrically insulating coating and an outermost layer made from a substantially thermoplastic, low smoke zero halogen flame-retardant polymer composition. The composition includes a polymeric base made of at least one polyethylene homopolymer or copolymer having a density of 0.94 g/cm3 at most. The composition further includes 60-64% by weight of a metal hydroxide, at least 2% by weight of an ammonium coated montmorillonite having average particle dimensions of from 5 to 20 μm, and a polysiloxane. |
| US11031148B2 |
Transportable sub-critical modules for nuclear power generation
Various embodiments of a transportable nuclear power generator having a plurality of subcritical power modules are disclosed. Each of the plurality of subcritical power modules includes a fuel cartridge, a power conversion unit, and a housing substantially enclosing the fuel cartridge and the power conversion unit. The fuel cartridge contains a nuclear fuel and has a proximal end and a distal end. The power conversion unit includes a compressor turbine disposed at the proximal end of the fuel cartridge and a power turbine disposed at the distal end of the fuel cartridge. At least one of the plurality of subcritical power modules is movable with respect to the other of the plurality of subcritical power modules between a first position and a second position to control criticality of the nuclear fuel contained in the fuel cartridges of the plurality of subcritical power modules. |
| US11031146B2 |
Method for heating a primary coolant in a nuclear steam supply system
A method for heating primary coolant in a nuclear supply system in one embodiment includes filling a primary coolant loop within a reactor vessel and a steam generating vessel that are fluidly coupled together with a primary coolant, drawing a portion of the primary coolant from the primary coolant loop and into a start-up sub-system, heating the portion of the primary coolant to form a heated portion of the primary coolant, and injecting the heated portion of the primary coolant back into the primary coolant loop. The primary coolant may be heated to a no-load operating temperature. |
| US11031145B2 |
Method of manufacturing a reinforced nuclear fuel cladding using an intermediate thermal deposition layer
A method is described that includes the steps of making a thin walled Zr alloy tube, loading nuclear fuel pellets into the tube, compressing the tube onto the fuel pellets to substantially reduce free space around the fuel pellets, positioning end plugs at each of two ends of the tube, filling the tube with a heat transferring gas, and coating the compressed tube with a corrosion resistant material using a thermal deposition process, such as cold spray, before inserting the tube into a pre-formed SiC composite cover having at least one closed end. |
| US11031142B2 |
Doppler reactivity augmentation device
A fast neutron nuclear reactor contains a nuclear reactor core having an array of device locations. Some device locations in the nuclear reactor core contain fissile and fertile nuclear fuel assembly devices. One or more other device locations in the nuclear reactor core contain Doppler reactivity augmentation devices that amplify the negativity of the Doppler reactivity coefficient within the nuclear reactor core. In some implementations, a Doppler reactivity augmentation device can also reduce the coolant temperature coefficient within the nuclear reactor core. Accordingly, a Doppler reactivity augmentation device contributes to a more stable nuclear reactor core. |
| US11031141B2 |
Providing a neutron source by directing a beam onto a target in a nuclear reactor to emit neutrons from the reactor
A method including providing a nuclear reactor neutron source that includes an enclosure delimiting a chamber, a nuclear reactor core arranged inside the chamber and configured to produce neutrons from a nuclear fuel element inside the nuclear reactor core; installing a beam generator arranged to generate a beam directed into the chamber; and installing, inside the chamber, a target arranged to eject neutrons upon impact of the beam such that neutrons are ejected from the target and emitted from the chamber. |
| US11031140B2 |
Systems and methods for maintaining cover gas in nuclear reactors
Cover gas control systems include a reservoir and injection path for direct injection into fuel transfer machinery. If seals in the fuel handling machinery leak, cover gas is provided from the reservoir to flow to the leak without contamination from a reactor to which the fuel transfer machinery is joined. This providing cover gas may be passive or automatic in response to a detected low pressure level, detected ambient air ingress, low volume level of cover gas, or manually actuated through an operator. The cover gas may be injected from below the leak but above the reactor. A limitation in the injection path keeps cover gas injection at rates sufficient to allow operator reaction and sealing before the reservoir is depleted. A pressure pulse transmitter, blowout preventer, and transfer port plug are useable in the systems, which can be implemented in fuel handling machinery for reactors using a cover gas. |
| US11031134B2 |
Monitoring individuals for water retention management
Methods, systems, and computer program products are provided for monitoring an entity for personal water retention management. Health data for the entity is monitored via one or more sensors. Changes in the monitored health data are tracked over time. Based on the monitored health data, occurrence of a water retention triggering event associated with a provided medical recommendation is determined. When the water retention triggering event is determined to have occurred, the medical recommendation is provided to the entity. |
| US11031129B2 |
Systems, methods, user interfaces and analysis tools for supporting user-definable rules and smart rules and smart alerts notification engine
Computer implemented methods and systems operating on real-time data derived from a plurality of data sources for supporting user-definable rules and providing user notifications for providing user notifications and smart alarms. A user-interface configured to dynamically display a parameter and toggle between a tabular display and a graphical display is generated. At least one of a user-defined rule or a threshold value associated with the parameter from a user-interface element is received. A notification is provided to a user when the parameter satisfies the user-defined rule or exceeds the threshold value. |
| US11031128B2 |
Augmented reality-based training and troubleshooting for medical devices
Augmented reality-based training and troubleshooting is described for medical devices. An electronic mobile device can be equipped with an AR application that, when executed, causes the electronic mobile device to provide augmented reality-based training on how to set up, or perform maintenance on, one or more components of a medical device. The AR application, when executed, can also cause the electronic mobile device to provide augmented reality-based troubleshooting for one or more components of a medical device. |
| US11031122B1 |
Methods, systems, and apparatus for improving operating room throughput
Apparatus, systems, and methods relate to one or more operating rooms; one or more display screens located in the one or more operating rooms; one or more display screens located outside of the one or more operating rooms; and a computer apparatus comprising computer hardware and software, which is operatively connected to an EMR system and is configured so as to receive from the EMR system utilization information regarding the one or more operating rooms. The computer apparatus is further configured to cause to be displayed one or more generated graphics or graphical user interfaces (GUIs) showing operating room efficiency information, in real time, for view on the one or more display screens in the one or more operating rooms, and on the one or more display screens located outside of the one or more operating rooms. |
| US11031120B1 |
System, method, and non-transitory computer-readable storage media related to correction of vision defects using a visual display
A method of at-home monitoring of eye conditions using a head mounted display that is capable of establishing a visual model associated with a patient. The visual model may include data related to a quality of the patient's vision. The patient may use the system to establish a visual model periodically, such as daily, and the system may compare the visual model to previous visual models and send an alert to the patient's physician if changes meeting a given criteria are detected. This may allow the physician to immediately take steps to save the patient's eyesight where a delay in treatment may result in vision loss. |
| US11031119B2 |
Dental images processed with deep learning for national security
Deep learning of dental images for national security is described. A computer may receive dental images of a patient from a dental provider. The computer is configured to match dental images to law enforcement databases such as a terrorist database. The process begins with matching a dental image to an anatomy probability dataset and a pathology probability dataset, then correlating it with a patient database to identify a person of interest. With different resolutions each neural network deep learns to probability map and detect different dental object probabilities to authenticate an individual. Further, the dental images will be associated with GPS coordinates to track movements of an individual. The datasets will be provided to e-commerce providers, e-commerce consumers, e-commerce administrators, machine learning entities, government entities and law enforcement entities which may exchange or transfer the data over a communication network such as the internet to locate a person of interest. |
| US11031114B2 |
Methods for operating mode transitions and related infusion devices and systems
Infusion systems, infusion devices, and related operating methods are provided. An exemplary method involves operating an infusion device to deliver fluid to a user in accordance with a first operating mode of a plurality of operating modes, obtaining operational information pertaining to the first operating mode, and obtaining clinical information pertaining to the user. A destination operating mode of the plurality of operating modes is determined based at least in part on the operational information and the clinical information, and the infusion device is operated to deliver the fluid in accordance with the destination operating mode in a manner that is influenced by at least a portion of the operational information pertaining to the first operating mode. |
| US11031111B1 |
Systems and methods for optimizing clinical workflow using a prioritization engine
The disclosed subject matter is directed to systems and methods for processing multiple sources of data into a clinical data prioritization and visualization framework that enhances and expedites clinical workflow. |
| US11031107B2 |
Extracting patient information from an electronic medical record
A mechanism is provided in a data processing system comprising at least one processor and at least one memory comprising instructions, which are executed by the at least one processor and configure the processor to implement a patient information extractor. The patient information extractor receives a query specification for executing a query on a patient electronic medical record (EMR). The query specification provides parameters indicating a methodology for extracting search results from the patient EMR. The patient information extractor retrieves the patient EMR from a patient registry. The patient information extractor automatically executes the query specification on the retrieved patient EMR to thereby extract the search results from the patient EMR in accordance with the parameters of the query specification. The patient information extractor automatically processes the extracted search results to generate a patient indicator value. The patient indicator value represents an answer to a question about the patient. A patient evaluation operation is performed based on the patient indicator value. |
| US11031106B2 |
Use of 5G IoT network for a virtual medical system
Fifth generation wireless systems (5G) are on the horizon and IoT is taking the center stage as devices are expected to form a major portion of this 5G network paradigm. IoT technologies such as machine to machine communication complemented with intelligent data analytics are expected to drastically change landscape of various industries. This application discloses a novel approach (virtual) to medical system using IoT network and artificial intelligence. It instantly allows patients to obtain information data about their medical status and recommendations for the steps they need to take. This method eliminates a lot of the steps the patient needs to take in present medical systems. |
| US11031104B2 |
Systems and methods for dispensing a statin medication over the counter
Systems and methods are provided for over the counter statin delivery to a subject. Survey results from the subject are run against a first plurality of filters. When a filter in the first plurality of filters is fired, the subject is deemed not qualified. The survey results are also run against a second plurality of filters. When a respective filter in the second plurality is fired, the subject is provided with a corresponding warning. The method proceeds to a fulfillment process when no filter in the first plurality fires and the subject has acknowledged each warning associated with each fired filter in the second plurality. The fulfillment stores the composition order, communicates a drug facts label for the statin to the subject, and authorizes, upon subject confirmation that the label has been read, provision of the statin to the subject, the authorization including a destination associated with the subject. |
| US11031102B2 |
Risk evaluation and management strategy involving patient follow-ups relating to the use or discontinuation of a complement inhibitor
This invention provides, inter alia, a complement-inhibitor-based treatment plan coupled with a risk evaluation and management strategy (“REMS”) and a safety support program (“SSP”) for reinforcing the REMS. The REMS and SPP are implemented using one or more computer devices with software tools programmed to enforce conditions of the REMS and/or prompt follow-ups by registered nurses enrolled in the SSP. The software tool(s) determines whether a prescriber requesting the complement inhibitor has agreed to abide by the REMS, and can prompt a provider of the complement inhibitor to provide updated educational materials to the prescriber at predetermined times or intervals, to monitor the prescriber for compliance with the REMS, and/or to monitor patients for signs of adverse events. Using exemplary embodiments described herein, a risk of adverse events (especially, but not limited to, meningococcal infections) can be managed and an incidence of the adverse events can be reduced. |
| US11031100B2 |
Size-based sequencing analysis of cell-free tumor DNA for classifying level of cancer
A classification of a level of cancer in an organism is determined by analyzing a biological sample of the organism. The biological sample comprises clinically-relevant DNA and other DNA. At least some of the DNA is cell-free in the biological sample. An amount of a first set of DNA fragments from the biological sample corresponding to each of a plurality of sizes is measured. A first value of a first parameter is calculated based on the amounts of DNA fragments at the plurality of sizes. The first value is compared to a reference value. A classification of a level of cancer in the organism is determined based on the comparison. |
| US11031097B2 |
System for genomic data processing with an in-memory database system and real-time analysis
A system and a method for analyzing and evaluating genome data in the course of personalized medicine. In-memory technology is provided for processing of genome data and its real-time analysis as a holistic process in the course of personalized medicine. The cloud application helps physicians and researchers to identify the genetic roots for certain tumor types in the treatment of diseases correlating to genomic variants or mutations, such as cancer diseases. The system combines the latest international research results with patient-specific genomic data while eliminating the need for long-lasting manual searches of all dispositions in distributed international research and literature data sources. |
| US11031095B2 |
Assay systems for determination of fetal copy number variation
The present invention provides processes for determining accurate risk probabilities for chromosome dosage abnormalities. Specifically, the invention provides non-invasive evaluation of genomic variations through chromosome-selective sequencing and non-host fraction data analysis of maternal samples. |
| US11031093B2 |
Systems and methods for identifying thermodynamically relevant polymer conformations
Systems, methods and non-transitory computer readable media identify favored polymer conformations. One or more residues are identified and may be replaced in the polymer, or the original primary sequence of the polymer may be retained. The conformations of residues in a subset of residues in a region of the identified one or more residues are altered. This conformational adjustment is repeated for other subsets of residues in the region of the identified one or more residues, and for other conformations, thereby deriving a plurality of polymer structures. A set of clusters is generated for each residue of the polymer using the conformationally adjusted structures, thereby creating sets of clusters. Structures in the plurality of structures are grouped into subgroups when the structures fall into the same clusters across a threshold number of the sets of clusters. One or more physical properties are determined for structures in subgroups, thereby identifying one or more thermodynamically relevant polymer conformations for the polymer. |
| US11031088B2 |
Hot-cold VTH mismatch using VREAD modulation
Methods and systems for improving the reliability of data stored within a semiconductor memory over a wide range of operating temperatures are described. The amount of shifting in the threshold voltages of memory cell transistors over temperature may depend on the location of the memory cell transistors within a NAND string. To compensate for these variations, the threshold voltages of memory cell transistors in the middle of the NAND string or associated with a range of word lines between the ends of the NAND string may be adjusted by increasing the word line voltages biasing memory cell transistors on the drain-side of the selected word line when the read temperature is greater than a first threshold temperature and/or decreasing the word line voltages biasing memory cell transistors on the source-side of the selected word line when the read temperature is less than a second threshold temperature. |
| US11031083B2 |
Apparatuses and methods for decoding addresses for memory
Apparatuses and methods for decoding addresses for memory are disclosed. An example apparatus includes a memory cell array and a row decoder. The memory cell array includes a bank of memory including a plurality of groups of memory. Each of the groups of memory includes sections of memory, and each of the sections of memory including memory cells arranged in rows and columns of memory. The row decoder decodes addresses to access a first group of memory to include rows of prime memory from a first block of memory and to include rows of prime memory from a second block of memory. The row decoder decodes the addresses to access a second group of memory to include rows of prime memory from the second block of memory and to include rows of redundant memory. The rows of redundant memory are shared with the first and second blocks of memory. |
| US11031082B2 |
Non-volatile memory with double capa implant
An EEPROM includes a floating gate transistor having a source region, a channel region and a drain region. A first capa implant zone on a drain-side of the floating gate transistor has a first dopant concentration level. A second capa implant zone in the first capa implant zone adjacent the drain region has a second dopant concentration level that is greater than the first dopant concentration level. A gate oxide region insulates the floating gate electrode from the channel region, first capa implant zone and second capa implant zone. A thickness of the gate oxide region is thinner at the second capa implant zone than at the channel region and first capa implant zone. |
| US11031081B2 |
Apparatus having memory arrays and having trim registers associated with memory array access operation commands
Memories include a controller that, in response to receiving a command to perform an access operation on an array of memory cells, might be configured to perform the access operation on the array of memory cells using trims corresponding to trim settings for the access operation. The controller, in response to receiving a command or a command sequence while performing the access operation that is indicative of a desire to suspend the access operation and load updated trim settings, might be further configured to suspend the access operation, load updated trim settings for the access operation into a particular trim register of a plurality of trim registers, set updated trims for the access operation in response to the updated trim settings in the particular trim register, and resume the access operation using the updated trims. |
| US11031080B1 |
Architecture for fast content addressable memory search
A search pattern is generated based on an input search word comprising a first sequence of bits. The search pattern comprises a first set of signals representing the input search word and a second set of signals representing a second sequence of bits comprising an inverse of the first sequence of bits. The search pattern is provided as input to search lines of a content addressable memory (CAM) block. The search pattern causes at least one string in the CAM block to be conductive and provide a signal to a page buffer connected to the string in response to the input search word matching a data entry stored on the string. A location of the data entry is determined based on data read from the page buffer and the location is output. |
| US11031078B2 |
SEU stabilized memory cells
A single-event-upset (SEU) stabilized memory cell includes a latch portion including a cross-coupled latch, and at least one cross coupling circuit path in the latch portion including a first series-connected pair of vertical resistors. |
| US11031077B2 |
Resistance variable memory device
A resistance variable memory device may include a plurality of memory cells and a control circuit block. The memory cells may be connected between a global word line and a global bit line. The control circuit block may control the memory cells. The control circuit block may include a write pulse control block. The write pulse control block may include a high resistance path circuit and a bypass circuit connected between the global word line and a selected memory cell. The write pulse control block may selectively enable any one of the high resistance path circuit and the bypass circuit in accordance with a position the selected memory cell. |
| US11031075B2 |
High bandwidth register file circuit with high port counts for reduced bitline delay
A high bandwidth register file circuit that significantly reduces the shared local read bitline RC delay to enable ultra-high performance PRFs with high port counts. In one example, the register file circuit includes read stack nfets in a multiplexer circuit instead of the memory cell causing the local read bitline RC to be independent of the number of read and write ports of the memory cell. |
| US11031071B2 |
Nonvolatile memory device, operating method of nonvolatile memory device, and storage device including nonvolatile memory device
A nonvolatile memory device includes a memory cell region including first metal pads and a memory cell array, and a peripheral circuit region including second metal pads, row decoder circuitry that is connected to the rows of the memory cells through word lines and controls voltages of the word lines, and page buffer circuitry that is connected to the columns of the memory cells through bit lines. The page buffer circuitry is configured to obtain first values by performing a first sensing operation on first bit lines of the bit lines through the first transistors and obtain second values by performing a second sensing operation on the second bit lines of the bit lines through the second transistors, wherein the first values or the second values are inverted. The peripheral circuit region is vertically connected to the memory cell region by the metal pads directly. |
| US11031067B2 |
Semiconductor memory device for securing sensing margin at cryogenic temperature
A semiconductor memory device includes a controller for sequentially activating first and second control signals and activating a third control signal during an amplification period, in a pseudo cryogenic temperature, a first driver for driving a first power source line with a first voltage during an initial period of the amplification period, based on the first control signal, a second driver for driving the first power source line with a second voltage during a later period of the amplification period, based on the second control signal, a third driver for driving a second power source line with a third voltage during the amplification period, based on the third control signal, and a sense amplifier for primarily amplifying a voltage difference between a data line pair using the first and third voltages during the initial period, and secondarily amplifying the difference using the second and third voltages during the later period. |
| US11031059B2 |
Magnetic random-access memory with selector voltage compensation
Magnetic random-access memory (MRAM) circuits are provided herein. In one example implementation, an MRAM circuit includes control circuitry coupled to a magnetic tunnel junction (MTJ) element in series with a selector element. This control circuitry is configured to adjust current through the selector element when the selector element is in a conductive state. The circuit also includes a compensation circuitry configured to compensate for a offset voltage across the selector element in the conductive state based on adjustments to the current through the selector element. An output circuit is also configured to report a magnetization state of the MTJ element. |
| US11031049B2 |
Flexible memory system with a controller and a stack of memory
Embodiments of a system and method for providing a flexible memory system are generally described herein. In some embodiments, a substrate is provided, wherein a stack of memory is coupled to the substrate. The stack of memory includes a number of vaults. A controller is also coupled to the substrate and includes a number of vault interface blocks coupled to the number of vaults of the stack of memory, wherein the number of vault interface blocks is less than the number of vaults. |
| US11031047B2 |
Hard-disk pulling device
A hard-disk pulling device includes two separating plates, a cover member, a hook portion and a linkage mechanism. A receiving space is defined between the separating plates for receiving a hard disk unit. The cover member is pivotally connected to one of the separating plates to selectively cover the receiving space. The linkage mechanism includes a first linking rod pivotally connected to the cover member, and a second linking rod pivotally connected to the first linking rod and the separating plate. The hook portion is connected to one end of the linkage mechanism facing away from the cover member for directly abutting against the hard disk unit. When the cover member is rotated to pull the hook portion through the linkage mechanism, the hook portion pushes the hard disk unit out of the receiving space. |
| US11031045B2 |
Systems and methods for media production and editing
The various embodiments disclosed herein relate to systems and methods for generating a derived media clip corresponding to a live event. In particular, the system comprises a processor configured to receive a plurality of content streams corresponding to the live event, each content stream corresponding to a content source. The processor is further configured to generate an annotated timeline for one or more of the plurality of content streams and receive a first user input requesting the derived media clip. The processor is then configured to generate the derived media clip based on the user input and the annotated timeline. |
| US11031030B1 |
Automatic tonearm lifter
An automatic tonearm lifter for use in a turntable that includes a main body and a tonearm rotatably mounted on the main body. The tonearm lifter includes a casing adapted to be fixedly mounted to the main body of the turntable, a lifting unit adapted to be mounted to the main body, adapted for supporting the tonearm, movable relative to the casing along a vertical axis, and non-rotatable about the axis relative to the casing, and a rotating unit including a threaded seat that is rotatable about the axis and that is threadably engaging the lifting unit, and a driving module that is connected to the threaded seat and that is operable to drive rotation thereof, thereby moving the lifting unit along the axis. |
| US11031029B2 |
Pitch detection algorithm based on multiband PWVT of teager energy operator
A pitch detection method. Such a pitch detection method may have M-PWVT-TEO algorithm to detect a pitch value from a speech signal, apply a partial auto-correlation to a current signal with the pitch value to compensate the delay of the pitch value. Also, the pitch detection method may apply a full auto-correlation to the speech signal where the pitch value is not detected to recover on-sets of the speech signal. |
| US11031023B2 |
Signal processing device, control method, program and storage medium
A converter includes a time window cut-out block, a fast Fourier transform (FFT) block, an attenuation amount limitation block, a quantization noise attenuation block, an overtone generation block, an inverse fast Fourier transform (IFFT) block, and a time window resynthesis block. The attenuation amount limitation block determines the maximum attenuation amount of quantization noise to be attenuated in the quantization noise attenuation block based on the magnitude of a signal level of sound data supplied from the time window cut-out block. The quantization noise attenuation block adjusts amplitude in a frequency domain based on the maximum attenuation amount determined by the attenuation amount limitation block, to attenuate the quantization noise. |
| US11031022B2 |
Noise filling concept
Noise filling of a spectrum of an audio signal is improved in quality with respect to the noise filled spectrum so that the reproduction of the noise filled audio signal is less annoying, by performing the noise filling in a manner dependent on a tonality of the audio signal. |
| US11031021B2 |
Inter-channel phase difference parameter encoding method and apparatus
This application discloses an IPD parameter encoding method, including: obtaining a reference parameter used to determine an IPD parameter encoding scheme of a current frame of a multi-channel signal; determining the IPD parameter encoding scheme of the current frame based on the reference parameter, where the determined IPD parameter encoding scheme of the current frame is one of at least two preset IPD parameter encoding schemes; and processing an IPD parameter of the current frame based on the determined IPD parameter encoding scheme of the current frame. The technical solutions provided in this application can improve encoding quality of the multi-channel signal. |
| US11031020B2 |
Speech/audio bitstream decoding method and apparatus
A speech/audio bitstream decoding method includes acquiring a speech/audio decoding parameter of a current speech/audio frame, where the foregoing current speech/audio frame is a redundant decoded frame or a speech/audio frame previous to the foregoing current speech/audio frame is a redundant decoded frame, performing post processing on the acquired speech/audio decoding parameter according to speech/audio parameters of X speech/audio frames, where the foregoing X speech/audio frames include M speech/audio frames previous to the foregoing current speech/audio frame and/or N speech/audio frames next to the foregoing current speech/audio frame, and recovering a speech/audio signal using the post-processed speech/audio decoding parameter of the foregoing current speech/audio frame. The technical solutions of the speech/audio bitstream decoding method help improve quality of an output speech/audio signal. |
| US11031018B2 |
System and method for personalized speaker verification
Methods, systems, and apparatus, including computer programs encoded on computer storage media, for personalized speaker verification are provided. One of the methods includes: obtaining first speech data of a speaker as a positive sample and second speech data of an entity different from the speaker as a negative sample; feeding the positive sample and the negative sample to a first model for determining voice characteristics to correspondingly output a positive voice characteristic and a negative voice characteristic of the speaker; obtaining a gradient based at least on the positive voice characteristic and the negative voice characteristic; and feeding the gradient to the first model to update one or more parameters of the first model to obtain a second model for personalized speaker verification. |
| US11031014B2 |
Voice detection optimization based on selected voice assistant service
Systems and methods for optimizing voice detection via a network microphone device (NMD) based on a selected voice-assistant service (VAS) are disclosed herein. In one example, the NMD detects sound via individual microphones and selects a first VAS to communicate with the NMD. The NMD produces a first sound-data stream based on the detected sound using a spatial processor in a first configuration. Once the NMD determines that a second VAS is to be selected over the first VAS, the spatial processor assumes a second configuration for producing a second sound-data stream based on the detected sound. The second sound-data stream is then transmitted to one or more remote computing devices associated with the second VAS. |
| US11031013B1 |
Task completion based on speech analysis
Method starts with processing, by a processor, audio signal to generate audio caller utterance and transcribed caller utterance. Processor generates identified task based on transcribed caller utterance. Processor samples audio caller utterance to generate samples of audio caller utterance. Processor generates loudness result based on loudness values of samples using loudness neural network associated with identified task. Processor generates pitch result based on pitch values of samples using pitch neural network associated with identified task. Processor generates tone result for each word in transcribed caller utterance using tone neural network associated with identified task. Using task completion probability neural network associated with identified task, processor generates task completion probability result that is based on at least one of: loudness result, pitch result, or tone result. Other embodiments are disclosed herein. |
| US11031012B2 |
System and method of correlating mouth images to input commands
A system for automated speech recognition utilizes computer memory, a processor executing imaging software and audio processing software, and a camera transmitting images of a physical source of speech input. Audio processing software includes an audio data stream of audio samples derived from at least one speech input. At least one timer is configured to transmit elapsed time values as measured in response to respective triggers received by the timer. The audio processing software is configured to assert and de-assert the timer triggers to measure respective audio sample times and interim period times between the audio samples. The audio processing software is further configured to compare the interim period times with a command spacing time value corresponding to an expected interim time value between commands, thereby determining if the speech input is command data or non-command data. |
| US11031010B2 |
Speech recognition system providing seclusion for private speech transcription and private data retrieval
A method includes receiving a voice input via a microphone of an electronic device, and determining whether the voice input contains speech from an authorized user of the electronic device or speech from an unauthorized user. The method includes in response to determining that the voice input contains speech from the authorized user: determining whether the speech contains private speech or public speech; in response to determining that the speech contains private speech, processing the voice input through a local automatic speech recognition (ASR) engine within the electronic device, the local ASR engine converting the voice input from audio format to text format and outputting a text transcription of the private speech; and in response to determining that the speech does not contain private speech, forwarding the voice input through a communication interface associated with a network-connected external device for processing the voice input at the network-connected external device. |
| US11031005B2 |
Continuous topic detection and adaption in audio environments
A mechanism is described for facilitating continuous topic detection and adaption in audio environments, according to one embodiment. A method of embodiments, as described herein, includes detecting a term relating to a topic in an audio input received from one or more microphones of the computing device including a voice-enabled device; analyzing the term based on the topic to determine an action to be performed by the computing device; and triggering an event to facilitate the computing device to perform the action consistent with the term and the topic. |
| US11031002B2 |
Recognizing speech in the presence of additional audio
The technology described in this document can be embodied in a computer-implemented method that includes receiving, at a processing system, a first signal including an output of a speaker device and an additional audio signal. The method also includes determining, by the processing system, based at least in part on a model trained to identify the output of the speaker device, that the additional audio signal corresponds to an utterance of a user. The method further includes initiating a reduction in an audio output level of the speaker device based on determining that the additional audio signal corresponds to the utterance of the user. |
| US11030997B2 |
Slim embedding layers for recurrent neural language models
Described herein are systems and methods for compressing or otherwise reducing the memory requirements for storing and computing the model parameters in recurrent neural language models. Embodiments include space compression methodologies that share the structured parameters at the input embedding layer, the output embedding layers, or both of a recurrent neural language model to significantly reduce the size of model parameters, but still compactly represent the original input and output embedding layers. Embodiments of the methodology are easy to implement and tune. Experiments on several data sets show that embodiments achieved similar perplexity and BLEU score results while only using a fraction of the parameters. |
| US11030993B2 |
Advertisement selection by linguistic classification
A method is provided for advertisement selection. The method includes recognizing words from user speech over a large number of interactions, computing a number of unique words uttered during the interactions, classifying the user by the number of unique words uttered during the interactions, and selecting an advertisement targeted to the classified users. |
| US11030980B2 |
Information processing apparatus, information processing system, control method, and program
An information processing apparatus (2000) includes a first determination unit (2020), a second determination unit (2040), and a display control unit (2060). The first determination unit (2020) detects a first marker (10) from a captured image (30), and determines content corresponding to the detected first marker (10). The second determination unit (2040) detects a second marker (20) from the captured image (30), and determines a display position of a content image (40) in a display screen on the basis of the detected second marker (20). The display control unit (2060) displays the content image (40) at the determined display position in the display screen. |
| US11030979B2 |
Information processing apparatus and information processing method
There is provided an information processing apparatus to enable more proper control of a projection of an object notifying a user of a message on the basis of an attribute of the message. The information processing apparatus includes: an acquisition unit that acquires a message; and a control unit that controls projection of an object notifying a user of the message on the basis of an attribute of the message. |
| US11030977B2 |
Device and method for driving a display panel
A processing system comprises a first IC chip and a second IC chip. The first IC chip comprises first image processing circuitry, first display panel driver circuitry, and first communication circuitry. The first image processing circuitry is configured to generate a first overlay image by overlaying a first partial input image with a first image element based on first partial input image data representing the first partial input image and first image element data representing the first image element. The first display panel driver circuitry is configured to drive a display panel based on the first overlay image. The first communication circuitry is configured to output second image element data representing a second image element to the second IC chip. |
| US11030976B2 |
Image combination device and display system comprising the same
Providing an image combination device and/or a display system comprising the same. The image combination device including an SGL control unit separating a plurality of layers into a first group layer and a second group layer not overlapping the first group layer, and a multi-layer blender combining the first group layer to produce a first composite image in a first frame and combining the second group layer including updated layers with the first composite image of the first frame to produce a second composite image in a second frame subsequent to the first frame. |
| US11030972B2 |
Electronic device and method for controlling same
An electronic device is disclosed. The electronic device includes a sensor, a storage unit for storing a color matching function (CMF), which has been pre-defined according to characteristics of a light source, and a processor for acquiring spectral information regarding at least one pixel of a display panel by using a sensor, for acquiring color stimulus values regarding at least one pixel on the basis of the stored CMF and the acquired spectral information, and for acquiring a correction coefficient regarding at least one pixel of the display panel on the basis of the acquired color stimulus values. |
| US11030970B2 |
Method and device for displaying a notification for a user and working device
The invention relates to a method for displaying a notification for a user in which first image data associated with the notification is displayed on a display unit in a normal display mode. The method also includes displaying second image data associated with the notification on the display unit in a safety display mode as soon as a predetermined fault condition is satisfied in the normal display mode. The predetermined fault condition being satisfied is checked by comparing a current display of the first image data by the display unit in the normal display mode, with respect to a presence of image faults, with a reference display of the first image data by the display unit in the normal display mode. The current display and the reference display are subdivided into regions and/or pixels for the comparison, said regions and/or pixels being associated with classes as background, foreground, image edge and/or irrelevant. Color value intervals and/or color value thresholds are set for each class based on an RGB scheme. A position within or outside of the color value intervals and/or color thresholds is established for each region and/or for each pixel and for each class, and an image fault is identified in response to a position being established outside of the color value intervals and/or color value thresholds, where regions and/or pixels that are classified as irrelevant are excluded from said comparing. |
| US11030969B2 |
Electro-optic displays and methods of driving the same
An electro-optic display comprising, in order: a light-transmissive layer of conductive material; a layer of bistable electro-optic medium; a layer of light-shielding material; a plurality of pixel electrodes; a layer of photoconductive material; and one or more light emitters. In one exemplary embodiment, the layer of photoconductive material is adapted to bridge a gap between an address line and at least one of the pixel electrodes when the photoconductive material is in a low impedance state. In another, non-exclusive embodiment, the electro-optic display further comprises a second electrode layer between the layer of photoconductive material and the one or more light emitters and a driver adapted to apply voltage between the light-transmissive layer of conductive material and the second electrode layer. |
| US11030967B2 |
Display device and method of driving the same
A display device includes an image analyzing part which determines whether current frame image data includes a crosstalk pattern, and a gamma voltage generator which generates current frame gamma data by applying the asymmetric gamma when the current frame image data do not include the crosstalk pattern, and generates the current frame gamma data by applying a symmetric gamma when the current frame image data includes the crosstalk pattern. The positive polarity and negative polarity data voltages of the asymmetric gamma are asymmetric with each other for each of the grayscales, and the positive polarity and negative polarity data voltages of the symmetric gamma are symmetric with each other for each of the grayscales. |
| US11030963B2 |
Motion blur effect adjustment method and display system capable of adjusting a motion blur effect
A motion blur effect adjustment method includes partitioning a display panel into at least two regions, tracking positions of eyes for generating position information of eyes tracking by using an image capturing device, acquiring a first region corresponding to a visual range of the positions of eyes from the at least two regions according to the position information of eyes tracking, reducing a first motion blur effect of the first region, and adjusting a second motion blur effect of a second region outside the first region. |
| US11030957B2 |
Organic light emitting display device with luminance compensation features
An organic light emitting display device includes: a display panel including a plurality of sub-pixels arranged in a plurality of column lines and a power line, each sub-pixel being supplied with first and second power voltages and including a light emitting diode, the power line extending along a column line direction and transferring the first power voltage; and a peak luminance control portion which derives a compensation value that is adjusted according to a maximum IR variation amount of IR variation amounts in the column line direction for a picture input thereto, applies the compensation value to an average picture level of the picture to derive a compensated average picture level, and controls a peak luminance of the picture according to the compensated average picture level, wherein the IR variation amount includes IR drop amount for the first power voltage and an IR rise amount for the second power voltage. |
| US11030951B2 |
Light-emitting display and method of driving the same
A light-emitting display includes a display panel, a first circuit, and a second circuit. The display panel comprises a pixel. The first circuit supplies a data voltage to a data line for the pixel. The second circuit performs a sensing operation for sensing a sensing line for the pixel and outputs a voltage required for the sensing operation, and outputs a noise removing voltage for cancelling out noise formed on the sensing line during the sensing operation. |
| US11030947B2 |
Display device equipped with position detecting device for detecting positions of pixels subjected to luminance calibration
A display device includes a display including a plurality of pixels having a plurality of light-emitting elements, a pixel selector configured to select a pixel from among a plurality of pixels, a positional information generator configured to generate the positional information representing the position of the selected pixel, and a light emission processor configured to superpose the positional information on the light emitted by the selected pixel. A position detecting device is used to detect and output the positional information superposed on the light of the selected pixel on the display device, thus making it easy to accurately detect the position of the pixel subjected to calibration in luminance. |
| US11030939B2 |
Display device
A display device is capable of improving the image quality, the display device including: a display panel; a pixel on the display panel and including at least one light emitting element; a timing controller configured to receive an image data signal of the pixel and to compensate for a gray value of the image data signal based on the number of light emitting elements of the pixel to generate a compensated image data signal; and a data driver configured to select a compensation data signal corresponding to the compensated image data signal from the timing controller and to apply the compensation data signal to the pixel. |
| US11030938B2 |
Display panel and display device
A display panel and a display device are provided. The display panel includes a first driving circuit and a plurality of first pixel units. The first pixel units include an image display region and a light transmissive region, and the image display region is driven by the first driving circuit to provide a corresponding brightness. An opening is formed at an edge of the image display region, the light transmissive region is formed within the opening, and an incident light emitted from an outer side of the display panel passes through the light transmissive region. The image quality of the under-screen camera is improved in term of the pixel density. |
| US11030933B1 |
Sub-pixel rendering method and display device
A sub-pixel rendering method includes: obtaining a digital image, in which the number of grey levels in the digital image is greater than a number of sub-pixel structures of a display panel; determining if each grey level is in a dark-on-bright texture; transforming the grey levels into sub-pixel luminances; performing a filter operation on the sub-pixel luminances according to a rendering mask to calculate rendered sub-pixel luminances, in which a weight of the rendering mask is increased if the corresponding sub-pixel luminance is in the dark-on-bright texture; transforming the rendered sub-pixel luminances into rendered grey levels, and driving the display panel according to the rendered grey levels. |
| US11030930B2 |
Display device having deformed display panel
A display device may comprise a substrate which includes a display area including a first pixel and a non-display area including a second pixel, a first data line which is disposed on the substrate and applies a data signal to the first pixel, a second data line which is disposed on the substrate and applies a data signal to the second pixel and a gate line which is disposed on the substrate and applies gate signals to the first pixel and the second pixel at the same timing, wherein the first pixel and the second pixel have different area from each other. |
| US11030929B2 |
Calibration of electrical parameters in optically switchable windows
The embodiments herein relate to methods for controlling an optical transition and the ending tint state of an optically switchable device, and optically switchable devices configured to perform such methods. In various embodiments, non-optical (e.g., electrical) feedback is used to help control an optical transition. The feedback may be used for a number of different purposes. In many implementations, the feedback is used to control an ongoing optical transition. In some embodiments a transfer function is used calibrate optical drive parameters to control the tinting state of optically switching devices. |
| US11030928B2 |
Apparatus and method for sensing display panel
An apparatus and a method for sensing a display panel are provided. The apparatus includes a source driving circuit and a sensing circuit. The source driving circuit is coupled to data lines to drive the pixel circuits according to a display period comprising frame periods. The sensing circuit is coupled to a plurality of pixel circuits. The sensing circuit senses characteristics of the pixel circuits in the test data periods of the display period. The test data periods are periodically arranged in the display period. In each of the test data periods, a corresponding pixel circuit receives test data, and the sensing circuit senses the electrical characteristic of the corresponding pixel circuit. In the scan-line periods of each of the frame periods, the corresponding pixel circuit receives display data from a corresponding data line, and the sensing circuit does not sense the corresponding pixel circuit. |
| US11030922B2 |
Laparoscopic training system
A sensorized surgical instrument for training users laparoscopic surgical procedures is provided. The instrument includes at least one sensor selected from a group consisting of a strain gauge, accelerometer, magnetometer, and gyroscope. The sensor is attached directly to a handle of the instrument. A shaft assembly having a tool tip is interchangeably connectable to the handle. The sensor is connected to a computer configured to provide feedback useful to the user for improving the user's surgical skills. The feedback includes the time to complete a procedure, economy of motion, smoothness of motion and the force exerted at the tool tip. |
| US11030919B2 |
Measuring language learning using standardized score scales and adaptive assessment engines
The present invention allows a language learning platform to calculate a user's overall language skill. This may be performed as a standalone test or before, during and/or after a language course. The language learning platform may perform a Pre-CAT process, a CAT process, a stage 2—fixed form process and a scoring and reporting process. The Pre-CAT process is designed to quickly get an initial estimate of the user's overall language skill. The CAT processes improves on the accuracy of the Pre-CAT process, preferably until the conditional standard error of measurement for the user's overall language skill is less than a predetermined number. The stage 2—fixed form process may use the user's overall language skill to select speaking, listening and writing assessment items of an appropriate difficulty for the user. The language learning platform may score the responses of the user, present the measured user's overall language skill to the user and save the user's overall language skill in a database for use in future tests. |
| US11030913B2 |
Intelligent and contextual system for knowledge progression and quiz management
Techniques described herein provide intelligent context-based testing. One or more implementations receive an image that includes content. In turn, some implementations process the image to extract test information from the content, such as questions, answers, learning material, and so forth. By analyzing the test information, various implementations determine one or more characteristics associated with the test information, and dynamically generate new test information based on the determined one or more characteristics. As one example, some implementations obtain new content by searching for content that includes the one or more characteristics and generate new test information based on the new content and the extracted test information. |