| Document | Document Title |
|---|---|
| US10951717B2 |
Differentiated services within a service mesh
Systems, methods, and computer-readable media for differentiating service within a service mesh. A translator service receives network traffic directed to a service mesh from a communications network. The translator service can determine a service characteristic for the network traffic and update rulesets within the service mesh based on the determined service characteristic. The updated rulesets enable the service mesh to differentiate services for the network traffic similarly to forwarding rules within the communications network. |
| US10951716B2 |
Redirecting a client device from a first gateway to a second gateway for accessing a network node function
The present invention enables a network operator to select a gateway that provides desirable operational parameters to access a network node function in a network node requested by a client. A network service provider detects what service a client device is requesting or using and selects a gateway (e.g. PDN-GW) to deliver the service. The client device is signaled to make a new connection to the network using the selected gateway, e.g. by connecting to the APN associated with the PDN-GW that delivers the service. |
| US10951713B2 |
IoT analytics edge application on IoT gateway
IoT devices within a commercial real-estate or residential building environment may be connected through networks, such as a Building Automation and Control network (BACnet). Systems and methods according to this disclosure provide automatic discovery of IoT devices and relationships in commercial real-estate and residential buildings and integration of the BACnet devices into the digital twin of the building. In some implementations, an IoT gateway is configured to translate the communication received from the BACnet to an IoT cloud platform and configured to normalize the data across the different security platforms into a consistent format which enables integration and interoperability of the different building system platforms that may otherwise be operating in isolation from each other. Systems and methods according to the present disclosure provide edge based analytics and control of IoT BACnet devices based on defining conditions and rules, and provide integration of multiple building systems in the context of commercial real-estate and residential buildings. |
| US10951711B2 |
Methods and systems for acquiring and processing data at intelligent edge devices via software kernels
A method and system are disclosed for acquiring and processing data, the exemplary system includes: one or more intelligent devices connected in a dynamic ad hoc network as a network of edge devices which can optionally access a cloud storage, at least one intelligent device being configured with a software installation to selectively receive and execute analytics on data received; at least one of the intelligent devices being configured to identify data to be requested from at least one other edge device for enhancing analytics performed on the at least one intelligent device; and a switchboard for maintaining a current view of resources in the network, and functions for which each resource is tasked, the resources including the at least one intelligent device and those edge devices which can communicate with the at least one intelligent device on the network. |
| US10951708B2 |
Systems and methods for data access authentication using searchable encryption
A computer implemented method of a network connected data storage system, the method including receiving, via the network, and storing a data set including a plurality of data items encrypted using an index-based searchable encryption scheme, wherein the searchable encryption scheme has associated a server index and a client index; receiving, via the network, and storing a set of hashed information for each of a plurality of queries of the data set, each item of hashed information including a hash of a query and a hash of an expected result of executing the query using the server index; receiving, via the network, a query from a data requester to retrieve a set of data items from the data store and a hash of an expected result of executing the received query using the server index; generating a result of the received query for the data set based on the server index; and responsive to a comparison of a hash of the generated result, the received hash of the expected result, and the hashes of expected results in the set of hashed information, granting access for the requester to the data set. |
| US10951706B2 |
High-throughput algorithm for multiversion concurrency control with globally synchronized time
Throughput is preserved in a distributed system while maintaining concurrency by pushing a commit wait period to client commit paths and to future readers. As opposed to servers performing commit waits, the servers assign timestamps, which are used to ensure that causality is preserved. When a server executes a transaction that writes data to a distributed database, the server acquires a user-level lock, and assigns the transaction a timestamp equal to a current time plus an interval corresponding to bounds of uncertainty of clocks in the distributed system. After assigning the timestamp, the server releases the user-level lock. Any client devices, before performing a read of the written data, must wait until the assigned timestamp is in the past. |
| US10951700B2 |
Synchronizing data between personal and timecode devices
A method for acquiring media of the same event from multiple devices can include synchronizing, using at least one timecode module configured to receive timecode data over a wireless network, a personal device and a professional device, acquiring media data with the synchronized devices, associating the timecode data with the acquired media, and merging acquired media data from the personal device with the acquired media data from the professional device. The merging can be based, at least in part, on the timecode data. |
| US10951696B2 |
Data manager
A system and approach that provides a basis for monitoring, control, and communications among many remote controller sites and building equipment. A system architectural goal may be to distribute a workload of a supervisor across multiple processing units while maintaining a seamless and integrated workflow for a user experience. |
| US10951695B2 |
System and methods for identification of peer entities
In an illustrative embodiment, systems and methods for automatically identifying peer organizations of a subject organization within a transactional platform identify peer organizations of the subject organization by accessing characteristic features and transactional features of the subject organization, providing a portion of the features to similarity analysis models, and obtaining, through executing the models, predicted peer organizations. The predicted peers may be presented to a user arranged in priority order with some peer features of the respective organization and a control for selecting the respective peer. The user may select a subset of the predicted peers for use in comparison metrics. |
| US10951694B2 |
Peer to peer communications for repairing wireless multicast/broadcast delivered content
A method for repairing multicast/broadcast content via peer to peer communications, which includes receiving at least a part of a file transmitted by a wireless multicast/broadcast service (WMBS) session via an access network; exchanging, via a peer to peer network, completion messages between the UE device and peer UE devices upon completion of the WMBS session; identifying an amount of the file received at the UE device, and amounts of the file received at each of peer UE devices based on the exchanged completion messages; sending repair data to repair the file on each peer UE devices in response to identifying that the UE device received the entire file; and sending repair data via the peer to peer network, obtained from the access network, in response to identifying that the UE device received less than the entire file and more of the file than each of the group of peer UE devices. |
| US10951688B2 |
Delegated services platform system and method
System and method for delegating to a local appliance some or all tasks traditionally performed by a central service endpoint in responding to a request from an end-consumer for content, an application, or a service. The local appliance is typically a computer server with associated local storage. Local appliances capable of providing the requested content, application or service, and also handling any security protocols or similar specialized requirements, are identified and selected to service the end-consumer's request, while the central service point retains overall management of the process and can, if appropriate, resume handling of the request in a manner that is substantially seamless to the end-consumer. Other capable local appliances can also be identified, based on network performance criteria, and re-delegation can occur to support movement of mobile devices or other network conditions. |
| US10951686B2 |
Apparatus for transmitting broadcast signals, apparatus for receiving broadcast signals, method of transmitting broadcast signals and method of receiving broadcast signals
The present invention proposes a method for providing a broadcast content in an apparatus, the method comprising: requesting a filter code to an application running on the apparatus by using a first Application Programming Interface (API); receiving a JavaScript Object Notation (JSON) object from the application in response to the first API; storing the filter code; receiving an Extended File Delivery Table (EFDT) having a first filter code associated with a first file; and selectively downloading the first file by comparing the stored filter code with the first filter code in the EFDT. |
| US10951681B2 |
Editing an unhosted third party application
A document editing system using a third party application having an embedded document editing module is disclosed. The system include a client-side document editing engine that accepts requests to edit a document from and displays at least a portion of the document to a user of the client-side system. The system includes a first server-side application engine that processes the requests to edit the document. The system can include a second server-side data storage engine that stores the document in a remote storage location. |
| US10951679B2 |
Controlling dynamic media transcoding
A number of approaches for transcoding media is described, which allow various users to control one or more aspects of transcoding (e.g. bit rate, resolution) when delivering media content to a client device from a network edge server or other location. The client device is provided with an interface that allows the user to increase or decrease the resolution, bit rate or other settings of the media content. Upon receiving a request from the user, the system transcodes the media content in accordance with the request and dynamically delivers the transcoded media content to the user's device. The system also enables content publishers and network operators to impose restrictions (e.g. minimum and maximum values for various settings) on user control. |
| US10951674B2 |
Public/private communications paths
Access to transactional multimedia content may be based on network routing. Some multimedia content may be best delivered via a private network. Other multimedia content may be best delivered via a public network. A type of the multimedia content may thus determine network routing. |
| US10951673B2 |
Distributed media content transfer and access management
A personal electronic device includes non-volatile data storage media and control circuitry configured to establish a first connection with a remote media content management server over a first communication network, receive media content item from the media content management server over the first communication network, temporarily store the media content in the non-volatile data storage media, establish a second connection with a network access terminal of a media delivery system associated with a vehicle over a second communication network using, transfer the media content from the non-volatile data storage media to the media delivery system over the second communication network, and after said transferring the at least a portion of the media content item, delete the at least a portion of the media content from the non-volatile data storage media. |
| US10951671B2 |
Content set based deltacasting
Methods, apparatuses, and systems are provided for improving utilization of the satellite communications system through various “deltacasting” techniques for handling content sets (e.g., feeds or websites). Embodiments operate in a client-server context, including a server optimizer, a client optimizer, and, in some embodiments, a pre-positioning client. Within this client-server context, content sets are multicast (e.g., anticipatorily pre-positioned in a local dictionary) to end users of the communications system and are handled at the content set level, according to set-level metadata and/or user preferences. In some embodiments, when locally stored information from the content sets is requested by a user, deltacasting techniques are used to generate fingerprints for use in identifying and exploit multicasting and/or other opportunities for increased utilization of links of the communications system. |
| US10951669B2 |
Reverse call forking
A technique for merging conference session dialogs allows presenting content and media streams from a non-Skype endpoint to a Skype multipoint control unit (MCU), so that they present a single caller in a conference with both media and content. A signaling adapter intercepts session dialogs and merges or other modifies. When adding the non-Skype endpoint, requests from a content server are dropped while requests from the MCU handling non-Skype media streams are forwarded to the Skype MCU. Responses to the request from the MCU are also forwarded to the content server. When creating subscription dialogs, requests from the content server are modified to appear as if they came from the MCU, while responses go back to the proper requester. Conference notifications are forked to go to both the content server and the MCU. Because Skype uses separate media and content dialogs, merging of audio/video and content dialogs may be omitted. By merging dialogs, user experience is improved. |
| US10951668B1 |
Location based community
Disclosed are various embodiments for facilitating a location-based community. A location of a client device is identified, as are point of interest in proximity to the location. Questions pertaining to a point of interest can be presented on the client device. A newly submitted question can be routed to other users who may be in the same or similar location or have an expertise in a particular subject matter area related to the question. |
| US10951664B2 |
Processing call flows
A method of processing session initiation protocol (SIP) call flows, the method comprising, at a back-to-back user agent (B2BUA) maintaining a plurality of predetermined call flow behaviours, each call flow behaviour in the plurality being self-contained and independent from other call flow behaviours in the plurality, each call flow behaviour in the plurality being applicable at one or more given call flow stages to provide one or more given actions for addressing a given call flow scenario, in response to occurrence of a given trigger event in a given SIP call flow, selecting a call flow behaviour from the plurality of call flow behaviours, and causing execution of one or more actions associated with the selected call flow behaviour to address a call flow scenario in relation to the given SIP call flow. |
| US10951663B2 |
Securing an IMS-based VoIP network with multiple VPNs
Systems and methods include a method for securing an Internet protocol (IP) Multimedia Subsystem (IMS)-based voice over IP (VoIP) network with multiple virtual private networks (VPNs). A call sent by a first user endpoint (UE) to a second UE is received by a SBC. The SBC provides security for an IMS-based VoIP network and controls traffic between a first VPN connecting IMS core servers, a second VPN connecting IP phones, and a third VPN connecting non-IP-phone devices. The call originates from either of the second VPN connecting the IP phones or from the third VPN connecting the non-IP-phone devices. A signaling for the call is encrypted and routed by the SBC to the second UE. A media flow for the call is encrypted and routed by the SBC through the third VPN before routing the call to the second UE. |
| US10951658B2 |
IT compliance and request for proposal (RFP) management
Techniques for automating/streamlining the process of responding to a security/privacy RFI/RFP as well as monitoring the security/privacy/IT compliance of an organization are disclosed. For this purpose, a variety of data sources, internal and external to the organization, are employed. A set of machine learning algorithms are also used that find the most appropriate item in the database of data sources that match any given question/item of the RFP. Based on this matching, the RFP question is answered in an automated or a semi-automated manner. The compliance of the organization against a given policy or set of controls is monitored and any observed security/privacy gaps/risk are identified. Recommendations on overcoming the gaps are further provided to the organization. |
| US10951656B2 |
Methods, apparatus and systems to use artificial intelligence to define encryption and security policies in a software defined data center
Methods, apparatus and articles of manufacture to use artificial intelligence to define encryption and security policies in a software defined data center are disclosed. Example apparatus include a language parser to parse a natural language statement into a policy statement that defines a distributed network encryption policy or a distributed network security policy. Example apparatus also include a comparator to compare the policy statement to a set of reference policy templates and a template configurer to select a first policy template from the set of reference policy templates in response to the comparator determining the first policy template corresponds to the policy statement. A policy distributor distributes a policy rule defined by the first policy template for enforcement at network nodes of a software defined data center. The policy rule is a distributed network encryption policy rule or a security policy rule. |
| US10951655B2 |
System and method for dynamic reconfiguration in a multitenant application server environment
In accordance with an embodiment, described herein is a system and method for supporting dynamic security configuration in a multitenant application server environment. Common configuration changes required for partition level security can be made without requiring a server restart, such as for example, adding a new security realm for a partition; deleting an existing realm; changing the configuration on an existing realm; adding or removing a security provider to a realm; or changing the configuration of a security provider. In accordance with an embodiment, also described herein is a system and method for supporting dynamic reconfiguration in a multitenant application server environment. Attributes of partition management components, for example managed beans (MBeans) and child MBeans contained within a partition, can be made dynamic and annotated accordingly, so that a restart of servers is not required for configuration changes to those attributes for a particular partition. |
| US10951653B2 |
Apparatus including secure component and method of provisioning security information into the apparatus
An apparatus into which security information is provisioned through communication with a server may include: a communication interface receiving security data from the server; and a secure component including a secure storage and a controller storing the security information in the secure storage based on the security data. The communication interface may include a presentation layer handler performing mutual authentication between the apparatus and the server according to a first encryption protocol based on unique information assigned to the secure component, and an application layer handler requesting and receiving the security data to and from the server according to a second encryption protocol. |
| US10951652B1 |
Communication session resumption
The present document describes a communication session resumption mechanism. A client computer system establishes a communication session to a server computer that is a member of a set of related server computers. As a result of establishing the communication session, the server computer identifies the set of related server computers to the client computer system. The set of related server computers share communication session information with each other, allowing the client computer system to resume the communication session with another server computer belonging to the set of related server computers. The communication session may be specified to the other server computer by the client computer system by providing a session identifier or a session ticket. |
| US10951645B2 |
System and method for prevention of threat
System and method for prevention of threat are disclosed. The system includes a processing subsystem. The processing subsystem includes a data extraction module configured to extract data from one or more internal sources such as a router, a firewall or a security solution and one or more external sources such as a deep, a dark and a surface web. The processing subsystem also includes an analysis module configured to analyse the data by using at least one threat analysis method for detection of the threat, a rule generation module configured to generate one or more rules to enable prevention of the threat detected, an implementation module configured to implement the one or more generated rules on at least one node associated with the one or more internal sources for prevention of the threat. |
| US10951637B2 |
Distributed detection of malicious cloud actors
Examples relate to distributed detection of malicious cloud actors. In some examples, outgoing cloud packets from the cloud server are intercepted and processed to determine if a preliminary threshold is exceeded, where the outgoing cloud packets are used to identify a customer. At this stage, a potential outgoing intrusion event of a number of potential outgoing intrusion events is generated when the preliminary threshold is exceeded. The potential outgoing intrusions events are used to update an aggregate log, where the aggregate log tracks a customer subset of the cloud servers that is associated with the customer. In response to analyzing the aggregate log to determine that cloud traffic by the customer to the destination address exceeds an intrusion threshold, a notification of malicious activity by the customer is provided, wherein the intrusion threshold is satisfied at a higher cloud activity level than the preliminary threshold. |
| US10951632B2 |
Systems and methods for providing security services during power management mode
Systems and methods for providing security services during a power management mode are disclosed. In some embodiments, a method comprises detecting with a mobile security system a wake event on a mobile device, providing from the mobile security system a wake signal, the providing being in response to the wake event to wake a mobile device from a power management mode, and managing with the mobile security system security services of the mobile device. Managing security services may comprise scanning a hard drive of the mobile devices for viruses and/or other malware. Managing security services may also comprise updating security applications or scanning the mobile device for unauthorized data. |
| US10951628B2 |
Techniques to verify message authenticity
Techniques for verifying message authenticity is provided. In some implementations, a verification request to verify authenticity of a first message is received from a user computing device. The verification request includes a first user identifier and verification information. A delivery message record is obtained. The delivery message record includes a plurality of entries associated with one or more messages sent to one or more user computing devices. Each entry includes a user identifier and feature information of a respective message of the one or more messages. At least one entry that has a second user identifier matching the first user identifier is identified. In response to determining that the feature information of the identified at least one entry matches the verification information from the verification request, a verification message is provided to the user computing device. The verification message indicates that authenticity of the first message is verified. |
| US10951626B2 |
Blockchain-based commercial inventory systems and methods
Systems, methods, and software are disclosed herein to generate a customized view of a blockchain transaction. A blockchain of block entries requested by a plurality of users from user devices is maintained in a distributed network of nodes. The block entries each comprise a plurality of data portions that are each associated with an access level. A request to view one or more data portions of a block entry is received which includes an access code associated with at least one access level. The access code in the request is evaluated with the blockchain of block entries to identify one or more data portions associated with the access level. A customized view of the block entry is generated which includes the one or more data portions associated with the access level. Enhanced operational efficiency and customer convenience is thereby provided in industries including parking, hotels, and autonomous vehicle fleets. |
| US10951624B2 |
Systems and methods for data driven infrastructure access control
In one embodiment, in access gateway comprising at least one computer processor, a method for real-time data protection may include: (1) receiving a user login comprising a user identifier; (2) retrieving, using an in-memory entitlements graph, a role definition for the user identifier, wherein the role definition comprises allowed actions, entitled assets, and a system account; (3) receiving a selection of a requested asset from the entitled assets and a requested action from the allowed actions; (4) verifying the user's entitlement to access the requested asset and perform the requested action with the system account using the in-memory entitlement graph based on the user identifier, the system account, the requested asset, and the requested action; and (5) authorizing the user's entitlement to access the requested asset and perform the requested action with the system account substantially at a time of requested access. |
| US10951623B2 |
Smart remote control system
A smart remote control system comprises a plurality of gateway devices and a central management device. The central management device includes an authority management module configured to be operable to select a registered account, to establish a management authority over one of the gateway devices for the selected account, and to generate a bar code corresponding to both of the selected account and the management authority. The bar code may be displayed on an electronic device and scanned by another electronic device for validation of the management authority. |
| US10951617B2 |
System and method for decentralized-identifier creation
Methods, systems, and apparatus, including computer programs encoded on computer storage media, for blockchain-based decentralized-identifier creation, are provided. One of the methods includes: obtaining a request for creating a decentralized identifier (DID), wherein the request comprises a public key of a cryptographic key pair; creating, based on the public key, a blockchain account associated with a blockchain; creating the DID based on information associated with the blockchain account; and returning a confirmation message comprising the created DID. |
| US10951614B2 |
Method and system for network security
One embodiment provides a method for facilitating network security, the method comprising: receiving, by a server from an application associated with a user, a first data packet which includes a first set of verification information and a first command; and in response to determining that the first set of verification information does not satisfy a first predetermined condition: generating a verification code destined for a first computing device associated with the user; in response to not successfully authenticating the verification code, discarding the first data packet; and in response to successfully authenticating the verification code, transmitting the first command to an end device, which causes the end device to execute the first command. |
| US10951609B2 |
System to effectively validate the authentication of OTP usage
A biometrically encrypted access policy is provided. A commercial transaction request to access a client-supported institution received from a client device is identified. A database structure associates each of a plurality of client-supported institutions with one or more respective biometric tokens for authentication. A one-time password is associated with the client-supported institution based on biometric tokens. An encrypted code is associated with the client-supported institution based on biometric tokens. A encrypted OTP is transmitted to client device, and instructions to capture a biometric scan data via the client device are generated based on parameters of biometric tokens. A decryption key is generated via the client device, and the decryption key is determined to authenticate the user of the client device, and, in response, the commercial transaction request to access the client-support institution is approved. |
| US10951608B2 |
Managed domains for remote content and configuration control on mobile information devices
A technique is disclosed for remotely managing isolated domains on mobile devices. A request is received from the mobile device to instantiate a managed domain. A managed domain configuration is determined and comprises a security policy controlling access to content of the managed domain of the subscribing mobile device, a content specification identifying the content to be downloaded by the subscribing mobile device into the managed domain, and a content configuration identifying a configuration of the content on the subscribing mobile device. The managed domain configuration is sent to the subscribing mobile device to instantiate a secure, managed domain whose policy, content and content configuration is remotely controlled. The technique is useful for advertising and brand promotion on mobile devices as it simultaneously enables detailed control over the presentation of content by a curator while ensuring privacy and security protection of the other apps, accounts and data on the mobile device. |
| US10951603B2 |
Centralized authentication and reporting tool
A system includes a retrieval engine, an authentication engine, an extraction engine, a determination engine, and an export engine. The retrieval engine receives a request for a data report from a user via a user device. The retrieval engine receives reporting data from one or more data servers. The authentication engine determines whether the user is authorized to receive the customized data based on an authentication token. The extraction engine configured to extract one or more report requirements from the request and extract customized data from the reporting data based on report requirements and metadata. The determination engine determines one or more presentation generation tools based on the report requirements and the customized data. The export engine communicates the customized data and a routine to the one or more presentation generation tools. |
| US10951601B2 |
Information processing apparatus and information processing method
Provided is an information processing apparatus that includes a control authority managing unit configured to change a control authority for a device by a first user on a basis of whether or not a status is a monitored status. The monitored status is a status in which the device or the first user is under supervision of a second user having a management authority for the device, and the first user does not have the management authority for the device. |
| US10951596B2 |
Method for secure device-to-device communication using multilayered cyphers
A method for secure device-to-device communication using multilayered ciphers is provided. A selected cipher is employed to generate a pair of encryption/decryption keystreams for enabling multilayered encryption/decryption on a pulsed-index communication (PIC) packet(s). In examples discussed herein, a first layer encryption/decryption is performed by encrypting/decrypting a PIC data(s) (PD(s)) in the PIC packet(s) based on a first of the pair of encryption/decryption keystreams. In addition, a second layer encryption/decryption is performed by encrypting/decrypting selected control information (e.g., information related to encoding/decoding the PD(s)) in the PIC packet(s) based on a second of the pair of encryption/decryption keystreams. By performing multilayered encryption/decryption on the PIC packet(s), it is possible to defend against malicious attacks in single-channel device-to-device communication without compromising such key performance indicators (KPIs) as complexity, latency, power consumption, and footprint. |
| US10951587B2 |
System and method for wireless network security
A wireless network connection security method is disclosed, including: acquiring a type of a wireless network to which a mobile device is connected; determining that the type of the wireless network is insecure; monitoring an application, the application being installed on the mobile device; determining that the application is to be activated; and in response to the determination that the application is to be activated, establishing a secure communication channel between the mobile device and a first server. |
| US10951584B2 |
Methods for active-active stateful network service cluster
For a managed network, some embodiments provide a method for a set of service nodes in an active-active service node cluster in conjunction with a host computer hosting a destination data compute node (DCN) to improve the efficiency of directing a data message to a service node storing state information for the flow to which the data message belongs. a first service node receives a data message in a particular data message flow for which it does not maintain state information. The first service node then identifies a second service node to process the data message and forwards the data message to the second service node. The second service node sends state information for the particular data message flow to the first service node, for the first service node to use to process subsequent data messages in the particular data message flow. |
| US10951576B1 |
Method and apparatus for accurate GLB achieved by using distributed DNS reflection
An example method facilitates Global Traffic Management (GTM) using a combination of passive latency measurements and active latency measurements, including Domain Name System (DNS) server reflection methods, that estimate Round Trip Times (RTTs) between individual geographically distributed data centers (servicing a particular domain) and Local Domain Name Servers (LDNSs) communicating with the data centers. Passive and/or active measurements may initialize a shared database (e.g., accessible by the data centers via a web service). After initialization of the database using static and/or active methods to provide initial estimates of RTTs, different DNS reflection methods then accurately estimate the RTTs and populate the database therewith. The different DNS reflection methods include a first DNS reflection method using co-located reflectors and collectors, and a second distributed DNS reflection method that does not require co-located DNS reflectors and collectors, but instead may employ a hierarchy of reflectors and collectors deployed at different data centers servicing the same domain. |
| US10951569B2 |
Generating interactive emails and tracking user interactions
Systems, methods, and related technologies are provided for generating interactive emails and tracking user interactions. In one implementation, an email can be received within an email client. The email can be rendered within the email client, such as by: presenting a first selectable element within the email client, presenting a second selectable element within the email client, and presenting one or more content items within the email client. A selection of the first selectable element can be received within the email client. In response to the selection of the first selectable element, a presentation of the one or more content items can be adjusted within the email client. |
| US10951567B2 |
System for bridging, managing, and presenting smartphone and other data files with telephony interactions
A system for interfacing with mobile carrier networks, mobile application-equipped devices, social media networks, and individual and Enterprise user's databases, contacts, pictures, videos, and text is disclosed. A data link is connected to a mobile carrier network to receive user application and other data. Additional data links are connected to a user's stored smartphone content, including contacts, pictures, videos and other stored information as well as databases and an application-equipped device to obtain and exchange information in determining data selection, routing, presentation, and updating instructions. A user interface is connected to the system to accept configurable conditions for determining selection, routing and sharing instructions. There is a data conversion function for each data source. Synchronization between stored user preferences to automated or semi-automated updates and routes is provided by application driven consumer defined preferences. |
| US10951559B2 |
Method, system and apparatus for establishing and monitoring sessions with clients over a communication network
Systems and methods provide real-time communication between website operators and website visitors including monitoring, gathering, managing and sharing of information. The features include: simultaneous chatting with system's website visitor while responding/submitting tickets/emails and searching through company knowledge base; operator communicating message to another operator directly in active chat session, while message remains hidden to visitors/customers; displaying advertising messages to visitors/customers within chat window during active chat sessions; growing knowledge base by adding information into knowledge base during chat session; providing real-time access to system's website visitor information by seeing the content of visitor's shopping cart or by passing information from system's server into visitor's information located in operator's panel; creating and branding multiple chat windows and selectively linking all or some to the account; tagging and grouping each chat sessions; parent-child ticketing for project management; lead scoring; and mobile live chatting. |
| US10951556B2 |
Systems and methods for initiating external actions via a group-based communication system
A group-based communication platform may be utilized to execute one or more processing actions via respective external application systems based on messages exchanged among client devices via the group-based communication platform. A particular processing action may be executed for a particular message by generating a container including contextual data and payload data, wherein the payload data comprises the message for which the processing action is to be performed. The container is provided to the external application system via a proxy endpoint, thereby causing the external application system to execute the processing action based on the data included within the container. |
| US10951555B2 |
Providing local service information in automated chatting
The present disclosure provides method and apparatus for providing information in automated chatting. A message is received in a chat flow. At least one of location information, time information and service intention information is identified from the message. A response to the message is generated based on at least one of the location information, the time information and the service intention information. The response is provided in the chat flow. |
| US10951551B2 |
Queue management method and apparatus
A queue management method and apparatus are disclosed. The queue management method includes: storing a first packet to a first buffer cell included in a first macrocell, where the first macrocell is enqueued to a first entity queue, the first macrocell includes N consecutive buffer cells, and the first buffer cell belongs to the N buffer cells; correcting, based on a packet length of the first packet, an average packet length in the first macrocell that is obtained before the first packet is stored, to obtain a current average packet length in the first macrocell; and generating, based on the first macrocell and the first entity queue, queue information corresponding to the first macrocell of the first macrocell in the first entity queue, a head pointer in the first macrocell, a tail pointer in the first macrocell, and the current average packet length in the first macrocell. |
| US10951546B2 |
Managing virtual output queues
A first node of a packet switched network transmits at least one flow of protocol data units of a network to at least one output context of one of a plurality of second nodes of the network. The first node includes X virtual output queues (VOQs). The first node receives, from at least one of the second nodes, at least one fair rate record. Each fair rate record corresponds to a particular second node output context and describes a recommended rate of flow to the particular output context. The first node allocates up to X of the VOQs among flows corresponding to i) currently allocated VOQs, and ii) the flows corresponding to the received fair rate records. The first node operates each allocated VOQ according to the corresponding recommended rate of flow until a deallocation condition obtains for the each allocated VOQ. |
| US10951544B2 |
Apparatus and method of crosschecking data copies using one or more voter elements
A network switch includes a receive port configured to receive data and two or more parallel first paths each configured to receive a first copy of the data, perform a check on the first copy, and generate a protection for the first copy. One or more first voter elements are configured to receive second copies of the data and to crosscheck the second copies. A processing section is configured to process one or more of the second copies. Two or more parallel second paths are each configured to receive a third copy of the data and perform multiple checks on the third copy including a check based on the protection. One or more second voter elements are configured to receive fourth copies of the data and to crosscheck the fourth copies. A send port is configured to send one or more of the fourth copies to a next network element. |
| US10951543B1 |
System and method for controlling access to resources in a multicomputer network
A network resource manager is configured to: store a first number of deferrable instances in a record for a first user; store a second number of deferrable instances in a record for a second user; and increase the first number and reduce the second number by an amount when a consideration is transferred from the first user to the second user. The network resource manager is further configured to read in from a deferrable instance a request to transfer program data and/or execution instructions to a computer-based resource of a cloud service provider for execution. If the load on the cloud service provider is high, the manager will transmit a query to the deferrable instance offering to assign an additional deferrable instance to the original deferrable instance if both the original deferrable instance and the additional deferrable instance accept a deferral period for their requests for resources. |
| US10951537B1 |
Adjustable receive queue for processing packets in a network device
A network device, such as a Network Interface Card (NIC), can have a receive queue (RxQ) that changes size based on whether the network device is in a normal operating mode or in a maintenance mode. In a normal operating mode, it is desirable that the receive queue has a smaller number of free buffers, to increase cache locality in a processor subsystem. However, there can be known periods when the receive queue can be overloaded. During a maintenance period, it is desirable that the receive queue absorbs a large burst of network packets while the processor subsystem is not processing the packets. A solution is to maintain a receive queue at a smaller percentage of its maximum during the normal operation mode, but then before or upon entering the maintenance mode, expand the receive queue to a larger size. |
| US10951533B2 |
Header formats in wireless communication
Aspects of the present disclosure relate to methods and apparatuses for wireless communication using a protocol data unit (PDU) including a service data adaptation protocol (SDAP) PDU that has an unciphered header. The unciphered SDAP header facilitates various optimizations in wireless communication. |
| US10951532B2 |
Method and system for cluster rate limiting in a cloud computing system
Systems and methods for rate limiting one or more clusters of service instances using at least one rate limit controller are described herein. A token distribution is determined for each one of a plurality of rate limiters. The token distribution comprising a maximum number of tokens and a token generating rate. The maximum number of tokens and the token generating rate are assigned to each one of the plurality of rate limiters. At least one request for additional tokens is received from at least a given one of the plurality of rate limiters. The token distribution of at least the given one of the plurality of rate limiters is adjusted based on the request and on token consumption information of at least the given one of the plurality of rate limiters. An adjusted token distribution is assigned to the given one of the plurality of rate limiters. |
| US10951529B2 |
Dynamic service-based load balancing in a software-defined wide area network (SD-WAN)
Systems and methods for dynamic service-based load balancing in an SD-WAN are provided. According to one embodiment, a routing protocol daemon of an SDN controller within a spoke network receives a dynamically assigned subnet and associated attributes for a client device newly registered with the hub network. The routing protocol daemon tags the subnet with a route tag using a route map based on the received attributes meeting network administrator-defined match criteria for corresponding attributes associated with the route tag in the route map. The tagged subnet is communicated to an SD-WAN daemon of the SDN controller, which translates an SD-WAN service rule defined with reference to the route tag to an SD-WAN service rule defined with reference to the subnet. A load balancer associated with the spoke network is caused to perform load balancing of incoming network traffic in accordance with the translated SD-WAN service rule. |
| US10951528B2 |
Network load balancing
A method of routing network traffic may include determining a first data link preference configuration indicating a first preference order for a first plurality of data links over which a first network device communicates. The method may also include receiving a second data link preference configuration indicating a second preference order for a second plurality of data links over which a second network device communicates. The method may additionally include, based on a combination of the first data link preference configuration and the second data link preference configuration, determining a preferred data link to transmit data from the first network device to the second network device. The method may include transmitting data over the preferred data link from the first network device to the second network device. |
| US10951524B1 |
Protocol-independent receive-side scaling
A system and method for protocol independent receive side scaling (RSS) includes storing a plurality of RSS hash M-tuple definitions, each definition corresponding to one of a set of possible protocol header combinations for routing an incoming packet, the set of possible protocol header combinations being modifiable to include later-developed protocols. Based on initial bytes of the incoming packet, a pattern of protocol headers is detected, and used to select one of the plurality of RSS hash M-tuple definitions. The selected RSS hash M-tuple definition is applied as a protocol-independent arbitrary set of bits to the headers of the incoming packet to form a RSS hash M-tuple vector, which is used to compute a RSS hash. Based on the RSS hash, a particular queue is selected from a set of destination queues identified for the packet, and the packet is delivered to the selected particular queue. |
| US10951515B2 |
Leveraging multi-stream transport protocol capabilities for routing
Described embodiments provide systems and methods for performing multi-stream routing. A device may determine that a server is capable of handling multi-stream protocol connections. The device may identify packets communicated between the client and the server via a first interface for a first connection between a client and the server. The device may estimate, based on the packets, a link quality for each second interface for communicating with the server. The device may identify a policy to apply to the packets. The device may select one of the second interfaces for communicating packets between the client and the server based on a configuration mapping, the link quality, and the policy. The configuration mapping may specify which second interface is to be selected using a mapping of the link quality and the policy. The device may establish a second connection between the client and the server using the selected interface. |
| US10951514B2 |
Traffic distribution approaches in multipath TCP with monetary link-cost awareness
Systems, methods, and computer-readable media for controlling data transmission in TCP subflows of a MPTCP connection based on monetary cost. A low cost link and a high cost link of TCP subflows of a MPTCP connection formed between a first MPTCP peer and a second MPTCP peer can be identified. A congestion level on the low cost link can be determined based on feedback from a TCP congestion control mechanism for the MPTCP connection. Further, whether to send a data packet over the low cost link of the high cost link based on the congestion level on the low cost link can be determined. As follows, the data packet can be sent over the low cost link connection if it is determined to send the data packet over the low cost link. |
| US10951502B1 |
Network link liveness detection
An extension is provided to a Link Aggregation Control Protocol (LACP) that can use the LACP protocol transport and provides Link Aggregation Group (LAG) management while also functioning as a full liveness detection protocol. Bi-directional link detection is supported and timers are configurable to any number. The extension can be backwards compatible with standard LACP and can use a subtype that is specified as unused. The extension can start up using standard LACP packet rates and include additional information in the unused subtype. If a LACP speaker does not support the extension, then the protocol conforms to standard LACP. A state machine of the extension is used if it detects conforming information from a peer speaker. The state machine can allow faster detection should a link error occur. |
| US10951501B1 |
Monitoring availability of content delivery networks
A computer implemented availability checking system and method is provided for use with a service provider configured to communicate with one or more client devices and with a content provider. The system includes a computer storage device operative to store an availability data store comprising a list of a plurality of potential endpoints of the service provider and a corresponding plurality of availability information for the plurality of potential endpoints. The plurality of potential endpoints is distributed across a plurality of resource cache components. The system further includes an availability query component operative to transmit a plurality of queries to the plurality of potential endpoints and to receive a plurality of responses from the plurality of potential endpoints. The system further includes an availability analysis component operative to analyze the plurality of responses, to generate the plurality of availability information, and to update the availability data store. |
| US10951500B2 |
Method and apparatus for warning
Embodiments of the present disclosure relate to a method and apparatus for warning. A method may include: importing a real-time collected traffic data sequence into a pre-trained traffic prediction model, to obtain predicted traffic data, the traffic prediction model being used to calculate and obtain the predicted traffic data according to the real-time collected traffic data sequence; and sending, in response to a difference between the predicted traffic data and actual traffic data corresponding to time being greater than a set threshold, a warning signal. |
| US10951499B2 |
Tracking changes in network configurations
A method performed by a network device includes: receiving an input indicating a change in an auxiliary network from a first configuration to a second configuration, wherein the auxiliary network is configured to obtain copies of packets from a traffic production network; determining a first network policy, wherein the first network policy is for application in the auxiliary network when the auxiliary network is in the first configuration; and determining a second network policy by the network device based on the received input and the first network policy, wherein the second network policy is for application in the auxiliary network when the auxiliary network is in the second configuration. |
| US10951497B2 |
System and method for a service-based interface architecture
A device may configure a centralized performance indicator data store for a plurality of network function devices included in a telecommunications system. The centralized performance indicator data store may be accessible by the plurality of network function devices on a management bus of the telecommunications system via a service-based interface. The device may subscribe the centralized performance indicator data store to a message class associated with performance indicator data that is generated by the plurality of network function devices. The device may receive, from the plurality of network function devices, one or more published communications associated with the message class. The one or more published communications may include the performance indicator data. The device may store the performance indicator data in the centralized performance indicator data store. |
| US10951496B2 |
System and method for cloud-based control-plane event monitor
A method for cloud-based, control-plane-event monitoring includes receiving control-plane events from a cloud-based element associated with a first and a second cloud environment. The received control-plane events are ingested from the cloud-based elements associated with the first and second cloud environments to generate a multiple-source data set from the control-plane events from the cloud-based elements associated with the first and second cloud environments. The multiple-source data set is then evaluated based on attributes of the first and second cloud environments in order to generate a common event data set. The common event data set is then processed using a rule set to generate an outcome. |
| US10951490B2 |
Intelligent tunnel assignment and dynamic SLA threshold configuration to increase availability and utilization of SD-WAN tunnels
In one embodiment, a supervisory service for a software-defined wide area network (SD-WAN) tracks a performance metric for a tunnel in the SD-WAN. The supervisory service computes a cumulative distribution function (CDF) for the tracked performance metric. The service assesses curvature of the CDF for the tracked performance metric relative to a service level agreement (SLA) threshold of an application for that performance metric. The service controls assignment of traffic for the application to the tunnel, based on the assessed curvature of the CDF for the tracked performance metric relative to the SLA threshold of the application for that performance metric. |
| US10951489B2 |
SLA compliance determination with real user monitoring
Compliance with a Service Level Agreement (SLA) between an ecommerce provider and its customer may be determined using real user monitoring by collecting data for each HTTP/HTTPS request and response sent to the ecommerce provider. The presence of a content delivery network (CDN), also monitoring every HTTP/HTTPS request sent from a user, through the CDN provides an external, third-party confirmation of compliance. Real user monitoring is collected at the SaaS system by triggering an event rule, collecting data regarding the performance of the request and the response, and logging the created message. The log is processed and stored in a performance monitoring system where indexed for calculations and presentation. |
| US10951488B2 |
Rule-based performance class access management for storage cluster performance guarantees
Performance of a storage system with data distributed substantially, evenly across a cluster of storage nodes can be dynamically managed according whether quality of service (QoS) rules based on one or more performance capacities according to performance class is satisfied, wherein each QoS rule includes a boundary condition and a threshold expressing performance guarantees to a respective performance class. Determining for each QoS rule, whether a respective boundary condition satisfies a respective threshold based on measured capacity for a performance metric corresponding to the respective boundary condition; and if so, setting a first QoS parameter associated with the set of QoS rules and throttling access to the storage system by a first client associated with a first performance class based on the first QoS parameter to enforce the performance guarantees to the first performance class. |
| US10951487B2 |
System and method for providing dynamic provisioning within a compute environment
The disclosure relates to systems, methods and computer-readable media for dynamically provisioning resources within a compute environment. The method aspect of the disclosure comprises A method of dynamically provisioning resources within a compute environment, the method comprises analyzing a queue of jobs to determine an availability of compute resources for each job, determining an availability of a scheduler of the compute environment to satisfy all service level agreements (SLAs) and target service levels within a current configuration of the compute resources, determining possible resource provisioning changes to improve SLA fulfillment, determining a cost of provisioning; and if provisioning changes improve overall SLA delivery, then re-provisioning at least one compute resource. |
| US10951484B1 |
Customized call model generation and analytics using a high-level programming interface
Certain aspects of the disclosure are directed to customized communication monitoring and alerts using a high-level programming interface. According to a specific example, a data communications server is configured and arranged to provide a database with virtual office features available to remotely-situated client entities. The data communications server is configured to provide to the client entities, a set of instructions written in a first programming language that defines a message exchange protocol. The data communications server is further configured to receive from each client entity, client-specific sets of control data written in a second programming language that is compatible with the first programming language. The data communications server may accumulate data from communication event data based on the client-specific sets of control data, evaluate the accumulated data for one or more parameters of interest, and generate communication models for the disparate client entities. |
| US10951480B2 |
Network functions virtualization
Technology for a virtualized network function manager (VNFM) in a mixed wireless network operable to facilitate instantiation of a virtualized network function (VNF) instance is disclosed. The VNFM can receive a request to instantiate a new VNF instance from a network manager (NM) via a network function virtualization (NFV) orchestrator (NFVO), the request including VNF instantiation information. The VNFM can send a request to a virtualized infrastructure manager (VIM) for allocating virtual resources for the new VNF instance based on the VNF instantiation information. The VNFM can receive an acknowledgement from the VIM after successful allocation of the virtualized resources for the new VNF instance. The VNFM can instantiate the new VNF instance and send an acknowledgement of the new VNF instance to the NFVO, wherein the new VNF instance is operable to ease congestion at an overloaded non-virtualized network element in the mixed wireless network. |
| US10951479B1 |
User controlled fault domains
Techniques for managing fault domains using cells are described. An area of a provider network may be divided into multiple cells, with each cell representing a different fault domain of the area of the provider network. A customer can provide domain definitions for their service or application and a cell management service can use the domain definitions to place the infrastructure and compute resources underlying the customer's application or service in appropriate cells within an area of the provider network. In some embodiments, the domain definitions may be account-based, where the domain definition may be to place resources in different fault domains depending on the account they are associated with. Alternatively, the customer may tag resources with an identifier such that resources tagged with a first identifier may be placed in a first cell while resources tagged with a second identifier may be placed in a second cell. |
| US10951472B2 |
Information processing device and information processing system
An information processing device includes a memory and a processor coupled to the memory. The processor is configured to record, in the memory, requests to a plurality of computers. The processor is configured to determine, based on a past trend of requests and a specified maintenance-performing time, a time period in which maintenance is to be performed. The processor is configured to stand by until the determined time period comes. The processor is configured to determine, after standby, a maintenance standby time for each of the plurality of computers based on requests assigned to each of the plurality of computers. The processor is configured to determine, based on the maintenance standby time determined for each of the plurality of computers, an order in which maintenance is performed on the plurality of computers. |
| US10951471B2 |
Mechanism for hardware configuration and software deployment
A plug-and-play solution deployment mechanism and infrastructure to automate deployment of network cluster devices is disclosed. The solution includes an agile hardware topology discovery mechanism to automatically map the hardware of the cluster devices. The solution includes an intelligent engine for recognition of BIOS configuration setting and BIOS configuration of the devices. The solution also includes a demand-driven Cloud architecture design engine to design and test a cloud architecture incorporating the cluster devices. |
| US10951467B2 |
Secure enabling and disabling points of entry on a device remotely or locally
A method is provided for remotely configuring a modem securely using an authentication token for use with a service provider. The method includes receiving an encrypted authentication token from the modem, the authentication token having at least one password and being encrypted according to a public key, transmitting the encrypted authentication token to an authentication server, receiving a decrypted authentication token from the authentication server, and configuring at least one modem interface at least in part using the authentication token. |
| US10951464B2 |
System and method for efficient network reconfiguration in fat-trees
Systems and methods are provided for supporting efficient reconfiguration of an interconnection network having a pre-existing routing. An exemplary method can provide a plurality of switches, a plurality of end nodes, and one or more subnet managers, including a master subnet manager. The method can calculate, via the master subnet manager, a first set of one or more leaf-switch to leaf-switch multipaths. The method can store this first set of one or more leaf-switch to leaf-switch multipaths at a metabase. The method can detect a reconfiguration triggering event, and call a new routing for the interconnection network. Finally, the method can reconfigure the network according to the new routing for the interconnection network. |
| US10951463B2 |
BGP aggregation in Clos networks
The present disclosure provides Border Gateway Protocol route aggregation in a Clos fabric when one or more communication failures are detected. A method includes receiving a prefix component of a first aggregate route from a first next hop node, the prefix component being associated with a failed network element; announcing, to one or more neighboring nodes, the first aggregate route along with the prefix component and the first next hop node associated with the failed network element; identifying, by the one or more neighboring nodes, a second aggregate route, the second aggregate route being a shortest aggregate route that contains the first aggregate route; and generating, from the second aggregate route, one or more Chad routes to the prefix component of the first aggregate route, wherein the one or more Chad routes are associated with one or more next hop nodes that are different from the first next hop node. |
| US10951461B2 |
Anomaly-driven packet capture and spectrum capture in an access point
An access point providing a client device with access to a communication network detects an anomaly in packet traffic being transmitted to or received from the client device. In response, the access point performs a packet capture by triggering the release of stored packets. The access point determines an anomaly type representing a root cause of the anomaly and annotates the packet capture with the anomaly type. The access point also detects radio frequency interference exceeding a prescribed threshold and, in response, performs a spectrum capture. The packet capture, annotated with the anomaly type, and the spectrum capture are reported either automatically or in response to a request. |
| US10951460B1 |
Cloud computing platform service management
Techniques are provided for improved management of cloud computing platform services in cloud computing environments. For example, a system comprises one or more processors operatively coupled to one or more memories to form a cloud computing platform services management framework, wherein the cloud computing platform services management framework is configured to perform steps of: providing one or more graphical user interfaces; and enabling centralized self-service access to a plurality of cloud computing platform services through the one or more graphical user interfaces for one or more application developers of a given enterprise. In one example, the cloud computing platform services comprise PaaS platform services and support tools. |
| US10951458B2 |
Computer cluster arrangement for processing a computation task and method for operation thereof
The present invention is directed to a computer cluster arrangement and a method for operation of the introduced computer cluster arrangement. The computer cluster arrangement comprises computation nodes CN, which dynamically outsource specific computation tasks to boosters B. Therefore, an assignment technique of boosters B to computation nodes CN is introduced. The assignment takes dynamically place at runtime. The present invention finds application in high performance cluster technology. |
| US10951457B2 |
Low voltage drive circuit with digital to digital conversion and methods for use therewith
A low voltage drive circuit (LVDC) includes a digital to digital converter that converts transmit digital data into a digital input signal, wherein the transmit digital data is synchronized to a clock rate of a host device and the digital input signal is synchronized to a clock rate of a bus to which the LVDC is coupled. An output limited digital to analog is converter converts the digital input signal into analog outbound data by generating a DC component and converting the digital input signal into an oscillating component at a first frequency, wherein magnitude of the oscillating component is limited to a range that is less than a difference between magnitudes of power supply rails of the LVDS, and wherein the oscillating component and the DC component are combined to produce the analog outbound data. A drive sense circuit conveys the analog outbound data as variances in loading of the bus at the first frequency and wherein analog inbound data is represented within an analog receive signal as variances in loading of the bus at a second frequency. |
| US10951454B2 |
Precoding in wireless systems using orthogonal time frequency space multiplexing
Device, methods and systems for recoding in wireless systems using orthogonal time frequency space multiplexing are described. An exemplary method for transmitting wireless signals includes mapping data to generate a quadrature amplitude modulation (QAM) signal in a delay Doppler domain, determining a perturbation signal to minimize expected interference and noise, perturbing the QAM signal with the perturbation signal, thereby producing a perturbed signal, generating a pre-coded signal by pre-coding, using a linear pre-coder, the perturbed signal, and transmitting the pre-coded signal using an orthogonal time frequency space modulation signal scheme. |
| US10951449B2 |
Spectrum shaping crest factor reduction
Disclosed are methods, systems, devices, apparatus, media, design structures, and other implementations, including a method that includes receiving a signal for radio transmission, and adjusting crest factor reduction (CFR) processing characteristics applied to the received signal to modify one or more portions of the signal according to a pre-determined spectral mask representative of a frequency envelope limiting allowed magnitudes for frequency components bounded by the spectral mask. Adjusting the CFR processing characteristics includes adjusting the CFR processing characteristics according to one or more optimization criteria for output signals generated based on the adjusted CFR processing characteristics, and subject to a constraint that the output signals generated based on the adjusted CFR processing characteristics are bound by the pre-determined spectral mask. The method further includes applying CFR processing with the adjusted CFR processing characteristics to the received signal to produce a resultant modified signal, and amplifying the resultant modified signal. |
| US10951444B2 |
In house reception of transmission signals compliant to a standard specification for mobile phone
A receiver arrangement for receiving a wirelessly transmitted HF transmission signal includes a first conversion unit for converting the HF transmission signal into a baseband information signal. Furthermore, an extraction unit is provided for extracting IQ data from the baseband information signal. A second conversion unit converts the IQ data into a further transmission signal. Additionally, a transmitter is provided for wirelessly transmitting the further transmission signal to a consumer electronics receiver unit. For normal reception of the HF transmission signal, the consumer electronics receiver unit is provided with a first antenna arrangement for receiving the HF transmission signal, and further includes a first signal processing stage for converting the HF transmission signal into IQ data, which are comprised in the HF transmission signal, and a second signal conversion stage for processing the IQ data into an output information signal of the consumer electronics receiver unit. |
| US10951442B2 |
Communication system and method using unitary braid divisional multiplexing (UBDM) with physical layer security
A system includes first and second sets of communication devices. A processor coupled to the first set of communication devices produces a first encoded vector and transmits the first encoded vector to the second set of communication devices via a communication channel that applies a channel transformation to the first encoded vector during transmission. A processor coupled to the second set of communication devices receives the transformed signal, detects an effective channel thereof, and identifies left and right singular vectors of the effective channel. A precoding matrix is selected from a codebook of unitary matrices based on a message, and a second encoded vector is produced based on a second known vector, the precoding matrix, a complex conjugate of the left singular vectors, and the right singular vectors. The second encoded vector is sent to the first set of communication devices for identification of the message. |
| US10951441B2 |
Receiver systems and methods for AC and DC coupling of receiver
An Alternating Current (AC) and Direct Current (DC) coupled electronic receiver system including a receiver, an AC-coupling capacitor between an input of the receiver system and the receiver, a bypass switch configured to selectively bypass the AC-coupling capacitor to DC-couple the input to the receiver, a bypass switch driving circuit configured to cause the bypass switch to switch ‘ON’ and thereby DC-couple the input to the receiver, and cause the bypass switch to switch ‘OFF’ and thereby AC-couple the input to the receiver, and a voltage-following transistor between a source and a gate of the bypass switch configured to maintain an ‘OFF’ state of the bypass switch while the input is AC-coupled. |
| US10951439B2 |
Wireless communication device and channel estimating method thereof
A wireless communication device and a channel estimating method thereof are provided. A wireless communication device includes an interlayer interference detector configured to receive a reference signal including a plurality of layers transmitted through a plurality of ports respectively connected to a plurality of antennas and to determine whether interlayer interference occurs based on the reference signal; and a channel estimator configured to estimate a channel matrix by executing an algorithm that is based on whether the interlayer interference occurs. The wireless communication device may decode a receive signal based on the estimated channel matrix. |
| US10951436B2 |
Network hub, transfer method, and onboard network system
A network hub is provided for an onboard network system. The onboard network system includes first and second networks for transmission of first-type and second-type frames following first and second communication protocols. The network hub includes a receiver that receives a first-type frame. A processor determines whether or not the first-type frame received by the receiver includes first information that is a base for a second-type frame to be transmitted to the second network, to obtain a determination result, and selects a port to send a frame based on the first-type frame based on the determination result. A transmitter sends the frame based on the first-type frame to a wired transmission path connected to the port selected by the processor based on the first-type frame received by the receiver. |
| US10951429B2 |
Server initiated remote device registration
A machine implemented method of server initiated registration of a remote device with a second server when the remote device is provisioned or pre-provisioned for registration with a first server, the method comprising: transmitting a bootstrap message from a bootstrap server to the first server, the bootstrap message comprising instruction for registration of the remote device with the second server; receiving the bootstrap message at the first server; sending, from the first server, the bootstrap message to the remote device; and registering the remote device with the second server. |
| US10951427B2 |
Ethernet type packet data unit session communications
Systems, apparatuses, and methods are described for wireless communications. A session management function may provide to a user plane function one or more messages comprising an Ethernet packet filter set and/or information for at least one policy rule. The user plane function may apply the at least one policy rule to a data flow to provide an Ethernet packet data unit session for a wireless device. |
| US10951425B2 |
Power supply method, device, and power supply system
A power over Ethernet method includes: performing, by power sourcing equipment, a plurality of detections by using an Ethernet port, connected to an intermediate device, of the power sourcing equipment, where a quantity of detections performed by the power sourcing equipment is equal to a quantity of power supply ports of the intermediate device; and if at least one detection result of the plurality of detections is effective, sending, by the power sourcing equipment, a power supply indication to the intermediate device, and supplying power to the connection port. In this way, the power sourcing equipment can supply power across the intermediate device to a powered device connected to the intermediate device, and a power loss caused by voltage conversion is avoided. |
| US10951422B2 |
Mobile message source authentication
A control circuit receives from a mobile receiver a request for a certificate for a particular sourcing entity and responsively transmits to that mobile receiver a corresponding certificate. The certificate includes an entity logo that corresponds to a particular message sourcing entity and decryption information. The mobile receiver can employ the decryption information to decrypt an encrypted authenticated entity digital signature to thereby authenticate that a mobile message that included the signature was sourced by a particular sourcing entity and to also display the entity logo in conjunction with presenting the message sourced by the sourcing entity to thereby provide visual confirmation that the sourcing entity is indeed an authenticated source of the message. Presentation of the entity logo can be in combination with an additional graphic feature that specifically and uniquely represents and communicates that confirmed authentication (i.e., that the displayed logo in fact corresponds to the entity that sourced the message). |
| US10951421B2 |
Accessing hosts in a computer network
A security function is provided by an intermediate device located between hosts and devices requesting for access to the hosts in a computerized network. The intermediate device receives a request for access to a host, and obtains at least one authenticator for use in the requested access to the host. The intermediate device then monitors for communications that use the at least one authenticator. |
| US10951418B1 |
Managing enrollment of digital identities for secure air-to-ground communication sessions
Systems and methods of managing enrollment of digital identities (e.g., for aeronautical communication) can involve a line-replaceable unit (LRU) in an aircraft establishing a digital identity with a ground-based server by requesting a public certificate from the ground-based server. The LRU may receive a public certificate from the ground-based server. The LRU may validate the public certificate. The LRU may generate, based on validating the public certificate, an enrollment status message indicative of at least one status code from a plurality of predefined status codes associated with a plurality of corresponding actions for the ground-based server. The LRU may transmit the enrollment status message including the at least one status code to the ground-based server, to cause the ground-based server to perform a corresponding action based on the at least one status code. |
| US10951414B2 |
Method for securing digital currency
A mobile wallet for storing a digital asset, the mobile wallet may include a communication unit; a programmable logic device (PLD), a main controller, a secure element, and an anti-tamper unit that comprises one or more anti-tamper sensors. The secure element may be configured to store the digital asset. The communication unit may be configured to receive ingress traffic from outside the mobile wallet and to output egress traffic not blocked by the PLD. The PLD may be configured to monitor ingress traffic and egress traffic, and to determine whether to pass or block ingress messages of the ingress traffic and egress messages of the egress traffic. At least one of the main controller and the anti-tamper unit may be configured to detect a tamper attempt based on outputs of the one or more anti-tamper sensors. The main controller may be configured to assist in responding to a detected tamper attempt. |
| US10951413B2 |
Trusted key server
The invention relates to methods and devices for enabling authentication of a user based on biometric data. In an aspect of the invention a method performed by a trusted network node is provided for enabling authentication of a user of a second client device based on biometric data captured by a first client device. |
| US10951411B2 |
Methods and apparatus for a password-protected integrated circuit
Various embodiments of the present technology may comprise methods and apparatus for a password-protected integrated circuit. According to various aspects of the present invention, the password-protected integrated circuit may comprise a cryptosystem that is encoded with a password seed and used to authenticate control data prior to being transmitted to a sensor and/or a sensor control circuit, wherein the sensor and/or sensor control circuit responds to authenticated control data. |
| US10951410B1 |
System for implementing a virtual machine based on a zero-knowledge proof circuit for general operation verification
A system for implementing a virtual machine based on a zero-knowledge proof circuit for general operation verification is disclosed, which includes a general operation verification circuit generator that generates a general operation verification circuit having a base number of commands, a base number of machine steps, and a base system size and generates proof keys and verification keys by using the general operation verification circuit and a zk-SNARK algorithm, a prover terminal that generates a proof by using a proof key included in the general operation verification circuit, coefficients of a polynomial function obtained through the zk-SNARK algorithm, and information required for verifying and proving from the general operation verification circuit; and a verifier terminal that performs verification of whether or not the proof is valid by using the verification key, the information required for verifying and proving from the general operation verification circuit, and the proof. |
| US10951404B1 |
Methods and systems for digital message encoding and signing
A data communication system, in which a sender obtains a set of base data elements; generates a first and a second key from (i) the set of base data elements and (ii) sets of first and second entanglement data elements, the first and second keys comprised of a respective first and second public component and a respective first and second private component. A recipient generates first and second ciphers by encoding a digital message using the first and second public components; and sends the first and second ciphers towards the sender apparatus. The sender then extracts the digital message based on the first and second ciphers, the first and second private components, and the sets of first and second entanglement data elements. The private components are not derivable from the public components or from the ciphers irrespective of computing power. A method of digital signing and verification is also described. |
| US10951402B2 |
Apparatus and method for encryption
Disclosed are an apparatus and method for encryption. The encryption apparatus includes a key table generator configured to generate at least one encryption key table from random values obtained from a seed value and generate at least one decryption key table from the at least one encryption key table; an algorithm generator configured to generate an encryption algorithm having a Misty structure that has a round function to which the at least one encryption key table is applied and a decryption algorithm having a Misty structure that has a round function to which the at least one decryption key table is applied; an encryptor configured to encrypt plaintext data with the encryption algorithm; and a decryptor configured to decrypt encrypted data with the decryption algorithm. |
| US10951397B2 |
System and method for blockchain-based cross-entity authentication
Methods, systems, and apparatus, including computer programs encoded on computer storage media, for blockchain-based cross-entity authentication are provided. One of the methods includes: obtaining an authentication request by a first entity for authenticating a user, wherein the authentication request comprises a decentralized identifier (DID) of the user; in response to determining that the first entity is permitted to access authentication information of the user endorsed by a second entity, generating a blockchain transaction for obtaining an authentication result of the user by the second entity, wherein the authentication result is associated with the DID; and transmitting the blockchain transaction to a blockchain node for adding to a blockchain. |
| US10951394B2 |
System and method for publication of private data using a blockchain network
A system and method for encrypting and publishing data using blockchain technology is provided. An exemplary method includes receiving, by one or more nodes of a distributed network that maintains a blockchain, a message requesting publication of private information within the blockchain subsequent to a specified time interval. Moreover, the method includes recording a sequence of transactions in the blockchain based on the time interval, wherein each transaction in the sequence of transactions includes a payload calculated using a first homomorphic operation; and extracting the private information from a final payload of a final transaction in the sequence of transactions from the blockchain. |
| US10951392B2 |
Fast format-preserving encryption for variable length data
Systems, apparatuses, and methods are provided for fast format-preserving encryption. An input string can be divided into blocks (potentially of varying length). An arrangement of cryptographic pipelines can perform operations on different blocks, each pipeline providing an output block. The cryptographic pipelines can interact such that the output blocks are dependent on each other, thereby providing strong encryption. The pipelines can operate efficiently on the block and operations can occur partly in parallel. |
| US10951387B2 |
Systems and methods for self-formation and self-management of full-duplex communication networks
Disclosed herein are systems and methods for self-formation and self-management of full-duplex communication networks. In an embodiment, a communication device determines whether there is an available self-assignable device-data time slot. If there is, the device selects an available time slot for outbound transmissions, updates its network-status table to associate the selected time slot with a device identifier of the communication device, and transmits outbound device data during the selected time slot of at least one ensuing frame. The device also, during each of a plurality of ensuing frames, makes a determination as to whether to transmit a maintenance packet during a shared time slot of the current frame. If the determination is made in the affirmative, the device transmits such a packet during that shared time slot. Each such packet contains at least a subset of the network-status table. |
| US10951378B2 |
Method and device for performing measurement based on discovery signals
One disclosure of the present specification provides a method for performing measurement based on discovery signals. The method may comprise the steps of: receiving, from cells, discovery signals based on cell-specific reference signals (CRSs); and performing measurement based on the CRS-based discovery signals for a predetermined measurement period. If a measurement bandwidth is six resource blocks (RBs), the predetermined measurement period can be determined by 5*the measurement occasion periodicity of the discovery signals. If the measurement bandwidth is 25 resource blocks (RBs), the predetermined measurement period can be determined by 3*the measurement occasion periodicity of the discovery signals. Also, the discovery signals can be received for a discovery signal occasion duration defined by N consecutive subframes. |
| US10951373B2 |
Method for obtaining quantity of resource elements in communication process and related apparatus
A method for obtaining a quantity of resource elements in a communication process, comprising: determines a downlink control information format of downlink control information, obtains, based on the downlink control information format, a quantity of resource elements occupied by a demodulation reference signal (DMRS); and determines a size of transport block (TBS) based on the quantity of resource elements occupied by the DMRS. |
| US10951370B2 |
Demapping apparatus and method for reception of data in a multi-carrier broadcast system
An apparatus and a corresponding method for mapping payload data of mapping input data streams onto a mapping output data stream having a channel bandwidth for transmission in a multi-carrier broadcast system includes first and second frame forming mechanisms. The first frame forming mechanism is adapted to form first frames having a first frame structure and the second frame forming mechanism is adapted to form second frames having a second frame structure. Preferably, in a second frame structure the data blocks of a particular mapping input data stream are spread in time and frequency over various data symbols and various data segments of the second frames to provide high robustness against disturbances. The payload portion of the second frame is preferably segmented into various data segments enabling use of a narrow-band receiver, even if both the first and second frames cover the same total channel bandwidth. |
| US10951368B2 |
Data processing method and apparatus thereof
Embodiments of this application disclose a data processing method and an apparatus thereof. The method includes: processing, by a network device, to-be-transmitted data to obtain a data distribution manner, where the processing includes at least one of interleaving processing and mapping processing that is performed in a mapping sequence; the data distribution manner is used to indicate distribution of data from a same code block; and when the processing includes only mapping processing performed in a mapping sequence, the mapping sequence does not include a mapping sequence in which space-domain mapping is first performed, frequency-domain mapping is then performed, and time-domain mapping is finally performed; sending, the to-be-transmitted data distributed in the data distribution manner; receiving, by a terminal device, processed to-be-transmitted data; and determining, a data distribution manner, and performing de-processing on the processed to-be-transmitted data in the data distribution manner, to obtain the to-be-transmitted data. |
| US10951365B2 |
Technique for transferring data in a radio communication
A technique for transferring data on a radio bearer is described. The split radio bearer includes a first layer entity (570) at a first layer of a protocol stack and at least two second layer entities at a second layer of the protocol stack. The second layer is lower than the first layer in the protocol stack. In a method aspect of the technique, the data is received through each of the at least two second layer entities (582, 584). The data received through the at least two second layer entities (582, 584) is validated. If a result of the validation is indicative of an inconsistency in the data received through the at least two second layer entities (582, 584), a retransmission of the data is selectively triggered through at least one of the second layer entities (582, 584). |
| US10951364B2 |
Method for transmitting/receiving HARQ ACK/NACK signal in wireless communication system, and device therefor
A method for transmitting a hybrid automatic repeat and request (HARQ) ACK/NACK signal by a reception side in a wireless communication system may further comprise the steps of: receiving a transmission block including a plurality of code blocks from a transmission side; decoding the received transmission block; and transmitting an ACK/NACK for the transmission block in units of code block groups, wherein the code block group includes at least one code block. |
| US10951363B2 |
Hybrid automatic repeat request feedback in a physical uplink channel
Methods, systems, and devices for wireless communications are described. In some wireless communications systems, a user equipment (UE) may be configured to transmit hybrid automatic repeat request (HARQ) feedback for a set of codewords received from a base station in a single uplink channel. In some cases, it may be appropriate for the UE to transmit individual HARQ feedback for each codeword of the set of codewords (e.g., such that the UE may be able to transmit HARQ feedback for unscheduled transmissions to provide side information to the base station), and, in other cases, it may be appropriate for the UE to transmit bundled HARQ feedback for the set of codewords. Using the techniques described herein, the base station may configure the UE to provide individual HARQ feedback or bundled HARQ feedback for a set of codewords based on one or more factors. |
| US10951361B2 |
IoV low latency communication method, terminal and system
The present invention discloses an Internet of Vehicles (IoV) low latency communication method and also discloses an IoV terminal and an IoV system for implementing the low latency communication method. The present invention uses a combination of a macro node and access points to perform resource scheduling on services requested by the IoV terminal and reduce a network transmission latency and ensure data transmission reliability through optimization of a data transmission manner, high-efficient processing at a data network side, and stable access of edge users by using technologies such as fog computing, open loop communication, path diversity, and network slicing. |
| US10951356B2 |
Method for polar coding in communication network
Embodiments of this application provide a method for processing information bits. A communication device obtains K information bits and a code length M. The code length M is a length of an output sequence resulting from processing the information bits. The communication device generates an N-bit bit sequence that includes the K information bits and one or more parity check bits, encodes the bit sequence using a polar encoding formula to obtain an N-bit encoded sequence, rate matches the encoded sequence to obtain the output sequence, modulates the rate matched sequence to obtain output sequence and outputs the output sequence. When M−K>192, in the bit sequence, one of the parity check bits is placed in a bit position that is determined according to reliabilities of the bit positions in the bit sequence for placing the K information bits and the one or more parity check bits. |
| US10951355B2 |
Preamble transmission counter for a beam failure recover of a wireless device
A wireless device starts a beam failure recovery (BFR) timer in response to initiating a contention-free random access procedure for a BFR. Based on expiry of the BFR timer, a first preamble employing a contention-based random access for the BFR is transmitted. In response to not receiving a response for the first preamble, a preamble transmission counter is incremented from a value of the preamble transmission counter of the contention-free random access procedure before the expiry of the BFR timer. A second preamble is transmitted in response to a value of the preamble transmission counter being equal to or less than a number. |
| US10951353B2 |
Wireless telecommunications
A terminal device for use in a wireless telecommunications system includes: a transceiver operable to perform wireless communication with one or more other terminal devices according to the wireless communications system and to receive speed information from the one or more other terminal devices indicative of a physical speed of the one or more other terminal devices; and a controller configured to select a transmission format, for use in wireless communication by the transceiver, in dependence upon the speed information received from the one or more other terminal devices. |
| US10951350B2 |
Physical uplink control channel transmission method and reception method, apparatus, user equipment and base station
A method of transmitting a physical uplink control channel PUCCH, a method of receiving a PUCCH, an apparatus, a user equipment and a base station are provided. The method of transmitting a PUCCH includes: determining a plurality of target slots to transmit to-be-fed-back uplink control information UCI, where the to-be-fed-back UCI is transmitted in the target slots by using the PUCCH; determining a transmission duration or format of the PUCCH carrying the to-be-fed-back UCI in each of the plurality of target slots respectively; transmitting, in accordance with the determined transmission duration or format of the PUCCH, the PUCCH carrying the to-be-fed-back UCI in each of the plurality of target slots. |
| US10951347B2 |
User equipment capability discovery in distributed wireless networks
Advertising wireless devices (e.g., user equipments (UEs)) within a distributed wireless network may indicate radio frequency and/or baseband capabilities (e.g., via transmitting capabilities messages). A responding UE may receive one or more capabilities messages, and identify radio frequency (RF) capabilities (e.g., indicated via a bitmap) and/or baseband capabilities of the advertising UEs. The responding UE may then determine a transmission scheduling policy based on the one or more received capabilities messages. For example, the responding UE may generate a combined list of frequencies based on the one or more received capabilities messages, and distribute transmissions over the list of frequencies. Additionally or alternatively, the responding UE may determine block decoding baseband capabilities of the one or more advertising UEs, and may accordingly enable block coding schemes for transmissions on frequencies supported by the advertising UEs with such block decoding baseband capabilities. |
| US10951344B2 |
Optical transmitter, optical receiver, and optical transmission system
An optical transmitter generates two modulated optical signals by modulating two optical carriers respectively with two binary bit sequences by on-off keying and generates an orthogonal polarization multiplexed optical signal from the two modulated optical signals. The two optical carriers respectively have peak frequency components spaced apart from each other by a predetermined frequency difference and located such that a central frequency of a WDM channel of a WDM grid falls between the peak frequency components. An optical receiver separates the orthogonal polarization multiplexed optical signal into two signals in which components of the two modulated optical signals are combined with different combination ratios, by means of a 1-input, 2-output asymmetric filter whose two optical transmittances intersect at the WDM grid and each have a free spectral range equal to or twice the channel spacing of the WDM grid, and restores the two modulated optical signals from the separated two signals using a DSP. |
| US10951343B2 |
Optical module
An integrated apparatus with optical/electrical interfaces and protocol converter on a single silicon substrate. The apparatus includes an optical module comprising one or more modulators respectively coupled with one or more laser devices for producing a first optical signal to an optical interface and one or more photodetectors for detecting a second optical signal from the optical interface to generate a current signal. Additionally, the apparatus includes a transmit lane module coupled between the optical module and an electrical interface to receive a first electric signal from the electrical interface and provide a framing protocol for driving the one or more modulators. Furthermore, the apparatus includes a receive lane module coupled between the optical module and the electrical interface to process the current signal to send a second electric signal to the electrical interface. |
| US10951341B2 |
Cell information acquisition method and apparatus
Disclosed are methods, apparatus and systems for cell information acquisition and reporting. One method includes receiving a request for configuration information and a synchronization block, determining that the synchronization block is not associated with the configuration information, and transmitting a failure indication in response to the request. Another method includes receiving a request for configuration information and a first synchronization block, determining that the first synchronization block is not associated with the configuration information, and the first synchronization block comprises information related to a second synchronization block that is associated with the configuration information, and determining whether a radio frequency retuning operation can be performed in order to obtain the configuration information. |
| US10951340B2 |
Method and device for transmitting bit error rate information in FlexE overhead frame, and computer storage medium
Disclosed is an information transmission method and device, and a computer storage medium. The method is applied to a local end in a flexible Ethernet (FlexE) network structure and includes: when receiving an information block of a FlexE frame, acquiring, by the local end, bit error state information in the received information block according to a preset acquisition policy; storing, by the local end, the bit error state information at a preset position in a FlexE protocol overhead frame; and transmitting, by the local end, the FlexE protocol overhead frame storing the bit error state information to an opposite end. |
| US10951337B2 |
Method and apparatus for transmitting and receiving multimedia service
A method for receiving a multimedia service is provided. The method includes receiving service specific information for at least one multimedia service provided from different networks, selecting one service based on the service specific information, and receiving the selected service. The service specific information includes one of a first service map table including information about at least one service which is transmitted over a plurality of logical channels, and a second service map table including information about at least one service which is transmitted over a single logical channel. Each of the first and second service map tables includes asset-related information. |
| US10951335B2 |
Resource allocation in communications networks using probability forecasts
A system (1000) is disclosed including a resource allocation optimization (RAO) platform (1002) for optimizing the allocation of resources in network (1004) for delivery of assets to user equipment devices (UEDs) (1012). The RAO platform (1002) determines probabilities that certain asset delivery opportunities (ADOs) will occur within a selected time window and uses these probabilities together with information concerning values of asset delivery to determine an optimal use of asset deliveries. In this regard, the RAO platform (1004) received historical data from repository (1014) that facilitates calculation of probabilities that ADOs will occur. Such information may be compiled based on asset delivery records for similar network environments in the recent past or over time. |
| US10951334B2 |
Broadcast relaying via cooperative multi-channel transmission
Systems and methods for relaying in broadcast single-frequency networks are disclosed herein. A single-frequency network can be formed in part using transmitters that receive data via a cooperative relay channel instead of a station-to-transmitter link. In some embodiments, a second channel may use a portion of its transmission time to relay the information to the single-frequency network transmitter using time-division multiplexing. In other embodiments, a second channel may encode the relayed information on a second layer using layer-division multiplexing. |
| US10951332B2 |
Method and apparatus for coordinated multipoint (CoMP) communication using quasi-co-location
Embodiments of the present invention provide a method used for wireless communication and an apparatus. The method includes: configuring measurement parameters of channel state information for a terminal device, where the measurement parameters include a channel state information-reference signal configuration and a quasi-co-location indication, the channel state information-reference signal configuration includes configurations of at least two groups of antenna ports, and the quasi-co-location indication is used to indicate whether the at least two groups of antenna ports have a quasi-co-location relationship; and sending the measurement parameters to the terminal device. |
| US10951329B1 |
Testing of a base station with beamforming capability
A base station testing system may receive one or more input signals originating from one or more transceivers of a base station. The base station testing system may form, based on the one or more input signals, one or more output signals associated with a beam direction. The base station testing system may provide a feedback signal, that is based on the one or more output signals, to a calibration component of the base station. |
| US10951326B1 |
Method and device for setting up long range quantum communications networks
Described is a method of setting up a plurality of quantum communications links, forming a quantum network providing provably secure communications and internet services over intercontinental distances without requiring direct line of sight communication or the intermediate use of the entanglement resource of satellites. Also described is a quantum communicator device for use in this method. Two or more quantum memory units are disposed at a first location, an entangled link is set up between at least two of the quantum memory units, at least one of the quantum memory units sharing in the entangled link is physically transported to a second location. The quantum communicator device comprises communications nodes, an optical interface to set up entanglement to other devices and storage nodes, each node in the form of a quantum memory unit capable of storing quantum information for a desired length of time, i.e. weeks or longer. |
| US10951321B2 |
Phase modulation device, receiver, transmitter and a phase modulating method
A phase modulation device is provided that comprises a retardation device and a control device. The retardation device is characterized by first and second polarization eigenstates SOPf and SOPs. Light polarized according to the second polarization eigenstate SOPs acquires, upon passing through said retardation device, a delay with regard to light polarized according to the first polarization eigenstate SOPf, which delay corresponds to λ/2±30%, preferably λ/2±20% and most preferably λ/2±10%. The retardation device is arranged to receive input light having a polarization state SOPf; that defines an angle with respect to one of the first and second polarization eigenstates SOPf, SOPs within a predetermined angle range and to emit output light. The control device is configured to control at least one of a change of the angle between the polarization state SOPi; ofthe input light and the respective polarization eigenstate SOPf, SOPs by less than 0.1*π, preferably less than 0.05*π and most preferably less than 0.02*π; and a change of the amount of said delay upon passing through said retardation device by less than 0.3*λ, preferably less than 0.2*λ and most preferably less than 0.1*λ, such that a phase shift of π±30%, preferably π±20% and most preferably π±10% on the output light is obtained. |
| US10951319B1 |
Method of performing dynamic power optimization in fiber-optic communication system and related fiber-optic communication system
A fiber-optic communication system includes a first optical transceiver and a second optical transceiver. First, the first optical transceiver is configured to transmit signals to the second optical transceiver using an optical transmission power having an initial value. When the optical receiving power inputted into the second optical transceiver is larger than the expected input power of the second optical transceiver, a power compensation value is acquired according to the optical receiving power and the expected input power. The first optical transceiver is configured adjust its optical transmission power according to the power compensation value and then transmit signals to the second optical transceiver using the adjusted optical transmission power. |
| US10951317B2 |
Multi-layer virtual network embedding
Some aspects and embodiments of the present invention provide effective mechanisms for provisioning virtual networks on communication networks. In particular some aspects and embodiments provide an effective mechanism for embedding a virtual network into a multi-layered substrate network which utilizes a different communication technology at each layer. One such example is an IP network overlaid over an optical network, such as an OTN network. Embodiments jointly determine the assignment of virtual nodes and virtual links. Assigning the nodes and links together can provide for a more optimal solution than assigning the nodes and the links separately. Some embodiments generate a collapsed graph which includes the optical network and the IP network in a single layer. Accordingly some embodiments jointly determine the assignment of virtual nodes and virtual links within such a collapsed graph, which can provide more optimal assignments than considering assignments within each layer separately. In some embodiments, generating a collapsed graph includes allocating residual capacity to each link of the collapsed graph; and allocating a cost for each link of the collapsed graph. In some embodiments, allocating a cost for each link includes allocating a higher cost to optical links than to IP links. In some cases, allocating the higher costs can discourage the creation of new links unless they are needed or are beneficial (e.g. creating new links improves the overall cost/efficiency). Some embodiments utilize a heuristic method for solving an optimization function for the placement of virtual nodes and links. |
| US10951316B2 |
Fronthaul remote access and monitoring systems and methods to test fiber optic infrastructure and RF spectrum
Fronthaul monitoring systems and methods include a performing protocol testing, via a protocol layer acquisition module, of a protocol layer signal for analysis thereof to identify issues; performing optical physical layer monitoring via an optical physical layer acquisition module to identify optical physical layer issues; and configuring an optical switch to switch an input port connected to the protocol layer acquisition module and the optical physical layer acquisition module over different links of the plurality of links wherein a test coordinator software module is configured to manage the optical switch to coordinate the optical protocol layer analysis of a link and the optical physical layer testing of the link. |
| US10951314B2 |
System and methods for non-orthogonal multiple access
A resource allocation method is provided for a non-orthogonal multiple access distribution of access network users communicatively coupled to a single transport medium. The method includes steps of allocating a first frequency and time domain resource to a first user and a second frequency and time domain resource to a second user of the access network users, obtaining channel information regarding a particular communication channel of the access network for which resources are allocated, grouping the first user with the second user based on an overlap of the first frequency and time domain resource with the second frequency and time domain resource, and assigning the first user to a different power allocation resource than the second user within the frequency and time domain overlap. |
| US10951311B2 |
Visible light communication using colour shift keying
The present disclosure provides a visible light communication transmitter, a visible light communication receiver, a visible light communication system, and a method of visible light communication, which are suitable for colour shift keying (CSK), as well as providing a method of CSK. The transmitter comprises at least six graphene-based light emitting devices of different peak transmission wavelengths from each other. The receiver comprises a corresponding number of graphene-based photodetectors of different peak reception wavelengths from each other. A system according to the disclosure comprises such a transmitter and such a receiver, wherein each respective one of the different peak reception wavelengths of the six graphene-based photodetectors corresponds to a respective one of the different peak transmission wavelengths of the graphene-based light emitting devices. Such a system allows a method of visible light communication with a colour constellation of at least six base colours. |
| US10951305B2 |
Orbital base station filtering of interference from terrestrial-terrestrial communications of devices that use protocols in common with orbital-terrestrial communications
An orbiting multiple access transceiver communicates with terrestrial mobile stations which are also capable of communicating with terrestrial base stations. The multiple access transceiver is configured to sample a signal when a terrestrial mobile station of interest is not transmitting to produce a sample signal. The sample signal may be processed to produce an out-of-phase signal that may be applied to a signal when the terrestrial mobile station of interest is transmitting to produce a clearer signal from the terrestrial mobile station of interest. |
| US10951304B2 |
Satellite communication framework and control method thereof
A satellite communication framework includes a satellite system controller; at least one satellite transponder; and a plurality of remote terminals, each including a modem, a router, and a terminal agent. The terminal agent is configured to, based on a current allowable data rate and measurements of a current router queue size and a current router packet arrival rate, use a delayed uplink resource assignment for each modem and an MCV-based flow-control policy to forecast a future router queue size and a future router packet arrival rate and further update the delayed uplink resource request for a time after an uplink allocation delay. The modem is configured to communicate with the router and also with the satellite system controller through the satellite transponder, perform modulation and demodulation, and manage packet loss and delay according to the future router queue size and the future router packet arrival rate. |
| US10951302B2 |
System and method for inter-basic service set communications
A method for multiple association includes associating with a first access point (AP) in a primary basic service set (BSS), associating with a second AP in a secondary BSS, informing the first and second APs of an inter-BSS relaying capability of a doubly-associated station, and relaying data between the first AP and the second AP. |
| US10951300B2 |
Radio frequency beam management and recovery
A base station (BS)/user equipment (UE) for performing radio frequency beam management and recovery in communication with a UE/BS. The BS/UE includes a processor and a memory that stores first and second thresholds. The processor evaluates a beam quality metric against the first and second thresholds, performs beam switching and/or beam broadening in response to determining the beam quality metric falls below the first threshold, and performs a beam failure recovery procedure in response to determining the beam quality metric falls below the second threshold. |
| US10951299B2 |
Wireless device, communication device, wireless control method, communication control method, and program
There is provided a wireless device configured to perform both multi-user spatial multiplex communication and single user communication with a communication device. The wireless device is configured to set a first waiting time for the single user communication, and count the first waiting time in a period in which a second waiting time for the multi-user spatial multiplex communication is counted. The wireless device then transmits data through the single user communication after the first waiting time expires. |
| US10951295B2 |
Reconfigurable fully-connected bidirectional hybrid beamforming transceiver
Disclosed herein is a new type of fully-connected, hybrid beamforming transceiver architecture. The transceiver described herein is bi-directional and can be configured as a transmit beamformer or a receive beamformer. A method and apparatus are described that allows the beamformer to operate in “carrier aggregated” mode, where communication channels in multiple disparate frequency bands can be simultaneously accessed. |
| US10951294B2 |
Reception apparatus and reception method
A transmission apparatus includes M signal processors that respectively generate modulated signals directed to M reception apparatuses, M being an integer equal to or greater than 2, and an antenna section. Each signal processor modulates a first bit sequence made up of two bits to generate a first modulated signal and a second modulated signal, and modulates a second bit sequence made up of other two bits to generate a third modulated signal and a fourth modulated signal, in a case of transmitting multiple streams to a corresponding one of the M reception apparatuses. The antenna section includes a first antenna that transmits the first modulated signal and the third modulated signal and a second antenna that transmits the second modulated signal and the fourth modulated signal. At least either the signals transmitted from the first antenna or the signals transmitted from the second antenna are phase-changed signals. |
| US10951288B2 |
Beam training sequence design method and apparatus
The present disclosure relates to beam training sequence design methods and apparatus. One example method includes generating NT beam training sequences, where each beam training sequence includes a cyclic prefix and (2×N) Golay sequences, each Golay sequence is with a length of L, and the NT beam training sequences are orthogonal to each other, and sending the NT beam training sequences using NT transmit antennas, where each transmit antenna of the NT transmit antennas sends one beam training sequence of the NT beam training sequences. |
| US10951286B2 |
Methods and systems for hybrid beamforming for MIMO communications
Methods and apparatuses for hybrid beamforming are described. The described methods and apparatuses related to hybrid beamforming for single user multiple-input multiple-output (SU MIMO) communications and for multi-user multiple-input single-output (MU MISO) communications. The radio frequency (RF) precoder and baseband precoder are determined such that the hybrid precoder has a minimum or near minimum chordal distance from an optimal precoder. Feedback information enables the transmitter to select columns from a set of discrete Fourier transform (DFT) columns to form the RF precoder matrix. |
| US10951282B2 |
Facilitating selection of demodulation reference signal ports in advanced networks
Facilitating selection of demodulation reference signal port combinations in advanced networks (e.g., 4G, 5G, 6G, and beyond) is provided herein. Operations of a system can comprise evaluating a capability of a mobile device. The operations can also comprise assigning a first group of port combinations for the mobile device based on the capability of the mobile device being a first capability and a second group of port combinations for the mobile device based on the capability of the mobile device being a second capability, resulting in a port combination assignment. The port combination assignment can mitigate a peak-to-average power ratio value. |
| US10951280B2 |
Low complexity high performance single codeword MIMO for 5G wireless communication systems
A low complexity multiple input multiple output transmitter that transmits a single codeword per channel is disclosed herein. Instead of sending multiple codewords per channel for transmissions that support higher data layer transmissions, the transmitter can send single codewords over multiple channels in order to improve spectral efficiency over a range of signal to interference plus noise ratios. For instance, if a downlink transmission to a user equipment (UE) has a rank of 4, capable of supporting 4 data layers, instead of sending 2 or more codewords over a single downlink control channel, the transmitter can schedule multiple control channels and transmit a single codeword per channel. The transmitter can also include in the signaling to the UE that the multi-codewords are included in multiple downlink control channels. |
| US10951272B2 |
Systems, methods and devices for beam selection in a wireless communication system
A method for beam sweeping in a wireless communication system is described. Beam sweeping includes performing a reduced beam sweep corresponding to a reduced set of beams that are a subset of a full set of beams available for transmitting and/or receiving from an antenna module, without sweeping beams that are not members of the reduced set of beams. The method includes selecting a beam out of the reduced set of beams for transmitting and/or receiving from the antenna module based on the reduced beam sweep without sweeping beams that are not members of the reduced set of beams. Related devices are disclosed. |
| US10951271B2 |
Method and device for multi-antenna transmission in UE and base station
A method and a device for multi-antenna transmission in a user equipment and a base station are disclosed in the present disclosure. The user equipment first receives a first signaling, receives a first wireless signal, and transmits first information. K antenna port groups are used to transmit the first wireless signal. The first signaling is used to determine the K antenna port groups. The K antenna port groups respectively correspond to K channel quality values. K1 antenna port groups of the K antenna port groups correspond to K1 channel quality values of the K channel quality values. The K1 is a positive integer less than or equal to the K. A first proportional sequence corresponds to a ratio(ratios) among the K1 channel quality values. The first information is used to determine the K1 antenna port groups and the first proportional sequence. |
| US10951270B2 |
Power transmission apparatus, power reception apparatus, method, and recording medium
A power transmission apparatus has a first communication function for communicating with a power reception apparatus and a second communication function for communicating with the power reception apparatus at a radio frequency different from a radio frequency used in the first communication function, and makes a decision as to whether to use the first communication function or the second communication function in communication for controlling wireless transmission of power, the decision being made on the basis of device information obtained from the power reception apparatus through communication using the first communication function. |
| US10951263B2 |
Wireless system and device communication management
According to one configuration, a wireless communication system includes one or more wireless communication devices and gateway hardware. The gateway hardware can be configured to notify the one or more wireless communication devices of a change associated with frequency hopping settings (such as switchover from first frequency hopping settings to second frequency hopping settings). Further, the gateway hardware can include a first radio frequency interface and a second radio frequency interface. In accordance with the frequency hopping settings, the gateway hardware: i) fixedly tunes the first radio frequency interface to a first wireless channel; and ii) while the first radio frequency interface is fixedly tuned to the first wireless channel, the gateway hardware dynamically tunes the second radio frequency interface to hop amongst multiple different wireless channels. The frequency hopping settings support different wireless power levels depending on a number of pseudorandom wireless channels that are hopped. |
| US10951262B2 |
Devices, systems and methods for transmitting protocol configuration information between multi-protocol devices
A method can include receiving frequency hop configuration data for a first wireless communication protocol via a second wireless communication protocol in second communication circuits; and configuring first communication circuits to communicate according to the first communication protocol with frequency hopping indicated by the frequency hop configuration data; wherein the first communication circuits and second communication circuits are formed in a same combination device. Related devices and systems are also disclosed. |
| US10951256B1 |
Rotary switch for a multi-channel communication device
Systems (100) and methods (500) for controlling operations of an electronic device. The methods comprise: using a rotary knob having a single rotatable part to select a first circuit to perform operations of the electronic device during a first time and to select a second circuit to perform operations of the electronic device during a second time; and using the single rotatable part of the rotary knob to additionally change preset functions for the first circuit at the first time and a second circuit at the second time, where a degree of rotation of the single rotatable part corresponds to a desired preset function input selected from a plurality of possible preset function inputs. |
| US10951254B1 |
Foldable phone case method and devices
The embodiments disclose a method including fabricating a one section foldable phone case for coupling with a foldable phone configured to fold from top to bottom, fabricating a one section foldable phone case for coupling with a foldable phone configured to fold from side to side, fabricating a two-section foldable phone case for coupling with a foldable phone configured to fold from top to bottom, fabricating a two-section foldable phone case for coupling with a foldable phone configured to fold from side to side, wherein phone cases are configured to view front and back foldable phone folded and unfolded screens, and embedding a RFID chip with a unique ID number into a foldable phone cases configured for locating and identifying a user's foldable phone case. |
| US10951252B2 |
5G NR configurable wideband RF front-end LNA
Methods and devices addressing design of reconfigurable wideband LNAs to meet stringent gain, noise figure, and linearity requirements with multiple gain modes are disclosed. The disclosed teachings can be used to reconfigure RF receiver front-end to operate in various applications imposing stringent and conflicting requirements, such as 5G NR radios. Wideband and narrowband input and output matching with gain modes using a combination of the same hardware and a switching network are also disclosed. |
| US10951251B2 |
Time-domain IQ mismatch compensator with frequency-domain observations
A system, method, and electronic device for compensating in-phase (I) and quadrature (Q) mismatch (IQMM) are herein disclosed. The system includes an IQ mismatch compensator (IQMC) configured to compensate for IQMM between a time-domain I signal and a time-domain Q signal using filter weight coefficients, and output a compensated I signal and a compensated Q signal, a fast Fourier transformation (FFT) circuit configured to perform an FFT on the compensated I signal and the compensated Q signal to a frequency-domain compensated signal, and a coefficient updater configured to update the filter weight coefficients based on a frequency-domain observation of the frequency-domain compensated signal. |
| US10951250B1 |
High-speed DC shifting predrivers with low ISI
A DC-shifting predriver has an input port configured for coupling to a serial data stream, an inverting output amplifier having an feedback node and an output port configured for coupling to a transistor at the input to a high-speed DAC or TX driver, and a capacitor AC-coupled between the input port and the feedback node. A weak feedback inverter having structure similar to, but less drive strength than the inverting output amplifier is coupled between the output port and the feedback node to act as a positive feedback latch. The predriver provides a DC shift up to 3V with high reliability and minimal intersymbol interference for data rates from 10 GS/s to 28 GS/s or higher. The predriver may provide multiple input ports implemented as a predriver array in an M-bit system, and the output amplifier may consist of N stages. |
| US10951249B1 |
System and method for time-interpolated power change in a digital pre-distortion circuit
A transmit circuit operated with time-interpolated digital pre-distortion (DPD) coefficients to improve adjacent channel power ratio (ACPR) performance during a power mode change is provided. The transmit circuit includes a DPD circuit configured to operate with a first DPD coefficient according to a first transmit power level of a transmit power amplifier of the transmit circuit. The transmit circuit further includes a DPD coefficient management engine configured to retrieve a second DPD coefficient corresponding to the second transmit power level. The transmit circuit further includes a DPD coefficient time-interpolation engine configured to compute a set of time-interpolated DPD coefficients corresponding to a set of time instants for a transient period when the transmit power amplifier is adapted to the second DPD coefficient. |
| US10951247B1 |
Channelizing a wideband waveform for transmission on a spectral band comprising unavailable channel segments
Methods, systems, and devices for channelizing a wideband waveform for transmission on a spectral band comprising unavailable channel segments are described. Generally, the described techniques provide for transmitting and receiving wideband waveforms when channels of a system bandwidth are unavailable for transmission. A transmitter may separate a first wideband signal into segments, with each segment a bandwidth corresponding to a channel of the system bandwidth, and may map the segments to the available channels. The transmitter may combine the mapped segments into a second wideband waveform and transmit the second wideband waveform using the available channels. A receiver may receive a first wideband signal waveform and may separate the first wideband signal waveform into segments, de-map the segments and combine the de-mapped segments into a second wideband waveform for demodulation. The techniques may be used to transmit and receive wideband waveforms over tactical data links. |
| US10951241B2 |
Data processing device and data processing method
A transmitting device for generating a digital television broadcast signal incudes circuitry configured to receive data to be transmitted in a digital television broadcast signal and perform LDPC (low density parity check) encoding on input bits of the received data according to a parity check matrix initial value table of an LDPC code having a code length of 16200 bits and a code rate of 10/15 to generate an LDPC code word. The LDPC code enables error correction processing to correct errors generated in a transmission path of the digital television broadcast signal. The LDPC code word includes information bits and parity bits, the parity bits being processed by the receiving device to recover information bits corrupted by transmission path errors. |
| US10951238B1 |
Memory system and method for controlling non-volatile memory
A memory system of an embodiment includes a non-volatile memory and a memory controller. The memory controller generates an error correction code including a first and second symbol groups. The first symbol group is a set of symbols shared between a first component code and a third component code and/or a fourth component code. The second symbol group is a set of symbols shared between a second component code and the third component code and/or the fourth component code. The first and third component codes have a lower correction capability than the second and fourth component codes, respectively. The ratio of symbols protected by the third component code is smaller in the second symbol group than in the first symbol group. The ratio of symbols protected by the fourth component code is larger in the second symbol group than in the first symbol group. |
| US10951237B2 |
Composing array codes for power of two and variable block sizes
A computer-implemented method according to one embodiment includes identifying a block size used by an application, where the block size is a power of two, constructing, utilizing a plurality of instances of a first array code, a single instance of a second array code having a symbol size that matches the block size used by the application, where the symbol size of the second array code is always a power of two, and implementing the second array code within the application. |
| US10951235B2 |
Low density parity check decoder
A method and system for decoding low density parity check (“LDPC”) codes. An LDPC code decoder includes LDPC decoding circuitry comprising a Q message generator and a P sum adder array. The Q message generator combines an R message from a previous iteration with a P message to produce a Q message. The P sum adder array adds the P message to a difference of an R message from a current iteration and the R message from the previous iteration to produce an updated P message. |
| US10951231B2 |
Compression and decompression engines and compressed domain processors
Compressed domain processors configured to perform operations on data compressed in a format that preserves order. The Compressed domain processors may include operations such as addition, subtraction, multiplication, division, sorting, and searching. In some cases, compression engines for compressing the data into the desired formats are provided. |
| US10951226B2 |
Radio-frequency digital-to-analog converter system
A digital-to-analog converter system has digital-to-analog converters, a common output, and a digital controller for transmitting first codes to one of the converters at a radio-frequency digital rate, and for transmitting second codes to another one of the converters at the same rate. The digital controller includes a timing system for operating each converter at the digital rate in a return-to-zero configuration, such that a signal from the first converter is transmitted to the common output while the second converter is reset, and vice versa. The digital-to-analog converter system can generate a radio-frequency analog signal having signals in first and second Nyquist zones simultaneously. |
| US10951225B1 |
Successive approximation register analog-to-digital converter with multiple sample capacitors
A SAR ADC may include a plurality of capacitor networks, wherein each capacitor network of the plurality of capacitor networks has a sampling capacitor for sampling an analog input signal to the SAR ADC and at least one non-sampling capacitor. The SAR ADC may also include a DAC including a plurality of sub-DACs including at least a first sub-DAC representing most significant bits of an output of the SAR ADC, wherein the output of the first sub-DAC is coupled to the sampling capacitors of the plurality of capacitor networks and a second sub-DAC representing bits of the output of the SAR ADC lesser in magnitude significance than those of the first sub-DAC, wherein the output of the second sub-DAC is coupled to a respective one of at least one non-sampling capacitor of each of the plurality of capacitor networks. |
| US10951221B2 |
Testing an analog-to-digital converter using counters
In some examples, a device includes an analog-to-digital converter (ADC) configured to receive an analog signal and output digital codes based on values of the analog signal. The device also includes a plurality of counters, where each counter of the plurality of counters is configured to increment in response to a respective digital code outputted by the ADC. |
| US10951217B2 |
Device and method for controllably delaying electrical signals
A device and method for controllably delaying an electrical signal includes a first signal transfer path between a signal input and a signal output. The first signal transfer path includes a first signal transfer stage with a first differential pair and a common, adjustable first quiescent current source, and a second signal transfer path between the signal input and the signal output. The second signal transfer path includes a second signal transfer stage with a second differential pair and a common, adjustable second quiescent current source. An internal delay stage is arranged between the signal input and the second signal transfer stage and has a third differential pair and a common, adjustable third quiescent current source, and signal combination stage for additively superimposing the electrical signal transferred via the first signal transfer path on to the electrical signal transferred via the second signal transfer path. |
| US10951215B2 |
Semiconductor devices and methods of operating the same
A semiconductor device includes a time-to-digital converter (TDC) that receives a reference frequency signal and a feedback frequency signal, and outputs a first digital signal indicating a time difference between the reference frequency signal and the feedback frequency signal; a digital loop filter (DLF) that outputs a second digital signal generated by filtering the first digital signal; a multiplier circuit that outputs one of a third digital signal and a final test signal, the third digital signal generated by performing a multiplication operation on the second digital signal using a multiplication coefficient; a digital-controlled oscillator (DCO) that generates an oscillation signal having a frequency based on the output one of the third digital signal and the final test signal; and a loop gain calibrator (LGC) that receives the oscillation signal, generates a pair of test signals, and determines the multiplication coefficient using the pair of test signals. |
| US10951207B1 |
Integrated driving module
An integrated driving module includes an oscillator, a PWM unit, a soft start controller, a first driver, and a second driver. The oscillator is connected to a voltage input end and generates an oscillating signal. The PWM unit receives the oscillating signal and generates a first driving control signal and a second driving control signal that are respectively anti-phased. The first driver outputs a first driving output signal to a first output end according to the first driving control signal. The second driver outputs the second driving output signal to a second output end according to the second driving control signal. The integrated driving module only has four connection ends for external connection to provide the two anti-phase driving output signals, such that the circuit design and connection of the primary side of the transformer is greatly simplified. The design limitation and manufacturing cost can be both lowered. |
| US10951201B2 |
Flip flop standard cell
A flip flop standard cell that includes a data input terminal configured to receive a data signal, clock input terminal configured to receive a clock signal, a data output terminal, and a latch. A bit write circuit is configured to receive a bit write signal. The received data signal is latched and provided at the output terminal in response to the bit write signal and the clock signal. A hold circuit is configured to receive a hold signal, and the received data signal is not latched and provided at the data output terminal in response to the hold signal and the clock signal. |
| US10951200B2 |
Clock circuit and method of operating the same
A clock circuit includes a latch circuit, a memory state latch circuit, a memory state trigger circuit and a clock trigger circuit. The latch circuit is configured to latch an enable signal, and to generate a latch output signal based on a first clock signal. The memory state latch circuit is coupled to the latch circuit, and generates an output clock signal responsive to a first control signal. The memory state trigger circuit is coupled to the memory state latch circuit, and adjusts the output clock signal responsive to the latch output signal or a reset signal. The clock trigger circuit is coupled to the latch circuit and the memory state trigger circuit by a first node, configured to generate the first clock signal responsive to a second clock signal, and configured to control the latch circuit and the memory state trigger circuit based on the first clock signal. |
| US10951198B1 |
Semiconductor integrated circuit, transmission device, and memory device
According to one embodiment, a semiconductor integrated circuit includes a clock supply circuit, a first output circuit, and a second output circuit. The clock supply circuit outputs a first clock and a second clock, the first clock having a first period, the second clock having a second period that is 1/m times the first period. The m is a natural number of 2 or more. The first output circuit outputs a first signal indicating content of data to an outside when a first operation is performed and outputs a second signal having a toggle pattern based on the first clock to the outside when a second operation is performed. The second output circuit outputs an operation clock based on the first clock to the outside when the first operation is performed and outputs a sampling clock based on the second clock to the outside when the second operation is performed. |
| US10951191B1 |
Low-leakage automatic adjustable diplexer
Provided is a low-leakage automatic adjustable diplexer including a body, a thin plate and two resonant regulators. The body has therein cuboid waveguide channels each having a feeding portion, a reception port portion, a transmission port portion, a fitting portion, a first filtering portion, a second filtering portion, first E/H conversion units connected to two ends of the first filtering portion, respectively, and second E/H conversion units connected to two ends of the second filtering portion, respectively. The thin plate is clamped inside the body. The resonant regulators each have a plurality of frequency disturbance elements adjustably protruding into the first and second filtering portions. Given the E/H conversion units and the frequency disturbance elements penetratingly disposed on the H-side sidewall of the cuboid waveguide cavity, it is unnecessary for the cuboid waveguide channels to undergo any processing process for forming therein any protrusion-style insulation walls, thereby attaining low leakage. |
| US10951190B2 |
On-chip harmonic filtering for radio frequency (RF) communications
Systems and methods are disclosed for on-chip harmonic filtering for radio frequency (RF) communications. A filtering and matching circuit for an integrated circuit includes a first capacitance coupled in parallel with a first inductance, a second inductance coupled to the first inductance, and a variable second capacitance coupled between the first and second inductance. The variable second capacitance is controlled to provide filtering with respect to the RF signal as well as impedance matching with respect to a load coupled to the connection pad. For one embodiment, the variable second capacitance includes a coarse-tune variable capacitor circuit and a fine-tune variable capacitor circuit. The coarse-tuning controls impedance matching, and the fine tuning controls a notch for the filtering. The load can be an antenna for the RF communications. The integrated circuit can include a receive path, a transmit path, or both. |
| US10951189B2 |
Signal processing device, method and speaker
The present invention discloses a signal processing device, a signal processing method and a speaker. The signal processing device comprises a multi-band dynamic range controller, wherein the multi-band dynamic range controller receives an audio signal and includes a first band splitting unit and a resonant band adjustment unit; the first band splitting unit is configured to split the audio signal into multiple bands and obtain at least one resonant band therefrom, which has a resonant frequency band signal in a resonant frequency range of the audio signal; and the resonant band adjustment unit is configured to adjust the resonant frequency band signal based at least on a resonant band dynamic range control gain and output an adjusted resonant frequency band signal for combination with other band signals into a compression output signal. |
| US10951175B2 |
Envelope tracking circuit and related power amplifier apparatus
An envelope tracking (ET) circuit and related power amplifier apparatus is provided. An ET power amplifier apparatus includes an ET circuit and a number of amplifier circuits. The ET circuit is configured to provide a number of ET modulated voltages to the amplifier circuits for amplifying concurrently a number of radio frequency (RF) signals. The ET circuit includes a target voltage circuit for generating a number of ET target voltages adapted to respective power levels of the RF signals and/or respective impedances seen by the amplifier circuits, a supply voltage circuit for generating a number of constant voltages, and an ET voltage circuit for generating the ET modulated voltages based on the ET target voltages and a selected one of the constant voltages. By employing a single ET circuit, it may be possible to reduce footprint and improve heat dissipation of the ET power amplifier apparatus. |
| US10951174B2 |
High-frequency amplifier
A transistor (2) is provided on a surface of a semiconductor substrate (1). First and second wirings (10,11) are provided on the surface of the semiconductor substrate (1) and sandwich the transistor (2). Plural wires (20) pass over the transistor (2) and are connected to the first and second wirings (10,11). A sealing material (21) sealing the transistor (2), the first and second wirings (10,11), and the plural wires (20). The sealing material (21) contains a filler (21a). An interval distance between the plural wires (20) is smaller than a particle diameter of the filler (21a). The sealing material (21) does not intrude into a space between the plural wires (20) and the transistor (2) so that a cavity (22) is formed. |
| US10951173B2 |
Circuits, devices and methods related to amplification with active gain bypass
Circuits, devices and methods related to amplification with active gain bypass. In some embodiments, an amplifier can include a first amplification path implemented to amplify a signal, and having a cascode arrangement of a first input transistor and a cascode transistor to provide a first gain for the signal when in a first mode. The amplifier can further include a second amplification path implemented to provide a second gain for the signal while bypassing at least a portion of the first amplification path when in a second mode. The second amplification path can include a cascode arrangement of a second input transistor and the cascode transistor shared with the first amplification path. The amplifier can further include a switch configured to allow routing of the signal through the first amplification path in the first mode or the second amplification path in the second mode. |
| US10951172B2 |
Linear doherty power amplifier
An amplifier arrangement for amplifying an input signal to an output signal for delivering to a load is disclosed. The amplifier arrangement comprises a power splitter configured to receive the input signal and produce split input signals. The amplifier arrangement further comprises a first amplifier branch comprising multiple main amplifier circuits. Output signals of the multiple main amplifier circuits are combined to generate a first output signal. The amplifier arrangement further comprises a second amplifier branch comprising at least one auxiliary amplifier circuit. The at least one auxiliary amplifier circuit is configured to receive a split input signal from the power splitter and produce a second output signal. The amplifier arrangement further comprises a power combiner configured to receive the first and second output signals and produce the output signal for delivering to the load. |
| US10951171B2 |
Configurable switched power amplifier for efficient high/low output power
Power amplifiers and related methods are disclosed having configurable switched mode operation in a high-power mode of operation and a low-power mode of operation. The power amplifiers have a first cascode amplifier coupled to receive a positive differential input and a second cascode amplifier coupled to receive a negative differential input. The first and second cascode amplifiers include output stages and first/second input stages. The first input stages and the second input stages are enabled in a high-power mode of operation. The first input stages are disabled and the second input stages are enabled during a low-power mode of operation. For further embodiments, a switchable clamp operates in the low-power mode to clamp a voltage output for the second input stages. For further embodiments, the output stages are provided a variable voltage bias or are coupled to tunable capacitances that are varied between the low-power and high-power modes. |
| US10951169B2 |
Amplifier comprising two parallel coupled amplifier units
An amplifier with two parallel coupled amplifier units with inverse characteristics and in particular to the parallel coupling of a sourcing limited amplifier unit and a sinking limited amplifier unit. |
| US10951168B2 |
Electronic envelope detection circuit and corresponding demodulator
An electronic envelope detection circuit includes an input signal detecting circuit having at least one MOS transistor configured to receive a radiofrequency input signal and to deliver an internal signal on the basis of the input signal. The biasing point of the at least one transistor is controlled by the input signal and a control signal. A processing circuit that is coupled to the input signal detecting circuit is configured to deliver a low-frequency output signal on the basis of the internal signal and further deliver the control signal on the basis of the output signal. In operation, the value of the control signal decreases when the average power of the input signal increases, and vice versa. |
| US10951166B1 |
Crystal oscillator with fast start-up
The present document relates to oscillator circuits and a method. An oscillator circuit generates an oscillating voltage signal, wherein the crystal has a first electrode and a second electrode. The oscillator circuit has a power source with a supply terminal and a reference terminal. The oscillator circuit has a switching circuit arranged between the power source and the crystal. The switching circuit, in a start-up phase, alternately connects the supply terminal of the power source to the first and second electrode of the crystal such that an amplitude of the oscillating voltage signal is increased. |
| US10951163B1 |
Method for low-current oscillatory circuit with wide operation voltage and temperature compensation
A smart method is provided for a low-current oscillatory circuitry. The circuitry comprises an oscillator and a microcontroller unit (MCU). The oscillator comprises a proportional-to-absolute-temperature circuit connecting to a low-voltage regulator. The low-voltage regulator connects to a PMOS diode array and a delay unit circuit. The PMOS diode array connects to the MCU. The delay unit circuit connects to the MCU and a voltage converter. The method includes a normal temperature compensation algorithm; a smart learning algorithm of extra-high temperature compensation; and an ultra-high temperature compensation algorithm. Thus, clock variations are compensated; output frequency is stable and not affected by voltage or temperature variations; and process variations are suppressed. When process variations appear, there are not be too many errors generated. Therefore, a timebase clock is provided with high accuracy, wide operating voltage range, wide operating temperature range, and low power consumption operation. |
| US10951161B2 |
Cable integrated solar inverter
Systems for converting a standard direct current (DC) power from solar panels into a rectified DC power signal for further conversion into alternating current (AC) power are described herein. In some example embodiments, the systems may include distributed power converters and a grid interface unit connected by a trunk cable. In some example embodiments, the power converters may be embedded in the trunk cable. |
| US10951159B2 |
Solar tracker control system and method
A pneumatic control unit configured to inflate a first and second set of bellows with fluid from a pneumatic fluid source via a pneumatic circuit, the first and second set of bellows associated with one or more pneumatic actuators. The pneumatic control unit determines a target configuration of the actuators based on a determined current position of the sun; determines a current configuration of the actuators; determines a difference between the determined current configuration and target configuration of the actuators; determines that the difference between current configuration and the target configuration of the actuators is outside of a tolerance range; and actuates the actuators toward the determined target configuration by at least one of inflating the first or second set of bellows with fluid from the pneumatic fluid source via the pneumatic circuit. |
| US10951156B2 |
Modular solar power array
This system is directed to a mobile platform having a solar array carried by the mobile platform, connected to a distribution hub adapted to provide power to a base power source; an input controller having input computer readable instructions adapted to deliver power to a set of storage units from the base power source, the set of storage power units carried by the mobile platform; an output controller connected to the set of storage units having output computer readable instructions adapted to receive charge requirements from a load connected to the output controller, retrieving from a device lookup table included in the output controller a load type having charge specifications, and delivering power to the load according to the charge specifications; and, an external power source connected to the distribution bus for proving power to the base power source form the external power source. |
| US10951155B2 |
Temperature prediction device, compressor with magnetic bearing mounted thereon, temperature prediction method and program
A temperature prediction device includes an application voltage specifying unit which specifics a voltage value applied to an electromagnetic coil based on a distance from a distance detection unit provided in the electromagnetic coil to an output shaft, a coil current detection unit which detects a current value flowing when a voltage is applied to the electromagnetic coil on the basis of the voltage value specified by the application voltage specifying unit, and a coil temperature estimation unit which estimates a temperature of the electromagnetic coil on the basis of the voltage value specified by the application voltage specifying unit, the current value detected by the coil current detection unit, and a relational expression between the voltage value applied to the electromagnetic coil, the current value flowing when a voltage is applied to the electromagnet coil on the basis of the voltage value applied to the electromagnetic coil, and the temperature of the electromagnetic coil. |
| US10951152B2 |
Power conversion apparatus
In order to suppress vibration with a motor a load torque of which periodically fluctuates, an output torque of the motor is controlled to be periodically changed. In this case, in order to increase a vibration suppressing component by a direct power conversion apparatus, at least one of first control and second control is performed. In the first control, an output torque having a waveform including a fundamental frequency component of the load torque a fundamental frequency of which is a frequency in accordance with a fluctuation period of the load torque and at least one of a fourth harmonic and a sixth harmonic of a power source frequency of an AC power source is generated. In the second control, the output torque having a waveform including at least one of a second harmonic and a third harmonic of the fundamental frequency of the load torque and a second harmonic of the power source frequency of the AC power source is generated. |
| US10951151B2 |
Drive device
A drive device that includes a rotating-field rotary electric machine; and an inverter that drives the rotary electric machine, wherein: the rotary electric machine includes a stator core, and a coil wound on the stator core; the coil includes a first coil and a second coil electrically insulated from each other; and the inverter includes a first inverter circuit that supplies AC power to the first coil, and a second inverter circuit that supplies AC power to the second coil. |
| US10951146B1 |
Method to improve output current harmonic distribution in a segmented drive system
A segmented electrical drive system comprising a DC power bus comprising a DC voltage supply and a capacitor in parallel, an inverter comprising a plurality of inverter segments, a motor including a plurality of stator winding segments each connected to an inverter segment, and a controller. The controller receives a control signal and sends a switching signal to each of the inverter segments, wherein the switching signal is based on a discontinuous space vector pulse width modulation (DSVPWM) scheme for a segmented inverter. The DSVPWM scheme includes a set of reverse sawtooth carrier signals that are at an optimal phase shift angle with respect to each other. |
| US10951141B2 |
Position management apparatus and assisting apparatus
A position management apparatus includes motors connected to a power supply; a position detecting device connected to the power supply and detecting the rotational position of the motors or the drive position of driving members driven by the motors; position storage devices connected to the power supply and storing the rotational position or the drive position detected by the position detecting devices; and a power cut-off delay circuit for keeping the position detecting devices and the position storage devices connected to the power supply even if the power switch is shut off from a conducting state, and for storing the rotational position or the drive position of the position storage devices after the motor has lost its rotational speed. |
| US10951137B2 |
Method and system for converting single speed fans to variable speed fans
Legacy single speed fans are converted to variable speed fans configured to operate at reduced speeds. A conversion controller operates in conjunction with the existing controller. The conversion controller is configured with a 24 volt digital input module and a 0-10 volt analog output module. The input module is electrically connected to the 24v AC output signal wires from the existing controller. The input modules are also configured with a fan quantity selection switch to input the actual quantity of 24v AC signals for fans. The conversion controller registers the quantity of 24v AC contact signal inputs received from the existing controller, compares it to the fan quantity selected on the fan quantity selection switch, and sends a signal to the variable speed fans. The output modules are electrically connected to variable speed fan signal inputs. |
| US10951131B2 |
Converter and method for driving converter
A switch circuit of a converter includes three switch units. A first switch unit includes a first switch device, a second switch device, a third switch device, and a fourth switch device that are connected in series. A second switch unit includes a fifth switch device and a sixth switch device that are connected in series. A third switch unit includes a seventh switch device and an eighth switch device that are connected in series. When the first switch device and the fifth switch device are switched on, the seventh switch is controlled to be switched on. When the fourth switch device and the sixth switch device are switched on, the eighth switch device is controlled to be switched on, thereby effectively reducing a conduction loss of the converter. |
| US10951126B2 |
System and method for operating a system
In a system and method for operating a system having a rectifier which is supplyable from an electric AC-voltage supply network, an inverter which feeds an electric motor, and a DC/DC converter which is connected to an energy accumulator, the DC-voltage side connection of the inverter is connected to the DC-voltage side connection of the rectifier, in particular, the electric motor is supplied from the AC-voltage side connection of the inverter, a first DC-voltage side connection of the DC/DC converter is connected to the DC-voltage side connection of the rectifier, in particular, the DC-voltage side connection of the inverter and the first DC-voltage side connection of the DC/DC converter are connected in parallel, the DC/DC converter has a housing in which a device for current acquisition is situated, which acquires either the current, in particular network phase currents, flowing into the rectifier at the AC-voltage side connection of the rectifier, or the current emerging from the rectifier at the DC-voltage side connection of the rectifier, and the acquired value is forwarded to a signal electronics situated in the housing of the DC/DC converter, which generates control signals for semiconductor switches of the DC/DC converter. |
| US10951125B2 |
Supression of cross current in a plural converter system
A power conversion system that has two power conversion apparatuses each including a converter that can control a DC voltage and an inverter and that drives the AC motor by connecting the outputs of the two inverters in parallel is provided. The output voltage of one of the converters is controlled according to the difference between the detection currents detected by the two current detectors for detecting the output currents of the two inverters so that a cross current flowing through the two inverters is suppressed. |
| US10951124B2 |
Switching power supply circuit with synchronous rectifier and associated control circuit and control method
A switching power supply circuit has an energy storage component, a synchronous rectifier switch and a synchronous rectifier control circuit. The synchronous rectifier switch is coupled to a secondary side of the energy storage component, and the synchronous rectifier control circuit turns ON the synchronous rectifier switch based on a drain-source voltage across the synchronous rectifier switch when a primary switch is judged as turned ON. When the switching power supply circuit is not operating in a preset mode, the primary switch is judged as turned ON when the drain-source voltage remains larger than a dynamic reference voltage during a preset window time period, and when the switching power supply circuit is operating in the preset mode, the primary switch is judged as turned ON once the drain-source voltage is larger than the dynamic reference voltage. |
| US10951123B2 |
Power conversion system
A power conversion system is provided. The system includes a switch module, a resonant module, a magnetic conversion module, a bobbin and an iron core. The magnetic conversion module includes a primary winding and a PCB winding module. The PCB winding module includes a printed circuit board, a conductive layer disposed on at least one surface of the printed circuit board, and a switch unit disposed on the printed circuit board. |
| US10951122B2 |
Electronic converter and related method of operating an electronic converter
An electronic converter comprising a switching stage having at least one electronic switch, wherein the switching stage is configured to provide current pulses via a terminal; a first capacitor, wherein the first capacitor provides a first voltage. Specifically, the electronic converter further includes a second capacitor to provide a second voltage, comparison means configured to detect the difference between the first voltage and the second voltage, and determine a comparison signal which indicates whether this difference is greater than a threshold, and switching means configured to selectively transfer the current to the first capacitor or the second capacitor as a function of the comparison signal. The switching means may include a SCR, where the anode of the SCR is connected to the terminal that provides current pulses and where the cathode of the SCR is connected to the second capacitor. |
| US10951121B2 |
Closed loop foldback control
A controller for use in a power converter comprising a comparator, request control, and foldback control. The comparator configured to receive a feedback signal representative of an output of the power converter and a first regulation reference representative of a target value for the output, and in response to the comparison of the feedback signal and the first regulation reference, generate a first regulation signal. Request control configured to receive the first regulation reference, and output a request signal with request events. Foldback control configured to receive the first regulation signal to generate the first regulation reference, the foldback control further configured to sense a foldback or fault condition if the feedback signal is less than the first regulation reference for a threshold duration of time, the foldback control further configured to vary the first regulation reference in response to the sensed foldback or fault condition to reduce the output. |
| US10951120B2 |
Flyback converter, control circuit and control method therefor
The disclosure relates to a flyback converter, a control circuit and a control method therefor. In the control method, a power stage circuit is controlled at a light load to operate alternatively in a pulse-width modulation mode (e.g., a constant switching frequency mode) and in a constant on time mode, in accordance with a voltage compensation signal. Thus, output energy may decrease rapidly and smoothly, without need for the control circuit to stop working. The flyback converter has increased efficiency at the light load and decreased output voltage ripple. |
| US10951119B2 |
Method for controlling a switched electronic circuit
To this end, the invention relates to a method for controlling a switched electronic circuit connecting an electrical voltage source u to a load R and forming a system having an output y and a plurality of operating modes i, at least some of which thus can be activated by following a switching rule o. According to the invention, the following steps are provided: —measuring state variables x of the system having equilibrium values xr; —introducing at least one parameter p into the system, representing a measuring error of an electrical unknown of the operation of the circuit; —estimating the parameter from a state monitor and applying a Lyapunov function thereto; —deducing therefrom the equilibrium values of the system in order to obtain the control rule. |
| US10951117B2 |
Discontinuous conduction mode (DCM) voltage regulator circuit with reduced output voltage ripple
Various embodiments provide a voltage regulator circuit including two or more discontinuous conduction mode (DCM) phases coupled to an output node and coupled in parallel with one another. A control circuit may detect a trigger and switch all of the two or more DCM phases to a first state (charge state) responsive to the detection. The control circuit may switch a first DCM phase, of the two or more DCM phases, to a second state (discharge state) after a first predetermined time period in the first state and may switch a second DCM phase, of the two or more DCM phases, to the second state after a second predetermined time period in the first state, wherein the second predetermined time period is different than the first predetermined time period. Other embodiments may be described and claimed. |
| US10951116B2 |
Voltage regulator with nonlinear adaptive voltage position and control method thereof
A voltage regulator has a switching circuit and a control circuit. The switching circuit provides an output voltage and an output current. The control circuit provides a switching control signal to the switching circuit to adjust the output voltage, such that the output voltage decreases with a first slope as the output current increases when the output current is less than a predetermined current, the output voltage decreases with a second slope as the output current increases when the output current is larger than the predetermined current. |
| US10951115B2 |
Switching regulator
A switching regulator includes a switch device that is connected between an input terminal to which an input DC voltage is applied and an output terminal from which an output DC voltage is output, and that is turned on and off according to a drive signal; a hysteresis generation circuit to which the input DC voltage and the output DC voltage are applied; a reference voltage generation circuit that generates a reference voltage having a gradient proportional to an output current or an output voltage; and a drive signal generation circuit that generates the drive signal by comparing the output DC voltage with the reference voltage, and that, where the hysteresis generation circuit generates the output current or the output voltage that is inversely proportional to a differential voltage between the input DC voltage and the output DC voltage. |
| US10951113B1 |
Start-up control in power systems using fixed-ratio power conversion
A power converter system converts power from an input source for delivery to an active load. An input current surge at startup may be reduced by combining power converter switch resistance modulation with active load control. In another aspect, an input current surge at startup in an array of power converters may be reduced by periodically reconfiguring the array during the startup phase to accumulatively increase the output voltage up to a predetermined output voltage. A power converter may include a controller that provides an over-current signal to the load to reduce the load or advise of potential voltage perturbations. |
| US10951108B1 |
Switching power supply controlling circuit and controlling method thereof
This invention provides a switching power supply controlling circuit, the switching power supply comprises an upper transistor and a lower transistor, the switching power supply controlling circuit comprises a boost circuit, an input terminal of the boost circuit is connected to an input terminal of the switching power supply, the boost circuit output a first voltage to control a working state of the boost circuit, driving the upper transistor to be in an on state. The switching power supply controlling circuit adopts a boost circuit to provide a driving power for the upper transistor, and there is no need to set a bootstrap pin or a bootstrap capacitor. |
| US10951107B2 |
Communicating fault indications between primary and secondary controllers in a secondary-controlled flyback converter
Communicating fault indications between primary and secondary controller in a secondary-controlled flyback converter is described. In one embodiment, an apparatus includes a primary-side field effect transistor (FET) coupled to a flyback transformer coupled to the primary-side FET, and a primary-side controller coupled to the flyback transformer. The primary-side controller is configured to receive a signal from a secondary-side controller across a galvanic isolation barrier, apply a pulse signal to the primary-side FET in response to the signal to turn-on and turn-off the primary-side FET, communicate information to the secondary-side controller across the flyback transformer by varying a first pulse width of the pulse signal to a second pulse width and applying the pulse signal with the second pulse width to the primary-side FET. |
| US10951100B2 |
Winding method for electric motor stator, electric motor stator, and fan electric motor
A winding method for an electric motor stator includes at a start of winding of the coil, a first step for forming a two-turn winding portion by winding a magnet wire upwardly around a pin for two turns; a second step, subsequent to the first step, for winding the magnet wire to cross the two-turn winding portion from an outside from an upper side to a lower side on a side surface of the pin opposite from the power supply terminal; and a third step, subsequent to the second step, for winding the magnet wire for a half turn above the two-turn winding portion and then guiding the magnet wire to the power supply terminal to be hooked on the bent back section. |
| US10951097B2 |
Rotor, manufacturing method of the rotor, and motor
A rotor, which includes a rotor main body and a fan. The rotor main body includes a rotor core, a rotary shaft extending through the rotor core, and a permanent magnet mounted in the rotor core. The fan includes a plurality of fixing portions embedded in the rotor main body and configured to fix the permanent magnet. The rotor has a simple structure, can be easily assembled, and has a low cost. |
| US10951096B2 |
Method and apparatus for producing rotating electric machine stator
A method of producing a rotating electric machine stator includes an insertion step, bending step, and pressing step. In the insertion step, two leg portions of each U-shaped coil wire of a stator coil are inserted into different slots, such that protruding portions as distal end portions of the leg portions protrude in parallel with an axial direction of the stator core. In the bending step, the protruding portion of a first leg portion is bent in a first circumferential direction of the stator core, at a proximal end portion of the protruding portion as a bending start point, from a condition where the protruding portion protrudes from the slot in parallel with the axial direction of the stator core. In the pressing step, a distal end of the protruding portion bent in the first circumferential direction is pressed toward its proximal end in a second circumferential direction. |
| US10951091B2 |
Actuating device
An actuating device for mechanically actuating a component may include a housing having first and second housing parts lying against one another in a separation plane and fastened to one another, and an electric motor arranged in the first housing part and having an input shaft. The device may also include an output shaft rotatably mounted at least on the second housing part and penetrating a wall thereof, the output shaft one of (i) being connected externally on the second housing part with an actuating element for mechanical coupling with the component which is to be actuated, or (ii) forming an actuating element for mechanical coupling with the component which is to be actuated. The device may further include a gear connecting the input shaft with the output shaft, and having an output gearwheel rotatably connected with the output shaft. The second housing part, in relation to an axis of rotation running perpendicularly to the separation plane, may be able to be fastened to the first housing part in at least two different rotation positions. The output shaft may be arranged eccentrically to the axis of rotation on the second housing part. At least one of the first and second housing parts may have at least one bearing point for rotary bearing at least one additional gearwheel. In a first rotation position between the housing parts, the gear without the additional gearwheel may connect the input shaft with the output shaft with a first transmission ratio. In a second rotation position different from the first rotation position, between the housing parts, the gear with the additional gearwheel may connect the input and output shafts with a second transmission ratio different from the first transmission ratio. |
| US10951090B2 |
Transmission device and air-cooling island
Provided are a transmission device and an air-cooling island. The transmission device includes: a motor comprising a motor output shaft; and a speed reducer including a speed reducer input shaft. The motor output shaft is directly connected with the speed reducer input shaft. |
| US10951086B2 |
Electric device with wiring guide element
An electric device comprises an internal wiring and a housing. The housing includes a base and a cover. The base has a wiring guide member and a terminal area in which the internal wiring is connected to an outside electric conductor. The cover has a trough section into which the terminal area at least partly extends. The trough section has a trough wall which abuts the base to form a sealing surface. The wiring guide member supports the internal wiring at a position spaced apart from the sealing surface and opposite the trough wall and the internal wiring extends over the trough wall and into the trough section to the terminal area. |
| US10951085B2 |
Recording apparatus
A recording apparatus including a motor mounting frame in which, in an attached state, a drive shaft of a motor is projected to a front side with respect to a frame surface on the front side, and in the attached state, while a frame surface on a rear side and the motor oppose each other, the motor is attached to the motor mounting frame. The recording apparatus includes a frame attaching portion to which the motor mounting frame is attached. In the attached state, at least a portion of a fastening member that fixes the frame attaching portion is exposed when viewing the frame surface on the front side from the front, and the fastening member is at an attachable/detachable position. |
| US10951084B2 |
Power distribution for rotary electric machine
In some examples, at least one connecting ring may connect a plurality of stator coils of the same phase. For instance, the at least one connecting ring may include at least one linear conductor formed in a ring-like shape. The linear conductor may include a plurality of terminal sections, each terminal section including an open groove extending perpendicular to a plane formed by the ring-like shape. The open grooves may be positioned around a circumference of the connecting ring for receiving respective wire ends of respective stator coils inserted into the open grooves for forming an electrical connection between the respective wire ends and the connecting ring at the respective terminal sections. |
| US10951073B2 |
Electronic apparatus and wireless communication method
According to one embodiment, an electronic apparatus, includes: transmission circuitry configured to transmit a first request of power feeding; power reception circuitry configured to receive a first wireless signal in response to the first request of power feeding, and charge a rechargeable battery with a power from the first wireless signal; and controlling circuitry configured to determine a transmission timing of a second request of power feeding, based on a reception history of the power reception circuitry. |
| US10951072B2 |
Wireless power device having plurality of transmission coils and driving method therefor
A wireless power transmitter having a plurality of transmission coils is disclosed. The present transmitter comprises: first to Nth coils; and a control unit for transmitting, to a wireless power receiver, a first sensing signal through the first to Nth coils, and adjusting transmission orders of the first to Nth coils for transmitting a second sensing signal, on the basis of the signal strength of a received first signal strength indicator when the first signal strength indicator corresponding to the first sensing signal is received, wherein the control unit can transmit, to the receiver, the second sensing signal through the first to Nth coils on the basis of the adjusted transmission orders. Therefore, device efficiency and user convenience can be improved. |
| US10951069B1 |
Contactless power supply device and transmitter device
A contactless power supply device includes: a power transmitter, and a power receiver configured to accept a power transmission from the power transmitter without contact; the power transmitter including a transmitter coil for supplying power to the power receiver via a receiver coil in the power receiver; a power supply circuit including a power source configured to supply direct-current power, and a plurality of switching elements connected in a full-bridge or half-bridge configuration between the power source and the transmitter coil; the plurality of switching elements switching between on and off states at a predetermined frequency to thereby convert the direct-current power supplied by the power source into alternating-current power of a predetermined frequency which is supplied to the transmitter coil; an auxiliary coil arranged to be capable of electromagnetic coupling with the transmitter coil; and a capacitive element configured for connection to the auxiliary coil. |
| US10951066B2 |
Wireless power supply device and wireless power supply method
In order to facilitate impedance matching even when using a magnetic field antenna for power transmission in a medium, this underwater wireless power supply device 101 wirelessly transmits energy by resonating at a frequency determined by the impedance of a power transmission antenna 103, the impedance of a power receiving antenna 104, and the impedance of a good conductor medium 102. The power transmission antenna 103 and the power receiving antenna 104 have multiple antenna coils 1061, and multiple resonant antenna units 1051 to 1054 having at least one dielectric 1071 arranged between the multiple antenna coils 1061, and, at least one of the multiple resonant antenna units 1051 to 1054 is provided with a load adjustment mechanism 1081 for adjusting the load. |
| US10951065B2 |
Power feed system
A power feed system according to the present disclosure includes a power feed device and a power receiving device. The power receiving device includes a power receiving section that receives power wirelessly from the power feed device with use of a power receiving coil, and a first communication section that transmits, to the power feed device, coil information indicating whether or not a coil is provided near the power receiving coil. The power feed device includes a power feed section that supplies power wirelessly to the power receiving device, a second communication section that receives the coil information, and a controller that performs, on the basis of the coil information, a first determination as to whether or not to supply power to the power receiving device, and controls an operation of the power feed section on the basis of a result of the first determination. |
| US10951059B2 |
Harmonic detection system
A harmonic detection system (1) comprises a measurement component (71), a harmonic abnormality determination unit (561), and a smartphone (9). The measurement component (71) is installed at a specific position on a distribution line constituting a distribution network (100), and measures data related to the current of the distribution line. The harmonic abnormality determination unit (561) uses some or all of the data related to current as detection data to detect abnormality related to harmonics. The smartphone (9) is owned by a user (G), and notifies the user that an abnormality has occurred in the distribution line when a harmonic is detected. |
| US10951057B1 |
Reliable power module for improved substation device availability
Disclosed herein are systems for maintaining protection of electric power delivery systems in the event of a control power failure or other anomaly. A reliable power module conditions electric power from multiple independent sources and provides electrical operational power to electric power delivery system protective loads. The reliable power module includes a power storage device for providing operational power even upon loss of all control power sources. The power storage may be sufficient to ride through expected losses such as a time to start up backup generation. The power storage may be sufficient to power a trip coil. Thus, electric power system protection is maintained even upon loss of control power. |
| US10951050B2 |
Adaptive charger with input current limitation and controlling method for the same
An adaptive charger can include: a power converter configured to receive an input current from an external power supply, and to generate an output current as a charging current to a load; a current feedback loop configured to compare a first detection signal that represents the input current against a first current reference signal, and to generate a first error signal, where the power converter is configured to regulate the input current according to the first error signal; and the current feedback loop being configured to determine an overload state of the external power supply according to an input voltage of the power converter, where the charger is configured to enter a current limit state when the external power supply is determined to be in the overload state, and where the first current reference signal is gradually reduced until the external power supply recovers to a non-overloaded state. |
| US10951046B2 |
Battery and discharge FET protection circuit
A battery protection circuit includes cell terminals electrically connected to a positive electrode and a negative electrode of a battery, external terminals electrically connected to positive and negative electrodes of an electronic device, discharge and charge FETs connected along a high current path between the cell terminals and the external terminals, a controller having a first terminal electrically connected to a control electrode of the discharge FET and a second terminal electrically connected to a gate electrode of the charge FET, and configured to control the charge FET and the discharge FET, a first resistor electrically connected between the control electrode of the discharge FET and the first terminal of the controller, a capacitor electrically connected between the discharge FET and the first terminal of the discharge FET, and a transistor electrically connected between the control electrode of the discharge FET and a second electrode of the discharge FET. |
| US10951040B2 |
DC/DC converter for distributed storage and solar systems
A multi-power distributed storage system including a first power source; a second power source electrically connected to a common bus with the first power source; a single input port inverter electrically connected to the common bus. The system including a controller configured to communicate with at least the second power source, and the single input port inverter. The second power source including a plurality of battery banks and a plurality of bi-directional DC/DC converters configured to charge and discharge the plurality of battery banks and provide DC to the single input port inverter. |
| US10951039B2 |
Multi-input PV inverter system and method
Systems and methods relating to power inverters for power generation systems. A power inverter suitable for renewable power sources is configured with a data processing module that receives power related data from a power grid and from a battery backup inverter. The data processing module calculates mode of operation data based on the power related data and, if the mode of operation data exceeds a threshold, then the power generation system is operating in an off-grid mode (i.e. the system is decoupled from the power grid). If the mode of operation data is equal or less than the threshold, then the power generation system is operating in an on-grid operating mode. The system is also self-tuning with respect to the threshold value. |
| US10951035B2 |
Communication-free decentralized control framework for unit commitment in microgrids
Systems, methods, and computer-readable media are described for addressing the unit commitment problem in a power grid by providing a communication-free control framework according to which each power generating unit in the power grid determines its own operating schedule for turning on or off based solely on local measurements. |
| US10951034B2 |
Protection for an HVDC network
A method of protecting a high-voltage network comprising the steps for maintaining first controlled switches closed and second controlled switches open; measuring voltage and current on high-voltage interfaces; communicating the direction of the current to the other end of a high-voltage line; for each node: identifying a fault; verifying that the current is lower than the current interruption capability of the high-voltage interface switch and opening this switch. |
| US10951032B2 |
Multi-level medium voltage data center static synchronous compensator (DCSTATCOM) for active and reactive power control of data centers connected with grid energy storage and smart
Systems and methods for supplying power (both active and reactive) at a medium voltage from a DCSTATCOM to an IT load without using a transformer are disclosed. The DCSTATCOM includes an energy storage device, a two-stage DC-DC converter, and a multi-level inverter, each of which are electrically coupled to a common negative bus. The DC-DC converter may include two stages in a bidirectional configuration. One stage of the DC-DC converter uses a flying capacitor topology. The voltages across the capacitors of the flying capacitor topology are balanced and switching losses are minimized by fixed duty cycle operation. The DC-DC converter generates a high DC voltage from a low or high voltage energy storage device such as batteries and/or ultra-capacitors. The multi-level, neutral point, diode-clamped inverter converts the high DC voltage into a medium AC voltage using a space vector pulse width modulation (SVPWM) technique. |
| US10951029B2 |
Power source input device for both ac and dc power sources
A power source input device for both AC/DC power sources includes a first power source input unit that is provided at a power source input terminal of an electric power device to convert an AC or DC commercial power source selectively input from the outside into a DC driving power source and supply the converted DC driving power source to an accessory device. A second power source input unit is provided in the accessory device to supply the DC driving power source supplied from the first power source input unit to at least one load, thereby simplifying a configuration of a power source input terminal of each of the electric power devices and reducing a manufacturing cost thereof. |
| US10951019B2 |
Electrical link comprising an electrical protection device—voltage bias
An electrical link (290) configured to link a DC high-voltage power source (270) to a user apparatus (250), and includes an electrical conductor (240) surrounded by an insulating cover and an electrical protection device (200) including: a conductive sleeve (280) arranged around the insulating cover, a biasing module (245) configured to voltage-bias the conductive sleeve (280), a circuit breaker (210) arranged on the conductor (240) and configured to cut off a current transiting through the conductor (240), and a detection module (220) connected to the conductive sleeve (280) and configured to detect a current leak out of the conductor (240) and to command the circuit breaker (210) on the basis of the detection. The invention also relates to a method for the secure supply of electric power. |
| US10951016B1 |
Visible light communication pilot light and indicator light
An example system includes an electrical enclosure. The electrical enclosure includes an identification data module, an electrical sensor, an enclosure environment sensor, and a pilot light module. The pilot light module includes (i) a pilot light and (ii) a communication module. The communication module is coupled to the identification data module, the electrical sensor, and the enclosure environment sensor. The communication module is configured to determine a visual communication signal based on information received from one or more of the identification data module, the electrical sensor, and the enclosure environment sensor, and drive the visual communication signal via the pilot light. The visual communication signal indicates one or more operational parameters within the electrical enclosure. The system further includes a client device configured to receive the visual communication from the pilot light. |
| US10951011B2 |
Spark plug for internal combustion engines
A spark plug includes a housing, an insulator, a center electrode, and an earth electrode. The earth electrode has a gap-forming surface which forms a discharge gap between the gap-forming surface and a tip surface of the center electrode. The insulator includes an insulator protrusion protruding on the tip side of the housing in a plug axial direction. At least one of cross-sections passing through a plug center axis and parallel to the plug axial direction is referred to as an axial parallel cross-section. The outer peripheral surface of the insulator protrusion includes an insulator inclined surface extending inward toward the tip in the plug axial direction, in a straight line or a curve that is convex inward, in the axial parallel cross-section. In the axial parallel cross-section, a virtual straight line passing through both ends of the insulator inclined surface passes through the gap-forming surface. |
| US10951005B2 |
Techniques for attachment and alignment of optical components on a thermoelectric cooler (TEC) and an optical subassembly implementing same
In general the present disclosure is directed to a temperature control device, e.g., a TEC, that includes a top plate with at least first and second contact pads to allow for a soldering process to attach optical components to the first contact pad without causing one or more layers of the second contact pad to reflow and solidify with an uneven mounting surface. Thus, optical components such as a focus lens can be mounted to the second contact pad via, for instance, thermal epoxy. This avoids the necessity of a submount to protect the focus lens from the relatively high heat introduced during a soldering process as well as maintain the flatness of the second contact pad within tolerance so that the mounted focus lens optically aligns by virtue of its physical location/orientation with other associated optical components coupled to the first contact pad, e.g., a laser diode. |
| US10951004B2 |
Light source device
A light source device includes a substrate and a plurality of laser light sources. The laser light sources each include a submount mounted on the substrate, and a semiconductor laser element mounted on the submount. The laser light sources are individually and independently disposed on the substrate. The laser light sources disposed adjacent to each other and emitting light having an identical wavelength band differ from each other in thermal resistance at a region between the semiconductor laser element and the substrate. |
| US10951000B2 |
High power single mode fiber laser
A single mode (SM) high power laser system is configured with a laser source outputting a single mode or low mode kW-power light and a passive delivery fiber spliced to an output fiber of the fiber laser source and having a double bottleneck-shaped core. The latter is configured to increase a threshold for nonlinear effects in general and in particular for stimulated Raman scattering (SRS) so that the delivery passive fiber has a fiber length at least twice the length of a delivery passive fiber with a standard uniformly dimensioned core, which may be used with the same laser source, while outputting the kW-power light with an M2 factor less than 2. |
| US10950995B2 |
Modular low profile raceway to provide power and/or data connectivity
In various implementations, a raceway may be provided that is capable of providing power and/or data connectivity to items (e.g., devices, articles of furniture, etc.) coupled to the raceway. The raceway may be low profile. The raceway may be disposed on floor and/or under floor. The raceway may include an integrated power housing. The raceway may include segments that are selected, as desired for an application configuration, and that are coupleable to each other or other components of the raceway (e.g., nodes, joints, etc.). The housing of component(s) of the raceway may include a base and wall(s) with at least curved section and at least one straight section. |
| US10950994B2 |
Quick connect/disconnect coaxial cable connector
A quick connect and release mechanism is provided for a coaxial cable connector comprising a first connector body having an annular cavity accessible by a tubular opening. A conical retention ring is disposed in the annular cavity and engaging at least one radial step form along a rearwardly facing surface of the annular cavity and, furthermore, being configured to engage a retention surface of a second connector body upon insertion of a tubular sleeve thereof. Furthermore, a retention ring engager is disposed over a portion of the first connector body and has a sleeve portion extending into the tubular opening to urge the retention ring from engagement with the at least one radial step while also disengaging the retention surface of the second connector. As a consequence, the second connector is released from the first connector. |
| US10950987B2 |
Voltage protection for universal serial bus Type-C (USB-C) connector systems
An electronic device includes a first switch configured to connect a first sideband use (SBU) terminal of a Universal Serial Bus Type-C (USB-C) controller to a first SBU terminal of a USB-C receptacle. The electronic device also includes a second switch configured to connect a second sideband use (SBU) terminal of the USB-C controller to a second SBU terminal of the USB-C receptacle. The electronic device further includes a voltage protection circuit configured to deactivate one or more of the first switch and the second switch when a voltage exceeding a predetermined threshold is detected. The voltage protection circuit includes a first set of diodes coupled to the first SBU terminal of the USB-C controller and a second set of diodes coupled to the second SBU terminal of the USB-C controller. |
| US10950982B2 |
Connector with tuned channel
A connector is provided that includes a plurality of wafers. Each wafer supports a terminal and adjacent signal wafers are configured so as to provide broad-side coupled terminals. A pair of signal terminals can be surrounded on both sides by ground wafers that offer shielding so as to help isolate one signal pair from another signal pair. The geometry of the wafers can be adjusted so as to provide a tuned transmission channel. The resultant tuned transmission channel can be configured to provide desirable performance at high signaling frequencies of 12-16 GHz or even higher signaling frequencies such as 20 GHz. |
| US10950981B2 |
Electrical connector for high frequency use with dual orientation
An electrical connector includes an insulative housing with a rear base and a mating tongue extending forwardly from the base. Two rows of contacts are retained in the housing. A metallic shielding plate is embedded within the housing and between the two rows of contacts. Each row of contacts defines positions from one to twelve in the transverse direction wherein positions 2&3 and 10&11 are designated for high frequency signal transmission. In the shielding plate the space between corresponding positions 4 and 6, and that between corresponding positions 7 and 9, are of a complete or enlarged hole being essentially fully empty along the front-to-back direction for achieving the high frequency transmission without undesired crosstalk among the corresponding contacts. |
| US10950969B2 |
Ganged coaxial connector assembly with alternative attachment structures
A ganged coaxial connector assembly comprises a male connector including: a male connector body; and a plurality of unit male connectors arranged in the male connector body, wherein each unit male connector includes an inner contact, an outer contact and a dielectric spacer. The ganged coaxial connector assembly further comprises a female connector including: a female connector body; and a plurality of unit female connectors arranged in the female connector body, wherein the number of the unit female connectors is the same as that of the unit male connectors, and each unit female connector corresponds to each unit male connector when the male connector and female connector are mated, and wherein each unit female connector includes an inner contact, an outer contact and a dielectric spacer. The female connector may be formed with structures for push-pull, ball and groove attachment or alternatively for threaded sleeve attachment. |
| US10950967B2 |
Electric terminal housing with a terminal lock
An electric terminal housing includes a terminal cavity. The terminal cavity extends along a cavity axis from an insertion end to a mate end. The terminal cavity is adapted to hold an electric terminal. The terminal housing includes a terminal lock. The terminal lock includes a resilient arm that extends from the housing into the terminal cavity. The terminal lock includes a rib that extends from the arm toward the cavity axis. |
| US10950964B2 |
Electrical socket with contoured contact beams
An electrical socket and method of making an electrical socket. The socket has a cylindrical body defining a longitudinal axis and having opposite first and second end rings, a spaced contact beams, and an inner receiving area for accepting a mating pin. The first and second end rings being rotatably offset from one another with respect to the longitudinal axis, thereby twisting the contact beams into a hyperbolic geometry. Each beam has a middle section between first and second end sections and each contact beam. The middle section of each contact beam has a contour that defines an inner contact area such that the middle section extends further into the inner receiving area than the first and second end sections and such that the inner contact areas are positioned for contact with the mating pin when inserted into the inner receiving area. |
| US10950963B2 |
Ribbon cable connector, connector assembly and use of a connector
A ribbon cable connector for attachment to an end of a ribbon cable comprises a plurality of contact element receptacles adapted to receive a plurality of contact elements. A pair of adjacent contact element receptacles is separated from one another. |
| US10950957B2 |
Male plug, female socket and connector
A connector includes a male plug and a female socket. The male plug includes a plurality of terminals and a first insulation body. Each of the terminals includes a signal contact portion, a U-shaped terminal fixing portion, and a terminal soldering portion. The U-shaped terminal fixing portion of each of the terminals connects the signal contact portion and the terminal soldering portion. The first insulation body includes a plurality of connection slots, and each of the connection slots is configured to receive the terminal correspondingly. The female socket includes terminal portions, and a second insulation body having a plurality of receiving slots. Each of the receiving slots is configured to receive the terminal portion correspondingly. When the male plug is plugged into the female socket, the plurality of terminal portions are held by the signal contact portions of the male plug. |
| US10950956B2 |
Methods and systems for utilizing ideal taps in coaxial networks
Systems and methods are provided for utilizing ideal taps in coaxial networks. An ideal tap may have a plurality of ports that include at least an input port configured for receiving downstream (DS) signals from and transmitting upstream (US) signals to nodes upstream from the tap within the coaxial network; an output port configured for transmitting downstream (DS) signals to and receiving upstream (US) signals from nodes downstream from the tap within the coaxial network; and one or more drop ports for receiving signal from and transmitting signals to customer premise equipment (CPE) in the coaxial network. The ideal tap may further include processing circuits for handling signals received and transmitted via the tap, with the one or more processing circuits being configured to meet particular predefined tap performance criteria, where the particular predefined tap performance criteria comprise one or more of high return loss, high port-to-port isolation, and high port-to-port gain. |
| US10950955B2 |
Insulation piercing connector
A connector includes a clamping member, a base, and a body. A first channel is formed between the clamping member and the body, and at least one second channel is formed between the base and the body. The positions of the base and the body relative to one another and relative to the clamping member are adjustable to modify the size of the first channel and the second channel. Insulation-piercing members electrically connect a conductor in the first channel to one or more conductors in the second channel(s). |
| US10950954B2 |
Terminal assembly and method
A method of assembling a terminal assembly includes a terminal and a terminal insert. The terminal insert may be configured to be disposed at least partially in the terminal; the terminal and the terminal insert may be configured to receive at least a portion of a wire; and/or the terminal and the terminal insert may be configured to be crimped to the said wire. The terminal insert may include a first insert wing, a second insert wing a third insert wing, and/or a fourth insert wing. The terminal may include a first wing, a second wing, a third wing, and/or a fourth wing. The first wing of the terminal may be disposed proximate the first wing of the terminal insert and/or the second wing of the terminal may be disposed proximate the second wing of the terminal insert. |
| US10950952B1 |
Spherical space feed for antenna array systems and methods
An antenna array system includes a feed antenna and circuit boards. Each circuit board has pickup antenna elements disposed on a curved edge portion of a first edge of the circuit board, radiating elements disposed on a second edge portion of the circuit board, and transmit receive modules disposed between the pickup elements and the radiating elements on the circuit board. The antenna array can be part of an active electronically scanned array (AESA) antenna assembly. |
| US10950950B2 |
Antenna
An antenna includes a dielectric, first and second antenna electrodes each having an annular shape, and a probe electrode. The dielectric has first to third planes parallel to each other in a stacking direction. The first and second antenna electrodes are respectively disposed on the first and second planes. The second antenna electrode is different in size from the first antenna electrode and disposed inward from the outer periphery of the first antenna electrode. The probe electrode is disposed on the third plane and overlaps the first and second antenna electrodes in plan view along the stacking direction. The first and second antenna electrodes are electrically powered via the probe electrode. The probe electrode is remote from the first antenna electrode by a first distance and remote from the second antenna electrode by a second distance different from the first distance along the stacking direction. |
| US10950945B2 |
Antenna element, antenna module, and communication apparatus
A patch antenna (10) includes a planar first power feeding conductor pattern (11) that is formed on a dielectric substrate (20) and to which a radio frequency signal is fed, a planar second power feeding conductor pattern (12) that is formed on the dielectric substrate (20) and is arranged to be isolated from the first power feeding conductor pattern (11) so as to interpose the first power feeding conductor pattern (11) in the polarization direction when the dielectric substrate (20) is seen in a plan view, and a planar ground conductor pattern (13) that is formed on the dielectric substrate (20) so as to face the first power feeding conductor pattern (11) and the second power feeding conductor pattern (12) and is set to have a ground potential, wherein the second power feeding conductor pattern (12) is not set to have the ground potential. |
| US10950943B2 |
Antenna structure
An antenna structure includes a first feeding element, a second feeding element, a balun structure, a first radiation element, a second radiation element, a third radiation element, a fourth radiation element, a fifth radiation element, a sixth radiation element, and a dielectric substrate. The balun structure includes a central ground element, a first connection element, a second connection element, a third connection element, and a fourth connection element. The first connection element and the third connection element partially surround the central ground element. A first coupling gap is formed between the fifth radiation element and the first radiation element. A second coupling gap is formed between the fifth radiation element and the third radiation element. A third coupling gap is formed between the sixth radiation element and the second radiation element. A fourth coupling gap is formed between the sixth radiation element and the fourth radiation element. |
| US10950942B2 |
Ground plane independent antenna
Multiband low profile antenna arrangement comprising an antenna element and a ground plane, where said antenna element has one feed pin and at least one ground pin, and where said ground pin is connected to said ground plane, characterised in, that said feed pin and said at least one ground pin are positioned on the same side of a slot in said ground plane, that said ground plane is positioned at a predefined distance from any mounting surface, and that said slot is designed to compensate for any capacitive or inductive connection between said ground plane and a possible external ground plane on said mounting surface. |
| US10950941B2 |
Conductive structural member acting as single-ended NFC antenna
In an embodiment, conductive structural members of a device acting as NFC antenna are described. According to an embodiment, a device comprises: two conductive structural members, each comprising a first electrical end and a second electrical end, a dielectric isolation being configured between the first electrical end of the first conductive structural member and the first electrical end of the second conductive structural member; two NFC antenna feeds, the first feed being electrically coupled with the first electrical end of the first member, the second feed being electrically coupled with the first electrical end of the second member; two grounding components, one each grounding the second electrical end of the conductive structural members; at least one additional antenna feed configured for a frequency other than that of NFC, coupled to either of the two members. |
| US10950931B2 |
Wireless communication device
A wireless communication device of the present disclosure, to which an electric power measurement value is input that is measured in an electric power measurer to which a power supply side power line and a load side power line are connected, includes a first antenna element that transmits and receives radio waves and a wireless circuit connected to the first antenna element. The first antenna element has a longitudinal side perpendicular to a line along which the power supply side power line and the load side power line extend. |
| US10950928B2 |
Antenna device
A line conductor is configured so as to be arranged between a lower surface conductor and an upper surface conductor in parallel with the lower surface conductor in such a way as to extend around the periphery of a hollow cylindrical conductor in a state in which an end is connected to a side surface of the hollow cylindrical conductor and another end is open. As a result, efficient supply of power to a conductive liquid can be performed without disposing a conducting tube having a length of approximately λ/4 at an operating frequency. |
| US10950926B2 |
Dual-band antenna element and base station
A dual band antenna element comprises a support structure being a single molded part; a first feeding circuit and a second feeding circuit both arranged on the support structure; and a first radiating element arranged on the support structure and configured to radiate in a first operating frequency band. The first radiating element is fed by the first feeding circuit. Furthermore, a second radiating element is arranged on the support structure and configured to radiate in a second operating frequency band that is lower than the first operating frequency band. The second radiating element is fed by the second feeding circuit. |
| US10950924B2 |
Priority-based energy management
A system for controlling operation of a plurality of appliances includes first and second appliances. The first appliance is configured to report a power consumption via a network. A second appliance is configured to operate dependent on the power consumption reported by the first appliance. |
| US10950923B2 |
Antenna for an RFID reader and method for identifying a roll
An antenna (10) for an RFID reader, the antenna (10) comprising at least two linearly polarized individual antennas (24a-b) and a feed circuit (26) which is connected to the individual antennas (24a-b), wherein the individual antennas (24a-b) are arranged relative to one another with a tilt of an internal angle and together form a circularly polarized antenna, and wherein the antenna (10) has a free space (30) in a region of the internal angle. |
| US10950922B2 |
Battery monitoring device
An object of the present invention is to provide a battery monitoring device in which communication quality is stabilized and improved. Detection boards are mounted respectively on a plurality of cells arranged in a line, and respectively have a first antenna for wirelessly communicating status information of the mounted cells. A second antenna for receiving the status information transmitted from the first antenna is mounted on an ECU board. The plurality of detection boards and the ECU board are disposed on upper surfaces of the plurality of cells as the same plane. The plurality of detection boards are arranged in a line along an arrangement direction. The ECU board is disposed at the center in the arrangement direction of the cells. |
| US10950920B2 |
Transition between a tubular waveguide body and an external planar connection portion through a planar matching ridge in the waveguide body
It is provided a waveguide comprising a tubular, electrically conductive waveguide body, the waveguide having a rectangular cross-section. The waveguide further comprises an electrically conductive foil comprising at least one matching portion arranged within the waveguide body, extending along a propagation direction of the waveguide body, and at least one connection portion arranged outside of the waveguide body, for connecting the waveguide to a component, wherein the matching portion of the foil is tapered in a propagation direction of the waveguide and arranged to form a ridge protruding from a sidewall of the waveguide along part of the length of the waveguide, and wherein the connection portion extends outside of the waveguide, in a propagation direction of the waveguide and in the same plane as the matching portion. It is also provided a waveguide arrangement and a method for manufacturing such a waveguide arrangement. |
| US10950919B2 |
System comprising first and second servers interconnected by a plurality of joined waveguide sections
An apparatus comprises a waveguide section including an outer layer of conductive material tubular in shape and having multiple ends; and a joining feature on at least one of the ends of the waveguide section configured for joining to a second separate waveguide section. |
| US10950917B2 |
Dielectric resonator and dielectric filter
A dielectric filter includes a plurality of dielectric resonators. The dielectric filter further includes a plurality of resonator bodies corresponding to the plurality of dielectric resonators, and a peripheral dielectric portion lying around the plurality of resonator bodies. Each of the plurality of resonator bodies is formed of a first dielectric having a first relative permittivity. The peripheral dielectric portion is formed of a second dielectric having a second relative permittivity lower than the first relative permittivity. Each of the plurality of resonator bodies includes a plurality of individual elements separated from each other. |
| US10950916B2 |
Battery and battery manufacturing method
A battery manufacturing method includes assembling an internal terminal, a gasket, a battery case component, an insulator, and an external terminal into a state where a cylindrical part of the gasket is fitted in a mounting hole of the battery case component, a projecting part of the internal terminal is fitted in the cylindrical part of the gasket, the insulator is disposed on an outer surface of the battery case component with the projecting part fitted in a through-hole, and the external terminal is disposed on top of the insulator so as to lie on the projecting part. The external terminal is pressed against the projecting part of the internal terminal, and the external terminal or the internal terminal is vibrated to thereby weld together the projecting part and the external terminal in a solid state. |
| US10950906B2 |
Passive thermal management system for battery
A battery includes a thermally conductive housing, a first battery cell enclosed within the thermally conductive housing, and a laminated element enclosed within the thermal conductive housing. The laminated element is in contact with the first battery cell and the thermally conductive housing. The laminated element includes one or more heat conducting layers and one or more intumescent layers. The laminated element is configured to conduct heat generated by the first battery cell from the first battery cell to the thermally conductive housing during normal operational conditions of the first battery cell. A local portion of the laminated element adjacent to where the laminated element contacts the first battery cell is configured to reconfigure into a non-heat conducting configuration when the first battery cell experiences a thermal runaway condition. |
| US10950903B2 |
Battery state estimation using electrode transient model
An electrical system includes a battery pack, sensors, and a controller. The sensors configured output measured state signals indicative of an actual state of the battery back, including a respective actual voltage, current, and temperature of each of the multiple battery cells. The controller executes a method to generate, responsive to the measured state signals, an estimated state of the multiple battery cells using a respective open-circuit voltage and low-frequency transient voltage of each of the multiple battery cells. The controller estimates the low-frequency transient voltages using a porous electrode transient (PET) model as part of a model set, the PET model having open-circuit voltage elements representing uneven charge distribution within a cell electrode. State of charge (SOC) of the battery pack is estimated using the estimated voltages. An operating state of the electrical system is controlled in real-time responsive to the estimated SOC. |
| US10950898B2 |
Method and device for depassivation of a battery of a cash and valuables container
A method (100) for depassivation of a battery (BATT) of a cash and valuables container (10) includes at least one electronically controllable component (14) and an associated control circuit (18) being supplied by the battery (BATT). The control circuit (18) executes at least one control procedure for the at least one electronically controllable component (14). The valuables container can be transportable, e.g. a cash box (10), and includes an invalidation unit, in particular an ink dyeing system (14). The control circuit (18) then also executes the depassivation (120) of the battery (BATT) each time before activating or deactivating the at least one control procedure (130) or a sub-routine thereof, such as the sub-routine for controlling and driving the ink dyeing system. Specifically, the depassivation of the battery (BATT) is performed before each first/initial execution of the least one control procedure (130). |
| US10950892B2 |
Nonaqueous electrolyte secondary battery
A nonaqueous electrolyte secondary battery (10) includes a porous film (78) (heat resistance layer (HRL)) in, which particles (filler F) of an insulating ceramic are attached through a binder onto a surface of at least one of a negative electrode active material layer (63) and a separator (72, 74). In the nonaqueous electrolyte secondary battery, the insulating ceramic of the porous film (78) contains at least one of Fe and Ni. |
| US10950891B2 |
Diester-based polymer electrolytes for high voltage lithium ion batteries
New homopolymers and copolymers of diester-based polymers have been synthesized. When these polymers are combined with electrolyte salts, such polymer electrolytes have shown excellent electrochemical oxidation stability in lithium battery cells. Their stability along with their excellent ionic conductivities make them especially suitable as electrolytes in high energy density lithium battery cells. |
| US10950890B2 |
Diester-based polymer electrolytes for high voltage lithium ion batteries
New homopolymers and copolymers of diester-based polymers have been synthesized. When these polymers are combined with electrolyte salts, such polymer electrolytes have shown excellent electrochemical oxidation stability in lithium battery cells. Their stability along with their excellent ionic conductivities make them especially suitable as electrolytes in high energy density lithium battery cells. |
| US10950887B2 |
Anode structure for solid-state lithium-based thin-film battery
A solid-state lithium-based battery is provided in which the formation of lithium islands (i.e., lumps) during a charging/recharging cycle is reduced, or even eliminated. Reduction or elimination of lithium islands (i.e., lumps) can be provided by forming a lithium nucleation enhancement liner between a lithium-based solid-state electrolyte layer and a top electrode of a solid-state lithium based battery. |
| US10950877B2 |
Moisture exchanger and fuel cell arrangement comprising same
A moisture exchanger (10) for transferring moisture between two gases, including a plurality of hollow fiber membranes (12). The moisture exchanger (10) includes at least one partition (34) between the hollow fiber membranes (12) and in that the plurality of hollow fiber membranes (12) is subdivided, at least in a section (36) of the length thereof, into zones (38) that are connected in parallel. |
| US10950875B1 |
SOFC system and method to decrease anode oxidation
A solid oxide fuel cell system and method, the system including a hotbox containing a fuel cell stack, a fuel supply configured to provide a fuel to the fuel cell stack, and a blower configured to provide air to the fuel cell stack. During a shutdown operation, the blower is configured to cool the fuel cell stack at a rate ranging from about 0.75° C./min to about 3.0° C./min, until the temperature of the fuel cell stack is reduced to a temperature at which oxidation of anodes of the fuel cell stack is substantially prevented. |
| US10950872B2 |
Fuel cell module
A cell monitor connector is inserted with a first surface following a guide portion. When the cell monitor connector is further inserted, the cell monitor connector makes contact with a projection portion. In a state where the attachment is completed, the projection portion is elastically deformed so as to press a second surface. Due to this force, the cell monitor connector is held such that it is sandwiched between the projection portion and the guide portion. |
| US10950871B2 |
Flexible thin-film printed batteries with 3D printed substrates
A method for printing a flexible printed battery is disclosed. For example, the method includes printing, via a three-dimensional (3D) printer, a first substrate of the flexible thin-film printed battery, printing a first current collector on the first substrate, printing a first layer on the first current collector, printing, via the 3D printer, a second substrate, printing a second current collector on the second substrate, printing a second layer on the second current collector, and coupling the first substrate and the second substrate around a paper separator membrane moistened with an electrolyte that is in contact with the first layer and the second layer. |
| US10950870B2 |
Method for producing alloy catalyst for fuel cells using silica coating
Disclosed is a method for producing an alloy catalyst supported on carbon, including the steps of: dispersing alloy particles into a mixed solution of water with alcohol, introducing a silica precursor thereto, and carrying out sol-gel reaction in the presence of a basic catalyst to obtain silica-coated alloy particles; supporting the silica-coated alloy particles onto a carbon carrier to obtain silica-coated alloy particles supported on carbon; heat treating the silica-coated alloy particles supported on carbon to increase an alloying degree; and removing silica coating by using inorganic base solution and a surfactant. The method for producing an alloy catalyst provides a high-quality and high-durability alloy catalyst by increasing the alloying degree of a catalyst through a heat treatment step, while forming a silica coating layer effectively on small alloy particles having a size of several nanometers to inhibit growth of the size of alloy particles. In addition, the catalyst may be used advantageously as an electrode for fuel cells. |
| US10950868B2 |
Gas diffusion electrode and fuel cell
A gas diffusion electrode in which a microporous layer is provided on at least one surface of a conductive porous substrate, wherein the areas obtained by dividing the cross section perpendicular to the plane of the microporous layer into three equal parts in the thickness direction are a first area, a second area, and a third area, with respect to the conductive porous substrate side, the fluorine strength of the third area being 0.8 to 1.2 times the fluorine strength of the second area. |
| US10950861B2 |
Aluminum secondary battery having a high-capacity and high energy cathode and manufacturing method
Provided is an aluminum secondary battery comprising an optional anode current collector, an anode, a cathode, and an electrolyte in ionic contact with the anode and the cathode, wherein the anode contains aluminum metal or an aluminum metal alloy and the cathode comprises a layer of graphite or carbon material having expanded inter-graphene planar spaces with an inter-planar spacing d002 from 0.43 nm to 2.0 nm as measured by X-ray diffraction. Such an aluminum battery delivers a high energy density, high power density, and long cycle life. |
| US10950859B2 |
Lead-based alloy and related processes and products
A lead-based alloy containing alloying additions of bismuth, antimony, arsenic, and tin is used for the production of doped leady oxides, lead-acid battery active materials, lead-acid battery electrodes, and lead-acid batteries. |
| US10950853B2 |
Negative electrode active material having an intermediate layer and carbon coating layer, negative electrode including the same, and secondary battery including the negative electrode
A negative electrode active material including a core having SiOx (0≤x<2), an intermediate layer covering at least a portion of a surface of the core and including at least one of silicon nitride or silicon oxynitride, and a carbon coating layer covering at least a portion of the intermediate layer and containing nitrogen. |
| US10950852B2 |
Negative electrode material for non-aqueous electrolyte secondary battery and non-aqueous electrolyte secondary battery
A negative electrode material for a non-aqueous electrolyte secondary battery includes: a lithium silicate phase including lithium silicate particles; silicon particles dispersed in the lithium silicate phase; and a low-melting point inorganic oxide that has a lower melting point than lithium silicate forming the lithium silicate particles, and that is solid at room temperature. The lithium silicate particles and the silicon particles form a particle agglomerate, and the low-melting point inorganic oxide is filled in at least a portion of voids included in the particle agglomerate. |
| US10950851B2 |
Electrode including active materials having coat materials with different isoelectric points, and battery using same
One aspect of the present invention provides an electrode having a collector and an electrode mix layer disposed on the collector. The electrode mix layer contains an active material A having a core portion A and a coat material A, and an active material B having a core portion B and a coat material B. The isoelectric point of the coat material A is 7 or lower. The isoelectric point of the coat material B is 7 or higher. The isoelectric point of at least one of the coat material A and the coat material B is not 7. |
| US10950846B2 |
Method for in situ growth of axial geometry carbon structures in electrodes
Methods of forming a plurality of axial geometry carbon structures (e.g., carbon nanotubes or carbon fibers) in situ in an electrode of an electrochemical cell that cycles lithium ions are provided. Electroactive particles that undergo volumetric expansion are mixed with a polymer precursor and a plurality of catalytic nanoparticles comprising a metal selected from the group consisting of: iron, nickel, cobalt, alloys, and combinations thereof to form a substantially homogeneous slurry. The slurry is applied to a substrate and then heated in an environment having a temperature of ≤about 1000° C. and in certain aspects, ≤about 895° C. to pyrolyze the polymer precursor. The plurality of catalytic nanoparticles facilitates in situ precipitation of carbon to grow a plurality of axial geometry carbon structures. After the heating, the electrode includes an electrically conductive carbonaceous porous network comprising the plurality of electroactive particles and the plurality of axial geometry carbon structures. |
| US10950838B2 |
Nonaqueous electrolyte secondary battery
A nonaqueous electrolyte secondary battery including: a nonaqueous electrolyte secondary battery separator including a polyolefin porous film; a porous layer containing a polyvinylidene fluoride-based resin; a positive electrode plate having a capacitance falling within a specific range; and a negative electrode plate having a capacitance falling within a specific range, wherein: the polyolefin porous film has a given rate of diminution of diethyl carbonate and a given spot diameter of the diethyl carbonate; the porous layer is provided between the nonaqueous electrolyte secondary battery separator and at least one of the positive electrode plate and the negative electrode plate; and the polyvinylidene fluoride-based resin contained in the porous layer contains an α-form polyvinylidene fluoride-based resin in an amount of not less than 35.0 mol %. |
| US10950836B2 |
Separators for lithium-containing electrochemical cells and methods of making the same
A porous separator for a lithium-containing electrochemical cell is provided herein. The porous separator includes a porous substrate and an active layer comprising lithium ion-exchanged zeolite particles. Methods of manufacturing the porous separator and lithium-containing electrochemical cells including the porous separator are also provided herein. |
| US10950835B2 |
Battery pack
The present invention provides a battery pack in which a plurality of unit cells and one or a plurality of spacers are alternately arranged in a predetermined arrangement direction and a load is applied in the arrangement direction. The unit cell includes an electrode body having a reaction section, and a battery case having long side surfaces. The spacer includes, on a surface facing the unit cell, a first pressing portion that presses a part of the reaction section. The first pressing portion is configured to press each of the center portion and a pair of end portions of the reaction section in a width direction over the entire length in a vertical direction, and not to press a lower region, which is ⅓ of the reaction section from the lower end in the vertical direction, over a length of ½ or more in the width direction. |
| US10950834B2 |
Crushable cooling column for battery assembly in electric vehicle
A battery packaging arrangement. The battery packaging arrangement includes a first base configured to be fixedly coupled to a frame of a vehicle, a second base moveable with respect to the first base, and a plurality of cooling columns inter-disposed between the first base and the second base. Each of the plurality of cooling columns includes a plurality of receiving surfaces for receiving a corresponding plurality of battery cells. Each of the plurality of cooling columns is further configured to deform when the second base in response to a force moves towards the first base. |
| US10950830B2 |
Battery pack
A battery pack (20), which includes: a housing; a frame disposed inside the housing; and two or more cells (32) mounted to the frame. The two or more cells (32) are connected with each other through a configurable connector (52). The configurable connector (52) is suitable to connect or disconnect an electrical connection between the two or more cells (32). Wherein the configurable connector (52) includes a user contactable switch (22) located on an outer surface (21) of the housing. The user contactable switch (22) is configured to move within a plane parallel to the outer surface (21), such that the contactable connector (52) is switched between a first state and a second state. In the first state, the electrical connection exists between the two or more cells (32); in the second state, the electrical connection does not exist between the two or more cells (32). Therefore, the battery pack (20) may disconnect a connection of the internal circuit thereof in non-use state, such as shipping and storing, such that the battery pack (20) can disconnect its internal circuit in the non-use state such as transportation and storage, such that the loss caused by the self-discharging may be minimized and the safety hazard may be avoided at the same time. |
| US10950829B2 |
Sealing body of cylindrical battery, and cylindrical battery
A sealing body of a cylindrical battery, including: a sealing plate with a through-hole formed at a center of a metallic disk and a thin-walled portion formed into a groove in a planar surface of the disk, the sealing plate mounted to a cylindrical battery can having a closed bottom, so as to seal an opening of the battery can, the battery can doubling as an electrode current collector of either a positive or negative electrode and housing a power generating element; an electrode terminal of another of the positive or negative electrode, the electrode terminal including a shaft portion inserted into the through-hole and fitted to the sealing plate; and a sealing gasket made of resin and interposed between the shaft portion and the through-hole. The thin-walled portion has an arc shape and is not formed along a circle concentric with an outer periphery of the sealing plate. |
| US10950828B2 |
Surface-treated steel sheet for battery containers
A surface-treated steel sheet for a battery container, including a steel sheet, an iron-nickel diffusion layer formed on the steel sheet, and a nickel layer formed on the iron-nickel diffusion layer and constituting the outermost layer, wherein when the Fe intensity and the Ni intensity are continuously measured from the surface of the surface-treated steel sheet for a battery container along the depth direction with a high frequency glow discharge optical emission spectrometric analyzer, the thickness of the iron-nickel diffusion layer being the difference between the depth at which the Fe intensity exhibits a first predetermined value and the depth at which the Ni intensity exhibits a second predetermined value is 0.04 to 0.31 μm; and the total amount of the nickel contained in the iron-nickel diffusion layer and the nickel contained in the nickel layer is 10.8 to 26.7 g/m2. |
| US10950825B2 |
Method for manufacturing organic electronic device
A manufacturing method of an organic electronic device of the present invention, includes: a removing step of removing a volatile component from a flexible base material; a fixing step of fixing the flexible base material onto a support substrate via an adhesive layer; and a forming step of forming a device main body sequentially including a first electrode layer, at least one organic functional layer, and a second electrode layer on the flexible base material that is fixed onto the support substrate, on a side opposite to the support substrate, in this order, in which a vapor pressure of the volatile component is greater than or equal to 101325 Pa within a temperature range from 20° C. to a melting point of a parent resin of the flexible base material. |
| US10950824B2 |
Flexible display device
A flexible display device includes: a display panel capable of being bent with respect to a folding line; and a metal plate disposed on the display panel and capable of being bent with respect to the folding line. The metal plate has a plurality of holes disposed on each side of the folding line, the plurality of holes being formed in a zigzag pattern with respect to the folding line. |
| US10950821B2 |
Method of encapsulating an environmentally sensitive device
Methods of encapsulating an environmentally sensitive device. The methods involve temporarily laminating a flexible substrate to a rigid support using a reversible adhesive for processing, reversing the reversible adhesive, and removing the device from the rigid support. |
| US10950816B2 |
Display device for suppressing light emission in adjacent pixel due to current leakage
A display device may include a plurality of pixel electrodes arranged in a matrix along a first direction and a second direction perpendicular to each other. A plurality of light-emitting layers overlap with the respective plurality of pixel electrodes. A plurality of carrier generation layers are separated from one another. Each of the plurality of carrier generation layers continuously overlap with two of the plurality of light-emitting layers. The two are next to each other in a direction oblique to both the first direction and the second direction. A common electrode is opposed to the plurality of pixel electrodes. |
| US10950815B2 |
Light-emitting element comprising stacked light-emitting layers, light-emitting device, electronic device, and lighting device
A light-emitting element with a high current efficiency is provided. A low-power consumption light-emitting device is also provided. In addition, low-power consumption electronic device and lighting device are provided. The light-emitting element includes an EL layer between a pair of electrodes. The EL layer includes a light-emitting layer. The light-emitting layer includes a first light-emitting layer and a second light-emitting layer. The emission peak of the second light-emitting layer is at a shorter wavelength than that of the first light-emitting layer. The first light-emitting layer includes a host material and a guest material. The LUMO level of the guest material is in the range of ±0.1 eV of the LUMO level of the host material. |
| US10950814B2 |
Organic light-emitting diode having long lifespan property
The present disclosure relates to an organic light-emitting diode: comprising a first electrode; a second electrode facing the first electrode; and a hole transport layer and a light-emitting layer disposed in that order between the first and the second electrode, wherein the light-emitting layer includes a host and a hole assistant material represented by the following Chemical Formula A, the hole assistant material having a highest occupied molecular orbital (HOMO) energy level lower in absolute value than that of the host. |
| US10950807B2 |
Organometallic compound, organic light-emitting device including the organometallic compound, and diagnostic composition including the organometallic compound
An organometallic compound represented by Formula 1: wherein, in Formula 1, groups and variables are the same as described in the specification. |
| US10950806B2 |
Organic electroluminescent compound and organic electroluminescent device comprising the same
The present disclosure relates to an organic electroluminescent compound for near-IR light emission, an organic electroluminescent material and an organic electroluminescent device comprising the same. By comprising the organic electroluminescent compound of the present disclosure, it is possible to provide an organic electroluminescent device with near-IR light emission. |
| US10950804B2 |
Light-emitting layer and preparation method, organic light emitting diode device and display apparatus
A method for preparing a light-emitting layer, the light-emitting layer, an organic light emitting diode (OLED) device, and a display apparatus are provided. The light-emitting layer is prepared by preparing a host material containing a first photocrosslinker group and a guest material containing a second photocrosslinker group. The host material and the guest material are mixed in a solvent to form a mixture. The mixture is coated, annealed, and UV-irradiated on a substrate to form the light-emitting layer. As such, the disclosed light-emitting layer is prepared by the polymerization after being on the substrate. The light-emitting layer has a mesh structure. The mesh structure improves energy transfer between the host material and guest material and increases the lifespan of the resultant OLED device and OLED display apparatus. |
| US10950802B2 |
Organic light-emitting diode with high efficiency
The present invention relates to an organic light-emitting diode which can operate at a low voltage and has a long lifespan compound and, more particular, to an organic light-emitting diode, comprising: a first electrode; a second electrode facing the first electrode; and a light-emitting layer and an electron transport layer sequentially arranged between the first and the second electrode, wherein the light-emitting layer contains at least one of the amine compounds represented by following Chemical Formula A or Chemical Formula B, and the electron transport layer contains at least one of the compounds represented by the following Chemical Formula E. The structures of Chemical Formulas A, B, and E are as shown in the specification. |
| US10950796B2 |
Light-emitting element and display device
Provided are a light-emitting element and a display device containing the light-emitting element. The light-emitting element comprises an anode, a cathode opposite to the anode, and a plurality of organic layers placed between the anode and the cathode; at least three of the plurality of organic layers each independently contain a compound having a spirobifluorene structure; or at least two of the plurality of organic layers each contain the compound having a spirobifluorene structure and together contain at least three types of the compound having a spirobifluorene structure. By providing the organic layers with the compound having a spirobifluorene structure, the HOMO or LUMO energy level difference for hole or electron transport between different organic layers can be reduced due to the spirobifluorene compounds having the same main ring structure, which facilitates injection of electrons and/or holes, improving the luminous efficiency and lowering the turn on voltage. |
| US10950794B2 |
Methods for forming a perovskite solar cell
A perovskite thin film and method of forming a perovskite thin film are provided. The perovskite thin film includes a substrate, a hole blocking/electron transport layer, and a sintered perovskite layer. The method of forming the perovskite solar cell includes depositing a perovskite layer onto a substrate and processing (for example, by sintering) the perovskite layer with intense pulsed light to initiate a radiative thermal response that is enabled by an alkyl halide additive. |
| US10950793B2 |
Display panel having cathode connected to auxiliary electrode through conductive spacers and manufacturing method thereof, and display device
The disclosure provides a display panel and a manufacturing method thereof. The display panel display panel comprises a first substrate and a second substrate which are assembled, the second substrate is provided with an organic electroluminescent device thereon, an anode layer of the organic electroluminescent device is away from the first substrate and a cathode layer thereof is closer to the first substrate than the anode layer; the cathode layer of the organic electroluminescent device is electrically connected to an auxiliary electrode on a light entering surface of the first substrate through multiple conductive spacers, the cathode layer is a transparent electrode layer; the auxiliary electrode has a resistance smaller than that of the cathode layer of the organic electroluminescent device; the auxiliary electrode is a grid-shaped auxiliary electrode and is provided in a non-display region, the auxiliary electrode is opaque and acts as a black matrix. |
| US10950792B2 |
Formulation of an organic functional material
The present invention relates to a formulation containing at least one organic functional material and at least two different organic solvents, a first organic solvent A and a second organic solvent B, wherein the first organic solvent A has a boiling point in the range from 250 to 350° C. and a viscosity of >15 mPas, the second organic solvent B has a boiling point in the range from 200 to 350° C. and a viscosity of ≤10 mPas, the solubility of the at least one organic functional material in the second organic solvent B is ≥5 g/l, and the boiling point of the first organic solvent A is at least 10° C. higher than the boiling point of the second organic solvent B; as well as to electroluminescent devices prepared by using these formulations. |
| US10950791B2 |
Apparatuses including electrodes having a conductive barrier material and methods of forming same
Apparatuses and methods of manufacture are disclosed for phase change memory cell electrodes having a conductive barrier material. In one example, an apparatus includes a first chalcogenide structure and a second chalcogenide structure stacked together with the first chalcogenide structure. A first electrode portion is coupled to the first chalcogenide structure, and a second electrode portion is coupled to the second chalcogenide structure. An electrically conductive barrier material is disposed between the first and second electrode portions. |
| US10950789B2 |
Resisitive random access memory structure and method for forming the same
A resistive random access memory structure includes a semiconductor substrate, a transistor, a bottom electrode, a plurality of top electrodes, and a resistive-switching layer. The transistor is disposed over the semiconductor substrate. The bottom electrode is disposed over the semiconductor substrate and is electrically connected to a drain region of the transistor. The plurality of top electrodes is disposed along a sidewall of the bottom electrode. The resistance-switching layer is disposed between the bottom electrode and the plurality of top electrodes. |
| US10950786B2 |
Layer cost scalable 3D phase change cross-point memory
A 3D memory includes a plurality of first access line levels, a plurality of second access line levels and a plurality of memory cell levels, the memory cell levels being disposed between corresponding first access line levels and second access line levels. The first access line levels include a plurality of first access lines extending in a first direction, and a plurality of remnants of a first sacrificial material disposed between the first access lines. The second access line levels include a plurality of second access lines extending in a second direction and a plurality of remnants of a second sacrificial material disposed between the second access lines. The memory cell levels include an array of memory pillars disposed in the cross-points between the first access lines and the second access lines in adjacent first and second access line levels. |
| US10950784B2 |
RRAM with a barrier layer
Various embodiments of the present application are directed towards a resistive random-access memory (RRAM) cell comprising a barrier layer to constrain the movement of metal cations during operation of the RRAM cell. In some embodiments, the RRAM cell further comprises a bottom electrode, a top electrode, a switching layer, and an active metal layer. The switching layer, the barrier layer, and the active metal layer are stacked between the bottom and top electrodes, and the barrier layer is between the switching and active metal layers. The barrier layer is conductive and has a lattice constant less than that of the active metal layer. |
| US10950783B2 |
Magnetoresistive element and magnetic sensor
A magnetoresistive element includes a channel layer, a first ferromagnetic layer, a second ferromagnetic layer, and a reference electrode. The first ferromagnetic layer, the second ferromagnetic layer, and the reference electrode are apart from each other and are electrically connected to each other through the channel layer. The average resistivity of a sixth region composed of a first region, a second region, and a fourth region is higher than the average resistivity of a seventh region composed of the second region, a third region, and a fifth region. |
| US10950779B2 |
Piezoelectric element and device using same
The purpose of the present invention is to provide a fibrous piezoelectric element which enables a large electric signal to be drawn out by stress produced by relatively small deformation. A piezoelectric element includes a braid composed of a conductive fiber and a piezoelectric fiber. In the braid, the conductive fiber is a core, and the piezoelectric fiber is a covering fiber that covers the periphery of the conductive fiber. |
| US10950777B2 |
Conversion of heat to electricity using phase transformations in ferroelectric oxide capacitors
An example power generation system includes two capacitors and an electric load. A first capacitor includes a dielectric material that is configured to transition from a ferroelectric phase to a paraelectric or antiferroelectric phase when heated above a first transition temperature, and to transition from the paraelectric or antiferroelectric phase to the ferroelectric phase when cooled below a second transition temperature. A second capacitor is electrically coupled in parallel to the first capacitor. The electric load is electrically coupled to the first capacitor and the second capacitor. The system is configured to cyclically cool the dielectric material below the second transition temperature to draw a charge from the second capacitor to the first capacitors through the electric load, and heat the dielectric material beyond the first transition temperature to draw a charge from the first capacitor to the second capacitors through the electric load. |
| US10950776B2 |
Thermoelectric power generation device
A thermoelectric power generation device including: a heating unit having a heat medium passage in which a heat medium flows, a cooling unit having a cooling liquid passage in which a cooling liquid flows, a thermoelectric element having the heating unit on one side and the cooling unit on another side, the thermoelectric element configured to generate power by utilizing a temperature difference between a condensation temperature of the heat medium that undergoes latent heat transfer in the heat medium passage and a temperature of the cooling liquid; and the thermoelectric power generation device further including a heat medium adjusting unit configured to adjust the pressure or the temperature of the heat medium. |
| US10950775B2 |
Conversion material
The present invention provides a conversion material including a first phase providing a matrix and a second phase comprising a nanoscale or microscale material providing electron mobility. The conversion material converts heat from a single macroscopic reservoir into voltage. |
| US10950774B2 |
Thermoelectric materials and devices comprising graphene
Composite materials with thermoelectric properties and devices made from such materials are described. The thermoelectric composite material may comprise a metal oxide material and graphene or modified graphene. It has been found that the addition of graphene or modified graphene to thermoelectric metal oxide materials increases ZT. It has further been found that the ZT of the metal oxide becomes effective over a broader temperature range and at lower temperatures. |
| US10950773B1 |
Light emitting diode devices
A light emitting assembly comprising at least one of each of a solid state device and a thermal radiation source, couplable with a power supply constructed and arranged to power the solid state device and the thermal radiation source, to emit from the solid state device a first, relatively shorter wavelength radiation, and to emit from the thermal radiation source non-visible infrared radiation, and a down-converting luminophoric medium arranged in receiving relationship to said first, relatively shorter wavelength radiation, and the infrared radiation, and which in exposure to said first, relatively shorter wavelength radiation, and infrared radiation, is excited to responsively emit second, relatively longer wavelength radiation. In a specific embodiment, monochromatic blue or UV light output from a light-emitting diode is down-converted to white light by packaging the diode and the thermal radiation device with fluorescent or phosphorescent organic and/or inorganic fluorescers and phosphors in an enclosure. |
| US10950767B2 |
Light-emitting device and method of preparing same, optical semiconductor element mounting package, and optical semiconductor device using the same
An optical semiconductor element mounting package that has good adhesion between the resin molding and the lead electrodes and has excellent reliability is provided, as well as an optical semiconductor device using the package is also provided. The optical semiconductor element mounting package having a recessed part that serves as an optical semiconductor element mounting region, wherein the package is formed by integrating: a resin molding composed of a thermosetting light-reflecting resin composition, which forms at least the side faces of the recessed part; and at least a pair of positive and negative lead electrodes disposed opposite each other so as to form part of the bottom face of the recessed part, and there is no gap at a joint face between the resin molding and the lead electrodes. |
| US10950766B2 |
Light guide with patterned ink
A light-emitting device comprising: a light source; and a light guide that is optically coupled to the light source, the light guide including a plurality of first non-fluorescent light extraction elements and a plurality of second non-fluorescent light extraction elements that are printed on the light guide, each of the first light extraction elements having a reflectance that is higher than a reflectance of any of the second light extraction elements, each of the first light extraction elements having a light transmittance that is lower than a light transmittance of any the second light extraction elements, each of the first light extraction elements having the same shape and size as any other one of the plurality first light extraction elements, and each of the second light extraction elements having the same shape and size as any other one of the plurality of second light extraction elements. |
| US10950765B2 |
Method for producing at least one optoelectronic component, and optoelectronic component
A method for producing at at least an optoelectronic component and an optoelectronic component are disclosed. In an embodiment a method includes providing a substrate having at least one aperture, applying at least one semiconductor chip to the substrate, arranging barrier structures provided that the barrier structures are not already part of the substrate, wherein the semiconductor chip is spaced apart from the barrier structures as seen in a side cross-section, applying an auxiliary carrier at least to a main radiation exit surface and to the barrier structures, introducing a casting material via the at least one aperture in the substrate so that the casting material is arranged between the barrier structures and the semiconductor chip and between the substrate and the auxiliary carrier, and curing the casting material. |
| US10950762B2 |
Round chip scale package and manufacturing method therefor
The present invention provides a round chip scale package comprising: a light emitting diode for providing blue light from a side surface and an upper surface thereof; and a three-dimensional fluorescent layer arranged to encompass the side surface and the upper surface of the light emitting diode, thereby converting the blue light emitted from the side surface and the upper surface of the light emitting diode into white light, wherein the three-dimensional fluorescent layer comprises a phosphor and silicon, and an edge region of the three-dimensional fluorescent layer is formed into a round shape. |
| US10950760B2 |
Two component glass body for tape casting phosphor in glass LED converters
The present invention is directed to a method for preparing a glass device comprising the steps of: —preparing a mixture comprising: —at least two glass components, —a solvent, —at least one binder system, —optionally at least one defoamer, —blending the mixture to form a blend mixture, —grinding the blend mixture to form a grinded mixture, —casting the grinded mixture to form a layer, and —drying the layer to form a dried layer of a glass device.The present invention is further directed to a glass device, a wavelength converter and a light emitting device comprising the glass device and/or the wavelength converter. |
| US10950758B2 |
Light-emitting device with reflective layer
A light-emitting device comprises a semiconductor structure comprising a surface and a side wall inclined to the surface, wherein the semiconductor structure comprises a first semiconductor layer, a second semiconductor layer on the first semiconductor layer, and an active layer between the first semiconductor layer and the second semiconductor layer, and the second semiconductor layer comprises a first edge and a first area; a reflective layer located on the second semiconductor layer and comprising an outer edge and a second area, wherein a distance between the first edge and the outer edge is greater than 0 μm and is not greater than 10 μm; and a first contact part comprising a metal formed on the reflective layer and the first semiconductor layer, wherein the first contact part comprises a first periphery comprising a first periphery length larger than a periphery length of the active layer from a top-view of the light-emitting device. |
| US10950754B2 |
Semiconductor device increasing light output
An embodiment discloses a semiconductor device comprising: a light-emitting structure having a first conductive semiconductor layer, a second conductive semiconductor layer and an active layer disposed between the first conductive semiconductor layer and the second conductive semiconductor layer; a first electrode disposed on the first conductive semiconductor layer; a second electrode disposed below the second conductive semiconductor layer; and a current blocking layer disposed between the second conductive semiconductor layer and the second electrode, wherein the first conductive semiconductor layer includes a first region in which the first electrode is disposed and a second region, the thickness of which is less than the thickness of the first region, and the current blocking layer is disposed in a region corresponding to the first region in the thickness direction. |
| US10950751B2 |
Deep ultraviolet LED and method for manufacturing the same
Provided is a deep ultraviolet LED with a design wavelength λ, including a reflecting electrode layer, an ultra-thin metal layer, and a p-type contact layer that are arranged in this order from a side opposite to a substrate; and a hemispherical lens bonded to a rear surface of the substrate on a side of the p-type contact layer, the hemispherical lens being transparent to light with the wavelength λ. The refractive index of the hemispherical lens is greater than or equal to the average value of the refractive index of the substrate and the refractive index of air and is less than or equal to the refractive index of the substrate. The hemispherical lens has a radius that is greater than or equal to the radius of an inscribed circle of the substrate and is about equal to the radius of a circumscribed circle of the substrate. |
| US10950746B2 |
Method for producing a plurality of optoelectronic components, and optoelectronic component
A method for producing a plurality of optoelectronic components are disclosed. In an embodiment, the method includes providing a substrate, epitaxially applying a sacrificial layer on the substrate, wherein the sacrificial layer has a layer thickness greater than 300 nm and comprises AlxGa(1-x)As with 0 |
| US10950744B2 |
Light receiving element and method of manufacturing the same
A light receiving element is obtained by: forming a first mask having a first opening and a second opening; performing etching by using the first mask, to allow the etching to progress at a higher rate in the second opening than in the first opening; forming a second mask having a third opening and a fourth opening; performing etching by using the second mask, to form a mesa in a region interposed by the third opening, and an n-type contact region in the fourth opening; and forming a first electrode on the mesa and a second electrode on the n-type contact region, the first electrode being electrically connected to the third layer, the second electrode being electrically connected to the first layer, wherein a region covered with the first mask and exposed through the fourth opening of the second mask turns into the n-type contact region after the etching using the second mask. |
| US10950742B2 |
Method for preparing a compound-based film for use in a solar cell by photo-electrodeposition
A method for preparing a film of a CIS semiconductor compound overcoated by a color layer includes preparing an electrolyte solution by mixing precursors of film constituents including Cu, In, and Se with a solvent; configuring an electrodeposition circuit by connecting an electrochemical cell comprising the electrolyte solution, a working electrode, and a counter electrode to a voltage or current supply device; disposing a photomask having the predetermined pattern on the working electrode; producing the film through the photomask on a surface of the working electrode by applying a reduction voltage or current; disposing a light source to emit light toward the photomask; and photoelectrically depositing the film on the surface of the working electrode at least in the predetermined pattern while illuminating light through the photomask; and forming a color layer of CuSe at least in the predetermined pattern on the film employed as a working electrode using photo-electrodeposition. |
| US10950740B2 |
Solar cells having differentiated P-type and N-type architectures
Methods of fabricating solar cell emitter regions with differentiated P-type and N-type region architectures, and the resulting solar cells, are described herein. In an example, a solar cell includes an N-type semiconductor substrate having a light-receiving surface and a back surface. A plurality of N-type polycrystalline silicon regions is disposed on a first thin dielectric layer disposed on the back surface of the N-type semiconductor substrate. A plurality of P-type polycrystalline silicon regions is disposed on a second thin dielectric layer disposed in a corresponding one of a plurality of trenches interleaving the plurality of N-type polycrystalline silicon regions in the back surface of the N-type semiconductor substrate. |
| US10950739B2 |
Photodiode with improved power absorption
A photodiode which includes a core of a first waveguide that terminates in a tapered termination that extends above a core, made of germanium or of SiGe, of a second waveguide, a matching strip that extends opposite the tapered termination on one side and opposite the core of the second waveguide on the opposite side, this matching strip being coupled optically to the core of the second waveguide by an evanescent coupling and including a first zone inside which its effective propagation index is equal to the effective propagation index of a second zone of the tapered termination, these first and second zones optically coupling the tapered termination to the matching strip through a modal coupling, and a low-index layer that extends between the matching strip and the tapered termination. |
| US10950737B2 |
Semiconductor structures and manufacturing the same
A layered semiconductor structure with a width in a lateral direction, having an operating area covering part of the width of the semiconductor structure, comprises a semiconductor substrate with majority charge carriers of a first polarity; and a first dielectric layer with inducing net charge of the first polarity on the semiconductor substrate. An induced junction is induced in the semiconductor substrate by an electric field generated in the semiconductor substrate by the inducing net charge. The semiconductor structure is configured to confine the electric field generated in the semiconductor substrate in the operating area. |
| US10950736B2 |
Substrates and transistors with 2D material channels on 3D geometries
Roughly described, a transistor is formed with a semiconductor 2D material layer wrapped conformally on at least part of a 3D structure. The 3D structure can be for example a ridge made of a dielectric material, or made of dielectric material alternating longitudinally with a semiconductive or conductive material. Alternatively the 3D structure can be tree-shaped. Other shapes are possible as well. Aspects also include methods for making such structures, as well as integrated circuit layouts defining such structures and methods for developing such layouts, a machine readable data storage medium storing design entries which include some which define such structures and layouts, methods for developing such design entries. Aspects further include corrugated wafers which are prepared as an intermediate product for use in fabricating integrated circuits having a semiconductor 2D material layer disposed conformally on a 3D structure. |
| US10950730B2 |
Merged source/drain features
The present application provides a semiconductor device and the method of making the same. The method includes recessing a fin extending from a substrate, forming a base epitaxial feature on the recessed fin, forming a bar-like epitaxial feature on the base epitaxial feature, and forming a conformal epitaxial feature on the bar-like epitaxial feature. The forming of the bar-like epitaxial feature includes in-situ doping the bar-like epitaxial feature with an n-type dopant at a first doping concentration. The forming of the conformal epitaxial feature includes in-situ doping the conformal epitaxial feature with a second doping concentration greater than the first doping concentration. |
| US10950727B2 |
Strained semiconductor using elastic edge relaxation of a stressor combined with buried insulating layer
An SOI wafer contains a compressively stressed buried insulator structure. In one example, the stressed buried insulator (BOX) may be formed on a host wafer by forming silicon oxide, silicon nitride and silicon oxide layers so that the silicon nitride layer is compressively stressed. Wafer bonding provides the surface silicon layer over the stressed insulator layer. Preferred implementations of the invention form MOS transistors by etching isolation trenches into a preferred SOI substrate having a stressed BOX structure to define transistor active areas on the surface of the SOI substrate. Most preferably the trenches are formed deep enough to penetrate through the stressed BOX structure and some distance into the underlying silicon portion of the substrate. The overlying silicon active regions will have tensile stress induced due to elastic edge relaxation. |
| US10950725B2 |
Epitaxial source/drain structure and method of forming same
A semiconductor device and a method of forming the same are provided. The semiconductor device includes a gate stack over an active region and a source/drain region in the active region adjacent the gate stack. The source/drain region includes a first semiconductor layer having a first germanium concentration and a second semiconductor layer over the first semiconductor layer. The second semiconductor layer has a second germanium concentration greater than the first germanium concentration. The source/drain region further includes a third semiconductor layer over the second semiconductor layer and a fourth semiconductor layer over the third semiconductor layer. The third semiconductor layer has a third germanium concentration greater than the second germanium concentration. The fourth semiconductor layer has a fourth germanium concentration less than the third germanium concentration. |
| US10950723B2 |
Semiconductor device and circuit having the same
In a semiconductor device with a wide gap semiconductor, a gate insulating film is made of a material having a barrier against a minor carrier in an n-type body layer and having no barrier against a minor carrier in a p-type drift layer. As a result, in the semiconductor device with the wide gap semiconductor, a reduction in a conduction loss can be achieved while realizing an improvement in blocking resistance and securing reliability of the gate insulating film. |
| US10950722B2 |
Vertical gate all-around transistor
Vertical GAA FET structures are disclosed in which a current-carrying nanowire is oriented substantially perpendicular to the surface of a silicon substrate. The vertical GAA FET is intended to meet design and performance criteria for the 7 nm technology generation. In some embodiments, electrical contacts to the drain and gate terminals of the vertically oriented GAA FET can be made via the backside of the substrate. Examples are disclosed in which various n-type and p-type transistor designs have different contact configurations. In one example, a backside gate contact extends through the isolation region between adjacent devices. Other embodiments feature dual gate contacts for circuit design flexibility. The different contact configurations can be used to adjust metal pattern density. |
| US10950719B2 |
Seminconductor device with spreading layer
A vertical field-effect transistor (FET) device includes a monolithically integrated bypass diode connected between a source contact and a drain contact of the vertical FET device. According to one embodiment, the vertical FET device includes a pair of junction implants separated by a junction field-effect transistor (JFET) region. At least one of the junction implants of the vertical FET device includes a deep well region that is shared with the integrated bypass diode, such that the shared deep well region functions as both a source junction in the vertical FET device and a junction barrier region in the integrated bypass diode. The vertical FET device and the integrated bypass diode may include a substrate, a drift layer over the substrate, and a spreading layer over the drift layer, such that the junction implants of the vertical FET device are formed in the spreading layer. |
| US10950716B2 |
Metal oxide TFT, manufacturing method thereof, and display device
The present invention teaches a method of manufacturing a metal oxide thin film transistor (TFT) that includes the following steps: forming a shielding layer, a metal oxide semiconductor layer, a gate electrode, and a first photoresist pattern layer stacked on a substrate; forming a second photoresist layer on the metal oxide semiconductor layer and the first photoresist pattern layer; conducting ashing process to the second photoresist layer and the first photoresist pattern layer, and lifting the second photoresist layer and first photoresist pattern layer after they are ashing-processed; forming a first insulation layer on the metal oxide semiconductor layer and the gate electrode; and forming independent source electrode and drain electrode on the first insulation layer. The present invention deposits the second photoresist layer on the first photoresist pattern layer hardened by the conductorization process, so that they may be easily lifted after the ashing process. |
| US10950715B2 |
Method of manufacturing semiconductor device including non-volatile memories and logic devices
A semiconductor device includes a non-volatile memory. The non-volatile memory includes a first dielectric layer disposed on a substrate, a floating gate disposed on the dielectric layer, a control gate, a second dielectric layer disposed between the floating gate and the control gate and having one of a silicon oxide layer, a silicon nitride layer and multilayers of silicon oxide and silicon nitride, and an erase gate and a select gate. The erase gate and the select gate include a stack of a bottom polysilicon layer and an upper metal layer. |
| US10950714B2 |
Semiconductor device and manufacturing method thereof
A semiconductor device includes a substrate, a first semiconductor fin and a second semiconductor fin, a gate structure, a shallow trench isolation (STI) oxide, and a dielectric layer. The first semiconductor fin and a second semiconductor fin extend upwardly from the substrate. The gate structure extends across the first and second semiconductor fins. The shallow trench isolation (STI) oxide has a horizontal portion extending along a top surface of the substrate and vertical portions extending upwardly from the horizontal portion along the first and second semiconductor fins. The dielectric layer has a horizontal portion extending along a top surface of the horizontal portion of the STI oxide and vertical portions extending upwardly from the horizontal portion of the dielectric layer to a position higher than top ends of the vertical portions of the STI oxide. |
| US10950713B2 |
Method and device for forming cut-metal-gate feature
A mask layer is formed over a semiconductor device. The semiconductor device includes: a gate structure, a first layer disposed over the gate structure, and an interlayer dielectric (ILD) disposed on sidewalls of the first layer. The mask layer includes an opening that exposes a portion of the first layer and a portion of the ILD. A first etching process is performed to etch the opening partially into the first layer and partially into the ILD. A liner layer is formed in the opening after the first etching process has been performed. A second etching process is performed after the liner layer has been formed. The second etching process extends the opening downwardly through the first layer and through the gate structure. The opening is filled with a second layer after the second etching process has been performed. |
| US10950712B2 |
Semiconductor device and method for fabricating the same
A semiconductor device comprises a substrate, a gate structure disposed on the substrate and a gate dielectric layer disposed between the substrate and the gate structure. The gate structure has a first sidewall and a second sidewall opposite to the first sidewall. A first insulating layer disposed on the gate dielectric layer and on the first sidewall of the gate structure. The first insulating layer has a first bird's beak portion covering a rounded bottom corner of the gate structure. A pair of spacers are disposed on the first insulating layer and on the second sidewall, respectively. |
| US10950711B2 |
Fabrication of vertical field effect transistor structure with strained channels
A method of forming a vertical fin field effect transistor (vertical finFET) with a strained channel, including forming one or more vertical fins on a substrate, forming a sacrificial stressor layer adjacent to the one or more vertical fins, wherein the sacrificial stressor layer imparts a strain in the adjacent vertical fins, forming a fin trench through one or more vertical fins and the sacrificial stressor layer to form a plurality of fin segments and a plurality of sacrificial stressor layer blocks, forming an anchor wall adjacent to and in contact with one or more fin segment endwalls, and removing at least one of the plurality of the sacrificial stressor layer blocks, wherein the anchor wall maintains the strain of the adjacent fin segments after removal of the sacrificial stressor layer blocks adjacent to the fin segment with the adjacent anchor wall. |
| US10950707B2 |
Method for depinning the Fermi level of a semiconductor at an electrical junction and devices incorporating such junctions
An electrical device in which an interface layer is disposed in between and in contact with a conductor and a semiconductor. |
| US10950706B2 |
Nano-scale energy conversion device
Embodiments relate to an apparatus for nano-scale energy converters and electric power generators. The apparatus include two electrodes with a cavity formed therebetween. The first electrode is an emitter electrode that includes a first base material with a first work function value. A second material is deposited on the first base material to modify the first work function value to a second work function value. The second electrode is a collector electrode that includes a second base material with a third work function value. A fourth material is deposited on the second base material to modify the third work function value to a fourth work function value. The emitter and collector electrodes are designed such that the second work function value is greater than the fourth work function value. |
| US10950703B2 |
Semiconductor structure for memory device and method for forming the same
A semiconductor device includes a substrate, a gate structure disposed over the substrate, a drain structure disposed in the substrate, and a source structure disposed in the substrate on an n opposite side of the gate structure from the drain structure. The substrate includes a first semiconductor layer, a second semiconductor layer over the first semiconductor layer, and an insulating layer sandwiched between the first semiconductor layer and the second semiconductor layer. The source structure and the drain structure include a same conductivity type. The source structure includes at least an epitaxial layer. The source structure extends deeper into the substrate than the drain structure. |
| US10950700B2 |
Semiconductor device and manufacturing method of semiconductor device
A semiconductor device and a manufacturing method thereof includes a source contact structure, a gate stack structure including a side region adjacent to the source contact structure, and a center region extending from the side region. The semiconductor device further includes a source gate pattern disposed under the side region of the first gate stack structure. The source gate pattern has an inclined surface facing the source contact structure. The semiconductor device also includes a channel pattern penetrating the center region of the gate stack structure, the channel pattern extending toward and contacting the source contact structure. |
| US10950699B2 |
Termination for vertical trench shielded devices
A vertical trench shield device can include a plurality of gate structures and a termination structure surrounding the plurality of gate structures. The plurality of gate structures can include a plurality of gate regions and a corresponding plurality of gate shield regions. The plurality of gate structures can be disposed between the plurality of source regions, and extending through the plurality of body regions to the drift region. The plurality of gate structures can be separated from each other by a first predetermined spacing in a core area. A first set of the plurality of gate structures can extend fully to the termination structure. The ends of a second set of the plurality of gate structures can be separated from the termination structure by a second predetermined spacing. The first and second spacings can be configured to balance charge in the core area and the termination area in a reverse bias condition. |
| US10950698B2 |
Method and apparatus for selective nitridation process
Embodiments of the disclosure provide an improved apparatus and methods for nitridation of stacks of materials. In one embodiment, a method for processing a substrate in a processing region of a process chamber is provided. The method includes generating and flowing plasma species from a remote plasma source to a delivery member having a longitudinal passageway, flowing plasma species from the longitudinal passageway to an inlet port formed in a sidewall of the process chamber, wherein the plasma species are flowed at an angle into the inlet port to promote collision of ions or reaction of ions with electrons or charged particles in the plasma species such that ions are substantially eliminated from the plasma species before entering the processing region of the process chamber, and selectively incorporating atomic radicals from the plasma species in silicon or polysilicon regions of the substrate. |
| US10950692B2 |
Methods of forming air gaps between source/drain contacts and the resulting devices
One device disclosed herein includes, among other things, first and second active regions, a first source/drain contact positioned above the first active region, a second source/drain contact positioned above the second active region, and a dielectric material disposed between the first and second source/drain contacts, wherein the dielectric material defines an air gap cavity positioned between the first and second source/drain contacts. |
| US10950691B2 |
Power converter circuit having a controller for generating a drive signal for driving an electronic switch with high avalanche robustness
A power converter circuit includes an inductor and rectifier circuit having an inductor connected in series with an electronic switch, and a rectifier circuit, and a controller for generating a drive signal for driving the electronic switch. The electronic switch has drain, source and gate nodes, drift and compensation cells each including a drift region of a first doping type and a compensation region of a second doping type, and a control structure connected between the drift region of each of the drift and compensation cells and the source node. Each drift region is coupled to the drain node and each compensation region cells is coupled to the source node. A first type doping concentration N1 of the drift region is higher than a first doping level L1, and a second type doping concentration N2 of the compensation region is higher than a second doping level L2. |
| US10950689B2 |
Semiconductor device with a through-substrate via hole having therein a capacitor and a through-substrate via conductor
A semiconductor device 100 comprising a substrate 102 having a through-substrate via hole 106, the through-substrate via hole 106 having formed therein: a first capacitor electrode layer 110a and a second capacitor electrode layer 110b, and a dielectric material layer 112 disposed between the first capacitor electrode layer 110a and the second capacitor electrode layer 110b; and a through-substrate via conductor 116. A method of forming a semiconductor device 100, the semiconductor device 100 comprising a through-substrate via hole 106, the method comprising forming, in the through-substrate via hole 106: a first capacitor electrode layer 110a and a second capacitor electrode layer 110b, and a dielectric material layer 112 disposed between the first capacitor electrode layer 110a and the second capacitor electrode layer 110b; and a through-substrate via conductor 116. |
| US10950687B2 |
Manufacturing method of substrate structure
A manufacturing method of a substrate structure includes the following steps. A first build-up circuit structure is formed. At least one copper pillar is formed on the first build-up circuit structure. A dielectric layer is formed on the first build-up circuit structure, and the dielectric layer wraps the copper pillar. A second build-up circuit structure and a capacitive element are formed on the dielectric layer. In particular, the second build-up circuit structure and the first build-up circuit structure are respectively located at two opposite sides of the dielectric layer. The capacitive element is disposed in a capacitive element setting region within the second build-up circuit structure. The copper pillar penetrates the dielectric layer and is electrically connected to the second build-up circuit structure and the first build-up circuit structure. |
| US10950686B2 |
Semiconductor device including a chip capacitor mounted on a wiring substrate
The terminal pattern TP1 of the wiring substrate PB has a side T1a facing the terminal pattern TP2 and the terminal pattern TP2 of the wiring substrate PB has a side T2a facing the side T1a of the terminal pattern TP1. The side T1a and the side of T2a are exposed from the opening portion OP1 and OP2 of the solder resist layer SR1 respectively, and outer peripheries of terminal patterns TP1 and TP2 other than sides T1a and T2a are not exposed from opening portions OP1 and OP2. The opening portion OP1 and the opening portion OP2 are separated from each other. The electrode E1 of the capacitor C1 is soldered to the terminal pattern TP1 exposed from the opening portion OP1, and the electrode E2 of the capacitor C1 is soldered to the terminal pattern TP2 exposed from the opening portion OP2. |
| US10950681B2 |
Display apparatus and method of manufacturing the same
A display apparatus includes a base substrate including a display area in which an image is displayed and a peripheral area adjacent to the display area, a source/drain pattern on the base substrate, the source/drain pattern including a connecting electrode in a pad portion of the peripheral area and a electrode of a thin film transistor in the display area, a planarization insulation layer on the base substrate, the planarization insulation layer contacting a side surface of the connecting electrode and a side surface of the electrode of the thin film transistor, and exposing a top surface of the connecting electrode, a connecting member contacting the connecting electrode, and a driving member including a driving circuit, the driving member being connected to the connecting member. |
| US10950678B2 |
Thin film transistor substrate and organic light-emitting display using the same
A thin film transistor substrate that includes a substrate, a lower gate electrode arranged on the substrate, a semiconductor layer arranged on the substrate and overlapping the lower gate electrode, the semiconductor layer including a channel region interposed between a source region and a drain region, and an upper gate electrode arranged on the substrate and overlapping the semiconductor layer, the upper gate electrode being arranged on an opposite side of the semiconductor layer than the lower gate electrode, wherein at least one of the lower gate electrode and the upper gate electrode is perforated by an aperture to reduce a parasitic capacitance between the upper and lower gate electrodes. |
| US10950677B2 |
Array substrate, manufacturing method thereof, and display panel
The present disclosure provides an array substrate and a manufacturing method of the array substrate, and a display panel. The array substrate includes a flexible substrate; an active layer disposed on the flexible substrate; a first gate insulating layer disposed on the active layer; a first gate layer disposed on the first gate insulating layer; a second gate insulating layer disposed on the first gate insulating layer and the first gate layer; and a second gate layer disposed on the second gate insulating layer. The array substrate of the present disclosure replaces molybdenum wires of a gate layer and a second gate layer with a multi-layered composite metal layer. The bending tolerance of gate wires in the display panel is enhanced and increase of impedance of the first gate layer is prevented. |
| US10950673B2 |
Display device structure for reducing defects
Provided is a display device including an organic insulating layer; a pixel electrode on the organic insulating layer; a pixel defining layer configured to cover an edge of the pixel electrode, having an opening corresponding to the pixel electrode, the pixel defining layer including a first layer including an inorganic insulating material and a second layer having less light transmittance in a first wavelength band than the first layer; an intermediate layer on a portion of the pixel electrode exposed via the opening, and including an emission layer; and an opposite electrode on the intermediate layer. |
| US10950671B2 |
Flexible touch panel, method for manufacturing the same and flexible touch device
A method for manufacturing a flexible touch panel, a flexible touch panel and a flexible touch device are provided. The method for manufacturing the flexible touch panel includes: forming a first indium tin oxide (ITO) film layer on a flexible base layer attached to a transparent substrate via an optical adhesive layer; and patterning the first ITO film layer to form a touch electrode of the flexible touch panel. |
| US10950670B2 |
Display panel
A display panel is provided. The display panel includes a first back board, a first substrate, a touch panel, and an adhesive layer, wherein the first substrate is disposed on the first back board, the touch panel is located above the first substrate, and a first connecting end of the adhesive layer connects the first substrate. The first back board includes a first end surface, the first end surface is close to the adhesive layer, and the first end surface has a free curved shape. |
| US10950667B2 |
Display panel and method of manufacturing the same
A display panel includes an upper display substrate including pixel areas arranged in each of pixel columns and a light blocking area and a lower display substrate including display elements respectively overlapping the pixel areas. The upper display substrate includes a base substrate, a color filter layer, and a light control layer including transmission portions overlapping first pixel areas arranged in a first pixel column and first conversion portions overlapping second pixel areas arranged in a second pixel column, and a barrier layer including first barriers disposed between the first conversion portions and the transmission portions and first sub-barriers disposed between adjacent first conversion portions. A first shortest distance from the base substrate to a lower surface of each of the first barriers is equal to a second shortest distance from the base substrate to a lower surface of each of the first sub-barriers. |
| US10950666B2 |
Pixel structure, OLED display screen and evaporation mask
The present disclosure provides a pixel structure, an OLED display screen, and an evaporation mask. The pixel structure includes a plurality of pixel unit groups arranged in an array. Each of the pixel unit groups includes a first sub-pixel, a second sub-pixel and a third sub-pixel. An edge of the first sub-pixel close to the third sub-pixel is not parallel to an edge of the first sub-pixel away from the third sub-pixel. An edge of the second sub-pixel close to the third sub-pixel is not parallel to an edge of the second sub-pixel away from the third sub-pixel. At least two adjacent first sub-pixels and/or at least two adjacent second sub-pixels of at least two adjacent pixel unit groups are formed by a same mask opening in the evaporation mask. |
| US10950661B2 |
Integrated circuits with resistive non-volatile memory cells and methods for producing the same
Integrated circuits and methods of producing the same are provided. In an exemplary embodiment, an integrated circuit includes a memory cell, wherein the memory cell includes a transistor having a source and a drain, a first resistive unit in electrical communication with the source, and a second resistive unit in electrical communication with the drain. The first resistive unit includes a first bottom electrode, a first top electrode, and a first resistive element positioned between the first bottom electrode and the first top electrode. The second resistive unit includes a second bottom electrode, a second top electrode, and a second resistive element positioned between the second bottom electrode and the second top electrode. |
| US10950660B2 |
Perpendicular STTM free layer including protective cap
A perpendicular spin transfer torque memory (pSTTM) device incorporates a magnetic tunnel junction (MTJ) device having a free magnetic stack and a fixed magnetic stack separated by a dielectric tunneling layer. The free magnetic stack includes an uppermost magnetic layer that is at least partially covered by a cap layer. The cap layer is at least partially covered by a protective layer containing at least one of: ruthenium (Ru); cobalt/iron/boron (CoFeB); molybdenum (Mo); cobalt (Co); tungsten (W); or platinum (Pt). The protective layer is at least partially covered by a cap metal layer which may form a portion of MTJ electrode. The protective layer minimizes the occurrence of physical and/or chemical attack of the cap layer by the materials used in the cap metal layer, beneficially improving the interface anisotropy of the MTJ free magnetic layer. |
| US10950659B2 |
Multilayered seed for perpendicular magnetic structure
The present invention is directed to a perpendicular magnetic structure including a first seed layer comprising a first transition metal and nitrogen, a second seed layer deposited on top of the first seed layer, and a third seed layer deposited on top of the second seed layer. One of the second and third seed layers comprises cobalt, iron, and boron. The other one of the second and third seed layers comprises chromium. The perpendicular magnetic structure further includes a magnetic fixed layer structure formed on top of the third seed layer and having an invariable magnetization direction substantially perpendicular to a layer plane of the magnetic fixed layer structure. The magnetic fixed layer structure includes layers of a magnetic material interleaved with layers of a second transition metal. The first transition metal is titanium or tantalum. The second transition metal is one of nickel, platinum, palladium, or iridium. |
| US10950657B2 |
Apparatus and methods for integrating magnetoresistive devices
An integrated circuit device includes a memory portion and a logic portion. The memory portion may include a plurality of magnetoresistive devices and the logic portion may include logic circuits. The memory portion may include a plurality of metal conductors separated by a first interlayer dielectric material (ILD), wherein the first ILD is a low-k ILD or an ultra low-k ILD. And, the logic portion may include a plurality of metal conductors separated by a second interlayer dielectric material (ILD). |
| US10950653B2 |
Display device having light emitting stacked structure
A display device includes a plurality of pixel tiles spaced apart from each other, each of the pixel tiles including a substrate and a plurality of light emitting stacked structures disposed on the substrate, in which a distance between two adjacent light emitting stacked structures in the same pixel tile is substantially equal to a shortest distance between two adjacent light emitting stacked structures of different pixel tiles. |
| US10950650B2 |
Complementary metal-oxide-semiconductor image sensors
A CMOS image sensor includes a substrate and at least one device isolation region in the substrate and defining first and second pixel regions and first and second active portions in each of the first and second pixel regions. A reset and select transistor gates are disposed in the first pixel region, while a source follower transistor gate is disposed in the second pixel region, such that pixels in the first and second pixel regions share the reset, select and source follower transistors. A length of the source follower transistor gate may be greater than lengths of the reset and selection transistor gates. |
| US10950649B2 |
Backside illuminated image sensor and method of manufacturing the same
A backside illuminated image sensor includes pixel regions disposed in a substrate, an insulating layer disposed on a frontside surface of the substrate, a bonding pad disposed on a frontside surface of the insulating layer, and an anti-reflective layer disposed on a backside surface of the substrate. The substrate has a first opening for partially exposing a backside surface of the bonding pad, the insulating layer has a second opening for partially exposing the backside surface of the bonding pad, and the anti-reflective layer has a first portion extending along an inner side surface of the first opening. |
| US10950646B2 |
Solid-state imaging device, method of manufacturing the same, and electronic device
The present disclosure relates to a solid-state imaging device capable of further decreasing reflectivity, a method of manufacturing the same, and an electronic device. The solid-state imaging device includes a semiconductor substrate on which a photoelectric converting unit is formed for each of a plurality of pixels, and an antireflection structure provided on a light incident surface side from which light is incident on the semiconductor substrate in which a plurality of types of projections of different heights is formed. The antireflection structure is formed by performing processing of digging a light incident surface of the semiconductor substrate in a plurality of stages with different processing conditions. The antireflection structure is the structure in which a second projection lower than a first projection is formed between the first projections of predetermined height. The present technology may be applied to a CMOS image sensor, for example. |
| US10950645B2 |
Semiconductor device with a radiation sensing region and method for forming the same
A semiconductor device includes a semiconductor substrate, a radiation-sensing region, at least one isolation structure, and a doped passivation layer. The radiation-sensing region is present in the semiconductor substrate. The isolation structure is present in the semiconductor substrate and adjacent to the radiation-sensing region. The doped passivation layer at least partially surrounds the isolation structure in a substantially conformal manner. |
| US10950642B2 |
Image sensor including partition patterns
An image sensor image sensor may include: a substrate; photo-sensing elements formed in the substrate, each photo-sensing element responsive to light to produce a photo-sensing electrical signal; an antireflection layer formed over of the photo-sensing elements and structured to reduce optical reflection to facilitate optical transmission of incident light to the photo-sensing elements through the antireflection layer; color filters formed over the antireflection layer and arranged to spatially correspond to the photo-sensing elements, respectively, each color filter structured to select a designated color in the incident light to transmit through to a corresponding photo-sensing element; and partition patterns formed over the antireflection layer and arranged to spatially correspond to the photo-sensing elements, respectively, to partition light receiving area above the photo-sensing elements into separate light receiving areas, each partition pattern surrounding a corresponding color filter to be separate from an adjacent color filter; grooves formed in upper portions of the partition patterns, and providing air gaps between the adjacent partition patterns; micro lenses formed over the partition patterns and the color filters to direct incident light to the photo-sensing elements through the color filters, respectively. The micro lenses may be separated from one another by the grooves. |
| US10950638B2 |
Tunable imaging systems and methods thereof
An imaging system comprises a tuner and an image sensor including a plurality of pixel sensors. Each pixel sensor includes a photodetector, a stack of two or more filter layers comprising a given transition metal dichalcogenide (TMD), and one or more transparent glass layers positioned between adjacent filter layers. The stack selectively transmits received radiation to the photodetector based on a transmissivity of the filter layers, the transmissivity being based on a tuning context of the tuner. The imaging system sets the tuning context of the tuner and, for each of the pixel sensors, measures an intensity of radiation received from the stacks by the photodetector, determines a transmissivity of the stack based on both (i) the given TMD and (ii) the tuning context, and determines an intensity of radiation received by the pixel sensor at the stack based on the measured intensity and the determined transmissivity. |
| US10950637B2 |
Semiconductor device, manufacturing method, solid state image sensor, and electronic equipment
The present disclosure relates to a semiconductor device, a manufacturing method, a solid state image sensor, and electronic equipment that can achieve further improvement in reliability. Connection pads are formed in interlayer films provided respectively in interconnection layers of a sensor substrate on which a sensor surface having pixels is formed and a signal processing substrate configured to perform signal processing on the sensor substrate to make an electrical connection between the sensor substrate and the signal processing substrate. Then, a metal oxide film is formed between the interlayer films of the sensor substrate and the signal processing substrate, between the connection pad formed on a side toward the sensor substrate and the interlayer film on a side toward the signal processing substrate, and between the connection pad formed on the side toward the signal processing substrate and the interlayer film on the side toward the sensor substrate. The present technology can be applied to a laminated-type CMOS image sensor, for example. |
| US10950635B2 |
Orthogonal transistor layouts
A transistor device includes a plurality of drain fingers that are elongate in a first dimension, a plurality of source fingers that are elongate in the first dimension and interleaved with the plurality of drain fingers, one or more drain contact bars extending over a first set of the plurality of drain fingers and a first set of the plurality of source fingers in a second dimension that is orthogonal to the first dimension, and one or more source contact bars extending over a second set of the plurality of drain fingers and a second set of the plurality of source fingers in the second dimension. |
| US10950627B1 |
Three-dimensional memory device including split memory cells and methods of forming the same
A three-dimensional memory device includes alternating stacks of insulating layers and electrically conductive layers located over a substrate. Each of the alternating stacks laterally extend along a first horizontal direction, and neighboring pairs of the alternating stacks are laterally spaced apart along a horizontal direction by laterally alternating sequences of memory openings and dielectric pillar structures. Each of the memory openings contains a respective memory opening fill structure that includes a dielectric core, a first vertical semiconductor channel, a second vertical semiconductor channel, a first memory film, and a second memory film. The dielectric core contacts a pair of dielectric pillar structures among the dielectric pillar structures of the laterally alternating sequences. |
| US10950626B2 |
Three-dimensional memory device containing alternating stack of source layers and drain layers and vertical gate electrodes
A three-dimensional memory device includes an alternating stack of source layers and drain layers located over a substrate, gate electrodes vertically extending through each of the source layers and the drain layers of the alternating stack, memory films laterally surrounding a respective one of the gate electrodes, and semiconductor channels laterally surrounding a respective one of the memory films and connected to a respective vertically neighboring pair of a source layer and a drain layer. An array of memory openings can vertically extend through the alternating stack, and each of the gate electrodes can be located within a respective one of the memory openings. |
| US10950625B2 |
Semiconductor device and manufacturing method of the semiconductor device
A method of manufacturing a semiconductor device includes replacing sacrificial layers with conductive patterns through slits and at least one opening that pass through a stack structure. The stack structure includes interlayer insulating layers and the sacrificial layers. The interlayer insulating layers and the sacrificial layers surround a support and are alternately stacked on each other. |
| US10950621B2 |
Semiconductor substrate and semiconductor device
A semiconductor wafer according to the present embodiment includes a plurality of semiconductor chip regions and a division region. The plurality of semiconductor chip regions have a semiconductor element. The division region is provided between the semiconductor chip regions adjacent to each other. A first stacked body is provided on the division region. The first stacked body is configured with a plurality of first material films and a plurality of second material films alternately stacked. |
| US10950615B2 |
Semiconductor memory device and manufacturing method thereof
A semiconductor memory device of embodiments includes a semiconductor substrate having a first and a second region adjacent to the first region in a first direction, a laminated body including electrode layers laminated on the semiconductor substrate in a second direction, a first insulator splitting the laminated body at the second region in a third direction, and extending in the first and second direction, and branching into two insulator films at the first region, and enclosing continuously a first portion of the laminated body, a contact portion extending in the first portion in the second direction, and a memory portion extending through the laminated body and the first insulator in the second direction at the second region. A first width in the third direction of the first portion is wider than a second width in the third direction of at least one of the electrode layers at the second region. |
| US10950613B2 |
Semiconductor device and a method of manufacturing a semiconductor device
A method of manufacturing a semiconductor device according to an embodiment of the present disclosure may include forming a first sacrificial layer including a first portion and a second portion having a thickness thicker than a thickness of the first portion, forming a stack including first material layers and second material layers alternating with each other on the first sacrificial layer, forming a channel structure passing through the stack and extending to the first portion, forming a slit passing through the stack and extending to the second portion, removing the first sacrificial layer through the slit to form a first opening, and forming a second source layer connected to the channel structure in the first opening. |
| US10950612B2 |
Three dimensional semiconductor memory with residual memory layer
A semiconductor memory device has a plurality of gates vertically stacked on a top surface of a substrate, a vertical channel filling a vertical hole that extends vertically through the plurality of gates, and a memory layer in the vertical hole and surrounding the vertical channel. The vertical channel includes a bracket-shaped lower portion filling part of a recess in the top of the substrate and an upper portion extending vertically along the vertical hole and connected to the lower channel. At least one end of an interface between the lower and upper portions of the vertical channel is disposed at a level not than that of the top surface of the substrate. |
| US10950610B2 |
Asymmetric gate cut isolation for SRAM
Methods of forming a gate cut isolation for an SRAM include forming a first and second active nanostructures adjacent to each other and separated by a space; forming a sacrificial liner over at least a side of the first active nanostructure facing the space, causing a first distance between a remaining portion of the space and the first active nanostructure to be greater than a second distance between the remaining portion of the space and the second active nanostructure. A gate cut isolation is formed in the remaining portion of the space such that it is closer to the second active nanostructure than the first active nanostructure. The sacrificial liner is removed, and gates formed over the active nanostructures with the gates separated from each other by the gate cut isolation. An SRAM including the gate cut isolation and an IC structure including the SRAM are also included. |
| US10950599B1 |
3D semiconductor device and structure
A 3D semiconductor device, the device comprising: a first level, wherein said first level comprises a first layer, said first layer comprising first transistors, and wherein said first level comprises a second layer comprising first interconnections; a second level overlaying said first level, wherein said second level comprises a third layer, said third layer comprising second transistors, and wherein said second level comprises a fourth layer comprising second interconnections; and a plurality of connection paths, wherein said plurality of connection paths provides connections from a plurality of said first transistors to a plurality of said second transistors, wherein said second level is bonded to said first level, wherein said bonded comprises oxide to oxide bond regions and metal to metal bond regions, wherein said second level comprises at least one memory array, wherein said third layer comprises crystalline silicon, and wherein said second level comprises at least one SerDes circuit. |
| US10950594B2 |
Integrated circuit and method of fabricating the same
A layout includes a plurality of cells and at least one dummy gate electrode continuously extends across the cells. Since the dummy gate electrode is electrically conductive, the dummy gate electrode can be utilized for interconnecting the cells. That is, some signals may travel through the dummy gate electrode rather than through a metal one line or a metal two line. Therefore, an amount of metal one lines and/or metal two lines for interconnecting the cells can be reduced. |
| US10950588B2 |
Chip package structure and manufacturing method thereof
A chip package structure including a redistribution structure layer, at least one chip, and an encapsulant is provided. The redistribution structure layer includes at least one redistribution circuit, at least one transistor electrically connected to the redistribution circuit, and a plurality of conductive vias electrically connected to the redistribution circuit and the transistor. The chip is disposed on the redistribution structure layer and electrically connected to the redistribution structure layer. The encapsulant is disposed on the redistribution structure layer and at least encapsulates the chip. A manufacturing method of a chip package structure is also provided. |
| US10950585B2 |
Tunable LED-filaments and tunable LED-filament lamps
An LED-filament includes a light-transmissive substrate; a first array of LED chips on a front face of the substrate; a second array of LED chips on the front face of the substrate; a first photoluminescence arrangement covering the first array of LED chips; and a second photoluminescence arrangement covering the second array of LED chips; where the first array of LED chips and the first arrangement generate light of a first color temperature and the second array of LED chips and the second arrangement generate light of a second color temperature. |
| US10950583B2 |
Transfer head and transfer system for semiconductor light-emitting device and method for transferring semiconductor light-emitting device
The present invention relates to a display device and, more particularly, to a transfer head for a semiconductor light-emitting device applied to the display device and a method for transferring a semiconductor light-emitting device. The transfer head for a semiconductor light-emitting device, according to the present invention, comprises: a base substrate; and an electrode unit disposed on the base substrate to generate an electrostatic force by charging an un-doped semiconductor layer of the semiconductor light-emitting device with electric charges, wherein the base substrate and the electrode unit are formed of light-transmitting materials so that at least a part of the semiconductor light-emitting device is viewable through the base substrate and the electrode unit in sequence. |
| US10950572B2 |
Die bonder and methods of using the same
A method includes bringing into contact respective first sides of a plurality of dies and a die attach film on a major surface of a carrier wafer, and simultaneously heating portions of the die attach film contacting the plurality of dies in order to simultaneously bond the plurality of dies to the die attach film. |
| US10950569B2 |
High frequency module and communication device
A high frequency module includes a transmission power amplifier, a bump electrode connected to a principal surface of the transmission power amplifier and having an elongated shape in a plan view of the principal surface, and a mounting board on which the transmission power amplifier is mounted, wherein the mounting board includes a via conductor having an elongated shape in the plan view, the length direction of the bump electrode and the length direction of the via conductor are aligned in the plan view, and the bump electrode and the via conductor are connected in an overlapping area where the bump electrode and the via conductor overlap at least partially in the plan view, and the overlapping area is an area elongated in the length direction. |
| US10950549B2 |
ILD gap fill for memory device stack array
A dual interlayer dielectric material structure is located on a passivation dielectric material liner and entirely fills a gap located between each memory device stack of a plurality of memory device stacks. The dual interlayer dielectric material structure includes, from bottom to top, a first void free low-k interlayer dielectric (ILD) material and a second void free low-k ILD material. |
| US10950544B2 |
Semiconductor device including gate pattern having pad region
A semiconductor device includes a gate pattern disposed over a lower structure, and including a gate electrode region and a gate pad region extending from the gate electrode region; and a vertical channel semiconductor layer having a side surface facing the gate electrode region of the gate pattern. The gate pad region includes a first pad region having a thickness greater than a thickness of the gate electrode region. The first pad region includes an upper surface, a lower surface opposing the upper surface, and an outer side surface. The outer side surface has a lower outer side surface and an upper outer side surface, divided from each other by a boundary portion. The lower outer side surface extends from the lower surface, and a connection portion of the lower outer side surface and the lower surface has a rounded shape. |
| US10950542B2 |
High-performance variable gain amplifier employing laminate transmission line structures
One embodiment is an apparatus comprising a semiconductor integrated circuit (“IC”) chip comprising at least one active component for implementing an amplifier circuit; and a laminate structure comprising a plurality of metal layers, the laminate structure further comprising a plurality of passive components and transmission line-based structures. The semiconductor IC chip is integrated with the laminate structure such that a top layer of the laminate structure comprises a shield over a top of the semiconductor IC chip and the passive components for limiting electromagnetic coupling of signals generated by the amplifier circuit beyond the laminate structure. |
| US10950538B2 |
Semiconductor structure and manufacturing method thereof
A semiconductor structure includes a substrate; a die disposed over the substrate; a molding surrounding the die; a dielectric layer disposed over the substrate and surrounding the die and the molding; a conductive via extending through the dielectric layer; and a metallic strip extending through and along the dielectric layer to at least partially surround the die. |
| US10950537B2 |
Land side and die side cavities to reduce package z-height
A package structure including a capacitor mounted within a cavity in the package substrate is disclosed. The package structure may additionally include a die mounted to a die side surface of the package substrate, and the opposing land side surface of the package substrate may be mounted to a printed circuit board (PCB). The capacitor may be mounted within a cavity formed in the die side surface of the package substrate or the land side surface of the package substrate. Mounting a capacitor within a cavity may reduce the form factor of the package. The die may be mounted within a cavity formed in the die side surface of the package substrate. Solder balls connecting the package to the PCB may be mounted within one or more cavities formed in one or both of the package substrate and the PCB. |
| US10950532B2 |
Substrate intermediary body, through-hole via electrode substrate, and through-hole via electrode formation method
A substrate intermediary body includes: a substrate having a hole in a thickness direction, and a conductor being disposed in the hole; and an adhesion layer formed on a wall surface of the hole. The adhesion layer contains a reaction product of a polymer (A) having a cationic functional group and having a weight-average molecular weight of from 2,000 to 1,000,000 and a polyvalent carboxylic acid compound (B) having two or more carboxyl groups per molecule or a derivative thereof. |
| US10950525B2 |
Fabrication method of packaging structure
Method for fabricating A packaging structure is provided. The packaging structure includes a base substrate including a solder pad body region and a trench region adjacent to and around the solder pad body region. The packaging structure includes a passivation layer on the base substrate and exposing the solder pad body region and the trench region. The packaging structure includes a main body solder pad on the solder pad body region of the base substrate, and one or more trenches on the trench region of the base substrate and between the passivation layer and the main body solder pad. The packaging structure includes a bonding conductive wire having one end connected to the main body solder pad. |
| US10950522B2 |
Electronic device
An electronic device has an electronic module having an insulating substrate 60, a conductor layer 20 provided on the insulating substrate 60, an electronic element 40 provided on the conductor layer 20 and a heat dissipation layer 10 provided on the insulating substrate in an opposite side of the electronic element 40 and a cooling body 100 which abuts on the heat dissipation layer 10. The cooling body 100 has a divided part 110 being provided at a portion which abuts on the heat dissipation layer 10 and being a plurality of divided regions. |
| US10950514B2 |
Packaged semiconductor devices and methods of packaging semiconductor devices
Packaged semiconductor devices and methods of packaging semiconductor devices are disclosed. In some embodiments, a packaged semiconductor device includes an integrated circuit die, a molding compound disposed around the integrated circuit die, and an interconnect structure disposed over the integrated circuit die and the molding compound. The molding compound is thicker than the integrated circuit die. |
| US10950512B2 |
Semiconductor packages including a semiconductor chip and methods of forming the semiconductor packages
A package substrate of a semiconductor package includes conductive lines of a first layer disposed on a first surface of a base layer and conductive lines of a second layer disposed on a second surface of the base layer. An opening hole located between a first remaining portion and a second remaining portion to separate the first and second remaining portions from each other. The first remaining portion is electrically connected to a first conductive line among the conductive lines of the second layer, and the second remaining portion is electrically connected to a second conductive line among the conductive lines of the second layer. |
| US10950511B2 |
Die carrier package and method of forming same
Various embodiments of a die carrier package and a method of forming such package are disclosed. The package includes one or more dies disposed within a cavity of a carrier substrate, where a first die contact of one or more of the dies is electrically connected to a first die pad disposed on a recessed surface of the cavity, and a second die contact of one or more of the dies is electrically connected to a second die pad also disposed on the recessed surface. The first and second die pads are electrically connected to first and second package contacts respectively. The first and second package contacts are disposed on a first major surface of the carrier substrate adjacent the cavity. |
| US10950505B2 |
Multiple finFET formation with epitaxy separation
A method for forming a semiconductor device includes: forming a plurality of fins from a substrate; removing at least one fin to form at least a first group of fins; conformally depositing a first insulating material layer on the first group of fins and the substrate; forming a second insulator over the first insulating material layer; removing the second insulator to reveal the tops of the first group of fins; removing the first insulating material layer between the fins and the second insulating material; forming a dielectric layer over the fins; and forming a work function metal over the dielectric layer. |
| US10950504B2 |
Wafer processing method
A wafer processing method is used in processing a wafer including a device area and a peripheral marginal area surrounding the device area. The device area has a plurality of devices and an electrode connected to each device. The wafer processing method includes the steps of cutting a first area of the peripheral marginal area, fixing the front side of the wafer through an adhesive to a carrier substrate, grinding a back side of the wafer, supplying a chemical solution to the back side of the wafer to thereby etch the wafer such that the electrode projects from the back side of the wafer, forming an insulating film on the back side of the wafer, cutting a second area of the peripheral marginal area, the second area being not in contact with the adhesive, thereby removing the second area, and polishing the insulating film. |
| US10950501B2 |
Triblock copolymers for self-aligning vias or contacts
Fabrication schemes based on triblock copolymers for forming self-aligning vias or contacts for back end of line interconnects, and the resulting structures, are described. In an example, a method of fabricating an interconnect structure for a semiconductor die includes forming a lower metallization layer including alternating metal lines and dielectric lines above a substrate. The method also includes forming a triblock copolymer layer above the lower metallization layer. The method also includes segregating the triblock copolymer layer to form a first segregated block component over the dielectric lines of the lower metallization layer, and to form alternating second and third segregated block components disposed over the metal lines of the lower metallization layer, where the third segregated block component is photosensitive. The method also includes irradiating and developing select locations of the third segregated block component to provide via openings over the metal lines of the lower metallization layer. |
| US10950499B2 |
Integrated circuit devices and method of manufacturing the same
An integrated circuit device includes a fin-type active region extending on a substrate in a first direction parallel to a top surface of the substrate; a gate structure extending on the fin-type active region and extending in a second direction parallel to the top surface of the substrate and different from the first direction; and source/drain regions in a recess region extending from one side of the gate structure into the fin-type active region, the source/drain regions including an upper semiconductor layer on an inner wall of the recess region, having a first impurity concentration, and including a gap; and a gap-fill semiconductor layer, which fills the gap and has a second impurity concentration that is greater than the first impurity concentration. |
| US10950490B2 |
Semiconductor device having isolation structures with different thicknesses
A semiconductor structure includes a semiconductor substrate, a first fin, a second fin, a first isolation structure, and a second isolation structure. The semiconductor substrate has a memory device region and a logic core region. The first fin is in the memory device region of the semiconductor substrate. The second fin is in the logic core region of the semiconductor substrate. The first isolation structure is around the first fin. The second isolation structure is around the second fin, and a thickness of the first isolation structure is different from a thickness of the second isolation structure. |
| US10950488B2 |
Integration of finFET device
An integrated circuit containing finFETs may be formed with fins extending above isolation oxide. A first finFET and a second finFET have exposed fin heights which are different by at least 25 percent. The exposed fin height is a vertical height of a sidewall of the fin above the isolation oxide. Gates are formed over the fins. In one version, a fin height of the first finFET is less than a fin height of the second finFET; a thickness of the isolation oxide adjacent to fins of the first finFET and the second finFET is substantially uniform. The fin height is the height of a top of the fin above the substrate. In another version, the isolation oxide is thinner at the first finFET than at the second finFET; the fin heights of the first finFET and the second finFET are substantially equal. |
| US10950485B2 |
Semiconductor processing apparatus and method utilizing electrostatic discharge (ESD) prevention layer
Semiconductor processing apparatuses and methods are provided in which an electrostatic discharge (ESD) prevention layer is utilized to prevent or reduce ESD events from occurring between a semiconductor wafer and one or more components of the apparatuses. In some embodiments, a semiconductor processing apparatus includes a wafer handling structure that is configured to support a semiconductor wafer during processing of the semiconductor wafer. The apparatus further includes an ESD prevention layer on the wafer handling structure. The ESD prevention layer includes a first material and a second material, and the second material has an electrical conductivity that is greater than an electrical conductivity of the first material. |
| US10950482B2 |
Device for supporting substrate, apparatus for manufacturing display panel, and method for supporting substrate
A device for supporting a substrate, an apparatus for manufacturing a display panel, and a method for supporting a substrate are provided. The device for supporting a substrate comprises: a bearing mechanism being provided with a through hole for bearing a substrate; one or more sticky pads on the bearing mechanism surrounding the through hole, which are used for fixing the substrate on the bearing mechanism; and an elevating mechanism, which controls lifting and lowering of the substrate by passing through the through hole, wherein a top of the lifting mechanism is provided with a light-emitting member that emits light when in contact with the substrate, to illuminate the one or more sticky pads such that stickiness of the sticky pads is reduced from a first stickiness to a second stickiness. |
| US10950480B2 |
Adhesive tape sticking apparatus and method of manufacturing a semiconductor package using the same
An adhesive tape sticking apparatus includes a chamber includes a lower chamber and an upper chamber. The lower chamber includes a first inner space and the upper chamber includes a second inner space. An adhesive tape sheet is positioned between the upper chamber and the lower chamber. A substrate support is movable upward and downward within the lower chamber and is configured to support a substrate. A differential pressure generator is configured to generate a differential pressure between the first inner space and the second inner space. A tape support plate positioned between a first sidewall of the lower chamber and a circumferential edge of the substrate. The tape support plate is configured to contact at least a portion of the adhesive tape sheet when the adhesive tape sheet bends downward toward the first inner space when the differential pressure is generated between the first and second inner spaces. |
| US10950478B2 |
Info structure with copper pillar having reversed profile
A method includes forming a first polymer layer to cover a metal pad of a wafer, and patterning the first polymer layer to form a first opening. A first sidewall of the first polymer layer exposed to the first opening has a first tilt angle where the first sidewall is in contact with the metal pad. The method further includes forming a metal pillar in the first opening, sawing the wafer to generate a device die, encapsulating the device die in an encapsulating material, performing a planarization to reveal the metal pillar, forming a second polymer layer over the encapsulating material and the device die, and patterning the second polymer layer to form a second opening. The metal pillar is exposed through the second opening. A second sidewall of the second polymer layer exposed to the second opening has a second tilt angle greater than the first tilt angle. |
| US10950477B2 |
Ceramic heater and esc with enhanced wafer edge performance
Embodiments of the present disclosure provide an improved electrostatic chuck for supporting a substrate. The electrostatic chuck comprises a chuck body coupled to a support stem, the chuck body having a substrate supporting surface, a plurality of tabs projecting from the substrate supporting surface of the chuck body, wherein the tabs are disposed around the circumference of the chuck body, an electrode embedded within the chuck body, the electrode extending radially from a center of the chuck body to a region beyond the plurality of tabs, and an RF power source coupled to the electrode through a first electrical connection. |
| US10950470B2 |
Substrate bonding apparatus and bonding method using the same
A substrate bonding apparatus includes a lower chuck that receives a lower substrate and an upper chuck disposed above the lower chuck. An upper substrate is fixed to the upper chuck. The upper chuck and the lower chuck bond the upper substrate to the lower substrate. The upper chuck has an upper convex surface toward the lower chuck. The upper convex surface includes a plurality of first ridges and a plurality of first valleys disposed alternately along an azimuthal direction. |
| US10950468B2 |
Semiconductor manufacturing apparatus
A semiconductor manufacturing apparatus according to an embodiment irradiates a semiconductor substrate with laser to form modified regions along an intended cut line in the semiconductor substrate. A light source emits the laser. An optical system comprises an objective lens configured to focus the laser in the semiconductor substrate. A light modulator is capable of modulating an energy density distribution of the laser. A controller controls the light modulator to displace a peak position of the energy density distribution of the laser from an optical axis of the objective lens in a relative movement direction of the optical system with respect to the semiconductor substrate. |
| US10950467B2 |
Gas supply mechanism and semiconductor manufacturing system
The mechanism includes a pipe and a valve provided in the pipe. The pipe is configured to connect a gas source and a semiconductor manufacturing apparatus. The valve is configured to control a flow rate of the gas. The valve includes a housing and a columnar shaft. The housing includes an inlet and an outlet. A gas flows from the gas source into the internal space through the inlet. A gas flows from the internal space to the semiconductor manufacturing apparatus through the outlet. A gap is provided between an outer peripheral surface of the shaft and an inner wall surface of the housing. The shaft is accommodated in the internal space of the housing and is rotatable. A through hole which penetrates the shaft is formed on the outer peripheral surface of the shaft. Both ends of the through hole correspond to the inlet and the outlet. |
| US10950466B2 |
Substrate processing method and substrate processing apparatus
A filler solution is supplied to an upper surface of a substrate, forming a coating that is a film of the filler solution. Clearance in the structure on the upper surface of the substrate is filled with the filler solution. Then, a stripping solution is applied to a peripheral region of the upper surface of the substrate, to strip off a portion of the coating formed on the peripheral region. Also, a gas is injected toward a boundary portion between the peripheral region and an inner region of the upper surface of the substrate, to accelerate solidification of an outer edge portion of the coating formed on the inner region, to suppress the spread of the coating from the inner region to the peripheral region. A substrate holder/rotator, fluid supplies, and a gas injection part are provided to carry out the above process. |
| US10950460B2 |
Method utilizing using post etch pattern encapsulation
A process is provided in which etched layer(s) are protected from residues or defects caused by or resulting from exposure to atmospheric conditions. Protection is provided through the formation of an encapsulation layer post etch. In one embodiment, the encapsulation is provided by a thin layer formed in an atomic layer deposition (ALD) process. The thin layer prevents the etched layer(s) from exposure to air. This encapsulation process may take place after the etch process thus allowing for substrates to be subsequently exposed to atmospheric conditions with little or no queue time constraints being needed for staging subsequent wet clean processing steps. In one embodiment, the encapsulation process may be performed with no vacuum break between the etch process and the encapsulation process. In one embodiment, the encapsulation film is compatible with subsequent wet process steps and can be removed during this wet process steps without adverse effects. |
| US10950459B1 |
Back end of line structures with metal lines with alternating patterning and metallization schemes
Techniques are provided to fabricate semiconductor devices. For example, a method includes forming an interconnect structure having a base, a first conductive metal layer disposed on the base; and a first hardmask layer disposed on the first conductive metal layer. Metal lines are formed by subtractive etching. The metal lines have negative tapered sidewalls, and an opening is formed between adjacent metal lines. A first interlevel dielectric layer is deposited in the openings. A portion of the first interlevel dielectric layer is removed to form trench openings having positive tapered sidewalls. A dielectric layer is deposited in one of the openings. A liner layer and a second conducting metal layer are deposited in the other trench openings. The liner layer and the second conductive metal layer are recessed. A second hardmask layer is deposited on a top surface of the liner layer and the second conductive metal layer. |
| US10950456B2 |
High-density semiconductor device
A method of manufacturing a semiconductor device includes depositing a first material on a substrate, depositing on the substrate a second material that has an etch selectivity different from an etch selectively of the first material, depositing a spacer material on the first and second material, and etching the substrate using the spacer material as an etch mask to form a fin under the first material and a fin under the second material. |
| US10950452B2 |
Seasoning method and etching method
A time required to return an inside of the chamber after performing maintenance of the inside of the chamber into a state prior to the maintenance can be shortened. A seasoning method includes a first dry cleaning process of cleaning the inside of the chamber by supplying an O2 gas into the chamber and generating plasma of the O2 gas within the chamber; and a second dry cleaning process of seasoning, after the first dry cleaning process, the inside of the chamber by supplying a processing gas containing fluorine into the chamber and generating plasma of the processing gas within the chamber. |
| US10950448B2 |
Film quality control in a linear scan physical vapor deposition process
Methods and apparatus for control of the quality of films deposited via physical vapor deposition are provided herein. In some embodiments, a method of depositing a film using linear scan physical vapor deposition includes: determining a deposition rate of a material to be deposited on a substrate in a linear scan physical vapor deposition process; calculating a scan rate of the substrate to achieve deposition of the material to a desired thickness in a single pass when deposited at the deposition rate; and performing the linear scan physical vapor deposition process while moving the substrate at the calculated scan rate. |
| US10950447B2 |
Semiconductor device having hydrogen in a dielectric layer
Embodiment described herein provide a thermal treatment process following a high-pressure anneal process to keep hydrogen at an interface between a channel region and a gate dielectric layer in a field effect transistor while removing hydrogen from the bulk portion of the gate dielectric layer. The thermal treatment process can reduce the amount of threshold voltage shift caused by a high-pressure anneal. The high-pressure anneal and the thermal treatment process may be performed any time after formation of the gate dielectric layer, thus, causing no disruption to the existing process flow. |
| US10950443B2 |
Method for forming patterns
A method for forming patterns includes forming an etch barrier stack where a first sacrificial material, first mask lines, a second sacrificial material and second mask lines intersecting with the first mask lines are sequentially disposed on an etch target material, etching the second an first sacrificial materials using the second and first mask lines as etch masks, to form island-shaped sacrificial openings isolated from one another in the first sacrificial material, forming island-shaped sacrificial pillars to fill the island-shaped sacrificial openings, etching the first mask lines to form island-shaped masks at intersections between the first mask lines and the second mask lines, and etching the first sacrificial material using the island-shaped masks and the island-shaped sacrificial pillars as etch masks, to form a sacrificial barrier including island-shaped openings isolated from one another to expose the etch target material. |
| US10950442B2 |
Methods to reshape spacers for multi-patterning processes using thermal decomposition materials
Embodiments are disclosed that improve etch uniformity during multi-patterning processes for the manufacture of microelectronic workpieces by reshaping spacers using thermal decomposition materials as a protective layer. Because the thermal decomposition material can be removed through thermal treatment processes without requiring etch processes, spacers can be reshaped with no spacer profile change or damage while suppressing undesired gouging differences in underlying layers and related degradation in etch uniformity. |
| US10950435B2 |
SiC epitaxial wafer, method for manufacturing SiC epitaxial wafer, SiC device, and power conversion apparatus
A SiC substrate (1) has an off angle θ°. A SiC epitaxial layer (2) having a film thickness of Tm μm is provided on the SiC substrate (1). Triangular defects (3) are formed on a surface of the SiC epitaxial layer (2). A density of triangular defects (3) having a length of Tm/Tan θ×0.9 or more in a substrate off direction is denoted by A. A density of triangular (3) defects having a length smaller than Tm/Tan θ×0.9 in the substrate off direction is denoted by B. B/A≤0.5 is satisfied. |
| US10950434B2 |
Methods of reducing gate spacer loss during semiconductor manufacturing
A method includes forming a gate spacer on sidewalls of a dummy gate structure disposed over a semiconductor substrate; performing a first implantation process to the gate spacer, wherein the first implantation process includes bombarding an upper portion of the gate spacer with silicon atoms; after performing the first implantation process, performing a second implantation process to the upper portion of the gate spacer, wherein the second implantation process includes bombarding the upper portion of the gate spacer with carbon atoms; and after performing the second implantation process, replacing the dummy gate structure with a high-k metal gate structure, wherein the replacing includes forming an interlayer dielectric (ILD) layer. |
| US10950432B2 |
Method of depositing thin film and method of manufacturing semiconductor device
Provided is a method of depositing a thin film on a pattern structure of a semiconductor substrate, the method including (a) supplying a source gas; (b) supplying a reactive gas; and (c) supplying plasma, wherein the steps (a), (b), and (c) are sequentially repeated on the semiconductor substrate within a reaction space until a desired thickness is obtained, and a frequency of the plasma is a high frequency of 60 MHz or greater. |
| US10950430B2 |
Pulsed plasma deposition etch step coverage improvement
Embodiments of the present disclosure relate to methods for in-situ deposition and treatment of a thin film for improved step coverage. In one embodiment, the method for processing a substrate is provided. The method includes forming a dielectric layer on patterned features of the substrate by exposing the substrate to a gas mixture of a first precursor and a second precursor simultaneously with plasma present in a process chamber, wherein the plasma is formed by a first pulsed RF power, exposing the dielectric layer to a first plasma treatment using a gas mixture of nitrogen and helium in the process chamber, and performing a plasma etch process by exposing the dielectric layer to a plasma formed from a gas mixture of a fluorine-containing precursor and a carrier gas, wherein the plasma is formed in the process chamber by a second pulsed RF power. |
| US10950429B2 |
Methods of forming amorphous carbon hard mask layers and hard mask layers formed therefrom
Embodiments described herein provide for post deposition anneal of a substrate, having an amorphous carbon layer deposited thereon, to desirably reduce variations in local stresses thereacross. In one embodiment, a method of processing a substrate includes positioning a substrate, having an amorphous carbon layer deposited thereon, in a first processing volume, flowing an anneal gas into the first processing volume, heating the substrate to an anneal temperature of not more than about 450° C., and maintaining the substrate at the anneal temperature for about 30 seconds or more. Herein, the amorphous carbon layer was deposited on the substrate using a method which included positioning the substrate on a substrate support disposed in a second processing volume, flowing a processing gas into the second processing volume, applying pulsed DC power to a carbon target disposed in the second processing volume, forming a plasma of the processing gas, and depositing the amorphous carbon layer on the substrate. |
| US10950427B2 |
Quantum dots and production method thereof
A production method of a quantum dot comprising a Group IIIA-VA compound, the quantum dot as prepared, and an electronic device including the same, and the production method includes: supplying a Group VA element precursor including a halide of a Group VA element and a first ligand of a phosphine compound or a first amine compound; and performing a reaction between the Group VA element precursor and a Group IIIA metal precursor in the presence of a reducing agent in an organic reaction medium including a second amine compound. |
| US10950424B2 |
Method for monitoring the quality of mass spectrometric imaging preparation workflows
The invention relates to a method for monitoring a quality of preparation workflows of analytical tissue sections for mass spectrometric imaging using a control sample to be processed and measured alongside the analytical tissue sections on the same sample support and ascertaining if characteristics of the control sample measurement fit into a range of characteristics of separate reference measurements from the same type of control sample. |
| US10950422B2 |
Optimizing quadrupole collision cell RF amplitude for tandem mass spectrometry
A mass spectrometer includes a collision cell and a system controller. The collision cell includes a plurality of rod pairs configured to generate pseudopotential well through the application of radio frequency potentials to the rod pairs. The collision cell configured to generate a target fragment from a parent ion by colliding the parent ion with one or more gas molecules. The system controller is configured to set a radio frequency amplitude of the radio frequency potentials to a default amplitude; monitor the production of a target fragment ion while adjusting the collision energy; set the collision energy to optimize the production of the target fragment ion; apply a linear full range ramp to the radio frequency amplitude to determine an optimal radio frequency amplitude; and set the radio frequency amplitude to the optimal radio frequency amplitude for the parent ion, target fragment ion pair. |
| US10950417B2 |
Substrate processing apparatus and substrate loading mechanism
A substrate processing apparatus includes a process container; a process gas supply mechanism; a substrate loading table; a temperature adjusting medium passage; a temperature adjusting medium extraction mechanism; a heater; and a temperature controller. The temperature controller is configured to adjust a temperature of a target substrate to a first temperature by allowing a temperature adjusting medium to flow through the temperature adjusting medium passage of the substrate loading table; and adjust the temperature of the target substrate to a second temperature higher than the first temperature by extracting the temperature adjusting medium of the temperature adjusting medium passage using the temperature adjusting medium extraction mechanism while heating the target substrate using the heater. |
| US10950414B2 |
Plasma processing apparatus and method of manufacturing semiconductor device using the same
Disclosed are a plasma processing apparatus and a method of manufacturing a semiconductor device using the same. The plasma processing apparatus comprises a chamber, an electrostatic chuck in the chamber and loading a substrate, a plasma electrode generating an upper plasma on the electrostatic chuck; and a hollow cathode between the plasma electrode and the electrostatic chuck, wherein the hollow cathode generates a lower plasma below the upper plasma. The hollow cathode comprises cathode holes each having a size less than a thickness of a plasma sheath of the upper plasma. |
| US10950412B2 |
Observation method, image processing device, and electron microscope
An observation method includes: preparing a specimen including, as a mark a plurality of metal particles in which localized surface plasmon resonance is excited by irradiation with light; acquiring an optical microscope image by photographing the specimen with an optical microscope; acquiring an electron microscope image by photographing the specimen with an electron microscope; acquiring information of the positions and the colors of the plurality of metal particles in the optical microscope image; acquiring information of the positions and the particle diameters of the plurality of metal particles in the electron microscope image; and determining information for associating the optical microscope image and the electron microscope image based on the information of the positions and the colors of the plurality of metal particles acquired from the optical microscope image, and the information of the positions and the particle diameters of the plurality of metal particles acquired from the electron microscope image. |
| US10950411B2 |
Control method for multi-phase winding deflection scanning device
The present invention discloses a control method for a multi-phase winding deflection scanning device, comprising: defining a rectangular coordinate system where deflection scanning tracks are located; sequentially decomposing the deflection scanning tracks into finite point rectangular coordinate data; translating the rectangular coordinate data into corresponding point resultant exciting current data; decomposing the resultant exciting current data into n-phase winding exciting current data; and translating the n-phase winding exciting current data into corresponding n-phase control instruction electrical signals and outputting same to a drive power supply, amplifying the output electrical signals by the drive power supply and providing same for the multi-phase winding deflection scanning device as exciting current. |
| US10950406B2 |
Self-limiting electrical triggering for initiating fracture of frangible glass
A transient electronic device includes electronic elements (e.g., an SOI- or chip-based IC) and a trigger mechanism disposed on a frangible glass substrate. The trigger mechanism includes a switch that initiates a large trigger current through a self-limiting resistive element in response to a received trigger signal. The self-limiting resistive element includes a resistor portion that generates heat in response to the trigger current, thereby rapidly increasing the temperature of a localized (small) region of the frangible glass substrate, and a current limiting portion (e.g., a fuse) that self-limits (terminates) the trigger current after a predetermined amount of time, causing the localized region to rapidly cool down. The frangible glass substrate is engineered such that a stress profile produced by the rapid heating/cooling of the localized region generates an initial fracture force that subsequently propagates throughout the glass substrate, whereby sufficient potential energy is released to powderize the electronic elements. |
| US10950402B2 |
Electrical contactor
An electrical contactor, and more particularly, but not exclusively, contactors having improved noise performance. |
| US10950396B2 |
Switch device having swinging-type operation
A switch device which is capable of ensuring mounting strength of an additional member while ensuring ease of operation. The switch device has an operating knob that transmits an input operation to a switch unit with an electric contact, and a housing that houses a switch unit. The housing that houses the switch unit has an opening via which the switch unit and the operating knob face each other. The housing has a water prevention wall installed in a standing manner to surround the opening. The operating knob has a box-shaped base member with one end thereof opened. An additional member with at least one insertion portion which is inserted into a through hole of the base member is mounted on the base member. The insertion portion extends to cross a standing direction of the water prevention wall, and as seen in the standing direction, the insertion portion and the opening are located away from each other. |
| US10950395B2 |
Switching device
A switching device including a frame, a roll element, a control shaft, a drive system and a roll spring. The control shaft is adapted to control rotation of the roll element such that rotating the control shaft from an ON-position to an OFF-position carries out an opening event in which the roll element transfers from a first position to a second position. The drive system includes an actuator and an actuator spring. The drive system is adapted to rotate the roll element during the opening event to an intermediate position located between the first position and the second position. The roll spring is connected between the frame and the roll element, and is adapted to rotate the roll element to the second position during the opening event. |
| US10950391B2 |
Photoelectric conversion device and manufacturing method and apparatus thereof
A method for manufacturing a photoelectric conversion device, that includes: forming a laminate structure of a substrate, a transparent electrode, an active layer produced by wet-coating, and a counter electrode, stacked in this order; and thereafter forming a cavity by: (a) pressing an adhesive material just against a defect formed on the surface of said counter electrode, and then peeling off said adhesive material together with said defect and the peripheral part thereof; or (b) sucking a defect formed on the surface of said counter electrode, so as to remove said defect and the peripheral part thereof, where said cavity penetrates through the counter electrode and unreached to the transparent electrode. |
| US10950390B2 |
Stacked type capacitor without carbon paste layer, manufacturing method thereof and silver paste layer
A stacked type capacitor without carbon paste layer includes a metal foil, an oxide layer, a polymer composite layer and a silver paste layer. The oxide layer is formed on the outer surface of the metal foil to entirely enclose the metal foil. The polymer composite layer is formed on the oxide layer to partially enclose the oxide layer. The silver paste layer is directly formed on the polymer composite layer to directly enclose the polymer composite layer. The oxide layer and the polymer composite layer are connected with each other to form a first connection interface between the oxide layer and the polymer composite layer. The polymer composite layer and the silver paste layer are connected with each other without a carbon paste layer to form a second connection interface between the polymer composite layer and the silver paste layer. |
| US10950388B2 |
Multi-layer ceramic capacitor and circuit board
A multi-layer ceramic capacitor includes: a ceramic body including first and second end surfaces, first and second side surfaces, first internal electrodes drawn to the first and second end surfaces, second internal electrodes drawn to at least one of the first side surface and the second side surface, and dielectric layers, the first and second internal electrodes being alternately laminated via the dielectric layers; first and second external electrodes that respectively cover the first and second end surfaces, and extend to each of the first and second side surfaces; a third external electrode including a first side-surface region formed on the first side surface and a second side-surface region formed on the second side surface, the first side-surface region and the second side-surface region being formed to be mutually shifted along the first direction and at least partially facing each other in the second direction. |
| US10950387B2 |
Multilayer capacitor
A multilayer capacitor includes a body including a stacked structure having dielectric layers, and internal electrodes, and external electrodes. The body has a central portion, and cover portions disposed above and below the central portion, the body has a first surface and a second surface to which the internal electrodes are exposed and which oppose each other, a third surface and a fourth surface which oppose each other in the stacking direction of the dielectric layers, and a fifth surface and a sixth surface which are connected to the first to fourth surfaces and oppose each other, and a surface roughness of each of the third to sixth surfaces of the body is greater than a surface roughness of each of the first and second surfaces of the body. |
| US10950386B2 |
Multilayer ceramic electronic component
A multilayer ceramic electronic component includes: a ceramic body having a hexahedral shape including at least one rounded corner and including dielectric layers and first and second internal electrodes, and first and second external electrodes. The first and second external electrodes respectively include first and second base electrode layers which at least partially contact the first and second external sides of the ceramic body, and first and second plating layers disposed to cover the first and second base electrode layers, respectively. CP/CT is equal to or greater than 1.6 and equal to or less than 2.4, where CP is a length of a rounded boundary line of the rounded corner of the ceramic body viewed in a cross-section in length and thickness directions, and CT is a thickness of one of the first and second base electrode layers at a central point in the thickness direction. |
| US10950383B2 |
Large area power transmitter for wireless power transfer
A method for wireless power transfer. The method includes adapting a variable form factor transmitter into at least a plurality of cross-coupled segments disposed about a pre-determined wireless power transfer area, wherein the pre-determined wireless power transfer area comprises a dimension exceeding a wavelength corresponding to a characteristic frequency of the variable form factor transmitter, transmitting, from a radio frequency (RF) power source and based at least in part on the characteristic frequency, RF power across the pre-determined wireless power transfer area via a near electromagnetic field of the variable form factor transmitter, and reducing, based on opposing directions of magnetic fields induced by adjacent cross-coupled segments of the plurality of cross-coupled segments, a radiation loss of the wireless power transfer due to a far electromagnetic field of the variable form factor transmitter. |
| US10950379B2 |
Transmission coil and power transmission apparatus
Provided is a transmission coil which can inhibit reduction in transmission efficiency during underwater non-contact electric power transmission. A transmission coil configured to transmit electric power in water includes an annular electric wire through which an alternating current flows, and a first cover which includes non-conductive resin or non-magnetic resin and seals a periphery of the electric wire. The electric wire transmits the electric power via a magnetic field generated by flowing of the alternating current. |
| US10950377B2 |
Rotary encoder with shielded magnet
A magnetic set-up for use in a rotary encoder is disclosed. The set-up includes a permanent magnet arrangement including at least one permanent magnet, which is rotatable with respect to a rotation axis, and a soft magnetic sleeve encompassing the rotation axis and thus the permanent magnet arrangement for shielding against external magnetic fields. The at least one permanent magnet includes a through-hole, which extends along the rotation axis, so that the permanent magnet fully extends around the rotation axis. |
| US10950374B2 |
Fe-based alloy composition, soft magnetic material, magnetic members, electric/electronic component, and device
Provided is an Fe-based alloy composition capable of forming an amorphous soft magnetic material which contains no P and which has a glass transition temperature Tg, the Fe-based alloy composition having a composition represented by the formula (Fe1−aTa)100at %−(x+b+c+d)MxBbCcSid, where T is an arbitrary added element such as Ni and M is an arbitrary added element such as Cr, the formula satisfying the following conditions: 0≤a≤0.3, 11.0 at %≤b≤18.20 at %, 6.00 at %≤c≤17 at %, 0 at %≤d≤10 at %, and 0 at %≤x≤4 at %. |
| US10950372B2 |
Surface mounted fuse device having positive temperature coefficient body
A PPTC device including a PPTC body, a first electrode, disposed on a first side of the fuse component, a second electrode, disposed on a second side of the PPTC body, wherein the PPTC body comprises a polymer matrix and a conductive filler. |
| US10950371B2 |
Nonmetallic push-in connector
A push-in connector generally having an interior channel equipped with longitudinal protrusions that run at least part of the length of the interior channel of the connector body to define grooves through which wires of a different gauges can be inserted. When the user rotates the connector body about its longitudinal axis, the interior channel defines a second gauge through which a wire of a second gauge can pass. The connector body has one or more incisions cut into one end of the connector body and a separate cuff that fits over the feed end. The interior channel contains teeth that grip the wire(s) or cable(s) once inserted. The exterior of the connector body has flexible exterior protrusions that can be pushed down when inserting the connector through the knock-out of a housing and spring back into place to secure the connector to the housing. |
| US10950369B1 |
Inverted cable design for high-speed, low loss signal transmission
An improved electrical cable design for high-speed, low loss signal transmission. The improved cable design may be a three-conductor cable having a center conductor, a middle conductor and an outer conductor, where each conductor is separated by a dielectric layer. The electrical cable provides an inverted cable design, in which signal transmission occurs within the middle conductor, the center conductor is used as a return or drain line to ground and the outer conductor is used as a shield. The middle conductor of the electrical cable provides a larger surface area for signal conductance than the center conductor, thereby transmitting signals with significantly less loss (e.g., at least 50% less loss). |
| US10950368B2 |
I-shaped filler
A telecommunications cable includes a plurality of twisted pairs of insulated conductors. The plurality of twisted pairs of insulated conductors extends substantially along a longitudinal axis of the telecommunications cable. In addition, the telecommunications cable includes a separator. The separator separates each twisted pair of insulated conductor of the plurality of twisted pairs of insulated conductors. Moreover, the telecommunications cable includes a first layer. The first layer surrounds the separator and the plurality of twisted pairs of insulated conductors along a length of the telecommunications cable. The separator is I-shaped filler. The separator is made of low smoke zero halogen material or MDPE. The first layer is made of low smoke zero halogen material, polyethylene or poly vinyl chloride. The first layer has a thickness in a range of about 0.4 millimeter-2.5 millimeters. |
| US10950366B2 |
Polymer composition and a power cable comprising the polymer composition
An alternating current (AC) power cable includes a conductor surrounded by at least an inner semiconductive layer including a first semiconductive composition, an insulation layer including a polymer composition, an outer semiconductive layer including a second semiconductive composition, and optionally a jacketing layer including a jacketing composition, in that order. The polymer composition of the insulation layer includes an unsaturated low density polyethylene (LDPE) copolymer of ethylene with one or more polyunsaturated comonomers and a crosslinking agent. The polymer composition of the insulation layer has a dielectric loss expressed as tan δ (50 Hz) of 12.0×10−4 or less, when measured at 25 kV/mm and 130° C. according to “Test for Tan δ measurements on 10 kV cables”. |
| US10950364B2 |
Bio-electrode and method for manufacturing the same
The present invention provides a bio-electrode including an electro-conductive base material and a living body contact layer formed on the electro-conductive base material; wherein the living body contact layer contains a resin layer and particles dispersed in the resin layer, the particles being coated with gold, platinum, silver, or alloy of these metals; a thickness of the resin layer is equal to or thinner than an average particle size of the particles; the resin layer contains a silicon-containing resin and a non-silicon-containing resin; and the silicon-containing resin is localized in the direction of a surface of the resin layer. The bio-electrode of the present invention is superior in electric conductivity and biocompatibility, light in weight, can be manufactured at low cost, and can combine repellency of the resin layer surface and adhesion properties of the resin layer to particles. |
| US10950361B2 |
High-density subterranean storage system for nuclear fuel and radioactive waste
An underground ventilated system for storing nuclear waste materials. The system includes a storage module having an outer shell defining an internal cavity and an inner shell. A majority of the height of the outer shell may be disposed below grade. The outer shell may include a hermetically sealed bottom. First and second canisters are positioned in lower and upper portions within the cavity respectively in vertically stacked relationship. A centering and spacing ring assembly is interspersed between the first and second canisters to transfer the weight of the upper second canister to the lower first canister. The assembly may include centering lugs which laterally restrain the first and second canisters in case of a seismic event. A natural convection driven ventilated air system cools the canisters to remove residual decay heat to the atmosphere. In one non-limiting embodiment, the shells are made of steel. |
| US10950359B2 |
Radiation shield
A radiation shield is adapted to be disposed transversely across a subject supported on the surface of a procedure table to protect medical professionals working in front of the radiation shield from radiation being applied to the subject behind the radiation shield. The radiation shield includes a movable barrier positional to extend transversely across a subject supported on the surface of a procedure table. The barrier has a generally vertically-oriented lower section; a generally forwardly sloping intermediate section; and a generally vertically-oriented upper section, forwardly offset from the plane of the lower section. A side section extends outwardly and rearwardly from one side of the lower, intermediate, and upper sections of the barrier. There is a recess in the lower edge of the lower section for accommodating a portion of the body of the subject on the surface of the procedure table, with portions of the lower section on each side of the recess projecting downwardly below the surface of the procedure table. A plurality of flexible radiopaque flaps depending from the perimeter of the recess block radiation from penetrating the gap between the subject and the perimeter of the recess. |
| US10950358B2 |
PWR decay heat removal system in which steam from the pressurizer drives a turbine which drives a pump to inject water into the reactor pressure vessel
In conjunction with a pressurized water reactor (PWR) and a pressurizer configured to control pressure in the reactor pressure vessel, a decay heat removal system comprises a pressurized passive condenser, a turbine-driven pump connected to suction water from at least one water source into the reactor pressure vessel; and steam piping configured to deliver steam from the pressurizer to the turbine to operate the pump and to discharge the delivered steam into the pressurized passive condenser. The pump and turbine may be mounted on a common shaft via which the turbine drives the pump. The at least one water source may include a refueling water storage tank (RWST) and/or the pressurized passive condenser. A pressurizer power operated relief valve may control discharge of a portion of the delivered steam bypassing the turbine into the pressurized passive condenser to control pressure in the pressurizer. |
| US10950354B1 |
Computing system for pharmacogenomics
A supplement application for ordering genetic tests is disclosed herein. The supplement application receives an identifier for a medication for a patient and an identifier for the patient from an electronic health records application. The supplement application retrieves an identifier for a variant form of a gene based on the identifier for the medication. The variant form of the gene is known to have an interaction with the medication. When the supplement application determines that the patient has failed to undergo a genetic test for the variant form of the gene, the supplement application retrieves an identifier for a genetic laboratory that offers the genetic test. The supplement application then constructs an order for the genetic test using the identifier for the patient, the identifier for the variant form of the gene, and the identifier for the genetic laboratory and transmits the order to a genetic laboratory computing device. |
| US10950353B2 |
Systems and methods for disease progression modeling
A method for determining a disease state transition path includes receiving a patient data having functional data and/or structural data related to a patient. Based on the patient data, a first disease state of a plurality of non-overlapping disease states each associated with a predetermined range of functional and/or structural degeneration values may be identified. A second, non-adjacent disease state of the plurality of disease states may be identified based on the patient data. A most probable path between the first disease state and the second disease state may be determined using a two dimensional continuous-time hidden Markov model. |
| US10950351B2 |
Methods and apparatus for predicting benefit from immunotherapy using tumoral and peritumoral radiomic features
Methods, apparatus, and other embodiments predict response to immunotherapy from computed tomography (CT) images of a region of tissue demonstrating non-small cell lung cancer (NSCLC). One example apparatus includes a set of circuits that includes an image acquisition circuit that accesses a CT image of a region of tissue demonstrating cancerous pathology, a tumoral definition circuit that generates a tumoral surface boundary that defines a tumoral volume, a peritumoral segmentation circuit that generates a peritumoral region based on the tumoral surface boundary, and that segments the peritumoral region into a plurality of annular bands, a radiomics circuit that extracts a set of discriminative features from the tumoral volume and at least one of the plurality of annular bands, and a classification circuit that classifies the ROI as a responder or a non-responder, based, at least in part, on the set of discriminative features. |
| US10950348B2 |
Predictive test for patient benefit from antibody drug blocking ligand activation of the T-cell programmed cell death 1 (PD-1) checkpoint protein and classifier development methods
A method is disclosed of predicting cancer patient response to immune checkpoint inhibitors, e.g., an antibody drug blocking ligand activation of programmed cell death 1 (PD-1) or CTLA4. The method includes obtaining mass spectrometry data from a blood-based sample of the patient, obtaining integrated intensity values in the mass spectrometry data of a multitude of pre-determined mass-spectral features; and operating on the mass spectral data with a programmed computer implementing a classifier. The classifier compares the integrated intensity values with feature values of a training set of class-labeled mass spectral data obtained from a multitude of melanoma patients with a classification algorithm and generates a class label for the sample. A class label “early” or the equivalent predicts the patient is likely to obtain relatively less benefit from the antibody drug and the class label “late” or the equivalent indicates the patient is likely to obtain relatively greater benefit from the antibody drug. |
| US10950347B2 |
Systems and methods of treatment using intervention and tasking determination
Devices, systems, and methods for use in managing patient treatments utilizing pharmaceutical or therapeutic compounds. Methods include accessing one or more fields of information relating to any of a patient, physician and drug treatment and relating the one or more fields, or combination thereof, to a particular attribute or outcome. By analyzing the one or more fields of data in relation to the attribute or outcome, the system determines suitability of an intervention(s) and tasks the intervention(s) to one or more entities to facilitate the desired attribute or outcome. In certain aspects, the system facilitates identification of complex relationships and trends between seemingly unrelated fields of information and outputs information for use in an intervention or various other purposes according to the attribute or outcome desired by the user. |
| US10950346B2 |
Utilizing artificial intelligence for data extraction
Solved diagnosis case data is stored by utilizing a redundant discrimination net as a dynamic memory. The stored diagnosis case data is incorporated to form scientific descriptions within a medical knowledge base and heuristics within an empirical knowledge base. Diagnosis hypotheses are generated using an initial symptom description, the dynamic memory, and the medical knowledge base. The initial symptom description is received from an end user. A subset of the diagnosis hypotheses is created to form one or more solution cases. The one or more solution cases are presented to a subject matter expert. A diagnosis success or a diagnosis failure identifying, based on a response received from the subject matter expert, to form an assessed solution case. An assessed solution case is converted into experiences. The experiences are inputted into the dynamic memory. Data containing the assessed solution case is transmitted to a medical artificial intelligence analytics application. |
| US10950344B2 |
Wireless medical room control arrangement for control of a plurality of medical devices
A method for wirelessly controlling a portable medical system located in a medical room, includes automatically determining that the portable medical system is located in the medical room via a wireless controller and a room identifier identifying the medical room and a system identifier stored in the wireless controller and the portable medical system; and sending wireless commands from the wireless controller to the portable medical system to operate the portable medical system. |
| US10950343B2 |
Highlighting best-matching choices of acquisition and reconstruction parameters
Systems and methods are provided for indicating recommended settings for data acquisition in a medical scanner. A scan protocol including a first parameter is identified. A first subset of values is determined for the first parameter as a function of the scan protocol. A first plurality of values is displayed for the first parameter with the first subset of values highlighted. A first selection is received of a first selected value for the first parameter. Image data is generated using the first selection. |
| US10950342B2 |
Portable medical support system with ancillary viewing mode and method of operation thereof
A medical ventilator (100, 200) including a first user interface (114) having a touch-sensitive display having a display area; and at least one controller (104) which determines whether a second user interface (122, 222) having a touch-sensitive display is coupled to the medical ventilator, enables the first user interface when it is determined that the second user interface is not coupled to the medical ventilator, and enables the second user interface when it is determined that the second user interface is coupled to the medical ventilator. |
| US10950338B2 |
Method and apparatus for generating an artificial intelligence 3D dataset and performing interactive manipulation and rendering of the dataset
A method comprises generating a 3D volumetric dataset through an artificial intelligence process. Then, performing a simulation by first assigning mechanical type properties to a 3D volumetric dataset. Then, performing rendering of the 3D volumetric wherein the 3D volumetric dataset has a first configuration. Then, receiving an input to cause the 3D volumetric dataset to change from a first configuration to a second configuration wherein the change in configuration is in accordance with the nature of the input and the mechanical type properties of the 3D dataset. Then, performing rendering of the 3D volumetric dataset in the second configuration. This cycle is repeated over multiple changes in configuration. |
| US10950336B2 |
System and method for pre-action training and control
A system for improving physical motor control of affected human extremities and related cognitive and nervous system processes improvement includes a computer device having a display device and an input device each disposed in communication with the computer device. The computer device is configured to display to a user at least one virtual body part that represents a corresponding body part portion of the user requiring improvement. The virtual body part(s) is shown in a first configuration on the display device. The computer device receives user input that causes the virtual body part(s) to move in a user-directed motion. The computer device displays the user-directed motion of the virtual body part to a second configuration based on the user input. The user repeats the user input to cause improvement of physical motor control of the corresponding body part of the user. |
| US10950330B2 |
System and method for predictive and preventative treatment guidance for secure storage electronic medical records
A system and method that facilitates the automated replication of electronic medical record information between a patient and a health-care provider (HCP), such as a doctor, pharmacy, drug manufacturer, biologic manufacturer, or medical device manufacturer. The system uses: a cloud-based infrastructure that includes databases, mathematical models, and configuration information; a patient's electronic health record system providing personal data around a patient's individual personal electronic medical record (PEMR); and a server used to coordinate and authenticate the replication of data between the cloud-based infrastructure, the PEMR, and the EMR/EHR system of the HCP. The system provides support and security, such as by geographically distributed data fragmentation, for mobile platforms and web-based platforms and sophisticated mechanisms for the transmission of data between these systems. |
| US10950328B2 |
Method, apparatus and system for detecting structural variations
A method, apparatus and system for detecting structural variations is provided. A management apparatus divides a test sequence according to loci of chromosomes to obtain at least two portions of detection tasks, sends respective detection tasks to respective detection apparatuses and activates the respective detection tasks; detects detection task completion situations of detection apparatuses and determines whether the number of uncompleted tasks is reduced to a preset proportion threshold of a total number of tasks; when the number is reduced to a preset proportion threshold of the total number of tasks, the management apparatus sends, to detection apparatuses that have not yet completed detection tasks, an instruction message to kill uncompleted detection tasks; the management apparatus further divides the uncompleted detection tasks into at least two portions, sends respective detection tasks to respective detection apparatuses, and activates said respective detection apparatuses to continue to perform detection of structural variations. |
| US10950324B2 |
Shift register unit, shift register, gate driving circuit and display panel
The present disclosure provides a shift register unit whose operating time includes a plurality of multi-frame periods, each of the multi-frame periods including a plurality of frame periods. The shift register unit includes a trigger signal input terminal, an input module, a pull-up module, a pull-down control module, a plurality of pull-down modules, and a signal output terminal. The pull-down control module is configured to sequentially provide active signals to the control terminals of respective pull-down modules in pull-down stages of respective frame periods of one multi-frame period. The present disclosure further provides a shift register, a gate driving circuit and a display panel. The shift register unit has longer lifetime and better electric performance, and can meet the requirements of high-reliability products. |
| US10950319B2 |
Shift register and corresponding driving method, gate driving circuit and display device
A shift register and a corresponding driving method, a gate driving circuit and a display device, the shift registers includes an input and reset circuit, a first output circuit, a second output circuit, a first pull-down circuit and a second pull-down circuit; the first output circuit and the second output circuit output gate driving signals according to potentials at a first clock signal terminal and a second clock signal terminal respectively, the first pull-down circuit and the second pull-down circuit reset potentials at a pull up node, a first output terminal and a second output terminal according to potentials at a first pull-down node a second pull-down node respectively. |
| US10950318B2 |
Memory proximity disturb management
Exemplary methods, apparatuses, and systems include a controller to manage memory proximity disturb. The controller identifies a first memory location in response to an access of a second memory location, the first memory location storing a first value. The controller updates a first disturb value by a first amount, the first disturb value representing a cumulative disturb effect on the first value in the first memory location by accesses to a first plurality of memory locations proximate to the first memory location, the first plurality of memory locations including the second memory location. |
| US10950317B2 |
Read disturb scan consolidation
A processing device in a memory system determines that data stored in a first block of a plurality of blocks of a memory component satisfies a first threshold criterion pertaining to an age of the data. Responsive to the data stored in the first block satisfying the first threshold criterion, the processing device maintains a first counter to track a number of read operations performed on the first block. The processing device further determines that the data stored in the first block does not satisfy the first threshold criterion, and in response, maintains a second counter to track a number of read operations performed on a super block comprising the plurality of blocks. |
| US10950314B2 |
Semiconductor device
A semiconductor device includes a memory circuit, a first FIFO, a second FIFO and an input/output circuit. The memory circuit outputs data. The first FIFO receives data from the memory circuit and outputs data synchronously with a first clock signal. The second FIFO receives data output from the first FIFO and outputs data synchronously with the first clock signal. The input/output circuit outputs data output from the second FIFO. The second FIFO is disposed in the vicinity of the input/output circuit than the first FIFO. |
| US10950313B1 |
Responding to changes in available power supply
Methods of operating a memory having a first pool of memory cells having a first storage density and a second pool of memory cells having a second storage density greater than the first storage density, as well as apparatus configured to perform similar methods, might include determining whether a value of an indication of available power is less than a threshold, and, in response to determining that the value of the indication of available power is less than the threshold, increasing a size of the first pool of memory cells, limiting write operations of the memory to the first pool of memory cells, and postponing movement of data from the first pool of memory cells to the second pool of memory cells. |
| US10950312B2 |
Methods of operating a memory device comparing input data to data stored in memory cells coupled to a data line
Methods of operating a memory device include comparing input data to data stored in memory cells coupled to a data line, comparing a representation of a level of current in the data line to a reference, and determining that the input data potentially matches the data stored in the memory cells when the representation of the level of current in the data line is less than the reference. Methods of operating a memory device further include comparing input data to first data and to second data stored in memory cells coupled to a first data line or to a second data line, respectively, comparing representations of the levels of current in the first data line and in the second data line to a first reference and to a different second reference, and deeming one to be a closer match to the input data in response to results of the comparisons. |
| US10950311B2 |
Boosting read scheme with back-gate bias
Methods for reducing read disturb using NAND strings with poly-silicon channels and p-type doped source lines are described. During a boosted read operation for a selected memory cell transistor in a NAND string, a back-gate bias or bit line voltage may be applied to a bit line connected to the NAND string and a source line voltage greater than the bit line voltage may be applied to a source line connected to the NAND string; with these bias conditions, electrons may be injected from the bit line and annihilated in the source line during the read operation. To avoid leakage currents through NAND strings in non-selected memory blocks, the threshold voltages of source-side select gate transistors of the NAND strings may be set to a negative threshold voltage that has an absolute voltage value greater than the source line voltage applied during the read operation. |
| US10950301B2 |
Two transistor, one resistor non-volatile gain cell memory and storage element
A two transistor, one resistor gain cell and a suitable storage element are described. In some embodiments the gain cell has a resistive memory element coupled to a common node at one end to store a value and to a source line at another end, the value being read as conductivity between the common node and the source line of the resistive memory element, a write transistor having a source coupled to a bit line, a gate coupled to a write line, and a drain coupled to the common node to write a value at the bit line to the resistive memory element upon setting the write line high, and a read transistor having a source coupled to a bit line read line and a gate coupled to the common node to read the value written to the resistive memory element as a value at the second transistor gate. |
| US10950300B2 |
Lifetime mixed level non-volatile memory system
A flash controller for managing at least one MLC non-volatile memory module and at least one SLC non-volatile memory module. The flash controller is adapted to determine if a range of addresses listed by an entry and mapped to said at least one MLC non-volatile memory module fails a data integrity test. In the event of such a failure, the controller remaps said entry to an equivalent range of addresses of said at least one SLC non-volatile memory module. The flash controller is further adapted to determine which of the blocks in the MLC and SLC non-volatile memory modules are accessed most frequently and allocating those blocks that receive frequent writes to the SLC non-volatile memory module and those blocks that receive infrequent writes to the MLC non-volatile memory module. |
| US10950298B1 |
Mixed threshold voltage memory array
A static random access memory (SRAM) device includes a first memory array including a plurality of memory cells, each memory cell including a first pass gate transistor with a first threshold voltage connected to a bit line. The SRAM device further includes a second memory array including a plurality of memory cells, each memory cell including a second pass gate transistor with a second threshold voltage connected to the bit line. The SRAM device further includes a peripheral input-output circuit connected to the bit line. The SRAM device still further includes a column of write current tracking cells, each tracking cell disposed within a row of the first memory array and the second memory array, wherein the first memory array is between the peripheral input-output circuit and the second memory array. |
| US10950295B2 |
Memory cell array having three-dimensional structure
According to one embodiment, a semiconductor memory includes a first bit line; a second bit line; a source line; a first memory cell electrically connected between the first bit line and the source line and including a first transistor and a first capacitor; a second memory cell electrically connected between the second bit line and the source line and including a second transistor and a second capacitor; a third transistor electrically connected to the source line; and a sense amplifier circuit including a first node electrically connected to the first bit line and a second node electrically connected to the second bit line. |
| US10950293B2 |
Signal processing circuit, distributed memory, ROM, and DAC which signal processing circuit is embedded
A signal processing circuit is provided that generates output signals to be output from spatially different output ports based on bit combinations of an input word consisting of a plurality of bit signals. A distributed memory, a ROM and a DAC in which the signal processing circuit is used are also provided. A recognition circuit includes a serial port to which a bit signal is input and 2N output ports recognizing an input N-bit word and corresponding uniquely to 2N bit combinations. Output ports of the recognition circuit are connected to 2N input ports of an electric circuit. With no signal input to the recognition circuit, all outputs are constantly in a Low level state. In a case where a bit signal is input to the serial port of the recognition circuit, only one of the output ports corresponding to the bit combinations turns to a High level state. |
| US10950277B1 |
Signal line layouts including shields, and related methods, devices, and systems
An integrated circuit including a signal line layout is disclosed. A signal line layout may include a number of signal lines configured for conveying a number of signals. The signal line layout may further include a number of shield lines. Each signal line of the number of signal lines may be positioned adjacent a first shield line and a second shield line of the number of the shield lines. Further, first shield line may extend a length of an adjacent signal line and the second shield line may extend less than a length of the adjacent signal line. An electronic system including circuitry having one or more signal line layouts, and methods of forming signal line layout are also described. |
| US10950273B2 |
Distributed scalable media environment for advertising placement in movies
A method of placing an ad in a video in an original format may include producing a transcoded video in a proxy format which is a representation of frames of the video in the original format. The transcoded video in the proxy format is convertible to other formats for output. The method may include selecting the ad from a set of ads, selecting a location within a frame of the transcoded video where the ad is to be placed, selecting frames of the transcoded video where the ad is to be placed, placing a placeholder in the transcoded video in the selected frames at the selected location, and storing the transcoded video in the proxy format. When the transcoded video is presented to a user on a display device, the selected ad is inserted in place of the placeholder. |
| US10950270B2 |
Audio modification for adjustable playback rate
Features described herein relate to providing the capability to playback audiovisual content in a comprehensible manner at a rate adjustable by the viewer. For example, if a viewer wishes to watch a one hour news program, but the viewer only has thirty minutes to view the program, playback of the program at twice the rate, but in a comprehensible manner is provided. To provide the playback of the video at the adjustable rate, substitute audio is generated by adding or removing audio content without changing the playback rate of the audio. The video at the adjusted playback rate and the substitute audio at the normal playback rate may have the same duration and in some embodiments, may be presented synchronously. |
| US10950267B1 |
HAMR media to assist optically transparent build-up on NFT to improve reliability
The present disclosure relates to a magnetic recording medium for a magnetic media drive. Absorbing smears can develop on magnetic recording heads during operation. The absorbing smears lead to shortened drive lifetime. Transparent smears, on the other hand, do not have as deleterious of an impact on drive lifetime as compared to absorbing smears. By doping the medium with a dopant that can lead to development of transparent smears, the formation of absorbing smears can be reduced or even eliminated, which leads to a longer drive lifetime. The dopant can be disposed in the capping layer of the medium or in the absorbing overcoat layer. The dopant will migrate through the medium to the top surface of the medium during operation. From the top surface of the medium, the dopant will deposit on the magnetic head and form a transparent smear. |
| US10950262B2 |
Magnetic reader sensor with shield-to-shield spacing improvement and better free layer-to-shield spacing control
An MTJ or MR read sensor is formed by depositing a stack in a reverse order with a free layer (FL) deposited on a lower shield, followed by a tunneling barrier layer (for an MTJ) or a conducting spacer layer (for an MR) and, finally, an antiferromagnetically coupled pinning structure and an upper shield. This reverse order permits a series of etching processes to be accurately performed on the lower shield and the stack together with the formation of biasing layers that are coupled to the lower shield and the stack, without adversely affecting the stability of the pinning structure. Further, the distance between the FL and the shield is accurately determined and repeatable even down to the sub-nm regime. An upper shield can then be formed and also coupled to the biasing layers. |
| US10950259B2 |
Magnetic head and magnetic recording and reproducing device
According to one embodiment, a magnetic head includes a magnetic pole, a first shield, and a stacked body. The stacked body is provided between the magnetic pole and the first shield. The stacked body includes a magnetic layer including at least one selected from the group consisting of Fe, Co, and Ni, a first conductive layer provided between the magnetic pole and the magnetic layer, the first conductive layer being nonmagnetic, and a second conductive layer provided between the magnetic layer and the first shield, the second conductive layer being nonmagnetic. The first conductive layer includes Ir. A thickness of the first conductive layer along a first direction is not less than 0.3 nm and not more than 0.8 nm. The first direction is from the first conductive layer toward the second conductive layer. |
| US10950255B2 |
Audio fingerprint extraction method and device
An audio fingerprint extraction method and device are provided. The method includes: converting an audio signal to a spectrogram; determining one or more characteristic points in the spectrogram; in the spectrogram, determining one or more masks for the characteristic points; determining mean energy of each of the spectrum regions; determining one or more audio fingerprint bits according to mean energy of the plurality of spectrum regions in the one or more masks; judging credibility of the audio fingerprint bits to determine one or more weight bits; and combining the audio fingerprint bits and the weight bits to obtain an audio fingerprint. Each of the one or more masks includes a plurality of spectrum regions. |
| US10950254B2 |
Producing comprehensible subtitles and captions for an effective group viewing experience
One or more processors identify one or more users expected to consume media content having associated subtitle data. A user profile associated with each of the one or more users is received, and one or more features are extracted from each user profile. The one or more features are representative of a characteristic of the user. A group profile is created for the one or more users based upon the extracted features. The subtitle data associated with the media content is received, and one or more portions of the subtitle data are modified based upon the group profile to generate augmented subtitle data. The augmented subtitle data is sent to a display device for being rendered in the display device. |
| US10950251B2 |
Coding of harmonic signals in transform-based audio codecs
Systems and methods include audio encoders having improved coding of harmonic signals. The audio encoders can be implemented as transform-based codecs with frequency coefficients quantized using spectral weights. The frequency coefficients can be quantized by use of the generated spectral weights applied to the frequency coefficients prior to the quantization or by use of the generated spectral weights in computation of error within a vector quantization that performs the quantization. Additional apparatus, systems, and methods are disclosed. |
| US10950246B2 |
Apparatus and method for providing enhanced guided downmix capabilities for 3D audio
An apparatus for downmixing three or more audio input channels to obtain two or more audio output channels is provided. The apparatus includes a receiving interface for receiving the three or more audio input channels and for receiving side information. Moreover, the apparatus includes a downmixer for downmixing the three or more audio input channels depending on the side information to obtain the two or more audio output channels. The number of the audio output channels is smaller than the number of the audio input channels. The side information indicates a characteristic of at least one of the three or more audio input channels, or a characteristic of one or more sound waves recorded within the one or more audio input channels, or a characteristic of one or more sound sources which emitted one or more sound waves recorded within the one or more audio input channels. |
| US10950238B2 |
Bluetooth speaker base, method and system for controlling thereof
The present disclosure provides a Bluetooth speaker base, a method and a system for controlling a Bluetooth speaker base. The method includes: acquiring voice data, and determining whether the voice data includes a wake-up word, when positions of the Bluetooth speaker base and a Bluetooth speaker satisfy a preset condition; controlling the Bluetooth speaker base to enter a wake-up recognition state, and compressing the voice data based on a compression ratio, when the voice data includes the wake word; and sending the voice data compressed to a mobile terminal through a first profile, to cause the mobile terminal to decompress the voice data received, send the voice data decompressed to a server for voice recognition to obtain audio data, and send the audio data to the Bluetooth speaker for playback through a second profile. |
| US10950230B2 |
Information processing device and information processing method
Included are a speech recognition result obtainer that obtains a speech recognition result, which is text data obtained by speech recognition processing, a priority obtainer that obtains priority corresponding to each of a plurality of tasks that are each identified by a plurality of dialog processing based on the speech recognition result; and a dialog processing controller that causes a plurality of devices to perform the distributed execution of the plurality of dialog processing mutually different from each other. The dialog processing controller provides, based on the priority, control information in accordance with a task identified by the distributed execution to an executer that operates based on the control information. |
| US10950228B1 |
Interactive voice controlled entertainment
Methods and systems for receiving shouted-out user responses to broadcast entertainment content, and for determining the responsiveness of those responses in relation to the broadcast content. In particular, entertainment broadcasts can be accompanied by mark-up data that represents various events within a given broadcast, which can be compared to the shouted-out responses to determine their accuracy. For example, if a game show was broadcast and an individual started shouting out answers during the broadcast, embodiments disclosed herein could utilize a voice-controlled electronic device that captures the shouted-out answers and passes them on to a language processing system that determines whether they are correct by comparing the answers to the mark-up data. The voice-controlled electronic device can also “listen” to background sounds to capture the broadcast of the entertainment content, and send that content to the language processing system, which can use that captured data to synchronize the actual broadcast with the analysis of the shouted-out answers to provide individuals with an immersive entertainment experience. |
| US10950226B2 |
System and method for activation of voice interactive services based on user state
The present invention provides a system for activating personal assistance services. The system includes an audio data collector adapted to collect a sample of speech, a processing module, and a service activator couple to an output device. The processing module further includes an audio feature extractor that extracts a plurality of acoustic features from the sample of speech, and a classification unit that classifies a status of a user from the plurality of acoustic features. The Service activator activates a personal assistance service according to the status of the user classified by the classification unit. |
| US10950225B2 |
Acoustic model learning apparatus, method of the same and program
An acoustic model learning apparatus includes a first output probability distribution calculating part that calculates a first output probability distribution including a distribution of output probabilities of respective units of an output layer using a feature amount obtained from an acoustic signal for learning and a learned first acoustic model including a neural network, and the first output probability distribution calculating part obtains the first output probability distribution using a smoothing parameter made up of a real value greater than 0 as input so that the first output probability distribution approaches a uniform distribution as the smoothing parameter is greater, and calculates the first output probability distribution by obtaining logits of respective units of an output layer using the feature amount obtained from the acoustic signal for learning and the first acoustic model and setting a value of the smoothing parameter greater in the case where an output unit number with the greatest logit value is different from a correct unit number than in the case where the output unit number with the greatest logit value matches the correct unit number. |
| US10950218B2 |
Drive system and electric apparatus provided therewith
A drive system includes an actuator including an electric motor, a microphone, and a sound generator emitting a sound in response to a signal derived from sound caught by the microphone. The microphone is attached to the actuator. This drive system makes it easy to establish an optimal positional relationship between the microphone and the noise source in the actuator, thereby properly reducing noise arising from the actuator. |